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e4311214eb
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Merge pull request 'fix: axi dma wrapper' (#2) from dev into master
Reviewed-on: #2
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2026-07-14 12:14:48 +03:00 |
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a0a7137064
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fix: axi dma wrapper
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2026-07-10 18:59:50 +03:00 |
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f64848fb59
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Merge pull request 'add wrappers 1.0' (#1) from dev into master
Reviewed-on: #1
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2026-07-10 17:31:51 +03:00 |
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3ddf9130d3
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fix: reg_pulse support
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2026-07-10 17:30:51 +03:00 |
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8cadd5a02f
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Merge branch 'master' of https://git.radiophotonics.ru/baulin.fa/rtl_libs
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2026-06-26 17:46:54 +03:00 |
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f3450cb22a
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added axi dma wrapper
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2026-06-25 13:42:31 +03:00 |
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cf45646812
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rtl: rework dma AXIS cmd&status
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2026-06-24 13:32:42 +03:00 |
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3cc1235eea
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rtl: add axiS dma wrapper & tests
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2026-06-23 18:18:00 +03:00 |
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844c7ea25f
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refactor: remove old wrapper
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2026-06-17 18:09:49 +03:00 |
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51956ffd2d
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fix: axi4l reg example update
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2026-06-17 18:09:13 +03:00 |
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4a4c8d8ef2
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fix: tb cases, now passes
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2026-06-17 17:54:09 +03:00 |
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dffb32901f
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fix: args for tb
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2026-06-17 17:53:57 +03:00 |
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9ef62b80b8
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infra: add tb result to gitignore
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2026-06-17 17:24:23 +03:00 |
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8818dd7aac
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tests: add tb for axi4l_reg_map [WIP, 1 test broken]
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2026-06-17 17:23:23 +03:00 |
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600fba5d3e
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tests: add axi4l_reg test wrapper
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2026-06-17 17:16:07 +03:00 |
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7cc0b19657
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infra: add makefile for axi lite reg tests
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2026-06-17 16:37:48 +03:00 |
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da01c5856b
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refactor: move dma if converters to single file
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2026-06-17 14:48:06 +03:00 |
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14004aa90e
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tests: update main tb for dma
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2026-06-12 13:56:13 +03:00 |
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94090f2f8e
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tests: update wrappers
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2026-06-12 13:55:46 +03:00 |
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0933768537
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rtl: re-factor dma for new ifaces
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2026-06-11 17:03:37 +03:00 |
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7bafa8534f
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rtl: add write desc converters
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2026-06-11 15:47:59 +03:00 |
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344d03e1d5
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rtl: add read desc converters
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2026-06-11 15:47:43 +03:00 |
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0eaf39ade7
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rtl: add axi dma if collection
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2026-06-11 15:23:11 +03:00 |
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c18233e16a
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chore: add some notes
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2026-06-09 18:11:27 +03:00 |
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fbfb869f00
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tests: add test wrapper flat2if
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2026-06-09 18:07:42 +03:00 |
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4e8141d13f
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tests: use forencich test for DMA wrapper
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2026-06-09 18:06:48 +03:00 |
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a2e330d193
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rtl: add dma simple wrapper
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2026-06-09 18:06:14 +03:00 |
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ea478fa0c7
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fix: path in makefile
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2026-06-09 18:05:55 +03:00 |
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35ed5d6e6e
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tests: add dma test
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2026-06-09 18:00:12 +03:00 |
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f95f6b5b86
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tests: add simple axis loopback module
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2026-06-09 17:55:21 +03:00 |
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fc89ab10c4
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infra: add forencich repository as a submodule
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2026-06-09 17:37:55 +03:00 |
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30fa85d01c
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tests: add axis loopback test
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2026-06-09 17:23:07 +03:00 |
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7e7008ed87
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tests: add wrapper for axis
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2026-06-09 17:22:25 +03:00 |
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52a2bccc77
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rtl: add axis iface
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2026-06-09 17:18:56 +03:00 |
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43e2460124
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docs: add README for tests
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2026-06-09 16:00:58 +03:00 |
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f1c760349f
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tests: add more cases for base test
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2026-06-09 15:38:06 +03:00 |
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6374dba26d
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infra: update gitignore
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2026-06-09 15:30:07 +03:00 |
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c0fb75e7c3
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tests: add simple read/write test
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2026-06-09 15:29:59 +03:00 |
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bc91a8b3ea
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tb: add converters top file
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2026-06-09 15:29:03 +03:00 |
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563c1d3b69
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tests: add simple loopback module
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2026-06-09 15:07:36 +03:00 |
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0c314bf2ae
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infra: add gitignore for sim builds
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2026-06-09 14:59:49 +03:00 |
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79ea1b3486
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infra: add tb mock and test makefile
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2026-06-09 14:57:16 +03:00 |
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67f075b2e5
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refactor: add rtl dir
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2026-06-09 14:56:46 +03:00 |
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e31436d909
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fix: missing ;
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2026-06-09 14:23:34 +03:00 |
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2c96a87585
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fix: experimental change to fix reg map pkg for vivado
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2026-05-29 15:30:42 +03:00 |
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3261b66aaa
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fix: syntax errors
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2026-05-29 15:30:24 +03:00 |
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338f30c0d7
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rtl: add AXI if defines
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2026-05-28 16:41:26 +03:00 |
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00563cbddd
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chore: first commit
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2026-05-28 16:40:47 +03:00 |
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