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Phil
52a2bccc77
rtl: add axis iface
2026-06-09 17:18:56 +03:00
axi
rtl: add axis iface
2026-06-09 17:18:56 +03:00
.gitignore
infra: update gitignore
2026-06-09 15:30:07 +03:00
README.md
chore: first commit
2026-05-28 16:40:47 +03:00
README.md
RTL Libs
AXI Defines
Description
universal components for FPGA development
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SystemVerilog
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