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Author	SHA1	Message	Date
Phil	7d1bfe25b4	infra: update constraints to use unified ones for board and additional for debug nodes	2026-04-14 15:39:21 +03:00
Phil	df6c204cbd	docs: add readme to ethernet-udp	2026-04-14 12:36:05 +03:00
Phil	8907fea8a4	fix: signal in axis_mac	2026-04-14 12:32:10 +03:00
Phil	1c654f4e8e	tests: add tb to axis_mac project	2026-04-14 12:31:21 +03:00
Phil	c372dcd942	infra: add sim support to vivado.mk targets	2026-04-14 12:30:30 +03:00
Phil	a3ed4919bc	chore: add debug for base ethernet test	2026-04-10 15:40:29 +03:00
Phil	d813855224	tests: add test project for ethernet echo & axis_mac tests	2026-04-10 15:39:59 +03:00
Phil	0480642167	chore: little refactor in eth stack	2026-04-10 15:38:09 +03:00
Phil	c33afac783	rtl: implement axis UDP TX logic	2026-04-10 15:37:19 +03:00
Phil	26c627c988	rtl: add udp ram data count signal logic	2026-04-10 15:35:26 +03:00
Phil	879c4d49b2	infra: add vivado builds to gitignore	2026-04-10 15:19:43 +03:00
Phil	3544e3e2dc	test: add sample top for axis loopback test	2026-04-08 19:58:34 +03:00
Phil	100feb0ea1	rtl: add constrains for axis eth fpga project	2026-04-01 18:10:17 +03:00
Phil	1310555b55	chore: remove old file	2026-04-01 18:08:50 +03:00
Phil	c75443d170	test: udp axis rx	2026-04-01 18:04:01 +03:00
Phil	3a58119960	rtl: eth udp rx -> axis	2026-04-01 18:03:47 +03:00
Phil	0b9fb64193	rtl: add axis eth rx prototype	2026-04-01 11:44:46 +03:00
Phil	a1386fc8a4	infra: add vivado.mk target for generic builds	2026-03-31 15:08:28 +03:00
Phil	7fedc36562	tests: add sample project for minimal eth udp echo	2026-03-31 15:08:12 +03:00
Phil	0dd0006e47	infra: add gitignore	2026-03-31 12:53:25 +03:00
Phil	ded2afc0db	rtl: add sources for ethernet udp stack	2026-03-31 12:53:16 +03:00
baulin.fa	aa1d45fe15	infra: init project structure	2026-03-25 16:17:55 +03:00
Phil	1c9bce7927	chore: update readme	2026-03-25 15:57:00 +03:00
Филипп Баулин	9d6cf8c0fb	Initial commit	2026-03-25 15:48:16 +03:00