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771225cd77
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fix: post-implementation timing sim TB passed
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2026-06-23 17:27:20 +03:00 |
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b38a693676
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fix: timing. New DAC-ADC line code
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2026-06-20 09:33:33 +03:00 |
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789255fa04
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fix: add timing sim tricks
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2026-06-20 04:05:37 +03:00 |
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efcd6ef5d0
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upd:
fast fix of sampler OTR.
fix debug.xdc
Major add of full automated testing for TB.
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2026-06-20 03:07:05 +03:00 |
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4fbecd5e30
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upd: sync design log verbosity + optimal delay latency
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2026-06-19 20:49:17 +03:00 |
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4923f01322
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upd: TB automation,
DA->AD delay line for signal integrity
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2026-06-19 08:00:00 +03:00 |
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fd9280737d
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fix: refactoring
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2026-06-16 20:26:45 +03:00 |
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c165d346a0
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update: new synchronizer + half-baked TB
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2026-06-10 16:40:53 +03:00 |
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906d5090cd
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reflectometer top testbench config update
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2026-05-26 18:30:51 +03:00 |
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dc761f31dc
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Add reflectometer testbench stable boilerplate with tasks
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2026-05-22 17:07:15 +03:00 |
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10dc60b54f
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doc: README decoration
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2026-05-15 16:41:18 +03:00 |
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4f82a27cb7
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docs: update READMEs
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2026-05-15 16:27:53 +03:00 |
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5b9469560a
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infra: update Makefile for synchronizer project
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2026-05-15 15:08:22 +03:00 |
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d8d89b3566
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chore: remove old debug projects
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2026-05-15 14:10:42 +03:00 |
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9efbd6586f
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chore: generator evolution
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2026-05-15 13:36:10 +03:00 |
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5c1866d571
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chore: re-organise designs for better hierarchy
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2026-05-12 13:25:44 +03:00 |
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3a2d8eda2b
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rtl: reorganised top without eth
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2026-05-08 19:03:24 +03:00 |
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2a928c2407
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rtl: add more debug nodes for reflectometer
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2026-05-08 15:58:33 +03:00 |
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bc0a1c8b66
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fix: signal names in reflectometer
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2026-05-08 15:58:11 +03:00 |
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8c4154baf0
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rtl: reflectometer add synchronizer logic
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2026-05-06 15:38:25 +03:00 |
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c279f1158d
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chore: clean code sync_top
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2026-05-06 15:37:15 +03:00 |
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4fc354955c
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rtl: debug synchronizer project makefile
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2026-05-06 14:41:26 +03:00 |
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57570bea00
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rtl: debug synchronizer project constraints
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2026-05-06 14:41:15 +03:00 |
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03d0abbe86
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rtl: debug synchronizer project testbench
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2026-05-06 14:40:53 +03:00 |
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d26bc29507
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rtl: debug synchronizer project
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2026-05-06 14:40:33 +03:00 |
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179347659b
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rtl: update reflectometer top design
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2026-04-30 13:10:41 +03:00 |
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9fd311d671
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chore: add debug XDC for main project
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2026-04-30 13:05:33 +03:00 |
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138c5d7dce
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dev: full project reflectometer
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2026-04-28 17:18:41 +03:00 |
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16cef61a88
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rtl: add sample reflectometer project mock
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2026-04-28 17:05:14 +03:00 |
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8b1e209da6
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rtl: add project with eth and generator
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2026-04-17 14:53:14 +03:00 |
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f98051bc53
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docs: add controller READMEs
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2026-04-15 18:54:07 +03:00 |
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851851828e
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fix: add missing constrain to Makefile
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2026-04-15 18:23:52 +03:00 |
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35e9feb87b
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tests: add sample project for eth+ctrl
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2026-04-15 17:57:16 +03:00 |
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ea7af4ed62
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infra: init designs folder
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2026-04-15 13:40:19 +03:00 |
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