|
|
7d1bfe25b4
|
infra: update constraints to use unified ones for board and additional for debug nodes
|
2026-04-14 15:39:21 +03:00 |
|
|
|
1c654f4e8e
|
tests: add tb to axis_mac project
|
2026-04-14 12:31:21 +03:00 |
|
|
|
d813855224
|
tests: add test project for ethernet echo & axis_mac tests
|
2026-04-10 15:39:59 +03:00 |
|
|
|
3544e3e2dc
|
test: add sample top for axis loopback test
|
2026-04-08 19:58:34 +03:00 |
|
|
|
100feb0ea1
|
rtl: add constrains for axis eth fpga project
|
2026-04-01 18:10:17 +03:00 |
|
|
|
0b9fb64193
|
rtl: add axis eth rx prototype
|
2026-04-01 11:44:46 +03:00 |
|
