baulin.fa/reflectometer_fpga_project
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dev/debug #6

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baulin.fa merged 5 commits from dev/debug into master 2026-04-17 15:30:08 +03:00
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5 Commits
Author SHA1 Message Date
Phil 8b1e209da6 rtl: add project with eth and generator 2026-04-17 14:53:14 +03:00
Phil 924f94986c chore: exclude bitstreams from git 2026-04-17 14:50:23 +03:00
Phil 83c714cd6f sw: update console, now can send actual data 2026-04-17 14:44:27 +03:00
Phil f54883a9e7 fix: constraint re-pin DAC to J11 header 2026-04-17 14:43:31 +03:00
Phil b9c75b823f fix: generator wrt signal incorrect clocking 2026-04-17 14:42:20 +03:00