baulin.fa/reflectometer_fpga_project
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7665afd50babf25645e775c1cbfc3fac0d215ffb
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3 Commits

Author SHA1 Message Date
babintsev.lv
7665afd50b add: half-baked reflectometer TB 
fix: constraints port names;
ready: reflectometer top module
 2026-07-08 14:56:51 +03:00
babintsev.lv
906d5090cd reflectometer top testbench config update 2026-05-26 18:30:51 +03:00
babintsev.lv
dc761f31dc Add reflectometer testbench stable boilerplate with tasks 2026-05-22 17:07:15 +03:00