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Author	SHA1	Message	Date
Филипп Баулин	0be4f35152	infra: add verilog-ethernet as a submodule	2026-03-25 16:28:35 +03:00
baulin.fa	aa1d45fe15	infra: init project structure	2026-03-25 16:17:55 +03:00
Phil	1c9bce7927	chore: update readme	2026-03-25 15:57:00 +03:00
Филипп Баулин	9d6cf8c0fb	Initial commit	2026-03-25 15:48:16 +03:00