baulin.fa/reflectometer_fpga_project
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Филипп Баулин ad6d6a4e2b Merge pull request 'rtl: sampler ready' (#2) from dev/sampler into master 
Reviewed-on: #2
2026-04-08 15:25:03 +03:00
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infra: init project structure
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rtl: sampler ready
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infra: init project structure
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README.md
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README.md

reflectometer_fpga_project

Проект по разработке аппаратной вычислительной части для отпического рефлектометра для обнаружения утечек.

Description
No description provided
Readme 566 KiB
Languages
Verilog 37.5%
Tcl 31.7%
SystemVerilog 25.6%
Makefile 4%
Python 1.2%