Commit Graph
27 Commits
Author SHA1 Message Date
Phil 77526c44c2 tests: update accum TB 2026-07-02 11:49:31 +03:00
Phil 5010c42ae3 rtl: update accum_top to use dynamic window_size 2026-07-02 11:33:40 +03:00
Phil f0542845b0 rtl: rework out_axis_fifo 2026-07-01 18:21:11 +03:00
Phil 46333c3601 rtl: rework adder for dynamic window_size 2026-07-01 18:06:56 +03:00
Phil 2a3796a60f rtl: update accum - change window size to signal 2026-07-01 14:57:23 +03:00
Phil 425c922690 rtl: update accum to support window_size < 3 2026-06-26 18:39:33 +03:00
Phil 02416a9621 rtl: rework memory controls in accum 2026-06-26 18:07:02 +03:00
Phil 1504569fb6 debug: add waveconfigs 2026-05-15 14:09:33 +03:00
Phil 66a15cd6e0 test: more cases for accum 2026-05-08 16:43:53 +03:00
Phil 3ea03fd40c docs: add README for accum 2026-04-28 15:36:59 +03:00
Phil 312bc0c798 fix: automate tb 2026-04-28 13:28:49 +03:00
Phil c4a7c21bea fix: clock name un xdc 2026-04-28 13:13:40 +03:00
Phil e083cd5c2e rtl: update accum to support real cases 2026-04-28 13:13:27 +03:00
Phil fc0e710b3e tests: add waveconfigs 2026-04-28 12:11:41 +03:00
Phil 275055291e fix: update names in out_axis_fifo_tb 2026-04-28 11:57:53 +03:00
Phil 002f0cace5 test: add full testbenches for accum 2026-04-28 11:57:13 +03:00
Phil 91eaf6c4f8 fix: out_axis_fifo states 2026-04-28 11:56:19 +03:00
Phil 9b189f931f rtl: update accum design 2026-04-28 11:55:46 +03:00
Phil a8a3aff498 rtl: first impl of adder+accum 2026-04-22 16:38:22 +03:00
Phil b54e69dec0 chore: add clocks for accum_fifo impl test 2026-04-21 19:48:20 +03:00
Phil 7be26d9d1a chore: update tb files 2026-04-21 19:47:56 +03:00
Phil 3dcaaf8ea5 fix: better sync for accum fifo 2026-04-21 19:47:46 +03:00
Phil dfccc01225 tests: auto tb for out_axis_fifo 2026-04-21 19:47:27 +03:00
Phil 21785aaac7 rtl: send part of out_axis_fifo 2026-04-21 17:26:02 +03:00
Phil 8e46f965df fix: incorrect fifo threshold value 2026-04-17 21:58:20 +03:00
Phil 7f9ad95e68 tests: add simple tb for accum output fifo 2026-04-17 21:51:00 +03:00
Phil 4786d2d7f6 rtl: wip accum output module, currently only with write part 2026-04-17 21:50:30 +03:00