|
|
fc0e710b3e
|
tests: add waveconfigs
|
2026-04-28 12:11:41 +03:00 |
|
|
|
275055291e
|
fix: update names in out_axis_fifo_tb
|
2026-04-28 11:57:53 +03:00 |
|
|
|
002f0cace5
|
test: add full testbenches for accum
|
2026-04-28 11:57:13 +03:00 |
|
|
|
91eaf6c4f8
|
fix: out_axis_fifo states
|
2026-04-28 11:56:19 +03:00 |
|
|
|
9b189f931f
|
rtl: update accum design
|
2026-04-28 11:55:46 +03:00 |
|
|
|
a8a3aff498
|
rtl: first impl of adder+accum
|
2026-04-22 16:38:22 +03:00 |
|
|
|
b54e69dec0
|
chore: add clocks for accum_fifo impl test
|
2026-04-21 19:48:20 +03:00 |
|
|
|
7be26d9d1a
|
chore: update tb files
|
2026-04-21 19:47:56 +03:00 |
|
|
|
3dcaaf8ea5
|
fix: better sync for accum fifo
|
2026-04-21 19:47:46 +03:00 |
|
|
|
dfccc01225
|
tests: auto tb for out_axis_fifo
|
2026-04-21 19:47:27 +03:00 |
|
|
|
21785aaac7
|
rtl: send part of out_axis_fifo
|
2026-04-21 17:26:02 +03:00 |
|
|
|
8e46f965df
|
fix: incorrect fifo threshold value
|
2026-04-17 21:58:20 +03:00 |
|
|
|
7f9ad95e68
|
tests: add simple tb for accum output fifo
|
2026-04-17 21:51:00 +03:00 |
|
|
|
4786d2d7f6
|
rtl: wip accum output module, currently only with write part
|
2026-04-17 21:50:30 +03:00 |
|
