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chore: generator and sampler brushed

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This commit is contained in:
otroubi
2026-04-30 13:14:26 +03:00
parent 179347659b
commit f719533eb9
2 changed files with 2 additions and 28 deletions
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8
rtl/generator/src/generator.sv
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@ -35,7 +35,8 @@ module generator
start_d <= start;
end
wire start_pulse = start & ~start_d;
wire start_pulse;
assign start_pulse = start & ~start_d;
always @(posedge clk_in) begin
@ -53,11 +54,6 @@ module generator
end else begin
if (start) begin
enable <= 1'b1;
// pulse_width_reg <= pulse_width;
// pulse_period_reg <= pulse_period;
// pulse_num_reg <= pulse_num;
// pulse_height_reg <= pulse_height;
cnt_pulse_num <= '0;
cnt_period <= '0;
end

22
rtl/sampler/src/sampler.sv
View File

@ -95,28 +95,6 @@ module sampler
end
endgenerate
// always @(posedge clk_in) begin
// if (rst) begin
// buffer <= '0;
// cnt <= '0; //
// buffer_ready <= 0;
// end
// else begin
// buffer_ready <= 0;
// if (!out_of_range_reg) begin
// buffer <= {buffer[DATA_WIDTH*(PACK_FACTOR-1)-1:0], data_converted};
// if (cnt == PACK_FACTOR-1) begin
// cnt <= 0;
// buffer_ready <= 1;
// buffer <= {buffer[DATA_WIDTH*(PACK_FACTOR-1)-1:0], data_converted};
// end
// else begin
// cnt <= cnt + 1;
// end
// end
// end
// end
assign m_axis_tdata = buffer;
assign m_axis_tvalid = buffer_ready;