chore: generator and sampler brushed

rtl/sampler/src/sampler.sv

@@ -95,28 +95,6 @@ module sampler
       end
     endgenerate
     
-//    always @(posedge clk_in) begin
-//        if (rst) begin
-//            buffer <= '0;
-//            cnt <= '0; //
-//            buffer_ready <= 0;
-//        end
-//        else begin
-//            buffer_ready <= 0;
-//            if (!out_of_range_reg) begin
-//                buffer <= {buffer[DATA_WIDTH*(PACK_FACTOR-1)-1:0], data_converted};
-//                if (cnt == PACK_FACTOR-1) begin
-//                    cnt <= 0;
-//                    buffer_ready <= 1;
-//                    buffer <= {buffer[DATA_WIDTH*(PACK_FACTOR-1)-1:0], data_converted};
-//                end
-//                else begin
-//                    cnt <= cnt + 1;
-//                end
-//            end
-//        end
-//    end
-    
     assign m_axis_tdata = buffer;
     assign m_axis_tvalid = buffer_ready;