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tests: add test project for ethernet echo & axis_mac tests

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Phil
2026-04-10 15:39:59 +03:00
parent 0480642167
commit d813855224
4 changed files with 403 additions and 398 deletions
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4
rtl/ethernet-udp/tests/eth_axis/Makefile
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@ -8,13 +8,13 @@
# FPGA settings
FPGA_PART = xc7a35tfgg484-1
FPGA_TOP = ethernet_test_minimal
FPGA_TOP = ethernet_axis_echo
FPGA_ARCH = artix7
RTL_DIR = ../../src
# Files for synthesis
SYN_FILES = ethernet_test_minimal.v
SYN_FILES = ethernet_axis_echo.v
include ../../../../scripts/vivado.mk