Merge branch 'dev/design' of https://git.radiophotonics.ru/baulin.fa/reflectometer_fpga_project into dev/design
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@ -44,7 +44,7 @@ module generator
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cnt_period <= '0;
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sample_req <= 0;
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end else begin
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if (start) begin
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if (start & !enable) begin
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enable <= 1'b1;
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cnt_pulse_num <= '0;
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cnt_period <= '0;
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@ -57,6 +57,7 @@ module generator
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pulse_height_reg <= pulse_height;
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end
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if (enable) begin
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if (!sample_req && (cnt_period == 0)) begin
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pulse_height_out_reg <= ZERO_LEVEL;
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if (sample_done) begin
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