add accum_done signal

rtl/accum/src/accum.sv

@@ -22,7 +22,8 @@ module accumulator
     output out_valid,
     output readout_begin,
     input batch_req,
-    input finish
+    input finish,
+    output logic accum_done
     );
 
     logic [31:0] smp_num_reg, cnt_smp_num;
@@ -66,7 +67,6 @@ module accumulator
     // Then the next sequence can read the same address it is written
     logic accum_pipe_bypass_valid;
     logic [ACCUM_WIDTH-1:0] accum_pipe_bypass_data;
-    logic accum_done;
 
     logic accum_accept_last;
     logic accum_accept_last_all;