ChTheo
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  • Joined on 2025-09-18
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ChTheo created branch master in ChTheo/E502_ADC_BF_PC_companion 2025-09-18 17:28:51 +03:00
ChTheo pushed to master at ChTheo/E502_ADC_BF_PC_companion 2025-09-18 17:28:51 +03:00
26841ba30e data receive and all streams fails
dc6e7be012 added time measurement of HDMA receive
cf8bdd5b5c backup
a1dec94f1f added flushing (function X502_FlushRcv_buff) of receing buffer on PC between changing BlackFin settings via commands.
068b026473 working receiving data and dumping it to file. Also implemented simple python plotter of that data.
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ChTheo created repository ChTheo/E502_ADC_BF_PC_companion 2025-09-18 17:27:59 +03:00
ChTheo created branch master in ChTheo/E502_ADC_BFfirmware 2025-09-18 17:26:30 +03:00
ChTheo pushed to master at ChTheo/E502_ADC_BFfirmware 2025-09-18 17:26:30 +03:00
c1d0f32e6b implemented FLOOD mode for speed measurement of HMDA. But now HDMA streams fails in any mode...
ChTheo created branch experimental_0 in ChTheo/E502_ADC_BFfirmware 2025-09-18 17:26:30 +03:00
ChTheo pushed to experimental_0 at ChTheo/E502_ADC_BFfirmware 2025-09-18 17:26:30 +03:00
ChTheo created branch new-main in ChTheo/E502_ADC_BFfirmware 2025-09-18 17:26:30 +03:00
ChTheo pushed to new-main at ChTheo/E502_ADC_BFfirmware 2025-09-18 17:26:30 +03:00
ChTheo created repository ChTheo/E502_ADC_BFfirmware 2025-09-18 17:22:59 +03:00
ChTheo pushed to master at ChTheo/RadioPhotonic_PCB_software 2025-09-18 16:54:50 +03:00
76b6bb36f8 added build folder. Now compilde binary becomes available in git
ChTheo created branch master in ChTheo/RadioPhotonic_PCB_software 2025-09-18 16:50:02 +03:00
ChTheo pushed to master at ChTheo/RadioPhotonic_PCB_software 2025-09-18 16:50:02 +03:00
f20ad2301b fixed relative phases in Mach-Zander and ADC clocks. ADC clock delayed to move ADC sampling time far from the start of modulated period. Now there is 400 ns time reserve.
9974606734 partially solved issue with random modulator and ADC clock stopping at the end of ЛЧМ. Done: when we want to stop clocks -- enable IRQ on sloewr clock (TIM11). In IRQ switches TIM4, TIM11 to one-pulse mode, disables IRQ. When we starting these timers th next time -- we resets their counters, one-pulse mode disables.
0829fd0983 fixed modulation and ADC clocks initial phase to 0. (by TIM->CNT=0)
5756dfe749 configured ADC sync signals at fastest possible frequency: 1.75 MHz
61bb0c41db configured external ADC sync and Mach-Zander modulation clocks at 2 and 1 MHz respectively
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ChTheo created repository ChTheo/RadioPhotonic_PCB_software 2025-09-18 16:40:55 +03:00