|
|
f20ad2301b
|
fixed relative phases in Mach-Zander and ADC clocks. ADC clock delayed to move ADC sampling time far from the start of modulated period. Now there is 400 ns time reserve.
|
2025-04-18 17:05:26 +03:00 |
|
|
|
9974606734
|
partially solved issue with random modulator and ADC clock stopping at the end of ЛЧМ. Done: when we want to stop clocks -- enable IRQ on sloewr clock (TIM11). In IRQ switches TIM4, TIM11 to one-pulse mode, disables IRQ. When we starting these timers th next time -- we resets their counters, one-pulse mode disables.
|
2025-04-15 21:29:24 +03:00 |
|
|
|
0829fd0983
|
fixed modulation and ADC clocks initial phase to 0. (by TIM->CNT=0)
|
2025-04-15 19:00:22 +03:00 |
|
|
|
5756dfe749
|
configured ADC sync signals at fastest possible frequency: 1.75 MHz
|
2025-04-07 19:01:57 +03:00 |
|
|
|
61bb0c41db
|
configured external ADC sync and Mach-Zander modulation clocks at 2 and 1 MHz respectively
|
2025-04-07 17:29:51 +03:00 |
|
|
|
b02e3a35b7
|
solved laser current setup timing issue
|
2025-03-04 11:43:09 +03:00 |
|
|
|
59dce26129
|
applied last changes from version without git
|
2025-03-03 16:06:13 +03:00 |
|
|
|
d0637bb5e6
|
switched project to make
|
2025-03-03 16:03:02 +03:00 |
|
|
|
2d2912a771
|
initial software commit
|
2025-03-03 15:53:11 +03:00 |
|