ChTheo/RadioPhotonic_PCB_software
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  • fd95fe3c56 pulse modulation added new_UI Ayzen 2026-09-01 18:08:35 +03:00
  • 9b7891938f micro fix master Ayzen 2026-07-14 15:28:40 +03:00
  • 81106742dd Refactor split main.c BogatskiyG 2026-07-03 18:05:11 +03:00
  • 90abf51075 save BogatskiyG 2026-07-02 16:15:37 +03:00
  • a2c5d882c2 worked on test board BogatskiyG 2026-07-02 14:12:45 +03:00
  • 30cc41dc38 save ChTheo 2026-06-25 15:08:27 +03:00
  • 42795eb899 some fixes Ayzen 2026-06-24 13:15:48 +03:00
  • d3d48a5255 added tec modulation Ayzen 2026-04-27 18:16:39 +03:00
  • d32db245fa Stabilize USB control firmware Ayzen 2026-04-26 18:39:55 +03:00
  • ea1fbb071d big refactoring and features added Ayzen 2026-04-24 16:51:15 +03:00
  • eafc328caa Save current local changes backup/local-changes-20260313 Ayzen 2026-03-13 17:49:58 +03:00
  • db80907a0b added dac support Ayzen 2026-02-18 16:04:34 +03:00
  • b1ae9a5e49 added AD9833 and DS1809 support Ayzen 2026-02-09 10:28:20 +03:00
  • 7442f4dd3a added sram saw Ayzen 2026-02-03 19:29:57 +03:00
  • fedc27bfa8 saw AD9102 done Ayzen 2026-02-03 18:57:12 +03:00
  • 10e1609c23 Merge branch 'tmp' ChTheo 2026-02-02 17:19:46 +03:00
  • 20cb59ee6d deleted build ChTheo 2026-02-02 17:13:44 +03:00
  • 859b196d9e deleted build ChTheo 2026-02-02 17:13:09 +03:00
  • e0c7f20970 increased SYNC_DETector frequency up to 2.42 MHz. also now ADC clock freq is equal to Mach-Zander freq. Because ADC samples at both rising and falling edges ChTheo 2026-02-02 17:04:00 +03:00
  • f92f6de5bf Now ADC clock freq is equal to Mach_Zander clock. ADC samples on rising and falling edges ChTheo 2026-01-28 17:00:05 +03:00
  • a3c38516d3 implemented setting HIGH of OUT_6, OUT_7 at 1/3 and 2/3 of laser current change cycle. Both are reseted at the end of cycle. their purpose -- switch amplifier stages of signal after detector, before ADC. NOT TESTED! ChTheo 2025-11-21 14:20:07 +03:00
  • f2004bdc35 Now PG9 toggles at the very beginning of every laser current step. Purpose: tell ADC that step started/ended for correct averaging. ChTheo 2025-10-22 12:00:48 +03:00
  • 03bb95db58 modified ADC trigger: now it starts before ADC samplig (as it was), stops after some ADC clocks (while in current varying routine) ChTheo 2025-10-16 17:33:05 +03:00
  • bd15847b76 Reduced Mach-Zander modulatoes ChTheo 2025-09-18 18:57:18 +03:00
  • 76b6bb36f8 added build folder. Now compilde binary becomes available in git ChTheo 2025-09-18 16:54:16 +03:00
  • f20ad2301b fixed relative phases in Mach-Zander and ADC clocks. ADC clock delayed to move ADC sampling time far from the start of modulated period. Now there is 400 ns time reserve. ChTheo 2025-04-18 17:05:26 +03:00
  • 9974606734 partially solved issue with random modulator and ADC clock stopping at the end of ЛЧМ. Done: when we want to stop clocks -- enable IRQ on sloewr clock (TIM11). In IRQ switches TIM4, TIM11 to one-pulse mode, disables IRQ. When we starting these timers th next time -- we resets their counters, one-pulse mode disables. ChTheo 2025-04-15 21:29:24 +03:00
  • 0829fd0983 fixed modulation and ADC clocks initial phase to 0. (by TIM->CNT=0) ChTheo 2025-04-15 19:00:22 +03:00
  • 5756dfe749 configured ADC sync signals at fastest possible frequency: 1.75 MHz ChTheo 2025-04-07 19:01:57 +03:00
  • 61bb0c41db configured external ADC sync and Mach-Zander modulation clocks at 2 and 1 MHz respectively ChTheo 2025-04-07 17:29:51 +03:00
  • ca8405bb41 removed build folder from git index feda 2025-03-04 12:17:54 +03:00
  • b02e3a35b7 solved laser current setup timing issue frequency_step_timings_correction feda 2025-03-04 11:43:09 +03:00
  • 4162005fd4 added oscope trigger for updating laser current setup feda 2025-03-03 17:21:33 +03:00
  • 59dce26129 applied last changes from version without git feda 2025-03-03 16:06:13 +03:00
  • d0637bb5e6 switched project to make feda 2025-03-03 16:03:02 +03:00
  • 2d2912a771 initial software commit feda 2025-03-03 15:53:11 +03:00