ChTheo/RadioPhotonic_PCB_software
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

saw AD9102 done

Browse Source
This commit is contained in:
Ayzen
2026-02-03 18:57:12 +03:00
parent bd15847b76
commit fedc27bfa8
31 changed files with 25122 additions and 22131 deletions
Download Patch File Download Diff File Expand all files Collapse all files

BIN
DACUSAGE.pdf Normal file
View File

Binary file not shown.

4
For_stm32.ioc
View File

@ -553,8 +553,8 @@ SH.S_TIM11_CH1.ConfNb=1
SH.S_TIM4_CH3.0=TIM4_CH3,PWM Generation3 CH3 SH.S_TIM4_CH3.0=TIM4_CH3,PWM Generation3 CH3
SH.S_TIM4_CH3.ConfNb=1 SH.S_TIM4_CH3.ConfNb=1
SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8 SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
SPI2.CLKPhase=SPI_PHASE_2EDGE SPI2.CLKPhase=SPI_PHASE_1EDGE
SPI2.CLKPolarity=SPI_POLARITY_HIGH SPI2.CLKPolarity=SPI_POLARITY_LOW
SPI2.CalculateBaudRate=5.75 MBits/s SPI2.CalculateBaudRate=5.75 MBits/s
SPI2.DataSize=SPI_DATASIZE_16BIT SPI2.DataSize=SPI_DATASIZE_16BIT
SPI2.Direction=SPI_DIRECTION_2LINES SPI2.Direction=SPI_DIRECTION_2LINES

55
Inc/main.h
View File

@ -85,8 +85,10 @@ void Set_LTEC(uint8_t, uint16_t);
#define ADC_ThrLD2_CS_GPIO_Port GPIOF #define ADC_ThrLD2_CS_GPIO_Port GPIOF
#define EN_5V2_Pin GPIO_PIN_2 #define EN_5V2_Pin GPIO_PIN_2
#define EN_5V2_GPIO_Port GPIOC #define EN_5V2_GPIO_Port GPIOC
#define EN_5V1_Pin GPIO_PIN_3 #define EN_5V1_Pin GPIO_PIN_3
#define EN_5V1_GPIO_Port GPIOC #define EN_5V1_GPIO_Port GPIOC
#define AD9102_RESET_Pin GPIO_PIN_6
#define AD9102_RESET_GPIO_Port GPIOC
#define TECEN1_Pin GPIO_PIN_0 #define TECEN1_Pin GPIO_PIN_0
#define TECEN1_GPIO_Port GPIOA #define TECEN1_GPIO_Port GPIOA
#define TECEN2_Pin GPIO_PIN_1 #define TECEN2_Pin GPIO_PIN_1
@ -119,14 +121,16 @@ void Set_LTEC(uint8_t, uint16_t);
#define REF0_EN_GPIO_Port GPIOB #define REF0_EN_GPIO_Port GPIOB
#define TEC1_PD_Pin GPIO_PIN_11 #define TEC1_PD_Pin GPIO_PIN_11
#define TEC1_PD_GPIO_Port GPIOB #define TEC1_PD_GPIO_Port GPIOB
#define DAC_TEC1_CS_Pin GPIO_PIN_12 #define DAC_TEC1_CS_Pin GPIO_PIN_12
#define DAC_TEC1_CS_GPIO_Port GPIOB #define DAC_TEC1_CS_GPIO_Port GPIOB
#define DAC_LD1_CS_Pin GPIO_PIN_14 #define DAC_LD1_CS_Pin GPIO_PIN_14
#define DAC_LD1_CS_GPIO_Port GPIOB #define DAC_LD1_CS_GPIO_Port GPIOB
#define LD1_EN_Pin GPIO_PIN_8 #define LD1_EN_Pin GPIO_PIN_8
#define LD1_EN_GPIO_Port GPIOD #define LD1_EN_GPIO_Port GPIOD
#define USB_FLAG_Pin GPIO_PIN_8 #define AD9102_TRIG_Pin GPIO_PIN_11
#define USB_FLAG_GPIO_Port GPIOA #define AD9102_TRIG_GPIO_Port GPIOD
#define USB_FLAG_Pin GPIO_PIN_8
#define USB_FLAG_GPIO_Port GPIOA
#define SDMMC1_EN_Pin GPIO_PIN_0 #define SDMMC1_EN_Pin GPIO_PIN_0
#define SDMMC1_EN_GPIO_Port GPIOD #define SDMMC1_EN_GPIO_Port GPIOD
#define TEST_01_Pin GPIO_PIN_1 #define TEST_01_Pin GPIO_PIN_1
@ -168,24 +172,37 @@ void Set_LTEC(uint8_t, uint16_t);
#define DEFAULT_ENABLE 2 #define DEFAULT_ENABLE 2
#define TRANS_S_ENABLE 3 #define TRANS_S_ENABLE 3
#define TRANS_ENABLE 4 #define TRANS_ENABLE 4
#define REMOVE_FILE 5 #define REMOVE_FILE 5
#define STATE 6 #define STATE 6
#define WORK_ENABLE 7 #define WORK_ENABLE 7
#define DECODE_TASK 8 #define DECODE_TASK 8
#define RUN_TASK 9 #define RUN_TASK 9
#define AD9102_CMD 10
#define SD_ERR 0x01 #define SD_ERR 0x01
#define UART_ERR 0x02 #define UART_ERR 0x02
#define UART_DECODE_ERR 0x04 #define UART_DECODE_ERR 0x04
#define TEC1_ERR 0x08 #define TEC1_ERR 0x08
#define TEC2_ERR 0x10 #define TEC2_ERR 0x10
#define DEFAUL_ERR 0x20 #define DEFAUL_ERR 0x20
#define REMOVE_ERR 0x40 #define REMOVE_ERR 0x40
#define AD9102_ERR 0x80
#define NO_MESS 0 #define NO_MESS 0
#define MESS_01 1 #define MESS_01 1
#define MESS_02 2 #define MESS_02 2
#define MESS_03 3 #define MESS_03 3
// AD9102 serial command (compatible header with PC tool)
#define AD9102_CMD_HEADER 0x8888
#define AD9102_CMD_8 10 // total bytes including header
#define AD9102_CMD_WORDS 4 // data words (flags, freq LSW, freq MSW, checksum)
#define AD9102_ON_SPI2 1
// AD9102 CS (chip select). Adjust to your wiring.
#define AD9102_CS_GPIO_Port DAC_TEC1_CS_GPIO_Port
#define AD9102_CS_Pin DAC_TEC1_CS_Pin
typedef struct{ typedef struct{

364
Src/main.c
View File

@ -34,6 +34,48 @@
/* Private define ------------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */ /* USER CODE BEGIN PD */
// AD9102 register addresses and bit fields (see ad9102.pdf)
#define AD9102_REG_RAMUPDATE 0x001Du
#define AD9102_REG_PAT_STATUS 0x001Eu
#define AD9102_REG_PAT_TYPE 0x001Fu
#define AD9102_REG_SPICONFIG 0x0000u
#define AD9102_REG_POWERCONFIG 0x0001u
#define AD9102_REG_CLOCKCONFIG 0x0002u
#define AD9102_REG_WAV_CONFIG 0x0027u
#define AD9102_REG_PAT_TIMEBASE 0x0028u
#define AD9102_REG_PAT_PERIOD 0x0029u
#define AD9102_REG_SAW_CONFIG 0x0037u
#define AD9102_REG_CFG_ERROR 0x0060u
#define AD9102_PAT_STATUS_RUN (1u << 0)
#define AD9102_WAV_PRESTORE_SEL_SHIFT 4
#define AD9102_WAV_WAVE_SEL_SHIFT 0
#define AD9102_WAV_PRESTORE_SAW 1u
#define AD9102_WAV_WAVE_SEL_PRESTORE 1u
#define AD9102_SAW_STEP_SHIFT 2
#define AD9102_SAW_TYPE_SHIFT 0
#define AD9102_SAW_TYPE_UP 0u
#define AD9102_SAW_TYPE_DOWN 1u
#define AD9102_SAW_TYPE_TRI 2u
#define AD9102_SAW_TYPE_ZERO 3u
#define AD9102_REG_COUNT 66u
#define AD9102_EX4_WAV_CONFIG 0x3212u
#define AD9102_EX4_PAT_TIMEBASE 0x0121u
#define AD9102_EX4_PAT_PERIOD 0xFFFFu
#define AD9102_EX4_SAW_CONFIG 0x0606u
#define AD9102_SAW_STEP_DEFAULT 1u
#define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u
#define AD9102_START_DELAY_BASE_DEFAULT 0x1u
#define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u
#define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu
#define AD9102_FLAG_ENABLE 0x0001u
#define AD9102_FLAG_TRIANGLE 0x0002u
/* USER CODE END PD */ /* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/
@ -70,6 +112,31 @@ LD_Blinker_StateTypeDef LD_blinker;
task_t task; task_t task;
static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = {
0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u,
0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu,
0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u,
0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u,
0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu,
0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u,
0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u,
0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu,
0x001eu, 0x001du
};
static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = {
0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u,
0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u,
0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u,
0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu,
0x0001u, 0x0001u
};
/* USER CODE END PV */ /* USER CODE END PV */
@ -103,6 +170,12 @@ void Set_LTEC(uint8_t num, uint16_t DATA);
static uint16_t MPhD_T(uint8_t num); static uint16_t MPhD_T(uint8_t num);
static uint16_t Get_ADC(uint8_t num); static uint16_t Get_ADC(uint8_t num);
static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uint8_t num); static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uint8_t num);
static void AD9102_Init(void);
static void AD9102_WriteReg(uint16_t addr, uint16_t value);
static uint16_t AD9102_ReadReg(uint16_t addr);
static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count);
static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period);
static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period);
uint8_t CheckChecksum(uint16_t *pbuff); uint8_t CheckChecksum(uint16_t *pbuff);
uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len);
//int SD_Init(void); //int SD_Init(void);
@ -359,7 +432,56 @@ int main(void)
State_Data[0]|=temp16&0xff; State_Data[0]|=temp16&0xff;
} }
CPU_state_old = WORK_ENABLE;//Save main current cycle CPU_state_old = WORK_ENABLE;//Save main current cycle
}
break;
case AD9102_CMD://10 - Configure AD9102 sawtooth output
if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1])
{
uint16_t flags = COMMAND[0];
uint16_t param0 = COMMAND[1];
uint16_t param1 = COMMAND[2];
uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP;
uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
uint16_t pat_period = param1;
if (param0 == 0u && param1 == 0u)
{
saw_step = AD9102_SAW_STEP_DEFAULT;
pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT;
pat_period = AD9102_PAT_PERIOD_DEFAULT;
}
else
{
if (saw_step == 0u)
{
saw_step = AD9102_SAW_STEP_DEFAULT;
}
else if (saw_step > 63u)
{
saw_step = 63u;
}
if (pat_period == 0u)
{
pat_period = AD9102_PAT_PERIOD_DEFAULT;
}
}
uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period);
State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
{
State_Data[0] |= AD9102_ERR;
}
}
else
{
State_Data[0] |= UART_DECODE_ERR;
} }
UART_transmission_request = MESS_01;
CPU_state = CPU_state_old;
break; break;
case DECODE_TASK: case DECODE_TASK:
if (CheckChecksum(COMMAND)) if (CheckChecksum(COMMAND))
@ -998,6 +1120,7 @@ static void MX_SPI2_Init(void)
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
/**SPI2 GPIO Configuration /**SPI2 GPIO Configuration
PB13 ------> SPI2_SCK PB13 ------> SPI2_SCK
PB14 ------> SPI2_MISO
PB15 ------> SPI2_MOSI PB15 ------> SPI2_MOSI
*/ */
GPIO_InitStruct.Pin = LL_GPIO_PIN_13; GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
@ -1008,6 +1131,14 @@ static void MX_SPI2_Init(void)
GPIO_InitStruct.Alternate = LL_GPIO_AF_5; GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct); LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_14;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_15; GPIO_InitStruct.Pin = LL_GPIO_PIN_15;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
@ -1023,8 +1154,8 @@ static void MX_SPI2_Init(void)
SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
@ -1735,6 +1866,7 @@ static void MX_GPIO_Init(void)
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET);
@ -1749,7 +1881,7 @@ static void MX_GPIO_Init(void)
HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|DAC_LD1_CS_Pin|OUT_6_Pin HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin
|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
@ -1757,6 +1889,7 @@ static void MX_GPIO_Init(void)
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET);
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
@ -1775,8 +1908,8 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
/*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin */ /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */
GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin; GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
@ -1818,17 +1951,17 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin DAC_LD1_CS_Pin /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin
OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */
GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin|DAC_LD1_CS_Pin GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin
|OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 */ /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin */
GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7; GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
@ -2007,6 +2140,8 @@ static void Init_params(void)
// { // {
// test = 12; // test = 12;
// } // }
AD9102_Init();
} }
static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup) static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup)
{ {
@ -2263,10 +2398,221 @@ void OUT_trigger(uint8_t out_n)
} }
} }
static void AD9102_Init(void)
{
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
for (volatile uint32_t d = 0; d < 1000; d++) {}
HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT);
AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
}
static void AD9102_WriteReg(uint16_t addr, uint16_t value)
{
uint32_t tmp32 = 0;
uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
if (!LL_SPI_IsEnabled(SPI2))
{
LL_SPI_Enable(SPI2);
}
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
LL_SPI_TransmitData16(SPI2, cmd);
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
(void) SPI2->DR;
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
LL_SPI_TransmitData16(SPI2, value);
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
(void) SPI2->DR;
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
}
static uint16_t AD9102_ReadReg(uint16_t addr)
{
uint32_t tmp32 = 0;
uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
uint16_t value;
if (!LL_SPI_IsEnabled(SPI2))
{
LL_SPI_Enable(SPI2);
}
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
LL_SPI_TransmitData16(SPI2, cmd);
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
(void) SPI2->DR;
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
LL_SPI_TransmitData16(SPI2, 0x0000u);
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
value = LL_SPI_ReceiveData16(SPI2);
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
return value;
}
static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count)
{
for (uint16_t i = 0; i < count; i++)
{
AD9102_WriteReg(ad9102_reg_addr[i], values[i]);
}
}
static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period)
{
if (enable)
{
uint16_t saw_cfg;
uint16_t pat_timebase;
if (saw_step == 0u)
{
saw_step = AD9102_SAW_STEP_DEFAULT;
}
if (saw_step > 63u)
{
saw_step = 63u;
}
saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
((uint16_t)(saw_type & 0x3u)));
pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
((pat_base & 0x0Fu) << 4) |
(AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG);
AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period);
AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
// Update RUN then RAMUPDATE at the end of the write sequence.
// AD9102 output is started by a falling edge of TRIGGER pin when RUN=1.
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
for (volatile uint32_t d = 0; d < 1000; d++) {}
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
}
else
{
AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
}
return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
}
static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period)
{
uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
((pat_base & 0x0Fu) << 4) |
(AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
if (saw_step == 0u)
{
saw_step = AD9102_SAW_STEP_DEFAULT;
}
if (saw_step > 63u)
{
saw_step = 63u;
}
if (pat_period == 0u)
{
pat_period = AD9102_PAT_PERIOD_DEFAULT;
}
uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
((uint16_t)(saw_type & 0x3u)));
uint8_t ok = 1u;
// Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset.
if (spiconfig != 0x0000u)
{
ok = 0u;
}
// Power blocks should not be powered down.
if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
{
ok = 0u;
}
// Clock receiver must be enabled (cannot directly detect external clock presence).
if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
{
ok = 0u;
}
// Any configuration error flags indicate a bad setup.
if (cfg_err & 0x003Fu)
{
ok = 0u;
}
if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
{
ok = 0u;
}
if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG)
{
ok = 0u;
}
if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
{
ok = 0u;
}
if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period)
{
ok = 0u;
}
if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u)
{
ok = 0u;
}
if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw)
{
ok = 0u;
}
return (ok ? 0u : 1u);
}
void Set_LTEC(uint8_t num, uint16_t DATA) void Set_LTEC(uint8_t num, uint16_t DATA)
{ {
uint32_t tmp32; uint32_t tmp32;
#if AD9102_ON_SPI2
// AD9102 occupies SPI2; skip LD1/TEC1 writes to avoid CS conflicts.
if (num == 1 || num == 3)
{
return;
}
#endif
switch (num) switch (num)
{ {
case 1: case 1:

47
Src/stm32f7xx_it.c
View File

@ -475,23 +475,48 @@ void UART_RxCpltCallback(void)
flg_tmt = 0;//Reset the timeout flag flg_tmt = 0;//Reset the timeout flag
CPU_state = STATE; CPU_state = STATE;
break; break;
case 0x7777: case 0x7777:
UART_rec_incr = 2;//timeout flag is still setting! UART_rec_incr = 2;//timeout flag is still setting!
break; break;
default: //error decoding header case AD9102_CMD_HEADER: // AD9102 command
UART_rec_incr = 0; UART_rec_incr = 2;//timeout flag is still setting!
flg_tmt = 0;//Reset the timeout flag break;
default: //error decoding header
UART_rec_incr = 0;
flg_tmt = 0;//Reset the timeout flag
//UART_transmission_request = MESS_01; //UART_transmission_request = MESS_01;
//CPU_state = HALT; //CPU_state = HALT;
State_Data[0] |= UART_ERR; State_Data[0] |= UART_ERR;
CPU_state = DEFAULT_ENABLE;//Parking system and send error state! CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
break; break;
} }
break; break;
case (CL_8 - 1): case (AD9102_CMD_8 - 1):
if (UART_header == 0x1111) if (UART_header == AD9102_CMD_HEADER)
{ {
if ((UART_rec_incr & 0x0001) > 0)
COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
else
COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
CPU_state = AD9102_CMD;
UART_rec_incr = 0;
flg_tmt = 0;//Reset the timeout flag
}
else
{
if ((UART_rec_incr&0x0001)>0)
COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
else
COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
UART_rec_incr++;
UART_transmission_request = NO_MESS;
}
break;
case (CL_8 - 1):
if (UART_header == 0x1111)
{
if ((UART_rec_incr & 0x0001) > 0) if ((UART_rec_incr & 0x0001) > 0)
COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
else else

BIN
ad9102.pdf Normal file
View File

Binary file not shown.

262
build/File_Handling.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/cccCjqCZ.s page 1 ARM GAS /tmp/cczIN1cV.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
28:Src/File_Handling.c **** 28:Src/File_Handling.c ****
29:Src/File_Handling.c **** 29:Src/File_Handling.c ****
30:Src/File_Handling.c **** void Send_Uart (char *string) 30:Src/File_Handling.c **** void Send_Uart (char *string)
ARM GAS /tmp/cccCjqCZ.s page 2 ARM GAS /tmp/cczIN1cV.s page 2
31:Src/File_Handling.c **** { 31:Src/File_Handling.c **** {
@ -118,7 +118,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
75 0012 0120 movs r0, #1 75 0012 0120 movs r0, #1
76 .L2: 76 .L2:
41:Src/File_Handling.c **** else return 0; 41:Src/File_Handling.c **** else return 0;
ARM GAS /tmp/cccCjqCZ.s page 3 ARM GAS /tmp/cczIN1cV.s page 3
42:Src/File_Handling.c **** } 42:Src/File_Handling.c **** }
@ -178,7 +178,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
48:Src/File_Handling.c **** return 1;//else Send_Uart("ERROR!!! in UNMOUNTING SD CARD\n\n\n"); 48:Src/File_Handling.c **** return 1;//else Send_Uart("ERROR!!! in UNMOUNTING SD CARD\n\n\n");
126 .loc 1 48 9 view .LVU21 126 .loc 1 48 9 view .LVU21
127 0012 0120 movs r0, #1 127 0012 0120 movs r0, #1
ARM GAS /tmp/cccCjqCZ.s page 4 ARM GAS /tmp/cczIN1cV.s page 4
128 .L8: 128 .L8:
@ -238,7 +238,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
171 .LCFI2: 171 .LCFI2:
172 .cfi_def_cfa_offset 16 172 .cfi_def_cfa_offset 16
173 .cfi_offset 4, -16 173 .cfi_offset 4, -16
ARM GAS /tmp/cccCjqCZ.s page 5 ARM GAS /tmp/cczIN1cV.s page 5
174 .cfi_offset 5, -12 174 .cfi_offset 5, -12
@ -298,7 +298,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
69:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char)); 69:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char));
70:Src/File_Handling.c **** sprintf (buf, "Dir: %s\r\n", fno.fname); 70:Src/File_Handling.c **** sprintf (buf, "Dir: %s\r\n", fno.fname);
71:Src/File_Handling.c **** Send_Uart(buf); 71:Src/File_Handling.c **** Send_Uart(buf);
ARM GAS /tmp/cccCjqCZ.s page 6 ARM GAS /tmp/cczIN1cV.s page 6
72:Src/File_Handling.c **** free(buf); 72:Src/File_Handling.c **** free(buf);
@ -358,7 +358,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
247 .loc 1 65 46 discriminator 1 view .LVU49 247 .loc 1 65 46 discriminator 1 view .LVU49
248 004c 1D4B ldr r3, .L21+12 248 004c 1D4B ldr r3, .L21+12
249 004e 5B7A ldrb r3, [r3, #9] @ zero_extendqisi2 249 004e 5B7A ldrb r3, [r3, #9] @ zero_extendqisi2
ARM GAS /tmp/cccCjqCZ.s page 7 ARM GAS /tmp/cczIN1cV.s page 7
65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */ 65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
@ -418,7 +418,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
290 0082 FFF7FEFF bl strlen 290 0082 FFF7FEFF bl strlen
291 .LVL24: 291 .LVL24:
292 0086 0546 mov r5, r0 292 0086 0546 mov r5, r0
ARM GAS /tmp/cccCjqCZ.s page 8 ARM GAS /tmp/cczIN1cV.s page 8
293 .LVL25: 293 .LVL25:
@ -478,7 +478,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
331 .loc 1 91 1 is_stmt 0 view .LVU76 331 .loc 1 91 1 is_stmt 0 view .LVU76
332 00b0 014B ldr r3, .L21 332 00b0 014B ldr r3, .L21
333 00b2 1878 ldrb r0, [r3] @ zero_extendqisi2 333 00b2 1878 ldrb r0, [r3] @ zero_extendqisi2
ARM GAS /tmp/cccCjqCZ.s page 9 ARM GAS /tmp/cczIN1cV.s page 9
334 00b4 0CB0 add sp, sp, #48 334 00b4 0CB0 add sp, sp, #48
@ -538,7 +538,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
384 .LVL33: 384 .LVL33:
385 000a 0446 mov r4, r0 385 000a 0446 mov r4, r0
386 .LVL34: 386 .LVL34:
ARM GAS /tmp/cccCjqCZ.s page 10 ARM GAS /tmp/cczIN1cV.s page 10
98:Src/File_Handling.c **** sprintf (path, "%s","/"); 98:Src/File_Handling.c **** sprintf (path, "%s","/");
@ -598,7 +598,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
420 002e 6846 mov r0, sp 420 002e 6846 mov r0, sp
421 0030 FFF7FEFF bl f_readdir 421 0030 FFF7FEFF bl f_readdir
422 .LVL38: 422 .LVL38:
ARM GAS /tmp/cccCjqCZ.s page 11 ARM GAS /tmp/cczIN1cV.s page 11
105:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */ 105:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
@ -658,7 +658,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
461 .L26: 461 .L26:
116:Src/File_Handling.c **** } 116:Src/File_Handling.c **** }
117:Src/File_Handling.c **** } 117:Src/File_Handling.c **** }
ARM GAS /tmp/cccCjqCZ.s page 12 ARM GAS /tmp/cczIN1cV.s page 12
118:Src/File_Handling.c **** f_closedir(&dir); 118:Src/File_Handling.c **** f_closedir(&dir);
@ -718,7 +718,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
507 .loc 1 128 1 is_stmt 0 view .LVU117 507 .loc 1 128 1 is_stmt 0 view .LVU117
508 0000 70B5 push {r4, r5, r6, lr} 508 0000 70B5 push {r4, r5, r6, lr}
509 .LCFI8: 509 .LCFI8:
ARM GAS /tmp/cccCjqCZ.s page 13 ARM GAS /tmp/cczIN1cV.s page 13
510 .cfi_def_cfa_offset 16 510 .cfi_def_cfa_offset 16
@ -778,7 +778,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
153:Src/File_Handling.c **** 153:Src/File_Handling.c ****
154:Src/File_Handling.c **** else 154:Src/File_Handling.c **** else
155:Src/File_Handling.c **** { 155:Src/File_Handling.c **** {
ARM GAS /tmp/cccCjqCZ.s page 14 ARM GAS /tmp/cczIN1cV.s page 14
156:Src/File_Handling.c **** fresult = f_write(&fil, data, strlen(data), &bw); 156:Src/File_Handling.c **** fresult = f_write(&fil, data, strlen(data), &bw);
@ -838,7 +838,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
150:Src/File_Handling.c **** return fresult; 150:Src/File_Handling.c **** return fresult;
559 .loc 1 150 10 view .LVU136 559 .loc 1 150 10 view .LVU136
151:Src/File_Handling.c **** } 151:Src/File_Handling.c **** }
ARM GAS /tmp/cccCjqCZ.s page 15 ARM GAS /tmp/cczIN1cV.s page 15
560 .loc 1 151 10 view .LVU137 560 .loc 1 151 10 view .LVU137
@ -898,7 +898,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
182:Src/File_Handling.c **** } 182:Src/File_Handling.c **** }
598 .loc 1 182 13 is_stmt 0 view .LVU154 598 .loc 1 182 13 is_stmt 0 view .LVU154
599 004a C0B2 uxtb r0, r0 599 004a C0B2 uxtb r0, r0
ARM GAS /tmp/cccCjqCZ.s page 16 ARM GAS /tmp/cczIN1cV.s page 16
600 004c E2E7 b .L34 600 004c E2E7 b .L34
@ -958,7 +958,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
649 .loc 1 191 5 is_stmt 0 view .LVU162 649 .loc 1 191 5 is_stmt 0 view .LVU162
650 0012 08B1 cbz r0, .L40 650 0012 08B1 cbz r0, .L40
651 .LBB6: 651 .LBB6:
ARM GAS /tmp/cccCjqCZ.s page 17 ARM GAS /tmp/cczIN1cV.s page 17
192:Src/File_Handling.c **** { 192:Src/File_Handling.c **** {
@ -1018,7 +1018,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
237:Src/File_Handling.c **** //Send_Uart(buf); 237:Src/File_Handling.c **** //Send_Uart(buf);
238:Src/File_Handling.c **** free(buf); 238:Src/File_Handling.c **** free(buf);
239:Src/File_Handling.c **** } 239:Src/File_Handling.c **** }
ARM GAS /tmp/cccCjqCZ.s page 18 ARM GAS /tmp/cczIN1cV.s page 18
240:Src/File_Handling.c **** } 240:Src/File_Handling.c **** }
@ -1078,7 +1078,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
215:Src/File_Handling.c **** if (fresult != FR_OK) 215:Src/File_Handling.c **** if (fresult != FR_OK)
699 .loc 1 215 15 discriminator 1 view .LVU181 699 .loc 1 215 15 discriminator 1 view .LVU181
700 003c 2070 strb r0, [r4] 700 003c 2070 strb r0, [r4]
ARM GAS /tmp/cccCjqCZ.s page 19 ARM GAS /tmp/cczIN1cV.s page 19
216:Src/File_Handling.c **** { 216:Src/File_Handling.c **** {
@ -1138,7 +1138,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
737 004c 4552524F .ascii "ERROR!!! No. %d in reading file *%s*\012\012\000" 737 004c 4552524F .ascii "ERROR!!! No. %d in reading file *%s*\012\012\000"
737 52212121 737 52212121
737 204E6F2E 737 204E6F2E
ARM GAS /tmp/cccCjqCZ.s page 20 ARM GAS /tmp/cczIN1cV.s page 20
737 20256420 737 20256420
@ -1198,7 +1198,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
777 000e B8B9 cbnz r0, .L54 777 000e B8B9 cbnz r0, .L54
778 .LBB8: 778 .LBB8:
250:Src/File_Handling.c **** { 250:Src/File_Handling.c **** {
ARM GAS /tmp/cccCjqCZ.s page 21 ARM GAS /tmp/cczIN1cV.s page 21
251:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); 251:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
@ -1258,7 +1258,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
814 003a 2B4B ldr r3, .L55+4 814 003a 2B4B ldr r3, .L55+4
815 003c 1878 ldrb r0, [r3] @ zero_extendqisi2 815 003c 1878 ldrb r0, [r3] @ zero_extendqisi2
816 003e 0CE0 b .L48 816 003e 0CE0 b .L48
ARM GAS /tmp/cccCjqCZ.s page 22 ARM GAS /tmp/cczIN1cV.s page 22
817 .LVL70: 817 .LVL70:
@ -1318,7 +1318,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
285:Src/File_Handling.c **** 285:Src/File_Handling.c ****
286:Src/File_Handling.c **** else 286:Src/File_Handling.c **** else
287:Src/File_Handling.c **** { 287:Src/File_Handling.c **** {
ARM GAS /tmp/cccCjqCZ.s page 23 ARM GAS /tmp/cczIN1cV.s page 23
288:Src/File_Handling.c **** Send_Uart(buffer); 288:Src/File_Handling.c **** Send_Uart(buffer);
@ -1378,7 +1378,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
277:Src/File_Handling.c **** { 277:Src/File_Handling.c **** {
873 .loc 1 277 3 is_stmt 1 view .LVU228 873 .loc 1 277 3 is_stmt 1 view .LVU228
277:Src/File_Handling.c **** { 277:Src/File_Handling.c **** {
ARM GAS /tmp/cccCjqCZ.s page 24 ARM GAS /tmp/cczIN1cV.s page 24
874 .loc 1 277 6 is_stmt 0 view .LVU229 874 .loc 1 277 6 is_stmt 0 view .LVU229
@ -1438,7 +1438,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
916 00a0 FFF7FEFF bl free 916 00a0 FFF7FEFF bl free
917 .LVL88: 917 .LVL88:
292:Src/File_Handling.c **** if (fresult != FR_OK) 292:Src/File_Handling.c **** if (fresult != FR_OK)
ARM GAS /tmp/cccCjqCZ.s page 25 ARM GAS /tmp/cczIN1cV.s page 25
918 .loc 1 292 4 view .LVU242 918 .loc 1 292 4 view .LVU242
@ -1498,7 +1498,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
961 .LVL97: 961 .LVL97:
303:Src/File_Handling.c **** Send_Uart(buf); 303:Src/File_Handling.c **** Send_Uart(buf);
962 .loc 1 303 5 is_stmt 1 view .LVU254 962 .loc 1 303 5 is_stmt 1 view .LVU254
ARM GAS /tmp/cccCjqCZ.s page 26 ARM GAS /tmp/cczIN1cV.s page 26
963 00d4 2246 mov r2, r4 963 00d4 2246 mov r2, r4
@ -1558,7 +1558,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1010 .LCFI11: 1010 .LCFI11:
1011 .cfi_def_cfa_offset 24 1011 .cfi_def_cfa_offset 24
1012 .cfi_offset 4, -24 1012 .cfi_offset 4, -24
ARM GAS /tmp/cccCjqCZ.s page 27 ARM GAS /tmp/cczIN1cV.s page 27
1013 .cfi_offset 5, -20 1013 .cfi_offset 5, -20
@ -1618,7 +1618,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
332:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); 332:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
333:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name); 333:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
334:Src/File_Handling.c **** //Send_Uart(buf); 334:Src/File_Handling.c **** //Send_Uart(buf);
ARM GAS /tmp/cccCjqCZ.s page 28 ARM GAS /tmp/cczIN1cV.s page 28
335:Src/File_Handling.c **** free(buf); 335:Src/File_Handling.c **** free(buf);
@ -1678,7 +1678,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1086 .LBE15: 1086 .LBE15:
1087 .LBB16: 1087 .LBB16:
318:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name); 318:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
ARM GAS /tmp/cccCjqCZ.s page 29 ARM GAS /tmp/cczIN1cV.s page 29
1088 .loc 1 318 3 is_stmt 1 view .LVU282 1088 .loc 1 318 3 is_stmt 1 view .LVU282
@ -1738,7 +1738,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
376:Src/File_Handling.c **** 376:Src/File_Handling.c ****
377:Src/File_Handling.c **** /* Close file */ 377:Src/File_Handling.c **** /* Close file */
378:Src/File_Handling.c **** fresult = f_close(&fil); 378:Src/File_Handling.c **** fresult = f_close(&fil);
ARM GAS /tmp/cccCjqCZ.s page 30 ARM GAS /tmp/cczIN1cV.s page 30
379:Src/File_Handling.c **** if (fresult != FR_OK) 379:Src/File_Handling.c **** if (fresult != FR_OK)
@ -1798,7 +1798,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1141 .loc 1 336 14 view .LVU296 1141 .loc 1 336 14 view .LVU296
1142 .LBE17: 1142 .LBE17:
353:Src/File_Handling.c **** if (fresult != FR_OK) 353:Src/File_Handling.c **** if (fresult != FR_OK)
ARM GAS /tmp/cccCjqCZ.s page 31 ARM GAS /tmp/cczIN1cV.s page 31
1143 .loc 1 353 3 is_stmt 1 view .LVU297 1143 .loc 1 353 3 is_stmt 1 view .LVU297
@ -1858,7 +1858,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1180 00b6 BA70 strb r2, [r7, #2] 1180 00b6 BA70 strb r2, [r7, #2]
374:Src/File_Handling.c **** } 374:Src/File_Handling.c **** }
1181 .loc 1 374 5 is_stmt 1 view .LVU315 1181 .loc 1 374 5 is_stmt 1 view .LVU315
ARM GAS /tmp/cccCjqCZ.s page 32 ARM GAS /tmp/cczIN1cV.s page 32
374:Src/File_Handling.c **** } 374:Src/File_Handling.c **** }
@ -1918,7 +1918,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1222 .loc 1 394 13 is_stmt 0 view .LVU329 1222 .loc 1 394 13 is_stmt 0 view .LVU329
1223 00e2 0F4B ldr r3, .L70+4 1223 00e2 0F4B ldr r3, .L70+4
1224 00e4 1878 ldrb r0, [r3] @ zero_extendqisi2 1224 00e4 1878 ldrb r0, [r3] @ zero_extendqisi2
ARM GAS /tmp/cccCjqCZ.s page 33 ARM GAS /tmp/cczIN1cV.s page 33
1225 00e6 C2E7 b .L59 1225 00e6 C2E7 b .L59
@ -1978,7 +1978,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1271 011c 00000000 .word fno 1271 011c 00000000 .word fno
1272 0120 00000000 .word fresult 1272 0120 00000000 .word fresult
1273 0124 00000000 .word fil 1273 0124 00000000 .word fil
ARM GAS /tmp/cccCjqCZ.s page 34 ARM GAS /tmp/cczIN1cV.s page 34
1274 0128 00000000 .word .LC10 1274 0128 00000000 .word .LC10
@ -2038,7 +2038,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1320 .loc 1 406 3 view .LVU346 1320 .loc 1 406 3 view .LVU346
407:Src/File_Handling.c **** return fresult; 407:Src/File_Handling.c **** return fresult;
1321 .loc 1 407 6 view .LVU347 1321 .loc 1 407 6 view .LVU347
ARM GAS /tmp/cccCjqCZ.s page 35 ARM GAS /tmp/cczIN1cV.s page 35
1322 .loc 1 407 13 is_stmt 0 view .LVU348 1322 .loc 1 407 13 is_stmt 0 view .LVU348
@ -2098,7 +2098,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1336 .LVL141: 1336 .LVL141:
411:Src/File_Handling.c **** if (fresult != FR_OK) 411:Src/File_Handling.c **** if (fresult != FR_OK)
1337 .loc 1 411 11 discriminator 1 view .LVU352 1337 .loc 1 411 11 discriminator 1 view .LVU352
ARM GAS /tmp/cccCjqCZ.s page 36 ARM GAS /tmp/cczIN1cV.s page 36
1338 001e 074B ldr r3, .L77+4 1338 001e 074B ldr r3, .L77+4
@ -2158,7 +2158,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1376 .LFE1195: 1376 .LFE1195:
1378 .section .text.Update_File,"ax",%progbits 1378 .section .text.Update_File,"ax",%progbits
1379 .align 1 1379 .align 1
ARM GAS /tmp/cccCjqCZ.s page 37 ARM GAS /tmp/cczIN1cV.s page 37
1380 .global Update_File 1380 .global Update_File
@ -2218,7 +2218,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1423 .loc 1 457 13 view .LVU381 1423 .loc 1 457 13 view .LVU381
1424 .LBE23: 1424 .LBE23:
458:Src/File_Handling.c **** } 458:Src/File_Handling.c **** }
ARM GAS /tmp/cccCjqCZ.s page 38 ARM GAS /tmp/cczIN1cV.s page 38
459:Src/File_Handling.c **** 459:Src/File_Handling.c ****
@ -2278,7 +2278,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1428 .L80: 1428 .L80:
463:Src/File_Handling.c **** if (fresult != FR_OK) 463:Src/File_Handling.c **** if (fresult != FR_OK)
1429 .loc 1 463 6 is_stmt 1 view .LVU383 1429 .loc 1 463 6 is_stmt 1 view .LVU383
ARM GAS /tmp/cccCjqCZ.s page 39 ARM GAS /tmp/cczIN1cV.s page 39
463:Src/File_Handling.c **** if (fresult != FR_OK) 463:Src/File_Handling.c **** if (fresult != FR_OK)
@ -2338,7 +2338,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
485:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name); 485:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name);
1470 .loc 1 485 7 view .LVU398 1470 .loc 1 485 7 view .LVU398
488:Src/File_Handling.c **** } 488:Src/File_Handling.c **** }
ARM GAS /tmp/cccCjqCZ.s page 40 ARM GAS /tmp/cczIN1cV.s page 40
1471 .loc 1 488 7 view .LVU399 1471 .loc 1 488 7 view .LVU399
@ -2398,7 +2398,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1506 .section .text.Remove_File,"ax",%progbits 1506 .section .text.Remove_File,"ax",%progbits
1507 .align 1 1507 .align 1
1508 .global Remove_File 1508 .global Remove_File
ARM GAS /tmp/cccCjqCZ.s page 41 ARM GAS /tmp/cczIN1cV.s page 41
1509 .syntax unified 1509 .syntax unified
@ -2458,7 +2458,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1547 0018 164B ldr r3, .L93+4 1547 0018 164B ldr r3, .L93+4
1548 001a 1870 strb r0, [r3] 1548 001a 1870 strb r0, [r3]
527:Src/File_Handling.c **** if (fresult == FR_OK) 527:Src/File_Handling.c **** if (fresult == FR_OK)
ARM GAS /tmp/cccCjqCZ.s page 42 ARM GAS /tmp/cczIN1cV.s page 42
1549 .loc 1 527 3 is_stmt 1 view .LVU418 1549 .loc 1 527 3 is_stmt 1 view .LVU418
@ -2518,7 +2518,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1584 .loc 1 517 15 is_stmt 0 view .LVU430 1584 .loc 1 517 15 is_stmt 0 view .LVU430
1585 003a 6420 movs r0, #100 1585 003a 6420 movs r0, #100
1586 003c FFF7FEFF bl malloc 1586 003c FFF7FEFF bl malloc
ARM GAS /tmp/cccCjqCZ.s page 43 ARM GAS /tmp/cczIN1cV.s page 43
1587 .LVL161: 1587 .LVL161:
@ -2578,7 +2578,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1630 .align 2 1630 .align 2
1631 .L93: 1631 .L93:
1632 0070 00000000 .word fno 1632 0070 00000000 .word fno
ARM GAS /tmp/cccCjqCZ.s page 44 ARM GAS /tmp/cczIN1cV.s page 44
1633 0074 00000000 .word fresult 1633 0074 00000000 .word fresult
@ -2638,7 +2638,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1677 000a 1870 strb r0, [r3] 1677 000a 1870 strb r0, [r3]
549:Src/File_Handling.c **** if (fresult == FR_OK) 549:Src/File_Handling.c **** if (fresult == FR_OK)
1678 .loc 1 549 5 is_stmt 1 view .LVU447 1678 .loc 1 549 5 is_stmt 1 view .LVU447
ARM GAS /tmp/cccCjqCZ.s page 45 ARM GAS /tmp/cczIN1cV.s page 45
1679 .loc 1 549 8 is_stmt 0 view .LVU448 1679 .loc 1 549 8 is_stmt 0 view .LVU448
@ -2698,7 +2698,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1716 .LVL177: 1716 .LVL177:
1717 0032 0646 mov r6, r0 1717 0032 0646 mov r6, r0
1718 .LVL178: 1718 .LVL178:
ARM GAS /tmp/cccCjqCZ.s page 46 ARM GAS /tmp/cczIN1cV.s page 46
559:Src/File_Handling.c **** Send_Uart(buf); 559:Src/File_Handling.c **** Send_Uart(buf);
@ -2758,7 +2758,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1761 .cfi_startproc 1761 .cfi_startproc
1762 @ args = 0, pretend = 0, frame = 0 1762 @ args = 0, pretend = 0, frame = 0
1763 @ frame_needed = 0, uses_anonymous_args = 0 1763 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS /tmp/cccCjqCZ.s page 47 ARM GAS /tmp/cczIN1cV.s page 47
1764 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 1764 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
@ -2818,7 +2818,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1813 .LVL183: 1813 .LVL183:
573:Src/File_Handling.c **** sprintf (buf, "SD CARD Total Size: \t%lu\n",total); 573:Src/File_Handling.c **** sprintf (buf, "SD CARD Total Size: \t%lu\n",total);
1814 .loc 1 573 5 is_stmt 1 view .LVU475 1814 .loc 1 573 5 is_stmt 1 view .LVU475
ARM GAS /tmp/cccCjqCZ.s page 48 ARM GAS /tmp/cczIN1cV.s page 48
1815 0046 2246 mov r2, r4 1815 0046 2246 mov r2, r4
@ -2878,7 +2878,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1861 .cfi_restore 80 1861 .cfi_restore 80
1862 .cfi_restore 81 1862 .cfi_restore 81
1863 .cfi_def_cfa_offset 24 1863 .cfi_def_cfa_offset 24
ARM GAS /tmp/cccCjqCZ.s page 49 ARM GAS /tmp/cczIN1cV.s page 49
1864 0092 F8BD pop {r3, r4, r5, r6, r7, pc} 1864 0092 F8BD pop {r3, r4, r5, r6, r7, pc}
@ -2938,7 +2938,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1915 000e 104B ldr r3, .L110+4 1915 000e 104B ldr r3, .L110+4
1916 0010 1870 strb r0, [r3] 1916 0010 1870 strb r0, [r3]
587:Src/File_Handling.c **** if (fresult != FR_OK) 587:Src/File_Handling.c **** if (fresult != FR_OK)
ARM GAS /tmp/cccCjqCZ.s page 50 ARM GAS /tmp/cczIN1cV.s page 50
1917 .loc 1 587 2 is_stmt 1 view .LVU497 1917 .loc 1 587 2 is_stmt 1 view .LVU497
@ -2998,7 +2998,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
629:Src/File_Handling.c **** if (fresult != FR_OK) 629:Src/File_Handling.c **** if (fresult != FR_OK)
630:Src/File_Handling.c **** { 630:Src/File_Handling.c **** {
631:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); 631:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
ARM GAS /tmp/cccCjqCZ.s page 51 ARM GAS /tmp/cczIN1cV.s page 51
632:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name); 632:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
@ -3058,7 +3058,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
1959 002e 0A4B ldr r3, .L110+12 1959 002e 0A4B ldr r3, .L110+12
1960 0030 3246 mov r2, r6 1960 0030 3246 mov r2, r6
1961 0032 2946 mov r1, r5 1961 0032 2946 mov r1, r5
ARM GAS /tmp/cccCjqCZ.s page 52 ARM GAS /tmp/cczIN1cV.s page 52
1962 0034 3846 mov r0, r7 1962 0034 3846 mov r0, r7
@ -3118,7 +3118,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
2005 .LVL200: 2005 .LVL200:
2006 .LFB1201: 2006 .LFB1201:
646:Src/File_Handling.c **** 646:Src/File_Handling.c ****
ARM GAS /tmp/cccCjqCZ.s page 53 ARM GAS /tmp/cczIN1cV.s page 53
647:Src/File_Handling.c **** FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize) 647:Src/File_Handling.c **** FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize)
@ -3178,7 +3178,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
661:Src/File_Handling.c **** { 661:Src/File_Handling.c **** {
662:Src/File_Handling.c **** /* Create a file with read write access and open it */ 662:Src/File_Handling.c **** /* Create a file with read write access and open it */
663:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE); 663:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE);
ARM GAS /tmp/cccCjqCZ.s page 54 ARM GAS /tmp/cczIN1cV.s page 54
664:Src/File_Handling.c **** if (fresult != FR_OK) 664:Src/File_Handling.c **** if (fresult != FR_OK)
@ -3238,7 +3238,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
2053 0018 3222 movs r2, #50 2053 0018 3222 movs r2, #50
2054 001a 2146 mov r1, r4 2054 001a 2146 mov r1, r4
2055 001c 0D48 ldr r0, .L117+8 2055 001c 0D48 ldr r0, .L117+8
ARM GAS /tmp/cccCjqCZ.s page 55 ARM GAS /tmp/cczIN1cV.s page 55
2056 001e FFF7FEFF bl f_open 2056 001e FFF7FEFF bl f_open
@ -3298,7 +3298,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
2094 .LVL208: 2094 .LVL208:
692:Src/File_Handling.c **** if (fresult != FR_OK) 692:Src/File_Handling.c **** if (fresult != FR_OK)
2095 .loc 1 692 14 discriminator 1 view .LVU561 2095 .loc 1 692 14 discriminator 1 view .LVU561
ARM GAS /tmp/cccCjqCZ.s page 56 ARM GAS /tmp/cczIN1cV.s page 56
2096 0044 2070 strb r0, [r4] 2096 0044 2070 strb r0, [r4]
@ -3358,7 +3358,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1
2158 .align 2 2158 .align 2
2161 fno: 2161 fno:
2162 0000 00000000 .space 24 2162 0000 00000000 .space 24
ARM GAS /tmp/cccCjqCZ.s page 57 ARM GAS /tmp/cczIN1cV.s page 57
2162 00000000 2162 00000000
@ -3396,86 +3396,86 @@ ARM GAS /tmp/cccCjqCZ.s page 1
2187 .file 10 "/usr/include/newlib/stdio.h" 2187 .file 10 "/usr/include/newlib/stdio.h"
2188 .file 11 "/usr/include/newlib/stdlib.h" 2188 .file 11 "/usr/include/newlib/stdlib.h"
2189 .file 12 "<built-in>" 2189 .file 12 "<built-in>"
ARM GAS /tmp/cccCjqCZ.s page 58 ARM GAS /tmp/cczIN1cV.s page 58
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 File_Handling.c *ABS*:00000000 File_Handling.c
/tmp/cccCjqCZ.s:20 .text.Send_Uart:00000000 $t /tmp/cczIN1cV.s:20 .text.Send_Uart:00000000 $t
/tmp/cccCjqCZ.s:26 .text.Send_Uart:00000000 Send_Uart /tmp/cczIN1cV.s:26 .text.Send_Uart:00000000 Send_Uart
/tmp/cccCjqCZ.s:40 .text.Mount_SD:00000000 $t /tmp/cczIN1cV.s:40 .text.Mount_SD:00000000 $t
/tmp/cccCjqCZ.s:46 .text.Mount_SD:00000000 Mount_SD /tmp/cczIN1cV.s:46 .text.Mount_SD:00000000 Mount_SD
/tmp/cccCjqCZ.s:86 .text.Mount_SD:0000001c $d /tmp/cczIN1cV.s:86 .text.Mount_SD:0000001c $d
/tmp/cccCjqCZ.s:2175 .bss.fs:00000000 fs /tmp/cczIN1cV.s:2175 .bss.fs:00000000 fs
/tmp/cccCjqCZ.s:92 .text.Unmount_SD:00000000 $t /tmp/cczIN1cV.s:92 .text.Unmount_SD:00000000 $t
/tmp/cccCjqCZ.s:98 .text.Unmount_SD:00000000 Unmount_SD /tmp/cczIN1cV.s:98 .text.Unmount_SD:00000000 Unmount_SD
/tmp/cccCjqCZ.s:138 .text.Unmount_SD:0000001c $d /tmp/cczIN1cV.s:138 .text.Unmount_SD:0000001c $d
/tmp/cccCjqCZ.s:143 .rodata.Scan_SD.str1.4:00000000 $d /tmp/cczIN1cV.s:143 .rodata.Scan_SD.str1.4:00000000 $d
/tmp/cccCjqCZ.s:156 .text.Scan_SD:00000000 $t /tmp/cczIN1cV.s:156 .text.Scan_SD:00000000 $t
/tmp/cccCjqCZ.s:162 .text.Scan_SD:00000000 Scan_SD /tmp/cczIN1cV.s:162 .text.Scan_SD:00000000 Scan_SD
/tmp/cccCjqCZ.s:344 .text.Scan_SD:000000b8 $d /tmp/cczIN1cV.s:344 .text.Scan_SD:000000b8 $d
/tmp/cccCjqCZ.s:2161 .bss.fno:00000000 fno /tmp/cczIN1cV.s:2161 .bss.fno:00000000 fno
/tmp/cccCjqCZ.s:355 .rodata.Format_SD.str1.4:00000000 $d /tmp/cczIN1cV.s:355 .rodata.Format_SD.str1.4:00000000 $d
/tmp/cccCjqCZ.s:359 .text.Format_SD:00000000 $t /tmp/cczIN1cV.s:359 .text.Format_SD:00000000 $t
/tmp/cccCjqCZ.s:365 .text.Format_SD:00000000 Format_SD /tmp/cczIN1cV.s:365 .text.Format_SD:00000000 Format_SD
/tmp/cccCjqCZ.s:485 .text.Format_SD:00000078 $d /tmp/cczIN1cV.s:485 .text.Format_SD:00000078 $d
/tmp/cccCjqCZ.s:494 .text.Write_File:00000000 $t /tmp/cczIN1cV.s:494 .text.Write_File:00000000 $t
/tmp/cccCjqCZ.s:500 .text.Write_File:00000000 Write_File /tmp/cczIN1cV.s:500 .text.Write_File:00000000 Write_File
/tmp/cccCjqCZ.s:604 .text.Write_File:00000050 $d /tmp/cczIN1cV.s:604 .text.Write_File:00000050 $d
/tmp/cccCjqCZ.s:2168 .bss.fil:00000000 fil /tmp/cczIN1cV.s:2168 .bss.fil:00000000 fil
/tmp/cccCjqCZ.s:2147 .bss.bw:00000000 bw /tmp/cczIN1cV.s:2147 .bss.bw:00000000 bw
/tmp/cccCjqCZ.s:612 .text.Write_File_byte:00000000 $t /tmp/cczIN1cV.s:612 .text.Write_File_byte:00000000 $t
/tmp/cccCjqCZ.s:618 .text.Write_File_byte:00000000 Write_File_byte /tmp/cczIN1cV.s:618 .text.Write_File_byte:00000000 Write_File_byte
/tmp/cccCjqCZ.s:721 .text.Write_File_byte:0000004c $d /tmp/cczIN1cV.s:721 .text.Write_File_byte:0000004c $d
/tmp/cccCjqCZ.s:729 .rodata.Read_File.str1.4:00000000 $d /tmp/cczIN1cV.s:729 .rodata.Read_File.str1.4:00000000 $d
/tmp/cccCjqCZ.s:745 .text.Read_File:00000000 $t /tmp/cczIN1cV.s:745 .text.Read_File:00000000 $t
/tmp/cccCjqCZ.s:751 .text.Read_File:00000000 Read_File /tmp/cczIN1cV.s:751 .text.Read_File:00000000 Read_File
/tmp/cccCjqCZ.s:976 .text.Read_File:000000e4 $d /tmp/cczIN1cV.s:976 .text.Read_File:000000e4 $d
/tmp/cccCjqCZ.s:2154 .bss.br:00000000 br /tmp/cczIN1cV.s:2154 .bss.br:00000000 br
/tmp/cccCjqCZ.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d /tmp/cczIN1cV.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d
/tmp/cccCjqCZ.s:995 .text.Seek_Read_File:00000000 $t /tmp/cczIN1cV.s:995 .text.Seek_Read_File:00000000 $t
/tmp/cccCjqCZ.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File /tmp/cczIN1cV.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File
/tmp/cccCjqCZ.s:1271 .text.Seek_Read_File:0000011c $d /tmp/cczIN1cV.s:1271 .text.Seek_Read_File:0000011c $d
/tmp/cccCjqCZ.s:1287 .text.Create_File:00000000 $t /tmp/cczIN1cV.s:1287 .text.Create_File:00000000 $t
/tmp/cccCjqCZ.s:1293 .text.Create_File:00000000 Create_File /tmp/cczIN1cV.s:1293 .text.Create_File:00000000 Create_File
/tmp/cccCjqCZ.s:1372 .text.Create_File:00000038 $d /tmp/cczIN1cV.s:1372 .text.Create_File:00000038 $d
/tmp/cccCjqCZ.s:1379 .text.Update_File:00000000 $t /tmp/cczIN1cV.s:1379 .text.Update_File:00000000 $t
/tmp/cccCjqCZ.s:1385 .text.Update_File:00000000 Update_File /tmp/cczIN1cV.s:1385 .text.Update_File:00000000 Update_File
/tmp/cccCjqCZ.s:1489 .text.Update_File:00000050 $d /tmp/cczIN1cV.s:1489 .text.Update_File:00000050 $d
/tmp/cccCjqCZ.s:1497 .rodata.Remove_File.str1.4:00000000 $d /tmp/cczIN1cV.s:1497 .rodata.Remove_File.str1.4:00000000 $d
/tmp/cccCjqCZ.s:1507 .text.Remove_File:00000000 $t /tmp/cczIN1cV.s:1507 .text.Remove_File:00000000 $t
/tmp/cccCjqCZ.s:1513 .text.Remove_File:00000000 Remove_File /tmp/cczIN1cV.s:1513 .text.Remove_File:00000000 Remove_File
/tmp/cccCjqCZ.s:1632 .text.Remove_File:00000070 $d /tmp/cczIN1cV.s:1632 .text.Remove_File:00000070 $d
/tmp/cccCjqCZ.s:1642 .rodata.Create_Dir.str1.4:00000000 $d /tmp/cczIN1cV.s:1642 .rodata.Create_Dir.str1.4:00000000 $d
/tmp/cccCjqCZ.s:1649 .text.Create_Dir:00000000 $t /tmp/cczIN1cV.s:1649 .text.Create_Dir:00000000 $t
/tmp/cccCjqCZ.s:1655 .text.Create_Dir:00000000 Create_Dir /tmp/cczIN1cV.s:1655 .text.Create_Dir:00000000 Create_Dir
/tmp/cccCjqCZ.s:1734 .text.Create_Dir:00000048 $d /tmp/cczIN1cV.s:1734 .text.Create_Dir:00000048 $d
/tmp/cccCjqCZ.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d /tmp/cczIN1cV.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d
/tmp/cccCjqCZ.s:1752 .text.Check_SD_Space:00000000 $t /tmp/cczIN1cV.s:1752 .text.Check_SD_Space:00000000 $t
/tmp/cccCjqCZ.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space /tmp/cczIN1cV.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space
/tmp/cccCjqCZ.s:1870 .text.Check_SD_Space:00000094 $d /tmp/cczIN1cV.s:1870 .text.Check_SD_Space:00000094 $d
/tmp/cccCjqCZ.s:2140 .bss.pfs:00000000 pfs /tmp/cczIN1cV.s:2140 .bss.pfs:00000000 pfs
/tmp/cccCjqCZ.s:2133 .bss.fre_clust:00000000 fre_clust /tmp/cczIN1cV.s:2133 .bss.fre_clust:00000000 fre_clust
ARM GAS /tmp/cccCjqCZ.s page 59 ARM GAS /tmp/cczIN1cV.s page 59
/tmp/cccCjqCZ.s:2126 .bss.total:00000000 total /tmp/cczIN1cV.s:2126 .bss.total:00000000 total
/tmp/cccCjqCZ.s:2119 .bss.free_space:00000000 free_space /tmp/cczIN1cV.s:2119 .bss.free_space:00000000 free_space
/tmp/cccCjqCZ.s:1881 .text.Update_File_float:00000000 $t /tmp/cczIN1cV.s:1881 .text.Update_File_float:00000000 $t
/tmp/cccCjqCZ.s:1887 .text.Update_File_float:00000000 Update_File_float /tmp/cczIN1cV.s:1887 .text.Update_File_float:00000000 Update_File_float
/tmp/cccCjqCZ.s:1990 .text.Update_File_float:0000004c $d /tmp/cczIN1cV.s:1990 .text.Update_File_float:0000004c $d
/tmp/cccCjqCZ.s:1998 .text.Update_File_byte:00000000 $t /tmp/cczIN1cV.s:1998 .text.Update_File_byte:00000000 $t
/tmp/cccCjqCZ.s:2004 .text.Update_File_byte:00000000 Update_File_byte /tmp/cczIN1cV.s:2004 .text.Update_File_byte:00000000 Update_File_byte
/tmp/cccCjqCZ.s:2107 .text.Update_File_byte:0000004c $d /tmp/cczIN1cV.s:2107 .text.Update_File_byte:0000004c $d
/tmp/cccCjqCZ.s:2116 .bss.free_space:00000000 $d /tmp/cczIN1cV.s:2116 .bss.free_space:00000000 $d
/tmp/cccCjqCZ.s:2123 .bss.total:00000000 $d /tmp/cczIN1cV.s:2123 .bss.total:00000000 $d
/tmp/cccCjqCZ.s:2130 .bss.fre_clust:00000000 $d /tmp/cczIN1cV.s:2130 .bss.fre_clust:00000000 $d
/tmp/cccCjqCZ.s:2137 .bss.pfs:00000000 $d /tmp/cczIN1cV.s:2137 .bss.pfs:00000000 $d
/tmp/cccCjqCZ.s:2144 .bss.bw:00000000 $d /tmp/cczIN1cV.s:2144 .bss.bw:00000000 $d
/tmp/cccCjqCZ.s:2151 .bss.br:00000000 $d /tmp/cczIN1cV.s:2151 .bss.br:00000000 $d
/tmp/cccCjqCZ.s:2158 .bss.fno:00000000 $d /tmp/cczIN1cV.s:2158 .bss.fno:00000000 $d
/tmp/cccCjqCZ.s:2165 .bss.fil:00000000 $d /tmp/cczIN1cV.s:2165 .bss.fil:00000000 $d
/tmp/cccCjqCZ.s:2172 .bss.fs:00000000 $d /tmp/cczIN1cV.s:2172 .bss.fs:00000000 $d
UNDEFINED SYMBOLS UNDEFINED SYMBOLS
f_mount f_mount

BIN
build/File_Handling.o
View File

Binary file not shown.

BIN
build/For_stm32.bin
View File

Binary file not shown.

BIN
build/For_stm32.elf
View File

Binary file not shown.

4994
build/For_stm32.hex
View File

File diff suppressed because it is too large Load Diff

2088
build/For_stm32.map
View File

File diff suppressed because it is too large Load Diff

52
build/diskio.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccNpyRnY.s page 1 ARM GAS /tmp/cckyLcZT.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1
28:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private function prototypes -----------------------------------------------*/ 28:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private function prototypes -----------------------------------------------*/
29:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private functions ---------------------------------------------------------*/ 29:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private functions ---------------------------------------------------------*/
30:Middlewares/Third_Party/FatFs/src/diskio.c **** 30:Middlewares/Third_Party/FatFs/src/diskio.c ****
ARM GAS /tmp/ccNpyRnY.s page 2 ARM GAS /tmp/cckyLcZT.s page 2
31:Middlewares/Third_Party/FatFs/src/diskio.c **** /** 31:Middlewares/Third_Party/FatFs/src/diskio.c **** /**
@ -118,7 +118,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1
71 disk_initialize: 71 disk_initialize:
72 .LVL3: 72 .LVL3:
73 .LFB1184: 73 .LFB1184:
ARM GAS /tmp/ccNpyRnY.s page 3 ARM GAS /tmp/cckyLcZT.s page 3
45:Middlewares/Third_Party/FatFs/src/diskio.c **** 45:Middlewares/Third_Party/FatFs/src/diskio.c ****
@ -178,7 +178,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1
62:Middlewares/Third_Party/FatFs/src/diskio.c **** return stat; 62:Middlewares/Third_Party/FatFs/src/diskio.c **** return stat;
111 .loc 1 62 3 is_stmt 1 view .LVU23 111 .loc 1 62 3 is_stmt 1 view .LVU23
63:Middlewares/Third_Party/FatFs/src/diskio.c **** } 63:Middlewares/Third_Party/FatFs/src/diskio.c **** }
ARM GAS /tmp/ccNpyRnY.s page 4 ARM GAS /tmp/cckyLcZT.s page 4
112 .loc 1 63 1 is_stmt 0 view .LVU24 112 .loc 1 63 1 is_stmt 0 view .LVU24
@ -238,7 +238,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1
80:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT res; 80:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT res;
150 .loc 1 80 3 is_stmt 1 view .LVU29 150 .loc 1 80 3 is_stmt 1 view .LVU29
81:Middlewares/Third_Party/FatFs/src/diskio.c **** 81:Middlewares/Third_Party/FatFs/src/diskio.c ****
ARM GAS /tmp/ccNpyRnY.s page 5 ARM GAS /tmp/cckyLcZT.s page 5
82:Middlewares/Third_Party/FatFs/src/diskio.c **** res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count); 82:Middlewares/Third_Party/FatFs/src/diskio.c **** res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count);
@ -298,7 +298,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1
187 @ args = 0, pretend = 0, frame = 0 187 @ args = 0, pretend = 0, frame = 0
188 @ frame_needed = 0, uses_anonymous_args = 0 188 @ frame_needed = 0, uses_anonymous_args = 0
189 .loc 1 101 1 is_stmt 0 view .LVU38 189 .loc 1 101 1 is_stmt 0 view .LVU38
ARM GAS /tmp/ccNpyRnY.s page 6 ARM GAS /tmp/cckyLcZT.s page 6
190 0000 38B5 push {r3, r4, r5, lr} 190 0000 38B5 push {r3, r4, r5, lr}
@ -358,7 +358,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1
116:Middlewares/Third_Party/FatFs/src/diskio.c **** #if _USE_IOCTL == 1 116:Middlewares/Third_Party/FatFs/src/diskio.c **** #if _USE_IOCTL == 1
117:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT disk_ioctl ( 117:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT disk_ioctl (
118:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE pdrv, /* Physical drive nmuber (0..) */ 118:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE pdrv, /* Physical drive nmuber (0..) */
ARM GAS /tmp/ccNpyRnY.s page 7 ARM GAS /tmp/cckyLcZT.s page 7
119:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE cmd, /* Control code */ 119:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE cmd, /* Control code */
@ -418,7 +418,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1
131:Middlewares/Third_Party/FatFs/src/diskio.c **** * @brief Gets Time from RTC 131:Middlewares/Third_Party/FatFs/src/diskio.c **** * @brief Gets Time from RTC
132:Middlewares/Third_Party/FatFs/src/diskio.c **** * @param None 132:Middlewares/Third_Party/FatFs/src/diskio.c **** * @param None
133:Middlewares/Third_Party/FatFs/src/diskio.c **** * @retval Time in DWORD 133:Middlewares/Third_Party/FatFs/src/diskio.c **** * @retval Time in DWORD
ARM GAS /tmp/ccNpyRnY.s page 8 ARM GAS /tmp/cckyLcZT.s page 8
134:Middlewares/Third_Party/FatFs/src/diskio.c **** */ 134:Middlewares/Third_Party/FatFs/src/diskio.c **** */
@ -446,28 +446,28 @@ ARM GAS /tmp/ccNpyRnY.s page 1
294 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 294 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
295 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 295 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
296 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 296 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
ARM GAS /tmp/ccNpyRnY.s page 9 ARM GAS /tmp/cckyLcZT.s page 9
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 diskio.c *ABS*:00000000 diskio.c
/tmp/ccNpyRnY.s:20 .text.disk_status:00000000 $t /tmp/cckyLcZT.s:20 .text.disk_status:00000000 $t
/tmp/ccNpyRnY.s:26 .text.disk_status:00000000 disk_status /tmp/cckyLcZT.s:26 .text.disk_status:00000000 disk_status
/tmp/ccNpyRnY.s:60 .text.disk_status:00000014 $d /tmp/cckyLcZT.s:60 .text.disk_status:00000014 $d
/tmp/ccNpyRnY.s:65 .text.disk_initialize:00000000 $t /tmp/cckyLcZT.s:65 .text.disk_initialize:00000000 $t
/tmp/ccNpyRnY.s:71 .text.disk_initialize:00000000 disk_initialize /tmp/cckyLcZT.s:71 .text.disk_initialize:00000000 disk_initialize
/tmp/ccNpyRnY.s:124 .text.disk_initialize:00000024 $d /tmp/cckyLcZT.s:124 .text.disk_initialize:00000024 $d
/tmp/ccNpyRnY.s:129 .text.disk_read:00000000 $t /tmp/cckyLcZT.s:129 .text.disk_read:00000000 $t
/tmp/ccNpyRnY.s:135 .text.disk_read:00000000 disk_read /tmp/cckyLcZT.s:135 .text.disk_read:00000000 disk_read
/tmp/ccNpyRnY.s:171 .text.disk_read:00000014 $d /tmp/cckyLcZT.s:171 .text.disk_read:00000014 $d
/tmp/ccNpyRnY.s:176 .text.disk_write:00000000 $t /tmp/cckyLcZT.s:176 .text.disk_write:00000000 $t
/tmp/ccNpyRnY.s:182 .text.disk_write:00000000 disk_write /tmp/cckyLcZT.s:182 .text.disk_write:00000000 disk_write
/tmp/ccNpyRnY.s:218 .text.disk_write:00000014 $d /tmp/cckyLcZT.s:218 .text.disk_write:00000014 $d
/tmp/ccNpyRnY.s:223 .text.disk_ioctl:00000000 $t /tmp/cckyLcZT.s:223 .text.disk_ioctl:00000000 $t
/tmp/ccNpyRnY.s:229 .text.disk_ioctl:00000000 disk_ioctl /tmp/cckyLcZT.s:229 .text.disk_ioctl:00000000 disk_ioctl
/tmp/ccNpyRnY.s:263 .text.disk_ioctl:00000014 $d /tmp/cckyLcZT.s:263 .text.disk_ioctl:00000014 $d
/tmp/ccNpyRnY.s:268 .text.get_fattime:00000000 $t /tmp/cckyLcZT.s:268 .text.get_fattime:00000000 $t
/tmp/ccNpyRnY.s:274 .text.get_fattime:00000000 get_fattime /tmp/cckyLcZT.s:274 .text.get_fattime:00000000 get_fattime
UNDEFINED SYMBOLS UNDEFINED SYMBOLS
disk disk

BIN
build/diskio.o
View File

Binary file not shown.

34
build/fatfs.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccgsRqtI.s page 1 ARM GAS /tmp/ccFLcHcr.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/ccgsRqtI.s page 1
29:Src/fatfs.c **** 29:Src/fatfs.c ****
30:Src/fatfs.c **** void MX_FATFS_Init(void) 30:Src/fatfs.c **** void MX_FATFS_Init(void)
31:Src/fatfs.c **** { 31:Src/fatfs.c **** {
ARM GAS /tmp/ccgsRqtI.s page 2 ARM GAS /tmp/ccFLcHcr.s page 2
28 .loc 1 31 1 view -0 28 .loc 1 31 1 view -0
@ -118,7 +118,7 @@ ARM GAS /tmp/ccgsRqtI.s page 1
69 @ frame_needed = 0, uses_anonymous_args = 0 69 @ frame_needed = 0, uses_anonymous_args = 0
70 @ link register save eliminated. 70 @ link register save eliminated.
47:Src/fatfs.c **** /* USER CODE BEGIN get_fattime */ 47:Src/fatfs.c **** /* USER CODE BEGIN get_fattime */
ARM GAS /tmp/ccgsRqtI.s page 3 ARM GAS /tmp/ccFLcHcr.s page 3
48:Src/fatfs.c **** return 0; 48:Src/fatfs.c **** return 0;
@ -169,24 +169,24 @@ ARM GAS /tmp/ccgsRqtI.s page 1
114 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 114 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
115 .file 10 "Inc/sd_diskio.h" 115 .file 10 "Inc/sd_diskio.h"
116 .file 11 "Inc/fatfs.h" 116 .file 11 "Inc/fatfs.h"
ARM GAS /tmp/ccgsRqtI.s page 4 ARM GAS /tmp/ccFLcHcr.s page 4
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 fatfs.c *ABS*:00000000 fatfs.c
/tmp/ccgsRqtI.s:20 .text.MX_FATFS_Init:00000000 $t /tmp/ccFLcHcr.s:20 .text.MX_FATFS_Init:00000000 $t
/tmp/ccgsRqtI.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init /tmp/ccFLcHcr.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init
/tmp/ccgsRqtI.s:51 .text.MX_FATFS_Init:00000010 $d /tmp/ccFLcHcr.s:51 .text.MX_FATFS_Init:00000010 $d
/tmp/ccgsRqtI.s:97 .bss.SDPath:00000000 SDPath /tmp/ccFLcHcr.s:97 .bss.SDPath:00000000 SDPath
/tmp/ccgsRqtI.s:103 .bss.retSD:00000000 retSD /tmp/ccFLcHcr.s:103 .bss.retSD:00000000 retSD
/tmp/ccgsRqtI.s:58 .text.get_fattime:00000000 $t /tmp/ccFLcHcr.s:58 .text.get_fattime:00000000 $t
/tmp/ccgsRqtI.s:64 .text.get_fattime:00000000 get_fattime /tmp/ccFLcHcr.s:64 .text.get_fattime:00000000 get_fattime
/tmp/ccgsRqtI.s:83 .bss.SDFile:00000000 SDFile /tmp/ccFLcHcr.s:83 .bss.SDFile:00000000 SDFile
/tmp/ccgsRqtI.s:80 .bss.SDFile:00000000 $d /tmp/ccFLcHcr.s:80 .bss.SDFile:00000000 $d
/tmp/ccgsRqtI.s:90 .bss.SDFatFS:00000000 SDFatFS /tmp/ccFLcHcr.s:90 .bss.SDFatFS:00000000 SDFatFS
/tmp/ccgsRqtI.s:87 .bss.SDFatFS:00000000 $d /tmp/ccFLcHcr.s:87 .bss.SDFatFS:00000000 $d
/tmp/ccgsRqtI.s:94 .bss.SDPath:00000000 $d /tmp/ccFLcHcr.s:94 .bss.SDPath:00000000 $d
/tmp/ccgsRqtI.s:104 .bss.retSD:00000000 $d /tmp/ccFLcHcr.s:104 .bss.retSD:00000000 $d
UNDEFINED SYMBOLS UNDEFINED SYMBOLS
FATFS_LinkDriver FATFS_LinkDriver

BIN
build/fatfs.o
View File

Binary file not shown.

1070
build/ff.lst
View File

File diff suppressed because it is too large Load Diff

BIN
build/ff.o
View File

Binary file not shown.

48
build/ff_gen_drv.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccRuuTXi.s page 1 ARM GAS /tmp/ccoeDKf8.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1
28:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** 28:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c ****
29:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** /** 29:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** /**
30:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * @brief Links a compatible diskio driver/lun id and increments the number of active 30:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * @brief Links a compatible diskio driver/lun id and increments the number of active
ARM GAS /tmp/ccRuuTXi.s page 2 ARM GAS /tmp/ccoeDKf8.s page 2
31:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * linked drivers. 31:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * linked drivers.
@ -118,7 +118,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1
64 .loc 1 48 5 is_stmt 1 view .LVU13 64 .loc 1 48 5 is_stmt 1 view .LVU13
65 .loc 1 48 18 is_stmt 0 view .LVU14 65 .loc 1 48 18 is_stmt 0 view .LVU14
66 002c 5C7A ldrb r4, [r3, #9] @ zero_extendqisi2 66 002c 5C7A ldrb r4, [r3, #9] @ zero_extendqisi2
ARM GAS /tmp/ccRuuTXi.s page 3 ARM GAS /tmp/ccoeDKf8.s page 3
67 .LVL2: 67 .LVL2:
@ -178,7 +178,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1
41:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** uint8_t DiskNum = 0; 41:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** uint8_t DiskNum = 0;
111 .loc 1 41 11 view .LVU32 111 .loc 1 41 11 view .LVU32
112 004c 0120 movs r0, #1 112 004c 0120 movs r0, #1
ARM GAS /tmp/ccRuuTXi.s page 4 ARM GAS /tmp/ccoeDKf8.s page 4
113 .LVL10: 113 .LVL10:
@ -238,7 +238,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1
156 .global FATFS_UnLinkDriverEx 156 .global FATFS_UnLinkDriverEx
157 .syntax unified 157 .syntax unified
158 .thumb 158 .thumb
ARM GAS /tmp/ccRuuTXi.s page 5 ARM GAS /tmp/ccoeDKf8.s page 5
159 .thumb_func 159 .thumb_func
@ -298,7 +298,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1
195 .LVL15: 195 .LVL15:
196 .loc 1 90 25 view .LVU54 196 .loc 1 90 25 view .LVU54
197 001c 0020 movs r0, #0 197 001c 0020 movs r0, #0
ARM GAS /tmp/ccRuuTXi.s page 6 ARM GAS /tmp/ccoeDKf8.s page 6
198 .LVL16: 198 .LVL16:
@ -358,7 +358,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1
242 .align 1 242 .align 1
243 .global FATFS_UnLinkDriver 243 .global FATFS_UnLinkDriver
244 .syntax unified 244 .syntax unified
ARM GAS /tmp/ccRuuTXi.s page 7 ARM GAS /tmp/ccoeDKf8.s page 7
245 .thumb 245 .thumb
@ -418,7 +418,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1
283 @ frame_needed = 0, uses_anonymous_args = 0 283 @ frame_needed = 0, uses_anonymous_args = 0
284 @ link register save eliminated. 284 @ link register save eliminated.
118:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** return disk.nbr; 118:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** return disk.nbr;
ARM GAS /tmp/ccRuuTXi.s page 8 ARM GAS /tmp/ccoeDKf8.s page 8
285 .loc 1 118 3 view .LVU75 285 .loc 1 118 3 view .LVU75
@ -450,25 +450,25 @@ ARM GAS /tmp/ccRuuTXi.s page 1
311 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 311 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
312 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 312 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
313 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 313 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
ARM GAS /tmp/ccRuuTXi.s page 9 ARM GAS /tmp/ccoeDKf8.s page 9
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 ff_gen_drv.c *ABS*:00000000 ff_gen_drv.c
/tmp/ccRuuTXi.s:20 .text.FATFS_LinkDriverEx:00000000 $t /tmp/ccoeDKf8.s:20 .text.FATFS_LinkDriverEx:00000000 $t
/tmp/ccRuuTXi.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx /tmp/ccoeDKf8.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx
/tmp/ccRuuTXi.s:120 .text.FATFS_LinkDriverEx:00000050 $d /tmp/ccoeDKf8.s:120 .text.FATFS_LinkDriverEx:00000050 $d
/tmp/ccRuuTXi.s:303 .bss.disk:00000000 disk /tmp/ccoeDKf8.s:303 .bss.disk:00000000 disk
/tmp/ccRuuTXi.s:125 .text.FATFS_LinkDriver:00000000 $t /tmp/ccoeDKf8.s:125 .text.FATFS_LinkDriver:00000000 $t
/tmp/ccRuuTXi.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver /tmp/ccoeDKf8.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver
/tmp/ccRuuTXi.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t /tmp/ccoeDKf8.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t
/tmp/ccRuuTXi.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx /tmp/ccoeDKf8.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx
/tmp/ccRuuTXi.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d /tmp/ccoeDKf8.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d
/tmp/ccRuuTXi.s:242 .text.FATFS_UnLinkDriver:00000000 $t /tmp/ccoeDKf8.s:242 .text.FATFS_UnLinkDriver:00000000 $t
/tmp/ccRuuTXi.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver /tmp/ccoeDKf8.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver
/tmp/ccRuuTXi.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t /tmp/ccoeDKf8.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t
/tmp/ccRuuTXi.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr /tmp/ccoeDKf8.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr
/tmp/ccRuuTXi.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d /tmp/ccoeDKf8.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d
/tmp/ccRuuTXi.s:300 .bss.disk:00000000 $d /tmp/ccoeDKf8.s:300 .bss.disk:00000000 $d
NO UNDEFINED SYMBOLS NO UNDEFINED SYMBOLS

BIN
build/ff_gen_drv.o
View File

Binary file not shown.

34901
build/main.lst
View File

File diff suppressed because it is too large Load Diff

BIN
build/main.o
View File

Binary file not shown.

66
build/sd_diskio.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccYOHnte.s page 1 ARM GAS /tmp/cc8X4L5w.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
29:Src/sd_diskio.c **** #include "sd_diskio.h" 29:Src/sd_diskio.c **** #include "sd_diskio.h"
30:Src/sd_diskio.c **** 30:Src/sd_diskio.c ****
31:Src/sd_diskio.c **** /* Private typedef -----------------------------------------------------------*/ 31:Src/sd_diskio.c **** /* Private typedef -----------------------------------------------------------*/
ARM GAS /tmp/ccYOHnte.s page 2 ARM GAS /tmp/cc8X4L5w.s page 2
32:Src/sd_diskio.c **** /* Private define ------------------------------------------------------------*/ 32:Src/sd_diskio.c **** /* Private define ------------------------------------------------------------*/
@ -118,7 +118,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
86:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */ 86:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */
87:Src/sd_diskio.c **** 87:Src/sd_diskio.c ****
88:Src/sd_diskio.c **** /* Private functions ---------------------------------------------------------*/ 88:Src/sd_diskio.c **** /* Private functions ---------------------------------------------------------*/
ARM GAS /tmp/ccYOHnte.s page 3 ARM GAS /tmp/cc8X4L5w.s page 3
89:Src/sd_diskio.c **** 89:Src/sd_diskio.c ****
@ -178,7 +178,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
71 .global SD_initialize 71 .global SD_initialize
72 .syntax unified 72 .syntax unified
73 .thumb 73 .thumb
ARM GAS /tmp/ccYOHnte.s page 4 ARM GAS /tmp/cc8X4L5w.s page 4
74 .thumb_func 74 .thumb_func
@ -238,7 +238,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
106 .loc 1 123 1 view .LVU21 106 .loc 1 123 1 view .LVU21
107 0014 10BD pop {r4, pc} 107 0014 10BD pop {r4, pc}
108 .LVL4: 108 .LVL4:
ARM GAS /tmp/ccYOHnte.s page 5 ARM GAS /tmp/cc8X4L5w.s page 5
109 .L9: 109 .L9:
@ -298,7 +298,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
152 .cfi_endproc 152 .cfi_endproc
153 .LFE1185: 153 .LFE1185:
155 .section .text.SD_read,"ax",%progbits 155 .section .text.SD_read,"ax",%progbits
ARM GAS /tmp/ccYOHnte.s page 6 ARM GAS /tmp/cc8X4L5w.s page 6
156 .align 1 156 .align 1
@ -358,7 +358,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
193 .L16: 193 .L16:
152:Src/sd_diskio.c **** (uint32_t) (sector), 152:Src/sd_diskio.c **** (uint32_t) (sector),
153:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK) 153:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK)
ARM GAS /tmp/ccYOHnte.s page 7 ARM GAS /tmp/cc8X4L5w.s page 7
154:Src/sd_diskio.c **** { 154:Src/sd_diskio.c **** {
@ -418,7 +418,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
173:Src/sd_diskio.c **** * @param count: Number of sectors to write (1..128) 173:Src/sd_diskio.c **** * @param count: Number of sectors to write (1..128)
174:Src/sd_diskio.c **** * @retval DRESULT: Operation result 174:Src/sd_diskio.c **** * @retval DRESULT: Operation result
175:Src/sd_diskio.c **** */ 175:Src/sd_diskio.c **** */
ARM GAS /tmp/ccYOHnte.s page 8 ARM GAS /tmp/cc8X4L5w.s page 8
176:Src/sd_diskio.c **** #if _USE_WRITE == 1 176:Src/sd_diskio.c **** #if _USE_WRITE == 1
@ -478,7 +478,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
264 001a FAD1 bne .L21 264 001a FAD1 bne .L21
265 .L20: 265 .L20:
266 .LVL24: 266 .LVL24:
ARM GAS /tmp/ccYOHnte.s page 9 ARM GAS /tmp/cc8X4L5w.s page 9
190:Src/sd_diskio.c **** res = RES_OK; 190:Src/sd_diskio.c **** res = RES_OK;
@ -538,7 +538,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
302 .cfi_def_cfa_offset 48 302 .cfi_def_cfa_offset 48
210:Src/sd_diskio.c **** DRESULT res = RES_ERROR; 210:Src/sd_diskio.c **** DRESULT res = RES_ERROR;
303 .loc 1 210 3 is_stmt 1 view .LVU64 303 .loc 1 210 3 is_stmt 1 view .LVU64
ARM GAS /tmp/ccYOHnte.s page 10 ARM GAS /tmp/cc8X4L5w.s page 10
304 .LVL27: 304 .LVL27:
@ -598,7 +598,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
341 002a 0DE0 b .L25 341 002a 0DE0 b .L25
342 .LVL31: 342 .LVL31:
343 .L28: 343 .L28:
ARM GAS /tmp/ccYOHnte.s page 11 ARM GAS /tmp/cc8X4L5w.s page 11
228:Src/sd_diskio.c **** 228:Src/sd_diskio.c ****
@ -658,7 +658,7 @@ ARM GAS /tmp/ccYOHnte.s page 1
245:Src/sd_diskio.c **** } 245:Src/sd_diskio.c **** }
246:Src/sd_diskio.c **** 246:Src/sd_diskio.c ****
247:Src/sd_diskio.c **** return res; 247:Src/sd_diskio.c **** return res;
ARM GAS /tmp/ccYOHnte.s page 12 ARM GAS /tmp/cc8X4L5w.s page 12
248:Src/sd_diskio.c **** } 248:Src/sd_diskio.c **** }
@ -708,31 +708,31 @@ ARM GAS /tmp/ccYOHnte.s page 1
427 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 427 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
428 .file 10 "Inc/bsp_driver_sd.h" 428 .file 10 "Inc/bsp_driver_sd.h"
429 .file 11 "Inc/sd_diskio.h" 429 .file 11 "Inc/sd_diskio.h"
ARM GAS /tmp/ccYOHnte.s page 13 ARM GAS /tmp/cc8X4L5w.s page 13
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 sd_diskio.c *ABS*:00000000 sd_diskio.c
/tmp/ccYOHnte.s:20 .text.SD_CheckStatus:00000000 $t /tmp/cc8X4L5w.s:20 .text.SD_CheckStatus:00000000 $t
/tmp/ccYOHnte.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus /tmp/cc8X4L5w.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus
/tmp/ccYOHnte.s:65 .text.SD_CheckStatus:00000020 $d /tmp/cc8X4L5w.s:65 .text.SD_CheckStatus:00000020 $d
/tmp/ccYOHnte.s:416 .data.Stat:00000000 Stat /tmp/cc8X4L5w.s:416 .data.Stat:00000000 Stat
/tmp/ccYOHnte.s:70 .text.SD_initialize:00000000 $t /tmp/cc8X4L5w.s:70 .text.SD_initialize:00000000 $t
/tmp/ccYOHnte.s:76 .text.SD_initialize:00000000 SD_initialize /tmp/cc8X4L5w.s:76 .text.SD_initialize:00000000 SD_initialize
/tmp/ccYOHnte.s:122 .text.SD_initialize:00000024 $d /tmp/cc8X4L5w.s:122 .text.SD_initialize:00000024 $d
/tmp/ccYOHnte.s:127 .text.SD_status:00000000 $t /tmp/cc8X4L5w.s:127 .text.SD_status:00000000 $t
/tmp/ccYOHnte.s:133 .text.SD_status:00000000 SD_status /tmp/cc8X4L5w.s:133 .text.SD_status:00000000 SD_status
/tmp/ccYOHnte.s:156 .text.SD_read:00000000 $t /tmp/cc8X4L5w.s:156 .text.SD_read:00000000 $t
/tmp/ccYOHnte.s:162 .text.SD_read:00000000 SD_read /tmp/cc8X4L5w.s:162 .text.SD_read:00000000 SD_read
/tmp/ccYOHnte.s:218 .text.SD_write:00000000 $t /tmp/cc8X4L5w.s:218 .text.SD_write:00000000 $t
/tmp/ccYOHnte.s:224 .text.SD_write:00000000 SD_write /tmp/cc8X4L5w.s:224 .text.SD_write:00000000 SD_write
/tmp/ccYOHnte.s:280 .text.SD_ioctl:00000000 $t /tmp/cc8X4L5w.s:280 .text.SD_ioctl:00000000 $t
/tmp/ccYOHnte.s:286 .text.SD_ioctl:00000000 SD_ioctl /tmp/cc8X4L5w.s:286 .text.SD_ioctl:00000000 SD_ioctl
/tmp/ccYOHnte.s:320 .text.SD_ioctl:00000018 $d /tmp/cc8X4L5w.s:320 .text.SD_ioctl:00000018 $d
/tmp/ccYOHnte.s:324 .text.SD_ioctl:0000001c $t /tmp/cc8X4L5w.s:324 .text.SD_ioctl:0000001c $t
/tmp/ccYOHnte.s:398 .text.SD_ioctl:00000054 $d /tmp/cc8X4L5w.s:398 .text.SD_ioctl:00000054 $d
/tmp/ccYOHnte.s:407 .rodata.SD_Driver:00000000 SD_Driver /tmp/cc8X4L5w.s:407 .rodata.SD_Driver:00000000 SD_Driver
/tmp/ccYOHnte.s:404 .rodata.SD_Driver:00000000 $d /tmp/cc8X4L5w.s:404 .rodata.SD_Driver:00000000 $d
UNDEFINED SYMBOLS UNDEFINED SYMBOLS
BSP_SD_GetCardState BSP_SD_GetCardState

BIN
build/sd_diskio.o
View File

Binary file not shown.

BIN
build/startup_stm32f767xx.o
View File

Binary file not shown.

136
build/stm32f7xx_hal_msp.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/cc5mtMNQ.s page 1 ARM GAS /tmp/ccehMqBJ.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
29:Src/stm32f7xx_hal_msp.c **** 29:Src/stm32f7xx_hal_msp.c ****
30:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TD */ 30:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TD */
31:Src/stm32f7xx_hal_msp.c **** 31:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/cc5mtMNQ.s page 2 ARM GAS /tmp/ccehMqBJ.s page 2
32:Src/stm32f7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ 32:Src/stm32f7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
@ -118,7 +118,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
41 0004 1A6C ldr r2, [r3, #64] 41 0004 1A6C ldr r2, [r3, #64]
42 0006 42F08052 orr r2, r2, #268435456 42 0006 42F08052 orr r2, r2, #268435456
43 000a 1A64 str r2, [r3, #64] 43 000a 1A64 str r2, [r3, #64]
ARM GAS /tmp/cc5mtMNQ.s page 3 ARM GAS /tmp/ccehMqBJ.s page 3
44 .loc 1 72 3 view .LVU4 44 .loc 1 72 3 view .LVU4
@ -178,7 +178,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
83:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP Initialization 83:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP Initialization
84:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example 84:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
85:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer 85:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer
ARM GAS /tmp/cc5mtMNQ.s page 4 ARM GAS /tmp/ccehMqBJ.s page 4
86:Src/stm32f7xx_hal_msp.c **** * @retval None 86:Src/stm32f7xx_hal_msp.c **** * @retval None
@ -238,7 +238,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
111:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 111:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
112:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 112:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
113:Src/stm32f7xx_hal_msp.c **** 113:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/cc5mtMNQ.s page 5 ARM GAS /tmp/ccehMqBJ.s page 5
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2; 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2;
@ -298,7 +298,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
130 .cfi_def_cfa_offset 12 130 .cfi_def_cfa_offset 12
131 @ sp needed 131 @ sp needed
132 0020 30BD pop {r4, r5, pc} 132 0020 30BD pop {r4, r5, pc}
ARM GAS /tmp/cc5mtMNQ.s page 6 ARM GAS /tmp/ccehMqBJ.s page 6
133 .LVL2: 133 .LVL2:
@ -358,7 +358,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
172 0048 1A6B ldr r2, [r3, #48] 172 0048 1A6B ldr r2, [r3, #48]
173 004a 42F00102 orr r2, r2, #1 173 004a 42F00102 orr r2, r2, #1
174 004e 1A63 str r2, [r3, #48] 174 004e 1A63 str r2, [r3, #48]
ARM GAS /tmp/cc5mtMNQ.s page 7 ARM GAS /tmp/ccehMqBJ.s page 7
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
@ -418,7 +418,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
213 .loc 1 114 5 is_stmt 1 view .LVU55 213 .loc 1 114 5 is_stmt 1 view .LVU55
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
ARM GAS /tmp/cc5mtMNQ.s page 8 ARM GAS /tmp/ccehMqBJ.s page 8
214 .loc 1 114 25 is_stmt 0 view .LVU56 214 .loc 1 114 25 is_stmt 0 view .LVU56
@ -478,7 +478,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
254 .LVL9: 254 .LVL9:
255 .L10: 255 .L10:
137:Src/stm32f7xx_hal_msp.c **** 137:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/cc5mtMNQ.s page 9 ARM GAS /tmp/ccehMqBJ.s page 9
256 .loc 1 137 5 view .LVU71 256 .loc 1 137 5 view .LVU71
@ -538,7 +538,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
145:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 145:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
295 .loc 1 145 5 is_stmt 1 view .LVU87 295 .loc 1 145 5 is_stmt 1 view .LVU87
146:Src/stm32f7xx_hal_msp.c **** 146:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/cc5mtMNQ.s page 10 ARM GAS /tmp/ccehMqBJ.s page 10
296 .loc 1 146 5 view .LVU88 296 .loc 1 146 5 view .LVU88
@ -598,7 +598,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
340 @ args = 0, pretend = 0, frame = 0 340 @ args = 0, pretend = 0, frame = 0
341 @ frame_needed = 0, uses_anonymous_args = 0 341 @ frame_needed = 0, uses_anonymous_args = 0
342 .loc 1 165 1 is_stmt 0 view .LVU94 342 .loc 1 165 1 is_stmt 0 view .LVU94
ARM GAS /tmp/cc5mtMNQ.s page 11 ARM GAS /tmp/ccehMqBJ.s page 11
343 0000 08B5 push {r3, lr} 343 0000 08B5 push {r3, lr}
@ -658,7 +658,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
201:Src/stm32f7xx_hal_msp.c **** { 201:Src/stm32f7xx_hal_msp.c **** {
202:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 0 */ 202:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 0 */
203:Src/stm32f7xx_hal_msp.c **** 203:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/cc5mtMNQ.s page 12 ARM GAS /tmp/ccehMqBJ.s page 12
204:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 0 */ 204:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 0 */
@ -718,7 +718,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
387 .LVL20: 387 .LVL20:
388 0036 EBE7 b .L13 388 0036 EBE7 b .L13
389 .LVL21: 389 .LVL21:
ARM GAS /tmp/cc5mtMNQ.s page 13 ARM GAS /tmp/ccehMqBJ.s page 13
390 .L18: 390 .L18:
@ -778,7 +778,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
434 .cfi_def_cfa_offset 20 434 .cfi_def_cfa_offset 20
435 .cfi_offset 4, -20 435 .cfi_offset 4, -20
436 .cfi_offset 5, -16 436 .cfi_offset 5, -16
ARM GAS /tmp/cc5mtMNQ.s page 14 ARM GAS /tmp/ccehMqBJ.s page 14
437 .cfi_offset 6, -12 437 .cfi_offset 6, -12
@ -838,7 +838,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); 259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration 260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
261:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0 261:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0
ARM GAS /tmp/cc5mtMNQ.s page 15 ARM GAS /tmp/ccehMqBJ.s page 15
262:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1 262:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1
@ -898,7 +898,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
489 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 489 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
490 .LVL29: 490 .LVL29:
250:Src/stm32f7xx_hal_msp.c **** { 250:Src/stm32f7xx_hal_msp.c **** {
ARM GAS /tmp/cc5mtMNQ.s page 16 ARM GAS /tmp/ccehMqBJ.s page 16
491 .loc 1 250 8 discriminator 1 view .LVU127 491 .loc 1 250 8 discriminator 1 view .LVU127
@ -958,7 +958,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
530 005c 1A6B ldr r2, [r3, #48] 530 005c 1A6B ldr r2, [r3, #48]
531 005e 42F00802 orr r2, r2, #8 531 005e 42F00802 orr r2, r2, #8
532 0062 1A63 str r2, [r3, #48] 532 0062 1A63 str r2, [r3, #48]
ARM GAS /tmp/cc5mtMNQ.s page 17 ARM GAS /tmp/ccehMqBJ.s page 17
259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration 259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
570 008c 0423 movs r3, #4 570 008c 0423 movs r3, #4
571 008e 2793 str r3, [sp, #156] 571 008e 2793 str r3, [sp, #156]
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
ARM GAS /tmp/cc5mtMNQ.s page 18 ARM GAS /tmp/ccehMqBJ.s page 18
572 .loc 1 277 5 is_stmt 1 view .LVU160 572 .loc 1 277 5 is_stmt 1 view .LVU160
@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
292:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP De-Initialization 292:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP De-Initialization
293:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example 293:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
294:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer 294:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer
ARM GAS /tmp/cc5mtMNQ.s page 19 ARM GAS /tmp/ccehMqBJ.s page 19
295:Src/stm32f7xx_hal_msp.c **** * @retval None 295:Src/stm32f7xx_hal_msp.c **** * @retval None
@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
305:Src/stm32f7xx_hal_msp.c **** 305:Src/stm32f7xx_hal_msp.c ****
640 .loc 1 305 5 is_stmt 1 view .LVU177 640 .loc 1 305 5 is_stmt 1 view .LVU177
641 000c 084A ldr r2, .L33+4 641 000c 084A ldr r2, .L33+4
ARM GAS /tmp/cc5mtMNQ.s page 20 ARM GAS /tmp/ccehMqBJ.s page 20
642 000e 536C ldr r3, [r2, #68] 642 000e 536C ldr r3, [r2, #68]
@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
686 .cfi_def_cfa_offset 4 686 .cfi_def_cfa_offset 4
687 .cfi_offset 14, -4 687 .cfi_offset 14, -4
688 0002 85B0 sub sp, sp, #20 688 0002 85B0 sub sp, sp, #20
ARM GAS /tmp/cc5mtMNQ.s page 21 ARM GAS /tmp/ccehMqBJ.s page 21
689 .LCFI13: 689 .LCFI13:
@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
370:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 1 */ 370:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 1 */
371:Src/stm32f7xx_hal_msp.c **** 371:Src/stm32f7xx_hal_msp.c ****
372:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspInit 1 */ 372:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspInit 1 */
ARM GAS /tmp/cc5mtMNQ.s page 22 ARM GAS /tmp/ccehMqBJ.s page 22
373:Src/stm32f7xx_hal_msp.c **** } 373:Src/stm32f7xx_hal_msp.c **** }
@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
740 .LBE13: 740 .LBE13:
341:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */ 341:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */
741 .loc 1 341 5 view .LVU199 741 .loc 1 341 5 view .LVU199
ARM GAS /tmp/cc5mtMNQ.s page 23 ARM GAS /tmp/ccehMqBJ.s page 23
742 0038 F1E7 b .L35 742 0038 F1E7 b .L35
@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
783 .loc 1 366 5 view .LVU212 783 .loc 1 366 5 view .LVU212
784 006a 5B6C ldr r3, [r3, #68] 784 006a 5B6C ldr r3, [r3, #68]
785 006c 03F40033 and r3, r3, #131072 785 006c 03F40033 and r3, r3, #131072
ARM GAS /tmp/cc5mtMNQ.s page 24 ARM GAS /tmp/ccehMqBJ.s page 24
786 0070 0293 str r3, [sp, #8] 786 0070 0293 str r3, [sp, #8]
@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
827 .loc 1 382 5 is_stmt 0 view .LVU225 827 .loc 1 382 5 is_stmt 0 view .LVU225
828 00a0 FFF7FEFF bl HAL_NVIC_SetPriority 828 00a0 FFF7FEFF bl HAL_NVIC_SetPriority
829 .LVL53: 829 .LVL53:
ARM GAS /tmp/cc5mtMNQ.s page 25 ARM GAS /tmp/ccehMqBJ.s page 25
383:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */ 383:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */
@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
880 .loc 1 394 5 view .LVU234 880 .loc 1 394 5 view .LVU234
881 0012 1A4A ldr r2, .L53 881 0012 1A4A ldr r2, .L53
882 0014 9342 cmp r3, r2 882 0014 9342 cmp r3, r2
ARM GAS /tmp/cc5mtMNQ.s page 26 ARM GAS /tmp/ccehMqBJ.s page 26
883 0016 05D0 beq .L51 883 0016 05D0 beq .L51
@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
895 .cfi_def_cfa_offset 4 895 .cfi_def_cfa_offset 4
896 @ sp needed 896 @ sp needed
897 0020 5DF804FB ldr pc, [sp], #4 897 0020 5DF804FB ldr pc, [sp], #4
ARM GAS /tmp/cc5mtMNQ.s page 27 ARM GAS /tmp/ccehMqBJ.s page 27
898 .LVL57: 898 .LVL57:
@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
936 0048 FFF7FEFF bl HAL_GPIO_Init 936 0048 FFF7FEFF bl HAL_GPIO_Init
937 .LVL59: 937 .LVL59:
938 004c E7E7 b .L47 938 004c E7E7 b .L47
ARM GAS /tmp/cc5mtMNQ.s page 28 ARM GAS /tmp/ccehMqBJ.s page 28
939 .LVL60: 939 .LVL60:
@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
977 .LVL62: 977 .LVL62:
978 .loc 1 436 1 view .LVU270 978 .loc 1 436 1 view .LVU270
979 0078 D1E7 b .L47 979 0078 D1E7 b .L47
ARM GAS /tmp/cc5mtMNQ.s page 29 ARM GAS /tmp/ccehMqBJ.s page 29
980 .L54: 980 .L54:
@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
456:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM8) 456:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM8)
1017 .loc 1 456 8 is_stmt 1 view .LVU276 1017 .loc 1 456 8 is_stmt 1 view .LVU276
1018 .loc 1 456 10 is_stmt 0 view .LVU277 1018 .loc 1 456 10 is_stmt 0 view .LVU277
ARM GAS /tmp/cc5mtMNQ.s page 30 ARM GAS /tmp/ccehMqBJ.s page 30
1019 000a 184A ldr r2, .L65+4 1019 000a 184A ldr r2, .L65+4
@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
496:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspDeInit 1 */ 496:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspDeInit 1 */
497:Src/stm32f7xx_hal_msp.c **** } 497:Src/stm32f7xx_hal_msp.c **** }
498:Src/stm32f7xx_hal_msp.c **** 498:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/cc5mtMNQ.s page 31 ARM GAS /tmp/ccehMqBJ.s page 31
499:Src/stm32f7xx_hal_msp.c **** } 499:Src/stm32f7xx_hal_msp.c **** }
@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
1078 .loc 1 493 5 view .LVU291 1078 .loc 1 493 5 view .LVU291
1079 0060 1A20 movs r0, #26 1079 0060 1A20 movs r0, #26
1080 .LVL72: 1080 .LVL72:
ARM GAS /tmp/cc5mtMNQ.s page 32 ARM GAS /tmp/ccehMqBJ.s page 32
493:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspDeInit 1 */ 493:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspDeInit 1 */
@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
1126 000e 2A91 str r1, [sp, #168] 1126 000e 2A91 str r1, [sp, #168]
1127 0010 2B91 str r1, [sp, #172] 1127 0010 2B91 str r1, [sp, #172]
510:Src/stm32f7xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 510:Src/stm32f7xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
ARM GAS /tmp/cc5mtMNQ.s page 33 ARM GAS /tmp/ccehMqBJ.s page 33
1128 .loc 1 510 3 is_stmt 1 view .LVU298 1128 .loc 1 510 3 is_stmt 1 view .LVU298
@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
1145 0022 2CB0 add sp, sp, #176 1145 0022 2CB0 add sp, sp, #176
1146 .LCFI23: 1146 .LCFI23:
1147 .cfi_remember_state 1147 .cfi_remember_state
ARM GAS /tmp/cc5mtMNQ.s page 34 ARM GAS /tmp/ccehMqBJ.s page 34
1148 .cfi_def_cfa_offset 8 1148 .cfi_def_cfa_offset 8
@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
1187 .loc 1 529 5 view .LVU319 1187 .loc 1 529 5 view .LVU319
1188 0048 1A6B ldr r2, [r3, #48] 1188 0048 1A6B ldr r2, [r3, #48]
1189 004a 42F01002 orr r2, r2, #16 1189 004a 42F01002 orr r2, r2, #16
ARM GAS /tmp/cc5mtMNQ.s page 35 ARM GAS /tmp/ccehMqBJ.s page 35
1190 004e 1A63 str r2, [r3, #48] 1190 004e 1A63 str r2, [r3, #48]
@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
1229 007a DBE7 b .L69 1229 007a DBE7 b .L69
1230 .L74: 1230 .L74:
1231 .align 2 1231 .align 2
ARM GAS /tmp/cc5mtMNQ.s page 36 ARM GAS /tmp/ccehMqBJ.s page 36
1232 .L73: 1232 .L73:
@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
568:Src/stm32f7xx_hal_msp.c **** */ 568:Src/stm32f7xx_hal_msp.c **** */
569:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1); 569:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1);
570:Src/stm32f7xx_hal_msp.c **** 570:Src/stm32f7xx_hal_msp.c ****
ARM GAS /tmp/cc5mtMNQ.s page 37 ARM GAS /tmp/ccehMqBJ.s page 37
571:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspDeInit 1 */ 571:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspDeInit 1 */
@ -2216,41 +2216,41 @@ ARM GAS /tmp/cc5mtMNQ.s page 1
1312 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h" 1312 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h"
1313 .file 18 "Inc/main.h" 1313 .file 18 "Inc/main.h"
1314 .file 19 "<built-in>" 1314 .file 19 "<built-in>"
ARM GAS /tmp/cc5mtMNQ.s page 38 ARM GAS /tmp/ccehMqBJ.s page 38
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_msp.c *ABS*:00000000 stm32f7xx_hal_msp.c
/tmp/cc5mtMNQ.s:20 .text.HAL_MspInit:00000000 $t /tmp/ccehMqBJ.s:20 .text.HAL_MspInit:00000000 $t
/tmp/cc5mtMNQ.s:26 .text.HAL_MspInit:00000000 HAL_MspInit /tmp/ccehMqBJ.s:26 .text.HAL_MspInit:00000000 HAL_MspInit
/tmp/cc5mtMNQ.s:76 .text.HAL_MspInit:0000002c $d /tmp/ccehMqBJ.s:76 .text.HAL_MspInit:0000002c $d
/tmp/cc5mtMNQ.s:81 .text.HAL_ADC_MspInit:00000000 $t /tmp/ccehMqBJ.s:81 .text.HAL_ADC_MspInit:00000000 $t
/tmp/cc5mtMNQ.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit /tmp/ccehMqBJ.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
/tmp/cc5mtMNQ.s:318 .text.HAL_ADC_MspInit:000000f4 $d /tmp/ccehMqBJ.s:318 .text.HAL_ADC_MspInit:000000f4 $d
/tmp/cc5mtMNQ.s:329 .text.HAL_ADC_MspDeInit:00000000 $t /tmp/ccehMqBJ.s:329 .text.HAL_ADC_MspDeInit:00000000 $t
/tmp/cc5mtMNQ.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit /tmp/ccehMqBJ.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
/tmp/cc5mtMNQ.s:408 .text.HAL_ADC_MspDeInit:00000050 $d /tmp/ccehMqBJ.s:408 .text.HAL_ADC_MspDeInit:00000050 $d
/tmp/cc5mtMNQ.s:418 .text.HAL_SD_MspInit:00000000 $t /tmp/ccehMqBJ.s:418 .text.HAL_SD_MspInit:00000000 $t
/tmp/cc5mtMNQ.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit /tmp/ccehMqBJ.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit
/tmp/cc5mtMNQ.s:600 .text.HAL_SD_MspInit:000000a8 $d /tmp/ccehMqBJ.s:600 .text.HAL_SD_MspInit:000000a8 $d
/tmp/cc5mtMNQ.s:608 .text.HAL_SD_MspDeInit:00000000 $t /tmp/ccehMqBJ.s:608 .text.HAL_SD_MspDeInit:00000000 $t
/tmp/cc5mtMNQ.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit /tmp/ccehMqBJ.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit
/tmp/cc5mtMNQ.s:662 .text.HAL_SD_MspDeInit:0000002c $d /tmp/ccehMqBJ.s:662 .text.HAL_SD_MspDeInit:0000002c $d
/tmp/cc5mtMNQ.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t /tmp/ccehMqBJ.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t
/tmp/cc5mtMNQ.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit /tmp/ccehMqBJ.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
/tmp/cc5mtMNQ.s:839 .text.HAL_TIM_Base_MspInit:000000ac $d /tmp/ccehMqBJ.s:839 .text.HAL_TIM_Base_MspInit:000000ac $d
/tmp/cc5mtMNQ.s:848 .text.HAL_TIM_MspPostInit:00000000 $t /tmp/ccehMqBJ.s:848 .text.HAL_TIM_MspPostInit:00000000 $t
/tmp/cc5mtMNQ.s:854 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit /tmp/ccehMqBJ.s:854 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit
/tmp/cc5mtMNQ.s:983 .text.HAL_TIM_MspPostInit:0000007c $d /tmp/ccehMqBJ.s:983 .text.HAL_TIM_MspPostInit:0000007c $d
/tmp/cc5mtMNQ.s:991 .text.HAL_TIM_Base_MspDeInit:00000000 $t /tmp/ccehMqBJ.s:991 .text.HAL_TIM_Base_MspDeInit:00000000 $t
/tmp/cc5mtMNQ.s:997 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit /tmp/ccehMqBJ.s:997 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
/tmp/cc5mtMNQ.s:1089 .text.HAL_TIM_Base_MspDeInit:00000068 $d /tmp/ccehMqBJ.s:1089 .text.HAL_TIM_Base_MspDeInit:00000068 $d
/tmp/cc5mtMNQ.s:1097 .text.HAL_UART_MspInit:00000000 $t /tmp/ccehMqBJ.s:1097 .text.HAL_UART_MspInit:00000000 $t
/tmp/cc5mtMNQ.s:1103 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit /tmp/ccehMqBJ.s:1103 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
/tmp/cc5mtMNQ.s:1233 .text.HAL_UART_MspInit:0000007c $d /tmp/ccehMqBJ.s:1233 .text.HAL_UART_MspInit:0000007c $d
/tmp/cc5mtMNQ.s:1240 .text.HAL_UART_MspDeInit:00000000 $t /tmp/ccehMqBJ.s:1240 .text.HAL_UART_MspDeInit:00000000 $t
/tmp/cc5mtMNQ.s:1246 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit /tmp/ccehMqBJ.s:1246 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
/tmp/cc5mtMNQ.s:1289 .text.HAL_UART_MspDeInit:00000020 $d /tmp/ccehMqBJ.s:1289 .text.HAL_UART_MspDeInit:00000020 $d
UNDEFINED SYMBOLS UNDEFINED SYMBOLS
HAL_GPIO_Init HAL_GPIO_Init

BIN
build/stm32f7xx_hal_msp.o
View File

Binary file not shown.

3128
build/stm32f7xx_it.lst
View File

File diff suppressed because it is too large Load Diff

BIN
build/stm32f7xx_it.o
View File

Binary file not shown.

4
build/syscall.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccLTnVRs.s page 1 ARM GAS /tmp/ccd6fn4Z.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -24,7 +24,7 @@ ARM GAS /tmp/ccLTnVRs.s page 1
21 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 21 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
22 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 22 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
23 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 23 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
ARM GAS /tmp/ccLTnVRs.s page 2 ARM GAS /tmp/ccd6fn4Z.s page 2
DEFINED SYMBOLS DEFINED SYMBOLS

BIN
build/syscall.o
View File

Binary file not shown.