diff --git a/DACUSAGE.pdf b/DACUSAGE.pdf new file mode 100644 index 0000000..f0fde5d Binary files /dev/null and b/DACUSAGE.pdf differ diff --git a/For_stm32.ioc b/For_stm32.ioc index 566167c..3f16004 100644 --- a/For_stm32.ioc +++ b/For_stm32.ioc @@ -553,8 +553,8 @@ SH.S_TIM11_CH1.ConfNb=1 SH.S_TIM4_CH3.0=TIM4_CH3,PWM Generation3 CH3 SH.S_TIM4_CH3.ConfNb=1 SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8 -SPI2.CLKPhase=SPI_PHASE_2EDGE -SPI2.CLKPolarity=SPI_POLARITY_HIGH +SPI2.CLKPhase=SPI_PHASE_1EDGE +SPI2.CLKPolarity=SPI_POLARITY_LOW SPI2.CalculateBaudRate=5.75 MBits/s SPI2.DataSize=SPI_DATASIZE_16BIT SPI2.Direction=SPI_DIRECTION_2LINES diff --git a/Inc/main.h b/Inc/main.h index aa94f73..35c119a 100644 --- a/Inc/main.h +++ b/Inc/main.h @@ -85,8 +85,10 @@ void Set_LTEC(uint8_t, uint16_t); #define ADC_ThrLD2_CS_GPIO_Port GPIOF #define EN_5V2_Pin GPIO_PIN_2 #define EN_5V2_GPIO_Port GPIOC -#define EN_5V1_Pin GPIO_PIN_3 -#define EN_5V1_GPIO_Port GPIOC +#define EN_5V1_Pin GPIO_PIN_3 +#define EN_5V1_GPIO_Port GPIOC +#define AD9102_RESET_Pin GPIO_PIN_6 +#define AD9102_RESET_GPIO_Port GPIOC #define TECEN1_Pin GPIO_PIN_0 #define TECEN1_GPIO_Port GPIOA #define TECEN2_Pin GPIO_PIN_1 @@ -119,14 +121,16 @@ void Set_LTEC(uint8_t, uint16_t); #define REF0_EN_GPIO_Port GPIOB #define TEC1_PD_Pin GPIO_PIN_11 #define TEC1_PD_GPIO_Port GPIOB -#define DAC_TEC1_CS_Pin GPIO_PIN_12 -#define DAC_TEC1_CS_GPIO_Port GPIOB -#define DAC_LD1_CS_Pin GPIO_PIN_14 -#define DAC_LD1_CS_GPIO_Port GPIOB -#define LD1_EN_Pin GPIO_PIN_8 -#define LD1_EN_GPIO_Port GPIOD -#define USB_FLAG_Pin GPIO_PIN_8 -#define USB_FLAG_GPIO_Port GPIOA +#define DAC_TEC1_CS_Pin GPIO_PIN_12 +#define DAC_TEC1_CS_GPIO_Port GPIOB +#define DAC_LD1_CS_Pin GPIO_PIN_14 +#define DAC_LD1_CS_GPIO_Port GPIOB +#define LD1_EN_Pin GPIO_PIN_8 +#define LD1_EN_GPIO_Port GPIOD +#define AD9102_TRIG_Pin GPIO_PIN_11 +#define AD9102_TRIG_GPIO_Port GPIOD +#define USB_FLAG_Pin GPIO_PIN_8 +#define USB_FLAG_GPIO_Port GPIOA #define SDMMC1_EN_Pin GPIO_PIN_0 #define SDMMC1_EN_GPIO_Port GPIOD #define TEST_01_Pin GPIO_PIN_1 @@ -168,24 +172,37 @@ void Set_LTEC(uint8_t, uint16_t); #define DEFAULT_ENABLE 2 #define TRANS_S_ENABLE 3 #define TRANS_ENABLE 4 - #define REMOVE_FILE 5 - #define STATE 6 - #define WORK_ENABLE 7 - #define DECODE_TASK 8 - #define RUN_TASK 9 + #define REMOVE_FILE 5 + #define STATE 6 + #define WORK_ENABLE 7 + #define DECODE_TASK 8 + #define RUN_TASK 9 + #define AD9102_CMD 10 #define SD_ERR 0x01 #define UART_ERR 0x02 #define UART_DECODE_ERR 0x04 #define TEC1_ERR 0x08 #define TEC2_ERR 0x10 - #define DEFAUL_ERR 0x20 - #define REMOVE_ERR 0x40 + #define DEFAUL_ERR 0x20 + #define REMOVE_ERR 0x40 + #define AD9102_ERR 0x80 #define NO_MESS 0 #define MESS_01 1 - #define MESS_02 2 - #define MESS_03 3 + #define MESS_02 2 + #define MESS_03 3 + + // AD9102 serial command (compatible header with PC tool) + #define AD9102_CMD_HEADER 0x8888 + #define AD9102_CMD_8 10 // total bytes including header + #define AD9102_CMD_WORDS 4 // data words (flags, freq LSW, freq MSW, checksum) + + #define AD9102_ON_SPI2 1 + + // AD9102 CS (chip select). Adjust to your wiring. + #define AD9102_CS_GPIO_Port DAC_TEC1_CS_GPIO_Port + #define AD9102_CS_Pin DAC_TEC1_CS_Pin typedef struct{ diff --git a/Src/main.c b/Src/main.c index 8a705f4..5deb688 100644 --- a/Src/main.c +++ b/Src/main.c @@ -34,6 +34,48 @@ /* Private define ------------------------------------------------------------*/ /* USER CODE BEGIN PD */ +// AD9102 register addresses and bit fields (see ad9102.pdf) +#define AD9102_REG_RAMUPDATE 0x001Du +#define AD9102_REG_PAT_STATUS 0x001Eu +#define AD9102_REG_PAT_TYPE 0x001Fu +#define AD9102_REG_SPICONFIG 0x0000u +#define AD9102_REG_POWERCONFIG 0x0001u +#define AD9102_REG_CLOCKCONFIG 0x0002u +#define AD9102_REG_WAV_CONFIG 0x0027u +#define AD9102_REG_PAT_TIMEBASE 0x0028u +#define AD9102_REG_PAT_PERIOD 0x0029u +#define AD9102_REG_SAW_CONFIG 0x0037u +#define AD9102_REG_CFG_ERROR 0x0060u + +#define AD9102_PAT_STATUS_RUN (1u << 0) + +#define AD9102_WAV_PRESTORE_SEL_SHIFT 4 +#define AD9102_WAV_WAVE_SEL_SHIFT 0 +#define AD9102_WAV_PRESTORE_SAW 1u +#define AD9102_WAV_WAVE_SEL_PRESTORE 1u + +#define AD9102_SAW_STEP_SHIFT 2 +#define AD9102_SAW_TYPE_SHIFT 0 +#define AD9102_SAW_TYPE_UP 0u +#define AD9102_SAW_TYPE_DOWN 1u +#define AD9102_SAW_TYPE_TRI 2u +#define AD9102_SAW_TYPE_ZERO 3u + +#define AD9102_REG_COUNT 66u + +#define AD9102_EX4_WAV_CONFIG 0x3212u +#define AD9102_EX4_PAT_TIMEBASE 0x0121u +#define AD9102_EX4_PAT_PERIOD 0xFFFFu +#define AD9102_EX4_SAW_CONFIG 0x0606u + +#define AD9102_SAW_STEP_DEFAULT 1u +#define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u +#define AD9102_START_DELAY_BASE_DEFAULT 0x1u +#define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u +#define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu + +#define AD9102_FLAG_ENABLE 0x0001u +#define AD9102_FLAG_TRIANGLE 0x0002u /* USER CODE END PD */ /* Private macro -------------------------------------------------------------*/ @@ -70,6 +112,31 @@ LD_Blinker_StateTypeDef LD_blinker; task_t task; +static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = { + 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u, + 0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu, + 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u, + 0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u, + 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu, + 0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u, + 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u, + 0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu, + 0x001eu, 0x001du +}; + +static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = { + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, + 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u, + 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u, + 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu, + 0x0001u, 0x0001u +}; + + /* USER CODE END PV */ @@ -103,6 +170,12 @@ void Set_LTEC(uint8_t num, uint16_t DATA); static uint16_t MPhD_T(uint8_t num); static uint16_t Get_ADC(uint8_t num); static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uint8_t num); +static void AD9102_Init(void); +static void AD9102_WriteReg(uint16_t addr, uint16_t value); +static uint16_t AD9102_ReadReg(uint16_t addr); +static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); +static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period); +static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period); uint8_t CheckChecksum(uint16_t *pbuff); uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); //int SD_Init(void); @@ -359,7 +432,56 @@ int main(void) State_Data[0]|=temp16&0xff; } CPU_state_old = WORK_ENABLE;//Save main current cycle + } + break; + case AD9102_CMD://10 - Configure AD9102 sawtooth output + if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) + { + uint16_t flags = COMMAND[0]; + uint16_t param0 = COMMAND[1]; + uint16_t param1 = COMMAND[2]; + uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; + uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + uint16_t pat_period = param1; + + if (param0 == 0u && param1 == 0u) + { + saw_step = AD9102_SAW_STEP_DEFAULT; + pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; + pat_period = AD9102_PAT_PERIOD_DEFAULT; + } + else + { + if (saw_step == 0u) + { + saw_step = AD9102_SAW_STEP_DEFAULT; + } + else if (saw_step > 63u) + { + saw_step = 63u; + } + if (pat_period == 0u) + { + pat_period = AD9102_PAT_PERIOD_DEFAULT; + } + } + + uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period); + State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + { + State_Data[0] |= AD9102_ERR; + } + } + else + { + State_Data[0] |= UART_DECODE_ERR; } + UART_transmission_request = MESS_01; + CPU_state = CPU_state_old; break; case DECODE_TASK: if (CheckChecksum(COMMAND)) @@ -998,6 +1120,7 @@ static void MX_SPI2_Init(void) LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); /**SPI2 GPIO Configuration PB13 ------> SPI2_SCK + PB14 ------> SPI2_MISO PB15 ------> SPI2_MOSI */ GPIO_InitStruct.Pin = LL_GPIO_PIN_13; @@ -1008,6 +1131,14 @@ static void MX_SPI2_Init(void) GPIO_InitStruct.Alternate = LL_GPIO_AF_5; LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + GPIO_InitStruct.Pin = LL_GPIO_PIN_14; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + GPIO_InitStruct.Pin = LL_GPIO_PIN_15; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; @@ -1023,8 +1154,8 @@ static void MX_SPI2_Init(void) SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; @@ -1735,6 +1866,7 @@ static void MX_GPIO_Init(void) /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); + HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); @@ -1749,7 +1881,7 @@ static void MX_GPIO_Init(void) HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|DAC_LD1_CS_Pin|OUT_6_Pin + HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ @@ -1757,6 +1889,7 @@ static void MX_GPIO_Init(void) /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin @@ -1775,8 +1908,8 @@ static void MX_GPIO_Init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); - /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin */ - GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin; + /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */ + GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; @@ -1818,17 +1951,17 @@ static void MX_GPIO_Init(void) GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); - /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin DAC_LD1_CS_Pin + /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ - GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin|DAC_LD1_CS_Pin + GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 */ - GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7; + /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin */ + GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; @@ -2007,6 +2140,8 @@ static void Init_params(void) // { // test = 12; // } + + AD9102_Init(); } static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup) { @@ -2263,10 +2398,221 @@ void OUT_trigger(uint8_t out_n) } } +static void AD9102_Init(void) +{ + HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); + for (volatile uint32_t d = 0; d < 1000; d++) {} + HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + + AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT); + AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +} + +static void AD9102_WriteReg(uint16_t addr, uint16_t value) +{ + uint32_t tmp32 = 0; + uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address + + if (!LL_SPI_IsEnabled(SPI2)) + { + LL_SPI_Enable(SPI2); + } + + HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); + + while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + LL_SPI_TransmitData16(SPI2, cmd); + tmp32 = 0; + while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + (void) SPI2->DR; + + tmp32 = 0; + while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + LL_SPI_TransmitData16(SPI2, value); + tmp32 = 0; + while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + (void) SPI2->DR; + + HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +} + +static uint16_t AD9102_ReadReg(uint16_t addr) +{ + uint32_t tmp32 = 0; + uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) + uint16_t value; + + if (!LL_SPI_IsEnabled(SPI2)) + { + LL_SPI_Enable(SPI2); + } + + HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); + + while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + LL_SPI_TransmitData16(SPI2, cmd); + tmp32 = 0; + while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + (void) SPI2->DR; + + tmp32 = 0; + while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + LL_SPI_TransmitData16(SPI2, 0x0000u); + tmp32 = 0; + while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + value = LL_SPI_ReceiveData16(SPI2); + + HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + return value; +} + +static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count) +{ + for (uint16_t i = 0; i < count; i++) + { + AD9102_WriteReg(ad9102_reg_addr[i], values[i]); + } +} + +static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period) +{ + if (enable) + { + uint16_t saw_cfg; + uint16_t pat_timebase; + + if (saw_step == 0u) + { + saw_step = AD9102_SAW_STEP_DEFAULT; + } + if (saw_step > 63u) + { + saw_step = 63u; + } + saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | + ((uint16_t)(saw_type & 0x3u))); + pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + ((pat_base & 0x0Fu) << 4) | + (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + + AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG); + AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); + AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); + AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); + AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat + + // Update RUN then RAMUPDATE at the end of the write sequence. + // AD9102 output is started by a falling edge of TRIGGER pin when RUN=1. + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); + AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + for (volatile uint32_t d = 0; d < 1000; d++) {} + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + } + else + { + AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + } + + return AD9102_ReadReg(AD9102_REG_PAT_STATUS); +} + +static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period) +{ + uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + ((pat_base & 0x0Fu) << 4) | + (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + + if (saw_step == 0u) + { + saw_step = AD9102_SAW_STEP_DEFAULT; + } + if (saw_step > 63u) + { + saw_step = 63u; + } + if (pat_period == 0u) + { + pat_period = AD9102_PAT_PERIOD_DEFAULT; + } + uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | + ((uint16_t)(saw_type & 0x3u))); + + uint8_t ok = 1u; + + // Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset. + if (spiconfig != 0x0000u) + { + ok = 0u; + } + + // Power blocks should not be powered down. + if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) + { + ok = 0u; + } + + // Clock receiver must be enabled (cannot directly detect external clock presence). + if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) + { + ok = 0u; + } + + // Any configuration error flags indicate a bad setup. + if (cfg_err & 0x003Fu) + { + ok = 0u; + } + + if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) + { + ok = 0u; + } + + if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG) + { + ok = 0u; + } + if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) + { + ok = 0u; + } + if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period) + { + ok = 0u; + } + if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) + { + ok = 0u; + } + if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw) + { + ok = 0u; + } + + return (ok ? 0u : 1u); +} + void Set_LTEC(uint8_t num, uint16_t DATA) { uint32_t tmp32; +#if AD9102_ON_SPI2 + // AD9102 occupies SPI2; skip LD1/TEC1 writes to avoid CS conflicts. + if (num == 1 || num == 3) + { + return; + } +#endif + switch (num) { case 1: diff --git a/Src/stm32f7xx_it.c b/Src/stm32f7xx_it.c index 7460297..265c0bd 100644 --- a/Src/stm32f7xx_it.c +++ b/Src/stm32f7xx_it.c @@ -475,23 +475,48 @@ void UART_RxCpltCallback(void) flg_tmt = 0;//Reset the timeout flag CPU_state = STATE; break; - case 0x7777: - UART_rec_incr = 2;//timeout flag is still setting! - break; - default: //error decoding header - UART_rec_incr = 0; - flg_tmt = 0;//Reset the timeout flag + case 0x7777: + UART_rec_incr = 2;//timeout flag is still setting! + break; + case AD9102_CMD_HEADER: // AD9102 command + UART_rec_incr = 2;//timeout flag is still setting! + break; + default: //error decoding header + UART_rec_incr = 0; + flg_tmt = 0;//Reset the timeout flag //UART_transmission_request = MESS_01; //CPU_state = HALT; State_Data[0] |= UART_ERR; CPU_state = DEFAULT_ENABLE;//Parking system and send error state! break; } - break; - - case (CL_8 - 1): - if (UART_header == 0x1111) - { + break; + + case (AD9102_CMD_8 - 1): + if (UART_header == AD9102_CMD_HEADER) + { + if ((UART_rec_incr & 0x0001) > 0) + COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + else + COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + CPU_state = AD9102_CMD; + UART_rec_incr = 0; + flg_tmt = 0;//Reset the timeout flag + } + else + { + if ((UART_rec_incr&0x0001)>0) + COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + else + COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + UART_rec_incr++; + UART_transmission_request = NO_MESS; + } + break; + + case (CL_8 - 1): + if (UART_header == 0x1111) + { if ((UART_rec_incr & 0x0001) > 0) COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; else diff --git a/ad9102.pdf b/ad9102.pdf new file mode 100644 index 0000000..9d1952f Binary files /dev/null and b/ad9102.pdf differ diff --git a/build/File_Handling.lst b/build/File_Handling.lst index b614855..fcd1175 100644 --- a/build/File_Handling.lst +++ b/build/File_Handling.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cccCjqCZ.s page 1 +ARM GAS /tmp/cczIN1cV.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 28:Src/File_Handling.c **** 29:Src/File_Handling.c **** 30:Src/File_Handling.c **** void Send_Uart (char *string) - ARM GAS /tmp/cccCjqCZ.s page 2 + ARM GAS /tmp/cczIN1cV.s page 2 31:Src/File_Handling.c **** { @@ -118,7 +118,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 75 0012 0120 movs r0, #1 76 .L2: 41:Src/File_Handling.c **** else return 0; - ARM GAS /tmp/cccCjqCZ.s page 3 + ARM GAS /tmp/cczIN1cV.s page 3 42:Src/File_Handling.c **** } @@ -178,7 +178,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 48:Src/File_Handling.c **** return 1;//else Send_Uart("ERROR!!! in UNMOUNTING SD CARD\n\n\n"); 126 .loc 1 48 9 view .LVU21 127 0012 0120 movs r0, #1 - ARM GAS /tmp/cccCjqCZ.s page 4 + ARM GAS /tmp/cczIN1cV.s page 4 128 .L8: @@ -238,7 +238,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 171 .LCFI2: 172 .cfi_def_cfa_offset 16 173 .cfi_offset 4, -16 - ARM GAS /tmp/cccCjqCZ.s page 5 + ARM GAS /tmp/cczIN1cV.s page 5 174 .cfi_offset 5, -12 @@ -298,7 +298,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 69:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char)); 70:Src/File_Handling.c **** sprintf (buf, "Dir: %s\r\n", fno.fname); 71:Src/File_Handling.c **** Send_Uart(buf); - ARM GAS /tmp/cccCjqCZ.s page 6 + ARM GAS /tmp/cczIN1cV.s page 6 72:Src/File_Handling.c **** free(buf); @@ -358,7 +358,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 247 .loc 1 65 46 discriminator 1 view .LVU49 248 004c 1D4B ldr r3, .L21+12 249 004e 5B7A ldrb r3, [r3, #9] @ zero_extendqisi2 - ARM GAS /tmp/cccCjqCZ.s page 7 + ARM GAS /tmp/cczIN1cV.s page 7 65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */ @@ -418,7 +418,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 290 0082 FFF7FEFF bl strlen 291 .LVL24: 292 0086 0546 mov r5, r0 - ARM GAS /tmp/cccCjqCZ.s page 8 + ARM GAS /tmp/cczIN1cV.s page 8 293 .LVL25: @@ -478,7 +478,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 331 .loc 1 91 1 is_stmt 0 view .LVU76 332 00b0 014B ldr r3, .L21 333 00b2 1878 ldrb r0, [r3] @ zero_extendqisi2 - ARM GAS /tmp/cccCjqCZ.s page 9 + ARM GAS /tmp/cczIN1cV.s page 9 334 00b4 0CB0 add sp, sp, #48 @@ -538,7 +538,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 384 .LVL33: 385 000a 0446 mov r4, r0 386 .LVL34: - ARM GAS /tmp/cccCjqCZ.s page 10 + ARM GAS /tmp/cczIN1cV.s page 10 98:Src/File_Handling.c **** sprintf (path, "%s","/"); @@ -598,7 +598,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 420 002e 6846 mov r0, sp 421 0030 FFF7FEFF bl f_readdir 422 .LVL38: - ARM GAS /tmp/cccCjqCZ.s page 11 + ARM GAS /tmp/cczIN1cV.s page 11 105:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */ @@ -658,7 +658,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 461 .L26: 116:Src/File_Handling.c **** } 117:Src/File_Handling.c **** } - ARM GAS /tmp/cccCjqCZ.s page 12 + ARM GAS /tmp/cczIN1cV.s page 12 118:Src/File_Handling.c **** f_closedir(&dir); @@ -718,7 +718,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 507 .loc 1 128 1 is_stmt 0 view .LVU117 508 0000 70B5 push {r4, r5, r6, lr} 509 .LCFI8: - ARM GAS /tmp/cccCjqCZ.s page 13 + ARM GAS /tmp/cczIN1cV.s page 13 510 .cfi_def_cfa_offset 16 @@ -778,7 +778,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 153:Src/File_Handling.c **** 154:Src/File_Handling.c **** else 155:Src/File_Handling.c **** { - ARM GAS /tmp/cccCjqCZ.s page 14 + ARM GAS /tmp/cczIN1cV.s page 14 156:Src/File_Handling.c **** fresult = f_write(&fil, data, strlen(data), &bw); @@ -838,7 +838,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 150:Src/File_Handling.c **** return fresult; 559 .loc 1 150 10 view .LVU136 151:Src/File_Handling.c **** } - ARM GAS /tmp/cccCjqCZ.s page 15 + ARM GAS /tmp/cczIN1cV.s page 15 560 .loc 1 151 10 view .LVU137 @@ -898,7 +898,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 182:Src/File_Handling.c **** } 598 .loc 1 182 13 is_stmt 0 view .LVU154 599 004a C0B2 uxtb r0, r0 - ARM GAS /tmp/cccCjqCZ.s page 16 + ARM GAS /tmp/cczIN1cV.s page 16 600 004c E2E7 b .L34 @@ -958,7 +958,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 649 .loc 1 191 5 is_stmt 0 view .LVU162 650 0012 08B1 cbz r0, .L40 651 .LBB6: - ARM GAS /tmp/cccCjqCZ.s page 17 + ARM GAS /tmp/cczIN1cV.s page 17 192:Src/File_Handling.c **** { @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 237:Src/File_Handling.c **** //Send_Uart(buf); 238:Src/File_Handling.c **** free(buf); 239:Src/File_Handling.c **** } - ARM GAS /tmp/cccCjqCZ.s page 18 + ARM GAS /tmp/cczIN1cV.s page 18 240:Src/File_Handling.c **** } @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 215:Src/File_Handling.c **** if (fresult != FR_OK) 699 .loc 1 215 15 discriminator 1 view .LVU181 700 003c 2070 strb r0, [r4] - ARM GAS /tmp/cccCjqCZ.s page 19 + ARM GAS /tmp/cczIN1cV.s page 19 216:Src/File_Handling.c **** { @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 737 004c 4552524F .ascii "ERROR!!! No. %d in reading file *%s*\012\012\000" 737 52212121 737 204E6F2E - ARM GAS /tmp/cccCjqCZ.s page 20 + ARM GAS /tmp/cczIN1cV.s page 20 737 20256420 @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 777 000e B8B9 cbnz r0, .L54 778 .LBB8: 250:Src/File_Handling.c **** { - ARM GAS /tmp/cccCjqCZ.s page 21 + ARM GAS /tmp/cczIN1cV.s page 21 251:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 814 003a 2B4B ldr r3, .L55+4 815 003c 1878 ldrb r0, [r3] @ zero_extendqisi2 816 003e 0CE0 b .L48 - ARM GAS /tmp/cccCjqCZ.s page 22 + ARM GAS /tmp/cczIN1cV.s page 22 817 .LVL70: @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 285:Src/File_Handling.c **** 286:Src/File_Handling.c **** else 287:Src/File_Handling.c **** { - ARM GAS /tmp/cccCjqCZ.s page 23 + ARM GAS /tmp/cczIN1cV.s page 23 288:Src/File_Handling.c **** Send_Uart(buffer); @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 277:Src/File_Handling.c **** { 873 .loc 1 277 3 is_stmt 1 view .LVU228 277:Src/File_Handling.c **** { - ARM GAS /tmp/cccCjqCZ.s page 24 + ARM GAS /tmp/cczIN1cV.s page 24 874 .loc 1 277 6 is_stmt 0 view .LVU229 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 916 00a0 FFF7FEFF bl free 917 .LVL88: 292:Src/File_Handling.c **** if (fresult != FR_OK) - ARM GAS /tmp/cccCjqCZ.s page 25 + ARM GAS /tmp/cczIN1cV.s page 25 918 .loc 1 292 4 view .LVU242 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 961 .LVL97: 303:Src/File_Handling.c **** Send_Uart(buf); 962 .loc 1 303 5 is_stmt 1 view .LVU254 - ARM GAS /tmp/cccCjqCZ.s page 26 + ARM GAS /tmp/cczIN1cV.s page 26 963 00d4 2246 mov r2, r4 @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1010 .LCFI11: 1011 .cfi_def_cfa_offset 24 1012 .cfi_offset 4, -24 - ARM GAS /tmp/cccCjqCZ.s page 27 + ARM GAS /tmp/cczIN1cV.s page 27 1013 .cfi_offset 5, -20 @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 332:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); 333:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name); 334:Src/File_Handling.c **** //Send_Uart(buf); - ARM GAS /tmp/cccCjqCZ.s page 28 + ARM GAS /tmp/cczIN1cV.s page 28 335:Src/File_Handling.c **** free(buf); @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1086 .LBE15: 1087 .LBB16: 318:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name); - ARM GAS /tmp/cccCjqCZ.s page 29 + ARM GAS /tmp/cczIN1cV.s page 29 1088 .loc 1 318 3 is_stmt 1 view .LVU282 @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 376:Src/File_Handling.c **** 377:Src/File_Handling.c **** /* Close file */ 378:Src/File_Handling.c **** fresult = f_close(&fil); - ARM GAS /tmp/cccCjqCZ.s page 30 + ARM GAS /tmp/cczIN1cV.s page 30 379:Src/File_Handling.c **** if (fresult != FR_OK) @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1141 .loc 1 336 14 view .LVU296 1142 .LBE17: 353:Src/File_Handling.c **** if (fresult != FR_OK) - ARM GAS /tmp/cccCjqCZ.s page 31 + ARM GAS /tmp/cczIN1cV.s page 31 1143 .loc 1 353 3 is_stmt 1 view .LVU297 @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1180 00b6 BA70 strb r2, [r7, #2] 374:Src/File_Handling.c **** } 1181 .loc 1 374 5 is_stmt 1 view .LVU315 - ARM GAS /tmp/cccCjqCZ.s page 32 + ARM GAS /tmp/cczIN1cV.s page 32 374:Src/File_Handling.c **** } @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1222 .loc 1 394 13 is_stmt 0 view .LVU329 1223 00e2 0F4B ldr r3, .L70+4 1224 00e4 1878 ldrb r0, [r3] @ zero_extendqisi2 - ARM GAS /tmp/cccCjqCZ.s page 33 + ARM GAS /tmp/cczIN1cV.s page 33 1225 00e6 C2E7 b .L59 @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1271 011c 00000000 .word fno 1272 0120 00000000 .word fresult 1273 0124 00000000 .word fil - ARM GAS /tmp/cccCjqCZ.s page 34 + ARM GAS /tmp/cczIN1cV.s page 34 1274 0128 00000000 .word .LC10 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1320 .loc 1 406 3 view .LVU346 407:Src/File_Handling.c **** return fresult; 1321 .loc 1 407 6 view .LVU347 - ARM GAS /tmp/cccCjqCZ.s page 35 + ARM GAS /tmp/cczIN1cV.s page 35 1322 .loc 1 407 13 is_stmt 0 view .LVU348 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1336 .LVL141: 411:Src/File_Handling.c **** if (fresult != FR_OK) 1337 .loc 1 411 11 discriminator 1 view .LVU352 - ARM GAS /tmp/cccCjqCZ.s page 36 + ARM GAS /tmp/cczIN1cV.s page 36 1338 001e 074B ldr r3, .L77+4 @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1376 .LFE1195: 1378 .section .text.Update_File,"ax",%progbits 1379 .align 1 - ARM GAS /tmp/cccCjqCZ.s page 37 + ARM GAS /tmp/cczIN1cV.s page 37 1380 .global Update_File @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1423 .loc 1 457 13 view .LVU381 1424 .LBE23: 458:Src/File_Handling.c **** } - ARM GAS /tmp/cccCjqCZ.s page 38 + ARM GAS /tmp/cczIN1cV.s page 38 459:Src/File_Handling.c **** @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1428 .L80: 463:Src/File_Handling.c **** if (fresult != FR_OK) 1429 .loc 1 463 6 is_stmt 1 view .LVU383 - ARM GAS /tmp/cccCjqCZ.s page 39 + ARM GAS /tmp/cczIN1cV.s page 39 463:Src/File_Handling.c **** if (fresult != FR_OK) @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 485:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name); 1470 .loc 1 485 7 view .LVU398 488:Src/File_Handling.c **** } - ARM GAS /tmp/cccCjqCZ.s page 40 + ARM GAS /tmp/cczIN1cV.s page 40 1471 .loc 1 488 7 view .LVU399 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1506 .section .text.Remove_File,"ax",%progbits 1507 .align 1 1508 .global Remove_File - ARM GAS /tmp/cccCjqCZ.s page 41 + ARM GAS /tmp/cczIN1cV.s page 41 1509 .syntax unified @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1547 0018 164B ldr r3, .L93+4 1548 001a 1870 strb r0, [r3] 527:Src/File_Handling.c **** if (fresult == FR_OK) - ARM GAS /tmp/cccCjqCZ.s page 42 + ARM GAS /tmp/cczIN1cV.s page 42 1549 .loc 1 527 3 is_stmt 1 view .LVU418 @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1584 .loc 1 517 15 is_stmt 0 view .LVU430 1585 003a 6420 movs r0, #100 1586 003c FFF7FEFF bl malloc - ARM GAS /tmp/cccCjqCZ.s page 43 + ARM GAS /tmp/cczIN1cV.s page 43 1587 .LVL161: @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1630 .align 2 1631 .L93: 1632 0070 00000000 .word fno - ARM GAS /tmp/cccCjqCZ.s page 44 + ARM GAS /tmp/cczIN1cV.s page 44 1633 0074 00000000 .word fresult @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1677 000a 1870 strb r0, [r3] 549:Src/File_Handling.c **** if (fresult == FR_OK) 1678 .loc 1 549 5 is_stmt 1 view .LVU447 - ARM GAS /tmp/cccCjqCZ.s page 45 + ARM GAS /tmp/cczIN1cV.s page 45 1679 .loc 1 549 8 is_stmt 0 view .LVU448 @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1716 .LVL177: 1717 0032 0646 mov r6, r0 1718 .LVL178: - ARM GAS /tmp/cccCjqCZ.s page 46 + ARM GAS /tmp/cczIN1cV.s page 46 559:Src/File_Handling.c **** Send_Uart(buf); @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1761 .cfi_startproc 1762 @ args = 0, pretend = 0, frame = 0 1763 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/cccCjqCZ.s page 47 + ARM GAS /tmp/cczIN1cV.s page 47 1764 0000 F8B5 push {r3, r4, r5, r6, r7, lr} @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1813 .LVL183: 573:Src/File_Handling.c **** sprintf (buf, "SD CARD Total Size: \t%lu\n",total); 1814 .loc 1 573 5 is_stmt 1 view .LVU475 - ARM GAS /tmp/cccCjqCZ.s page 48 + ARM GAS /tmp/cczIN1cV.s page 48 1815 0046 2246 mov r2, r4 @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1861 .cfi_restore 80 1862 .cfi_restore 81 1863 .cfi_def_cfa_offset 24 - ARM GAS /tmp/cccCjqCZ.s page 49 + ARM GAS /tmp/cczIN1cV.s page 49 1864 0092 F8BD pop {r3, r4, r5, r6, r7, pc} @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1915 000e 104B ldr r3, .L110+4 1916 0010 1870 strb r0, [r3] 587:Src/File_Handling.c **** if (fresult != FR_OK) - ARM GAS /tmp/cccCjqCZ.s page 50 + ARM GAS /tmp/cczIN1cV.s page 50 1917 .loc 1 587 2 is_stmt 1 view .LVU497 @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 629:Src/File_Handling.c **** if (fresult != FR_OK) 630:Src/File_Handling.c **** { 631:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); - ARM GAS /tmp/cccCjqCZ.s page 51 + ARM GAS /tmp/cczIN1cV.s page 51 632:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name); @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 1959 002e 0A4B ldr r3, .L110+12 1960 0030 3246 mov r2, r6 1961 0032 2946 mov r1, r5 - ARM GAS /tmp/cccCjqCZ.s page 52 + ARM GAS /tmp/cczIN1cV.s page 52 1962 0034 3846 mov r0, r7 @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 2005 .LVL200: 2006 .LFB1201: 646:Src/File_Handling.c **** - ARM GAS /tmp/cccCjqCZ.s page 53 + ARM GAS /tmp/cczIN1cV.s page 53 647:Src/File_Handling.c **** FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize) @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 661:Src/File_Handling.c **** { 662:Src/File_Handling.c **** /* Create a file with read write access and open it */ 663:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE); - ARM GAS /tmp/cccCjqCZ.s page 54 + ARM GAS /tmp/cczIN1cV.s page 54 664:Src/File_Handling.c **** if (fresult != FR_OK) @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 2053 0018 3222 movs r2, #50 2054 001a 2146 mov r1, r4 2055 001c 0D48 ldr r0, .L117+8 - ARM GAS /tmp/cccCjqCZ.s page 55 + ARM GAS /tmp/cczIN1cV.s page 55 2056 001e FFF7FEFF bl f_open @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 2094 .LVL208: 692:Src/File_Handling.c **** if (fresult != FR_OK) 2095 .loc 1 692 14 discriminator 1 view .LVU561 - ARM GAS /tmp/cccCjqCZ.s page 56 + ARM GAS /tmp/cczIN1cV.s page 56 2096 0044 2070 strb r0, [r4] @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cccCjqCZ.s page 1 2158 .align 2 2161 fno: 2162 0000 00000000 .space 24 - ARM GAS /tmp/cccCjqCZ.s page 57 + ARM GAS /tmp/cczIN1cV.s page 57 2162 00000000 @@ -3396,86 +3396,86 @@ ARM GAS /tmp/cccCjqCZ.s page 1 2187 .file 10 "/usr/include/newlib/stdio.h" 2188 .file 11 "/usr/include/newlib/stdlib.h" 2189 .file 12 "" - ARM GAS /tmp/cccCjqCZ.s page 58 + ARM GAS /tmp/cczIN1cV.s page 58 DEFINED SYMBOLS *ABS*:00000000 File_Handling.c - /tmp/cccCjqCZ.s:20 .text.Send_Uart:00000000 $t - /tmp/cccCjqCZ.s:26 .text.Send_Uart:00000000 Send_Uart - /tmp/cccCjqCZ.s:40 .text.Mount_SD:00000000 $t - /tmp/cccCjqCZ.s:46 .text.Mount_SD:00000000 Mount_SD - /tmp/cccCjqCZ.s:86 .text.Mount_SD:0000001c $d - /tmp/cccCjqCZ.s:2175 .bss.fs:00000000 fs - /tmp/cccCjqCZ.s:92 .text.Unmount_SD:00000000 $t - /tmp/cccCjqCZ.s:98 .text.Unmount_SD:00000000 Unmount_SD - /tmp/cccCjqCZ.s:138 .text.Unmount_SD:0000001c $d - /tmp/cccCjqCZ.s:143 .rodata.Scan_SD.str1.4:00000000 $d - /tmp/cccCjqCZ.s:156 .text.Scan_SD:00000000 $t - /tmp/cccCjqCZ.s:162 .text.Scan_SD:00000000 Scan_SD - /tmp/cccCjqCZ.s:344 .text.Scan_SD:000000b8 $d - /tmp/cccCjqCZ.s:2161 .bss.fno:00000000 fno - /tmp/cccCjqCZ.s:355 .rodata.Format_SD.str1.4:00000000 $d - /tmp/cccCjqCZ.s:359 .text.Format_SD:00000000 $t - /tmp/cccCjqCZ.s:365 .text.Format_SD:00000000 Format_SD - /tmp/cccCjqCZ.s:485 .text.Format_SD:00000078 $d - /tmp/cccCjqCZ.s:494 .text.Write_File:00000000 $t - /tmp/cccCjqCZ.s:500 .text.Write_File:00000000 Write_File - /tmp/cccCjqCZ.s:604 .text.Write_File:00000050 $d - /tmp/cccCjqCZ.s:2168 .bss.fil:00000000 fil - /tmp/cccCjqCZ.s:2147 .bss.bw:00000000 bw - /tmp/cccCjqCZ.s:612 .text.Write_File_byte:00000000 $t - /tmp/cccCjqCZ.s:618 .text.Write_File_byte:00000000 Write_File_byte - /tmp/cccCjqCZ.s:721 .text.Write_File_byte:0000004c $d - /tmp/cccCjqCZ.s:729 .rodata.Read_File.str1.4:00000000 $d - /tmp/cccCjqCZ.s:745 .text.Read_File:00000000 $t - /tmp/cccCjqCZ.s:751 .text.Read_File:00000000 Read_File - /tmp/cccCjqCZ.s:976 .text.Read_File:000000e4 $d - /tmp/cccCjqCZ.s:2154 .bss.br:00000000 br - /tmp/cccCjqCZ.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d - /tmp/cccCjqCZ.s:995 .text.Seek_Read_File:00000000 $t - /tmp/cccCjqCZ.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File - /tmp/cccCjqCZ.s:1271 .text.Seek_Read_File:0000011c $d - /tmp/cccCjqCZ.s:1287 .text.Create_File:00000000 $t - /tmp/cccCjqCZ.s:1293 .text.Create_File:00000000 Create_File - /tmp/cccCjqCZ.s:1372 .text.Create_File:00000038 $d - /tmp/cccCjqCZ.s:1379 .text.Update_File:00000000 $t - /tmp/cccCjqCZ.s:1385 .text.Update_File:00000000 Update_File - /tmp/cccCjqCZ.s:1489 .text.Update_File:00000050 $d - /tmp/cccCjqCZ.s:1497 .rodata.Remove_File.str1.4:00000000 $d - /tmp/cccCjqCZ.s:1507 .text.Remove_File:00000000 $t - /tmp/cccCjqCZ.s:1513 .text.Remove_File:00000000 Remove_File - /tmp/cccCjqCZ.s:1632 .text.Remove_File:00000070 $d - /tmp/cccCjqCZ.s:1642 .rodata.Create_Dir.str1.4:00000000 $d - /tmp/cccCjqCZ.s:1649 .text.Create_Dir:00000000 $t - /tmp/cccCjqCZ.s:1655 .text.Create_Dir:00000000 Create_Dir - /tmp/cccCjqCZ.s:1734 .text.Create_Dir:00000048 $d - /tmp/cccCjqCZ.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d - /tmp/cccCjqCZ.s:1752 .text.Check_SD_Space:00000000 $t - /tmp/cccCjqCZ.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space - /tmp/cccCjqCZ.s:1870 .text.Check_SD_Space:00000094 $d - /tmp/cccCjqCZ.s:2140 .bss.pfs:00000000 pfs - /tmp/cccCjqCZ.s:2133 .bss.fre_clust:00000000 fre_clust - ARM GAS /tmp/cccCjqCZ.s page 59 + /tmp/cczIN1cV.s:20 .text.Send_Uart:00000000 $t + /tmp/cczIN1cV.s:26 .text.Send_Uart:00000000 Send_Uart + /tmp/cczIN1cV.s:40 .text.Mount_SD:00000000 $t + /tmp/cczIN1cV.s:46 .text.Mount_SD:00000000 Mount_SD + /tmp/cczIN1cV.s:86 .text.Mount_SD:0000001c $d + /tmp/cczIN1cV.s:2175 .bss.fs:00000000 fs + /tmp/cczIN1cV.s:92 .text.Unmount_SD:00000000 $t + /tmp/cczIN1cV.s:98 .text.Unmount_SD:00000000 Unmount_SD + /tmp/cczIN1cV.s:138 .text.Unmount_SD:0000001c $d + /tmp/cczIN1cV.s:143 .rodata.Scan_SD.str1.4:00000000 $d + /tmp/cczIN1cV.s:156 .text.Scan_SD:00000000 $t + /tmp/cczIN1cV.s:162 .text.Scan_SD:00000000 Scan_SD + /tmp/cczIN1cV.s:344 .text.Scan_SD:000000b8 $d + /tmp/cczIN1cV.s:2161 .bss.fno:00000000 fno + /tmp/cczIN1cV.s:355 .rodata.Format_SD.str1.4:00000000 $d + /tmp/cczIN1cV.s:359 .text.Format_SD:00000000 $t + /tmp/cczIN1cV.s:365 .text.Format_SD:00000000 Format_SD + /tmp/cczIN1cV.s:485 .text.Format_SD:00000078 $d + /tmp/cczIN1cV.s:494 .text.Write_File:00000000 $t + /tmp/cczIN1cV.s:500 .text.Write_File:00000000 Write_File + /tmp/cczIN1cV.s:604 .text.Write_File:00000050 $d + /tmp/cczIN1cV.s:2168 .bss.fil:00000000 fil + /tmp/cczIN1cV.s:2147 .bss.bw:00000000 bw + /tmp/cczIN1cV.s:612 .text.Write_File_byte:00000000 $t + /tmp/cczIN1cV.s:618 .text.Write_File_byte:00000000 Write_File_byte + /tmp/cczIN1cV.s:721 .text.Write_File_byte:0000004c $d + /tmp/cczIN1cV.s:729 .rodata.Read_File.str1.4:00000000 $d + /tmp/cczIN1cV.s:745 .text.Read_File:00000000 $t + /tmp/cczIN1cV.s:751 .text.Read_File:00000000 Read_File + /tmp/cczIN1cV.s:976 .text.Read_File:000000e4 $d + /tmp/cczIN1cV.s:2154 .bss.br:00000000 br + /tmp/cczIN1cV.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d + /tmp/cczIN1cV.s:995 .text.Seek_Read_File:00000000 $t + /tmp/cczIN1cV.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File + /tmp/cczIN1cV.s:1271 .text.Seek_Read_File:0000011c $d + /tmp/cczIN1cV.s:1287 .text.Create_File:00000000 $t + /tmp/cczIN1cV.s:1293 .text.Create_File:00000000 Create_File + /tmp/cczIN1cV.s:1372 .text.Create_File:00000038 $d + /tmp/cczIN1cV.s:1379 .text.Update_File:00000000 $t + /tmp/cczIN1cV.s:1385 .text.Update_File:00000000 Update_File + /tmp/cczIN1cV.s:1489 .text.Update_File:00000050 $d + /tmp/cczIN1cV.s:1497 .rodata.Remove_File.str1.4:00000000 $d + /tmp/cczIN1cV.s:1507 .text.Remove_File:00000000 $t + /tmp/cczIN1cV.s:1513 .text.Remove_File:00000000 Remove_File + /tmp/cczIN1cV.s:1632 .text.Remove_File:00000070 $d + /tmp/cczIN1cV.s:1642 .rodata.Create_Dir.str1.4:00000000 $d + /tmp/cczIN1cV.s:1649 .text.Create_Dir:00000000 $t + /tmp/cczIN1cV.s:1655 .text.Create_Dir:00000000 Create_Dir + /tmp/cczIN1cV.s:1734 .text.Create_Dir:00000048 $d + /tmp/cczIN1cV.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d + /tmp/cczIN1cV.s:1752 .text.Check_SD_Space:00000000 $t + /tmp/cczIN1cV.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space + /tmp/cczIN1cV.s:1870 .text.Check_SD_Space:00000094 $d + /tmp/cczIN1cV.s:2140 .bss.pfs:00000000 pfs + /tmp/cczIN1cV.s:2133 .bss.fre_clust:00000000 fre_clust + ARM GAS /tmp/cczIN1cV.s page 59 - /tmp/cccCjqCZ.s:2126 .bss.total:00000000 total - /tmp/cccCjqCZ.s:2119 .bss.free_space:00000000 free_space - /tmp/cccCjqCZ.s:1881 .text.Update_File_float:00000000 $t - /tmp/cccCjqCZ.s:1887 .text.Update_File_float:00000000 Update_File_float - /tmp/cccCjqCZ.s:1990 .text.Update_File_float:0000004c $d - /tmp/cccCjqCZ.s:1998 .text.Update_File_byte:00000000 $t - /tmp/cccCjqCZ.s:2004 .text.Update_File_byte:00000000 Update_File_byte - /tmp/cccCjqCZ.s:2107 .text.Update_File_byte:0000004c $d - /tmp/cccCjqCZ.s:2116 .bss.free_space:00000000 $d - /tmp/cccCjqCZ.s:2123 .bss.total:00000000 $d - /tmp/cccCjqCZ.s:2130 .bss.fre_clust:00000000 $d - /tmp/cccCjqCZ.s:2137 .bss.pfs:00000000 $d - /tmp/cccCjqCZ.s:2144 .bss.bw:00000000 $d - /tmp/cccCjqCZ.s:2151 .bss.br:00000000 $d - /tmp/cccCjqCZ.s:2158 .bss.fno:00000000 $d - /tmp/cccCjqCZ.s:2165 .bss.fil:00000000 $d - /tmp/cccCjqCZ.s:2172 .bss.fs:00000000 $d + /tmp/cczIN1cV.s:2126 .bss.total:00000000 total + /tmp/cczIN1cV.s:2119 .bss.free_space:00000000 free_space + /tmp/cczIN1cV.s:1881 .text.Update_File_float:00000000 $t + /tmp/cczIN1cV.s:1887 .text.Update_File_float:00000000 Update_File_float + /tmp/cczIN1cV.s:1990 .text.Update_File_float:0000004c $d + /tmp/cczIN1cV.s:1998 .text.Update_File_byte:00000000 $t + /tmp/cczIN1cV.s:2004 .text.Update_File_byte:00000000 Update_File_byte + /tmp/cczIN1cV.s:2107 .text.Update_File_byte:0000004c $d + /tmp/cczIN1cV.s:2116 .bss.free_space:00000000 $d + /tmp/cczIN1cV.s:2123 .bss.total:00000000 $d + /tmp/cczIN1cV.s:2130 .bss.fre_clust:00000000 $d + /tmp/cczIN1cV.s:2137 .bss.pfs:00000000 $d + /tmp/cczIN1cV.s:2144 .bss.bw:00000000 $d + /tmp/cczIN1cV.s:2151 .bss.br:00000000 $d + /tmp/cczIN1cV.s:2158 .bss.fno:00000000 $d + /tmp/cczIN1cV.s:2165 .bss.fil:00000000 $d + /tmp/cczIN1cV.s:2172 .bss.fs:00000000 $d UNDEFINED SYMBOLS f_mount diff --git a/build/File_Handling.o b/build/File_Handling.o index b19da18..3541d66 100644 Binary files a/build/File_Handling.o and b/build/File_Handling.o differ diff --git a/build/For_stm32.bin b/build/For_stm32.bin index e8dab8e..4415e18 100755 Binary files a/build/For_stm32.bin and b/build/For_stm32.bin differ diff --git a/build/For_stm32.elf b/build/For_stm32.elf index 98d492f..094531a 100755 Binary files a/build/For_stm32.elf and b/build/For_stm32.elf differ diff --git a/build/For_stm32.hex b/build/For_stm32.hex index 7e868e2..c79a80f 100644 --- a/build/For_stm32.hex +++ b/build/For_stm32.hex @@ -1,45 +1,45 @@ :020000040800F2 -:100000000000082049AA0008413D0008433D0008BF -:10001000453D0008473D0008493D0008000000003C -:100020000000000000000000000000004B3D000840 -:100030004D3D0008000000004F3D0008513D000804 -:1000400099AA000899AA000899AA000899AA000884 -:1000500099AA000899AA000899AA000899AA000874 -:1000600099AA000899AA000899AA000899AA000864 -:1000700099AA000899AA000899AA000899AA000854 -:1000800099AA000899AA0008593D000899AA0008F1 -:1000900099AA000899AA000899AA000899AA000834 -:1000A00099AA0008713D0008A53D000899AA00081A -:1000B000D93D000899AA000899AA000899AA000841 -:1000C00099AA000899AA000899AA000899AA000804 -:1000D00099AA00081541000899AA000899AA0008E1 -:1000E00099AA000899AA000899AA000899AA0008E4 -:1000F000DD3D000899AA000899AA000899AA0008FD -:1001000099AA000899AA00082D3E000899AA00089B -:1001100099AA000899AA0008313E0008653E000827 -:1001200099AA000899AA000899AA000899AA0008A3 -:1001300099AA000899AA000899AA000899AA000893 -:1001400099AA000899AA000899AA000899AA000883 -:1001500099AA000899AA0008F541000899AA000880 -:1001600099AA000899AA000899AA000899AA000863 -:1001700099AA000899AA000899AA0008000000009E -:1001800099AA000899AA000899AA000899AA000843 -:1001900099AA000899AA000899AA000899AA000833 -:1001A00099AA000899AA000899AA000899AA000823 -:1001B00099AA000899AA000899AA000899AA000813 -:1001C00099AA000899AA00080000000099AA00084E -:1001D00099AA000899AA000899AA000899AA0008F3 -:1001E00099AA000899AA000899AA000899AA0008E3 -:0801F00099AA000899AA000871 +:100000000000082041AF0008A1410008A3410008FA +:10001000A5410008A7410008A94100080000000010 +:10002000000000000000000000000000AB410008DC +:10003000AD41000800000000AF410008B1410008D8 +:1000400091AF000891AF000891AF000891AF000890 +:1000500091AF000891AF000891AF000891AF000880 +:1000600091AF000891AF000891AF000891AF000870 +:1000700091AF000891AF000891AF000891AF000860 +:1000800091AF000891AF0008B941000891AF000896 +:1000900091AF000891AF000891AF000891AF000840 +:1000A00091AF0008D14100080542000891AF000857 +:1000B0003942000891AF000891AF000891AF0008E5 +:1000C00091AF000891AF000891AF000891AF000810 +:1000D00091AF00080D46000891AF000891AF0008ED +:1000E00091AF000891AF000891AF000891AF0008F0 +:1000F0003D42000891AF000891AF000891AF0008A1 +:1001000091AF000891AF00088D42000891AF000840 +:1001100091AF000891AF000891420008C542000865 +:1001200091AF000891AF000891AF000891AF0008AF +:1001300091AF000891AF000891AF000891AF00089F +:1001400091AF000891AF000891AF000891AF00088F +:1001500091AF000891AF0008ED46000891AF00088C +:1001600091AF000891AF000891AF000891AF00086F +:1001700091AF000891AF000891AF000800000000A7 +:1001800091AF000891AF000891AF000891AF00084F +:1001900091AF000891AF000891AF000891AF00083F +:1001A00091AF000891AF000891AF000891AF00082F +:1001B00091AF000891AF000891AF000891AF00081F +:1001C00091AF000891AF00080000000091AF000857 +:1001D00091AF000891AF000891AF000891AF0008FF +:1001E00091AF000891AF000891AF000891AF0008EF +:0801F00091AF000891AF000877 :100200000348044B834202D0034B03B118477047A5 :100210005C0000205C000020000000000548064B48 :100220001B1AD90F01EBA301491002D0034B03B1F4 :10023000184770475C0000205C00002000000000B0 :1002400010B5064C237843B9FFF7DAFF044B13B11E :100250000448AFF300800123237010BD5C00002030 -:10026000000000009CAA000808B5044B1BB104491B +:100260000000000094AF000808B5044B1BB104491E :100270000448AFF30080BDE80840CFE7000000006D -:10028000600000209CAA00080CB410B59CB01EAB06 +:100280006000002094AF00080CB410B59CB01EAB09 :10029000029106916FF0004104910791084953F8CB :1002A000042B0591002402A901931B9400F010F97E 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0x242 build/syscall.o + .debug_str 0x00000000 0x21a build/syscall.o .comment 0x00000000 0x27 build/syscall.o .ARM.attributes 0x00000000 0x32 build/syscall.o @@ -2080,7 +2080,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x08000000 g_pfnVectors 0x080001f8 . = ALIGN (0x4) -.text 0x08000200 0xa8b4 +.text 0x08000200 0xadac 0x08000200 . = ALIGN (0x4) *(.text) .text 0x08000200 0x88 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o @@ -2145,937 +2145,953 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x080014e8 0x168 build/main.o .text.PID_Controller_Temp 0x08001650 0xe4 build/main.o + .text.AD9102_WriteReg + 0x08001734 0xb0 build/main.o + .text.AD9102_WriteRegTable + 0x080017e4 0x28 build/main.o + .text.AD9102_Init + 0x0800180c 0x74 build/main.o + .text.AD9102_ReadReg + 0x08001880 0xb0 build/main.o + .text.AD9102_CheckFlags + 0x08001930 0xd8 build/main.o + .text.AD9102_Apply + 0x08001a08 0xb8 build/main.o .text.OUT_trigger - 0x08001734 0x124 build/main.o - .text.MPhD_T 0x08001858 0x220 build/main.o + 0x08001ac0 0x124 build/main.o + .text.MPhD_T 0x08001be4 0x220 build/main.o .text.Stop_TIM10 - 0x08001a78 0x20 build/main.o + 0x08001e04 0x20 build/main.o .text.MX_GPIO_Init - 0x08001a98 0x248 build/main.o + 0x08001e24 0x25c build/main.o .text.MX_SPI4_Init - 0x08001ce0 0xd4 build/main.o + 0x08002080 0xd4 build/main.o .text.MX_SPI2_Init - 0x08001db4 0xd0 build/main.o + 0x08002154 0xe8 build/main.o .text.MX_SPI5_Init - 0x08001e84 0xd0 build/main.o + 0x0800223c 0xd0 build/main.o .text.MX_SPI6_Init - 0x08001f54 0xd0 build/main.o + 0x0800230c 0xd0 build/main.o .text.MX_TIM2_Init - 0x08002024 0x9c build/main.o + 0x080023dc 0x9c build/main.o .text.MX_TIM5_Init - 0x080020c0 0x98 build/main.o + 0x08002478 0x98 build/main.o .text.MX_TIM7_Init - 0x08002158 0x8c build/main.o + 0x08002510 0x8c build/main.o .text.MX_TIM6_Init - 0x080021e4 0x8c build/main.o + 0x0800259c 0x8c build/main.o .text.Init_params - 0x08002270 0x30c build/main.o - .text.Get_ADC 0x0800257c 0x70 build/main.o + 0x08002628 0x310 build/main.o + .text.Get_ADC 0x08002938 0x70 build/main.o .text.Set_LTEC - 0x080025ec 0x158 build/main.o - 0x080025ec Set_LTEC + 0x080029a8 0x164 build/main.o + 0x080029a8 Set_LTEC .text.Decode_uart - 0x08002744 0x2f8 build/main.o + 0x08002b0c 0x2f8 build/main.o .text.CalculateChecksum - 0x08002a3c 0x18 build/main.o - 0x08002a3c CalculateChecksum + 0x08002e04 0x18 build/main.o + 0x08002e04 CalculateChecksum .text.CheckChecksum - 0x08002a54 0x48 build/main.o - 0x08002a54 CheckChecksum - .text.SD_SAVE 0x08002a9c 0x3c build/main.o - 0x08002a9c SD_SAVE - .text.SD_READ 0x08002ad8 0x4c build/main.o - 0x08002ad8 SD_READ + 0x08002e1c 0x48 build/main.o + 0x08002e1c CheckChecksum + .text.SD_SAVE 0x08002e64 0x3c build/main.o + 0x08002e64 SD_SAVE + .text.SD_READ 0x08002ea0 0x4c build/main.o + 0x08002ea0 SD_READ .text.SD_REMOVE - 0x08002b24 0x40 build/main.o - 0x08002b24 SD_REMOVE + 0x08002eec 0x40 build/main.o + 0x08002eec SD_REMOVE .text.USART_TX - 0x08002b64 0x2c build/main.o - 0x08002b64 USART_TX + 0x08002f2c 0x2c build/main.o + 0x08002f2c USART_TX .text.USART_TX_DMA - 0x08002b90 0x40 build/main.o - 0x08002b90 USART_TX_DMA + 0x08002f58 0x40 build/main.o + 0x08002f58 USART_TX_DMA .text.Error_Handler - 0x08002bd0 0x4 build/main.o - 0x08002bd0 Error_Handler + 0x08002f98 0x4 build/main.o + 0x08002f98 Error_Handler .text.MX_ADC1_Init - 0x08002bd4 0xc8 build/main.o + 0x08002f9c 0xc8 build/main.o .text.MX_ADC3_Init - 0x08002c9c 0x6c build/main.o + 0x08003064 0x6c build/main.o .text.MX_USART1_UART_Init - 0x08002d08 0x190 build/main.o + 0x080030d0 0x190 build/main.o .text.MX_TIM10_Init - 0x08002e98 0x2c build/main.o + 0x08003260 0x2c build/main.o .text.MX_UART8_Init - 0x08002ec4 0x38 build/main.o + 0x0800328c 0x38 build/main.o .text.MX_TIM8_Init - 0x08002efc 0x6c build/main.o + 0x080032c4 0x6c build/main.o .text.MX_TIM11_Init - 0x08002f68 0x70 build/main.o + 0x08003330 0x70 build/main.o .text.MX_TIM4_Init - 0x08002fd8 0xa4 build/main.o + 0x080033a0 0xa4 build/main.o .text.SystemClock_Config - 0x0800307c 0xb4 build/main.o - 0x0800307c SystemClock_Config - .text.main 0x08003130 0xa2c build/main.o - 0x08003130 main + 0x08003444 0xb4 build/main.o + 0x08003444 SystemClock_Config + .text.main 0x080034f8 0xac4 build/main.o + 0x080034f8 main .text.BSP_SD_ReadBlocks - 0x08003b5c 0x20 build/bsp_driver_sd.o - 0x08003b5c BSP_SD_ReadBlocks + 0x08003fbc 0x20 build/bsp_driver_sd.o + 0x08003fbc BSP_SD_ReadBlocks .text.BSP_SD_WriteBlocks - 0x08003b7c 0x20 build/bsp_driver_sd.o - 0x08003b7c BSP_SD_WriteBlocks + 0x08003fdc 0x20 build/bsp_driver_sd.o + 0x08003fdc BSP_SD_WriteBlocks .text.BSP_SD_GetCardState - 0x08003b9c 0x14 build/bsp_driver_sd.o - 0x08003b9c BSP_SD_GetCardState + 0x08003ffc 0x14 build/bsp_driver_sd.o + 0x08003ffc BSP_SD_GetCardState .text.BSP_SD_GetCardInfo - 0x08003bb0 0x10 build/bsp_driver_sd.o - 0x08003bb0 BSP_SD_GetCardInfo + 0x08004010 0x10 build/bsp_driver_sd.o + 0x08004010 BSP_SD_GetCardInfo .text.BSP_SD_IsDetected - 0x08003bc0 0x20 build/bsp_driver_sd.o - 0x08003bc0 BSP_SD_IsDetected + 0x08004020 0x20 build/bsp_driver_sd.o + 0x08004020 BSP_SD_IsDetected .text.BSP_SD_Init - 0x08003be0 0x34 build/bsp_driver_sd.o - 0x08003be0 BSP_SD_Init + 0x08004040 0x34 build/bsp_driver_sd.o + 0x08004040 BSP_SD_Init .text.SD_CheckStatus - 0x08003c14 0x24 build/sd_diskio.o + 0x08004074 0x24 build/sd_diskio.o .text.SD_initialize - 0x08003c38 0x28 build/sd_diskio.o - 0x08003c38 SD_initialize + 0x08004098 0x28 build/sd_diskio.o + 0x08004098 SD_initialize .text.SD_status - 0x08003c60 0x8 build/sd_diskio.o - 0x08003c60 SD_status - .text.SD_read 0x08003c68 0x24 build/sd_diskio.o - 0x08003c68 SD_read + 0x080040c0 0x8 build/sd_diskio.o + 0x080040c0 SD_status + .text.SD_read 0x080040c8 0x24 build/sd_diskio.o + 0x080040c8 SD_read .text.SD_write - 0x08003c8c 0x24 build/sd_diskio.o - 0x08003c8c SD_write + 0x080040ec 0x24 build/sd_diskio.o + 0x080040ec SD_write .text.SD_ioctl - 0x08003cb0 0x58 build/sd_diskio.o - 0x08003cb0 SD_ioctl + 0x08004110 0x58 build/sd_diskio.o + 0x08004110 SD_ioctl .text.MX_FATFS_Init - 0x08003d08 0x1c build/fatfs.o - 0x08003d08 MX_FATFS_Init + 0x08004168 0x1c build/fatfs.o + 0x08004168 MX_FATFS_Init .text.get_fattime - 0x08003d24 0x4 build/fatfs.o - 0x08003d24 get_fattime + 0x08004184 0x4 build/fatfs.o + 0x08004184 get_fattime .text.BSP_PlatformIsDetected - 0x08003d28 0x18 build/fatfs_platform.o - 0x08003d28 BSP_PlatformIsDetected + 0x08004188 0x18 build/fatfs_platform.o + 0x08004188 BSP_PlatformIsDetected .text.NMI_Handler - 0x08003d40 0x2 build/stm32f7xx_it.o - 0x08003d40 NMI_Handler + 0x080041a0 0x2 build/stm32f7xx_it.o + 0x080041a0 NMI_Handler .text.HardFault_Handler - 0x08003d42 0x2 build/stm32f7xx_it.o - 0x08003d42 HardFault_Handler + 0x080041a2 0x2 build/stm32f7xx_it.o + 0x080041a2 HardFault_Handler .text.MemManage_Handler - 0x08003d44 0x2 build/stm32f7xx_it.o - 0x08003d44 MemManage_Handler + 0x080041a4 0x2 build/stm32f7xx_it.o + 0x080041a4 MemManage_Handler .text.BusFault_Handler - 0x08003d46 0x2 build/stm32f7xx_it.o - 0x08003d46 BusFault_Handler + 0x080041a6 0x2 build/stm32f7xx_it.o + 0x080041a6 BusFault_Handler .text.UsageFault_Handler - 0x08003d48 0x2 build/stm32f7xx_it.o - 0x08003d48 UsageFault_Handler + 0x080041a8 0x2 build/stm32f7xx_it.o + 0x080041a8 UsageFault_Handler .text.SVC_Handler - 0x08003d4a 0x2 build/stm32f7xx_it.o - 0x08003d4a SVC_Handler + 0x080041aa 0x2 build/stm32f7xx_it.o + 0x080041aa SVC_Handler .text.DebugMon_Handler - 0x08003d4c 0x2 build/stm32f7xx_it.o - 0x08003d4c DebugMon_Handler + 0x080041ac 0x2 build/stm32f7xx_it.o + 0x080041ac DebugMon_Handler .text.PendSV_Handler - 0x08003d4e 0x2 build/stm32f7xx_it.o - 0x08003d4e PendSV_Handler + 0x080041ae 0x2 build/stm32f7xx_it.o + 0x080041ae PendSV_Handler .text.SysTick_Handler - 0x08003d50 0x8 build/stm32f7xx_it.o - 0x08003d50 SysTick_Handler + 0x080041b0 0x8 build/stm32f7xx_it.o + 0x080041b0 SysTick_Handler .text.ADC_IRQHandler - 0x08003d58 0x18 build/stm32f7xx_it.o - 0x08003d58 ADC_IRQHandler + 0x080041b8 0x18 build/stm32f7xx_it.o + 0x080041b8 ADC_IRQHandler .text.TIM1_UP_TIM10_IRQHandler - 0x08003d70 0x34 build/stm32f7xx_it.o - 0x08003d70 TIM1_UP_TIM10_IRQHandler + 0x080041d0 0x34 build/stm32f7xx_it.o + 0x080041d0 TIM1_UP_TIM10_IRQHandler .text.TIM1_TRG_COM_TIM11_IRQHandler - 0x08003da4 0x34 build/stm32f7xx_it.o - 0x08003da4 TIM1_TRG_COM_TIM11_IRQHandler + 0x08004204 0x34 build/stm32f7xx_it.o + 0x08004204 TIM1_TRG_COM_TIM11_IRQHandler .text.TIM2_IRQHandler - 0x08003dd8 0x2 build/stm32f7xx_it.o - 0x08003dd8 TIM2_IRQHandler - *fill* 0x08003dda 0x2 + 0x08004238 0x2 build/stm32f7xx_it.o + 0x08004238 TIM2_IRQHandler + *fill* 0x0800423a 0x2 .text.TIM8_UP_TIM13_IRQHandler - 0x08003ddc 0x50 build/stm32f7xx_it.o - 0x08003ddc TIM8_UP_TIM13_IRQHandler + 0x0800423c 0x50 build/stm32f7xx_it.o + 0x0800423c TIM8_UP_TIM13_IRQHandler .text.TIM5_IRQHandler - 0x08003e2c 0x2 build/stm32f7xx_it.o - 0x08003e2c TIM5_IRQHandler - *fill* 0x08003e2e 0x2 + 0x0800428c 0x2 build/stm32f7xx_it.o + 0x0800428c TIM5_IRQHandler + *fill* 0x0800428e 0x2 .text.TIM6_DAC_IRQHandler - 0x08003e30 0x34 build/stm32f7xx_it.o - 0x08003e30 TIM6_DAC_IRQHandler + 0x08004290 0x34 build/stm32f7xx_it.o + 0x08004290 TIM6_DAC_IRQHandler .text.TIM7_IRQHandler - 0x08003e64 0x24 build/stm32f7xx_it.o - 0x08003e64 TIM7_IRQHandler + 0x080042c4 0x24 build/stm32f7xx_it.o + 0x080042c4 TIM7_IRQHandler .text.UART_RxCpltCallback - 0x08003e88 0x28c build/stm32f7xx_it.o - 0x08003e88 UART_RxCpltCallback + 0x080042e8 0x324 build/stm32f7xx_it.o + 0x080042e8 UART_RxCpltCallback .text.USART1_IRQHandler - 0x08004114 0xd0 build/stm32f7xx_it.o - 0x08004114 USART1_IRQHandler + 0x0800460c 0xd0 build/stm32f7xx_it.o + 0x0800460c USART1_IRQHandler .text.DMA2_Stream7_TransferComplete - 0x080041e4 0x10 build/stm32f7xx_it.o - 0x080041e4 DMA2_Stream7_TransferComplete + 0x080046dc 0x10 build/stm32f7xx_it.o + 0x080046dc DMA2_Stream7_TransferComplete .text.DMA2_Stream7_IRQHandler - 0x080041f4 0x34 build/stm32f7xx_it.o - 0x080041f4 DMA2_Stream7_IRQHandler + 0x080046ec 0x34 build/stm32f7xx_it.o + 0x080046ec DMA2_Stream7_IRQHandler .text.HAL_MspInit - 0x08004228 0x30 build/stm32f7xx_hal_msp.o - 0x08004228 HAL_MspInit + 0x08004720 0x30 build/stm32f7xx_hal_msp.o + 0x08004720 HAL_MspInit .text.HAL_ADC_MspInit - 0x08004258 0x110 build/stm32f7xx_hal_msp.o - 0x08004258 HAL_ADC_MspInit + 0x08004750 0x110 build/stm32f7xx_hal_msp.o + 0x08004750 HAL_ADC_MspInit .text.HAL_SD_MspInit - 0x08004368 0xb8 build/stm32f7xx_hal_msp.o - 0x08004368 HAL_SD_MspInit + 0x08004860 0xb8 build/stm32f7xx_hal_msp.o + 0x08004860 HAL_SD_MspInit .text.HAL_TIM_Base_MspInit - 0x08004420 0xc0 build/stm32f7xx_hal_msp.o - 0x08004420 HAL_TIM_Base_MspInit + 0x08004918 0xc0 build/stm32f7xx_hal_msp.o + 0x08004918 HAL_TIM_Base_MspInit .text.HAL_TIM_MspPostInit - 0x080044e0 0x8c build/stm32f7xx_hal_msp.o - 0x080044e0 HAL_TIM_MspPostInit + 0x080049d8 0x8c build/stm32f7xx_hal_msp.o + 0x080049d8 HAL_TIM_MspPostInit .text.HAL_UART_MspInit - 0x0800456c 0x88 build/stm32f7xx_hal_msp.o - 0x0800456c HAL_UART_MspInit + 0x08004a64 0x88 build/stm32f7xx_hal_msp.o + 0x08004a64 HAL_UART_MspInit .text.ADC_Init - 0x080045f4 0x134 build/stm32f7xx_hal_adc.o + 0x08004aec 0x134 build/stm32f7xx_hal_adc.o .text.HAL_ADC_Init - 0x08004728 0x58 build/stm32f7xx_hal_adc.o - 0x08004728 HAL_ADC_Init + 0x08004c20 0x58 build/stm32f7xx_hal_adc.o + 0x08004c20 HAL_ADC_Init .text.HAL_ADC_Start - 0x08004780 0x134 build/stm32f7xx_hal_adc.o - 0x08004780 HAL_ADC_Start + 0x08004c78 0x134 build/stm32f7xx_hal_adc.o + 0x08004c78 HAL_ADC_Start .text.HAL_ADC_Stop - 0x080048b4 0x40 build/stm32f7xx_hal_adc.o - 0x080048b4 HAL_ADC_Stop + 0x08004dac 0x40 build/stm32f7xx_hal_adc.o + 0x08004dac HAL_ADC_Stop .text.HAL_ADC_PollForConversion - 0x080048f4 0xc2 build/stm32f7xx_hal_adc.o - 0x080048f4 HAL_ADC_PollForConversion + 0x08004dec 0xc2 build/stm32f7xx_hal_adc.o + 0x08004dec HAL_ADC_PollForConversion .text.HAL_ADC_GetValue - 0x080049b6 0x6 build/stm32f7xx_hal_adc.o - 0x080049b6 HAL_ADC_GetValue + 0x08004eae 0x6 build/stm32f7xx_hal_adc.o + 0x08004eae HAL_ADC_GetValue .text.HAL_ADC_ConvCpltCallback - 0x080049bc 0x2 build/stm32f7xx_hal_adc.o - 0x080049bc HAL_ADC_ConvCpltCallback + 0x08004eb4 0x2 build/stm32f7xx_hal_adc.o + 0x08004eb4 HAL_ADC_ConvCpltCallback .text.HAL_ADC_LevelOutOfWindowCallback - 0x080049be 0x2 build/stm32f7xx_hal_adc.o - 0x080049be HAL_ADC_LevelOutOfWindowCallback + 0x08004eb6 0x2 build/stm32f7xx_hal_adc.o + 0x08004eb6 HAL_ADC_LevelOutOfWindowCallback .text.HAL_ADC_ErrorCallback - 0x080049c0 0x2 build/stm32f7xx_hal_adc.o - 0x080049c0 HAL_ADC_ErrorCallback + 0x08004eb8 0x2 build/stm32f7xx_hal_adc.o + 0x08004eb8 HAL_ADC_ErrorCallback .text.HAL_ADC_IRQHandler - 0x080049c2 0x136 build/stm32f7xx_hal_adc.o - 0x080049c2 HAL_ADC_IRQHandler + 0x08004eba 0x136 build/stm32f7xx_hal_adc.o + 0x08004eba HAL_ADC_IRQHandler .text.HAL_ADC_ConfigChannel - 0x08004af8 0x1e4 build/stm32f7xx_hal_adc.o - 0x08004af8 HAL_ADC_ConfigChannel + 0x08004ff0 0x1e4 build/stm32f7xx_hal_adc.o + 0x08004ff0 HAL_ADC_ConfigChannel .text.HAL_ADCEx_InjectedConvCpltCallback - 0x08004cdc 0x2 build/stm32f7xx_hal_adc_ex.o - 0x08004cdc HAL_ADCEx_InjectedConvCpltCallback - *fill* 0x08004cde 0x2 + 0x080051d4 0x2 build/stm32f7xx_hal_adc_ex.o + 0x080051d4 HAL_ADCEx_InjectedConvCpltCallback + *fill* 0x080051d6 0x2 .text.HAL_RCC_OscConfig - 0x08004ce0 0x444 build/stm32f7xx_hal_rcc.o - 0x08004ce0 HAL_RCC_OscConfig + 0x080051d8 0x444 build/stm32f7xx_hal_rcc.o + 0x080051d8 HAL_RCC_OscConfig .text.HAL_RCC_GetSysClockFreq - 0x08005124 0xa8 build/stm32f7xx_hal_rcc.o - 0x08005124 HAL_RCC_GetSysClockFreq + 0x0800561c 0xa8 build/stm32f7xx_hal_rcc.o + 0x0800561c HAL_RCC_GetSysClockFreq .text.HAL_RCC_ClockConfig - 0x080051cc 0x16c build/stm32f7xx_hal_rcc.o - 0x080051cc HAL_RCC_ClockConfig + 0x080056c4 0x16c build/stm32f7xx_hal_rcc.o + 0x080056c4 HAL_RCC_ClockConfig .text.HAL_RCC_GetHCLKFreq - 0x08005338 0xc build/stm32f7xx_hal_rcc.o - 0x08005338 HAL_RCC_GetHCLKFreq + 0x08005830 0xc build/stm32f7xx_hal_rcc.o + 0x08005830 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x08005344 0x20 build/stm32f7xx_hal_rcc.o - 0x08005344 HAL_RCC_GetPCLK1Freq + 0x0800583c 0x20 build/stm32f7xx_hal_rcc.o + 0x0800583c HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x08005364 0x20 build/stm32f7xx_hal_rcc.o - 0x08005364 HAL_RCC_GetPCLK2Freq + 0x0800585c 0x20 build/stm32f7xx_hal_rcc.o + 0x0800585c HAL_RCC_GetPCLK2Freq .text.HAL_RCCEx_PeriphCLKConfig - 0x08005384 0x600 build/stm32f7xx_hal_rcc_ex.o - 0x08005384 HAL_RCCEx_PeriphCLKConfig + 0x0800587c 0x600 build/stm32f7xx_hal_rcc_ex.o + 0x0800587c HAL_RCCEx_PeriphCLKConfig .text.HAL_GPIO_Init - 0x08005984 0x204 build/stm32f7xx_hal_gpio.o - 0x08005984 HAL_GPIO_Init + 0x08005e7c 0x204 build/stm32f7xx_hal_gpio.o + 0x08005e7c HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x08005b88 0xe build/stm32f7xx_hal_gpio.o - 0x08005b88 HAL_GPIO_ReadPin + 0x08006080 0xe build/stm32f7xx_hal_gpio.o + 0x08006080 HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x08005b96 0xc build/stm32f7xx_hal_gpio.o - 0x08005b96 HAL_GPIO_WritePin + 0x0800608e 0xc build/stm32f7xx_hal_gpio.o + 0x0800608e HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x08005ba2 0x12 build/stm32f7xx_hal_gpio.o - 0x08005ba2 HAL_GPIO_TogglePin + 0x0800609a 0x12 build/stm32f7xx_hal_gpio.o + 0x0800609a HAL_GPIO_TogglePin .text.HAL_PWREx_EnableOverDrive - 0x08005bb4 0x7c build/stm32f7xx_hal_pwr_ex.o - 0x08005bb4 HAL_PWREx_EnableOverDrive + 0x080060ac 0x7c build/stm32f7xx_hal_pwr_ex.o + 0x080060ac HAL_PWREx_EnableOverDrive .text.__NVIC_SetPriority - 0x08005c30 0x24 build/stm32f7xx_hal_cortex.o + 0x08006128 0x24 build/stm32f7xx_hal_cortex.o .text.NVIC_EncodePriority - 0x08005c54 0x3e build/stm32f7xx_hal_cortex.o - *fill* 0x08005c92 0x2 + 0x0800614c 0x3e build/stm32f7xx_hal_cortex.o + *fill* 0x0800618a 0x2 .text.HAL_NVIC_SetPriorityGrouping - 0x08005c94 0x24 build/stm32f7xx_hal_cortex.o - 0x08005c94 HAL_NVIC_SetPriorityGrouping + 0x0800618c 0x24 build/stm32f7xx_hal_cortex.o + 0x0800618c HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08005cb8 0x20 build/stm32f7xx_hal_cortex.o - 0x08005cb8 HAL_NVIC_SetPriority + 0x080061b0 0x20 build/stm32f7xx_hal_cortex.o + 0x080061b0 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08005cd8 0x1c build/stm32f7xx_hal_cortex.o - 0x08005cd8 HAL_NVIC_EnableIRQ + 0x080061d0 0x1c build/stm32f7xx_hal_cortex.o + 0x080061d0 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08005cf4 0x28 build/stm32f7xx_hal_cortex.o - 0x08005cf4 HAL_SYSTICK_Config + 0x080061ec 0x28 build/stm32f7xx_hal_cortex.o + 0x080061ec HAL_SYSTICK_Config .text.HAL_InitTick - 0x08005d1c 0x4c build/stm32f7xx_hal.o - 0x08005d1c HAL_InitTick + 0x08006214 0x4c build/stm32f7xx_hal.o + 0x08006214 HAL_InitTick .text.HAL_Init - 0x08005d68 0x16 build/stm32f7xx_hal.o - 0x08005d68 HAL_Init - *fill* 0x08005d7e 0x2 + 0x08006260 0x16 build/stm32f7xx_hal.o + 0x08006260 HAL_Init + *fill* 0x08006276 0x2 .text.HAL_IncTick - 0x08005d80 0x18 build/stm32f7xx_hal.o - 0x08005d80 HAL_IncTick + 0x08006278 0x18 build/stm32f7xx_hal.o + 0x08006278 HAL_IncTick .text.HAL_GetTick - 0x08005d98 0xc build/stm32f7xx_hal.o - 0x08005d98 HAL_GetTick + 0x08006290 0xc build/stm32f7xx_hal.o + 0x08006290 HAL_GetTick .text.HAL_Delay - 0x08005da4 0x28 build/stm32f7xx_hal.o - 0x08005da4 HAL_Delay + 0x0800629c 0x28 build/stm32f7xx_hal.o + 0x0800629c HAL_Delay .text.RCC_GetHCLKClockFreq - 0x08005dcc 0x18 build/stm32f7xx_ll_rcc.o - 0x08005dcc RCC_GetHCLKClockFreq + 0x080062c4 0x18 build/stm32f7xx_ll_rcc.o + 0x080062c4 RCC_GetHCLKClockFreq .text.RCC_GetPCLK1ClockFreq - 0x08005de4 0x18 build/stm32f7xx_ll_rcc.o - 0x08005de4 RCC_GetPCLK1ClockFreq + 0x080062dc 0x18 build/stm32f7xx_ll_rcc.o + 0x080062dc RCC_GetPCLK1ClockFreq .text.RCC_GetPCLK2ClockFreq - 0x08005dfc 0x18 build/stm32f7xx_ll_rcc.o - 0x08005dfc RCC_GetPCLK2ClockFreq + 0x080062f4 0x18 build/stm32f7xx_ll_rcc.o + 0x080062f4 RCC_GetPCLK2ClockFreq .text.RCC_PLL_GetFreqDomain_SYS - 0x08005e14 0x44 build/stm32f7xx_ll_rcc.o - 0x08005e14 RCC_PLL_GetFreqDomain_SYS + 0x0800630c 0x44 build/stm32f7xx_ll_rcc.o + 0x0800630c RCC_PLL_GetFreqDomain_SYS .text.RCC_GetSystemClockFreq - 0x08005e58 0x2c build/stm32f7xx_ll_rcc.o - 0x08005e58 RCC_GetSystemClockFreq + 0x08006350 0x2c build/stm32f7xx_ll_rcc.o + 0x08006350 RCC_GetSystemClockFreq .text.LL_RCC_GetUSARTClockFreq - 0x08005e84 0x178 build/stm32f7xx_ll_rcc.o - 0x08005e84 LL_RCC_GetUSARTClockFreq + 0x0800637c 0x178 build/stm32f7xx_ll_rcc.o + 0x0800637c LL_RCC_GetUSARTClockFreq .text.LL_RCC_GetUARTClockFreq - 0x08005ffc 0x180 build/stm32f7xx_ll_rcc.o - 0x08005ffc LL_RCC_GetUARTClockFreq + 0x080064f4 0x180 build/stm32f7xx_ll_rcc.o + 0x080064f4 LL_RCC_GetUARTClockFreq .text.LL_GPIO_SetPinSpeed - 0x0800617c 0x30 build/stm32f7xx_ll_gpio.o + 0x08006674 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetPinPull - 0x080061ac 0x30 build/stm32f7xx_ll_gpio.o + 0x080066a4 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetAFPin_0_7 - 0x080061dc 0x30 build/stm32f7xx_ll_gpio.o + 0x080066d4 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetAFPin_8_15 - 0x0800620c 0x32 build/stm32f7xx_ll_gpio.o + 0x08006704 0x32 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetPinMode - 0x0800623e 0x30 build/stm32f7xx_ll_gpio.o + 0x08006736 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_Init - 0x0800626e 0x8a build/stm32f7xx_ll_gpio.o - 0x0800626e LL_GPIO_Init + 0x08006766 0x8a build/stm32f7xx_ll_gpio.o + 0x08006766 LL_GPIO_Init .text.SDMMC_GetCmdError - 0x080062f8 0x38 build/stm32f7xx_ll_sdmmc.o + 0x080067f0 0x38 build/stm32f7xx_ll_sdmmc.o .text.SDMMC_Init - 0x08006330 0x34 build/stm32f7xx_ll_sdmmc.o - 0x08006330 SDMMC_Init + 0x08006828 0x34 build/stm32f7xx_ll_sdmmc.o + 0x08006828 SDMMC_Init .text.SDMMC_ReadFIFO - 0x08006364 0x6 build/stm32f7xx_ll_sdmmc.o - 0x08006364 SDMMC_ReadFIFO + 0x0800685c 0x6 build/stm32f7xx_ll_sdmmc.o + 0x0800685c SDMMC_ReadFIFO .text.SDMMC_WriteFIFO - 0x0800636a 0xa build/stm32f7xx_ll_sdmmc.o - 0x0800636a SDMMC_WriteFIFO + 0x08006862 0xa build/stm32f7xx_ll_sdmmc.o + 0x08006862 SDMMC_WriteFIFO .text.SDMMC_PowerState_ON - 0x08006374 0x8 build/stm32f7xx_ll_sdmmc.o - 0x08006374 SDMMC_PowerState_ON + 0x0800686c 0x8 build/stm32f7xx_ll_sdmmc.o + 0x0800686c SDMMC_PowerState_ON .text.SDMMC_GetPowerState - 0x0800637c 0x8 build/stm32f7xx_ll_sdmmc.o - 0x0800637c SDMMC_GetPowerState + 0x08006874 0x8 build/stm32f7xx_ll_sdmmc.o + 0x08006874 SDMMC_GetPowerState .text.SDMMC_SendCommand - 0x08006384 0x20 build/stm32f7xx_ll_sdmmc.o - 0x08006384 SDMMC_SendCommand + 0x0800687c 0x20 build/stm32f7xx_ll_sdmmc.o + 0x0800687c SDMMC_SendCommand .text.SDMMC_GetCommandResponse - 0x080063a4 0x6 build/stm32f7xx_ll_sdmmc.o - 0x080063a4 SDMMC_GetCommandResponse + 0x0800689c 0x6 build/stm32f7xx_ll_sdmmc.o + 0x0800689c SDMMC_GetCommandResponse .text.SDMMC_GetResponse - 0x080063aa 0x6 build/stm32f7xx_ll_sdmmc.o - 0x080063aa SDMMC_GetResponse + 0x080068a2 0x6 build/stm32f7xx_ll_sdmmc.o + 0x080068a2 SDMMC_GetResponse .text.SDMMC_ConfigData - 0x080063b0 0x24 build/stm32f7xx_ll_sdmmc.o - 0x080063b0 SDMMC_ConfigData + 0x080068a8 0x24 build/stm32f7xx_ll_sdmmc.o + 0x080068a8 SDMMC_ConfigData .text.SDMMC_CmdGoIdleState - 0x080063d4 0x26 build/stm32f7xx_ll_sdmmc.o - 0x080063d4 SDMMC_CmdGoIdleState - *fill* 0x080063fa 0x2 + 0x080068cc 0x26 build/stm32f7xx_ll_sdmmc.o + 0x080068cc SDMMC_CmdGoIdleState + *fill* 0x080068f2 0x2 .text.SDMMC_GetCmdResp1 - 0x080063fc 0x154 build/stm32f7xx_ll_sdmmc.o - 0x080063fc SDMMC_GetCmdResp1 + 0x080068f4 0x154 build/stm32f7xx_ll_sdmmc.o + 0x080068f4 SDMMC_GetCmdResp1 .text.SDMMC_CmdBlockLength - 0x08006550 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006550 SDMMC_CmdBlockLength + 0x08006a48 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006a48 SDMMC_CmdBlockLength .text.SDMMC_CmdReadSingleBlock - 0x08006580 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006580 SDMMC_CmdReadSingleBlock + 0x08006a78 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006a78 SDMMC_CmdReadSingleBlock .text.SDMMC_CmdReadMultiBlock - 0x080065b0 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080065b0 SDMMC_CmdReadMultiBlock + 0x08006aa8 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006aa8 SDMMC_CmdReadMultiBlock .text.SDMMC_CmdWriteSingleBlock - 0x080065e0 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080065e0 SDMMC_CmdWriteSingleBlock + 0x08006ad8 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006ad8 SDMMC_CmdWriteSingleBlock .text.SDMMC_CmdWriteMultiBlock - 0x08006610 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006610 SDMMC_CmdWriteMultiBlock + 0x08006b08 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006b08 SDMMC_CmdWriteMultiBlock .text.SDMMC_CmdStopTransfer - 0x08006640 0x34 build/stm32f7xx_ll_sdmmc.o - 0x08006640 SDMMC_CmdStopTransfer + 0x08006b38 0x34 build/stm32f7xx_ll_sdmmc.o + 0x08006b38 SDMMC_CmdStopTransfer .text.SDMMC_CmdSelDesel - 0x08006674 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006674 SDMMC_CmdSelDesel + 0x08006b6c 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006b6c SDMMC_CmdSelDesel .text.SDMMC_CmdAppCommand - 0x080066a4 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080066a4 SDMMC_CmdAppCommand + 0x08006b9c 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006b9c SDMMC_CmdAppCommand .text.SDMMC_CmdBusWidth - 0x080066d4 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080066d4 SDMMC_CmdBusWidth + 0x08006bcc 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006bcc SDMMC_CmdBusWidth .text.SDMMC_CmdSendSCR - 0x08006704 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006704 SDMMC_CmdSendSCR + 0x08006bfc 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006bfc SDMMC_CmdSendSCR .text.SDMMC_CmdSendStatus - 0x08006734 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006734 SDMMC_CmdSendStatus + 0x08006c2c 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006c2c SDMMC_CmdSendStatus .text.SDMMC_GetCmdResp2 - 0x08006764 0x5c build/stm32f7xx_ll_sdmmc.o - 0x08006764 SDMMC_GetCmdResp2 + 0x08006c5c 0x5c build/stm32f7xx_ll_sdmmc.o + 0x08006c5c SDMMC_GetCmdResp2 .text.SDMMC_CmdSendCID - 0x080067c0 0x2a build/stm32f7xx_ll_sdmmc.o - 0x080067c0 SDMMC_CmdSendCID + 0x08006cb8 0x2a build/stm32f7xx_ll_sdmmc.o + 0x08006cb8 SDMMC_CmdSendCID .text.SDMMC_CmdSendCSD - 0x080067ea 0x2a build/stm32f7xx_ll_sdmmc.o - 0x080067ea SDMMC_CmdSendCSD + 0x08006ce2 0x2a build/stm32f7xx_ll_sdmmc.o + 0x08006ce2 SDMMC_CmdSendCSD .text.SDMMC_GetCmdResp3 - 0x08006814 0x4c build/stm32f7xx_ll_sdmmc.o - 0x08006814 SDMMC_GetCmdResp3 + 0x08006d0c 0x4c build/stm32f7xx_ll_sdmmc.o + 0x08006d0c SDMMC_GetCmdResp3 .text.SDMMC_CmdAppOperCommand - 0x08006860 0x34 build/stm32f7xx_ll_sdmmc.o - 0x08006860 SDMMC_CmdAppOperCommand + 0x08006d58 0x34 build/stm32f7xx_ll_sdmmc.o + 0x08006d58 SDMMC_CmdAppOperCommand .text.SDMMC_GetCmdResp6 - 0x08006894 0xa0 build/stm32f7xx_ll_sdmmc.o - 0x08006894 SDMMC_GetCmdResp6 + 0x08006d8c 0xa0 build/stm32f7xx_ll_sdmmc.o + 0x08006d8c SDMMC_GetCmdResp6 .text.SDMMC_CmdSetRelAdd - 0x08006934 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006934 SDMMC_CmdSetRelAdd + 0x08006e2c 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006e2c SDMMC_CmdSetRelAdd .text.SDMMC_GetCmdResp7 - 0x08006964 0x64 build/stm32f7xx_ll_sdmmc.o - 0x08006964 SDMMC_GetCmdResp7 + 0x08006e5c 0x64 build/stm32f7xx_ll_sdmmc.o + 0x08006e5c SDMMC_GetCmdResp7 .text.SDMMC_CmdOperCond - 0x080069c8 0x2e build/stm32f7xx_ll_sdmmc.o - 0x080069c8 SDMMC_CmdOperCond - *fill* 0x080069f6 0x2 + 0x08006ec0 0x2e build/stm32f7xx_ll_sdmmc.o + 0x08006ec0 SDMMC_CmdOperCond + *fill* 0x08006eee 0x2 .text.SD_PowerON - 0x080069f8 0xc0 build/stm32f7xx_hal_sd.o + 0x08006ef0 0xc0 build/stm32f7xx_hal_sd.o .text.SD_FindSCR - 0x08006ab8 0x100 build/stm32f7xx_hal_sd.o + 0x08006fb0 0x100 build/stm32f7xx_hal_sd.o .text.SD_WideBus_Enable - 0x08006bb8 0x4e build/stm32f7xx_hal_sd.o + 0x080070b0 0x4e build/stm32f7xx_hal_sd.o .text.SD_WideBus_Disable - 0x08006c06 0x4e build/stm32f7xx_hal_sd.o + 0x080070fe 0x4e build/stm32f7xx_hal_sd.o .text.SD_SendStatus - 0x08006c54 0x2c build/stm32f7xx_hal_sd.o + 0x0800714c 0x2c build/stm32f7xx_hal_sd.o .text.HAL_SD_ReadBlocks - 0x08006c80 0x248 build/stm32f7xx_hal_sd.o - 0x08006c80 HAL_SD_ReadBlocks + 0x08007178 0x248 build/stm32f7xx_hal_sd.o + 0x08007178 HAL_SD_ReadBlocks .text.HAL_SD_WriteBlocks - 0x08006ec8 0x200 build/stm32f7xx_hal_sd.o - 0x08006ec8 HAL_SD_WriteBlocks + 0x080073c0 0x200 build/stm32f7xx_hal_sd.o + 0x080073c0 HAL_SD_WriteBlocks .text.HAL_SD_GetCardCSD - 0x080070c8 0x1b8 build/stm32f7xx_hal_sd.o - 0x080070c8 HAL_SD_GetCardCSD + 0x080075c0 0x1b8 build/stm32f7xx_hal_sd.o + 0x080075c0 HAL_SD_GetCardCSD .text.SD_InitCard - 0x08007280 0x100 build/stm32f7xx_hal_sd.o + 0x08007778 0x100 build/stm32f7xx_hal_sd.o .text.HAL_SD_InitCard - 0x08007380 0xa8 build/stm32f7xx_hal_sd.o - 0x08007380 HAL_SD_InitCard + 0x08007878 0xa8 build/stm32f7xx_hal_sd.o + 0x08007878 HAL_SD_InitCard .text.HAL_SD_Init - 0x08007428 0x36 build/stm32f7xx_hal_sd.o - 0x08007428 HAL_SD_Init + 0x08007920 0x36 build/stm32f7xx_hal_sd.o + 0x08007920 HAL_SD_Init .text.HAL_SD_GetCardInfo - 0x0800745e 0x24 build/stm32f7xx_hal_sd.o - 0x0800745e HAL_SD_GetCardInfo - *fill* 0x08007482 0x2 + 0x08007956 0x24 build/stm32f7xx_hal_sd.o + 0x08007956 HAL_SD_GetCardInfo + *fill* 0x0800797a 0x2 .text.HAL_SD_ConfigWideBusOperation - 0x08007484 0xc0 build/stm32f7xx_hal_sd.o - 0x08007484 HAL_SD_ConfigWideBusOperation + 0x0800797c 0xc0 build/stm32f7xx_hal_sd.o + 0x0800797c HAL_SD_ConfigWideBusOperation .text.HAL_SD_GetCardState - 0x08007544 0x22 build/stm32f7xx_hal_sd.o - 0x08007544 HAL_SD_GetCardState - *fill* 0x08007566 0x2 + 0x08007a3c 0x22 build/stm32f7xx_hal_sd.o + 0x08007a3c HAL_SD_GetCardState + *fill* 0x08007a5e 0x2 .text.LL_SPI_Init - 0x08007568 0x8c build/stm32f7xx_ll_spi.o - 0x08007568 LL_SPI_Init + 0x08007a60 0x8c build/stm32f7xx_ll_spi.o + 0x08007a60 LL_SPI_Init .text.TIM_OC1_SetConfig - 0x080075f4 0x68 build/stm32f7xx_hal_tim.o + 0x08007aec 0x68 build/stm32f7xx_hal_tim.o .text.TIM_OC3_SetConfig - 0x0800765c 0x70 build/stm32f7xx_hal_tim.o + 0x08007b54 0x70 build/stm32f7xx_hal_tim.o .text.TIM_OC4_SetConfig - 0x080076cc 0x54 build/stm32f7xx_hal_tim.o + 0x08007bc4 0x54 build/stm32f7xx_hal_tim.o .text.TIM_OC5_SetConfig - 0x08007720 0x54 build/stm32f7xx_hal_tim.o + 0x08007c18 0x54 build/stm32f7xx_hal_tim.o .text.TIM_OC6_SetConfig - 0x08007774 0x54 build/stm32f7xx_hal_tim.o + 0x08007c6c 0x54 build/stm32f7xx_hal_tim.o .text.TIM_TI1_ConfigInputStage - 0x080077c8 0x26 build/stm32f7xx_hal_tim.o + 0x08007cc0 0x26 build/stm32f7xx_hal_tim.o .text.TIM_TI2_ConfigInputStage - 0x080077ee 0x28 build/stm32f7xx_hal_tim.o + 0x08007ce6 0x28 build/stm32f7xx_hal_tim.o .text.TIM_ITRx_SetConfig - 0x08007816 0x10 build/stm32f7xx_hal_tim.o + 0x08007d0e 0x10 build/stm32f7xx_hal_tim.o .text.HAL_TIM_Base_Stop - 0x08007826 0x28 build/stm32f7xx_hal_tim.o - 0x08007826 HAL_TIM_Base_Stop - *fill* 0x0800784e 0x2 + 0x08007d1e 0x28 build/stm32f7xx_hal_tim.o + 0x08007d1e HAL_TIM_Base_Stop + *fill* 0x08007d46 0x2 .text.HAL_TIM_Base_Start_IT - 0x08007850 0x90 build/stm32f7xx_hal_tim.o - 0x08007850 HAL_TIM_Base_Start_IT + 0x08007d48 0x90 build/stm32f7xx_hal_tim.o + 0x08007d48 HAL_TIM_Base_Start_IT .text.HAL_TIM_Base_Stop_IT - 0x080078e0 0x32 build/stm32f7xx_hal_tim.o - 0x080078e0 HAL_TIM_Base_Stop_IT + 0x08007dd8 0x32 build/stm32f7xx_hal_tim.o + 0x08007dd8 HAL_TIM_Base_Stop_IT .text.HAL_TIM_PWM_MspInit - 0x08007912 0x2 build/stm32f7xx_hal_tim.o - 0x08007912 HAL_TIM_PWM_MspInit + 0x08007e0a 0x2 build/stm32f7xx_hal_tim.o + 0x08007e0a HAL_TIM_PWM_MspInit .text.HAL_TIM_PeriodElapsedCallback - 0x08007914 0x2 build/stm32f7xx_hal_tim.o - 0x08007914 HAL_TIM_PeriodElapsedCallback + 0x08007e0c 0x2 build/stm32f7xx_hal_tim.o + 0x08007e0c HAL_TIM_PeriodElapsedCallback .text.HAL_TIM_OC_DelayElapsedCallback - 0x08007916 0x2 build/stm32f7xx_hal_tim.o - 0x08007916 HAL_TIM_OC_DelayElapsedCallback + 0x08007e0e 0x2 build/stm32f7xx_hal_tim.o + 0x08007e0e HAL_TIM_OC_DelayElapsedCallback .text.HAL_TIM_IC_CaptureCallback - 0x08007918 0x2 build/stm32f7xx_hal_tim.o - 0x08007918 HAL_TIM_IC_CaptureCallback + 0x08007e10 0x2 build/stm32f7xx_hal_tim.o + 0x08007e10 HAL_TIM_IC_CaptureCallback .text.HAL_TIM_PWM_PulseFinishedCallback - 0x0800791a 0x2 build/stm32f7xx_hal_tim.o - 0x0800791a HAL_TIM_PWM_PulseFinishedCallback + 0x08007e12 0x2 build/stm32f7xx_hal_tim.o + 0x08007e12 HAL_TIM_PWM_PulseFinishedCallback .text.HAL_TIM_TriggerCallback - 0x0800791c 0x2 build/stm32f7xx_hal_tim.o - 0x0800791c HAL_TIM_TriggerCallback + 0x08007e14 0x2 build/stm32f7xx_hal_tim.o + 0x08007e14 HAL_TIM_TriggerCallback .text.HAL_TIM_IRQHandler - 0x0800791e 0x17a build/stm32f7xx_hal_tim.o - 0x0800791e HAL_TIM_IRQHandler + 0x08007e16 0x17a build/stm32f7xx_hal_tim.o + 0x08007e16 HAL_TIM_IRQHandler .text.TIM_Base_SetConfig - 0x08007a98 0x120 build/stm32f7xx_hal_tim.o - 0x08007a98 TIM_Base_SetConfig + 0x08007f90 0x120 build/stm32f7xx_hal_tim.o + 0x08007f90 TIM_Base_SetConfig .text.HAL_TIM_Base_Init - 0x08007bb8 0x60 build/stm32f7xx_hal_tim.o - 0x08007bb8 HAL_TIM_Base_Init + 0x080080b0 0x60 build/stm32f7xx_hal_tim.o + 0x080080b0 HAL_TIM_Base_Init .text.HAL_TIM_PWM_Init - 0x08007c18 0x60 build/stm32f7xx_hal_tim.o - 0x08007c18 HAL_TIM_PWM_Init + 0x08008110 0x60 build/stm32f7xx_hal_tim.o + 0x08008110 HAL_TIM_PWM_Init .text.TIM_OC2_SetConfig - 0x08007c78 0x70 build/stm32f7xx_hal_tim.o - 0x08007c78 TIM_OC2_SetConfig + 0x08008170 0x70 build/stm32f7xx_hal_tim.o + 0x08008170 TIM_OC2_SetConfig .text.HAL_TIM_PWM_ConfigChannel - 0x08007ce8 0x13a build/stm32f7xx_hal_tim.o - 0x08007ce8 HAL_TIM_PWM_ConfigChannel + 0x080081e0 0x13a build/stm32f7xx_hal_tim.o + 0x080081e0 HAL_TIM_PWM_ConfigChannel .text.TIM_ETR_SetConfig - 0x08007e22 0x1a build/stm32f7xx_hal_tim.o - 0x08007e22 TIM_ETR_SetConfig + 0x0800831a 0x1a build/stm32f7xx_hal_tim.o + 0x0800831a TIM_ETR_SetConfig .text.HAL_TIM_ConfigClockSource - 0x08007e3c 0x100 build/stm32f7xx_hal_tim.o - 0x08007e3c HAL_TIM_ConfigClockSource + 0x08008334 0x100 build/stm32f7xx_hal_tim.o + 0x08008334 HAL_TIM_ConfigClockSource .text.TIM_CCxChannelCmd - 0x08007f3c 0x1e build/stm32f7xx_hal_tim.o - 0x08007f3c TIM_CCxChannelCmd - *fill* 0x08007f5a 0x2 + 0x08008434 0x1e build/stm32f7xx_hal_tim.o + 0x08008434 TIM_CCxChannelCmd + *fill* 0x08008452 0x2 .text.HAL_TIM_PWM_Start - 0x08007f5c 0x158 build/stm32f7xx_hal_tim.o - 0x08007f5c HAL_TIM_PWM_Start + 0x08008454 0x158 build/stm32f7xx_hal_tim.o + 0x08008454 HAL_TIM_PWM_Start .text.HAL_TIM_PWM_Stop - 0x080080b4 0xac build/stm32f7xx_hal_tim.o - 0x080080b4 HAL_TIM_PWM_Stop + 0x080085ac 0xac build/stm32f7xx_hal_tim.o + 0x080085ac HAL_TIM_PWM_Stop .text.HAL_TIMEx_MasterConfigSynchronization - 0x08008160 0xa0 build/stm32f7xx_hal_tim_ex.o - 0x08008160 HAL_TIMEx_MasterConfigSynchronization + 0x08008658 0xa0 build/stm32f7xx_hal_tim_ex.o + 0x08008658 HAL_TIMEx_MasterConfigSynchronization .text.HAL_TIMEx_CommutCallback - 0x08008200 0x2 build/stm32f7xx_hal_tim_ex.o - 0x08008200 HAL_TIMEx_CommutCallback + 0x080086f8 0x2 build/stm32f7xx_hal_tim_ex.o + 0x080086f8 HAL_TIMEx_CommutCallback .text.HAL_TIMEx_BreakCallback - 0x08008202 0x2 build/stm32f7xx_hal_tim_ex.o - 0x08008202 HAL_TIMEx_BreakCallback + 0x080086fa 0x2 build/stm32f7xx_hal_tim_ex.o + 0x080086fa HAL_TIMEx_BreakCallback .text.HAL_TIMEx_Break2Callback - 0x08008204 0x2 build/stm32f7xx_hal_tim_ex.o - 0x08008204 HAL_TIMEx_Break2Callback - *fill* 0x08008206 0x2 + 0x080086fc 0x2 build/stm32f7xx_hal_tim_ex.o + 0x080086fc HAL_TIMEx_Break2Callback + *fill* 0x080086fe 0x2 .text.LL_TIM_Init - 0x08008208 0x110 build/stm32f7xx_ll_tim.o - 0x08008208 LL_TIM_Init + 0x08008700 0x110 build/stm32f7xx_ll_tim.o + 0x08008700 LL_TIM_Init .text.LL_USART_SetBaudRate - 0x08008318 0x2e build/stm32f7xx_ll_usart.o - *fill* 0x08008346 0x2 + 0x08008810 0x2e build/stm32f7xx_ll_usart.o + *fill* 0x0800883e 0x2 .text.LL_USART_Init - 0x08008348 0xfc build/stm32f7xx_ll_usart.o - 0x08008348 LL_USART_Init + 0x08008840 0xfc build/stm32f7xx_ll_usart.o + 0x08008840 LL_USART_Init .text.SystemInit - 0x08008444 0x14 build/system_stm32f7xx.o - 0x08008444 SystemInit + 0x0800893c 0x14 build/system_stm32f7xx.o + 0x0800893c SystemInit .text.Mount_SD - 0x08008458 0x24 build/File_Handling.o - 0x08008458 Mount_SD + 0x08008950 0x24 build/File_Handling.o + 0x08008950 Mount_SD .text.Unmount_SD - 0x0800847c 0x20 build/File_Handling.o - 0x0800847c Unmount_SD + 0x08008974 0x20 build/File_Handling.o + 0x08008974 Unmount_SD .text.Write_File_byte - 0x0800849c 0x5c build/File_Handling.o - 0x0800849c Write_File_byte + 0x08008994 0x5c build/File_Handling.o + 0x08008994 Write_File_byte .text.Seek_Read_File - 0x080084f8 0x148 build/File_Handling.o - 0x080084f8 Seek_Read_File + 0x080089f0 0x148 build/File_Handling.o + 0x080089f0 Seek_Read_File .text.Create_File - 0x08008640 0x44 build/File_Handling.o - 0x08008640 Create_File + 0x08008b38 0x44 build/File_Handling.o + 0x08008b38 Create_File .text.Remove_File - 0x08008684 0x84 build/File_Handling.o - 0x08008684 Remove_File + 0x08008b7c 0x84 build/File_Handling.o + 0x08008b7c Remove_File .text.Update_File_byte - 0x08008708 0x5c build/File_Handling.o - 0x08008708 Update_File_byte + 0x08008c00 0x5c build/File_Handling.o + 0x08008c00 Update_File_byte .text.disk_status - 0x08008764 0x18 build/diskio.o - 0x08008764 disk_status + 0x08008c5c 0x18 build/diskio.o + 0x08008c5c disk_status .text.disk_initialize - 0x0800877c 0x28 build/diskio.o - 0x0800877c disk_initialize + 0x08008c74 0x28 build/diskio.o + 0x08008c74 disk_initialize .text.disk_read - 0x080087a4 0x18 build/diskio.o - 0x080087a4 disk_read + 0x08008c9c 0x18 build/diskio.o + 0x08008c9c disk_read .text.disk_write - 0x080087bc 0x18 build/diskio.o - 0x080087bc disk_write + 0x08008cb4 0x18 build/diskio.o + 0x08008cb4 disk_write .text.disk_ioctl - 0x080087d4 0x18 build/diskio.o - 0x080087d4 disk_ioctl - .text.ld_word 0x080087ec 0xa build/ff.o + 0x08008ccc 0x18 build/diskio.o + 0x08008ccc disk_ioctl + .text.ld_word 0x08008ce4 0xa build/ff.o .text.ld_dword - 0x080087f6 0x16 build/ff.o - .text.st_word 0x0800880c 0x8 build/ff.o + 0x08008cee 0x16 build/ff.o + .text.st_word 0x08008d04 0x8 build/ff.o .text.st_dword - 0x08008814 0x14 build/ff.o - .text.mem_cpy 0x08008828 0x14 build/ff.o - .text.mem_set 0x0800883c 0xa build/ff.o - .text.mem_cmp 0x08008846 0x1a build/ff.o - .text.chk_chr 0x08008860 0x10 build/ff.o + 0x08008d0c 0x14 build/ff.o + .text.mem_cpy 0x08008d20 0x14 build/ff.o + .text.mem_set 0x08008d34 0xa build/ff.o + .text.mem_cmp 0x08008d3e 0x1a build/ff.o + .text.chk_chr 0x08008d58 0x10 build/ff.o .text.chk_lock - 0x08008870 0x7c build/ff.o + 0x08008d68 0x7c build/ff.o .text.enq_lock - 0x080088ec 0x20 build/ff.o + 0x08008de4 0x20 build/ff.o .text.inc_lock - 0x0800890c 0xa0 build/ff.o + 0x08008e04 0xa0 build/ff.o .text.dec_lock - 0x080089ac 0x40 build/ff.o + 0x08008ea4 0x40 build/ff.o .text.clear_lock - 0x080089ec 0x3c build/ff.o + 0x08008ee4 0x3c build/ff.o .text.clust2sect - 0x08008a28 0x18 build/ff.o + 0x08008f20 0x18 build/ff.o .text.clmt_clust - 0x08008a40 0x26 build/ff.o + 0x08008f38 0x26 build/ff.o .text.ld_clust - 0x08008a66 0x26 build/ff.o + 0x08008f5e 0x26 build/ff.o .text.st_clust - 0x08008a8c 0x26 build/ff.o + 0x08008f84 0x26 build/ff.o .text.get_fileinfo - 0x08008ab2 0x6a build/ff.o + 0x08008faa 0x6a build/ff.o .text.create_name - 0x08008b1c 0xd0 build/ff.o + 0x08009014 0xd0 build/ff.o .text.get_ldnumber - 0x08008bec 0x48 build/ff.o + 0x080090e4 0x48 build/ff.o .text.validate - 0x08008c34 0x46 build/ff.o + 0x0800912c 0x46 build/ff.o .text.sync_window - 0x08008c7a 0x54 build/ff.o + 0x08009172 0x54 build/ff.o .text.move_window - 0x08008cce 0x36 build/ff.o + 0x080091c6 0x36 build/ff.o .text.check_fs - 0x08008d04 0x78 build/ff.o + 0x080091fc 0x78 build/ff.o .text.find_volume - 0x08008d7c 0x34c build/ff.o - .text.put_fat 0x080090c8 0x136 build/ff.o - .text.get_fat 0x080091fe 0xfc build/ff.o - .text.dir_sdi 0x080092fa 0xc0 build/ff.o + 0x08009274 0x34c build/ff.o + .text.put_fat 0x080095c0 0x136 build/ff.o + .text.get_fat 0x080096f6 0xfc build/ff.o + .text.dir_sdi 0x080097f2 0xc0 build/ff.o .text.create_chain - 0x080093ba 0xd6 build/ff.o + 0x080098b2 0xd6 build/ff.o .text.remove_chain - 0x08009490 0x7e build/ff.o + 0x08009988 0x7e build/ff.o .text.dir_remove - 0x0800950e 0x1c build/ff.o + 0x08009a06 0x1c build/ff.o .text.dir_next - 0x0800952a 0x118 build/ff.o + 0x08009a22 0x118 build/ff.o .text.dir_find - 0x08009642 0x5a build/ff.o + 0x08009b3a 0x5a build/ff.o .text.follow_path - 0x0800969c 0x92 build/ff.o + 0x08009b94 0x92 build/ff.o .text.dir_alloc - 0x0800972e 0x4e build/ff.o + 0x08009c26 0x4e build/ff.o .text.dir_register - 0x0800977c 0x3e build/ff.o + 0x08009c74 0x3e build/ff.o .text.dir_read - 0x080097ba 0x5e build/ff.o - .text.sync_fs 0x08009818 0x88 build/ff.o - .text.f_mount 0x080098a0 0x60 build/ff.o - 0x080098a0 f_mount - .text.f_open 0x08009900 0x232 build/ff.o - 0x08009900 f_open - .text.f_read 0x08009b32 0x1d8 build/ff.o - 0x08009b32 f_read - .text.f_write 0x08009d0a 0x210 build/ff.o - 0x08009d0a f_write - .text.f_sync 0x08009f1a 0x98 build/ff.o - 0x08009f1a f_sync - .text.f_close 0x08009fb2 0x2a build/ff.o - 0x08009fb2 f_close - .text.f_lseek 0x08009fdc 0x2a6 build/ff.o - 0x08009fdc f_lseek - .text.f_stat 0x0800a282 0x44 build/ff.o - 0x0800a282 f_stat + 0x08009cb2 0x5e build/ff.o + .text.sync_fs 0x08009d10 0x88 build/ff.o + .text.f_mount 0x08009d98 0x60 build/ff.o + 0x08009d98 f_mount + .text.f_open 0x08009df8 0x232 build/ff.o + 0x08009df8 f_open + .text.f_read 0x0800a02a 0x1d8 build/ff.o + 0x0800a02a f_read + .text.f_write 0x0800a202 0x210 build/ff.o + 0x0800a202 f_write + .text.f_sync 0x0800a412 0x98 build/ff.o + 0x0800a412 f_sync + .text.f_close 0x0800a4aa 0x2a build/ff.o + 0x0800a4aa f_close + .text.f_lseek 0x0800a4d4 0x2a6 build/ff.o + 0x0800a4d4 f_lseek + .text.f_stat 0x0800a77a 0x44 build/ff.o + 0x0800a77a f_stat .text.f_unlink - 0x0800a2c6 0xc4 build/ff.o - 0x0800a2c6 f_unlink - *fill* 0x0800a38a 0x2 + 0x0800a7be 0xc4 build/ff.o + 0x0800a7be f_unlink + *fill* 0x0800a882 0x2 .text.FATFS_LinkDriverEx - 0x0800a38c 0x54 build/ff_gen_drv.o - 0x0800a38c FATFS_LinkDriverEx + 0x0800a884 0x54 build/ff_gen_drv.o + 0x0800a884 FATFS_LinkDriverEx .text.FATFS_LinkDriver - 0x0800a3e0 0xa build/ff_gen_drv.o - 0x0800a3e0 FATFS_LinkDriver - *fill* 0x0800a3ea 0x2 - .text._sbrk 0x0800a3ec 0x48 build/sysmem.o - 0x0800a3ec _sbrk + 0x0800a8d8 0xa build/ff_gen_drv.o + 0x0800a8d8 FATFS_LinkDriver + *fill* 0x0800a8e2 0x2 + .text._sbrk 0x0800a8e4 0x48 build/sysmem.o + 0x0800a8e4 _sbrk .text.UART_EndRxTransfer - 0x0800a434 0x52 build/stm32f7xx_hal_uart.o - *fill* 0x0800a486 0x2 + 0x0800a92c 0x52 build/stm32f7xx_hal_uart.o + *fill* 0x0800a97e 0x2 .text.UART_SetConfig - 0x0800a488 0x328 build/stm32f7xx_hal_uart.o - 0x0800a488 UART_SetConfig + 0x0800a980 0x328 build/stm32f7xx_hal_uart.o + 0x0800a980 UART_SetConfig .text.UART_AdvFeatureConfig - 0x0800a7b0 0xca build/stm32f7xx_hal_uart.o - 0x0800a7b0 UART_AdvFeatureConfig + 0x0800aca8 0xca build/stm32f7xx_hal_uart.o + 0x0800aca8 UART_AdvFeatureConfig .text.UART_WaitOnFlagUntilTimeout - 0x0800a87a 0xa6 build/stm32f7xx_hal_uart.o - 0x0800a87a UART_WaitOnFlagUntilTimeout + 0x0800ad72 0xa6 build/stm32f7xx_hal_uart.o + 0x0800ad72 UART_WaitOnFlagUntilTimeout .text.UART_CheckIdleState - 0x0800a920 0xc6 build/stm32f7xx_hal_uart.o - 0x0800a920 UART_CheckIdleState + 0x0800ae18 0xc6 build/stm32f7xx_hal_uart.o + 0x0800ae18 UART_CheckIdleState .text.HAL_UART_Init - 0x0800a9e6 0x62 build/stm32f7xx_hal_uart.o - 0x0800a9e6 HAL_UART_Init + 0x0800aede 0x62 build/stm32f7xx_hal_uart.o + 0x0800aede HAL_UART_Init .text.Reset_Handler - 0x0800aa48 0x50 build/startup_stm32f767xx.o - 0x0800aa48 Reset_Handler + 0x0800af40 0x50 build/startup_stm32f767xx.o + 0x0800af40 Reset_Handler .text.Default_Handler - 0x0800aa98 0x2 build/startup_stm32f767xx.o - 0x0800aa98 RTC_Alarm_IRQHandler - 0x0800aa98 EXTI2_IRQHandler - 0x0800aa98 TIM8_CC_IRQHandler - 0x0800aa98 UART8_IRQHandler - 0x0800aa98 SPI4_IRQHandler - 0x0800aa98 TIM1_CC_IRQHandler - 0x0800aa98 DMA2_Stream5_IRQHandler - 0x0800aa98 JPEG_IRQHandler - 0x0800aa98 DMA1_Stream5_IRQHandler - 0x0800aa98 CAN3_RX1_IRQHandler - 0x0800aa98 PVD_IRQHandler - 0x0800aa98 TAMP_STAMP_IRQHandler - 0x0800aa98 CAN2_RX1_IRQHandler - 0x0800aa98 EXTI3_IRQHandler - 0x0800aa98 TIM8_TRG_COM_TIM14_IRQHandler - 0x0800aa98 DFSDM1_FLT1_IRQHandler - 0x0800aa98 I2C3_ER_IRQHandler - 0x0800aa98 DFSDM1_FLT2_IRQHandler - 0x0800aa98 EXTI0_IRQHandler - 0x0800aa98 I2C2_EV_IRQHandler - 0x0800aa98 DMA1_Stream2_IRQHandler - 0x0800aa98 CAN1_RX0_IRQHandler - 0x0800aa98 FPU_IRQHandler - 0x0800aa98 OTG_HS_WKUP_IRQHandler - 0x0800aa98 CAN3_SCE_IRQHandler - 0x0800aa98 LTDC_ER_IRQHandler - 0x0800aa98 CAN2_SCE_IRQHandler - 0x0800aa98 DMA2_Stream2_IRQHandler - 0x0800aa98 SPI1_IRQHandler - 0x0800aa98 TIM1_BRK_TIM9_IRQHandler - 0x0800aa98 DCMI_IRQHandler - 0x0800aa98 CAN2_RX0_IRQHandler - 0x0800aa98 DMA2_Stream3_IRQHandler - 0x0800aa98 SAI2_IRQHandler - 0x0800aa98 DFSDM1_FLT3_IRQHandler - 0x0800aa98 USART6_IRQHandler - 0x0800aa98 CAN3_RX0_IRQHandler - 0x0800aa98 USART3_IRQHandler - 0x0800aa98 CAN1_RX1_IRQHandler - 0x0800aa98 UART5_IRQHandler - 0x0800aa98 DMA2_Stream0_IRQHandler - 0x0800aa98 TIM4_IRQHandler - 0x0800aa98 QUADSPI_IRQHandler - 0x0800aa98 I2C1_EV_IRQHandler - 0x0800aa98 DMA1_Stream6_IRQHandler - 0x0800aa98 DMA1_Stream1_IRQHandler - 0x0800aa98 UART4_IRQHandler - 0x0800aa98 TIM3_IRQHandler - 0x0800aa98 RCC_IRQHandler - 0x0800aa98 TIM8_BRK_TIM12_IRQHandler - 0x0800aa98 Default_Handler - 0x0800aa98 CEC_IRQHandler - 0x0800aa98 EXTI15_10_IRQHandler - 0x0800aa98 DMA1_Stream7_IRQHandler - 0x0800aa98 SPI5_IRQHandler - 0x0800aa98 SDMMC1_IRQHandler - 0x0800aa98 CAN2_TX_IRQHandler - 0x0800aa98 I2C3_EV_IRQHandler - 0x0800aa98 EXTI9_5_IRQHandler - 0x0800aa98 RTC_WKUP_IRQHandler - 0x0800aa98 LTDC_IRQHandler - 0x0800aa98 ETH_WKUP_IRQHandler - 0x0800aa98 SPDIF_RX_IRQHandler - 0x0800aa98 SPI2_IRQHandler - 0x0800aa98 OTG_HS_EP1_IN_IRQHandler - 0x0800aa98 DMA1_Stream0_IRQHandler - 0x0800aa98 CAN1_TX_IRQHandler - 0x0800aa98 EXTI4_IRQHandler - 0x0800aa98 RNG_IRQHandler - 0x0800aa98 ETH_IRQHandler - 0x0800aa98 OTG_HS_EP1_OUT_IRQHandler - 0x0800aa98 WWDG_IRQHandler - 0x0800aa98 SPI6_IRQHandler - 0x0800aa98 MDIOS_IRQHandler - 0x0800aa98 I2C4_EV_IRQHandler - 0x0800aa98 CAN3_TX_IRQHandler - 0x0800aa98 OTG_FS_WKUP_IRQHandler - 0x0800aa98 OTG_HS_IRQHandler - 0x0800aa98 DMA2D_IRQHandler - 0x0800aa98 EXTI1_IRQHandler - 0x0800aa98 SDMMC2_IRQHandler - 0x0800aa98 UART7_IRQHandler - 0x0800aa98 USART2_IRQHandler - 0x0800aa98 DFSDM1_FLT0_IRQHandler - 0x0800aa98 I2C2_ER_IRQHandler - 0x0800aa98 DMA2_Stream1_IRQHandler - 0x0800aa98 CAN1_SCE_IRQHandler - 0x0800aa98 FLASH_IRQHandler - 0x0800aa98 DMA2_Stream4_IRQHandler - 0x0800aa98 OTG_FS_IRQHandler - 0x0800aa98 SPI3_IRQHandler - 0x0800aa98 DMA1_Stream4_IRQHandler - 0x0800aa98 I2C1_ER_IRQHandler - 0x0800aa98 FMC_IRQHandler - 0x0800aa98 LPTIM1_IRQHandler - 0x0800aa98 I2C4_ER_IRQHandler - 0x0800aa98 DMA2_Stream6_IRQHandler - 0x0800aa98 SAI1_IRQHandler - 0x0800aa98 DMA1_Stream3_IRQHandler + 0x0800af90 0x2 build/startup_stm32f767xx.o + 0x0800af90 RTC_Alarm_IRQHandler + 0x0800af90 EXTI2_IRQHandler + 0x0800af90 TIM8_CC_IRQHandler + 0x0800af90 UART8_IRQHandler + 0x0800af90 SPI4_IRQHandler + 0x0800af90 TIM1_CC_IRQHandler + 0x0800af90 DMA2_Stream5_IRQHandler + 0x0800af90 JPEG_IRQHandler + 0x0800af90 DMA1_Stream5_IRQHandler + 0x0800af90 CAN3_RX1_IRQHandler + 0x0800af90 PVD_IRQHandler + 0x0800af90 TAMP_STAMP_IRQHandler + 0x0800af90 CAN2_RX1_IRQHandler + 0x0800af90 EXTI3_IRQHandler + 0x0800af90 TIM8_TRG_COM_TIM14_IRQHandler + 0x0800af90 DFSDM1_FLT1_IRQHandler + 0x0800af90 I2C3_ER_IRQHandler + 0x0800af90 DFSDM1_FLT2_IRQHandler + 0x0800af90 EXTI0_IRQHandler + 0x0800af90 I2C2_EV_IRQHandler + 0x0800af90 DMA1_Stream2_IRQHandler + 0x0800af90 CAN1_RX0_IRQHandler + 0x0800af90 FPU_IRQHandler + 0x0800af90 OTG_HS_WKUP_IRQHandler + 0x0800af90 CAN3_SCE_IRQHandler + 0x0800af90 LTDC_ER_IRQHandler + 0x0800af90 CAN2_SCE_IRQHandler + 0x0800af90 DMA2_Stream2_IRQHandler + 0x0800af90 SPI1_IRQHandler + 0x0800af90 TIM1_BRK_TIM9_IRQHandler + 0x0800af90 DCMI_IRQHandler + 0x0800af90 CAN2_RX0_IRQHandler + 0x0800af90 DMA2_Stream3_IRQHandler + 0x0800af90 SAI2_IRQHandler + 0x0800af90 DFSDM1_FLT3_IRQHandler + 0x0800af90 USART6_IRQHandler + 0x0800af90 CAN3_RX0_IRQHandler + 0x0800af90 USART3_IRQHandler + 0x0800af90 CAN1_RX1_IRQHandler + 0x0800af90 UART5_IRQHandler + 0x0800af90 DMA2_Stream0_IRQHandler + 0x0800af90 TIM4_IRQHandler + 0x0800af90 QUADSPI_IRQHandler + 0x0800af90 I2C1_EV_IRQHandler + 0x0800af90 DMA1_Stream6_IRQHandler + 0x0800af90 DMA1_Stream1_IRQHandler + 0x0800af90 UART4_IRQHandler + 0x0800af90 TIM3_IRQHandler + 0x0800af90 RCC_IRQHandler + 0x0800af90 TIM8_BRK_TIM12_IRQHandler + 0x0800af90 Default_Handler + 0x0800af90 CEC_IRQHandler + 0x0800af90 EXTI15_10_IRQHandler + 0x0800af90 DMA1_Stream7_IRQHandler + 0x0800af90 SPI5_IRQHandler + 0x0800af90 SDMMC1_IRQHandler + 0x0800af90 CAN2_TX_IRQHandler + 0x0800af90 I2C3_EV_IRQHandler + 0x0800af90 EXTI9_5_IRQHandler + 0x0800af90 RTC_WKUP_IRQHandler + 0x0800af90 LTDC_IRQHandler + 0x0800af90 ETH_WKUP_IRQHandler + 0x0800af90 SPDIF_RX_IRQHandler + 0x0800af90 SPI2_IRQHandler + 0x0800af90 OTG_HS_EP1_IN_IRQHandler + 0x0800af90 DMA1_Stream0_IRQHandler + 0x0800af90 CAN1_TX_IRQHandler + 0x0800af90 EXTI4_IRQHandler + 0x0800af90 RNG_IRQHandler + 0x0800af90 ETH_IRQHandler + 0x0800af90 OTG_HS_EP1_OUT_IRQHandler + 0x0800af90 WWDG_IRQHandler + 0x0800af90 SPI6_IRQHandler + 0x0800af90 MDIOS_IRQHandler + 0x0800af90 I2C4_EV_IRQHandler + 0x0800af90 CAN3_TX_IRQHandler + 0x0800af90 OTG_FS_WKUP_IRQHandler + 0x0800af90 OTG_HS_IRQHandler + 0x0800af90 DMA2D_IRQHandler + 0x0800af90 EXTI1_IRQHandler + 0x0800af90 SDMMC2_IRQHandler + 0x0800af90 UART7_IRQHandler + 0x0800af90 USART2_IRQHandler + 0x0800af90 DFSDM1_FLT0_IRQHandler + 0x0800af90 I2C2_ER_IRQHandler + 0x0800af90 DMA2_Stream1_IRQHandler + 0x0800af90 CAN1_SCE_IRQHandler + 0x0800af90 FLASH_IRQHandler + 0x0800af90 DMA2_Stream4_IRQHandler + 0x0800af90 OTG_FS_IRQHandler + 0x0800af90 SPI3_IRQHandler + 0x0800af90 DMA1_Stream4_IRQHandler + 0x0800af90 I2C1_ER_IRQHandler + 0x0800af90 FMC_IRQHandler + 0x0800af90 LPTIM1_IRQHandler + 0x0800af90 I2C4_ER_IRQHandler + 0x0800af90 DMA2_Stream6_IRQHandler + 0x0800af90 SAI1_IRQHandler + 0x0800af90 DMA1_Stream3_IRQHandler *(.glue_7) - .glue_7 0x0800aa9a 0x0 linker stubs + .glue_7 0x0800af92 0x0 linker stubs *(.glue_7t) - .glue_7t 0x0800aa9a 0x0 linker stubs + .glue_7t 0x0800af92 0x0 linker stubs *(.eh_frame) - *fill* 0x0800aa9a 0x2 - .eh_frame 0x0800aa9c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + *fill* 0x0800af92 0x2 + .eh_frame 0x0800af94 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o *(.init) - .init 0x0800aa9c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o - 0x0800aa9c _init - .init 0x0800aaa0 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o + .init 0x0800af94 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o + 0x0800af94 _init + .init 0x0800af98 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o *(.fini) - .fini 0x0800aaa8 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o - 0x0800aaa8 _fini - .fini 0x0800aaac 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o - 0x0800aab4 . = ALIGN (0x4) - 0x0800aab4 _etext = . + .fini 0x0800afa0 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o + 0x0800afa0 _fini + .fini 0x0800afa4 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o + 0x0800afac . = ALIGN (0x4) + 0x0800afac _etext = . -.vfp11_veneer 0x0800aab4 0x0 - .vfp11_veneer 0x0800aab4 0x0 linker stubs +.vfp11_veneer 0x0800afac 0x0 + .vfp11_veneer 0x0800afac 0x0 linker stubs -.v4_bx 0x0800aab4 0x0 - .v4_bx 0x0800aab4 0x0 linker stubs +.v4_bx 0x0800afac 0x0 + .v4_bx 0x0800afac 0x0 linker stubs -.iplt 0x0800aab4 0x0 - .iplt 0x0800aab4 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o +.iplt 0x0800afac 0x0 + .iplt 0x0800afac 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o -.rodata 0x0800aab4 0x25c - 0x0800aab4 . = ALIGN (0x4) +.rodata 0x0800afac 0x364 + 0x0800afac . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.Init_params.str1.4 - 0x0800aab4 0x1ad build/main.o + 0x0800afac 0x1ad build/main.o 0x10 (size before relaxing) .rodata.SD_SAVE.str1.4 - 0x0800ac61 0xa build/main.o - *fill* 0x0800ac61 0x3 + 0x0800b159 0xa build/main.o + *fill* 0x0800b159 0x3 + .rodata.ad9102_example4_regval + 0x0800b15c 0x84 build/main.o + .rodata.ad9102_reg_addr + 0x0800b1e0 0x84 build/main.o .rodata.SD_Driver - 0x0800ac64 0x14 build/sd_diskio.o - 0x0800ac64 SD_Driver + 0x0800b264 0x14 build/sd_diskio.o + 0x0800b264 SD_Driver .rodata.APBPrescTable - 0x0800ac78 0x8 build/system_stm32f7xx.o - 0x0800ac78 APBPrescTable + 0x0800b278 0x8 build/system_stm32f7xx.o + 0x0800b278 APBPrescTable .rodata.AHBPrescTable - 0x0800ac80 0x10 build/system_stm32f7xx.o - 0x0800ac80 AHBPrescTable + 0x0800b280 0x10 build/system_stm32f7xx.o + 0x0800b280 AHBPrescTable .rodata.Read_File.str1.4 - 0x0800ac90 0xbb build/File_Handling.o + 0x0800b290 0xbb build/File_Handling.o .rodata.Seek_Read_File.str1.4 - 0x0800ac90 0x27 build/File_Handling.o + 0x0800b290 0x27 build/File_Handling.o .rodata.Remove_File.str1.4 - 0x0800ac90 0x64 build/File_Handling.o + 0x0800b290 0x64 build/File_Handling.o .rodata.create_name.str1.4 - 0x0800ac90 0xf build/ff.o - .rodata.ExCvt 0x0800ac90 0x80 build/ff.o + 0x0800b290 0xf build/ff.o + .rodata.ExCvt 0x0800b290 0x80 build/ff.o .rodata.str1.4 - 0x0800ad10 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) + 0x0800b310 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) .rodata.str1.4 - 0x0800ad10 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) - 0x0800ad4c . = ALIGN (0x4) + 0x0800b310 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) + 0x0800b34c . = ALIGN (0x4) .ARM.extab *(.ARM.extab* .gnu.linkonce.armextab.*) -.ARM 0x0800ad10 0x8 - 0x0800ad10 __exidx_start = . +.ARM 0x0800b310 0x8 + 0x0800b310 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x0800ad10 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) - .ARM.exidx 0x0800ad18 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) + .ARM.exidx 0x0800b310 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) + .ARM.exidx 0x0800b318 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) 0x8 (size before relaxing) - .ARM.exidx 0x0800ad18 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) + .ARM.exidx 0x0800b318 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) 0x8 (size before relaxing) - 0x0800ad18 __exidx_end = . + 0x0800b318 __exidx_end = . -.rel.dyn 0x0800ad18 0x0 - .rel.iplt 0x0800ad18 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o +.rel.dyn 0x0800b318 0x0 + .rel.iplt 0x0800b318 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o -.preinit_array 0x0800ad18 0x0 - 0x0800ad18 PROVIDE (__preinit_array_start = .) +.preinit_array 0x0800b318 0x0 + 0x0800b318 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x0800ad18 PROVIDE (__preinit_array_end = .) + 0x0800b318 PROVIDE (__preinit_array_end = .) -.init_array 0x0800ad18 0x4 - 0x0800ad18 PROVIDE (__init_array_start = .) +.init_array 0x0800b318 0x4 + 0x0800b318 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x0800ad18 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o - 0x0800ad1c PROVIDE (__init_array_end = .) + .init_array 0x0800b318 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + 0x0800b31c PROVIDE (__init_array_end = .) -.fini_array 0x0800ad1c 0x4 - 0x0800ad1c PROVIDE (__fini_array_start = .) +.fini_array 0x0800b31c 0x4 + 0x0800b31c PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0800ad1c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o - 0x0800ad20 PROVIDE (__fini_array_end = .) - 0x0800ad20 _sidata = LOADADDR (.data) + .fini_array 0x0800b31c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + 0x0800b320 PROVIDE (__fini_array_end = .) + 0x0800b320 _sidata = LOADADDR (.data) -.data 0x20000000 0x5c load address 0x0800ad20 +.data 0x20000000 0x5c load address 0x0800b320 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -3098,17 +3114,17 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x2000005c _edata = . .tm_clone_table - 0x2000005c 0x0 load address 0x0800ad7c + 0x2000005c 0x0 load address 0x0800b37c .tm_clone_table 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o .tm_clone_table 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o -.igot.plt 0x2000005c 0x0 load address 0x0800ad7c +.igot.plt 0x2000005c 0x0 load address 0x0800b37c .igot.plt 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o 0x2000005c . = ALIGN (0x4) -.bss 0x2000005c 0x266c load address 0x0800ad7c +.bss 0x2000005c 0x266c load address 0x0800b37c 0x2000005c _sbss = . 0x2000005c __bss_start__ = _sbss *(.bss) @@ -3284,7 +3300,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x200026c8 __bss_end__ = _ebss ._user_heap_stack - 0x200026c8 0x6000 load address 0x0800ad7c + 0x200026c8 0x6000 load address 0x0800b37c 0x200026c8 . = ALIGN (0x8) [!provide] PROVIDE (end = .) 0x200026c8 PROVIDE (_end = .) @@ -3477,458 +3493,458 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o -.debug_info 0x00000000 0x3a793 - .debug_info 0x00000000 0x818e build/main.o - .debug_info 0x0000818e 0xe39 build/bsp_driver_sd.o - .debug_info 0x00008fc7 0x74a build/sd_diskio.o - .debug_info 0x00009711 0x65a build/fatfs.o - .debug_info 0x00009d6b 0x1f0 build/fatfs_platform.o - .debug_info 0x00009f5b 0x1925 build/stm32f7xx_it.o - .debug_info 0x0000b880 0x23e6 build/stm32f7xx_hal_msp.o - .debug_info 0x0000dc66 0xfb5 build/stm32f7xx_hal_adc.o - .debug_info 0x0000ec1b 0xd39 build/stm32f7xx_hal_adc_ex.o - .debug_info 0x0000f954 0xd0b build/stm32f7xx_hal_rcc.o - .debug_info 0x0001065f 0x96b build/stm32f7xx_hal_rcc_ex.o - .debug_info 0x00010fca 0x867 build/stm32f7xx_hal_gpio.o - .debug_info 0x00011831 0xb00 build/stm32f7xx_hal_pwr_ex.o - .debug_info 0x00012331 0x145b build/stm32f7xx_hal_cortex.o - .debug_info 0x0001378c 0xc0b build/stm32f7xx_hal.o - .debug_info 0x00014397 0x1d6b build/stm32f7xx_ll_rcc.o - .debug_info 0x00016102 0xda5 build/stm32f7xx_ll_gpio.o - .debug_info 0x00016ea7 0x1ad6 build/stm32f7xx_ll_sdmmc.o - .debug_info 0x0001897d 0x2a28 build/stm32f7xx_hal_sd.o - .debug_info 0x0001b3a5 0xb14 build/stm32f7xx_ll_spi.o - .debug_info 0x0001beb9 0x42a3 build/stm32f7xx_hal_tim.o - .debug_info 0x0002015c 0x2009 build/stm32f7xx_hal_tim_ex.o - .debug_info 0x00022165 0x19f0 build/stm32f7xx_ll_tim.o - .debug_info 0x00023b55 0xc07 build/stm32f7xx_ll_usart.o - .debug_info 0x0002475c 0x7ea build/system_stm32f7xx.o - .debug_info 0x00024f46 0x1ef6 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build/diskio.o + .debug_frame 0x000039e4 0x7bc build/ff.o + .debug_frame 0x000041a0 0x7c build/ff_gen_drv.o + .debug_frame 0x0000421c 0x28 build/sysmem.o + .debug_frame 0x00004244 0x608 build/stm32f7xx_hal_uart.o + .debug_frame 0x0000484c 0x78 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o) + .debug_frame 0x000048c4 0x98 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) + .debug_frame 0x0000495c 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o) + .debug_frame 0x00004988 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memset.o) + .debug_frame 0x000049b4 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o) + .debug_frame 0x000049d4 0x50 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o) + .debug_frame 0x00004a24 0x58 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o) + .debug_frame 0x00004a7c 0x40 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memmove.o) + .debug_frame 0x00004abc 0x30 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o) + .debug_frame 0x00004aec 0x38 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o) + .debug_frame 0x00004b24 0x6c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) + .debug_frame 0x00004b90 0x30 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mlock.o) + .debug_frame 0x00004bc0 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o) + .debug_frame 0x00004bec 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o) + .debug_frame 0x00004c0c 0xf4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) + .debug_frame 0x00004d00 0x40 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o) + .debug_frame 0x00004d40 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_frame 0x00004d6c 0x34 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) .debug_loclists 0x00000000 0x2087 diff --git a/build/diskio.lst b/build/diskio.lst index 7960ca0..df2d7cd 100644 --- a/build/diskio.lst +++ b/build/diskio.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccNpyRnY.s page 1 +ARM GAS /tmp/cckyLcZT.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1 28:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private function prototypes -----------------------------------------------*/ 29:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private functions ---------------------------------------------------------*/ 30:Middlewares/Third_Party/FatFs/src/diskio.c **** - ARM GAS /tmp/ccNpyRnY.s page 2 + ARM GAS /tmp/cckyLcZT.s page 2 31:Middlewares/Third_Party/FatFs/src/diskio.c **** /** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1 71 disk_initialize: 72 .LVL3: 73 .LFB1184: - ARM GAS /tmp/ccNpyRnY.s page 3 + ARM GAS /tmp/cckyLcZT.s page 3 45:Middlewares/Third_Party/FatFs/src/diskio.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1 62:Middlewares/Third_Party/FatFs/src/diskio.c **** return stat; 111 .loc 1 62 3 is_stmt 1 view .LVU23 63:Middlewares/Third_Party/FatFs/src/diskio.c **** } - ARM GAS /tmp/ccNpyRnY.s page 4 + ARM GAS /tmp/cckyLcZT.s page 4 112 .loc 1 63 1 is_stmt 0 view .LVU24 @@ -238,7 +238,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1 80:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT res; 150 .loc 1 80 3 is_stmt 1 view .LVU29 81:Middlewares/Third_Party/FatFs/src/diskio.c **** - ARM GAS /tmp/ccNpyRnY.s page 5 + ARM GAS /tmp/cckyLcZT.s page 5 82:Middlewares/Third_Party/FatFs/src/diskio.c **** res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count); @@ -298,7 +298,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1 187 @ args = 0, pretend = 0, frame = 0 188 @ frame_needed = 0, uses_anonymous_args = 0 189 .loc 1 101 1 is_stmt 0 view .LVU38 - ARM GAS /tmp/ccNpyRnY.s page 6 + ARM GAS /tmp/cckyLcZT.s page 6 190 0000 38B5 push {r3, r4, r5, lr} @@ -358,7 +358,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1 116:Middlewares/Third_Party/FatFs/src/diskio.c **** #if _USE_IOCTL == 1 117:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT disk_ioctl ( 118:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE pdrv, /* Physical drive nmuber (0..) */ - ARM GAS /tmp/ccNpyRnY.s page 7 + ARM GAS /tmp/cckyLcZT.s page 7 119:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE cmd, /* Control code */ @@ -418,7 +418,7 @@ ARM GAS /tmp/ccNpyRnY.s page 1 131:Middlewares/Third_Party/FatFs/src/diskio.c **** * @brief Gets Time from RTC 132:Middlewares/Third_Party/FatFs/src/diskio.c **** * @param None 133:Middlewares/Third_Party/FatFs/src/diskio.c **** * @retval Time in DWORD - ARM GAS /tmp/ccNpyRnY.s page 8 + ARM GAS /tmp/cckyLcZT.s page 8 134:Middlewares/Third_Party/FatFs/src/diskio.c **** */ @@ -446,28 +446,28 @@ ARM GAS /tmp/ccNpyRnY.s page 1 294 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 295 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 296 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" - ARM GAS /tmp/ccNpyRnY.s page 9 + ARM GAS /tmp/cckyLcZT.s page 9 DEFINED SYMBOLS *ABS*:00000000 diskio.c - /tmp/ccNpyRnY.s:20 .text.disk_status:00000000 $t - /tmp/ccNpyRnY.s:26 .text.disk_status:00000000 disk_status - /tmp/ccNpyRnY.s:60 .text.disk_status:00000014 $d - /tmp/ccNpyRnY.s:65 .text.disk_initialize:00000000 $t - /tmp/ccNpyRnY.s:71 .text.disk_initialize:00000000 disk_initialize - /tmp/ccNpyRnY.s:124 .text.disk_initialize:00000024 $d - /tmp/ccNpyRnY.s:129 .text.disk_read:00000000 $t - /tmp/ccNpyRnY.s:135 .text.disk_read:00000000 disk_read - /tmp/ccNpyRnY.s:171 .text.disk_read:00000014 $d - /tmp/ccNpyRnY.s:176 .text.disk_write:00000000 $t - /tmp/ccNpyRnY.s:182 .text.disk_write:00000000 disk_write - /tmp/ccNpyRnY.s:218 .text.disk_write:00000014 $d - /tmp/ccNpyRnY.s:223 .text.disk_ioctl:00000000 $t - /tmp/ccNpyRnY.s:229 .text.disk_ioctl:00000000 disk_ioctl - /tmp/ccNpyRnY.s:263 .text.disk_ioctl:00000014 $d - /tmp/ccNpyRnY.s:268 .text.get_fattime:00000000 $t - /tmp/ccNpyRnY.s:274 .text.get_fattime:00000000 get_fattime + /tmp/cckyLcZT.s:20 .text.disk_status:00000000 $t + /tmp/cckyLcZT.s:26 .text.disk_status:00000000 disk_status + /tmp/cckyLcZT.s:60 .text.disk_status:00000014 $d + /tmp/cckyLcZT.s:65 .text.disk_initialize:00000000 $t + /tmp/cckyLcZT.s:71 .text.disk_initialize:00000000 disk_initialize + /tmp/cckyLcZT.s:124 .text.disk_initialize:00000024 $d + /tmp/cckyLcZT.s:129 .text.disk_read:00000000 $t + /tmp/cckyLcZT.s:135 .text.disk_read:00000000 disk_read + /tmp/cckyLcZT.s:171 .text.disk_read:00000014 $d + /tmp/cckyLcZT.s:176 .text.disk_write:00000000 $t + /tmp/cckyLcZT.s:182 .text.disk_write:00000000 disk_write + /tmp/cckyLcZT.s:218 .text.disk_write:00000014 $d + /tmp/cckyLcZT.s:223 .text.disk_ioctl:00000000 $t + /tmp/cckyLcZT.s:229 .text.disk_ioctl:00000000 disk_ioctl + /tmp/cckyLcZT.s:263 .text.disk_ioctl:00000014 $d + /tmp/cckyLcZT.s:268 .text.get_fattime:00000000 $t + /tmp/cckyLcZT.s:274 .text.get_fattime:00000000 get_fattime UNDEFINED SYMBOLS disk diff --git a/build/diskio.o b/build/diskio.o index fabe734..a4c4aca 100644 Binary files a/build/diskio.o and b/build/diskio.o differ diff --git a/build/fatfs.lst b/build/fatfs.lst index 8fc8cb4..510b14b 100644 --- a/build/fatfs.lst +++ b/build/fatfs.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccgsRqtI.s page 1 +ARM GAS /tmp/ccFLcHcr.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccgsRqtI.s page 1 29:Src/fatfs.c **** 30:Src/fatfs.c **** void MX_FATFS_Init(void) 31:Src/fatfs.c **** { - ARM GAS /tmp/ccgsRqtI.s page 2 + ARM GAS /tmp/ccFLcHcr.s page 2 28 .loc 1 31 1 view -0 @@ -118,7 +118,7 @@ ARM GAS /tmp/ccgsRqtI.s page 1 69 @ frame_needed = 0, uses_anonymous_args = 0 70 @ link register save eliminated. 47:Src/fatfs.c **** /* USER CODE BEGIN get_fattime */ - ARM GAS /tmp/ccgsRqtI.s page 3 + ARM GAS /tmp/ccFLcHcr.s page 3 48:Src/fatfs.c **** return 0; @@ -169,24 +169,24 @@ ARM GAS /tmp/ccgsRqtI.s page 1 114 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 115 .file 10 "Inc/sd_diskio.h" 116 .file 11 "Inc/fatfs.h" - ARM GAS /tmp/ccgsRqtI.s page 4 + ARM GAS /tmp/ccFLcHcr.s page 4 DEFINED SYMBOLS *ABS*:00000000 fatfs.c - /tmp/ccgsRqtI.s:20 .text.MX_FATFS_Init:00000000 $t - /tmp/ccgsRqtI.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init - /tmp/ccgsRqtI.s:51 .text.MX_FATFS_Init:00000010 $d - /tmp/ccgsRqtI.s:97 .bss.SDPath:00000000 SDPath - /tmp/ccgsRqtI.s:103 .bss.retSD:00000000 retSD - /tmp/ccgsRqtI.s:58 .text.get_fattime:00000000 $t - /tmp/ccgsRqtI.s:64 .text.get_fattime:00000000 get_fattime - /tmp/ccgsRqtI.s:83 .bss.SDFile:00000000 SDFile - /tmp/ccgsRqtI.s:80 .bss.SDFile:00000000 $d - /tmp/ccgsRqtI.s:90 .bss.SDFatFS:00000000 SDFatFS - /tmp/ccgsRqtI.s:87 .bss.SDFatFS:00000000 $d - /tmp/ccgsRqtI.s:94 .bss.SDPath:00000000 $d - /tmp/ccgsRqtI.s:104 .bss.retSD:00000000 $d + /tmp/ccFLcHcr.s:20 .text.MX_FATFS_Init:00000000 $t + /tmp/ccFLcHcr.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init + /tmp/ccFLcHcr.s:51 .text.MX_FATFS_Init:00000010 $d + /tmp/ccFLcHcr.s:97 .bss.SDPath:00000000 SDPath + /tmp/ccFLcHcr.s:103 .bss.retSD:00000000 retSD + /tmp/ccFLcHcr.s:58 .text.get_fattime:00000000 $t + /tmp/ccFLcHcr.s:64 .text.get_fattime:00000000 get_fattime + /tmp/ccFLcHcr.s:83 .bss.SDFile:00000000 SDFile + /tmp/ccFLcHcr.s:80 .bss.SDFile:00000000 $d + /tmp/ccFLcHcr.s:90 .bss.SDFatFS:00000000 SDFatFS + /tmp/ccFLcHcr.s:87 .bss.SDFatFS:00000000 $d + /tmp/ccFLcHcr.s:94 .bss.SDPath:00000000 $d + /tmp/ccFLcHcr.s:104 .bss.retSD:00000000 $d UNDEFINED SYMBOLS FATFS_LinkDriver diff --git a/build/fatfs.o b/build/fatfs.o index 0f7e425..d7e9a71 100644 Binary files a/build/fatfs.o and b/build/fatfs.o differ diff --git a/build/ff.lst b/build/ff.lst index 69cf08a..ba7d1fd 100644 --- a/build/ff.lst +++ b/build/ff.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cc2SVLkL.s page 1 +ARM GAS /tmp/ccH7dUYB.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 29:Middlewares/Third_Party/FatFs/src/ff.c **** ---------------------------------------------------------------------------*/ 30:Middlewares/Third_Party/FatFs/src/ff.c **** 31:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FATFS != 68300 /* Revision ID */ - ARM GAS /tmp/cc2SVLkL.s page 2 + ARM GAS /tmp/ccH7dUYB.s page 2 32:Middlewares/Third_Party/FatFs/src/ff.c **** #error Wrong include file (ff.h). @@ -118,7 +118,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 86:Middlewares/Third_Party/FatFs/src/ff.c **** #define _DF1S 0 87:Middlewares/Third_Party/FatFs/src/ff.c **** #define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ 88:Middlewares/Third_Party/FatFs/src/ff.c **** 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - ARM GAS /tmp/cc2SVLkL.s page 3 + ARM GAS /tmp/ccH7dUYB.s page 3 89:Middlewares/Third_Party/FatFs/src/ff.c **** 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ @@ -178,7 +178,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 143:Middlewares/Third_Party/FatFs/src/ff.c **** 0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0xAC, \ 144:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF, \ 145:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \ - ARM GAS /tmp/cc2SVLkL.s page 4 + ARM GAS /tmp/ccH7dUYB.s page 4 146:Middlewares/Third_Party/FatFs/src/ff.c **** 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ @@ -238,7 +238,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 200:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ 201:Middlewares/Third_Party/FatFs/src/ff.c **** 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ 202:Middlewares/Third_Party/FatFs/src/ff.c **** 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - ARM GAS /tmp/cc2SVLkL.s page 5 + ARM GAS /tmp/ccH7dUYB.s page 5 203:Middlewares/Third_Party/FatFs/src/ff.c **** 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ @@ -298,7 +298,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 257:Middlewares/Third_Party/FatFs/src/ff.c **** 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xA4,0xA5,0xA6,0xD9,0xDA,0xDB,0xDC,0xA7,0xA8,0xDF, \ 258:Middlewares/Third_Party/FatFs/src/ff.c **** 0xA9,0xAA,0xAC,0xAD,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xCF,0xCF,0xD0,0xEF, \ 259:Middlewares/Third_Party/FatFs/src/ff.c **** 0xF0,0xF1,0xD1,0xD2,0xD3,0xF5,0xD4,0xF7,0xF8,0xF9,0xD5,0x96,0x95,0x98,0xFE,0xFF} - ARM GAS /tmp/cc2SVLkL.s page 6 + ARM GAS /tmp/ccH7dUYB.s page 6 260:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -358,7 +358,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 314:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LOSS 0x01 /* Out of 8.3 format */ 315:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LFN 0x02 /* Force to create LFN entry */ 316:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LAST 0x04 /* Last segment */ - ARM GAS /tmp/cc2SVLkL.s page 7 + ARM GAS /tmp/ccH7dUYB.s page 7 317:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_BODY 0x08 /* Lower case flag (body) */ @@ -418,7 +418,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 371:Middlewares/Third_Party/FatFs/src/ff.c **** #define BS_BootCode32 90 /* FAT32: Boot code (420-byte) */ 372:Middlewares/Third_Party/FatFs/src/ff.c **** 373:Middlewares/Third_Party/FatFs/src/ff.c **** #define BPB_ZeroedEx 11 /* exFAT: MBZ field (53-byte) */ - ARM GAS /tmp/cc2SVLkL.s page 8 + ARM GAS /tmp/ccH7dUYB.s page 8 374:Middlewares/Third_Party/FatFs/src/ff.c **** #define BPB_VolOfsEx 64 /* exFAT: Volume offset from top of the drive [sector] (QWORD) */ @@ -478,7 +478,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 428:Middlewares/Third_Party/FatFs/src/ff.c **** #define XDIR_FileSize 56 /* exFAT: File/Directory size (QWORD) */ 429:Middlewares/Third_Party/FatFs/src/ff.c **** 430:Middlewares/Third_Party/FatFs/src/ff.c **** #define SZDIRE 32 /* Size of a directory entry */ - ARM GAS /tmp/cc2SVLkL.s page 9 + ARM GAS /tmp/ccH7dUYB.s page 9 431:Middlewares/Third_Party/FatFs/src/ff.c **** #define DDEM 0xE5 /* Deleted directory entry mark set to DIR_Name[0] */ @@ -538,7 +538,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 485:Middlewares/Third_Party/FatFs/src/ff.c **** #if _MAX_SS == _MIN_SS 486:Middlewares/Third_Party/FatFs/src/ff.c **** #define SS(fs) ((UINT)_MAX_SS) /* Fixed sector size */ 487:Middlewares/Third_Party/FatFs/src/ff.c **** #else - ARM GAS /tmp/cc2SVLkL.s page 10 + ARM GAS /tmp/ccH7dUYB.s page 10 488:Middlewares/Third_Party/FatFs/src/ff.c **** #define SS(fs) ((fs)->ssize) /* Variable sector size */ @@ -598,7 +598,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 542:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 543:Middlewares/Third_Party/FatFs/src/ff.c **** 544:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN == 0 /* Non-LFN configuration */ - ARM GAS /tmp/cc2SVLkL.s page 11 + ARM GAS /tmp/ccH7dUYB.s page 11 545:Middlewares/Third_Party/FatFs/src/ff.c **** #define DEF_NAMBUF @@ -658,7 +658,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 599:Middlewares/Third_Party/FatFs/src/ff.c **** 600:Middlewares/Third_Party/FatFs/src/ff.c **** 601:Middlewares/Third_Party/FatFs/src/ff.c **** /*-------------------------------------------------------------------------- - ARM GAS /tmp/cc2SVLkL.s page 12 + ARM GAS /tmp/ccH7dUYB.s page 12 602:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -718,7 +718,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 61 .cfi_startproc 62 @ args = 0, pretend = 0, frame = 0 63 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/cc2SVLkL.s page 13 + ARM GAS /tmp/ccH7dUYB.s page 13 64 @ link register save eliminated. @@ -778,7 +778,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 641:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[6]; 642:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[5]; 643:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[4]; - ARM GAS /tmp/cc2SVLkL.s page 14 + ARM GAS /tmp/ccH7dUYB.s page 14 644:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[3]; @@ -838,7 +838,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 140 0000 0170 strb r1, [r0] 141 .loc 1 663 22 is_stmt 1 view .LVU35 142 .LVL13: - ARM GAS /tmp/cc2SVLkL.s page 15 + ARM GAS /tmp/ccH7dUYB.s page 15 664:Middlewares/Third_Party/FatFs/src/ff.c **** *ptr++ = (BYTE)val; val >>= 8; @@ -898,7 +898,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 686:Middlewares/Third_Party/FatFs/src/ff.c **** 687:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 688:Middlewares/Third_Party/FatFs/src/ff.c **** /* String functions */ - ARM GAS /tmp/cc2SVLkL.s page 16 + ARM GAS /tmp/ccH7dUYB.s page 16 689:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ @@ -958,7 +958,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 219 mem_set: 220 .LFB1188: 703:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 17 + ARM GAS /tmp/ccH7dUYB.s page 17 704:Middlewares/Third_Party/FatFs/src/ff.c **** /* Fill memory block */ @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 718:Middlewares/Third_Party/FatFs/src/ff.c **** int r = 0; 263 .loc 1 718 2 view .LVU72 264 .L12: - ARM GAS /tmp/cc2SVLkL.s page 18 + ARM GAS /tmp/ccH7dUYB.s page 18 719:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 309 .loc 1 730 2 is_stmt 1 view .LVU85 310 .loc 1 730 8 is_stmt 0 view .LVU86 311 0002 00E0 b .L14 - ARM GAS /tmp/cc2SVLkL.s page 19 + ARM GAS /tmp/ccH7dUYB.s page 19 312 .LVL33: @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 756:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs && res != FR_NOT_ENABLED && res != FR_INVALID_DRIVE && res != FR_TIMEOUT) { 757:Middlewares/Third_Party/FatFs/src/ff.c **** ff_rel_grant(fs->sobj); 758:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 20 + ARM GAS /tmp/ccH7dUYB.s page 20 759:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 369 000e 0133 adds r3, r3, #1 370 .LVL39: 371 .L18: - ARM GAS /tmp/cc2SVLkL.s page 21 + ARM GAS /tmp/ccH7dUYB.s page 21 779:Middlewares/Third_Party/FatFs/src/ff.c **** if (Files[i].fs) { /* Existing entry */ @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 410 0040 022B cmp r3, #2 411 0042 0BD0 beq .L30 789:Middlewares/Third_Party/FatFs/src/ff.c **** return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new objec - ARM GAS /tmp/cc2SVLkL.s page 22 + ARM GAS /tmp/ccH7dUYB.s page 22 790:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 455 .loc 1 789 35 discriminator 2 view .LVU131 456 006c 1220 movs r0, #18 457 .LVL46: - ARM GAS /tmp/cc2SVLkL.s page 23 + ARM GAS /tmp/ccH7dUYB.s page 23 789:Middlewares/Third_Party/FatFs/src/ff.c **** return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new objec @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 501 .LVL52: 502 .L37: 503 .loc 1 802 44 is_stmt 1 discriminator 4 view .LVU142 - ARM GAS /tmp/cc2SVLkL.s page 24 + ARM GAS /tmp/ccH7dUYB.s page 24 504 0004 0130 adds r0, r0, #1 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 550 0000 70B4 push {r4, r5, r6} 551 .LCFI3: 552 .cfi_def_cfa_offset 12 - ARM GAS /tmp/cc2SVLkL.s page 25 + ARM GAS /tmp/ccH7dUYB.s page 25 553 .cfi_offset 4, -12 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 598 0030 9442 cmp r4, r2 599 0032 E8D1 bne .L42 600 .L43: - ARM GAS /tmp/cc2SVLkL.s page 26 + ARM GAS /tmp/ccH7dUYB.s page 26 820:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 636 .LVL63: 823:Middlewares/Third_Party/FatFs/src/ff.c **** for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ; 637 .loc 1 823 45 is_stmt 0 discriminator 4 view .LVU180 - ARM GAS /tmp/cc2SVLkL.s page 27 + ARM GAS /tmp/ccH7dUYB.s page 27 638 005a F7E7 b .L45 @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 680 0088 01EB0311 add r1, r1, r3, lsl #4 681 008c 8A81 strh r2, [r1, #12] @ movhi 834:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 28 + ARM GAS /tmp/ccH7dUYB.s page 28 835:Middlewares/Third_Party/FatFs/src/ff.c **** return i + 1; @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 726 @ args = 0, pretend = 0, frame = 0 727 @ frame_needed = 0, uses_anonymous_args = 0 728 @ link register save eliminated. - ARM GAS /tmp/cc2SVLkL.s page 29 + ARM GAS /tmp/ccH7dUYB.s page 29 844:Middlewares/Third_Party/FatFs/src/ff.c **** WORD n; @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 772 0026 33B9 cbnz r3, .L65 773 .L62: 774 .LVL74: - ARM GAS /tmp/cc2SVLkL.s page 30 + ARM GAS /tmp/ccH7dUYB.s page 30 775 .loc 1 853 15 is_stmt 1 discriminator 1 view .LVU224 @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 817 @ args = 0, pretend = 0, frame = 0 818 @ frame_needed = 0, uses_anonymous_args = 0 819 @ link register save eliminated. - ARM GAS /tmp/cc2SVLkL.s page 31 + ARM GAS /tmp/ccH7dUYB.s page 31 867:Middlewares/Third_Party/FatFs/src/ff.c **** UINT i; @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 860 .loc 1 870 38 is_stmt 0 discriminator 1 view .LVU245 861 001c 1A01 lsls r2, r3, #4 862 001e 0024 movs r4, #0 - ARM GAS /tmp/cc2SVLkL.s page 32 + ARM GAS /tmp/ccH7dUYB.s page 32 863 0020 8C50 str r4, [r1, r2] @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 884:Middlewares/Third_Party/FatFs/src/ff.c **** FATFS* fs /* File system object */ 885:Middlewares/Third_Party/FatFs/src/ff.c **** ) 886:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/cc2SVLkL.s page 33 + ARM GAS /tmp/ccH7dUYB.s page 33 887:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD wsect; @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 941:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 942:Middlewares/Third_Party/FatFs/src/ff.c **** 943:Middlewares/Third_Party/FatFs/src/ff.c **** static - ARM GAS /tmp/cc2SVLkL.s page 34 + ARM GAS /tmp/ccH7dUYB.s page 34 944:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT sync_fs ( /* FR_OK:succeeded, !=0:error */ @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 989:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst >= fs->n_fatent - 2) return 0; /* Invalid cluster# */ 911 .loc 1 989 2 is_stmt 1 view .LVU255 912 .loc 1 989 16 is_stmt 0 view .LVU256 - ARM GAS /tmp/cc2SVLkL.s page 35 + ARM GAS /tmp/ccH7dUYB.s page 35 913 0002 8369 ldr r3, [r0, #24] @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1011:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst < 2 || clst >= fs->n_fatent) { /* Check if in valid range */ 1012:Middlewares/Third_Party/FatFs/src/ff.c **** val = 1; /* Internal error */ 1013:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 36 + ARM GAS /tmp/ccH7dUYB.s page 36 1014:Middlewares/Third_Party/FatFs/src/ff.c **** } else { @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1068:Middlewares/Third_Party/FatFs/src/ff.c **** 1069:Middlewares/Third_Party/FatFs/src/ff.c **** return val; 1070:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 37 + ARM GAS /tmp/ccH7dUYB.s page 37 1071:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1125:Middlewares/Third_Party/FatFs/src/ff.c **** break; 1126:Middlewares/Third_Party/FatFs/src/ff.c **** } 1127:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 38 + ARM GAS /tmp/ccH7dUYB.s page 38 1128:Middlewares/Third_Party/FatFs/src/ff.c **** return res; @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1182:Middlewares/Third_Party/FatFs/src/ff.c **** /*----------------------------------------*/ 1183:Middlewares/Third_Party/FatFs/src/ff.c **** /* Set/Clear a block of allocation bitmap */ 1184:Middlewares/Third_Party/FatFs/src/ff.c **** /*----------------------------------------*/ - ARM GAS /tmp/cc2SVLkL.s page 39 + ARM GAS /tmp/ccH7dUYB.s page 39 1185:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1239:Middlewares/Third_Party/FatFs/src/ff.c **** 1240:Middlewares/Third_Party/FatFs/src/ff.c **** 1241:Middlewares/Third_Party/FatFs/src/ff.c **** /*---------------------------------------------*/ - ARM GAS /tmp/cc2SVLkL.s page 40 + ARM GAS /tmp/ccH7dUYB.s page 40 1242:Middlewares/Third_Party/FatFs/src/ff.c **** /* Fill the last fragment of the FAT chain */ @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1296:Middlewares/Third_Party/FatFs/src/ff.c **** do { 1297:Middlewares/Third_Party/FatFs/src/ff.c **** nxt = get_fat(obj, clst); /* Get cluster status */ 1298:Middlewares/Third_Party/FatFs/src/ff.c **** if (nxt == 0) break; /* Empty cluster? */ - ARM GAS /tmp/cc2SVLkL.s page 41 + ARM GAS /tmp/ccH7dUYB.s page 41 1299:Middlewares/Third_Party/FatFs/src/ff.c **** if (nxt == 1) return FR_INT_ERR; /* Internal error? */ @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1353:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD clst /* Cluster# to stretch, 0:Create a new chain */ 1354:Middlewares/Third_Party/FatFs/src/ff.c **** ) 1355:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/cc2SVLkL.s page 42 + ARM GAS /tmp/ccH7dUYB.s page 42 1356:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD cs, ncl, scl; @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1410:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */ 1411:Middlewares/Third_Party/FatFs/src/ff.c **** } 1412:Middlewares/Third_Party/FatFs/src/ff.c **** res = put_fat(fs, ncl, 0xFFFFFFFF); /* Mark the new cluster 'EOC' */ - ARM GAS /tmp/cc2SVLkL.s page 43 + ARM GAS /tmp/ccH7dUYB.s page 43 1413:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && clst != 0) { @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 963 .loc 1 1450 2 is_stmt 1 view .LVU272 964 .loc 1 1450 21 is_stmt 0 view .LVU273 965 0006 9089 ldrh r0, [r2, #12] - ARM GAS /tmp/cc2SVLkL.s page 44 + ARM GAS /tmp/ccH7dUYB.s page 44 966 .LVL92: @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1005 .LVL100: 1006 .loc 1 1457 12 view .LVU292 1007 0022 0844 add r0, r0, r1 - ARM GAS /tmp/cc2SVLkL.s page 45 + ARM GAS /tmp/ccH7dUYB.s page 45 1008 .L86: @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1499:Middlewares/Third_Party/FatFs/src/ff.c **** ofs -= csz; 1500:Middlewares/Third_Party/FatFs/src/ff.c **** } 1501:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = clust2sect(fs, clst); - ARM GAS /tmp/cc2SVLkL.s page 46 + ARM GAS /tmp/ccH7dUYB.s page 46 1502:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1556:Middlewares/Third_Party/FatFs/src/ff.c **** if (_FS_EXFAT) dp->obj.stat |= 4; /* The directory needs to be updated */ 1557:Middlewares/Third_Party/FatFs/src/ff.c **** if (sync_window(fs) != FR_OK) return FR_DISK_ERR; /* Flush disk access window */ 1558:Middlewares/Third_Party/FatFs/src/ff.c **** mem_set(fs->win, 0, SS(fs)); /* Clear window buffer */ - ARM GAS /tmp/cc2SVLkL.s page 47 + ARM GAS /tmp/ccH7dUYB.s page 47 1559:Middlewares/Third_Party/FatFs/src/ff.c **** for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) { /* Fill t @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1613:Middlewares/Third_Party/FatFs/src/ff.c **** } 1614:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_next(dp, 1); 1615:Middlewares/Third_Party/FatFs/src/ff.c **** } while (res == FR_OK); /* Next entry with table stretch enabled */ - ARM GAS /tmp/cc2SVLkL.s page 48 + ARM GAS /tmp/ccH7dUYB.s page 48 1616:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1052 .L91: 1641:Middlewares/Third_Party/FatFs/src/ff.c **** cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16; 1642:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 49 + ARM GAS /tmp/ccH7dUYB.s page 49 1643:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1090 .LCFI11: 1091 .cfi_def_cfa_offset 16 1092 .cfi_offset 4, -16 - ARM GAS /tmp/cc2SVLkL.s page 50 + ARM GAS /tmp/ccH7dUYB.s page 50 1093 .cfi_offset 5, -12 @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1666:Middlewares/Third_Party/FatFs/src/ff.c **** /*------------------------------------------------------------------------*/ 1667:Middlewares/Third_Party/FatFs/src/ff.c **** /* FAT-LFN: LFN handling */ 1668:Middlewares/Third_Party/FatFs/src/ff.c **** /*------------------------------------------------------------------------*/ - ARM GAS /tmp/cc2SVLkL.s page 51 + ARM GAS /tmp/ccH7dUYB.s page 51 1669:Middlewares/Third_Party/FatFs/src/ff.c **** static @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1723:Middlewares/Third_Party/FatFs/src/ff.c **** 1724:Middlewares/Third_Party/FatFs/src/ff.c **** i = ((dir[LDIR_Ord] & ~LLEF) - 1) * 13; /* Offset in the LFN buffer */ 1725:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 52 + ARM GAS /tmp/ccH7dUYB.s page 52 1726:Middlewares/Third_Party/FatFs/src/ff.c **** for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */ @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1780:Middlewares/Third_Party/FatFs/src/ff.c **** 1781:Middlewares/Third_Party/FatFs/src/ff.c **** 1782:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 53 + ARM GAS /tmp/ccH7dUYB.s page 53 1783:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 && !_FS_READONLY @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1837:Middlewares/Third_Party/FatFs/src/ff.c **** } 1838:Middlewares/Third_Party/FatFs/src/ff.c **** #endif /* _USE_LFN != 0 && !_FS_READONLY */ 1839:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 54 + ARM GAS /tmp/ccH7dUYB.s page 54 1840:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1894:Middlewares/Third_Party/FatFs/src/ff.c **** const WCHAR* name /* File name to be calculated */ 1895:Middlewares/Third_Party/FatFs/src/ff.c **** ) 1896:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/cc2SVLkL.s page 55 + ARM GAS /tmp/ccH7dUYB.s page 55 1897:Middlewares/Third_Party/FatFs/src/ff.c **** WCHAR chr; @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1951:Middlewares/Third_Party/FatFs/src/ff.c **** if ((si % SZDIRE) == 0) si += 2; /* Skip entry type field */ 1952:Middlewares/Third_Party/FatFs/src/ff.c **** w = ff_convert(ld_word(dirb + si), 0); /* Get a character and Unicode -> OEM */ 1953:Middlewares/Third_Party/FatFs/src/ff.c **** if (_DF1S && w >= 0x100) { /* Is it a double byte char? (always false at SBCS cfg) */ - ARM GAS /tmp/cc2SVLkL.s page 56 + ARM GAS /tmp/ccH7dUYB.s page 56 1954:Middlewares/Third_Party/FatFs/src/ff.c **** fno->fname[di++] = (char)(w >> 8); /* Put 1st byte of the DBC */ @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2008:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) return res; 2009:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(dp->obj.fs, dp->sect); 2010:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) return res; - ARM GAS /tmp/cc2SVLkL.s page 57 + ARM GAS /tmp/ccH7dUYB.s page 57 2011:Middlewares/Third_Party/FatFs/src/ff.c **** if (dp->dir[XDIR_Type] != 0xC1) return FR_INT_ERR; @@ -3418,7 +3418,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2065:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(dirb + XDIR_SetSum, xdir_sum(dirb)); 2066:Middlewares/Third_Party/FatFs/src/ff.c **** nent = dirb[XDIR_NumSec] + 1; 2067:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 58 + ARM GAS /tmp/ccH7dUYB.s page 58 2068:Middlewares/Third_Party/FatFs/src/ff.c **** /* Store the set of directory to the volume */ @@ -3478,7 +3478,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2122:Middlewares/Third_Party/FatFs/src/ff.c **** 2123:Middlewares/Third_Party/FatFs/src/ff.c **** 2124:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 59 + ARM GAS /tmp/ccH7dUYB.s page 59 2125:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_MINIMIZE <= 1 || _FS_RPATH >= 2 || _USE_LABEL || _FS_EXFAT @@ -3538,7 +3538,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2179:Middlewares/Third_Party/FatFs/src/ff.c **** ord = (c == ord && sum == dp->dir[LDIR_Chksum] && pick_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0 2180:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* An SFN entry is found */ 2181:Middlewares/Third_Party/FatFs/src/ff.c **** if (ord || sum != sum_sfn(dp->dir)) { /* Is there a valid LFN? */ - ARM GAS /tmp/cc2SVLkL.s page 60 + ARM GAS /tmp/ccH7dUYB.s page 60 2182:Middlewares/Third_Party/FatFs/src/ff.c **** dp->blk_ofs = 0xFFFFFFFF; /* It has no LFN. */ @@ -3598,7 +3598,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2236:Middlewares/Third_Party/FatFs/src/ff.c **** if (ff_wtoupper(ld_word(fs->dirbuf + di)) != ff_wtoupper(fs->lfnbuf[ni])) break; 2237:Middlewares/Third_Party/FatFs/src/ff.c **** } 2238:Middlewares/Third_Party/FatFs/src/ff.c **** if (nc == 0 && !fs->lfnbuf[ni]) break; /* Name matched? */ - ARM GAS /tmp/cc2SVLkL.s page 61 + ARM GAS /tmp/ccH7dUYB.s page 61 2239:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -3658,7 +3658,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2293:Middlewares/Third_Party/FatFs/src/ff.c **** DIR* dp /* Target directory with object name to be created */ 2294:Middlewares/Third_Party/FatFs/src/ff.c **** ) 2295:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/cc2SVLkL.s page 62 + ARM GAS /tmp/ccH7dUYB.s page 62 2296:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT res; @@ -3718,7 +3718,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2350:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_alloc(dp, nent); /* Allocate entries */ 2351:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && --nent) { /* Set LFN entry if needed */ 2352:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_sdi(dp, dp->dptr - nent * SZDIRE); - ARM GAS /tmp/cc2SVLkL.s page 63 + ARM GAS /tmp/ccH7dUYB.s page 63 2353:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { @@ -3778,7 +3778,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2407:Middlewares/Third_Party/FatFs/src/ff.c **** do { 2408:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(fs, dp->sect); 2409:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; - ARM GAS /tmp/cc2SVLkL.s page 64 + ARM GAS /tmp/ccH7dUYB.s page 64 2410:Middlewares/Third_Party/FatFs/src/ff.c **** /* Mark an entry 'deleted' */ @@ -3838,7 +3838,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1151 .loc 1 2450 2 view .LVU325 2451:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD tm; 1152 .loc 1 2451 2 view .LVU326 - ARM GAS /tmp/cc2SVLkL.s page 65 + ARM GAS /tmp/ccH7dUYB.s page 65 2452:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2495:Middlewares/Third_Party/FatFs/src/ff.c **** } 2496:Middlewares/Third_Party/FatFs/src/ff.c **** #if _LFN_UNICODE 2497:Middlewares/Third_Party/FatFs/src/ff.c **** if (IsDBCS1(c) && i != 8 && i != 11 && IsDBCS2(dp->dir[i])) { - ARM GAS /tmp/cc2SVLkL.s page 66 + ARM GAS /tmp/ccH7dUYB.s page 66 2498:Middlewares/Third_Party/FatFs/src/ff.c **** c = c << 8 | dp->dir[i++]; @@ -3958,7 +3958,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1189 .loc 1 2520 11 is_stmt 1 view .LVU340 1190 0022 0A2B cmp r3, #10 1191 0024 0ED8 bhi .L109 - ARM GAS /tmp/cc2SVLkL.s page 67 + ARM GAS /tmp/ccH7dUYB.s page 67 2521:Middlewares/Third_Party/FatFs/src/ff.c **** if (c == ' ') continue; /* Skip padding spaces */ @@ -4018,7 +4018,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1231 .loc 1 2527 16 view .LVU356 1232 0046 0023 movs r3, #0 1233 .LVL127: - ARM GAS /tmp/cc2SVLkL.s page 68 + ARM GAS /tmp/ccH7dUYB.s page 68 1234 .loc 1 2527 16 view .LVU357 @@ -4078,7 +4078,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1279 .align 1 1280 .syntax unified 1281 .thumb - ARM GAS /tmp/cc2SVLkL.s page 69 + ARM GAS /tmp/ccH7dUYB.s page 69 1282 .thumb_func @@ -4138,7 +4138,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2585:Middlewares/Third_Party/FatFs/src/ff.c **** if (!*pat && inf) return 1; /* (short circuit) */ 2586:Middlewares/Third_Party/FatFs/src/ff.c **** 2587:Middlewares/Third_Party/FatFs/src/ff.c **** do { - ARM GAS /tmp/cc2SVLkL.s page 70 + ARM GAS /tmp/ccH7dUYB.s page 70 2588:Middlewares/Third_Party/FatFs/src/ff.c **** pp = pat; np = nam; /* Top of pattern and name to match */ @@ -4198,7 +4198,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1306 0006 8A46 mov r10, r1 2623:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 /* LFN configuration */ 2624:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE b, cf; - ARM GAS /tmp/cc2SVLkL.s page 71 + ARM GAS /tmp/ccH7dUYB.s page 71 2625:Middlewares/Third_Party/FatFs/src/ff.c **** WCHAR w, *lfn; @@ -4258,7 +4258,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2679:Middlewares/Third_Party/FatFs/src/ff.c **** for (;;) { 2680:Middlewares/Third_Party/FatFs/src/ff.c **** w = lfn[si++]; /* Get an LFN character */ 2681:Middlewares/Third_Party/FatFs/src/ff.c **** if (!w) break; /* Break on end of the LFN */ - ARM GAS /tmp/cc2SVLkL.s page 72 + ARM GAS /tmp/ccH7dUYB.s page 72 2682:Middlewares/Third_Party/FatFs/src/ff.c **** if (w == ' ' || (w == '.' && si != di)) { /* Remove spaces and dots */ @@ -4318,7 +4318,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2736:Middlewares/Third_Party/FatFs/src/ff.c **** dp->fn[NSFLAG] = cf; /* SFN is created */ 2737:Middlewares/Third_Party/FatFs/src/ff.c **** 2738:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_OK; - ARM GAS /tmp/cc2SVLkL.s page 73 + ARM GAS /tmp/ccH7dUYB.s page 73 2739:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -4378,7 +4378,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2761:Middlewares/Third_Party/FatFs/src/ff.c **** } 2762:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 2763:Middlewares/Third_Party/FatFs/src/ff.c **** for (;;) { - ARM GAS /tmp/cc2SVLkL.s page 74 + ARM GAS /tmp/ccH7dUYB.s page 74 2764:Middlewares/Third_Party/FatFs/src/ff.c **** c = (BYTE)p[si++]; @@ -4438,7 +4438,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1360 .loc 1 2796 2 is_stmt 1 view .LVU400 1361 .loc 1 2796 5 is_stmt 0 view .LVU401 1362 0036 002D cmp r5, #0 - ARM GAS /tmp/cc2SVLkL.s page 75 + ARM GAS /tmp/ccH7dUYB.s page 75 1363 0038 44D0 beq .L125 @@ -4498,7 +4498,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2791:Middlewares/Third_Party/FatFs/src/ff.c **** sfn[i++] = c; 1404 .loc 1 2791 7 view .LVU419 1405 0066 192B cmp r3, #25 - ARM GAS /tmp/cc2SVLkL.s page 76 + ARM GAS /tmp/ccH7dUYB.s page 76 1406 0068 01D8 bhi .L120 @@ -4558,7 +4558,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1444 .loc 1 2770 3 is_stmt 1 view .LVU435 2770:Middlewares/Third_Party/FatFs/src/ff.c **** if (ni == 11 || c != '.') return FR_INVALID_NAME; /* Over size or invalid dot */ 1445 .loc 1 2770 6 is_stmt 0 view .LVU436 - ARM GAS /tmp/cc2SVLkL.s page 77 + ARM GAS /tmp/ccH7dUYB.s page 77 1446 0088 2E2C cmp r4, #46 @@ -4618,7 +4618,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2798:Middlewares/Third_Party/FatFs/src/ff.c **** sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */ 1487 .loc 1 2798 29 is_stmt 0 discriminator 1 view .LVU450 1488 00ae 0523 movs r3, #5 - ARM GAS /tmp/cc2SVLkL.s page 78 + ARM GAS /tmp/ccH7dUYB.s page 78 1489 00b0 89F82430 strb r3, [r9, #36] @@ -4678,7 +4678,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2813:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */ 2814:Middlewares/Third_Party/FatFs/src/ff.c **** DIR* dp, /* Directory object to return last directory and found object */ 2815:Middlewares/Third_Party/FatFs/src/ff.c **** const TCHAR* path /* Full-path string to find a file or directory */ - ARM GAS /tmp/cc2SVLkL.s page 79 + ARM GAS /tmp/ccH7dUYB.s page 79 2816:Middlewares/Third_Party/FatFs/src/ff.c **** ) @@ -4738,7 +4738,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2870:Middlewares/Third_Party/FatFs/src/ff.c **** break; 2871:Middlewares/Third_Party/FatFs/src/ff.c **** } 2872:Middlewares/Third_Party/FatFs/src/ff.c **** if (ns & NS_LAST) break; /* Last segment matched. Function completed. */ - ARM GAS /tmp/cc2SVLkL.s page 80 + ARM GAS /tmp/ccH7dUYB.s page 80 2873:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get into the sub-directory */ @@ -4798,7 +4798,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2916:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 2917:Middlewares/Third_Party/FatFs/src/ff.c **** 2918:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 81 + ARM GAS /tmp/ccH7dUYB.s page 81 2919:Middlewares/Third_Party/FatFs/src/ff.c **** if (*path) { /* If the pointer is not a null */ @@ -4858,7 +4858,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2940:Middlewares/Third_Party/FatFs/src/ff.c **** if (i < _VOLUMES) { /* If a drive id is found, get the value and strip it */ 2941:Middlewares/Third_Party/FatFs/src/ff.c **** vol = (int)i; 2942:Middlewares/Third_Party/FatFs/src/ff.c **** *path = tt; - ARM GAS /tmp/cc2SVLkL.s page 82 + ARM GAS /tmp/ccH7dUYB.s page 82 2943:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -4918,7 +4918,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2927:Middlewares/Third_Party/FatFs/src/ff.c **** } 1603 .loc 1 2927 12 is_stmt 0 view .LVU485 1604 0036 0132 adds r2, r2, #1 - ARM GAS /tmp/cc2SVLkL.s page 83 + ARM GAS /tmp/ccH7dUYB.s page 83 1605 .LVL172: @@ -4978,7 +4978,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2975:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->win[BS_JmpBoot] == 0xE9 || (fs->win[BS_JmpBoot] == 0xEB && fs->win[BS_JmpBoot + 2] == 0x90 2976:Middlewares/Third_Party/FatFs/src/ff.c **** if ((ld_dword(fs->win + BS_FilSysType) & 0xFFFFFF) == 0x544146) return 0; /* Check "FAT" string * 2977:Middlewares/Third_Party/FatFs/src/ff.c **** if (ld_dword(fs->win + BS_FilSysType32) == 0x33544146) return 0; /* Check "FAT3" string */ - ARM GAS /tmp/cc2SVLkL.s page 84 + ARM GAS /tmp/ccH7dUYB.s page 84 2978:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5038,7 +5038,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3032:Middlewares/Third_Party/FatFs/src/ff.c **** /* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */ 3033:Middlewares/Third_Party/FatFs/src/ff.c **** 3034:Middlewares/Third_Party/FatFs/src/ff.c **** fs->fs_type = 0; /* Clear the file system object */ - ARM GAS /tmp/cc2SVLkL.s page 85 + ARM GAS /tmp/ccH7dUYB.s page 85 3035:Middlewares/Third_Party/FatFs/src/ff.c **** fs->drv = LD2PD(vol); /* Bind the logical drive and a physical drive */ @@ -5098,7 +5098,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3089:Middlewares/Third_Party/FatFs/src/ff.c **** fs->csize = 1 << fs->win[BPB_SecPerClusEx]; /* Cluster size */ 3090:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->csize == 0) return FR_NO_FILESYSTEM; /* (Must be 1..32768) */ 3091:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 86 + ARM GAS /tmp/ccH7dUYB.s page 86 3092:Middlewares/Third_Party/FatFs/src/ff.c **** nclst = ld_dword(fs->win + BPB_NumClusEx); /* Number of clusters */ @@ -5158,7 +5158,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3146:Middlewares/Third_Party/FatFs/src/ff.c **** 3147:Middlewares/Third_Party/FatFs/src/ff.c **** /* Boundaries and Limits */ 3148:Middlewares/Third_Party/FatFs/src/ff.c **** fs->n_fatent = nclst + 2; /* Number of FAT entries */ - ARM GAS /tmp/cc2SVLkL.s page 87 + ARM GAS /tmp/ccH7dUYB.s page 87 3149:Middlewares/Third_Party/FatFs/src/ff.c **** fs->volbase = bsect; /* Volume start sector */ @@ -5218,7 +5218,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3203:Middlewares/Third_Party/FatFs/src/ff.c **** clear_lock(fs); 3204:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3205:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_OK; - ARM GAS /tmp/cc2SVLkL.s page 88 + ARM GAS /tmp/ccH7dUYB.s page 88 3206:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5278,7 +5278,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3260:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_mount ( 3261:Middlewares/Third_Party/FatFs/src/ff.c **** FATFS* fs, /* Pointer to the file system object (NULL:unmount)*/ 3262:Middlewares/Third_Party/FatFs/src/ff.c **** const TCHAR* path, /* Logical drive number to be mounted/unmounted */ - ARM GAS /tmp/cc2SVLkL.s page 89 + ARM GAS /tmp/ccH7dUYB.s page 89 3263:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE opt /* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */ @@ -5338,7 +5338,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3317:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY 3318:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD dw, cl, bcs, clst, sc; 3319:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t ofs; - ARM GAS /tmp/cc2SVLkL.s page 90 + ARM GAS /tmp/ccH7dUYB.s page 90 3320:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -5398,7 +5398,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3374:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_CrtTime, dw); /* Set created time */ 3375:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_CrtTime10] = 0; 3376:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_ModTime, dw); /* Set modified time */ - ARM GAS /tmp/cc2SVLkL.s page 91 + ARM GAS /tmp/ccH7dUYB.s page 91 3377:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_ModTime10] = 0; @@ -5458,7 +5458,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3431:Middlewares/Third_Party/FatFs/src/ff.c **** } 3432:Middlewares/Third_Party/FatFs/src/ff.c **** #else /* R/O configuration */ 3433:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { - ARM GAS /tmp/cc2SVLkL.s page 92 + ARM GAS /tmp/ccH7dUYB.s page 92 3434:Middlewares/Third_Party/FatFs/src/ff.c **** if (dj.fn[NSFLAG] & NS_NONAME) { /* Origin directory itself? */ @@ -5518,7 +5518,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3488:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_read(fs->drv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR; 3489:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3490:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 93 + ARM GAS /tmp/ccH7dUYB.s page 93 3491:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5578,7 +5578,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3545:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3546:Middlewares/Third_Party/FatFs/src/ff.c **** { 3547:Middlewares/Third_Party/FatFs/src/ff.c **** clst = get_fat(&fp->obj, fp->clust); /* Follow cluster chain on the FAT */ - ARM GAS /tmp/cc2SVLkL.s page 94 + ARM GAS /tmp/ccH7dUYB.s page 94 3548:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5638,7 +5638,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3602:Middlewares/Third_Party/FatFs/src/ff.c **** 3603:Middlewares/Third_Party/FatFs/src/ff.c **** 3604:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 95 + ARM GAS /tmp/ccH7dUYB.s page 95 3605:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -5698,7 +5698,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3659:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->obj.sclust == 0) fp->obj.sclust = clst; /* Set start cluster if the first write */ 3660:Middlewares/Third_Party/FatFs/src/ff.c **** } 3661:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_TINY - ARM GAS /tmp/cc2SVLkL.s page 96 + ARM GAS /tmp/ccH7dUYB.s page 96 3662:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Write-back s @@ -5758,7 +5758,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3716:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_DIRTY; 3717:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3718:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 97 + ARM GAS /tmp/ccH7dUYB.s page 97 3719:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -5818,7 +5818,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3773:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_AccTime, 0); 3774:Middlewares/Third_Party/FatFs/src/ff.c **** res = store_xdir(&dj); /* Restore it to the directory */ 3775:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { - ARM GAS /tmp/cc2SVLkL.s page 98 + ARM GAS /tmp/ccH7dUYB.s page 98 3776:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs); @@ -5878,7 +5878,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3830:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3831:Middlewares/Third_Party/FatFs/src/ff.c **** { 3832:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.fs = 0; /* Invalidate file object */ - ARM GAS /tmp/cc2SVLkL.s page 99 + ARM GAS /tmp/ccH7dUYB.s page 99 3833:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5938,7 +5938,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3887:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_EXFAT 3888:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type == FS_EXFAT) { 3889:Middlewares/Third_Party/FatFs/src/ff.c **** fs->cdc_scl = dj.obj.c_scl; - ARM GAS /tmp/cc2SVLkL.s page 100 + ARM GAS /tmp/ccH7dUYB.s page 100 3890:Middlewares/Third_Party/FatFs/src/ff.c **** fs->cdc_size = dj.obj.c_size; @@ -5998,7 +5998,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3944:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.sclust = fs->cdir; /* Start to follow upper directory from current directory */ 3945:Middlewares/Third_Party/FatFs/src/ff.c **** while ((ccl = dj.obj.sclust) != 0) { /* Repeat while current directory is a sub-directory */ 3946:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_sdi(&dj, 1 * SZDIRE); /* Get parent directory */ - ARM GAS /tmp/cc2SVLkL.s page 101 + ARM GAS /tmp/ccH7dUYB.s page 101 3947:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -6058,7 +6058,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4001:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_lseek ( 4002:Middlewares/Third_Party/FatFs/src/ff.c **** FIL* fp, /* Pointer to the file object */ 4003:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t ofs /* File pointer from top of file */ - ARM GAS /tmp/cc2SVLkL.s page 102 + ARM GAS /tmp/ccH7dUYB.s page 102 4004:Middlewares/Third_Party/FatFs/src/ff.c **** ) @@ -6118,7 +6118,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4058:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ 4059:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY 4060:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY - ARM GAS /tmp/cc2SVLkL.s page 103 + ARM GAS /tmp/ccH7dUYB.s page 103 4061:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ @@ -6178,7 +6178,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4115:Middlewares/Third_Party/FatFs/src/ff.c **** ofs = 0; break; 4116:Middlewares/Third_Party/FatFs/src/ff.c **** } 4117:Middlewares/Third_Party/FatFs/src/ff.c **** } else - ARM GAS /tmp/cc2SVLkL.s page 104 + ARM GAS /tmp/ccH7dUYB.s page 104 4118:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -6238,7 +6238,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4172:Middlewares/Third_Party/FatFs/src/ff.c **** 4173:Middlewares/Third_Party/FatFs/src/ff.c **** if (!dp) return FR_INVALID_OBJECT; 4174:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 105 + ARM GAS /tmp/ccH7dUYB.s page 105 4175:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get logical drive */ @@ -6298,7 +6298,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4229:Middlewares/Third_Party/FatFs/src/ff.c **** /* Close Directory */ 4230:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 4231:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 106 + ARM GAS /tmp/ccH7dUYB.s page 106 4232:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_closedir ( @@ -6358,7 +6358,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4286:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_NO_FILE) res = FR_OK; /* Ignore end of directory now */ 4287:Middlewares/Third_Party/FatFs/src/ff.c **** } 4288:Middlewares/Third_Party/FatFs/src/ff.c **** FREE_NAMBUF(); - ARM GAS /tmp/cc2SVLkL.s page 107 + ARM GAS /tmp/ccH7dUYB.s page 107 4289:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -6418,7 +6418,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4343:Middlewares/Third_Party/FatFs/src/ff.c **** 4344:Middlewares/Third_Party/FatFs/src/ff.c **** #endif /* _USE_FIND */ 4345:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 108 + ARM GAS /tmp/ccH7dUYB.s page 108 4346:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -6478,7 +6478,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4400:Middlewares/Third_Party/FatFs/src/ff.c **** 4401:Middlewares/Third_Party/FatFs/src/ff.c **** 4402:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get logical drive */ - ARM GAS /tmp/cc2SVLkL.s page 109 + ARM GAS /tmp/ccH7dUYB.s page 109 4403:Middlewares/Third_Party/FatFs/src/ff.c **** res = find_volume(&path, &fs, 0); @@ -6538,7 +6538,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4457:Middlewares/Third_Party/FatFs/src/ff.c **** } 4458:Middlewares/Third_Party/FatFs/src/ff.c **** } 4459:Middlewares/Third_Party/FatFs/src/ff.c **** *nclst = nfree; /* Return the free clusters */ - ARM GAS /tmp/cc2SVLkL.s page 110 + ARM GAS /tmp/ccH7dUYB.s page 110 4460:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst = nfree; /* Now free_clst is valid */ @@ -6598,7 +6598,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4514:Middlewares/Third_Party/FatFs/src/ff.c **** 4515:Middlewares/Third_Party/FatFs/src/ff.c **** LEAVE_FF(fs, res); 4516:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 111 + ARM GAS /tmp/ccH7dUYB.s page 111 4517:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -6658,7 +6658,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4571:Middlewares/Third_Party/FatFs/src/ff.c **** if (dj.obj.attr & AM_DIR) { /* Is it a sub-directory? */ 4572:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_RPATH != 0 4573:Middlewares/Third_Party/FatFs/src/ff.c **** if (dclst == fs->cdir) { /* Is it the current directory? */ - ARM GAS /tmp/cc2SVLkL.s page 112 + ARM GAS /tmp/ccH7dUYB.s page 112 4574:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DENIED; @@ -6718,7 +6718,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4628:Middlewares/Third_Party/FatFs/src/ff.c **** UINT n; 4629:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD dsc, dcl, pcl, tm; 4630:Middlewares/Third_Party/FatFs/src/ff.c **** DEF_NAMBUF - ARM GAS /tmp/cc2SVLkL.s page 113 + ARM GAS /tmp/ccH7dUYB.s page 113 4631:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -6778,7 +6778,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4685:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_GenFlags] = 3; /* Initialize the object flag (contiguous) */ 4686:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_Attr] = AM_DIR; /* Attribute */ 4687:Middlewares/Third_Party/FatFs/src/ff.c **** res = store_xdir(&dj); - ARM GAS /tmp/cc2SVLkL.s page 114 + ARM GAS /tmp/ccH7dUYB.s page 114 4688:Middlewares/Third_Party/FatFs/src/ff.c **** } else @@ -6838,7 +6838,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4742:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { /* Object to be renamed is found */ 4743:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_EXFAT 4744:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type == FS_EXFAT) { /* At exFAT */ - ARM GAS /tmp/cc2SVLkL.s page 115 + ARM GAS /tmp/ccH7dUYB.s page 115 4745:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE nf, nn; @@ -6898,7 +6898,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4799:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { 4800:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_remove(&djo); /* Remove old entry */ 4801:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { - ARM GAS /tmp/cc2SVLkL.s page 116 + ARM GAS /tmp/ccH7dUYB.s page 116 4802:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs); @@ -6958,7 +6958,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4856:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs); 4857:Middlewares/Third_Party/FatFs/src/ff.c **** } 4858:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 117 + ARM GAS /tmp/ccH7dUYB.s page 117 4859:Middlewares/Third_Party/FatFs/src/ff.c **** FREE_NAMBUF(); @@ -7018,7 +7018,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4913:Middlewares/Third_Party/FatFs/src/ff.c **** 4914:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LABEL 4915:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ - ARM GAS /tmp/cc2SVLkL.s page 118 + ARM GAS /tmp/ccH7dUYB.s page 118 4916:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get Volume Label */ @@ -7078,7 +7078,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4970:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 4971:Middlewares/Third_Party/FatFs/src/ff.c **** } while (di < 11); 4972:Middlewares/Third_Party/FatFs/src/ff.c **** do { /* Truncate trailing spaces */ - ARM GAS /tmp/cc2SVLkL.s page 119 + ARM GAS /tmp/ccH7dUYB.s page 119 4973:Middlewares/Third_Party/FatFs/src/ff.c **** label[di] = 0; @@ -7138,7 +7138,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5027:Middlewares/Third_Party/FatFs/src/ff.c **** res = find_volume(&label, &fs, FA_WRITE); 5028:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) LEAVE_FF(fs, res); 5029:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.fs = fs; - ARM GAS /tmp/cc2SVLkL.s page 120 + ARM GAS /tmp/ccH7dUYB.s page 120 5030:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -7198,7 +7198,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5084:Middlewares/Third_Party/FatFs/src/ff.c **** } 5085:Middlewares/Third_Party/FatFs/src/ff.c **** 5086:Middlewares/Third_Party/FatFs/src/ff.c **** /* Set volume label */ - ARM GAS /tmp/cc2SVLkL.s page 121 + ARM GAS /tmp/ccH7dUYB.s page 121 5087:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.sclust = 0; /* Open root directory */ @@ -7258,7 +7258,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5141:Middlewares/Third_Party/FatFs/src/ff.c **** FIL* fp, /* Pointer to the file object */ 5142:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t fsz, /* File size to be expanded to */ 5143:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE opt /* Operation mode 0:Find and prepare or 1:Find and allocate */ - ARM GAS /tmp/cc2SVLkL.s page 122 + ARM GAS /tmp/ccH7dUYB.s page 122 5144:Middlewares/Third_Party/FatFs/src/ff.c **** ) @@ -7318,7 +7318,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5198:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* Set it as suggested point for next allocation */ 5199:Middlewares/Third_Party/FatFs/src/ff.c **** lclst = scl - 1; 5200:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 123 + ARM GAS /tmp/ccH7dUYB.s page 123 5201:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -7378,7 +7378,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5255:Middlewares/Third_Party/FatFs/src/ff.c **** csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */ 5256:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ 5257:Middlewares/Third_Party/FatFs/src/ff.c **** if (csect == 0) { /* On the cluster boundary? */ - ARM GAS /tmp/cc2SVLkL.s page 124 + ARM GAS /tmp/ccH7dUYB.s page 124 5258:Middlewares/Third_Party/FatFs/src/ff.c **** clst = (fp->fptr == 0) ? /* On the top of the file? */ @@ -7438,7 +7438,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5312:Middlewares/Third_Party/FatFs/src/ff.c **** static const WORD cst32[] = {1, 2, 4, 8, 16, 32, 0}; /* Cluster size boundary for FAT32 volume (12 5313:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE fmt, sys, *buf, *pte, pdrv, part; 5314:Middlewares/Third_Party/FatFs/src/ff.c **** WORD ss; - ARM GAS /tmp/cc2SVLkL.s page 125 + ARM GAS /tmp/ccH7dUYB.s page 125 5315:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD szb_buf, sz_buf, sz_blk, n_clst, pau, sect, nsect, n; @@ -7498,7 +7498,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5369:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol < 128) return FR_MKFS_ABORTED; /* Check if volume size is >=128s */ 5370:Middlewares/Third_Party/FatFs/src/ff.c **** 5371:Middlewares/Third_Party/FatFs/src/ff.c **** /* Pre-determine the FAT type */ - ARM GAS /tmp/cc2SVLkL.s page 126 + ARM GAS /tmp/ccH7dUYB.s page 126 5372:Middlewares/Third_Party/FatFs/src/ff.c **** do { @@ -7558,7 +7558,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5426:Middlewares/Third_Party/FatFs/src/ff.c **** si++; break; /* Store the up-case char if exist */ 5427:Middlewares/Third_Party/FatFs/src/ff.c **** } 5428:Middlewares/Third_Party/FatFs/src/ff.c **** for (j = 1; (WCHAR)(si + j) && (WCHAR)(si + j) == ff_wtoupper((WCHAR)(si + j)); j++) ; /* Get r - ARM GAS /tmp/cc2SVLkL.s page 127 + ARM GAS /tmp/ccH7dUYB.s page 127 5429:Middlewares/Third_Party/FatFs/src/ff.c **** if (j >= 128) { @@ -7618,7 +7618,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5483:Middlewares/Third_Party/FatFs/src/ff.c **** n = (nsect > sz_buf) ? sz_buf : nsect; /* Write the buffered data */ 5484:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_write(pdrv, buf, sect, n) != RES_OK) return FR_DISK_ERR; 5485:Middlewares/Third_Party/FatFs/src/ff.c **** sect += n; nsect -= n; - ARM GAS /tmp/cc2SVLkL.s page 128 + ARM GAS /tmp/ccH7dUYB.s page 128 5486:Middlewares/Third_Party/FatFs/src/ff.c **** } while (nsect); @@ -7678,7 +7678,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5540:Middlewares/Third_Party/FatFs/src/ff.c **** for ( ; j < 11; j++) { 5541:Middlewares/Third_Party/FatFs/src/ff.c **** for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ; /* VBR checksum */ 5542:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_write(pdrv, buf, sect++, 1) != RES_OK) return FR_DISK_ERR; - ARM GAS /tmp/cc2SVLkL.s page 129 + ARM GAS /tmp/ccH7dUYB.s page 129 5543:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -7738,7 +7738,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5597:Middlewares/Third_Party/FatFs/src/ff.c **** if (!au && (au = pau / 2) != 0) continue; /* Adjust cluster size and retry */ 5598:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; 5599:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 130 + ARM GAS /tmp/ccH7dUYB.s page 130 5600:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -7798,7 +7798,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5654:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(buf + BS_VolID, GET_FATTIME()); /* VSN */ 5655:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */ 5656:Middlewares/Third_Party/FatFs/src/ff.c **** buf[BS_DrvNum] = 0x80; /* Drive number (for int13) */ - ARM GAS /tmp/cc2SVLkL.s page 131 + ARM GAS /tmp/ccH7dUYB.s page 131 5657:Middlewares/Third_Party/FatFs/src/ff.c **** buf[BS_BootSig] = 0x29; /* Extended boot signature */ @@ -7858,7 +7858,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5711:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 5712:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol >= 0x10000) { 5713:Middlewares/Third_Party/FatFs/src/ff.c **** sys = 0x06; /* FAT12/16 (>=64KS) */ - ARM GAS /tmp/cc2SVLkL.s page 132 + ARM GAS /tmp/ccH7dUYB.s page 132 5714:Middlewares/Third_Party/FatFs/src/ff.c **** } else { @@ -7918,7 +7918,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5768:Middlewares/Third_Party/FatFs/src/ff.c **** 5769:Middlewares/Third_Party/FatFs/src/ff.c **** 5770:Middlewares/Third_Party/FatFs/src/ff.c **** stat = disk_initialize(pdrv); - ARM GAS /tmp/cc2SVLkL.s page 133 + ARM GAS /tmp/ccH7dUYB.s page 133 5771:Middlewares/Third_Party/FatFs/src/ff.c **** if (stat & STA_NOINIT) return FR_NOT_READY; @@ -7978,7 +7978,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5825:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_STRFUNC 5826:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 5827:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get a string from the file */ - ARM GAS /tmp/cc2SVLkL.s page 134 + ARM GAS /tmp/ccH7dUYB.s page 134 5828:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ @@ -8038,7 +8038,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5882:Middlewares/Third_Party/FatFs/src/ff.c **** } 5883:Middlewares/Third_Party/FatFs/src/ff.c **** c = ff_convert(c, 1); /* OEM -> Unicode */ 5884:Middlewares/Third_Party/FatFs/src/ff.c **** if (!c) c = '?'; - ARM GAS /tmp/cc2SVLkL.s page 135 + ARM GAS /tmp/ccH7dUYB.s page 135 5885:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -8098,7 +8098,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5939:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0xC0 | c >> 6); 5940:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* 16-bit */ 5941:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0xE0 | c >> 12); - ARM GAS /tmp/cc2SVLkL.s page 136 + ARM GAS /tmp/ccH7dUYB.s page 136 5942:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0x80 | (c >> 6 & 0x3F)); @@ -8158,7 +8158,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1640 @ link register save eliminated. 5992:Middlewares/Third_Party/FatFs/src/ff.c **** pb->fp = fp; 1641 .loc 1 5992 2 view .LVU493 - ARM GAS /tmp/cc2SVLkL.s page 137 + ARM GAS /tmp/ccH7dUYB.s page 137 1642 .loc 1 5992 9 is_stmt 0 view .LVU494 @@ -8218,7 +8218,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1688 000c 1A78 ldrb r2, [r3] @ zero_extendqisi2 3224:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_REENTRANT 1689 .loc 1 3224 21 discriminator 2 view .LVU507 - ARM GAS /tmp/cc2SVLkL.s page 138 + ARM GAS /tmp/ccH7dUYB.s page 138 1690 000e A2B1 cbz r2, .L151 @@ -8278,7 +8278,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3241:Middlewares/Third_Party/FatFs/src/ff.c **** return res; 1729 .loc 1 3241 33 discriminator 1 view .LVU523 1730 002e F5E7 b .L148 - ARM GAS /tmp/cc2SVLkL.s page 139 + ARM GAS /tmp/ccH7dUYB.s page 139 1731 .LVL188: @@ -8338,7 +8338,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1776 .LVL197: 1777 .LFB1196: 886:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD wsect; - ARM GAS /tmp/cc2SVLkL.s page 140 + ARM GAS /tmp/ccH7dUYB.s page 140 1778 .loc 1 886 1 is_stmt 1 view -0 @@ -8398,7 +8398,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 894:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DISK_ERR; 1818 .loc 1 894 7 view .LVU550 1819 0016 0123 movs r3, #1 - ARM GAS /tmp/cc2SVLkL.s page 141 + ARM GAS /tmp/ccH7dUYB.s page 141 1820 0018 3A46 mov r2, r7 @@ -8458,7 +8458,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1858 003c 0123 movs r3, #1 1859 003e 3A46 mov r2, r7 1860 0040 4146 mov r1, r8 - ARM GAS /tmp/cc2SVLkL.s page 142 + ARM GAS /tmp/ccH7dUYB.s page 142 1861 0042 6078 ldrb r0, [r4, #1] @ zero_extendqisi2 @@ -8518,7 +8518,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1907 .loc 1 920 5 view .LVU576 1908 0004 8B42 cmp r3, r1 1909 0006 02D1 bne .L169 - ARM GAS /tmp/cc2SVLkL.s page 143 + ARM GAS /tmp/ccH7dUYB.s page 143 917:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -8578,7 +8578,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1950 .L165: 929:Middlewares/Third_Party/FatFs/src/ff.c **** } 1951 .loc 1 929 4 is_stmt 1 view .LVU591 - ARM GAS /tmp/cc2SVLkL.s page 144 + ARM GAS /tmp/ccH7dUYB.s page 144 929:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -8638,7 +8638,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1996 .loc 1 2973 6 is_stmt 0 view .LVU603 1997 0016 04F23220 addw r0, r4, #562 1998 001a FFF7FEFF bl ld_word - ARM GAS /tmp/cc2SVLkL.s page 145 + ARM GAS /tmp/ccH7dUYB.s page 145 1999 .LVL220: @@ -8698,7 +8698,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2039 005a 9842 cmp r0, r3 2040 005c 04D0 beq .L171 2982:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 146 + ARM GAS /tmp/ccH7dUYB.s page 146 2041 .loc 1 2982 9 view .LVU618 @@ -8758,7 +8758,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2091 .cfi_offset 14, -4 2092 0004 87B0 sub sp, sp, #28 2093 .LCFI19: - ARM GAS /tmp/cc2SVLkL.s page 147 + ARM GAS /tmp/ccH7dUYB.s page 147 2094 .cfi_def_cfa_offset 64 @@ -8818,7 +8818,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2128 0024 2C60 str r4, [r5] 3020:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type) { /* If the volume has been mounted */ 2129 .loc 1 3020 2 is_stmt 1 view .LVU645 - ARM GAS /tmp/cc2SVLkL.s page 148 + ARM GAS /tmp/ccH7dUYB.s page 148 3020:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type) { /* If the volume has been mounted */ @@ -8878,7 +8878,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2167 .loc 1 3035 2 is_stmt 1 view .LVU662 3035:Middlewares/Third_Party/FatFs/src/ff.c **** stat = disk_initialize(fs->drv); /* Initialize the physical drive */ 2168 .loc 1 3035 12 is_stmt 0 view .LVU663 - ARM GAS /tmp/cc2SVLkL.s page 149 + ARM GAS /tmp/ccH7dUYB.s page 149 2169 0050 F8B2 uxtb r0, r7 @@ -8938,7 +8938,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2207 0086 B3F5606F cmp r3, #3584 2208 008a 00F23981 bhi .L202 3045:Middlewares/Third_Party/FatFs/src/ff.c **** #endif - ARM GAS /tmp/cc2SVLkL.s page 150 + ARM GAS /tmp/ccH7dUYB.s page 150 2209 .loc 1 3045 64 discriminator 2 view .LVU680 @@ -8998,7 +8998,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2248 .LVL239: 3116:Middlewares/Third_Party/FatFs/src/ff.c **** 2249 .loc 1 3116 44 discriminator 1 view .LVU696 - ARM GAS /tmp/cc2SVLkL.s page 151 + ARM GAS /tmp/ccH7dUYB.s page 151 2250 00bc B4F80C80 ldrh r8, [r4, #12] @@ -9058,7 +9058,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2287 .loc 1 3123 6 view .LVU713 2288 00e8 012B cmp r3, #1 2289 00ea 00F21181 bhi .L210 - ARM GAS /tmp/cc2SVLkL.s page 152 + ARM GAS /tmp/ccH7dUYB.s page 152 3124:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -9118,7 +9118,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3132:Middlewares/Third_Party/FatFs/src/ff.c **** if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32); 2328 .loc 1 3132 11 is_stmt 0 view .LVU730 2329 0130 04F14700 add r0, r4, #71 - ARM GAS /tmp/cc2SVLkL.s page 153 + ARM GAS /tmp/ccH7dUYB.s page 153 2330 0134 FFF7FEFF bl ld_word @@ -9178,7 +9178,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2368 .loc 1 3140 6 is_stmt 0 view .LVU746 2369 0160 019A ldr r2, [sp, #4] 2370 0162 9A42 cmp r2, r3 - ARM GAS /tmp/cc2SVLkL.s page 154 + ARM GAS /tmp/ccH7dUYB.s page 154 2371 0164 C0F0E680 bcc .L215 @@ -9238,7 +9238,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2411 .L183: 3052:Middlewares/Third_Party/FatFs/src/ff.c **** pt = fs->win + (MBR_Table + i * SZ_PTE); 2412 .loc 1 3052 17 discriminator 1 view .LVU761 - ARM GAS /tmp/cc2SVLkL.s page 155 + ARM GAS /tmp/ccH7dUYB.s page 155 2413 0198 032E cmp r6, #3 @@ -9298,7 +9298,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2452 01bc 0AE0 b .L188 2453 .LVL268: 2454 .L226: - ARM GAS /tmp/cc2SVLkL.s page 156 + ARM GAS /tmp/ccH7dUYB.s page 156 3060:Middlewares/Third_Party/FatFs/src/ff.c **** } while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4); @@ -9358,7 +9358,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3148:Middlewares/Third_Party/FatFs/src/ff.c **** fs->volbase = bsect; /* Volume start sector */ 2496 .loc 1 3148 16 view .LVU790 2497 01ee C4F81890 str r9, [r4, #24] - ARM GAS /tmp/cc2SVLkL.s page 157 + ARM GAS /tmp/ccH7dUYB.s page 157 3149:Middlewares/Third_Party/FatFs/src/ff.c **** fs->fatbase = bsect + nrsv; /* FAT start sector */ @@ -9418,7 +9418,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2533 021a 09F00103 and r3, r9, #1 3161:Middlewares/Third_Party/FatFs/src/ff.c **** } 2534 .loc 1 3161 22 discriminator 2 view .LVU810 - ARM GAS /tmp/cc2SVLkL.s page 158 + ARM GAS /tmp/ccH7dUYB.s page 158 2535 021e 03EB5203 add r3, r3, r2, lsr #1 @@ -9478,7 +9478,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3192:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN == 1 2573 .loc 1 3192 9 view .LVU827 2574 024e 1380 strh r3, [r2] @ movhi - ARM GAS /tmp/cc2SVLkL.s page 159 + ARM GAS /tmp/ccH7dUYB.s page 159 2575 0250 E380 strh r3, [r4, #6] @ movhi @@ -9538,7 +9538,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2614 .LVL285: 3156:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 2615 .loc 1 3156 11 view .LVU843 - ARM GAS /tmp/cc2SVLkL.s page 160 + ARM GAS /tmp/ccH7dUYB.s page 160 2616 0280 CFE7 b .L193 @@ -9598,7 +9598,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2658 02be 9842 cmp r0, r3 2659 02c0 BFD1 bne .L195 3177:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/cc2SVLkL.s page 161 + ARM GAS /tmp/ccH7dUYB.s page 161 2660 .loc 1 3177 8 view .LVU856 @@ -9658,7 +9658,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3015:Middlewares/Third_Party/FatFs/src/ff.c **** 2704 .loc 1 3015 18 discriminator 1 view .LVU867 2705 02f2 F9E7 b .L180 - ARM GAS /tmp/cc2SVLkL.s page 162 + ARM GAS /tmp/ccH7dUYB.s page 162 2706 .LVL299: @@ -9718,7 +9718,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3127:Middlewares/Third_Party/FatFs/src/ff.c **** 2752 .loc 1 3127 63 discriminator 3 view .LVU876 2753 0324 0D25 movs r5, #13 - ARM GAS /tmp/cc2SVLkL.s page 163 + ARM GAS /tmp/ccH7dUYB.s page 163 2754 0326 DFE7 b .L180 @@ -9778,7 +9778,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2799 .LFE1219: 2801 .section .text.put_fat,"ax",%progbits 2802 .align 1 - ARM GAS /tmp/cc2SVLkL.s page 164 + ARM GAS /tmp/ccH7dUYB.s page 164 2803 .syntax unified @@ -9838,7 +9838,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2846 001a 022B cmp r3, #2 2847 001c 49D0 beq .L234 2848 001e 032B cmp r3, #3 - ARM GAS /tmp/cc2SVLkL.s page 165 + ARM GAS /tmp/ccH7dUYB.s page 165 2849 0020 60D0 beq .L235 @@ -9898,7 +9898,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2887 .loc 1 1098 4 is_stmt 1 view .LVU913 1098:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 2888 .loc 1 1098 7 is_stmt 0 view .LVU914 - ARM GAS /tmp/cc2SVLkL.s page 166 + ARM GAS /tmp/ccH7dUYB.s page 166 2889 0052 15F00105 ands r5, r5, #1 @@ -9958,7 +9958,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2927 0084 A389 ldrh r3, [r4, #12] 1102:Middlewares/Third_Party/FatFs/src/ff.c **** *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F)); 2928 .loc 1 1102 21 view .LVU931 - ARM GAS /tmp/cc2SVLkL.s page 167 + ARM GAS /tmp/ccH7dUYB.s page 167 2929 0086 B9FBF3F2 udiv r2, r9, r3 @@ -10018,7 +10018,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1108:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; 2969 .loc 1 1108 56 view .LVU946 2970 00b6 5B08 lsrs r3, r3, #1 - ARM GAS /tmp/cc2SVLkL.s page 168 + ARM GAS /tmp/ccH7dUYB.s page 168 1108:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -10078,7 +10078,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1118:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; 3010 .loc 1 1118 49 view .LVU962 3011 00e6 8389 ldrh r3, [r0, #12] - ARM GAS /tmp/cc2SVLkL.s page 169 + ARM GAS /tmp/ccH7dUYB.s page 169 1118:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -10138,7 +10138,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3050 0118 3943 orrs r1, r1, r7 3051 .LVL340: 1123:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; - ARM GAS /tmp/cc2SVLkL.s page 170 + ARM GAS /tmp/ccH7dUYB.s page 170 3052 .loc 1 1123 4 is_stmt 0 view .LVU979 @@ -10198,7 +10198,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3098 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 3099 .LCFI23: 3100 .cfi_def_cfa_offset 24 - ARM GAS /tmp/cc2SVLkL.s page 171 + ARM GAS /tmp/ccH7dUYB.s page 171 3101 .cfi_offset 3, -24 @@ -10258,7 +10258,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3140 .LVL349: 1020:Middlewares/Third_Party/FatFs/src/ff.c **** wc = fs->win[bc++ % SS(fs)]; 3141 .loc 1 1020 4 is_stmt 1 view .LVU1005 - ARM GAS /tmp/cc2SVLkL.s page 172 + ARM GAS /tmp/ccH7dUYB.s page 172 1020:Middlewares/Third_Party/FatFs/src/ff.c **** wc = fs->win[bc++ % SS(fs)]; @@ -10318,7 +10318,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3180 .loc 1 1022 8 view .LVU1021 3181 0052 1944 add r1, r1, r3 3182 0054 2846 mov r0, r5 - ARM GAS /tmp/cc2SVLkL.s page 173 + ARM GAS /tmp/ccH7dUYB.s page 173 3183 0056 FFF7FEFF bl move_window @@ -10378,7 +10378,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1028:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_word(fs->win + clst * 2 % SS(fs)); 3223 .loc 1 1028 47 view .LVU1036 3224 0084 AB89 ldrh r3, [r5, #12] - ARM GAS /tmp/cc2SVLkL.s page 174 + ARM GAS /tmp/ccH7dUYB.s page 174 1028:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_word(fs->win + clst * 2 % SS(fs)); @@ -10438,7 +10438,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3263 .loc 1 1033 54 view .LVU1052 3264 00b2 9B08 lsrs r3, r3, #2 1033:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF; - ARM GAS /tmp/cc2SVLkL.s page 175 + ARM GAS /tmp/ccH7dUYB.s page 175 3265 .loc 1 1033 44 view .LVU1053 @@ -10498,7 +10498,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1012:Middlewares/Third_Party/FatFs/src/ff.c **** 3306 .loc 1 1012 7 view .LVU1067 3307 00e2 0120 movs r0, #1 - ARM GAS /tmp/cc2SVLkL.s page 176 + ARM GAS /tmp/ccH7dUYB.s page 176 3308 .LVL377: @@ -10558,7 +10558,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3354 .cfi_offset 4, -24 3355 .cfi_offset 5, -20 3356 .cfi_offset 6, -16 - ARM GAS /tmp/cc2SVLkL.s page 177 + ARM GAS /tmp/ccH7dUYB.s page 177 3357 .cfi_offset 7, -12 @@ -10618,7 +10618,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3394 .L261: 1489:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */ 3395 .loc 1 1489 2 view .LVU1095 - ARM GAS /tmp/cc2SVLkL.s page 178 + ARM GAS /tmp/ccH7dUYB.s page 178 1489:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */ @@ -10678,7 +10678,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3431 0052 B8F80C20 ldrh r2, [r8, #12] 1506:Middlewares/Third_Party/FatFs/src/ff.c **** 3432 .loc 1 1506 27 view .LVU1115 - ARM GAS /tmp/cc2SVLkL.s page 179 + ARM GAS /tmp/ccH7dUYB.s page 179 3433 0056 B6FBF2F1 udiv r1, r6, r2 @@ -10738,7 +10738,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3471 .loc 1 1498 7 is_stmt 0 view .LVU1131 3472 0086 0128 cmp r0, #1 3473 0088 14D9 bls .L269 - ARM GAS /tmp/cc2SVLkL.s page 180 + ARM GAS /tmp/ccH7dUYB.s page 180 1498:Middlewares/Third_Party/FatFs/src/ff.c **** ofs -= csz; @@ -10798,7 +10798,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3515 .LVL399: 1490:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = fs->dirbase; 3516 .loc 1 1490 45 discriminator 1 view .LVU1145 - ARM GAS /tmp/cc2SVLkL.s page 181 + ARM GAS /tmp/ccH7dUYB.s page 181 3517 00ae F9E7 b .L259 @@ -10858,7 +10858,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3564 .cfi_offset 4, -24 3565 .cfi_offset 5, -20 3566 .cfi_offset 6, -16 - ARM GAS /tmp/cc2SVLkL.s page 182 + ARM GAS /tmp/ccH7dUYB.s page 182 3567 .cfi_offset 7, -12 @@ -10918,7 +10918,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1366:Middlewares/Third_Party/FatFs/src/ff.c **** if (cs < 2) return 1; /* Invalid FAT value */ 3605 .loc 1 1366 8 view .LVU1171 3606 0026 0346 mov r3, r0 - ARM GAS /tmp/cc2SVLkL.s page 183 + ARM GAS /tmp/ccH7dUYB.s page 183 3607 .LVL413: @@ -10978,7 +10978,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3646 004e 78B1 cbz r0, .L279 1409:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */ 3647 .loc 1 1409 4 is_stmt 1 view .LVU1187 - ARM GAS /tmp/cc2SVLkL.s page 184 + ARM GAS /tmp/ccH7dUYB.s page 184 1409:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */ @@ -11038,7 +11038,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1412:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && clst != 0) { 3687 .loc 1 1412 9 view .LVU1203 3688 0078 FFF7FEFF bl put_fat - ARM GAS /tmp/cc2SVLkL.s page 185 + ARM GAS /tmp/ccH7dUYB.s page 185 3689 .LVL423: @@ -11098,7 +11098,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1421:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 3727 .loc 1 1421 3 is_stmt 1 view .LVU1220 1421:Middlewares/Third_Party/FatFs/src/ff.c **** } else { - ARM GAS /tmp/cc2SVLkL.s page 186 + ARM GAS /tmp/ccH7dUYB.s page 186 3728 .loc 1 1421 5 is_stmt 0 view .LVU1221 @@ -11158,7 +11158,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3771 .L287: 1405:Middlewares/Third_Party/FatFs/src/ff.c **** } 3772 .loc 1 1405 27 discriminator 1 view .LVU1233 - ARM GAS /tmp/cc2SVLkL.s page 187 + ARM GAS /tmp/ccH7dUYB.s page 187 3773 00ca 0023 movs r3, #0 @@ -11218,7 +11218,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3819 .loc 1 1287 2 is_stmt 1 view .LVU1243 1287:Middlewares/Third_Party/FatFs/src/ff.c **** 3820 .loc 1 1287 5 is_stmt 0 view .LVU1244 - ARM GAS /tmp/cc2SVLkL.s page 188 + ARM GAS /tmp/ccH7dUYB.s page 188 3821 0006 0129 cmp r1, #1 @@ -11278,7 +11278,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3860 .loc 1 1297 9 is_stmt 0 view .LVU1259 3861 002c 2146 mov r1, r4 3862 002e 3046 mov r0, r6 - ARM GAS /tmp/cc2SVLkL.s page 189 + ARM GAS /tmp/ccH7dUYB.s page 189 3863 0030 FFF7FEFF bl get_fat @@ -11338,7 +11338,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1305:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst++; 3900 .loc 1 1305 36 view .LVU1277 3901 0054 911E subs r1, r2, #2 - ARM GAS /tmp/cc2SVLkL.s page 190 + ARM GAS /tmp/ccH7dUYB.s page 190 1305:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst++; @@ -11398,7 +11398,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3943 0078 F9E7 b .L295 3944 .LVL458: 3945 .L303: - ARM GAS /tmp/cc2SVLkL.s page 191 + ARM GAS /tmp/ccH7dUYB.s page 191 1300:Middlewares/Third_Party/FatFs/src/ff.c **** if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) { @@ -11458,7 +11458,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3990 .loc 1 2425 5 is_stmt 0 view .LVU1302 3991 000e 20B9 cbnz r0, .L306 2426:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; - ARM GAS /tmp/cc2SVLkL.s page 192 + ARM GAS /tmp/ccH7dUYB.s page 192 3992 .loc 1 2426 3 is_stmt 1 view .LVU1303 @@ -11518,7 +11518,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1525:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY 4037 .loc 1 1525 9 is_stmt 0 view .LVU1315 4038 0004 0668 ldr r6, [r0] - ARM GAS /tmp/cc2SVLkL.s page 193 + ARM GAS /tmp/ccH7dUYB.s page 193 4039 .LVL465: @@ -11578,7 +11578,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4076 .loc 1 1537 4 is_stmt 1 view .LVU1332 1537:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = 0; return FR_NO_FILE; 4077 .loc 1 1537 26 is_stmt 0 view .LVU1333 - ARM GAS /tmp/cc2SVLkL.s page 194 + ARM GAS /tmp/ccH7dUYB.s page 194 4078 002e 3389 ldrh r3, [r6, #8] @@ -11638,7 +11638,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4116 .LVL473: 1538:Middlewares/Third_Party/FatFs/src/ff.c **** } 4117 .loc 1 1538 26 view .LVU1350 - ARM GAS /tmp/cc2SVLkL.s page 195 + ARM GAS /tmp/ccH7dUYB.s page 195 4118 0056 F9E7 b .L309 @@ -11698,7 +11698,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1548:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = 0; return FR_NO_FILE; 4155 .loc 1 1548 9 is_stmt 0 view .LVU1368 4156 007e 8FB1 cbz r7, .L327 - ARM GAS /tmp/cc2SVLkL.s page 196 + ARM GAS /tmp/ccH7dUYB.s page 196 1551:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 0) return FR_DENIED; /* No free cluster */ @@ -11758,7 +11758,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4194 .loc 1 1549 16 is_stmt 0 view .LVU1385 4195 00a4 0023 movs r3, #0 4196 00a6 EB61 str r3, [r5, #28] - ARM GAS /tmp/cc2SVLkL.s page 197 + ARM GAS /tmp/ccH7dUYB.s page 197 1549:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -11818,7 +11818,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4236 00d2 F8B9 cbnz r0, .L324 1559:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 4237 .loc 1 1559 72 is_stmt 1 discriminator 2 view .LVU1401 - ARM GAS /tmp/cc2SVLkL.s page 198 + ARM GAS /tmp/ccH7dUYB.s page 198 1559:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; @@ -11878,7 +11878,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4278 00fc 0420 movs r0, #4 4279 .LVL493: 1531:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 199 + ARM GAS /tmp/ccH7dUYB.s page 199 4280 .loc 1 1531 105 discriminator 3 view .LVU1416 @@ -11938,7 +11938,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4323 .LFE1206: 4325 .section .text.dir_find,"ax",%progbits 4326 .align 1 - ARM GAS /tmp/cc2SVLkL.s page 200 + ARM GAS /tmp/ccH7dUYB.s page 200 4327 .syntax unified @@ -11998,7 +11998,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2277:Middlewares/Third_Party/FatFs/src/ff.c **** } while (res == FR_OK); 4370 .loc 1 2277 9 is_stmt 0 view .LVU1440 4371 0014 0021 movs r1, #0 - ARM GAS /tmp/cc2SVLkL.s page 201 + ARM GAS /tmp/ccH7dUYB.s page 201 4372 0016 2046 mov r0, r4 @@ -12058,7 +12058,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4410 .loc 1 2274 16 view .LVU1456 4411 003c A371 strb r3, [r4, #6] 4412 .LVL516: - ARM GAS /tmp/cc2SVLkL.s page 202 + ARM GAS /tmp/ccH7dUYB.s page 202 2275:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -12118,7 +12118,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4460 .cfi_def_cfa_offset 24 4461 0004 0446 mov r4, r0 4462 0006 0191 str r1, [sp, #4] - ARM GAS /tmp/cc2SVLkL.s page 203 + ARM GAS /tmp/ccH7dUYB.s page 203 2818:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE ns; @@ -12178,7 +12178,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4500 .L339: 2855:Middlewares/Third_Party/FatFs/src/ff.c **** res = create_name(dp, &path); /* Get a segment name of the path */ 4501 .loc 1 2855 3 is_stmt 1 view .LVU1483 - ARM GAS /tmp/cc2SVLkL.s page 204 + ARM GAS /tmp/ccH7dUYB.s page 204 2856:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -12238,7 +12238,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4538 .loc 1 2888 32 is_stmt 0 view .LVU1501 4539 004e 05F13401 add r1, r5, #52 2888:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 205 + ARM GAS /tmp/ccH7dUYB.s page 205 4540 .loc 1 2888 44 view .LVU1502 @@ -12298,7 +12298,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2894:Middlewares/Third_Party/FatFs/src/ff.c **** 4580 .loc 1 2894 1 is_stmt 0 view .LVU1517 4581 007a 1846 mov r0, r3 - ARM GAS /tmp/cc2SVLkL.s page 206 + ARM GAS /tmp/ccH7dUYB.s page 206 4582 007c 03B0 add sp, sp, #12 @@ -12358,7 +12358,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4629 .cfi_offset 4, -20 4630 .cfi_offset 5, -16 4631 .cfi_offset 6, -12 - ARM GAS /tmp/cc2SVLkL.s page 207 + ARM GAS /tmp/ccH7dUYB.s page 207 4632 .cfi_offset 7, -8 @@ -12418,7 +12418,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4671 0020 0246 mov r2, r0 4672 0022 70B9 cbnz r0, .L348 4673 .LVL545: - ARM GAS /tmp/cc2SVLkL.s page 208 + ARM GAS /tmp/ccH7dUYB.s page 208 4674 .L350: @@ -12478,7 +12478,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 1619:Middlewares/Third_Party/FatFs/src/ff.c **** } 4713 .loc 1 1619 2 is_stmt 1 view .LVU1557 1620:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 209 + ARM GAS /tmp/ccH7dUYB.s page 209 4714 .loc 1 1620 1 is_stmt 0 view .LVU1558 @@ -12538,7 +12538,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2371:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(fs, dp->sect); 4760 .loc 1 2371 5 is_stmt 0 view .LVU1569 4761 000c 0546 mov r5, r0 - ARM GAS /tmp/cc2SVLkL.s page 210 + ARM GAS /tmp/ccH7dUYB.s page 210 4762 000e 08B1 cbz r0, .L359 @@ -12598,7 +12598,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4804 .LFE1212: 4806 .section .text.dir_read,"ax",%progbits 4807 .align 1 - ARM GAS /tmp/cc2SVLkL.s page 211 + ARM GAS /tmp/ccH7dUYB.s page 211 4808 .syntax unified @@ -12658,7 +12658,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4851 0010 FFF7FEFF bl dir_next 4852 .LVL568: 2194:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 212 + ARM GAS /tmp/ccH7dUYB.s page 212 4853 .loc 1 2194 3 is_stmt 1 view .LVU1594 @@ -12718,7 +12718,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 2188:Middlewares/Third_Party/FatFs/src/ff.c **** break; 4890 .loc 1 2188 4 is_stmt 1 view .LVU1612 2188:Middlewares/Third_Party/FatFs/src/ff.c **** break; - ARM GAS /tmp/cc2SVLkL.s page 213 + ARM GAS /tmp/ccH7dUYB.s page 213 4891 .loc 1 2188 7 is_stmt 0 view .LVU1613 @@ -12778,7 +12778,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4934 .align 1 4935 .syntax unified 4936 .thumb - ARM GAS /tmp/cc2SVLkL.s page 214 + ARM GAS /tmp/ccH7dUYB.s page 214 4937 .thumb_func @@ -12838,7 +12838,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4979 .loc 1 968 6 discriminator 1 view .LVU1638 4980 001c 00B1 cbz r0, .L369 968:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 215 + ARM GAS /tmp/ccH7dUYB.s page 215 4981 .loc 1 968 56 discriminator 1 view .LVU1639 @@ -12898,7 +12898,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5023 0056 6169 ldr r1, [r4, #20] 5024 0058 04F50770 add r0, r4, #540 5025 005c FFF7FEFF bl st_dword - ARM GAS /tmp/cc2SVLkL.s page 216 + ARM GAS /tmp/ccH7dUYB.s page 216 5026 .LVL587: @@ -12958,7 +12958,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5072 .loc 1 3265 1 is_stmt 0 view .LVU1661 5073 0000 70B5 push {r4, r5, r6, lr} 5074 .LCFI38: - ARM GAS /tmp/cc2SVLkL.s page 217 + ARM GAS /tmp/ccH7dUYB.s page 217 5075 .cfi_def_cfa_offset 16 @@ -13018,7 +13018,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3279:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 5114 .loc 1 3279 3 is_stmt 0 view .LVU1677 5115 0020 FFF7FEFF bl clear_lock - ARM GAS /tmp/cc2SVLkL.s page 218 + ARM GAS /tmp/ccH7dUYB.s page 218 5116 .LVL595: @@ -13078,7 +13078,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5155 .cfi_remember_state 5156 .cfi_def_cfa_offset 16 5157 @ sp needed - ARM GAS /tmp/cc2SVLkL.s page 219 + ARM GAS /tmp/ccH7dUYB.s page 219 5158 004c 70BD pop {r4, r5, r6, pc} @@ -13138,7 +13138,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5207 .cfi_offset 8, -12 5208 .cfi_offset 9, -8 5209 .cfi_offset 14, -4 - ARM GAS /tmp/cc2SVLkL.s page 220 + ARM GAS /tmp/ccH7dUYB.s page 220 5210 0004 91B0 sub sp, sp, #68 @@ -13198,7 +13198,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5247 .loc 1 3499 31 is_stmt 0 discriminator 1 view .LVU1716 5248 0024 0023 movs r3, #0 5249 0026 3360 str r3, [r6] - ARM GAS /tmp/cc2SVLkL.s page 221 + ARM GAS /tmp/ccH7dUYB.s page 221 5250 .LVL607: @@ -13258,7 +13258,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5290 004c 14BF ite ne 5291 004e 0121 movne r1, #1 5292 0050 0021 moveq r1, #0 - ARM GAS /tmp/cc2SVLkL.s page 222 + ARM GAS /tmp/ccH7dUYB.s page 222 5293 0052 04A8 add r0, sp, #16 @@ -13318,7 +13318,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3392:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(dj.dir + DIR_ModTime, dw); /* Set modified time */ 5333 .loc 1 3392 6 is_stmt 1 view .LVU1745 5334 007c 0146 mov r1, r0 - ARM GAS /tmp/cc2SVLkL.s page 223 + ARM GAS /tmp/ccH7dUYB.s page 223 5335 007e 0C98 ldr r0, [sp, #48] @@ -13378,7 +13378,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3398:Middlewares/Third_Party/FatFs/src/ff.c **** 5378 .loc 1 3398 6 view .LVU1757 3398:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 224 + ARM GAS /tmp/ccH7dUYB.s page 224 5379 .loc 1 3398 16 is_stmt 0 view .LVU1758 @@ -13438,7 +13438,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3405:Middlewares/Third_Party/FatFs/src/ff.c **** } 5419 .loc 1 3405 22 view .LVU1773 5420 00e8 039B ldr r3, [sp, #12] - ARM GAS /tmp/cc2SVLkL.s page 225 + ARM GAS /tmp/ccH7dUYB.s page 225 5421 00ea 1C61 str r4, [r3, #16] @@ -13498,7 +13498,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5462 0114 AAD0 beq .L393 3360:Middlewares/Third_Party/FatFs/src/ff.c **** } 5463 .loc 1 3360 36 discriminator 1 view .LVU1787 - ARM GAS /tmp/cc2SVLkL.s page 226 + ARM GAS /tmp/ccH7dUYB.s page 226 5464 0116 0825 movs r5, #8 @@ -13558,7 +13558,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3423:Middlewares/Third_Party/FatFs/src/ff.c **** mode |= FA_MODIFIED; 5503 .loc 1 3423 7 is_stmt 0 view .LVU1803 5504 0140 17F0080F tst r7, #8 - ARM GAS /tmp/cc2SVLkL.s page 227 + ARM GAS /tmp/ccH7dUYB.s page 227 5505 0144 01D0 beq .L395 @@ -13618,7 +13618,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5543 .loc 1 3444 3 is_stmt 1 view .LVU1819 3456:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize); 5544 .loc 1 3456 5 view .LVU1820 - ARM GAS /tmp/cc2SVLkL.s page 228 + ARM GAS /tmp/ccH7dUYB.s page 228 3456:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize); @@ -13678,7 +13678,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3466:Middlewares/Third_Party/FatFs/src/ff.c **** fp->fptr = 0; /* Set file pointer top of the file */ 5581 .loc 1 3466 4 is_stmt 1 view .LVU1839 3466:Middlewares/Third_Party/FatFs/src/ff.c **** fp->fptr = 0; /* Set file pointer top of the file */ - ARM GAS /tmp/cc2SVLkL.s page 229 + ARM GAS /tmp/ccH7dUYB.s page 229 5582 .loc 1 3466 13 is_stmt 0 view .LVU1840 @@ -13738,7 +13738,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5619 01bc B168 ldr r1, [r6, #8] 5620 .LVL654: 3476:Middlewares/Third_Party/FatFs/src/ff.c **** clst = get_fat(&fp->obj, clst); - ARM GAS /tmp/cc2SVLkL.s page 230 + ARM GAS /tmp/ccH7dUYB.s page 230 5621 .loc 1 3476 5 is_stmt 1 view .LVU1858 @@ -13798,7 +13798,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5660 .loc 1 3479 34 discriminator 1 view .LVU1873 5661 01e2 0125 movs r5, #1 5662 .LVL660: - ARM GAS /tmp/cc2SVLkL.s page 231 + ARM GAS /tmp/ccH7dUYB.s page 231 3479:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -13858,7 +13858,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3486:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY 5701 .loc 1 3486 21 view .LVU1890 5702 020e 0244 add r2, r2, r0 - ARM GAS /tmp/cc2SVLkL.s page 232 + ARM GAS /tmp/ccH7dUYB.s page 232 3486:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY @@ -13918,7 +13918,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5743 0230 FAE6 b .L387 5744 .cfi_endproc 5745 .LFE1222: - ARM GAS /tmp/cc2SVLkL.s page 233 + ARM GAS /tmp/ccH7dUYB.s page 233 5747 .section .text.f_read,"ax",%progbits @@ -13978,7 +13978,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3526:Middlewares/Third_Party/FatFs/src/ff.c **** res = validate(&fp->obj, &fs); /* Check validity of the file object */ 5792 .loc 1 3526 6 view .LVU1915 5793 0010 C8F80030 str r3, [r8] - ARM GAS /tmp/cc2SVLkL.s page 234 + ARM GAS /tmp/ccH7dUYB.s page 234 3527:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */ @@ -14038,7 +14038,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5832 0040 2E46 mov r6, r5 5833 .LVL682: 3531:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 235 + ARM GAS /tmp/ccH7dUYB.s page 235 5834 .loc 1 3531 5 view .LVU1932 @@ -14098,7 +14098,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5874 .loc 1 3551 29 discriminator 1 view .LVU1946 5875 0070 CDF804A0 str r10, [sp, #4] 5876 .LVL689: - ARM GAS /tmp/cc2SVLkL.s page 236 + ARM GAS /tmp/ccH7dUYB.s page 236 3551:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; /* Update current cluster */ @@ -14158,7 +14158,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5916 009c 5345 cmp r3, r10 5917 009e F5D2 bcs .L437 3570:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 237 + ARM GAS /tmp/ccH7dUYB.s page 237 5918 .loc 1 3570 6 is_stmt 1 view .LVU1962 @@ -14218,7 +14218,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5958 00d4 C4F82090 str r9, [r4, #32] 5959 .LVL698: 5960 .L426: - ARM GAS /tmp/cc2SVLkL.s page 238 + ARM GAS /tmp/ccH7dUYB.s page 238 3590:Middlewares/Third_Party/FatFs/src/ff.c **** if (rcnt > btr) rcnt = btr; /* Clip it by btr if needed */ @@ -14278,7 +14278,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3534:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ 6000 .loc 1 3534 36 view .LVU1992 6001 0104 D8F80030 ldr r3, [r8] - ARM GAS /tmp/cc2SVLkL.s page 239 + ARM GAS /tmp/ccH7dUYB.s page 239 3534:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ @@ -14338,7 +14338,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6039 .loc 1 3538 8 is_stmt 0 view .LVU2009 6040 0132 0029 cmp r1, #0 6041 0134 86D1 bne .L428 - ARM GAS /tmp/cc2SVLkL.s page 240 + ARM GAS /tmp/ccH7dUYB.s page 240 3539:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* Middle or end of the file */ @@ -14398,7 +14398,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3557:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Read maximum contiguous sectors directly */ 6079 .loc 1 3557 4 is_stmt 1 view .LVU2027 3557:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Read maximum contiguous sectors directly */ - ARM GAS /tmp/cc2SVLkL.s page 241 + ARM GAS /tmp/ccH7dUYB.s page 241 6080 .loc 1 3557 15 is_stmt 0 view .LVU2028 @@ -14458,7 +14458,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6119 0190 CDF804A0 str r10, [sp, #4] 6120 .LVL714: 6121 .L423: - ARM GAS /tmp/cc2SVLkL.s page 242 + ARM GAS /tmp/ccH7dUYB.s page 242 3601:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -14518,7 +14518,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3585:Middlewares/Third_Party/FatFs/src/ff.c **** } 6164 .loc 1 3585 57 is_stmt 1 discriminator 1 view .LVU2056 6165 01c4 4FF0010A mov r10, #1 - ARM GAS /tmp/cc2SVLkL.s page 243 + ARM GAS /tmp/ccH7dUYB.s page 243 6166 .LVL720: @@ -14578,7 +14578,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6215 0006 0446 mov r4, r0 6216 0008 0F46 mov r7, r1 6217 000a 1546 mov r5, r2 - ARM GAS /tmp/cc2SVLkL.s page 244 + ARM GAS /tmp/ccH7dUYB.s page 244 6218 000c 9846 mov r8, r3 @@ -14638,7 +14638,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6254 .loc 1 3628 5 view .LVU2081 6255 002a 13F0020F tst r3, #2 6256 002e 00F0EC80 beq .L482 - ARM GAS /tmp/cc2SVLkL.s page 245 + ARM GAS /tmp/ccH7dUYB.s page 245 3631:Middlewares/Third_Party/FatFs/src/ff.c **** btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr); @@ -14698,7 +14698,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6294 .loc 1 3657 5 view .LVU2098 3657:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; /* Update current cluster */ 6295 .loc 1 3657 8 is_stmt 0 view .LVU2099 - ARM GAS /tmp/cc2SVLkL.s page 246 + ARM GAS /tmp/ccH7dUYB.s page 246 6296 0054 B0F1FF3F cmp r0, #-1 @@ -14758,7 +14758,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6332 .loc 1 3671 9 is_stmt 0 view .LVU2117 6333 007c B144 add r9, r9, r6 6334 .LVL736: - ARM GAS /tmp/cc2SVLkL.s page 247 + ARM GAS /tmp/ccH7dUYB.s page 247 3672:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Write maximum contiguous sectors directly */ @@ -14818,7 +14818,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3677:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_MINIMIZE <= 2 6373 .loc 1 3677 57 is_stmt 1 discriminator 1 view .LVU2134 6374 00b2 CDF804A0 str r10, [sp, #4] - ARM GAS /tmp/cc2SVLkL.s page 248 + ARM GAS /tmp/ccH7dUYB.s page 248 6375 .LVL741: @@ -14878,7 +14878,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3665:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY; 6419 .loc 1 3665 5 is_stmt 1 view .LVU2145 3665:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY; - ARM GAS /tmp/cc2SVLkL.s page 249 + ARM GAS /tmp/ccH7dUYB.s page 249 6420 .loc 1 3665 9 is_stmt 0 view .LVU2146 @@ -14938,7 +14938,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3685:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs)); 6461 .loc 1 3685 11 is_stmt 0 view .LVU2160 6462 011c 236A ldr r3, [r4, #32] - ARM GAS /tmp/cc2SVLkL.s page 250 + ARM GAS /tmp/ccH7dUYB.s page 250 3685:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs)); @@ -14998,7 +14998,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6502 014c 4B45 cmp r3, r9 6503 014e 03D0 beq .L478 3701:Middlewares/Third_Party/FatFs/src/ff.c **** disk_read(fs->drv, fp->buf, sect, 1) != RES_OK) { - ARM GAS /tmp/cc2SVLkL.s page 251 + ARM GAS /tmp/ccH7dUYB.s page 251 6504 .loc 1 3701 7 view .LVU2176 @@ -15058,7 +15058,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6542 0176 3246 mov r2, r6 6543 0178 3946 mov r1, r7 6544 017a 1844 add r0, r0, r3 - ARM GAS /tmp/cc2SVLkL.s page 252 + ARM GAS /tmp/ccH7dUYB.s page 252 6545 017c FFF7FEFF bl mem_cpy @@ -15118,7 +15118,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6583 .loc 1 3637 9 is_stmt 0 view .LVU2208 6584 01a8 A169 ldr r1, [r4, #24] 3637:Middlewares/Third_Party/FatFs/src/ff.c **** csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1); /* Sector offset in the cluster */ - ARM GAS /tmp/cc2SVLkL.s page 253 + ARM GAS /tmp/ccH7dUYB.s page 253 6585 .loc 1 3637 18 view .LVU2209 @@ -15178,7 +15178,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6622 01d6 2046 mov r0, r4 6623 .LVL767: 3643:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 254 + ARM GAS /tmp/ccH7dUYB.s page 254 6624 .loc 1 3643 14 view .LVU2227 @@ -15238,7 +15238,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6666 .LVL775: 3628:Middlewares/Third_Party/FatFs/src/ff.c **** 6667 .loc 1 3628 30 discriminator 1 view .LVU2240 - ARM GAS /tmp/cc2SVLkL.s page 255 + ARM GAS /tmp/ccH7dUYB.s page 255 6668 020e 52E7 b .L459 @@ -15298,7 +15298,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5960:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 6714 .loc 1 5960 2 is_stmt 1 view .LVU2251 5960:Middlewares/Third_Party/FatFs/src/ff.c **** #endif - ARM GAS /tmp/cc2SVLkL.s page 256 + ARM GAS /tmp/ccH7dUYB.s page 256 6715 .loc 1 5960 11 is_stmt 0 view .LVU2252 @@ -15358,7 +15358,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6757 .LVL785: 6758 .L500: 5964:Middlewares/Third_Party/FatFs/src/ff.c **** i = (bw == (UINT)i) ? 0 : -1; - ARM GAS /tmp/cc2SVLkL.s page 257 + ARM GAS /tmp/ccH7dUYB.s page 257 6759 .loc 1 5964 3 is_stmt 1 view .LVU2265 @@ -15418,7 +15418,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6803 .loc 1 5979 2 view .LVU2277 5979:Middlewares/Third_Party/FatFs/src/ff.c **** && f_write(pb->fp, pb->buf, (UINT)pb->idx, &nw) == FR_OK 6804 .loc 1 5979 11 is_stmt 0 view .LVU2278 - ARM GAS /tmp/cc2SVLkL.s page 258 + ARM GAS /tmp/ccH7dUYB.s page 258 6805 0000 4268 ldr r2, [r0, #4] @@ -15478,7 +15478,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6847 .LVL793: 6848 .L504: 6849 .LCFI61: - ARM GAS /tmp/cc2SVLkL.s page 259 + ARM GAS /tmp/ccH7dUYB.s page 259 6850 .cfi_def_cfa_offset 0 @@ -15538,7 +15538,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 3737:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD tm; 6900 .loc 1 3737 2 view .LVU2297 3738:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE *dir; - ARM GAS /tmp/cc2SVLkL.s page 260 + ARM GAS /tmp/ccH7dUYB.s page 260 6901 .loc 1 3738 2 view .LVU2298 @@ -15598,7 +15598,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6938 002a 78B1 cbz r0, .L517 6939 .LVL802: 6940 .L512: - ARM GAS /tmp/cc2SVLkL.s page 261 + ARM GAS /tmp/ccH7dUYB.s page 261 3802:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -15658,7 +15658,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6982 .loc 1 3789 6 is_stmt 1 view .LVU2328 6983 0056 A268 ldr r2, [r4, #8] 6984 0058 3146 mov r1, r6 - ARM GAS /tmp/cc2SVLkL.s page 262 + ARM GAS /tmp/ccH7dUYB.s page 262 6985 005a 2068 ldr r0, [r4] @@ -15718,7 +15718,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7027 .cfi_endproc 7028 .LFE1225: 7030 .section .text.f_close,"ax",%progbits - ARM GAS /tmp/cc2SVLkL.s page 263 + ARM GAS /tmp/ccH7dUYB.s page 263 7031 .align 1 @@ -15778,7 +15778,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7076 .cfi_restore_state 3825:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { 7077 .loc 1 3825 3 is_stmt 1 view .LVU2351 - ARM GAS /tmp/cc2SVLkL.s page 264 + ARM GAS /tmp/ccH7dUYB.s page 264 3825:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { @@ -15838,7 +15838,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7122 .cfi_def_cfa_offset 36 7123 .cfi_offset 4, -36 7124 .cfi_offset 5, -32 - ARM GAS /tmp/cc2SVLkL.s page 265 + ARM GAS /tmp/ccH7dUYB.s page 265 7125 .cfi_offset 6, -28 @@ -15898,7 +15898,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4024:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs == CREATE_LINKMAP) { /* Create CLMT */ 7163 .loc 1 4024 5 view .LVU2380 7164 001a 002B cmp r3, #0 - ARM GAS /tmp/cc2SVLkL.s page 266 + ARM GAS /tmp/ccH7dUYB.s page 266 7165 001c 00F08E80 beq .L526 @@ -15958,7 +15958,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7205 .loc 1 4027 9 view .LVU2394 7206 003e 58F804BB ldr fp, [r8], #4 7207 .LVL829: - ARM GAS /tmp/cc2SVLkL.s page 267 + ARM GAS /tmp/ccH7dUYB.s page 267 4027:Middlewares/Third_Party/FatFs/src/ff.c **** cl = fp->obj.sclust; /* Origin of the chain */ @@ -16018,7 +16018,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7243 005c 2046 mov r0, r4 7244 005e FFF7FEFF bl get_fat 7245 .LVL835: - ARM GAS /tmp/cc2SVLkL.s page 268 + ARM GAS /tmp/ccH7dUYB.s page 268 4035:Middlewares/Third_Party/FatFs/src/ff.c **** if (cl <= 1) ABORT(fs, FR_INT_ERR); @@ -16078,7 +16078,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4042:Middlewares/Third_Party/FatFs/src/ff.c **** } 7283 .loc 1 4042 17 is_stmt 1 view .LVU2431 4042:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 269 + ARM GAS /tmp/ccH7dUYB.s page 269 7284 .loc 1 4042 21 is_stmt 0 view .LVU2432 @@ -16138,7 +16138,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4044:Middlewares/Third_Party/FatFs/src/ff.c **** if (ulen <= tlen) { 7324 .loc 1 4044 15 view .LVU2447 7325 00a2 C3F80090 str r9, [r3] - ARM GAS /tmp/cc2SVLkL.s page 270 + ARM GAS /tmp/ccH7dUYB.s page 270 4045:Middlewares/Third_Party/FatFs/src/ff.c **** *tbl = 0; /* Terminate table */ @@ -16198,7 +16198,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4057:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ 7364 .loc 1 4057 53 view .LVU2464 7365 00da 013A subs r2, r2, #1 - ARM GAS /tmp/cc2SVLkL.s page 271 + ARM GAS /tmp/ccH7dUYB.s page 271 4057:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ @@ -16258,7 +16258,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7404 .loc 1 4068 15 is_stmt 0 view .LVU2480 7405 010c 2562 str r5, [r4, #32] 7406 010e 91E7 b .L525 - ARM GAS /tmp/cc2SVLkL.s page 272 + ARM GAS /tmp/ccH7dUYB.s page 272 7407 .LVL854: @@ -16318,7 +16318,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7446 .L572: 4066:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 7447 .loc 1 4066 57 is_stmt 1 discriminator 1 view .LVU2496 - ARM GAS /tmp/cc2SVLkL.s page 273 + ARM GAS /tmp/ccH7dUYB.s page 273 7448 0136 0126 movs r6, #1 @@ -16378,7 +16378,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7485 0154 019A ldr r2, [sp, #4] 7486 0156 B2F80A80 ldrh r8, [r2, #10] 4086:Middlewares/Third_Party/FatFs/src/ff.c **** if (ifptr > 0 && - ARM GAS /tmp/cc2SVLkL.s page 274 + ARM GAS /tmp/ccH7dUYB.s page 274 7487 .loc 1 4086 29 view .LVU2514 @@ -16438,7 +16438,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7524 017e 04E0 b .L542 7525 .LVL869: 7526 .L541: - ARM GAS /tmp/cc2SVLkL.s page 275 + ARM GAS /tmp/ccH7dUYB.s page 275 4093:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY @@ -16498,7 +16498,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7564 019e 2275 strb r2, [r4, #20] 7565 .L555: 4138:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY - ARM GAS /tmp/cc2SVLkL.s page 276 + ARM GAS /tmp/ccH7dUYB.s page 276 7566 .loc 1 4138 3 is_stmt 1 view .LVU2549 @@ -16558,7 +16558,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7606 .L574: 4096:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 1) ABORT(fs, FR_INT_ERR); 7607 .loc 1 4096 6 is_stmt 1 view .LVU2564 - ARM GAS /tmp/cc2SVLkL.s page 277 + ARM GAS /tmp/ccH7dUYB.s page 277 4096:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 1) ABORT(fs, FR_INT_ERR); @@ -16618,7 +16618,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7645 .loc 1 4098 30 is_stmt 1 discriminator 1 view .LVU2581 4098:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.sclust = clst; 7646 .loc 1 4098 30 is_stmt 0 view .LVU2582 - ARM GAS /tmp/cc2SVLkL.s page 278 + ARM GAS /tmp/ccH7dUYB.s page 278 7647 01fa 1BE7 b .L525 @@ -16678,7 +16678,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7686 .LVL884: 4106:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY 7687 .loc 1 4106 18 is_stmt 1 view .LVU2598 - ARM GAS /tmp/cc2SVLkL.s page 279 + ARM GAS /tmp/ccH7dUYB.s page 279 4106:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY @@ -16738,7 +16738,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4127:Middlewares/Third_Party/FatFs/src/ff.c **** nsect = clust2sect(fs, clst); /* Current sector */ 7726 .loc 1 4127 13 view .LVU2615 7727 024c B7FBF8F3 udiv r3, r7, r8 - ARM GAS /tmp/cc2SVLkL.s page 280 + ARM GAS /tmp/ccH7dUYB.s page 280 7728 0250 08FB1373 mls r3, r8, r3, r7 @@ -16798,7 +16798,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7766 .LVL895: 4123:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; 7767 .loc 1 4123 45 is_stmt 0 discriminator 3 view .LVU2632 - ARM GAS /tmp/cc2SVLkL.s page 281 + ARM GAS /tmp/ccH7dUYB.s page 281 7768 0270 6675 strb r6, [r4, #21] @@ -16858,7 +16858,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7807 0294 95E7 b .L556 7808 .L581: 4142:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY; - ARM GAS /tmp/cc2SVLkL.s page 282 + ARM GAS /tmp/ccH7dUYB.s page 282 7809 .loc 1 4142 62 is_stmt 1 discriminator 1 view .LVU2648 @@ -16918,7 +16918,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7854 .cfi_def_cfa_offset 12 7855 .cfi_offset 4, -12 7856 .cfi_offset 5, -8 - ARM GAS /tmp/cc2SVLkL.s page 283 + ARM GAS /tmp/ccH7dUYB.s page 283 7857 .cfi_offset 14, -4 @@ -16978,7 +16978,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7896 001e 2046 mov r0, r4 7897 0020 05B0 add sp, sp, #20 7898 .LCFI77: - ARM GAS /tmp/cc2SVLkL.s page 284 + ARM GAS /tmp/ccH7dUYB.s page 284 7899 .cfi_remember_state @@ -17038,7 +17038,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7937 .loc 1 4196 21 is_stmt 0 view .LVU2690 7938 0044 296A ldr r1, [r5, #32] 7939 0046 0398 ldr r0, [sp, #12] - ARM GAS /tmp/cc2SVLkL.s page 285 + ARM GAS /tmp/ccH7dUYB.s page 285 7940 .LVL917: @@ -17098,7 +17098,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 7977 006a 0021 movs r1, #0 7978 006c 2846 mov r0, r5 7979 .LVL920: - ARM GAS /tmp/cc2SVLkL.s page 286 + ARM GAS /tmp/ccH7dUYB.s page 286 4208:Middlewares/Third_Party/FatFs/src/ff.c **** if (!obj->lockid) res = FR_TOO_MANY_OPEN_FILES; @@ -17158,7 +17158,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8021 .LFE1228: 8023 .section .text.f_closedir,"ax",%progbits 8024 .align 1 - ARM GAS /tmp/cc2SVLkL.s page 287 + ARM GAS /tmp/ccH7dUYB.s page 287 8025 .global f_closedir @@ -17218,7 +17218,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4249:Middlewares/Third_Party/FatFs/src/ff.c **** } 8067 .loc 1 4249 4 is_stmt 1 view .LVU2734 4249:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 288 + ARM GAS /tmp/ccH7dUYB.s page 288 8068 .loc 1 4249 15 is_stmt 0 view .LVU2735 @@ -17278,7 +17278,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8117 0002 82B0 sub sp, sp, #8 8118 .LCFI84: 8119 .cfi_def_cfa_offset 24 - ARM GAS /tmp/cc2SVLkL.s page 289 + ARM GAS /tmp/ccH7dUYB.s page 289 8120 0004 0446 mov r4, r0 @@ -17338,7 +17338,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8156 .loc 1 4284 5 is_stmt 1 view .LVU2760 8157 0022 2946 mov r1, r5 8158 0024 2046 mov r0, r4 - ARM GAS /tmp/cc2SVLkL.s page 290 + ARM GAS /tmp/ccH7dUYB.s page 290 8159 0026 FFF7FEFF bl get_fileinfo @@ -17398,7 +17398,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8201 004a 0646 mov r6, r0 8202 004c FAE7 b .L603 8203 .cfi_endproc - ARM GAS /tmp/cc2SVLkL.s page 291 + ARM GAS /tmp/ccH7dUYB.s page 291 8204 .LFE1230: @@ -17458,7 +17458,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8250 .L610: 4375:Middlewares/Third_Party/FatFs/src/ff.c **** } 8251 .loc 1 4375 16 is_stmt 1 view .LVU2783 - ARM GAS /tmp/cc2SVLkL.s page 292 + ARM GAS /tmp/ccH7dUYB.s page 292 4378:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -17518,7 +17518,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8292 .LVL954: 4372:Middlewares/Third_Party/FatFs/src/ff.c **** } 8293 .loc 1 4372 14 is_stmt 0 discriminator 1 view .LVU2798 - ARM GAS /tmp/cc2SVLkL.s page 293 + ARM GAS /tmp/ccH7dUYB.s page 293 8294 003a FFF7FEFF bl get_fileinfo @@ -17578,7 +17578,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8342 .loc 1 4398 2 view .LVU2806 4399:Middlewares/Third_Party/FatFs/src/ff.c **** 8343 .loc 1 4399 2 view .LVU2807 - ARM GAS /tmp/cc2SVLkL.s page 294 + ARM GAS /tmp/ccH7dUYB.s page 294 4403:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { @@ -17638,7 +17638,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8381 .loc 1 4411 4 is_stmt 1 view .LVU2824 8382 .LVL962: 4412:Middlewares/Third_Party/FatFs/src/ff.c **** clst = 2; obj.fs = fs; - ARM GAS /tmp/cc2SVLkL.s page 295 + ARM GAS /tmp/ccH7dUYB.s page 295 8383 .loc 1 4412 4 view .LVU2825 @@ -17698,7 +17698,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8421 .LVL969: 4419:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 8422 .loc 1 4419 25 is_stmt 0 view .LVU2842 - ARM GAS /tmp/cc2SVLkL.s page 296 + ARM GAS /tmp/ccH7dUYB.s page 296 8423 004c 079B ldr r3, [sp, #28] @@ -17758,7 +17758,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8461 .loc 1 4444 14 view .LVU2858 8462 0072 5146 mov r1, r10 8463 0074 0798 ldr r0, [sp, #28] - ARM GAS /tmp/cc2SVLkL.s page 297 + ARM GAS /tmp/ccH7dUYB.s page 297 8464 0076 FFF7FEFF bl move_window @@ -17818,7 +17818,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4451:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 8502 .loc 1 4451 18 is_stmt 0 view .LVU2875 8503 0096 023E subs r6, r6, #2 - ARM GAS /tmp/cc2SVLkL.s page 298 + ARM GAS /tmp/ccH7dUYB.s page 298 8504 .LVL982: @@ -17878,7 +17878,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8542 00b0 FFF7FEFF bl ld_dword 8543 .LVL988: 4453:Middlewares/Third_Party/FatFs/src/ff.c **** p += 4; i -= 4; - ARM GAS /tmp/cc2SVLkL.s page 299 + ARM GAS /tmp/ccH7dUYB.s page 299 8544 .loc 1 4453 11 discriminator 1 view .LVU2892 @@ -17938,7 +17938,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8584 .LVL993: 8585 .L628: 8586 .LCFI94: - ARM GAS /tmp/cc2SVLkL.s page 300 + ARM GAS /tmp/ccH7dUYB.s page 300 8587 .cfi_restore_state @@ -17998,7 +17998,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8632 000e 0028 cmp r0, #0 8633 0010 49D1 bne .L636 4485:Middlewares/Third_Party/FatFs/src/ff.c **** if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ - ARM GAS /tmp/cc2SVLkL.s page 301 + ARM GAS /tmp/ccH7dUYB.s page 301 8634 .loc 1 4485 27 discriminator 2 view .LVU2918 @@ -18058,7 +18058,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4501:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_MODIFIED; 8673 .loc 1 4501 23 is_stmt 0 view .LVU2934 8674 003a A369 ldr r3, [r4, #24] - ARM GAS /tmp/cc2SVLkL.s page 302 + ARM GAS /tmp/ccH7dUYB.s page 302 4501:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_MODIFIED; @@ -18118,7 +18118,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4494:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR; 8714 .loc 1 4494 4 is_stmt 1 view .LVU2950 4495:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == 1) res = FR_INT_ERR; - ARM GAS /tmp/cc2SVLkL.s page 303 + ARM GAS /tmp/ccH7dUYB.s page 303 8715 .loc 1 4495 4 view .LVU2951 @@ -18178,7 +18178,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8755 .loc 1 4496 22 discriminator 1 view .LVU2965 8756 009a 0225 movs r5, #2 8757 009c CDE7 b .L638 - ARM GAS /tmp/cc2SVLkL.s page 304 + ARM GAS /tmp/ccH7dUYB.s page 304 8758 .LVL1008: @@ -18238,7 +18238,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8805 .cfi_offset 5, -16 8806 .cfi_offset 6, -12 8807 .cfi_offset 7, -8 - ARM GAS /tmp/cc2SVLkL.s page 305 + ARM GAS /tmp/ccH7dUYB.s page 305 8808 .cfi_offset 14, -4 @@ -18298,7 +18298,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8848 .L656: 8849 .LCFI101: 8850 .cfi_restore_state - ARM GAS /tmp/cc2SVLkL.s page 306 + ARM GAS /tmp/ccH7dUYB.s page 306 4543:Middlewares/Third_Party/FatFs/src/ff.c **** res = follow_path(&dj, path); /* Follow the file path */ @@ -18358,7 +18358,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4555:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DENIED; /* Cannot remove R/O object */ 8888 .loc 1 4555 8 view .LVU3006 8889 0046 15F0010F tst r5, #1 - ARM GAS /tmp/cc2SVLkL.s page 307 + ARM GAS /tmp/ccH7dUYB.s page 307 8890 004a 39D1 bne .L653 @@ -18418,7 +18418,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8930 .loc 1 4597 8 view .LVU3020 8931 0076 D0B9 cbnz r0, .L658 8932 .LVL1029: - ARM GAS /tmp/cc2SVLkL.s page 308 + ARM GAS /tmp/ccH7dUYB.s page 308 8933 .L651: @@ -18478,7 +18478,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 8971 009a 04A8 add r0, sp, #16 8972 .LVL1035: 4588:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) res = FR_DENIED; /* Not empty? */ - ARM GAS /tmp/cc2SVLkL.s page 309 + ARM GAS /tmp/ccH7dUYB.s page 309 8973 .loc 1 4588 14 view .LVU3037 @@ -18538,7 +18538,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9018 .thumb 9019 .thumb_func 9021 f_mkdir: - ARM GAS /tmp/cc2SVLkL.s page 310 + ARM GAS /tmp/ccH7dUYB.s page 310 9022 .LVL1041: @@ -18598,7 +18598,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9063 0014 0493 str r3, [sp, #16] 4636:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); 9064 .loc 1 4636 2 is_stmt 1 view .LVU3061 - ARM GAS /tmp/cc2SVLkL.s page 311 + ARM GAS /tmp/ccH7dUYB.s page 311 4636:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); @@ -18658,7 +18658,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9105 .loc 1 4644 4 is_stmt 1 view .LVU3075 4644:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.objsize = (DWORD)fs->csize * SS(fs); 9106 .loc 1 4644 10 is_stmt 0 view .LVU3076 - ARM GAS /tmp/cc2SVLkL.s page 312 + ARM GAS /tmp/ccH7dUYB.s page 312 9107 0038 0021 movs r1, #0 @@ -18718,7 +18718,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9146 .L662: 4650:Middlewares/Third_Party/FatFs/src/ff.c **** tm = GET_FATTIME(); 9147 .loc 1 4650 4 is_stmt 1 view .LVU3092 - ARM GAS /tmp/cc2SVLkL.s page 313 + ARM GAS /tmp/ccH7dUYB.s page 313 4650:Middlewares/Third_Party/FatFs/src/ff.c **** tm = GET_FATTIME(); @@ -18778,7 +18778,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9188 0088 0B22 movs r2, #11 9189 008a 2021 movs r1, #32 9190 008c 4046 mov r0, r8 - ARM GAS /tmp/cc2SVLkL.s page 314 + ARM GAS /tmp/ccH7dUYB.s page 314 9191 008e FFF7FEFF bl mem_set @@ -18838,7 +18838,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9230 00c8 0398 ldr r0, [sp, #12] 9231 00ca 0378 ldrb r3, [r0] @ zero_extendqisi2 4664:Middlewares/Third_Party/FatFs/src/ff.c **** st_clust(fs, dir + SZDIRE, pcl); - ARM GAS /tmp/cc2SVLkL.s page 315 + ARM GAS /tmp/ccH7dUYB.s page 315 9232 .loc 1 4664 9 view .LVU3122 @@ -18898,7 +18898,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9271 00f0 039B ldr r3, [sp, #12] 9272 00f2 9A89 ldrh r2, [r3, #12] 9273 00f4 0021 movs r1, #0 - ARM GAS /tmp/cc2SVLkL.s page 316 + ARM GAS /tmp/ccH7dUYB.s page 316 9274 00f6 4046 mov r0, r8 @@ -18958,7 +18958,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9315 .loc 1 4664 61 discriminator 2 view .LVU3150 9316 0118 DAE7 b .L665 9317 .LVL1083: - ARM GAS /tmp/cc2SVLkL.s page 317 + ARM GAS /tmp/ccH7dUYB.s page 317 9318 .L667: @@ -19018,7 +19018,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4694:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 9360 .loc 1 4694 6 view .LVU3163 4694:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; - ARM GAS /tmp/cc2SVLkL.s page 318 + ARM GAS /tmp/ccH7dUYB.s page 318 9361 .loc 1 4694 20 is_stmt 0 view .LVU3164 @@ -19078,7 +19078,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9408 0002 A3B0 sub sp, sp, #140 9409 .LCFI107: 9410 .cfi_def_cfa_offset 152 - ARM GAS /tmp/cc2SVLkL.s page 319 + ARM GAS /tmp/ccH7dUYB.s page 319 9411 0004 0190 str r0, [sp, #4] @@ -19138,7 +19138,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 4733:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); 9451 .loc 1 4733 3 is_stmt 1 view .LVU3188 4733:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); - ARM GAS /tmp/cc2SVLkL.s page 320 + ARM GAS /tmp/ccH7dUYB.s page 320 9452 .loc 1 4733 14 is_stmt 0 view .LVU3189 @@ -19198,7 +19198,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9491 004c 1E99 ldr r1, [sp, #120] 9492 004e 0B31 adds r1, r1, #11 9493 0050 03A8 add r0, sp, #12 - ARM GAS /tmp/cc2SVLkL.s page 321 + ARM GAS /tmp/ccH7dUYB.s page 321 9494 0052 FFF7FEFF bl mem_cpy @@ -19258,7 +19258,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9536 .loc 1 4775 8 is_stmt 0 view .LVU3216 9537 0084 0428 cmp r0, #4 9538 0086 0CD0 beq .L687 - ARM GAS /tmp/cc2SVLkL.s page 322 + ARM GAS /tmp/ccH7dUYB.s page 322 9539 .LVL1113: @@ -19318,7 +19318,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9578 .loc 1 4778 7 is_stmt 1 view .LVU3231 4778:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(dir + 13, buf + 2, 19); 9579 .loc 1 4778 11 is_stmt 0 view .LVU3232 - ARM GAS /tmp/cc2SVLkL.s page 323 + ARM GAS /tmp/ccH7dUYB.s page 323 9580 00ae 129D ldr r5, [sp, #72] @@ -19378,7 +19378,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9620 .LVL1124: 9621 00e8 0146 mov r1, r0 4783:Middlewares/Third_Party/FatFs/src/ff.c **** if (!dw) { - ARM GAS /tmp/cc2SVLkL.s page 324 + ARM GAS /tmp/ccH7dUYB.s page 324 9622 .loc 1 4783 13 discriminator 1 view .LVU3247 @@ -19438,7 +19438,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9662 .LVL1131: 4791:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 9663 .loc 1 4791 10 is_stmt 0 view .LVU3262 - ARM GAS /tmp/cc2SVLkL.s page 325 + ARM GAS /tmp/ccH7dUYB.s page 325 9664 0116 FFF7FEFF bl st_clust @@ -19498,7 +19498,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9705 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 9706 .LCFI110: 9707 .cfi_def_cfa_offset 36 - ARM GAS /tmp/cc2SVLkL.s page 326 + ARM GAS /tmp/ccH7dUYB.s page 326 9708 .cfi_offset 4, -36 @@ -19558,7 +19558,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9745 .loc 1 5328 5 is_stmt 0 view .LVU3284 9746 0014 0028 cmp r0, #0 5328:Middlewares/Third_Party/FatFs/src/ff.c **** if (FatFs[vol]) FatFs[vol]->fs_type = 0; /* Clear the volume */ - ARM GAS /tmp/cc2SVLkL.s page 327 + ARM GAS /tmp/ccH7dUYB.s page 327 9747 .loc 1 5328 5 view .LVU3285 @@ -19618,7 +19618,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9784 0042 2046 mov r0, r4 9785 .LVL1141: 5337:Middlewares/Third_Party/FatFs/src/ff.c **** #if _MAX_SS != _MIN_SS /* Get sector size of the medium if variable sector size cfg. */ - ARM GAS /tmp/cc2SVLkL.s page 328 + ARM GAS /tmp/ccH7dUYB.s page 328 9786 .loc 1 5337 6 view .LVU3303 @@ -19678,7 +19678,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9826 007e 00F2D082 bhi .L742 5340:Middlewares/Third_Party/FatFs/src/ff.c **** #else 9827 .loc 1 5340 48 discriminator 2 view .LVU3318 - ARM GAS /tmp/cc2SVLkL.s page 329 + ARM GAS /tmp/ccH7dUYB.s page 329 9828 0082 5A1E subs r2, r3, #1 @@ -19738,7 +19738,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9866 00b6 00F0BE82 beq .L747 5354:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get partition information from partition table in the MBR */ 9867 .loc 1 5354 2 is_stmt 1 view .LVU3335 - ARM GAS /tmp/cc2SVLkL.s page 330 + ARM GAS /tmp/ccH7dUYB.s page 330 5364:Middlewares/Third_Party/FatFs/src/ff.c **** b_vol = (opt & FM_SFD) ? 0 : 63; /* Volume start sector */ @@ -19798,7 +19798,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9905 00ea 802D cmp r5, #128 9906 00ec 00F2B882 bhi .L752 5379:Middlewares/Third_Party/FatFs/src/ff.c **** if ((opt & FM_ANY) == FM_FAT32 || !(opt & FM_FAT)) { /* FAT32 only or no-FAT? */ - ARM GAS /tmp/cc2SVLkL.s page 331 + ARM GAS /tmp/ccH7dUYB.s page 331 9907 .loc 1 5379 3 is_stmt 1 view .LVU3353 @@ -19858,7 +19858,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9950 0136 1D46 mov r5, r3 9951 .LVL1152: 5604:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 332 + ARM GAS /tmp/ccH7dUYB.s page 332 9952 .loc 1 5604 10 view .LVU3365 @@ -19918,7 +19918,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 9990 015a 0444 add r4, r4, r0 5564:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* FAT12/16 volume */ 9991 .loc 1 5564 8 view .LVU3382 - ARM GAS /tmp/cc2SVLkL.s page 333 + ARM GAS /tmp/ccH7dUYB.s page 333 9992 015c 5248 ldr r0, .L793+8 @@ -19978,7 +19978,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10031 0186 DDD0 beq .L706 5558:Middlewares/Third_Party/FatFs/src/ff.c **** } 10032 .loc 1 5558 36 discriminator 3 view .LVU3398 - ARM GAS /tmp/cc2SVLkL.s page 334 + ARM GAS /tmp/ccH7dUYB.s page 334 10033 0188 A342 cmp r3, r4 @@ -20038,7 +20038,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10072 .loc 1 5575 6 view .LVU3413 5575:Middlewares/Third_Party/FatFs/src/ff.c **** } 10073 .loc 1 5575 18 is_stmt 0 view .LVU3414 - ARM GAS /tmp/cc2SVLkL.s page 335 + ARM GAS /tmp/ccH7dUYB.s page 335 10074 01ac 03EB4303 add r3, r3, r3, lsl #1 @@ -20098,7 +20098,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10113 .LVL1178: 5597:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; 10114 .loc 1 5597 14 discriminator 1 view .LVU3430 - ARM GAS /tmp/cc2SVLkL.s page 336 + ARM GAS /tmp/ccH7dUYB.s page 336 10115 01d4 B8F1010F cmp r8, #1 @@ -20158,7 +20158,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10153 01fe A846 mov r8, r5 10154 .LVL1183: 10155 .L710: - ARM GAS /tmp/cc2SVLkL.s page 337 + ARM GAS /tmp/ccH7dUYB.s page 337 5570:Middlewares/Third_Party/FatFs/src/ff.c **** if (n_clst > MAX_FAT12) { @@ -20218,7 +20218,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5581:Middlewares/Third_Party/FatFs/src/ff.c **** b_data = b_fat + sz_fat * n_fats + sz_dir; /* Data base */ 10194 .loc 1 5581 10 is_stmt 0 view .LVU3463 10195 0228 0EEB0B09 add r9, lr, fp - ARM GAS /tmp/cc2SVLkL.s page 338 + ARM GAS /tmp/ccH7dUYB.s page 338 10196 .LVL1191: @@ -20278,7 +20278,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10233 0250 C0F00C82 bcc .L759 5594:Middlewares/Third_Party/FatFs/src/ff.c **** if (fmt == FS_FAT32) { 10234 .loc 1 5594 4 is_stmt 1 view .LVU3481 - ARM GAS /tmp/cc2SVLkL.s page 339 + ARM GAS /tmp/ccH7dUYB.s page 339 5594:Middlewares/Third_Party/FatFs/src/ff.c **** if (fmt == FS_FAT32) { @@ -20338,7 +20338,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5609:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; 10273 .loc 1 5609 6 is_stmt 1 view .LVU3498 5609:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; - ARM GAS /tmp/cc2SVLkL.s page 340 + ARM GAS /tmp/ccH7dUYB.s page 340 10274 .loc 1 5609 9 is_stmt 0 view .LVU3499 @@ -20398,7 +20398,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10318 02c8 40F6F572 movw r2, #4085 10319 02cc BAF1010F cmp r10, #1 10320 02d0 14BF ite ne - ARM GAS /tmp/cc2SVLkL.s page 341 + ARM GAS /tmp/ccH7dUYB.s page 341 10321 02d2 0023 movne r3, #0 @@ -20458,7 +20458,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10363 0314 3374 strb r3, [r6, #16] 5634:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol < 0x10000) { 10364 .loc 1 5634 3 is_stmt 1 view .LVU3522 - ARM GAS /tmp/cc2SVLkL.s page 342 + ARM GAS /tmp/ccH7dUYB.s page 342 10365 0316 06F11100 add r0, r6, #17 @@ -20518,7 +20518,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10406 .loc 1 5644 6 is_stmt 0 view .LVU3535 10407 035e BAF1030F cmp r10, #3 10408 0362 6BD0 beq .L787 - ARM GAS /tmp/cc2SVLkL.s page 343 + ARM GAS /tmp/ccH7dUYB.s page 343 5654:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */ @@ -20578,7 +20578,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10451 03ac FFF7FEFF bl disk_write 10452 .LVL1224: 5661:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 344 + ARM GAS /tmp/ccH7dUYB.s page 344 10453 .loc 1 5661 6 discriminator 1 view .LVU3548 @@ -20638,7 +20638,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5697:Middlewares/Third_Party/FatFs/src/ff.c **** do { 10494 .loc 1 5697 35 view .LVU3562 10495 03e2 DDF82080 ldr r8, [sp, #32] - ARM GAS /tmp/cc2SVLkL.s page 345 + ARM GAS /tmp/ccH7dUYB.s page 345 10496 03e6 0197 str r7, [sp, #4] @@ -20698,7 +20698,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10535 .loc 1 5709 3 view .LVU3577 5709:Middlewares/Third_Party/FatFs/src/ff.c **** sys = 0x0C; /* FAT32X */ 10536 .loc 1 5709 6 is_stmt 0 view .LVU3578 - ARM GAS /tmp/cc2SVLkL.s page 346 + ARM GAS /tmp/ccH7dUYB.s page 346 10537 040e BAF1030F cmp r10, #3 @@ -20758,7 +20758,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5647:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FSInfo32, 1); /* Offset of FSINFO sector (VBR + 1) */ 10579 .loc 1 5647 4 view .LVU3591 10580 0454 0221 movs r1, #2 - ARM GAS /tmp/cc2SVLkL.s page 347 + ARM GAS /tmp/ccH7dUYB.s page 347 10581 0456 06F12C00 add r0, r6, #44 @@ -20818,7 +20818,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10625 04a6 6A49 ldr r1, .L795+12 10626 04a8 3046 mov r0, r6 10627 04aa FFF7FEFF bl st_dword - ARM GAS /tmp/cc2SVLkL.s page 348 + ARM GAS /tmp/ccH7dUYB.s page 348 10628 .LVL1251: @@ -20878,7 +20878,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5685:Middlewares/Third_Party/FatFs/src/ff.c **** } 10673 .loc 1 5685 5 is_stmt 0 discriminator 2 view .LVU3611 10674 0500 6FF00701 mvn r1, #7 - ARM GAS /tmp/cc2SVLkL.s page 349 + ARM GAS /tmp/ccH7dUYB.s page 349 10675 .L731: @@ -20938,7 +20938,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10716 .loc 1 5693 13 view .LVU3624 10717 053a B8EB0A08 subs r8, r8, r10 10718 .LVL1265: - ARM GAS /tmp/cc2SVLkL.s page 350 + ARM GAS /tmp/ccH7dUYB.s page 350 5693:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -20998,7 +20998,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10763 0578 4FF00408 mov r8, #4 10764 .LVL1275: 5715:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 351 + ARM GAS /tmp/ccH7dUYB.s page 351 10765 .loc 1 5715 9 discriminator 1 view .LVU3635 @@ -21058,7 +21058,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5734:Middlewares/Third_Party/FatFs/src/ff.c **** pte[PTE_System] = sys; /* System type */ 10804 .loc 1 5734 19 is_stmt 0 view .LVU3651 10805 05ac 86F8C151 strb r5, [r6, #449] - ARM GAS /tmp/cc2SVLkL.s page 352 + ARM GAS /tmp/ccH7dUYB.s page 352 5735:Middlewares/Third_Party/FatFs/src/ff.c **** n = (b_vol + sz_vol) / (63 * 255); /* (End CHS may be invalid) */ @@ -21118,7 +21118,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10843 05e8 3B46 mov r3, r7 10844 05ea 2A46 mov r2, r5 10845 05ec 3146 mov r1, r6 - ARM GAS /tmp/cc2SVLkL.s page 353 + ARM GAS /tmp/ccH7dUYB.s page 353 10846 05ee 2046 mov r0, r4 @@ -21178,7 +21178,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 5336:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_ioctl(pdrv, GET_BLOCK_SIZE, &sz_blk) != RES_OK || !sz_blk || sz_blk > 32768 || (sz_blk & 10889 .loc 1 5336 33 discriminator 1 view .LVU3680 10890 0616 0A20 movs r0, #10 - ARM GAS /tmp/cc2SVLkL.s page 354 + ARM GAS /tmp/ccH7dUYB.s page 354 10891 .LVL1294: @@ -21238,7 +21238,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10937 .loc 1 5366 30 discriminator 1 view .LVU3688 10938 063e 0E20 movs r0, #14 10939 0640 EAE7 b .L696 - ARM GAS /tmp/cc2SVLkL.s page 355 + ARM GAS /tmp/ccH7dUYB.s page 355 10940 .L796: @@ -21298,7 +21298,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 10985 .LVL1305: 10986 .L764: 5614:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/cc2SVLkL.s page 356 + ARM GAS /tmp/ccH7dUYB.s page 356 10987 .loc 1 5614 13 view .LVU3698 @@ -21358,7 +21358,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11035 @ frame_needed = 0, uses_anonymous_args = 0 5835:Middlewares/Third_Party/FatFs/src/ff.c **** int n = 0; 11036 .loc 1 5835 1 is_stmt 0 view .LVU3707 - ARM GAS /tmp/cc2SVLkL.s page 357 + ARM GAS /tmp/ccH7dUYB.s page 357 11037 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} @@ -21418,7 +21418,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11078 0018 AB42 cmp r3, r5 11079 001a 13DD ble .L799 5887:Middlewares/Third_Party/FatFs/src/ff.c **** if (rc != 1) break; - ARM GAS /tmp/cc2SVLkL.s page 358 + ARM GAS /tmp/ccH7dUYB.s page 358 11080 .loc 1 5887 3 is_stmt 1 view .LVU3721 @@ -21478,7 +21478,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11119 .L799: 5896:Middlewares/Third_Party/FatFs/src/ff.c **** return n ? buff : 0; /* When no data read (eof or error), return with error. */ 11120 .loc 1 5896 2 is_stmt 1 view .LVU3737 - ARM GAS /tmp/cc2SVLkL.s page 359 + ARM GAS /tmp/ccH7dUYB.s page 359 5896:Middlewares/Third_Party/FatFs/src/ff.c **** return n ? buff : 0; /* When no data read (eof or error), return with error. */ @@ -21538,7 +21538,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11162 .loc 1 6002 1 is_stmt 0 view .LVU3746 11163 0000 10B5 push {r4, lr} 11164 .LCFI118: - ARM GAS /tmp/cc2SVLkL.s page 360 + ARM GAS /tmp/ccH7dUYB.s page 360 11165 .cfi_def_cfa_offset 8 @@ -21598,7 +21598,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6015:Middlewares/Third_Party/FatFs/src/ff.c **** /* Put a string to the file */ 6016:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 6017:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/cc2SVLkL.s page 361 + ARM GAS /tmp/ccH7dUYB.s page 361 6018:Middlewares/Third_Party/FatFs/src/ff.c **** int f_puts ( @@ -21658,7 +21658,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6029:Middlewares/Third_Party/FatFs/src/ff.c **** } 11252 .loc 1 6029 1 view .LVU3768 11253 0022 14B0 add sp, sp, #80 - ARM GAS /tmp/cc2SVLkL.s page 362 + ARM GAS /tmp/ccH7dUYB.s page 362 11254 .LCFI123: @@ -21718,7 +21718,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11296 .cfi_def_cfa_offset 160 11297 0008 0146 mov r1, r0 11298 000a 25AC add r4, sp, #148 - ARM GAS /tmp/cc2SVLkL.s page 363 + ARM GAS /tmp/ccH7dUYB.s page 363 11299 000c 54F8045B ldr r5, [r4], #4 @@ -21778,7 +21778,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6061:Middlewares/Third_Party/FatFs/src/ff.c **** continue; 11336 .loc 1 6061 4 view .LVU3790 6057:Middlewares/Third_Party/FatFs/src/ff.c **** if (c == 0) break; /* End of string */ - ARM GAS /tmp/cc2SVLkL.s page 364 + ARM GAS /tmp/ccH7dUYB.s page 364 11337 .loc 1 6057 11 is_stmt 0 view .LVU3791 @@ -21838,7 +21838,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11377 .LVL1349: 6066:Middlewares/Third_Party/FatFs/src/ff.c **** f = 1; c = *fmt++; 11378 .loc 1 6066 6 view .LVU3808 - ARM GAS /tmp/cc2SVLkL.s page 365 + ARM GAS /tmp/ccH7dUYB.s page 365 11379 004a 0126 movs r6, #1 @@ -21898,7 +21898,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11423 0076 46F00406 orr r6, r6, #4 11424 .LVL1357: 11425 .loc 1 6077 12 is_stmt 1 view .LVU3825 - ARM GAS /tmp/cc2SVLkL.s page 366 + ARM GAS /tmp/ccH7dUYB.s page 366 11426 .loc 1 6077 14 is_stmt 0 view .LVU3826 @@ -21958,7 +21958,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11475 00b4 5C .byte (.L824-.L826)/2 11476 00b5 5C .byte (.L824-.L826)/2 11477 00b6 5A .byte (.L825-.L826)/2 - ARM GAS /tmp/cc2SVLkL.s page 367 + ARM GAS /tmp/ccH7dUYB.s page 367 11478 .LVL1361: @@ -22018,7 +22018,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11526 .loc 1 6087 13 is_stmt 0 discriminator 1 view .LVU3851 11527 00e6 3746 mov r7, r6 11528 .LVL1370: - ARM GAS /tmp/cc2SVLkL.s page 368 + ARM GAS /tmp/ccH7dUYB.s page 368 11529 .L834: @@ -22078,7 +22078,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 6093:Middlewares/Third_Party/FatFs/src/ff.c **** case 'C' : /* Character */ 6094:Middlewares/Third_Party/FatFs/src/ff.c **** putc_bfd(&pb, (TCHAR)va_arg(arp, int)); continue; 11578 .loc 1 6094 4 is_stmt 1 view .LVU3866 - ARM GAS /tmp/cc2SVLkL.s page 369 + ARM GAS /tmp/ccH7dUYB.s page 369 11579 .loc 1 6094 25 is_stmt 0 view .LVU3867 @@ -22138,7 +22138,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11613 0138 1268 ldr r2, [r2] 11614 .L842: 11615 .LVL1386: - ARM GAS /tmp/cc2SVLkL.s page 370 + ARM GAS /tmp/ccH7dUYB.s page 370 6115:Middlewares/Third_Party/FatFs/src/ff.c **** if (d == 'D' && (v & 0x80000000)) { @@ -22198,7 +22198,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11657 .loc 1 6082 3 view .LVU3896 11658 0160 0220 movs r0, #2 11659 0162 E3E7 b .L829 - ARM GAS /tmp/cc2SVLkL.s page 371 + ARM GAS /tmp/ccH7dUYB.s page 371 11660 .L859: @@ -22258,7 +22258,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11705 .loc 1 6124 14 is_stmt 1 view .LVU3908 11706 .loc 1 6124 19 is_stmt 0 view .LVU3909 11707 0196 1F2F cmp r7, #31 - ARM GAS /tmp/cc2SVLkL.s page 372 + ARM GAS /tmp/ccH7dUYB.s page 372 11708 0198 8CBF ite hi @@ -22318,7 +22318,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11749 .loc 1 6125 6 is_stmt 0 view .LVU3925 11750 01c2 16F0080F tst r6, #8 11751 01c6 08D0 beq .L849 - ARM GAS /tmp/cc2SVLkL.s page 373 + ARM GAS /tmp/ccH7dUYB.s page 373 11752 .loc 1 6125 14 is_stmt 1 discriminator 1 view .LVU3926 @@ -22378,7 +22378,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11802 .loc 1 6127 23 discriminator 2 view .LVU3942 11803 0206 C846 mov r8, r9 11804 .LVL1412: - ARM GAS /tmp/cc2SVLkL.s page 374 + ARM GAS /tmp/ccH7dUYB.s page 374 11805 .L854: @@ -22438,7 +22438,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11849 @ sp needed 11850 023c BDE8F047 pop {r4, r5, r6, r7, r8, r9, r10, lr} 11851 .LCFI128: - ARM GAS /tmp/cc2SVLkL.s page 375 + ARM GAS /tmp/ccH7dUYB.s page 375 11852 .cfi_restore 14 @@ -22498,7 +22498,7 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11903 0040 C0C1C2C3 .ascii "\300\301\302\303\304\305AA\310\311\312\313\314\315\316" 11903 C4C54141 11903 C8C9CACB - ARM GAS /tmp/cc2SVLkL.s page 376 + ARM GAS /tmp/ccH7dUYB.s page 376 11903 CCCDCE @@ -22542,173 +22542,173 @@ ARM GAS /tmp/cc2SVLkL.s page 1 11933 .file 8 "Middlewares/Third_Party/FatFs/src/diskio.h" 11934 .file 9 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdarg.h" 11935 .file 10 "" - ARM GAS /tmp/cc2SVLkL.s page 377 + ARM GAS /tmp/ccH7dUYB.s page 377 DEFINED SYMBOLS *ABS*:00000000 ff.c - /tmp/cc2SVLkL.s:20 .text.ld_word:00000000 $t - /tmp/cc2SVLkL.s:25 .text.ld_word:00000000 ld_word - /tmp/cc2SVLkL.s:52 .text.ld_dword:00000000 $t - /tmp/cc2SVLkL.s:57 .text.ld_dword:00000000 ld_dword - /tmp/cc2SVLkL.s:96 .text.st_word:00000000 $t - /tmp/cc2SVLkL.s:101 .text.st_word:00000000 st_word - /tmp/cc2SVLkL.s:125 .text.st_dword:00000000 $t - /tmp/cc2SVLkL.s:130 .text.st_dword:00000000 st_dword - /tmp/cc2SVLkL.s:169 .text.mem_cpy:00000000 $t - /tmp/cc2SVLkL.s:174 .text.mem_cpy:00000000 mem_cpy - /tmp/cc2SVLkL.s:214 .text.mem_set:00000000 $t - /tmp/cc2SVLkL.s:219 .text.mem_set:00000000 mem_set - /tmp/cc2SVLkL.s:246 .text.mem_cmp:00000000 $t - /tmp/cc2SVLkL.s:251 .text.mem_cmp:00000000 mem_cmp - /tmp/cc2SVLkL.s:294 .text.chk_chr:00000000 $t - /tmp/cc2SVLkL.s:299 .text.chk_chr:00000000 chk_chr - /tmp/cc2SVLkL.s:335 .text.chk_lock:00000000 $t - /tmp/cc2SVLkL.s:340 .text.chk_lock:00000000 chk_lock - /tmp/cc2SVLkL.s:477 .text.chk_lock:00000078 $d - /tmp/cc2SVLkL.s:11911 .bss.Files:00000000 Files - /tmp/cc2SVLkL.s:482 .text.enq_lock:00000000 $t - /tmp/cc2SVLkL.s:487 .text.enq_lock:00000000 enq_lock - /tmp/cc2SVLkL.s:531 .text.enq_lock:0000001c $d - /tmp/cc2SVLkL.s:536 .text.inc_lock:00000000 $t - /tmp/cc2SVLkL.s:541 .text.inc_lock:00000000 inc_lock - /tmp/cc2SVLkL.s:711 .text.inc_lock:0000009c $d - /tmp/cc2SVLkL.s:716 .text.dec_lock:00000000 $t - /tmp/cc2SVLkL.s:721 .text.dec_lock:00000000 dec_lock - /tmp/cc2SVLkL.s:802 .text.dec_lock:0000003c $d - /tmp/cc2SVLkL.s:807 .text.clear_lock:00000000 $t - /tmp/cc2SVLkL.s:812 .text.clear_lock:00000000 clear_lock - /tmp/cc2SVLkL.s:889 .text.clear_lock:00000038 $d - /tmp/cc2SVLkL.s:894 .text.clust2sect:00000000 $t - /tmp/cc2SVLkL.s:899 .text.clust2sect:00000000 clust2sect - /tmp/cc2SVLkL.s:939 .text.clmt_clust:00000000 $t - /tmp/cc2SVLkL.s:944 .text.clmt_clust:00000000 clmt_clust - /tmp/cc2SVLkL.s:1015 .text.ld_clust:00000000 $t - /tmp/cc2SVLkL.s:1020 .text.ld_clust:00000000 ld_clust - /tmp/cc2SVLkL.s:1076 .text.st_clust:00000000 $t - /tmp/cc2SVLkL.s:1081 .text.st_clust:00000000 st_clust - /tmp/cc2SVLkL.s:1130 .text.get_fileinfo:00000000 $t - /tmp/cc2SVLkL.s:1135 .text.get_fileinfo:00000000 get_fileinfo - /tmp/cc2SVLkL.s:1275 .rodata.create_name.str1.4:00000000 $d - /tmp/cc2SVLkL.s:1279 .text.create_name:00000000 $t - /tmp/cc2SVLkL.s:1284 .text.create_name:00000000 create_name - /tmp/cc2SVLkL.s:1516 .text.create_name:000000c8 $d - /tmp/cc2SVLkL.s:11899 .rodata.ExCvt:00000000 ExCvt - /tmp/cc2SVLkL.s:1522 .text.get_ldnumber:00000000 $t - /tmp/cc2SVLkL.s:1527 .text.get_ldnumber:00000000 get_ldnumber - /tmp/cc2SVLkL.s:1628 .text.putc_init:00000000 $t - /tmp/cc2SVLkL.s:1633 .text.putc_init:00000000 putc_init - /tmp/cc2SVLkL.s:1656 .text.validate:00000000 $t - /tmp/cc2SVLkL.s:1661 .text.validate:00000000 validate - /tmp/cc2SVLkL.s:1770 .text.sync_window:00000000 $t - /tmp/cc2SVLkL.s:1775 .text.sync_window:00000000 sync_window - ARM GAS /tmp/cc2SVLkL.s page 378 + /tmp/ccH7dUYB.s:20 .text.ld_word:00000000 $t + /tmp/ccH7dUYB.s:25 .text.ld_word:00000000 ld_word + /tmp/ccH7dUYB.s:52 .text.ld_dword:00000000 $t + /tmp/ccH7dUYB.s:57 .text.ld_dword:00000000 ld_dword + /tmp/ccH7dUYB.s:96 .text.st_word:00000000 $t + /tmp/ccH7dUYB.s:101 .text.st_word:00000000 st_word + /tmp/ccH7dUYB.s:125 .text.st_dword:00000000 $t + /tmp/ccH7dUYB.s:130 .text.st_dword:00000000 st_dword + /tmp/ccH7dUYB.s:169 .text.mem_cpy:00000000 $t + /tmp/ccH7dUYB.s:174 .text.mem_cpy:00000000 mem_cpy + /tmp/ccH7dUYB.s:214 .text.mem_set:00000000 $t + /tmp/ccH7dUYB.s:219 .text.mem_set:00000000 mem_set + /tmp/ccH7dUYB.s:246 .text.mem_cmp:00000000 $t + /tmp/ccH7dUYB.s:251 .text.mem_cmp:00000000 mem_cmp + /tmp/ccH7dUYB.s:294 .text.chk_chr:00000000 $t + /tmp/ccH7dUYB.s:299 .text.chk_chr:00000000 chk_chr + /tmp/ccH7dUYB.s:335 .text.chk_lock:00000000 $t + /tmp/ccH7dUYB.s:340 .text.chk_lock:00000000 chk_lock + /tmp/ccH7dUYB.s:477 .text.chk_lock:00000078 $d + /tmp/ccH7dUYB.s:11911 .bss.Files:00000000 Files + /tmp/ccH7dUYB.s:482 .text.enq_lock:00000000 $t + /tmp/ccH7dUYB.s:487 .text.enq_lock:00000000 enq_lock + /tmp/ccH7dUYB.s:531 .text.enq_lock:0000001c $d + /tmp/ccH7dUYB.s:536 .text.inc_lock:00000000 $t + /tmp/ccH7dUYB.s:541 .text.inc_lock:00000000 inc_lock + /tmp/ccH7dUYB.s:711 .text.inc_lock:0000009c $d + /tmp/ccH7dUYB.s:716 .text.dec_lock:00000000 $t + /tmp/ccH7dUYB.s:721 .text.dec_lock:00000000 dec_lock + /tmp/ccH7dUYB.s:802 .text.dec_lock:0000003c $d + /tmp/ccH7dUYB.s:807 .text.clear_lock:00000000 $t + /tmp/ccH7dUYB.s:812 .text.clear_lock:00000000 clear_lock + /tmp/ccH7dUYB.s:889 .text.clear_lock:00000038 $d + /tmp/ccH7dUYB.s:894 .text.clust2sect:00000000 $t + /tmp/ccH7dUYB.s:899 .text.clust2sect:00000000 clust2sect + /tmp/ccH7dUYB.s:939 .text.clmt_clust:00000000 $t + /tmp/ccH7dUYB.s:944 .text.clmt_clust:00000000 clmt_clust + /tmp/ccH7dUYB.s:1015 .text.ld_clust:00000000 $t + /tmp/ccH7dUYB.s:1020 .text.ld_clust:00000000 ld_clust + /tmp/ccH7dUYB.s:1076 .text.st_clust:00000000 $t + /tmp/ccH7dUYB.s:1081 .text.st_clust:00000000 st_clust + /tmp/ccH7dUYB.s:1130 .text.get_fileinfo:00000000 $t + /tmp/ccH7dUYB.s:1135 .text.get_fileinfo:00000000 get_fileinfo + /tmp/ccH7dUYB.s:1275 .rodata.create_name.str1.4:00000000 $d + /tmp/ccH7dUYB.s:1279 .text.create_name:00000000 $t + /tmp/ccH7dUYB.s:1284 .text.create_name:00000000 create_name + /tmp/ccH7dUYB.s:1516 .text.create_name:000000c8 $d + /tmp/ccH7dUYB.s:11899 .rodata.ExCvt:00000000 ExCvt + /tmp/ccH7dUYB.s:1522 .text.get_ldnumber:00000000 $t + /tmp/ccH7dUYB.s:1527 .text.get_ldnumber:00000000 get_ldnumber + /tmp/ccH7dUYB.s:1628 .text.putc_init:00000000 $t + /tmp/ccH7dUYB.s:1633 .text.putc_init:00000000 putc_init + /tmp/ccH7dUYB.s:1656 .text.validate:00000000 $t + /tmp/ccH7dUYB.s:1661 .text.validate:00000000 validate + /tmp/ccH7dUYB.s:1770 .text.sync_window:00000000 $t + /tmp/ccH7dUYB.s:1775 .text.sync_window:00000000 sync_window + ARM GAS /tmp/ccH7dUYB.s page 378 - /tmp/cc2SVLkL.s:1882 .text.move_window:00000000 $t - /tmp/cc2SVLkL.s:1887 .text.move_window:00000000 move_window - /tmp/cc2SVLkL.s:1959 .text.check_fs:00000000 $t - /tmp/cc2SVLkL.s:1964 .text.check_fs:00000000 check_fs - /tmp/cc2SVLkL.s:2060 .text.check_fs:0000006c $d - /tmp/cc2SVLkL.s:2067 .text.find_volume:00000000 $t - /tmp/cc2SVLkL.s:2072 .text.find_volume:00000000 find_volume - /tmp/cc2SVLkL.s:2746 .text.find_volume:00000314 $d - /tmp/cc2SVLkL.s:11923 .bss.FatFs:00000000 FatFs - /tmp/cc2SVLkL.s:11917 .bss.Fsid:00000000 Fsid - /tmp/cc2SVLkL.s:2753 .text.find_volume:00000324 $t - /tmp/cc2SVLkL.s:2802 .text.put_fat:00000000 $t - /tmp/cc2SVLkL.s:2807 .text.put_fat:00000000 put_fat - /tmp/cc2SVLkL.s:3085 .text.get_fat:00000000 $t - /tmp/cc2SVLkL.s:3090 .text.get_fat:00000000 get_fat - /tmp/cc2SVLkL.s:3338 .text.dir_sdi:00000000 $t - /tmp/cc2SVLkL.s:3343 .text.dir_sdi:00000000 dir_sdi - /tmp/cc2SVLkL.s:3548 .text.create_chain:00000000 $t - /tmp/cc2SVLkL.s:3553 .text.create_chain:00000000 create_chain - /tmp/cc2SVLkL.s:3789 .text.remove_chain:00000000 $t - /tmp/cc2SVLkL.s:3794 .text.remove_chain:00000000 remove_chain - /tmp/cc2SVLkL.s:3955 .text.dir_remove:00000000 $t - /tmp/cc2SVLkL.s:3960 .text.dir_remove:00000000 dir_remove - /tmp/cc2SVLkL.s:4011 .text.dir_next:00000000 $t - /tmp/cc2SVLkL.s:4016 .text.dir_next:00000000 dir_next - /tmp/cc2SVLkL.s:4326 .text.dir_find:00000000 $t - /tmp/cc2SVLkL.s:4331 .text.dir_find:00000000 dir_find - /tmp/cc2SVLkL.s:4439 .text.follow_path:00000000 $t - /tmp/cc2SVLkL.s:4444 .text.follow_path:00000000 follow_path - /tmp/cc2SVLkL.s:4612 .text.dir_alloc:00000000 $t - /tmp/cc2SVLkL.s:4617 .text.dir_alloc:00000000 dir_alloc - /tmp/cc2SVLkL.s:4728 .text.dir_register:00000000 $t - /tmp/cc2SVLkL.s:4733 .text.dir_register:00000000 dir_register - /tmp/cc2SVLkL.s:4807 .text.dir_read:00000000 $t - /tmp/cc2SVLkL.s:4812 .text.dir_read:00000000 dir_read - /tmp/cc2SVLkL.s:4934 .text.sync_fs:00000000 $t - /tmp/cc2SVLkL.s:4939 .text.sync_fs:00000000 sync_fs - /tmp/cc2SVLkL.s:5053 .text.sync_fs:00000080 $d - /tmp/cc2SVLkL.s:5059 .text.f_mount:00000000 $t - /tmp/cc2SVLkL.s:5065 .text.f_mount:00000000 f_mount - /tmp/cc2SVLkL.s:5181 .text.f_mount:0000005c $d - /tmp/cc2SVLkL.s:5186 .text.f_open:00000000 $t - /tmp/cc2SVLkL.s:5192 .text.f_open:00000000 f_open - /tmp/cc2SVLkL.s:5748 .text.f_read:00000000 $t - /tmp/cc2SVLkL.s:5754 .text.f_read:00000000 f_read - /tmp/cc2SVLkL.s:6186 .text.f_write:00000000 $t - /tmp/cc2SVLkL.s:6192 .text.f_write:00000000 f_write - /tmp/cc2SVLkL.s:6673 .text.putc_bfd:00000000 $t - /tmp/cc2SVLkL.s:6678 .text.putc_bfd:00000000 putc_bfd - /tmp/cc2SVLkL.s:6790 .text.putc_flush:00000000 $t - /tmp/cc2SVLkL.s:6795 .text.putc_flush:00000000 putc_flush - /tmp/cc2SVLkL.s:6874 .text.f_sync:00000000 $t - /tmp/cc2SVLkL.s:6880 .text.f_sync:00000000 f_sync - /tmp/cc2SVLkL.s:7031 .text.f_close:00000000 $t - /tmp/cc2SVLkL.s:7037 .text.f_close:00000000 f_close - /tmp/cc2SVLkL.s:7106 .text.f_lseek:00000000 $t - /tmp/cc2SVLkL.s:7112 .text.f_lseek:00000000 f_lseek - ARM GAS /tmp/cc2SVLkL.s page 379 + /tmp/ccH7dUYB.s:1882 .text.move_window:00000000 $t + /tmp/ccH7dUYB.s:1887 .text.move_window:00000000 move_window + /tmp/ccH7dUYB.s:1959 .text.check_fs:00000000 $t + /tmp/ccH7dUYB.s:1964 .text.check_fs:00000000 check_fs + /tmp/ccH7dUYB.s:2060 .text.check_fs:0000006c $d + /tmp/ccH7dUYB.s:2067 .text.find_volume:00000000 $t + /tmp/ccH7dUYB.s:2072 .text.find_volume:00000000 find_volume + /tmp/ccH7dUYB.s:2746 .text.find_volume:00000314 $d + /tmp/ccH7dUYB.s:11923 .bss.FatFs:00000000 FatFs + /tmp/ccH7dUYB.s:11917 .bss.Fsid:00000000 Fsid + /tmp/ccH7dUYB.s:2753 .text.find_volume:00000324 $t + /tmp/ccH7dUYB.s:2802 .text.put_fat:00000000 $t + /tmp/ccH7dUYB.s:2807 .text.put_fat:00000000 put_fat + /tmp/ccH7dUYB.s:3085 .text.get_fat:00000000 $t + /tmp/ccH7dUYB.s:3090 .text.get_fat:00000000 get_fat + /tmp/ccH7dUYB.s:3338 .text.dir_sdi:00000000 $t + /tmp/ccH7dUYB.s:3343 .text.dir_sdi:00000000 dir_sdi + /tmp/ccH7dUYB.s:3548 .text.create_chain:00000000 $t + /tmp/ccH7dUYB.s:3553 .text.create_chain:00000000 create_chain + /tmp/ccH7dUYB.s:3789 .text.remove_chain:00000000 $t + /tmp/ccH7dUYB.s:3794 .text.remove_chain:00000000 remove_chain + /tmp/ccH7dUYB.s:3955 .text.dir_remove:00000000 $t + /tmp/ccH7dUYB.s:3960 .text.dir_remove:00000000 dir_remove + /tmp/ccH7dUYB.s:4011 .text.dir_next:00000000 $t + /tmp/ccH7dUYB.s:4016 .text.dir_next:00000000 dir_next + /tmp/ccH7dUYB.s:4326 .text.dir_find:00000000 $t + /tmp/ccH7dUYB.s:4331 .text.dir_find:00000000 dir_find + /tmp/ccH7dUYB.s:4439 .text.follow_path:00000000 $t + /tmp/ccH7dUYB.s:4444 .text.follow_path:00000000 follow_path + /tmp/ccH7dUYB.s:4612 .text.dir_alloc:00000000 $t + /tmp/ccH7dUYB.s:4617 .text.dir_alloc:00000000 dir_alloc + /tmp/ccH7dUYB.s:4728 .text.dir_register:00000000 $t + /tmp/ccH7dUYB.s:4733 .text.dir_register:00000000 dir_register + /tmp/ccH7dUYB.s:4807 .text.dir_read:00000000 $t + /tmp/ccH7dUYB.s:4812 .text.dir_read:00000000 dir_read + /tmp/ccH7dUYB.s:4934 .text.sync_fs:00000000 $t + /tmp/ccH7dUYB.s:4939 .text.sync_fs:00000000 sync_fs + /tmp/ccH7dUYB.s:5053 .text.sync_fs:00000080 $d + /tmp/ccH7dUYB.s:5059 .text.f_mount:00000000 $t + /tmp/ccH7dUYB.s:5065 .text.f_mount:00000000 f_mount + /tmp/ccH7dUYB.s:5181 .text.f_mount:0000005c $d + /tmp/ccH7dUYB.s:5186 .text.f_open:00000000 $t + /tmp/ccH7dUYB.s:5192 .text.f_open:00000000 f_open + /tmp/ccH7dUYB.s:5748 .text.f_read:00000000 $t + /tmp/ccH7dUYB.s:5754 .text.f_read:00000000 f_read + /tmp/ccH7dUYB.s:6186 .text.f_write:00000000 $t + /tmp/ccH7dUYB.s:6192 .text.f_write:00000000 f_write + /tmp/ccH7dUYB.s:6673 .text.putc_bfd:00000000 $t + /tmp/ccH7dUYB.s:6678 .text.putc_bfd:00000000 putc_bfd + /tmp/ccH7dUYB.s:6790 .text.putc_flush:00000000 $t + /tmp/ccH7dUYB.s:6795 .text.putc_flush:00000000 putc_flush + /tmp/ccH7dUYB.s:6874 .text.f_sync:00000000 $t + /tmp/ccH7dUYB.s:6880 .text.f_sync:00000000 f_sync + /tmp/ccH7dUYB.s:7031 .text.f_close:00000000 $t + /tmp/ccH7dUYB.s:7037 .text.f_close:00000000 f_close + /tmp/ccH7dUYB.s:7106 .text.f_lseek:00000000 $t + /tmp/ccH7dUYB.s:7112 .text.f_lseek:00000000 f_lseek + ARM GAS /tmp/ccH7dUYB.s page 379 - /tmp/cc2SVLkL.s:7838 .text.f_opendir:00000000 $t - /tmp/cc2SVLkL.s:7844 .text.f_opendir:00000000 f_opendir - /tmp/cc2SVLkL.s:8024 .text.f_closedir:00000000 $t - /tmp/cc2SVLkL.s:8030 .text.f_closedir:00000000 f_closedir - /tmp/cc2SVLkL.s:8096 .text.f_readdir:00000000 $t - /tmp/cc2SVLkL.s:8102 .text.f_readdir:00000000 f_readdir - /tmp/cc2SVLkL.s:8207 .text.f_stat:00000000 $t - /tmp/cc2SVLkL.s:8213 .text.f_stat:00000000 f_stat - /tmp/cc2SVLkL.s:8306 .text.f_getfree:00000000 $t - /tmp/cc2SVLkL.s:8312 .text.f_getfree:00000000 f_getfree - /tmp/cc2SVLkL.s:8597 .text.f_truncate:00000000 $t - /tmp/cc2SVLkL.s:8603 .text.f_truncate:00000000 f_truncate - /tmp/cc2SVLkL.s:8787 .text.f_unlink:00000000 $t - /tmp/cc2SVLkL.s:8793 .text.f_unlink:00000000 f_unlink - /tmp/cc2SVLkL.s:9015 .text.f_mkdir:00000000 $t - /tmp/cc2SVLkL.s:9021 .text.f_mkdir:00000000 f_mkdir - /tmp/cc2SVLkL.s:9388 .text.f_rename:00000000 $t - /tmp/cc2SVLkL.s:9394 .text.f_rename:00000000 f_rename - /tmp/cc2SVLkL.s:9681 .rodata.f_mkfs.str1.4:00000000 $d - /tmp/cc2SVLkL.s:9691 .text.f_mkfs:00000000 $t - /tmp/cc2SVLkL.s:9697 .text.f_mkfs:00000000 f_mkfs - /tmp/cc2SVLkL.s:10298 .text.f_mkfs:000002a0 $d - /tmp/cc2SVLkL.s:11887 .rodata.cst32.1:00000000 cst32.1 - /tmp/cc2SVLkL.s:11875 .rodata.cst.0:00000000 cst.0 - /tmp/cc2SVLkL.s:10306 .text.f_mkfs:000002b4 $t - /tmp/cc2SVLkL.s:10943 .text.f_mkfs:00000644 $d - /tmp/cc2SVLkL.s:10951 .text.f_mkfs:0000065c $t - /tmp/cc2SVLkL.s:11023 .text.f_gets:00000000 $t - /tmp/cc2SVLkL.s:11029 .text.f_gets:00000000 f_gets - /tmp/cc2SVLkL.s:11149 .text.f_putc:00000000 $t - /tmp/cc2SVLkL.s:11155 .text.f_putc:00000000 f_putc - /tmp/cc2SVLkL.s:11200 .text.f_puts:00000000 $t - /tmp/cc2SVLkL.s:11206 .text.f_puts:00000000 f_puts - /tmp/cc2SVLkL.s:11263 .text.f_printf:00000000 $t - /tmp/cc2SVLkL.s:11269 .text.f_printf:00000000 f_printf - /tmp/cc2SVLkL.s:11455 .text.f_printf:000000a0 $d - /tmp/cc2SVLkL.s:11872 .rodata.cst.0:00000000 $d - /tmp/cc2SVLkL.s:11884 .rodata.cst32.1:00000000 $d - /tmp/cc2SVLkL.s:11896 .rodata.ExCvt:00000000 $d - /tmp/cc2SVLkL.s:11908 .bss.Files:00000000 $d - /tmp/cc2SVLkL.s:11914 .bss.Fsid:00000000 $d - /tmp/cc2SVLkL.s:11920 .bss.FatFs:00000000 $d - /tmp/cc2SVLkL.s:11479 .text.f_printf:000000b7 $d - /tmp/cc2SVLkL.s:11479 .text.f_printf:000000b8 $t + /tmp/ccH7dUYB.s:7838 .text.f_opendir:00000000 $t + /tmp/ccH7dUYB.s:7844 .text.f_opendir:00000000 f_opendir + /tmp/ccH7dUYB.s:8024 .text.f_closedir:00000000 $t + /tmp/ccH7dUYB.s:8030 .text.f_closedir:00000000 f_closedir + /tmp/ccH7dUYB.s:8096 .text.f_readdir:00000000 $t + /tmp/ccH7dUYB.s:8102 .text.f_readdir:00000000 f_readdir + /tmp/ccH7dUYB.s:8207 .text.f_stat:00000000 $t + /tmp/ccH7dUYB.s:8213 .text.f_stat:00000000 f_stat + /tmp/ccH7dUYB.s:8306 .text.f_getfree:00000000 $t + /tmp/ccH7dUYB.s:8312 .text.f_getfree:00000000 f_getfree + /tmp/ccH7dUYB.s:8597 .text.f_truncate:00000000 $t + /tmp/ccH7dUYB.s:8603 .text.f_truncate:00000000 f_truncate + /tmp/ccH7dUYB.s:8787 .text.f_unlink:00000000 $t + /tmp/ccH7dUYB.s:8793 .text.f_unlink:00000000 f_unlink + /tmp/ccH7dUYB.s:9015 .text.f_mkdir:00000000 $t + /tmp/ccH7dUYB.s:9021 .text.f_mkdir:00000000 f_mkdir + /tmp/ccH7dUYB.s:9388 .text.f_rename:00000000 $t + /tmp/ccH7dUYB.s:9394 .text.f_rename:00000000 f_rename + /tmp/ccH7dUYB.s:9681 .rodata.f_mkfs.str1.4:00000000 $d + /tmp/ccH7dUYB.s:9691 .text.f_mkfs:00000000 $t + /tmp/ccH7dUYB.s:9697 .text.f_mkfs:00000000 f_mkfs + /tmp/ccH7dUYB.s:10298 .text.f_mkfs:000002a0 $d + /tmp/ccH7dUYB.s:11887 .rodata.cst32.1:00000000 cst32.1 + /tmp/ccH7dUYB.s:11875 .rodata.cst.0:00000000 cst.0 + /tmp/ccH7dUYB.s:10306 .text.f_mkfs:000002b4 $t + /tmp/ccH7dUYB.s:10943 .text.f_mkfs:00000644 $d + /tmp/ccH7dUYB.s:10951 .text.f_mkfs:0000065c $t + /tmp/ccH7dUYB.s:11023 .text.f_gets:00000000 $t + /tmp/ccH7dUYB.s:11029 .text.f_gets:00000000 f_gets + /tmp/ccH7dUYB.s:11149 .text.f_putc:00000000 $t + /tmp/ccH7dUYB.s:11155 .text.f_putc:00000000 f_putc + /tmp/ccH7dUYB.s:11200 .text.f_puts:00000000 $t + /tmp/ccH7dUYB.s:11206 .text.f_puts:00000000 f_puts + /tmp/ccH7dUYB.s:11263 .text.f_printf:00000000 $t + /tmp/ccH7dUYB.s:11269 .text.f_printf:00000000 f_printf + /tmp/ccH7dUYB.s:11455 .text.f_printf:000000a0 $d + /tmp/ccH7dUYB.s:11872 .rodata.cst.0:00000000 $d + /tmp/ccH7dUYB.s:11884 .rodata.cst32.1:00000000 $d + /tmp/ccH7dUYB.s:11896 .rodata.ExCvt:00000000 $d + /tmp/ccH7dUYB.s:11908 .bss.Files:00000000 $d + /tmp/ccH7dUYB.s:11914 .bss.Fsid:00000000 $d + /tmp/ccH7dUYB.s:11920 .bss.FatFs:00000000 $d + /tmp/ccH7dUYB.s:11479 .text.f_printf:000000b7 $d + /tmp/ccH7dUYB.s:11479 .text.f_printf:000000b8 $t UNDEFINED SYMBOLS disk_status diff --git a/build/ff.o b/build/ff.o index 8e7fcbe..511f973 100644 Binary files a/build/ff.o and b/build/ff.o differ diff --git a/build/ff_gen_drv.lst b/build/ff_gen_drv.lst index 7683d96..47d73b9 100644 --- a/build/ff_gen_drv.lst +++ b/build/ff_gen_drv.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccRuuTXi.s page 1 +ARM GAS /tmp/ccoeDKf8.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1 28:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** 29:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** /** 30:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * @brief Links a compatible diskio driver/lun id and increments the number of active - ARM GAS /tmp/ccRuuTXi.s page 2 + ARM GAS /tmp/ccoeDKf8.s page 2 31:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * linked drivers. @@ -118,7 +118,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1 64 .loc 1 48 5 is_stmt 1 view .LVU13 65 .loc 1 48 18 is_stmt 0 view .LVU14 66 002c 5C7A ldrb r4, [r3, #9] @ zero_extendqisi2 - ARM GAS /tmp/ccRuuTXi.s page 3 + ARM GAS /tmp/ccoeDKf8.s page 3 67 .LVL2: @@ -178,7 +178,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1 41:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** uint8_t DiskNum = 0; 111 .loc 1 41 11 view .LVU32 112 004c 0120 movs r0, #1 - ARM GAS /tmp/ccRuuTXi.s page 4 + ARM GAS /tmp/ccoeDKf8.s page 4 113 .LVL10: @@ -238,7 +238,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1 156 .global FATFS_UnLinkDriverEx 157 .syntax unified 158 .thumb - ARM GAS /tmp/ccRuuTXi.s page 5 + ARM GAS /tmp/ccoeDKf8.s page 5 159 .thumb_func @@ -298,7 +298,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1 195 .LVL15: 196 .loc 1 90 25 view .LVU54 197 001c 0020 movs r0, #0 - ARM GAS /tmp/ccRuuTXi.s page 6 + ARM GAS /tmp/ccoeDKf8.s page 6 198 .LVL16: @@ -358,7 +358,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1 242 .align 1 243 .global FATFS_UnLinkDriver 244 .syntax unified - ARM GAS /tmp/ccRuuTXi.s page 7 + ARM GAS /tmp/ccoeDKf8.s page 7 245 .thumb @@ -418,7 +418,7 @@ ARM GAS /tmp/ccRuuTXi.s page 1 283 @ frame_needed = 0, uses_anonymous_args = 0 284 @ link register save eliminated. 118:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** return disk.nbr; - ARM GAS /tmp/ccRuuTXi.s page 8 + ARM GAS /tmp/ccoeDKf8.s page 8 285 .loc 1 118 3 view .LVU75 @@ -450,25 +450,25 @@ ARM GAS /tmp/ccRuuTXi.s page 1 311 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 312 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 313 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" - ARM GAS /tmp/ccRuuTXi.s page 9 + ARM GAS /tmp/ccoeDKf8.s page 9 DEFINED SYMBOLS *ABS*:00000000 ff_gen_drv.c - /tmp/ccRuuTXi.s:20 .text.FATFS_LinkDriverEx:00000000 $t - /tmp/ccRuuTXi.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx - /tmp/ccRuuTXi.s:120 .text.FATFS_LinkDriverEx:00000050 $d - /tmp/ccRuuTXi.s:303 .bss.disk:00000000 disk - /tmp/ccRuuTXi.s:125 .text.FATFS_LinkDriver:00000000 $t - /tmp/ccRuuTXi.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver - /tmp/ccRuuTXi.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t - /tmp/ccRuuTXi.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx - /tmp/ccRuuTXi.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d - /tmp/ccRuuTXi.s:242 .text.FATFS_UnLinkDriver:00000000 $t - /tmp/ccRuuTXi.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver - /tmp/ccRuuTXi.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t - /tmp/ccRuuTXi.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr - /tmp/ccRuuTXi.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d - /tmp/ccRuuTXi.s:300 .bss.disk:00000000 $d + /tmp/ccoeDKf8.s:20 .text.FATFS_LinkDriverEx:00000000 $t + /tmp/ccoeDKf8.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx + /tmp/ccoeDKf8.s:120 .text.FATFS_LinkDriverEx:00000050 $d + /tmp/ccoeDKf8.s:303 .bss.disk:00000000 disk + /tmp/ccoeDKf8.s:125 .text.FATFS_LinkDriver:00000000 $t + /tmp/ccoeDKf8.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver + /tmp/ccoeDKf8.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t + /tmp/ccoeDKf8.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx + /tmp/ccoeDKf8.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d + /tmp/ccoeDKf8.s:242 .text.FATFS_UnLinkDriver:00000000 $t + /tmp/ccoeDKf8.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver + /tmp/ccoeDKf8.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t + /tmp/ccoeDKf8.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr + /tmp/ccoeDKf8.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d + /tmp/ccoeDKf8.s:300 .bss.disk:00000000 $d NO UNDEFINED SYMBOLS diff --git a/build/ff_gen_drv.o b/build/ff_gen_drv.o index e8ae7af..4d0c450 100644 Binary files a/build/ff_gen_drv.o and b/build/ff_gen_drv.o differ diff --git a/build/main.lst b/build/main.lst index d0b2a72..ec5dd32 100644 --- a/build/main.lst +++ b/build/main.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccO46DoU.s page 1 +ARM GAS /tmp/ccYgfTud.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 28:Drivers/CMSIS/Include/core_cm7.h **** #pragma clang system_header /* treat file as system include file */ 29:Drivers/CMSIS/Include/core_cm7.h **** #endif 30:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 2 + ARM GAS /tmp/ccYgfTud.s page 2 31:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __CORE_CM7_H_GENERIC @@ -118,7 +118,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 85:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 86:Drivers/CMSIS/Include/core_cm7.h **** #endif 87:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 3 + ARM GAS /tmp/ccYgfTud.s page 3 88:Drivers/CMSIS/Include/core_cm7.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) @@ -178,7 +178,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 142:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 143:Drivers/CMSIS/Include/core_cm7.h **** #endif 144:Drivers/CMSIS/Include/core_cm7.h **** #else - ARM GAS /tmp/ccO46DoU.s page 4 + ARM GAS /tmp/ccYgfTud.s page 4 145:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U @@ -238,7 +238,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 199:Drivers/CMSIS/Include/core_cm7.h **** #warning "__ICACHE_PRESENT not defined in device header file; using default!" 200:Drivers/CMSIS/Include/core_cm7.h **** #endif 201:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 5 + ARM GAS /tmp/ccYgfTud.s page 5 202:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __DCACHE_PRESENT @@ -298,7 +298,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 256:Drivers/CMSIS/Include/core_cm7.h **** - Core MPU Register 257:Drivers/CMSIS/Include/core_cm7.h **** - Core FPU Register 258:Drivers/CMSIS/Include/core_cm7.h **** ******************************************************************************/ - ARM GAS /tmp/ccO46DoU.s page 6 + ARM GAS /tmp/ccYgfTud.s page 6 259:Drivers/CMSIS/Include/core_cm7.h **** /** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 313:Drivers/CMSIS/Include/core_cm7.h **** typedef union 314:Drivers/CMSIS/Include/core_cm7.h **** { 315:Drivers/CMSIS/Include/core_cm7.h **** struct - ARM GAS /tmp/ccO46DoU.s page 7 + ARM GAS /tmp/ccYgfTud.s page 7 316:Drivers/CMSIS/Include/core_cm7.h **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 370:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Pos 24U /*!< xPSR 371:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR 372:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 8 + ARM GAS /tmp/ccYgfTud.s page 8 373:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_GE_Pos 16U /*!< xPSR @@ -478,7 +478,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 427:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * 428:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED2[24U]; 429:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register - ARM GAS /tmp/ccO46DoU.s page 9 + ARM GAS /tmp/ccYgfTud.s page 9 430:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED3[24U]; @@ -538,7 +538,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 484:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[15U]; 485:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 486:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 - ARM GAS /tmp/ccO46DoU.s page 10 + ARM GAS /tmp/ccYgfTud.s page 10 487:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 541:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB 542:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB 543:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 11 + ARM GAS /tmp/ccYgfTud.s page 11 544:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB @@ -658,7 +658,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 598:Drivers/CMSIS/Include/core_cm7.h **** 599:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Pos 16U /*!< SCB 600:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB - ARM GAS /tmp/ccO46DoU.s page 12 + ARM GAS /tmp/ccYgfTud.s page 12 601:Drivers/CMSIS/Include/core_cm7.h **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 655:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB 656:Drivers/CMSIS/Include/core_cm7.h **** 657:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB - ARM GAS /tmp/ccO46DoU.s page 13 + ARM GAS /tmp/ccYgfTud.s page 13 658:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB @@ -778,7 +778,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 712:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB 713:Drivers/CMSIS/Include/core_cm7.h **** 714:Drivers/CMSIS/Include/core_cm7.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ - ARM GAS /tmp/ccO46DoU.s page 14 + ARM GAS /tmp/ccYgfTud.s page 14 715:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB @@ -838,7 +838,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 769:Drivers/CMSIS/Include/core_cm7.h **** 770:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Pos 24U /*!< SCB 771:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB - ARM GAS /tmp/ccO46DoU.s page 15 + ARM GAS /tmp/ccYgfTud.s page 15 772:Drivers/CMSIS/Include/core_cm7.h **** @@ -898,7 +898,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 826:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Pos 5U /*!< SCB 827:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB 828:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 16 + ARM GAS /tmp/ccYgfTud.s page 16 829:Drivers/CMSIS/Include/core_cm7.h **** /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 883:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB 884:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB 885:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 17 + ARM GAS /tmp/ccYgfTud.s page 17 886:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_CTL_Pos 0U /*!< SCB @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 940:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: 941:Drivers/CMSIS/Include/core_cm7.h **** 942:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: - ARM GAS /tmp/ccO46DoU.s page 18 + ARM GAS /tmp/ccYgfTud.s page 18 943:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 997:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT 998:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT 999:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 19 + ARM GAS /tmp/ccYgfTud.s page 19 1000:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_SysTick */ @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1054:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM 1055:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM 1056:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 20 + ARM GAS /tmp/ccYgfTud.s page 20 1057:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1111:Drivers/CMSIS/Include/core_cm7.h **** */ 1112:Drivers/CMSIS/Include/core_cm7.h **** 1113:Drivers/CMSIS/Include/core_cm7.h **** /** - ARM GAS /tmp/ccO46DoU.s page 21 + ARM GAS /tmp/ccYgfTud.s page 21 1114:Drivers/CMSIS/Include/core_cm7.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT). @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1168:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR 1169:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR 1170:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 22 + ARM GAS /tmp/ccYgfTud.s page 22 1171:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1225:Drivers/CMSIS/Include/core_cm7.h **** /* DWT Comparator Function Register Definitions */ 1226:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN 1227:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN - ARM GAS /tmp/ccO46DoU.s page 23 + ARM GAS /tmp/ccYgfTud.s page 23 1228:Drivers/CMSIS/Include/core_cm7.h **** @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1282:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[1U]; 1283:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ 1284:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - ARM GAS /tmp/ccO46DoU.s page 24 + ARM GAS /tmp/ccYgfTud.s page 24 1285:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1339:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF 1340:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF 1341:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 25 + ARM GAS /tmp/ccYgfTud.s page 25 1342:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1396:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV 1397:Drivers/CMSIS/Include/core_cm7.h **** 1398:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV - ARM GAS /tmp/ccO46DoU.s page 26 + ARM GAS /tmp/ccYgfTud.s page 26 1399:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1453:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU 1454:Drivers/CMSIS/Include/core_cm7.h **** 1455:Drivers/CMSIS/Include/core_cm7.h **** /* MPU Control Register Definitions */ - ARM GAS /tmp/ccO46DoU.s page 27 + ARM GAS /tmp/ccYgfTud.s page 27 1456:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1510:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_MPU */ 1511:Drivers/CMSIS/Include/core_cm7.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ 1512:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 28 + ARM GAS /tmp/ccYgfTud.s page 28 1513:Drivers/CMSIS/Include/core_cm7.h **** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1567:Drivers/CMSIS/Include/core_cm7.h **** /* Floating-Point Default Status Control Register Definitions */ 1568:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS 1569:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS - ARM GAS /tmp/ccO46DoU.s page 29 + ARM GAS /tmp/ccYgfTud.s page 29 1570:Drivers/CMSIS/Include/core_cm7.h **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1624:Drivers/CMSIS/Include/core_cm7.h **** \ingroup CMSIS_core_register 1625:Drivers/CMSIS/Include/core_cm7.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) 1626:Drivers/CMSIS/Include/core_cm7.h **** \brief Type definitions for the Core Debug Registers - ARM GAS /tmp/ccO46DoU.s page 30 + ARM GAS /tmp/ccYgfTud.s page 30 1627:Drivers/CMSIS/Include/core_cm7.h **** @{ @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1681:Drivers/CMSIS/Include/core_cm7.h **** 1682:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core 1683:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core - ARM GAS /tmp/ccO46DoU.s page 31 + ARM GAS /tmp/ccYgfTud.s page 31 1684:Drivers/CMSIS/Include/core_cm7.h **** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1738:Drivers/CMSIS/Include/core_cm7.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. 1739:Drivers/CMSIS/Include/core_cm7.h **** \return Masked and shifted value. 1740:Drivers/CMSIS/Include/core_cm7.h **** */ - ARM GAS /tmp/ccO46DoU.s page 32 + ARM GAS /tmp/ccYgfTud.s page 32 1741:Drivers/CMSIS/Include/core_cm7.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1795:Drivers/CMSIS/Include/core_cm7.h **** - Core NVIC Functions 1796:Drivers/CMSIS/Include/core_cm7.h **** - Core SysTick Functions 1797:Drivers/CMSIS/Include/core_cm7.h **** - Core Debug Functions - ARM GAS /tmp/ccO46DoU.s page 33 + ARM GAS /tmp/ccYgfTud.s page 33 1798:Drivers/CMSIS/Include/core_cm7.h **** - Core Register Access Functions @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1852:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu 1853:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu 1854:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccO46DoU.s page 34 + ARM GAS /tmp/ccYgfTud.s page 34 1855:Drivers/CMSIS/Include/core_cm7.h **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1909:Drivers/CMSIS/Include/core_cm7.h **** \return 0 Interrupt is not enabled. 1910:Drivers/CMSIS/Include/core_cm7.h **** \return 1 Interrupt is enabled. 1911:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccO46DoU.s page 35 + ARM GAS /tmp/ccYgfTud.s page 35 1912:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 1966:Drivers/CMSIS/Include/core_cm7.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. 1967:Drivers/CMSIS/Include/core_cm7.h **** \param [in] IRQn Device specific interrupt number. 1968:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccO46DoU.s page 36 + ARM GAS /tmp/ccYgfTud.s page 36 1969:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 2023:Drivers/CMSIS/Include/core_cm7.h **** */ 2024:Drivers/CMSIS/Include/core_cm7.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) 2025:Drivers/CMSIS/Include/core_cm7.h **** { - ARM GAS /tmp/ccO46DoU.s page 37 + ARM GAS /tmp/ccYgfTud.s page 37 2026:Drivers/CMSIS/Include/core_cm7.h **** if ((int32_t)(IRQn) >= 0) @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 36 .cfi_def_cfa_offset 4 37 .cfi_offset 14, -4 2073:Drivers/CMSIS/Include/core_cm7.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used - ARM GAS /tmp/ccO46DoU.s page 38 + ARM GAS /tmp/ccYgfTud.s page 38 38 .loc 2 2073 3 is_stmt 1 view .LVU2 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccO46DoU.s page 1 2078:Drivers/CMSIS/Include/core_cm7.h **** 81 .loc 2 2078 109 discriminator 2 view .LVU19 82 003a 0023 movs r3, #0 - ARM GAS /tmp/ccO46DoU.s page 39 + ARM GAS /tmp/ccYgfTud.s page 39 83 003c EEE7 b .L2 @@ -2327,1030 +2327,1161 @@ ARM GAS /tmp/ccO46DoU.s page 1 34:Src/main.c **** 35:Src/main.c **** /* Private define ------------------------------------------------------------*/ 36:Src/main.c **** /* USER CODE BEGIN PD */ - 37:Src/main.c **** /* USER CODE END PD */ - 38:Src/main.c **** - 39:Src/main.c **** /* Private macro -------------------------------------------------------------*/ - 40:Src/main.c **** /* USER CODE BEGIN PM */ - 41:Src/main.c **** - 42:Src/main.c **** /* USER CODE END PM */ - 43:Src/main.c **** - 44:Src/main.c **** /* Private variables ---------------------------------------------------------*/ - 45:Src/main.c **** ADC_HandleTypeDef hadc1; - 46:Src/main.c **** ADC_HandleTypeDef hadc3; - 47:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 40 + 37:Src/main.c **** // AD9102 register addresses and bit fields (see ad9102.pdf) + 38:Src/main.c **** #define AD9102_REG_RAMUPDATE 0x001Du + 39:Src/main.c **** #define AD9102_REG_PAT_STATUS 0x001Eu + 40:Src/main.c **** #define AD9102_REG_PAT_TYPE 0x001Fu + 41:Src/main.c **** #define AD9102_REG_SPICONFIG 0x0000u + 42:Src/main.c **** #define AD9102_REG_POWERCONFIG 0x0001u + 43:Src/main.c **** #define AD9102_REG_CLOCKCONFIG 0x0002u + 44:Src/main.c **** #define AD9102_REG_WAV_CONFIG 0x0027u + 45:Src/main.c **** #define AD9102_REG_PAT_TIMEBASE 0x0028u + 46:Src/main.c **** #define AD9102_REG_PAT_PERIOD 0x0029u + 47:Src/main.c **** #define AD9102_REG_SAW_CONFIG 0x0037u + ARM GAS /tmp/ccYgfTud.s page 40 - 48:Src/main.c **** SD_HandleTypeDef hsd1; + 48:Src/main.c **** #define AD9102_REG_CFG_ERROR 0x0060u 49:Src/main.c **** - 50:Src/main.c **** TIM_HandleTypeDef htim4; - 51:Src/main.c **** TIM_HandleTypeDef htim8; - 52:Src/main.c **** TIM_HandleTypeDef htim10; - 53:Src/main.c **** TIM_HandleTypeDef htim11; - 54:Src/main.c **** - 55:Src/main.c **** UART_HandleTypeDef huart8; + 50:Src/main.c **** #define AD9102_PAT_STATUS_RUN (1u << 0) + 51:Src/main.c **** + 52:Src/main.c **** #define AD9102_WAV_PRESTORE_SEL_SHIFT 4 + 53:Src/main.c **** #define AD9102_WAV_WAVE_SEL_SHIFT 0 + 54:Src/main.c **** #define AD9102_WAV_PRESTORE_SAW 1u + 55:Src/main.c **** #define AD9102_WAV_WAVE_SEL_PRESTORE 1u 56:Src/main.c **** - 57:Src/main.c **** /* USER CODE BEGIN PV */ - 58:Src/main.c **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, - 59:Src/main.c **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_ - 60:Src/main.c **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat - 61:Src/main.c **** FRESULT fresult; // result - 62:Src/main.c **** int test; - 63:Src/main.c **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_ - 64:Src/main.c **** - 65:Src/main.c **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup; - 66:Src/main.c **** Work_SetupTypeDef Curr_setup, Def_setup; - 67:Src/main.c **** LDx_ParamTypeDef LD1_param, LD2_param; - 68:Src/main.c **** - 69:Src/main.c **** LD_Blinker_StateTypeDef LD_blinker; + 57:Src/main.c **** #define AD9102_SAW_STEP_SHIFT 2 + 58:Src/main.c **** #define AD9102_SAW_TYPE_SHIFT 0 + 59:Src/main.c **** #define AD9102_SAW_TYPE_UP 0u + 60:Src/main.c **** #define AD9102_SAW_TYPE_DOWN 1u + 61:Src/main.c **** #define AD9102_SAW_TYPE_TRI 2u + 62:Src/main.c **** #define AD9102_SAW_TYPE_ZERO 3u + 63:Src/main.c **** + 64:Src/main.c **** #define AD9102_REG_COUNT 66u + 65:Src/main.c **** + 66:Src/main.c **** #define AD9102_EX4_WAV_CONFIG 0x3212u + 67:Src/main.c **** #define AD9102_EX4_PAT_TIMEBASE 0x0121u + 68:Src/main.c **** #define AD9102_EX4_PAT_PERIOD 0xFFFFu + 69:Src/main.c **** #define AD9102_EX4_SAW_CONFIG 0x0606u 70:Src/main.c **** - 71:Src/main.c **** task_t task; - 72:Src/main.c **** - 73:Src/main.c **** - 74:Src/main.c **** - 75:Src/main.c **** /* USER CODE END PV */ + 71:Src/main.c **** #define AD9102_SAW_STEP_DEFAULT 1u + 72:Src/main.c **** #define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u + 73:Src/main.c **** #define AD9102_START_DELAY_BASE_DEFAULT 0x1u + 74:Src/main.c **** #define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u + 75:Src/main.c **** #define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu 76:Src/main.c **** - 77:Src/main.c **** /* Private function prototypes -----------------------------------------------*/ - 78:Src/main.c **** void SystemClock_Config(void); - 79:Src/main.c **** static void MX_GPIO_Init(void); - 80:Src/main.c **** static void MX_DMA_Init(void); - 81:Src/main.c **** static void MX_SPI4_Init(void); - 82:Src/main.c **** static void MX_TIM2_Init(void); - 83:Src/main.c **** static void MX_TIM5_Init(void); - 84:Src/main.c **** static void MX_ADC1_Init(void); - 85:Src/main.c **** static void MX_ADC3_Init(void); - 86:Src/main.c **** static void MX_SPI2_Init(void); - 87:Src/main.c **** static void MX_SPI5_Init(void); - 88:Src/main.c **** static void MX_SPI6_Init(void); - 89:Src/main.c **** static void MX_USART1_UART_Init(void); - 90:Src/main.c **** static void MX_SDMMC1_SD_Init(void); - 91:Src/main.c **** static void MX_TIM7_Init(void); - 92:Src/main.c **** static void MX_TIM6_Init(void); - 93:Src/main.c **** static void MX_TIM10_Init(void); - 94:Src/main.c **** static void MX_UART8_Init(void); - 95:Src/main.c **** static void MX_TIM8_Init(void); - 96:Src/main.c **** static void MX_TIM11_Init(void); - 97:Src/main.c **** static void MX_TIM4_Init(void); - 98:Src/main.c **** /* USER CODE BEGIN PFP */ - 99:Src/main.c **** static void Init_params(void); - 100:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 101:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 102:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA); - 103:Src/main.c **** static uint16_t MPhD_T(uint8_t num); - 104:Src/main.c **** static uint16_t Get_ADC(uint8_t num); - ARM GAS /tmp/ccO46DoU.s page 41 + 77:Src/main.c **** #define AD9102_FLAG_ENABLE 0x0001u + 78:Src/main.c **** #define AD9102_FLAG_TRIANGLE 0x0002u + 79:Src/main.c **** /* USER CODE END PD */ + 80:Src/main.c **** + 81:Src/main.c **** /* Private macro -------------------------------------------------------------*/ + 82:Src/main.c **** /* USER CODE BEGIN PM */ + 83:Src/main.c **** + 84:Src/main.c **** /* USER CODE END PM */ + 85:Src/main.c **** + 86:Src/main.c **** /* Private variables ---------------------------------------------------------*/ + 87:Src/main.c **** ADC_HandleTypeDef hadc1; + 88:Src/main.c **** ADC_HandleTypeDef hadc3; + 89:Src/main.c **** + 90:Src/main.c **** SD_HandleTypeDef hsd1; + 91:Src/main.c **** + 92:Src/main.c **** TIM_HandleTypeDef htim4; + 93:Src/main.c **** TIM_HandleTypeDef htim8; + 94:Src/main.c **** TIM_HandleTypeDef htim10; + 95:Src/main.c **** TIM_HandleTypeDef htim11; + 96:Src/main.c **** + 97:Src/main.c **** UART_HandleTypeDef huart8; + 98:Src/main.c **** + 99:Src/main.c **** /* USER CODE BEGIN PV */ + 100:Src/main.c **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, + 101:Src/main.c **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_ + 102:Src/main.c **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat + 103:Src/main.c **** FRESULT fresult; // result + 104:Src/main.c **** int test; + ARM GAS /tmp/ccYgfTud.s page 41 - 105:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul - 106:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff); - 107:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); - 108:Src/main.c **** //int SD_Init(void); - 109:Src/main.c **** int SD_SAVE(uint16_t *pbuff); - 110:Src/main.c **** //uint32_t Get_Length(void); - 111:Src/main.c **** int SD_READ(uint16_t *pbuff); - 112:Src/main.c **** int SD_REMOVE(void); - 113:Src/main.c **** void USART_TX (uint8_t* dt, uint16_t sz); - 114:Src/main.c **** void USART_TX_DMA (uint16_t sz); - 115:Src/main.c **** static void Stop_TIM10(); - 116:Src/main.c **** static void OUT_trigger(uint8_t); - 117:Src/main.c **** /* USER CODE END PFP */ - 118:Src/main.c **** - 119:Src/main.c **** /* Private user code ---------------------------------------------------------*/ - 120:Src/main.c **** /* USER CODE BEGIN 0 */ - 121:Src/main.c **** - 122:Src/main.c **** /* USER CODE END 0 */ - 123:Src/main.c **** - 124:Src/main.c **** /** - 125:Src/main.c **** * @brief The application entry point. - 126:Src/main.c **** * @retval int - 127:Src/main.c **** */ - 128:Src/main.c **** int main(void) - 129:Src/main.c **** { - 130:Src/main.c **** - 131:Src/main.c **** /* USER CODE BEGIN 1 */ - 132:Src/main.c **** HAL_StatusTypeDef st; - 133:Src/main.c **** /* USER CODE END 1 */ - 134:Src/main.c **** - 135:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ - 136:Src/main.c **** - 137:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - 138:Src/main.c **** HAL_Init(); + 105:Src/main.c **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_ + 106:Src/main.c **** + 107:Src/main.c **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup; + 108:Src/main.c **** Work_SetupTypeDef Curr_setup, Def_setup; + 109:Src/main.c **** LDx_ParamTypeDef LD1_param, LD2_param; + 110:Src/main.c **** + 111:Src/main.c **** LD_Blinker_StateTypeDef LD_blinker; + 112:Src/main.c **** + 113:Src/main.c **** task_t task; + 114:Src/main.c **** + 115:Src/main.c **** static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = { + 116:Src/main.c **** 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u, + 117:Src/main.c **** 0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu, + 118:Src/main.c **** 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u, + 119:Src/main.c **** 0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u, + 120:Src/main.c **** 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu, + 121:Src/main.c **** 0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u, + 122:Src/main.c **** 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u, + 123:Src/main.c **** 0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu, + 124:Src/main.c **** 0x001eu, 0x001du + 125:Src/main.c **** }; + 126:Src/main.c **** + 127:Src/main.c **** static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = { + 128:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, + 129:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, + 130:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u, + 131:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 132:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u, + 133:Src/main.c **** 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 134:Src/main.c **** 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 135:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu, + 136:Src/main.c **** 0x0001u, 0x0001u + 137:Src/main.c **** }; + 138:Src/main.c **** 139:Src/main.c **** - 140:Src/main.c **** /* USER CODE BEGIN Init */ - 141:Src/main.c **** /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/ - 142:Src/main.c **** /* USER CODE END Init */ + 140:Src/main.c **** + 141:Src/main.c **** + 142:Src/main.c **** /* USER CODE END PV */ 143:Src/main.c **** - 144:Src/main.c **** /* Configure the system clock */ - 145:Src/main.c **** SystemClock_Config(); - 146:Src/main.c **** - 147:Src/main.c **** /* USER CODE BEGIN SysInit */ - 148:Src/main.c **** - 149:Src/main.c **** /* USER CODE END SysInit */ - 150:Src/main.c **** - 151:Src/main.c **** /* Initialize all configured peripherals */ - 152:Src/main.c **** MX_GPIO_Init(); - 153:Src/main.c **** MX_DMA_Init(); - 154:Src/main.c **** MX_SPI4_Init(); - 155:Src/main.c **** MX_FATFS_Init(); - 156:Src/main.c **** MX_TIM2_Init(); - 157:Src/main.c **** MX_TIM5_Init(); - 158:Src/main.c **** MX_ADC1_Init(); - 159:Src/main.c **** MX_ADC3_Init(); - 160:Src/main.c **** MX_SPI2_Init(); - 161:Src/main.c **** MX_SPI5_Init(); - ARM GAS /tmp/ccO46DoU.s page 42 + 144:Src/main.c **** /* Private function prototypes -----------------------------------------------*/ + 145:Src/main.c **** void SystemClock_Config(void); + 146:Src/main.c **** static void MX_GPIO_Init(void); + 147:Src/main.c **** static void MX_DMA_Init(void); + 148:Src/main.c **** static void MX_SPI4_Init(void); + 149:Src/main.c **** static void MX_TIM2_Init(void); + 150:Src/main.c **** static void MX_TIM5_Init(void); + 151:Src/main.c **** static void MX_ADC1_Init(void); + 152:Src/main.c **** static void MX_ADC3_Init(void); + 153:Src/main.c **** static void MX_SPI2_Init(void); + 154:Src/main.c **** static void MX_SPI5_Init(void); + 155:Src/main.c **** static void MX_SPI6_Init(void); + 156:Src/main.c **** static void MX_USART1_UART_Init(void); + 157:Src/main.c **** static void MX_SDMMC1_SD_Init(void); + 158:Src/main.c **** static void MX_TIM7_Init(void); + 159:Src/main.c **** static void MX_TIM6_Init(void); + 160:Src/main.c **** static void MX_TIM10_Init(void); + 161:Src/main.c **** static void MX_UART8_Init(void); + ARM GAS /tmp/ccYgfTud.s page 42 - 162:Src/main.c **** MX_SPI6_Init(); - 163:Src/main.c **** MX_USART1_UART_Init(); - 164:Src/main.c **** MX_SDMMC1_SD_Init(); - 165:Src/main.c **** MX_TIM7_Init(); - 166:Src/main.c **** MX_TIM6_Init(); - 167:Src/main.c **** MX_TIM10_Init(); - 168:Src/main.c **** MX_UART8_Init(); - 169:Src/main.c **** MX_TIM8_Init(); - 170:Src/main.c **** MX_TIM11_Init(); - 171:Src/main.c **** MX_TIM4_Init(); - 172:Src/main.c **** /* USER CODE BEGIN 2 */ - 173:Src/main.c **** Init_params(); - 174:Src/main.c **** //HAL_TIM_Base_Start(&htim11); - 175:Src/main.c **** //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 176:Src/main.c **** - 177:Src/main.c **** - 178:Src/main.c **** //TIM4,11 clocks = 92 MHz - 179:Src/main.c **** - 180:Src/main.c **** //ADC clock - 181:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz - 182:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz - 183:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz - 184:Src/main.c **** TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre - 185:Src/main.c **** - 186:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - 187:Src/main.c **** - 188:Src/main.c **** - 189:Src/main.c **** //Mach-Zander clock (should be 1/4 of ADC clock freq) - 190:Src/main.c **** - 191:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; - 192:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 193:Src/main.c **** - 194:Src/main.c **** /* - 195:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ + 162:Src/main.c **** static void MX_TIM8_Init(void); + 163:Src/main.c **** static void MX_TIM11_Init(void); + 164:Src/main.c **** static void MX_TIM4_Init(void); + 165:Src/main.c **** /* USER CODE BEGIN PFP */ + 166:Src/main.c **** static void Init_params(void); + 167:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 168:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 169:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA); + 170:Src/main.c **** static uint16_t MPhD_T(uint8_t num); + 171:Src/main.c **** static uint16_t Get_ADC(uint8_t num); + 172:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul + 173:Src/main.c **** static void AD9102_Init(void); + 174:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value); + 175:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr); + 176:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); + 177:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, + 178:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t + 179:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff); + 180:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); + 181:Src/main.c **** //int SD_Init(void); + 182:Src/main.c **** int SD_SAVE(uint16_t *pbuff); + 183:Src/main.c **** //uint32_t Get_Length(void); + 184:Src/main.c **** int SD_READ(uint16_t *pbuff); + 185:Src/main.c **** int SD_REMOVE(void); + 186:Src/main.c **** void USART_TX (uint8_t* dt, uint16_t sz); + 187:Src/main.c **** void USART_TX_DMA (uint16_t sz); + 188:Src/main.c **** static void Stop_TIM10(); + 189:Src/main.c **** static void OUT_trigger(uint8_t); + 190:Src/main.c **** /* USER CODE END PFP */ + 191:Src/main.c **** + 192:Src/main.c **** /* Private user code ---------------------------------------------------------*/ + 193:Src/main.c **** /* USER CODE BEGIN 0 */ + 194:Src/main.c **** + 195:Src/main.c **** /* USER CODE END 0 */ 196:Src/main.c **** - 197:Src/main.c **** CPU_state = DECODE_ENABLE; - 198:Src/main.c **** } - 199:Src/main.c **** */ - 200:Src/main.c **** /* USER CODE END 2 */ - 201:Src/main.c **** - 202:Src/main.c **** /* Infinite loop */ - 203:Src/main.c **** /* USER CODE BEGIN WHILE */ - 204:Src/main.c **** while (1) - 205:Src/main.c **** { - 206:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) - 207:Src/main.c **** { - 208:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); - 209:Src/main.c **** LL_USART_EnableIT_PE(USART1); - 210:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); - 211:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); - 212:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); - 213:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 214:Src/main.c **** u_rx_flg = 1; - 215:Src/main.c **** } - 216:Src/main.c **** // else - 217:Src/main.c **** // { - 218:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); - ARM GAS /tmp/ccO46DoU.s page 43 + 197:Src/main.c **** /** + 198:Src/main.c **** * @brief The application entry point. + 199:Src/main.c **** * @retval int + 200:Src/main.c **** */ + 201:Src/main.c **** int main(void) + 202:Src/main.c **** { + 203:Src/main.c **** + 204:Src/main.c **** /* USER CODE BEGIN 1 */ + 205:Src/main.c **** HAL_StatusTypeDef st; + 206:Src/main.c **** /* USER CODE END 1 */ + 207:Src/main.c **** + 208:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ + 209:Src/main.c **** + 210:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + 211:Src/main.c **** HAL_Init(); + 212:Src/main.c **** + 213:Src/main.c **** /* USER CODE BEGIN Init */ + 214:Src/main.c **** /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/ + 215:Src/main.c **** /* USER CODE END Init */ + 216:Src/main.c **** + 217:Src/main.c **** /* Configure the system clock */ + 218:Src/main.c **** SystemClock_Config(); + ARM GAS /tmp/ccYgfTud.s page 43 - 219:Src/main.c **** // u_rx_flg = 0; - 220:Src/main.c **** // } - 221:Src/main.c **** switch (CPU_state) - 222:Src/main.c **** { - 223:Src/main.c **** case HALT://0 - Default state - 224:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 225:Src/main.c **** task.current_param = task.min_param; - 226:Src/main.c **** Stop_TIM10(); - 227:Src/main.c **** break; - 228:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 229:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); - 230:Src/main.c **** if (CheckChecksum(COMMAND)) - 231:Src/main.c **** { - 232:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 - 233:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 234:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 235:Src/main.c **** TO6_before = TO6; - 236:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 237:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; - 238:Src/main.c **** CPU_state = WORK_ENABLE; - 239:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 240:Src/main.c **** } - 241:Src/main.c **** else - 242:Src/main.c **** { - 243:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 244:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 245:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 246:Src/main.c **** } - 247:Src/main.c **** UART_transmission_request = MESS_01; - 248:Src/main.c **** break; - 249:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 250:Src/main.c **** //Set current setup to default - 251:Src/main.c **** task.current_param = task.min_param; - 252:Src/main.c **** Stop_TIM10(); - 253:Src/main.c **** Init_params(); - 254:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 255:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 256:Src/main.c **** CPU_state = HALT; - 257:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 258:Src/main.c **** UART_transmission_request = MESS_01; - 259:Src/main.c **** break; - 260:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 261:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); - 262:Src/main.c **** State_Data[0]|=temp16&0xff; - 263:Src/main.c **** if (temp16==0) - 264:Src/main.c **** { - 265:Src/main.c **** UART_transmission_request = MESS_03; - 266:Src/main.c **** } - 267:Src/main.c **** else - 268:Src/main.c **** { - 269:Src/main.c **** UART_transmission_request = MESS_01; - 270:Src/main.c **** } - 271:Src/main.c **** CPU_state_old = HALT; - 272:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 273:Src/main.c **** break; - 274:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 275:Src/main.c **** UART_transmission_request = MESS_02; - ARM GAS /tmp/ccO46DoU.s page 44 + 219:Src/main.c **** + 220:Src/main.c **** /* USER CODE BEGIN SysInit */ + 221:Src/main.c **** + 222:Src/main.c **** /* USER CODE END SysInit */ + 223:Src/main.c **** + 224:Src/main.c **** /* Initialize all configured peripherals */ + 225:Src/main.c **** MX_GPIO_Init(); + 226:Src/main.c **** MX_DMA_Init(); + 227:Src/main.c **** MX_SPI4_Init(); + 228:Src/main.c **** MX_FATFS_Init(); + 229:Src/main.c **** MX_TIM2_Init(); + 230:Src/main.c **** MX_TIM5_Init(); + 231:Src/main.c **** MX_ADC1_Init(); + 232:Src/main.c **** MX_ADC3_Init(); + 233:Src/main.c **** MX_SPI2_Init(); + 234:Src/main.c **** MX_SPI5_Init(); + 235:Src/main.c **** MX_SPI6_Init(); + 236:Src/main.c **** MX_USART1_UART_Init(); + 237:Src/main.c **** MX_SDMMC1_SD_Init(); + 238:Src/main.c **** MX_TIM7_Init(); + 239:Src/main.c **** MX_TIM6_Init(); + 240:Src/main.c **** MX_TIM10_Init(); + 241:Src/main.c **** MX_UART8_Init(); + 242:Src/main.c **** MX_TIM8_Init(); + 243:Src/main.c **** MX_TIM11_Init(); + 244:Src/main.c **** MX_TIM4_Init(); + 245:Src/main.c **** /* USER CODE BEGIN 2 */ + 246:Src/main.c **** Init_params(); + 247:Src/main.c **** //HAL_TIM_Base_Start(&htim11); + 248:Src/main.c **** //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 249:Src/main.c **** + 250:Src/main.c **** + 251:Src/main.c **** //TIM4,11 clocks = 92 MHz + 252:Src/main.c **** + 253:Src/main.c **** //ADC clock + 254:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz + 255:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz + 256:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz + 257:Src/main.c **** TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre + 258:Src/main.c **** + 259:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; + 260:Src/main.c **** + 261:Src/main.c **** + 262:Src/main.c **** //Mach-Zander clock (should be 1/4 of ADC clock freq) + 263:Src/main.c **** + 264:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; + 265:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 266:Src/main.c **** + 267:Src/main.c **** /* + 268:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ + 269:Src/main.c **** + 270:Src/main.c **** CPU_state = DECODE_ENABLE; + 271:Src/main.c **** } + 272:Src/main.c **** */ + 273:Src/main.c **** /* USER CODE END 2 */ + 274:Src/main.c **** + 275:Src/main.c **** /* Infinite loop */ + ARM GAS /tmp/ccYgfTud.s page 44 - 276:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 277:Src/main.c **** break; - 278:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 279:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; - 280:Src/main.c **** UART_transmission_request = MESS_01; - 281:Src/main.c **** CPU_state = CPU_state_old; - 282:Src/main.c **** break; - 283:Src/main.c **** case STATE://6 - Transmith state message - 284:Src/main.c **** UART_transmission_request = MESS_01; - 285:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 286:Src/main.c **** break; - 287:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 288:Src/main.c **** task.current_param = task.min_param; - 289:Src/main.c **** Stop_TIM10(); - 290:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 291:Src/main.c **** { - 292:Src/main.c **** TO7_before = TO7; - 293:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 294:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 295:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 296:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 297:Src/main.c **** - 298:Src/main.c **** //Correct temperature in all pulses - 299:Src/main.c **** (void) MPhD_T(3); - 300:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 301:Src/main.c **** (void) MPhD_T(4); - 302:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 303:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 304:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 305:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 306:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 307:Src/main.c **** - 308:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 309:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 310:Src/main.c **** - 311:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 - 312:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 313:Src/main.c **** - 314:Src/main.c **** //Prepare DATA of internals ADCs - 315:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 316:Src/main.c **** temp16 = Get_ADC(0); - 317:Src/main.c **** temp16 = Get_ADC(1); - 318:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 319:Src/main.c **** - 320:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 321:Src/main.c **** temp16 = Get_ADC(1); - 322:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 323:Src/main.c **** - 324:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 325:Src/main.c **** temp16 = Get_ADC(1); - 326:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 327:Src/main.c **** - 328:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 329:Src/main.c **** temp16 = Get_ADC(1); - 330:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 331:Src/main.c **** - 332:Src/main.c **** //Put the temperature of LD2 to Long_Data: - ARM GAS /tmp/ccO46DoU.s page 45 + 276:Src/main.c **** /* USER CODE BEGIN WHILE */ + 277:Src/main.c **** while (1) + 278:Src/main.c **** { + 279:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) + 280:Src/main.c **** { + 281:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); + 282:Src/main.c **** LL_USART_EnableIT_PE(USART1); + 283:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); + 284:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); + 285:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); + 286:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 287:Src/main.c **** u_rx_flg = 1; + 288:Src/main.c **** } + 289:Src/main.c **** // else + 290:Src/main.c **** // { + 291:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); + 292:Src/main.c **** // u_rx_flg = 0; + 293:Src/main.c **** // } + 294:Src/main.c **** switch (CPU_state) + 295:Src/main.c **** { + 296:Src/main.c **** case HALT://0 - Default state + 297:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 298:Src/main.c **** task.current_param = task.min_param; + 299:Src/main.c **** Stop_TIM10(); + 300:Src/main.c **** break; + 301:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 302:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); + 303:Src/main.c **** if (CheckChecksum(COMMAND)) + 304:Src/main.c **** { + 305:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 + 306:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 307:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 308:Src/main.c **** TO6_before = TO6; + 309:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 310:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; + 311:Src/main.c **** CPU_state = WORK_ENABLE; + 312:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 313:Src/main.c **** } + 314:Src/main.c **** else + 315:Src/main.c **** { + 316:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 317:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 318:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 319:Src/main.c **** } + 320:Src/main.c **** UART_transmission_request = MESS_01; + 321:Src/main.c **** break; + 322:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 323:Src/main.c **** //Set current setup to default + 324:Src/main.c **** task.current_param = task.min_param; + 325:Src/main.c **** Stop_TIM10(); + 326:Src/main.c **** Init_params(); + 327:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 328:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 329:Src/main.c **** CPU_state = HALT; + 330:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 331:Src/main.c **** UART_transmission_request = MESS_01; + 332:Src/main.c **** break; + ARM GAS /tmp/ccYgfTud.s page 45 - 333:Src/main.c **** temp16 = Get_ADC(1); - 334:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 335:Src/main.c **** temp16 = Get_ADC(2); - 336:Src/main.c **** - 337:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 338:Src/main.c **** temp16 = Get_ADC(3); - 339:Src/main.c **** temp16 = Get_ADC(4); - 340:Src/main.c **** Long_Data[12] = temp16; - 341:Src/main.c **** temp16 = Get_ADC(5); - 342:Src/main.c **** - 343:Src/main.c **** //Put the timer tick to Long_Data: - 344:Src/main.c **** TO6_stop = TO6; - 345:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 346:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 347:Src/main.c **** - 348:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 349:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 350:Src/main.c **** - 351:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 352:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 353:Src/main.c **** - 354:Src/main.c **** if (Curr_setup.SD_EN==1) - 355:Src/main.c **** { - 356:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 357:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 358:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 359:Src/main.c **** State_Data[0]|=temp16&0xff; - 360:Src/main.c **** } - 361:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 362:Src/main.c **** } - 363:Src/main.c **** break; - 364:Src/main.c **** case DECODE_TASK: - 365:Src/main.c **** if (CheckChecksum(COMMAND)) - 366:Src/main.c **** { - 367:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 368:Src/main.c **** TO6_before = TO6; - 369:Src/main.c **** CPU_state = RUN_TASK; - 370:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 371:Src/main.c **** } - 372:Src/main.c **** else - 373:Src/main.c **** { - 374:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 375:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 376:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 377:Src/main.c **** } - 378:Src/main.c **** UART_transmission_request = MESS_01; - 379:Src/main.c **** break; - 380:Src/main.c **** case RUN_TASK: - 381:Src/main.c **** switch (task.task_type) - 382:Src/main.c **** { - 383:Src/main.c **** case TT_CHANGE_CURR_1: - 384:Src/main.c **** - 385:Src/main.c **** - 386:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator - 387:Src/main.c **** //ADC clock - 388:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz - 389:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz - ARM GAS /tmp/ccO46DoU.s page 46 + 333:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 334:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); + 335:Src/main.c **** State_Data[0]|=temp16&0xff; + 336:Src/main.c **** if (temp16==0) + 337:Src/main.c **** { + 338:Src/main.c **** UART_transmission_request = MESS_03; + 339:Src/main.c **** } + 340:Src/main.c **** else + 341:Src/main.c **** { + 342:Src/main.c **** UART_transmission_request = MESS_01; + 343:Src/main.c **** } + 344:Src/main.c **** CPU_state_old = HALT; + 345:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 346:Src/main.c **** break; + 347:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 348:Src/main.c **** UART_transmission_request = MESS_02; + 349:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 350:Src/main.c **** break; + 351:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 352:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; + 353:Src/main.c **** UART_transmission_request = MESS_01; + 354:Src/main.c **** CPU_state = CPU_state_old; + 355:Src/main.c **** break; + 356:Src/main.c **** case STATE://6 - Transmith state message + 357:Src/main.c **** UART_transmission_request = MESS_01; + 358:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 359:Src/main.c **** break; + 360:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 361:Src/main.c **** task.current_param = task.min_param; + 362:Src/main.c **** Stop_TIM10(); + 363:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 364:Src/main.c **** { + 365:Src/main.c **** TO7_before = TO7; + 366:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 367:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 368:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 369:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 370:Src/main.c **** + 371:Src/main.c **** //Correct temperature in all pulses + 372:Src/main.c **** (void) MPhD_T(3); + 373:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 374:Src/main.c **** (void) MPhD_T(4); + 375:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 376:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 377:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 378:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 379:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 380:Src/main.c **** + 381:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 382:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 383:Src/main.c **** + 384:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 + 385:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 386:Src/main.c **** + 387:Src/main.c **** //Prepare DATA of internals ADCs + 388:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 389:Src/main.c **** temp16 = Get_ADC(0); + ARM GAS /tmp/ccYgfTud.s page 46 - 390:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz - 391:Src/main.c **** - 392:Src/main.c **** //online calculation for debug purposes: - 393:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running - 394:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - 395:Src/main.c **** - 396:Src/main.c **** - 397:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) - 398:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; - 399:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 400:Src/main.c **** - 401:Src/main.c **** - 402:Src/main.c **** - 403:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); - 404:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 405:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 406:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 407:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 408:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 409:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 410:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 411:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 412:Src/main.c **** - 413:Src/main.c **** // Toggle pin for oscilloscope - 414:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc - 415:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 416:Src/main.c **** - 417:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 418:Src/main.c **** if (st != HAL_OK) - 419:Src/main.c **** while(1); - 420:Src/main.c **** - 421:Src/main.c **** uint16_t step_counter = 0; - 422:Src/main.c **** uint16_t trigger_counter = 0; - 423:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 424:Src/main.c **** uint16_t task_sheduler = 0; - 425:Src/main.c **** + 390:Src/main.c **** temp16 = Get_ADC(1); + 391:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 392:Src/main.c **** + 393:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 394:Src/main.c **** temp16 = Get_ADC(1); + 395:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 396:Src/main.c **** + 397:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 398:Src/main.c **** temp16 = Get_ADC(1); + 399:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 400:Src/main.c **** + 401:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 402:Src/main.c **** temp16 = Get_ADC(1); + 403:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 404:Src/main.c **** + 405:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 406:Src/main.c **** temp16 = Get_ADC(1); + 407:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 408:Src/main.c **** temp16 = Get_ADC(2); + 409:Src/main.c **** + 410:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 411:Src/main.c **** temp16 = Get_ADC(3); + 412:Src/main.c **** temp16 = Get_ADC(4); + 413:Src/main.c **** Long_Data[12] = temp16; + 414:Src/main.c **** temp16 = Get_ADC(5); + 415:Src/main.c **** + 416:Src/main.c **** //Put the timer tick to Long_Data: + 417:Src/main.c **** TO6_stop = TO6; + 418:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 419:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 420:Src/main.c **** + 421:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 422:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 423:Src/main.c **** + 424:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 425:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; 426:Src/main.c **** - 427:Src/main.c **** - 428:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 429:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 430:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 431:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 432:Src/main.c **** - 433:Src/main.c **** - 434:Src/main.c **** - 435:Src/main.c **** TIM11 -> CNT = 0; - 436:Src/main.c **** TIM4 -> CNT = 0; - 437:Src/main.c **** - 438:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 439:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 440:Src/main.c **** //TIM4 -> CNT = 0; - 441:Src/main.c **** - 442:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de - 443:Src/main.c **** TIM11 -> CNT = 0; - 444:Src/main.c **** - 445:Src/main.c **** - 446:Src/main.c **** while (task.current_param < task.max_param) - ARM GAS /tmp/ccO46DoU.s page 47 + 427:Src/main.c **** if (Curr_setup.SD_EN==1) + 428:Src/main.c **** { + 429:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); + 430:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 431:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 432:Src/main.c **** State_Data[0]|=temp16&0xff; + 433:Src/main.c **** } + 434:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 435:Src/main.c **** } + 436:Src/main.c **** break; + 437:Src/main.c **** case AD9102_CMD://10 - Configure AD9102 sawtooth output + 438:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) + 439:Src/main.c **** { + 440:Src/main.c **** uint16_t flags = COMMAND[0]; + 441:Src/main.c **** uint16_t param0 = COMMAND[1]; + 442:Src/main.c **** uint16_t param1 = COMMAND[2]; + 443:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 444:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 445:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; + 446:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + ARM GAS /tmp/ccYgfTud.s page 47 - 447:Src/main.c **** { - 448:Src/main.c **** if (TIM10_coflag) - 449:Src/main.c **** { - 450:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 451:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 452:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase - 453:Src/main.c **** task.current_param += task.delta_param; - 454:Src/main.c **** TO10 = 0; - 455:Src/main.c **** TIM10_coflag = 0; - 456:Src/main.c **** - 457:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t - 458:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 459:Src/main.c **** //* - 460:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step - 461:Src/main.c **** OUT_trigger(trigger_counter); - 462:Src/main.c **** ++trigger_counter; - 463:Src/main.c **** } - 464:Src/main.c **** ++step_counter; - 465:Src/main.c **** //*/ - 466:Src/main.c **** /* - 467:Src/main.c **** ++task_sheduler; - 468:Src/main.c **** if (task_sheduler >= 10){ - 469:Src/main.c **** task_sheduler = 0; - 470:Src/main.c **** } - 471:Src/main.c **** //maintain stable temperature of laser 2 - 472:Src/main.c **** if (task_sheduler == 0){ - 473:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 474:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 475:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 476:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 477:Src/main.c **** } - 478:Src/main.c **** //maintain stable temperature of laser 1 - 479:Src/main.c **** //* - 480:Src/main.c **** if (task_sheduler == 5){ - 481:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 482:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 483:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 484:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 485:Src/main.c **** } - 486:Src/main.c **** //*/ - 487:Src/main.c **** } - 488:Src/main.c **** } - 489:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o - 490:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 491:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda - 492:Src/main.c **** //but one-pulse mode should be disabled - 493:Src/main.c **** - 494:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 495:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 496:Src/main.c **** - 497:Src/main.c **** - 498:Src/main.c **** - 499:Src/main.c **** Stop_TIM10(); - 500:Src/main.c **** - 501:Src/main.c **** task.current_param = task.min_param; - 502:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 503:Src/main.c **** if (task.tau > 3) - ARM GAS /tmp/ccO46DoU.s page 48 + 447:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 448:Src/main.c **** uint16_t pat_period = param1; + 449:Src/main.c **** + 450:Src/main.c **** if (param0 == 0u && param1 == 0u) + 451:Src/main.c **** { + 452:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; + 453:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; + 454:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + 455:Src/main.c **** } + 456:Src/main.c **** else + 457:Src/main.c **** { + 458:Src/main.c **** if (saw_step == 0u) + 459:Src/main.c **** { + 460:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; + 461:Src/main.c **** } + 462:Src/main.c **** else if (saw_step > 63u) + 463:Src/main.c **** { + 464:Src/main.c **** saw_step = 63u; + 465:Src/main.c **** } + 466:Src/main.c **** if (pat_period == 0u) + 467:Src/main.c **** { + 468:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + 469:Src/main.c **** } + 470:Src/main.c **** } + 471:Src/main.c **** + 472:Src/main.c **** uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period); + 473:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 474:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 475:Src/main.c **** { + 476:Src/main.c **** State_Data[0] |= AD9102_ERR; + 477:Src/main.c **** } + 478:Src/main.c **** } + 479:Src/main.c **** else + 480:Src/main.c **** { + 481:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 482:Src/main.c **** } + 483:Src/main.c **** UART_transmission_request = MESS_01; + 484:Src/main.c **** CPU_state = CPU_state_old; + 485:Src/main.c **** break; + 486:Src/main.c **** case DECODE_TASK: + 487:Src/main.c **** if (CheckChecksum(COMMAND)) + 488:Src/main.c **** { + 489:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 490:Src/main.c **** TO6_before = TO6; + 491:Src/main.c **** CPU_state = RUN_TASK; + 492:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 493:Src/main.c **** } + 494:Src/main.c **** else + 495:Src/main.c **** { + 496:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 497:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 498:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 499:Src/main.c **** } + 500:Src/main.c **** UART_transmission_request = MESS_01; + 501:Src/main.c **** break; + 502:Src/main.c **** case RUN_TASK: + 503:Src/main.c **** switch (task.task_type) + ARM GAS /tmp/ccYgfTud.s page 48 - 504:Src/main.c **** { - 505:Src/main.c **** TIM10_period = htim10.Init.Period; - 506:Src/main.c **** htim10.Init.Period = 9999; - 507:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 508:Src/main.c **** } - 509:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 510:Src/main.c **** break; - 511:Src/main.c **** case TT_CHANGE_CURR_2: - 512:Src/main.c **** //Blink laser 2 - 513:Src/main.c **** //* - 514:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 515:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 516:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 517:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 518:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 519:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 520:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 521:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 522:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 504:Src/main.c **** { + 505:Src/main.c **** case TT_CHANGE_CURR_1: + 506:Src/main.c **** + 507:Src/main.c **** + 508:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator + 509:Src/main.c **** //ADC clock + 510:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz + 511:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz + 512:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz + 513:Src/main.c **** + 514:Src/main.c **** //online calculation for debug purposes: + 515:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running + 516:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; + 517:Src/main.c **** + 518:Src/main.c **** + 519:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) + 520:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; + 521:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 522:Src/main.c **** 523:Src/main.c **** - 524:Src/main.c **** LD_blinker.task_type = 2; - 525:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 526:Src/main.c **** //LD_blinker.param = task.current_param; - 527:Src/main.c **** LD_blinker.param = 0; - 528:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 529:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 530:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 531:Src/main.c **** - 532:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). - 533:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 534:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); - 535:Src/main.c **** if (st != HAL_OK) - 536:Src/main.c **** while(1); - 537:Src/main.c **** // */ - 538:Src/main.c **** - 539:Src/main.c **** // Toggle pin for oscilloscope - 540:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 541:Src/main.c **** uint32_t i = 10000; while (--i){} - 542:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 543:Src/main.c **** LD_blinker.state = 2; - 544:Src/main.c **** - 545:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 546:Src/main.c **** if (st != HAL_OK) - 547:Src/main.c **** while(1); - 548:Src/main.c **** while (task.current_param < task.max_param) - 549:Src/main.c **** { - 550:Src/main.c **** if (TIM10_coflag) - 551:Src/main.c **** { - 552:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 553:Src/main.c **** //LD_blinker.param = task.current_param; - 554:Src/main.c **** //++LD_blinker.param; - 555:Src/main.c **** task.current_param += task.delta_param; - 556:Src/main.c **** TO10 = 0; - 557:Src/main.c **** TIM10_coflag = 0; - 558:Src/main.c **** + 524:Src/main.c **** + 525:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); + 526:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 527:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 528:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 529:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 530:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 531:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 532:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 533:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 534:Src/main.c **** + 535:Src/main.c **** // Toggle pin for oscilloscope + 536:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc + 537:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 538:Src/main.c **** + 539:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 540:Src/main.c **** if (st != HAL_OK) + 541:Src/main.c **** while(1); + 542:Src/main.c **** + 543:Src/main.c **** uint16_t step_counter = 0; + 544:Src/main.c **** uint16_t trigger_counter = 0; + 545:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 546:Src/main.c **** uint16_t task_sheduler = 0; + 547:Src/main.c **** + 548:Src/main.c **** + 549:Src/main.c **** + 550:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 551:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 552:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 553:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 554:Src/main.c **** + 555:Src/main.c **** + 556:Src/main.c **** + 557:Src/main.c **** TIM11 -> CNT = 0; + 558:Src/main.c **** TIM4 -> CNT = 0; 559:Src/main.c **** - 560:Src/main.c **** } - ARM GAS /tmp/ccO46DoU.s page 49 + 560:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + ARM GAS /tmp/ccYgfTud.s page 49 - 561:Src/main.c **** } - 562:Src/main.c **** HAL_TIM_Base_Stop(&htim10); - 563:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 564:Src/main.c **** - 565:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 561:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 562:Src/main.c **** //TIM4 -> CNT = 0; + 563:Src/main.c **** + 564:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de + 565:Src/main.c **** TIM11 -> CNT = 0; 566:Src/main.c **** - 567:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); - 568:Src/main.c **** TIM8->CNT = 0; - 569:Src/main.c **** - 570:Src/main.c **** Stop_TIM10(); - 571:Src/main.c **** task.current_param = task.min_param; - 572:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 573:Src/main.c **** if (task.tau > 3) - 574:Src/main.c **** { - 575:Src/main.c **** TIM10_period = htim10.Init.Period; - 576:Src/main.c **** htim10.Init.Period = 9999; - 577:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 578:Src/main.c **** } - 579:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 580:Src/main.c **** - 581:Src/main.c **** - 582:Src/main.c **** //*/ - 583:Src/main.c **** - 584:Src/main.c **** /* // Backup - 585:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 586:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 587:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 588:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 589:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 590:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 591:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 592:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 593:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 594:Src/main.c **** - 595:Src/main.c **** // Toggle pin for oscilloscope - 596:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 597:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 598:Src/main.c **** - 599:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 600:Src/main.c **** if (st != HAL_OK) - 601:Src/main.c **** while(1); - 602:Src/main.c **** while (task.current_param < task.max_param) - 603:Src/main.c **** { - 604:Src/main.c **** if (TIM10_coflag) - 605:Src/main.c **** { - 606:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 607:Src/main.c **** task.current_param += task.delta_param; - 608:Src/main.c **** TO10 = 0; - 609:Src/main.c **** TIM10_coflag = 0; - 610:Src/main.c **** - 611:Src/main.c **** - 612:Src/main.c **** } - 613:Src/main.c **** } - 614:Src/main.c **** Stop_TIM10(); - 615:Src/main.c **** task.current_param = task.min_param; - 616:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 617:Src/main.c **** if (task.tau > 3) - ARM GAS /tmp/ccO46DoU.s page 50 + 567:Src/main.c **** + 568:Src/main.c **** while (task.current_param < task.max_param) + 569:Src/main.c **** { + 570:Src/main.c **** if (TIM10_coflag) + 571:Src/main.c **** { + 572:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 573:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 574:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase + 575:Src/main.c **** task.current_param += task.delta_param; + 576:Src/main.c **** TO10 = 0; + 577:Src/main.c **** TIM10_coflag = 0; + 578:Src/main.c **** + 579:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t + 580:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 581:Src/main.c **** //* + 582:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step + 583:Src/main.c **** OUT_trigger(trigger_counter); + 584:Src/main.c **** ++trigger_counter; + 585:Src/main.c **** } + 586:Src/main.c **** ++step_counter; + 587:Src/main.c **** //*/ + 588:Src/main.c **** /* + 589:Src/main.c **** ++task_sheduler; + 590:Src/main.c **** if (task_sheduler >= 10){ + 591:Src/main.c **** task_sheduler = 0; + 592:Src/main.c **** } + 593:Src/main.c **** //maintain stable temperature of laser 2 + 594:Src/main.c **** if (task_sheduler == 0){ + 595:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 596:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 597:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 598:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 599:Src/main.c **** } + 600:Src/main.c **** //maintain stable temperature of laser 1 + 601:Src/main.c **** //* + 602:Src/main.c **** if (task_sheduler == 5){ + 603:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 604:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 605:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 606:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 607:Src/main.c **** } + 608:Src/main.c **** //*/ + 609:Src/main.c **** } + 610:Src/main.c **** } + 611:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o + 612:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 613:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda + 614:Src/main.c **** //but one-pulse mode should be disabled + 615:Src/main.c **** + 616:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 617:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + ARM GAS /tmp/ccYgfTud.s page 50 - 618:Src/main.c **** { - 619:Src/main.c **** TIM10_period = htim10.Init.Period; - 620:Src/main.c **** htim10.Init.Period = 9999; - 621:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 622:Src/main.c **** } - 623:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 624:Src/main.c **** */ - 625:Src/main.c **** - 626:Src/main.c **** - 627:Src/main.c **** break; - 628:Src/main.c **** case TT_CHANGE_TEMP_1: - 629:Src/main.c **** // isn't implemented - 630:Src/main.c **** break; - 631:Src/main.c **** case TT_CHANGE_TEMP_2: - 632:Src/main.c **** // isn't implemented - 633:Src/main.c **** break; - 634:Src/main.c **** } - 635:Src/main.c **** - 636:Src/main.c **** if (TO7>TO7_before) - 637:Src/main.c **** { - 638:Src/main.c **** TO7_before = TO7; - 639:Src/main.c **** - 640:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 641:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 642:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 643:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 644:Src/main.c **** - 645:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 646:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 647:Src/main.c **** - 648:Src/main.c **** //Prepare DATA of internals ADCs - 649:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 650:Src/main.c **** temp16 = Get_ADC(0); - 651:Src/main.c **** temp16 = Get_ADC(1); - 652:Src/main.c **** Long_Data[7] = temp16; - 653:Src/main.c **** - 654:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 655:Src/main.c **** temp16 = Get_ADC(1); - 656:Src/main.c **** Long_Data[8] = temp16; - 657:Src/main.c **** - 658:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 659:Src/main.c **** temp16 = Get_ADC(1); - 660:Src/main.c **** Long_Data[9] = temp16; - 661:Src/main.c **** - 662:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 663:Src/main.c **** temp16 = Get_ADC(1); - 664:Src/main.c **** Long_Data[10] = temp16; - 665:Src/main.c **** - 666:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 667:Src/main.c **** temp16 = Get_ADC(1); - 668:Src/main.c **** Long_Data[11] = temp16; - 669:Src/main.c **** temp16 = Get_ADC(2); - 670:Src/main.c **** - 671:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 672:Src/main.c **** temp16 = Get_ADC(3); - 673:Src/main.c **** temp16 = Get_ADC(4); - 674:Src/main.c **** Long_Data[12] = temp16; - ARM GAS /tmp/ccO46DoU.s page 51 + 618:Src/main.c **** + 619:Src/main.c **** + 620:Src/main.c **** + 621:Src/main.c **** Stop_TIM10(); + 622:Src/main.c **** + 623:Src/main.c **** task.current_param = task.min_param; + 624:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 625:Src/main.c **** if (task.tau > 3) + 626:Src/main.c **** { + 627:Src/main.c **** TIM10_period = htim10.Init.Period; + 628:Src/main.c **** htim10.Init.Period = 9999; + 629:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 630:Src/main.c **** } + 631:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 632:Src/main.c **** break; + 633:Src/main.c **** case TT_CHANGE_CURR_2: + 634:Src/main.c **** //Blink laser 2 + 635:Src/main.c **** //* + 636:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 637:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 638:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 639:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 640:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 641:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 642:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 643:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 644:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 645:Src/main.c **** + 646:Src/main.c **** LD_blinker.task_type = 2; + 647:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 648:Src/main.c **** //LD_blinker.param = task.current_param; + 649:Src/main.c **** LD_blinker.param = 0; + 650:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 651:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 652:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 653:Src/main.c **** + 654:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). + 655:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 656:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); + 657:Src/main.c **** if (st != HAL_OK) + 658:Src/main.c **** while(1); + 659:Src/main.c **** // */ + 660:Src/main.c **** + 661:Src/main.c **** // Toggle pin for oscilloscope + 662:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 663:Src/main.c **** uint32_t i = 10000; while (--i){} + 664:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 665:Src/main.c **** LD_blinker.state = 2; + 666:Src/main.c **** + 667:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 668:Src/main.c **** if (st != HAL_OK) + 669:Src/main.c **** while(1); + 670:Src/main.c **** while (task.current_param < task.max_param) + 671:Src/main.c **** { + 672:Src/main.c **** if (TIM10_coflag) + 673:Src/main.c **** { + 674:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + ARM GAS /tmp/ccYgfTud.s page 51 - 675:Src/main.c **** temp16 = Get_ADC(5); - 676:Src/main.c **** - 677:Src/main.c **** //Put the timer tick to Long_Data: - 678:Src/main.c **** TO6_stop = TO6; - 679:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 680:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 681:Src/main.c **** - 682:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 683:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 684:Src/main.c **** - 685:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 686:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 687:Src/main.c **** } - 688:Src/main.c **** while (!TIM10_coflag); - 689:Src/main.c **** - 690:Src/main.c **** Stop_TIM10(); - 691:Src/main.c **** - 692:Src/main.c **** if (task.tau > 3) - 693:Src/main.c **** { - 694:Src/main.c **** htim10.Init.Period = TIM10_period; - 695:Src/main.c **** TO10_counter = task.dt / 10; - 696:Src/main.c **** } - 697:Src/main.c **** - 698:Src/main.c **** CPU_state_old = RUN_TASK; - 699:Src/main.c **** break; - 700:Src/main.c **** } - 701:Src/main.c **** - 702:Src/main.c **** switch (UART_transmission_request) - 703:Src/main.c **** { - 704:Src/main.c **** case MESS_01://Default state - 705:Src/main.c **** USART_TX(State_Data,2); - 706:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 707:Src/main.c **** State_Data[0]=0; - 708:Src/main.c **** State_Data[1]=0;//All OK! - 709:Src/main.c **** UART_transmission_request = NO_MESS; - 710:Src/main.c **** break; - 711:Src/main.c **** case MESS_02://Transmith packet - 712:Src/main.c **** - 713:Src/main.c **** //Find CS and put to Long_Data: - 714:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 715:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 716:Src/main.c **** - 717:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) - 718:Src/main.c **** { - 719:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; - 720:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 721:Src/main.c **** } - 722:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); - 723:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 724:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); - 725:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; - 726:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; - 727:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA - 728:Src/main.c **** UART_transmission_request = NO_MESS; - 729:Src/main.c **** break; - 730:Src/main.c **** case MESS_03://Transmith saved packet - 731:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) - ARM GAS /tmp/ccO46DoU.s page 52 + 675:Src/main.c **** //LD_blinker.param = task.current_param; + 676:Src/main.c **** //++LD_blinker.param; + 677:Src/main.c **** task.current_param += task.delta_param; + 678:Src/main.c **** TO10 = 0; + 679:Src/main.c **** TIM10_coflag = 0; + 680:Src/main.c **** + 681:Src/main.c **** + 682:Src/main.c **** } + 683:Src/main.c **** } + 684:Src/main.c **** HAL_TIM_Base_Stop(&htim10); + 685:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 686:Src/main.c **** + 687:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 688:Src/main.c **** + 689:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); + 690:Src/main.c **** TIM8->CNT = 0; + 691:Src/main.c **** + 692:Src/main.c **** Stop_TIM10(); + 693:Src/main.c **** task.current_param = task.min_param; + 694:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 695:Src/main.c **** if (task.tau > 3) + 696:Src/main.c **** { + 697:Src/main.c **** TIM10_period = htim10.Init.Period; + 698:Src/main.c **** htim10.Init.Period = 9999; + 699:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 700:Src/main.c **** } + 701:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 702:Src/main.c **** + 703:Src/main.c **** + 704:Src/main.c **** //*/ + 705:Src/main.c **** + 706:Src/main.c **** /* // Backup + 707:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 708:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 709:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 710:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 711:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 712:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 713:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 714:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 715:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 716:Src/main.c **** + 717:Src/main.c **** // Toggle pin for oscilloscope + 718:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 719:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 720:Src/main.c **** + 721:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 722:Src/main.c **** if (st != HAL_OK) + 723:Src/main.c **** while(1); + 724:Src/main.c **** while (task.current_param < task.max_param) + 725:Src/main.c **** { + 726:Src/main.c **** if (TIM10_coflag) + 727:Src/main.c **** { + 728:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 729:Src/main.c **** task.current_param += task.delta_param; + 730:Src/main.c **** TO10 = 0; + 731:Src/main.c **** TIM10_coflag = 0; + ARM GAS /tmp/ccYgfTud.s page 52 - 732:Src/main.c **** { - 733:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; - 734:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 735:Src/main.c **** } - 736:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 737:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); - 738:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; - 739:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; - 740:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA - 741:Src/main.c **** UART_transmission_request = NO_MESS; - 742:Src/main.c **** break; - 743:Src/main.c **** } - 744:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of - 745:Src/main.c **** { - 746:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter - 747:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 748:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 749:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 750:Src/main.c **** } - 751:Src/main.c **** /* USER CODE END WHILE */ - 752:Src/main.c **** - 753:Src/main.c **** /* USER CODE BEGIN 3 */ - 754:Src/main.c **** } - 755:Src/main.c **** /* USER CODE END 3 */ - 756:Src/main.c **** } - 757:Src/main.c **** - 758:Src/main.c **** /** - 759:Src/main.c **** * @brief System Clock Configuration - 760:Src/main.c **** * @retval None - 761:Src/main.c **** */ - 762:Src/main.c **** void SystemClock_Config(void) - 763:Src/main.c **** { - 764:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 765:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 766:Src/main.c **** - 767:Src/main.c **** /** Configure the main internal regulator output voltage - 768:Src/main.c **** */ - 769:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); - 770:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 771:Src/main.c **** - 772:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters - 773:Src/main.c **** * in the RCC_OscInitTypeDef structure. - 774:Src/main.c **** */ - 775:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 776:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 777:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 778:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 779:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 780:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 781:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 782:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 783:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 784:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 785:Src/main.c **** { - 786:Src/main.c **** Error_Handler(); - 787:Src/main.c **** } - 788:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 53 + 732:Src/main.c **** + 733:Src/main.c **** + 734:Src/main.c **** } + 735:Src/main.c **** } + 736:Src/main.c **** Stop_TIM10(); + 737:Src/main.c **** task.current_param = task.min_param; + 738:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 739:Src/main.c **** if (task.tau > 3) + 740:Src/main.c **** { + 741:Src/main.c **** TIM10_period = htim10.Init.Period; + 742:Src/main.c **** htim10.Init.Period = 9999; + 743:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 744:Src/main.c **** } + 745:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 746:Src/main.c **** */ + 747:Src/main.c **** + 748:Src/main.c **** + 749:Src/main.c **** break; + 750:Src/main.c **** case TT_CHANGE_TEMP_1: + 751:Src/main.c **** // isn't implemented + 752:Src/main.c **** break; + 753:Src/main.c **** case TT_CHANGE_TEMP_2: + 754:Src/main.c **** // isn't implemented + 755:Src/main.c **** break; + 756:Src/main.c **** } + 757:Src/main.c **** + 758:Src/main.c **** if (TO7>TO7_before) + 759:Src/main.c **** { + 760:Src/main.c **** TO7_before = TO7; + 761:Src/main.c **** + 762:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 763:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 764:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 765:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 766:Src/main.c **** + 767:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 768:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 769:Src/main.c **** + 770:Src/main.c **** //Prepare DATA of internals ADCs + 771:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 772:Src/main.c **** temp16 = Get_ADC(0); + 773:Src/main.c **** temp16 = Get_ADC(1); + 774:Src/main.c **** Long_Data[7] = temp16; + 775:Src/main.c **** + 776:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 777:Src/main.c **** temp16 = Get_ADC(1); + 778:Src/main.c **** Long_Data[8] = temp16; + 779:Src/main.c **** + 780:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 781:Src/main.c **** temp16 = Get_ADC(1); + 782:Src/main.c **** Long_Data[9] = temp16; + 783:Src/main.c **** + 784:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 785:Src/main.c **** temp16 = Get_ADC(1); + 786:Src/main.c **** Long_Data[10] = temp16; + 787:Src/main.c **** + 788:Src/main.c **** //Put the temperature of LD2 to Long_Data: + ARM GAS /tmp/ccYgfTud.s page 53 - 789:Src/main.c **** /** Activate the Over-Drive mode - 790:Src/main.c **** */ - 791:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) - 792:Src/main.c **** { - 793:Src/main.c **** Error_Handler(); - 794:Src/main.c **** } - 795:Src/main.c **** - 796:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks - 797:Src/main.c **** */ - 798:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 799:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 800:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 801:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 802:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 803:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 804:Src/main.c **** - 805:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) - 806:Src/main.c **** { - 807:Src/main.c **** Error_Handler(); - 808:Src/main.c **** } - 809:Src/main.c **** } - 810:Src/main.c **** - 811:Src/main.c **** /** - 812:Src/main.c **** * @brief ADC1 Initialization Function - 813:Src/main.c **** * @param None - 814:Src/main.c **** * @retval None - 815:Src/main.c **** */ - 816:Src/main.c **** static void MX_ADC1_Init(void) - 817:Src/main.c **** { - 818:Src/main.c **** - 819:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ - 820:Src/main.c **** - 821:Src/main.c **** /* USER CODE END ADC1_Init 0 */ - 822:Src/main.c **** - 823:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; - 824:Src/main.c **** - 825:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ - 826:Src/main.c **** - 827:Src/main.c **** /* USER CODE END ADC1_Init 1 */ - 828:Src/main.c **** - 829:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con - 830:Src/main.c **** */ - 831:Src/main.c **** hadc1.Instance = ADC1; - 832:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 833:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 834:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 835:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 836:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 837:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 838:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 839:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 840:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 841:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 842:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 843:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 844:Src/main.c **** { - 845:Src/main.c **** Error_Handler(); - ARM GAS /tmp/ccO46DoU.s page 54 + 789:Src/main.c **** temp16 = Get_ADC(1); + 790:Src/main.c **** Long_Data[11] = temp16; + 791:Src/main.c **** temp16 = Get_ADC(2); + 792:Src/main.c **** + 793:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 794:Src/main.c **** temp16 = Get_ADC(3); + 795:Src/main.c **** temp16 = Get_ADC(4); + 796:Src/main.c **** Long_Data[12] = temp16; + 797:Src/main.c **** temp16 = Get_ADC(5); + 798:Src/main.c **** + 799:Src/main.c **** //Put the timer tick to Long_Data: + 800:Src/main.c **** TO6_stop = TO6; + 801:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 802:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 803:Src/main.c **** + 804:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 805:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 806:Src/main.c **** + 807:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 808:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; + 809:Src/main.c **** } + 810:Src/main.c **** while (!TIM10_coflag); + 811:Src/main.c **** + 812:Src/main.c **** Stop_TIM10(); + 813:Src/main.c **** + 814:Src/main.c **** if (task.tau > 3) + 815:Src/main.c **** { + 816:Src/main.c **** htim10.Init.Period = TIM10_period; + 817:Src/main.c **** TO10_counter = task.dt / 10; + 818:Src/main.c **** } + 819:Src/main.c **** + 820:Src/main.c **** CPU_state_old = RUN_TASK; + 821:Src/main.c **** break; + 822:Src/main.c **** } + 823:Src/main.c **** + 824:Src/main.c **** switch (UART_transmission_request) + 825:Src/main.c **** { + 826:Src/main.c **** case MESS_01://Default state + 827:Src/main.c **** USART_TX(State_Data,2); + 828:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 829:Src/main.c **** State_Data[0]=0; + 830:Src/main.c **** State_Data[1]=0;//All OK! + 831:Src/main.c **** UART_transmission_request = NO_MESS; + 832:Src/main.c **** break; + 833:Src/main.c **** case MESS_02://Transmith packet + 834:Src/main.c **** + 835:Src/main.c **** //Find CS and put to Long_Data: + 836:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); + 837:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 838:Src/main.c **** + 839:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) + 840:Src/main.c **** { + 841:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; + 842:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 843:Src/main.c **** } + 844:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); + 845:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); + ARM GAS /tmp/ccYgfTud.s page 54 - 846:Src/main.c **** } - 847:Src/main.c **** - 848:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 849:Src/main.c **** */ - 850:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; - 851:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 852:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 853:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 854:Src/main.c **** { - 855:Src/main.c **** Error_Handler(); - 856:Src/main.c **** } - 857:Src/main.c **** - 858:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 859:Src/main.c **** */ - 860:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; - 861:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 862:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 863:Src/main.c **** { - 864:Src/main.c **** Error_Handler(); - 865:Src/main.c **** } - 866:Src/main.c **** - 867:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 868:Src/main.c **** */ - 869:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; - 870:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 871:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 872:Src/main.c **** { - 873:Src/main.c **** Error_Handler(); - 874:Src/main.c **** } - 875:Src/main.c **** - 876:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 877:Src/main.c **** */ - 878:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; - 879:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 880:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 881:Src/main.c **** { - 882:Src/main.c **** Error_Handler(); - 883:Src/main.c **** } - 884:Src/main.c **** - 885:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 886:Src/main.c **** */ - 887:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; - 888:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 889:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 890:Src/main.c **** { - 891:Src/main.c **** Error_Handler(); - 892:Src/main.c **** } - 893:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ - 894:Src/main.c **** - 895:Src/main.c **** /* USER CODE END ADC1_Init 2 */ - 896:Src/main.c **** - 897:Src/main.c **** } - 898:Src/main.c **** - 899:Src/main.c **** /** - 900:Src/main.c **** * @brief ADC3 Initialization Function - 901:Src/main.c **** * @param None - 902:Src/main.c **** * @retval None - ARM GAS /tmp/ccO46DoU.s page 55 + 846:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); + 847:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; + 848:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; + 849:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA + 850:Src/main.c **** UART_transmission_request = NO_MESS; + 851:Src/main.c **** break; + 852:Src/main.c **** case MESS_03://Transmith saved packet + 853:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) + 854:Src/main.c **** { + 855:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; + 856:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 857:Src/main.c **** } + 858:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 859:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); + 860:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; + 861:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; + 862:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA + 863:Src/main.c **** UART_transmission_request = NO_MESS; + 864:Src/main.c **** break; + 865:Src/main.c **** } + 866:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of + 867:Src/main.c **** { + 868:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter + 869:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 870:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 871:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 872:Src/main.c **** } + 873:Src/main.c **** /* USER CODE END WHILE */ + 874:Src/main.c **** + 875:Src/main.c **** /* USER CODE BEGIN 3 */ + 876:Src/main.c **** } + 877:Src/main.c **** /* USER CODE END 3 */ + 878:Src/main.c **** } + 879:Src/main.c **** + 880:Src/main.c **** /** + 881:Src/main.c **** * @brief System Clock Configuration + 882:Src/main.c **** * @retval None + 883:Src/main.c **** */ + 884:Src/main.c **** void SystemClock_Config(void) + 885:Src/main.c **** { + 886:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 887:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 888:Src/main.c **** + 889:Src/main.c **** /** Configure the main internal regulator output voltage + 890:Src/main.c **** */ + 891:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 892:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 893:Src/main.c **** + 894:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 895:Src/main.c **** * in the RCC_OscInitTypeDef structure. + 896:Src/main.c **** */ + 897:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + 898:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 899:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 900:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 901:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 902:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + ARM GAS /tmp/ccYgfTud.s page 55 - 903:Src/main.c **** */ - 904:Src/main.c **** static void MX_ADC3_Init(void) - 905:Src/main.c **** { - 906:Src/main.c **** - 907:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ - 908:Src/main.c **** - 909:Src/main.c **** /* USER CODE END ADC3_Init 0 */ + 903:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 904:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 905:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 906:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 907:Src/main.c **** { + 908:Src/main.c **** Error_Handler(); + 909:Src/main.c **** } 910:Src/main.c **** - 911:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; - 912:Src/main.c **** - 913:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ - 914:Src/main.c **** - 915:Src/main.c **** /* USER CODE END ADC3_Init 1 */ - 916:Src/main.c **** - 917:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con - 918:Src/main.c **** */ - 919:Src/main.c **** hadc3.Instance = ADC3; - 920:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 921:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 922:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 923:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 924:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 925:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 926:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 927:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 928:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 929:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 930:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 931:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 932:Src/main.c **** { - 933:Src/main.c **** Error_Handler(); - 934:Src/main.c **** } - 935:Src/main.c **** - 936:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 911:Src/main.c **** /** Activate the Over-Drive mode + 912:Src/main.c **** */ + 913:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) + 914:Src/main.c **** { + 915:Src/main.c **** Error_Handler(); + 916:Src/main.c **** } + 917:Src/main.c **** + 918:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 919:Src/main.c **** */ + 920:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 921:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 922:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + 923:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 924:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 925:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 926:Src/main.c **** + 927:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) + 928:Src/main.c **** { + 929:Src/main.c **** Error_Handler(); + 930:Src/main.c **** } + 931:Src/main.c **** } + 932:Src/main.c **** + 933:Src/main.c **** /** + 934:Src/main.c **** * @brief ADC1 Initialization Function + 935:Src/main.c **** * @param None + 936:Src/main.c **** * @retval None 937:Src/main.c **** */ - 938:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; - 939:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 940:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 941:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 942:Src/main.c **** { - 943:Src/main.c **** Error_Handler(); - 944:Src/main.c **** } - 945:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ + 938:Src/main.c **** static void MX_ADC1_Init(void) + 939:Src/main.c **** { + 940:Src/main.c **** + 941:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ + 942:Src/main.c **** + 943:Src/main.c **** /* USER CODE END ADC1_Init 0 */ + 944:Src/main.c **** + 945:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 946:Src/main.c **** - 947:Src/main.c **** /* USER CODE END ADC3_Init 2 */ + 947:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ 948:Src/main.c **** - 949:Src/main.c **** } + 949:Src/main.c **** /* USER CODE END ADC1_Init 1 */ 950:Src/main.c **** - 951:Src/main.c **** /** - 952:Src/main.c **** * @brief SDMMC1 Initialization Function - 953:Src/main.c **** * @param None - 954:Src/main.c **** * @retval None - 955:Src/main.c **** */ - 956:Src/main.c **** static void MX_SDMMC1_SD_Init(void) - 957:Src/main.c **** { - 95 .loc 1 957 1 is_stmt 1 view -0 + 951:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con + 952:Src/main.c **** */ + 953:Src/main.c **** hadc1.Instance = ADC1; + 954:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 955:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 956:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 957:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 958:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 959:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + ARM GAS /tmp/ccYgfTud.s page 56 + + + 960:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 961:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 962:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 963:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 964:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 965:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 966:Src/main.c **** { + 967:Src/main.c **** Error_Handler(); + 968:Src/main.c **** } + 969:Src/main.c **** + 970:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 971:Src/main.c **** */ + 972:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; + 973:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 974:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 975:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 976:Src/main.c **** { + 977:Src/main.c **** Error_Handler(); + 978:Src/main.c **** } + 979:Src/main.c **** + 980:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 981:Src/main.c **** */ + 982:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; + 983:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 984:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 985:Src/main.c **** { + 986:Src/main.c **** Error_Handler(); + 987:Src/main.c **** } + 988:Src/main.c **** + 989:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 990:Src/main.c **** */ + 991:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; + 992:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 993:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 994:Src/main.c **** { + 995:Src/main.c **** Error_Handler(); + 996:Src/main.c **** } + 997:Src/main.c **** + 998:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 999:Src/main.c **** */ +1000:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; +1001:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; +1002:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1003:Src/main.c **** { +1004:Src/main.c **** Error_Handler(); +1005:Src/main.c **** } +1006:Src/main.c **** +1007:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1008:Src/main.c **** */ +1009:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; +1010:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; +1011:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1012:Src/main.c **** { +1013:Src/main.c **** Error_Handler(); +1014:Src/main.c **** } +1015:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ +1016:Src/main.c **** + ARM GAS /tmp/ccYgfTud.s page 57 + + +1017:Src/main.c **** /* USER CODE END ADC1_Init 2 */ +1018:Src/main.c **** +1019:Src/main.c **** } +1020:Src/main.c **** +1021:Src/main.c **** /** +1022:Src/main.c **** * @brief ADC3 Initialization Function +1023:Src/main.c **** * @param None +1024:Src/main.c **** * @retval None +1025:Src/main.c **** */ +1026:Src/main.c **** static void MX_ADC3_Init(void) +1027:Src/main.c **** { +1028:Src/main.c **** +1029:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ +1030:Src/main.c **** +1031:Src/main.c **** /* USER CODE END ADC3_Init 0 */ +1032:Src/main.c **** +1033:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; +1034:Src/main.c **** +1035:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ +1036:Src/main.c **** +1037:Src/main.c **** /* USER CODE END ADC3_Init 1 */ +1038:Src/main.c **** +1039:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con +1040:Src/main.c **** */ +1041:Src/main.c **** hadc3.Instance = ADC3; +1042:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; +1043:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; +1044:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; +1045:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; +1046:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; +1047:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; +1048:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; +1049:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; +1050:Src/main.c **** hadc3.Init.NbrOfConversion = 1; +1051:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; +1052:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; +1053:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) +1054:Src/main.c **** { +1055:Src/main.c **** Error_Handler(); +1056:Src/main.c **** } +1057:Src/main.c **** +1058:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1059:Src/main.c **** */ +1060:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; +1061:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; +1062:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; +1063:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) +1064:Src/main.c **** { +1065:Src/main.c **** Error_Handler(); +1066:Src/main.c **** } +1067:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ +1068:Src/main.c **** +1069:Src/main.c **** /* USER CODE END ADC3_Init 2 */ +1070:Src/main.c **** +1071:Src/main.c **** } +1072:Src/main.c **** +1073:Src/main.c **** /** + ARM GAS /tmp/ccYgfTud.s page 58 + + +1074:Src/main.c **** * @brief SDMMC1 Initialization Function +1075:Src/main.c **** * @param None +1076:Src/main.c **** * @retval None +1077:Src/main.c **** */ +1078:Src/main.c **** static void MX_SDMMC1_SD_Init(void) +1079:Src/main.c **** { + 95 .loc 1 1079 1 is_stmt 1 view -0 96 .cfi_startproc - ARM GAS /tmp/ccO46DoU.s page 56 - - 97 @ args = 0, pretend = 0, frame = 0 98 @ frame_needed = 0, uses_anonymous_args = 0 99 @ link register save eliminated. - 958:Src/main.c **** - 959:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ - 960:Src/main.c **** - 961:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ - 962:Src/main.c **** - 963:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ - 964:Src/main.c **** - 965:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ - 966:Src/main.c **** hsd1.Instance = SDMMC1; - 100 .loc 1 966 3 view .LVU21 - 101 .loc 1 966 17 is_stmt 0 view .LVU22 +1080:Src/main.c **** +1081:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ +1082:Src/main.c **** +1083:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ +1084:Src/main.c **** +1085:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ +1086:Src/main.c **** +1087:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ +1088:Src/main.c **** hsd1.Instance = SDMMC1; + 100 .loc 1 1088 3 view .LVU21 + 101 .loc 1 1088 17 is_stmt 0 view .LVU22 102 0000 064B ldr r3, .L6 103 0002 074A ldr r2, .L6+4 104 0004 1A60 str r2, [r3] - 967:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - 105 .loc 1 967 3 is_stmt 1 view .LVU23 - 106 .loc 1 967 23 is_stmt 0 view .LVU24 +1089:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + 105 .loc 1 1089 3 is_stmt 1 view .LVU23 + 106 .loc 1 1089 23 is_stmt 0 view .LVU24 107 0006 0022 movs r2, #0 108 0008 5A60 str r2, [r3, #4] - 968:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; - 109 .loc 1 968 3 is_stmt 1 view .LVU25 - 110 .loc 1 968 25 is_stmt 0 view .LVU26 +1090:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; + 109 .loc 1 1090 3 is_stmt 1 view .LVU25 + 110 .loc 1 1090 25 is_stmt 0 view .LVU26 111 000a 9A60 str r2, [r3, #8] - 969:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - 112 .loc 1 969 3 is_stmt 1 view .LVU27 - 113 .loc 1 969 28 is_stmt 0 view .LVU28 +1091:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + 112 .loc 1 1091 3 is_stmt 1 view .LVU27 + 113 .loc 1 1091 28 is_stmt 0 view .LVU28 114 000c DA60 str r2, [r3, #12] - 970:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; - 115 .loc 1 970 3 is_stmt 1 view .LVU29 - 116 .loc 1 970 21 is_stmt 0 view .LVU30 +1092:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; + 115 .loc 1 1092 3 is_stmt 1 view .LVU29 + 116 .loc 1 1092 21 is_stmt 0 view .LVU30 117 000e 4FF40061 mov r1, #2048 118 0012 1961 str r1, [r3, #16] - 971:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - 119 .loc 1 971 3 is_stmt 1 view .LVU31 - 120 .loc 1 971 33 is_stmt 0 view .LVU32 +1093:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + 119 .loc 1 1093 3 is_stmt 1 view .LVU31 + 120 .loc 1 1093 33 is_stmt 0 view .LVU32 121 0014 5A61 str r2, [r3, #20] - 972:Src/main.c **** hsd1.Init.ClockDiv = 20; - 122 .loc 1 972 3 is_stmt 1 view .LVU33 - 123 .loc 1 972 22 is_stmt 0 view .LVU34 +1094:Src/main.c **** hsd1.Init.ClockDiv = 20; + 122 .loc 1 1094 3 is_stmt 1 view .LVU33 + 123 .loc 1 1094 22 is_stmt 0 view .LVU34 124 0016 1422 movs r2, #20 125 0018 9A61 str r2, [r3, #24] - 973:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ - 974:Src/main.c **** - 975:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ - 976:Src/main.c **** - 977:Src/main.c **** } - 126 .loc 1 977 1 view .LVU35 +1095:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ +1096:Src/main.c **** +1097:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ +1098:Src/main.c **** +1099:Src/main.c **** } + ARM GAS /tmp/ccYgfTud.s page 59 + + + 126 .loc 1 1099 1 view .LVU35 127 001a 7047 bx lr 128 .L7: 129 .align 2 @@ -3358,9 +3489,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 131 001c 00000000 .word hsd1 132 0020 002C0140 .word 1073818624 133 .cfi_endproc - ARM GAS /tmp/ccO46DoU.s page 57 - - 134 .LFE1190: 136 .section .text.MX_DMA_Init,"ax",%progbits 137 .align 1 @@ -3369,765 +3497,777 @@ ARM GAS /tmp/ccO46DoU.s page 1 140 .thumb_func 142 MX_DMA_Init: 143 .LFB1205: - 978:Src/main.c **** - 979:Src/main.c **** /** - 980:Src/main.c **** * @brief SPI2 Initialization Function - 981:Src/main.c **** * @param None - 982:Src/main.c **** * @retval None - 983:Src/main.c **** */ - 984:Src/main.c **** static void MX_SPI2_Init(void) - 985:Src/main.c **** { - 986:Src/main.c **** - 987:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ - 988:Src/main.c **** - 989:Src/main.c **** /* USER CODE END SPI2_Init 0 */ - 990:Src/main.c **** - 991:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; - 992:Src/main.c **** - 993:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - 994:Src/main.c **** - 995:Src/main.c **** /* Peripheral clock enable */ - 996:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); - 997:Src/main.c **** - 998:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); - 999:Src/main.c **** /**SPI2 GPIO Configuration -1000:Src/main.c **** PB13 ------> SPI2_SCK -1001:Src/main.c **** PB15 ------> SPI2_MOSI -1002:Src/main.c **** */ -1003:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1004:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1005:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1006:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1007:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1008:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1009:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1010:Src/main.c **** -1011:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; -1012:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1013:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1014:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1015:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1016:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1017:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1018:Src/main.c **** -1019:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ -1020:Src/main.c **** -1021:Src/main.c **** /* USER CODE END SPI2_Init 1 */ -1022:Src/main.c **** /* SPI2 parameter configuration*/ -1023:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1024:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1025:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1026:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - ARM GAS /tmp/ccO46DoU.s page 58 - - -1027:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; -1028:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1029:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; -1030:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1031:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1032:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1033:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); -1034:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); -1035:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); -1036:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ -1037:Src/main.c **** -1038:Src/main.c **** /* USER CODE END SPI2_Init 2 */ -1039:Src/main.c **** -1040:Src/main.c **** } -1041:Src/main.c **** -1042:Src/main.c **** /** -1043:Src/main.c **** * @brief SPI4 Initialization Function -1044:Src/main.c **** * @param None -1045:Src/main.c **** * @retval None -1046:Src/main.c **** */ -1047:Src/main.c **** static void MX_SPI4_Init(void) -1048:Src/main.c **** { -1049:Src/main.c **** -1050:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ -1051:Src/main.c **** -1052:Src/main.c **** /* USER CODE END SPI4_Init 0 */ -1053:Src/main.c **** -1054:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1055:Src/main.c **** -1056:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1057:Src/main.c **** -1058:Src/main.c **** /* Peripheral clock enable */ -1059:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); -1060:Src/main.c **** -1061:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); -1062:Src/main.c **** /**SPI4 GPIO Configuration -1063:Src/main.c **** PE12 ------> SPI4_SCK -1064:Src/main.c **** PE13 ------> SPI4_MISO -1065:Src/main.c **** */ -1066:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; -1067:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1068:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1069:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1070:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1071:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1072:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1073:Src/main.c **** -1074:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1075:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1076:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1077:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1078:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1079:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1080:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1081:Src/main.c **** -1082:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ -1083:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 59 - - -1084:Src/main.c **** /* USER CODE END SPI4_Init 1 */ -1085:Src/main.c **** /* SPI4 parameter configuration*/ -1086:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1087:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1088:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1089:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1090:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1091:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1092:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1093:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1094:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1095:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1096:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); -1097:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); -1098:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); -1099:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ 1100:Src/main.c **** -1101:Src/main.c **** /* USER CODE END SPI4_Init 2 */ -1102:Src/main.c **** -1103:Src/main.c **** } -1104:Src/main.c **** -1105:Src/main.c **** /** -1106:Src/main.c **** * @brief SPI5 Initialization Function -1107:Src/main.c **** * @param None -1108:Src/main.c **** * @retval None -1109:Src/main.c **** */ -1110:Src/main.c **** static void MX_SPI5_Init(void) -1111:Src/main.c **** { +1101:Src/main.c **** /** +1102:Src/main.c **** * @brief SPI2 Initialization Function +1103:Src/main.c **** * @param None +1104:Src/main.c **** * @retval None +1105:Src/main.c **** */ +1106:Src/main.c **** static void MX_SPI2_Init(void) +1107:Src/main.c **** { +1108:Src/main.c **** +1109:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ +1110:Src/main.c **** +1111:Src/main.c **** /* USER CODE END SPI2_Init 0 */ 1112:Src/main.c **** -1113:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ +1113:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; 1114:Src/main.c **** -1115:Src/main.c **** /* USER CODE END SPI5_Init 0 */ +1115:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; 1116:Src/main.c **** -1117:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1118:Src/main.c **** -1119:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1120:Src/main.c **** -1121:Src/main.c **** /* Peripheral clock enable */ -1122:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); -1123:Src/main.c **** -1124:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); -1125:Src/main.c **** /**SPI5 GPIO Configuration -1126:Src/main.c **** PF7 ------> SPI5_SCK -1127:Src/main.c **** PF8 ------> SPI5_MISO -1128:Src/main.c **** */ -1129:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1130:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1131:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1132:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1133:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1134:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1135:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1136:Src/main.c **** -1137:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; -1138:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1139:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1140:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - ARM GAS /tmp/ccO46DoU.s page 60 +1117:Src/main.c **** /* Peripheral clock enable */ +1118:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); +1119:Src/main.c **** +1120:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); +1121:Src/main.c **** /**SPI2 GPIO Configuration +1122:Src/main.c **** PB13 ------> SPI2_SCK +1123:Src/main.c **** PB14 ------> SPI2_MISO +1124:Src/main.c **** PB15 ------> SPI2_MOSI +1125:Src/main.c **** */ +1126:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1127:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1128:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1129:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1130:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1131:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1132:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1133:Src/main.c **** +1134:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_14; +1135:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1136:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1137:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1138:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1139:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1140:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + ARM GAS /tmp/ccYgfTud.s page 60 -1141:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1142:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1143:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1144:Src/main.c **** -1145:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ -1146:Src/main.c **** -1147:Src/main.c **** /* USER CODE END SPI5_Init 1 */ -1148:Src/main.c **** /* SPI5 parameter configuration*/ -1149:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1150:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1151:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1152:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1153:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1154:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1155:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1156:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1157:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1158:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1159:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); -1160:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); -1161:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); -1162:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ -1163:Src/main.c **** -1164:Src/main.c **** /* USER CODE END SPI5_Init 2 */ -1165:Src/main.c **** -1166:Src/main.c **** } -1167:Src/main.c **** -1168:Src/main.c **** /** -1169:Src/main.c **** * @brief SPI6 Initialization Function -1170:Src/main.c **** * @param None -1171:Src/main.c **** * @retval None -1172:Src/main.c **** */ -1173:Src/main.c **** static void MX_SPI6_Init(void) -1174:Src/main.c **** { -1175:Src/main.c **** -1176:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ -1177:Src/main.c **** -1178:Src/main.c **** /* USER CODE END SPI6_Init 0 */ -1179:Src/main.c **** -1180:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1181:Src/main.c **** -1182:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1183:Src/main.c **** -1184:Src/main.c **** /* Peripheral clock enable */ -1185:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); +1141:Src/main.c **** +1142:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; +1143:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1144:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1145:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1146:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1147:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1148:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1149:Src/main.c **** +1150:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ +1151:Src/main.c **** +1152:Src/main.c **** /* USER CODE END SPI2_Init 1 */ +1153:Src/main.c **** /* SPI2 parameter configuration*/ +1154:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1155:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1156:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1157:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; +1158:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1159:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1160:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; +1161:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1162:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1163:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1164:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); +1165:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); +1166:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); +1167:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ +1168:Src/main.c **** +1169:Src/main.c **** /* USER CODE END SPI2_Init 2 */ +1170:Src/main.c **** +1171:Src/main.c **** } +1172:Src/main.c **** +1173:Src/main.c **** /** +1174:Src/main.c **** * @brief SPI4 Initialization Function +1175:Src/main.c **** * @param None +1176:Src/main.c **** * @retval None +1177:Src/main.c **** */ +1178:Src/main.c **** static void MX_SPI4_Init(void) +1179:Src/main.c **** { +1180:Src/main.c **** +1181:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ +1182:Src/main.c **** +1183:Src/main.c **** /* USER CODE END SPI4_Init 0 */ +1184:Src/main.c **** +1185:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; 1186:Src/main.c **** -1187:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1188:Src/main.c **** /**SPI6 GPIO Configuration -1189:Src/main.c **** PA5 ------> SPI6_SCK -1190:Src/main.c **** PA7 ------> SPI6_MOSI -1191:Src/main.c **** */ -1192:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; -1193:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1194:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1195:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1196:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1197:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - ARM GAS /tmp/ccO46DoU.s page 61 +1187:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1188:Src/main.c **** +1189:Src/main.c **** /* Peripheral clock enable */ +1190:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); +1191:Src/main.c **** +1192:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); +1193:Src/main.c **** /**SPI4 GPIO Configuration +1194:Src/main.c **** PE12 ------> SPI4_SCK +1195:Src/main.c **** PE13 ------> SPI4_MISO +1196:Src/main.c **** */ +1197:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; + ARM GAS /tmp/ccYgfTud.s page 61 -1198:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1199:Src/main.c **** -1200:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1201:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1202:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1203:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1204:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1205:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; -1206:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1207:Src/main.c **** -1208:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ -1209:Src/main.c **** -1210:Src/main.c **** /* USER CODE END SPI6_Init 1 */ -1211:Src/main.c **** /* SPI6 parameter configuration*/ -1212:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1213:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1214:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1215:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1216:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; -1217:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1218:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1219:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1220:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1221:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1222:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); -1223:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); -1224:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); -1225:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ -1226:Src/main.c **** -1227:Src/main.c **** /* USER CODE END SPI6_Init 2 */ -1228:Src/main.c **** -1229:Src/main.c **** } -1230:Src/main.c **** -1231:Src/main.c **** /** -1232:Src/main.c **** * @brief TIM2 Initialization Function -1233:Src/main.c **** * @param None -1234:Src/main.c **** * @retval None -1235:Src/main.c **** */ -1236:Src/main.c **** static void MX_TIM2_Init(void) -1237:Src/main.c **** { -1238:Src/main.c **** -1239:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ -1240:Src/main.c **** -1241:Src/main.c **** /* USER CODE END TIM2_Init 0 */ -1242:Src/main.c **** -1243:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1244:Src/main.c **** -1245:Src/main.c **** /* Peripheral clock enable */ -1246:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); +1198:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1199:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1200:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1201:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1202:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1203:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1204:Src/main.c **** +1205:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1206:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1207:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1208:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1209:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1210:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1211:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1212:Src/main.c **** +1213:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ +1214:Src/main.c **** +1215:Src/main.c **** /* USER CODE END SPI4_Init 1 */ +1216:Src/main.c **** /* SPI4 parameter configuration*/ +1217:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1218:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1219:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1220:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1221:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1222:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1223:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1224:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1225:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1226:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1227:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); +1228:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); +1229:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); +1230:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ +1231:Src/main.c **** +1232:Src/main.c **** /* USER CODE END SPI4_Init 2 */ +1233:Src/main.c **** +1234:Src/main.c **** } +1235:Src/main.c **** +1236:Src/main.c **** /** +1237:Src/main.c **** * @brief SPI5 Initialization Function +1238:Src/main.c **** * @param None +1239:Src/main.c **** * @retval None +1240:Src/main.c **** */ +1241:Src/main.c **** static void MX_SPI5_Init(void) +1242:Src/main.c **** { +1243:Src/main.c **** +1244:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ +1245:Src/main.c **** +1246:Src/main.c **** /* USER CODE END SPI5_Init 0 */ 1247:Src/main.c **** -1248:Src/main.c **** /* TIM2 interrupt Init */ -1249:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1250:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); +1248:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1249:Src/main.c **** +1250:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; 1251:Src/main.c **** -1252:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ -1253:Src/main.c **** -1254:Src/main.c **** /* USER CODE END TIM2_Init 1 */ - ARM GAS /tmp/ccO46DoU.s page 62 +1252:Src/main.c **** /* Peripheral clock enable */ +1253:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); +1254:Src/main.c **** + ARM GAS /tmp/ccYgfTud.s page 62 -1255:Src/main.c **** TIM_InitStruct.Prescaler = 1000; -1256:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1257:Src/main.c **** TIM_InitStruct.Autoreload = 840000; -1258:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1259:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); -1260:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); -1261:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); -1262:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); -1263:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); -1264:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ -1265:Src/main.c **** -1266:Src/main.c **** /* USER CODE END TIM2_Init 2 */ +1255:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); +1256:Src/main.c **** /**SPI5 GPIO Configuration +1257:Src/main.c **** PF7 ------> SPI5_SCK +1258:Src/main.c **** PF8 ------> SPI5_MISO +1259:Src/main.c **** */ +1260:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1261:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1262:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1263:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1264:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1265:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1266:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); 1267:Src/main.c **** -1268:Src/main.c **** } -1269:Src/main.c **** -1270:Src/main.c **** /** -1271:Src/main.c **** * @brief TIM4 Initialization Function -1272:Src/main.c **** * @param None -1273:Src/main.c **** * @retval None -1274:Src/main.c **** */ -1275:Src/main.c **** static void MX_TIM4_Init(void) -1276:Src/main.c **** { +1268:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; +1269:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1270:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1271:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1272:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1273:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1274:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1275:Src/main.c **** +1276:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ 1277:Src/main.c **** -1278:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ -1279:Src/main.c **** -1280:Src/main.c **** /* USER CODE END TIM4_Init 0 */ -1281:Src/main.c **** -1282:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1283:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1284:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; -1285:Src/main.c **** -1286:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ -1287:Src/main.c **** -1288:Src/main.c **** /* USER CODE END TIM4_Init 1 */ -1289:Src/main.c **** htim4.Instance = TIM4; -1290:Src/main.c **** htim4.Init.Prescaler = 0; -1291:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; -1292:Src/main.c **** htim4.Init.Period = 45; -1293:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1294:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1295:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) -1296:Src/main.c **** { -1297:Src/main.c **** Error_Handler(); -1298:Src/main.c **** } -1299:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1300:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) -1301:Src/main.c **** { -1302:Src/main.c **** Error_Handler(); -1303:Src/main.c **** } -1304:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) -1305:Src/main.c **** { -1306:Src/main.c **** Error_Handler(); -1307:Src/main.c **** } -1308:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1309:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1310:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) -1311:Src/main.c **** { - ARM GAS /tmp/ccO46DoU.s page 63 +1278:Src/main.c **** /* USER CODE END SPI5_Init 1 */ +1279:Src/main.c **** /* SPI5 parameter configuration*/ +1280:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1281:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1282:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1283:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1284:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1285:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1286:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1287:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1288:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1289:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1290:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); +1291:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); +1292:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); +1293:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ +1294:Src/main.c **** +1295:Src/main.c **** /* USER CODE END SPI5_Init 2 */ +1296:Src/main.c **** +1297:Src/main.c **** } +1298:Src/main.c **** +1299:Src/main.c **** /** +1300:Src/main.c **** * @brief SPI6 Initialization Function +1301:Src/main.c **** * @param None +1302:Src/main.c **** * @retval None +1303:Src/main.c **** */ +1304:Src/main.c **** static void MX_SPI6_Init(void) +1305:Src/main.c **** { +1306:Src/main.c **** +1307:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ +1308:Src/main.c **** +1309:Src/main.c **** /* USER CODE END SPI6_Init 0 */ +1310:Src/main.c **** +1311:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; + ARM GAS /tmp/ccYgfTud.s page 63 -1312:Src/main.c **** Error_Handler(); -1313:Src/main.c **** } -1314:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1315:Src/main.c **** sConfigOC.Pulse = 22; -1316:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1317:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1318:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) -1319:Src/main.c **** { -1320:Src/main.c **** Error_Handler(); -1321:Src/main.c **** } -1322:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ -1323:Src/main.c **** -1324:Src/main.c **** /* USER CODE END TIM4_Init 2 */ -1325:Src/main.c **** HAL_TIM_MspPostInit(&htim4); -1326:Src/main.c **** -1327:Src/main.c **** } -1328:Src/main.c **** -1329:Src/main.c **** /** -1330:Src/main.c **** * @brief TIM5 Initialization Function -1331:Src/main.c **** * @param None -1332:Src/main.c **** * @retval None -1333:Src/main.c **** */ -1334:Src/main.c **** static void MX_TIM5_Init(void) -1335:Src/main.c **** { -1336:Src/main.c **** -1337:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ +1312:Src/main.c **** +1313:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1314:Src/main.c **** +1315:Src/main.c **** /* Peripheral clock enable */ +1316:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); +1317:Src/main.c **** +1318:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +1319:Src/main.c **** /**SPI6 GPIO Configuration +1320:Src/main.c **** PA5 ------> SPI6_SCK +1321:Src/main.c **** PA7 ------> SPI6_MOSI +1322:Src/main.c **** */ +1323:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; +1324:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1325:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1326:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1327:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1328:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; +1329:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1330:Src/main.c **** +1331:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1332:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1333:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1334:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1335:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1336:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; +1337:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1338:Src/main.c **** -1339:Src/main.c **** /* USER CODE END TIM5_Init 0 */ +1339:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ 1340:Src/main.c **** -1341:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1342:Src/main.c **** -1343:Src/main.c **** /* Peripheral clock enable */ -1344:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); -1345:Src/main.c **** -1346:Src/main.c **** /* TIM5 interrupt Init */ -1347:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1348:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); -1349:Src/main.c **** -1350:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ -1351:Src/main.c **** -1352:Src/main.c **** /* USER CODE END TIM5_Init 1 */ -1353:Src/main.c **** TIM_InitStruct.Prescaler = 10000; -1354:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1355:Src/main.c **** TIM_InitStruct.Autoreload = 560; -1356:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1357:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); -1358:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); -1359:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); -1360:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); -1361:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); -1362:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ -1363:Src/main.c **** -1364:Src/main.c **** /* USER CODE END TIM5_Init 2 */ -1365:Src/main.c **** -1366:Src/main.c **** } -1367:Src/main.c **** -1368:Src/main.c **** /** - ARM GAS /tmp/ccO46DoU.s page 64 +1341:Src/main.c **** /* USER CODE END SPI6_Init 1 */ +1342:Src/main.c **** /* SPI6 parameter configuration*/ +1343:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1344:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1345:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1346:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1347:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; +1348:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1349:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1350:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1351:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1352:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1353:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); +1354:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); +1355:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); +1356:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ +1357:Src/main.c **** +1358:Src/main.c **** /* USER CODE END SPI6_Init 2 */ +1359:Src/main.c **** +1360:Src/main.c **** } +1361:Src/main.c **** +1362:Src/main.c **** /** +1363:Src/main.c **** * @brief TIM2 Initialization Function +1364:Src/main.c **** * @param None +1365:Src/main.c **** * @retval None +1366:Src/main.c **** */ +1367:Src/main.c **** static void MX_TIM2_Init(void) +1368:Src/main.c **** { + ARM GAS /tmp/ccYgfTud.s page 64 -1369:Src/main.c **** * @brief TIM6 Initialization Function -1370:Src/main.c **** * @param None -1371:Src/main.c **** * @retval None -1372:Src/main.c **** */ -1373:Src/main.c **** static void MX_TIM6_Init(void) -1374:Src/main.c **** { +1369:Src/main.c **** +1370:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ +1371:Src/main.c **** +1372:Src/main.c **** /* USER CODE END TIM2_Init 0 */ +1373:Src/main.c **** +1374:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; 1375:Src/main.c **** -1376:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ -1377:Src/main.c **** -1378:Src/main.c **** /* USER CODE END TIM6_Init 0 */ -1379:Src/main.c **** -1380:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1381:Src/main.c **** -1382:Src/main.c **** /* Peripheral clock enable */ -1383:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); +1376:Src/main.c **** /* Peripheral clock enable */ +1377:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); +1378:Src/main.c **** +1379:Src/main.c **** /* TIM2 interrupt Init */ +1380:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1381:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); +1382:Src/main.c **** +1383:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ 1384:Src/main.c **** -1385:Src/main.c **** /* TIM6 interrupt Init */ -1386:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1387:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); -1388:Src/main.c **** -1389:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ -1390:Src/main.c **** -1391:Src/main.c **** /* USER CODE END TIM6_Init 1 */ -1392:Src/main.c **** TIM_InitStruct.Prescaler = 45999; -1393:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1394:Src/main.c **** TIM_InitStruct.Autoreload = 19; -1395:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); -1396:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); -1397:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); -1398:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); -1399:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ +1385:Src/main.c **** /* USER CODE END TIM2_Init 1 */ +1386:Src/main.c **** TIM_InitStruct.Prescaler = 1000; +1387:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1388:Src/main.c **** TIM_InitStruct.Autoreload = 840000; +1389:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1390:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); +1391:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); +1392:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); +1393:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); +1394:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); +1395:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ +1396:Src/main.c **** +1397:Src/main.c **** /* USER CODE END TIM2_Init 2 */ +1398:Src/main.c **** +1399:Src/main.c **** } 1400:Src/main.c **** -1401:Src/main.c **** /* USER CODE END TIM6_Init 2 */ -1402:Src/main.c **** -1403:Src/main.c **** } -1404:Src/main.c **** -1405:Src/main.c **** /** -1406:Src/main.c **** * @brief TIM7 Initialization Function -1407:Src/main.c **** * @param None -1408:Src/main.c **** * @retval None -1409:Src/main.c **** */ -1410:Src/main.c **** static void MX_TIM7_Init(void) -1411:Src/main.c **** { +1401:Src/main.c **** /** +1402:Src/main.c **** * @brief TIM4 Initialization Function +1403:Src/main.c **** * @param None +1404:Src/main.c **** * @retval None +1405:Src/main.c **** */ +1406:Src/main.c **** static void MX_TIM4_Init(void) +1407:Src/main.c **** { +1408:Src/main.c **** +1409:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ +1410:Src/main.c **** +1411:Src/main.c **** /* USER CODE END TIM4_Init 0 */ 1412:Src/main.c **** -1413:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ -1414:Src/main.c **** -1415:Src/main.c **** /* USER CODE END TIM7_Init 0 */ +1413:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1414:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1415:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 1416:Src/main.c **** -1417:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1417:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ 1418:Src/main.c **** -1419:Src/main.c **** /* Peripheral clock enable */ -1420:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); -1421:Src/main.c **** -1422:Src/main.c **** /* TIM7 interrupt Init */ -1423:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1424:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); -1425:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 65 +1419:Src/main.c **** /* USER CODE END TIM4_Init 1 */ +1420:Src/main.c **** htim4.Instance = TIM4; +1421:Src/main.c **** htim4.Init.Prescaler = 0; +1422:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; +1423:Src/main.c **** htim4.Init.Period = 45; +1424:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1425:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + ARM GAS /tmp/ccYgfTud.s page 65 -1426:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ -1427:Src/main.c **** -1428:Src/main.c **** /* USER CODE END TIM7_Init 1 */ -1429:Src/main.c **** TIM_InitStruct.Prescaler = 919; -1430:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1431:Src/main.c **** TIM_InitStruct.Autoreload = 99; -1432:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); -1433:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); -1434:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); -1435:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); -1436:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ -1437:Src/main.c **** -1438:Src/main.c **** /* USER CODE END TIM7_Init 2 */ -1439:Src/main.c **** -1440:Src/main.c **** } -1441:Src/main.c **** -1442:Src/main.c **** /** -1443:Src/main.c **** * @brief TIM8 Initialization Function -1444:Src/main.c **** * @param None -1445:Src/main.c **** * @retval None -1446:Src/main.c **** */ -1447:Src/main.c **** static void MX_TIM8_Init(void) -1448:Src/main.c **** { -1449:Src/main.c **** -1450:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ -1451:Src/main.c **** -1452:Src/main.c **** /* USER CODE END TIM8_Init 0 */ -1453:Src/main.c **** -1454:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1455:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1456:Src/main.c **** -1457:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ -1458:Src/main.c **** -1459:Src/main.c **** /* USER CODE END TIM8_Init 1 */ -1460:Src/main.c **** htim8.Instance = TIM8; -1461:Src/main.c **** htim8.Init.Prescaler = 0; -1462:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; -1463:Src/main.c **** htim8.Init.Period = 91; -1464:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1465:Src/main.c **** htim8.Init.RepetitionCounter = 0; -1466:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1467:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) -1468:Src/main.c **** { -1469:Src/main.c **** Error_Handler(); -1470:Src/main.c **** } -1471:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1472:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) -1473:Src/main.c **** { -1474:Src/main.c **** Error_Handler(); -1475:Src/main.c **** } -1476:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1477:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; -1478:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1479:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) -1480:Src/main.c **** { -1481:Src/main.c **** Error_Handler(); -1482:Src/main.c **** } - ARM GAS /tmp/ccO46DoU.s page 66 +1426:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) +1427:Src/main.c **** { +1428:Src/main.c **** Error_Handler(); +1429:Src/main.c **** } +1430:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1431:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) +1432:Src/main.c **** { +1433:Src/main.c **** Error_Handler(); +1434:Src/main.c **** } +1435:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) +1436:Src/main.c **** { +1437:Src/main.c **** Error_Handler(); +1438:Src/main.c **** } +1439:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1440:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1441:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) +1442:Src/main.c **** { +1443:Src/main.c **** Error_Handler(); +1444:Src/main.c **** } +1445:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1446:Src/main.c **** sConfigOC.Pulse = 22; +1447:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1448:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1449:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) +1450:Src/main.c **** { +1451:Src/main.c **** Error_Handler(); +1452:Src/main.c **** } +1453:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ +1454:Src/main.c **** +1455:Src/main.c **** /* USER CODE END TIM4_Init 2 */ +1456:Src/main.c **** HAL_TIM_MspPostInit(&htim4); +1457:Src/main.c **** +1458:Src/main.c **** } +1459:Src/main.c **** +1460:Src/main.c **** /** +1461:Src/main.c **** * @brief TIM5 Initialization Function +1462:Src/main.c **** * @param None +1463:Src/main.c **** * @retval None +1464:Src/main.c **** */ +1465:Src/main.c **** static void MX_TIM5_Init(void) +1466:Src/main.c **** { +1467:Src/main.c **** +1468:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ +1469:Src/main.c **** +1470:Src/main.c **** /* USER CODE END TIM5_Init 0 */ +1471:Src/main.c **** +1472:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1473:Src/main.c **** +1474:Src/main.c **** /* Peripheral clock enable */ +1475:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); +1476:Src/main.c **** +1477:Src/main.c **** /* TIM5 interrupt Init */ +1478:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1479:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); +1480:Src/main.c **** +1481:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ +1482:Src/main.c **** + ARM GAS /tmp/ccYgfTud.s page 66 -1483:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ -1484:Src/main.c **** -1485:Src/main.c **** /* USER CODE END TIM8_Init 2 */ -1486:Src/main.c **** -1487:Src/main.c **** } -1488:Src/main.c **** -1489:Src/main.c **** /** -1490:Src/main.c **** * @brief TIM10 Initialization Function -1491:Src/main.c **** * @param None -1492:Src/main.c **** * @retval None -1493:Src/main.c **** */ -1494:Src/main.c **** static void MX_TIM10_Init(void) -1495:Src/main.c **** { +1483:Src/main.c **** /* USER CODE END TIM5_Init 1 */ +1484:Src/main.c **** TIM_InitStruct.Prescaler = 10000; +1485:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1486:Src/main.c **** TIM_InitStruct.Autoreload = 560; +1487:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1488:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); +1489:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); +1490:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); +1491:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); +1492:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); +1493:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ +1494:Src/main.c **** +1495:Src/main.c **** /* USER CODE END TIM5_Init 2 */ 1496:Src/main.c **** -1497:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ +1497:Src/main.c **** } 1498:Src/main.c **** -1499:Src/main.c **** /* USER CODE END TIM10_Init 0 */ -1500:Src/main.c **** -1501:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ -1502:Src/main.c **** -1503:Src/main.c **** /* USER CODE END TIM10_Init 1 */ -1504:Src/main.c **** htim10.Instance = TIM10; -1505:Src/main.c **** htim10.Init.Prescaler = 183; -1506:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; -1507:Src/main.c **** htim10.Init.Period = 9; -1508:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1509:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1510:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) -1511:Src/main.c **** { -1512:Src/main.c **** Error_Handler(); -1513:Src/main.c **** } -1514:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ +1499:Src/main.c **** /** +1500:Src/main.c **** * @brief TIM6 Initialization Function +1501:Src/main.c **** * @param None +1502:Src/main.c **** * @retval None +1503:Src/main.c **** */ +1504:Src/main.c **** static void MX_TIM6_Init(void) +1505:Src/main.c **** { +1506:Src/main.c **** +1507:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ +1508:Src/main.c **** +1509:Src/main.c **** /* USER CODE END TIM6_Init 0 */ +1510:Src/main.c **** +1511:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1512:Src/main.c **** +1513:Src/main.c **** /* Peripheral clock enable */ +1514:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); 1515:Src/main.c **** -1516:Src/main.c **** /* USER CODE END TIM10_Init 2 */ -1517:Src/main.c **** -1518:Src/main.c **** } +1516:Src/main.c **** /* TIM6 interrupt Init */ +1517:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1518:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); 1519:Src/main.c **** -1520:Src/main.c **** /** -1521:Src/main.c **** * @brief TIM11 Initialization Function -1522:Src/main.c **** * @param None -1523:Src/main.c **** * @retval None -1524:Src/main.c **** */ -1525:Src/main.c **** static void MX_TIM11_Init(void) -1526:Src/main.c **** { -1527:Src/main.c **** -1528:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ -1529:Src/main.c **** -1530:Src/main.c **** /* USER CODE END TIM11_Init 0 */ +1520:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ +1521:Src/main.c **** +1522:Src/main.c **** /* USER CODE END TIM6_Init 1 */ +1523:Src/main.c **** TIM_InitStruct.Prescaler = 45999; +1524:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1525:Src/main.c **** TIM_InitStruct.Autoreload = 19; +1526:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); +1527:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); +1528:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); +1529:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); +1530:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ 1531:Src/main.c **** -1532:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1532:Src/main.c **** /* USER CODE END TIM6_Init 2 */ 1533:Src/main.c **** -1534:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ +1534:Src/main.c **** } 1535:Src/main.c **** -1536:Src/main.c **** /* USER CODE END TIM11_Init 1 */ -1537:Src/main.c **** htim11.Instance = TIM11; -1538:Src/main.c **** htim11.Init.Prescaler = 1; -1539:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - ARM GAS /tmp/ccO46DoU.s page 67 +1536:Src/main.c **** /** +1537:Src/main.c **** * @brief TIM7 Initialization Function +1538:Src/main.c **** * @param None +1539:Src/main.c **** * @retval None + ARM GAS /tmp/ccYgfTud.s page 67 -1540:Src/main.c **** htim11.Init.Period = 91; -1541:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1542:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; -1543:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) -1544:Src/main.c **** { -1545:Src/main.c **** Error_Handler(); -1546:Src/main.c **** } -1547:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) -1548:Src/main.c **** { -1549:Src/main.c **** Error_Handler(); -1550:Src/main.c **** } -1551:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1552:Src/main.c **** sConfigOC.Pulse = 91; -1553:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1554:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1555:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) -1556:Src/main.c **** { -1557:Src/main.c **** Error_Handler(); -1558:Src/main.c **** } -1559:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ -1560:Src/main.c **** -1561:Src/main.c **** /* USER CODE END TIM11_Init 2 */ -1562:Src/main.c **** HAL_TIM_MspPostInit(&htim11); -1563:Src/main.c **** -1564:Src/main.c **** } -1565:Src/main.c **** -1566:Src/main.c **** /** -1567:Src/main.c **** * @brief UART8 Initialization Function -1568:Src/main.c **** * @param None -1569:Src/main.c **** * @retval None -1570:Src/main.c **** */ -1571:Src/main.c **** static void MX_UART8_Init(void) -1572:Src/main.c **** { -1573:Src/main.c **** -1574:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ -1575:Src/main.c **** -1576:Src/main.c **** /* USER CODE END UART8_Init 0 */ -1577:Src/main.c **** -1578:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ -1579:Src/main.c **** -1580:Src/main.c **** /* USER CODE END UART8_Init 1 */ -1581:Src/main.c **** huart8.Instance = UART8; -1582:Src/main.c **** huart8.Init.BaudRate = 115200; -1583:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; -1584:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; -1585:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; -1586:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; -1587:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; -1588:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; -1589:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; -1590:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; -1591:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) -1592:Src/main.c **** { -1593:Src/main.c **** Error_Handler(); -1594:Src/main.c **** } -1595:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ -1596:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 68 +1540:Src/main.c **** */ +1541:Src/main.c **** static void MX_TIM7_Init(void) +1542:Src/main.c **** { +1543:Src/main.c **** +1544:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ +1545:Src/main.c **** +1546:Src/main.c **** /* USER CODE END TIM7_Init 0 */ +1547:Src/main.c **** +1548:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1549:Src/main.c **** +1550:Src/main.c **** /* Peripheral clock enable */ +1551:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); +1552:Src/main.c **** +1553:Src/main.c **** /* TIM7 interrupt Init */ +1554:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1555:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); +1556:Src/main.c **** +1557:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ +1558:Src/main.c **** +1559:Src/main.c **** /* USER CODE END TIM7_Init 1 */ +1560:Src/main.c **** TIM_InitStruct.Prescaler = 919; +1561:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1562:Src/main.c **** TIM_InitStruct.Autoreload = 99; +1563:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); +1564:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); +1565:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); +1566:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); +1567:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ +1568:Src/main.c **** +1569:Src/main.c **** /* USER CODE END TIM7_Init 2 */ +1570:Src/main.c **** +1571:Src/main.c **** } +1572:Src/main.c **** +1573:Src/main.c **** /** +1574:Src/main.c **** * @brief TIM8 Initialization Function +1575:Src/main.c **** * @param None +1576:Src/main.c **** * @retval None +1577:Src/main.c **** */ +1578:Src/main.c **** static void MX_TIM8_Init(void) +1579:Src/main.c **** { +1580:Src/main.c **** +1581:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ +1582:Src/main.c **** +1583:Src/main.c **** /* USER CODE END TIM8_Init 0 */ +1584:Src/main.c **** +1585:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1586:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1587:Src/main.c **** +1588:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ +1589:Src/main.c **** +1590:Src/main.c **** /* USER CODE END TIM8_Init 1 */ +1591:Src/main.c **** htim8.Instance = TIM8; +1592:Src/main.c **** htim8.Init.Prescaler = 0; +1593:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; +1594:Src/main.c **** htim8.Init.Period = 91; +1595:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1596:Src/main.c **** htim8.Init.RepetitionCounter = 0; + ARM GAS /tmp/ccYgfTud.s page 68 -1597:Src/main.c **** /* USER CODE END UART8_Init 2 */ -1598:Src/main.c **** -1599:Src/main.c **** } -1600:Src/main.c **** -1601:Src/main.c **** /** -1602:Src/main.c **** * @brief USART1 Initialization Function -1603:Src/main.c **** * @param None -1604:Src/main.c **** * @retval None -1605:Src/main.c **** */ -1606:Src/main.c **** static void MX_USART1_UART_Init(void) -1607:Src/main.c **** { -1608:Src/main.c **** -1609:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ -1610:Src/main.c **** -1611:Src/main.c **** /* USER CODE END USART1_Init 0 */ -1612:Src/main.c **** -1613:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; -1614:Src/main.c **** -1615:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1616:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; +1597:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1598:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) +1599:Src/main.c **** { +1600:Src/main.c **** Error_Handler(); +1601:Src/main.c **** } +1602:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1603:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) +1604:Src/main.c **** { +1605:Src/main.c **** Error_Handler(); +1606:Src/main.c **** } +1607:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1608:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; +1609:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1610:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) +1611:Src/main.c **** { +1612:Src/main.c **** Error_Handler(); +1613:Src/main.c **** } +1614:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ +1615:Src/main.c **** +1616:Src/main.c **** /* USER CODE END TIM8_Init 2 */ 1617:Src/main.c **** -1618:Src/main.c **** /** Initializes the peripherals clock -1619:Src/main.c **** */ -1620:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; -1621:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; -1622:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) -1623:Src/main.c **** { -1624:Src/main.c **** Error_Handler(); -1625:Src/main.c **** } -1626:Src/main.c **** -1627:Src/main.c **** /* Peripheral clock enable */ -1628:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); +1618:Src/main.c **** } +1619:Src/main.c **** +1620:Src/main.c **** /** +1621:Src/main.c **** * @brief TIM10 Initialization Function +1622:Src/main.c **** * @param None +1623:Src/main.c **** * @retval None +1624:Src/main.c **** */ +1625:Src/main.c **** static void MX_TIM10_Init(void) +1626:Src/main.c **** { +1627:Src/main.c **** +1628:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ 1629:Src/main.c **** -1630:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1631:Src/main.c **** /**USART1 GPIO Configuration -1632:Src/main.c **** PA9 ------> USART1_TX -1633:Src/main.c **** PA10 ------> USART1_RX -1634:Src/main.c **** */ -1635:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; -1636:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1637:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1638:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1639:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1640:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -1641:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1642:Src/main.c **** -1643:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; -1644:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1645:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1646:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1647:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1648:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -1649:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1630:Src/main.c **** /* USER CODE END TIM10_Init 0 */ +1631:Src/main.c **** +1632:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ +1633:Src/main.c **** +1634:Src/main.c **** /* USER CODE END TIM10_Init 1 */ +1635:Src/main.c **** htim10.Instance = TIM10; +1636:Src/main.c **** htim10.Init.Prescaler = 183; +1637:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; +1638:Src/main.c **** htim10.Init.Period = 9; +1639:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1640:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1641:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) +1642:Src/main.c **** { +1643:Src/main.c **** Error_Handler(); +1644:Src/main.c **** } +1645:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ +1646:Src/main.c **** +1647:Src/main.c **** /* USER CODE END TIM10_Init 2 */ +1648:Src/main.c **** +1649:Src/main.c **** } 1650:Src/main.c **** -1651:Src/main.c **** /* USART1 DMA Init */ -1652:Src/main.c **** -1653:Src/main.c **** /* USART1_TX Init */ - ARM GAS /tmp/ccO46DoU.s page 69 +1651:Src/main.c **** /** +1652:Src/main.c **** * @brief TIM11 Initialization Function +1653:Src/main.c **** * @param None + ARM GAS /tmp/ccYgfTud.s page 69 -1654:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); -1655:Src/main.c **** -1656:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); -1657:Src/main.c **** -1658:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); -1659:Src/main.c **** -1660:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); -1661:Src/main.c **** -1662:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); -1663:Src/main.c **** -1664:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); -1665:Src/main.c **** -1666:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); -1667:Src/main.c **** -1668:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); -1669:Src/main.c **** -1670:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); -1671:Src/main.c **** -1672:Src/main.c **** /* USART1 interrupt Init */ -1673:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1674:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); -1675:Src/main.c **** -1676:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ -1677:Src/main.c **** -1678:Src/main.c **** /* USER CODE END USART1_Init 1 */ -1679:Src/main.c **** USART_InitStruct.BaudRate = 115200; -1680:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; -1681:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; -1682:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; -1683:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; -1684:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; -1685:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; -1686:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); -1687:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); -1688:Src/main.c **** LL_USART_Enable(USART1); -1689:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ -1690:Src/main.c **** -1691:Src/main.c **** /* USER CODE END USART1_Init 2 */ -1692:Src/main.c **** -1693:Src/main.c **** } +1654:Src/main.c **** * @retval None +1655:Src/main.c **** */ +1656:Src/main.c **** static void MX_TIM11_Init(void) +1657:Src/main.c **** { +1658:Src/main.c **** +1659:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ +1660:Src/main.c **** +1661:Src/main.c **** /* USER CODE END TIM11_Init 0 */ +1662:Src/main.c **** +1663:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1664:Src/main.c **** +1665:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ +1666:Src/main.c **** +1667:Src/main.c **** /* USER CODE END TIM11_Init 1 */ +1668:Src/main.c **** htim11.Instance = TIM11; +1669:Src/main.c **** htim11.Init.Prescaler = 1; +1670:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; +1671:Src/main.c **** htim11.Init.Period = 91; +1672:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1673:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; +1674:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) +1675:Src/main.c **** { +1676:Src/main.c **** Error_Handler(); +1677:Src/main.c **** } +1678:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) +1679:Src/main.c **** { +1680:Src/main.c **** Error_Handler(); +1681:Src/main.c **** } +1682:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1683:Src/main.c **** sConfigOC.Pulse = 91; +1684:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1685:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1686:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) +1687:Src/main.c **** { +1688:Src/main.c **** Error_Handler(); +1689:Src/main.c **** } +1690:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ +1691:Src/main.c **** +1692:Src/main.c **** /* USER CODE END TIM11_Init 2 */ +1693:Src/main.c **** HAL_TIM_MspPostInit(&htim11); 1694:Src/main.c **** -1695:Src/main.c **** /** -1696:Src/main.c **** * Enable DMA controller clock -1697:Src/main.c **** */ -1698:Src/main.c **** static void MX_DMA_Init(void) -1699:Src/main.c **** { - 144 .loc 1 1699 1 is_stmt 1 view -0 +1695:Src/main.c **** } +1696:Src/main.c **** +1697:Src/main.c **** /** +1698:Src/main.c **** * @brief UART8 Initialization Function +1699:Src/main.c **** * @param None +1700:Src/main.c **** * @retval None +1701:Src/main.c **** */ +1702:Src/main.c **** static void MX_UART8_Init(void) +1703:Src/main.c **** { +1704:Src/main.c **** +1705:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ +1706:Src/main.c **** +1707:Src/main.c **** /* USER CODE END UART8_Init 0 */ +1708:Src/main.c **** +1709:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ +1710:Src/main.c **** + ARM GAS /tmp/ccYgfTud.s page 70 + + +1711:Src/main.c **** /* USER CODE END UART8_Init 1 */ +1712:Src/main.c **** huart8.Instance = UART8; +1713:Src/main.c **** huart8.Init.BaudRate = 115200; +1714:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; +1715:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; +1716:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; +1717:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; +1718:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; +1719:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; +1720:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; +1721:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; +1722:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) +1723:Src/main.c **** { +1724:Src/main.c **** Error_Handler(); +1725:Src/main.c **** } +1726:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ +1727:Src/main.c **** +1728:Src/main.c **** /* USER CODE END UART8_Init 2 */ +1729:Src/main.c **** +1730:Src/main.c **** } +1731:Src/main.c **** +1732:Src/main.c **** /** +1733:Src/main.c **** * @brief USART1 Initialization Function +1734:Src/main.c **** * @param None +1735:Src/main.c **** * @retval None +1736:Src/main.c **** */ +1737:Src/main.c **** static void MX_USART1_UART_Init(void) +1738:Src/main.c **** { +1739:Src/main.c **** +1740:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ +1741:Src/main.c **** +1742:Src/main.c **** /* USER CODE END USART1_Init 0 */ +1743:Src/main.c **** +1744:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; +1745:Src/main.c **** +1746:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1747:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; +1748:Src/main.c **** +1749:Src/main.c **** /** Initializes the peripherals clock +1750:Src/main.c **** */ +1751:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; +1752:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; +1753:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) +1754:Src/main.c **** { +1755:Src/main.c **** Error_Handler(); +1756:Src/main.c **** } +1757:Src/main.c **** +1758:Src/main.c **** /* Peripheral clock enable */ +1759:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); +1760:Src/main.c **** +1761:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +1762:Src/main.c **** /**USART1 GPIO Configuration +1763:Src/main.c **** PA9 ------> USART1_TX +1764:Src/main.c **** PA10 ------> USART1_RX +1765:Src/main.c **** */ +1766:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; +1767:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + ARM GAS /tmp/ccYgfTud.s page 71 + + +1768:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1769:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1770:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1771:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +1772:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1773:Src/main.c **** +1774:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; +1775:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1776:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1777:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1778:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1779:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +1780:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1781:Src/main.c **** +1782:Src/main.c **** /* USART1 DMA Init */ +1783:Src/main.c **** +1784:Src/main.c **** /* USART1_TX Init */ +1785:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); +1786:Src/main.c **** +1787:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); +1788:Src/main.c **** +1789:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); +1790:Src/main.c **** +1791:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); +1792:Src/main.c **** +1793:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); +1794:Src/main.c **** +1795:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); +1796:Src/main.c **** +1797:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); +1798:Src/main.c **** +1799:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); +1800:Src/main.c **** +1801:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); +1802:Src/main.c **** +1803:Src/main.c **** /* USART1 interrupt Init */ +1804:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1805:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); +1806:Src/main.c **** +1807:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ +1808:Src/main.c **** +1809:Src/main.c **** /* USER CODE END USART1_Init 1 */ +1810:Src/main.c **** USART_InitStruct.BaudRate = 115200; +1811:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; +1812:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; +1813:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; +1814:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; +1815:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; +1816:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; +1817:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); +1818:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); +1819:Src/main.c **** LL_USART_Enable(USART1); +1820:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ +1821:Src/main.c **** +1822:Src/main.c **** /* USER CODE END USART1_Init 2 */ +1823:Src/main.c **** +1824:Src/main.c **** } + ARM GAS /tmp/ccYgfTud.s page 72 + + +1825:Src/main.c **** +1826:Src/main.c **** /** +1827:Src/main.c **** * Enable DMA controller clock +1828:Src/main.c **** */ +1829:Src/main.c **** static void MX_DMA_Init(void) +1830:Src/main.c **** { + 144 .loc 1 1830 1 is_stmt 1 view -0 145 .cfi_startproc 146 @ args = 0, pretend = 0, frame = 8 147 @ frame_needed = 0, uses_anonymous_args = 0 @@ -4138,17 +4278,14 @@ ARM GAS /tmp/ccO46DoU.s page 1 152 0002 83B0 sub sp, sp, #12 153 .LCFI2: 154 .cfi_def_cfa_offset 16 - ARM GAS /tmp/ccO46DoU.s page 70 - - -1700:Src/main.c **** -1701:Src/main.c **** /* Init with LL driver */ -1702:Src/main.c **** /* DMA controller clock enable */ -1703:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); - 155 .loc 1 1703 3 view .LVU37 +1831:Src/main.c **** +1832:Src/main.c **** /* Init with LL driver */ +1833:Src/main.c **** /* DMA controller clock enable */ +1834:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); + 155 .loc 1 1834 3 view .LVU37 156 .LVL8: - 157 .LBB294: - 158 .LBI294: + 157 .LBB329: + 158 .LBI329: 159 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ****************************************************************************** @@ -4181,6 +4318,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * This software is licensed under terms that can be found in the LICENSE file in 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * the root directory of this software component. 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * If no LICENSE file comes with this software, it is provided AS-IS. + ARM GAS /tmp/ccYgfTud.s page 73 + + 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ****************************************************************************** 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -4198,9 +4338,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @addtogroup STM32F7xx_LL_Driver 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ - ARM GAS /tmp/ccO46DoU.s page 71 - - 49:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(RCC) 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -4241,6 +4378,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_BKPSRAM RCC_AHB1ENR_BKPSRAMEN 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DTCMRAM RCC_AHB1ENR_DTCMRAMEN 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHB1ENR_DMA1EN + ARM GAS /tmp/ccYgfTud.s page 74 + + 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHB1ENR_DMA2EN 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(DMA2D) 91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA2D RCC_AHB1ENR_DMA2DEN @@ -4258,9 +4398,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM2 RCC_AHB1LPENR_SRAM2LPEN 105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** - ARM GAS /tmp/ccO46DoU.s page 72 - - 106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @} 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -4301,6 +4438,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH APB1 GRP1 PERIPH 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ + ARM GAS /tmp/ccYgfTud.s page 75 + + 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_ALL 0xFFFFFFFFU 148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN @@ -4318,9 +4458,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPDIFRX) 162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPDIFRX RCC_APB1ENR_SPDIFRXEN - ARM GAS /tmp/ccO46DoU.s page 73 - - 163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* SPDIFRX */ 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART2 RCC_APB1ENR_USART2EN 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART3 RCC_APB1ENR_USART3EN @@ -4361,6 +4498,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_USART6 RCC_APB2ENR_USART6EN + ARM GAS /tmp/ccYgfTud.s page 76 + + 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC1 RCC_APB2ENR_ADC1EN 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC2 RCC_APB2ENR_ADC2EN 205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC3 RCC_APB2ENR_ADC3EN @@ -4378,9 +4518,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPI6) 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI6 RCC_APB2ENR_SPI6EN 219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* SPI6 */ - ARM GAS /tmp/ccO46DoU.s page 74 - - 220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(LTDC) @@ -4421,6 +4558,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB1 peripherals clock. 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_EnableClock\n 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_EnableClock\n + ARM GAS /tmp/ccYgfTud.s page 77 + + 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOCEN LL_AHB1_GRP1_EnableClock\n 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIODEN LL_AHB1_GRP1_EnableClock\n 262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOEEN LL_AHB1_GRP1_EnableClock\n @@ -4438,9 +4578,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_EnableClock\n 276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_EnableClock\n - ARM GAS /tmp/ccO46DoU.s page 75 - - 277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_EnableClock\n 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_EnableClock\n 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSEN LL_AHB1_GRP1_EnableClock\n @@ -4475,12 +4612,15 @@ ARM GAS /tmp/ccO46DoU.s page 1 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) 160 .loc 3 309 22 view .LVU38 - 161 .LBB295: + 161 .LBB330: 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; 162 .loc 3 311 3 view .LVU39 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); 163 .loc 3 312 3 view .LVU40 + ARM GAS /tmp/ccYgfTud.s page 78 + + 164 0004 0D4B ldr r3, .L10 165 0006 1A6B ldr r2, [r3, #48] 166 0008 42F48002 orr r2, r2, #4194304 @@ -4498,40 +4638,37 @@ ARM GAS /tmp/ccO46DoU.s page 1 175 0016 019B ldr r3, [sp, #4] 176 .LVL9: 177 .loc 3 315 3 is_stmt 0 view .LVU45 - ARM GAS /tmp/ccO46DoU.s page 76 - - - 178 .LBE295: - 179 .LBE294: -1704:Src/main.c **** -1705:Src/main.c **** /* DMA interrupt init */ -1706:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ -1707:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); - 180 .loc 1 1707 3 is_stmt 1 view .LVU46 - 181 .LBB296: - 182 .LBI296: + 178 .LBE330: + 179 .LBE329: +1835:Src/main.c **** +1836:Src/main.c **** /* DMA interrupt init */ +1837:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ +1838:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + 180 .loc 1 1838 3 is_stmt 1 view .LVU46 + 181 .LBB331: + 182 .LBI331: 1884:Drivers/CMSIS/Include/core_cm7.h **** { 183 .loc 2 1884 26 view .LVU47 - 184 .LBB297: + 184 .LBB332: 1886:Drivers/CMSIS/Include/core_cm7.h **** } 185 .loc 2 1886 3 view .LVU48 1886:Drivers/CMSIS/Include/core_cm7.h **** } 186 .loc 2 1886 26 is_stmt 0 view .LVU49 187 0018 094B ldr r3, .L10+4 188 001a D868 ldr r0, [r3, #12] - 189 .LBE297: - 190 .LBE296: - 191 .loc 1 1707 3 discriminator 1 view .LVU50 + 189 .LBE332: + 190 .LBE331: + 191 .loc 1 1838 3 discriminator 1 view .LVU50 192 001c 0022 movs r2, #0 193 001e 1146 mov r1, r2 194 0020 C0F30220 ubfx r0, r0, #8, #3 195 0024 FFF7FEFF bl NVIC_EncodePriority 196 .LVL10: - 197 .LBB298: - 198 .LBI298: + 197 .LBB333: + 198 .LBI333: 2024:Drivers/CMSIS/Include/core_cm7.h **** { 199 .loc 2 2024 22 is_stmt 1 view .LVU51 - 200 .LBB299: + 200 .LBB334: 2026:Drivers/CMSIS/Include/core_cm7.h **** { 201 .loc 2 2026 3 view .LVU52 2028:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4541,6 +4678,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 204 0028 0001 lsls r0, r0, #4 205 .LVL11: 2028:Drivers/CMSIS/Include/core_cm7.h **** } + ARM GAS /tmp/ccYgfTud.s page 79 + + 206 .loc 2 2028 49 view .LVU55 207 002a C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4550,18 +4690,15 @@ ARM GAS /tmp/ccO46DoU.s page 1 211 .LVL12: 2028:Drivers/CMSIS/Include/core_cm7.h **** } 212 .loc 2 2028 47 view .LVU57 - 213 .LBE299: - 214 .LBE298: -1708:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 215 .loc 1 1708 3 is_stmt 1 view .LVU58 - 216 .LBB300: - 217 .LBI300: + 213 .LBE334: + 214 .LBE333: +1839:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 215 .loc 1 1839 3 is_stmt 1 view .LVU58 + 216 .LBB335: + 217 .LBI335: 1896:Drivers/CMSIS/Include/core_cm7.h **** { 218 .loc 2 1896 22 view .LVU59 - ARM GAS /tmp/ccO46DoU.s page 77 - - - 219 .LBB301: + 219 .LBB336: 1898:Drivers/CMSIS/Include/core_cm7.h **** { 220 .loc 2 1898 3 view .LVU60 1900:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4573,11 +4710,11 @@ ARM GAS /tmp/ccO46DoU.s page 1 225 .LVL13: 1900:Drivers/CMSIS/Include/core_cm7.h **** } 226 .loc 2 1900 43 view .LVU63 - 227 .LBE301: - 228 .LBE300: -1709:Src/main.c **** -1710:Src/main.c **** } - 229 .loc 1 1710 1 view .LVU64 + 227 .LBE336: + 228 .LBE335: +1840:Src/main.c **** +1841:Src/main.c **** } + 229 .loc 1 1841 1 view .LVU64 230 0036 03B0 add sp, sp, #12 231 .LCFI3: 232 .cfi_def_cfa_offset 4 @@ -4599,812 +4736,816 @@ ARM GAS /tmp/ccO46DoU.s page 1 250 Decode_task: 251 .LVL14: 252 .LFB1209: -1711:Src/main.c **** -1712:Src/main.c **** /** -1713:Src/main.c **** * @brief GPIO Initialization Function -1714:Src/main.c **** * @param None -1715:Src/main.c **** * @retval None -1716:Src/main.c **** */ -1717:Src/main.c **** static void MX_GPIO_Init(void) -1718:Src/main.c **** { -1719:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; -1720:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ -1721:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ -1722:Src/main.c **** -1723:Src/main.c **** /* GPIO Ports Clock Enable */ -1724:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); -1725:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); -1726:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); -1727:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); -1728:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); -1729:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); - ARM GAS /tmp/ccO46DoU.s page 78 - - -1730:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); -1731:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); -1732:Src/main.c **** -1733:Src/main.c **** /*Configure GPIO pin Output Level */ -1734:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -1735:Src/main.c **** -1736:Src/main.c **** /*Configure GPIO pin Output Level */ -1737:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); -1738:Src/main.c **** -1739:Src/main.c **** /*Configure GPIO pin Output Level */ -1740:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); -1741:Src/main.c **** -1742:Src/main.c **** /*Configure GPIO pin Output Level */ -1743:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); -1744:Src/main.c **** -1745:Src/main.c **** /*Configure GPIO pin Output Level */ -1746:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -1747:Src/main.c **** -1748:Src/main.c **** /*Configure GPIO pin Output Level */ -1749:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); -1750:Src/main.c **** -1751:Src/main.c **** /*Configure GPIO pin Output Level */ -1752:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|DAC_LD1_CS_Pin|OUT_6_Pin -1753:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); -1754:Src/main.c **** -1755:Src/main.c **** /*Configure GPIO pin Output Level */ -1756:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -1757:Src/main.c **** -1758:Src/main.c **** /*Configure GPIO pin Output Level */ -1759:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); -1760:Src/main.c **** -1761:Src/main.c **** /*Configure GPIO pin Output Level */ -1762:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -1763:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); -1764:Src/main.c **** -1765:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ -1766:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; -1767:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1768:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; -1769:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1770:Src/main.c **** -1771:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ -1772:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; -1773:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1774:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1775:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1776:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1777:Src/main.c **** -1778:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin */ -1779:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin; -1780:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1781:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1782:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1783:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); -1784:Src/main.c **** -1785:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */ -1786:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin; - ARM GAS /tmp/ccO46DoU.s page 79 - - -1787:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1788:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1789:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -1790:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); -1791:Src/main.c **** -1792:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin -1793:Src/main.c **** DAC_LD2_CS_Pin */ -1794:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin -1795:Src/main.c **** |DAC_LD2_CS_Pin; -1796:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1797:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1798:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1799:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1800:Src/main.c **** -1801:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */ -1802:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin; -1803:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1804:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1805:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1806:Src/main.c **** -1807:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */ -1808:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin; -1809:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1810:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1811:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1812:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1813:Src/main.c **** -1814:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */ -1815:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin; -1816:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1817:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1818:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -1819:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); -1820:Src/main.c **** -1821:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin DAC_LD1_CS_Pin -1822:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ -1823:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin|DAC_LD1_CS_Pin -1824:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; -1825:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1826:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1827:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1828:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1829:Src/main.c **** -1830:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 */ -1831:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7; -1832:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1833:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1834:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1835:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); -1836:Src/main.c **** -1837:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */ -1838:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin; -1839:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1840:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1841:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); 1842:Src/main.c **** -1843:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */ - ARM GAS /tmp/ccO46DoU.s page 80 +1843:Src/main.c **** /** + ARM GAS /tmp/ccYgfTud.s page 80 -1844:Src/main.c **** GPIO_InitStruct.Pin = SDMMC1_EN_Pin; -1845:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1846:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1847:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct); -1848:Src/main.c **** -1849:Src/main.c **** /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin -1850:Src/main.c **** OUT_3_Pin OUT_4_Pin OUT_5_Pin */ -1851:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -1852:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin; -1853:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1854:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1855:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1856:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); -1857:Src/main.c **** -1858:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ -1859:Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ -1860:Src/main.c **** } -1861:Src/main.c **** -1862:Src/main.c **** /* USER CODE BEGIN 4 */ +1844:Src/main.c **** * @brief GPIO Initialization Function +1845:Src/main.c **** * @param None +1846:Src/main.c **** * @retval None +1847:Src/main.c **** */ +1848:Src/main.c **** static void MX_GPIO_Init(void) +1849:Src/main.c **** { +1850:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; +1851:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ +1852:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ +1853:Src/main.c **** +1854:Src/main.c **** /* GPIO Ports Clock Enable */ +1855:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); +1856:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); +1857:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); +1858:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); +1859:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); +1860:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); +1861:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); +1862:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); 1863:Src/main.c **** -1864:Src/main.c **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { -1865:Src/main.c **** -1866:Src/main.c **** // UART_transmission_request = NO_MESS; -1867:Src/main.c **** -1868:Src/main.c **** //} -1869:Src/main.c **** -1870:Src/main.c **** static void Init_params(void) -1871:Src/main.c **** { -1872:Src/main.c **** TO6 = 0; -1873:Src/main.c **** TO7 = 0; -1874:Src/main.c **** TO7_before = 0; -1875:Src/main.c **** TO6_before = 0; -1876:Src/main.c **** TO6_uart = 0; -1877:Src/main.c **** flg_tmt = 0; -1878:Src/main.c **** UART_rec_incr = 0; -1879:Src/main.c **** fgoto = 0; -1880:Src/main.c **** sizeoffile = 0; -1881:Src/main.c **** u_tx_flg = 0; -1882:Src/main.c **** u_rx_flg = 0; -1883:Src/main.c **** //State_Data[0]=0; -1884:Src/main.c **** //State_Data[1]=0;//All OK! -1885:Src/main.c **** for (uint16_t i=0; iWORK_EN = ((uint8_t)((*temp2)>>0))&0x01; -2037:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; -2038:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; -2039:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; -2040:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; -2041:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; -2042:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; -2043:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; -2044:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; -2045:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; -2046:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; -2047:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; -2048:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; -2049:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; -2050:Src/main.c **** -2051:Src/main.c **** temp2++; -2052:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); -2053:Src/main.c **** temp2++; -2054:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); -2055:Src/main.c **** temp2++; -2056:Src/main.c **** temp2++; -2057:Src/main.c **** temp2++; -2058:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); -2059:Src/main.c **** temp2++; -2060:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2061:Src/main.c **** temp2++; -2062:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2063:Src/main.c **** temp2++; -2064:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2065:Src/main.c **** temp2++; -2066:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2067:Src/main.c **** temp2++; -2068:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID -2069:Src/main.c **** temp2++; -2070:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); -2071:Src/main.c **** temp2++; - ARM GAS /tmp/ccO46DoU.s page 84 +2015:Src/main.c **** u_rx_flg = 0; +2016:Src/main.c **** //State_Data[0]=0; +2017:Src/main.c **** //State_Data[1]=0;//All OK! +2018:Src/main.c **** for (uint16_t i=0; iCURRENT = (uint16_t)(*temp2); -2073:Src/main.c **** temp2++; -2074:Src/main.c **** -2075:Src/main.c **** if (Curr_setup->U5V1_EN) -2076:Src/main.c **** { -2077:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); -2078:Src/main.c **** } -2079:Src/main.c **** else -2080:Src/main.c **** { -2081:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); -2082:Src/main.c **** } -2083:Src/main.c **** -2084:Src/main.c **** if (Curr_setup->U5V2_EN) -2085:Src/main.c **** { -2086:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); -2087:Src/main.c **** } -2088:Src/main.c **** else -2089:Src/main.c **** { -2090:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); -2091:Src/main.c **** } -2092:Src/main.c **** -2093:Src/main.c **** if (Curr_setup->LD1_EN) -2094:Src/main.c **** { -2095:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); -2096:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC -2097:Src/main.c **** } -2098:Src/main.c **** else -2099:Src/main.c **** { -2100:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); -2101:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC -2102:Src/main.c **** } -2103:Src/main.c **** -2104:Src/main.c **** if (Curr_setup->LD2_EN) -2105:Src/main.c **** { -2106:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); -2107:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC -2108:Src/main.c **** } -2109:Src/main.c **** else -2110:Src/main.c **** { -2111:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); -2112:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC -2113:Src/main.c **** } -2114:Src/main.c **** -2115:Src/main.c **** if (Curr_setup->REF1_EN) -2116:Src/main.c **** { -2117:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); -2118:Src/main.c **** } -2119:Src/main.c **** else -2120:Src/main.c **** { -2121:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); -2122:Src/main.c **** } -2123:Src/main.c **** -2124:Src/main.c **** if (Curr_setup->REF2_EN) -2125:Src/main.c **** { -2126:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); -2127:Src/main.c **** } -2128:Src/main.c **** else - ARM GAS /tmp/ccO46DoU.s page 85 +2072:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); +2073:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); +2074:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); +2075:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART +2076:Src/main.c **** +2077:Src/main.c **** //HAL_UART_Receive_IT(&huart1, &uart_buf, 1); +2078:Src/main.c **** +2079:Src/main.c **** +2080:Src/main.c **** SD_SEEK = 0; +2081:Src/main.c **** SD_SLIDE = 0; +2082:Src/main.c **** //Reset all periphery +2083:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); +2084:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); +2085:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); +2086:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); +2087:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); +2088:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); +2089:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); +2090:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); +2091:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); +2092:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); +2093:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) +2094:Src/main.c **** // { +2095:Src/main.c **** // for (uint16_t j = 0; j < DL_16; j++) +2096:Src/main.c **** // { +2097:Src/main.c **** // SD_matr[i][j] = 0; +2098:Src/main.c **** // } +2099:Src/main.c **** // } +2100:Src/main.c **** //LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC +2101:Src/main.c **** //LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC +2102:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD1 ADC +2103:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC +2104:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +2105:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +2106:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 +2107:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 +2108:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 +2109:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 +2110:Src/main.c **** +2111:Src/main.c **** //------------------------------------------------------------------------------------------------ +2112:Src/main.c **** //test = 11; +2113:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)//if exist sd && disconne +2114:Src/main.c **** { +2115:Src/main.c **** //test = 14; +2116:Src/main.c **** if (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_RESET) +2117:Src/main.c **** { +2118:Src/main.c **** //test = 15; +2119:Src/main.c **** test = Mount_SD("/"); +2120:Src/main.c **** if (test == 0) //0 - suc +2121:Src/main.c **** { +2122:Src/main.c **** //Format_SD(); +2123:Src/main.c **** test = Seek_Read_File ("COMMAND.TXT", (uint8_t *)COMMAND, DL_8, DL_8);//Read next DL_8 bytes +2124:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2125:Src/main.c **** UART_rec_incr = 0; +2126:Src/main.c **** flg_tmt = 0;//Reset the timeout flag +2127:Src/main.c **** } +2128:Src/main.c **** // else + ARM GAS /tmp/ccYgfTud.s page 85 -2129:Src/main.c **** { -2130:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); -2131:Src/main.c **** } -2132:Src/main.c **** -2133:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) -2134:Src/main.c **** { -2135:Src/main.c **** Set_LTEC(3,32767); -2136:Src/main.c **** Set_LTEC(3,32767); -2137:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); -2138:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); -2139:Src/main.c **** } -2140:Src/main.c **** else -2141:Src/main.c **** { -2142:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); -2143:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); -2144:Src/main.c **** } -2145:Src/main.c **** -2146:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) -2147:Src/main.c **** { -2148:Src/main.c **** Set_LTEC(4,32767); -2149:Src/main.c **** Set_LTEC(4,32767); -2150:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); -2151:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); -2152:Src/main.c **** } -2153:Src/main.c **** else -2154:Src/main.c **** { -2155:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); -2156:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); -2157:Src/main.c **** } -2158:Src/main.c **** -2159:Src/main.c **** if (Curr_setup->PI1_RD==0) -2160:Src/main.c **** { -2161:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; -2162:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; -2163:Src/main.c **** } -2164:Src/main.c **** -2165:Src/main.c **** if (Curr_setup->PI2_RD==0) -2166:Src/main.c **** { -2167:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; -2168:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; -2169:Src/main.c **** } -2170:Src/main.c **** } -2171:Src/main.c **** -2172:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ -2173:Src/main.c **** { - 253 .loc 1 2173 1 is_stmt 1 view -0 +2129:Src/main.c **** // { +2130:Src/main.c **** // test = 13; +2131:Src/main.c **** // } +2132:Src/main.c **** CPU_state = DECODE_ENABLE;//Decoding data with last saved settings +2133:Src/main.c **** } +2134:Src/main.c **** // else +2135:Src/main.c **** // { +2136:Src/main.c **** // test = 16; +2137:Src/main.c **** // } +2138:Src/main.c **** } +2139:Src/main.c **** // else +2140:Src/main.c **** // { +2141:Src/main.c **** // test = 12; +2142:Src/main.c **** // } +2143:Src/main.c **** +2144:Src/main.c **** AD9102_Init(); +2145:Src/main.c **** } +2146:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ +2147:Src/main.c **** { +2148:Src/main.c **** // uint8_t *temp1; +2149:Src/main.c **** uint16_t *temp2; +2150:Src/main.c **** +2151:Src/main.c **** //------------------------------------------------------------------------------------------------ +2152:Src/main.c **** +2153:Src/main.c **** +2154:Src/main.c **** test=0; +2155:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& +2156:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u +2157:Src/main.c **** { +2158:Src/main.c **** test = Mount_SD("/"); +2159:Src/main.c **** if (test == 0) //0 - suc +2160:Src/main.c **** { +2161:Src/main.c **** //Format_SD(); +2162:Src/main.c **** test = Remove_File ("COMMAND.TXT"); +2163:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ +2164:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); +2165:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); +2166:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2167:Src/main.c **** } +2168:Src/main.c **** } +2169:Src/main.c **** +2170:Src/main.c **** temp2 = (uint16_t *)Command; +2171:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; +2172:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; +2173:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; +2174:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; +2175:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; +2176:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; +2177:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; +2178:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; +2179:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; +2180:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; +2181:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; +2182:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; +2183:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; +2184:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; +2185:Src/main.c **** + ARM GAS /tmp/ccYgfTud.s page 86 + + +2186:Src/main.c **** temp2++; +2187:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); +2188:Src/main.c **** temp2++; +2189:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); +2190:Src/main.c **** temp2++; +2191:Src/main.c **** temp2++; +2192:Src/main.c **** temp2++; +2193:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); +2194:Src/main.c **** temp2++; +2195:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2196:Src/main.c **** temp2++; +2197:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2198:Src/main.c **** temp2++; +2199:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2200:Src/main.c **** temp2++; +2201:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2202:Src/main.c **** temp2++; +2203:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID +2204:Src/main.c **** temp2++; +2205:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); +2206:Src/main.c **** temp2++; +2207:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); +2208:Src/main.c **** temp2++; +2209:Src/main.c **** +2210:Src/main.c **** if (Curr_setup->U5V1_EN) +2211:Src/main.c **** { +2212:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); +2213:Src/main.c **** } +2214:Src/main.c **** else +2215:Src/main.c **** { +2216:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); +2217:Src/main.c **** } +2218:Src/main.c **** +2219:Src/main.c **** if (Curr_setup->U5V2_EN) +2220:Src/main.c **** { +2221:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); +2222:Src/main.c **** } +2223:Src/main.c **** else +2224:Src/main.c **** { +2225:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); +2226:Src/main.c **** } +2227:Src/main.c **** +2228:Src/main.c **** if (Curr_setup->LD1_EN) +2229:Src/main.c **** { +2230:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); +2231:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC +2232:Src/main.c **** } +2233:Src/main.c **** else +2234:Src/main.c **** { +2235:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); +2236:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC +2237:Src/main.c **** } +2238:Src/main.c **** +2239:Src/main.c **** if (Curr_setup->LD2_EN) +2240:Src/main.c **** { +2241:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); +2242:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC + ARM GAS /tmp/ccYgfTud.s page 87 + + +2243:Src/main.c **** } +2244:Src/main.c **** else +2245:Src/main.c **** { +2246:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); +2247:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC +2248:Src/main.c **** } +2249:Src/main.c **** +2250:Src/main.c **** if (Curr_setup->REF1_EN) +2251:Src/main.c **** { +2252:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); +2253:Src/main.c **** } +2254:Src/main.c **** else +2255:Src/main.c **** { +2256:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); +2257:Src/main.c **** } +2258:Src/main.c **** +2259:Src/main.c **** if (Curr_setup->REF2_EN) +2260:Src/main.c **** { +2261:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); +2262:Src/main.c **** } +2263:Src/main.c **** else +2264:Src/main.c **** { +2265:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); +2266:Src/main.c **** } +2267:Src/main.c **** +2268:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) +2269:Src/main.c **** { +2270:Src/main.c **** Set_LTEC(3,32767); +2271:Src/main.c **** Set_LTEC(3,32767); +2272:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); +2273:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); +2274:Src/main.c **** } +2275:Src/main.c **** else +2276:Src/main.c **** { +2277:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); +2278:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); +2279:Src/main.c **** } +2280:Src/main.c **** +2281:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) +2282:Src/main.c **** { +2283:Src/main.c **** Set_LTEC(4,32767); +2284:Src/main.c **** Set_LTEC(4,32767); +2285:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); +2286:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); +2287:Src/main.c **** } +2288:Src/main.c **** else +2289:Src/main.c **** { +2290:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); +2291:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); +2292:Src/main.c **** } +2293:Src/main.c **** +2294:Src/main.c **** if (Curr_setup->PI1_RD==0) +2295:Src/main.c **** { +2296:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; +2297:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; +2298:Src/main.c **** } +2299:Src/main.c **** + ARM GAS /tmp/ccYgfTud.s page 88 + + +2300:Src/main.c **** if (Curr_setup->PI2_RD==0) +2301:Src/main.c **** { +2302:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; +2303:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; +2304:Src/main.c **** } +2305:Src/main.c **** } +2306:Src/main.c **** +2307:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ +2308:Src/main.c **** { + 253 .loc 1 2308 1 is_stmt 1 view -0 254 .cfi_startproc 255 @ args = 0, pretend = 0, frame = 8 256 @ frame_needed = 0, uses_anonymous_args = 0 257 @ link register save eliminated. - 258 .loc 1 2173 1 is_stmt 0 view .LVU66 + 258 .loc 1 2308 1 is_stmt 0 view .LVU66 259 0000 82B0 sub sp, sp, #8 260 .LCFI4: 261 .cfi_def_cfa_offset 8 -2174:Src/main.c **** uint16_t *temp2; - 262 .loc 1 2174 2 is_stmt 1 view .LVU67 -2175:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 86 - - -2176:Src/main.c **** temp2 = (uint16_t *)Command; - 263 .loc 1 2176 2 view .LVU68 +2309:Src/main.c **** uint16_t *temp2; + 262 .loc 1 2309 2 is_stmt 1 view .LVU67 +2310:Src/main.c **** +2311:Src/main.c **** temp2 = (uint16_t *)Command; + 263 .loc 1 2311 2 view .LVU68 264 .LVL15: -2177:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 265 .loc 1 2177 2 view .LVU69 - 266 .loc 1 2177 36 is_stmt 0 view .LVU70 +2312:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 265 .loc 1 2312 2 view .LVU69 + 266 .loc 1 2312 36 is_stmt 0 view .LVU70 267 0002 0288 ldrh r2, [r0] 268 .LVL16: - 269 .loc 1 2177 48 view .LVU71 + 269 .loc 1 2312 48 view .LVU71 270 0004 02F00102 and r2, r2, #1 - 271 .loc 1 2177 22 view .LVU72 + 271 .loc 1 2312 22 view .LVU72 272 0008 1A70 strb r2, [r3] -2178:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 273 .loc 1 2178 2 is_stmt 1 view .LVU73 - 274 .loc 1 2178 36 is_stmt 0 view .LVU74 +2313:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 273 .loc 1 2313 2 is_stmt 1 view .LVU73 + 274 .loc 1 2313 36 is_stmt 0 view .LVU74 275 000a 0288 ldrh r2, [r0] - 276 .loc 1 2178 48 view .LVU75 + 276 .loc 1 2313 48 view .LVU75 277 000c C2F34002 ubfx r2, r2, #1, #1 - 278 .loc 1 2178 22 view .LVU76 + 278 .loc 1 2313 22 view .LVU76 279 0010 5A70 strb r2, [r3, #1] -2179:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 280 .loc 1 2179 2 is_stmt 1 view .LVU77 - 281 .loc 1 2179 36 is_stmt 0 view .LVU78 +2314:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 280 .loc 1 2314 2 is_stmt 1 view .LVU77 + 281 .loc 1 2314 36 is_stmt 0 view .LVU78 282 0012 0288 ldrh r2, [r0] - 283 .loc 1 2179 48 view .LVU79 + 283 .loc 1 2314 48 view .LVU79 284 0014 C2F38002 ubfx r2, r2, #2, #1 - 285 .loc 1 2179 22 view .LVU80 + 285 .loc 1 2314 22 view .LVU80 286 0018 9A70 strb r2, [r3, #2] -2180:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 287 .loc 1 2180 2 is_stmt 1 view .LVU81 - 288 .loc 1 2180 35 is_stmt 0 view .LVU82 +2315:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 287 .loc 1 2315 2 is_stmt 1 view .LVU81 + 288 .loc 1 2315 35 is_stmt 0 view .LVU82 289 001a 0288 ldrh r2, [r0] - 290 .loc 1 2180 47 view .LVU83 + 290 .loc 1 2315 47 view .LVU83 291 001c C2F3C002 ubfx r2, r2, #3, #1 - 292 .loc 1 2180 21 view .LVU84 + 292 .loc 1 2315 21 view .LVU84 293 0020 DA70 strb r2, [r3, #3] -2181:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 294 .loc 1 2181 2 is_stmt 1 view .LVU85 - 295 .loc 1 2181 35 is_stmt 0 view .LVU86 + ARM GAS /tmp/ccYgfTud.s page 89 + + +2316:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 294 .loc 1 2316 2 is_stmt 1 view .LVU85 + 295 .loc 1 2316 35 is_stmt 0 view .LVU86 296 0022 0288 ldrh r2, [r0] - 297 .loc 1 2181 47 view .LVU87 + 297 .loc 1 2316 47 view .LVU87 298 0024 C2F30012 ubfx r2, r2, #4, #1 - 299 .loc 1 2181 21 view .LVU88 + 299 .loc 1 2316 21 view .LVU88 300 0028 1A71 strb r2, [r3, #4] -2182:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 301 .loc 1 2182 2 is_stmt 1 view .LVU89 - 302 .loc 1 2182 36 is_stmt 0 view .LVU90 +2317:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 301 .loc 1 2317 2 is_stmt 1 view .LVU89 + 302 .loc 1 2317 36 is_stmt 0 view .LVU90 303 002a 0288 ldrh r2, [r0] - 304 .loc 1 2182 48 view .LVU91 + 304 .loc 1 2317 48 view .LVU91 305 002c C2F34012 ubfx r2, r2, #5, #1 - 306 .loc 1 2182 22 view .LVU92 + 306 .loc 1 2317 22 view .LVU92 307 0030 5A71 strb r2, [r3, #5] -2183:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 308 .loc 1 2183 2 is_stmt 1 view .LVU93 - 309 .loc 1 2183 36 is_stmt 0 view .LVU94 +2318:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 308 .loc 1 2318 2 is_stmt 1 view .LVU93 + 309 .loc 1 2318 36 is_stmt 0 view .LVU94 310 0032 0288 ldrh r2, [r0] - 311 .loc 1 2183 48 view .LVU95 - ARM GAS /tmp/ccO46DoU.s page 87 - - + 311 .loc 1 2318 48 view .LVU95 312 0034 C2F38012 ubfx r2, r2, #6, #1 - 313 .loc 1 2183 22 view .LVU96 + 313 .loc 1 2318 22 view .LVU96 314 0038 9A71 strb r2, [r3, #6] -2184:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 315 .loc 1 2184 2 is_stmt 1 view .LVU97 - 316 .loc 1 2184 36 is_stmt 0 view .LVU98 +2319:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 315 .loc 1 2319 2 is_stmt 1 view .LVU97 + 316 .loc 1 2319 36 is_stmt 0 view .LVU98 317 003a 0288 ldrh r2, [r0] - 318 .loc 1 2184 48 view .LVU99 + 318 .loc 1 2319 48 view .LVU99 319 003c C2F3C012 ubfx r2, r2, #7, #1 - 320 .loc 1 2184 22 view .LVU100 + 320 .loc 1 2319 22 view .LVU100 321 0040 DA71 strb r2, [r3, #7] -2185:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 322 .loc 1 2185 2 is_stmt 1 view .LVU101 - 323 .loc 1 2185 36 is_stmt 0 view .LVU102 +2320:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 322 .loc 1 2320 2 is_stmt 1 view .LVU101 + 323 .loc 1 2320 36 is_stmt 0 view .LVU102 324 0042 0288 ldrh r2, [r0] - 325 .loc 1 2185 48 view .LVU103 + 325 .loc 1 2320 48 view .LVU103 326 0044 C2F30022 ubfx r2, r2, #8, #1 - 327 .loc 1 2185 22 view .LVU104 + 327 .loc 1 2320 22 view .LVU104 328 0048 1A72 strb r2, [r3, #8] -2186:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 329 .loc 1 2186 2 is_stmt 1 view .LVU105 - 330 .loc 1 2186 35 is_stmt 0 view .LVU106 +2321:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 329 .loc 1 2321 2 is_stmt 1 view .LVU105 + 330 .loc 1 2321 35 is_stmt 0 view .LVU106 331 004a 0288 ldrh r2, [r0] - 332 .loc 1 2186 47 view .LVU107 + 332 .loc 1 2321 47 view .LVU107 333 004c C2F34022 ubfx r2, r2, #9, #1 - 334 .loc 1 2186 21 view .LVU108 + 334 .loc 1 2321 21 view .LVU108 335 0050 5A72 strb r2, [r3, #9] -2187:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 336 .loc 1 2187 2 is_stmt 1 view .LVU109 - 337 .loc 1 2187 35 is_stmt 0 view .LVU110 +2322:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 336 .loc 1 2322 2 is_stmt 1 view .LVU109 + 337 .loc 1 2322 35 is_stmt 0 view .LVU110 338 0052 0288 ldrh r2, [r0] - 339 .loc 1 2187 48 view .LVU111 + 339 .loc 1 2322 48 view .LVU111 340 0054 C2F38022 ubfx r2, r2, #10, #1 - 341 .loc 1 2187 21 view .LVU112 + 341 .loc 1 2322 21 view .LVU112 342 0058 9A72 strb r2, [r3, #10] -2188:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 343 .loc 1 2188 2 is_stmt 1 view .LVU113 - 344 .loc 1 2188 34 is_stmt 0 view .LVU114 +2323:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + ARM GAS /tmp/ccYgfTud.s page 90 + + + 343 .loc 1 2323 2 is_stmt 1 view .LVU113 + 344 .loc 1 2323 34 is_stmt 0 view .LVU114 345 005a 0288 ldrh r2, [r0] - 346 .loc 1 2188 47 view .LVU115 + 346 .loc 1 2323 47 view .LVU115 347 005c C2F3C022 ubfx r2, r2, #11, #1 - 348 .loc 1 2188 20 view .LVU116 + 348 .loc 1 2323 20 view .LVU116 349 0060 DA72 strb r2, [r3, #11] -2189:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 350 .loc 1 2189 2 is_stmt 1 view .LVU117 - 351 .loc 1 2189 35 is_stmt 0 view .LVU118 +2324:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 350 .loc 1 2324 2 is_stmt 1 view .LVU117 + 351 .loc 1 2324 35 is_stmt 0 view .LVU118 352 0062 0288 ldrh r2, [r0] - 353 .loc 1 2189 48 view .LVU119 + 353 .loc 1 2324 48 view .LVU119 354 0064 C2F30032 ubfx r2, r2, #12, #1 - 355 .loc 1 2189 21 view .LVU120 + 355 .loc 1 2324 21 view .LVU120 356 0068 1A73 strb r2, [r3, #12] -2190:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 357 .loc 1 2190 2 is_stmt 1 view .LVU121 - 358 .loc 1 2190 35 is_stmt 0 view .LVU122 +2325:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 357 .loc 1 2325 2 is_stmt 1 view .LVU121 + 358 .loc 1 2325 35 is_stmt 0 view .LVU122 359 006a 0288 ldrh r2, [r0] - 360 .loc 1 2190 48 view .LVU123 + 360 .loc 1 2325 48 view .LVU123 361 006c C2F34032 ubfx r2, r2, #13, #1 - ARM GAS /tmp/ccO46DoU.s page 88 - - - 362 .loc 1 2190 21 view .LVU124 + 362 .loc 1 2325 21 view .LVU124 363 0070 5A73 strb r2, [r3, #13] -2191:Src/main.c **** -2192:Src/main.c **** temp2++; - 364 .loc 1 2192 2 is_stmt 1 view .LVU125 +2326:Src/main.c **** +2327:Src/main.c **** temp2++; + 364 .loc 1 2327 2 is_stmt 1 view .LVU125 365 .LVL17: -2193:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; - 366 .loc 1 2193 2 view .LVU126 - 367 .loc 1 2193 21 is_stmt 0 view .LVU127 +2328:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; + 366 .loc 1 2328 2 view .LVU126 + 367 .loc 1 2328 21 is_stmt 0 view .LVU127 368 0072 8278 ldrb r2, [r0, #2] @ zero_extendqisi2 - 369 .loc 1 2193 19 view .LVU128 + 369 .loc 1 2328 19 view .LVU128 370 0074 384B ldr r3, .L14+8 371 .LVL18: - 372 .loc 1 2193 19 view .LVU129 + 372 .loc 1 2328 19 view .LVU129 373 0076 1A70 strb r2, [r3] - 374 .loc 1 2193 40 is_stmt 1 view .LVU130 + 374 .loc 1 2328 40 is_stmt 1 view .LVU130 375 .LVL19: -2194:Src/main.c **** task.min_param = (float)(*temp2); temp2++; - 376 .loc 1 2194 2 view .LVU131 - 377 .loc 1 2194 29 is_stmt 0 view .LVU132 +2329:Src/main.c **** task.min_param = (float)(*temp2); temp2++; + 376 .loc 1 2329 2 view .LVU131 + 377 .loc 1 2329 29 is_stmt 0 view .LVU132 378 0078 8288 ldrh r2, [r0, #4] 379 007a 07EE902A vmov s15, r2 @ int - 380 .loc 1 2194 21 view .LVU133 + 380 .loc 1 2329 21 view .LVU133 381 007e F8EE677A vcvt.f32.u32 s15, s15 - 382 .loc 1 2194 19 view .LVU134 + 382 .loc 1 2329 19 view .LVU134 383 0082 C3ED017A vstr.32 s15, [r3, #4] - 384 .loc 1 2194 38 is_stmt 1 view .LVU135 + 384 .loc 1 2329 38 is_stmt 1 view .LVU135 385 .LVL20: -2195:Src/main.c **** task.max_param = (float)(*temp2); temp2++; - 386 .loc 1 2195 2 view .LVU136 - 387 .loc 1 2195 29 is_stmt 0 view .LVU137 +2330:Src/main.c **** task.max_param = (float)(*temp2); temp2++; + 386 .loc 1 2330 2 view .LVU136 + 387 .loc 1 2330 29 is_stmt 0 view .LVU137 388 0086 C288 ldrh r2, [r0, #6] 389 0088 07EE902A vmov s15, r2 @ int - 390 .loc 1 2195 21 view .LVU138 + 390 .loc 1 2330 21 view .LVU138 391 008c F8EE677A vcvt.f32.u32 s15, s15 - 392 .loc 1 2195 19 view .LVU139 + 392 .loc 1 2330 19 view .LVU139 + ARM GAS /tmp/ccYgfTud.s page 91 + + 393 0090 C3ED027A vstr.32 s15, [r3, #8] - 394 .loc 1 2195 38 is_stmt 1 view .LVU140 + 394 .loc 1 2330 38 is_stmt 1 view .LVU140 395 .LVL21: -2196:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; - 396 .loc 1 2196 2 view .LVU141 - 397 .loc 1 2196 29 is_stmt 0 view .LVU142 +2331:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; + 396 .loc 1 2331 2 view .LVU141 + 397 .loc 1 2331 29 is_stmt 0 view .LVU142 398 0094 0289 ldrh r2, [r0, #8] 399 0096 07EE902A vmov s15, r2 @ int - 400 .loc 1 2196 21 view .LVU143 + 400 .loc 1 2331 21 view .LVU143 401 009a F8EE677A vcvt.f32.u32 s15, s15 - 402 .loc 1 2196 19 view .LVU144 + 402 .loc 1 2331 19 view .LVU144 403 009e C3ED037A vstr.32 s15, [r3, #12] - 404 .loc 1 2196 38 is_stmt 1 view .LVU145 + 404 .loc 1 2331 38 is_stmt 1 view .LVU145 405 .LVL22: -2197:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; - 406 .loc 1 2197 2 view .LVU146 - 407 .loc 1 2197 29 is_stmt 0 view .LVU147 +2332:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; + 406 .loc 1 2332 2 view .LVU146 + 407 .loc 1 2332 29 is_stmt 0 view .LVU147 408 00a2 4289 ldrh r2, [r0, #10] 409 00a4 07EE102A vmov s14, r2 @ int - 410 .loc 1 2197 21 view .LVU148 + 410 .loc 1 2332 21 view .LVU148 411 00a8 B8EE477B vcvt.f64.u32 d7, s14 - ARM GAS /tmp/ccO46DoU.s page 89 - - - 412 .loc 1 2197 37 view .LVU149 + 412 .loc 1 2332 37 view .LVU149 413 00ac 9FED285B vldr.64 d5, .L14 414 00b0 87EE056B vdiv.f64 d6, d7, d5 - 415 .loc 1 2197 19 view .LVU150 + 415 .loc 1 2332 19 view .LVU150 416 00b4 FCEEC67B vcvt.u32.f64 s15, d6 417 00b8 CDED017A vstr.32 s15, [sp, #4] @ int 418 00bc 9DF80420 ldrb r2, [sp, #4] @ zero_extendqisi2 419 00c0 1A75 strb r2, [r3, #20] - 420 .loc 1 2197 46 is_stmt 1 view .LVU151 + 420 .loc 1 2332 46 is_stmt 1 view .LVU151 421 .LVL23: -2198:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; - 422 .loc 1 2198 2 view .LVU152 - 423 .loc 1 2198 29 is_stmt 0 view .LVU153 +2333:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; + 422 .loc 1 2333 2 view .LVU152 + 423 .loc 1 2333 29 is_stmt 0 view .LVU153 424 00c2 8189 ldrh r1, [r0, #12] 425 .LVL24: - 426 .loc 1 2198 29 view .LVU154 + 426 .loc 1 2333 29 view .LVU154 427 00c4 07EE901A vmov s15, r1 @ int - 428 .loc 1 2198 21 view .LVU155 + 428 .loc 1 2333 21 view .LVU155 429 00c8 F8EE677A vcvt.f32.u32 s15, s15 - 430 .loc 1 2198 19 view .LVU156 + 430 .loc 1 2333 19 view .LVU156 431 00cc C3ED067A vstr.32 s15, [r3, #24] - 432 .loc 1 2198 38 is_stmt 1 view .LVU157 + 432 .loc 1 2333 38 is_stmt 1 view .LVU157 433 .LVL25: -2199:Src/main.c **** task.curr = (float)(*temp2); temp2++; - 434 .loc 1 2199 2 view .LVU158 - 435 .loc 1 2199 29 is_stmt 0 view .LVU159 +2334:Src/main.c **** task.curr = (float)(*temp2); temp2++; + 434 .loc 1 2334 2 view .LVU158 + 435 .loc 1 2334 29 is_stmt 0 view .LVU159 436 00d0 C189 ldrh r1, [r0, #14] 437 00d2 07EE901A vmov s15, r1 @ int - 438 .loc 1 2199 21 view .LVU160 + 438 .loc 1 2334 21 view .LVU160 439 00d6 F8EE677A vcvt.f32.u32 s15, s15 - 440 .loc 1 2199 19 view .LVU161 + 440 .loc 1 2334 19 view .LVU161 441 00da C3ED077A vstr.32 s15, [r3, #28] - 442 .loc 1 2199 38 is_stmt 1 view .LVU162 + 442 .loc 1 2334 38 is_stmt 1 view .LVU162 443 .LVL26: -2200:Src/main.c **** task.temp = (float)(*temp2); temp2++; - 444 .loc 1 2200 2 view .LVU163 - 445 .loc 1 2200 29 is_stmt 0 view .LVU164 +2335:Src/main.c **** task.temp = (float)(*temp2); temp2++; + 444 .loc 1 2335 2 view .LVU163 + ARM GAS /tmp/ccYgfTud.s page 92 + + + 445 .loc 1 2335 29 is_stmt 0 view .LVU164 446 00de 018A ldrh r1, [r0, #16] 447 00e0 07EE901A vmov s15, r1 @ int - 448 .loc 1 2200 21 view .LVU165 + 448 .loc 1 2335 21 view .LVU165 449 00e4 F8EE677A vcvt.f32.u32 s15, s15 - 450 .loc 1 2200 19 view .LVU166 + 450 .loc 1 2335 19 view .LVU166 451 00e8 C3ED087A vstr.32 s15, [r3, #32] - 452 .loc 1 2200 38 is_stmt 1 view .LVU167 + 452 .loc 1 2335 38 is_stmt 1 view .LVU167 453 .LVL27: -2201:Src/main.c **** task.tau = (float)(*temp2); temp2++; - 454 .loc 1 2201 2 view .LVU168 - 455 .loc 1 2201 29 is_stmt 0 view .LVU169 +2336:Src/main.c **** task.tau = (float)(*temp2); temp2++; + 454 .loc 1 2336 2 view .LVU168 + 455 .loc 1 2336 29 is_stmt 0 view .LVU169 456 00ec 418A ldrh r1, [r0, #18] - 457 .loc 1 2201 19 view .LVU170 + 457 .loc 1 2336 19 view .LVU170 458 00ee D982 strh r1, [r3, #22] @ movhi - 459 .loc 1 2201 38 is_stmt 1 view .LVU171 + 459 .loc 1 2336 38 is_stmt 1 view .LVU171 460 .LVL28: -2202:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; - 461 .loc 1 2202 2 view .LVU172 - 462 .loc 1 2202 29 is_stmt 0 view .LVU173 +2337:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; + 461 .loc 1 2337 2 view .LVU172 + 462 .loc 1 2337 29 is_stmt 0 view .LVU173 463 00f0 818A ldrh r1, [r0, #20] - ARM GAS /tmp/ccO46DoU.s page 90 - - 464 00f2 07EE901A vmov s15, r1 @ int - 465 .loc 1 2202 21 view .LVU174 + 465 .loc 1 2337 21 view .LVU174 466 00f6 F8EE677A vcvt.f32.u32 s15, s15 - 467 .loc 1 2202 37 view .LVU175 + 467 .loc 1 2337 37 view .LVU175 468 00fa 9FED187A vldr.32 s14, .L14+12 469 00fe 67EE877A vmul.f32 s15, s15, s14 - 470 .loc 1 2202 19 view .LVU176 + 470 .loc 1 2337 19 view .LVU176 471 0102 C3ED0A7A vstr.32 s15, [r3, #40] - 472 .loc 1 2202 46 is_stmt 1 view .LVU177 + 472 .loc 1 2337 46 is_stmt 1 view .LVU177 473 .LVL29: -2203:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; - 474 .loc 1 2203 2 view .LVU178 - 475 .loc 1 2203 29 is_stmt 0 view .LVU179 +2338:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; + 474 .loc 1 2338 2 view .LVU178 + 475 .loc 1 2338 29 is_stmt 0 view .LVU179 476 0106 C18A ldrh r1, [r0, #22] 477 0108 07EE901A vmov s15, r1 @ int - 478 .loc 1 2203 21 view .LVU180 + 478 .loc 1 2338 21 view .LVU180 479 010c F8EE677A vcvt.f32.u32 s15, s15 - 480 .loc 1 2203 37 view .LVU181 + 480 .loc 1 2338 37 view .LVU181 481 0110 67EE877A vmul.f32 s15, s15, s14 - 482 .loc 1 2203 19 view .LVU182 + 482 .loc 1 2338 19 view .LVU182 483 0114 C3ED097A vstr.32 s15, [r3, #36] - 484 .loc 1 2203 46 is_stmt 1 view .LVU183 + 484 .loc 1 2338 46 is_stmt 1 view .LVU183 485 .LVL30: -2204:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; - 486 .loc 1 2204 2 view .LVU184 - 487 .loc 1 2204 29 is_stmt 0 view .LVU185 +2339:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; + 486 .loc 1 2339 2 view .LVU184 + 487 .loc 1 2339 29 is_stmt 0 view .LVU185 488 0118 018B ldrh r1, [r0, #24] 489 011a 07EE901A vmov s15, r1 @ int - 490 .loc 1 2204 21 view .LVU186 + 490 .loc 1 2339 21 view .LVU186 491 011e F8EE677A vcvt.f32.u32 s15, s15 - 492 .loc 1 2204 37 view .LVU187 + 492 .loc 1 2339 37 view .LVU187 493 0122 67EE877A vmul.f32 s15, s15, s14 - 494 .loc 1 2204 19 view .LVU188 + 494 .loc 1 2339 19 view .LVU188 495 0126 C3ED0C7A vstr.32 s15, [r3, #48] - 496 .loc 1 2204 46 is_stmt 1 view .LVU189 + 496 .loc 1 2339 46 is_stmt 1 view .LVU189 497 .LVL31: -2205:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; - 498 .loc 1 2205 2 view .LVU190 - 499 .loc 1 2205 29 is_stmt 0 view .LVU191 + ARM GAS /tmp/ccYgfTud.s page 93 + + +2340:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; + 498 .loc 1 2340 2 view .LVU190 + 499 .loc 1 2340 29 is_stmt 0 view .LVU191 500 012a 418B ldrh r1, [r0, #26] 501 012c 07EE901A vmov s15, r1 @ int - 502 .loc 1 2205 21 view .LVU192 + 502 .loc 1 2340 21 view .LVU192 503 0130 F8EE677A vcvt.f32.u32 s15, s15 - 504 .loc 1 2205 37 view .LVU193 + 504 .loc 1 2340 37 view .LVU193 505 0134 67EE877A vmul.f32 s15, s15, s14 - 506 .loc 1 2205 19 view .LVU194 + 506 .loc 1 2340 19 view .LVU194 507 0138 C3ED0B7A vstr.32 s15, [r3, #44] - 508 .loc 1 2205 46 is_stmt 1 view .LVU195 + 508 .loc 1 2340 46 is_stmt 1 view .LVU195 509 .LVL32: -2206:Src/main.c **** -2207:Src/main.c **** TO10_counter = task.dt / 10; - 510 .loc 1 2207 2 view .LVU196 - 511 .loc 1 2207 25 is_stmt 0 view .LVU197 +2341:Src/main.c **** +2342:Src/main.c **** TO10_counter = task.dt / 10; + 510 .loc 1 2342 2 view .LVU196 + 511 .loc 1 2342 25 is_stmt 0 view .LVU197 512 013c 084B ldr r3, .L14+16 513 013e A3FB0232 umull r3, r2, r3, r2 514 0142 D208 lsrs r2, r2, #3 - 515 .loc 1 2207 15 view .LVU198 - ARM GAS /tmp/ccO46DoU.s page 91 - - + 515 .loc 1 2342 15 view .LVU198 516 0144 074B ldr r3, .L14+20 517 0146 1A60 str r2, [r3] -2208:Src/main.c **** } - 518 .loc 1 2208 1 view .LVU199 +2343:Src/main.c **** } + 518 .loc 1 2343 1 view .LVU199 519 0148 02B0 add sp, sp, #8 520 .LCFI5: 521 .cfi_def_cfa_offset 0 @@ -5428,532 +5569,755 @@ ARM GAS /tmp/ccO46DoU.s page 1 540 .thumb_func 542 PID_Controller_Temp: 543 .LVL33: - 544 .LFB1215: -2209:Src/main.c **** -2210:Src/main.c **** void OUT_trigger(uint8_t out_n) -2211:Src/main.c **** { -2212:Src/main.c **** switch (out_n) -2213:Src/main.c **** { -2214:Src/main.c **** case 0: -2215:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); -2216:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); -2217:Src/main.c **** break; -2218:Src/main.c **** -2219:Src/main.c **** case 1: -2220:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); -2221:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); -2222:Src/main.c **** break; -2223:Src/main.c **** -2224:Src/main.c **** case 2: -2225:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); -2226:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); -2227:Src/main.c **** break; -2228:Src/main.c **** -2229:Src/main.c **** case 3: -2230:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); -2231:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); -2232:Src/main.c **** break; -2233:Src/main.c **** -2234:Src/main.c **** case 4: -2235:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); -2236:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); -2237:Src/main.c **** break; - ARM GAS /tmp/ccO46DoU.s page 92 + 544 .LFB1221: +2344:Src/main.c **** +2345:Src/main.c **** void OUT_trigger(uint8_t out_n) +2346:Src/main.c **** { +2347:Src/main.c **** switch (out_n) +2348:Src/main.c **** { +2349:Src/main.c **** case 0: +2350:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); +2351:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + ARM GAS /tmp/ccYgfTud.s page 94 -2238:Src/main.c **** -2239:Src/main.c **** case 5: -2240:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); -2241:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); -2242:Src/main.c **** break; -2243:Src/main.c **** -2244:Src/main.c **** case 6: -2245:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); -2246:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); -2247:Src/main.c **** break; -2248:Src/main.c **** -2249:Src/main.c **** case 7: -2250:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); -2251:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); -2252:Src/main.c **** break; -2253:Src/main.c **** -2254:Src/main.c **** case 8: -2255:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); -2256:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); -2257:Src/main.c **** break; -2258:Src/main.c **** -2259:Src/main.c **** case 9: -2260:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); -2261:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); -2262:Src/main.c **** break; -2263:Src/main.c **** } -2264:Src/main.c **** } -2265:Src/main.c **** -2266:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) -2267:Src/main.c **** { -2268:Src/main.c **** uint32_t tmp32; -2269:Src/main.c **** -2270:Src/main.c **** switch (num) -2271:Src/main.c **** { -2272:Src/main.c **** case 1: -2273:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L -2274:Src/main.c **** //tmp32=0; -2275:Src/main.c **** //while(tmp32<500){tmp32++;} -2276:Src/main.c **** tmp32 = 0; -2277:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -2279:Src/main.c **** tmp32 = 0; -2280:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2281:Src/main.c **** (void) SPI2->DR; -2282:Src/main.c **** break; -2283:Src/main.c **** case 2: -2284:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes -2285:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L -2286:Src/main.c **** //tmp32=0; -2287:Src/main.c **** //while(tmp32<500){tmp32++;} -2288:Src/main.c **** tmp32 = 0; -2289:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2290:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC -2291:Src/main.c **** tmp32 = 0; -2292:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2293:Src/main.c **** (void) SPI6->DR; -2294:Src/main.c **** break; - ARM GAS /tmp/ccO46DoU.s page 93 - - -2295:Src/main.c **** case 3: -2296:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with -2297:Src/main.c **** //tmp32=0; -2298:Src/main.c **** //while(tmp32<500){tmp32++;} -2299:Src/main.c **** tmp32 = 0; -2300:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2301:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -2302:Src/main.c **** tmp32 = 0; -2303:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2304:Src/main.c **** (void) SPI2->DR; -2305:Src/main.c **** break; -2306:Src/main.c **** case 4: -2307:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with -2308:Src/main.c **** //tmp32=0; -2309:Src/main.c **** //while(tmp32<500){tmp32++;} -2310:Src/main.c **** tmp32 = 0; -2311:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2312:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC -2313:Src/main.c **** tmp32 = 0; -2314:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2315:Src/main.c **** (void) SPI6->DR; -2316:Src/main.c **** break; -2317:Src/main.c **** } -2318:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 -2319:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 -2320:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 -2321:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 -2322:Src/main.c **** } -2323:Src/main.c **** static uint16_t MPhD_T(uint8_t num) -2324:Src/main.c **** { -2325:Src/main.c **** uint16_t P; -2326:Src/main.c **** uint32_t tmp32; -2327:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -2328:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -2329:Src/main.c **** tmp32=0; -2330:Src/main.c **** while(tmp32<500){tmp32++;} -2331:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -2332:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -2333:Src/main.c **** tmp32=0; -2334:Src/main.c **** while(tmp32<500){tmp32++;} -2335:Src/main.c **** if (num==1)//MPD1 -2336:Src/main.c **** { -2337:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -2338:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); -2339:Src/main.c **** tmp32=0; -2340:Src/main.c **** while(tmp32<500){tmp32++;} -2341:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2342:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC -2343:Src/main.c **** tmp32 = 0; -2344:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2345:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC -2346:Src/main.c **** while(tmp32<500){tmp32++;} -2347:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2348:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -2349:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -2350:Src/main.c **** } -2351:Src/main.c **** else if (num==2)//MPD2 - ARM GAS /tmp/ccO46DoU.s page 94 - - -2352:Src/main.c **** { -2353:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -2354:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); -2355:Src/main.c **** tmp32=0; -2356:Src/main.c **** while(tmp32<500){tmp32++;} -2357:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2358:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC -2359:Src/main.c **** tmp32 = 0; -2360:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2361:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC -2362:Src/main.c **** while(tmp32<500){tmp32++;} -2363:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2364:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -2365:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -2366:Src/main.c **** } -2367:Src/main.c **** else if (num==3)//ThrLD1 -2368:Src/main.c **** { -2369:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -2370:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -2371:Src/main.c **** tmp32=0; -2372:Src/main.c **** while(tmp32<500){tmp32++;} -2373:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2374:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC -2375:Src/main.c **** tmp32 = 0; -2376:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2377:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC -2378:Src/main.c **** while(tmp32<500){tmp32++;} -2379:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2380:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -2381:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -2382:Src/main.c **** } -2383:Src/main.c **** else if (num==4)//ThrLD2 -2384:Src/main.c **** { -2385:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -2386:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -2387:Src/main.c **** tmp32=0; -2388:Src/main.c **** while(tmp32<500){tmp32++;} -2389:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2390:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC -2391:Src/main.c **** tmp32 = 0; -2392:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2393:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC -2394:Src/main.c **** while(tmp32<500){tmp32++;} -2395:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2396:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -2397:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +2352:Src/main.c **** break; +2353:Src/main.c **** +2354:Src/main.c **** case 1: +2355:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); +2356:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); +2357:Src/main.c **** break; +2358:Src/main.c **** +2359:Src/main.c **** case 2: +2360:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); +2361:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); +2362:Src/main.c **** break; +2363:Src/main.c **** +2364:Src/main.c **** case 3: +2365:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); +2366:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); +2367:Src/main.c **** break; +2368:Src/main.c **** +2369:Src/main.c **** case 4: +2370:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); +2371:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); +2372:Src/main.c **** break; +2373:Src/main.c **** +2374:Src/main.c **** case 5: +2375:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); +2376:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); +2377:Src/main.c **** break; +2378:Src/main.c **** +2379:Src/main.c **** case 6: +2380:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); +2381:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); +2382:Src/main.c **** break; +2383:Src/main.c **** +2384:Src/main.c **** case 7: +2385:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); +2386:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); +2387:Src/main.c **** break; +2388:Src/main.c **** +2389:Src/main.c **** case 8: +2390:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); +2391:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); +2392:Src/main.c **** break; +2393:Src/main.c **** +2394:Src/main.c **** case 9: +2395:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); +2396:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); +2397:Src/main.c **** break; 2398:Src/main.c **** } -2399:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; -2400:Src/main.c **** -2401:Src/main.c **** Inorm = (float) (65535) / (float) (100); -2402:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); -2403:Src/main.c **** Tnorm2 = 4; -2404:Src/main.c **** Pnorm = (float)(65535) / (float)(20); -2405:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system -2406:Src/main.c **** T0m = 48.6282; -2407:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; -2408:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 95 +2399:Src/main.c **** } +2400:Src/main.c **** +2401:Src/main.c **** static void AD9102_Init(void) +2402:Src/main.c **** { +2403:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2404:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); +2405:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} +2406:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); +2407:Src/main.c **** +2408:Src/main.c **** AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT); + ARM GAS /tmp/ccYgfTud.s page 95 -2409:Src/main.c **** Ith = I0m * expf(T_C/T0m); -2410:Src/main.c **** I_LD = (float) (C_LD) / Inorm; -2411:Src/main.c **** -2412:Src/main.c **** if (I_LD > Ith) -2413:Src/main.c **** { -2414:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ -2415:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; -2416:Src/main.c **** } -2417:Src/main.c **** else -2418:Src/main.c **** { -2419:Src/main.c **** P = 0; -2420:Src/main.c **** } */ -2421:Src/main.c **** return P; -2422:Src/main.c **** } -2423:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time -2424:Src/main.c **** { -2425:Src/main.c **** uint16_t Result; -2426:Src/main.c **** // uint8_t randf; -2427:Src/main.c **** -2428:Src/main.c **** randf = 0; -2429:Src/main.c **** for (uint8_t i = 0; i < 32; i++) -2430:Src/main.c **** { -2431:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; -2432:Src/main.c **** } -2433:Src/main.c **** -2434:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl -2435:Src/main.c **** -2436:Src/main.c **** return (uint16_t)(Result); -2437:Src/main.c **** }*/ -2438:Src/main.c **** static uint16_t Get_ADC(uint8_t num) -2439:Src/main.c **** { -2440:Src/main.c **** uint16_t OUT; -2441:Src/main.c **** switch (num) -2442:Src/main.c **** { -2443:Src/main.c **** case 0: -2444:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on -2445:Src/main.c **** break; -2446:Src/main.c **** case 1: -2447:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion -2448:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc -2449:Src/main.c **** break; -2450:Src/main.c **** case 2: -2451:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off -2452:Src/main.c **** break; -2453:Src/main.c **** case 3: -2454:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on -2455:Src/main.c **** break; -2456:Src/main.c **** case 4: -2457:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion -2458:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc -2459:Src/main.c **** break; -2460:Src/main.c **** case 5: -2461:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off -2462:Src/main.c **** break; -2463:Src/main.c **** } -2464:Src/main.c **** return OUT; -2465:Src/main.c **** } - ARM GAS /tmp/ccO46DoU.s page 96 +2409:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2410:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +2411:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2412:Src/main.c **** } +2413:Src/main.c **** +2414:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value) +2415:Src/main.c **** { +2416:Src/main.c **** uint32_t tmp32 = 0; +2417:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address +2418:Src/main.c **** +2419:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) +2420:Src/main.c **** { +2421:Src/main.c **** LL_SPI_Enable(SPI2); +2422:Src/main.c **** } +2423:Src/main.c **** +2424:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); +2425:Src/main.c **** +2426:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2427:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); +2428:Src/main.c **** tmp32 = 0; +2429:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2430:Src/main.c **** (void) SPI2->DR; +2431:Src/main.c **** +2432:Src/main.c **** tmp32 = 0; +2433:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2434:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); +2435:Src/main.c **** tmp32 = 0; +2436:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2437:Src/main.c **** (void) SPI2->DR; +2438:Src/main.c **** +2439:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2440:Src/main.c **** } +2441:Src/main.c **** +2442:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr) +2443:Src/main.c **** { +2444:Src/main.c **** uint32_t tmp32 = 0; +2445:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) +2446:Src/main.c **** uint16_t value; +2447:Src/main.c **** +2448:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) +2449:Src/main.c **** { +2450:Src/main.c **** LL_SPI_Enable(SPI2); +2451:Src/main.c **** } +2452:Src/main.c **** +2453:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); +2454:Src/main.c **** +2455:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2456:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); +2457:Src/main.c **** tmp32 = 0; +2458:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2459:Src/main.c **** (void) SPI2->DR; +2460:Src/main.c **** +2461:Src/main.c **** tmp32 = 0; +2462:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2463:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); +2464:Src/main.c **** tmp32 = 0; +2465:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + ARM GAS /tmp/ccYgfTud.s page 96 -2466:Src/main.c **** -2467:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results -2468:Src/main.c **** { -2469:Src/main.c **** // Main idea: -2470:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat -2471:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept -2472:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t -2473:Src/main.c **** // So, equation should be look like this: -2474:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) -2475:Src/main.c **** // t -- cycle phase -2476:Src/main.c **** // a,b,c -- constants -2477:Src/main.c **** // -2478:Src/main.c **** // How can we control laser diode temperature? -2479:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. -2480:Src/main.c **** // Then we should measure wavelength. -2481:Src/main.c **** // Calibration sequence: -2482:Src/main.c **** // 1) n -2483:Src/main.c **** -2484:Src/main.c **** -2485:Src/main.c **** -2486:Src/main.c **** int e_pid; -2487:Src/main.c **** float P_coef_current;//, I_coef_current; -2488:Src/main.c **** float e_integral; -2489:Src/main.c **** int x_output; -2490:Src/main.c **** -2491:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; -2492:Src/main.c **** -2493:Src/main.c **** e_integral = LDx_results->e_integral; -2494:Src/main.c **** -2495:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ -2496:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 -2497:Src/main.c **** } -2498:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; -2499:Src/main.c **** -2500:Src/main.c **** if (e_integral > 32000){ -2501:Src/main.c **** e_integral = 32000; -2502:Src/main.c **** } -2503:Src/main.c **** else if (e_integral < - 32000){ -2504:Src/main.c **** e_integral = -32000; -2505:Src/main.c **** } -2506:Src/main.c **** LDx_results->e_integral = e_integral; -2507:Src/main.c **** -2508:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in -2509:Src/main.c **** -2510:Src/main.c **** if(x_output < 1000){ -2511:Src/main.c **** x_output = 8800; -2512:Src/main.c **** } -2513:Src/main.c **** else if(x_output > 56800){ -2514:Src/main.c **** x_output = 56800; -2515:Src/main.c **** } -2516:Src/main.c **** -2517:Src/main.c **** if (num==2) -2518:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -2519:Src/main.c **** -2520:Src/main.c **** return (uint16_t)x_output; -2521:Src/main.c **** } -2522:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 97 +2466:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); +2467:Src/main.c **** +2468:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2469:Src/main.c **** return value; +2470:Src/main.c **** } +2471:Src/main.c **** +2472:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count) +2473:Src/main.c **** { +2474:Src/main.c **** for (uint16_t i = 0; i < count; i++) +2475:Src/main.c **** { +2476:Src/main.c **** AD9102_WriteReg(ad9102_reg_addr[i], values[i]); +2477:Src/main.c **** } +2478:Src/main.c **** } +2479:Src/main.c **** +2480:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, +2481:Src/main.c **** { +2482:Src/main.c **** if (enable) +2483:Src/main.c **** { +2484:Src/main.c **** uint16_t saw_cfg; +2485:Src/main.c **** uint16_t pat_timebase; +2486:Src/main.c **** +2487:Src/main.c **** if (saw_step == 0u) +2488:Src/main.c **** { +2489:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; +2490:Src/main.c **** } +2491:Src/main.c **** if (saw_step > 63u) +2492:Src/main.c **** { +2493:Src/main.c **** saw_step = 63u; +2494:Src/main.c **** } +2495:Src/main.c **** saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | +2496:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); +2497:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | +2498:Src/main.c **** ((pat_base & 0x0Fu) << 4) | +2499:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); +2500:Src/main.c **** +2501:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG); +2502:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); +2503:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); +2504:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); +2505:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat +2506:Src/main.c **** +2507:Src/main.c **** // Update RUN then RAMUPDATE at the end of the write sequence. +2508:Src/main.c **** // AD9102 output is started by a falling edge of TRIGGER pin when RUN=1. +2509:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2510:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); +2511:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +2512:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} +2513:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); +2514:Src/main.c **** } +2515:Src/main.c **** else +2516:Src/main.c **** { +2517:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2518:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2519:Src/main.c **** } +2520:Src/main.c **** +2521:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); +2522:Src/main.c **** } + ARM GAS /tmp/ccYgfTud.s page 97 2523:Src/main.c **** -2524:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin -2525:Src/main.c **** { - 545 .loc 1 2525 1 is_stmt 1 view -0 +2524:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t +2525:Src/main.c **** { +2526:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); +2527:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); +2528:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); +2529:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); +2530:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | +2531:Src/main.c **** ((pat_base & 0x0Fu) << 4) | +2532:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); +2533:Src/main.c **** +2534:Src/main.c **** if (saw_step == 0u) +2535:Src/main.c **** { +2536:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; +2537:Src/main.c **** } +2538:Src/main.c **** if (saw_step > 63u) +2539:Src/main.c **** { +2540:Src/main.c **** saw_step = 63u; +2541:Src/main.c **** } +2542:Src/main.c **** if (pat_period == 0u) +2543:Src/main.c **** { +2544:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; +2545:Src/main.c **** } +2546:Src/main.c **** uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | +2547:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); +2548:Src/main.c **** +2549:Src/main.c **** uint8_t ok = 1u; +2550:Src/main.c **** +2551:Src/main.c **** // Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset. +2552:Src/main.c **** if (spiconfig != 0x0000u) +2553:Src/main.c **** { +2554:Src/main.c **** ok = 0u; +2555:Src/main.c **** } +2556:Src/main.c **** +2557:Src/main.c **** // Power blocks should not be powered down. +2558:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) +2559:Src/main.c **** { +2560:Src/main.c **** ok = 0u; +2561:Src/main.c **** } +2562:Src/main.c **** +2563:Src/main.c **** // Clock receiver must be enabled (cannot directly detect external clock presence). +2564:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) +2565:Src/main.c **** { +2566:Src/main.c **** ok = 0u; +2567:Src/main.c **** } +2568:Src/main.c **** +2569:Src/main.c **** // Any configuration error flags indicate a bad setup. +2570:Src/main.c **** if (cfg_err & 0x003Fu) +2571:Src/main.c **** { +2572:Src/main.c **** ok = 0u; +2573:Src/main.c **** } +2574:Src/main.c **** +2575:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) +2576:Src/main.c **** { +2577:Src/main.c **** ok = 0u; +2578:Src/main.c **** } +2579:Src/main.c **** + ARM GAS /tmp/ccYgfTud.s page 98 + + +2580:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG) +2581:Src/main.c **** { +2582:Src/main.c **** ok = 0u; +2583:Src/main.c **** } +2584:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) +2585:Src/main.c **** { +2586:Src/main.c **** ok = 0u; +2587:Src/main.c **** } +2588:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period) +2589:Src/main.c **** { +2590:Src/main.c **** ok = 0u; +2591:Src/main.c **** } +2592:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) +2593:Src/main.c **** { +2594:Src/main.c **** ok = 0u; +2595:Src/main.c **** } +2596:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw) +2597:Src/main.c **** { +2598:Src/main.c **** ok = 0u; +2599:Src/main.c **** } +2600:Src/main.c **** +2601:Src/main.c **** return (ok ? 0u : 1u); +2602:Src/main.c **** } +2603:Src/main.c **** +2604:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) +2605:Src/main.c **** { +2606:Src/main.c **** uint32_t tmp32; +2607:Src/main.c **** +2608:Src/main.c **** #if AD9102_ON_SPI2 +2609:Src/main.c **** // AD9102 occupies SPI2; skip LD1/TEC1 writes to avoid CS conflicts. +2610:Src/main.c **** if (num == 1 || num == 3) +2611:Src/main.c **** { +2612:Src/main.c **** return; +2613:Src/main.c **** } +2614:Src/main.c **** #endif +2615:Src/main.c **** +2616:Src/main.c **** switch (num) +2617:Src/main.c **** { +2618:Src/main.c **** case 1: +2619:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L +2620:Src/main.c **** //tmp32=0; +2621:Src/main.c **** //while(tmp32<500){tmp32++;} +2622:Src/main.c **** tmp32 = 0; +2623:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2624:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +2625:Src/main.c **** tmp32 = 0; +2626:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2627:Src/main.c **** (void) SPI2->DR; +2628:Src/main.c **** break; +2629:Src/main.c **** case 2: +2630:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes +2631:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L +2632:Src/main.c **** //tmp32=0; +2633:Src/main.c **** //while(tmp32<500){tmp32++;} +2634:Src/main.c **** tmp32 = 0; +2635:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2636:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + ARM GAS /tmp/ccYgfTud.s page 99 + + +2637:Src/main.c **** tmp32 = 0; +2638:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2639:Src/main.c **** (void) SPI6->DR; +2640:Src/main.c **** break; +2641:Src/main.c **** case 3: +2642:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with +2643:Src/main.c **** //tmp32=0; +2644:Src/main.c **** //while(tmp32<500){tmp32++;} +2645:Src/main.c **** tmp32 = 0; +2646:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2647:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +2648:Src/main.c **** tmp32 = 0; +2649:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2650:Src/main.c **** (void) SPI2->DR; +2651:Src/main.c **** break; +2652:Src/main.c **** case 4: +2653:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with +2654:Src/main.c **** //tmp32=0; +2655:Src/main.c **** //while(tmp32<500){tmp32++;} +2656:Src/main.c **** tmp32 = 0; +2657:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2658:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +2659:Src/main.c **** tmp32 = 0; +2660:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2661:Src/main.c **** (void) SPI6->DR; +2662:Src/main.c **** break; +2663:Src/main.c **** } +2664:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 +2665:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 +2666:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 +2667:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 +2668:Src/main.c **** } +2669:Src/main.c **** static uint16_t MPhD_T(uint8_t num) +2670:Src/main.c **** { +2671:Src/main.c **** uint16_t P; +2672:Src/main.c **** uint32_t tmp32; +2673:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +2674:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +2675:Src/main.c **** tmp32=0; +2676:Src/main.c **** while(tmp32<500){tmp32++;} +2677:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +2678:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +2679:Src/main.c **** tmp32=0; +2680:Src/main.c **** while(tmp32<500){tmp32++;} +2681:Src/main.c **** if (num==1)//MPD1 +2682:Src/main.c **** { +2683:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +2684:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); +2685:Src/main.c **** tmp32=0; +2686:Src/main.c **** while(tmp32<500){tmp32++;} +2687:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2688:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC +2689:Src/main.c **** tmp32 = 0; +2690:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2691:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC +2692:Src/main.c **** while(tmp32<500){tmp32++;} +2693:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + ARM GAS /tmp/ccYgfTud.s page 100 + + +2694:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +2695:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +2696:Src/main.c **** } +2697:Src/main.c **** else if (num==2)//MPD2 +2698:Src/main.c **** { +2699:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +2700:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); +2701:Src/main.c **** tmp32=0; +2702:Src/main.c **** while(tmp32<500){tmp32++;} +2703:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2704:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC +2705:Src/main.c **** tmp32 = 0; +2706:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2707:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC +2708:Src/main.c **** while(tmp32<500){tmp32++;} +2709:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2710:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +2711:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +2712:Src/main.c **** } +2713:Src/main.c **** else if (num==3)//ThrLD1 +2714:Src/main.c **** { +2715:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +2716:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +2717:Src/main.c **** tmp32=0; +2718:Src/main.c **** while(tmp32<500){tmp32++;} +2719:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2720:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC +2721:Src/main.c **** tmp32 = 0; +2722:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2723:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC +2724:Src/main.c **** while(tmp32<500){tmp32++;} +2725:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2726:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +2727:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +2728:Src/main.c **** } +2729:Src/main.c **** else if (num==4)//ThrLD2 +2730:Src/main.c **** { +2731:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +2732:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +2733:Src/main.c **** tmp32=0; +2734:Src/main.c **** while(tmp32<500){tmp32++;} +2735:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2736:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC +2737:Src/main.c **** tmp32 = 0; +2738:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2739:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC +2740:Src/main.c **** while(tmp32<500){tmp32++;} +2741:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2742:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +2743:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +2744:Src/main.c **** } +2745:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; +2746:Src/main.c **** +2747:Src/main.c **** Inorm = (float) (65535) / (float) (100); +2748:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); +2749:Src/main.c **** Tnorm2 = 4; +2750:Src/main.c **** Pnorm = (float)(65535) / (float)(20); + ARM GAS /tmp/ccYgfTud.s page 101 + + +2751:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system +2752:Src/main.c **** T0m = 48.6282; +2753:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; +2754:Src/main.c **** +2755:Src/main.c **** Ith = I0m * expf(T_C/T0m); +2756:Src/main.c **** I_LD = (float) (C_LD) / Inorm; +2757:Src/main.c **** +2758:Src/main.c **** if (I_LD > Ith) +2759:Src/main.c **** { +2760:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ +2761:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; +2762:Src/main.c **** } +2763:Src/main.c **** else +2764:Src/main.c **** { +2765:Src/main.c **** P = 0; +2766:Src/main.c **** } */ +2767:Src/main.c **** return P; +2768:Src/main.c **** } +2769:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time +2770:Src/main.c **** { +2771:Src/main.c **** uint16_t Result; +2772:Src/main.c **** // uint8_t randf; +2773:Src/main.c **** +2774:Src/main.c **** randf = 0; +2775:Src/main.c **** for (uint8_t i = 0; i < 32; i++) +2776:Src/main.c **** { +2777:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; +2778:Src/main.c **** } +2779:Src/main.c **** +2780:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl +2781:Src/main.c **** +2782:Src/main.c **** return (uint16_t)(Result); +2783:Src/main.c **** }*/ +2784:Src/main.c **** static uint16_t Get_ADC(uint8_t num) +2785:Src/main.c **** { +2786:Src/main.c **** uint16_t OUT; +2787:Src/main.c **** switch (num) +2788:Src/main.c **** { +2789:Src/main.c **** case 0: +2790:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on +2791:Src/main.c **** break; +2792:Src/main.c **** case 1: +2793:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion +2794:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc +2795:Src/main.c **** break; +2796:Src/main.c **** case 2: +2797:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off +2798:Src/main.c **** break; +2799:Src/main.c **** case 3: +2800:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on +2801:Src/main.c **** break; +2802:Src/main.c **** case 4: +2803:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion +2804:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc +2805:Src/main.c **** break; +2806:Src/main.c **** case 5: +2807:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off + ARM GAS /tmp/ccYgfTud.s page 102 + + +2808:Src/main.c **** break; +2809:Src/main.c **** } +2810:Src/main.c **** return OUT; +2811:Src/main.c **** } +2812:Src/main.c **** +2813:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results +2814:Src/main.c **** { +2815:Src/main.c **** // Main idea: +2816:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat +2817:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept +2818:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t +2819:Src/main.c **** // So, equation should be look like this: +2820:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) +2821:Src/main.c **** // t -- cycle phase +2822:Src/main.c **** // a,b,c -- constants +2823:Src/main.c **** // +2824:Src/main.c **** // How can we control laser diode temperature? +2825:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. +2826:Src/main.c **** // Then we should measure wavelength. +2827:Src/main.c **** // Calibration sequence: +2828:Src/main.c **** // 1) n +2829:Src/main.c **** +2830:Src/main.c **** +2831:Src/main.c **** +2832:Src/main.c **** int e_pid; +2833:Src/main.c **** float P_coef_current;//, I_coef_current; +2834:Src/main.c **** float e_integral; +2835:Src/main.c **** int x_output; +2836:Src/main.c **** +2837:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; +2838:Src/main.c **** +2839:Src/main.c **** e_integral = LDx_results->e_integral; +2840:Src/main.c **** +2841:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ +2842:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 +2843:Src/main.c **** } +2844:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; +2845:Src/main.c **** +2846:Src/main.c **** if (e_integral > 32000){ +2847:Src/main.c **** e_integral = 32000; +2848:Src/main.c **** } +2849:Src/main.c **** else if (e_integral < - 32000){ +2850:Src/main.c **** e_integral = -32000; +2851:Src/main.c **** } +2852:Src/main.c **** LDx_results->e_integral = e_integral; +2853:Src/main.c **** +2854:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in +2855:Src/main.c **** +2856:Src/main.c **** if(x_output < 1000){ +2857:Src/main.c **** x_output = 8800; +2858:Src/main.c **** } +2859:Src/main.c **** else if(x_output > 56800){ +2860:Src/main.c **** x_output = 56800; +2861:Src/main.c **** } +2862:Src/main.c **** +2863:Src/main.c **** if (num==2) +2864:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + ARM GAS /tmp/ccYgfTud.s page 103 + + +2865:Src/main.c **** +2866:Src/main.c **** return (uint16_t)x_output; +2867:Src/main.c **** } +2868:Src/main.c **** +2869:Src/main.c **** +2870:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin +2871:Src/main.c **** { + 545 .loc 1 2871 1 is_stmt 1 view -0 546 .cfi_startproc 547 @ args = 0, pretend = 0, frame = 0 548 @ frame_needed = 0, uses_anonymous_args = 0 549 @ link register save eliminated. - 550 .loc 1 2525 1 is_stmt 0 view .LVU201 + 550 .loc 1 2871 1 is_stmt 0 view .LVU201 551 0000 30B4 push {r4, r5} 552 .LCFI6: 553 .cfi_def_cfa_offset 8 554 .cfi_offset 4, -8 555 .cfi_offset 5, -4 -2526:Src/main.c **** int e_pid; - 556 .loc 1 2526 2 is_stmt 1 view .LVU202 -2527:Src/main.c **** float P_coef_current;//, I_coef_current; - 557 .loc 1 2527 2 view .LVU203 -2528:Src/main.c **** float e_integral; - 558 .loc 1 2528 2 view .LVU204 -2529:Src/main.c **** int x_output; - 559 .loc 1 2529 2 view .LVU205 -2530:Src/main.c **** -2531:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; - 560 .loc 1 2531 2 view .LVU206 - 561 .loc 1 2531 28 is_stmt 0 view .LVU207 +2872:Src/main.c **** int e_pid; + 556 .loc 1 2872 2 is_stmt 1 view .LVU202 +2873:Src/main.c **** float P_coef_current;//, I_coef_current; + 557 .loc 1 2873 2 view .LVU203 +2874:Src/main.c **** float e_integral; + 558 .loc 1 2874 2 view .LVU204 +2875:Src/main.c **** int x_output; + 559 .loc 1 2875 2 view .LVU205 +2876:Src/main.c **** +2877:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; + 560 .loc 1 2877 2 view .LVU206 + 561 .loc 1 2877 28 is_stmt 0 view .LVU207 562 0002 0B88 ldrh r3, [r1] - 563 .loc 1 2531 65 view .LVU208 + 563 .loc 1 2877 65 view .LVU208 564 0004 0488 ldrh r4, [r0] - 565 .loc 1 2531 8 view .LVU209 + 565 .loc 1 2877 8 view .LVU209 566 0006 1B1B subs r3, r3, r4 567 .LVL34: -2532:Src/main.c **** -2533:Src/main.c **** e_integral = LDx_results->e_integral; - 568 .loc 1 2533 2 is_stmt 1 view .LVU210 - 569 .loc 1 2533 13 is_stmt 0 view .LVU211 +2878:Src/main.c **** +2879:Src/main.c **** e_integral = LDx_results->e_integral; + 568 .loc 1 2879 2 is_stmt 1 view .LVU210 + 569 .loc 1 2879 13 is_stmt 0 view .LVU211 570 0008 D1ED017A vldr.32 s15, [r1, #4] 571 .LVL35: -2534:Src/main.c **** -2535:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ - 572 .loc 1 2535 2 is_stmt 1 view .LVU212 - 573 .loc 1 2535 20 is_stmt 0 view .LVU213 +2880:Src/main.c **** +2881:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ + 572 .loc 1 2881 2 is_stmt 1 view .LVU212 + 573 .loc 1 2881 20 is_stmt 0 view .LVU213 574 000c 03F6B73C addw ip, r3, #2999 - 575 .loc 1 2535 4 view .LVU214 + 575 .loc 1 2881 4 view .LVU214 576 0010 41F26E74 movw r4, #5998 577 0014 A445 cmp ip, r4 578 0016 18D8 bhi .L17 -2536:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 579 .loc 1 2536 3 is_stmt 1 view .LVU215 - 580 .loc 1 2536 31 is_stmt 0 view .LVU216 +2882:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 579 .loc 1 2882 3 is_stmt 1 view .LVU215 + 580 .loc 1 2882 31 is_stmt 0 view .LVU216 581 0018 90ED027A vldr.32 s14, [r0, #8] - 582 .loc 1 2536 47 view .LVU217 + 582 .loc 1 2882 47 view .LVU217 583 001c 06EE903A vmov s13, r3 @ int + ARM GAS /tmp/ccYgfTud.s page 104 + + 584 0020 F8EEE66A vcvt.f32.s32 s13, s13 - 585 .loc 1 2536 45 view .LVU218 + 585 .loc 1 2882 45 view .LVU218 586 0024 27EE267A vmul.f32 s14, s14, s13 - 587 .loc 1 2536 76 view .LVU219 - ARM GAS /tmp/ccO46DoU.s page 98 - - + 587 .loc 1 2882 76 view .LVU219 588 0028 284C ldr r4, .L27 589 002a 2468 ldr r4, [r4] 590 002c 284D ldr r5, .L27+4 591 002e 2D68 ldr r5, [r5] 592 0030 641B subs r4, r4, r5 - 593 .loc 1 2536 64 view .LVU220 + 593 .loc 1 2882 64 view .LVU220 594 0032 06EE904A vmov s13, r4 @ int 595 0036 F8EE666A vcvt.f32.u32 s13, s13 - 596 .loc 1 2536 62 view .LVU221 + 596 .loc 1 2882 62 view .LVU221 597 003a 27EE267A vmul.f32 s14, s14, s13 - 598 .loc 1 2536 87 view .LVU222 + 598 .loc 1 2882 87 view .LVU222 599 003e 9FED256A vldr.32 s12, .L27+8 600 0042 C7EE066A vdiv.f32 s13, s14, s12 - 601 .loc 1 2536 14 view .LVU223 + 601 .loc 1 2882 14 view .LVU223 602 0046 77EEA67A vadd.f32 s15, s15, s13 603 .LVL36: 604 .L17: -2537:Src/main.c **** } -2538:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; - 605 .loc 1 2538 2 is_stmt 1 view .LVU224 - 606 .loc 1 2538 17 is_stmt 0 view .LVU225 +2883:Src/main.c **** } +2884:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; + 605 .loc 1 2884 2 is_stmt 1 view .LVU224 + 606 .loc 1 2884 17 is_stmt 0 view .LVU225 607 004a D0ED016A vldr.32 s13, [r0, #4] 608 .LVL37: -2539:Src/main.c **** -2540:Src/main.c **** if (e_integral > 32000){ - 609 .loc 1 2540 2 is_stmt 1 view .LVU226 - 610 .loc 1 2540 5 is_stmt 0 view .LVU227 +2885:Src/main.c **** +2886:Src/main.c **** if (e_integral > 32000){ + 609 .loc 1 2886 2 is_stmt 1 view .LVU226 + 610 .loc 1 2886 5 is_stmt 0 view .LVU227 611 004e 9FED227A vldr.32 s14, .L27+12 612 0052 F4EEC77A vcmpe.f32 s15, s14 613 0056 F1EE10FA vmrs APSR_nzcv, FPSCR 614 005a 09DC bgt .L21 -2541:Src/main.c **** e_integral = 32000; -2542:Src/main.c **** } -2543:Src/main.c **** else if (e_integral < - 32000){ - 615 .loc 1 2543 7 is_stmt 1 view .LVU228 - 616 .loc 1 2543 10 is_stmt 0 view .LVU229 +2887:Src/main.c **** e_integral = 32000; +2888:Src/main.c **** } +2889:Src/main.c **** else if (e_integral < - 32000){ + 615 .loc 1 2889 7 is_stmt 1 view .LVU228 + 616 .loc 1 2889 10 is_stmt 0 view .LVU229 617 005c 9FED1F7A vldr.32 s14, .L27+16 618 0060 F4EEC77A vcmpe.f32 s15, s14 619 0064 F1EE10FA vmrs APSR_nzcv, FPSCR 620 0068 04D5 bpl .L18 -2544:Src/main.c **** e_integral = -32000; - 621 .loc 1 2544 15 view .LVU230 +2890:Src/main.c **** e_integral = -32000; + 621 .loc 1 2890 15 view .LVU230 622 006a DFED1C7A vldr.32 s15, .L27+16 623 .LVL38: - 624 .loc 1 2544 15 view .LVU231 + 624 .loc 1 2890 15 view .LVU231 625 006e 01E0 b .L18 626 .LVL39: 627 .L21: -2541:Src/main.c **** e_integral = 32000; - 628 .loc 1 2541 15 view .LVU232 +2887:Src/main.c **** e_integral = 32000; + 628 .loc 1 2887 15 view .LVU232 629 0070 DFED197A vldr.32 s15, .L27+12 630 .LVL40: 631 .L18: -2545:Src/main.c **** } -2546:Src/main.c **** LDx_results->e_integral = e_integral; - 632 .loc 1 2546 2 is_stmt 1 view .LVU233 - 633 .loc 1 2546 26 is_stmt 0 view .LVU234 - ARM GAS /tmp/ccO46DoU.s page 99 + ARM GAS /tmp/ccYgfTud.s page 105 +2891:Src/main.c **** } +2892:Src/main.c **** LDx_results->e_integral = e_integral; + 632 .loc 1 2892 2 is_stmt 1 view .LVU233 + 633 .loc 1 2892 26 is_stmt 0 view .LVU234 634 0074 C1ED017A vstr.32 s15, [r1, #4] -2547:Src/main.c **** -2548:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in - 635 .loc 1 2548 2 is_stmt 1 view .LVU235 - 636 .loc 1 2548 36 is_stmt 0 view .LVU236 +2893:Src/main.c **** +2894:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in + 635 .loc 1 2894 2 is_stmt 1 view .LVU235 + 636 .loc 1 2894 36 is_stmt 0 view .LVU236 637 0078 07EE103A vmov s14, r3 @ int 638 007c B8EEC77A vcvt.f32.s32 s14, s14 639 0080 27EE267A vmul.f32 s14, s14, s13 - 640 .loc 1 2548 19 view .LVU237 + 640 .loc 1 2894 19 view .LVU237 641 0084 DFED166A vldr.32 s13, .L27+20 642 .LVL41: - 643 .loc 1 2548 19 view .LVU238 + 643 .loc 1 2894 19 view .LVU238 644 0088 37EE267A vadd.f32 s14, s14, s13 - 645 .loc 1 2548 46 view .LVU239 + 645 .loc 1 2894 46 view .LVU239 646 008c FDEEE77A vcvt.s32.f32 s15, s15 647 .LVL42: - 648 .loc 1 2548 44 view .LVU240 + 648 .loc 1 2894 44 view .LVU240 649 0090 F8EEE77A vcvt.f32.s32 s15, s15 650 0094 77EE877A vadd.f32 s15, s15, s14 - 651 .loc 1 2548 11 view .LVU241 + 651 .loc 1 2894 11 view .LVU241 652 0098 FDEEE77A vcvt.s32.f32 s15, s15 653 009c 17EE900A vmov r0, s15 @ int 654 .LVL43: -2549:Src/main.c **** -2550:Src/main.c **** if(x_output < 1000){ - 655 .loc 1 2550 2 is_stmt 1 view .LVU242 - 656 .loc 1 2550 4 is_stmt 0 view .LVU243 +2895:Src/main.c **** +2896:Src/main.c **** if(x_output < 1000){ + 655 .loc 1 2896 2 is_stmt 1 view .LVU242 + 656 .loc 1 2896 4 is_stmt 0 view .LVU243 657 00a0 B0F57A7F cmp r0, #1000 658 00a4 06DB blt .L23 -2551:Src/main.c **** x_output = 8800; -2552:Src/main.c **** } -2553:Src/main.c **** else if(x_output > 56800){ - 659 .loc 1 2553 7 is_stmt 1 view .LVU244 - 660 .loc 1 2553 9 is_stmt 0 view .LVU245 +2897:Src/main.c **** x_output = 8800; +2898:Src/main.c **** } +2899:Src/main.c **** else if(x_output > 56800){ + 659 .loc 1 2899 7 is_stmt 1 view .LVU244 + 660 .loc 1 2899 9 is_stmt 0 view .LVU245 661 00a6 4DF6E053 movw r3, #56800 662 .LVL44: - 663 .loc 1 2553 9 view .LVU246 + 663 .loc 1 2899 9 view .LVU246 664 00aa 9842 cmp r0, r3 665 00ac 04DD ble .L19 -2554:Src/main.c **** x_output = 56800; - 666 .loc 1 2554 12 view .LVU247 +2900:Src/main.c **** x_output = 56800; + 666 .loc 1 2900 12 view .LVU247 667 00ae 4DF6E050 movw r0, #56800 668 .LVL45: - 669 .loc 1 2554 12 view .LVU248 + 669 .loc 1 2900 12 view .LVU248 670 00b2 01E0 b .L19 671 .LVL46: 672 .L23: -2551:Src/main.c **** x_output = 8800; - 673 .loc 1 2551 12 view .LVU249 +2897:Src/main.c **** x_output = 8800; + 673 .loc 1 2897 12 view .LVU249 674 00b4 42F26020 movw r0, #8800 675 .LVL47: 676 .L19: -2555:Src/main.c **** } -2556:Src/main.c **** -2557:Src/main.c **** if (num==2) - 677 .loc 1 2557 2 is_stmt 1 view .LVU250 - 678 .loc 1 2557 5 is_stmt 0 view .LVU251 - ARM GAS /tmp/ccO46DoU.s page 100 +2901:Src/main.c **** } + ARM GAS /tmp/ccYgfTud.s page 106 +2902:Src/main.c **** +2903:Src/main.c **** if (num==2) + 677 .loc 1 2903 2 is_stmt 1 view .LVU250 + 678 .loc 1 2903 5 is_stmt 0 view .LVU251 679 00b8 022A cmp r2, #2 680 00ba 02D0 beq .L26 681 .LVL48: 682 .L20: -2558:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -2559:Src/main.c **** -2560:Src/main.c **** return (uint16_t)x_output; - 683 .loc 1 2560 2 is_stmt 1 view .LVU252 -2561:Src/main.c **** } - 684 .loc 1 2561 1 is_stmt 0 view .LVU253 +2904:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +2905:Src/main.c **** +2906:Src/main.c **** return (uint16_t)x_output; + 683 .loc 1 2906 2 is_stmt 1 view .LVU252 +2907:Src/main.c **** } + 684 .loc 1 2907 1 is_stmt 0 view .LVU253 685 00bc 80B2 uxth r0, r0 686 .LVL49: - 687 .loc 1 2561 1 view .LVU254 + 687 .loc 1 2907 1 view .LVU254 688 00be 30BC pop {r4, r5} 689 .LCFI7: 690 .cfi_remember_state @@ -5965,15 +6329,15 @@ ARM GAS /tmp/ccO46DoU.s page 1 696 .L26: 697 .LCFI8: 698 .cfi_restore_state -2558:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 699 .loc 1 2558 3 is_stmt 1 view .LVU255 -2558:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 700 .loc 1 2558 11 is_stmt 0 view .LVU256 +2904:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 699 .loc 1 2904 3 is_stmt 1 view .LVU255 +2904:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 700 .loc 1 2904 11 is_stmt 0 view .LVU256 701 00c2 024B ldr r3, .L27 702 00c4 1A68 ldr r2, [r3] 703 .LVL51: -2558:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 704 .loc 1 2558 11 view .LVU257 +2904:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 704 .loc 1 2904 11 view .LVU257 705 00c6 024B ldr r3, .L27+4 706 00c8 1A60 str r2, [r3] 707 00ca F7E7 b .L20 @@ -5987,476 +6351,47 @@ ARM GAS /tmp/ccO46DoU.s page 1 715 00dc 0000FAC6 .word -956694528 716 00e0 00000047 .word 1191182336 717 .cfi_endproc - 718 .LFE1215: - 720 .section .text.OUT_trigger,"ax",%progbits + 718 .LFE1221: + 720 .section .text.AD9102_WriteReg,"ax",%progbits 721 .align 1 722 .syntax unified 723 .thumb 724 .thumb_func - 726 OUT_trigger: + 726 AD9102_WriteReg: + ARM GAS /tmp/ccYgfTud.s page 107 + + 727 .LVL52: - 728 .LFB1210: -2211:Src/main.c **** switch (out_n) - 729 .loc 1 2211 1 is_stmt 1 view -0 - ARM GAS /tmp/ccO46DoU.s page 101 - - + 728 .LFB1212: +2415:Src/main.c **** uint32_t tmp32 = 0; + 729 .loc 1 2415 1 is_stmt 1 view -0 730 .cfi_startproc 731 @ args = 0, pretend = 0, frame = 0 732 @ frame_needed = 0, uses_anonymous_args = 0 -2211:Src/main.c **** switch (out_n) - 733 .loc 1 2211 1 is_stmt 0 view .LVU259 - 734 0000 10B5 push {r4, lr} +2415:Src/main.c **** uint32_t tmp32 = 0; + 733 .loc 1 2415 1 is_stmt 0 view .LVU259 + 734 0000 38B5 push {r3, r4, r5, lr} 735 .LCFI9: - 736 .cfi_def_cfa_offset 8 - 737 .cfi_offset 4, -8 - 738 .cfi_offset 14, -4 -2212:Src/main.c **** { - 739 .loc 1 2212 2 is_stmt 1 view .LVU260 - 740 0002 0928 cmp r0, #9 - 741 0004 13D8 bhi .L29 - 742 0006 DFE800F0 tbb [pc, r0] - 743 .L32: - 744 000a 05 .byte (.L41-.L32)/2 - 745 000b 13 .byte (.L40-.L32)/2 - 746 000c 21 .byte (.L39-.L32)/2 - 747 000d 2F .byte (.L38-.L32)/2 - 748 000e 3D .byte (.L37-.L32)/2 - 749 000f 4B .byte (.L36-.L32)/2 - 750 0010 59 .byte (.L35-.L32)/2 - 751 0011 65 .byte (.L34-.L32)/2 - 752 0012 71 .byte (.L33-.L32)/2 - 753 0013 7D .byte (.L31-.L32)/2 - 754 .p2align 1 - 755 .L41: -2215:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 756 .loc 1 2215 3 view .LVU261 - 757 0014 414C ldr r4, .L44 - 758 0016 0122 movs r2, #1 - 759 0018 4FF48061 mov r1, #1024 - 760 001c 2046 mov r0, r4 - 761 .LVL53: -2215:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 762 .loc 1 2215 3 is_stmt 0 view .LVU262 - 763 001e FFF7FEFF bl HAL_GPIO_WritePin - 764 .LVL54: -2216:Src/main.c **** break; - 765 .loc 1 2216 3 is_stmt 1 view .LVU263 - 766 0022 0022 movs r2, #0 - 767 0024 4FF48061 mov r1, #1024 - 768 0028 2046 mov r0, r4 - 769 002a FFF7FEFF bl HAL_GPIO_WritePin - 770 .LVL55: -2217:Src/main.c **** - 771 .loc 1 2217 2 view .LVU264 - 772 .L29: -2264:Src/main.c **** - 773 .loc 1 2264 1 is_stmt 0 view .LVU265 - 774 002e 10BD pop {r4, pc} - 775 .LVL56: - 776 .L40: -2220:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 777 .loc 1 2220 3 is_stmt 1 view .LVU266 - 778 0030 3A4C ldr r4, .L44 - ARM GAS /tmp/ccO46DoU.s page 102 - - - 779 0032 0122 movs r2, #1 - 780 0034 4FF40061 mov r1, #2048 - 781 0038 2046 mov r0, r4 - 782 .LVL57: -2220:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 783 .loc 1 2220 3 is_stmt 0 view .LVU267 - 784 003a FFF7FEFF bl HAL_GPIO_WritePin - 785 .LVL58: -2221:Src/main.c **** break; - 786 .loc 1 2221 3 is_stmt 1 view .LVU268 - 787 003e 0022 movs r2, #0 - 788 0040 4FF40061 mov r1, #2048 - 789 0044 2046 mov r0, r4 - 790 0046 FFF7FEFF bl HAL_GPIO_WritePin - 791 .LVL59: -2222:Src/main.c **** - 792 .loc 1 2222 2 view .LVU269 - 793 004a F0E7 b .L29 - 794 .LVL60: - 795 .L39: -2225:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 796 .loc 1 2225 3 view .LVU270 - 797 004c 334C ldr r4, .L44 - 798 004e 0122 movs r2, #1 - 799 0050 4FF48051 mov r1, #4096 - 800 0054 2046 mov r0, r4 - 801 .LVL61: -2225:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 802 .loc 1 2225 3 is_stmt 0 view .LVU271 - 803 0056 FFF7FEFF bl HAL_GPIO_WritePin - 804 .LVL62: -2226:Src/main.c **** break; - 805 .loc 1 2226 3 is_stmt 1 view .LVU272 - 806 005a 0022 movs r2, #0 - 807 005c 4FF48051 mov r1, #4096 - 808 0060 2046 mov r0, r4 - 809 0062 FFF7FEFF bl HAL_GPIO_WritePin - 810 .LVL63: -2227:Src/main.c **** - 811 .loc 1 2227 2 view .LVU273 - 812 0066 E2E7 b .L29 - 813 .LVL64: - 814 .L38: -2230:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 815 .loc 1 2230 3 view .LVU274 - 816 0068 2C4C ldr r4, .L44 - 817 006a 0122 movs r2, #1 - 818 006c 4FF40051 mov r1, #8192 - 819 0070 2046 mov r0, r4 - 820 .LVL65: -2230:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 821 .loc 1 2230 3 is_stmt 0 view .LVU275 - 822 0072 FFF7FEFF bl HAL_GPIO_WritePin - 823 .LVL66: -2231:Src/main.c **** break; - 824 .loc 1 2231 3 is_stmt 1 view .LVU276 - 825 0076 0022 movs r2, #0 - ARM GAS /tmp/ccO46DoU.s page 103 - - - 826 0078 4FF40051 mov r1, #8192 - 827 007c 2046 mov r0, r4 - 828 007e FFF7FEFF bl HAL_GPIO_WritePin - 829 .LVL67: -2232:Src/main.c **** - 830 .loc 1 2232 2 view .LVU277 - 831 0082 D4E7 b .L29 - 832 .LVL68: - 833 .L37: -2235:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 834 .loc 1 2235 3 view .LVU278 - 835 0084 254C ldr r4, .L44 - 836 0086 0122 movs r2, #1 - 837 0088 4FF48041 mov r1, #16384 - 838 008c 2046 mov r0, r4 - 839 .LVL69: -2235:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 840 .loc 1 2235 3 is_stmt 0 view .LVU279 - 841 008e FFF7FEFF bl HAL_GPIO_WritePin - 842 .LVL70: -2236:Src/main.c **** break; - 843 .loc 1 2236 3 is_stmt 1 view .LVU280 - 844 0092 0022 movs r2, #0 - 845 0094 4FF48041 mov r1, #16384 - 846 0098 2046 mov r0, r4 - 847 009a FFF7FEFF bl HAL_GPIO_WritePin - 848 .LVL71: -2237:Src/main.c **** - 849 .loc 1 2237 2 view .LVU281 - 850 009e C6E7 b .L29 - 851 .LVL72: - 852 .L36: -2240:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 853 .loc 1 2240 3 view .LVU282 - 854 00a0 1E4C ldr r4, .L44 - 855 00a2 0122 movs r2, #1 - 856 00a4 4FF40041 mov r1, #32768 - 857 00a8 2046 mov r0, r4 - 858 .LVL73: -2240:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 859 .loc 1 2240 3 is_stmt 0 view .LVU283 - 860 00aa FFF7FEFF bl HAL_GPIO_WritePin - 861 .LVL74: -2241:Src/main.c **** break; - 862 .loc 1 2241 3 is_stmt 1 view .LVU284 - 863 00ae 0022 movs r2, #0 - 864 00b0 4FF40041 mov r1, #32768 - 865 00b4 2046 mov r0, r4 - 866 00b6 FFF7FEFF bl HAL_GPIO_WritePin - 867 .LVL75: -2242:Src/main.c **** - 868 .loc 1 2242 2 view .LVU285 - 869 00ba B8E7 b .L29 - 870 .LVL76: - 871 .L35: -2245:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 872 .loc 1 2245 3 view .LVU286 - ARM GAS /tmp/ccO46DoU.s page 104 - - - 873 00bc 184C ldr r4, .L44+4 - 874 00be 0122 movs r2, #1 - 875 00c0 1021 movs r1, #16 - 876 00c2 2046 mov r0, r4 - 877 .LVL77: -2245:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 878 .loc 1 2245 3 is_stmt 0 view .LVU287 - 879 00c4 FFF7FEFF bl HAL_GPIO_WritePin - 880 .LVL78: -2246:Src/main.c **** break; - 881 .loc 1 2246 3 is_stmt 1 view .LVU288 - 882 00c8 0022 movs r2, #0 - 883 00ca 1021 movs r1, #16 - 884 00cc 2046 mov r0, r4 - 885 00ce FFF7FEFF bl HAL_GPIO_WritePin - 886 .LVL79: -2247:Src/main.c **** - 887 .loc 1 2247 2 view .LVU289 - 888 00d2 ACE7 b .L29 - 889 .LVL80: - 890 .L34: -2250:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 891 .loc 1 2250 3 view .LVU290 - 892 00d4 124C ldr r4, .L44+4 - 893 00d6 0122 movs r2, #1 - 894 00d8 2021 movs r1, #32 - 895 00da 2046 mov r0, r4 - 896 .LVL81: -2250:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 897 .loc 1 2250 3 is_stmt 0 view .LVU291 - 898 00dc FFF7FEFF bl HAL_GPIO_WritePin - 899 .LVL82: -2251:Src/main.c **** break; - 900 .loc 1 2251 3 is_stmt 1 view .LVU292 - 901 00e0 0022 movs r2, #0 - 902 00e2 2021 movs r1, #32 - 903 00e4 2046 mov r0, r4 - 904 00e6 FFF7FEFF bl HAL_GPIO_WritePin - 905 .LVL83: -2252:Src/main.c **** - 906 .loc 1 2252 2 view .LVU293 - 907 00ea A0E7 b .L29 - 908 .LVL84: - 909 .L33: -2255:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 910 .loc 1 2255 3 view .LVU294 - 911 00ec 0C4C ldr r4, .L44+4 - 912 00ee 0122 movs r2, #1 - 913 00f0 4021 movs r1, #64 - 914 00f2 2046 mov r0, r4 - 915 .LVL85: -2255:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 916 .loc 1 2255 3 is_stmt 0 view .LVU295 - 917 00f4 FFF7FEFF bl HAL_GPIO_WritePin - 918 .LVL86: -2256:Src/main.c **** break; - 919 .loc 1 2256 3 is_stmt 1 view .LVU296 - ARM GAS /tmp/ccO46DoU.s page 105 - - - 920 00f8 0022 movs r2, #0 - 921 00fa 4021 movs r1, #64 - 922 00fc 2046 mov r0, r4 - 923 00fe FFF7FEFF bl HAL_GPIO_WritePin - 924 .LVL87: -2257:Src/main.c **** - 925 .loc 1 2257 2 view .LVU297 - 926 0102 94E7 b .L29 - 927 .LVL88: - 928 .L31: -2260:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 929 .loc 1 2260 3 view .LVU298 - 930 0104 064C ldr r4, .L44+4 - 931 0106 0122 movs r2, #1 - 932 0108 8021 movs r1, #128 - 933 010a 2046 mov r0, r4 - 934 .LVL89: -2260:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 935 .loc 1 2260 3 is_stmt 0 view .LVU299 - 936 010c FFF7FEFF bl HAL_GPIO_WritePin - 937 .LVL90: -2261:Src/main.c **** break; - 938 .loc 1 2261 3 is_stmt 1 view .LVU300 - 939 0110 0022 movs r2, #0 - 940 0112 8021 movs r1, #128 - 941 0114 2046 mov r0, r4 - 942 0116 FFF7FEFF bl HAL_GPIO_WritePin - 943 .LVL91: -2262:Src/main.c **** } - 944 .loc 1 2262 2 view .LVU301 -2264:Src/main.c **** - 945 .loc 1 2264 1 is_stmt 0 view .LVU302 - 946 011a 88E7 b .L29 - 947 .L45: - 948 .align 2 - 949 .L44: - 950 011c 00180240 .word 1073879040 - 951 0120 00040240 .word 1073873920 - 952 .cfi_endproc - 953 .LFE1210: - 955 .section .text.MPhD_T,"ax",%progbits - 956 .align 1 - 957 .syntax unified - 958 .thumb - 959 .thumb_func - 961 MPhD_T: - 962 .LVL92: - 963 .LFB1212: -2324:Src/main.c **** uint16_t P; - 964 .loc 1 2324 1 is_stmt 1 view -0 - 965 .cfi_startproc - 966 @ args = 0, pretend = 0, frame = 0 - 967 @ frame_needed = 0, uses_anonymous_args = 0 -2324:Src/main.c **** uint16_t P; - 968 .loc 1 2324 1 is_stmt 0 view .LVU304 - 969 0000 38B5 push {r3, r4, r5, lr} - 970 .LCFI10: - ARM GAS /tmp/ccO46DoU.s page 106 - - - 971 .cfi_def_cfa_offset 16 - 972 .cfi_offset 3, -16 - 973 .cfi_offset 4, -12 - 974 .cfi_offset 5, -8 - 975 .cfi_offset 14, -4 - 976 0002 0446 mov r4, r0 -2325:Src/main.c **** uint32_t tmp32; - 977 .loc 1 2325 2 is_stmt 1 view .LVU305 -2326:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 978 .loc 1 2326 2 view .LVU306 -2327:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 979 .loc 1 2327 2 view .LVU307 - 980 0004 0022 movs r2, #0 - 981 0006 4FF48041 mov r1, #16384 - 982 000a 8148 ldr r0, .L87 - 983 .LVL93: -2327:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 984 .loc 1 2327 2 is_stmt 0 view .LVU308 - 985 000c FFF7FEFF bl HAL_GPIO_WritePin - 986 .LVL94: -2328:Src/main.c **** tmp32=0; - 987 .loc 1 2328 2 is_stmt 1 view .LVU309 - 988 0010 0022 movs r2, #0 - 989 0012 4FF40071 mov r1, #512 - 990 0016 7F48 ldr r0, .L87+4 - 991 0018 FFF7FEFF bl HAL_GPIO_WritePin - 992 .LVL95: -2329:Src/main.c **** while(tmp32<500){tmp32++;} - 993 .loc 1 2329 2 view .LVU310 -2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 994 .loc 1 2330 2 view .LVU311 -2329:Src/main.c **** while(tmp32<500){tmp32++;} - 995 .loc 1 2329 7 is_stmt 0 view .LVU312 - 996 001c 0023 movs r3, #0 -2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 997 .loc 1 2330 7 view .LVU313 - 998 001e 00E0 b .L47 - 999 .LVL96: - 1000 .L48: -2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1001 .loc 1 2330 19 is_stmt 1 discriminator 2 view .LVU314 -2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1002 .loc 1 2330 24 is_stmt 0 discriminator 2 view .LVU315 - 1003 0020 0133 adds r3, r3, #1 - 1004 .LVL97: - 1005 .L47: -2330:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1006 .loc 1 2330 13 is_stmt 1 discriminator 1 view .LVU316 - 1007 0022 B3F5FA7F cmp r3, #500 - 1008 0026 FBD3 bcc .L48 -2331:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1009 .loc 1 2331 2 view .LVU317 - 1010 0028 0122 movs r2, #1 - 1011 002a 4FF48041 mov r1, #16384 - 1012 002e 7848 ldr r0, .L87 - 1013 0030 FFF7FEFF bl HAL_GPIO_WritePin - 1014 .LVL98: - ARM GAS /tmp/ccO46DoU.s page 107 - - -2332:Src/main.c **** tmp32=0; - 1015 .loc 1 2332 2 view .LVU318 - 1016 0034 0122 movs r2, #1 - 1017 0036 4FF40071 mov r1, #512 - 1018 003a 7648 ldr r0, .L87+4 - 1019 003c FFF7FEFF bl HAL_GPIO_WritePin - 1020 .LVL99: -2333:Src/main.c **** while(tmp32<500){tmp32++;} - 1021 .loc 1 2333 2 view .LVU319 -2334:Src/main.c **** if (num==1)//MPD1 - 1022 .loc 1 2334 2 view .LVU320 -2333:Src/main.c **** while(tmp32<500){tmp32++;} - 1023 .loc 1 2333 7 is_stmt 0 view .LVU321 - 1024 0040 0023 movs r3, #0 -2334:Src/main.c **** if (num==1)//MPD1 - 1025 .loc 1 2334 7 view .LVU322 - 1026 0042 00E0 b .L49 - 1027 .LVL100: - 1028 .L50: -2334:Src/main.c **** if (num==1)//MPD1 - 1029 .loc 1 2334 19 is_stmt 1 discriminator 2 view .LVU323 -2334:Src/main.c **** if (num==1)//MPD1 - 1030 .loc 1 2334 24 is_stmt 0 discriminator 2 view .LVU324 - 1031 0044 0133 adds r3, r3, #1 - 1032 .LVL101: - 1033 .L49: -2334:Src/main.c **** if (num==1)//MPD1 - 1034 .loc 1 2334 13 is_stmt 1 discriminator 1 view .LVU325 - 1035 0046 B3F5FA7F cmp r3, #500 - 1036 004a FBD3 bcc .L50 -2335:Src/main.c **** { - 1037 .loc 1 2335 2 view .LVU326 - 1038 004c 631E subs r3, r4, #1 - 1039 .LVL102: -2335:Src/main.c **** { - 1040 .loc 1 2335 2 is_stmt 0 view .LVU327 - 1041 004e 032B cmp r3, #3 - 1042 0050 39D8 bhi .L51 - 1043 0052 DFE803F0 tbb [pc, r3] - 1044 .L53: - 1045 0056 02 .byte (.L56-.L53)/2 - 1046 0057 3A .byte (.L55-.L53)/2 - 1047 0058 6F .byte (.L54-.L53)/2 - 1048 0059 A6 .byte (.L52-.L53)/2 - 1049 .p2align 1 - 1050 .L56: -2337:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 1051 .loc 1 2337 3 is_stmt 1 view .LVU328 - 1052 005a 6D4C ldr r4, .L87 - 1053 .LVL103: -2337:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 1054 .loc 1 2337 3 is_stmt 0 view .LVU329 - 1055 005c 0122 movs r2, #1 - 1056 005e 4FF40061 mov r1, #2048 - 1057 0062 2046 mov r0, r4 - 1058 0064 FFF7FEFF bl HAL_GPIO_WritePin - 1059 .LVL104: - ARM GAS /tmp/ccO46DoU.s page 108 - - -2338:Src/main.c **** tmp32=0; - 1060 .loc 1 2338 3 is_stmt 1 view .LVU330 - 1061 0068 0022 movs r2, #0 - 1062 006a 4FF48061 mov r1, #1024 - 1063 006e 2046 mov r0, r4 - 1064 0070 FFF7FEFF bl HAL_GPIO_WritePin - 1065 .LVL105: -2339:Src/main.c **** while(tmp32<500){tmp32++;} - 1066 .loc 1 2339 3 view .LVU331 -2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1067 .loc 1 2340 3 view .LVU332 -2339:Src/main.c **** while(tmp32<500){tmp32++;} - 1068 .loc 1 2339 8 is_stmt 0 view .LVU333 - 1069 0074 0023 movs r3, #0 -2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1070 .loc 1 2340 8 view .LVU334 - 1071 0076 00E0 b .L57 - 1072 .LVL106: - 1073 .L58: -2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1074 .loc 1 2340 20 is_stmt 1 discriminator 2 view .LVU335 -2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1075 .loc 1 2340 25 is_stmt 0 discriminator 2 view .LVU336 - 1076 0078 0133 adds r3, r3, #1 - 1077 .LVL107: - 1078 .L57: -2340:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1079 .loc 1 2340 14 is_stmt 1 discriminator 1 view .LVU337 - 1080 007a B3F5FA7F cmp r3, #500 - 1081 007e FBD3 bcc .L58 -2342:Src/main.c **** tmp32 = 0; - 1082 .loc 1 2342 3 view .LVU338 - 1083 .LVL108: - 1084 .LBB302: - 1085 .LBI302: - 1086 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h" + 736 .cfi_def_cfa_offset 16 + 737 .cfi_offset 3, -16 + 738 .cfi_offset 4, -12 + 739 .cfi_offset 5, -8 + 740 .cfi_offset 14, -4 + 741 0002 0C46 mov r4, r1 +2416:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address + 742 .loc 1 2416 2 is_stmt 1 view .LVU260 + 743 .LVL53: +2417:Src/main.c **** + 744 .loc 1 2417 2 view .LVU261 +2417:Src/main.c **** + 745 .loc 1 2417 11 is_stmt 0 view .LVU262 + 746 0004 C0F30E05 ubfx r5, r0, #0, #15 + 747 .LVL54: +2419:Src/main.c **** { + 748 .loc 1 2419 2 is_stmt 1 view .LVU263 + 749 .LBB337: + 750 .LBI337: + 751 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @file stm32f7xx_ll_spi.h @@ -6478,14 +6413,14 @@ ARM GAS /tmp/ccO46DoU.s page 1 19:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 20:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #ifndef STM32F7xx_LL_SPI_H 21:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define STM32F7xx_LL_SPI_H - ARM GAS /tmp/ccO46DoU.s page 109 - - 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #ifdef __cplusplus 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** extern "C" { 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif 26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + ARM GAS /tmp/ccYgfTud.s page 108 + + 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Includes ------------------------------------------------------------------*/ 28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #include "stm32f7xx.h" 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6538,14 +6473,14 @@ ARM GAS /tmp/ccO46DoU.s page 1 76:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_PHASE. 77:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 78:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func - ARM GAS /tmp/ccO46DoU.s page 110 - - 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (N 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_NSS_MODE. 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func + ARM GAS /tmp/ccYgfTud.s page 109 + + 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t BaudRate; /*!< Specifies the BaudRate prescaler value which will be used 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_BAUDRATEPR @@ -6598,14 +6533,14 @@ ARM GAS /tmp/ccO46DoU.s page 1 133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_IT IT Defines 134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief IT defines which can be used with LL_SPI_ReadReg and LL_SPI_WriteReg functions 135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ - ARM GAS /tmp/ccO46DoU.s page 111 - - 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_RXNEIE SPI_CR2_RXNEIE /*!< Rx buffer not empty inter 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_TXEIE SPI_CR2_TXEIE /*!< Tx buffer empty interrupt 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_ERRIE SPI_CR2_ERRIE /*!< Error interrupt enable 140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** + ARM GAS /tmp/ccYgfTud.s page 110 + + 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6658,14 +6593,14 @@ ARM GAS /tmp/ccO46DoU.s page 1 190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_BAUDRATEPRESCALER_DIV256 (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0) /*!< Baud 191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} - ARM GAS /tmp/ccO46DoU.s page 112 - - 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccYgfTud.s page 111 + + 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_LSB_FIRST (SPI_CR1_LSBFIRST) /*!< Data is transmitted/recei 199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_MSB_FIRST 0x00000000U /*!< Data is transmitted/recei 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -6718,14 +6653,14 @@ ARM GAS /tmp/ccO46DoU.s page 1 247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CRCCALCULATION_DISABLE 0x00000000U /*!< CRC calculation disabled - ARM GAS /tmp/ccO46DoU.s page 113 - - 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CRCCALCULATION_ENABLE (SPI_CR1_CRCEN) /*!< CRC calculation enabled 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif /* USE_FULL_LL_DRIVER */ + ARM GAS /tmp/ccYgfTud.s page 112 + + 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_CRC_LENGTH CRC Length 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -6778,14 +6713,14 @@ ARM GAS /tmp/ccO46DoU.s page 1 304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/ccO46DoU.s page 114 - - 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported macro ------------------------------------------------------------*/ 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_Exported_Macros SPI Exported Macros + ARM GAS /tmp/ccYgfTud.s page 113 + + 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6833,37 +6768,8 @@ ARM GAS /tmp/ccO46DoU.s page 1 356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_Enable(SPI_TypeDef *SPIx) - 1087 .loc 4 358 22 view .LVU339 - 1088 .LBB303: 359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR1, SPI_CR1_SPE); - 1089 .loc 4 360 3 view .LVU340 - ARM GAS /tmp/ccO46DoU.s page 115 - - - 1090 0080 654A ldr r2, .L87+8 - 1091 0082 1368 ldr r3, [r2] - 1092 .LVL109: - 1093 .loc 4 360 3 is_stmt 0 view .LVU341 - 1094 0084 43F04003 orr r3, r3, #64 - 1095 0088 1360 str r3, [r2] - 1096 .LVL110: - 1097 .loc 4 360 3 view .LVU342 - 1098 .LBE303: - 1099 .LBE302: -2343:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1100 .loc 1 2343 3 is_stmt 1 view .LVU343 -2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1101 .loc 1 2344 3 view .LVU344 -2343:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1102 .loc 1 2343 9 is_stmt 0 view .LVU345 - 1103 008a 0023 movs r3, #0 - 1104 .LVL111: - 1105 .L59: -2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1106 .loc 1 2344 43 is_stmt 1 discriminator 1 view .LVU346 - 1107 .LBB304: - 1108 .LBI304: 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -6872,6 +6778,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 SPE LL_SPI_Disable 367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None + ARM GAS /tmp/ccYgfTud.s page 114 + + 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_Disable(SPI_TypeDef *SPIx) 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -6885,8 +6794,69 @@ ARM GAS /tmp/ccO46DoU.s page 1 379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx) + 752 .loc 4 381 26 view .LVU264 + 753 .LBB338: 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL); + 754 .loc 4 383 3 view .LVU265 + 755 .loc 4 383 12 is_stmt 0 view .LVU266 + 756 0008 274B ldr r3, .L44 + 757 000a 1B68 ldr r3, [r3] + 758 .loc 4 383 69 view .LVU267 + 759 000c 13F0400F tst r3, #64 + 760 0010 04D1 bne .L30 + 761 .LVL55: + 762 .loc 4 383 69 view .LVU268 + 763 .LBE338: + 764 .LBE337: +2421:Src/main.c **** } + 765 .loc 1 2421 3 is_stmt 1 view .LVU269 + 766 .LBB339: + 767 .LBI339: + 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 768 .loc 4 358 22 view .LVU270 + 769 .LBB340: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 770 .loc 4 360 3 view .LVU271 + 771 0012 254A ldr r2, .L44 + 772 0014 1368 ldr r3, [r2] + 773 0016 43F04003 orr r3, r3, #64 + 774 001a 1360 str r3, [r2] + 775 .LVL56: + 776 .L30: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 777 .loc 4 360 3 is_stmt 0 view .LVU272 + 778 .LBE340: + 779 .LBE339: +2424:Src/main.c **** + 780 .loc 1 2424 2 is_stmt 1 view .LVU273 + 781 001c 0022 movs r2, #0 + 782 001e 4FF48051 mov r1, #4096 + 783 .LVL57: +2424:Src/main.c **** + 784 .loc 1 2424 2 is_stmt 0 view .LVU274 + 785 0022 2248 ldr r0, .L44+4 + 786 .LVL58: +2424:Src/main.c **** + ARM GAS /tmp/ccYgfTud.s page 115 + + + 787 .loc 1 2424 2 view .LVU275 + 788 0024 FFF7FEFF bl HAL_GPIO_WritePin + 789 .LVL59: +2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 790 .loc 1 2426 2 is_stmt 1 view .LVU276 +2416:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address + 791 .loc 1 2416 11 is_stmt 0 view .LVU277 + 792 0028 0023 movs r3, #0 + 793 .LVL60: + 794 .L32: +2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 795 .loc 1 2426 63 is_stmt 1 discriminator 2 view .LVU278 +2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 796 .loc 1 2426 41 discriminator 2 view .LVU279 + 797 .LBB341: + 798 .LBI341: 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -6898,9 +6868,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Mode This parameter can be one of the following values: 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MODE_MASTER 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MODE_SLAVE - ARM GAS /tmp/ccO46DoU.s page 116 - - 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetMode(SPI_TypeDef *SPIx, uint32_t Mode) @@ -6931,6 +6898,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PROTOCOL_MOTOROLA 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PROTOCOL_TI 424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None + ARM GAS /tmp/ccYgfTud.s page 116 + + 425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard) 427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -6958,9 +6928,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param ClockPhase This parameter can be one of the following values: 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PHASE_1EDGE - ARM GAS /tmp/ccO46DoU.s page 117 - - 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PHASE_2EDGE 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -6991,6 +6958,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param ClockPolarity This parameter can be one of the following values: 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_POLARITY_LOW 481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_POLARITY_HIGH + ARM GAS /tmp/ccYgfTud.s page 117 + + 482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) @@ -7018,9 +6988,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param BaudRate This parameter can be one of the following values: 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2 - ARM GAS /tmp/ccO46DoU.s page 118 - - 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV8 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV16 @@ -7051,6 +7018,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx) 538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + ARM GAS /tmp/ccYgfTud.s page 118 + + 539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_BR)); 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -7078,9 +7048,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MSB_FIRST 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetTransferBitOrder(SPI_TypeDef *SPIx) - ARM GAS /tmp/ccO46DoU.s page 119 - - 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_LSBFIRST)); 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -7111,6 +7078,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIMODE LL_SPI_GetTransferDirection\n 594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIOE LL_SPI_GetTransferDirection 595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance + ARM GAS /tmp/ccYgfTud.s page 119 + + 596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_FULL_DUPLEX 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_SIMPLEX_RX @@ -7138,9 +7108,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_12BIT 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_13BIT 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_14BIT - ARM GAS /tmp/ccO46DoU.s page 120 - - 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_15BIT 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_16BIT 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None @@ -7171,6 +7138,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx) 652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + ARM GAS /tmp/ccYgfTud.s page 120 + + 653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DS)); 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -7198,9 +7168,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetRxFIFOThreshold(SPI_TypeDef *SPIx) 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccO46DoU.s page 121 - - 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRXTH)); 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -7231,6 +7198,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccYgfTud.s page 121 + + 710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableCRC(SPI_TypeDef *SPIx) 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR1, SPI_CR1_CRCEN); @@ -7258,9 +7228,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_CRC_16BIT 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccO46DoU.s page 122 - - 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetCRCWidth(SPI_TypeDef *SPIx, uint32_t CRCLength) 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_CRCL, CRCLength); @@ -7291,6 +7258,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR1, SPI_CR1_CRCNEXT); 765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + ARM GAS /tmp/ccYgfTud.s page 122 + + 767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set polynomial for CRC calculation 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CRCPR CRCPOLY LL_SPI_SetCRCPolynomial @@ -7318,9 +7288,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get Rx CRC 792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll RXCRCR RXCRC LL_SPI_GetRxCRC 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccO46DoU.s page 123 - - 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx) @@ -7351,6 +7318,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set NSS mode 822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note LL_SPI_NSS_SOFT Mode is not used in SPI TI mode. 823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 SSM LL_SPI_SetNSSMode\n + ARM GAS /tmp/ccYgfTud.s page 123 + + 824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 SSOE LL_SPI_SetNSSMode 825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param NSS This parameter can be one of the following values: @@ -7378,9 +7348,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetNSSMode(SPI_TypeDef *SPIx) 849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t Ssm = (READ_BIT(SPIx->CR1, SPI_CR1_SSM)); - ARM GAS /tmp/ccO46DoU.s page 124 - - 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U); 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (Ssm | Ssoe); 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -7411,6 +7378,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if NSS pulse is enabled + ARM GAS /tmp/ccYgfTud.s page 124 + + 881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should not be changed when communication is ongoing. This bit is not used in S 882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 NSSP LL_SPI_IsEnabledNSSPulse 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance @@ -7436,94 +7406,8 @@ ARM GAS /tmp/ccO46DoU.s page 1 903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx) - 1109 .loc 4 905 26 view .LVU347 - 1110 .LBB305: - ARM GAS /tmp/ccO46DoU.s page 125 - - 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE)) ? 1UL : 0UL); - 1111 .loc 4 907 3 view .LVU348 - 1112 .loc 4 907 12 is_stmt 0 view .LVU349 - 1113 008c 624A ldr r2, .L87+8 - 1114 008e 9268 ldr r2, [r2, #8] - 1115 .loc 4 907 68 view .LVU350 - 1116 0090 12F0010F tst r2, #1 - 1117 0094 04D1 bne .L60 - 1118 .LVL112: - 1119 .loc 4 907 68 view .LVU351 - 1120 .LBE305: - 1121 .LBE304: -2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1122 .loc 1 2344 43 discriminator 2 view .LVU352 - 1123 0096 B3F57A7F cmp r3, #1000 - 1124 009a 01D8 bhi .L60 -2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1125 .loc 1 2344 62 is_stmt 1 discriminator 3 view .LVU353 -2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1126 .loc 1 2344 67 is_stmt 0 discriminator 3 view .LVU354 - 1127 009c 0133 adds r3, r3, #1 - 1128 .LVL113: -2344:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1129 .loc 1 2344 67 discriminator 3 view .LVU355 - 1130 009e F5E7 b .L59 - 1131 .L60: -2345:Src/main.c **** while(tmp32<500){tmp32++;} - 1132 .loc 1 2345 3 is_stmt 1 view .LVU356 - 1133 .LVL114: - 1134 .LBB306: - 1135 .LBI306: - 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1136 .loc 4 370 22 view .LVU357 - 1137 .LBB307: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1138 .loc 4 372 3 view .LVU358 - 1139 00a0 5D49 ldr r1, .L87+8 - 1140 00a2 0A68 ldr r2, [r1] - 1141 00a4 22F04002 bic r2, r2, #64 - 1142 00a8 0A60 str r2, [r1] - 1143 .LVL115: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1144 .loc 4 372 3 is_stmt 0 view .LVU359 - 1145 .LBE307: - 1146 .LBE306: -2346:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1147 .loc 1 2346 3 is_stmt 1 view .LVU360 - 1148 .LBB309: - 1149 .LBB308: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 1150 .loc 4 373 1 is_stmt 0 view .LVU361 - 1151 00aa 00E0 b .L62 - 1152 .L63: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 1153 .loc 4 373 1 view .LVU362 - 1154 .LBE308: - ARM GAS /tmp/ccO46DoU.s page 126 - - - 1155 .LBE309: -2346:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1156 .loc 1 2346 20 is_stmt 1 discriminator 2 view .LVU363 -2346:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1157 .loc 1 2346 25 is_stmt 0 discriminator 2 view .LVU364 - 1158 00ac 0133 adds r3, r3, #1 - 1159 .LVL116: - 1160 .L62: -2346:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1161 .loc 1 2346 14 is_stmt 1 discriminator 1 view .LVU365 - 1162 00ae B3F5FA7F cmp r3, #500 - 1163 00b2 FBD3 bcc .L63 -2348:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 1164 .loc 1 2348 3 view .LVU366 - 1165 00b4 0122 movs r2, #1 - 1166 00b6 4FF48061 mov r1, #1024 - 1167 00ba 5548 ldr r0, .L87 - 1168 00bc FFF7FEFF bl HAL_GPIO_WritePin - 1169 .LVL117: -2349:Src/main.c **** } - 1170 .loc 1 2349 3 view .LVU367 - 1171 .LBB310: - 1172 .LBI310: 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7533,8 +7417,42 @@ ARM GAS /tmp/ccO46DoU.s page 1 914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx) + 799 .loc 4 916 26 view .LVU280 + 800 .LBB342: 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL); + 801 .loc 4 918 3 view .LVU281 + 802 .loc 4 918 12 is_stmt 0 view .LVU282 + 803 002a 1F4A ldr r2, .L44 + 804 002c 9268 ldr r2, [r2, #8] + 805 .loc 4 918 66 view .LVU283 + 806 002e 12F0020F tst r2, #2 + 807 0032 05D1 bne .L31 + 808 .LVL61: + 809 .loc 4 918 66 view .LVU284 + 810 .LBE342: + 811 .LBE341: +2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 812 .loc 1 2426 50 discriminator 1 view .LVU285 + 813 0034 5A1C adds r2, r3, #1 + 814 .LVL62: +2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 815 .loc 1 2426 41 discriminator 1 view .LVU286 + ARM GAS /tmp/ccYgfTud.s page 125 + + + 816 0036 B3F57A7F cmp r3, #1000 + 817 003a 01D2 bcs .L31 +2426:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 818 .loc 1 2426 50 discriminator 1 view .LVU287 + 819 003c 1346 mov r3, r2 + 820 003e F4E7 b .L32 + 821 .LVL63: + 822 .L31: +2427:Src/main.c **** tmp32 = 0; + 823 .loc 1 2427 2 is_stmt 1 view .LVU288 + 824 .LBB343: + 825 .LBI343: 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7558,9 +7476,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)) ? 1UL : 0UL); 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccO46DoU.s page 127 - - 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get overrun error flag @@ -7583,6 +7498,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * -In Slave mode, when the BSY flag is set to '0' for at least one SPI clock cycle between 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * each data transfer. 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR BSY LL_SPI_IsActiveFlag_BSY + ARM GAS /tmp/ccYgfTud.s page 126 + + 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -7618,9 +7536,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/ccO46DoU.s page 128 - - 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get FIFO Transmission Level 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR FTLVL LL_SPI_GetTxFIFOLevel 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance @@ -7643,6 +7558,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx) 1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + ARM GAS /tmp/ccYgfTud.s page 127 + + 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->SR, SPI_SR_CRCERR); 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -7678,9 +7596,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** tmpreg = SPIx->SR; 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** (void) tmpreg; 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccO46DoU.s page 129 - - 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear frame format error flag @@ -7703,6 +7618,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_IT_Management Interrupt Management 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccYgfTud.s page 128 + + 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable error interrupt @@ -7738,9 +7656,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_TXEIE); 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccO46DoU.s page 130 - - 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable error interrupt 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR @@ -7763,6 +7678,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE); 1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccYgfTud.s page 129 + + 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable Tx buffer empty interrupt @@ -7798,9 +7716,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/ccO46DoU.s page 131 - - 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if Tx buffer empty interrupt 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXEIE LL_SPI_IsEnabledIT_TXE 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance @@ -7823,6 +7738,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable DMA Rx 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXDMAEN LL_SPI_EnableDMAReq_RX 1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance + ARM GAS /tmp/ccYgfTud.s page 130 + + 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx) @@ -7858,9 +7776,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccO46DoU.s page 132 - - 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableDMAReq_TX(SPI_TypeDef *SPIx) 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN); @@ -7883,6 +7798,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccYgfTud.s page 131 + + 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx) 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL); @@ -7918,9 +7836,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set parity of Last DMA transmission 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 LDMATX LL_SPI_SetDMAParity_TX - ARM GAS /tmp/ccO46DoU.s page 133 - - 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Parity This parameter can be one of the following values: 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_ODD @@ -7943,6 +7858,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_TX(SPI_TypeDef *SPIx) 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMATX) >> SPI_CR2_LDMATX_Pos); + ARM GAS /tmp/ccYgfTud.s page 132 + + 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7978,1544 +7896,3520 @@ ARM GAS /tmp/ccO46DoU.s page 1 1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Read 16-Bits in the data register 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_ReceiveData16 - ARM GAS /tmp/ccO46DoU.s page 134 - - 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFFFF 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx) - 1173 .loc 4 1344 26 view .LVU368 - 1174 .LBB311: 1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint16_t)(READ_REG(SPIx->DR)); - 1175 .loc 4 1346 3 view .LVU369 - 1176 .loc 4 1346 21 is_stmt 0 view .LVU370 - 1177 00c0 554B ldr r3, .L87+8 - 1178 00c2 DD68 ldr r5, [r3, #12] - 1179 .loc 4 1346 10 view .LVU371 - 1180 00c4 ADB2 uxth r5, r5 - 1181 .LVL118: - 1182 .L51: - 1183 .loc 4 1346 10 view .LVU372 - 1184 .LBE311: - 1185 .LBE310: -2421:Src/main.c **** } - 1186 .loc 1 2421 2 is_stmt 1 view .LVU373 -2422:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time - 1187 .loc 1 2422 1 is_stmt 0 view .LVU374 - 1188 00c6 2846 mov r0, r5 - 1189 00c8 38BD pop {r3, r4, r5, pc} - 1190 .LVL119: - 1191 .L55: -2353:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); - 1192 .loc 1 2353 3 is_stmt 1 view .LVU375 - 1193 00ca 524C ldr r4, .L87+4 - 1194 00cc 0122 movs r2, #1 - 1195 00ce 4FF48061 mov r1, #1024 - 1196 00d2 2046 mov r0, r4 - 1197 00d4 FFF7FEFF bl HAL_GPIO_WritePin - 1198 .LVL120: -2354:Src/main.c **** tmp32=0; - 1199 .loc 1 2354 3 view .LVU376 - 1200 00d8 0022 movs r2, #0 - 1201 00da 4021 movs r1, #64 - 1202 00dc 2046 mov r0, r4 - 1203 00de FFF7FEFF bl HAL_GPIO_WritePin - 1204 .LVL121: -2355:Src/main.c **** while(tmp32<500){tmp32++;} - 1205 .loc 1 2355 3 view .LVU377 -2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1206 .loc 1 2356 3 view .LVU378 -2355:Src/main.c **** while(tmp32<500){tmp32++;} - 1207 .loc 1 2355 8 is_stmt 0 view .LVU379 - 1208 00e2 0023 movs r3, #0 -2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1209 .loc 1 2356 8 view .LVU380 - 1210 00e4 00E0 b .L64 - 1211 .LVL122: - 1212 .L65: -2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1213 .loc 1 2356 20 is_stmt 1 discriminator 2 view .LVU381 -2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - ARM GAS /tmp/ccO46DoU.s page 135 +1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } +1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** +1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** +1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write 8-Bits in the data register +1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_TransmitData8 +1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance +1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param TxData Value between Min_Data=0x00 and Max_Data=0xFF +1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None +1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ +1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData) +1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { +1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__) +1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint8_t *spidr = ((__IO uint8_t *)&SPIx->DR); +1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; +1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #else +1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *((__IO uint8_t *)&SPIx->DR) = TxData; + ARM GAS /tmp/ccYgfTud.s page 133 - 1214 .loc 1 2356 25 is_stmt 0 discriminator 2 view .LVU382 - 1215 00e6 0133 adds r3, r3, #1 - 1216 .LVL123: - 1217 .L64: -2356:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1218 .loc 1 2356 14 is_stmt 1 discriminator 1 view .LVU383 - 1219 00e8 B3F5FA7F cmp r3, #500 - 1220 00ec FBD3 bcc .L65 -2358:Src/main.c **** tmp32 = 0; - 1221 .loc 1 2358 3 view .LVU384 - 1222 .LVL124: - 1223 .LBB312: - 1224 .LBI312: - 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1225 .loc 4 358 22 view .LVU385 - 1226 .LBB313: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1227 .loc 4 360 3 view .LVU386 - 1228 00ee 4B4A ldr r2, .L87+12 - 1229 00f0 1368 ldr r3, [r2] - 1230 .LVL125: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1231 .loc 4 360 3 is_stmt 0 view .LVU387 - 1232 00f2 43F04003 orr r3, r3, #64 - 1233 00f6 1360 str r3, [r2] - 1234 .LVL126: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1235 .loc 4 360 3 view .LVU388 - 1236 .LBE313: - 1237 .LBE312: -2359:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1238 .loc 1 2359 3 is_stmt 1 view .LVU389 -2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1239 .loc 1 2360 3 view .LVU390 -2359:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1240 .loc 1 2359 9 is_stmt 0 view .LVU391 - 1241 00f8 0023 movs r3, #0 - 1242 .LVL127: - 1243 .L66: -2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1244 .loc 1 2360 43 is_stmt 1 discriminator 1 view .LVU392 - 1245 .LBB314: - 1246 .LBI314: +1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif /* __GNUC__ */ +1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } +1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** +1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** +1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write 16-Bits in the data register +1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_TransmitData16 +1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance +1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param TxData Value between Min_Data=0x00 and Max_Data=0xFFFF +1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None +1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) + 826 .loc 4 1373 22 view .LVU289 + 827 .LBB344: +1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { +1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__) +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint16_t *spidr = ((__IO uint16_t *)&SPIx->DR); + 828 .loc 4 1376 3 view .LVU290 +1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 829 .loc 4 1377 3 view .LVU291 + 830 .loc 4 1377 10 is_stmt 0 view .LVU292 + 831 0040 194B ldr r3, .L44 + 832 0042 9D81 strh r5, [r3, #12] @ movhi + 833 .LVL64: + 834 .loc 4 1377 10 view .LVU293 + 835 .LBE344: + 836 .LBE343: +2428:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 837 .loc 1 2428 2 is_stmt 1 view .LVU294 +2429:Src/main.c **** (void) SPI2->DR; + 838 .loc 1 2429 2 view .LVU295 +2428:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 839 .loc 1 2428 8 is_stmt 0 view .LVU296 + 840 0044 0023 movs r3, #0 + 841 .LVL65: + 842 .L34: +2429:Src/main.c **** (void) SPI2->DR; + 843 .loc 1 2429 64 is_stmt 1 discriminator 2 view .LVU297 +2429:Src/main.c **** (void) SPI2->DR; + 844 .loc 1 2429 42 discriminator 2 view .LVU298 + 845 .LBB345: + 846 .LBI345: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1247 .loc 4 905 26 view .LVU393 - 1248 .LBB315: + 847 .loc 4 905 26 view .LVU299 + 848 .LBB346: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1249 .loc 4 907 3 view .LVU394 + 849 .loc 4 907 3 view .LVU300 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1250 .loc 4 907 12 is_stmt 0 view .LVU395 - 1251 00fa 484A ldr r2, .L87+12 - 1252 00fc 9268 ldr r2, [r2, #8] + 850 .loc 4 907 12 is_stmt 0 view .LVU301 + 851 0046 184A ldr r2, .L44 + 852 0048 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1253 .loc 4 907 68 view .LVU396 - 1254 00fe 12F0010F tst r2, #1 - 1255 0102 04D1 bne .L67 - 1256 .LVL128: - ARM GAS /tmp/ccO46DoU.s page 136 + 853 .loc 4 907 68 view .LVU302 + 854 004a 12F0010F tst r2, #1 + 855 004e 05D1 bne .L33 + 856 .LVL66: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 857 .loc 4 907 68 view .LVU303 + ARM GAS /tmp/ccYgfTud.s page 134 + + + 858 .LBE346: + 859 .LBE345: +2429:Src/main.c **** (void) SPI2->DR; + 860 .loc 1 2429 51 discriminator 1 view .LVU304 + 861 0050 5A1C adds r2, r3, #1 + 862 .LVL67: +2429:Src/main.c **** (void) SPI2->DR; + 863 .loc 1 2429 42 discriminator 1 view .LVU305 + 864 0052 B3F57A7F cmp r3, #1000 + 865 0056 01D2 bcs .L33 +2429:Src/main.c **** (void) SPI2->DR; + 866 .loc 1 2429 51 discriminator 1 view .LVU306 + 867 0058 1346 mov r3, r2 + 868 005a F4E7 b .L34 + 869 .LVL68: + 870 .L33: +2430:Src/main.c **** + 871 .loc 1 2430 2 is_stmt 1 view .LVU307 + 872 005c 124B ldr r3, .L44 + 873 005e DB68 ldr r3, [r3, #12] +2432:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 874 .loc 1 2432 2 view .LVU308 + 875 .LVL69: +2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 876 .loc 1 2433 2 view .LVU309 +2432:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 877 .loc 1 2432 8 is_stmt 0 view .LVU310 + 878 0060 0023 movs r3, #0 + 879 .LVL70: + 880 .L36: +2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 881 .loc 1 2433 63 is_stmt 1 discriminator 2 view .LVU311 +2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 882 .loc 1 2433 41 discriminator 2 view .LVU312 + 883 .LBB347: + 884 .LBI347: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 885 .loc 4 916 26 view .LVU313 + 886 .LBB348: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 887 .loc 4 918 3 view .LVU314 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 888 .loc 4 918 12 is_stmt 0 view .LVU315 + 889 0062 114A ldr r2, .L44 + 890 0064 9268 ldr r2, [r2, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 891 .loc 4 918 66 view .LVU316 + 892 0066 12F0020F tst r2, #2 + 893 006a 05D1 bne .L35 + 894 .LVL71: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 895 .loc 4 918 66 view .LVU317 + 896 .LBE348: + 897 .LBE347: +2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 898 .loc 1 2433 50 discriminator 1 view .LVU318 + 899 006c 5A1C adds r2, r3, #1 + ARM GAS /tmp/ccYgfTud.s page 135 + + + 900 .LVL72: +2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 901 .loc 1 2433 41 discriminator 1 view .LVU319 + 902 006e B3F57A7F cmp r3, #1000 + 903 0072 01D2 bcs .L35 +2433:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 904 .loc 1 2433 50 discriminator 1 view .LVU320 + 905 0074 1346 mov r3, r2 + 906 0076 F4E7 b .L36 + 907 .LVL73: + 908 .L35: +2434:Src/main.c **** tmp32 = 0; + 909 .loc 1 2434 2 is_stmt 1 view .LVU321 + 910 .LBB349: + 911 .LBI349: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 912 .loc 4 1373 22 view .LVU322 + 913 .LBB350: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 914 .loc 4 1376 3 view .LVU323 + 915 .loc 4 1377 3 view .LVU324 + 916 .loc 4 1377 10 is_stmt 0 view .LVU325 + 917 0078 0B4B ldr r3, .L44 + 918 007a 9C81 strh r4, [r3, #12] @ movhi + 919 .LVL74: + 920 .loc 4 1377 10 view .LVU326 + 921 .LBE350: + 922 .LBE349: +2435:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 923 .loc 1 2435 2 is_stmt 1 view .LVU327 +2436:Src/main.c **** (void) SPI2->DR; + 924 .loc 1 2436 2 view .LVU328 +2435:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 925 .loc 1 2435 8 is_stmt 0 view .LVU329 + 926 007c 0023 movs r3, #0 + 927 .LVL75: + 928 .L38: +2436:Src/main.c **** (void) SPI2->DR; + 929 .loc 1 2436 64 is_stmt 1 discriminator 2 view .LVU330 +2436:Src/main.c **** (void) SPI2->DR; + 930 .loc 1 2436 42 discriminator 2 view .LVU331 + 931 .LBB351: + 932 .LBI351: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 933 .loc 4 905 26 view .LVU332 + 934 .LBB352: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 935 .loc 4 907 3 view .LVU333 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 936 .loc 4 907 12 is_stmt 0 view .LVU334 + 937 007e 0A4A ldr r2, .L44 + 938 0080 9268 ldr r2, [r2, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 939 .loc 4 907 68 view .LVU335 + 940 0082 12F0010F tst r2, #1 + 941 0086 05D1 bne .L37 + 942 .LVL76: + ARM GAS /tmp/ccYgfTud.s page 136 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1257 .loc 4 907 68 view .LVU397 - 1258 .LBE315: - 1259 .LBE314: -2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1260 .loc 1 2360 43 discriminator 2 view .LVU398 - 1261 0104 B3F57A7F cmp r3, #1000 - 1262 0108 01D8 bhi .L67 -2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1263 .loc 1 2360 62 is_stmt 1 discriminator 3 view .LVU399 -2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1264 .loc 1 2360 67 is_stmt 0 discriminator 3 view .LVU400 - 1265 010a 0133 adds r3, r3, #1 - 1266 .LVL129: -2360:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1267 .loc 1 2360 67 discriminator 3 view .LVU401 - 1268 010c F5E7 b .L66 - 1269 .L67: -2361:Src/main.c **** while(tmp32<500){tmp32++;} - 1270 .loc 1 2361 3 is_stmt 1 view .LVU402 - 1271 .LVL130: - 1272 .LBB316: - 1273 .LBI316: - 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1274 .loc 4 370 22 view .LVU403 - 1275 .LBB317: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1276 .loc 4 372 3 view .LVU404 - 1277 010e 4349 ldr r1, .L87+12 - 1278 0110 0A68 ldr r2, [r1] - 1279 0112 22F04002 bic r2, r2, #64 - 1280 0116 0A60 str r2, [r1] - 1281 .LVL131: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1282 .loc 4 372 3 is_stmt 0 view .LVU405 - 1283 .LBE317: - 1284 .LBE316: -2362:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1285 .loc 1 2362 3 is_stmt 1 view .LVU406 - 1286 .LBB319: - 1287 .LBB318: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 1288 .loc 4 373 1 is_stmt 0 view .LVU407 - 1289 0118 00E0 b .L69 - 1290 .L70: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 1291 .loc 4 373 1 view .LVU408 - 1292 .LBE318: - 1293 .LBE319: -2362:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1294 .loc 1 2362 20 is_stmt 1 discriminator 2 view .LVU409 -2362:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1295 .loc 1 2362 25 is_stmt 0 discriminator 2 view .LVU410 - 1296 011a 0133 adds r3, r3, #1 - 1297 .LVL132: - 1298 .L69: -2362:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - ARM GAS /tmp/ccO46DoU.s page 137 + 943 .loc 4 907 68 view .LVU336 + 944 .LBE352: + 945 .LBE351: +2436:Src/main.c **** (void) SPI2->DR; + 946 .loc 1 2436 51 discriminator 1 view .LVU337 + 947 0088 5A1C adds r2, r3, #1 + 948 .LVL77: +2436:Src/main.c **** (void) SPI2->DR; + 949 .loc 1 2436 42 discriminator 1 view .LVU338 + 950 008a B3F57A7F cmp r3, #1000 + 951 008e 01D2 bcs .L37 +2436:Src/main.c **** (void) SPI2->DR; + 952 .loc 1 2436 51 discriminator 1 view .LVU339 + 953 0090 1346 mov r3, r2 + 954 0092 F4E7 b .L38 + 955 .LVL78: + 956 .L37: +2437:Src/main.c **** + 957 .loc 1 2437 2 is_stmt 1 view .LVU340 + 958 0094 044B ldr r3, .L44 + 959 0096 DB68 ldr r3, [r3, #12] +2439:Src/main.c **** } + 960 .loc 1 2439 2 view .LVU341 + 961 0098 0122 movs r2, #1 + 962 009a 4FF48051 mov r1, #4096 + 963 009e 0348 ldr r0, .L44+4 + 964 00a0 FFF7FEFF bl HAL_GPIO_WritePin + 965 .LVL79: +2440:Src/main.c **** + 966 .loc 1 2440 1 is_stmt 0 view .LVU342 + 967 00a4 38BD pop {r3, r4, r5, pc} + 968 .LVL80: + 969 .L45: +2440:Src/main.c **** + 970 .loc 1 2440 1 view .LVU343 + 971 00a6 00BF .align 2 + 972 .L44: + 973 00a8 00380040 .word 1073756160 + 974 00ac 00040240 .word 1073873920 + 975 .cfi_endproc + 976 .LFE1212: + 978 .section .text.AD9102_WriteRegTable,"ax",%progbits + 979 .align 1 + 980 .syntax unified + 981 .thumb + 982 .thumb_func + 984 AD9102_WriteRegTable: + 985 .LVL81: + 986 .LFB1214: +2473:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 987 .loc 1 2473 1 is_stmt 1 view -0 + 988 .cfi_startproc + 989 @ args = 0, pretend = 0, frame = 0 + 990 @ frame_needed = 0, uses_anonymous_args = 0 +2473:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 991 .loc 1 2473 1 is_stmt 0 view .LVU345 + ARM GAS /tmp/ccYgfTud.s page 137 - 1299 .loc 1 2362 14 is_stmt 1 discriminator 1 view .LVU411 - 1300 011c B3F5FA7F cmp r3, #500 - 1301 0120 FBD3 bcc .L70 -2364:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 1302 .loc 1 2364 3 view .LVU412 - 1303 0122 0122 movs r2, #1 - 1304 0124 4021 movs r1, #64 - 1305 0126 3B48 ldr r0, .L87+4 - 1306 0128 FFF7FEFF bl HAL_GPIO_WritePin - 1307 .LVL133: -2365:Src/main.c **** } - 1308 .loc 1 2365 3 view .LVU413 - 1309 .LBB320: - 1310 .LBI320: + 992 0000 70B5 push {r4, r5, r6, lr} + 993 .LCFI10: + 994 .cfi_def_cfa_offset 16 + 995 .cfi_offset 4, -16 + 996 .cfi_offset 5, -12 + 997 .cfi_offset 6, -8 + 998 .cfi_offset 14, -4 + 999 0002 0646 mov r6, r0 + 1000 0004 0D46 mov r5, r1 +2474:Src/main.c **** { + 1001 .loc 1 2474 2 is_stmt 1 view .LVU346 + 1002 .LBB353: +2474:Src/main.c **** { + 1003 .loc 1 2474 7 view .LVU347 + 1004 .LVL82: +2474:Src/main.c **** { + 1005 .loc 1 2474 16 is_stmt 0 view .LVU348 + 1006 0006 0024 movs r4, #0 +2474:Src/main.c **** { + 1007 .loc 1 2474 2 view .LVU349 + 1008 0008 08E0 b .L47 + 1009 .LVL83: + 1010 .L48: +2476:Src/main.c **** } + 1011 .loc 1 2476 3 is_stmt 1 view .LVU350 + 1012 000a 36F81410 ldrh r1, [r6, r4, lsl #1] + 1013 000e 054B ldr r3, .L50 + 1014 0010 33F81400 ldrh r0, [r3, r4, lsl #1] + 1015 0014 FFF7FEFF bl AD9102_WriteReg + 1016 .LVL84: +2474:Src/main.c **** { + 1017 .loc 1 2474 35 discriminator 3 view .LVU351 + 1018 0018 0134 adds r4, r4, #1 + 1019 .LVL85: +2474:Src/main.c **** { + 1020 .loc 1 2474 35 is_stmt 0 discriminator 3 view .LVU352 + 1021 001a A4B2 uxth r4, r4 + 1022 .LVL86: + 1023 .L47: +2474:Src/main.c **** { + 1024 .loc 1 2474 25 is_stmt 1 discriminator 1 view .LVU353 + 1025 001c AC42 cmp r4, r5 + 1026 001e F4D3 bcc .L48 + 1027 .LBE353: +2478:Src/main.c **** + 1028 .loc 1 2478 1 is_stmt 0 view .LVU354 + 1029 0020 70BD pop {r4, r5, r6, pc} + 1030 .LVL87: + 1031 .L51: +2478:Src/main.c **** + 1032 .loc 1 2478 1 view .LVU355 + 1033 0022 00BF .align 2 + 1034 .L50: + 1035 0024 00000000 .word ad9102_reg_addr + 1036 .cfi_endproc + 1037 .LFE1214: + 1039 .section .text.AD9102_Init,"ax",%progbits + ARM GAS /tmp/ccYgfTud.s page 138 + + + 1040 .align 1 + 1041 .syntax unified + 1042 .thumb + 1043 .thumb_func + 1045 AD9102_Init: + 1046 .LFB1211: +2402:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + 1047 .loc 1 2402 1 is_stmt 1 view -0 + 1048 .cfi_startproc + 1049 @ args = 0, pretend = 0, frame = 8 + 1050 @ frame_needed = 0, uses_anonymous_args = 0 + 1051 0000 00B5 push {lr} + 1052 .LCFI11: + 1053 .cfi_def_cfa_offset 4 + 1054 .cfi_offset 14, -4 + 1055 0002 83B0 sub sp, sp, #12 + 1056 .LCFI12: + 1057 .cfi_def_cfa_offset 16 +2403:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); + 1058 .loc 1 2403 2 view .LVU357 + 1059 0004 0122 movs r2, #1 + 1060 0006 4FF48051 mov r1, #4096 + 1061 000a 1648 ldr r0, .L56 + 1062 000c FFF7FEFF bl HAL_GPIO_WritePin + 1063 .LVL88: +2404:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + 1064 .loc 1 2404 2 view .LVU358 + 1065 0010 0022 movs r2, #0 + 1066 0012 4021 movs r1, #64 + 1067 0014 1448 ldr r0, .L56+4 + 1068 0016 FFF7FEFF bl HAL_GPIO_WritePin + 1069 .LVL89: +2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1070 .loc 1 2405 2 view .LVU359 + 1071 .LBB354: +2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1072 .loc 1 2405 7 view .LVU360 +2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1073 .loc 1 2405 25 is_stmt 0 view .LVU361 + 1074 001a 0023 movs r3, #0 + 1075 001c 0193 str r3, [sp, #4] +2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1076 .loc 1 2405 2 view .LVU362 + 1077 001e 02E0 b .L53 + 1078 .L54: +2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1079 .loc 1 2405 48 is_stmt 1 discriminator 3 view .LVU363 +2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1080 .loc 1 2405 43 discriminator 3 view .LVU364 + 1081 0020 019B ldr r3, [sp, #4] + 1082 0022 0133 adds r3, r3, #1 + 1083 0024 0193 str r3, [sp, #4] + 1084 .L53: +2405:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1085 .loc 1 2405 34 discriminator 1 view .LVU365 + 1086 0026 019B ldr r3, [sp, #4] + 1087 0028 B3F57A7F cmp r3, #1000 + ARM GAS /tmp/ccYgfTud.s page 139 + + + 1088 002c F8D3 bcc .L54 + 1089 .LBE354: +2406:Src/main.c **** + 1090 .loc 1 2406 2 view .LVU366 + 1091 002e 0122 movs r2, #1 + 1092 0030 4021 movs r1, #64 + 1093 0032 0D48 ldr r0, .L56+4 + 1094 0034 FFF7FEFF bl HAL_GPIO_WritePin + 1095 .LVL90: +2408:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + 1096 .loc 1 2408 2 view .LVU367 + 1097 0038 4221 movs r1, #66 + 1098 003a 0C48 ldr r0, .L56+8 + 1099 003c FFF7FEFF bl AD9102_WriteRegTable + 1100 .LVL91: +2409:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 1101 .loc 1 2409 2 view .LVU368 + 1102 0040 0021 movs r1, #0 + 1103 0042 1E20 movs r0, #30 + 1104 0044 FFF7FEFF bl AD9102_WriteReg + 1105 .LVL92: +2410:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 1106 .loc 1 2410 2 view .LVU369 + 1107 0048 0121 movs r1, #1 + 1108 004a 1D20 movs r0, #29 + 1109 004c FFF7FEFF bl AD9102_WriteReg + 1110 .LVL93: +2411:Src/main.c **** } + 1111 .loc 1 2411 2 view .LVU370 + 1112 0050 0122 movs r2, #1 + 1113 0052 4FF40061 mov r1, #2048 + 1114 0056 0648 ldr r0, .L56+12 + 1115 0058 FFF7FEFF bl HAL_GPIO_WritePin + 1116 .LVL94: +2412:Src/main.c **** + 1117 .loc 1 2412 1 is_stmt 0 view .LVU371 + 1118 005c 03B0 add sp, sp, #12 + 1119 .LCFI13: + 1120 .cfi_def_cfa_offset 4 + 1121 @ sp needed + 1122 005e 5DF804FB ldr pc, [sp], #4 + 1123 .L57: + 1124 0062 00BF .align 2 + 1125 .L56: + 1126 0064 00040240 .word 1073873920 + 1127 0068 00080240 .word 1073874944 + 1128 006c 00000000 .word ad9102_example4_regval + 1129 0070 000C0240 .word 1073875968 + 1130 .cfi_endproc + 1131 .LFE1211: + 1133 .section .text.AD9102_ReadReg,"ax",%progbits + 1134 .align 1 + 1135 .syntax unified + 1136 .thumb + 1137 .thumb_func + 1139 AD9102_ReadReg: + 1140 .LVL95: + ARM GAS /tmp/ccYgfTud.s page 140 + + + 1141 .LFB1213: +2443:Src/main.c **** uint32_t tmp32 = 0; + 1142 .loc 1 2443 1 is_stmt 1 view -0 + 1143 .cfi_startproc + 1144 @ args = 0, pretend = 0, frame = 0 + 1145 @ frame_needed = 0, uses_anonymous_args = 0 +2443:Src/main.c **** uint32_t tmp32 = 0; + 1146 .loc 1 2443 1 is_stmt 0 view .LVU373 + 1147 0000 10B5 push {r4, lr} + 1148 .LCFI14: + 1149 .cfi_def_cfa_offset 8 + 1150 .cfi_offset 4, -8 + 1151 .cfi_offset 14, -4 +2444:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) + 1152 .loc 1 2444 2 is_stmt 1 view .LVU374 + 1153 .LVL96: +2445:Src/main.c **** uint16_t value; + 1154 .loc 1 2445 2 view .LVU375 +2445:Src/main.c **** uint16_t value; + 1155 .loc 1 2445 11 is_stmt 0 view .LVU376 + 1156 0002 40F40044 orr r4, r0, #32768 + 1157 .LVL97: +2446:Src/main.c **** + 1158 .loc 1 2446 2 is_stmt 1 view .LVU377 +2448:Src/main.c **** { + 1159 .loc 1 2448 2 view .LVU378 + 1160 .LBB355: + 1161 .LBI355: + 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1162 .loc 4 381 26 view .LVU379 + 1163 .LBB356: + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1164 .loc 4 383 3 view .LVU380 + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1165 .loc 4 383 12 is_stmt 0 view .LVU381 + 1166 0006 284B ldr r3, .L73 + 1167 0008 1B68 ldr r3, [r3] + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1168 .loc 4 383 69 view .LVU382 + 1169 000a 13F0400F tst r3, #64 + 1170 000e 04D1 bne .L59 + 1171 .LVL98: + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1172 .loc 4 383 69 view .LVU383 + 1173 .LBE356: + 1174 .LBE355: +2450:Src/main.c **** } + 1175 .loc 1 2450 3 is_stmt 1 view .LVU384 + 1176 .LBB357: + 1177 .LBI357: + 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1178 .loc 4 358 22 view .LVU385 + 1179 .LBB358: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1180 .loc 4 360 3 view .LVU386 + 1181 0010 254A ldr r2, .L73 + 1182 0012 1368 ldr r3, [r2] + ARM GAS /tmp/ccYgfTud.s page 141 + + + 1183 0014 43F04003 orr r3, r3, #64 + 1184 0018 1360 str r3, [r2] + 1185 .LVL99: + 1186 .L59: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1187 .loc 4 360 3 is_stmt 0 view .LVU387 + 1188 .LBE358: + 1189 .LBE357: +2453:Src/main.c **** + 1190 .loc 1 2453 2 is_stmt 1 view .LVU388 + 1191 001a 0022 movs r2, #0 + 1192 001c 4FF48051 mov r1, #4096 + 1193 0020 2248 ldr r0, .L73+4 + 1194 .LVL100: +2453:Src/main.c **** + 1195 .loc 1 2453 2 is_stmt 0 view .LVU389 + 1196 0022 FFF7FEFF bl HAL_GPIO_WritePin + 1197 .LVL101: +2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1198 .loc 1 2455 2 is_stmt 1 view .LVU390 +2444:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) + 1199 .loc 1 2444 11 is_stmt 0 view .LVU391 + 1200 0026 0023 movs r3, #0 + 1201 .LVL102: + 1202 .L61: +2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1203 .loc 1 2455 63 is_stmt 1 discriminator 2 view .LVU392 +2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1204 .loc 1 2455 41 discriminator 2 view .LVU393 + 1205 .LBB359: + 1206 .LBI359: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1207 .loc 4 916 26 view .LVU394 + 1208 .LBB360: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1209 .loc 4 918 3 view .LVU395 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1210 .loc 4 918 12 is_stmt 0 view .LVU396 + 1211 0028 1F4A ldr r2, .L73 + 1212 002a 9268 ldr r2, [r2, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1213 .loc 4 918 66 view .LVU397 + 1214 002c 12F0020F tst r2, #2 + 1215 0030 05D1 bne .L60 + 1216 .LVL103: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1217 .loc 4 918 66 view .LVU398 + 1218 .LBE360: + 1219 .LBE359: +2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1220 .loc 1 2455 50 discriminator 1 view .LVU399 + 1221 0032 5A1C adds r2, r3, #1 + 1222 .LVL104: +2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1223 .loc 1 2455 41 discriminator 1 view .LVU400 + 1224 0034 B3F57A7F cmp r3, #1000 + 1225 0038 01D2 bcs .L60 + ARM GAS /tmp/ccYgfTud.s page 142 + + +2455:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1226 .loc 1 2455 50 discriminator 1 view .LVU401 + 1227 003a 1346 mov r3, r2 + 1228 003c F4E7 b .L61 + 1229 .LVL105: + 1230 .L60: +2456:Src/main.c **** tmp32 = 0; + 1231 .loc 1 2456 2 is_stmt 1 view .LVU402 + 1232 .LBB361: + 1233 .LBI361: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1234 .loc 4 1373 22 view .LVU403 + 1235 .LBB362: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 1236 .loc 4 1376 3 view .LVU404 + 1237 .loc 4 1377 3 view .LVU405 + 1238 .loc 4 1377 10 is_stmt 0 view .LVU406 + 1239 003e 1A4B ldr r3, .L73 + 1240 0040 9C81 strh r4, [r3, #12] @ movhi + 1241 .LVL106: + 1242 .loc 4 1377 10 view .LVU407 + 1243 .LBE362: + 1244 .LBE361: +2457:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1245 .loc 1 2457 2 is_stmt 1 view .LVU408 +2458:Src/main.c **** (void) SPI2->DR; + 1246 .loc 1 2458 2 view .LVU409 +2457:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1247 .loc 1 2457 8 is_stmt 0 view .LVU410 + 1248 0042 0023 movs r3, #0 + 1249 .LVL107: + 1250 .L63: +2458:Src/main.c **** (void) SPI2->DR; + 1251 .loc 1 2458 64 is_stmt 1 discriminator 2 view .LVU411 +2458:Src/main.c **** (void) SPI2->DR; + 1252 .loc 1 2458 42 discriminator 2 view .LVU412 + 1253 .LBB363: + 1254 .LBI363: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1255 .loc 4 905 26 view .LVU413 + 1256 .LBB364: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1257 .loc 4 907 3 view .LVU414 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1258 .loc 4 907 12 is_stmt 0 view .LVU415 + 1259 0044 184A ldr r2, .L73 + 1260 0046 9268 ldr r2, [r2, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1261 .loc 4 907 68 view .LVU416 + 1262 0048 12F0010F tst r2, #1 + 1263 004c 05D1 bne .L62 + 1264 .LVL108: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1265 .loc 4 907 68 view .LVU417 + 1266 .LBE364: + 1267 .LBE363: +2458:Src/main.c **** (void) SPI2->DR; + ARM GAS /tmp/ccYgfTud.s page 143 + + + 1268 .loc 1 2458 51 discriminator 1 view .LVU418 + 1269 004e 5A1C adds r2, r3, #1 + 1270 .LVL109: +2458:Src/main.c **** (void) SPI2->DR; + 1271 .loc 1 2458 42 discriminator 1 view .LVU419 + 1272 0050 B3F57A7F cmp r3, #1000 + 1273 0054 01D2 bcs .L62 +2458:Src/main.c **** (void) SPI2->DR; + 1274 .loc 1 2458 51 discriminator 1 view .LVU420 + 1275 0056 1346 mov r3, r2 + 1276 0058 F4E7 b .L63 + 1277 .LVL110: + 1278 .L62: +2459:Src/main.c **** + 1279 .loc 1 2459 2 is_stmt 1 view .LVU421 + 1280 005a 134B ldr r3, .L73 + 1281 005c DB68 ldr r3, [r3, #12] +2461:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 1282 .loc 1 2461 2 view .LVU422 + 1283 .LVL111: +2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1284 .loc 1 2462 2 view .LVU423 +2461:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 1285 .loc 1 2461 8 is_stmt 0 view .LVU424 + 1286 005e 0023 movs r3, #0 + 1287 .LVL112: + 1288 .L65: +2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1289 .loc 1 2462 63 is_stmt 1 discriminator 2 view .LVU425 +2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1290 .loc 1 2462 41 discriminator 2 view .LVU426 + 1291 .LBB365: + 1292 .LBI365: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1293 .loc 4 916 26 view .LVU427 + 1294 .LBB366: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1295 .loc 4 918 3 view .LVU428 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1296 .loc 4 918 12 is_stmt 0 view .LVU429 + 1297 0060 114A ldr r2, .L73 + 1298 0062 9268 ldr r2, [r2, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1299 .loc 4 918 66 view .LVU430 + 1300 0064 12F0020F tst r2, #2 + 1301 0068 05D1 bne .L64 + 1302 .LVL113: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1303 .loc 4 918 66 view .LVU431 + 1304 .LBE366: + 1305 .LBE365: +2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1306 .loc 1 2462 50 discriminator 1 view .LVU432 + 1307 006a 5A1C adds r2, r3, #1 + 1308 .LVL114: +2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1309 .loc 1 2462 41 discriminator 1 view .LVU433 + ARM GAS /tmp/ccYgfTud.s page 144 + + + 1310 006c B3F57A7F cmp r3, #1000 + 1311 0070 01D2 bcs .L64 +2462:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 1312 .loc 1 2462 50 discriminator 1 view .LVU434 + 1313 0072 1346 mov r3, r2 + 1314 0074 F4E7 b .L65 + 1315 .LVL115: + 1316 .L64: +2463:Src/main.c **** tmp32 = 0; + 1317 .loc 1 2463 2 is_stmt 1 view .LVU435 + 1318 .LBB367: + 1319 .LBI367: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1320 .loc 4 1373 22 view .LVU436 + 1321 .LBB368: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 1322 .loc 4 1376 3 view .LVU437 + 1323 .loc 4 1377 3 view .LVU438 + 1324 .loc 4 1377 10 is_stmt 0 view .LVU439 + 1325 0076 0023 movs r3, #0 + 1326 0078 0B4A ldr r2, .L73 + 1327 007a 9381 strh r3, [r2, #12] @ movhi + 1328 .LVL116: + 1329 .loc 4 1377 10 view .LVU440 + 1330 .LBE368: + 1331 .LBE367: +2464:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1332 .loc 1 2464 2 is_stmt 1 view .LVU441 +2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1333 .loc 1 2465 2 view .LVU442 + 1334 .L67: +2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1335 .loc 1 2465 64 discriminator 2 view .LVU443 +2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1336 .loc 1 2465 42 discriminator 2 view .LVU444 + 1337 .LBB369: + 1338 .LBI369: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 1339 .loc 4 905 26 view .LVU445 + 1340 .LBB370: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1341 .loc 4 907 3 view .LVU446 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1342 .loc 4 907 12 is_stmt 0 view .LVU447 + 1343 007c 0A4A ldr r2, .L73 + 1344 007e 9268 ldr r2, [r2, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1345 .loc 4 907 68 view .LVU448 + 1346 0080 12F0010F tst r2, #1 + 1347 0084 05D1 bne .L66 + 1348 .LVL117: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1349 .loc 4 907 68 view .LVU449 + 1350 .LBE370: + 1351 .LBE369: +2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1352 .loc 1 2465 51 discriminator 1 view .LVU450 + ARM GAS /tmp/ccYgfTud.s page 145 + + + 1353 0086 5A1C adds r2, r3, #1 + 1354 .LVL118: +2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1355 .loc 1 2465 42 discriminator 1 view .LVU451 + 1356 0088 B3F57A7F cmp r3, #1000 + 1357 008c 01D2 bcs .L66 +2465:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 1358 .loc 1 2465 51 discriminator 1 view .LVU452 + 1359 008e 1346 mov r3, r2 + 1360 0090 F4E7 b .L67 + 1361 .LVL119: + 1362 .L66: +2466:Src/main.c **** + 1363 .loc 1 2466 2 is_stmt 1 view .LVU453 + 1364 .LBB371: + 1365 .LBI371: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1311 .loc 4 1344 26 view .LVU414 - 1312 .LBB321: - 1313 .loc 4 1346 3 view .LVU415 - 1314 .loc 4 1346 21 is_stmt 0 view .LVU416 - 1315 012c 3B4B ldr r3, .L87+12 - 1316 012e DD68 ldr r5, [r3, #12] - 1317 .loc 4 1346 10 view .LVU417 - 1318 0130 ADB2 uxth r5, r5 - 1319 .LVL134: - 1320 .loc 4 1346 10 view .LVU418 - 1321 .LBE321: - 1322 .LBE320: - 1323 0132 C8E7 b .L51 - 1324 .LVL135: - 1325 .L54: -2369:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); - 1326 .loc 1 2369 3 is_stmt 1 view .LVU419 - 1327 0134 364C ldr r4, .L87 - 1328 0136 0122 movs r2, #1 - 1329 0138 4FF48061 mov r1, #1024 - 1330 013c 2046 mov r0, r4 - 1331 013e FFF7FEFF bl HAL_GPIO_WritePin - 1332 .LVL136: -2370:Src/main.c **** tmp32=0; - 1333 .loc 1 2370 3 view .LVU420 - 1334 0142 0022 movs r2, #0 - 1335 0144 4FF40061 mov r1, #2048 - 1336 0148 2046 mov r0, r4 - 1337 014a FFF7FEFF bl HAL_GPIO_WritePin - 1338 .LVL137: -2371:Src/main.c **** while(tmp32<500){tmp32++;} - 1339 .loc 1 2371 3 view .LVU421 -2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1340 .loc 1 2372 3 view .LVU422 -2371:Src/main.c **** while(tmp32<500){tmp32++;} - 1341 .loc 1 2371 8 is_stmt 0 view .LVU423 - 1342 014e 0023 movs r3, #0 -2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1343 .loc 1 2372 8 view .LVU424 - 1344 0150 00E0 b .L71 - 1345 .LVL138: - 1346 .L72: - ARM GAS /tmp/ccO46DoU.s page 138 + 1366 .loc 4 1344 26 view .LVU454 + 1367 .LBB372: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1368 .loc 4 1346 3 view .LVU455 +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1369 .loc 4 1346 21 is_stmt 0 view .LVU456 + 1370 0092 054B ldr r3, .L73 + 1371 0094 DC68 ldr r4, [r3, #12] + 1372 .LVL120: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1373 .loc 4 1346 10 view .LVU457 + 1374 0096 A4B2 uxth r4, r4 + 1375 .LVL121: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1376 .loc 4 1346 10 view .LVU458 + 1377 .LBE372: + 1378 .LBE371: +2468:Src/main.c **** return value; + 1379 .loc 1 2468 2 is_stmt 1 view .LVU459 + 1380 0098 0122 movs r2, #1 + 1381 009a 4FF48051 mov r1, #4096 + 1382 009e 0348 ldr r0, .L73+4 + 1383 00a0 FFF7FEFF bl HAL_GPIO_WritePin + 1384 .LVL122: +2469:Src/main.c **** } + 1385 .loc 1 2469 2 view .LVU460 +2470:Src/main.c **** + 1386 .loc 1 2470 1 is_stmt 0 view .LVU461 + 1387 00a4 2046 mov r0, r4 + 1388 00a6 10BD pop {r4, pc} + 1389 .LVL123: + 1390 .L74: +2470:Src/main.c **** + 1391 .loc 1 2470 1 view .LVU462 + 1392 .align 2 + 1393 .L73: + 1394 00a8 00380040 .word 1073756160 + 1395 00ac 00040240 .word 1073873920 + 1396 .cfi_endproc + 1397 .LFE1213: + ARM GAS /tmp/ccYgfTud.s page 146 -2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1347 .loc 1 2372 20 is_stmt 1 discriminator 2 view .LVU425 -2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1348 .loc 1 2372 25 is_stmt 0 discriminator 2 view .LVU426 - 1349 0152 0133 adds r3, r3, #1 - 1350 .LVL139: - 1351 .L71: -2372:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1352 .loc 1 2372 14 is_stmt 1 discriminator 1 view .LVU427 - 1353 0154 B3F5FA7F cmp r3, #500 - 1354 0158 FBD3 bcc .L72 -2374:Src/main.c **** tmp32 = 0; - 1355 .loc 1 2374 3 view .LVU428 - 1356 .LVL140: - 1357 .LBB322: - 1358 .LBI322: - 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1359 .loc 4 358 22 view .LVU429 - 1360 .LBB323: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1361 .loc 4 360 3 view .LVU430 - 1362 015a 2F4A ldr r2, .L87+8 - 1363 015c 1368 ldr r3, [r2] - 1364 .LVL141: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1365 .loc 4 360 3 is_stmt 0 view .LVU431 - 1366 015e 43F04003 orr r3, r3, #64 - 1367 0162 1360 str r3, [r2] - 1368 .LVL142: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1369 .loc 4 360 3 view .LVU432 - 1370 .LBE323: - 1371 .LBE322: -2375:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1372 .loc 1 2375 3 is_stmt 1 view .LVU433 -2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1373 .loc 1 2376 3 view .LVU434 -2375:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1374 .loc 1 2375 9 is_stmt 0 view .LVU435 - 1375 0164 0023 movs r3, #0 - 1376 .LVL143: - 1377 .L73: -2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1378 .loc 1 2376 43 is_stmt 1 discriminator 1 view .LVU436 - 1379 .LBB324: - 1380 .LBI324: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1381 .loc 4 905 26 view .LVU437 - 1382 .LBB325: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1383 .loc 4 907 3 view .LVU438 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1384 .loc 4 907 12 is_stmt 0 view .LVU439 - 1385 0166 2C4A ldr r2, .L87+8 - 1386 0168 9268 ldr r2, [r2, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1387 .loc 4 907 68 view .LVU440 - ARM GAS /tmp/ccO46DoU.s page 139 + 1399 .section .text.AD9102_CheckFlags,"ax",%progbits + 1400 .align 1 + 1401 .syntax unified + 1402 .thumb + 1403 .thumb_func + 1405 AD9102_CheckFlags: + 1406 .LVL124: + 1407 .LFB1216: +2525:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 1408 .loc 1 2525 1 is_stmt 1 view -0 + 1409 .cfi_startproc + 1410 @ args = 8, pretend = 0, frame = 8 + 1411 @ frame_needed = 0, uses_anonymous_args = 0 +2525:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 1412 .loc 1 2525 1 is_stmt 0 view .LVU464 + 1413 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1414 .LCFI15: + 1415 .cfi_def_cfa_offset 36 + 1416 .cfi_offset 4, -36 + 1417 .cfi_offset 5, -32 + 1418 .cfi_offset 6, -28 + 1419 .cfi_offset 7, -24 + 1420 .cfi_offset 8, -20 + 1421 .cfi_offset 9, -16 + 1422 .cfi_offset 10, -12 + 1423 .cfi_offset 11, -8 + 1424 .cfi_offset 14, -4 + 1425 0004 83B0 sub sp, sp, #12 + 1426 .LCFI16: + 1427 .cfi_def_cfa_offset 48 + 1428 0006 0190 str r0, [sp, #4] + 1429 0008 0F46 mov r7, r1 + 1430 000a 1546 mov r5, r2 + 1431 000c 1C46 mov r4, r3 + 1432 000e BDF834B0 ldrh fp, [sp, #52] +2526:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1433 .loc 1 2526 2 is_stmt 1 view .LVU465 +2526:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1434 .loc 1 2526 23 is_stmt 0 view .LVU466 + 1435 0012 0020 movs r0, #0 + 1436 .LVL125: +2526:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1437 .loc 1 2526 23 view .LVU467 + 1438 0014 FFF7FEFF bl AD9102_ReadReg + 1439 .LVL126: +2526:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 1440 .loc 1 2526 23 view .LVU468 + 1441 0018 8246 mov r10, r0 + 1442 .LVL127: +2527:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 1443 .loc 1 2527 2 is_stmt 1 view .LVU469 +2527:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 1444 .loc 1 2527 22 is_stmt 0 view .LVU470 + 1445 001a 0120 movs r0, #1 + 1446 001c FFF7FEFF bl AD9102_ReadReg + 1447 .LVL128: + 1448 0020 8146 mov r9, r0 + ARM GAS /tmp/ccYgfTud.s page 147 - 1388 016a 12F0010F tst r2, #1 - 1389 016e 04D1 bne .L74 - 1390 .LVL144: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1391 .loc 4 907 68 view .LVU441 - 1392 .LBE325: - 1393 .LBE324: -2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1394 .loc 1 2376 43 discriminator 2 view .LVU442 - 1395 0170 B3F57A7F cmp r3, #1000 - 1396 0174 01D8 bhi .L74 -2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1397 .loc 1 2376 62 is_stmt 1 discriminator 3 view .LVU443 -2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1398 .loc 1 2376 67 is_stmt 0 discriminator 3 view .LVU444 - 1399 0176 0133 adds r3, r3, #1 - 1400 .LVL145: -2376:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1401 .loc 1 2376 67 discriminator 3 view .LVU445 - 1402 0178 F5E7 b .L73 - 1403 .L74: -2377:Src/main.c **** while(tmp32<500){tmp32++;} - 1404 .loc 1 2377 3 is_stmt 1 view .LVU446 - 1405 .LVL146: - 1406 .LBB326: - 1407 .LBI326: - 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1408 .loc 4 370 22 view .LVU447 - 1409 .LBB327: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1410 .loc 4 372 3 view .LVU448 - 1411 017a 2749 ldr r1, .L87+8 - 1412 017c 0A68 ldr r2, [r1] - 1413 017e 22F04002 bic r2, r2, #64 - 1414 0182 0A60 str r2, [r1] - 1415 .LVL147: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1416 .loc 4 372 3 is_stmt 0 view .LVU449 - 1417 .LBE327: - 1418 .LBE326: -2378:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1419 .loc 1 2378 3 is_stmt 1 view .LVU450 - 1420 .LBB329: - 1421 .LBB328: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 1422 .loc 4 373 1 is_stmt 0 view .LVU451 - 1423 0184 00E0 b .L76 - 1424 .L77: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 1425 .loc 4 373 1 view .LVU452 - 1426 .LBE328: - 1427 .LBE329: -2378:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1428 .loc 1 2378 20 is_stmt 1 discriminator 2 view .LVU453 -2378:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1429 .loc 1 2378 25 is_stmt 0 discriminator 2 view .LVU454 - 1430 0186 0133 adds r3, r3, #1 - ARM GAS /tmp/ccO46DoU.s page 140 + 1449 .LVL129: +2528:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 1450 .loc 1 2528 2 is_stmt 1 view .LVU471 +2528:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 1451 .loc 1 2528 22 is_stmt 0 view .LVU472 + 1452 0022 0220 movs r0, #2 + 1453 0024 FFF7FEFF bl AD9102_ReadReg + 1454 .LVL130: + 1455 0028 8046 mov r8, r0 + 1456 .LVL131: +2529:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 1457 .loc 1 2529 2 is_stmt 1 view .LVU473 +2529:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 1458 .loc 1 2529 21 is_stmt 0 view .LVU474 + 1459 002a 6020 movs r0, #96 + 1460 002c FFF7FEFF bl AD9102_ReadReg + 1461 .LVL132: +2530:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 1462 .loc 1 2530 2 is_stmt 1 view .LVU475 +2531:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 1463 .loc 1 2531 57 is_stmt 0 view .LVU476 + 1464 0030 9DF83030 ldrb r3, [sp, #48] @ zero_extendqisi2 + 1465 0034 1B01 lsls r3, r3, #4 + 1466 0036 03F0F003 and r3, r3, #240 +2530:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 1467 .loc 1 2530 11 view .LVU477 + 1468 003a 40F20116 movw r6, #257 + 1469 003e 1E43 orrs r6, r6, r3 + 1470 .LVL133: +2534:Src/main.c **** { + 1471 .loc 1 2534 2 is_stmt 1 view .LVU478 +2534:Src/main.c **** { + 1472 .loc 1 2534 5 is_stmt 0 view .LVU479 + 1473 0040 1CB1 cbz r4, .L88 +2538:Src/main.c **** { + 1474 .loc 1 2538 2 is_stmt 1 view .LVU480 +2538:Src/main.c **** { + 1475 .loc 1 2538 5 is_stmt 0 view .LVU481 + 1476 0042 3F2C cmp r4, #63 + 1477 0044 02D9 bls .L76 +2540:Src/main.c **** } + 1478 .loc 1 2540 12 view .LVU482 + 1479 0046 3F24 movs r4, #63 + 1480 .LVL134: +2540:Src/main.c **** } + 1481 .loc 1 2540 12 view .LVU483 + 1482 0048 00E0 b .L76 + 1483 .LVL135: + 1484 .L88: +2536:Src/main.c **** } + 1485 .loc 1 2536 12 view .LVU484 + 1486 004a 0124 movs r4, #1 + 1487 .LVL136: + 1488 .L76: +2542:Src/main.c **** { + 1489 .loc 1 2542 2 is_stmt 1 view .LVU485 +2542:Src/main.c **** { + ARM GAS /tmp/ccYgfTud.s page 148 - 1431 .LVL148: - 1432 .L76: -2378:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1433 .loc 1 2378 14 is_stmt 1 discriminator 1 view .LVU455 - 1434 0188 B3F5FA7F cmp r3, #500 - 1435 018c FBD3 bcc .L77 -2380:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 1436 .loc 1 2380 3 view .LVU456 - 1437 018e 0122 movs r2, #1 - 1438 0190 4FF40061 mov r1, #2048 - 1439 0194 1E48 ldr r0, .L87 - 1440 0196 FFF7FEFF bl HAL_GPIO_WritePin - 1441 .LVL149: -2381:Src/main.c **** } - 1442 .loc 1 2381 3 view .LVU457 - 1443 .LBB330: - 1444 .LBI330: -1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1445 .loc 4 1344 26 view .LVU458 - 1446 .LBB331: - 1447 .loc 4 1346 3 view .LVU459 - 1448 .loc 4 1346 21 is_stmt 0 view .LVU460 - 1449 019a 1F4B ldr r3, .L87+8 - 1450 019c DD68 ldr r5, [r3, #12] - 1451 .loc 4 1346 10 view .LVU461 - 1452 019e ADB2 uxth r5, r5 - 1453 .LVL150: - 1454 .loc 4 1346 10 view .LVU462 - 1455 .LBE331: - 1456 .LBE330: - 1457 01a0 91E7 b .L51 - 1458 .LVL151: - 1459 .L52: -2385:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); - 1460 .loc 1 2385 3 is_stmt 1 view .LVU463 - 1461 01a2 1C4C ldr r4, .L87+4 - 1462 01a4 0122 movs r2, #1 - 1463 01a6 4021 movs r1, #64 - 1464 01a8 2046 mov r0, r4 - 1465 01aa FFF7FEFF bl HAL_GPIO_WritePin - 1466 .LVL152: -2386:Src/main.c **** tmp32=0; - 1467 .loc 1 2386 3 view .LVU464 - 1468 01ae 0022 movs r2, #0 - 1469 01b0 4FF48061 mov r1, #1024 - 1470 01b4 2046 mov r0, r4 - 1471 01b6 FFF7FEFF bl HAL_GPIO_WritePin - 1472 .LVL153: -2387:Src/main.c **** while(tmp32<500){tmp32++;} - 1473 .loc 1 2387 3 view .LVU465 -2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1474 .loc 1 2388 3 view .LVU466 -2387:Src/main.c **** while(tmp32<500){tmp32++;} - 1475 .loc 1 2387 8 is_stmt 0 view .LVU467 - 1476 01ba 0023 movs r3, #0 -2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1477 .loc 1 2388 8 view .LVU468 - ARM GAS /tmp/ccO46DoU.s page 141 + 1490 .loc 1 2542 5 is_stmt 0 view .LVU486 + 1491 004c BBF1000F cmp fp, #0 + 1492 0050 01D1 bne .L77 +2544:Src/main.c **** } + 1493 .loc 1 2544 14 view .LVU487 + 1494 0052 4FF6FF7B movw fp, #65535 + 1495 .L77: + 1496 .LVL137: +2546:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 1497 .loc 1 2546 2 is_stmt 1 view .LVU488 +2547:Src/main.c **** + 1498 .loc 1 2547 35 is_stmt 0 view .LVU489 + 1499 0056 05F00305 and r5, r5, #3 + 1500 .LVL138: +2546:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 1501 .loc 1 2546 71 view .LVU490 + 1502 005a A400 lsls r4, r4, #2 + 1503 .LVL139: +2546:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 1504 .loc 1 2546 71 view .LVU491 + 1505 005c E4B2 uxtb r4, r4 +2546:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 1506 .loc 1 2546 11 view .LVU492 + 1507 005e 2543 orrs r5, r5, r4 + 1508 .LVL140: +2549:Src/main.c **** + 1509 .loc 1 2549 2 is_stmt 1 view .LVU493 +2552:Src/main.c **** { + 1510 .loc 1 2552 2 view .LVU494 +2552:Src/main.c **** { + 1511 .loc 1 2552 5 is_stmt 0 view .LVU495 + 1512 0060 BAF1000F cmp r10, #0 + 1513 0064 36D1 bne .L91 +2549:Src/main.c **** + 1514 .loc 1 2549 10 view .LVU496 + 1515 0066 0124 movs r4, #1 + 1516 .L78: + 1517 .LVL141: +2558:Src/main.c **** { + 1518 .loc 1 2558 2 is_stmt 1 view .LVU497 +2558:Src/main.c **** { + 1519 .loc 1 2558 5 is_stmt 0 view .LVU498 + 1520 0068 19F4F47F tst r9, #488 + 1521 006c 00D0 beq .L79 +2560:Src/main.c **** } + 1522 .loc 1 2560 6 view .LVU499 + 1523 006e 0024 movs r4, #0 + 1524 .LVL142: + 1525 .L79: +2564:Src/main.c **** { + 1526 .loc 1 2564 2 is_stmt 1 view .LVU500 +2564:Src/main.c **** { + 1527 .loc 1 2564 5 is_stmt 0 view .LVU501 + 1528 0070 18F40E6F tst r8, #2272 + 1529 0074 00D0 beq .L80 +2566:Src/main.c **** } + 1530 .loc 1 2566 6 view .LVU502 + ARM GAS /tmp/ccYgfTud.s page 149 - 1478 01bc 00E0 b .L78 - 1479 .LVL154: - 1480 .L79: -2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1481 .loc 1 2388 20 is_stmt 1 discriminator 2 view .LVU469 -2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1482 .loc 1 2388 25 is_stmt 0 discriminator 2 view .LVU470 - 1483 01be 0133 adds r3, r3, #1 - 1484 .LVL155: - 1485 .L78: -2388:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1486 .loc 1 2388 14 is_stmt 1 discriminator 1 view .LVU471 - 1487 01c0 B3F5FA7F cmp r3, #500 - 1488 01c4 FBD3 bcc .L79 -2390:Src/main.c **** tmp32 = 0; - 1489 .loc 1 2390 3 view .LVU472 - 1490 .LVL156: - 1491 .LBB332: - 1492 .LBI332: - 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1493 .loc 4 358 22 view .LVU473 - 1494 .LBB333: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1495 .loc 4 360 3 view .LVU474 - 1496 01c6 154A ldr r2, .L87+12 - 1497 01c8 1368 ldr r3, [r2] - 1498 .LVL157: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1499 .loc 4 360 3 is_stmt 0 view .LVU475 - 1500 01ca 43F04003 orr r3, r3, #64 - 1501 01ce 1360 str r3, [r2] - 1502 .LVL158: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1503 .loc 4 360 3 view .LVU476 - 1504 .LBE333: - 1505 .LBE332: -2391:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1506 .loc 1 2391 3 is_stmt 1 view .LVU477 -2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1507 .loc 1 2392 3 view .LVU478 -2391:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1508 .loc 1 2391 9 is_stmt 0 view .LVU479 - 1509 01d0 0023 movs r3, #0 - 1510 .LVL159: - 1511 .L80: -2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1512 .loc 1 2392 43 is_stmt 1 discriminator 1 view .LVU480 - 1513 .LBB334: - 1514 .LBI334: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1515 .loc 4 905 26 view .LVU481 - 1516 .LBB335: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1517 .loc 4 907 3 view .LVU482 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1518 .loc 4 907 12 is_stmt 0 view .LVU483 - 1519 01d2 124A ldr r2, .L87+12 - ARM GAS /tmp/ccO46DoU.s page 142 + 1531 0076 0024 movs r4, #0 + 1532 .LVL143: + 1533 .L80: +2570:Src/main.c **** { + 1534 .loc 1 2570 2 is_stmt 1 view .LVU503 +2570:Src/main.c **** { + 1535 .loc 1 2570 5 is_stmt 0 view .LVU504 + 1536 0078 10F03F0F tst r0, #63 + 1537 007c 00D0 beq .L81 +2572:Src/main.c **** } + 1538 .loc 1 2572 6 view .LVU505 + 1539 007e 0024 movs r4, #0 + 1540 .LVL144: + 1541 .L81: +2575:Src/main.c **** { + 1542 .loc 1 2575 2 is_stmt 1 view .LVU506 +2575:Src/main.c **** { + 1543 .loc 1 2575 5 is_stmt 0 view .LVU507 + 1544 0080 27B1 cbz r7, .L82 +2575:Src/main.c **** { + 1545 .loc 1 2575 17 discriminator 1 view .LVU508 + 1546 0082 019B ldr r3, [sp, #4] + 1547 0084 13F0010F tst r3, #1 + 1548 0088 00D1 bne .L82 +2577:Src/main.c **** } + 1549 .loc 1 2577 6 view .LVU509 + 1550 008a 0024 movs r4, #0 + 1551 .LVL145: + 1552 .L82: +2580:Src/main.c **** { + 1553 .loc 1 2580 2 is_stmt 1 view .LVU510 +2580:Src/main.c **** { + 1554 .loc 1 2580 6 is_stmt 0 view .LVU511 + 1555 008c 2720 movs r0, #39 + 1556 .LVL146: +2580:Src/main.c **** { + 1557 .loc 1 2580 6 view .LVU512 + 1558 008e FFF7FEFF bl AD9102_ReadReg + 1559 .LVL147: +2580:Src/main.c **** { + 1560 .loc 1 2580 5 discriminator 1 view .LVU513 + 1561 0092 43F21223 movw r3, #12818 + 1562 0096 9842 cmp r0, r3 + 1563 0098 00D0 beq .L83 +2582:Src/main.c **** } + 1564 .loc 1 2582 6 view .LVU514 + 1565 009a 0024 movs r4, #0 + 1566 .LVL148: + 1567 .L83: +2584:Src/main.c **** { + 1568 .loc 1 2584 2 is_stmt 1 view .LVU515 +2584:Src/main.c **** { + 1569 .loc 1 2584 6 is_stmt 0 view .LVU516 + 1570 009c 2820 movs r0, #40 + 1571 009e FFF7FEFF bl AD9102_ReadReg + 1572 .LVL149: +2584:Src/main.c **** { + ARM GAS /tmp/ccYgfTud.s page 150 - 1520 01d4 9268 ldr r2, [r2, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1521 .loc 4 907 68 view .LVU484 - 1522 01d6 12F0010F tst r2, #1 - 1523 01da 04D1 bne .L81 - 1524 .LVL160: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1525 .loc 4 907 68 view .LVU485 - 1526 .LBE335: - 1527 .LBE334: -2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1528 .loc 1 2392 43 discriminator 2 view .LVU486 - 1529 01dc B3F57A7F cmp r3, #1000 - 1530 01e0 01D8 bhi .L81 -2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1531 .loc 1 2392 62 is_stmt 1 discriminator 3 view .LVU487 -2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1532 .loc 1 2392 67 is_stmt 0 discriminator 3 view .LVU488 - 1533 01e2 0133 adds r3, r3, #1 - 1534 .LVL161: -2392:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1535 .loc 1 2392 67 discriminator 3 view .LVU489 - 1536 01e4 F5E7 b .L80 - 1537 .L81: -2393:Src/main.c **** while(tmp32<500){tmp32++;} - 1538 .loc 1 2393 3 is_stmt 1 view .LVU490 - 1539 .LVL162: - 1540 .LBB336: - 1541 .LBI336: - 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1542 .loc 4 370 22 view .LVU491 - 1543 .LBB337: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1544 .loc 4 372 3 view .LVU492 - 1545 01e6 0D49 ldr r1, .L87+12 - 1546 01e8 0A68 ldr r2, [r1] - 1547 01ea 22F04002 bic r2, r2, #64 - 1548 01ee 0A60 str r2, [r1] - 1549 .LVL163: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1550 .loc 4 372 3 is_stmt 0 view .LVU493 - 1551 .LBE337: - 1552 .LBE336: -2394:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1553 .loc 1 2394 3 is_stmt 1 view .LVU494 - 1554 .LBB339: - 1555 .LBB338: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 1556 .loc 4 373 1 is_stmt 0 view .LVU495 - 1557 01f0 00E0 b .L83 - 1558 .L84: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 1559 .loc 4 373 1 view .LVU496 - 1560 .LBE338: - 1561 .LBE339: -2394:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1562 .loc 1 2394 20 is_stmt 1 discriminator 2 view .LVU497 - ARM GAS /tmp/ccO46DoU.s page 143 + 1573 .loc 1 2584 5 discriminator 1 view .LVU517 + 1574 00a2 B042 cmp r0, r6 + 1575 00a4 00D0 beq .L84 +2586:Src/main.c **** } + 1576 .loc 1 2586 6 view .LVU518 + 1577 00a6 0024 movs r4, #0 + 1578 .LVL150: + 1579 .L84: +2588:Src/main.c **** { + 1580 .loc 1 2588 2 is_stmt 1 view .LVU519 +2588:Src/main.c **** { + 1581 .loc 1 2588 6 is_stmt 0 view .LVU520 + 1582 00a8 2920 movs r0, #41 + 1583 00aa FFF7FEFF bl AD9102_ReadReg + 1584 .LVL151: +2588:Src/main.c **** { + 1585 .loc 1 2588 5 discriminator 1 view .LVU521 + 1586 00ae 5845 cmp r0, fp + 1587 00b0 00D0 beq .L85 +2590:Src/main.c **** } + 1588 .loc 1 2590 6 view .LVU522 + 1589 00b2 0024 movs r4, #0 + 1590 .LVL152: + 1591 .L85: +2592:Src/main.c **** { + 1592 .loc 1 2592 2 is_stmt 1 view .LVU523 +2592:Src/main.c **** { + 1593 .loc 1 2592 6 is_stmt 0 view .LVU524 + 1594 00b4 1F20 movs r0, #31 + 1595 00b6 FFF7FEFF bl AD9102_ReadReg + 1596 .LVL153: +2592:Src/main.c **** { + 1597 .loc 1 2592 5 discriminator 1 view .LVU525 + 1598 00ba 00B1 cbz r0, .L86 +2594:Src/main.c **** } + 1599 .loc 1 2594 6 view .LVU526 + 1600 00bc 0024 movs r4, #0 + 1601 .LVL154: + 1602 .L86: +2596:Src/main.c **** { + 1603 .loc 1 2596 2 is_stmt 1 view .LVU527 +2596:Src/main.c **** { + 1604 .loc 1 2596 6 is_stmt 0 view .LVU528 + 1605 00be 3720 movs r0, #55 + 1606 00c0 FFF7FEFF bl AD9102_ReadReg + 1607 .LVL155: +2596:Src/main.c **** { + 1608 .loc 1 2596 5 discriminator 1 view .LVU529 + 1609 00c4 A842 cmp r0, r5 + 1610 00c6 00D0 beq .L87 +2598:Src/main.c **** } + 1611 .loc 1 2598 6 view .LVU530 + 1612 00c8 0024 movs r4, #0 + 1613 .LVL156: + 1614 .L87: +2601:Src/main.c **** } + 1615 .loc 1 2601 2 is_stmt 1 view .LVU531 + ARM GAS /tmp/ccYgfTud.s page 151 -2394:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1563 .loc 1 2394 25 is_stmt 0 discriminator 2 view .LVU498 - 1564 01f2 0133 adds r3, r3, #1 - 1565 .LVL164: - 1566 .L83: -2394:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1567 .loc 1 2394 14 is_stmt 1 discriminator 1 view .LVU499 - 1568 01f4 B3F5FA7F cmp r3, #500 - 1569 01f8 FBD3 bcc .L84 -2396:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 1570 .loc 1 2396 3 view .LVU500 - 1571 01fa 0122 movs r2, #1 - 1572 01fc 4FF48061 mov r1, #1024 - 1573 0200 0448 ldr r0, .L87+4 - 1574 0202 FFF7FEFF bl HAL_GPIO_WritePin - 1575 .LVL165: +2602:Src/main.c **** + 1616 .loc 1 2602 1 is_stmt 0 view .LVU532 + 1617 00ca 84F00100 eor r0, r4, #1 + 1618 00ce 03B0 add sp, sp, #12 + 1619 .LCFI17: + 1620 .cfi_remember_state + 1621 .cfi_def_cfa_offset 36 + 1622 @ sp needed + 1623 00d0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1624 .LVL157: + 1625 .L91: + 1626 .LCFI18: + 1627 .cfi_restore_state +2554:Src/main.c **** } + 1628 .loc 1 2554 6 view .LVU533 + 1629 00d4 0024 movs r4, #0 + 1630 00d6 C7E7 b .L78 + 1631 .cfi_endproc + 1632 .LFE1216: + 1634 .section .text.AD9102_Apply,"ax",%progbits + 1635 .align 1 + 1636 .syntax unified + 1637 .thumb + 1638 .thumb_func + 1640 AD9102_Apply: + 1641 .LVL158: + 1642 .LFB1215: +2481:Src/main.c **** if (enable) + 1643 .loc 1 2481 1 is_stmt 1 view -0 + 1644 .cfi_startproc + 1645 @ args = 4, pretend = 0, frame = 8 + 1646 @ frame_needed = 0, uses_anonymous_args = 0 +2481:Src/main.c **** if (enable) + 1647 .loc 1 2481 1 is_stmt 0 view .LVU535 + 1648 0000 30B5 push {r4, r5, lr} + 1649 .LCFI19: + 1650 .cfi_def_cfa_offset 12 + 1651 .cfi_offset 4, -12 + 1652 .cfi_offset 5, -8 + 1653 .cfi_offset 14, -4 + 1654 0002 83B0 sub sp, sp, #12 + 1655 .LCFI20: + 1656 .cfi_def_cfa_offset 24 +2482:Src/main.c **** { + 1657 .loc 1 2482 2 is_stmt 1 view .LVU536 +2482:Src/main.c **** { + 1658 .loc 1 2482 5 is_stmt 0 view .LVU537 + 1659 0004 0029 cmp r1, #0 + 1660 0006 4AD0 beq .L103 + 1661 .LBB373: +2484:Src/main.c **** uint16_t pat_timebase; + 1662 .loc 1 2484 3 is_stmt 1 view .LVU538 +2485:Src/main.c **** + 1663 .loc 1 2485 3 view .LVU539 +2487:Src/main.c **** { + 1664 .loc 1 2487 3 view .LVU540 +2487:Src/main.c **** { + ARM GAS /tmp/ccYgfTud.s page 152 + + + 1665 .loc 1 2487 6 is_stmt 0 view .LVU541 + 1666 0008 1AB1 cbz r2, .L108 +2491:Src/main.c **** { + 1667 .loc 1 2491 3 is_stmt 1 view .LVU542 +2491:Src/main.c **** { + 1668 .loc 1 2491 6 is_stmt 0 view .LVU543 + 1669 000a 3F2A cmp r2, #63 + 1670 000c 02D9 bls .L104 +2493:Src/main.c **** } + 1671 .loc 1 2493 13 view .LVU544 + 1672 000e 3F22 movs r2, #63 + 1673 .LVL159: +2493:Src/main.c **** } + 1674 .loc 1 2493 13 view .LVU545 + 1675 0010 00E0 b .L104 + 1676 .LVL160: + 1677 .L108: +2489:Src/main.c **** } + 1678 .loc 1 2489 13 view .LVU546 + 1679 0012 0122 movs r2, #1 + 1680 .LVL161: + 1681 .L104: +2495:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 1682 .loc 1 2495 3 is_stmt 1 view .LVU547 +2496:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 1683 .loc 1 2496 25 is_stmt 0 view .LVU548 + 1684 0014 00F00300 and r0, r0, #3 + 1685 .LVL162: +2495:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 1686 .loc 1 2495 60 view .LVU549 + 1687 0018 9200 lsls r2, r2, #2 + 1688 .LVL163: +2495:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 1689 .loc 1 2495 60 view .LVU550 + 1690 001a D2B2 uxtb r2, r2 +2495:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 1691 .loc 1 2495 11 view .LVU551 + 1692 001c 40EA0204 orr r4, r0, r2 + 1693 .LVL164: +2497:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 1694 .loc 1 2497 3 is_stmt 1 view .LVU552 +2498:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 1695 .loc 1 2498 49 is_stmt 0 view .LVU553 + 1696 0020 1B01 lsls r3, r3, #4 + 1697 .LVL165: +2498:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 1698 .loc 1 2498 49 view .LVU554 + 1699 0022 03F0F003 and r3, r3, #240 +2497:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 1700 .loc 1 2497 16 view .LVU555 + 1701 0026 40F20115 movw r5, #257 + 1702 002a 1D43 orrs r5, r5, r3 + 1703 .LVL166: +2501:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); + 1704 .loc 1 2501 3 is_stmt 1 view .LVU556 + 1705 002c 43F21221 movw r1, #12818 + 1706 .LVL167: + ARM GAS /tmp/ccYgfTud.s page 153 + + +2501:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); + 1707 .loc 1 2501 3 is_stmt 0 view .LVU557 + 1708 0030 2720 movs r0, #39 + 1709 0032 FFF7FEFF bl AD9102_WriteReg + 1710 .LVL168: +2502:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); + 1711 .loc 1 2502 3 is_stmt 1 view .LVU558 + 1712 0036 2146 mov r1, r4 + 1713 0038 3720 movs r0, #55 + 1714 003a FFF7FEFF bl AD9102_WriteReg + 1715 .LVL169: +2503:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); + 1716 .loc 1 2503 3 view .LVU559 + 1717 003e 2946 mov r1, r5 + 1718 0040 2820 movs r0, #40 + 1719 0042 FFF7FEFF bl AD9102_WriteReg + 1720 .LVL170: +2504:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat + 1721 .loc 1 2504 3 view .LVU560 + 1722 0046 BDF81810 ldrh r1, [sp, #24] + 1723 004a 2920 movs r0, #41 + 1724 004c FFF7FEFF bl AD9102_WriteReg + 1725 .LVL171: +2505:Src/main.c **** + 1726 .loc 1 2505 3 view .LVU561 + 1727 0050 0021 movs r1, #0 + 1728 0052 1F20 movs r0, #31 + 1729 0054 FFF7FEFF bl AD9102_WriteReg + 1730 .LVL172: +2509:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); + 1731 .loc 1 2509 3 view .LVU562 + 1732 0058 0122 movs r2, #1 + 1733 005a 4FF40061 mov r1, #2048 + 1734 005e 1548 ldr r0, .L111 + 1735 0060 FFF7FEFF bl HAL_GPIO_WritePin + 1736 .LVL173: +2510:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 1737 .loc 1 2510 3 view .LVU563 + 1738 0064 0121 movs r1, #1 + 1739 0066 1E20 movs r0, #30 + 1740 0068 FFF7FEFF bl AD9102_WriteReg + 1741 .LVL174: +2511:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + 1742 .loc 1 2511 3 view .LVU564 + 1743 006c 0121 movs r1, #1 + 1744 006e 1D20 movs r0, #29 + 1745 0070 FFF7FEFF bl AD9102_WriteReg + 1746 .LVL175: +2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1747 .loc 1 2512 3 view .LVU565 + 1748 .LBB374: +2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1749 .loc 1 2512 8 view .LVU566 +2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1750 .loc 1 2512 26 is_stmt 0 view .LVU567 + 1751 0074 0023 movs r3, #0 + 1752 0076 0193 str r3, [sp, #4] + ARM GAS /tmp/ccYgfTud.s page 154 + + +2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1753 .loc 1 2512 3 view .LVU568 + 1754 0078 02E0 b .L105 + 1755 .L106: +2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1756 .loc 1 2512 49 is_stmt 1 discriminator 3 view .LVU569 +2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1757 .loc 1 2512 44 discriminator 3 view .LVU570 + 1758 007a 019B ldr r3, [sp, #4] + 1759 007c 0133 adds r3, r3, #1 + 1760 007e 0193 str r3, [sp, #4] + 1761 .L105: +2512:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1762 .loc 1 2512 35 discriminator 1 view .LVU571 + 1763 0080 019B ldr r3, [sp, #4] + 1764 0082 B3F57A7F cmp r3, #1000 + 1765 0086 F8D3 bcc .L106 + 1766 .LBE374: +2513:Src/main.c **** } + 1767 .loc 1 2513 3 view .LVU572 + 1768 0088 0022 movs r2, #0 + 1769 008a 4FF40061 mov r1, #2048 + 1770 008e 0948 ldr r0, .L111 + 1771 0090 FFF7FEFF bl HAL_GPIO_WritePin + 1772 .LVL176: + 1773 .L107: +2513:Src/main.c **** } + 1774 .loc 1 2513 3 is_stmt 0 view .LVU573 + 1775 .LBE373: +2521:Src/main.c **** } + 1776 .loc 1 2521 2 is_stmt 1 view .LVU574 +2521:Src/main.c **** } + 1777 .loc 1 2521 9 is_stmt 0 view .LVU575 + 1778 0094 1E20 movs r0, #30 + 1779 0096 FFF7FEFF bl AD9102_ReadReg + 1780 .LVL177: +2522:Src/main.c **** + 1781 .loc 1 2522 1 view .LVU576 + 1782 009a 03B0 add sp, sp, #12 + 1783 .LCFI21: + 1784 .cfi_remember_state + 1785 .cfi_def_cfa_offset 12 + 1786 @ sp needed + 1787 009c 30BD pop {r4, r5, pc} + 1788 .LVL178: + 1789 .L103: + 1790 .LCFI22: + 1791 .cfi_restore_state +2517:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 1792 .loc 1 2517 3 is_stmt 1 view .LVU577 + 1793 009e 0021 movs r1, #0 + 1794 .LVL179: +2517:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 1795 .loc 1 2517 3 is_stmt 0 view .LVU578 + 1796 00a0 1E20 movs r0, #30 + 1797 .LVL180: +2517:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + ARM GAS /tmp/ccYgfTud.s page 155 + + + 1798 .loc 1 2517 3 view .LVU579 + 1799 00a2 FFF7FEFF bl AD9102_WriteReg + 1800 .LVL181: +2518:Src/main.c **** } + 1801 .loc 1 2518 3 is_stmt 1 view .LVU580 + 1802 00a6 0122 movs r2, #1 + 1803 00a8 4FF40061 mov r1, #2048 + 1804 00ac 0148 ldr r0, .L111 + 1805 00ae FFF7FEFF bl HAL_GPIO_WritePin + 1806 .LVL182: + 1807 00b2 EFE7 b .L107 + 1808 .L112: + 1809 .align 2 + 1810 .L111: + 1811 00b4 000C0240 .word 1073875968 + 1812 .cfi_endproc + 1813 .LFE1215: + 1815 .section .text.OUT_trigger,"ax",%progbits + 1816 .align 1 + 1817 .syntax unified + 1818 .thumb + 1819 .thumb_func + 1821 OUT_trigger: + 1822 .LVL183: + 1823 .LFB1210: +2346:Src/main.c **** switch (out_n) + 1824 .loc 1 2346 1 view -0 + 1825 .cfi_startproc + 1826 @ args = 0, pretend = 0, frame = 0 + 1827 @ frame_needed = 0, uses_anonymous_args = 0 +2346:Src/main.c **** switch (out_n) + 1828 .loc 1 2346 1 is_stmt 0 view .LVU582 + 1829 0000 10B5 push {r4, lr} + 1830 .LCFI23: + 1831 .cfi_def_cfa_offset 8 + 1832 .cfi_offset 4, -8 + 1833 .cfi_offset 14, -4 +2347:Src/main.c **** { + 1834 .loc 1 2347 2 is_stmt 1 view .LVU583 + 1835 0002 0928 cmp r0, #9 + 1836 0004 13D8 bhi .L113 + 1837 0006 DFE800F0 tbb [pc, r0] + 1838 .L116: + 1839 000a 05 .byte (.L125-.L116)/2 + 1840 000b 13 .byte (.L124-.L116)/2 + 1841 000c 21 .byte (.L123-.L116)/2 + 1842 000d 2F .byte (.L122-.L116)/2 + 1843 000e 3D .byte (.L121-.L116)/2 + 1844 000f 4B .byte (.L120-.L116)/2 + 1845 0010 59 .byte (.L119-.L116)/2 + 1846 0011 65 .byte (.L118-.L116)/2 + 1847 0012 71 .byte (.L117-.L116)/2 + 1848 0013 7D .byte (.L115-.L116)/2 + 1849 .p2align 1 + 1850 .L125: +2350:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 1851 .loc 1 2350 3 view .LVU584 + ARM GAS /tmp/ccYgfTud.s page 156 + + + 1852 0014 414C ldr r4, .L128 + 1853 0016 0122 movs r2, #1 + 1854 0018 4FF48061 mov r1, #1024 + 1855 001c 2046 mov r0, r4 + 1856 .LVL184: +2350:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 1857 .loc 1 2350 3 is_stmt 0 view .LVU585 + 1858 001e FFF7FEFF bl HAL_GPIO_WritePin + 1859 .LVL185: +2351:Src/main.c **** break; + 1860 .loc 1 2351 3 is_stmt 1 view .LVU586 + 1861 0022 0022 movs r2, #0 + 1862 0024 4FF48061 mov r1, #1024 + 1863 0028 2046 mov r0, r4 + 1864 002a FFF7FEFF bl HAL_GPIO_WritePin + 1865 .LVL186: +2352:Src/main.c **** + 1866 .loc 1 2352 2 view .LVU587 + 1867 .L113: +2399:Src/main.c **** + 1868 .loc 1 2399 1 is_stmt 0 view .LVU588 + 1869 002e 10BD pop {r4, pc} + 1870 .LVL187: + 1871 .L124: +2355:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 1872 .loc 1 2355 3 is_stmt 1 view .LVU589 + 1873 0030 3A4C ldr r4, .L128 + 1874 0032 0122 movs r2, #1 + 1875 0034 4FF40061 mov r1, #2048 + 1876 0038 2046 mov r0, r4 + 1877 .LVL188: +2355:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 1878 .loc 1 2355 3 is_stmt 0 view .LVU590 + 1879 003a FFF7FEFF bl HAL_GPIO_WritePin + 1880 .LVL189: +2356:Src/main.c **** break; + 1881 .loc 1 2356 3 is_stmt 1 view .LVU591 + 1882 003e 0022 movs r2, #0 + 1883 0040 4FF40061 mov r1, #2048 + 1884 0044 2046 mov r0, r4 + 1885 0046 FFF7FEFF bl HAL_GPIO_WritePin + 1886 .LVL190: +2357:Src/main.c **** + 1887 .loc 1 2357 2 view .LVU592 + 1888 004a F0E7 b .L113 + 1889 .LVL191: + 1890 .L123: +2360:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 1891 .loc 1 2360 3 view .LVU593 + 1892 004c 334C ldr r4, .L128 + 1893 004e 0122 movs r2, #1 + 1894 0050 4FF48051 mov r1, #4096 + 1895 0054 2046 mov r0, r4 + 1896 .LVL192: +2360:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 1897 .loc 1 2360 3 is_stmt 0 view .LVU594 + 1898 0056 FFF7FEFF bl HAL_GPIO_WritePin + ARM GAS /tmp/ccYgfTud.s page 157 + + + 1899 .LVL193: +2361:Src/main.c **** break; + 1900 .loc 1 2361 3 is_stmt 1 view .LVU595 + 1901 005a 0022 movs r2, #0 + 1902 005c 4FF48051 mov r1, #4096 + 1903 0060 2046 mov r0, r4 + 1904 0062 FFF7FEFF bl HAL_GPIO_WritePin + 1905 .LVL194: +2362:Src/main.c **** + 1906 .loc 1 2362 2 view .LVU596 + 1907 0066 E2E7 b .L113 + 1908 .LVL195: + 1909 .L122: +2365:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 1910 .loc 1 2365 3 view .LVU597 + 1911 0068 2C4C ldr r4, .L128 + 1912 006a 0122 movs r2, #1 + 1913 006c 4FF40051 mov r1, #8192 + 1914 0070 2046 mov r0, r4 + 1915 .LVL196: +2365:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 1916 .loc 1 2365 3 is_stmt 0 view .LVU598 + 1917 0072 FFF7FEFF bl HAL_GPIO_WritePin + 1918 .LVL197: +2366:Src/main.c **** break; + 1919 .loc 1 2366 3 is_stmt 1 view .LVU599 + 1920 0076 0022 movs r2, #0 + 1921 0078 4FF40051 mov r1, #8192 + 1922 007c 2046 mov r0, r4 + 1923 007e FFF7FEFF bl HAL_GPIO_WritePin + 1924 .LVL198: +2367:Src/main.c **** + 1925 .loc 1 2367 2 view .LVU600 + 1926 0082 D4E7 b .L113 + 1927 .LVL199: + 1928 .L121: +2370:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 1929 .loc 1 2370 3 view .LVU601 + 1930 0084 254C ldr r4, .L128 + 1931 0086 0122 movs r2, #1 + 1932 0088 4FF48041 mov r1, #16384 + 1933 008c 2046 mov r0, r4 + 1934 .LVL200: +2370:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 1935 .loc 1 2370 3 is_stmt 0 view .LVU602 + 1936 008e FFF7FEFF bl HAL_GPIO_WritePin + 1937 .LVL201: +2371:Src/main.c **** break; + 1938 .loc 1 2371 3 is_stmt 1 view .LVU603 + 1939 0092 0022 movs r2, #0 + 1940 0094 4FF48041 mov r1, #16384 + 1941 0098 2046 mov r0, r4 + 1942 009a FFF7FEFF bl HAL_GPIO_WritePin + 1943 .LVL202: +2372:Src/main.c **** + 1944 .loc 1 2372 2 view .LVU604 + 1945 009e C6E7 b .L113 + ARM GAS /tmp/ccYgfTud.s page 158 + + + 1946 .LVL203: + 1947 .L120: +2375:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 1948 .loc 1 2375 3 view .LVU605 + 1949 00a0 1E4C ldr r4, .L128 + 1950 00a2 0122 movs r2, #1 + 1951 00a4 4FF40041 mov r1, #32768 + 1952 00a8 2046 mov r0, r4 + 1953 .LVL204: +2375:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 1954 .loc 1 2375 3 is_stmt 0 view .LVU606 + 1955 00aa FFF7FEFF bl HAL_GPIO_WritePin + 1956 .LVL205: +2376:Src/main.c **** break; + 1957 .loc 1 2376 3 is_stmt 1 view .LVU607 + 1958 00ae 0022 movs r2, #0 + 1959 00b0 4FF40041 mov r1, #32768 + 1960 00b4 2046 mov r0, r4 + 1961 00b6 FFF7FEFF bl HAL_GPIO_WritePin + 1962 .LVL206: +2377:Src/main.c **** + 1963 .loc 1 2377 2 view .LVU608 + 1964 00ba B8E7 b .L113 + 1965 .LVL207: + 1966 .L119: +2380:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 1967 .loc 1 2380 3 view .LVU609 + 1968 00bc 184C ldr r4, .L128+4 + 1969 00be 0122 movs r2, #1 + 1970 00c0 1021 movs r1, #16 + 1971 00c2 2046 mov r0, r4 + 1972 .LVL208: +2380:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 1973 .loc 1 2380 3 is_stmt 0 view .LVU610 + 1974 00c4 FFF7FEFF bl HAL_GPIO_WritePin + 1975 .LVL209: +2381:Src/main.c **** break; + 1976 .loc 1 2381 3 is_stmt 1 view .LVU611 + 1977 00c8 0022 movs r2, #0 + 1978 00ca 1021 movs r1, #16 + 1979 00cc 2046 mov r0, r4 + 1980 00ce FFF7FEFF bl HAL_GPIO_WritePin + 1981 .LVL210: +2382:Src/main.c **** + 1982 .loc 1 2382 2 view .LVU612 + 1983 00d2 ACE7 b .L113 + 1984 .LVL211: + 1985 .L118: +2385:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 1986 .loc 1 2385 3 view .LVU613 + 1987 00d4 124C ldr r4, .L128+4 + 1988 00d6 0122 movs r2, #1 + 1989 00d8 2021 movs r1, #32 + 1990 00da 2046 mov r0, r4 + 1991 .LVL212: +2385:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 1992 .loc 1 2385 3 is_stmt 0 view .LVU614 + ARM GAS /tmp/ccYgfTud.s page 159 + + + 1993 00dc FFF7FEFF bl HAL_GPIO_WritePin + 1994 .LVL213: +2386:Src/main.c **** break; + 1995 .loc 1 2386 3 is_stmt 1 view .LVU615 + 1996 00e0 0022 movs r2, #0 + 1997 00e2 2021 movs r1, #32 + 1998 00e4 2046 mov r0, r4 + 1999 00e6 FFF7FEFF bl HAL_GPIO_WritePin + 2000 .LVL214: +2387:Src/main.c **** + 2001 .loc 1 2387 2 view .LVU616 + 2002 00ea A0E7 b .L113 + 2003 .LVL215: + 2004 .L117: +2390:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 2005 .loc 1 2390 3 view .LVU617 + 2006 00ec 0C4C ldr r4, .L128+4 + 2007 00ee 0122 movs r2, #1 + 2008 00f0 4021 movs r1, #64 + 2009 00f2 2046 mov r0, r4 + 2010 .LVL216: +2390:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 2011 .loc 1 2390 3 is_stmt 0 view .LVU618 + 2012 00f4 FFF7FEFF bl HAL_GPIO_WritePin + 2013 .LVL217: +2391:Src/main.c **** break; + 2014 .loc 1 2391 3 is_stmt 1 view .LVU619 + 2015 00f8 0022 movs r2, #0 + 2016 00fa 4021 movs r1, #64 + 2017 00fc 2046 mov r0, r4 + 2018 00fe FFF7FEFF bl HAL_GPIO_WritePin + 2019 .LVL218: +2392:Src/main.c **** + 2020 .loc 1 2392 2 view .LVU620 + 2021 0102 94E7 b .L113 + 2022 .LVL219: + 2023 .L115: +2395:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 2024 .loc 1 2395 3 view .LVU621 + 2025 0104 064C ldr r4, .L128+4 + 2026 0106 0122 movs r2, #1 + 2027 0108 8021 movs r1, #128 + 2028 010a 2046 mov r0, r4 + 2029 .LVL220: +2395:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 2030 .loc 1 2395 3 is_stmt 0 view .LVU622 + 2031 010c FFF7FEFF bl HAL_GPIO_WritePin + 2032 .LVL221: +2396:Src/main.c **** break; + 2033 .loc 1 2396 3 is_stmt 1 view .LVU623 + 2034 0110 0022 movs r2, #0 + 2035 0112 8021 movs r1, #128 + 2036 0114 2046 mov r0, r4 + 2037 0116 FFF7FEFF bl HAL_GPIO_WritePin + 2038 .LVL222: 2397:Src/main.c **** } - 1576 .loc 1 2397 3 view .LVU501 - 1577 .LBB340: - 1578 .LBI340: -1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1579 .loc 4 1344 26 view .LVU502 - 1580 .LBB341: - 1581 .loc 4 1346 3 view .LVU503 - 1582 .loc 4 1346 21 is_stmt 0 view .LVU504 - 1583 0206 054B ldr r3, .L87+12 - 1584 0208 DD68 ldr r5, [r3, #12] - 1585 .loc 4 1346 10 view .LVU505 - 1586 020a ADB2 uxth r5, r5 - 1587 .LVL166: - 1588 .loc 4 1346 10 view .LVU506 - 1589 020c 5BE7 b .L51 - 1590 .L88: - 1591 020e 00BF .align 2 - 1592 .L87: - 1593 0210 00100240 .word 1073876992 - 1594 0214 00140240 .word 1073878016 - 1595 0218 00340140 .word 1073820672 - 1596 021c 00500140 .word 1073827840 - 1597 .LBE341: - 1598 .LBE340: - 1599 .cfi_endproc - 1600 .LFE1212: - 1602 .section .text.Stop_TIM10,"ax",%progbits - 1603 .align 1 - 1604 .syntax unified - 1605 .thumb - 1606 .thumb_func - 1608 Stop_TIM10: - 1609 .LFB1223: -2562:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff) -2563:Src/main.c **** { -2564:Src/main.c **** uint16_t cl_ind; -2565:Src/main.c **** -2566:Src/main.c **** switch (UART_header) -2567:Src/main.c **** { -2568:Src/main.c **** case 0x7777: - ARM GAS /tmp/ccO46DoU.s page 144 + 2039 .loc 1 2397 2 view .LVU624 + ARM GAS /tmp/ccYgfTud.s page 160 -2569:Src/main.c **** cl_ind = TSK_16 - 2; -2570:Src/main.c **** break; -2571:Src/main.c **** case 0x1111: -2572:Src/main.c **** cl_ind = CL_16 - 2; -2573:Src/main.c **** break; -2574:Src/main.c **** default: -2575:Src/main.c **** return 0; -2576:Src/main.c **** break; -2577:Src/main.c **** } -2578:Src/main.c **** -2579:Src/main.c **** CS_result = CalculateChecksum(pbuff, cl_ind); -2580:Src/main.c **** -2581:Src/main.c **** return ((CS_result == COMMAND[cl_ind]) ? 1 : 0); -2582:Src/main.c **** } -2583:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) -2584:Src/main.c **** { -2585:Src/main.c **** short i; -2586:Src/main.c **** uint16_t cs = *pbuff; -2587:Src/main.c **** -2588:Src/main.c **** for(i = 1; i < len; i++) -2589:Src/main.c **** { -2590:Src/main.c **** cs ^= *(pbuff+i); -2591:Src/main.c **** } -2592:Src/main.c **** return cs; -2593:Src/main.c **** } -2594:Src/main.c **** -2595:Src/main.c **** /*int SD_Init(void) -2596:Src/main.c **** { -2597:Src/main.c **** int test=0; -2598:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2599:Src/main.c **** { -2600:Src/main.c **** test = Mount_SD("/"); -2601:Src/main.c **** if (test == 0) //0 - suc -2602:Src/main.c **** { -2603:Src/main.c **** //Format_SD(); -2604:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc -2605:Src/main.c **** //Create_File("FILE2.TXT"); -2606:Src/main.c **** Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part -2607:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2608:Src/main.c **** return test; -2609:Src/main.c **** } -2610:Src/main.c **** else -2611:Src/main.c **** { -2612:Src/main.c **** return 1; -2613:Src/main.c **** } -2614:Src/main.c **** } -2615:Src/main.c **** else -2616:Src/main.c **** { -2617:Src/main.c **** return 1; -2618:Src/main.c **** } -2619:Src/main.c **** }*/ -2620:Src/main.c **** -2621:Src/main.c **** int SD_SAVE(uint16_t *pbuff) -2622:Src/main.c **** { -2623:Src/main.c **** int test=0; -2624:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2625:Src/main.c **** { - ARM GAS /tmp/ccO46DoU.s page 145 +2399:Src/main.c **** + 2040 .loc 1 2399 1 is_stmt 0 view .LVU625 + 2041 011a 88E7 b .L113 + 2042 .L129: + 2043 .align 2 + 2044 .L128: + 2045 011c 00180240 .word 1073879040 + 2046 0120 00040240 .word 1073873920 + 2047 .cfi_endproc + 2048 .LFE1210: + 2050 .section .text.MPhD_T,"ax",%progbits + 2051 .align 1 + 2052 .syntax unified + 2053 .thumb + 2054 .thumb_func + 2056 MPhD_T: + 2057 .LVL223: + 2058 .LFB1218: +2670:Src/main.c **** uint16_t P; + 2059 .loc 1 2670 1 is_stmt 1 view -0 + 2060 .cfi_startproc + 2061 @ args = 0, pretend = 0, frame = 0 + 2062 @ frame_needed = 0, uses_anonymous_args = 0 +2670:Src/main.c **** uint16_t P; + 2063 .loc 1 2670 1 is_stmt 0 view .LVU627 + 2064 0000 38B5 push {r3, r4, r5, lr} + 2065 .LCFI24: + 2066 .cfi_def_cfa_offset 16 + 2067 .cfi_offset 3, -16 + 2068 .cfi_offset 4, -12 + 2069 .cfi_offset 5, -8 + 2070 .cfi_offset 14, -4 + 2071 0002 0446 mov r4, r0 +2671:Src/main.c **** uint32_t tmp32; + 2072 .loc 1 2671 2 is_stmt 1 view .LVU628 +2672:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 2073 .loc 1 2672 2 view .LVU629 +2673:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 2074 .loc 1 2673 2 view .LVU630 + 2075 0004 0022 movs r2, #0 + 2076 0006 4FF48041 mov r1, #16384 + 2077 000a 8148 ldr r0, .L171 + 2078 .LVL224: +2673:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 2079 .loc 1 2673 2 is_stmt 0 view .LVU631 + 2080 000c FFF7FEFF bl HAL_GPIO_WritePin + 2081 .LVL225: +2674:Src/main.c **** tmp32=0; + 2082 .loc 1 2674 2 is_stmt 1 view .LVU632 + 2083 0010 0022 movs r2, #0 + 2084 0012 4FF40071 mov r1, #512 + 2085 0016 7F48 ldr r0, .L171+4 + 2086 0018 FFF7FEFF bl HAL_GPIO_WritePin + 2087 .LVL226: +2675:Src/main.c **** while(tmp32<500){tmp32++;} + 2088 .loc 1 2675 2 view .LVU633 +2676:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + ARM GAS /tmp/ccYgfTud.s page 161 + + + 2089 .loc 1 2676 2 view .LVU634 +2675:Src/main.c **** while(tmp32<500){tmp32++;} + 2090 .loc 1 2675 7 is_stmt 0 view .LVU635 + 2091 001c 0023 movs r3, #0 +2676:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2092 .loc 1 2676 7 view .LVU636 + 2093 001e 00E0 b .L131 + 2094 .LVL227: + 2095 .L132: +2676:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2096 .loc 1 2676 19 is_stmt 1 discriminator 2 view .LVU637 +2676:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2097 .loc 1 2676 24 is_stmt 0 discriminator 2 view .LVU638 + 2098 0020 0133 adds r3, r3, #1 + 2099 .LVL228: + 2100 .L131: +2676:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2101 .loc 1 2676 13 is_stmt 1 discriminator 1 view .LVU639 + 2102 0022 B3F5FA7F cmp r3, #500 + 2103 0026 FBD3 bcc .L132 +2677:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 2104 .loc 1 2677 2 view .LVU640 + 2105 0028 0122 movs r2, #1 + 2106 002a 4FF48041 mov r1, #16384 + 2107 002e 7848 ldr r0, .L171 + 2108 0030 FFF7FEFF bl HAL_GPIO_WritePin + 2109 .LVL229: +2678:Src/main.c **** tmp32=0; + 2110 .loc 1 2678 2 view .LVU641 + 2111 0034 0122 movs r2, #1 + 2112 0036 4FF40071 mov r1, #512 + 2113 003a 7648 ldr r0, .L171+4 + 2114 003c FFF7FEFF bl HAL_GPIO_WritePin + 2115 .LVL230: +2679:Src/main.c **** while(tmp32<500){tmp32++;} + 2116 .loc 1 2679 2 view .LVU642 +2680:Src/main.c **** if (num==1)//MPD1 + 2117 .loc 1 2680 2 view .LVU643 +2679:Src/main.c **** while(tmp32<500){tmp32++;} + 2118 .loc 1 2679 7 is_stmt 0 view .LVU644 + 2119 0040 0023 movs r3, #0 +2680:Src/main.c **** if (num==1)//MPD1 + 2120 .loc 1 2680 7 view .LVU645 + 2121 0042 00E0 b .L133 + 2122 .LVL231: + 2123 .L134: +2680:Src/main.c **** if (num==1)//MPD1 + 2124 .loc 1 2680 19 is_stmt 1 discriminator 2 view .LVU646 +2680:Src/main.c **** if (num==1)//MPD1 + 2125 .loc 1 2680 24 is_stmt 0 discriminator 2 view .LVU647 + 2126 0044 0133 adds r3, r3, #1 + 2127 .LVL232: + 2128 .L133: +2680:Src/main.c **** if (num==1)//MPD1 + 2129 .loc 1 2680 13 is_stmt 1 discriminator 1 view .LVU648 + 2130 0046 B3F5FA7F cmp r3, #500 + 2131 004a FBD3 bcc .L134 + ARM GAS /tmp/ccYgfTud.s page 162 -2626:Src/main.c **** test = Mount_SD("/"); -2627:Src/main.c **** if (test == 0) //0 - suc -2628:Src/main.c **** { -2629:Src/main.c **** //Format_SD(); -2630:Src/main.c **** test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8); -2631:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2632:Src/main.c **** return test; -2633:Src/main.c **** } -2634:Src/main.c **** else -2635:Src/main.c **** { -2636:Src/main.c **** return 1; -2637:Src/main.c **** } -2638:Src/main.c **** } -2639:Src/main.c **** else -2640:Src/main.c **** { -2641:Src/main.c **** return 1; -2642:Src/main.c **** } -2643:Src/main.c **** } -2644:Src/main.c **** -2645:Src/main.c **** -2646:Src/main.c **** -2647:Src/main.c **** //uint32_t Get_Length(void) -2648:Src/main.c **** //{ -2649:Src/main.c **** // return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16); -2650:Src/main.c **** //} -2651:Src/main.c **** -2652:Src/main.c **** int SD_READ(uint16_t *pbuff) -2653:Src/main.c **** { -2654:Src/main.c **** int test=0; -2655:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2656:Src/main.c **** { -2657:Src/main.c **** test = Mount_SD("/"); -2658:Src/main.c **** if (test == 0) //0 - suc -2659:Src/main.c **** { -2660:Src/main.c **** //Format_SD(); -2661:Src/main.c **** test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes -2662:Src/main.c **** fgoto+=DL_8; -2663:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2664:Src/main.c **** return test; -2665:Src/main.c **** } -2666:Src/main.c **** else -2667:Src/main.c **** { -2668:Src/main.c **** return 1; -2669:Src/main.c **** } -2670:Src/main.c **** } -2671:Src/main.c **** else -2672:Src/main.c **** { -2673:Src/main.c **** return 1; -2674:Src/main.c **** } -2675:Src/main.c **** -2676:Src/main.c **** /* for (uint16_t j = 0; j < DL_16; j++) -2677:Src/main.c **** { -2678:Src/main.c **** *(pbuff+j) = SD_matr[SD_SLIDE][j]; -2679:Src/main.c **** } -2680:Src/main.c **** if (SD_SLIDEAHB1RSTR, Periphs); 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -9718,9 +11612,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG - ARM GAS /tmp/ccO46DoU.s page 163 - - 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) @@ -9747,6 +11638,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOCLPEN LL_AHB1_GRP1_EnableClockLowPower\n 533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_EnableClockLowPower\n 534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_EnableClockLowPower\n + ARM GAS /tmp/ccYgfTud.s page 195 + + 535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_EnableClockLowPower\n 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_EnableClockLowPower\n 537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_EnableClockLowPower\n @@ -9778,9 +11672,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH - ARM GAS /tmp/ccO46DoU.s page 164 - - 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) @@ -9807,6 +11698,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClockLowPower(uint32_t Periphs) 590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; + ARM GAS /tmp/ccYgfTud.s page 196 + + 592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1LPENR, Periphs); 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB1LPENR, Periphs); @@ -9838,9 +11732,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_DisableClockLowPower\n 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACLPEN LL_AHB1_GRP1_DisableClockLowPower\n 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_DisableClockLowPower\n - ARM GAS /tmp/ccO46DoU.s page 165 - - 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_DisableClockLowPower\n 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_DisableClockLowPower\n 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_DisableClockLowPower\n @@ -9867,6 +11758,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*) + ARM GAS /tmp/ccYgfTud.s page 197 + + 649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) 651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) @@ -9898,9 +11792,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_EnableClock\n 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_EnableClock\n 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR RNGEN LL_AHB2_GRP1_EnableClock\n - ARM GAS /tmp/ccO46DoU.s page 166 - - 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_EnableClock 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) @@ -9927,6 +11818,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB2 peripheral clock is enabled or not 704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_IsEnabledClock\n 705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_IsEnabledClock\n + ARM GAS /tmp/ccYgfTud.s page 198 + + 706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR CRYPEN LL_AHB2_GRP1_IsEnabledClock\n 707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_IsEnabledClock\n 708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_IsEnabledClock\n @@ -9958,9 +11852,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_DisableClock\n 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR RNGEN LL_AHB2_GRP1_DisableClock\n 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_DisableClock - ARM GAS /tmp/ccO46DoU.s page 167 - - 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) @@ -9987,6 +11878,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR HASHRST LL_AHB2_GRP1_ForceReset\n 761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR RNGRST LL_AHB2_GRP1_ForceReset\n 762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ForceReset + ARM GAS /tmp/ccYgfTud.s page 199 + + 763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL 765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) @@ -10018,9 +11912,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL 792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) - ARM GAS /tmp/ccO46DoU.s page 168 - - 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) @@ -10047,6 +11938,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) 819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) + ARM GAS /tmp/ccYgfTud.s page 200 + + 820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) 821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) 822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) @@ -10078,9 +11972,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) 849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) - ARM GAS /tmp/ccO46DoU.s page 169 - - 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG @@ -10107,6 +11998,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_EnableClock\n 875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_EnableClock 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: + ARM GAS /tmp/ccYgfTud.s page 201 + + 877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) 878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI 879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @@ -10138,9 +12032,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->AHB3ENR, Periphs) == Periphs); 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** - ARM GAS /tmp/ccO46DoU.s page 170 - - 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB3 peripherals clock. 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock\n @@ -10167,6 +12058,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI 932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. + ARM GAS /tmp/ccYgfTud.s page 202 + + 934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs) @@ -10198,9 +12092,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI - ARM GAS /tmp/ccO46DoU.s page 171 - - 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None @@ -10227,6 +12118,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_DisableClockLowPower(uint32_t Periphs) 990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + ARM GAS /tmp/ccYgfTud.s page 203 + + 991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3LPENR, Periphs); 992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -10258,9 +12152,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_EnableClock\n 1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_EnableClock\n 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_EnableClock\n - ARM GAS /tmp/ccO46DoU.s page 172 - - 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_EnableClock\n @@ -10287,6 +12178,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 1046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 1047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 + ARM GAS /tmp/ccYgfTud.s page 204 + + 1048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) 1050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 @@ -10318,9 +12212,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1ENR, Periphs); 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - ARM GAS /tmp/ccO46DoU.s page 173 - - 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if APB1 peripheral clock is enabled or not @@ -10347,6 +12238,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_IsEnabledClock\n 1103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_IsEnabledClock\n 1104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_IsEnabledClock\n + ARM GAS /tmp/ccYgfTud.s page 205 + + 1105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_IsEnabledClock\n 1106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN3EN LL_APB1_GRP1_IsEnabledClock\n 1107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_IsEnabledClock\n @@ -10378,9 +12272,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*) - ARM GAS /tmp/ccO46DoU.s page 174 - - 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) @@ -10407,6 +12298,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_DisableClock\n 1160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_DisableClock\n 1161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_DisableClock\n + ARM GAS /tmp/ccYgfTud.s page 206 + + 1162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_DisableClock\n 1163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_DisableClock\n 1164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_DisableClock\n @@ -10438,9 +12332,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 - ARM GAS /tmp/ccO46DoU.s page 175 - - 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 @@ -10467,6 +12358,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7 1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8 1218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*) + ARM GAS /tmp/ccYgfTud.s page 207 + + 1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 1221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None @@ -10498,9 +12392,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART5RST LL_APB1_GRP1_ForceReset\n 1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ForceReset\n 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n - ARM GAS /tmp/ccO46DoU.s page 176 - - 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ForceReset\n 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C4RST LL_APB1_GRP1_ForceReset\n 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ForceReset\n @@ -10527,6 +12418,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) 1275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 + ARM GAS /tmp/ccYgfTud.s page 208 + + 1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 1278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 @@ -10558,9 +12452,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ReleaseReset\n 1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ReleaseReset\n 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n - ARM GAS /tmp/ccO46DoU.s page 177 - - 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM12RST LL_APB1_GRP1_ReleaseReset\n 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM13RST LL_APB1_GRP1_ReleaseReset\n @@ -10587,6 +12478,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART7RST LL_APB1_GRP1_ReleaseReset\n 1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART8RST LL_APB1_GRP1_ReleaseReset 1332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: + ARM GAS /tmp/ccYgfTud.s page 209 + + 1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 1335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 @@ -10618,9 +12512,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7 1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * - ARM GAS /tmp/ccO46DoU.s page 178 - - 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ @@ -10647,6 +12538,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPDIFRXLPEN LL_APB1_GRP1_EnableClockLowPower\n 1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART2LPEN LL_APB1_GRP1_EnableClockLowPower\n 1389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART3LPEN LL_APB1_GRP1_EnableClockLowPower\n + ARM GAS /tmp/ccYgfTud.s page 210 + + 1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART4LPEN LL_APB1_GRP1_EnableClockLowPower\n 1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART5LPEN LL_APB1_GRP1_EnableClockLowPower\n 1392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C1LPEN LL_APB1_GRP1_EnableClockLowPower\n @@ -10678,9 +12572,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) 1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 - ARM GAS /tmp/ccO46DoU.s page 179 - - 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 @@ -10707,6 +12598,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1LPENR, Periphs); 1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 1446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1LPENR, Periphs); + ARM GAS /tmp/ccYgfTud.s page 211 + + 1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 1449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -10738,9 +12632,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN2LPEN LL_APB1_GRP1_DisableClockLowPower\n 1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN3LPEN LL_APB1_GRP1_DisableClockLowPower\n 1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CECLPEN LL_APB1_GRP1_DisableClockLowPower\n - ARM GAS /tmp/ccO46DoU.s page 180 - - 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR PWRLPEN LL_APB1_GRP1_DisableClockLowPower\n 1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR DACLPEN LL_APB1_GRP1_DisableClockLowPower\n 1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_DisableClockLowPower\n @@ -10767,6 +12658,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 + ARM GAS /tmp/ccYgfTud.s page 212 + + 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*) 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 @@ -10798,9 +12692,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB2 peripherals clock. 1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_EnableClock\n - ARM GAS /tmp/ccO46DoU.s page 181 - - 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM8EN LL_APB2_GRP1_EnableClock\n 1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_EnableClock\n 1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART6EN LL_APB2_GRP1_EnableClock\n @@ -10827,6 +12718,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 1560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 + ARM GAS /tmp/ccYgfTud.s page 213 + + 1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART6 1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 @@ -10854,1351 +12748,1387 @@ ARM GAS /tmp/ccO46DoU.s page 1 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) - 2153 .loc 3 1587 22 view .LVU691 - 2154 .LBB351: + 3259 .loc 3 1587 22 view .LVU1016 + 3260 .LBB424: 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; - ARM GAS /tmp/ccO46DoU.s page 182 - - - 2155 .loc 3 1589 3 view .LVU692 + 3261 .loc 3 1589 3 view .LVU1017 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 2156 .loc 3 1590 3 view .LVU693 - 2157 001e 2A4B ldr r3, .L99 - 2158 0020 5A6C ldr r2, [r3, #68] - 2159 0022 42F40052 orr r2, r2, #8192 - 2160 0026 5A64 str r2, [r3, #68] + 3262 .loc 3 1590 3 view .LVU1018 + 3263 001e 2A4B ldr r3, .L183 + 3264 0020 5A6C ldr r2, [r3, #68] + 3265 0022 42F40052 orr r2, r2, #8192 + 3266 0026 5A64 str r2, [r3, #68] 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB2ENR, Periphs); - 2161 .loc 3 1592 3 view .LVU694 - 2162 .loc 3 1592 12 is_stmt 0 view .LVU695 - 2163 0028 5A6C ldr r2, [r3, #68] - 2164 002a 02F40052 and r2, r2, #8192 - 2165 .loc 3 1592 10 view .LVU696 - 2166 002e 0192 str r2, [sp, #4] + 3267 .loc 3 1592 3 view .LVU1019 + 3268 .loc 3 1592 12 is_stmt 0 view .LVU1020 + 3269 0028 5A6C ldr r2, [r3, #68] + 3270 002a 02F40052 and r2, r2, #8192 + 3271 .loc 3 1592 10 view .LVU1021 + 3272 002e 0192 str r2, [sp, #4] 1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2167 .loc 3 1593 3 is_stmt 1 view .LVU697 - 2168 0030 019A ldr r2, [sp, #4] - 2169 .LVL193: - 2170 .loc 3 1593 3 is_stmt 0 view .LVU698 - 2171 .LBE351: - 2172 .LBE350: -1061:Src/main.c **** /**SPI4 GPIO Configuration - 2173 .loc 1 1061 3 is_stmt 1 view .LVU699 - 2174 .LBB352: - 2175 .LBI352: + 3273 .loc 3 1593 3 is_stmt 1 view .LVU1022 + 3274 0030 019A ldr r2, [sp, #4] + 3275 .LVL326: + 3276 .loc 3 1593 3 is_stmt 0 view .LVU1023 + 3277 .LBE424: + 3278 .LBE423: +1192:Src/main.c **** /**SPI4 GPIO Configuration + 3279 .loc 1 1192 3 is_stmt 1 view .LVU1024 + 3280 .LBB425: + 3281 .LBI425: + ARM GAS /tmp/ccYgfTud.s page 214 + + 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 2176 .loc 3 309 22 view .LVU700 - 2177 .LBB353: + 3282 .loc 3 309 22 view .LVU1025 + 3283 .LBB426: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 2178 .loc 3 311 3 view .LVU701 + 3284 .loc 3 311 3 view .LVU1026 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 2179 .loc 3 312 3 view .LVU702 - 2180 0032 1A6B ldr r2, [r3, #48] - 2181 0034 42F01002 orr r2, r2, #16 - 2182 0038 1A63 str r2, [r3, #48] + 3285 .loc 3 312 3 view .LVU1027 + 3286 0032 1A6B ldr r2, [r3, #48] + 3287 0034 42F01002 orr r2, r2, #16 + 3288 0038 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2183 .loc 3 314 3 view .LVU703 + 3289 .loc 3 314 3 view .LVU1028 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2184 .loc 3 314 12 is_stmt 0 view .LVU704 - 2185 003a 1B6B ldr r3, [r3, #48] - 2186 003c 03F01003 and r3, r3, #16 + 3290 .loc 3 314 12 is_stmt 0 view .LVU1029 + 3291 003a 1B6B ldr r3, [r3, #48] + 3292 003c 03F01003 and r3, r3, #16 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2187 .loc 3 314 10 view .LVU705 - 2188 0040 0093 str r3, [sp] + 3293 .loc 3 314 10 view .LVU1030 + 3294 0040 0093 str r3, [sp] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 2189 .loc 3 315 3 is_stmt 1 view .LVU706 - 2190 0042 009B ldr r3, [sp] - 2191 .LVL194: + 3295 .loc 3 315 3 is_stmt 1 view .LVU1031 + 3296 0042 009B ldr r3, [sp] + 3297 .LVL327: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 2192 .loc 3 315 3 is_stmt 0 view .LVU707 - 2193 .LBE353: - 2194 .LBE352: -1066:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2195 .loc 1 1066 3 is_stmt 1 view .LVU708 -1066:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2196 .loc 1 1066 23 is_stmt 0 view .LVU709 - ARM GAS /tmp/ccO46DoU.s page 183 + 3298 .loc 3 315 3 is_stmt 0 view .LVU1032 + 3299 .LBE426: + 3300 .LBE425: +1197:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3301 .loc 1 1197 3 is_stmt 1 view .LVU1033 +1197:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3302 .loc 1 1197 23 is_stmt 0 view .LVU1034 + 3303 0044 4FF48053 mov r3, #4096 + 3304 0048 0293 str r3, [sp, #8] +1198:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3305 .loc 1 1198 3 is_stmt 1 view .LVU1035 +1198:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3306 .loc 1 1198 24 is_stmt 0 view .LVU1036 + 3307 004a 0225 movs r5, #2 + 3308 004c 0395 str r5, [sp, #12] +1199:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3309 .loc 1 1199 3 is_stmt 1 view .LVU1037 +1199:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3310 .loc 1 1199 25 is_stmt 0 view .LVU1038 + 3311 004e 4FF00308 mov r8, #3 + 3312 0052 CDF81080 str r8, [sp, #16] +1200:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3313 .loc 1 1200 3 is_stmt 1 view .LVU1039 +1201:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3314 .loc 1 1201 3 view .LVU1040 +1202:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 3315 .loc 1 1202 3 view .LVU1041 +1202:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 3316 .loc 1 1202 29 is_stmt 0 view .LVU1042 + 3317 0056 0527 movs r7, #5 + 3318 0058 0797 str r7, [sp, #28] +1203:Src/main.c **** + 3319 .loc 1 1203 3 is_stmt 1 view .LVU1043 + ARM GAS /tmp/ccYgfTud.s page 215 - 2197 0044 4FF48053 mov r3, #4096 - 2198 0048 0293 str r3, [sp, #8] -1067:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2199 .loc 1 1067 3 is_stmt 1 view .LVU710 -1067:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2200 .loc 1 1067 24 is_stmt 0 view .LVU711 - 2201 004a 0225 movs r5, #2 - 2202 004c 0395 str r5, [sp, #12] -1068:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2203 .loc 1 1068 3 is_stmt 1 view .LVU712 -1068:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2204 .loc 1 1068 25 is_stmt 0 view .LVU713 - 2205 004e 4FF00308 mov r8, #3 - 2206 0052 CDF81080 str r8, [sp, #16] -1069:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2207 .loc 1 1069 3 is_stmt 1 view .LVU714 -1070:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2208 .loc 1 1070 3 view .LVU715 -1071:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2209 .loc 1 1071 3 view .LVU716 -1071:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2210 .loc 1 1071 29 is_stmt 0 view .LVU717 - 2211 0056 0527 movs r7, #5 - 2212 0058 0797 str r7, [sp, #28] -1072:Src/main.c **** - 2213 .loc 1 1072 3 is_stmt 1 view .LVU718 - 2214 005a 1C4E ldr r6, .L99+4 - 2215 005c 02A9 add r1, sp, #8 - 2216 005e 3046 mov r0, r6 - 2217 0060 FFF7FEFF bl LL_GPIO_Init - 2218 .LVL195: -1074:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2219 .loc 1 1074 3 view .LVU719 -1074:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2220 .loc 1 1074 23 is_stmt 0 view .LVU720 - 2221 0064 4FF40053 mov r3, #8192 - 2222 0068 0293 str r3, [sp, #8] -1075:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2223 .loc 1 1075 3 is_stmt 1 view .LVU721 -1075:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2224 .loc 1 1075 24 is_stmt 0 view .LVU722 - 2225 006a 0395 str r5, [sp, #12] -1076:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2226 .loc 1 1076 3 is_stmt 1 view .LVU723 -1076:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2227 .loc 1 1076 25 is_stmt 0 view .LVU724 - 2228 006c CDF81080 str r8, [sp, #16] -1077:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2229 .loc 1 1077 3 is_stmt 1 view .LVU725 -1077:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2230 .loc 1 1077 30 is_stmt 0 view .LVU726 - 2231 0070 0594 str r4, [sp, #20] -1078:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2232 .loc 1 1078 3 is_stmt 1 view .LVU727 -1078:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2233 .loc 1 1078 24 is_stmt 0 view .LVU728 - 2234 0072 0694 str r4, [sp, #24] - ARM GAS /tmp/ccO46DoU.s page 184 + 3320 005a 1C4E ldr r6, .L183+4 + 3321 005c 02A9 add r1, sp, #8 + 3322 005e 3046 mov r0, r6 + 3323 0060 FFF7FEFF bl LL_GPIO_Init + 3324 .LVL328: +1205:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3325 .loc 1 1205 3 view .LVU1044 +1205:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3326 .loc 1 1205 23 is_stmt 0 view .LVU1045 + 3327 0064 4FF40053 mov r3, #8192 + 3328 0068 0293 str r3, [sp, #8] +1206:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3329 .loc 1 1206 3 is_stmt 1 view .LVU1046 +1206:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3330 .loc 1 1206 24 is_stmt 0 view .LVU1047 + 3331 006a 0395 str r5, [sp, #12] +1207:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3332 .loc 1 1207 3 is_stmt 1 view .LVU1048 +1207:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3333 .loc 1 1207 25 is_stmt 0 view .LVU1049 + 3334 006c CDF81080 str r8, [sp, #16] +1208:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3335 .loc 1 1208 3 is_stmt 1 view .LVU1050 +1208:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3336 .loc 1 1208 30 is_stmt 0 view .LVU1051 + 3337 0070 0594 str r4, [sp, #20] +1209:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3338 .loc 1 1209 3 is_stmt 1 view .LVU1052 +1209:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3339 .loc 1 1209 24 is_stmt 0 view .LVU1053 + 3340 0072 0694 str r4, [sp, #24] +1210:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 3341 .loc 1 1210 3 is_stmt 1 view .LVU1054 +1210:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 3342 .loc 1 1210 29 is_stmt 0 view .LVU1055 + 3343 0074 0797 str r7, [sp, #28] +1211:Src/main.c **** + 3344 .loc 1 1211 3 is_stmt 1 view .LVU1056 + 3345 0076 02A9 add r1, sp, #8 + 3346 0078 3046 mov r0, r6 + 3347 007a FFF7FEFF bl LL_GPIO_Init + 3348 .LVL329: +1217:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 3349 .loc 1 1217 3 view .LVU1057 +1217:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 3350 .loc 1 1217 36 is_stmt 0 view .LVU1058 + 3351 007e 4FF48063 mov r3, #1024 + 3352 0082 0893 str r3, [sp, #32] +1218:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 3353 .loc 1 1218 3 is_stmt 1 view .LVU1059 +1218:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 3354 .loc 1 1218 23 is_stmt 0 view .LVU1060 + 3355 0084 4FF48273 mov r3, #260 + 3356 0088 0993 str r3, [sp, #36] +1219:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 3357 .loc 1 1219 3 is_stmt 1 view .LVU1061 +1219:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + ARM GAS /tmp/ccYgfTud.s page 216 -1079:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2235 .loc 1 1079 3 is_stmt 1 view .LVU729 -1079:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2236 .loc 1 1079 29 is_stmt 0 view .LVU730 - 2237 0074 0797 str r7, [sp, #28] -1080:Src/main.c **** - 2238 .loc 1 1080 3 is_stmt 1 view .LVU731 - 2239 0076 02A9 add r1, sp, #8 - 2240 0078 3046 mov r0, r6 - 2241 007a FFF7FEFF bl LL_GPIO_Init - 2242 .LVL196: -1086:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2243 .loc 1 1086 3 view .LVU732 -1086:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2244 .loc 1 1086 36 is_stmt 0 view .LVU733 - 2245 007e 4FF48063 mov r3, #1024 - 2246 0082 0893 str r3, [sp, #32] -1087:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2247 .loc 1 1087 3 is_stmt 1 view .LVU734 -1087:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2248 .loc 1 1087 23 is_stmt 0 view .LVU735 - 2249 0084 4FF48273 mov r3, #260 - 2250 0088 0993 str r3, [sp, #36] -1088:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2251 .loc 1 1088 3 is_stmt 1 view .LVU736 -1088:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2252 .loc 1 1088 28 is_stmt 0 view .LVU737 - 2253 008a 4FF47063 mov r3, #3840 - 2254 008e 0A93 str r3, [sp, #40] -1089:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2255 .loc 1 1089 3 is_stmt 1 view .LVU738 -1089:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2256 .loc 1 1089 32 is_stmt 0 view .LVU739 - 2257 0090 0B95 str r5, [sp, #44] -1090:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2258 .loc 1 1090 3 is_stmt 1 view .LVU740 -1090:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2259 .loc 1 1090 29 is_stmt 0 view .LVU741 - 2260 0092 0C94 str r4, [sp, #48] -1091:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2261 .loc 1 1091 3 is_stmt 1 view .LVU742 -1091:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2262 .loc 1 1091 22 is_stmt 0 view .LVU743 - 2263 0094 4FF40073 mov r3, #512 - 2264 0098 0D93 str r3, [sp, #52] -1092:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2265 .loc 1 1092 3 is_stmt 1 view .LVU744 -1092:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2266 .loc 1 1092 27 is_stmt 0 view .LVU745 - 2267 009a 1823 movs r3, #24 - 2268 009c 0E93 str r3, [sp, #56] -1093:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2269 .loc 1 1093 3 is_stmt 1 view .LVU746 -1093:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2270 .loc 1 1093 27 is_stmt 0 view .LVU747 - 2271 009e 0F94 str r4, [sp, #60] -1094:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - ARM GAS /tmp/ccO46DoU.s page 185 - - - 2272 .loc 1 1094 3 is_stmt 1 view .LVU748 -1094:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2273 .loc 1 1094 33 is_stmt 0 view .LVU749 - 2274 00a0 1094 str r4, [sp, #64] -1095:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 2275 .loc 1 1095 3 is_stmt 1 view .LVU750 -1095:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 2276 .loc 1 1095 26 is_stmt 0 view .LVU751 - 2277 00a2 0723 movs r3, #7 - 2278 00a4 1193 str r3, [sp, #68] -1096:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); - 2279 .loc 1 1096 3 is_stmt 1 view .LVU752 - 2280 00a6 0A4C ldr r4, .L99+8 - 2281 00a8 08A9 add r1, sp, #32 - 2282 00aa 2046 mov r0, r4 - 2283 00ac FFF7FEFF bl LL_SPI_Init - 2284 .LVL197: -1097:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); - 2285 .loc 1 1097 3 view .LVU753 - 2286 .LBB354: - 2287 .LBI354: + 3358 .loc 1 1219 28 is_stmt 0 view .LVU1062 + 3359 008a 4FF47063 mov r3, #3840 + 3360 008e 0A93 str r3, [sp, #40] +1220:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 3361 .loc 1 1220 3 is_stmt 1 view .LVU1063 +1220:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 3362 .loc 1 1220 32 is_stmt 0 view .LVU1064 + 3363 0090 0B95 str r5, [sp, #44] +1221:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 3364 .loc 1 1221 3 is_stmt 1 view .LVU1065 +1221:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 3365 .loc 1 1221 29 is_stmt 0 view .LVU1066 + 3366 0092 0C94 str r4, [sp, #48] +1222:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 3367 .loc 1 1222 3 is_stmt 1 view .LVU1067 +1222:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 3368 .loc 1 1222 22 is_stmt 0 view .LVU1068 + 3369 0094 4FF40073 mov r3, #512 + 3370 0098 0D93 str r3, [sp, #52] +1223:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 3371 .loc 1 1223 3 is_stmt 1 view .LVU1069 +1223:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 3372 .loc 1 1223 27 is_stmt 0 view .LVU1070 + 3373 009a 1823 movs r3, #24 + 3374 009c 0E93 str r3, [sp, #56] +1224:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 3375 .loc 1 1224 3 is_stmt 1 view .LVU1071 +1224:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 3376 .loc 1 1224 27 is_stmt 0 view .LVU1072 + 3377 009e 0F94 str r4, [sp, #60] +1225:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 3378 .loc 1 1225 3 is_stmt 1 view .LVU1073 +1225:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 3379 .loc 1 1225 33 is_stmt 0 view .LVU1074 + 3380 00a0 1094 str r4, [sp, #64] +1226:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 3381 .loc 1 1226 3 is_stmt 1 view .LVU1075 +1226:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 3382 .loc 1 1226 26 is_stmt 0 view .LVU1076 + 3383 00a2 0723 movs r3, #7 + 3384 00a4 1193 str r3, [sp, #68] +1227:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); + 3385 .loc 1 1227 3 is_stmt 1 view .LVU1077 + 3386 00a6 0A4C ldr r4, .L183+8 + 3387 00a8 08A9 add r1, sp, #32 + 3388 00aa 2046 mov r0, r4 + 3389 00ac FFF7FEFF bl LL_SPI_Init + 3390 .LVL330: +1228:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); + 3391 .loc 1 1228 3 view .LVU1078 + 3392 .LBB427: + 3393 .LBI427: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2288 .loc 4 426 22 view .LVU754 - 2289 .LBB355: + 3394 .loc 4 426 22 view .LVU1079 + 3395 .LBB428: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2290 .loc 4 428 3 view .LVU755 - 2291 00b0 6368 ldr r3, [r4, #4] - 2292 00b2 23F01003 bic r3, r3, #16 - 2293 00b6 6360 str r3, [r4, #4] - 2294 .LVL198: + 3396 .loc 4 428 3 view .LVU1080 + ARM GAS /tmp/ccYgfTud.s page 217 + + + 3397 00b0 6368 ldr r3, [r4, #4] + 3398 00b2 23F01003 bic r3, r3, #16 + 3399 00b6 6360 str r3, [r4, #4] + 3400 .LVL331: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2295 .loc 4 428 3 is_stmt 0 view .LVU756 - 2296 .LBE355: - 2297 .LBE354: -1098:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ - 2298 .loc 1 1098 3 is_stmt 1 view .LVU757 - 2299 .LBB356: - 2300 .LBI356: + 3401 .loc 4 428 3 is_stmt 0 view .LVU1081 + 3402 .LBE428: + 3403 .LBE427: +1229:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ + 3404 .loc 1 1229 3 is_stmt 1 view .LVU1082 + 3405 .LBB429: + 3406 .LBI429: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2301 .loc 4 874 22 view .LVU758 - 2302 .LBB357: + 3407 .loc 4 874 22 view .LVU1083 + 3408 .LBB430: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2303 .loc 4 876 3 view .LVU759 - 2304 00b8 6368 ldr r3, [r4, #4] - 2305 00ba 23F00803 bic r3, r3, #8 - 2306 00be 6360 str r3, [r4, #4] - 2307 .LVL199: + 3409 .loc 4 876 3 view .LVU1084 + 3410 00b8 6368 ldr r3, [r4, #4] + 3411 00ba 23F00803 bic r3, r3, #8 + 3412 00be 6360 str r3, [r4, #4] + 3413 .LVL332: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2308 .loc 4 876 3 is_stmt 0 view .LVU760 - 2309 .LBE357: - 2310 .LBE356: -1103:Src/main.c **** - 2311 .loc 1 1103 1 view .LVU761 - 2312 00c0 12B0 add sp, sp, #72 - 2313 .LCFI17: - 2314 .cfi_def_cfa_offset 24 - 2315 @ sp needed - ARM GAS /tmp/ccO46DoU.s page 186 + 3414 .loc 4 876 3 is_stmt 0 view .LVU1085 + 3415 .LBE430: + 3416 .LBE429: +1234:Src/main.c **** + 3417 .loc 1 1234 1 view .LVU1086 + 3418 00c0 12B0 add sp, sp, #72 + 3419 .LCFI31: + 3420 .cfi_def_cfa_offset 24 + 3421 @ sp needed + 3422 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 3423 .L184: + 3424 00c6 00BF .align 2 + 3425 .L183: + 3426 00c8 00380240 .word 1073887232 + 3427 00cc 00100240 .word 1073876992 + 3428 00d0 00340140 .word 1073820672 + 3429 .cfi_endproc + 3430 .LFE1192: + 3432 .section .text.MX_SPI2_Init,"ax",%progbits + 3433 .align 1 + 3434 .syntax unified + 3435 .thumb + 3436 .thumb_func + 3438 MX_SPI2_Init: + 3439 .LFB1191: +1107:Src/main.c **** + 3440 .loc 1 1107 1 is_stmt 1 view -0 + 3441 .cfi_startproc + 3442 @ args = 0, pretend = 0, frame = 72 + 3443 @ frame_needed = 0, uses_anonymous_args = 0 + 3444 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 3445 .LCFI32: + 3446 .cfi_def_cfa_offset 24 + 3447 .cfi_offset 4, -24 + 3448 .cfi_offset 5, -20 + ARM GAS /tmp/ccYgfTud.s page 218 - 2316 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 2317 .L100: - 2318 00c6 00BF .align 2 - 2319 .L99: - 2320 00c8 00380240 .word 1073887232 - 2321 00cc 00100240 .word 1073876992 - 2322 00d0 00340140 .word 1073820672 - 2323 .cfi_endproc - 2324 .LFE1192: - 2326 .section .text.MX_SPI2_Init,"ax",%progbits - 2327 .align 1 - 2328 .syntax unified - 2329 .thumb - 2330 .thumb_func - 2332 MX_SPI2_Init: - 2333 .LFB1191: - 985:Src/main.c **** - 2334 .loc 1 985 1 is_stmt 1 view -0 - 2335 .cfi_startproc - 2336 @ args = 0, pretend = 0, frame = 72 - 2337 @ frame_needed = 0, uses_anonymous_args = 0 - 2338 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 2339 .LCFI18: - 2340 .cfi_def_cfa_offset 24 - 2341 .cfi_offset 4, -24 - 2342 .cfi_offset 5, -20 - 2343 .cfi_offset 6, -16 - 2344 .cfi_offset 7, -12 - 2345 .cfi_offset 8, -8 - 2346 .cfi_offset 14, -4 - 2347 0004 92B0 sub sp, sp, #72 - 2348 .LCFI19: - 2349 .cfi_def_cfa_offset 96 - 991:Src/main.c **** - 2350 .loc 1 991 3 view .LVU763 - 991:Src/main.c **** - 2351 .loc 1 991 22 is_stmt 0 view .LVU764 - 2352 0006 2822 movs r2, #40 - 2353 0008 0021 movs r1, #0 - 2354 000a 08A8 add r0, sp, #32 - 2355 000c FFF7FEFF bl memset - 2356 .LVL200: - 993:Src/main.c **** - 2357 .loc 1 993 3 is_stmt 1 view .LVU765 - 993:Src/main.c **** - 2358 .loc 1 993 23 is_stmt 0 view .LVU766 - 2359 0010 0024 movs r4, #0 - 2360 0012 0294 str r4, [sp, #8] - 2361 0014 0394 str r4, [sp, #12] - 2362 0016 0494 str r4, [sp, #16] - 2363 0018 0594 str r4, [sp, #20] - 2364 001a 0694 str r4, [sp, #24] - 2365 001c 0794 str r4, [sp, #28] - 996:Src/main.c **** - 2366 .loc 1 996 3 is_stmt 1 view .LVU767 - 2367 .LVL201: - 2368 .LBB358: - ARM GAS /tmp/ccO46DoU.s page 187 - - - 2369 .LBI358: + 3449 .cfi_offset 6, -16 + 3450 .cfi_offset 7, -12 + 3451 .cfi_offset 8, -8 + 3452 .cfi_offset 14, -4 + 3453 0004 92B0 sub sp, sp, #72 + 3454 .LCFI33: + 3455 .cfi_def_cfa_offset 96 +1113:Src/main.c **** + 3456 .loc 1 1113 3 view .LVU1088 +1113:Src/main.c **** + 3457 .loc 1 1113 22 is_stmt 0 view .LVU1089 + 3458 0006 2822 movs r2, #40 + 3459 0008 0021 movs r1, #0 + 3460 000a 08A8 add r0, sp, #32 + 3461 000c FFF7FEFF bl memset + 3462 .LVL333: +1115:Src/main.c **** + 3463 .loc 1 1115 3 is_stmt 1 view .LVU1090 +1115:Src/main.c **** + 3464 .loc 1 1115 23 is_stmt 0 view .LVU1091 + 3465 0010 0024 movs r4, #0 + 3466 0012 0294 str r4, [sp, #8] + 3467 0014 0394 str r4, [sp, #12] + 3468 0016 0494 str r4, [sp, #16] + 3469 0018 0594 str r4, [sp, #20] + 3470 001a 0694 str r4, [sp, #24] + 3471 001c 0794 str r4, [sp, #28] +1118:Src/main.c **** + 3472 .loc 1 1118 3 is_stmt 1 view .LVU1092 + 3473 .LVL334: + 3474 .LBB431: + 3475 .LBI431: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 2370 .loc 3 1071 22 view .LVU768 - 2371 .LBB359: + 3476 .loc 3 1071 22 view .LVU1093 + 3477 .LBB432: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 2372 .loc 3 1073 3 view .LVU769 + 3478 .loc 3 1073 3 view .LVU1094 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 2373 .loc 3 1074 3 view .LVU770 - 2374 001e 294B ldr r3, .L103 - 2375 0020 1A6C ldr r2, [r3, #64] - 2376 0022 42F48042 orr r2, r2, #16384 - 2377 0026 1A64 str r2, [r3, #64] + 3479 .loc 3 1074 3 view .LVU1095 + 3480 001e 2F4B ldr r3, .L187 + 3481 0020 1A6C ldr r2, [r3, #64] + 3482 0022 42F48042 orr r2, r2, #16384 + 3483 0026 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2378 .loc 3 1076 3 view .LVU771 + 3484 .loc 3 1076 3 view .LVU1096 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2379 .loc 3 1076 12 is_stmt 0 view .LVU772 - 2380 0028 1A6C ldr r2, [r3, #64] - 2381 002a 02F48042 and r2, r2, #16384 + 3485 .loc 3 1076 12 is_stmt 0 view .LVU1097 + 3486 0028 1A6C ldr r2, [r3, #64] + 3487 002a 02F48042 and r2, r2, #16384 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2382 .loc 3 1076 10 view .LVU773 - 2383 002e 0192 str r2, [sp, #4] + 3488 .loc 3 1076 10 view .LVU1098 + 3489 002e 0192 str r2, [sp, #4] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 2384 .loc 3 1077 3 is_stmt 1 view .LVU774 - 2385 0030 019A ldr r2, [sp, #4] - 2386 .LVL202: + 3490 .loc 3 1077 3 is_stmt 1 view .LVU1099 + 3491 0030 019A ldr r2, [sp, #4] + 3492 .LVL335: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 2387 .loc 3 1077 3 is_stmt 0 view .LVU775 - 2388 .LBE359: - 2389 .LBE358: - 998:Src/main.c **** /**SPI2 GPIO Configuration - 2390 .loc 1 998 3 is_stmt 1 view .LVU776 - 2391 .LBB360: - 2392 .LBI360: + ARM GAS /tmp/ccYgfTud.s page 219 + + + 3493 .loc 3 1077 3 is_stmt 0 view .LVU1100 + 3494 .LBE432: + 3495 .LBE431: +1120:Src/main.c **** /**SPI2 GPIO Configuration + 3496 .loc 1 1120 3 is_stmt 1 view .LVU1101 + 3497 .LBB433: + 3498 .LBI433: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 2393 .loc 3 309 22 view .LVU777 - 2394 .LBB361: + 3499 .loc 3 309 22 view .LVU1102 + 3500 .LBB434: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 2395 .loc 3 311 3 view .LVU778 + 3501 .loc 3 311 3 view .LVU1103 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 2396 .loc 3 312 3 view .LVU779 - 2397 0032 1A6B ldr r2, [r3, #48] - 2398 0034 42F00202 orr r2, r2, #2 - 2399 0038 1A63 str r2, [r3, #48] + 3502 .loc 3 312 3 view .LVU1104 + 3503 0032 1A6B ldr r2, [r3, #48] + 3504 0034 42F00202 orr r2, r2, #2 + 3505 0038 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2400 .loc 3 314 3 view .LVU780 + 3506 .loc 3 314 3 view .LVU1105 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2401 .loc 3 314 12 is_stmt 0 view .LVU781 - 2402 003a 1B6B ldr r3, [r3, #48] - 2403 003c 03F00203 and r3, r3, #2 + 3507 .loc 3 314 12 is_stmt 0 view .LVU1106 + 3508 003a 1B6B ldr r3, [r3, #48] + 3509 003c 03F00203 and r3, r3, #2 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2404 .loc 3 314 10 view .LVU782 - 2405 0040 0093 str r3, [sp] + 3510 .loc 3 314 10 view .LVU1107 + 3511 0040 0093 str r3, [sp] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 2406 .loc 3 315 3 is_stmt 1 view .LVU783 - 2407 0042 009B ldr r3, [sp] - 2408 .LVL203: + 3512 .loc 3 315 3 is_stmt 1 view .LVU1108 + 3513 0042 009B ldr r3, [sp] + 3514 .LVL336: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - ARM GAS /tmp/ccO46DoU.s page 188 + 3515 .loc 3 315 3 is_stmt 0 view .LVU1109 + 3516 .LBE434: + 3517 .LBE433: +1126:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3518 .loc 1 1126 3 is_stmt 1 view .LVU1110 +1126:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3519 .loc 1 1126 23 is_stmt 0 view .LVU1111 + 3520 0044 4FF40053 mov r3, #8192 + 3521 0048 0293 str r3, [sp, #8] +1127:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3522 .loc 1 1127 3 is_stmt 1 view .LVU1112 +1127:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3523 .loc 1 1127 24 is_stmt 0 view .LVU1113 + 3524 004a 4FF00208 mov r8, #2 + 3525 004e CDF80C80 str r8, [sp, #12] +1128:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3526 .loc 1 1128 3 is_stmt 1 view .LVU1114 +1128:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3527 .loc 1 1128 25 is_stmt 0 view .LVU1115 + 3528 0052 0327 movs r7, #3 + 3529 0054 0497 str r7, [sp, #16] +1129:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3530 .loc 1 1129 3 is_stmt 1 view .LVU1116 +1130:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3531 .loc 1 1130 3 view .LVU1117 +1131:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + ARM GAS /tmp/ccYgfTud.s page 220 - 2409 .loc 3 315 3 is_stmt 0 view .LVU784 - 2410 .LBE361: - 2411 .LBE360: -1003:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2412 .loc 1 1003 3 is_stmt 1 view .LVU785 -1003:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2413 .loc 1 1003 23 is_stmt 0 view .LVU786 - 2414 0044 4FF40053 mov r3, #8192 - 2415 0048 0293 str r3, [sp, #8] -1004:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2416 .loc 1 1004 3 is_stmt 1 view .LVU787 -1004:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2417 .loc 1 1004 24 is_stmt 0 view .LVU788 - 2418 004a 0225 movs r5, #2 - 2419 004c 0395 str r5, [sp, #12] -1005:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2420 .loc 1 1005 3 is_stmt 1 view .LVU789 -1005:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2421 .loc 1 1005 25 is_stmt 0 view .LVU790 - 2422 004e 4FF00308 mov r8, #3 - 2423 0052 CDF81080 str r8, [sp, #16] -1006:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2424 .loc 1 1006 3 is_stmt 1 view .LVU791 -1007:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2425 .loc 1 1007 3 view .LVU792 -1008:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2426 .loc 1 1008 3 view .LVU793 -1008:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2427 .loc 1 1008 29 is_stmt 0 view .LVU794 - 2428 0056 0527 movs r7, #5 - 2429 0058 0797 str r7, [sp, #28] -1009:Src/main.c **** - 2430 .loc 1 1009 3 is_stmt 1 view .LVU795 - 2431 005a 1B4E ldr r6, .L103+4 - 2432 005c 02A9 add r1, sp, #8 - 2433 005e 3046 mov r0, r6 - 2434 0060 FFF7FEFF bl LL_GPIO_Init - 2435 .LVL204: -1011:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2436 .loc 1 1011 3 view .LVU796 -1011:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2437 .loc 1 1011 23 is_stmt 0 view .LVU797 - 2438 0064 4FF40043 mov r3, #32768 - 2439 0068 0293 str r3, [sp, #8] -1012:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2440 .loc 1 1012 3 is_stmt 1 view .LVU798 -1012:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2441 .loc 1 1012 24 is_stmt 0 view .LVU799 - 2442 006a 0395 str r5, [sp, #12] -1013:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2443 .loc 1 1013 3 is_stmt 1 view .LVU800 -1013:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2444 .loc 1 1013 25 is_stmt 0 view .LVU801 - 2445 006c CDF81080 str r8, [sp, #16] -1014:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2446 .loc 1 1014 3 is_stmt 1 view .LVU802 -1014:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - ARM GAS /tmp/ccO46DoU.s page 189 + 3532 .loc 1 1131 3 view .LVU1118 +1131:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 3533 .loc 1 1131 29 is_stmt 0 view .LVU1119 + 3534 0056 0526 movs r6, #5 + 3535 0058 0796 str r6, [sp, #28] +1132:Src/main.c **** + 3536 .loc 1 1132 3 is_stmt 1 view .LVU1120 + 3537 005a 214D ldr r5, .L187+4 + 3538 005c 02A9 add r1, sp, #8 + 3539 005e 2846 mov r0, r5 + 3540 0060 FFF7FEFF bl LL_GPIO_Init + 3541 .LVL337: +1134:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3542 .loc 1 1134 3 view .LVU1121 +1134:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3543 .loc 1 1134 23 is_stmt 0 view .LVU1122 + 3544 0064 4FF48043 mov r3, #16384 + 3545 0068 0293 str r3, [sp, #8] +1135:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3546 .loc 1 1135 3 is_stmt 1 view .LVU1123 +1135:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3547 .loc 1 1135 24 is_stmt 0 view .LVU1124 + 3548 006a CDF80C80 str r8, [sp, #12] +1136:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3549 .loc 1 1136 3 is_stmt 1 view .LVU1125 +1136:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3550 .loc 1 1136 25 is_stmt 0 view .LVU1126 + 3551 006e 0497 str r7, [sp, #16] +1137:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3552 .loc 1 1137 3 is_stmt 1 view .LVU1127 +1137:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3553 .loc 1 1137 30 is_stmt 0 view .LVU1128 + 3554 0070 0594 str r4, [sp, #20] +1138:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3555 .loc 1 1138 3 is_stmt 1 view .LVU1129 +1138:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3556 .loc 1 1138 24 is_stmt 0 view .LVU1130 + 3557 0072 0694 str r4, [sp, #24] +1139:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 3558 .loc 1 1139 3 is_stmt 1 view .LVU1131 +1139:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 3559 .loc 1 1139 29 is_stmt 0 view .LVU1132 + 3560 0074 0796 str r6, [sp, #28] +1140:Src/main.c **** + 3561 .loc 1 1140 3 is_stmt 1 view .LVU1133 + 3562 0076 02A9 add r1, sp, #8 + 3563 0078 2846 mov r0, r5 + 3564 007a FFF7FEFF bl LL_GPIO_Init + 3565 .LVL338: +1142:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3566 .loc 1 1142 3 view .LVU1134 +1142:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3567 .loc 1 1142 23 is_stmt 0 view .LVU1135 + 3568 007e 4FF40043 mov r3, #32768 + 3569 0082 0293 str r3, [sp, #8] +1143:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3570 .loc 1 1143 3 is_stmt 1 view .LVU1136 + ARM GAS /tmp/ccYgfTud.s page 221 - 2447 .loc 1 1014 30 is_stmt 0 view .LVU803 - 2448 0070 0594 str r4, [sp, #20] -1015:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2449 .loc 1 1015 3 is_stmt 1 view .LVU804 -1015:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2450 .loc 1 1015 24 is_stmt 0 view .LVU805 - 2451 0072 0694 str r4, [sp, #24] -1016:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2452 .loc 1 1016 3 is_stmt 1 view .LVU806 -1016:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2453 .loc 1 1016 29 is_stmt 0 view .LVU807 - 2454 0074 0797 str r7, [sp, #28] -1017:Src/main.c **** - 2455 .loc 1 1017 3 is_stmt 1 view .LVU808 - 2456 0076 02A9 add r1, sp, #8 - 2457 0078 3046 mov r0, r6 - 2458 007a FFF7FEFF bl LL_GPIO_Init - 2459 .LVL205: -1023:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2460 .loc 1 1023 3 view .LVU809 -1023:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2461 .loc 1 1023 36 is_stmt 0 view .LVU810 - 2462 007e 0894 str r4, [sp, #32] -1024:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2463 .loc 1 1024 3 is_stmt 1 view .LVU811 -1024:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2464 .loc 1 1024 23 is_stmt 0 view .LVU812 - 2465 0080 4FF48273 mov r3, #260 - 2466 0084 0993 str r3, [sp, #36] -1025:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2467 .loc 1 1025 3 is_stmt 1 view .LVU813 -1025:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2468 .loc 1 1025 28 is_stmt 0 view .LVU814 - 2469 0086 4FF47063 mov r3, #3840 - 2470 008a 0A93 str r3, [sp, #40] -1026:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2471 .loc 1 1026 3 is_stmt 1 view .LVU815 -1026:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2472 .loc 1 1026 32 is_stmt 0 view .LVU816 - 2473 008c 0B95 str r5, [sp, #44] -1027:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2474 .loc 1 1027 3 is_stmt 1 view .LVU817 -1027:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2475 .loc 1 1027 29 is_stmt 0 view .LVU818 - 2476 008e 0123 movs r3, #1 - 2477 0090 0C93 str r3, [sp, #48] -1028:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 2478 .loc 1 1028 3 is_stmt 1 view .LVU819 -1028:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 2479 .loc 1 1028 22 is_stmt 0 view .LVU820 - 2480 0092 4FF40073 mov r3, #512 - 2481 0096 0D93 str r3, [sp, #52] -1029:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2482 .loc 1 1029 3 is_stmt 1 view .LVU821 -1029:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2483 .loc 1 1029 27 is_stmt 0 view .LVU822 - 2484 0098 1023 movs r3, #16 - ARM GAS /tmp/ccO46DoU.s page 190 +1143:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3571 .loc 1 1143 24 is_stmt 0 view .LVU1137 + 3572 0084 CDF80C80 str r8, [sp, #12] +1144:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3573 .loc 1 1144 3 is_stmt 1 view .LVU1138 +1144:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3574 .loc 1 1144 25 is_stmt 0 view .LVU1139 + 3575 0088 0497 str r7, [sp, #16] +1145:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3576 .loc 1 1145 3 is_stmt 1 view .LVU1140 +1145:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3577 .loc 1 1145 30 is_stmt 0 view .LVU1141 + 3578 008a 0594 str r4, [sp, #20] +1146:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3579 .loc 1 1146 3 is_stmt 1 view .LVU1142 +1146:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3580 .loc 1 1146 24 is_stmt 0 view .LVU1143 + 3581 008c 0694 str r4, [sp, #24] +1147:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 3582 .loc 1 1147 3 is_stmt 1 view .LVU1144 +1147:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 3583 .loc 1 1147 29 is_stmt 0 view .LVU1145 + 3584 008e 0796 str r6, [sp, #28] +1148:Src/main.c **** + 3585 .loc 1 1148 3 is_stmt 1 view .LVU1146 + 3586 0090 02A9 add r1, sp, #8 + 3587 0092 2846 mov r0, r5 + 3588 0094 FFF7FEFF bl LL_GPIO_Init + 3589 .LVL339: +1154:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 3590 .loc 1 1154 3 view .LVU1147 +1154:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 3591 .loc 1 1154 36 is_stmt 0 view .LVU1148 + 3592 0098 0894 str r4, [sp, #32] +1155:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 3593 .loc 1 1155 3 is_stmt 1 view .LVU1149 +1155:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 3594 .loc 1 1155 23 is_stmt 0 view .LVU1150 + 3595 009a 4FF48273 mov r3, #260 + 3596 009e 0993 str r3, [sp, #36] +1156:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + 3597 .loc 1 1156 3 is_stmt 1 view .LVU1151 +1156:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + 3598 .loc 1 1156 28 is_stmt 0 view .LVU1152 + 3599 00a0 4FF47063 mov r3, #3840 + 3600 00a4 0A93 str r3, [sp, #40] +1157:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 3601 .loc 1 1157 3 is_stmt 1 view .LVU1153 +1157:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 3602 .loc 1 1157 32 is_stmt 0 view .LVU1154 + 3603 00a6 0B94 str r4, [sp, #44] +1158:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 3604 .loc 1 1158 3 is_stmt 1 view .LVU1155 +1158:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 3605 .loc 1 1158 29 is_stmt 0 view .LVU1156 + 3606 00a8 0C94 str r4, [sp, #48] +1159:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + ARM GAS /tmp/ccYgfTud.s page 222 - 2485 009a 0E93 str r3, [sp, #56] -1030:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2486 .loc 1 1030 3 is_stmt 1 view .LVU823 -1030:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2487 .loc 1 1030 27 is_stmt 0 view .LVU824 - 2488 009c 0F94 str r4, [sp, #60] -1031:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2489 .loc 1 1031 3 is_stmt 1 view .LVU825 -1031:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2490 .loc 1 1031 33 is_stmt 0 view .LVU826 - 2491 009e 1094 str r4, [sp, #64] -1032:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 2492 .loc 1 1032 3 is_stmt 1 view .LVU827 -1032:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 2493 .loc 1 1032 26 is_stmt 0 view .LVU828 - 2494 00a0 0723 movs r3, #7 - 2495 00a2 1193 str r3, [sp, #68] -1033:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); - 2496 .loc 1 1033 3 is_stmt 1 view .LVU829 - 2497 00a4 094C ldr r4, .L103+8 - 2498 00a6 08A9 add r1, sp, #32 - 2499 00a8 2046 mov r0, r4 - 2500 00aa FFF7FEFF bl LL_SPI_Init - 2501 .LVL206: -1034:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); - 2502 .loc 1 1034 3 view .LVU830 - 2503 .LBB362: - 2504 .LBI362: + 3607 .loc 1 1159 3 is_stmt 1 view .LVU1157 +1159:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 3608 .loc 1 1159 22 is_stmt 0 view .LVU1158 + 3609 00aa 4FF40073 mov r3, #512 + 3610 00ae 0D93 str r3, [sp, #52] +1160:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 3611 .loc 1 1160 3 is_stmt 1 view .LVU1159 +1160:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 3612 .loc 1 1160 27 is_stmt 0 view .LVU1160 + 3613 00b0 1023 movs r3, #16 + 3614 00b2 0E93 str r3, [sp, #56] +1161:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 3615 .loc 1 1161 3 is_stmt 1 view .LVU1161 +1161:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 3616 .loc 1 1161 27 is_stmt 0 view .LVU1162 + 3617 00b4 0F94 str r4, [sp, #60] +1162:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 3618 .loc 1 1162 3 is_stmt 1 view .LVU1163 +1162:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 3619 .loc 1 1162 33 is_stmt 0 view .LVU1164 + 3620 00b6 1094 str r4, [sp, #64] +1163:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 3621 .loc 1 1163 3 is_stmt 1 view .LVU1165 +1163:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 3622 .loc 1 1163 26 is_stmt 0 view .LVU1166 + 3623 00b8 0723 movs r3, #7 + 3624 00ba 1193 str r3, [sp, #68] +1164:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); + 3625 .loc 1 1164 3 is_stmt 1 view .LVU1167 + 3626 00bc 094C ldr r4, .L187+8 + 3627 00be 08A9 add r1, sp, #32 + 3628 00c0 2046 mov r0, r4 + 3629 00c2 FFF7FEFF bl LL_SPI_Init + 3630 .LVL340: +1165:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); + 3631 .loc 1 1165 3 view .LVU1168 + 3632 .LBB435: + 3633 .LBI435: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2505 .loc 4 426 22 view .LVU831 - 2506 .LBB363: + 3634 .loc 4 426 22 view .LVU1169 + 3635 .LBB436: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2507 .loc 4 428 3 view .LVU832 - 2508 00ae 6368 ldr r3, [r4, #4] - 2509 00b0 23F01003 bic r3, r3, #16 - 2510 00b4 6360 str r3, [r4, #4] - 2511 .LVL207: + 3636 .loc 4 428 3 view .LVU1170 + 3637 00c6 6368 ldr r3, [r4, #4] + 3638 00c8 23F01003 bic r3, r3, #16 + 3639 00cc 6360 str r3, [r4, #4] + 3640 .LVL341: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2512 .loc 4 428 3 is_stmt 0 view .LVU833 - 2513 .LBE363: - 2514 .LBE362: -1035:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ - 2515 .loc 1 1035 3 is_stmt 1 view .LVU834 - 2516 .LBB364: - 2517 .LBI364: + 3641 .loc 4 428 3 is_stmt 0 view .LVU1171 + 3642 .LBE436: + 3643 .LBE435: +1166:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ + 3644 .loc 1 1166 3 is_stmt 1 view .LVU1172 + 3645 .LBB437: + 3646 .LBI437: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2518 .loc 4 874 22 view .LVU835 - 2519 .LBB365: + 3647 .loc 4 874 22 view .LVU1173 + ARM GAS /tmp/ccYgfTud.s page 223 + + + 3648 .LBB438: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2520 .loc 4 876 3 view .LVU836 - 2521 00b6 6368 ldr r3, [r4, #4] - 2522 00b8 23F00803 bic r3, r3, #8 - 2523 00bc 6360 str r3, [r4, #4] - 2524 .LVL208: + 3649 .loc 4 876 3 view .LVU1174 + 3650 00ce 6368 ldr r3, [r4, #4] + 3651 00d0 23F00803 bic r3, r3, #8 + 3652 00d4 6360 str r3, [r4, #4] + 3653 .LVL342: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2525 .loc 4 876 3 is_stmt 0 view .LVU837 - 2526 .LBE365: - ARM GAS /tmp/ccO46DoU.s page 191 + 3654 .loc 4 876 3 is_stmt 0 view .LVU1175 + 3655 .LBE438: + 3656 .LBE437: +1171:Src/main.c **** + 3657 .loc 1 1171 1 view .LVU1176 + 3658 00d6 12B0 add sp, sp, #72 + 3659 .LCFI34: + 3660 .cfi_def_cfa_offset 24 + 3661 @ sp needed + 3662 00d8 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 3663 .L188: + 3664 .align 2 + 3665 .L187: + 3666 00dc 00380240 .word 1073887232 + 3667 00e0 00040240 .word 1073873920 + 3668 00e4 00380040 .word 1073756160 + 3669 .cfi_endproc + 3670 .LFE1191: + 3672 .section .text.MX_SPI5_Init,"ax",%progbits + 3673 .align 1 + 3674 .syntax unified + 3675 .thumb + 3676 .thumb_func + 3678 MX_SPI5_Init: + 3679 .LFB1193: +1242:Src/main.c **** + 3680 .loc 1 1242 1 is_stmt 1 view -0 + 3681 .cfi_startproc + 3682 @ args = 0, pretend = 0, frame = 72 + 3683 @ frame_needed = 0, uses_anonymous_args = 0 + 3684 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 3685 .LCFI35: + 3686 .cfi_def_cfa_offset 24 + 3687 .cfi_offset 4, -24 + 3688 .cfi_offset 5, -20 + 3689 .cfi_offset 6, -16 + 3690 .cfi_offset 7, -12 + 3691 .cfi_offset 8, -8 + 3692 .cfi_offset 14, -4 + 3693 0004 92B0 sub sp, sp, #72 + 3694 .LCFI36: + 3695 .cfi_def_cfa_offset 96 +1248:Src/main.c **** + 3696 .loc 1 1248 3 view .LVU1178 +1248:Src/main.c **** + 3697 .loc 1 1248 22 is_stmt 0 view .LVU1179 + 3698 0006 2822 movs r2, #40 + 3699 0008 0021 movs r1, #0 + 3700 000a 08A8 add r0, sp, #32 + ARM GAS /tmp/ccYgfTud.s page 224 - 2527 .LBE364: -1040:Src/main.c **** - 2528 .loc 1 1040 1 view .LVU838 - 2529 00be 12B0 add sp, sp, #72 - 2530 .LCFI20: - 2531 .cfi_def_cfa_offset 24 - 2532 @ sp needed - 2533 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 2534 .L104: - 2535 .align 2 - 2536 .L103: - 2537 00c4 00380240 .word 1073887232 - 2538 00c8 00040240 .word 1073873920 - 2539 00cc 00380040 .word 1073756160 - 2540 .cfi_endproc - 2541 .LFE1191: - 2543 .section .text.MX_SPI5_Init,"ax",%progbits - 2544 .align 1 - 2545 .syntax unified - 2546 .thumb - 2547 .thumb_func - 2549 MX_SPI5_Init: - 2550 .LFB1193: -1111:Src/main.c **** - 2551 .loc 1 1111 1 is_stmt 1 view -0 - 2552 .cfi_startproc - 2553 @ args = 0, pretend = 0, frame = 72 - 2554 @ frame_needed = 0, uses_anonymous_args = 0 - 2555 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 2556 .LCFI21: - 2557 .cfi_def_cfa_offset 24 - 2558 .cfi_offset 4, -24 - 2559 .cfi_offset 5, -20 - 2560 .cfi_offset 6, -16 - 2561 .cfi_offset 7, -12 - 2562 .cfi_offset 8, -8 - 2563 .cfi_offset 14, -4 - 2564 0004 92B0 sub sp, sp, #72 - 2565 .LCFI22: - 2566 .cfi_def_cfa_offset 96 -1117:Src/main.c **** - 2567 .loc 1 1117 3 view .LVU840 -1117:Src/main.c **** - 2568 .loc 1 1117 22 is_stmt 0 view .LVU841 - 2569 0006 2822 movs r2, #40 - 2570 0008 0021 movs r1, #0 - 2571 000a 08A8 add r0, sp, #32 - 2572 000c FFF7FEFF bl memset - 2573 .LVL209: -1119:Src/main.c **** - 2574 .loc 1 1119 3 is_stmt 1 view .LVU842 -1119:Src/main.c **** - 2575 .loc 1 1119 23 is_stmt 0 view .LVU843 - 2576 0010 0024 movs r4, #0 - 2577 0012 0294 str r4, [sp, #8] - 2578 0014 0394 str r4, [sp, #12] - 2579 0016 0494 str r4, [sp, #16] - ARM GAS /tmp/ccO46DoU.s page 192 - - - 2580 0018 0594 str r4, [sp, #20] - 2581 001a 0694 str r4, [sp, #24] - 2582 001c 0794 str r4, [sp, #28] -1122:Src/main.c **** - 2583 .loc 1 1122 3 is_stmt 1 view .LVU844 - 2584 .LVL210: - 2585 .LBB366: - 2586 .LBI366: -1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 2587 .loc 3 1587 22 view .LVU845 - 2588 .LBB367: -1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 2589 .loc 3 1589 3 view .LVU846 -1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 2590 .loc 3 1590 3 view .LVU847 - 2591 001e 294B ldr r3, .L107 - 2592 0020 5A6C ldr r2, [r3, #68] - 2593 0022 42F48012 orr r2, r2, #1048576 - 2594 0026 5A64 str r2, [r3, #68] -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2595 .loc 3 1592 3 view .LVU848 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2596 .loc 3 1592 12 is_stmt 0 view .LVU849 - 2597 0028 5A6C ldr r2, [r3, #68] - 2598 002a 02F48012 and r2, r2, #1048576 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2599 .loc 3 1592 10 view .LVU850 - 2600 002e 0192 str r2, [sp, #4] - 2601 .loc 3 1593 3 is_stmt 1 view .LVU851 - 2602 0030 019A ldr r2, [sp, #4] - 2603 .LVL211: - 2604 .loc 3 1593 3 is_stmt 0 view .LVU852 - 2605 .LBE367: - 2606 .LBE366: -1124:Src/main.c **** /**SPI5 GPIO Configuration - 2607 .loc 1 1124 3 is_stmt 1 view .LVU853 - 2608 .LBB368: - 2609 .LBI368: - 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 2610 .loc 3 309 22 view .LVU854 - 2611 .LBB369: - 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 2612 .loc 3 311 3 view .LVU855 - 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 2613 .loc 3 312 3 view .LVU856 - 2614 0032 1A6B ldr r2, [r3, #48] - 2615 0034 42F02002 orr r2, r2, #32 - 2616 0038 1A63 str r2, [r3, #48] - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2617 .loc 3 314 3 view .LVU857 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2618 .loc 3 314 12 is_stmt 0 view .LVU858 - 2619 003a 1B6B ldr r3, [r3, #48] - 2620 003c 03F02003 and r3, r3, #32 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2621 .loc 3 314 10 view .LVU859 - 2622 0040 0093 str r3, [sp] - ARM GAS /tmp/ccO46DoU.s page 193 - - - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 2623 .loc 3 315 3 is_stmt 1 view .LVU860 - 2624 0042 009B ldr r3, [sp] - 2625 .LVL212: - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 2626 .loc 3 315 3 is_stmt 0 view .LVU861 - 2627 .LBE369: - 2628 .LBE368: -1129:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2629 .loc 1 1129 3 is_stmt 1 view .LVU862 -1129:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2630 .loc 1 1129 23 is_stmt 0 view .LVU863 - 2631 0044 8023 movs r3, #128 - 2632 0046 0293 str r3, [sp, #8] -1130:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2633 .loc 1 1130 3 is_stmt 1 view .LVU864 -1130:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2634 .loc 1 1130 24 is_stmt 0 view .LVU865 - 2635 0048 0225 movs r5, #2 - 2636 004a 0395 str r5, [sp, #12] -1131:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2637 .loc 1 1131 3 is_stmt 1 view .LVU866 -1131:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2638 .loc 1 1131 25 is_stmt 0 view .LVU867 - 2639 004c 4FF00308 mov r8, #3 - 2640 0050 CDF81080 str r8, [sp, #16] -1132:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2641 .loc 1 1132 3 is_stmt 1 view .LVU868 -1133:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2642 .loc 1 1133 3 view .LVU869 -1134:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2643 .loc 1 1134 3 view .LVU870 -1134:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2644 .loc 1 1134 29 is_stmt 0 view .LVU871 - 2645 0054 0527 movs r7, #5 - 2646 0056 0797 str r7, [sp, #28] -1135:Src/main.c **** - 2647 .loc 1 1135 3 is_stmt 1 view .LVU872 - 2648 0058 1B4E ldr r6, .L107+4 - 2649 005a 02A9 add r1, sp, #8 - 2650 005c 3046 mov r0, r6 - 2651 005e FFF7FEFF bl LL_GPIO_Init - 2652 .LVL213: -1137:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2653 .loc 1 1137 3 view .LVU873 -1137:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2654 .loc 1 1137 23 is_stmt 0 view .LVU874 - 2655 0062 4FF48073 mov r3, #256 - 2656 0066 0293 str r3, [sp, #8] -1138:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2657 .loc 1 1138 3 is_stmt 1 view .LVU875 -1138:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2658 .loc 1 1138 24 is_stmt 0 view .LVU876 - 2659 0068 0395 str r5, [sp, #12] -1139:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2660 .loc 1 1139 3 is_stmt 1 view .LVU877 -1139:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - ARM GAS /tmp/ccO46DoU.s page 194 - - - 2661 .loc 1 1139 25 is_stmt 0 view .LVU878 - 2662 006a CDF81080 str r8, [sp, #16] -1140:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2663 .loc 1 1140 3 is_stmt 1 view .LVU879 -1140:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2664 .loc 1 1140 30 is_stmt 0 view .LVU880 - 2665 006e 0594 str r4, [sp, #20] -1141:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2666 .loc 1 1141 3 is_stmt 1 view .LVU881 -1141:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2667 .loc 1 1141 24 is_stmt 0 view .LVU882 - 2668 0070 0694 str r4, [sp, #24] -1142:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2669 .loc 1 1142 3 is_stmt 1 view .LVU883 -1142:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2670 .loc 1 1142 29 is_stmt 0 view .LVU884 - 2671 0072 0797 str r7, [sp, #28] -1143:Src/main.c **** - 2672 .loc 1 1143 3 is_stmt 1 view .LVU885 - 2673 0074 02A9 add r1, sp, #8 - 2674 0076 3046 mov r0, r6 - 2675 0078 FFF7FEFF bl LL_GPIO_Init - 2676 .LVL214: -1149:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2677 .loc 1 1149 3 view .LVU886 -1149:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2678 .loc 1 1149 36 is_stmt 0 view .LVU887 - 2679 007c 4FF48063 mov r3, #1024 - 2680 0080 0893 str r3, [sp, #32] -1150:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2681 .loc 1 1150 3 is_stmt 1 view .LVU888 -1150:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2682 .loc 1 1150 23 is_stmt 0 view .LVU889 - 2683 0082 4FF48273 mov r3, #260 - 2684 0086 0993 str r3, [sp, #36] -1151:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2685 .loc 1 1151 3 is_stmt 1 view .LVU890 -1151:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2686 .loc 1 1151 28 is_stmt 0 view .LVU891 - 2687 0088 4FF47063 mov r3, #3840 - 2688 008c 0A93 str r3, [sp, #40] -1152:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2689 .loc 1 1152 3 is_stmt 1 view .LVU892 -1152:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2690 .loc 1 1152 32 is_stmt 0 view .LVU893 - 2691 008e 0B95 str r5, [sp, #44] -1153:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2692 .loc 1 1153 3 is_stmt 1 view .LVU894 -1153:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2693 .loc 1 1153 29 is_stmt 0 view .LVU895 - 2694 0090 0C94 str r4, [sp, #48] -1154:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2695 .loc 1 1154 3 is_stmt 1 view .LVU896 -1154:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2696 .loc 1 1154 22 is_stmt 0 view .LVU897 - 2697 0092 4FF40073 mov r3, #512 - 2698 0096 0D93 str r3, [sp, #52] - ARM GAS /tmp/ccO46DoU.s page 195 - - -1155:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2699 .loc 1 1155 3 is_stmt 1 view .LVU898 -1155:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2700 .loc 1 1155 27 is_stmt 0 view .LVU899 - 2701 0098 1823 movs r3, #24 - 2702 009a 0E93 str r3, [sp, #56] -1156:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2703 .loc 1 1156 3 is_stmt 1 view .LVU900 -1156:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2704 .loc 1 1156 27 is_stmt 0 view .LVU901 - 2705 009c 0F94 str r4, [sp, #60] -1157:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2706 .loc 1 1157 3 is_stmt 1 view .LVU902 -1157:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2707 .loc 1 1157 33 is_stmt 0 view .LVU903 - 2708 009e 1094 str r4, [sp, #64] -1158:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 2709 .loc 1 1158 3 is_stmt 1 view .LVU904 -1158:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 2710 .loc 1 1158 26 is_stmt 0 view .LVU905 - 2711 00a0 0723 movs r3, #7 - 2712 00a2 1193 str r3, [sp, #68] -1159:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); - 2713 .loc 1 1159 3 is_stmt 1 view .LVU906 - 2714 00a4 094C ldr r4, .L107+8 - 2715 00a6 08A9 add r1, sp, #32 - 2716 00a8 2046 mov r0, r4 - 2717 00aa FFF7FEFF bl LL_SPI_Init - 2718 .LVL215: -1160:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); - 2719 .loc 1 1160 3 view .LVU907 - 2720 .LBB370: - 2721 .LBI370: - 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2722 .loc 4 426 22 view .LVU908 - 2723 .LBB371: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2724 .loc 4 428 3 view .LVU909 - 2725 00ae 6368 ldr r3, [r4, #4] - 2726 00b0 23F01003 bic r3, r3, #16 - 2727 00b4 6360 str r3, [r4, #4] - 2728 .LVL216: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2729 .loc 4 428 3 is_stmt 0 view .LVU910 - 2730 .LBE371: - 2731 .LBE370: -1161:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ - 2732 .loc 1 1161 3 is_stmt 1 view .LVU911 - 2733 .LBB372: - 2734 .LBI372: - 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2735 .loc 4 874 22 view .LVU912 - 2736 .LBB373: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2737 .loc 4 876 3 view .LVU913 - 2738 00b6 6368 ldr r3, [r4, #4] - 2739 00b8 23F00803 bic r3, r3, #8 - ARM GAS /tmp/ccO46DoU.s page 196 - - - 2740 00bc 6360 str r3, [r4, #4] - 2741 .LVL217: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2742 .loc 4 876 3 is_stmt 0 view .LVU914 - 2743 .LBE373: - 2744 .LBE372: -1166:Src/main.c **** - 2745 .loc 1 1166 1 view .LVU915 - 2746 00be 12B0 add sp, sp, #72 - 2747 .LCFI23: - 2748 .cfi_def_cfa_offset 24 - 2749 @ sp needed - 2750 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 2751 .L108: - 2752 .align 2 - 2753 .L107: - 2754 00c4 00380240 .word 1073887232 - 2755 00c8 00140240 .word 1073878016 - 2756 00cc 00500140 .word 1073827840 - 2757 .cfi_endproc - 2758 .LFE1193: - 2760 .section .text.MX_SPI6_Init,"ax",%progbits - 2761 .align 1 - 2762 .syntax unified - 2763 .thumb - 2764 .thumb_func - 2766 MX_SPI6_Init: - 2767 .LFB1194: -1174:Src/main.c **** - 2768 .loc 1 1174 1 is_stmt 1 view -0 - 2769 .cfi_startproc - 2770 @ args = 0, pretend = 0, frame = 72 - 2771 @ frame_needed = 0, uses_anonymous_args = 0 - 2772 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 2773 .LCFI24: - 2774 .cfi_def_cfa_offset 24 - 2775 .cfi_offset 4, -24 - 2776 .cfi_offset 5, -20 - 2777 .cfi_offset 6, -16 - 2778 .cfi_offset 7, -12 - 2779 .cfi_offset 8, -8 - 2780 .cfi_offset 14, -4 - 2781 0004 92B0 sub sp, sp, #72 - 2782 .LCFI25: - 2783 .cfi_def_cfa_offset 96 -1180:Src/main.c **** - 2784 .loc 1 1180 3 view .LVU917 -1180:Src/main.c **** - 2785 .loc 1 1180 22 is_stmt 0 view .LVU918 - 2786 0006 2822 movs r2, #40 - 2787 0008 0021 movs r1, #0 - 2788 000a 08A8 add r0, sp, #32 - 2789 000c FFF7FEFF bl memset - 2790 .LVL218: -1182:Src/main.c **** - 2791 .loc 1 1182 3 is_stmt 1 view .LVU919 -1182:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 197 - - - 2792 .loc 1 1182 23 is_stmt 0 view .LVU920 - 2793 0010 0024 movs r4, #0 - 2794 0012 0294 str r4, [sp, #8] - 2795 0014 0394 str r4, [sp, #12] - 2796 0016 0494 str r4, [sp, #16] - 2797 0018 0594 str r4, [sp, #20] - 2798 001a 0694 str r4, [sp, #24] - 2799 001c 0794 str r4, [sp, #28] -1185:Src/main.c **** - 2800 .loc 1 1185 3 is_stmt 1 view .LVU921 - 2801 .LVL219: - 2802 .LBB374: - 2803 .LBI374: -1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 2804 .loc 3 1587 22 view .LVU922 - 2805 .LBB375: -1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 2806 .loc 3 1589 3 view .LVU923 -1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 2807 .loc 3 1590 3 view .LVU924 - 2808 001e 294B ldr r3, .L111 - 2809 0020 5A6C ldr r2, [r3, #68] - 2810 0022 42F40012 orr r2, r2, #2097152 - 2811 0026 5A64 str r2, [r3, #68] -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2812 .loc 3 1592 3 view .LVU925 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2813 .loc 3 1592 12 is_stmt 0 view .LVU926 - 2814 0028 5A6C ldr r2, [r3, #68] - 2815 002a 02F40012 and r2, r2, #2097152 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2816 .loc 3 1592 10 view .LVU927 - 2817 002e 0192 str r2, [sp, #4] - 2818 .loc 3 1593 3 is_stmt 1 view .LVU928 - 2819 0030 019A ldr r2, [sp, #4] - 2820 .LVL220: - 2821 .loc 3 1593 3 is_stmt 0 view .LVU929 - 2822 .LBE375: - 2823 .LBE374: -1187:Src/main.c **** /**SPI6 GPIO Configuration - 2824 .loc 1 1187 3 is_stmt 1 view .LVU930 - 2825 .LBB376: - 2826 .LBI376: - 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 2827 .loc 3 309 22 view .LVU931 - 2828 .LBB377: - 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 2829 .loc 3 311 3 view .LVU932 - 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 2830 .loc 3 312 3 view .LVU933 - 2831 0032 1A6B ldr r2, [r3, #48] - 2832 0034 42F00102 orr r2, r2, #1 - 2833 0038 1A63 str r2, [r3, #48] - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2834 .loc 3 314 3 view .LVU934 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2835 .loc 3 314 12 is_stmt 0 view .LVU935 - ARM GAS /tmp/ccO46DoU.s page 198 - - - 2836 003a 1B6B ldr r3, [r3, #48] - 2837 003c 03F00103 and r3, r3, #1 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 2838 .loc 3 314 10 view .LVU936 - 2839 0040 0093 str r3, [sp] - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 2840 .loc 3 315 3 is_stmt 1 view .LVU937 - 2841 0042 009B ldr r3, [sp] - 2842 .LVL221: - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 2843 .loc 3 315 3 is_stmt 0 view .LVU938 - 2844 .LBE377: - 2845 .LBE376: -1192:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2846 .loc 1 1192 3 is_stmt 1 view .LVU939 -1192:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2847 .loc 1 1192 23 is_stmt 0 view .LVU940 - 2848 0044 2023 movs r3, #32 - 2849 0046 0293 str r3, [sp, #8] -1193:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2850 .loc 1 1193 3 is_stmt 1 view .LVU941 -1193:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2851 .loc 1 1193 24 is_stmt 0 view .LVU942 - 2852 0048 0225 movs r5, #2 - 2853 004a 0395 str r5, [sp, #12] -1194:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2854 .loc 1 1194 3 is_stmt 1 view .LVU943 -1194:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2855 .loc 1 1194 25 is_stmt 0 view .LVU944 - 2856 004c 4FF00308 mov r8, #3 - 2857 0050 CDF81080 str r8, [sp, #16] -1195:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2858 .loc 1 1195 3 is_stmt 1 view .LVU945 -1196:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 2859 .loc 1 1196 3 view .LVU946 -1197:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2860 .loc 1 1197 3 view .LVU947 -1197:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2861 .loc 1 1197 29 is_stmt 0 view .LVU948 - 2862 0054 0827 movs r7, #8 - 2863 0056 0797 str r7, [sp, #28] -1198:Src/main.c **** - 2864 .loc 1 1198 3 is_stmt 1 view .LVU949 - 2865 0058 1B4E ldr r6, .L111+4 - 2866 005a 0DEB0701 add r1, sp, r7 - 2867 005e 3046 mov r0, r6 - 2868 0060 FFF7FEFF bl LL_GPIO_Init - 2869 .LVL222: -1200:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2870 .loc 1 1200 3 view .LVU950 -1200:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2871 .loc 1 1200 23 is_stmt 0 view .LVU951 - 2872 0064 8023 movs r3, #128 - 2873 0066 0293 str r3, [sp, #8] -1201:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2874 .loc 1 1201 3 is_stmt 1 view .LVU952 -1201:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - ARM GAS /tmp/ccO46DoU.s page 199 - - - 2875 .loc 1 1201 24 is_stmt 0 view .LVU953 - 2876 0068 0395 str r5, [sp, #12] -1202:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2877 .loc 1 1202 3 is_stmt 1 view .LVU954 -1202:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2878 .loc 1 1202 25 is_stmt 0 view .LVU955 - 2879 006a CDF81080 str r8, [sp, #16] -1203:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2880 .loc 1 1203 3 is_stmt 1 view .LVU956 -1203:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2881 .loc 1 1203 30 is_stmt 0 view .LVU957 - 2882 006e 0594 str r4, [sp, #20] -1204:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 2883 .loc 1 1204 3 is_stmt 1 view .LVU958 -1204:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 2884 .loc 1 1204 24 is_stmt 0 view .LVU959 - 2885 0070 0694 str r4, [sp, #24] -1205:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2886 .loc 1 1205 3 is_stmt 1 view .LVU960 -1205:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2887 .loc 1 1205 29 is_stmt 0 view .LVU961 - 2888 0072 0797 str r7, [sp, #28] -1206:Src/main.c **** - 2889 .loc 1 1206 3 is_stmt 1 view .LVU962 - 2890 0074 0DEB0701 add r1, sp, r7 - 2891 0078 3046 mov r0, r6 - 2892 007a FFF7FEFF bl LL_GPIO_Init - 2893 .LVL223: -1212:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2894 .loc 1 1212 3 view .LVU963 -1212:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2895 .loc 1 1212 36 is_stmt 0 view .LVU964 - 2896 007e 0894 str r4, [sp, #32] -1213:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2897 .loc 1 1213 3 is_stmt 1 view .LVU965 -1213:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2898 .loc 1 1213 23 is_stmt 0 view .LVU966 - 2899 0080 4FF48273 mov r3, #260 - 2900 0084 0993 str r3, [sp, #36] -1214:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2901 .loc 1 1214 3 is_stmt 1 view .LVU967 -1214:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2902 .loc 1 1214 28 is_stmt 0 view .LVU968 - 2903 0086 4FF47063 mov r3, #3840 - 2904 008a 0A93 str r3, [sp, #40] -1215:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2905 .loc 1 1215 3 is_stmt 1 view .LVU969 -1215:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2906 .loc 1 1215 32 is_stmt 0 view .LVU970 - 2907 008c 0B95 str r5, [sp, #44] -1216:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2908 .loc 1 1216 3 is_stmt 1 view .LVU971 -1216:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2909 .loc 1 1216 29 is_stmt 0 view .LVU972 - 2910 008e 0123 movs r3, #1 - 2911 0090 0C93 str r3, [sp, #48] -1217:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - ARM GAS /tmp/ccO46DoU.s page 200 - - - 2912 .loc 1 1217 3 is_stmt 1 view .LVU973 -1217:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2913 .loc 1 1217 22 is_stmt 0 view .LVU974 - 2914 0092 4FF40073 mov r3, #512 - 2915 0096 0D93 str r3, [sp, #52] -1218:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2916 .loc 1 1218 3 is_stmt 1 view .LVU975 -1218:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2917 .loc 1 1218 27 is_stmt 0 view .LVU976 - 2918 0098 1823 movs r3, #24 - 2919 009a 0E93 str r3, [sp, #56] -1219:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2920 .loc 1 1219 3 is_stmt 1 view .LVU977 -1219:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2921 .loc 1 1219 27 is_stmt 0 view .LVU978 - 2922 009c 0F94 str r4, [sp, #60] -1220:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2923 .loc 1 1220 3 is_stmt 1 view .LVU979 -1220:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2924 .loc 1 1220 33 is_stmt 0 view .LVU980 - 2925 009e 1094 str r4, [sp, #64] -1221:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 2926 .loc 1 1221 3 is_stmt 1 view .LVU981 -1221:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 2927 .loc 1 1221 26 is_stmt 0 view .LVU982 - 2928 00a0 0723 movs r3, #7 - 2929 00a2 1193 str r3, [sp, #68] -1222:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); - 2930 .loc 1 1222 3 is_stmt 1 view .LVU983 - 2931 00a4 094C ldr r4, .L111+8 - 2932 00a6 08A9 add r1, sp, #32 - 2933 00a8 2046 mov r0, r4 - 2934 00aa FFF7FEFF bl LL_SPI_Init - 2935 .LVL224: -1223:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); - 2936 .loc 1 1223 3 view .LVU984 - 2937 .LBB378: - 2938 .LBI378: - 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2939 .loc 4 426 22 view .LVU985 - 2940 .LBB379: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2941 .loc 4 428 3 view .LVU986 - 2942 00ae 6368 ldr r3, [r4, #4] - 2943 00b0 23F01003 bic r3, r3, #16 - 2944 00b4 6360 str r3, [r4, #4] - 2945 .LVL225: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2946 .loc 4 428 3 is_stmt 0 view .LVU987 - 2947 .LBE379: - 2948 .LBE378: -1224:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ - 2949 .loc 1 1224 3 is_stmt 1 view .LVU988 - 2950 .LBB380: - 2951 .LBI380: - 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2952 .loc 4 874 22 view .LVU989 - ARM GAS /tmp/ccO46DoU.s page 201 - - - 2953 .LBB381: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2954 .loc 4 876 3 view .LVU990 - 2955 00b6 6368 ldr r3, [r4, #4] - 2956 00b8 23F00803 bic r3, r3, #8 - 2957 00bc 6360 str r3, [r4, #4] - 2958 .LVL226: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2959 .loc 4 876 3 is_stmt 0 view .LVU991 - 2960 .LBE381: - 2961 .LBE380: -1229:Src/main.c **** - 2962 .loc 1 1229 1 view .LVU992 - 2963 00be 12B0 add sp, sp, #72 - 2964 .LCFI26: - 2965 .cfi_def_cfa_offset 24 - 2966 @ sp needed - 2967 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 2968 .L112: - 2969 .align 2 - 2970 .L111: - 2971 00c4 00380240 .word 1073887232 - 2972 00c8 00000240 .word 1073872896 - 2973 00cc 00540140 .word 1073828864 - 2974 .cfi_endproc - 2975 .LFE1194: - 2977 .section .text.MX_TIM2_Init,"ax",%progbits - 2978 .align 1 - 2979 .syntax unified - 2980 .thumb - 2981 .thumb_func - 2983 MX_TIM2_Init: - 2984 .LFB1195: -1237:Src/main.c **** - 2985 .loc 1 1237 1 is_stmt 1 view -0 - 2986 .cfi_startproc - 2987 @ args = 0, pretend = 0, frame = 24 - 2988 @ frame_needed = 0, uses_anonymous_args = 0 - 2989 0000 10B5 push {r4, lr} - 2990 .LCFI27: - 2991 .cfi_def_cfa_offset 8 - 2992 .cfi_offset 4, -8 - 2993 .cfi_offset 14, -4 - 2994 0002 86B0 sub sp, sp, #24 - 2995 .LCFI28: - 2996 .cfi_def_cfa_offset 32 -1243:Src/main.c **** - 2997 .loc 1 1243 3 view .LVU994 -1243:Src/main.c **** - 2998 .loc 1 1243 22 is_stmt 0 view .LVU995 - 2999 0004 0024 movs r4, #0 - 3000 0006 0194 str r4, [sp, #4] - 3001 0008 0294 str r4, [sp, #8] - 3002 000a 0394 str r4, [sp, #12] - 3003 000c 0494 str r4, [sp, #16] - 3004 000e 0594 str r4, [sp, #20] -1246:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 202 - - - 3005 .loc 1 1246 3 is_stmt 1 view .LVU996 - 3006 .LVL227: - 3007 .LBB382: - 3008 .LBI382: -1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3009 .loc 3 1071 22 view .LVU997 - 3010 .LBB383: -1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 3011 .loc 3 1073 3 view .LVU998 -1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3012 .loc 3 1074 3 view .LVU999 - 3013 0010 1D4B ldr r3, .L115 - 3014 0012 1A6C ldr r2, [r3, #64] - 3015 0014 42F00102 orr r2, r2, #1 - 3016 0018 1A64 str r2, [r3, #64] -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3017 .loc 3 1076 3 view .LVU1000 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3018 .loc 3 1076 12 is_stmt 0 view .LVU1001 - 3019 001a 1B6C ldr r3, [r3, #64] - 3020 001c 03F00103 and r3, r3, #1 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3021 .loc 3 1076 10 view .LVU1002 - 3022 0020 0093 str r3, [sp] -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3023 .loc 3 1077 3 is_stmt 1 view .LVU1003 - 3024 0022 009B ldr r3, [sp] - 3025 .LVL228: -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3026 .loc 3 1077 3 is_stmt 0 view .LVU1004 - 3027 .LBE383: - 3028 .LBE382: -1249:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 3029 .loc 1 1249 3 is_stmt 1 view .LVU1005 - 3030 .LBB384: - 3031 .LBI384: -1884:Drivers/CMSIS/Include/core_cm7.h **** { - 3032 .loc 2 1884 26 view .LVU1006 - 3033 .LBB385: -1886:Drivers/CMSIS/Include/core_cm7.h **** } - 3034 .loc 2 1886 3 view .LVU1007 -1886:Drivers/CMSIS/Include/core_cm7.h **** } - 3035 .loc 2 1886 26 is_stmt 0 view .LVU1008 - 3036 0024 194B ldr r3, .L115+4 - 3037 0026 D868 ldr r0, [r3, #12] - 3038 .LBE385: - 3039 .LBE384: -1249:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 3040 .loc 1 1249 3 discriminator 1 view .LVU1009 - 3041 0028 2246 mov r2, r4 - 3042 002a 2146 mov r1, r4 - 3043 002c C0F30220 ubfx r0, r0, #8, #3 - 3044 0030 FFF7FEFF bl NVIC_EncodePriority - 3045 .LVL229: - 3046 .LBB386: - 3047 .LBI386: -2024:Drivers/CMSIS/Include/core_cm7.h **** { - ARM GAS /tmp/ccO46DoU.s page 203 - - - 3048 .loc 2 2024 22 is_stmt 1 view .LVU1010 - 3049 .LBB387: -2026:Drivers/CMSIS/Include/core_cm7.h **** { - 3050 .loc 2 2026 3 view .LVU1011 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3051 .loc 2 2028 5 view .LVU1012 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3052 .loc 2 2028 49 is_stmt 0 view .LVU1013 - 3053 0034 0001 lsls r0, r0, #4 - 3054 .LVL230: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3055 .loc 2 2028 49 view .LVU1014 - 3056 0036 C0B2 uxtb r0, r0 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3057 .loc 2 2028 47 view .LVU1015 - 3058 0038 154B ldr r3, .L115+8 - 3059 003a 83F81C03 strb r0, [r3, #796] - 3060 .LVL231: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3061 .loc 2 2028 47 view .LVU1016 - 3062 .LBE387: - 3063 .LBE386: + 3701 000c FFF7FEFF bl memset + 3702 .LVL343: 1250:Src/main.c **** - 3064 .loc 1 1250 3 is_stmt 1 view .LVU1017 - 3065 .LBB388: - 3066 .LBI388: + 3703 .loc 1 1250 3 is_stmt 1 view .LVU1180 +1250:Src/main.c **** + 3704 .loc 1 1250 23 is_stmt 0 view .LVU1181 + 3705 0010 0024 movs r4, #0 + 3706 0012 0294 str r4, [sp, #8] + 3707 0014 0394 str r4, [sp, #12] + 3708 0016 0494 str r4, [sp, #16] + 3709 0018 0594 str r4, [sp, #20] + 3710 001a 0694 str r4, [sp, #24] + 3711 001c 0794 str r4, [sp, #28] +1253:Src/main.c **** + 3712 .loc 1 1253 3 is_stmt 1 view .LVU1182 + 3713 .LVL344: + 3714 .LBB439: + 3715 .LBI439: +1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 3716 .loc 3 1587 22 view .LVU1183 + 3717 .LBB440: +1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); + 3718 .loc 3 1589 3 view .LVU1184 +1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 3719 .loc 3 1590 3 view .LVU1185 + 3720 001e 294B ldr r3, .L191 + 3721 0020 5A6C ldr r2, [r3, #68] + 3722 0022 42F48012 orr r2, r2, #1048576 + 3723 0026 5A64 str r2, [r3, #68] +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3724 .loc 3 1592 3 view .LVU1186 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3725 .loc 3 1592 12 is_stmt 0 view .LVU1187 + 3726 0028 5A6C ldr r2, [r3, #68] + 3727 002a 02F48012 and r2, r2, #1048576 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3728 .loc 3 1592 10 view .LVU1188 + 3729 002e 0192 str r2, [sp, #4] + 3730 .loc 3 1593 3 is_stmt 1 view .LVU1189 + 3731 0030 019A ldr r2, [sp, #4] + 3732 .LVL345: + 3733 .loc 3 1593 3 is_stmt 0 view .LVU1190 + 3734 .LBE440: + 3735 .LBE439: +1255:Src/main.c **** /**SPI5 GPIO Configuration + 3736 .loc 1 1255 3 is_stmt 1 view .LVU1191 + 3737 .LBB441: + 3738 .LBI441: + 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 3739 .loc 3 309 22 view .LVU1192 + 3740 .LBB442: + 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); + 3741 .loc 3 311 3 view .LVU1193 + 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 3742 .loc 3 312 3 view .LVU1194 + 3743 0032 1A6B ldr r2, [r3, #48] + 3744 0034 42F02002 orr r2, r2, #32 + ARM GAS /tmp/ccYgfTud.s page 225 + + + 3745 0038 1A63 str r2, [r3, #48] + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3746 .loc 3 314 3 view .LVU1195 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3747 .loc 3 314 12 is_stmt 0 view .LVU1196 + 3748 003a 1B6B ldr r3, [r3, #48] + 3749 003c 03F02003 and r3, r3, #32 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3750 .loc 3 314 10 view .LVU1197 + 3751 0040 0093 str r3, [sp] + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 3752 .loc 3 315 3 is_stmt 1 view .LVU1198 + 3753 0042 009B ldr r3, [sp] + 3754 .LVL346: + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 3755 .loc 3 315 3 is_stmt 0 view .LVU1199 + 3756 .LBE442: + 3757 .LBE441: +1260:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3758 .loc 1 1260 3 is_stmt 1 view .LVU1200 +1260:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3759 .loc 1 1260 23 is_stmt 0 view .LVU1201 + 3760 0044 8023 movs r3, #128 + 3761 0046 0293 str r3, [sp, #8] +1261:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3762 .loc 1 1261 3 is_stmt 1 view .LVU1202 +1261:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3763 .loc 1 1261 24 is_stmt 0 view .LVU1203 + 3764 0048 0225 movs r5, #2 + 3765 004a 0395 str r5, [sp, #12] +1262:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3766 .loc 1 1262 3 is_stmt 1 view .LVU1204 +1262:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3767 .loc 1 1262 25 is_stmt 0 view .LVU1205 + 3768 004c 4FF00308 mov r8, #3 + 3769 0050 CDF81080 str r8, [sp, #16] +1263:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3770 .loc 1 1263 3 is_stmt 1 view .LVU1206 +1264:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3771 .loc 1 1264 3 view .LVU1207 +1265:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 3772 .loc 1 1265 3 view .LVU1208 +1265:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 3773 .loc 1 1265 29 is_stmt 0 view .LVU1209 + 3774 0054 0527 movs r7, #5 + 3775 0056 0797 str r7, [sp, #28] +1266:Src/main.c **** + 3776 .loc 1 1266 3 is_stmt 1 view .LVU1210 + 3777 0058 1B4E ldr r6, .L191+4 + 3778 005a 02A9 add r1, sp, #8 + 3779 005c 3046 mov r0, r6 + 3780 005e FFF7FEFF bl LL_GPIO_Init + 3781 .LVL347: +1268:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3782 .loc 1 1268 3 view .LVU1211 +1268:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3783 .loc 1 1268 23 is_stmt 0 view .LVU1212 + ARM GAS /tmp/ccYgfTud.s page 226 + + + 3784 0062 4FF48073 mov r3, #256 + 3785 0066 0293 str r3, [sp, #8] +1269:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3786 .loc 1 1269 3 is_stmt 1 view .LVU1213 +1269:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3787 .loc 1 1269 24 is_stmt 0 view .LVU1214 + 3788 0068 0395 str r5, [sp, #12] +1270:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3789 .loc 1 1270 3 is_stmt 1 view .LVU1215 +1270:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3790 .loc 1 1270 25 is_stmt 0 view .LVU1216 + 3791 006a CDF81080 str r8, [sp, #16] +1271:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3792 .loc 1 1271 3 is_stmt 1 view .LVU1217 +1271:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3793 .loc 1 1271 30 is_stmt 0 view .LVU1218 + 3794 006e 0594 str r4, [sp, #20] +1272:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3795 .loc 1 1272 3 is_stmt 1 view .LVU1219 +1272:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 3796 .loc 1 1272 24 is_stmt 0 view .LVU1220 + 3797 0070 0694 str r4, [sp, #24] +1273:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 3798 .loc 1 1273 3 is_stmt 1 view .LVU1221 +1273:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 3799 .loc 1 1273 29 is_stmt 0 view .LVU1222 + 3800 0072 0797 str r7, [sp, #28] +1274:Src/main.c **** + 3801 .loc 1 1274 3 is_stmt 1 view .LVU1223 + 3802 0074 02A9 add r1, sp, #8 + 3803 0076 3046 mov r0, r6 + 3804 0078 FFF7FEFF bl LL_GPIO_Init + 3805 .LVL348: +1280:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 3806 .loc 1 1280 3 view .LVU1224 +1280:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 3807 .loc 1 1280 36 is_stmt 0 view .LVU1225 + 3808 007c 4FF48063 mov r3, #1024 + 3809 0080 0893 str r3, [sp, #32] +1281:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 3810 .loc 1 1281 3 is_stmt 1 view .LVU1226 +1281:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 3811 .loc 1 1281 23 is_stmt 0 view .LVU1227 + 3812 0082 4FF48273 mov r3, #260 + 3813 0086 0993 str r3, [sp, #36] +1282:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 3814 .loc 1 1282 3 is_stmt 1 view .LVU1228 +1282:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 3815 .loc 1 1282 28 is_stmt 0 view .LVU1229 + 3816 0088 4FF47063 mov r3, #3840 + 3817 008c 0A93 str r3, [sp, #40] +1283:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 3818 .loc 1 1283 3 is_stmt 1 view .LVU1230 +1283:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 3819 .loc 1 1283 32 is_stmt 0 view .LVU1231 + 3820 008e 0B95 str r5, [sp, #44] +1284:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + ARM GAS /tmp/ccYgfTud.s page 227 + + + 3821 .loc 1 1284 3 is_stmt 1 view .LVU1232 +1284:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 3822 .loc 1 1284 29 is_stmt 0 view .LVU1233 + 3823 0090 0C94 str r4, [sp, #48] +1285:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 3824 .loc 1 1285 3 is_stmt 1 view .LVU1234 +1285:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 3825 .loc 1 1285 22 is_stmt 0 view .LVU1235 + 3826 0092 4FF40073 mov r3, #512 + 3827 0096 0D93 str r3, [sp, #52] +1286:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 3828 .loc 1 1286 3 is_stmt 1 view .LVU1236 +1286:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 3829 .loc 1 1286 27 is_stmt 0 view .LVU1237 + 3830 0098 1823 movs r3, #24 + 3831 009a 0E93 str r3, [sp, #56] +1287:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 3832 .loc 1 1287 3 is_stmt 1 view .LVU1238 +1287:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 3833 .loc 1 1287 27 is_stmt 0 view .LVU1239 + 3834 009c 0F94 str r4, [sp, #60] +1288:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 3835 .loc 1 1288 3 is_stmt 1 view .LVU1240 +1288:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 3836 .loc 1 1288 33 is_stmt 0 view .LVU1241 + 3837 009e 1094 str r4, [sp, #64] +1289:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 3838 .loc 1 1289 3 is_stmt 1 view .LVU1242 +1289:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 3839 .loc 1 1289 26 is_stmt 0 view .LVU1243 + 3840 00a0 0723 movs r3, #7 + 3841 00a2 1193 str r3, [sp, #68] +1290:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); + 3842 .loc 1 1290 3 is_stmt 1 view .LVU1244 + 3843 00a4 094C ldr r4, .L191+8 + 3844 00a6 08A9 add r1, sp, #32 + 3845 00a8 2046 mov r0, r4 + 3846 00aa FFF7FEFF bl LL_SPI_Init + 3847 .LVL349: +1291:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); + 3848 .loc 1 1291 3 view .LVU1245 + 3849 .LBB443: + 3850 .LBI443: + 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 3851 .loc 4 426 22 view .LVU1246 + 3852 .LBB444: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3853 .loc 4 428 3 view .LVU1247 + 3854 00ae 6368 ldr r3, [r4, #4] + 3855 00b0 23F01003 bic r3, r3, #16 + 3856 00b4 6360 str r3, [r4, #4] + 3857 .LVL350: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3858 .loc 4 428 3 is_stmt 0 view .LVU1248 + 3859 .LBE444: + 3860 .LBE443: +1292:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ + ARM GAS /tmp/ccYgfTud.s page 228 + + + 3861 .loc 1 1292 3 is_stmt 1 view .LVU1249 + 3862 .LBB445: + 3863 .LBI445: + 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 3864 .loc 4 874 22 view .LVU1250 + 3865 .LBB446: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3866 .loc 4 876 3 view .LVU1251 + 3867 00b6 6368 ldr r3, [r4, #4] + 3868 00b8 23F00803 bic r3, r3, #8 + 3869 00bc 6360 str r3, [r4, #4] + 3870 .LVL351: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3871 .loc 4 876 3 is_stmt 0 view .LVU1252 + 3872 .LBE446: + 3873 .LBE445: +1297:Src/main.c **** + 3874 .loc 1 1297 1 view .LVU1253 + 3875 00be 12B0 add sp, sp, #72 + 3876 .LCFI37: + 3877 .cfi_def_cfa_offset 24 + 3878 @ sp needed + 3879 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 3880 .L192: + 3881 .align 2 + 3882 .L191: + 3883 00c4 00380240 .word 1073887232 + 3884 00c8 00140240 .word 1073878016 + 3885 00cc 00500140 .word 1073827840 + 3886 .cfi_endproc + 3887 .LFE1193: + 3889 .section .text.MX_SPI6_Init,"ax",%progbits + 3890 .align 1 + 3891 .syntax unified + 3892 .thumb + 3893 .thumb_func + 3895 MX_SPI6_Init: + 3896 .LFB1194: +1305:Src/main.c **** + 3897 .loc 1 1305 1 is_stmt 1 view -0 + 3898 .cfi_startproc + 3899 @ args = 0, pretend = 0, frame = 72 + 3900 @ frame_needed = 0, uses_anonymous_args = 0 + 3901 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 3902 .LCFI38: + 3903 .cfi_def_cfa_offset 24 + 3904 .cfi_offset 4, -24 + 3905 .cfi_offset 5, -20 + 3906 .cfi_offset 6, -16 + 3907 .cfi_offset 7, -12 + 3908 .cfi_offset 8, -8 + 3909 .cfi_offset 14, -4 + 3910 0004 92B0 sub sp, sp, #72 + 3911 .LCFI39: + 3912 .cfi_def_cfa_offset 96 +1311:Src/main.c **** + 3913 .loc 1 1311 3 view .LVU1255 + ARM GAS /tmp/ccYgfTud.s page 229 + + +1311:Src/main.c **** + 3914 .loc 1 1311 22 is_stmt 0 view .LVU1256 + 3915 0006 2822 movs r2, #40 + 3916 0008 0021 movs r1, #0 + 3917 000a 08A8 add r0, sp, #32 + 3918 000c FFF7FEFF bl memset + 3919 .LVL352: +1313:Src/main.c **** + 3920 .loc 1 1313 3 is_stmt 1 view .LVU1257 +1313:Src/main.c **** + 3921 .loc 1 1313 23 is_stmt 0 view .LVU1258 + 3922 0010 0024 movs r4, #0 + 3923 0012 0294 str r4, [sp, #8] + 3924 0014 0394 str r4, [sp, #12] + 3925 0016 0494 str r4, [sp, #16] + 3926 0018 0594 str r4, [sp, #20] + 3927 001a 0694 str r4, [sp, #24] + 3928 001c 0794 str r4, [sp, #28] +1316:Src/main.c **** + 3929 .loc 1 1316 3 is_stmt 1 view .LVU1259 + 3930 .LVL353: + 3931 .LBB447: + 3932 .LBI447: +1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 3933 .loc 3 1587 22 view .LVU1260 + 3934 .LBB448: +1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); + 3935 .loc 3 1589 3 view .LVU1261 +1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 3936 .loc 3 1590 3 view .LVU1262 + 3937 001e 294B ldr r3, .L195 + 3938 0020 5A6C ldr r2, [r3, #68] + 3939 0022 42F40012 orr r2, r2, #2097152 + 3940 0026 5A64 str r2, [r3, #68] +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3941 .loc 3 1592 3 view .LVU1263 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3942 .loc 3 1592 12 is_stmt 0 view .LVU1264 + 3943 0028 5A6C ldr r2, [r3, #68] + 3944 002a 02F40012 and r2, r2, #2097152 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3945 .loc 3 1592 10 view .LVU1265 + 3946 002e 0192 str r2, [sp, #4] + 3947 .loc 3 1593 3 is_stmt 1 view .LVU1266 + 3948 0030 019A ldr r2, [sp, #4] + 3949 .LVL354: + 3950 .loc 3 1593 3 is_stmt 0 view .LVU1267 + 3951 .LBE448: + 3952 .LBE447: +1318:Src/main.c **** /**SPI6 GPIO Configuration + 3953 .loc 1 1318 3 is_stmt 1 view .LVU1268 + 3954 .LBB449: + 3955 .LBI449: + 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 3956 .loc 3 309 22 view .LVU1269 + 3957 .LBB450: + 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); + ARM GAS /tmp/ccYgfTud.s page 230 + + + 3958 .loc 3 311 3 view .LVU1270 + 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 3959 .loc 3 312 3 view .LVU1271 + 3960 0032 1A6B ldr r2, [r3, #48] + 3961 0034 42F00102 orr r2, r2, #1 + 3962 0038 1A63 str r2, [r3, #48] + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3963 .loc 3 314 3 view .LVU1272 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3964 .loc 3 314 12 is_stmt 0 view .LVU1273 + 3965 003a 1B6B ldr r3, [r3, #48] + 3966 003c 03F00103 and r3, r3, #1 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 3967 .loc 3 314 10 view .LVU1274 + 3968 0040 0093 str r3, [sp] + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 3969 .loc 3 315 3 is_stmt 1 view .LVU1275 + 3970 0042 009B ldr r3, [sp] + 3971 .LVL355: + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 3972 .loc 3 315 3 is_stmt 0 view .LVU1276 + 3973 .LBE450: + 3974 .LBE449: +1323:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3975 .loc 1 1323 3 is_stmt 1 view .LVU1277 +1323:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3976 .loc 1 1323 23 is_stmt 0 view .LVU1278 + 3977 0044 2023 movs r3, #32 + 3978 0046 0293 str r3, [sp, #8] +1324:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3979 .loc 1 1324 3 is_stmt 1 view .LVU1279 +1324:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 3980 .loc 1 1324 24 is_stmt 0 view .LVU1280 + 3981 0048 0225 movs r5, #2 + 3982 004a 0395 str r5, [sp, #12] +1325:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3983 .loc 1 1325 3 is_stmt 1 view .LVU1281 +1325:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 3984 .loc 1 1325 25 is_stmt 0 view .LVU1282 + 3985 004c 4FF00308 mov r8, #3 + 3986 0050 CDF81080 str r8, [sp, #16] +1326:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 3987 .loc 1 1326 3 is_stmt 1 view .LVU1283 +1327:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 3988 .loc 1 1327 3 view .LVU1284 +1328:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 3989 .loc 1 1328 3 view .LVU1285 +1328:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 3990 .loc 1 1328 29 is_stmt 0 view .LVU1286 + 3991 0054 0827 movs r7, #8 + 3992 0056 0797 str r7, [sp, #28] +1329:Src/main.c **** + 3993 .loc 1 1329 3 is_stmt 1 view .LVU1287 + 3994 0058 1B4E ldr r6, .L195+4 + 3995 005a 0DEB0701 add r1, sp, r7 + 3996 005e 3046 mov r0, r6 + 3997 0060 FFF7FEFF bl LL_GPIO_Init + ARM GAS /tmp/ccYgfTud.s page 231 + + + 3998 .LVL356: +1331:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 3999 .loc 1 1331 3 view .LVU1288 +1331:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 4000 .loc 1 1331 23 is_stmt 0 view .LVU1289 + 4001 0064 8023 movs r3, #128 + 4002 0066 0293 str r3, [sp, #8] +1332:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4003 .loc 1 1332 3 is_stmt 1 view .LVU1290 +1332:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 4004 .loc 1 1332 24 is_stmt 0 view .LVU1291 + 4005 0068 0395 str r5, [sp, #12] +1333:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4006 .loc 1 1333 3 is_stmt 1 view .LVU1292 +1333:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 4007 .loc 1 1333 25 is_stmt 0 view .LVU1293 + 4008 006a CDF81080 str r8, [sp, #16] +1334:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4009 .loc 1 1334 3 is_stmt 1 view .LVU1294 +1334:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 4010 .loc 1 1334 30 is_stmt 0 view .LVU1295 + 4011 006e 0594 str r4, [sp, #20] +1335:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 4012 .loc 1 1335 3 is_stmt 1 view .LVU1296 +1335:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 4013 .loc 1 1335 24 is_stmt 0 view .LVU1297 + 4014 0070 0694 str r4, [sp, #24] +1336:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 4015 .loc 1 1336 3 is_stmt 1 view .LVU1298 +1336:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 4016 .loc 1 1336 29 is_stmt 0 view .LVU1299 + 4017 0072 0797 str r7, [sp, #28] +1337:Src/main.c **** + 4018 .loc 1 1337 3 is_stmt 1 view .LVU1300 + 4019 0074 0DEB0701 add r1, sp, r7 + 4020 0078 3046 mov r0, r6 + 4021 007a FFF7FEFF bl LL_GPIO_Init + 4022 .LVL357: +1343:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4023 .loc 1 1343 3 view .LVU1301 +1343:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 4024 .loc 1 1343 36 is_stmt 0 view .LVU1302 + 4025 007e 0894 str r4, [sp, #32] +1344:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4026 .loc 1 1344 3 is_stmt 1 view .LVU1303 +1344:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 4027 .loc 1 1344 23 is_stmt 0 view .LVU1304 + 4028 0080 4FF48273 mov r3, #260 + 4029 0084 0993 str r3, [sp, #36] +1345:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 4030 .loc 1 1345 3 is_stmt 1 view .LVU1305 +1345:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 4031 .loc 1 1345 28 is_stmt 0 view .LVU1306 + 4032 0086 4FF47063 mov r3, #3840 + 4033 008a 0A93 str r3, [sp, #40] +1346:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 4034 .loc 1 1346 3 is_stmt 1 view .LVU1307 + ARM GAS /tmp/ccYgfTud.s page 232 + + +1346:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 4035 .loc 1 1346 32 is_stmt 0 view .LVU1308 + 4036 008c 0B95 str r5, [sp, #44] +1347:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4037 .loc 1 1347 3 is_stmt 1 view .LVU1309 +1347:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 4038 .loc 1 1347 29 is_stmt 0 view .LVU1310 + 4039 008e 0123 movs r3, #1 + 4040 0090 0C93 str r3, [sp, #48] +1348:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 4041 .loc 1 1348 3 is_stmt 1 view .LVU1311 +1348:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 4042 .loc 1 1348 22 is_stmt 0 view .LVU1312 + 4043 0092 4FF40073 mov r3, #512 + 4044 0096 0D93 str r3, [sp, #52] +1349:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4045 .loc 1 1349 3 is_stmt 1 view .LVU1313 +1349:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 4046 .loc 1 1349 27 is_stmt 0 view .LVU1314 + 4047 0098 1823 movs r3, #24 + 4048 009a 0E93 str r3, [sp, #56] +1350:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4049 .loc 1 1350 3 is_stmt 1 view .LVU1315 +1350:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 4050 .loc 1 1350 27 is_stmt 0 view .LVU1316 + 4051 009c 0F94 str r4, [sp, #60] +1351:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4052 .loc 1 1351 3 is_stmt 1 view .LVU1317 +1351:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 4053 .loc 1 1351 33 is_stmt 0 view .LVU1318 + 4054 009e 1094 str r4, [sp, #64] +1352:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 4055 .loc 1 1352 3 is_stmt 1 view .LVU1319 +1352:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 4056 .loc 1 1352 26 is_stmt 0 view .LVU1320 + 4057 00a0 0723 movs r3, #7 + 4058 00a2 1193 str r3, [sp, #68] +1353:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); + 4059 .loc 1 1353 3 is_stmt 1 view .LVU1321 + 4060 00a4 094C ldr r4, .L195+8 + 4061 00a6 08A9 add r1, sp, #32 + 4062 00a8 2046 mov r0, r4 + 4063 00aa FFF7FEFF bl LL_SPI_Init + 4064 .LVL358: +1354:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); + 4065 .loc 1 1354 3 view .LVU1322 + 4066 .LBB451: + 4067 .LBI451: + 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 4068 .loc 4 426 22 view .LVU1323 + 4069 .LBB452: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4070 .loc 4 428 3 view .LVU1324 + 4071 00ae 6368 ldr r3, [r4, #4] + 4072 00b0 23F01003 bic r3, r3, #16 + 4073 00b4 6360 str r3, [r4, #4] + 4074 .LVL359: + ARM GAS /tmp/ccYgfTud.s page 233 + + + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4075 .loc 4 428 3 is_stmt 0 view .LVU1325 + 4076 .LBE452: + 4077 .LBE451: +1355:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ + 4078 .loc 1 1355 3 is_stmt 1 view .LVU1326 + 4079 .LBB453: + 4080 .LBI453: + 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 4081 .loc 4 874 22 view .LVU1327 + 4082 .LBB454: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4083 .loc 4 876 3 view .LVU1328 + 4084 00b6 6368 ldr r3, [r4, #4] + 4085 00b8 23F00803 bic r3, r3, #8 + 4086 00bc 6360 str r3, [r4, #4] + 4087 .LVL360: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4088 .loc 4 876 3 is_stmt 0 view .LVU1329 + 4089 .LBE454: + 4090 .LBE453: +1360:Src/main.c **** + 4091 .loc 1 1360 1 view .LVU1330 + 4092 00be 12B0 add sp, sp, #72 + 4093 .LCFI40: + 4094 .cfi_def_cfa_offset 24 + 4095 @ sp needed + 4096 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 4097 .L196: + 4098 .align 2 + 4099 .L195: + 4100 00c4 00380240 .word 1073887232 + 4101 00c8 00000240 .word 1073872896 + 4102 00cc 00540140 .word 1073828864 + 4103 .cfi_endproc + 4104 .LFE1194: + 4106 .section .text.MX_TIM2_Init,"ax",%progbits + 4107 .align 1 + 4108 .syntax unified + 4109 .thumb + 4110 .thumb_func + 4112 MX_TIM2_Init: + 4113 .LFB1195: +1368:Src/main.c **** + 4114 .loc 1 1368 1 is_stmt 1 view -0 + 4115 .cfi_startproc + 4116 @ args = 0, pretend = 0, frame = 24 + 4117 @ frame_needed = 0, uses_anonymous_args = 0 + 4118 0000 10B5 push {r4, lr} + 4119 .LCFI41: + 4120 .cfi_def_cfa_offset 8 + 4121 .cfi_offset 4, -8 + 4122 .cfi_offset 14, -4 + 4123 0002 86B0 sub sp, sp, #24 + 4124 .LCFI42: + 4125 .cfi_def_cfa_offset 32 +1374:Src/main.c **** + ARM GAS /tmp/ccYgfTud.s page 234 + + + 4126 .loc 1 1374 3 view .LVU1332 +1374:Src/main.c **** + 4127 .loc 1 1374 22 is_stmt 0 view .LVU1333 + 4128 0004 0024 movs r4, #0 + 4129 0006 0194 str r4, [sp, #4] + 4130 0008 0294 str r4, [sp, #8] + 4131 000a 0394 str r4, [sp, #12] + 4132 000c 0494 str r4, [sp, #16] + 4133 000e 0594 str r4, [sp, #20] +1377:Src/main.c **** + 4134 .loc 1 1377 3 is_stmt 1 view .LVU1334 + 4135 .LVL361: + 4136 .LBB455: + 4137 .LBI455: +1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 4138 .loc 3 1071 22 view .LVU1335 + 4139 .LBB456: +1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); + 4140 .loc 3 1073 3 view .LVU1336 +1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 4141 .loc 3 1074 3 view .LVU1337 + 4142 0010 1D4B ldr r3, .L199 + 4143 0012 1A6C ldr r2, [r3, #64] + 4144 0014 42F00102 orr r2, r2, #1 + 4145 0018 1A64 str r2, [r3, #64] +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4146 .loc 3 1076 3 view .LVU1338 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4147 .loc 3 1076 12 is_stmt 0 view .LVU1339 + 4148 001a 1B6C ldr r3, [r3, #64] + 4149 001c 03F00103 and r3, r3, #1 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 4150 .loc 3 1076 10 view .LVU1340 + 4151 0020 0093 str r3, [sp] +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 4152 .loc 3 1077 3 is_stmt 1 view .LVU1341 + 4153 0022 009B ldr r3, [sp] + 4154 .LVL362: +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 4155 .loc 3 1077 3 is_stmt 0 view .LVU1342 + 4156 .LBE456: + 4157 .LBE455: +1380:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 4158 .loc 1 1380 3 is_stmt 1 view .LVU1343 + 4159 .LBB457: + 4160 .LBI457: +1884:Drivers/CMSIS/Include/core_cm7.h **** { + 4161 .loc 2 1884 26 view .LVU1344 + 4162 .LBB458: +1886:Drivers/CMSIS/Include/core_cm7.h **** } + 4163 .loc 2 1886 3 view .LVU1345 +1886:Drivers/CMSIS/Include/core_cm7.h **** } + 4164 .loc 2 1886 26 is_stmt 0 view .LVU1346 + 4165 0024 194B ldr r3, .L199+4 + 4166 0026 D868 ldr r0, [r3, #12] + 4167 .LBE458: + 4168 .LBE457: + ARM GAS /tmp/ccYgfTud.s page 235 + + +1380:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 4169 .loc 1 1380 3 discriminator 1 view .LVU1347 + 4170 0028 2246 mov r2, r4 + 4171 002a 2146 mov r1, r4 + 4172 002c C0F30220 ubfx r0, r0, #8, #3 + 4173 0030 FFF7FEFF bl NVIC_EncodePriority + 4174 .LVL363: + 4175 .LBB459: + 4176 .LBI459: +2024:Drivers/CMSIS/Include/core_cm7.h **** { + 4177 .loc 2 2024 22 is_stmt 1 view .LVU1348 + 4178 .LBB460: +2026:Drivers/CMSIS/Include/core_cm7.h **** { + 4179 .loc 2 2026 3 view .LVU1349 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 4180 .loc 2 2028 5 view .LVU1350 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 4181 .loc 2 2028 49 is_stmt 0 view .LVU1351 + 4182 0034 0001 lsls r0, r0, #4 + 4183 .LVL364: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 4184 .loc 2 2028 49 view .LVU1352 + 4185 0036 C0B2 uxtb r0, r0 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 4186 .loc 2 2028 47 view .LVU1353 + 4187 0038 154B ldr r3, .L199+8 + 4188 003a 83F81C03 strb r0, [r3, #796] + 4189 .LVL365: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 4190 .loc 2 2028 47 view .LVU1354 + 4191 .LBE460: + 4192 .LBE459: +1381:Src/main.c **** + 4193 .loc 1 1381 3 is_stmt 1 view .LVU1355 + 4194 .LBB461: + 4195 .LBI461: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 3067 .loc 2 1896 22 view .LVU1018 - 3068 .LBB389: + 4196 .loc 2 1896 22 view .LVU1356 + 4197 .LBB462: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 3069 .loc 2 1898 3 view .LVU1019 + 4198 .loc 2 1898 3 view .LVU1357 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3070 .loc 2 1900 5 view .LVU1020 + 4199 .loc 2 1900 5 view .LVU1358 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3071 .loc 2 1900 43 is_stmt 0 view .LVU1021 - 3072 003e 4FF08052 mov r2, #268435456 - 3073 0042 1A60 str r2, [r3] - 3074 .LVL232: + 4200 .loc 2 1900 43 is_stmt 0 view .LVU1359 + 4201 003e 4FF08052 mov r2, #268435456 + 4202 0042 1A60 str r2, [r3] + 4203 .LVL366: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3075 .loc 2 1900 43 view .LVU1022 - 3076 .LBE389: - 3077 .LBE388: -1255:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3078 .loc 1 1255 3 is_stmt 1 view .LVU1023 -1255:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3079 .loc 1 1255 28 is_stmt 0 view .LVU1024 - 3080 0044 4FF47A73 mov r3, #1000 - 3081 0048 ADF80430 strh r3, [sp, #4] @ movhi -1256:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 3082 .loc 1 1256 3 is_stmt 1 view .LVU1025 -1256:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 3083 .loc 1 1256 30 is_stmt 0 view .LVU1026 - 3084 004c 0294 str r4, [sp, #8] -1257:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3085 .loc 1 1257 3 is_stmt 1 view .LVU1027 -1257:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3086 .loc 1 1257 29 is_stmt 0 view .LVU1028 - ARM GAS /tmp/ccO46DoU.s page 204 + 4204 .loc 2 1900 43 view .LVU1360 + 4205 .LBE462: + 4206 .LBE461: +1386:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 4207 .loc 1 1386 3 is_stmt 1 view .LVU1361 +1386:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 4208 .loc 1 1386 28 is_stmt 0 view .LVU1362 + 4209 0044 4FF47A73 mov r3, #1000 + ARM GAS /tmp/ccYgfTud.s page 236 - 3087 004e 114B ldr r3, .L115+12 - 3088 0050 0393 str r3, [sp, #12] -1258:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 3089 .loc 1 1258 3 is_stmt 1 view .LVU1029 -1258:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 3090 .loc 1 1258 32 is_stmt 0 view .LVU1030 - 3091 0052 0494 str r4, [sp, #16] -1259:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); - 3092 .loc 1 1259 3 is_stmt 1 view .LVU1031 - 3093 0054 01A9 add r1, sp, #4 - 3094 0056 4FF08040 mov r0, #1073741824 - 3095 005a FFF7FEFF bl LL_TIM_Init - 3096 .LVL233: -1260:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); - 3097 .loc 1 1260 3 view .LVU1032 - 3098 .LBB390: - 3099 .LBI390: - 3100 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" + 4210 0048 ADF80430 strh r3, [sp, #4] @ movhi +1387:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 4211 .loc 1 1387 3 is_stmt 1 view .LVU1363 +1387:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 4212 .loc 1 1387 30 is_stmt 0 view .LVU1364 + 4213 004c 0294 str r4, [sp, #8] +1388:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 4214 .loc 1 1388 3 is_stmt 1 view .LVU1365 +1388:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 4215 .loc 1 1388 29 is_stmt 0 view .LVU1366 + 4216 004e 114B ldr r3, .L199+12 + 4217 0050 0393 str r3, [sp, #12] +1389:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 4218 .loc 1 1389 3 is_stmt 1 view .LVU1367 +1389:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 4219 .loc 1 1389 32 is_stmt 0 view .LVU1368 + 4220 0052 0494 str r4, [sp, #16] +1390:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); + 4221 .loc 1 1390 3 is_stmt 1 view .LVU1369 + 4222 0054 01A9 add r1, sp, #4 + 4223 0056 4FF08040 mov r0, #1073741824 + 4224 005a FFF7FEFF bl LL_TIM_Init + 4225 .LVL367: +1391:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); + 4226 .loc 1 1391 3 view .LVU1370 + 4227 .LBB463: + 4228 .LBI463: + 4229 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @file stm32f7xx_ll_tim.h @@ -12228,6 +14158,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Includes ------------------------------------------------------------------*/ 28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #include "stm32f7xx.h" 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccYgfTud.s page 237 + + 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @addtogroup STM32F7xx_LL_Driver 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -12238,9 +14171,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccO46DoU.s page 205 - - 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private types -------------------------------------------------------------*/ 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Variables TIM Private Variables @@ -12288,6 +14218,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_CCxP[] = 85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: CC1P */ + ARM GAS /tmp/ccYgfTud.s page 238 + + 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2U, /* 1: CC1NP */ 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4U, /* 2: CC2P */ 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 6U, /* 3: CC2NP */ @@ -12298,9 +14231,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 20U /* 8: CC6P */ 95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }; 96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccO46DoU.s page 206 - - 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OISx[] = 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: OIS1 */ @@ -12348,6 +14278,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_2 ((uint8_t)0x80) 142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_3 ((uint8_t)0xC0) 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_4 ((uint8_t)0xE0) + ARM GAS /tmp/ccYgfTud.s page 239 + + 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -12358,9 +14291,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Macros TIM Private Macros 152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccO46DoU.s page 207 - - 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @brief Convert channel id into channel index. 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CHANNEL__ This parameter can be one of the following values: 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 @@ -12408,6 +14338,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccYgfTud.s page 240 + + 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Time Base configuration structure definition. 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct @@ -12418,9 +14351,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetPrescaler().*/ 210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccO46DoU.s page 208 - - 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t CounterMode; /*!< Specifies the counter mode. 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE. 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12468,6 +14398,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetMode().*/ 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccYgfTud.s page 241 + + 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCState; /*!< Specifies the TIM Output Compare state. 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE. 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12478,9 +14411,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE. 266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functions - ARM GAS /tmp/ccO46DoU.s page 209 - - 268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Re @@ -12528,6 +14458,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccYgfTud.s page 242 + + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICActiveInput; /*!< Specifies the input. 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12538,9 +14471,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function - ARM GAS /tmp/ccO46DoU.s page 210 - - 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/ 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICFilter; /*!< Specifies the input capture filter. @@ -12588,6 +14518,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input. 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. + ARM GAS /tmp/ccYgfTud.s page 243 + + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ @@ -12598,9 +14531,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccO46DoU.s page 211 - - 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value. 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12648,6 +14578,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data = 0x0000 and Ma 427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function + ARM GAS /tmp/ccYgfTud.s page 244 + + 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetCompareCH2().*/ 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_HALLSENSOR_InitTypeDef; 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12658,9 +14591,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode. 438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OSSR - ARM GAS /tmp/ccO46DoU.s page 212 - - 439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetOffStates() @@ -12708,6 +14638,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK() 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccYgfTud.s page 245 + + 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12718,9 +14651,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK() 494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve - ARM GAS /tmp/ccO46DoU.s page 213 - - 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2State; /*!< Specifies whether the TIM Break2 input is enabled or not. @@ -12768,6 +14698,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Exported constants --------------------------------------------------------*/ 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Constants TIM Exported Constants 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ + ARM GAS /tmp/ccYgfTud.s page 246 + + 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines @@ -12778,9 +14711,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC1IF TIM_SR_CC1IF /*!< Capture/compare 1 interrup 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC2IF TIM_SR_CC2IF /*!< Capture/compare 2 interrup 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC3IF TIM_SR_CC3IF /*!< Capture/compare 3 interrup - ARM GAS /tmp/ccO46DoU.s page 214 - - 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4IF TIM_SR_CC4IF /*!< Capture/compare 4 interrup 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC5IF TIM_SR_CC5IF /*!< Capture/compare 5 interrup 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC6IF TIM_SR_CC6IF /*!< Capture/compare 6 interrup @@ -12828,6 +14758,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_IT IT Defines 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions. + ARM GAS /tmp/ccYgfTud.s page 247 + + 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ @@ -12838,9 +14771,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_COMIE TIM_DIER_COMIE /*!< COM interrupt enable */ 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_TIE TIM_DIER_TIE /*!< Trigger interrupt enable * 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_BIE TIM_DIER_BIE /*!< Break interrupt enable */ - ARM GAS /tmp/ccO46DoU.s page 215 - - 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -12888,6 +14818,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERDIRECTION Counter Direction 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccYgfTud.s page 248 + + 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERDIRECTION_UP 0x00000000U /*!< Timer counter counts up */ 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERDIRECTION_DOWN TIM_CR1_DIR /*!< Timer counter counts down 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -12898,9 +14831,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCUPDATESOURCE_COMG_ONLY 0x00000000U /*!< Capture/compare control bi - ARM GAS /tmp/ccO46DoU.s page 216 - - 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI TIM_CR2_CCUS /*!< Capture/compare control bi 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -12948,6 +14878,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCSTATE_DISABLE 0x00000000U /*!< OCx is not active */ 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on + ARM GAS /tmp/ccYgfTud.s page 249 + + 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -12958,9 +14891,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASSYMETRIC_PWM1 LL_TIM_OCMODE_ASYMMETRIC_PWM1 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASSYMETRIC_PWM2 LL_TIM_OCMODE_ASYMMETRIC_PWM2 - ARM GAS /tmp/ccO46DoU.s page 217 - - 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @endcond 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13008,6 +14938,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_GROUPCH5_NONE 0x00000000U /*!< No effect of OC5REF on OC + ARM GAS /tmp/ccYgfTud.s page 250 + + 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_GROUPCH5_OC1REFC TIM_CCR5_GC5C1 /*!< OC1REFC is the logical AN 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_GROUPCH5_OC2REFC TIM_CCR5_GC5C2 /*!< OC2REFC is the logical AN 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_GROUPCH5_OC3REFC TIM_CCR5_GC5C3 /*!< OC3REFC is the logical AN @@ -13018,9 +14951,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ACTIVEINPUT Active Input Selection 779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccO46DoU.s page 218 - - 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ACTIVEINPUT_DIRECTTI (TIM_CCMR1_CC1S_0 << 16U) /*!< ICx is mapped on TIx 782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ACTIVEINPUT_INDIRECTTI (TIM_CCMR1_CC1S_1 << 16U) /*!< ICx is mapped on TIy 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ACTIVEINPUT_TRC (TIM_CCMR1_CC1S << 16U) /*!< ICx is mapped on TRC @@ -13068,6 +14998,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_POLARITY_RISING 0x00000000U /*!< The circuit is 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_POLARITY_FALLING TIM_CCER_CC1P /*!< The circuit is 827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_POLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< The circuit is + ARM GAS /tmp/ccYgfTud.s page 251 + + 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13078,9 +15011,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKSOURCE_INTERNAL 0x00000000U 836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKSOURCE_EXT_MODE1 (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0) 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKSOURCE_EXT_MODE2 TIM_SMCR_ECE - ARM GAS /tmp/ccO46DoU.s page 219 - - 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13128,6 +15058,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO2_OC4_RISING_OC6_RISING (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2) 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO2_OC4_RISING_OC6_FALLING (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0) 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO2_OC5_RISING_OC6_RISING (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1) + ARM GAS /tmp/ccYgfTud.s page 252 + + 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO2_OC5_RISING_OC6_FALLING (TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -13138,9 +15071,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SLAVEMODE_DISABLED 0x00000000U /*!< Slave mode 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SLAVEMODE_RESET TIM_SMCR_SMS_2 /*!< Reset Mode - ARM GAS /tmp/ccO46DoU.s page 220 - - 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SLAVEMODE_GATED (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0) /*!< Gated Mode 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SLAVEMODE_TRIGGER (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1) /*!< Trigger Mod 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER TIM_SMCR_SMS_3 /*!< Combined re @@ -13188,6 +15118,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV1 0x00000000U 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV1_N2 TIM_SMCR_ETF_0 + ARM GAS /tmp/ccYgfTud.s page 253 + + 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV1_N4 TIM_SMCR_ETF_1 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV1_N8 (TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV2_N6 TIM_SMCR_ETF_2 @@ -13198,9 +15131,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV8_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_0) 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV16_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1) 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV16_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_1 | TIM_SMCR_ETF_0) - ARM GAS /tmp/ccO46DoU.s page 221 - - 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV16_N8 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2) 953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV32_N5 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_0) 954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_FILTER_FDIV32_N6 (TIM_SMCR_ETF_3 | TIM_SMCR_ETF_2 | TIM_SMCR_ETF_1) @@ -13248,6 +15178,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_POLARITY_LOW 0x00000000U /*!< Break input BRK2 is act 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_POLARITY_HIGH TIM_BDTR_BK2P /*!< Break input BRK2 is act 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccYgfTud.s page 254 + + 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -13258,9 +15191,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV1_N2 0x00100000U /*!< fSAMPLING=fCK_INT, N=2 */ 1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV1_N4 0x00200000U /*!< fSAMPLING=fCK_INT, N=4 */ 1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV1_N8 0x00300000U /*!< fSAMPLING=fCK_INT, N=8 */ - ARM GAS /tmp/ccO46DoU.s page 222 - - 1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV2_N6 0x00400000U /*!< fSAMPLING=fDTS/2, N=6 */ 1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV2_N8 0x00500000U /*!< fSAMPLING=fDTS/2, N=8 */ 1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV4_N6 0x00600000U /*!< fSAMPLING=fDTS/4, N=6 */ @@ -13308,6 +15238,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BKIN_SOURCE BKIN SOURCE 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccYgfTud.s page 255 + + 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BKIN_SOURCE_BKIN TIM1_AF1_BKINE /*!< BKIN input from AF controll 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BKIN_SOURCE_DF1BK TIM1_AF1_BKDF1BKE /*!< internal signal: DFSDM1 bre 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -13318,9 +15251,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BKIN_POLARITY_LOW TIM1_AF1_BKINP /*!< BRK BKIN input is acti - ARM GAS /tmp/ccO46DoU.s page 223 - - 1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BKIN_POLARITY_HIGH 0x00000000U /*!< BRK BKIN input is acti 1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -13368,6 +15298,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_3TRANSFERS TIM_DCR_DBL_1 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_4TRANSFERS (TIM_DCR_DBL_1 | TIM_DCR_DBL_0) 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_5TRANSFERS TIM_DCR_DBL_2 + ARM GAS /tmp/ccYgfTud.s page 256 + + 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_6TRANSFERS (TIM_DCR_DBL_2 | TIM_DCR_DBL_0) 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_7TRANSFERS (TIM_DCR_DBL_2 | TIM_DCR_DBL_1) 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_8TRANSFERS (TIM_DCR_DBL_2 | TIM_DCR_DBL_1 | TIM_DCR_DBL_0) @@ -13378,9 +15311,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_13TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_2) 1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_14TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_0) 1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_15TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_1) - ARM GAS /tmp/ccO46DoU.s page 224 - - 1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_16TRANSFERS (TIM_DCR_DBL_3 | TIM_DCR_DBL_2 | TIM_DCR_DBL_1 | TIM 1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_17TRANSFERS TIM_DCR_DBL_4 1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_LENGTH_18TRANSFERS (TIM_DCR_DBL_4 | TIM_DCR_DBL_0) @@ -13428,6 +15358,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Exported macro ------------------------------------------------------------*/ + ARM GAS /tmp/ccYgfTud.s page 257 + + 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Macros TIM Exported Macros 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13438,9 +15371,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Write a value in TIM register. 1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __INSTANCE__ TIM Instance - ARM GAS /tmp/ccO46DoU.s page 225 - - 1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __REG__ Register to be written 1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __VALUE__ Value to be written in the register 1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -13488,6 +15418,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__C 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMC + ARM GAS /tmp/ccYgfTud.s page 258 + + 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__ 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMC @@ -13498,9 +15431,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the prescaler value to achieve the required counter clock freq 1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000); 1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) - ARM GAS /tmp/ccO46DoU.s page 226 - - 1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CNTCLK__ counter clock frequency (in Hz) 1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Prescaler value (between Min_Data=0 and Max_Data=65535) 1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13548,6 +15478,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro retrieving the ratio of the input capture prescaler 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ()); + ARM GAS /tmp/ccYgfTud.s page 259 + + 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __ICPSC__ This parameter can be one of the following values: 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2 @@ -13558,9 +15491,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \ 1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos))) 1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccO46DoU.s page 227 - - 1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -13608,6 +15538,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccYgfTud.s page 260 + + 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable update event generation. 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -13618,9 +15551,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); 1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccO46DoU.s page 228 - - 1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update event generation. 1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent @@ -13668,6 +15598,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual event update source 1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 URS LL_TIM_GetUpdateSource 1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccYgfTud.s page 261 + + 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_REGULAR 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_COUNTER @@ -13678,9 +15611,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccO46DoU.s page 229 - - 1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set one pulse mode (one shot v.s. repetitive). 1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_SetOnePulseMode 1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -13728,6 +15658,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode) 1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccYgfTud.s page 262 + + 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode); 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -13738,9 +15671,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * by a timer instance. 1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetCounterMode\n 1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR1 CMS LL_TIM_GetCounterMode - ARM GAS /tmp/ccO46DoU.s page 230 - - 1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_UP @@ -13781,26 +15711,26 @@ ARM GAS /tmp/ccO46DoU.s page 1 1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx) - 3101 .loc 5 1504 22 view .LVU1033 - 3102 .LBB391: + 4230 .loc 5 1504 22 view .LVU1371 + 4231 .LBB464: 1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE); - 3103 .loc 5 1506 3 view .LVU1034 - 3104 005e 4FF08043 mov r3, #1073741824 - 3105 0062 1A68 ldr r2, [r3] - 3106 0064 22F08002 bic r2, r2, #128 - 3107 0068 1A60 str r2, [r3] - 3108 .LVL234: - 3109 .loc 5 1506 3 is_stmt 0 view .LVU1035 - 3110 .LBE391: - 3111 .LBE390: -1261:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); - 3112 .loc 1 1261 3 is_stmt 1 view .LVU1036 - 3113 .LBB392: - 3114 .LBI392: - ARM GAS /tmp/ccO46DoU.s page 231 + 4232 .loc 5 1506 3 view .LVU1372 + 4233 005e 4FF08043 mov r3, #1073741824 + 4234 0062 1A68 ldr r2, [r3] + ARM GAS /tmp/ccYgfTud.s page 263 + 4235 0064 22F08002 bic r2, r2, #128 + 4236 0068 1A60 str r2, [r3] + 4237 .LVL368: + 4238 .loc 5 1506 3 is_stmt 0 view .LVU1373 + 4239 .LBE464: + 4240 .LBE463: +1392:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); + 4241 .loc 1 1392 3 is_stmt 1 view .LVU1374 + 4242 .LBB465: + 4243 .LBI465: 1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -13848,6 +15778,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx) 1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccYgfTud.s page 264 + + 1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD)); 1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -13858,9 +15791,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_SetCounter 1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF) - ARM GAS /tmp/ccO46DoU.s page 232 - - 1564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter) @@ -13908,6 +15838,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler) 1609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->PSC, Prescaler); + ARM GAS /tmp/ccYgfTud.s page 265 + + 1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -13918,9 +15851,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx) 1620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccO46DoU.s page 233 - - 1621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->PSC)); 1622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -13968,6 +15898,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->RCR, RepetitionCounter); 1666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccYgfTud.s page 266 + + 1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the repetition counter value. 1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check @@ -13978,9 +15911,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx) 1677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccO46DoU.s page 234 - - 1678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->RCR)); 1679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -14028,6 +15958,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the capture/compare control bits (CCxE, CCxNE and OCxM) preload. 1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note CCxE, CCxNE and OCxM bits are preloaded, after having been written, + ARM GAS /tmp/ccYgfTud.s page 267 + + 1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * they are updated only when a commutation event (COM) occurs. 1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Only on channels that have a complementary output. 1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check @@ -14038,9 +15971,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx) 1734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccO46DoU.s page 235 - - 1735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_CCPC); 1736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -14088,6 +16018,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger of the capture/compare DMA request. 1780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger 1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccYgfTud.s page 268 + + 1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMAReqTrigger This parameter can be one of the following values: 1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_CC 1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE @@ -14098,9 +16031,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger); 1790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccO46DoU.s page 236 - - 1792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual trigger of the capture/compare DMA request. 1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger @@ -14148,6 +16078,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N + ARM GAS /tmp/ccYgfTud.s page 269 + + 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 @@ -14158,9 +16091,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels) - ARM GAS /tmp/ccO46DoU.s page 237 - - 1849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CCER, Channels); 1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -14208,6 +16138,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 + ARM GAS /tmp/ccYgfTud.s page 270 + + 1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N @@ -14218,9 +16151,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 1904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 1905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccO46DoU.s page 238 - - 1906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels) 1907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL); @@ -14268,6 +16198,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura 1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccYgfTud.s page 271 + + 1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); @@ -14278,9 +16211,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccO46DoU.s page 239 - - 1963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Define the behavior of the output reference signal OCxREF from which 1964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * OCx and OCxN (when relevant) are derived. 1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n @@ -14328,6 +16258,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_GetMode\n 2008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4M LL_TIM_OC_GetMode\n 2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5M LL_TIM_OC_GetMode\n + ARM GAS /tmp/ccYgfTud.s page 272 + + 2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6M LL_TIM_OC_GetMode 2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: @@ -14338,9 +16271,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccO46DoU.s page 240 - - 2020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN 2021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE 2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE @@ -14388,6 +16318,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values: 2065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH 2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW + ARM GAS /tmp/ccYgfTud.s page 273 + + 2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity) @@ -14398,9 +16331,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the polarity of an output channel. - ARM GAS /tmp/ccO46DoU.s page 241 - - 2077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n 2078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_GetPolarity\n 2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_GetPolarity\n @@ -14448,6 +16378,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_SetIdleState 2122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: + ARM GAS /tmp/ccYgfTud.s page 274 + + 2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 @@ -14458,9 +16391,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param IdleState This parameter can be one of the following values: - ARM GAS /tmp/ccO46DoU.s page 242 - - 2134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW 2135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_HIGH 2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -14508,6 +16438,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Acts only if the channel is configured in PWM1 or PWM2 mode. 2179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n 2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_EnableFast\n + ARM GAS /tmp/ccYgfTud.s page 275 + + 2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_EnableFast\n 2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_EnableFast\n 2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_EnableFast\n @@ -14518,9 +16451,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 - ARM GAS /tmp/ccO46DoU.s page 243 - - 2191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -14568,6 +16498,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_IsEnabledFast\n 2236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6FE LL_TIM_OC_IsEnabledFast 2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccYgfTud.s page 276 + + 2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 @@ -14578,9 +16511,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel) - ARM GAS /tmp/ccO46DoU.s page 244 - - 2248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC @@ -14628,6 +16558,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 + ARM GAS /tmp/ccYgfTud.s page 277 + + 2295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -14638,9 +16571,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); 2303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccO46DoU.s page 245 - - 2305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channe 2307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n @@ -14688,6 +16618,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccYgfTud.s page 278 + + 2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel) 2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); @@ -14698,9 +16631,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable clearing the output channel on an external event. 2361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether - ARM GAS /tmp/ccO46DoU.s page 246 - - 2362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event. 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_DisableClear\n @@ -14748,6 +16678,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel) + ARM GAS /tmp/ccYgfTud.s page 279 + + 2409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC @@ -14758,9 +16691,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal an 2418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the Ocx and OCxN signals). - ARM GAS /tmp/ccO46DoU.s page 247 - - 2419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * dead-time insertion feature is supported by a timer instance. 2421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter @@ -14808,6 +16738,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR2, CompareValue); 2464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccYgfTud.s page 280 + + 2466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 3 (TIMx_CCR3). 2468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF. @@ -14818,9 +16751,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3 2474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 - ARM GAS /tmp/ccO46DoU.s page 248 - - 2476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue) @@ -14868,6 +16798,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccYgfTud.s page 281 + + 2523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue) 2524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR6, CompareValue); @@ -14878,9 +16811,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF 2531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 2532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. - ARM GAS /tmp/ccO46DoU.s page 249 - - 2533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not 2534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 1 is supported by a timer instance. 2535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1 @@ -14928,6 +16858,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR4) set for output channel 4. 2578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF 2579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check + ARM GAS /tmp/ccYgfTud.s page 282 + + 2580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 2581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not 2582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance. @@ -14938,9 +16871,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx) 2588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR4)); - ARM GAS /tmp/ccO46DoU.s page 250 - - 2590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -14988,6 +16918,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5); 2636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccYgfTud.s page 283 + + 2637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -14998,9 +16931,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure input channel. - ARM GAS /tmp/ccO46DoU.s page 251 - - 2647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n 2648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC1PSC LL_TIM_IC_Config\n 2649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC1F LL_TIM_IC_Config\n @@ -15048,6 +16978,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the active input. 2693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n + ARM GAS /tmp/ccYgfTud.s page 284 + + 2694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_SetActiveInput\n 2695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_SetActiveInput\n 2696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_SetActiveInput @@ -15058,9 +16991,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICActiveInput This parameter can be one of the following values: - ARM GAS /tmp/ccO46DoU.s page 252 - - 2704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI 2705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI 2706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC @@ -15108,6 +17038,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 + ARM GAS /tmp/ccYgfTud.s page 285 + + 2751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICPrescaler This parameter can be one of the following values: 2753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 @@ -15118,9 +17051,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal 2760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccO46DoU.s page 253 - - 2761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 2763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT @@ -15168,6 +17098,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 2806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4 2807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8 + ARM GAS /tmp/ccYgfTud.s page 286 + + 2808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6 2809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8 2810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6 @@ -15178,9 +17111,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6 2816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8 2817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5 - ARM GAS /tmp/ccO46DoU.s page 254 - - 2818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6 2819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 2820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -15228,6 +17158,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 2863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChann 2864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccYgfTud.s page 287 + + 2865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the input channel polarity. @@ -15238,9 +17171,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_SetPolarity\n 2873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_SetPolarity\n 2874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_SetPolarity\n - ARM GAS /tmp/ccO46DoU.s page 255 - - 2875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_SetPolarity 2876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: @@ -15288,6 +17218,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> 2920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SHIFT_TAB_CCxP[iChannel]); 2921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccYgfTud.s page 288 + + 2922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination). @@ -15298,9 +17231,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx) - ARM GAS /tmp/ccO46DoU.s page 256 - - 2932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_TI1S); 2934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -15348,6 +17278,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccYgfTud.s page 289 + + 2979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 2. 2980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF 2981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check @@ -15358,9 +17291,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 2988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccO46DoU.s page 257 - - 2989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx) 2990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); @@ -15408,6 +17338,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable external clock mode 2. 3035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ET + ARM GAS /tmp/ccYgfTud.s page 290 + + 3036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 3037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 3038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_EnableExternalClock @@ -15418,9 +17351,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); 3045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccO46DoU.s page 258 - - 3046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable external clock mode 2. @@ -15468,26 +17398,26 @@ ARM GAS /tmp/ccO46DoU.s page 1 3090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) - 3115 .loc 5 3092 22 view .LVU1037 - 3116 .LBB393: + ARM GAS /tmp/ccYgfTud.s page 291 + + + 4244 .loc 5 3092 22 view .LVU1375 + 4245 .LBB466: 3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); - 3117 .loc 5 3094 3 view .LVU1038 - 3118 006a 9968 ldr r1, [r3, #8] - 3119 006c 0A4A ldr r2, .L115+16 - 3120 006e 0A40 ands r2, r2, r1 - 3121 0070 9A60 str r2, [r3, #8] - 3122 .LVL235: - ARM GAS /tmp/ccO46DoU.s page 259 - - - 3123 .loc 5 3094 3 is_stmt 0 view .LVU1039 - 3124 .LBE393: - 3125 .LBE392: -1262:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); - 3126 .loc 1 1262 3 is_stmt 1 view .LVU1040 - 3127 .LBB394: - 3128 .LBI394: + 4246 .loc 5 3094 3 view .LVU1376 + 4247 006a 9968 ldr r1, [r3, #8] + 4248 006c 0A4A ldr r2, .L199+16 + 4249 006e 0A40 ands r2, r2, r1 + 4250 0070 9A60 str r2, [r3, #8] + 4251 .LVL369: + 4252 .loc 5 3094 3 is_stmt 0 view .LVU1377 + 4253 .LBE466: + 4254 .LBE465: +1393:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); + 4255 .loc 1 1393 3 is_stmt 1 view .LVU1378 + 4256 .LBB467: + 4257 .LBI467: 3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -15528,29 +17458,29 @@ ARM GAS /tmp/ccO46DoU.s page 1 3132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC1REF 3133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC2REF 3134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC3REF + ARM GAS /tmp/ccYgfTud.s page 292 + + 3135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC4REF 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization) - 3129 .loc 5 3138 22 view .LVU1041 - 3130 .LBB395: + 4258 .loc 5 3138 22 view .LVU1379 + 4259 .LBB468: 3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); - 3131 .loc 5 3140 3 view .LVU1042 - 3132 0072 5A68 ldr r2, [r3, #4] - ARM GAS /tmp/ccO46DoU.s page 260 - - - 3133 0074 22F07002 bic r2, r2, #112 - 3134 0078 5A60 str r2, [r3, #4] - 3135 .LVL236: - 3136 .loc 5 3140 3 is_stmt 0 view .LVU1043 - 3137 .LBE395: - 3138 .LBE394: -1263:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ - 3139 .loc 1 1263 3 is_stmt 1 view .LVU1044 - 3140 .LBB396: - 3141 .LBI396: + 4260 .loc 5 3140 3 view .LVU1380 + 4261 0072 5A68 ldr r2, [r3, #4] + 4262 0074 22F07002 bic r2, r2, #112 + 4263 0078 5A60 str r2, [r3, #4] + 4264 .LVL370: + 4265 .loc 5 3140 3 is_stmt 0 view .LVU1381 + 4266 .LBE468: + 4267 .LBE467: +1394:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ + 4268 .loc 1 1394 3 is_stmt 1 view .LVU1382 + 4269 .LBB469: + 4270 .LBI469: 3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -15588,6 +17518,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 3176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer. 3177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetSlaveMode + ARM GAS /tmp/ccYgfTud.s page 293 + + 3178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param SlaveMode This parameter can be one of the following values: 3180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_DISABLED @@ -15598,9 +17531,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode) - ARM GAS /tmp/ccO46DoU.s page 261 - - 3188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); 3190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -15648,1056 +17578,1056 @@ ARM GAS /tmp/ccO46DoU.s page 1 3232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccYgfTud.s page 294 + + 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx) - 3142 .loc 5 3235 22 view .LVU1045 - 3143 .LBB397: + 4271 .loc 5 3235 22 view .LVU1383 + 4272 .LBB470: 3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); - 3144 .loc 5 3237 3 view .LVU1046 - 3145 007a 9A68 ldr r2, [r3, #8] - 3146 007c 22F08002 bic r2, r2, #128 - 3147 0080 9A60 str r2, [r3, #8] - 3148 .LVL237: - ARM GAS /tmp/ccO46DoU.s page 262 + 4273 .loc 5 3237 3 view .LVU1384 + 4274 007a 9A68 ldr r2, [r3, #8] + 4275 007c 22F08002 bic r2, r2, #128 + 4276 0080 9A60 str r2, [r3, #8] + 4277 .LVL371: + 4278 .loc 5 3237 3 is_stmt 0 view .LVU1385 + 4279 .LBE470: + 4280 .LBE469: +1399:Src/main.c **** + 4281 .loc 1 1399 1 view .LVU1386 + 4282 0082 06B0 add sp, sp, #24 + 4283 .LCFI43: + 4284 .cfi_def_cfa_offset 8 + 4285 @ sp needed + 4286 0084 10BD pop {r4, pc} + 4287 .L200: + 4288 0086 00BF .align 2 + 4289 .L199: + 4290 0088 00380240 .word 1073887232 + 4291 008c 00ED00E0 .word -536810240 + 4292 0090 00E100E0 .word -536813312 + 4293 0094 40D10C00 .word 840000 + 4294 0098 F8BFFEFF .word -81928 + 4295 .cfi_endproc + 4296 .LFE1195: + 4298 .section .text.MX_TIM5_Init,"ax",%progbits + 4299 .align 1 + 4300 .syntax unified + 4301 .thumb + 4302 .thumb_func + 4304 MX_TIM5_Init: + 4305 .LFB1197: +1466:Src/main.c **** + 4306 .loc 1 1466 1 is_stmt 1 view -0 + 4307 .cfi_startproc + 4308 @ args = 0, pretend = 0, frame = 24 + 4309 @ frame_needed = 0, uses_anonymous_args = 0 + 4310 0000 10B5 push {r4, lr} + 4311 .LCFI44: + 4312 .cfi_def_cfa_offset 8 + 4313 .cfi_offset 4, -8 + 4314 .cfi_offset 14, -4 + 4315 0002 86B0 sub sp, sp, #24 + 4316 .LCFI45: + 4317 .cfi_def_cfa_offset 32 +1472:Src/main.c **** + 4318 .loc 1 1472 3 view .LVU1388 +1472:Src/main.c **** + 4319 .loc 1 1472 22 is_stmt 0 view .LVU1389 + 4320 0004 0024 movs r4, #0 + 4321 0006 0194 str r4, [sp, #4] + 4322 0008 0294 str r4, [sp, #8] + ARM GAS /tmp/ccYgfTud.s page 295 - 3149 .loc 5 3237 3 is_stmt 0 view .LVU1047 - 3150 .LBE397: - 3151 .LBE396: -1268:Src/main.c **** - 3152 .loc 1 1268 1 view .LVU1048 - 3153 0082 06B0 add sp, sp, #24 - 3154 .LCFI29: - 3155 .cfi_def_cfa_offset 8 - 3156 @ sp needed - 3157 0084 10BD pop {r4, pc} - 3158 .L116: - 3159 0086 00BF .align 2 - 3160 .L115: - 3161 0088 00380240 .word 1073887232 - 3162 008c 00ED00E0 .word -536810240 - 3163 0090 00E100E0 .word -536813312 - 3164 0094 40D10C00 .word 840000 - 3165 0098 F8BFFEFF .word -81928 - 3166 .cfi_endproc - 3167 .LFE1195: - 3169 .section .text.MX_TIM5_Init,"ax",%progbits - 3170 .align 1 - 3171 .syntax unified - 3172 .thumb - 3173 .thumb_func - 3175 MX_TIM5_Init: - 3176 .LFB1197: -1335:Src/main.c **** - 3177 .loc 1 1335 1 is_stmt 1 view -0 - 3178 .cfi_startproc - 3179 @ args = 0, pretend = 0, frame = 24 - 3180 @ frame_needed = 0, uses_anonymous_args = 0 - 3181 0000 10B5 push {r4, lr} - 3182 .LCFI30: - 3183 .cfi_def_cfa_offset 8 - 3184 .cfi_offset 4, -8 - 3185 .cfi_offset 14, -4 - 3186 0002 86B0 sub sp, sp, #24 - 3187 .LCFI31: - 3188 .cfi_def_cfa_offset 32 -1341:Src/main.c **** - 3189 .loc 1 1341 3 view .LVU1050 -1341:Src/main.c **** - 3190 .loc 1 1341 22 is_stmt 0 view .LVU1051 - 3191 0004 0024 movs r4, #0 - 3192 0006 0194 str r4, [sp, #4] - 3193 0008 0294 str r4, [sp, #8] - 3194 000a 0394 str r4, [sp, #12] - 3195 000c 0494 str r4, [sp, #16] - 3196 000e 0594 str r4, [sp, #20] -1344:Src/main.c **** - 3197 .loc 1 1344 3 is_stmt 1 view .LVU1052 - 3198 .LVL238: - 3199 .LBB398: - 3200 .LBI398: + 4323 000a 0394 str r4, [sp, #12] + 4324 000c 0494 str r4, [sp, #16] + 4325 000e 0594 str r4, [sp, #20] +1475:Src/main.c **** + 4326 .loc 1 1475 3 is_stmt 1 view .LVU1390 + 4327 .LVL372: + 4328 .LBB471: + 4329 .LBI471: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3201 .loc 3 1071 22 view .LVU1053 - ARM GAS /tmp/ccO46DoU.s page 263 - - - 3202 .LBB399: + 4330 .loc 3 1071 22 view .LVU1391 + 4331 .LBB472: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 3203 .loc 3 1073 3 view .LVU1054 + 4332 .loc 3 1073 3 view .LVU1392 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3204 .loc 3 1074 3 view .LVU1055 - 3205 0010 1C4B ldr r3, .L119 - 3206 0012 1A6C ldr r2, [r3, #64] - 3207 0014 42F00802 orr r2, r2, #8 - 3208 0018 1A64 str r2, [r3, #64] + 4333 .loc 3 1074 3 view .LVU1393 + 4334 0010 1C4B ldr r3, .L203 + 4335 0012 1A6C ldr r2, [r3, #64] + 4336 0014 42F00802 orr r2, r2, #8 + 4337 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3209 .loc 3 1076 3 view .LVU1056 + 4338 .loc 3 1076 3 view .LVU1394 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3210 .loc 3 1076 12 is_stmt 0 view .LVU1057 - 3211 001a 1B6C ldr r3, [r3, #64] - 3212 001c 03F00803 and r3, r3, #8 + 4339 .loc 3 1076 12 is_stmt 0 view .LVU1395 + 4340 001a 1B6C ldr r3, [r3, #64] + 4341 001c 03F00803 and r3, r3, #8 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3213 .loc 3 1076 10 view .LVU1058 - 3214 0020 0093 str r3, [sp] + 4342 .loc 3 1076 10 view .LVU1396 + 4343 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3215 .loc 3 1077 3 is_stmt 1 view .LVU1059 - 3216 0022 009B ldr r3, [sp] - 3217 .LVL239: + 4344 .loc 3 1077 3 is_stmt 1 view .LVU1397 + 4345 0022 009B ldr r3, [sp] + 4346 .LVL373: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3218 .loc 3 1077 3 is_stmt 0 view .LVU1060 - 3219 .LBE399: - 3220 .LBE398: -1347:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 3221 .loc 1 1347 3 is_stmt 1 view .LVU1061 - 3222 .LBB400: - 3223 .LBI400: + 4347 .loc 3 1077 3 is_stmt 0 view .LVU1398 + 4348 .LBE472: + 4349 .LBE471: +1478:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 4350 .loc 1 1478 3 is_stmt 1 view .LVU1399 + 4351 .LBB473: + 4352 .LBI473: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 3224 .loc 2 1884 26 view .LVU1062 - 3225 .LBB401: + 4353 .loc 2 1884 26 view .LVU1400 + 4354 .LBB474: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 3226 .loc 2 1886 3 view .LVU1063 + 4355 .loc 2 1886 3 view .LVU1401 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 3227 .loc 2 1886 26 is_stmt 0 view .LVU1064 - 3228 0024 184B ldr r3, .L119+4 - 3229 0026 D868 ldr r0, [r3, #12] - 3230 .LBE401: - 3231 .LBE400: -1347:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 3232 .loc 1 1347 3 discriminator 1 view .LVU1065 - 3233 0028 2246 mov r2, r4 - 3234 002a 2146 mov r1, r4 - 3235 002c C0F30220 ubfx r0, r0, #8, #3 - 3236 0030 FFF7FEFF bl NVIC_EncodePriority - 3237 .LVL240: - 3238 .LBB402: - 3239 .LBI402: + 4356 .loc 2 1886 26 is_stmt 0 view .LVU1402 + 4357 0024 184B ldr r3, .L203+4 + 4358 0026 D868 ldr r0, [r3, #12] + 4359 .LBE474: + 4360 .LBE473: +1478:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 4361 .loc 1 1478 3 discriminator 1 view .LVU1403 + 4362 0028 2246 mov r2, r4 + 4363 002a 2146 mov r1, r4 + 4364 002c C0F30220 ubfx r0, r0, #8, #3 + 4365 0030 FFF7FEFF bl NVIC_EncodePriority + ARM GAS /tmp/ccYgfTud.s page 296 + + + 4366 .LVL374: + 4367 .LBB475: + 4368 .LBI475: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 3240 .loc 2 2024 22 is_stmt 1 view .LVU1066 - 3241 .LBB403: + 4369 .loc 2 2024 22 is_stmt 1 view .LVU1404 + 4370 .LBB476: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 3242 .loc 2 2026 3 view .LVU1067 + 4371 .loc 2 2026 3 view .LVU1405 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3243 .loc 2 2028 5 view .LVU1068 - ARM GAS /tmp/ccO46DoU.s page 264 - - + 4372 .loc 2 2028 5 view .LVU1406 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3244 .loc 2 2028 49 is_stmt 0 view .LVU1069 - 3245 0034 0001 lsls r0, r0, #4 - 3246 .LVL241: + 4373 .loc 2 2028 49 is_stmt 0 view .LVU1407 + 4374 0034 0001 lsls r0, r0, #4 + 4375 .LVL375: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3247 .loc 2 2028 49 view .LVU1070 - 3248 0036 C0B2 uxtb r0, r0 + 4376 .loc 2 2028 49 view .LVU1408 + 4377 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3249 .loc 2 2028 47 view .LVU1071 - 3250 0038 144B ldr r3, .L119+8 - 3251 003a 83F83203 strb r0, [r3, #818] - 3252 .LVL242: + 4378 .loc 2 2028 47 view .LVU1409 + 4379 0038 144B ldr r3, .L203+8 + 4380 003a 83F83203 strb r0, [r3, #818] + 4381 .LVL376: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3253 .loc 2 2028 47 view .LVU1072 - 3254 .LBE403: - 3255 .LBE402: -1348:Src/main.c **** - 3256 .loc 1 1348 3 is_stmt 1 view .LVU1073 - 3257 .LBB404: - 3258 .LBI404: + 4382 .loc 2 2028 47 view .LVU1410 + 4383 .LBE476: + 4384 .LBE475: +1479:Src/main.c **** + 4385 .loc 1 1479 3 is_stmt 1 view .LVU1411 + 4386 .LBB477: + 4387 .LBI477: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 3259 .loc 2 1896 22 view .LVU1074 - 3260 .LBB405: + 4388 .loc 2 1896 22 view .LVU1412 + 4389 .LBB478: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 3261 .loc 2 1898 3 view .LVU1075 + 4390 .loc 2 1898 3 view .LVU1413 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3262 .loc 2 1900 5 view .LVU1076 + 4391 .loc 2 1900 5 view .LVU1414 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3263 .loc 2 1900 43 is_stmt 0 view .LVU1077 - 3264 003e 4FF48022 mov r2, #262144 - 3265 0042 5A60 str r2, [r3, #4] - 3266 .LVL243: + 4392 .loc 2 1900 43 is_stmt 0 view .LVU1415 + 4393 003e 4FF48022 mov r2, #262144 + 4394 0042 5A60 str r2, [r3, #4] + 4395 .LVL377: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3267 .loc 2 1900 43 view .LVU1078 - 3268 .LBE405: - 3269 .LBE404: -1353:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3270 .loc 1 1353 3 is_stmt 1 view .LVU1079 -1353:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3271 .loc 1 1353 28 is_stmt 0 view .LVU1080 - 3272 0044 42F21073 movw r3, #10000 - 3273 0048 ADF80430 strh r3, [sp, #4] @ movhi -1354:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 3274 .loc 1 1354 3 is_stmt 1 view .LVU1081 -1354:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 3275 .loc 1 1354 30 is_stmt 0 view .LVU1082 - 3276 004c 0294 str r4, [sp, #8] -1355:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3277 .loc 1 1355 3 is_stmt 1 view .LVU1083 -1355:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3278 .loc 1 1355 29 is_stmt 0 view .LVU1084 - 3279 004e 4FF40C73 mov r3, #560 - 3280 0052 0393 str r3, [sp, #12] -1356:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 3281 .loc 1 1356 3 is_stmt 1 view .LVU1085 -1356:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 3282 .loc 1 1356 32 is_stmt 0 view .LVU1086 - ARM GAS /tmp/ccO46DoU.s page 265 + 4396 .loc 2 1900 43 view .LVU1416 + 4397 .LBE478: + 4398 .LBE477: +1484:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 4399 .loc 1 1484 3 is_stmt 1 view .LVU1417 +1484:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 4400 .loc 1 1484 28 is_stmt 0 view .LVU1418 + 4401 0044 42F21073 movw r3, #10000 + 4402 0048 ADF80430 strh r3, [sp, #4] @ movhi +1485:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 4403 .loc 1 1485 3 is_stmt 1 view .LVU1419 +1485:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 4404 .loc 1 1485 30 is_stmt 0 view .LVU1420 + 4405 004c 0294 str r4, [sp, #8] + ARM GAS /tmp/ccYgfTud.s page 297 - 3283 0054 0494 str r4, [sp, #16] -1357:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); - 3284 .loc 1 1357 3 is_stmt 1 view .LVU1087 - 3285 0056 0E4C ldr r4, .L119+12 - 3286 0058 01A9 add r1, sp, #4 - 3287 005a 2046 mov r0, r4 - 3288 005c FFF7FEFF bl LL_TIM_Init - 3289 .LVL244: -1358:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); - 3290 .loc 1 1358 3 view .LVU1088 - 3291 .LBB406: - 3292 .LBI406: +1486:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 4406 .loc 1 1486 3 is_stmt 1 view .LVU1421 +1486:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 4407 .loc 1 1486 29 is_stmt 0 view .LVU1422 + 4408 004e 4FF40C73 mov r3, #560 + 4409 0052 0393 str r3, [sp, #12] +1487:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 4410 .loc 1 1487 3 is_stmt 1 view .LVU1423 +1487:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 4411 .loc 1 1487 32 is_stmt 0 view .LVU1424 + 4412 0054 0494 str r4, [sp, #16] +1488:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); + 4413 .loc 1 1488 3 is_stmt 1 view .LVU1425 + 4414 0056 0E4C ldr r4, .L203+12 + 4415 0058 01A9 add r1, sp, #4 + 4416 005a 2046 mov r0, r4 + 4417 005c FFF7FEFF bl LL_TIM_Init + 4418 .LVL378: +1489:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); + 4419 .loc 1 1489 3 view .LVU1426 + 4420 .LBB479: + 4421 .LBI479: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3293 .loc 5 1504 22 view .LVU1089 - 3294 .LBB407: + 4422 .loc 5 1504 22 view .LVU1427 + 4423 .LBB480: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3295 .loc 5 1506 3 view .LVU1090 - 3296 0060 2368 ldr r3, [r4] - 3297 0062 23F08003 bic r3, r3, #128 - 3298 0066 2360 str r3, [r4] - 3299 .LVL245: + 4424 .loc 5 1506 3 view .LVU1428 + 4425 0060 2368 ldr r3, [r4] + 4426 0062 23F08003 bic r3, r3, #128 + 4427 0066 2360 str r3, [r4] + 4428 .LVL379: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3300 .loc 5 1506 3 is_stmt 0 view .LVU1091 - 3301 .LBE407: - 3302 .LBE406: -1359:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); - 3303 .loc 1 1359 3 is_stmt 1 view .LVU1092 - 3304 .LBB408: - 3305 .LBI408: + 4429 .loc 5 1506 3 is_stmt 0 view .LVU1429 + 4430 .LBE480: + 4431 .LBE479: +1490:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); + 4432 .loc 1 1490 3 is_stmt 1 view .LVU1430 + 4433 .LBB481: + 4434 .LBI481: 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3306 .loc 5 3092 22 view .LVU1093 - 3307 .LBB409: + 4435 .loc 5 3092 22 view .LVU1431 + 4436 .LBB482: 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3308 .loc 5 3094 3 view .LVU1094 - 3309 0068 A268 ldr r2, [r4, #8] - 3310 006a 0A4B ldr r3, .L119+16 - 3311 006c 1340 ands r3, r3, r2 - 3312 006e A360 str r3, [r4, #8] - 3313 .LVL246: + 4437 .loc 5 3094 3 view .LVU1432 + 4438 0068 A268 ldr r2, [r4, #8] + 4439 006a 0A4B ldr r3, .L203+16 + 4440 006c 1340 ands r3, r3, r2 + 4441 006e A360 str r3, [r4, #8] + 4442 .LVL380: 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3314 .loc 5 3094 3 is_stmt 0 view .LVU1095 - 3315 .LBE409: - 3316 .LBE408: -1360:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); - 3317 .loc 1 1360 3 is_stmt 1 view .LVU1096 - 3318 .LBB410: - 3319 .LBI410: + 4443 .loc 5 3094 3 is_stmt 0 view .LVU1433 + 4444 .LBE482: + 4445 .LBE481: +1491:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); + 4446 .loc 1 1491 3 is_stmt 1 view .LVU1434 + 4447 .LBB483: + 4448 .LBI483: + ARM GAS /tmp/ccYgfTud.s page 298 + + 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3320 .loc 5 3138 22 view .LVU1097 - 3321 .LBB411: + 4449 .loc 5 3138 22 view .LVU1435 + 4450 .LBB484: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3322 .loc 5 3140 3 view .LVU1098 - 3323 0070 6368 ldr r3, [r4, #4] - 3324 0072 23F07003 bic r3, r3, #112 - 3325 0076 6360 str r3, [r4, #4] - 3326 .LVL247: + 4451 .loc 5 3140 3 view .LVU1436 + 4452 0070 6368 ldr r3, [r4, #4] + 4453 0072 23F07003 bic r3, r3, #112 + 4454 0076 6360 str r3, [r4, #4] + 4455 .LVL381: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccO46DoU.s page 266 - - - 3327 .loc 5 3140 3 is_stmt 0 view .LVU1099 - 3328 .LBE411: - 3329 .LBE410: -1361:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ - 3330 .loc 1 1361 3 is_stmt 1 view .LVU1100 - 3331 .LBB412: - 3332 .LBI412: + 4456 .loc 5 3140 3 is_stmt 0 view .LVU1437 + 4457 .LBE484: + 4458 .LBE483: +1492:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ + 4459 .loc 1 1492 3 is_stmt 1 view .LVU1438 + 4460 .LBB485: + 4461 .LBI485: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3333 .loc 5 3235 22 view .LVU1101 - 3334 .LBB413: - 3335 .loc 5 3237 3 view .LVU1102 - 3336 0078 A368 ldr r3, [r4, #8] - 3337 007a 23F08003 bic r3, r3, #128 - 3338 007e A360 str r3, [r4, #8] - 3339 .LVL248: - 3340 .loc 5 3237 3 is_stmt 0 view .LVU1103 - 3341 .LBE413: - 3342 .LBE412: -1366:Src/main.c **** - 3343 .loc 1 1366 1 view .LVU1104 - 3344 0080 06B0 add sp, sp, #24 - 3345 .LCFI32: - 3346 .cfi_def_cfa_offset 8 - 3347 @ sp needed - 3348 0082 10BD pop {r4, pc} - 3349 .L120: - 3350 .align 2 - 3351 .L119: - 3352 0084 00380240 .word 1073887232 - 3353 0088 00ED00E0 .word -536810240 - 3354 008c 00E100E0 .word -536813312 - 3355 0090 000C0040 .word 1073744896 - 3356 0094 F8BFFEFF .word -81928 - 3357 .cfi_endproc - 3358 .LFE1197: - 3360 .section .text.MX_TIM7_Init,"ax",%progbits - 3361 .align 1 - 3362 .syntax unified - 3363 .thumb - 3364 .thumb_func - 3366 MX_TIM7_Init: - 3367 .LFB1199: -1411:Src/main.c **** - 3368 .loc 1 1411 1 is_stmt 1 view -0 - 3369 .cfi_startproc - 3370 @ args = 0, pretend = 0, frame = 24 - 3371 @ frame_needed = 0, uses_anonymous_args = 0 - 3372 0000 10B5 push {r4, lr} - 3373 .LCFI33: - 3374 .cfi_def_cfa_offset 8 - 3375 .cfi_offset 4, -8 - 3376 .cfi_offset 14, -4 - 3377 0002 86B0 sub sp, sp, #24 - 3378 .LCFI34: - 3379 .cfi_def_cfa_offset 32 -1417:Src/main.c **** - 3380 .loc 1 1417 3 view .LVU1106 - ARM GAS /tmp/ccO46DoU.s page 267 + 4462 .loc 5 3235 22 view .LVU1439 + 4463 .LBB486: + 4464 .loc 5 3237 3 view .LVU1440 + 4465 0078 A368 ldr r3, [r4, #8] + 4466 007a 23F08003 bic r3, r3, #128 + 4467 007e A360 str r3, [r4, #8] + 4468 .LVL382: + 4469 .loc 5 3237 3 is_stmt 0 view .LVU1441 + 4470 .LBE486: + 4471 .LBE485: +1497:Src/main.c **** + 4472 .loc 1 1497 1 view .LVU1442 + 4473 0080 06B0 add sp, sp, #24 + 4474 .LCFI46: + 4475 .cfi_def_cfa_offset 8 + 4476 @ sp needed + 4477 0082 10BD pop {r4, pc} + 4478 .L204: + 4479 .align 2 + 4480 .L203: + 4481 0084 00380240 .word 1073887232 + 4482 0088 00ED00E0 .word -536810240 + 4483 008c 00E100E0 .word -536813312 + 4484 0090 000C0040 .word 1073744896 + 4485 0094 F8BFFEFF .word -81928 + 4486 .cfi_endproc + 4487 .LFE1197: + 4489 .section .text.MX_TIM7_Init,"ax",%progbits + 4490 .align 1 + 4491 .syntax unified + 4492 .thumb + 4493 .thumb_func + 4495 MX_TIM7_Init: + 4496 .LFB1199: +1542:Src/main.c **** + 4497 .loc 1 1542 1 is_stmt 1 view -0 + 4498 .cfi_startproc + 4499 @ args = 0, pretend = 0, frame = 24 + 4500 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccYgfTud.s page 299 -1417:Src/main.c **** - 3381 .loc 1 1417 22 is_stmt 0 view .LVU1107 - 3382 0004 0024 movs r4, #0 - 3383 0006 0194 str r4, [sp, #4] - 3384 0008 0294 str r4, [sp, #8] - 3385 000a 0394 str r4, [sp, #12] - 3386 000c 0494 str r4, [sp, #16] - 3387 000e 0594 str r4, [sp, #20] -1420:Src/main.c **** - 3388 .loc 1 1420 3 is_stmt 1 view .LVU1108 - 3389 .LVL249: - 3390 .LBB414: - 3391 .LBI414: + 4501 0000 10B5 push {r4, lr} + 4502 .LCFI47: + 4503 .cfi_def_cfa_offset 8 + 4504 .cfi_offset 4, -8 + 4505 .cfi_offset 14, -4 + 4506 0002 86B0 sub sp, sp, #24 + 4507 .LCFI48: + 4508 .cfi_def_cfa_offset 32 +1548:Src/main.c **** + 4509 .loc 1 1548 3 view .LVU1444 +1548:Src/main.c **** + 4510 .loc 1 1548 22 is_stmt 0 view .LVU1445 + 4511 0004 0024 movs r4, #0 + 4512 0006 0194 str r4, [sp, #4] + 4513 0008 0294 str r4, [sp, #8] + 4514 000a 0394 str r4, [sp, #12] + 4515 000c 0494 str r4, [sp, #16] + 4516 000e 0594 str r4, [sp, #20] +1551:Src/main.c **** + 4517 .loc 1 1551 3 is_stmt 1 view .LVU1446 + 4518 .LVL383: + 4519 .LBB487: + 4520 .LBI487: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3392 .loc 3 1071 22 view .LVU1109 - 3393 .LBB415: + 4521 .loc 3 1071 22 view .LVU1447 + 4522 .LBB488: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 3394 .loc 3 1073 3 view .LVU1110 + 4523 .loc 3 1073 3 view .LVU1448 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3395 .loc 3 1074 3 view .LVU1111 - 3396 0010 1A4B ldr r3, .L123 - 3397 0012 1A6C ldr r2, [r3, #64] - 3398 0014 42F02002 orr r2, r2, #32 - 3399 0018 1A64 str r2, [r3, #64] + 4524 .loc 3 1074 3 view .LVU1449 + 4525 0010 1A4B ldr r3, .L207 + 4526 0012 1A6C ldr r2, [r3, #64] + 4527 0014 42F02002 orr r2, r2, #32 + 4528 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3400 .loc 3 1076 3 view .LVU1112 + 4529 .loc 3 1076 3 view .LVU1450 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3401 .loc 3 1076 12 is_stmt 0 view .LVU1113 - 3402 001a 1B6C ldr r3, [r3, #64] - 3403 001c 03F02003 and r3, r3, #32 + 4530 .loc 3 1076 12 is_stmt 0 view .LVU1451 + 4531 001a 1B6C ldr r3, [r3, #64] + 4532 001c 03F02003 and r3, r3, #32 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3404 .loc 3 1076 10 view .LVU1114 - 3405 0020 0093 str r3, [sp] + 4533 .loc 3 1076 10 view .LVU1452 + 4534 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3406 .loc 3 1077 3 is_stmt 1 view .LVU1115 - 3407 0022 009B ldr r3, [sp] - 3408 .LVL250: + 4535 .loc 3 1077 3 is_stmt 1 view .LVU1453 + 4536 0022 009B ldr r3, [sp] + 4537 .LVL384: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3409 .loc 3 1077 3 is_stmt 0 view .LVU1116 - 3410 .LBE415: - 3411 .LBE414: -1423:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 3412 .loc 1 1423 3 is_stmt 1 view .LVU1117 - 3413 .LBB416: - 3414 .LBI416: + 4538 .loc 3 1077 3 is_stmt 0 view .LVU1454 + 4539 .LBE488: + 4540 .LBE487: +1554:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 4541 .loc 1 1554 3 is_stmt 1 view .LVU1455 + 4542 .LBB489: + 4543 .LBI489: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 3415 .loc 2 1884 26 view .LVU1118 - 3416 .LBB417: -1886:Drivers/CMSIS/Include/core_cm7.h **** } - 3417 .loc 2 1886 3 view .LVU1119 -1886:Drivers/CMSIS/Include/core_cm7.h **** } - 3418 .loc 2 1886 26 is_stmt 0 view .LVU1120 - 3419 0024 164B ldr r3, .L123+4 - 3420 0026 D868 ldr r0, [r3, #12] - 3421 .LBE417: - 3422 .LBE416: -1423:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - ARM GAS /tmp/ccO46DoU.s page 268 + 4544 .loc 2 1884 26 view .LVU1456 + ARM GAS /tmp/ccYgfTud.s page 300 - 3423 .loc 1 1423 3 discriminator 1 view .LVU1121 - 3424 0028 2246 mov r2, r4 - 3425 002a 2146 mov r1, r4 - 3426 002c C0F30220 ubfx r0, r0, #8, #3 - 3427 0030 FFF7FEFF bl NVIC_EncodePriority - 3428 .LVL251: - 3429 .LBB418: - 3430 .LBI418: + 4545 .LBB490: +1886:Drivers/CMSIS/Include/core_cm7.h **** } + 4546 .loc 2 1886 3 view .LVU1457 +1886:Drivers/CMSIS/Include/core_cm7.h **** } + 4547 .loc 2 1886 26 is_stmt 0 view .LVU1458 + 4548 0024 164B ldr r3, .L207+4 + 4549 0026 D868 ldr r0, [r3, #12] + 4550 .LBE490: + 4551 .LBE489: +1554:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 4552 .loc 1 1554 3 discriminator 1 view .LVU1459 + 4553 0028 2246 mov r2, r4 + 4554 002a 2146 mov r1, r4 + 4555 002c C0F30220 ubfx r0, r0, #8, #3 + 4556 0030 FFF7FEFF bl NVIC_EncodePriority + 4557 .LVL385: + 4558 .LBB491: + 4559 .LBI491: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 3431 .loc 2 2024 22 is_stmt 1 view .LVU1122 - 3432 .LBB419: + 4560 .loc 2 2024 22 is_stmt 1 view .LVU1460 + 4561 .LBB492: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 3433 .loc 2 2026 3 view .LVU1123 + 4562 .loc 2 2026 3 view .LVU1461 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3434 .loc 2 2028 5 view .LVU1124 + 4563 .loc 2 2028 5 view .LVU1462 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3435 .loc 2 2028 49 is_stmt 0 view .LVU1125 - 3436 0034 0001 lsls r0, r0, #4 - 3437 .LVL252: + 4564 .loc 2 2028 49 is_stmt 0 view .LVU1463 + 4565 0034 0001 lsls r0, r0, #4 + 4566 .LVL386: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3438 .loc 2 2028 49 view .LVU1126 - 3439 0036 C0B2 uxtb r0, r0 + 4567 .loc 2 2028 49 view .LVU1464 + 4568 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3440 .loc 2 2028 47 view .LVU1127 - 3441 0038 124B ldr r3, .L123+8 - 3442 003a 83F83703 strb r0, [r3, #823] - 3443 .LVL253: + 4569 .loc 2 2028 47 view .LVU1465 + 4570 0038 124B ldr r3, .L207+8 + 4571 003a 83F83703 strb r0, [r3, #823] + 4572 .LVL387: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3444 .loc 2 2028 47 view .LVU1128 - 3445 .LBE419: - 3446 .LBE418: -1424:Src/main.c **** - 3447 .loc 1 1424 3 is_stmt 1 view .LVU1129 - 3448 .LBB420: - 3449 .LBI420: + 4573 .loc 2 2028 47 view .LVU1466 + 4574 .LBE492: + 4575 .LBE491: +1555:Src/main.c **** + 4576 .loc 1 1555 3 is_stmt 1 view .LVU1467 + 4577 .LBB493: + 4578 .LBI493: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 3450 .loc 2 1896 22 view .LVU1130 - 3451 .LBB421: + 4579 .loc 2 1896 22 view .LVU1468 + 4580 .LBB494: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 3452 .loc 2 1898 3 view .LVU1131 + 4581 .loc 2 1898 3 view .LVU1469 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3453 .loc 2 1900 5 view .LVU1132 + 4582 .loc 2 1900 5 view .LVU1470 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3454 .loc 2 1900 43 is_stmt 0 view .LVU1133 - 3455 003e 4FF40002 mov r2, #8388608 - 3456 0042 5A60 str r2, [r3, #4] - 3457 .LVL254: -1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3458 .loc 2 1900 43 view .LVU1134 - 3459 .LBE421: - 3460 .LBE420: -1429:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3461 .loc 1 1429 3 is_stmt 1 view .LVU1135 -1429:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3462 .loc 1 1429 28 is_stmt 0 view .LVU1136 - 3463 0044 40F29733 movw r3, #919 - 3464 0048 ADF80430 strh r3, [sp, #4] @ movhi - ARM GAS /tmp/ccO46DoU.s page 269 + 4583 .loc 2 1900 43 is_stmt 0 view .LVU1471 + 4584 003e 4FF40002 mov r2, #8388608 + 4585 0042 5A60 str r2, [r3, #4] + 4586 .LVL388: + ARM GAS /tmp/ccYgfTud.s page 301 -1430:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 3465 .loc 1 1430 3 is_stmt 1 view .LVU1137 -1430:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 3466 .loc 1 1430 30 is_stmt 0 view .LVU1138 - 3467 004c 0294 str r4, [sp, #8] -1431:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 3468 .loc 1 1431 3 is_stmt 1 view .LVU1139 -1431:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 3469 .loc 1 1431 29 is_stmt 0 view .LVU1140 - 3470 004e 6323 movs r3, #99 - 3471 0050 0393 str r3, [sp, #12] -1432:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); - 3472 .loc 1 1432 3 is_stmt 1 view .LVU1141 - 3473 0052 0D4C ldr r4, .L123+12 - 3474 0054 01A9 add r1, sp, #4 - 3475 0056 2046 mov r0, r4 - 3476 0058 FFF7FEFF bl LL_TIM_Init - 3477 .LVL255: -1433:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); - 3478 .loc 1 1433 3 view .LVU1142 - 3479 .LBB422: - 3480 .LBI422: +1900:Drivers/CMSIS/Include/core_cm7.h **** } + 4587 .loc 2 1900 43 view .LVU1472 + 4588 .LBE494: + 4589 .LBE493: +1560:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 4590 .loc 1 1560 3 is_stmt 1 view .LVU1473 +1560:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 4591 .loc 1 1560 28 is_stmt 0 view .LVU1474 + 4592 0044 40F29733 movw r3, #919 + 4593 0048 ADF80430 strh r3, [sp, #4] @ movhi +1561:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 4594 .loc 1 1561 3 is_stmt 1 view .LVU1475 +1561:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 4595 .loc 1 1561 30 is_stmt 0 view .LVU1476 + 4596 004c 0294 str r4, [sp, #8] +1562:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 4597 .loc 1 1562 3 is_stmt 1 view .LVU1477 +1562:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 4598 .loc 1 1562 29 is_stmt 0 view .LVU1478 + 4599 004e 6323 movs r3, #99 + 4600 0050 0393 str r3, [sp, #12] +1563:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); + 4601 .loc 1 1563 3 is_stmt 1 view .LVU1479 + 4602 0052 0D4C ldr r4, .L207+12 + 4603 0054 01A9 add r1, sp, #4 + 4604 0056 2046 mov r0, r4 + 4605 0058 FFF7FEFF bl LL_TIM_Init + 4606 .LVL389: +1564:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); + 4607 .loc 1 1564 3 view .LVU1480 + 4608 .LBB495: + 4609 .LBI495: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3481 .loc 5 1504 22 view .LVU1143 - 3482 .LBB423: + 4610 .loc 5 1504 22 view .LVU1481 + 4611 .LBB496: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3483 .loc 5 1506 3 view .LVU1144 - 3484 005c 2368 ldr r3, [r4] - 3485 005e 23F08003 bic r3, r3, #128 - 3486 0062 2360 str r3, [r4] - 3487 .LVL256: + 4612 .loc 5 1506 3 view .LVU1482 + 4613 005c 2368 ldr r3, [r4] + 4614 005e 23F08003 bic r3, r3, #128 + 4615 0062 2360 str r3, [r4] + 4616 .LVL390: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3488 .loc 5 1506 3 is_stmt 0 view .LVU1145 - 3489 .LBE423: - 3490 .LBE422: -1434:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); - 3491 .loc 1 1434 3 is_stmt 1 view .LVU1146 - 3492 .LBB424: - 3493 .LBI424: + 4617 .loc 5 1506 3 is_stmt 0 view .LVU1483 + 4618 .LBE496: + 4619 .LBE495: +1565:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); + 4620 .loc 1 1565 3 is_stmt 1 view .LVU1484 + 4621 .LBB497: + 4622 .LBI497: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3494 .loc 5 3138 22 view .LVU1147 - 3495 .LBB425: + 4623 .loc 5 3138 22 view .LVU1485 + 4624 .LBB498: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3496 .loc 5 3140 3 view .LVU1148 - 3497 0064 6368 ldr r3, [r4, #4] - 3498 0066 23F07003 bic r3, r3, #112 - 3499 006a 43F01003 orr r3, r3, #16 - 3500 006e 6360 str r3, [r4, #4] - 3501 .LVL257: -3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3502 .loc 5 3140 3 is_stmt 0 view .LVU1149 - 3503 .LBE425: - 3504 .LBE424: -1435:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ - 3505 .loc 1 1435 3 is_stmt 1 view .LVU1150 - 3506 .LBB426: - 3507 .LBI426: - ARM GAS /tmp/ccO46DoU.s page 270 + 4625 .loc 5 3140 3 view .LVU1486 + 4626 0064 6368 ldr r3, [r4, #4] + 4627 0066 23F07003 bic r3, r3, #112 + 4628 006a 43F01003 orr r3, r3, #16 + ARM GAS /tmp/ccYgfTud.s page 302 + 4629 006e 6360 str r3, [r4, #4] + 4630 .LVL391: +3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 4631 .loc 5 3140 3 is_stmt 0 view .LVU1487 + 4632 .LBE498: + 4633 .LBE497: +1566:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ + 4634 .loc 1 1566 3 is_stmt 1 view .LVU1488 + 4635 .LBB499: + 4636 .LBI499: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3508 .loc 5 3235 22 view .LVU1151 - 3509 .LBB427: - 3510 .loc 5 3237 3 view .LVU1152 - 3511 0070 A368 ldr r3, [r4, #8] - 3512 0072 23F08003 bic r3, r3, #128 - 3513 0076 A360 str r3, [r4, #8] - 3514 .LVL258: - 3515 .loc 5 3237 3 is_stmt 0 view .LVU1153 - 3516 .LBE427: - 3517 .LBE426: -1440:Src/main.c **** - 3518 .loc 1 1440 1 view .LVU1154 - 3519 0078 06B0 add sp, sp, #24 - 3520 .LCFI35: - 3521 .cfi_def_cfa_offset 8 - 3522 @ sp needed - 3523 007a 10BD pop {r4, pc} - 3524 .L124: - 3525 .align 2 - 3526 .L123: - 3527 007c 00380240 .word 1073887232 - 3528 0080 00ED00E0 .word -536810240 - 3529 0084 00E100E0 .word -536813312 - 3530 0088 00140040 .word 1073746944 - 3531 .cfi_endproc - 3532 .LFE1199: - 3534 .section .text.MX_TIM6_Init,"ax",%progbits - 3535 .align 1 - 3536 .syntax unified - 3537 .thumb - 3538 .thumb_func - 3540 MX_TIM6_Init: - 3541 .LFB1198: -1374:Src/main.c **** - 3542 .loc 1 1374 1 is_stmt 1 view -0 - 3543 .cfi_startproc - 3544 @ args = 0, pretend = 0, frame = 24 - 3545 @ frame_needed = 0, uses_anonymous_args = 0 - 3546 0000 10B5 push {r4, lr} - 3547 .LCFI36: - 3548 .cfi_def_cfa_offset 8 - 3549 .cfi_offset 4, -8 - 3550 .cfi_offset 14, -4 - 3551 0002 86B0 sub sp, sp, #24 - 3552 .LCFI37: - 3553 .cfi_def_cfa_offset 32 -1380:Src/main.c **** - 3554 .loc 1 1380 3 view .LVU1156 -1380:Src/main.c **** - 3555 .loc 1 1380 22 is_stmt 0 view .LVU1157 - 3556 0004 0024 movs r4, #0 - 3557 0006 0194 str r4, [sp, #4] - 3558 0008 0294 str r4, [sp, #8] - 3559 000a 0394 str r4, [sp, #12] - 3560 000c 0494 str r4, [sp, #16] - 3561 000e 0594 str r4, [sp, #20] - ARM GAS /tmp/ccO46DoU.s page 271 + 4637 .loc 5 3235 22 view .LVU1489 + 4638 .LBB500: + 4639 .loc 5 3237 3 view .LVU1490 + 4640 0070 A368 ldr r3, [r4, #8] + 4641 0072 23F08003 bic r3, r3, #128 + 4642 0076 A360 str r3, [r4, #8] + 4643 .LVL392: + 4644 .loc 5 3237 3 is_stmt 0 view .LVU1491 + 4645 .LBE500: + 4646 .LBE499: +1571:Src/main.c **** + 4647 .loc 1 1571 1 view .LVU1492 + 4648 0078 06B0 add sp, sp, #24 + 4649 .LCFI49: + 4650 .cfi_def_cfa_offset 8 + 4651 @ sp needed + 4652 007a 10BD pop {r4, pc} + 4653 .L208: + 4654 .align 2 + 4655 .L207: + 4656 007c 00380240 .word 1073887232 + 4657 0080 00ED00E0 .word -536810240 + 4658 0084 00E100E0 .word -536813312 + 4659 0088 00140040 .word 1073746944 + 4660 .cfi_endproc + 4661 .LFE1199: + 4663 .section .text.MX_TIM6_Init,"ax",%progbits + 4664 .align 1 + 4665 .syntax unified + 4666 .thumb + 4667 .thumb_func + 4669 MX_TIM6_Init: + 4670 .LFB1198: +1505:Src/main.c **** + 4671 .loc 1 1505 1 is_stmt 1 view -0 + 4672 .cfi_startproc + 4673 @ args = 0, pretend = 0, frame = 24 + 4674 @ frame_needed = 0, uses_anonymous_args = 0 + 4675 0000 10B5 push {r4, lr} + 4676 .LCFI50: + 4677 .cfi_def_cfa_offset 8 + 4678 .cfi_offset 4, -8 + 4679 .cfi_offset 14, -4 + 4680 0002 86B0 sub sp, sp, #24 + 4681 .LCFI51: + 4682 .cfi_def_cfa_offset 32 + ARM GAS /tmp/ccYgfTud.s page 303 -1383:Src/main.c **** - 3562 .loc 1 1383 3 is_stmt 1 view .LVU1158 - 3563 .LVL259: - 3564 .LBB428: - 3565 .LBI428: +1511:Src/main.c **** + 4683 .loc 1 1511 3 view .LVU1494 +1511:Src/main.c **** + 4684 .loc 1 1511 22 is_stmt 0 view .LVU1495 + 4685 0004 0024 movs r4, #0 + 4686 0006 0194 str r4, [sp, #4] + 4687 0008 0294 str r4, [sp, #8] + 4688 000a 0394 str r4, [sp, #12] + 4689 000c 0494 str r4, [sp, #16] + 4690 000e 0594 str r4, [sp, #20] +1514:Src/main.c **** + 4691 .loc 1 1514 3 is_stmt 1 view .LVU1496 + 4692 .LVL393: + 4693 .LBB501: + 4694 .LBI501: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 3566 .loc 3 1071 22 view .LVU1159 - 3567 .LBB429: + 4695 .loc 3 1071 22 view .LVU1497 + 4696 .LBB502: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 3568 .loc 3 1073 3 view .LVU1160 + 4697 .loc 3 1073 3 view .LVU1498 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 3569 .loc 3 1074 3 view .LVU1161 - 3570 0010 1A4B ldr r3, .L127 - 3571 0012 1A6C ldr r2, [r3, #64] - 3572 0014 42F01002 orr r2, r2, #16 - 3573 0018 1A64 str r2, [r3, #64] + 4698 .loc 3 1074 3 view .LVU1499 + 4699 0010 1A4B ldr r3, .L211 + 4700 0012 1A6C ldr r2, [r3, #64] + 4701 0014 42F01002 orr r2, r2, #16 + 4702 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3574 .loc 3 1076 3 view .LVU1162 + 4703 .loc 3 1076 3 view .LVU1500 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3575 .loc 3 1076 12 is_stmt 0 view .LVU1163 - 3576 001a 1B6C ldr r3, [r3, #64] - 3577 001c 03F01003 and r3, r3, #16 + 4704 .loc 3 1076 12 is_stmt 0 view .LVU1501 + 4705 001a 1B6C ldr r3, [r3, #64] + 4706 001c 03F01003 and r3, r3, #16 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 3578 .loc 3 1076 10 view .LVU1164 - 3579 0020 0093 str r3, [sp] + 4707 .loc 3 1076 10 view .LVU1502 + 4708 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3580 .loc 3 1077 3 is_stmt 1 view .LVU1165 - 3581 0022 009B ldr r3, [sp] - 3582 .LVL260: + 4709 .loc 3 1077 3 is_stmt 1 view .LVU1503 + 4710 0022 009B ldr r3, [sp] + 4711 .LVL394: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 3583 .loc 3 1077 3 is_stmt 0 view .LVU1166 - 3584 .LBE429: - 3585 .LBE428: -1386:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 3586 .loc 1 1386 3 is_stmt 1 view .LVU1167 - 3587 .LBB430: - 3588 .LBI430: + 4712 .loc 3 1077 3 is_stmt 0 view .LVU1504 + 4713 .LBE502: + 4714 .LBE501: +1517:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 4715 .loc 1 1517 3 is_stmt 1 view .LVU1505 + 4716 .LBB503: + 4717 .LBI503: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 3589 .loc 2 1884 26 view .LVU1168 - 3590 .LBB431: + 4718 .loc 2 1884 26 view .LVU1506 + 4719 .LBB504: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 3591 .loc 2 1886 3 view .LVU1169 + 4720 .loc 2 1886 3 view .LVU1507 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 3592 .loc 2 1886 26 is_stmt 0 view .LVU1170 - 3593 0024 164B ldr r3, .L127+4 - 3594 0026 D868 ldr r0, [r3, #12] - 3595 .LBE431: - 3596 .LBE430: -1386:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 3597 .loc 1 1386 3 discriminator 1 view .LVU1171 - 3598 0028 2246 mov r2, r4 - 3599 002a 2146 mov r1, r4 - 3600 002c C0F30220 ubfx r0, r0, #8, #3 - 3601 0030 FFF7FEFF bl NVIC_EncodePriority - 3602 .LVL261: - 3603 .LBB432: - 3604 .LBI432: - ARM GAS /tmp/ccO46DoU.s page 272 + 4721 .loc 2 1886 26 is_stmt 0 view .LVU1508 + 4722 0024 164B ldr r3, .L211+4 + 4723 0026 D868 ldr r0, [r3, #12] + 4724 .LBE504: + ARM GAS /tmp/ccYgfTud.s page 304 + 4725 .LBE503: +1517:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 4726 .loc 1 1517 3 discriminator 1 view .LVU1509 + 4727 0028 2246 mov r2, r4 + 4728 002a 2146 mov r1, r4 + 4729 002c C0F30220 ubfx r0, r0, #8, #3 + 4730 0030 FFF7FEFF bl NVIC_EncodePriority + 4731 .LVL395: + 4732 .LBB505: + 4733 .LBI505: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 3605 .loc 2 2024 22 is_stmt 1 view .LVU1172 - 3606 .LBB433: + 4734 .loc 2 2024 22 is_stmt 1 view .LVU1510 + 4735 .LBB506: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 3607 .loc 2 2026 3 view .LVU1173 + 4736 .loc 2 2026 3 view .LVU1511 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3608 .loc 2 2028 5 view .LVU1174 + 4737 .loc 2 2028 5 view .LVU1512 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3609 .loc 2 2028 49 is_stmt 0 view .LVU1175 - 3610 0034 0001 lsls r0, r0, #4 - 3611 .LVL262: + 4738 .loc 2 2028 49 is_stmt 0 view .LVU1513 + 4739 0034 0001 lsls r0, r0, #4 + 4740 .LVL396: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3612 .loc 2 2028 49 view .LVU1176 - 3613 0036 C0B2 uxtb r0, r0 + 4741 .loc 2 2028 49 view .LVU1514 + 4742 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3614 .loc 2 2028 47 view .LVU1177 - 3615 0038 124B ldr r3, .L127+8 - 3616 003a 83F83603 strb r0, [r3, #822] - 3617 .LVL263: + 4743 .loc 2 2028 47 view .LVU1515 + 4744 0038 124B ldr r3, .L211+8 + 4745 003a 83F83603 strb r0, [r3, #822] + 4746 .LVL397: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 3618 .loc 2 2028 47 view .LVU1178 - 3619 .LBE433: - 3620 .LBE432: -1387:Src/main.c **** - 3621 .loc 1 1387 3 is_stmt 1 view .LVU1179 - 3622 .LBB434: - 3623 .LBI434: + 4747 .loc 2 2028 47 view .LVU1516 + 4748 .LBE506: + 4749 .LBE505: +1518:Src/main.c **** + 4750 .loc 1 1518 3 is_stmt 1 view .LVU1517 + 4751 .LBB507: + 4752 .LBI507: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 3624 .loc 2 1896 22 view .LVU1180 - 3625 .LBB435: + 4753 .loc 2 1896 22 view .LVU1518 + 4754 .LBB508: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 3626 .loc 2 1898 3 view .LVU1181 + 4755 .loc 2 1898 3 view .LVU1519 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3627 .loc 2 1900 5 view .LVU1182 + 4756 .loc 2 1900 5 view .LVU1520 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3628 .loc 2 1900 43 is_stmt 0 view .LVU1183 - 3629 003e 4FF48002 mov r2, #4194304 - 3630 0042 5A60 str r2, [r3, #4] - 3631 .LVL264: + 4757 .loc 2 1900 43 is_stmt 0 view .LVU1521 + 4758 003e 4FF48002 mov r2, #4194304 + 4759 0042 5A60 str r2, [r3, #4] + 4760 .LVL398: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 3632 .loc 2 1900 43 view .LVU1184 - 3633 .LBE435: - 3634 .LBE434: -1392:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3635 .loc 1 1392 3 is_stmt 1 view .LVU1185 -1392:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3636 .loc 1 1392 28 is_stmt 0 view .LVU1186 - 3637 0044 4BF2AF33 movw r3, #45999 - 3638 0048 ADF80430 strh r3, [sp, #4] @ movhi -1393:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 3639 .loc 1 1393 3 is_stmt 1 view .LVU1187 -1393:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 3640 .loc 1 1393 30 is_stmt 0 view .LVU1188 - 3641 004c 0294 str r4, [sp, #8] -1394:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 3642 .loc 1 1394 3 is_stmt 1 view .LVU1189 -1394:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - ARM GAS /tmp/ccO46DoU.s page 273 + 4761 .loc 2 1900 43 view .LVU1522 + 4762 .LBE508: + 4763 .LBE507: +1523:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 4764 .loc 1 1523 3 is_stmt 1 view .LVU1523 +1523:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 4765 .loc 1 1523 28 is_stmt 0 view .LVU1524 + ARM GAS /tmp/ccYgfTud.s page 305 - 3643 .loc 1 1394 29 is_stmt 0 view .LVU1190 - 3644 004e 1323 movs r3, #19 - 3645 0050 0393 str r3, [sp, #12] -1395:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); - 3646 .loc 1 1395 3 is_stmt 1 view .LVU1191 - 3647 0052 0D4C ldr r4, .L127+12 - 3648 0054 01A9 add r1, sp, #4 - 3649 0056 2046 mov r0, r4 - 3650 0058 FFF7FEFF bl LL_TIM_Init - 3651 .LVL265: -1396:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); - 3652 .loc 1 1396 3 view .LVU1192 - 3653 .LBB436: - 3654 .LBI436: + 4766 0044 4BF2AF33 movw r3, #45999 + 4767 0048 ADF80430 strh r3, [sp, #4] @ movhi +1524:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 4768 .loc 1 1524 3 is_stmt 1 view .LVU1525 +1524:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 4769 .loc 1 1524 30 is_stmt 0 view .LVU1526 + 4770 004c 0294 str r4, [sp, #8] +1525:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 4771 .loc 1 1525 3 is_stmt 1 view .LVU1527 +1525:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 4772 .loc 1 1525 29 is_stmt 0 view .LVU1528 + 4773 004e 1323 movs r3, #19 + 4774 0050 0393 str r3, [sp, #12] +1526:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); + 4775 .loc 1 1526 3 is_stmt 1 view .LVU1529 + 4776 0052 0D4C ldr r4, .L211+12 + 4777 0054 01A9 add r1, sp, #4 + 4778 0056 2046 mov r0, r4 + 4779 0058 FFF7FEFF bl LL_TIM_Init + 4780 .LVL399: +1527:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); + 4781 .loc 1 1527 3 view .LVU1530 + 4782 .LBB509: + 4783 .LBI509: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3655 .loc 5 1504 22 view .LVU1193 - 3656 .LBB437: + 4784 .loc 5 1504 22 view .LVU1531 + 4785 .LBB510: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3657 .loc 5 1506 3 view .LVU1194 - 3658 005c 2368 ldr r3, [r4] - 3659 005e 23F08003 bic r3, r3, #128 - 3660 0062 2360 str r3, [r4] - 3661 .LVL266: + 4786 .loc 5 1506 3 view .LVU1532 + 4787 005c 2368 ldr r3, [r4] + 4788 005e 23F08003 bic r3, r3, #128 + 4789 0062 2360 str r3, [r4] + 4790 .LVL400: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3662 .loc 5 1506 3 is_stmt 0 view .LVU1195 - 3663 .LBE437: - 3664 .LBE436: -1397:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); - 3665 .loc 1 1397 3 is_stmt 1 view .LVU1196 - 3666 .LBB438: - 3667 .LBI438: + 4791 .loc 5 1506 3 is_stmt 0 view .LVU1533 + 4792 .LBE510: + 4793 .LBE509: +1528:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); + 4794 .loc 1 1528 3 is_stmt 1 view .LVU1534 + 4795 .LBB511: + 4796 .LBI511: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3668 .loc 5 3138 22 view .LVU1197 - 3669 .LBB439: + 4797 .loc 5 3138 22 view .LVU1535 + 4798 .LBB512: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3670 .loc 5 3140 3 view .LVU1198 - 3671 0064 6368 ldr r3, [r4, #4] - 3672 0066 23F07003 bic r3, r3, #112 - 3673 006a 43F01003 orr r3, r3, #16 - 3674 006e 6360 str r3, [r4, #4] - 3675 .LVL267: + 4799 .loc 5 3140 3 view .LVU1536 + 4800 0064 6368 ldr r3, [r4, #4] + 4801 0066 23F07003 bic r3, r3, #112 + 4802 006a 43F01003 orr r3, r3, #16 + 4803 006e 6360 str r3, [r4, #4] + 4804 .LVL401: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3676 .loc 5 3140 3 is_stmt 0 view .LVU1199 - 3677 .LBE439: - 3678 .LBE438: -1398:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ - 3679 .loc 1 1398 3 is_stmt 1 view .LVU1200 - 3680 .LBB440: - 3681 .LBI440: + 4805 .loc 5 3140 3 is_stmt 0 view .LVU1537 + 4806 .LBE512: + 4807 .LBE511: +1529:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ + 4808 .loc 1 1529 3 is_stmt 1 view .LVU1538 + ARM GAS /tmp/ccYgfTud.s page 306 + + + 4809 .LBB513: + 4810 .LBI513: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3682 .loc 5 3235 22 view .LVU1201 - 3683 .LBB441: - 3684 .loc 5 3237 3 view .LVU1202 - 3685 0070 A368 ldr r3, [r4, #8] - 3686 0072 23F08003 bic r3, r3, #128 - 3687 0076 A360 str r3, [r4, #8] - 3688 .LVL268: - ARM GAS /tmp/ccO46DoU.s page 274 + 4811 .loc 5 3235 22 view .LVU1539 + 4812 .LBB514: + 4813 .loc 5 3237 3 view .LVU1540 + 4814 0070 A368 ldr r3, [r4, #8] + 4815 0072 23F08003 bic r3, r3, #128 + 4816 0076 A360 str r3, [r4, #8] + 4817 .LVL402: + 4818 .loc 5 3237 3 is_stmt 0 view .LVU1541 + 4819 .LBE514: + 4820 .LBE513: +1534:Src/main.c **** + 4821 .loc 1 1534 1 view .LVU1542 + 4822 0078 06B0 add sp, sp, #24 + 4823 .LCFI52: + 4824 .cfi_def_cfa_offset 8 + 4825 @ sp needed + 4826 007a 10BD pop {r4, pc} + 4827 .L212: + 4828 .align 2 + 4829 .L211: + 4830 007c 00380240 .word 1073887232 + 4831 0080 00ED00E0 .word -536810240 + 4832 0084 00E100E0 .word -536813312 + 4833 0088 00100040 .word 1073745920 + 4834 .cfi_endproc + 4835 .LFE1198: + 4837 .section .rodata.Init_params.str1.4,"aMS",%progbits,1 + 4838 .align 2 + 4839 .LC0: + 4840 0000 2F00 .ascii "/\000" + 4841 0002 0000 .align 2 + 4842 .LC1: + 4843 0004 434F4D4D .ascii "COMMAND.TXT\000" + 4843 414E442E + 4843 54585400 + 4844 .section .text.Init_params,"ax",%progbits + 4845 .align 1 + 4846 .syntax unified + 4847 .thumb + 4848 .thumb_func + 4850 Init_params: + 4851 .LFB1207: +2004:Src/main.c **** TO6 = 0; + 4852 .loc 1 2004 1 is_stmt 1 view -0 + 4853 .cfi_startproc + 4854 @ args = 0, pretend = 0, frame = 0 + 4855 @ frame_needed = 0, uses_anonymous_args = 0 + 4856 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 4857 .LCFI53: + 4858 .cfi_def_cfa_offset 24 + 4859 .cfi_offset 4, -24 + 4860 .cfi_offset 5, -20 + 4861 .cfi_offset 6, -16 + 4862 .cfi_offset 7, -12 + ARM GAS /tmp/ccYgfTud.s page 307 - 3689 .loc 5 3237 3 is_stmt 0 view .LVU1203 - 3690 .LBE441: - 3691 .LBE440: -1403:Src/main.c **** - 3692 .loc 1 1403 1 view .LVU1204 - 3693 0078 06B0 add sp, sp, #24 - 3694 .LCFI38: - 3695 .cfi_def_cfa_offset 8 - 3696 @ sp needed - 3697 007a 10BD pop {r4, pc} - 3698 .L128: - 3699 .align 2 - 3700 .L127: - 3701 007c 00380240 .word 1073887232 - 3702 0080 00ED00E0 .word -536810240 - 3703 0084 00E100E0 .word -536813312 - 3704 0088 00100040 .word 1073745920 - 3705 .cfi_endproc - 3706 .LFE1198: - 3708 .section .rodata.Init_params.str1.4,"aMS",%progbits,1 - 3709 .align 2 - 3710 .LC0: - 3711 0000 2F00 .ascii "/\000" - 3712 0002 0000 .align 2 - 3713 .LC1: - 3714 0004 434F4D4D .ascii "COMMAND.TXT\000" - 3714 414E442E - 3714 54585400 - 3715 .section .text.Init_params,"ax",%progbits - 3716 .align 1 - 3717 .syntax unified - 3718 .thumb - 3719 .thumb_func - 3721 Init_params: - 3722 .LFB1207: -1871:Src/main.c **** TO6 = 0; - 3723 .loc 1 1871 1 is_stmt 1 view -0 - 3724 .cfi_startproc - 3725 @ args = 0, pretend = 0, frame = 0 - 3726 @ frame_needed = 0, uses_anonymous_args = 0 - 3727 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 3728 .LCFI39: - 3729 .cfi_def_cfa_offset 24 - 3730 .cfi_offset 4, -24 - 3731 .cfi_offset 5, -20 - 3732 .cfi_offset 6, -16 - 3733 .cfi_offset 7, -12 - 3734 .cfi_offset 8, -8 - 3735 .cfi_offset 14, -4 -1872:Src/main.c **** TO7 = 0; - 3736 .loc 1 1872 2 view .LVU1206 -1872:Src/main.c **** TO7 = 0; - 3737 .loc 1 1872 6 is_stmt 0 view .LVU1207 - 3738 0004 0023 movs r3, #0 - 3739 0006 9E4A ldr r2, .L141 - 3740 0008 1360 str r3, [r2] -1873:Src/main.c **** TO7_before = 0; - ARM GAS /tmp/ccO46DoU.s page 275 + 4863 .cfi_offset 8, -8 + 4864 .cfi_offset 14, -4 +2005:Src/main.c **** TO7 = 0; + 4865 .loc 1 2005 2 view .LVU1544 +2005:Src/main.c **** TO7 = 0; + 4866 .loc 1 2005 6 is_stmt 0 view .LVU1545 + 4867 0004 0023 movs r3, #0 + 4868 0006 9F4A ldr r2, .L225 + 4869 0008 1360 str r3, [r2] +2006:Src/main.c **** TO7_before = 0; + 4870 .loc 1 2006 2 is_stmt 1 view .LVU1546 +2006:Src/main.c **** TO7_before = 0; + 4871 .loc 1 2006 6 is_stmt 0 view .LVU1547 + 4872 000a 9F4A ldr r2, .L225+4 + 4873 000c 1360 str r3, [r2] +2007:Src/main.c **** TO6_before = 0; + 4874 .loc 1 2007 2 is_stmt 1 view .LVU1548 +2007:Src/main.c **** TO6_before = 0; + 4875 .loc 1 2007 13 is_stmt 0 view .LVU1549 + 4876 000e 9F4A ldr r2, .L225+8 + 4877 0010 1360 str r3, [r2] +2008:Src/main.c **** TO6_uart = 0; + 4878 .loc 1 2008 2 is_stmt 1 view .LVU1550 +2008:Src/main.c **** TO6_uart = 0; + 4879 .loc 1 2008 13 is_stmt 0 view .LVU1551 + 4880 0012 9F4A ldr r2, .L225+12 + 4881 0014 1360 str r3, [r2] +2009:Src/main.c **** flg_tmt = 0; + 4882 .loc 1 2009 2 is_stmt 1 view .LVU1552 +2009:Src/main.c **** flg_tmt = 0; + 4883 .loc 1 2009 11 is_stmt 0 view .LVU1553 + 4884 0016 9F4A ldr r2, .L225+16 + 4885 0018 1360 str r3, [r2] +2010:Src/main.c **** UART_rec_incr = 0; + 4886 .loc 1 2010 2 is_stmt 1 view .LVU1554 +2010:Src/main.c **** UART_rec_incr = 0; + 4887 .loc 1 2010 10 is_stmt 0 view .LVU1555 + 4888 001a 9F4A ldr r2, .L225+20 + 4889 001c 1370 strb r3, [r2] +2011:Src/main.c **** fgoto = 0; + 4890 .loc 1 2011 2 is_stmt 1 view .LVU1556 +2011:Src/main.c **** fgoto = 0; + 4891 .loc 1 2011 16 is_stmt 0 view .LVU1557 + 4892 001e 9F4A ldr r2, .L225+24 + 4893 0020 1380 strh r3, [r2] @ movhi +2012:Src/main.c **** sizeoffile = 0; + 4894 .loc 1 2012 2 is_stmt 1 view .LVU1558 +2012:Src/main.c **** sizeoffile = 0; + 4895 .loc 1 2012 8 is_stmt 0 view .LVU1559 + 4896 0022 9F4A ldr r2, .L225+28 + 4897 0024 1360 str r3, [r2] +2013:Src/main.c **** u_tx_flg = 0; + 4898 .loc 1 2013 2 is_stmt 1 view .LVU1560 +2013:Src/main.c **** u_tx_flg = 0; + 4899 .loc 1 2013 13 is_stmt 0 view .LVU1561 + 4900 0026 9F4A ldr r2, .L225+32 + 4901 0028 1360 str r3, [r2] + ARM GAS /tmp/ccYgfTud.s page 308 - 3741 .loc 1 1873 2 is_stmt 1 view .LVU1208 -1873:Src/main.c **** TO7_before = 0; - 3742 .loc 1 1873 6 is_stmt 0 view .LVU1209 - 3743 000a 9E4A ldr r2, .L141+4 - 3744 000c 1360 str r3, [r2] -1874:Src/main.c **** TO6_before = 0; - 3745 .loc 1 1874 2 is_stmt 1 view .LVU1210 -1874:Src/main.c **** TO6_before = 0; - 3746 .loc 1 1874 13 is_stmt 0 view .LVU1211 - 3747 000e 9E4A ldr r2, .L141+8 - 3748 0010 1360 str r3, [r2] -1875:Src/main.c **** TO6_uart = 0; - 3749 .loc 1 1875 2 is_stmt 1 view .LVU1212 -1875:Src/main.c **** TO6_uart = 0; - 3750 .loc 1 1875 13 is_stmt 0 view .LVU1213 - 3751 0012 9E4A ldr r2, .L141+12 - 3752 0014 1360 str r3, [r2] -1876:Src/main.c **** flg_tmt = 0; - 3753 .loc 1 1876 2 is_stmt 1 view .LVU1214 -1876:Src/main.c **** flg_tmt = 0; - 3754 .loc 1 1876 11 is_stmt 0 view .LVU1215 - 3755 0016 9E4A ldr r2, .L141+16 - 3756 0018 1360 str r3, [r2] -1877:Src/main.c **** UART_rec_incr = 0; - 3757 .loc 1 1877 2 is_stmt 1 view .LVU1216 -1877:Src/main.c **** UART_rec_incr = 0; - 3758 .loc 1 1877 10 is_stmt 0 view .LVU1217 - 3759 001a 9E4A ldr r2, .L141+20 - 3760 001c 1370 strb r3, [r2] -1878:Src/main.c **** fgoto = 0; - 3761 .loc 1 1878 2 is_stmt 1 view .LVU1218 -1878:Src/main.c **** fgoto = 0; - 3762 .loc 1 1878 16 is_stmt 0 view .LVU1219 - 3763 001e 9E4A ldr r2, .L141+24 - 3764 0020 1380 strh r3, [r2] @ movhi -1879:Src/main.c **** sizeoffile = 0; - 3765 .loc 1 1879 2 is_stmt 1 view .LVU1220 -1879:Src/main.c **** sizeoffile = 0; - 3766 .loc 1 1879 8 is_stmt 0 view .LVU1221 - 3767 0022 9E4A ldr r2, .L141+28 - 3768 0024 1360 str r3, [r2] -1880:Src/main.c **** u_tx_flg = 0; - 3769 .loc 1 1880 2 is_stmt 1 view .LVU1222 -1880:Src/main.c **** u_tx_flg = 0; - 3770 .loc 1 1880 13 is_stmt 0 view .LVU1223 - 3771 0026 9E4A ldr r2, .L141+32 - 3772 0028 1360 str r3, [r2] -1881:Src/main.c **** u_rx_flg = 0; - 3773 .loc 1 1881 2 is_stmt 1 view .LVU1224 -1881:Src/main.c **** u_rx_flg = 0; - 3774 .loc 1 1881 11 is_stmt 0 view .LVU1225 - 3775 002a 9E4A ldr r2, .L141+36 - 3776 002c 1370 strb r3, [r2] -1882:Src/main.c **** //State_Data[0]=0; - 3777 .loc 1 1882 2 is_stmt 1 view .LVU1226 -1882:Src/main.c **** //State_Data[0]=0; - 3778 .loc 1 1882 11 is_stmt 0 view .LVU1227 - ARM GAS /tmp/ccO46DoU.s page 276 +2014:Src/main.c **** u_rx_flg = 0; + 4902 .loc 1 2014 2 is_stmt 1 view .LVU1562 +2014:Src/main.c **** u_rx_flg = 0; + 4903 .loc 1 2014 11 is_stmt 0 view .LVU1563 + 4904 002a 9F4A ldr r2, .L225+36 + 4905 002c 1370 strb r3, [r2] +2015:Src/main.c **** //State_Data[0]=0; + 4906 .loc 1 2015 2 is_stmt 1 view .LVU1564 +2015:Src/main.c **** //State_Data[0]=0; + 4907 .loc 1 2015 11 is_stmt 0 view .LVU1565 + 4908 002e 9F4A ldr r2, .L225+40 + 4909 0030 1370 strb r3, [r2] +2018:Src/main.c **** { + 4910 .loc 1 2018 2 is_stmt 1 view .LVU1566 + 4911 .LBB515: +2018:Src/main.c **** { + 4912 .loc 1 2018 7 view .LVU1567 + 4913 .LVL403: +2018:Src/main.c **** { + 4914 .loc 1 2018 2 is_stmt 0 view .LVU1568 + 4915 0032 05E0 b .L214 + 4916 .LVL404: + 4917 .L215: +2020:Src/main.c **** } + 4918 .loc 1 2020 3 is_stmt 1 view .LVU1569 +2020:Src/main.c **** } + 4919 .loc 1 2020 16 is_stmt 0 view .LVU1570 + 4920 0034 9E4A ldr r2, .L225+44 + 4921 0036 0021 movs r1, #0 + 4922 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi +2018:Src/main.c **** { + 4923 .loc 1 2018 31 is_stmt 1 discriminator 3 view .LVU1571 + 4924 003c 0133 adds r3, r3, #1 + 4925 .LVL405: +2018:Src/main.c **** { + 4926 .loc 1 2018 31 is_stmt 0 discriminator 3 view .LVU1572 + 4927 003e 9BB2 uxth r3, r3 + 4928 .LVL406: + 4929 .L214: +2018:Src/main.c **** { + 4930 .loc 1 2018 22 is_stmt 1 discriminator 1 view .LVU1573 + 4931 0040 0E2B cmp r3, #14 + 4932 0042 F7D9 bls .L215 + 4933 .LBE515: +2022:Src/main.c **** + 4934 .loc 1 2022 2 view .LVU1574 +2022:Src/main.c **** + 4935 .loc 1 2022 14 is_stmt 0 view .LVU1575 + 4936 0044 9A4B ldr r3, .L225+44 + 4937 .LVL407: +2022:Src/main.c **** + 4938 .loc 1 2022 14 view .LVU1576 + 4939 0046 41F21112 movw r2, #4369 + 4940 004a 1A80 strh r2, [r3] @ movhi +2025:Src/main.c **** Def_setup.LD1_EN = 0; + 4941 .loc 1 2025 2 is_stmt 1 view .LVU1577 +2025:Src/main.c **** Def_setup.LD1_EN = 0; + ARM GAS /tmp/ccYgfTud.s page 309 - 3779 002e 9E4A ldr r2, .L141+40 - 3780 0030 1370 strb r3, [r2] -1885:Src/main.c **** { - 3781 .loc 1 1885 2 is_stmt 1 view .LVU1228 - 3782 .LBB442: -1885:Src/main.c **** { - 3783 .loc 1 1885 7 view .LVU1229 - 3784 .LVL269: -1885:Src/main.c **** { - 3785 .loc 1 1885 2 is_stmt 0 view .LVU1230 - 3786 0032 05E0 b .L130 - 3787 .LVL270: - 3788 .L131: -1887:Src/main.c **** } - 3789 .loc 1 1887 3 is_stmt 1 view .LVU1231 -1887:Src/main.c **** } - 3790 .loc 1 1887 16 is_stmt 0 view .LVU1232 - 3791 0034 9D4A ldr r2, .L141+44 - 3792 0036 0021 movs r1, #0 - 3793 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi -1885:Src/main.c **** { - 3794 .loc 1 1885 31 is_stmt 1 discriminator 3 view .LVU1233 - 3795 003c 0133 adds r3, r3, #1 - 3796 .LVL271: -1885:Src/main.c **** { - 3797 .loc 1 1885 31 is_stmt 0 discriminator 3 view .LVU1234 - 3798 003e 9BB2 uxth r3, r3 - 3799 .LVL272: - 3800 .L130: -1885:Src/main.c **** { - 3801 .loc 1 1885 22 is_stmt 1 discriminator 1 view .LVU1235 - 3802 0040 0E2B cmp r3, #14 - 3803 0042 F7D9 bls .L131 - 3804 .LBE442: -1889:Src/main.c **** - 3805 .loc 1 1889 2 view .LVU1236 -1889:Src/main.c **** - 3806 .loc 1 1889 14 is_stmt 0 view .LVU1237 - 3807 0044 994B ldr r3, .L141+44 - 3808 .LVL273: -1889:Src/main.c **** - 3809 .loc 1 1889 14 view .LVU1238 - 3810 0046 41F21112 movw r2, #4369 - 3811 004a 1A80 strh r2, [r3] @ movhi -1892:Src/main.c **** Def_setup.LD1_EN = 0; - 3812 .loc 1 1892 2 is_stmt 1 view .LVU1239 -1892:Src/main.c **** Def_setup.LD1_EN = 0; - 3813 .loc 1 1892 21 is_stmt 0 view .LVU1240 - 3814 004c 984B ldr r3, .L141+48 - 3815 004e 0022 movs r2, #0 - 3816 0050 DA81 strh r2, [r3, #14] @ movhi -1893:Src/main.c **** Def_setup.LD2_EN = 0; - 3817 .loc 1 1893 2 is_stmt 1 view .LVU1241 -1893:Src/main.c **** Def_setup.LD2_EN = 0; - 3818 .loc 1 1893 19 is_stmt 0 view .LVU1242 - 3819 0052 DA70 strb r2, [r3, #3] -1894:Src/main.c **** Def_setup.MES_ID = 0; - ARM GAS /tmp/ccO46DoU.s page 277 + 4942 .loc 1 2025 21 is_stmt 0 view .LVU1578 + 4943 004c 994B ldr r3, .L225+48 + 4944 004e 0022 movs r2, #0 + 4945 0050 DA81 strh r2, [r3, #14] @ movhi +2026:Src/main.c **** Def_setup.LD2_EN = 0; + 4946 .loc 1 2026 2 is_stmt 1 view .LVU1579 +2026:Src/main.c **** Def_setup.LD2_EN = 0; + 4947 .loc 1 2026 19 is_stmt 0 view .LVU1580 + 4948 0052 DA70 strb r2, [r3, #3] +2027:Src/main.c **** Def_setup.MES_ID = 0; + 4949 .loc 1 2027 2 is_stmt 1 view .LVU1581 +2027:Src/main.c **** Def_setup.MES_ID = 0; + 4950 .loc 1 2027 19 is_stmt 0 view .LVU1582 + 4951 0054 1A71 strb r2, [r3, #4] +2028:Src/main.c **** Def_setup.PI1_RD = 0; + 4952 .loc 1 2028 2 is_stmt 1 view .LVU1583 +2028:Src/main.c **** Def_setup.PI1_RD = 0; + 4953 .loc 1 2028 19 is_stmt 0 view .LVU1584 + 4954 0056 1A82 strh r2, [r3, #16] @ movhi +2029:Src/main.c **** Def_setup.PI2_RD = 0; + 4955 .loc 1 2029 2 is_stmt 1 view .LVU1585 +2029:Src/main.c **** Def_setup.PI2_RD = 0; + 4956 .loc 1 2029 19 is_stmt 0 view .LVU1586 + 4957 0058 1A73 strb r2, [r3, #12] +2030:Src/main.c **** Def_setup.REF1_EN = 0; + 4958 .loc 1 2030 2 is_stmt 1 view .LVU1587 +2030:Src/main.c **** Def_setup.REF1_EN = 0; + 4959 .loc 1 2030 19 is_stmt 0 view .LVU1588 + 4960 005a 5A73 strb r2, [r3, #13] +2031:Src/main.c **** Def_setup.REF2_EN = 0; + 4961 .loc 1 2031 2 is_stmt 1 view .LVU1589 +2031:Src/main.c **** Def_setup.REF2_EN = 0; + 4962 .loc 1 2031 20 is_stmt 0 view .LVU1590 + 4963 005c 5A71 strb r2, [r3, #5] +2032:Src/main.c **** Def_setup.SD_EN = 0; + 4964 .loc 1 2032 2 is_stmt 1 view .LVU1591 +2032:Src/main.c **** Def_setup.SD_EN = 0; + 4965 .loc 1 2032 20 is_stmt 0 view .LVU1592 + 4966 005e 9A71 strb r2, [r3, #6] +2033:Src/main.c **** Def_setup.TEC1_EN = 0; + 4967 .loc 1 2033 2 is_stmt 1 view .LVU1593 +2033:Src/main.c **** Def_setup.TEC1_EN = 0; + 4968 .loc 1 2033 18 is_stmt 0 view .LVU1594 + 4969 0060 DA72 strb r2, [r3, #11] +2034:Src/main.c **** Def_setup.TEC2_EN = 0; + 4970 .loc 1 2034 2 is_stmt 1 view .LVU1595 +2034:Src/main.c **** Def_setup.TEC2_EN = 0; + 4971 .loc 1 2034 20 is_stmt 0 view .LVU1596 + 4972 0062 DA71 strb r2, [r3, #7] +2035:Src/main.c **** Def_setup.TS1_EN = 0; + 4973 .loc 1 2035 2 is_stmt 1 view .LVU1597 +2035:Src/main.c **** Def_setup.TS1_EN = 0; + 4974 .loc 1 2035 20 is_stmt 0 view .LVU1598 + 4975 0064 1A72 strb r2, [r3, #8] +2036:Src/main.c **** Def_setup.TS2_EN = 0; + 4976 .loc 1 2036 2 is_stmt 1 view .LVU1599 +2036:Src/main.c **** Def_setup.TS2_EN = 0; + ARM GAS /tmp/ccYgfTud.s page 310 - 3820 .loc 1 1894 2 is_stmt 1 view .LVU1243 -1894:Src/main.c **** Def_setup.MES_ID = 0; - 3821 .loc 1 1894 19 is_stmt 0 view .LVU1244 - 3822 0054 1A71 strb r2, [r3, #4] -1895:Src/main.c **** Def_setup.PI1_RD = 0; - 3823 .loc 1 1895 2 is_stmt 1 view .LVU1245 -1895:Src/main.c **** Def_setup.PI1_RD = 0; - 3824 .loc 1 1895 19 is_stmt 0 view .LVU1246 - 3825 0056 1A82 strh r2, [r3, #16] @ movhi -1896:Src/main.c **** Def_setup.PI2_RD = 0; - 3826 .loc 1 1896 2 is_stmt 1 view .LVU1247 -1896:Src/main.c **** Def_setup.PI2_RD = 0; - 3827 .loc 1 1896 19 is_stmt 0 view .LVU1248 - 3828 0058 1A73 strb r2, [r3, #12] -1897:Src/main.c **** Def_setup.REF1_EN = 0; - 3829 .loc 1 1897 2 is_stmt 1 view .LVU1249 -1897:Src/main.c **** Def_setup.REF1_EN = 0; - 3830 .loc 1 1897 19 is_stmt 0 view .LVU1250 - 3831 005a 5A73 strb r2, [r3, #13] -1898:Src/main.c **** Def_setup.REF2_EN = 0; - 3832 .loc 1 1898 2 is_stmt 1 view .LVU1251 -1898:Src/main.c **** Def_setup.REF2_EN = 0; - 3833 .loc 1 1898 20 is_stmt 0 view .LVU1252 - 3834 005c 5A71 strb r2, [r3, #5] -1899:Src/main.c **** Def_setup.SD_EN = 0; - 3835 .loc 1 1899 2 is_stmt 1 view .LVU1253 -1899:Src/main.c **** Def_setup.SD_EN = 0; - 3836 .loc 1 1899 20 is_stmt 0 view .LVU1254 - 3837 005e 9A71 strb r2, [r3, #6] -1900:Src/main.c **** Def_setup.TEC1_EN = 0; - 3838 .loc 1 1900 2 is_stmt 1 view .LVU1255 -1900:Src/main.c **** Def_setup.TEC1_EN = 0; - 3839 .loc 1 1900 18 is_stmt 0 view .LVU1256 - 3840 0060 DA72 strb r2, [r3, #11] -1901:Src/main.c **** Def_setup.TEC2_EN = 0; - 3841 .loc 1 1901 2 is_stmt 1 view .LVU1257 -1901:Src/main.c **** Def_setup.TEC2_EN = 0; - 3842 .loc 1 1901 20 is_stmt 0 view .LVU1258 - 3843 0062 DA71 strb r2, [r3, #7] -1902:Src/main.c **** Def_setup.TS1_EN = 0; - 3844 .loc 1 1902 2 is_stmt 1 view .LVU1259 -1902:Src/main.c **** Def_setup.TS1_EN = 0; - 3845 .loc 1 1902 20 is_stmt 0 view .LVU1260 - 3846 0064 1A72 strb r2, [r3, #8] -1903:Src/main.c **** Def_setup.TS2_EN = 0; - 3847 .loc 1 1903 2 is_stmt 1 view .LVU1261 -1903:Src/main.c **** Def_setup.TS2_EN = 0; - 3848 .loc 1 1903 19 is_stmt 0 view .LVU1262 - 3849 0066 5A72 strb r2, [r3, #9] -1904:Src/main.c **** Def_setup.U5V1_EN = 0; - 3850 .loc 1 1904 2 is_stmt 1 view .LVU1263 -1904:Src/main.c **** Def_setup.U5V1_EN = 0; - 3851 .loc 1 1904 19 is_stmt 0 view .LVU1264 - 3852 0068 9A72 strb r2, [r3, #10] -1905:Src/main.c **** Def_setup.U5V2_EN = 0; - 3853 .loc 1 1905 2 is_stmt 1 view .LVU1265 -1905:Src/main.c **** Def_setup.U5V2_EN = 0; - ARM GAS /tmp/ccO46DoU.s page 278 + 4977 .loc 1 2036 19 is_stmt 0 view .LVU1600 + 4978 0066 5A72 strb r2, [r3, #9] +2037:Src/main.c **** Def_setup.U5V1_EN = 0; + 4979 .loc 1 2037 2 is_stmt 1 view .LVU1601 +2037:Src/main.c **** Def_setup.U5V1_EN = 0; + 4980 .loc 1 2037 19 is_stmt 0 view .LVU1602 + 4981 0068 9A72 strb r2, [r3, #10] +2038:Src/main.c **** Def_setup.U5V2_EN = 0; + 4982 .loc 1 2038 2 is_stmt 1 view .LVU1603 +2038:Src/main.c **** Def_setup.U5V2_EN = 0; + 4983 .loc 1 2038 20 is_stmt 0 view .LVU1604 + 4984 006a 5A70 strb r2, [r3, #1] +2039:Src/main.c **** Def_setup.WORK_EN = 0; + 4985 .loc 1 2039 2 is_stmt 1 view .LVU1605 +2039:Src/main.c **** Def_setup.WORK_EN = 0; + 4986 .loc 1 2039 20 is_stmt 0 view .LVU1606 + 4987 006c 9A70 strb r2, [r3, #2] +2040:Src/main.c **** + 4988 .loc 1 2040 2 is_stmt 1 view .LVU1607 +2040:Src/main.c **** + 4989 .loc 1 2040 20 is_stmt 0 view .LVU1608 + 4990 006e 1A70 strb r2, [r3] +2042:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 4991 .loc 1 2042 2 is_stmt 1 view .LVU1609 +2042:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 4992 .loc 1 2042 24 is_stmt 0 view .LVU1610 + 4993 0070 914D ldr r5, .L225+52 + 4994 0072 2A80 strh r2, [r5] @ movhi +2043:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 4995 .loc 1 2043 2 is_stmt 1 view .LVU1611 +2043:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 4996 .loc 1 2043 24 is_stmt 0 view .LVU1612 + 4997 0074 914C ldr r4, .L225+56 + 4998 0076 2280 strh r2, [r4] @ movhi +2044:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 4999 .loc 1 2044 2 is_stmt 1 view .LVU1613 +2044:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 5000 .loc 1 2044 28 is_stmt 0 view .LVU1614 + 5001 0078 0022 movs r2, #0 + 5002 007a 6A60 str r2, [r5, #4] @ float +2045:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 5003 .loc 1 2045 2 is_stmt 1 view .LVU1615 +2045:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 5004 .loc 1 2045 28 is_stmt 0 view .LVU1616 + 5005 007c 6260 str r2, [r4, #4] @ float +2046:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 5006 .loc 1 2046 2 is_stmt 1 view .LVU1617 +2046:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 5007 .loc 1 2046 28 is_stmt 0 view .LVU1618 + 5008 007e AA60 str r2, [r5, #8] @ float +2047:Src/main.c **** + 5009 .loc 1 2047 2 is_stmt 1 view .LVU1619 +2047:Src/main.c **** + 5010 .loc 1 2047 28 is_stmt 0 view .LVU1620 + 5011 0080 A260 str r2, [r4, #8] @ float +2050:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 5012 .loc 1 2050 2 is_stmt 1 view .LVU1621 + ARM GAS /tmp/ccYgfTud.s page 311 - 3854 .loc 1 1905 20 is_stmt 0 view .LVU1266 - 3855 006a 5A70 strb r2, [r3, #1] -1906:Src/main.c **** Def_setup.WORK_EN = 0; - 3856 .loc 1 1906 2 is_stmt 1 view .LVU1267 -1906:Src/main.c **** Def_setup.WORK_EN = 0; - 3857 .loc 1 1906 20 is_stmt 0 view .LVU1268 - 3858 006c 9A70 strb r2, [r3, #2] -1907:Src/main.c **** - 3859 .loc 1 1907 2 is_stmt 1 view .LVU1269 -1907:Src/main.c **** - 3860 .loc 1 1907 20 is_stmt 0 view .LVU1270 - 3861 006e 1A70 strb r2, [r3] -1909:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 3862 .loc 1 1909 2 is_stmt 1 view .LVU1271 -1909:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 3863 .loc 1 1909 24 is_stmt 0 view .LVU1272 - 3864 0070 904D ldr r5, .L141+52 - 3865 0072 2A80 strh r2, [r5] @ movhi -1910:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 3866 .loc 1 1910 2 is_stmt 1 view .LVU1273 -1910:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 3867 .loc 1 1910 24 is_stmt 0 view .LVU1274 - 3868 0074 904C ldr r4, .L141+56 - 3869 0076 2280 strh r2, [r4] @ movhi -1911:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 3870 .loc 1 1911 2 is_stmt 1 view .LVU1275 -1911:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 3871 .loc 1 1911 28 is_stmt 0 view .LVU1276 - 3872 0078 0022 movs r2, #0 - 3873 007a 6A60 str r2, [r5, #4] @ float -1912:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 3874 .loc 1 1912 2 is_stmt 1 view .LVU1277 -1912:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 3875 .loc 1 1912 28 is_stmt 0 view .LVU1278 - 3876 007c 6260 str r2, [r4, #4] @ float -1913:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 3877 .loc 1 1913 2 is_stmt 1 view .LVU1279 -1913:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 3878 .loc 1 1913 28 is_stmt 0 view .LVU1280 - 3879 007e AA60 str r2, [r5, #8] @ float -1914:Src/main.c **** - 3880 .loc 1 1914 2 is_stmt 1 view .LVU1281 -1914:Src/main.c **** - 3881 .loc 1 1914 28 is_stmt 0 view .LVU1282 - 3882 0080 A260 str r2, [r4, #8] @ float -1917:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 3883 .loc 1 1917 2 is_stmt 1 view .LVU1283 -1917:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 3884 .loc 1 1917 13 is_stmt 0 view .LVU1284 - 3885 0082 8E4E ldr r6, .L141+60 - 3886 0084 9C46 mov ip, r3 - 3887 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3} - 3888 008a 0FC6 stmia r6!, {r0, r1, r2, r3} - 3889 008c DCF80030 ldr r3, [ip] - 3890 0090 3380 strh r3, [r6] @ movhi -1918:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 3891 .loc 1 1918 2 is_stmt 1 view .LVU1285 - ARM GAS /tmp/ccO46DoU.s page 279 - - -1918:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 3892 .loc 1 1918 17 is_stmt 0 view .LVU1286 - 3893 0092 8B4E ldr r6, .L141+64 - 3894 0094 95E80F00 ldm r5, {r0, r1, r2, r3} - 3895 0098 86E80F00 stm r6, {r0, r1, r2, r3} -1919:Src/main.c **** - 3896 .loc 1 1919 2 is_stmt 1 view .LVU1287 -1919:Src/main.c **** - 3897 .loc 1 1919 17 is_stmt 0 view .LVU1288 - 3898 009c 894D ldr r5, .L141+68 - 3899 009e 94E80F00 ldm r4, {r0, r1, r2, r3} - 3900 00a2 85E80F00 stm r5, {r0, r1, r2, r3} -1924:Src/main.c **** LL_TIM_EnableCounter(TIM6); - 3901 .loc 1 1924 2 is_stmt 1 view .LVU1289 - 3902 .LVL274: - 3903 .LBB443: - 3904 .LBI443: +2050:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 5013 .loc 1 2050 13 is_stmt 0 view .LVU1622 + 5014 0082 8F4E ldr r6, .L225+60 + 5015 0084 9C46 mov ip, r3 + 5016 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3} + 5017 008a 0FC6 stmia r6!, {r0, r1, r2, r3} + 5018 008c DCF80030 ldr r3, [ip] + 5019 0090 3380 strh r3, [r6] @ movhi +2051:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 5020 .loc 1 2051 2 is_stmt 1 view .LVU1623 +2051:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 5021 .loc 1 2051 17 is_stmt 0 view .LVU1624 + 5022 0092 8C4E ldr r6, .L225+64 + 5023 0094 95E80F00 ldm r5, {r0, r1, r2, r3} + 5024 0098 86E80F00 stm r6, {r0, r1, r2, r3} +2052:Src/main.c **** + 5025 .loc 1 2052 2 is_stmt 1 view .LVU1625 +2052:Src/main.c **** + 5026 .loc 1 2052 17 is_stmt 0 view .LVU1626 + 5027 009c 8A4D ldr r5, .L225+68 + 5028 009e 94E80F00 ldm r4, {r0, r1, r2, r3} + 5029 00a2 85E80F00 stm r5, {r0, r1, r2, r3} +2057:Src/main.c **** LL_TIM_EnableCounter(TIM6); + 5030 .loc 1 2057 2 is_stmt 1 view .LVU1627 + 5031 .LVL408: + 5032 .LBB516: + 5033 .LBI516: 3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -16728,6 +18658,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV1 3266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV2 3267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV4 + ARM GAS /tmp/ccYgfTud.s page 312 + + 3268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV8 3269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRFilter This parameter can be one of the following values: 3270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1 @@ -16738,9 +18671,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8 3276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6 3277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8 - ARM GAS /tmp/ccO46DoU.s page 280 - - 3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6 3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8 3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5 @@ -16788,6 +18718,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx) 3323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); + ARM GAS /tmp/ccYgfTud.s page 313 + + 3325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -16798,9 +18731,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR BKF LL_TIM_ConfigBRK 3333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakPolarity This parameter can be one of the following values: - ARM GAS /tmp/ccO46DoU.s page 281 - - 3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_LOW 3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_HIGH 3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakFilter This parameter can be one of the following values: @@ -16848,6 +18778,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2E LL_TIM_DisableBRK2 3380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None + ARM GAS /tmp/ccYgfTud.s page 314 + + 3382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx) 3384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16858,9 +18791,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the break 2 input. 3390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not 3391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input. - ARM GAS /tmp/ccO46DoU.s page 282 - - 3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2P LL_TIM_ConfigBRK2\n 3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR BK2F LL_TIM_ConfigBRK2 3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -16908,6 +18838,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat 3438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccYgfTud.s page 315 + + 3439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); 3440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -16918,9 +18851,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_EnableAutomaticOutput 3447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccO46DoU.s page 283 - - 3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx) 3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16968,6 +18898,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_MOE); 3494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccYgfTud.s page 316 + + 3496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the outputs (reset the MOE bit in TIMx_BDTR register). 3498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by @@ -16978,9 +18911,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccO46DoU.s page 284 - - 3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx) 3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE); @@ -17028,6 +18958,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether 3551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection. 3552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINE LL_TIM_DisableBreakInputSource\n + ARM GAS /tmp/ccYgfTud.s page 317 + + 3553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKE LL_TIM_DisableBreakInputSource\n 3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INE LL_TIM_DisableBreakInputSource\n 3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKE LL_TIM_DisableBreakInputSource @@ -17038,9 +18971,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values: 3561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN 3562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK - ARM GAS /tmp/ccO46DoU.s page 285 - - 3563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_ @@ -17088,6 +19018,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or 3608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * not a timer instance supports the DMA burst mode. 3609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n + ARM GAS /tmp/ccYgfTud.s page 318 + + 3610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * DCR DBA LL_TIM_ConfigDMABurst 3611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstBaseAddress This parameter can be one of the following values: @@ -17098,9 +19031,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SR 3618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_EGR 3619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1 - ARM GAS /tmp/ccO46DoU.s page 286 - - 3620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2 3621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCER 3622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CNT @@ -17148,6 +19078,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 3666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccYgfTud.s page 319 + + 3667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping 3669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -17158,9 +19091,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a some timer inputs can be remapped. 3675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll TIM2_OR ITR1_RMP LL_TIM_SetRemap\n 3676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM5_OR TI4_RMP LL_TIM_SetRemap\n - ARM GAS /tmp/ccO46DoU.s page 287 - - 3677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM11_OR TI1_RMP LL_TIM_SetRemap 3678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Remap Remap param depends on the TIMx. Description available only @@ -17208,6 +19138,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the update interrupt flag (UIF). 3723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE + ARM GAS /tmp/ccYgfTud.s page 320 + + 3724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -17218,9 +19151,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending). - ARM GAS /tmp/ccO46DoU.s page 288 - - 3734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE 3735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). @@ -17268,6 +19198,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC2IF LL_TIM_IsActiveFlag_CC2 3779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccYgfTud.s page 321 + + 3781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx) 3783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17278,9 +19211,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 3 interrupt flag (CC3F). 3789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC3IF LL_TIM_ClearFlag_CC3 3790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccO46DoU.s page 289 - - 3791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx) @@ -17328,6 +19258,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx) + ARM GAS /tmp/ccYgfTud.s page 322 + + 3838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF)); 3840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -17338,9 +19271,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccO46DoU.s page 290 - - 3848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx) 3849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL); @@ -17388,6 +19318,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx) 3893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL); + ARM GAS /tmp/ccYgfTud.s page 323 + + 3895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -17398,9 +19331,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx) 3904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccO46DoU.s page 291 - - 3905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_TIF)); 3906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -17448,6 +19378,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF)); 3950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccYgfTud.s page 324 + + 3952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether break 2 interrupt flag (B2IF) is set (break 2 interrupt is pending). 3954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR B2IF LL_TIM_IsActiveFlag_BRK2 @@ -17458,9 +19391,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL); 3961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccO46DoU.s page 292 - - 3962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF). @@ -17508,6 +19438,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 4006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL); 4007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 4008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccYgfTud.s page 325 + + 4009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF). 4011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC3OF LL_TIM_ClearFlag_CC3OVR @@ -17518,9 +19451,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 4016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 4017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF)); 4018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccO46DoU.s page 293 - - 4019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set @@ -17568,6 +19498,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 4063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF)); 4064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 4065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccYgfTud.s page 326 + + 4066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether system break interrupt flag (SBIF) is set (system break interrupt is p 4068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR SBIF LL_TIM_IsActiveFlag_SYSBRK @@ -17578,9 +19511,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 4073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 4074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL); 4075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccO46DoU.s page 294 - - 4076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -17596,77 +19526,77 @@ ARM GAS /tmp/ccO46DoU.s page 1 4088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 4089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) - 3905 .loc 5 4090 22 view .LVU1290 - 3906 .LBB444: + 5034 .loc 5 4090 22 view .LVU1628 + 5035 .LBB517: 4091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 4092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_UIE); - 3907 .loc 5 4092 3 view .LVU1291 - 3908 00a6 884B ldr r3, .L141+72 - 3909 00a8 DA68 ldr r2, [r3, #12] - 3910 00aa 42F00102 orr r2, r2, #1 - 3911 00ae DA60 str r2, [r3, #12] - 3912 .LVL275: - 3913 .loc 5 4092 3 is_stmt 0 view .LVU1292 - 3914 .LBE444: - 3915 .LBE443: -1925:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); - 3916 .loc 1 1925 2 is_stmt 1 view .LVU1293 - 3917 .LBB445: - 3918 .LBI445: + 5036 .loc 5 4092 3 view .LVU1629 + 5037 00a6 894B ldr r3, .L225+72 + 5038 00a8 DA68 ldr r2, [r3, #12] + 5039 00aa 42F00102 orr r2, r2, #1 + 5040 00ae DA60 str r2, [r3, #12] + 5041 .LVL409: + 5042 .loc 5 4092 3 is_stmt 0 view .LVU1630 + 5043 .LBE517: + 5044 .LBE516: +2058:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); + 5045 .loc 1 2058 2 is_stmt 1 view .LVU1631 + 5046 .LBB518: + 5047 .LBI518: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3919 .loc 5 1313 22 view .LVU1294 - 3920 .LBB446: + 5048 .loc 5 1313 22 view .LVU1632 + 5049 .LBB519: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3921 .loc 5 1315 3 view .LVU1295 - 3922 00b0 1A68 ldr r2, [r3] - 3923 00b2 42F00102 orr r2, r2, #1 - 3924 00b6 1A60 str r2, [r3] - 3925 .LVL276: + 5050 .loc 5 1315 3 view .LVU1633 + 5051 00b0 1A68 ldr r2, [r3] + 5052 00b2 42F00102 orr r2, r2, #1 + 5053 00b6 1A60 str r2, [r3] + 5054 .LVL410: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3926 .loc 5 1315 3 is_stmt 0 view .LVU1296 - 3927 .LBE446: - 3928 .LBE445: -1926:Src/main.c **** LL_TIM_EnableCounter(TIM7); - 3929 .loc 1 1926 2 is_stmt 1 view .LVU1297 - 3930 .LBB447: - 3931 .LBI447: + 5055 .loc 5 1315 3 is_stmt 0 view .LVU1634 + 5056 .LBE519: + 5057 .LBE518: +2059:Src/main.c **** LL_TIM_EnableCounter(TIM7); + 5058 .loc 1 2059 2 is_stmt 1 view .LVU1635 + ARM GAS /tmp/ccYgfTud.s page 327 + + + 5059 .LBB520: + 5060 .LBI520: 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3932 .loc 5 4090 22 view .LVU1298 - 3933 .LBB448: - 3934 .loc 5 4092 3 view .LVU1299 - 3935 00b8 03F58063 add r3, r3, #1024 - 3936 00bc DA68 ldr r2, [r3, #12] - 3937 00be 42F00102 orr r2, r2, #1 - 3938 00c2 DA60 str r2, [r3, #12] - ARM GAS /tmp/ccO46DoU.s page 295 - - - 3939 .LVL277: - 3940 .loc 5 4092 3 is_stmt 0 view .LVU1300 - 3941 .LBE448: - 3942 .LBE447: -1927:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); - 3943 .loc 1 1927 2 is_stmt 1 view .LVU1301 - 3944 .LBB449: - 3945 .LBI449: + 5061 .loc 5 4090 22 view .LVU1636 + 5062 .LBB521: + 5063 .loc 5 4092 3 view .LVU1637 + 5064 00b8 03F58063 add r3, r3, #1024 + 5065 00bc DA68 ldr r2, [r3, #12] + 5066 00be 42F00102 orr r2, r2, #1 + 5067 00c2 DA60 str r2, [r3, #12] + 5068 .LVL411: + 5069 .loc 5 4092 3 is_stmt 0 view .LVU1638 + 5070 .LBE521: + 5071 .LBE520: +2060:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); + 5072 .loc 1 2060 2 is_stmt 1 view .LVU1639 + 5073 .LBB522: + 5074 .LBI522: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 3946 .loc 5 1313 22 view .LVU1302 - 3947 .LBB450: + 5075 .loc 5 1313 22 view .LVU1640 + 5076 .LBB523: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3948 .loc 5 1315 3 view .LVU1303 - 3949 00c4 1A68 ldr r2, [r3] - 3950 00c6 42F00102 orr r2, r2, #1 - 3951 00ca 1A60 str r2, [r3] - 3952 .LVL278: + 5077 .loc 5 1315 3 view .LVU1641 + 5078 00c4 1A68 ldr r2, [r3] + 5079 00c6 42F00102 orr r2, r2, #1 + 5080 00ca 1A60 str r2, [r3] + 5081 .LVL412: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 3953 .loc 5 1315 3 is_stmt 0 view .LVU1304 - 3954 .LBE450: - 3955 .LBE449: -1934:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 3956 .loc 1 1934 3 is_stmt 1 view .LVU1305 - 3957 .LBB451: - 3958 .LBI451: - 3959 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" + 5082 .loc 5 1315 3 is_stmt 0 view .LVU1642 + 5083 .LBE523: + 5084 .LBE522: +2067:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 5085 .loc 1 2067 3 is_stmt 1 view .LVU1643 + 5086 .LBB524: + 5087 .LBI524: + 5088 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @file stm32f7xx_ll_dma.h @@ -17688,6 +19618,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 19:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 20:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #ifndef __STM32F7xx_LL_DMA_H 21:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __STM32F7xx_LL_DMA_H + ARM GAS /tmp/ccYgfTud.s page 328 + + 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #ifdef __cplusplus 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** extern "C" { @@ -17698,9 +19631,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @addtogroup STM32F7xx_LL_Driver 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ - ARM GAS /tmp/ccO46DoU.s page 296 - - 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined (DMA1) || defined (DMA2) @@ -17748,6 +19678,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 76:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined(USE_FULL_LL_DRIVER) 77:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_ES_INIT DMA Exported Init structure 78:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ + ARM GAS /tmp/ccYgfTud.s page 329 + + 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** typedef struct 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -17758,9 +19691,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t MemoryOrM2MDstAddress; /*!< Specifies the memory base address for DMA transfer 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** or as Destination base address in case of memory to memory - ARM GAS /tmp/ccO46DoU.s page 297 - - 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter must be a value between Min_Data = 0 and Max 91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -17808,6 +19738,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccYgfTud.s page 330 + + 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t Channel; /*!< Specifies the peripheral channel. 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_CHANNEL 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -17818,9 +19751,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccO46DoU.s page 298 - - 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t FIFOMode; /*!< Specifies if the FIFO mode or Direct mode will be used for 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_FIFOMODE 148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The Direct mode (FIFO mode disabled) cannot be used i @@ -17868,6 +19798,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_3 0x00000003U 191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_4 0x00000004U 192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_5 0x00000005U + ARM GAS /tmp/ccYgfTud.s page 331 + + 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_6 0x00000006U 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_7 0x00000007U 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_ALL 0xFFFF0000U @@ -17878,9 +19811,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_DIRECTION DIRECTION 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccO46DoU.s page 299 - - 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direc 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_SxCR_DIR_0 /*!< Memory to peripheral direc 205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_SxCR_DIR_1 /*!< Memory to memory direction @@ -17928,6 +19858,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PDATAALIGN PDATAALIGN 248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccYgfTud.s page 332 + + 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_HALFWORD DMA_SxCR_PSIZE_0 /*!< Peripheral data alignment 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_WORD DMA_SxCR_PSIZE_1 /*!< Peripheral data alignment @@ -17938,9 +19871,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MDATAALIGN MDATAALIGN 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccO46DoU.s page 300 - - 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment : By 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_HALFWORD DMA_SxCR_MSIZE_0 /*!< Memory data alignment : Ha 262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_WORD DMA_SxCR_MSIZE_1 /*!< Memory data alignment : Wo @@ -17988,6 +19918,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_13 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_0) 305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_14 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) 306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_15 DMA_SxCR_CHSEL + ARM GAS /tmp/ccYgfTud.s page 333 + + 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif /* DMA_CHANNEL_SELECTION_8_15 */ 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} @@ -17998,9 +19931,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_SINGLE 0x00000000U /*!< Memory burst 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC4 DMA_SxCR_MBURST_0 /*!< Memory burst - ARM GAS /tmp/ccO46DoU.s page 301 - - 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC8 DMA_SxCR_MBURST_1 /*!< Memory burst 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC16 (DMA_SxCR_MBURST_0 | DMA_SxCR_MBURST_1) /*!< Memory burst 319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -18048,6 +19978,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_3_4 DMA_SxFCR_FTH_1 /*!< FIFO thresho 362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_FULL DMA_SxFCR_FTH /*!< FIFO thresho 363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccYgfTud.s page 334 + + 364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -18058,9 +19991,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CURRENTTARGETMEM1 DMA_SxCR_CT /*!< Set CurrentT 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} - ARM GAS /tmp/ccO46DoU.s page 302 - - 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -18108,6 +20038,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Convert DMAx_Streamy into LL_DMA_STREAM_y + ARM GAS /tmp/ccYgfTud.s page 335 + + 421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __STREAM_INSTANCE__ DMAx_Streamy 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval LL_DMA_CHANNEL_y 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -18118,9 +20051,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream1)) ? LL_DMA_STREAM_1 : \ 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream2)) ? LL_DMA_STREAM_2 : \ 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream2)) ? LL_DMA_STREAM_2 : \ - ARM GAS /tmp/ccO46DoU.s page 303 - - 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream3)) ? LL_DMA_STREAM_3 : \ 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream3)) ? LL_DMA_STREAM_3 : \ 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream4)) ? LL_DMA_STREAM_4 : \ @@ -18168,6 +20098,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Exported_Functions DMA Exported Functions 476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccYgfTud.s page 336 + + 478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_Configuration Configuration 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ @@ -18178,9 +20111,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 - ARM GAS /tmp/ccO46DoU.s page 304 - - 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -18211,23 +20141,26 @@ ARM GAS /tmp/ccO46DoU.s page 1 515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableStream(DMA_TypeDef *DMAx, uint32_t Stream) - 3960 .loc 6 517 22 view .LVU1306 - 3961 .LBB452: + 5089 .loc 6 517 22 view .LVU1644 + 5090 .LBB525: 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D - 3962 .loc 6 519 3 view .LVU1307 - 3963 00cc 03F51433 add r3, r3, #151552 - 3964 00d0 D3F8B820 ldr r2, [r3, #184] - 3965 00d4 22F00102 bic r2, r2, #1 - 3966 00d8 C3F8B820 str r2, [r3, #184] - 3967 .LVL279: - 3968 .loc 6 519 3 is_stmt 0 view .LVU1308 - 3969 .LBE452: - 3970 .LBE451: -1935:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 3971 .loc 1 1935 3 is_stmt 1 view .LVU1309 - 3972 .LBB453: - 3973 .LBI453: + 5091 .loc 6 519 3 view .LVU1645 + 5092 00cc 03F51433 add r3, r3, #151552 + 5093 00d0 D3F8B820 ldr r2, [r3, #184] + 5094 00d4 22F00102 bic r2, r2, #1 + 5095 00d8 C3F8B820 str r2, [r3, #184] + 5096 .LVL413: + 5097 .loc 6 519 3 is_stmt 0 view .LVU1646 + 5098 .LBE525: + 5099 .LBE524: +2068:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 5100 .loc 1 2068 3 is_stmt 1 view .LVU1647 + 5101 .LBB526: + 5102 .LBI526: + ARM GAS /tmp/ccYgfTud.s page 337 + + 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -18238,9 +20171,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccO46DoU.s page 305 - - 530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -18288,6 +20218,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** DMA_SxCR_DIR | DMA_SxCR_CIRC | DMA_SxCR_PINC | DMA_SxCR_MINC | DMA_SxCR_PSIZE | DMA_Sx 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** Configuration); + ARM GAS /tmp/ccYgfTud.s page 338 + + 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -18298,9 +20231,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccO46DoU.s page 306 - - 587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -18348,6 +20278,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 + ARM GAS /tmp/ccYgfTud.s page 339 + + 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -18358,9 +20291,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_CIRCULAR 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_PFCTRL - ARM GAS /tmp/ccO46DoU.s page 307 - - 644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Mode) @@ -18408,6 +20338,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param IncrementMode This parameter can be one of the following values: 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_NOINCREMENT 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_INCREMENT + ARM GAS /tmp/ccYgfTud.s page 340 + + 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Increment @@ -18418,9 +20351,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Peripheral increment mode. 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PINC LL_DMA_GetPeriphIncMode - ARM GAS /tmp/ccO46DoU.s page 308 - - 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -18468,6 +20398,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MINC LL_DMA_GetMemoryIncMode 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: + ARM GAS /tmp/ccYgfTud.s page 341 + + 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -18478,9 +20411,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_NOINCREMENT - ARM GAS /tmp/ccO46DoU.s page 309 - - 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_INCREMENT 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Stream) @@ -18528,6 +20458,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_BYTE 804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_HALFWORD + ARM GAS /tmp/ccYgfTud.s page 342 + + 805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_WORD 806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Stream) @@ -18538,9 +20471,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Memory size. 814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MSIZE LL_DMA_SetMemorySize - ARM GAS /tmp/ccO46DoU.s page 310 - - 815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -18588,6 +20518,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Peripheral increment offset size. 861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PINCOS LL_DMA_SetIncOffsetSize + ARM GAS /tmp/ccYgfTud.s page 343 + + 862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -18598,9 +20531,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 - ARM GAS /tmp/ccO46DoU.s page 311 - - 872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param OffsetSize This parameter can be one of the following values: 873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_PSIZE 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_FIXEDTO4 @@ -18648,6 +20578,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Priority This parameter can be one of the following values: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW + ARM GAS /tmp/ccYgfTud.s page 344 + + 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH @@ -18658,9 +20591,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccO46DoU.s page 312 - - 929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream priority level. 931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PL LL_DMA_GetStreamPriorityLevel @@ -18708,6 +20638,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->NDTR, 974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccYgfTud.s page 345 + + 976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Number of data to transfer. 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll NDTR NDT LL_DMA_GetDataLength @@ -18718,9 +20651,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccO46DoU.s page 313 - - 986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -18768,6 +20698,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetChannelSelection(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Channe + ARM GAS /tmp/ccYgfTud.s page 346 + + 1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -18778,9 +20711,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 - ARM GAS /tmp/ccO46DoU.s page 314 - - 1043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -18828,6 +20758,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Mburst This parameter can be one of the following values: 1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_SINGLE + ARM GAS /tmp/ccYgfTud.s page 347 + + 1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC4 1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC8 1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC16 @@ -18838,9 +20771,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccO46DoU.s page 315 - - 1100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory burst transfer configuration. 1102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MBURST LL_DMA_GetMemoryBurstxfer @@ -18888,6 +20818,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Pburst) 1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D + ARM GAS /tmp/ccYgfTud.s page 348 + + 1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -18898,9 +20831,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccO46DoU.s page 316 - - 1157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -18948,6 +20878,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccYgfTud.s page 349 + + 1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -18958,9 +20891,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CURRENTTARGETMEM1 1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetCurrentTargetMem(DMA_TypeDef *DMAx, uint32_t Stream) - ARM GAS /tmp/ccO46DoU.s page 317 - - 1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -19008,6 +20938,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get FIFO status. 1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FS LL_DMA_GetFIFOStatus + ARM GAS /tmp/ccYgfTud.s page 350 + + 1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -19018,9 +20951,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 - ARM GAS /tmp/ccO46DoU.s page 318 - - 1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOSTATUS_0_25 1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOSTATUS_25_50 @@ -19068,6 +20998,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccYgfTud.s page 351 + + 1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableFifoMode(DMA_TypeDef *DMAx, uint32_t Stream) 1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -19078,9 +21011,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Select FIFO threshold. 1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_SetFIFOThreshold 1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccO46DoU.s page 319 - - 1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -19128,6 +21058,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure the FIFO . + ARM GAS /tmp/ccYgfTud.s page 352 + + 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_ConfigFifo\n 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * FCR DMDIS LL_DMA_ConfigFifo 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -19138,9 +21071,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccO46DoU.s page 320 - - 1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param FifoMode This parameter can be one of the following values: @@ -19188,6 +21118,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, + ARM GAS /tmp/ccYgfTud.s page 353 + + 1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Direction Periph to Memory and Memory to Memory */ 1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** else @@ -19198,9 +21131,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccO46DoU.s page 321 - - 1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory address. 1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_SetMemoryAddress 1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO @@ -19248,6 +21178,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Memory address. + ARM GAS /tmp/ccYgfTud.s page 354 + + 1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_GetMemoryAddress 1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -19258,9 +21191,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccO46DoU.s page 322 - - 1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF @@ -19308,6 +21238,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF 1545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccYgfTud.s page 355 + + 1546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd 1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -19318,9 +21251,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory to Memory Destination address. 1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_SetM2MDstAddress 1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. - ARM GAS /tmp/ccO46DoU.s page 323 - - 1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. 1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -19368,6 +21298,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 + ARM GAS /tmp/ccYgfTud.s page 356 + + 1603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -19378,9 +21311,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF 1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream) - ARM GAS /tmp/ccO46DoU.s page 324 - - 1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-> 1615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -19428,6 +21358,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} + ARM GAS /tmp/ccYgfTud.s page 357 + + 1660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management @@ -19438,9 +21371,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 half transfer flag. 1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF0 LL_DMA_IsActiveFlag_HT0 1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccO46DoU.s page 325 - - 1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT0(DMA_TypeDef *DMAx) @@ -19488,6 +21418,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccYgfTud.s page 358 + + 1717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF4)==(DMA_HISR_HTIF4)); 1719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -19498,9 +21431,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccO46DoU.s page 326 - - 1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx) 1728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF5)==(DMA_HISR_HTIF5)); @@ -19548,6 +21478,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx) 1772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF1)==(DMA_LISR_TCIF1)); + ARM GAS /tmp/ccYgfTud.s page 359 + + 1774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -19558,9 +21491,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx) 1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccO46DoU.s page 327 - - 1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF2)==(DMA_LISR_TCIF2)); 1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -19608,6 +21538,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF6)==(DMA_HISR_TCIF6)); 1829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccYgfTud.s page 360 + + 1831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 transfer complete flag. 1833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF7 LL_DMA_IsActiveFlag_TC7 @@ -19618,9 +21551,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF7)==(DMA_HISR_TCIF7)); 1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccO46DoU.s page 328 - - 1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 transfer error flag. @@ -19668,6 +21598,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 transfer error flag. + ARM GAS /tmp/ccYgfTud.s page 361 + + 1888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF4 LL_DMA_IsActiveFlag_TE4 1889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). @@ -19678,9 +21611,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccO46DoU.s page 329 - - 1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 transfer error flag. 1899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF0 LL_DMA_IsActiveFlag_TE5 1900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -19728,6 +21658,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 direct mode error flag. 1943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF1 LL_DMA_IsActiveFlag_DME1 1944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccYgfTud.s page 362 + + 1945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME1(DMA_TypeDef *DMAx) @@ -19738,9 +21671,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 direct mode error flag. 1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF2 LL_DMA_IsActiveFlag_DME2 - ARM GAS /tmp/ccO46DoU.s page 330 - - 1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -19788,6 +21718,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccYgfTud.s page 363 + + 2002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME6(DMA_TypeDef *DMAx) 2003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF6)==(DMA_HISR_DMEIF6)); @@ -19798,9 +21731,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF7 LL_DMA_IsActiveFlag_DME7 2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccO46DoU.s page 331 - - 2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME7(DMA_TypeDef *DMAx) 2014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -19848,6 +21778,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE3(DMA_TypeDef *DMAx) 2058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccYgfTud.s page 364 + + 2059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF3)==(DMA_LISR_FEIF3)); 2060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -19858,9 +21791,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE4(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccO46DoU.s page 332 - - 2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF4)==(DMA_HISR_FEIF4)); 2071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -19908,6 +21838,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF0); 2115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccYgfTud.s page 365 + + 2116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 half transfer flag. @@ -19918,9 +21851,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx) 2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF1); - ARM GAS /tmp/ccO46DoU.s page 333 - - 2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -19968,6 +21898,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccYgfTud.s page 366 + + 2173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 half transfer flag. 2174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF6 LL_DMA_ClearFlag_HT6 2175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -19978,9 +21911,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF6); 2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccO46DoU.s page 334 - - 2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 half transfer flag. 2185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF7 LL_DMA_ClearFlag_HT7 @@ -20028,6 +21958,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 transfer complete flag. 2229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF3 LL_DMA_ClearFlag_TC3 + ARM GAS /tmp/ccYgfTud.s page 367 + + 2230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -20038,9 +21971,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 transfer complete flag. - ARM GAS /tmp/ccO46DoU.s page 335 - - 2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF4 LL_DMA_ClearFlag_TC4 2241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -20079,28 +22009,28 @@ ARM GAS /tmp/ccO46DoU.s page 1 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx) - 3974 .loc 6 2277 22 view .LVU1310 - 3975 .LBB454: + 5103 .loc 6 2277 22 view .LVU1648 + 5104 .LBB527: 2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7); - 3976 .loc 6 2279 3 view .LVU1311 - 3977 00dc 4FF00062 mov r2, #134217728 - 3978 00e0 DA60 str r2, [r3, #12] - 3979 .LVL280: - 3980 .loc 6 2279 3 is_stmt 0 view .LVU1312 - 3981 .LBE454: - 3982 .LBE453: -1936:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); - 3983 .loc 1 1936 3 is_stmt 1 view .LVU1313 - 3984 .LBB455: - 3985 .LBI455: + 5105 .loc 6 2279 3 view .LVU1649 + 5106 00dc 4FF00062 mov r2, #134217728 + 5107 00e0 DA60 str r2, [r3, #12] + 5108 .LVL414: + 5109 .loc 6 2279 3 is_stmt 0 view .LVU1650 + ARM GAS /tmp/ccYgfTud.s page 368 + + + 5110 .LBE527: + 5111 .LBE526: +2069:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); + 5112 .loc 1 2069 3 is_stmt 1 view .LVU1651 + 5113 .LBB528: + 5114 .LBI528: 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 transfer error flag. - ARM GAS /tmp/ccO46DoU.s page 336 - - 2284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF0 LL_DMA_ClearFlag_TE0 2285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -20148,6 +22078,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF4 LL_DMA_ClearFlag_TE4 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccYgfTud.s page 369 + + 2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx) 2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -20158,9 +22091,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 transfer error flag. 2339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF5 LL_DMA_ClearFlag_TE5 2340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccO46DoU.s page 337 - - 2341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx) @@ -20186,28 +22116,31 @@ ARM GAS /tmp/ccO46DoU.s page 1 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx) - 3986 .loc 6 2365 22 view .LVU1314 - 3987 .LBB456: + 5115 .loc 6 2365 22 view .LVU1652 + 5116 .LBB529: 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7); - 3988 .loc 6 2367 3 view .LVU1315 - 3989 00e2 4FF00072 mov r2, #33554432 - 3990 00e6 DA60 str r2, [r3, #12] - 3991 .LVL281: - 3992 .loc 6 2367 3 is_stmt 0 view .LVU1316 - 3993 .LBE456: - 3994 .LBE455: -1937:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); - 3995 .loc 1 1937 3 is_stmt 1 view .LVU1317 - 3996 .LBB457: - 3997 .LBI457: - 3998 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h" + 5117 .loc 6 2367 3 view .LVU1653 + 5118 00e2 4FF00072 mov r2, #33554432 + 5119 00e6 DA60 str r2, [r3, #12] + 5120 .LVL415: + 5121 .loc 6 2367 3 is_stmt 0 view .LVU1654 + 5122 .LBE529: + 5123 .LBE528: +2070:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); + 5124 .loc 1 2070 3 is_stmt 1 view .LVU1655 + 5125 .LBB530: + 5126 .LBI530: + 5127 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @file stm32f7xx_ll_usart.h 4:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @author MCD Application Team 5:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Header file of USART LL module. 6:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ****************************************************************************** + ARM GAS /tmp/ccYgfTud.s page 370 + + 7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @attention 8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Copyright (c) 2017 STMicroelectronics. @@ -20218,9 +22151,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 14:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 16:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ****************************************************************************** - ARM GAS /tmp/ccO46DoU.s page 338 - - 17:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 18:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 19:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Define to prevent recursive inclusion -------------------------------------*/ @@ -20268,6 +22198,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 61:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported types ------------------------------------------------------------*/ 62:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER) 63:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_ES_INIT USART Exported Init structures + ARM GAS /tmp/ccYgfTud.s page 371 + + 64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20278,9 +22211,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 71:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 72:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 73:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t BaudRate; /*!< This field defines expected Usart communication baud rat - ARM GAS /tmp/ccO46DoU.s page 339 - - 74:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 75:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary 76:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetBaudRate().*/ @@ -20328,6 +22258,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** typedef struct 120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccYgfTud.s page 372 + + 121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled 122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_CLOCK. 123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20338,9 +22271,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock. 129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_POLARI 130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccO46DoU.s page 340 - - 131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USART HW configuration can be modified afterwards using 132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** functions @ref LL_USART_SetClockPolarity(). 133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** For more details, refer to description of this function. @@ -20388,6 +22318,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_LBDCF USART_ICR_LBDCF /*!< LIN break detect 176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS clear flag * 177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_RTOCF USART_ICR_RTOCF /*!< Receiver timeout + ARM GAS /tmp/ccYgfTud.s page 373 + + 178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_EOBCF USART_ICR_EOBCF /*!< End of block cle 179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_CMCF USART_ICR_CMCF /*!< Character match 180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) @@ -20398,9 +22331,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccO46DoU.s page 341 - - 188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines 190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Flags defines which can be used with LL_USART_ReadReg function @@ -20448,6 +22378,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt e 233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data regist 234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission com + ARM GAS /tmp/ccYgfTud.s page 374 + + 235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data re 236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */ 237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR1_CMIE USART_CR1_CMIE /*!< Character match @@ -20458,9 +22391,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt en 243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) 244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE) - ARM GAS /tmp/ccO46DoU.s page 342 - - 245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop 246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */ 247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */ @@ -20508,6 +22438,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : S 290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : S 291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccYgfTud.s page 375 + + 292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20518,9 +22451,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} - ARM GAS /tmp/ccO46DoU.s page 343 - - 302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER) @@ -20568,6 +22498,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_STOPBITS_1 0x00000000U /*!< 1 s 348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 + ARM GAS /tmp/ccYgfTud.s page 376 + + 349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 s 350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} @@ -20578,9 +22511,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as d 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions - ARM GAS /tmp/ccO46DoU.s page 344 - - 359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -20628,6 +22558,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE USART_CR2_ABRMODE_0 /*!< Fa 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME USART_CR2_ABRMODE_1 /*!< 0x 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_AUTOBAUD_DETECT_ON_55_FRAME (USART_CR2_ABRMODE_1 | USART_CR2_ABRMODE_0) /*!< 0x + ARM GAS /tmp/ccYgfTud.s page 377 + + 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -20638,9 +22571,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection 414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection 415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccO46DoU.s page 345 - - 416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20688,6 +22618,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_DE_POLARITY Driver Enable Polarity + ARM GAS /tmp/ccYgfTud.s page 378 + + 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high @@ -20698,9 +22631,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_DMA_REG_DATA DMA Register Data 472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ - ARM GAS /tmp/ccO46DoU.s page 346 - - 473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data regis 475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data regis @@ -20748,6 +22678,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Compute USARTDIV value according to Peripheral Clock and 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned) + ARM GAS /tmp/ccYgfTud.s page 379 + + 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __BAUDRATE__ Baud rate value to achieve 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case @@ -20758,9 +22691,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Compute USARTDIV value according to Peripheral Clock and 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned) - ARM GAS /tmp/ccO46DoU.s page 347 - - 530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance 531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __BAUDRATE__ Baud rate value to achieve 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case @@ -20808,6 +22738,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx) 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR1, USART_CR1_UE); + ARM GAS /tmp/ccYgfTud.s page 380 + + 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -20818,9 +22751,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabled(const USART_TypeDef *USARTx) 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccO46DoU.s page 348 - - 587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL); 588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20868,6 +22798,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_UCESM) + ARM GAS /tmp/ccYgfTud.s page 381 + + 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART Clock enabled in STOP Mode 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note When this function is called, USART Clock is enabled while in STOP mode @@ -20878,9 +22811,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableClockInStopMode(USART_TypeDef *USARTx) 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_UCESM); - ARM GAS /tmp/ccO46DoU.s page 349 - - 644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -20928,6 +22858,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx) 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RE); + ARM GAS /tmp/ccYgfTud.s page 382 + + 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -20938,9 +22871,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx) 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccO46DoU.s page 350 - - 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE); 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20988,6 +22918,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE)); 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccYgfTud.s page 383 + + 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure Parity (enabled/disabled and parity mode if enabled). @@ -20998,9 +22931,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 PCE LL_USART_SetParity 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Parity This parameter can be one of the following values: - ARM GAS /tmp/ccO46DoU.s page 351 - - 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_NONE 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_EVEN 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_ODD @@ -21048,6 +22978,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_WAKEUP_IDLELINE 803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_WAKEUP_ADDRESSMARK 804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccYgfTud.s page 384 + + 805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(const USART_TypeDef *USARTx) 806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE)); @@ -21058,9 +22991,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 M0 LL_USART_SetDataWidth\n 813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M1 LL_USART_SetDataWidth 814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccO46DoU.s page 352 - - 815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param DataWidth This parameter can be one of the following values: 816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_7B 817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_8B @@ -21108,6 +23038,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_MME); 861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccYgfTud.s page 385 + + 862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if switch between Mute Mode and Active mode is allowed @@ -21118,9 +23051,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledMuteMode(const USART_TypeDef *USARTx) 870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL); - ARM GAS /tmp/ccO46DoU.s page 353 - - 872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -21168,6 +23098,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve Clock pulse of the last data bit output configuration + ARM GAS /tmp/ccYgfTud.s page 386 + + 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (Last bit Clock pulse output to the SCLK pin or not) 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance. @@ -21178,9 +23111,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT 927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(const USART_TypeDef *USARTx) - ARM GAS /tmp/ccO46DoU.s page 354 - - 929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL)); 931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -21228,6 +23158,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity) + ARM GAS /tmp/ccYgfTud.s page 387 + + 976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -21238,9 +23171,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance. 984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CPOL LL_USART_GetClockPolarity 985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccO46DoU.s page 355 - - 986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_POLARITY_LOW 988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_POLARITY_HIGH @@ -21288,6 +23218,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx) 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccYgfTud.s page 388 + + 1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_CLKEN); 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -21298,9 +23231,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput 1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccO46DoU.s page 356 - - 1043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx) 1045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -21348,6 +23278,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(const USART_TypeDef *USARTx) 1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccYgfTud.s page 389 + + 1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP)); 1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -21358,9 +23291,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Parity Control and mode configuration using @ref LL_USART_SetParity() function 1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function 1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PS LL_USART_ConfigCharacter\n - ARM GAS /tmp/ccO46DoU.s page 357 - - 1100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 PCE LL_USART_ConfigCharacter\n 1101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M0 LL_USART_ConfigCharacter\n 1102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M1 LL_USART_ConfigCharacter\n @@ -21408,6 +23338,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXRX_STANDARD + ARM GAS /tmp/ccYgfTud.s page 390 + + 1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXRX_SWAPPED 1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetTXRXSwap(const USART_TypeDef *USARTx) @@ -21418,9 +23351,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure RX pin active level logic 1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RXINV LL_USART_SetRXPinLevel - ARM GAS /tmp/ccO46DoU.s page 358 - - 1157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PinInvMethod This parameter can be one of the following values: 1159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD @@ -21468,6 +23398,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXPIN_LEVEL_INVERTED 1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetTXPinLevel(const USART_TypeDef *USARTx) + ARM GAS /tmp/ccYgfTud.s page 391 + + 1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_TXINV)); 1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -21478,9 +23411,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H) 1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 DATAINV LL_USART_SetBinaryDataLogic 1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccO46DoU.s page 359 - - 1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param DataLogic This parameter can be one of the following values: 1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE 1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE @@ -21528,6 +23458,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BITORDER_LSBFIRST + ARM GAS /tmp/ccYgfTud.s page 392 + + 1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BITORDER_MSBFIRST 1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetTransferBitOrder(const USART_TypeDef *USARTx) @@ -21538,9 +23471,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Auto Baud-Rate Detection 1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or - ARM GAS /tmp/ccO46DoU.s page 360 - - 1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance. 1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABREN LL_USART_EnableAutoBaudRate 1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -21588,6 +23518,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_FALLINGEDGE 1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_7F_FRAME 1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_AUTOBAUD_DETECT_ON_55_FRAME + ARM GAS /tmp/ccYgfTud.s page 393 + + 1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t AutoBaudRateMode) @@ -21598,9 +23531,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Auto Baud-Rate mode 1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or - ARM GAS /tmp/ccO46DoU.s page 361 - - 1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance. 1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABRMODE LL_USART_GetAutoBaudRateMode 1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -21648,6 +23578,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_RTOEN) == (USART_CR2_RTOEN)) ? 1UL : 0UL); 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccYgfTud.s page 394 + + 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Address of the USART node. 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note This is used in multiprocessor communication during Mute mode or Stop mode, @@ -21658,9 +23591,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (This is used in multiprocessor communication during Mute mode or Stop mode, 1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * for wake up with 7-bit address mark detection. 1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * The MSB of the character sent by the transmitter should be equal to 1. - ARM GAS /tmp/ccO46DoU.s page 362 - - 1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * It may also be used for character detection during normal reception, 1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Mute mode inactive (for example, end of block detection in ModBus protocol). 1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * In this case, the whole received character (8-bit) is compared to the ADD[7:0] @@ -21708,6 +23638,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADDM7)); 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccYgfTud.s page 395 + + 1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable RTS HW Flow Control 1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not @@ -21718,9 +23651,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx) 1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccO46DoU.s page 363 - - 1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_RTSE); 1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -21768,6 +23698,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not 1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n + ARM GAS /tmp/ccYgfTud.s page 396 + + 1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 CTSE LL_USART_SetHWFlowCtrl 1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param HardwareFlowControl This parameter can be one of the following values: @@ -21778,9 +23711,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl) - ARM GAS /tmp/ccO46DoU.s page 364 - - 1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); 1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -21828,6 +23758,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if One bit sampling method is enabled 1545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp + ARM GAS /tmp/ccYgfTud.s page 397 + + 1546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -21838,9 +23771,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Overrun detection - ARM GAS /tmp/ccO46DoU.s page 365 - - 1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 OVRDIS LL_USART_EnableOverrunDetect 1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -21888,6 +23818,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetWKUPType(USART_TypeDef *USARTx, uint32_t Type) 1602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccYgfTud.s page 398 + + 1603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type); 1604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -21898,9 +23831,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 WUS LL_USART_GetWKUPType 1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccO46DoU.s page 366 - - 1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_WAKEUP_ON_ADDRESS 1614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_WAKEUP_ON_STARTBIT 1615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_WAKEUP_ON_RXNE @@ -21948,6 +23878,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccYgfTud.s page 399 + + 1660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return current Baud Rate value, according to USARTDIV present in BRR register 1661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (full BRR content), and to used Peripheral Clock and Oversampling mode values 1662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be ret @@ -21958,9 +23891,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param OverSampling This parameter can be one of the following values: 1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_16 1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_8 - ARM GAS /tmp/ccO46DoU.s page 367 - - 1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Baud Rate 1671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBaudRate(const USART_TypeDef *USARTx, uint32_t PeriphClk, uint @@ -22008,6 +23938,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Get Receiver Time Out Value (expressed in nb of bits duration) 1715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR RTO LL_USART_GetRxTimeout 1716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccYgfTud.s page 400 + + 1717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x00FFFFFF 1718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetRxTimeout(const USART_TypeDef *USARTx) @@ -22018,9 +23951,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Block Length value in reception 1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR BLEN LL_USART_SetBlockLength - ARM GAS /tmp/ccO46DoU.s page 368 - - 1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param BlockLength Value between Min_Data=0x00 and Max_Data=0xFF 1729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -22068,6 +23998,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. 1772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 IREN LL_USART_DisableIrda 1773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccYgfTud.s page 401 + + 1774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx) @@ -22078,9 +24011,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if IrDA mode is enabled 1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccO46DoU.s page 369 - - 1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. 1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 IREN LL_USART_IsEnabledIrda 1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -22128,6 +24058,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not 1829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. 1830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler + ARM GAS /tmp/ccYgfTud.s page 402 + + 1831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF 1833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -22138,9 +24071,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccO46DoU.s page 370 - - 1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Irda prescaler value, used for dividing the USART clock source 1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * to achieve the Irda Low Power frequency (8 bits value) 1843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not @@ -22188,6 +24118,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_NACK); 1886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccYgfTud.s page 403 + + 1888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if Smartcard NACK transmission is enabled 1890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -22198,9 +24131,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(const USART_TypeDef *USARTx) 1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccO46DoU.s page 371 - - 1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL); 1899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22248,6 +24178,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 1943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 1944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note This bit-field specifies the number of retries in transmit and receive, in Smartcard mo + ARM GAS /tmp/ccYgfTud.s page 404 + + 1945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * In transmission mode, it specifies the number of automatic retransmission retries, befo 1946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * generating a transmission error (FE bit set). 1947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * In reception mode, it specifies the number or erroneous reception trials, before genera @@ -22258,9 +24191,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetSmartcardAutoRetryCount(USART_TypeDef *USARTx, uint32_t AutoRetryC - ARM GAS /tmp/ccO46DoU.s page 372 - - 1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos); 1957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -22308,6 +24238,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccYgfTud.s page 405 + + 2002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods 2003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (GT[7:0] bits : Guard time value) 2004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -22318,9 +24251,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime) - ARM GAS /tmp/ccO46DoU.s page 373 - - 2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, (uint16_t)(GuardTime << USART_GTPR_GT_Pos)); 2014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -22368,6 +24298,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccYgfTud.s page 406 + + 2059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx) 2060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL); @@ -22378,9 +24311,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not 2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Half-Duplex mode is supported by the USARTx instance. 2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex - ARM GAS /tmp/ccO46DoU.s page 374 - - 2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22428,6 +24358,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL)); 2114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccYgfTud.s page 407 + + 2116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable LIN mode 2118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not @@ -22438,9 +24371,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx) 2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccO46DoU.s page 375 - - 2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_LINEN); 2127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22488,6 +24418,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetDEDeassertionTime(USART_TypeDef *USARTx, uint32_t Time) + ARM GAS /tmp/ccYgfTud.s page 408 + + 2173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos); 2175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -22498,9 +24431,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance. 2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 DEDT LL_USART_GetDEDeassertionTime 2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccO46DoU.s page 376 - - 2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31 2184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetDEDeassertionTime(const USART_TypeDef *USARTx) @@ -22548,6 +24478,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_DEM); 2228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccYgfTud.s page 409 + + 2230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Driver Enable (DE) Mode 2232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not @@ -22558,9 +24491,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableDEMode(USART_TypeDef *USARTx) 2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccO46DoU.s page 377 - - 2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_DEM); 2241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22608,6 +24538,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP)); 2285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccYgfTud.s page 410 + + 2287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 2289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22618,9 +24551,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART) - ARM GAS /tmp/ccO46DoU.s page 378 - - 2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In UART mode, the following bits must be kept cleared: 2298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, 2299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - CLKEN bit in the USART_CR2 register, @@ -22668,6 +24598,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function 2342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function 2343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function + ARM GAS /tmp/ccYgfTud.s page 411 + + 2344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function 2345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function 2346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Synchronous Mode @@ -22678,9 +24611,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigSyncMode\n 2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigSyncMode\n 2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigSyncMode - ARM GAS /tmp/ccO46DoU.s page 379 - - 2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22728,6 +24658,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx) 2399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In LIN mode, the following bits must be kept cleared: + ARM GAS /tmp/ccYgfTud.s page 412 + + 2401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - STOP and CLKEN bits in the USART_CR2 register, 2402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - IREN, SCEN and HDSEL bits in the USART_CR3 register. 2403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22738,9 +24671,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccO46DoU.s page 380 - - 2411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode 2412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In Half Duplex mode, the following bits must be kept cleared: 2413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, @@ -22788,6 +24718,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * This function also configures Stop bits to 1.5 bits and 2456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * sets the USART in Smartcard mode (SCEN bit). 2457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Clock Output is also enabled (CLKEN). + ARM GAS /tmp/ccYgfTud.s page 413 + + 2458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 2459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 2460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : @@ -22798,9 +24731,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function 2466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function 2467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Smartcard Mode - ARM GAS /tmp/ccO46DoU.s page 381 - - 2468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, ...) should be set using 2469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n @@ -22848,6 +24778,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n 2514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigIrdaMode\n + ARM GAS /tmp/ccYgfTud.s page 414 + + 2515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigIrdaMode\n 2516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigIrdaMode\n 2517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigIrdaMode\n @@ -22858,9 +24791,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx) 2523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In IRDA mode, the following bits must be kept cleared: - ARM GAS /tmp/ccO46DoU.s page 382 - - 2525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN, STOP and CLKEN bits in the USART_CR2 register, 2526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - SCEN and HDSEL bits in the USART_CR3 register. 2527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22908,6 +24838,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccYgfTud.s page 415 + + 2572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 2573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22918,9 +24851,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Parity Error Flag is set or not 2581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR PE LL_USART_IsActiveFlag_PE - ARM GAS /tmp/ccO46DoU.s page 383 - - 2582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22968,6 +24898,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccYgfTud.s page 416 + + 2629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(const USART_TypeDef *USARTx) 2630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL); @@ -22978,9 +24911,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR RXNE LL_USART_IsActiveFlag_RXNE 2637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccO46DoU.s page 384 - - 2639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(const USART_TypeDef *USARTx) 2641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -23028,6 +24958,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 2684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR CTSIF LL_USART_IsActiveFlag_nCTS 2685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccYgfTud.s page 417 + + 2686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(const USART_TypeDef *USARTx) @@ -23038,9 +24971,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART CTS Flag is set or not 2695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccO46DoU.s page 385 - - 2696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 2697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR CTS LL_USART_IsActiveFlag_CTS 2698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -23088,6 +25018,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE)) ? 1UL : 0UL); 2741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccYgfTud.s page 418 + + 2743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Auto-Baud Rate Flag is set or not 2745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or @@ -23098,9 +25031,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(const USART_TypeDef *USARTx) 2752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccO46DoU.s page 386 - - 2753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF)) ? 1UL : 0UL); 2754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23148,6 +25078,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL); 2798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccYgfTud.s page 419 + + 2800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) 2801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE) 2802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -23158,9 +25091,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccO46DoU.s page 387 - - 2810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(const USART_TypeDef *USARTx) 2811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL); @@ -23208,6 +25138,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */ 2855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Parity Error Flag + ARM GAS /tmp/ccYgfTud.s page 420 + + 2857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR PECF LL_USART_ClearFlag_PE 2858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -23218,9 +25151,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccO46DoU.s page 388 - - 2867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Framing Error Flag 2868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR FECF LL_USART_ClearFlag_FE 2869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -23268,6 +25198,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Transmission Complete Flag 2912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR TCCF LL_USART_ClearFlag_TC 2913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccYgfTud.s page 421 + + 2914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx) @@ -23278,9 +25211,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT) 2922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */ 2923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccO46DoU.s page 389 - - 2924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Smartcard Transmission Complete Before Guard Time Flag 2925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR TCBGTCF LL_USART_ClearFlag_TCBGT 2926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -23328,6 +25258,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_RTOCF); 2970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccYgfTud.s page 422 + + 2971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear End Of Block Flag @@ -23338,9 +25271,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx) - ARM GAS /tmp/ccO46DoU.s page 390 - - 2981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_EOBCF); 2983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -23388,6 +25318,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx) + ARM GAS /tmp/ccYgfTud.s page 423 + + 3028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE); 3030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -23398,9 +25331,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccO46DoU.s page 391 - - 3038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx) 3039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE); @@ -23448,6 +25378,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx) 3083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_CMIE); + ARM GAS /tmp/ccYgfTud.s page 424 + + 3085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -23458,9 +25391,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx) 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccO46DoU.s page 392 - - 3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RTOIE); 3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23508,6 +25438,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable CTS Interrupt 3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not + ARM GAS /tmp/ccYgfTud.s page 425 + + 3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS 3144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -23518,9 +25451,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE); 3150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccO46DoU.s page 393 - - 3152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) 3153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE) 3154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -23568,6 +25498,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable RX Not Empty Interrupt 3198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE + ARM GAS /tmp/ccYgfTud.s page 426 + + 3199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -23578,9 +25511,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Transmission Complete Interrupt - ARM GAS /tmp/ccO46DoU.s page 394 - - 3209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TCIE LL_USART_DisableIT_TC 3210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -23628,6 +25558,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RTOIE LL_USART_DisableIT_RTO 3254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None + ARM GAS /tmp/ccYgfTud.s page 427 + + 3256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx) 3258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -23638,9 +25571,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable End Of Block Interrupt 3264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 3265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. - ARM GAS /tmp/ccO46DoU.s page 395 - - 3266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 EOBIE LL_USART_DisableIT_EOB 3267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -23688,6 +25618,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx) 3312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccYgfTud.s page 428 + + 3313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE); 3314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23698,9 +25631,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not 3321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. 3322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 WUFIE LL_USART_DisableIT_WKUP - ARM GAS /tmp/ccO46DoU.s page 396 - - 3323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -23748,6 +25678,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1U : 0U); 3369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccYgfTud.s page 429 + + 3370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled. @@ -23758,9 +25691,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(const USART_TypeDef *USARTx) 3378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL); - ARM GAS /tmp/ccO46DoU.s page 397 - - 3380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -23808,6 +25738,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccYgfTud.s page 430 + + 3427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART End Of Block Interrupt is enabled or disabled. 3428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 3429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. @@ -23818,9 +25751,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(const USART_TypeDef *USARTx) 3435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE)) ? 1UL : 0UL); - ARM GAS /tmp/ccO46DoU.s page 398 - - 3437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -23868,6 +25798,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. 3482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 WUFIE LL_USART_IsEnabledIT_WKUP 3483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccYgfTud.s page 431 + + 3484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 3485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_WKUP(const USART_TypeDef *USARTx) @@ -23878,9 +25811,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 3491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */ 3492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */ 3493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT) - ARM GAS /tmp/ccO46DoU.s page 399 - - 3494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */ 3495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the Smartcard Transmission Complete Before Guard Time Interrupt is enabled or @@ -23928,6 +25858,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 3538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if DMA Mode is enabled for reception + ARM GAS /tmp/ccYgfTud.s page 432 + + 3541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX 3542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). @@ -23938,27 +25871,24 @@ ARM GAS /tmp/ccO46DoU.s page 1 3548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccO46DoU.s page 400 - - 3551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Mode for transmission 3552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX 3553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx) - 3999 .loc 7 3556 22 view .LVU1318 - 4000 .L132: + 5128 .loc 7 3556 22 view .LVU1656 + 5129 .L216: 3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); - 4001 .loc 7 3558 3 discriminator 1 view .LVU1319 - 4002 .LBB458: - 4003 .loc 7 3558 3 discriminator 1 view .LVU1320 - 4004 .loc 7 3558 3 discriminator 1 view .LVU1321 - 4005 .loc 7 3558 3 discriminator 1 view .LVU1322 - 4006 .LBB459: - 4007 .LBI459: - 4008 .file 8 "Drivers/CMSIS/Include/cmsis_gcc.h" + 5130 .loc 7 3558 3 discriminator 1 view .LVU1657 + 5131 .LBB531: + 5132 .loc 7 3558 3 discriminator 1 view .LVU1658 + 5133 .loc 7 3558 3 discriminator 1 view .LVU1659 + 5134 .loc 7 3558 3 discriminator 1 view .LVU1660 + 5135 .LBB532: + 5136 .LBI532: + 5137 .file 8 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file @@ -23988,6 +25918,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + ARM GAS /tmp/ccYgfTud.s page 433 + + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" @@ -23998,9 +25931,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ - ARM GAS /tmp/ccO46DoU.s page 401 - - 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -24048,6 +25978,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + ARM GAS /tmp/ccYgfTud.s page 434 + + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" @@ -24058,9 +25991,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" - ARM GAS /tmp/ccO46DoU.s page 402 - - 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop @@ -24108,6 +26038,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccYgfTud.s page 435 + + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -24118,9 +26051,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - ARM GAS /tmp/ccO46DoU.s page 403 - - 154:Drivers/CMSIS/Include/cmsis_gcc.h **** 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -24168,6 +26098,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 198:Drivers/CMSIS/Include/cmsis_gcc.h **** 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccYgfTud.s page 436 + + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value @@ -24178,9 +26111,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 208:Drivers/CMSIS/Include/cmsis_gcc.h **** 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccO46DoU.s page 404 - - 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -24228,6 +26158,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 255:Drivers/CMSIS/Include/cmsis_gcc.h **** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccYgfTud.s page 437 + + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value @@ -24238,9 +26171,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccO46DoU.s page 405 - - 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 270:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -24288,6 +26218,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + ARM GAS /tmp/ccYgfTud.s page 438 + + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -24298,9 +26231,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccO46DoU.s page 406 - - 325:Drivers/CMSIS/Include/cmsis_gcc.h **** 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer @@ -24348,6 +26278,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccYgfTud.s page 439 + + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -24358,9 +26291,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccO46DoU.s page 407 - - 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -24408,6 +26338,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccYgfTud.s page 440 + + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ @@ -24418,9 +26351,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccO46DoU.s page 408 - - 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); @@ -24468,6 +26398,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccYgfTud.s page 441 + + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. @@ -24478,9 +26411,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccO46DoU.s page 409 - - 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -24528,6 +26458,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + ARM GAS /tmp/ccYgfTud.s page 442 + + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 545:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -24538,9 +26471,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 550:Drivers/CMSIS/Include/cmsis_gcc.h **** 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccO46DoU.s page 410 - - 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set @@ -24588,6 +26518,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + ARM GAS /tmp/ccYgfTud.s page 443 + + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -24598,9 +26531,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. - ARM GAS /tmp/ccO46DoU.s page 411 - - 610:Drivers/CMSIS/Include/cmsis_gcc.h **** 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value @@ -24648,6 +26578,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 654:Drivers/CMSIS/Include/cmsis_gcc.h **** 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + ARM GAS /tmp/ccYgfTud.s page 444 + + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -24658,9 +26591,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccO46DoU.s page 412 - - 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 668:Drivers/CMSIS/Include/cmsis_gcc.h **** 669:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -24708,6 +26638,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccYgfTud.s page 445 + + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -24718,9 +26651,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set - ARM GAS /tmp/ccO46DoU.s page 413 - - 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -24768,6 +26698,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + ARM GAS /tmp/ccYgfTud.s page 446 + + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ @@ -24778,9 +26711,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccO46DoU.s page 414 - - 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -24828,6 +26758,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + ARM GAS /tmp/ccYgfTud.s page 447 + + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -24838,9 +26771,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 837:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccO46DoU.s page 415 - - 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o @@ -24888,6 +26818,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 882:Drivers/CMSIS/Include/cmsis_gcc.h **** 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier + ARM GAS /tmp/ccYgfTud.s page 448 + + 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -24898,9 +26831,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 892:Drivers/CMSIS/Include/cmsis_gcc.h **** 893:Drivers/CMSIS/Include/cmsis_gcc.h **** 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccO46DoU.s page 416 - - 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse @@ -24948,6 +26878,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 940:Drivers/CMSIS/Include/cmsis_gcc.h **** 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + ARM GAS /tmp/ccYgfTud.s page 449 + + 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -24958,9 +26891,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate - ARM GAS /tmp/ccO46DoU.s page 417 - - 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) @@ -25008,6 +26938,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccYgfTud.s page 450 + + 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; @@ -25018,9 +26951,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros - ARM GAS /tmp/ccO46DoU.s page 418 - - 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CLZ (uint8_t)__builtin_clz @@ -25068,6 +26998,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccYgfTud.s page 451 + + 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ @@ -25078,40 +27011,37 @@ ARM GAS /tmp/ccO46DoU.s page 1 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data - ARM GAS /tmp/ccO46DoU.s page 419 - - 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) - 4009 .loc 8 1068 31 view .LVU1323 - 4010 .LBB460: + 5138 .loc 8 1068 31 view .LVU1661 + 5139 .LBB533: 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 4011 .loc 8 1070 5 view .LVU1324 + 5140 .loc 8 1070 5 view .LVU1662 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 4012 .loc 8 1072 4 view .LVU1325 - 4013 00e8 784A ldr r2, .L141+76 - 4014 00ea 02F10803 add r3, r2, #8 - 4015 .syntax unified - 4016 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 4017 00ee 53E8003F ldrex r3, [r3] - 4018 @ 0 "" 2 - 4019 .LVL282: + 5141 .loc 8 1072 4 view .LVU1663 + 5142 00e8 794A ldr r2, .L225+76 + 5143 00ea 02F10803 add r3, r2, #8 + 5144 .syntax unified + 5145 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5146 00ee 53E8003F ldrex r3, [r3] + 5147 @ 0 "" 2 + 5148 .LVL416: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 4020 .loc 8 1073 4 view .LVU1326 - 4021 .loc 8 1073 4 is_stmt 0 view .LVU1327 - 4022 .thumb - 4023 .syntax unified - 4024 .LBE460: - 4025 .LBE459: - 4026 .loc 7 3558 3 discriminator 1 view .LVU1328 - 4027 00f2 43F08003 orr r3, r3, #128 - 4028 .LVL283: - 4029 .loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU1329 - 4030 .LBB461: - 4031 .LBI461: + 5149 .loc 8 1073 4 view .LVU1664 + 5150 .loc 8 1073 4 is_stmt 0 view .LVU1665 + 5151 .thumb + 5152 .syntax unified + 5153 .LBE533: + 5154 .LBE532: + 5155 .loc 7 3558 3 discriminator 1 view .LVU1666 + 5156 00f2 43F08003 orr r3, r3, #128 + 5157 .LVL417: + 5158 .loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU1667 + 5159 .LBB534: + 5160 .LBI534: 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -25128,6 +27058,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + ARM GAS /tmp/ccYgfTud.s page 452 + + 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -25138,9 +27071,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 1097:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1098:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1099:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded - ARM GAS /tmp/ccO46DoU.s page 420 - - 1100:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1101:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1102:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) @@ -25161,46 +27091,46 @@ ARM GAS /tmp/ccO46DoU.s page 1 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) - 4032 .loc 8 1119 31 view .LVU1330 - 4033 .LBB462: + 5161 .loc 8 1119 31 view .LVU1668 + 5162 .LBB535: 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 4034 .loc 8 1121 4 view .LVU1331 + 5163 .loc 8 1121 4 view .LVU1669 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 4035 .loc 8 1123 4 view .LVU1332 - 4036 00f6 0832 adds r2, r2, #8 - 4037 .syntax unified - 4038 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 4039 00f8 42E80031 strex r1, r3, [r2] - 4040 @ 0 "" 2 - 4041 .LVL284: + 5164 .loc 8 1123 4 view .LVU1670 + 5165 00f6 0832 adds r2, r2, #8 + 5166 .syntax unified + 5167 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5168 00f8 42E80031 strex r1, r3, [r2] + 5169 @ 0 "" 2 + 5170 .LVL418: 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 4042 .loc 8 1124 4 view .LVU1333 - 4043 .loc 8 1124 4 is_stmt 0 view .LVU1334 - 4044 .thumb - 4045 .syntax unified - 4046 .LBE462: - 4047 .LBE461: - 4048 .loc 7 3558 3 discriminator 1 view .LVU1335 - 4049 00fc 0029 cmp r1, #0 - 4050 00fe F3D1 bne .L132 - 4051 .LBE458: - 4052 .loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU1336 - 4053 .LVL285: - 4054 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU1337 - 4055 .LBE457: -1938:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); - 4056 .loc 1 1938 3 is_stmt 1 view .LVU1338 - 4057 .LBB463: - 4058 .LBI463: + 5171 .loc 8 1124 4 view .LVU1671 + 5172 .loc 8 1124 4 is_stmt 0 view .LVU1672 + 5173 .thumb + 5174 .syntax unified + 5175 .LBE535: + 5176 .LBE534: + 5177 .loc 7 3558 3 discriminator 1 view .LVU1673 + 5178 00fc 0029 cmp r1, #0 + 5179 00fe F3D1 bne .L216 + 5180 .LBE531: + 5181 .loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU1674 + 5182 .LVL419: + ARM GAS /tmp/ccYgfTud.s page 453 + + + 5183 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU1675 + 5184 .LBE530: +2071:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); + 5185 .loc 1 2071 3 is_stmt 1 view .LVU1676 + 5186 .LBB536: + 5187 .LBI536: 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 direct mode error flag. - ARM GAS /tmp/ccO46DoU.s page 421 - - 2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CDMEIF0 LL_DMA_ClearFlag_DME0 2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -25248,6 +27178,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF4 LL_DMA_ClearFlag_DME4 2417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccYgfTud.s page 454 + + 2419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME4(DMA_TypeDef *DMAx) 2421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -25258,9 +27191,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 direct mode error flag. 2427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF5 LL_DMA_ClearFlag_DME5 2428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccO46DoU.s page 422 - - 2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME5(DMA_TypeDef *DMAx) @@ -25308,6 +27238,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE1(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccYgfTud.s page 455 + + 2476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF1); 2478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -25318,9 +27251,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccO46DoU.s page 423 - - 2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE2(DMA_TypeDef *DMAx) 2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF2); @@ -25368,6 +27298,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE6(DMA_TypeDef *DMAx) 2531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF6); + ARM GAS /tmp/ccYgfTud.s page 456 + + 2533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -25378,9 +27311,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE7(DMA_TypeDef *DMAx) 2542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccO46DoU.s page 424 - - 2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF7); 2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -25428,6 +27358,9 @@ ARM GAS /tmp/ccO46DoU.s page 1 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Stream) + ARM GAS /tmp/ccYgfTud.s page 457 + + 2590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA 2592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -25438,9 +27371,6 @@ ARM GAS /tmp/ccO46DoU.s page 1 2597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 2599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 - ARM GAS /tmp/ccO46DoU.s page 425 - - 2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -25451,2936 +27381,2928 @@ ARM GAS /tmp/ccO46DoU.s page 1 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Stream) - 4059 .loc 6 2609 22 view .LVU1339 - 4060 .LBB464: + 5188 .loc 6 2609 22 view .LVU1677 + 5189 .LBB537: 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA - 4061 .loc 6 2611 3 view .LVU1340 - 4062 0100 734B ldr r3, .L141+80 - 4063 0102 D3F8B820 ldr r2, [r3, #184] - 4064 0106 42F01002 orr r2, r2, #16 - 4065 010a C3F8B820 str r2, [r3, #184] - 4066 .LVL286: - 4067 .loc 6 2611 3 is_stmt 0 view .LVU1341 - 4068 .LBE464: - 4069 .LBE463: -1939:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 4070 .loc 1 1939 3 is_stmt 1 view .LVU1342 - 4071 .LBB465: - 4072 .LBI465: + 5190 .loc 6 2611 3 view .LVU1678 + 5191 0100 744B ldr r3, .L225+80 + 5192 0102 D3F8B820 ldr r2, [r3, #184] + 5193 0106 42F01002 orr r2, r2, #16 + 5194 010a C3F8B820 str r2, [r3, #184] + 5195 .LVL420: + 5196 .loc 6 2611 3 is_stmt 0 view .LVU1679 + 5197 .LBE537: + 5198 .LBE536: +2072:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 5199 .loc 1 2072 3 is_stmt 1 view .LVU1680 + 5200 .LBB538: + 5201 .LBI538: 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 4073 .loc 6 2589 22 view .LVU1343 - 4074 .LBB466: + 5202 .loc 6 2589 22 view .LVU1681 + 5203 .LBB539: 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4075 .loc 6 2591 3 view .LVU1344 - 4076 010e D3F8B820 ldr r2, [r3, #184] - 4077 0112 42F00402 orr r2, r2, #4 - 4078 0116 C3F8B820 str r2, [r3, #184] - 4079 .LVL287: + 5204 .loc 6 2591 3 view .LVU1682 + 5205 010e D3F8B820 ldr r2, [r3, #184] + 5206 0112 42F00402 orr r2, r2, #4 + 5207 0116 C3F8B820 str r2, [r3, #184] + 5208 .LVL421: 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4080 .loc 6 2591 3 is_stmt 0 view .LVU1345 - 4081 .LBE466: - 4082 .LBE465: -1940:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 4083 .loc 1 1940 3 is_stmt 1 view .LVU1346 - 4084 .LBB467: - 4085 .LBI467: + 5209 .loc 6 2591 3 is_stmt 0 view .LVU1683 + 5210 .LBE539: + 5211 .LBE538: +2073:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 5212 .loc 1 2073 3 is_stmt 1 view .LVU1684 + 5213 .LBB540: + 5214 .LBI540: 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 4086 .loc 6 2277 22 view .LVU1347 - 4087 .LBB468: -2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4088 .loc 6 2279 3 view .LVU1348 - 4089 011a 4FF00062 mov r2, #134217728 - 4090 011e DA60 str r2, [r3, #12] - 4091 .LVL288: -2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4092 .loc 6 2279 3 is_stmt 0 view .LVU1349 - 4093 .LBE468: - 4094 .LBE467: -1941:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART - ARM GAS /tmp/ccO46DoU.s page 426 + 5215 .loc 6 2277 22 view .LVU1685 + 5216 .LBB541: + ARM GAS /tmp/ccYgfTud.s page 458 - 4095 .loc 1 1941 3 is_stmt 1 view .LVU1350 - 4096 .LBB469: - 4097 .LBI469: +2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 5217 .loc 6 2279 3 view .LVU1686 + 5218 011a 4FF00062 mov r2, #134217728 + 5219 011e DA60 str r2, [r3, #12] + 5220 .LVL422: +2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 5221 .loc 6 2279 3 is_stmt 0 view .LVU1687 + 5222 .LBE541: + 5223 .LBE540: +2074:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART + 5224 .loc 1 2074 3 is_stmt 1 view .LVU1688 + 5225 .LBB542: + 5226 .LBI542: 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 4098 .loc 6 2365 22 view .LVU1351 - 4099 .LBB470: + 5227 .loc 6 2365 22 view .LVU1689 + 5228 .LBB543: 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4100 .loc 6 2367 3 view .LVU1352 - 4101 0120 4FF00072 mov r2, #33554432 - 4102 0124 DA60 str r2, [r3, #12] - 4103 .LVL289: + 5229 .loc 6 2367 3 view .LVU1690 + 5230 0120 4FF00072 mov r2, #33554432 + 5231 0124 DA60 str r2, [r3, #12] + 5232 .LVL423: 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4104 .loc 6 2367 3 is_stmt 0 view .LVU1353 - 4105 .LBE470: - 4106 .LBE469: -1942:Src/main.c **** - 4107 .loc 1 1942 3 is_stmt 1 view .LVU1354 - 4108 0126 6B4A ldr r2, .L141+84 - 4109 .LVL290: - 4110 .LBB471: - 4111 .LBI471: + 5233 .loc 6 2367 3 is_stmt 0 view .LVU1691 + 5234 .LBE543: + 5235 .LBE542: +2075:Src/main.c **** + 5236 .loc 1 2075 3 is_stmt 1 view .LVU1692 + 5237 0126 6C4A ldr r2, .L225+84 + 5238 .LVL424: + 5239 .LBB544: + 5240 .LBI544: 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 4112 .loc 6 621 26 view .LVU1355 - 4113 .LBB472: + 5241 .loc 6 621 26 view .LVU1693 + 5242 .LBB545: 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4114 .loc 6 623 3 view .LVU1356 + 5243 .loc 6 623 3 view .LVU1694 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4115 .loc 6 623 11 is_stmt 0 view .LVU1357 - 4116 0128 D3F8B830 ldr r3, [r3, #184] - 4117 012c 03F0C003 and r3, r3, #192 - 4118 .LVL291: + 5244 .loc 6 623 11 is_stmt 0 view .LVU1695 + 5245 0128 D3F8B830 ldr r3, [r3, #184] + 5246 012c 03F0C003 and r3, r3, #192 + 5247 .LVL425: 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4119 .loc 6 623 11 view .LVU1358 - 4120 .LBE472: - 4121 .LBE471: - 4122 .LBB473: - 4123 .LBI473: + 5248 .loc 6 623 11 view .LVU1696 + 5249 .LBE545: + 5250 .LBE544: + 5251 .LBB546: + 5252 .LBI546: 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 4124 .loc 6 1425 22 is_stmt 1 view .LVU1359 - 4125 .LBB474: + 5253 .loc 6 1425 22 is_stmt 1 view .LVU1697 + 5254 .LBB547: 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 4126 .loc 6 1428 3 view .LVU1360 + 5255 .loc 6 1428 3 view .LVU1698 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 4127 .loc 6 1428 6 is_stmt 0 view .LVU1361 - 4128 0130 402B cmp r3, #64 - 4129 0132 7BD0 beq .L138 + 5256 .loc 6 1428 6 is_stmt 0 view .LVU1699 + 5257 0130 402B cmp r3, #64 + 5258 0132 7DD0 beq .L222 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR - 4130 .loc 6 1436 5 is_stmt 1 view .LVU1362 - 4131 0134 664B ldr r3, .L141+80 - 4132 .LVL292: + ARM GAS /tmp/ccYgfTud.s page 459 + + + 5259 .loc 6 1436 5 is_stmt 1 view .LVU1700 + 5260 0134 674B ldr r3, .L225+80 + 5261 .LVL426: 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR - 4133 .loc 6 1436 5 is_stmt 0 view .LVU1363 - 4134 0136 C3F8C020 str r2, [r3, #192] + 5262 .loc 6 1436 5 is_stmt 0 view .LVU1701 + 5263 0136 C3F8C020 str r2, [r3, #192] 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4135 .loc 6 1437 5 is_stmt 1 view .LVU1364 - 4136 013a 674A ldr r2, .L141+88 - 4137 013c C3F8C420 str r2, [r3, #196] - ARM GAS /tmp/ccO46DoU.s page 427 - - - 4138 .L134: - 4139 .LVL293: + 5264 .loc 6 1437 5 is_stmt 1 view .LVU1702 + 5265 013a 684A ldr r2, .L225+88 + 5266 013c C3F8C420 str r2, [r3, #196] + 5267 .L218: + 5268 .LVL427: 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4140 .loc 6 1437 5 is_stmt 0 view .LVU1365 - 4141 .LBE474: - 4142 .LBE473: -1947:Src/main.c **** SD_SLIDE = 0; - 4143 .loc 1 1947 2 is_stmt 1 view .LVU1366 -1947:Src/main.c **** SD_SLIDE = 0; - 4144 .loc 1 1947 10 is_stmt 0 view .LVU1367 - 4145 0140 0024 movs r4, #0 - 4146 0142 664B ldr r3, .L141+92 - 4147 0144 1C60 str r4, [r3] -1948:Src/main.c **** //Reset all periphery - 4148 .loc 1 1948 2 is_stmt 1 view .LVU1368 -1948:Src/main.c **** //Reset all periphery - 4149 .loc 1 1948 11 is_stmt 0 view .LVU1369 - 4150 0146 664B ldr r3, .L141+96 - 4151 0148 1C60 str r4, [r3] -1950:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); - 4152 .loc 1 1950 2 is_stmt 1 view .LVU1370 - 4153 014a 664F ldr r7, .L141+100 - 4154 014c 2246 mov r2, r4 - 4155 014e 0821 movs r1, #8 - 4156 0150 3846 mov r0, r7 - 4157 0152 FFF7FEFF bl HAL_GPIO_WritePin - 4158 .LVL294: -1951:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); - 4159 .loc 1 1951 2 view .LVU1371 - 4160 0156 2246 mov r2, r4 - 4161 0158 0421 movs r1, #4 - 4162 015a 3846 mov r0, r7 - 4163 015c FFF7FEFF bl HAL_GPIO_WritePin - 4164 .LVL295: -1952:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); - 4165 .loc 1 1952 2 view .LVU1372 - 4166 0160 DFF8A481 ldr r8, .L141+136 - 4167 0164 2246 mov r2, r4 - 4168 0166 4FF48071 mov r1, #256 - 4169 016a 4046 mov r0, r8 - 4170 016c FFF7FEFF bl HAL_GPIO_WritePin - 4171 .LVL296: -1953:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); - 4172 .loc 1 1953 2 view .LVU1373 - 4173 0170 2246 mov r2, r4 - 4174 0172 1021 movs r1, #16 - 4175 0174 3846 mov r0, r7 - 4176 0176 FFF7FEFF bl HAL_GPIO_WritePin - 4177 .LVL297: -1954:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); - 4178 .loc 1 1954 2 view .LVU1374 - 4179 017a 5B4E ldr r6, .L141+104 - 4180 017c 2246 mov r2, r4 - 4181 017e 4FF48061 mov r1, #1024 - 4182 0182 3046 mov r0, r6 - 4183 0184 FFF7FEFF bl HAL_GPIO_WritePin - 4184 .LVL298: - ARM GAS /tmp/ccO46DoU.s page 428 + 5269 .loc 6 1437 5 is_stmt 0 view .LVU1703 + 5270 .LBE547: + 5271 .LBE546: +2080:Src/main.c **** SD_SLIDE = 0; + 5272 .loc 1 2080 2 is_stmt 1 view .LVU1704 +2080:Src/main.c **** SD_SLIDE = 0; + 5273 .loc 1 2080 10 is_stmt 0 view .LVU1705 + 5274 0140 0024 movs r4, #0 + 5275 0142 674B ldr r3, .L225+92 + 5276 0144 1C60 str r4, [r3] +2081:Src/main.c **** //Reset all periphery + 5277 .loc 1 2081 2 is_stmt 1 view .LVU1706 +2081:Src/main.c **** //Reset all periphery + 5278 .loc 1 2081 11 is_stmt 0 view .LVU1707 + 5279 0146 674B ldr r3, .L225+96 + 5280 0148 1C60 str r4, [r3] +2083:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); + 5281 .loc 1 2083 2 is_stmt 1 view .LVU1708 + 5282 014a 674F ldr r7, .L225+100 + 5283 014c 2246 mov r2, r4 + 5284 014e 0821 movs r1, #8 + 5285 0150 3846 mov r0, r7 + 5286 0152 FFF7FEFF bl HAL_GPIO_WritePin + 5287 .LVL428: +2084:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); + 5288 .loc 1 2084 2 view .LVU1709 + 5289 0156 2246 mov r2, r4 + 5290 0158 0421 movs r1, #4 + 5291 015a 3846 mov r0, r7 + 5292 015c FFF7FEFF bl HAL_GPIO_WritePin + 5293 .LVL429: +2085:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); + 5294 .loc 1 2085 2 view .LVU1710 + 5295 0160 DFF8A881 ldr r8, .L225+136 + 5296 0164 2246 mov r2, r4 + 5297 0166 4FF48071 mov r1, #256 + 5298 016a 4046 mov r0, r8 + 5299 016c FFF7FEFF bl HAL_GPIO_WritePin + 5300 .LVL430: +2086:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); + 5301 .loc 1 2086 2 view .LVU1711 + 5302 0170 2246 mov r2, r4 + 5303 0172 1021 movs r1, #16 + 5304 0174 3846 mov r0, r7 + ARM GAS /tmp/ccYgfTud.s page 460 -1955:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); - 4185 .loc 1 1955 2 view .LVU1375 - 4186 0188 584D ldr r5, .L141+108 - 4187 018a 2246 mov r2, r4 - 4188 018c 0821 movs r1, #8 - 4189 018e 2846 mov r0, r5 - 4190 0190 FFF7FEFF bl HAL_GPIO_WritePin - 4191 .LVL299: -1956:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); - 4192 .loc 1 1956 2 view .LVU1376 - 4193 0194 2246 mov r2, r4 - 4194 0196 0121 movs r1, #1 - 4195 0198 2846 mov r0, r5 - 4196 019a FFF7FEFF bl HAL_GPIO_WritePin - 4197 .LVL300: -1957:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 4198 .loc 1 1957 2 view .LVU1377 - 4199 019e 2246 mov r2, r4 - 4200 01a0 0221 movs r1, #2 - 4201 01a2 2846 mov r0, r5 - 4202 01a4 FFF7FEFF bl HAL_GPIO_WritePin - 4203 .LVL301: -1958:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 4204 .loc 1 1958 2 view .LVU1378 - 4205 01a8 2246 mov r2, r4 - 4206 01aa 4FF40061 mov r1, #2048 - 4207 01ae 3046 mov r0, r6 - 4208 01b0 FFF7FEFF bl HAL_GPIO_WritePin - 4209 .LVL302: -1959:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) - 4210 .loc 1 1959 2 view .LVU1379 - 4211 01b4 2246 mov r2, r4 - 4212 01b6 2021 movs r1, #32 - 4213 01b8 3846 mov r0, r7 - 4214 01ba FFF7FEFF bl HAL_GPIO_WritePin - 4215 .LVL303: -1969:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC - 4216 .loc 1 1969 2 view .LVU1380 - 4217 01be 07F50067 add r7, r7, #2048 - 4218 01c2 0122 movs r2, #1 - 4219 01c4 4FF48061 mov r1, #1024 - 4220 01c8 3846 mov r0, r7 - 4221 01ca FFF7FEFF bl HAL_GPIO_WritePin - 4222 .LVL304: -1970:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 4223 .loc 1 1970 2 view .LVU1381 - 4224 01ce 484C ldr r4, .L141+112 - 4225 01d0 0122 movs r2, #1 - 4226 01d2 4021 movs r1, #64 - 4227 01d4 2046 mov r0, r4 - 4228 01d6 FFF7FEFF bl HAL_GPIO_WritePin - 4229 .LVL305: -1971:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 4230 .loc 1 1971 2 view .LVU1382 - 4231 01da 0122 movs r2, #1 - 4232 01dc 4FF48041 mov r1, #16384 - 4233 01e0 3846 mov r0, r7 - ARM GAS /tmp/ccO46DoU.s page 429 + 5305 0176 FFF7FEFF bl HAL_GPIO_WritePin + 5306 .LVL431: +2087:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); + 5307 .loc 1 2087 2 view .LVU1712 + 5308 017a 5C4E ldr r6, .L225+104 + 5309 017c 2246 mov r2, r4 + 5310 017e 4FF48061 mov r1, #1024 + 5311 0182 3046 mov r0, r6 + 5312 0184 FFF7FEFF bl HAL_GPIO_WritePin + 5313 .LVL432: +2088:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); + 5314 .loc 1 2088 2 view .LVU1713 + 5315 0188 594D ldr r5, .L225+108 + 5316 018a 2246 mov r2, r4 + 5317 018c 0821 movs r1, #8 + 5318 018e 2846 mov r0, r5 + 5319 0190 FFF7FEFF bl HAL_GPIO_WritePin + 5320 .LVL433: +2089:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); + 5321 .loc 1 2089 2 view .LVU1714 + 5322 0194 2246 mov r2, r4 + 5323 0196 0121 movs r1, #1 + 5324 0198 2846 mov r0, r5 + 5325 019a FFF7FEFF bl HAL_GPIO_WritePin + 5326 .LVL434: +2090:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 5327 .loc 1 2090 2 view .LVU1715 + 5328 019e 2246 mov r2, r4 + 5329 01a0 0221 movs r1, #2 + 5330 01a2 2846 mov r0, r5 + 5331 01a4 FFF7FEFF bl HAL_GPIO_WritePin + 5332 .LVL435: +2091:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 5333 .loc 1 2091 2 view .LVU1716 + 5334 01a8 2246 mov r2, r4 + 5335 01aa 4FF40061 mov r1, #2048 + 5336 01ae 3046 mov r0, r6 + 5337 01b0 FFF7FEFF bl HAL_GPIO_WritePin + 5338 .LVL436: +2092:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) + 5339 .loc 1 2092 2 view .LVU1717 + 5340 01b4 2246 mov r2, r4 + 5341 01b6 2021 movs r1, #32 + 5342 01b8 3846 mov r0, r7 + 5343 01ba FFF7FEFF bl HAL_GPIO_WritePin + 5344 .LVL437: +2102:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC + 5345 .loc 1 2102 2 view .LVU1718 + 5346 01be 07F50067 add r7, r7, #2048 + 5347 01c2 0122 movs r2, #1 + 5348 01c4 4FF48061 mov r1, #1024 + 5349 01c8 3846 mov r0, r7 + 5350 01ca FFF7FEFF bl HAL_GPIO_WritePin + 5351 .LVL438: +2103:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 5352 .loc 1 2103 2 view .LVU1719 + 5353 01ce 494C ldr r4, .L225+112 + ARM GAS /tmp/ccYgfTud.s page 461 - 4234 01e2 FFF7FEFF bl HAL_GPIO_WritePin - 4235 .LVL306: -1972:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 - 4236 .loc 1 1972 2 view .LVU1383 - 4237 01e6 0122 movs r2, #1 - 4238 01e8 4FF48041 mov r1, #16384 - 4239 01ec 2046 mov r0, r4 - 4240 01ee FFF7FEFF bl HAL_GPIO_WritePin - 4241 .LVL307: -1973:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 4242 .loc 1 1973 2 view .LVU1384 - 4243 01f2 0122 movs r2, #1 - 4244 01f4 4FF48041 mov r1, #16384 - 4245 01f8 3046 mov r0, r6 - 4246 01fa FFF7FEFF bl HAL_GPIO_WritePin - 4247 .LVL308: -1974:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 4248 .loc 1 1974 2 view .LVU1385 - 4249 01fe 0122 movs r2, #1 - 4250 0200 4021 movs r1, #64 - 4251 0202 2846 mov r0, r5 - 4252 0204 FFF7FEFF bl HAL_GPIO_WritePin - 4253 .LVL309: -1975:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 4254 .loc 1 1975 2 view .LVU1386 - 4255 0208 0122 movs r2, #1 - 4256 020a 4FF48051 mov r1, #4096 - 4257 020e 3046 mov r0, r6 - 4258 0210 FFF7FEFF bl HAL_GPIO_WritePin - 4259 .LVL310: -1976:Src/main.c **** - 4260 .loc 1 1976 2 view .LVU1387 - 4261 0214 0122 movs r2, #1 - 4262 0216 1021 movs r1, #16 - 4263 0218 2846 mov r0, r5 - 4264 021a FFF7FEFF bl HAL_GPIO_WritePin - 4265 .LVL311: -1980:Src/main.c **** { - 4266 .loc 1 1980 2 view .LVU1388 -1980:Src/main.c **** { - 4267 .loc 1 1980 6 is_stmt 0 view .LVU1389 - 4268 021e 0121 movs r1, #1 - 4269 0220 4046 mov r0, r8 - 4270 0222 FFF7FEFF bl HAL_GPIO_ReadPin - 4271 .LVL312: -1980:Src/main.c **** { - 4272 .loc 1 1980 5 discriminator 1 view .LVU1390 - 4273 0226 40B1 cbz r0, .L139 - 4274 .L129: -2010:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 4275 .loc 1 2010 1 view .LVU1391 - 4276 0228 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 4277 .LVL313: - 4278 .L138: - 4279 .LBB476: - 4280 .LBB475: + 5354 01d0 0122 movs r2, #1 + 5355 01d2 4021 movs r1, #64 + 5356 01d4 2046 mov r0, r4 + 5357 01d6 FFF7FEFF bl HAL_GPIO_WritePin + 5358 .LVL439: +2104:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 5359 .loc 1 2104 2 view .LVU1720 + 5360 01da 0122 movs r2, #1 + 5361 01dc 4FF48041 mov r1, #16384 + 5362 01e0 3846 mov r0, r7 + 5363 01e2 FFF7FEFF bl HAL_GPIO_WritePin + 5364 .LVL440: +2105:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 + 5365 .loc 1 2105 2 view .LVU1721 + 5366 01e6 0122 movs r2, #1 + 5367 01e8 4FF48041 mov r1, #16384 + 5368 01ec 2046 mov r0, r4 + 5369 01ee FFF7FEFF bl HAL_GPIO_WritePin + 5370 .LVL441: +2106:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 5371 .loc 1 2106 2 view .LVU1722 + 5372 01f2 0122 movs r2, #1 + 5373 01f4 4FF48041 mov r1, #16384 + 5374 01f8 3046 mov r0, r6 + 5375 01fa FFF7FEFF bl HAL_GPIO_WritePin + 5376 .LVL442: +2107:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 5377 .loc 1 2107 2 view .LVU1723 + 5378 01fe 0122 movs r2, #1 + 5379 0200 4021 movs r1, #64 + 5380 0202 2846 mov r0, r5 + 5381 0204 FFF7FEFF bl HAL_GPIO_WritePin + 5382 .LVL443: +2108:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 5383 .loc 1 2108 2 view .LVU1724 + 5384 0208 0122 movs r2, #1 + 5385 020a 4FF48051 mov r1, #4096 + 5386 020e 3046 mov r0, r6 + 5387 0210 FFF7FEFF bl HAL_GPIO_WritePin + 5388 .LVL444: +2109:Src/main.c **** + 5389 .loc 1 2109 2 view .LVU1725 + 5390 0214 0122 movs r2, #1 + 5391 0216 1021 movs r1, #16 + 5392 0218 2846 mov r0, r5 + 5393 021a FFF7FEFF bl HAL_GPIO_WritePin + 5394 .LVL445: +2113:Src/main.c **** { + 5395 .loc 1 2113 2 view .LVU1726 +2113:Src/main.c **** { + 5396 .loc 1 2113 6 is_stmt 0 view .LVU1727 + 5397 021e 0121 movs r1, #1 + 5398 0220 4046 mov r0, r8 + 5399 0222 FFF7FEFF bl HAL_GPIO_ReadPin + 5400 .LVL446: +2113:Src/main.c **** { + 5401 .loc 1 2113 5 discriminator 1 view .LVU1728 + ARM GAS /tmp/ccYgfTud.s page 462 + + + 5402 0226 50B1 cbz r0, .L223 + 5403 .L219: +2144:Src/main.c **** } + 5404 .loc 1 2144 2 is_stmt 1 view .LVU1729 + 5405 0228 FFF7FEFF bl AD9102_Init + 5406 .LVL447: +2145:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 5407 .loc 1 2145 1 is_stmt 0 view .LVU1730 + 5408 022c BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 5409 .LVL448: + 5410 .L222: + 5411 .LBB549: + 5412 .LBB548: 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, - ARM GAS /tmp/ccO46DoU.s page 430 - - - 4281 .loc 6 1430 5 is_stmt 1 view .LVU1392 - 4282 022c 284B ldr r3, .L141+80 - 4283 .LVL314: + 5413 .loc 6 1430 5 is_stmt 1 view .LVU1731 + 5414 0230 284B ldr r3, .L225+80 + 5415 .LVL449: 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, - 4284 .loc 6 1430 5 is_stmt 0 view .LVU1393 - 4285 022e C3F8C420 str r2, [r3, #196] + 5416 .loc 6 1430 5 is_stmt 0 view .LVU1732 + 5417 0232 C3F8C420 str r2, [r3, #196] 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4286 .loc 6 1431 5 is_stmt 1 view .LVU1394 - 4287 0232 294A ldr r2, .L141+88 - 4288 0234 C3F8C020 str r2, [r3, #192] - 4289 0238 82E7 b .L134 - 4290 .LVL315: - 4291 .L139: + 5418 .loc 6 1431 5 is_stmt 1 view .LVU1733 + 5419 0236 294A ldr r2, .L225+88 + 5420 0238 C3F8C020 str r2, [r3, #192] + 5421 023c 80E7 b .L218 + 5422 .LVL450: + 5423 .L223: 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 4292 .loc 6 1431 5 is_stmt 0 view .LVU1395 - 4293 .LBE475: - 4294 .LBE476: -1983:Src/main.c **** { - 4295 .loc 1 1983 3 is_stmt 1 view .LVU1396 -1983:Src/main.c **** { - 4296 .loc 1 1983 7 is_stmt 0 view .LVU1397 - 4297 023a 4FF48071 mov r1, #256 - 4298 023e 2846 mov r0, r5 - 4299 0240 FFF7FEFF bl HAL_GPIO_ReadPin - 4300 .LVL316: -1983:Src/main.c **** { - 4301 .loc 1 1983 6 discriminator 1 view .LVU1398 - 4302 0244 0028 cmp r0, #0 - 4303 0246 EFD1 bne .L129 -1986:Src/main.c **** if (test == 0) //0 - suc - 4304 .loc 1 1986 4 is_stmt 1 view .LVU1399 -1986:Src/main.c **** if (test == 0) //0 - suc - 4305 .loc 1 1986 11 is_stmt 0 view .LVU1400 - 4306 0248 2A48 ldr r0, .L141+116 - 4307 024a FFF7FEFF bl Mount_SD - 4308 .LVL317: -1986:Src/main.c **** if (test == 0) //0 - suc - 4309 .loc 1 1986 9 discriminator 1 view .LVU1401 - 4310 024e 2A4B ldr r3, .L141+120 - 4311 0250 1860 str r0, [r3] -1987:Src/main.c **** { - 4312 .loc 1 1987 4 is_stmt 1 view .LVU1402 -1987:Src/main.c **** { - 4313 .loc 1 1987 7 is_stmt 0 view .LVU1403 - 4314 0252 18B1 cbz r0, .L140 - 4315 .L136: -1999:Src/main.c **** } - 4316 .loc 1 1999 4 is_stmt 1 view .LVU1404 -1999:Src/main.c **** } - 4317 .loc 1 1999 14 is_stmt 0 view .LVU1405 - 4318 0254 294B ldr r3, .L141+124 - 4319 0256 0122 movs r2, #1 - 4320 0258 1A70 strb r2, [r3] -2010:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 4321 .loc 1 2010 1 view .LVU1406 - 4322 025a E5E7 b .L129 - 4323 .L140: - ARM GAS /tmp/ccO46DoU.s page 431 + 5424 .loc 6 1431 5 is_stmt 0 view .LVU1734 + 5425 .LBE548: + 5426 .LBE549: +2116:Src/main.c **** { + 5427 .loc 1 2116 3 is_stmt 1 view .LVU1735 +2116:Src/main.c **** { + 5428 .loc 1 2116 7 is_stmt 0 view .LVU1736 + 5429 023e 4FF48071 mov r1, #256 + 5430 0242 2846 mov r0, r5 + 5431 0244 FFF7FEFF bl HAL_GPIO_ReadPin + 5432 .LVL451: +2116:Src/main.c **** { + 5433 .loc 1 2116 6 discriminator 1 view .LVU1737 + 5434 0248 0028 cmp r0, #0 + 5435 024a EDD1 bne .L219 +2119:Src/main.c **** if (test == 0) //0 - suc + 5436 .loc 1 2119 4 is_stmt 1 view .LVU1738 +2119:Src/main.c **** if (test == 0) //0 - suc + 5437 .loc 1 2119 11 is_stmt 0 view .LVU1739 + 5438 024c 2A48 ldr r0, .L225+116 + 5439 024e FFF7FEFF bl Mount_SD + 5440 .LVL452: +2119:Src/main.c **** if (test == 0) //0 - suc + 5441 .loc 1 2119 9 discriminator 1 view .LVU1740 + 5442 0252 2A4B ldr r3, .L225+120 + 5443 0254 1860 str r0, [r3] +2120:Src/main.c **** { + 5444 .loc 1 2120 4 is_stmt 1 view .LVU1741 +2120:Src/main.c **** { + ARM GAS /tmp/ccYgfTud.s page 463 -1990:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 4324 .loc 1 1990 5 is_stmt 1 view .LVU1407 -1990:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 4325 .loc 1 1990 12 is_stmt 0 view .LVU1408 - 4326 025c 1E23 movs r3, #30 - 4327 025e 1A46 mov r2, r3 - 4328 0260 2749 ldr r1, .L141+128 - 4329 0262 2848 ldr r0, .L141+132 - 4330 0264 FFF7FEFF bl Seek_Read_File - 4331 .LVL318: -1990:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 4332 .loc 1 1990 10 discriminator 1 view .LVU1409 - 4333 0268 234C ldr r4, .L141+120 - 4334 026a 2060 str r0, [r4] -1991:Src/main.c **** UART_rec_incr = 0; - 4335 .loc 1 1991 5 is_stmt 1 view .LVU1410 -1991:Src/main.c **** UART_rec_incr = 0; - 4336 .loc 1 1991 12 is_stmt 0 view .LVU1411 - 4337 026c 2148 ldr r0, .L141+116 - 4338 026e FFF7FEFF bl Unmount_SD - 4339 .LVL319: -1991:Src/main.c **** UART_rec_incr = 0; - 4340 .loc 1 1991 10 discriminator 1 view .LVU1412 - 4341 0272 2060 str r0, [r4] -1992:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 4342 .loc 1 1992 5 is_stmt 1 view .LVU1413 -1992:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 4343 .loc 1 1992 19 is_stmt 0 view .LVU1414 - 4344 0274 0023 movs r3, #0 - 4345 0276 084A ldr r2, .L141+24 - 4346 0278 1380 strh r3, [r2] @ movhi -1993:Src/main.c **** } - 4347 .loc 1 1993 5 is_stmt 1 view .LVU1415 -1993:Src/main.c **** } - 4348 .loc 1 1993 13 is_stmt 0 view .LVU1416 - 4349 027a 064A ldr r2, .L141+20 - 4350 027c 1370 strb r3, [r2] - 4351 027e E9E7 b .L136 - 4352 .L142: - 4353 .align 2 - 4354 .L141: - 4355 0280 00000000 .word TO6 - 4356 0284 00000000 .word TO7 - 4357 0288 00000000 .word TO7_before - 4358 028c 00000000 .word TO6_before - 4359 0290 00000000 .word TO6_uart - 4360 0294 00000000 .word flg_tmt - 4361 0298 00000000 .word UART_rec_incr - 4362 029c 00000000 .word fgoto - 4363 02a0 00000000 .word sizeoffile - 4364 02a4 00000000 .word u_tx_flg - 4365 02a8 00000000 .word u_rx_flg - 4366 02ac 00000000 .word Long_Data - 4367 02b0 00000000 .word Def_setup - 4368 02b4 00000000 .word LD1_def_setup - 4369 02b8 00000000 .word LD2_def_setup - 4370 02bc 00000000 .word Curr_setup - ARM GAS /tmp/ccO46DoU.s page 432 + 5445 .loc 1 2120 7 is_stmt 0 view .LVU1742 + 5446 0256 18B1 cbz r0, .L224 + 5447 .L220: +2132:Src/main.c **** } + 5448 .loc 1 2132 4 is_stmt 1 view .LVU1743 +2132:Src/main.c **** } + 5449 .loc 1 2132 14 is_stmt 0 view .LVU1744 + 5450 0258 294B ldr r3, .L225+124 + 5451 025a 0122 movs r2, #1 + 5452 025c 1A70 strb r2, [r3] + 5453 025e E3E7 b .L219 + 5454 .L224: +2123:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5455 .loc 1 2123 5 is_stmt 1 view .LVU1745 +2123:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5456 .loc 1 2123 12 is_stmt 0 view .LVU1746 + 5457 0260 1E23 movs r3, #30 + 5458 0262 1A46 mov r2, r3 + 5459 0264 2749 ldr r1, .L225+128 + 5460 0266 2848 ldr r0, .L225+132 + 5461 0268 FFF7FEFF bl Seek_Read_File + 5462 .LVL453: +2123:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5463 .loc 1 2123 10 discriminator 1 view .LVU1747 + 5464 026c 234C ldr r4, .L225+120 + 5465 026e 2060 str r0, [r4] +2124:Src/main.c **** UART_rec_incr = 0; + 5466 .loc 1 2124 5 is_stmt 1 view .LVU1748 +2124:Src/main.c **** UART_rec_incr = 0; + 5467 .loc 1 2124 12 is_stmt 0 view .LVU1749 + 5468 0270 2148 ldr r0, .L225+116 + 5469 0272 FFF7FEFF bl Unmount_SD + 5470 .LVL454: +2124:Src/main.c **** UART_rec_incr = 0; + 5471 .loc 1 2124 10 discriminator 1 view .LVU1750 + 5472 0276 2060 str r0, [r4] +2125:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 5473 .loc 1 2125 5 is_stmt 1 view .LVU1751 +2125:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 5474 .loc 1 2125 19 is_stmt 0 view .LVU1752 + 5475 0278 0023 movs r3, #0 + 5476 027a 084A ldr r2, .L225+24 + 5477 027c 1380 strh r3, [r2] @ movhi +2126:Src/main.c **** } + 5478 .loc 1 2126 5 is_stmt 1 view .LVU1753 +2126:Src/main.c **** } + 5479 .loc 1 2126 13 is_stmt 0 view .LVU1754 + 5480 027e 064A ldr r2, .L225+20 + 5481 0280 1370 strb r3, [r2] + 5482 0282 E9E7 b .L220 + 5483 .L226: + 5484 .align 2 + 5485 .L225: + 5486 0284 00000000 .word TO6 + 5487 0288 00000000 .word TO7 + 5488 028c 00000000 .word TO7_before + 5489 0290 00000000 .word TO6_before + ARM GAS /tmp/ccYgfTud.s page 464 - 4371 02c0 00000000 .word LD1_curr_setup - 4372 02c4 00000000 .word LD2_curr_setup - 4373 02c8 00100040 .word 1073745920 - 4374 02cc 00100140 .word 1073811456 - 4375 02d0 00640240 .word 1073898496 - 4376 02d4 00000000 .word UART_DATA - 4377 02d8 28100140 .word 1073811496 - 4378 02dc 00000000 .word SD_SEEK - 4379 02e0 00000000 .word SD_SLIDE - 4380 02e4 00080240 .word 1073874944 - 4381 02e8 00040240 .word 1073873920 - 4382 02ec 00000240 .word 1073872896 - 4383 02f0 00140240 .word 1073878016 - 4384 02f4 00000000 .word .LC0 - 4385 02f8 00000000 .word test - 4386 02fc 00000000 .word CPU_state - 4387 0300 00000000 .word COMMAND - 4388 0304 04000000 .word .LC1 - 4389 0308 000C0240 .word 1073875968 - 4390 .cfi_endproc - 4391 .LFE1207: - 4393 .section .text.Get_ADC,"ax",%progbits - 4394 .align 1 - 4395 .syntax unified - 4396 .thumb - 4397 .thumb_func - 4399 Get_ADC: - 4400 .LVL320: - 4401 .LFB1213: -2439:Src/main.c **** uint16_t OUT; - 4402 .loc 1 2439 1 is_stmt 1 view -0 - 4403 .cfi_startproc - 4404 @ args = 0, pretend = 0, frame = 0 - 4405 @ frame_needed = 0, uses_anonymous_args = 0 -2439:Src/main.c **** uint16_t OUT; - 4406 .loc 1 2439 1 is_stmt 0 view .LVU1418 - 4407 0000 10B5 push {r4, lr} - 4408 .LCFI40: - 4409 .cfi_def_cfa_offset 8 - 4410 .cfi_offset 4, -8 - 4411 .cfi_offset 14, -4 - 4412 0002 0024 movs r4, #0 -2440:Src/main.c **** switch (num) - 4413 .loc 1 2440 2 is_stmt 1 view .LVU1419 -2441:Src/main.c **** { - 4414 .loc 1 2441 2 view .LVU1420 - 4415 0004 0528 cmp r0, #5 - 4416 0006 2CD8 bhi .L152 - 4417 0008 DFE800F0 tbb [pc, r0] - 4418 .L146: - 4419 000c 03 .byte (.L151-.L146)/2 - 4420 000d 08 .byte (.L150-.L146)/2 - 4421 000e 12 .byte (.L149-.L146)/2 - 4422 000f 17 .byte (.L148-.L146)/2 - 4423 0010 1C .byte (.L147-.L146)/2 - 4424 0011 26 .byte (.L145-.L146)/2 - 4425 .p2align 1 - ARM GAS /tmp/ccO46DoU.s page 433 + 5490 0294 00000000 .word TO6_uart + 5491 0298 00000000 .word flg_tmt + 5492 029c 00000000 .word UART_rec_incr + 5493 02a0 00000000 .word fgoto + 5494 02a4 00000000 .word sizeoffile + 5495 02a8 00000000 .word u_tx_flg + 5496 02ac 00000000 .word u_rx_flg + 5497 02b0 00000000 .word Long_Data + 5498 02b4 00000000 .word Def_setup + 5499 02b8 00000000 .word LD1_def_setup + 5500 02bc 00000000 .word LD2_def_setup + 5501 02c0 00000000 .word Curr_setup + 5502 02c4 00000000 .word LD1_curr_setup + 5503 02c8 00000000 .word LD2_curr_setup + 5504 02cc 00100040 .word 1073745920 + 5505 02d0 00100140 .word 1073811456 + 5506 02d4 00640240 .word 1073898496 + 5507 02d8 00000000 .word UART_DATA + 5508 02dc 28100140 .word 1073811496 + 5509 02e0 00000000 .word SD_SEEK + 5510 02e4 00000000 .word SD_SLIDE + 5511 02e8 00080240 .word 1073874944 + 5512 02ec 00040240 .word 1073873920 + 5513 02f0 00000240 .word 1073872896 + 5514 02f4 00140240 .word 1073878016 + 5515 02f8 00000000 .word .LC0 + 5516 02fc 00000000 .word test + 5517 0300 00000000 .word CPU_state + 5518 0304 00000000 .word COMMAND + 5519 0308 04000000 .word .LC1 + 5520 030c 000C0240 .word 1073875968 + 5521 .cfi_endproc + 5522 .LFE1207: + 5524 .section .text.Get_ADC,"ax",%progbits + 5525 .align 1 + 5526 .syntax unified + 5527 .thumb + 5528 .thumb_func + 5530 Get_ADC: + 5531 .LVL455: + 5532 .LFB1219: +2785:Src/main.c **** uint16_t OUT; + 5533 .loc 1 2785 1 is_stmt 1 view -0 + 5534 .cfi_startproc + 5535 @ args = 0, pretend = 0, frame = 0 + 5536 @ frame_needed = 0, uses_anonymous_args = 0 +2785:Src/main.c **** uint16_t OUT; + 5537 .loc 1 2785 1 is_stmt 0 view .LVU1756 + 5538 0000 10B5 push {r4, lr} + 5539 .LCFI54: + 5540 .cfi_def_cfa_offset 8 + 5541 .cfi_offset 4, -8 + 5542 .cfi_offset 14, -4 + 5543 0002 0024 movs r4, #0 +2786:Src/main.c **** switch (num) + 5544 .loc 1 2786 2 is_stmt 1 view .LVU1757 +2787:Src/main.c **** { + ARM GAS /tmp/ccYgfTud.s page 465 - 4426 .L151: -2444:Src/main.c **** break; - 4427 .loc 1 2444 5 view .LVU1421 - 4428 0012 1548 ldr r0, .L154 - 4429 .LVL321: -2444:Src/main.c **** break; - 4430 .loc 1 2444 5 is_stmt 0 view .LVU1422 - 4431 0014 FFF7FEFF bl HAL_ADC_Start - 4432 .LVL322: -2445:Src/main.c **** case 1: - 4433 .loc 1 2445 4 is_stmt 1 view .LVU1423 - 4434 0018 2046 mov r0, r4 - 4435 .L144: - 4436 .LVL323: -2464:Src/main.c **** } - 4437 .loc 1 2464 2 view .LVU1424 -2465:Src/main.c **** - 4438 .loc 1 2465 1 is_stmt 0 view .LVU1425 - 4439 001a 10BD pop {r4, pc} - 4440 .LVL324: - 4441 .L150: -2447:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 4442 .loc 1 2447 5 is_stmt 1 view .LVU1426 - 4443 001c 124C ldr r4, .L154 - 4444 001e 6421 movs r1, #100 - 4445 0020 2046 mov r0, r4 - 4446 .LVL325: -2447:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 4447 .loc 1 2447 5 is_stmt 0 view .LVU1427 - 4448 0022 FFF7FEFF bl HAL_ADC_PollForConversion - 4449 .LVL326: -2448:Src/main.c **** break; - 4450 .loc 1 2448 9 is_stmt 1 view .LVU1428 -2448:Src/main.c **** break; - 4451 .loc 1 2448 15 is_stmt 0 view .LVU1429 - 4452 0026 2046 mov r0, r4 - 4453 0028 FFF7FEFF bl HAL_ADC_GetValue - 4454 .LVL327: -2448:Src/main.c **** break; - 4455 .loc 1 2448 13 discriminator 1 view .LVU1430 - 4456 002c 80B2 uxth r0, r0 - 4457 .LVL328: -2449:Src/main.c **** case 2: - 4458 .loc 1 2449 4 is_stmt 1 view .LVU1431 - 4459 002e F4E7 b .L144 - 4460 .LVL329: - 4461 .L149: -2451:Src/main.c **** break; - 4462 .loc 1 2451 5 view .LVU1432 - 4463 0030 0D48 ldr r0, .L154 - 4464 .LVL330: -2451:Src/main.c **** break; - 4465 .loc 1 2451 5 is_stmt 0 view .LVU1433 - 4466 0032 FFF7FEFF bl HAL_ADC_Stop - 4467 .LVL331: -2452:Src/main.c **** case 3: - 4468 .loc 1 2452 4 is_stmt 1 view .LVU1434 - ARM GAS /tmp/ccO46DoU.s page 434 + 5545 .loc 1 2787 2 view .LVU1758 + 5546 0004 0528 cmp r0, #5 + 5547 0006 2CD8 bhi .L236 + 5548 0008 DFE800F0 tbb [pc, r0] + 5549 .L230: + 5550 000c 03 .byte (.L235-.L230)/2 + 5551 000d 08 .byte (.L234-.L230)/2 + 5552 000e 12 .byte (.L233-.L230)/2 + 5553 000f 17 .byte (.L232-.L230)/2 + 5554 0010 1C .byte (.L231-.L230)/2 + 5555 0011 26 .byte (.L229-.L230)/2 + 5556 .p2align 1 + 5557 .L235: +2790:Src/main.c **** break; + 5558 .loc 1 2790 5 view .LVU1759 + 5559 0012 1548 ldr r0, .L238 + 5560 .LVL456: +2790:Src/main.c **** break; + 5561 .loc 1 2790 5 is_stmt 0 view .LVU1760 + 5562 0014 FFF7FEFF bl HAL_ADC_Start + 5563 .LVL457: +2791:Src/main.c **** case 1: + 5564 .loc 1 2791 4 is_stmt 1 view .LVU1761 + 5565 0018 2046 mov r0, r4 + 5566 .L228: + 5567 .LVL458: +2810:Src/main.c **** } + 5568 .loc 1 2810 2 view .LVU1762 +2811:Src/main.c **** + 5569 .loc 1 2811 1 is_stmt 0 view .LVU1763 + 5570 001a 10BD pop {r4, pc} + 5571 .LVL459: + 5572 .L234: +2793:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 5573 .loc 1 2793 5 is_stmt 1 view .LVU1764 + 5574 001c 124C ldr r4, .L238 + 5575 001e 6421 movs r1, #100 + 5576 0020 2046 mov r0, r4 + 5577 .LVL460: +2793:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 5578 .loc 1 2793 5 is_stmt 0 view .LVU1765 + 5579 0022 FFF7FEFF bl HAL_ADC_PollForConversion + 5580 .LVL461: +2794:Src/main.c **** break; + 5581 .loc 1 2794 9 is_stmt 1 view .LVU1766 +2794:Src/main.c **** break; + 5582 .loc 1 2794 15 is_stmt 0 view .LVU1767 + 5583 0026 2046 mov r0, r4 + 5584 0028 FFF7FEFF bl HAL_ADC_GetValue + 5585 .LVL462: +2794:Src/main.c **** break; + 5586 .loc 1 2794 13 discriminator 1 view .LVU1768 + 5587 002c 80B2 uxth r0, r0 + 5588 .LVL463: +2795:Src/main.c **** case 2: + 5589 .loc 1 2795 4 is_stmt 1 view .LVU1769 + 5590 002e F4E7 b .L228 + ARM GAS /tmp/ccYgfTud.s page 466 - 4469 0036 2046 mov r0, r4 - 4470 0038 EFE7 b .L144 - 4471 .LVL332: - 4472 .L148: -2454:Src/main.c **** break; - 4473 .loc 1 2454 5 view .LVU1435 - 4474 003a 0C48 ldr r0, .L154+4 - 4475 .LVL333: -2454:Src/main.c **** break; - 4476 .loc 1 2454 5 is_stmt 0 view .LVU1436 - 4477 003c FFF7FEFF bl HAL_ADC_Start - 4478 .LVL334: -2455:Src/main.c **** case 4: - 4479 .loc 1 2455 4 is_stmt 1 view .LVU1437 - 4480 0040 2046 mov r0, r4 - 4481 0042 EAE7 b .L144 - 4482 .LVL335: - 4483 .L147: -2457:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 4484 .loc 1 2457 5 view .LVU1438 - 4485 0044 094C ldr r4, .L154+4 - 4486 0046 6421 movs r1, #100 - 4487 0048 2046 mov r0, r4 - 4488 .LVL336: -2457:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 4489 .loc 1 2457 5 is_stmt 0 view .LVU1439 - 4490 004a FFF7FEFF bl HAL_ADC_PollForConversion - 4491 .LVL337: -2458:Src/main.c **** break; - 4492 .loc 1 2458 9 is_stmt 1 view .LVU1440 -2458:Src/main.c **** break; - 4493 .loc 1 2458 15 is_stmt 0 view .LVU1441 - 4494 004e 2046 mov r0, r4 - 4495 0050 FFF7FEFF bl HAL_ADC_GetValue - 4496 .LVL338: -2458:Src/main.c **** break; - 4497 .loc 1 2458 13 discriminator 1 view .LVU1442 - 4498 0054 80B2 uxth r0, r0 - 4499 .LVL339: -2459:Src/main.c **** case 5: - 4500 .loc 1 2459 4 is_stmt 1 view .LVU1443 - 4501 0056 E0E7 b .L144 - 4502 .LVL340: - 4503 .L145: -2461:Src/main.c **** break; - 4504 .loc 1 2461 9 view .LVU1444 - 4505 0058 0448 ldr r0, .L154+4 - 4506 .LVL341: -2461:Src/main.c **** break; - 4507 .loc 1 2461 9 is_stmt 0 view .LVU1445 - 4508 005a FFF7FEFF bl HAL_ADC_Stop - 4509 .LVL342: -2462:Src/main.c **** } - 4510 .loc 1 2462 4 is_stmt 1 view .LVU1446 - 4511 005e 2046 mov r0, r4 - 4512 0060 DBE7 b .L144 - 4513 .LVL343: - ARM GAS /tmp/ccO46DoU.s page 435 + 5591 .LVL464: + 5592 .L233: +2797:Src/main.c **** break; + 5593 .loc 1 2797 5 view .LVU1770 + 5594 0030 0D48 ldr r0, .L238 + 5595 .LVL465: +2797:Src/main.c **** break; + 5596 .loc 1 2797 5 is_stmt 0 view .LVU1771 + 5597 0032 FFF7FEFF bl HAL_ADC_Stop + 5598 .LVL466: +2798:Src/main.c **** case 3: + 5599 .loc 1 2798 4 is_stmt 1 view .LVU1772 + 5600 0036 2046 mov r0, r4 + 5601 0038 EFE7 b .L228 + 5602 .LVL467: + 5603 .L232: +2800:Src/main.c **** break; + 5604 .loc 1 2800 5 view .LVU1773 + 5605 003a 0C48 ldr r0, .L238+4 + 5606 .LVL468: +2800:Src/main.c **** break; + 5607 .loc 1 2800 5 is_stmt 0 view .LVU1774 + 5608 003c FFF7FEFF bl HAL_ADC_Start + 5609 .LVL469: +2801:Src/main.c **** case 4: + 5610 .loc 1 2801 4 is_stmt 1 view .LVU1775 + 5611 0040 2046 mov r0, r4 + 5612 0042 EAE7 b .L228 + 5613 .LVL470: + 5614 .L231: +2803:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 5615 .loc 1 2803 5 view .LVU1776 + 5616 0044 094C ldr r4, .L238+4 + 5617 0046 6421 movs r1, #100 + 5618 0048 2046 mov r0, r4 + 5619 .LVL471: +2803:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 5620 .loc 1 2803 5 is_stmt 0 view .LVU1777 + 5621 004a FFF7FEFF bl HAL_ADC_PollForConversion + 5622 .LVL472: +2804:Src/main.c **** break; + 5623 .loc 1 2804 9 is_stmt 1 view .LVU1778 +2804:Src/main.c **** break; + 5624 .loc 1 2804 15 is_stmt 0 view .LVU1779 + 5625 004e 2046 mov r0, r4 + 5626 0050 FFF7FEFF bl HAL_ADC_GetValue + 5627 .LVL473: +2804:Src/main.c **** break; + 5628 .loc 1 2804 13 discriminator 1 view .LVU1780 + 5629 0054 80B2 uxth r0, r0 + 5630 .LVL474: +2805:Src/main.c **** case 5: + 5631 .loc 1 2805 4 is_stmt 1 view .LVU1781 + 5632 0056 E0E7 b .L228 + 5633 .LVL475: + 5634 .L229: +2807:Src/main.c **** break; + ARM GAS /tmp/ccYgfTud.s page 467 - 4514 .L152: -2441:Src/main.c **** { - 4515 .loc 1 2441 2 is_stmt 0 view .LVU1447 - 4516 0062 2046 mov r0, r4 - 4517 .LVL344: -2441:Src/main.c **** { - 4518 .loc 1 2441 2 view .LVU1448 - 4519 0064 D9E7 b .L144 - 4520 .L155: - 4521 0066 00BF .align 2 - 4522 .L154: - 4523 0068 00000000 .word hadc1 - 4524 006c 00000000 .word hadc3 - 4525 .cfi_endproc - 4526 .LFE1213: - 4528 .section .text.Set_LTEC,"ax",%progbits - 4529 .align 1 - 4530 .global Set_LTEC - 4531 .syntax unified - 4532 .thumb - 4533 .thumb_func - 4535 Set_LTEC: - 4536 .LVL345: - 4537 .LFB1211: -2267:Src/main.c **** uint32_t tmp32; - 4538 .loc 1 2267 1 is_stmt 1 view -0 - 4539 .cfi_startproc - 4540 @ args = 0, pretend = 0, frame = 0 - 4541 @ frame_needed = 0, uses_anonymous_args = 0 -2267:Src/main.c **** uint32_t tmp32; - 4542 .loc 1 2267 1 is_stmt 0 view .LVU1450 - 4543 0000 38B5 push {r3, r4, r5, lr} - 4544 .LCFI41: - 4545 .cfi_def_cfa_offset 16 - 4546 .cfi_offset 3, -16 - 4547 .cfi_offset 4, -12 - 4548 .cfi_offset 5, -8 - 4549 .cfi_offset 14, -4 - 4550 0002 0C46 mov r4, r1 -2268:Src/main.c **** - 4551 .loc 1 2268 2 is_stmt 1 view .LVU1451 -2270:Src/main.c **** { - 4552 .loc 1 2270 2 view .LVU1452 - 4553 0004 0138 subs r0, r0, #1 - 4554 .LVL346: -2270:Src/main.c **** { - 4555 .loc 1 2270 2 is_stmt 0 view .LVU1453 - 4556 0006 0328 cmp r0, #3 - 4557 0008 23D8 bhi .L157 - 4558 000a DFE800F0 tbb [pc, r0] - 4559 .L159: - 4560 000e 02 .byte (.L162-.L159)/2 - 4561 000f 3B .byte (.L161-.L159)/2 - 4562 0010 5B .byte (.L160-.L159)/2 - 4563 0011 7C .byte (.L158-.L159)/2 - 4564 .p2align 1 - 4565 .L162: - ARM GAS /tmp/ccO46DoU.s page 436 + 5635 .loc 1 2807 9 view .LVU1782 + 5636 0058 0448 ldr r0, .L238+4 + 5637 .LVL476: +2807:Src/main.c **** break; + 5638 .loc 1 2807 9 is_stmt 0 view .LVU1783 + 5639 005a FFF7FEFF bl HAL_ADC_Stop + 5640 .LVL477: +2808:Src/main.c **** } + 5641 .loc 1 2808 4 is_stmt 1 view .LVU1784 + 5642 005e 2046 mov r0, r4 + 5643 0060 DBE7 b .L228 + 5644 .LVL478: + 5645 .L236: +2787:Src/main.c **** { + 5646 .loc 1 2787 2 is_stmt 0 view .LVU1785 + 5647 0062 2046 mov r0, r4 + 5648 .LVL479: +2787:Src/main.c **** { + 5649 .loc 1 2787 2 view .LVU1786 + 5650 0064 D9E7 b .L228 + 5651 .L239: + 5652 0066 00BF .align 2 + 5653 .L238: + 5654 0068 00000000 .word hadc1 + 5655 006c 00000000 .word hadc3 + 5656 .cfi_endproc + 5657 .LFE1219: + 5659 .section .text.Set_LTEC,"ax",%progbits + 5660 .align 1 + 5661 .global Set_LTEC + 5662 .syntax unified + 5663 .thumb + 5664 .thumb_func + 5666 Set_LTEC: + 5667 .LVL480: + 5668 .LFB1217: +2605:Src/main.c **** uint32_t tmp32; + 5669 .loc 1 2605 1 is_stmt 1 view -0 + 5670 .cfi_startproc + 5671 @ args = 0, pretend = 0, frame = 0 + 5672 @ frame_needed = 0, uses_anonymous_args = 0 +2606:Src/main.c **** + 5673 .loc 1 2606 2 view .LVU1788 +2610:Src/main.c **** { + 5674 .loc 1 2610 2 view .LVU1789 +2610:Src/main.c **** { + 5675 .loc 1 2610 5 is_stmt 0 view .LVU1790 + 5676 0000 0328 cmp r0, #3 + 5677 0002 18BF it ne + 5678 0004 0128 cmpne r0, #1 + 5679 0006 00F0A380 beq .L274 +2605:Src/main.c **** uint32_t tmp32; + 5680 .loc 1 2605 1 view .LVU1791 + 5681 000a 38B5 push {r3, r4, r5, lr} + 5682 .LCFI55: + 5683 .cfi_def_cfa_offset 16 + 5684 .cfi_offset 3, -16 + ARM GAS /tmp/ccYgfTud.s page 468 -2273:Src/main.c **** //tmp32=0; - 4566 .loc 1 2273 4 is_stmt 1 view .LVU1454 - 4567 0012 0022 movs r2, #0 - 4568 0014 4FF48041 mov r1, #16384 - 4569 .LVL347: -2273:Src/main.c **** //tmp32=0; - 4570 .loc 1 2273 4 is_stmt 0 view .LVU1455 - 4571 0018 4B48 ldr r0, .L189 - 4572 .LVL348: -2273:Src/main.c **** //tmp32=0; - 4573 .loc 1 2273 4 view .LVU1456 - 4574 001a FFF7FEFF bl HAL_GPIO_WritePin - 4575 .LVL349: -2276:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4576 .loc 1 2276 4 is_stmt 1 view .LVU1457 -2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4577 .loc 1 2277 4 view .LVU1458 -2276:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4578 .loc 1 2276 10 is_stmt 0 view .LVU1459 - 4579 001e 0022 movs r2, #0 - 4580 .LVL350: - 4581 .L163: -2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4582 .loc 1 2277 42 is_stmt 1 discriminator 1 view .LVU1460 - 4583 .LBB477: - 4584 .LBI477: + 5685 .cfi_offset 4, -12 + 5686 .cfi_offset 5, -8 + 5687 .cfi_offset 14, -4 + 5688 000c 0C46 mov r4, r1 +2616:Src/main.c **** { + 5689 .loc 1 2616 2 is_stmt 1 view .LVU1792 + 5690 000e 0138 subs r0, r0, #1 + 5691 .LVL481: +2616:Src/main.c **** { + 5692 .loc 1 2616 2 is_stmt 0 view .LVU1793 + 5693 0010 0328 cmp r0, #3 + 5694 0012 23D8 bhi .L242 + 5695 0014 DFE800F0 tbb [pc, r0] + 5696 .L244: + 5697 0018 02 .byte (.L247-.L244)/2 + 5698 0019 3B .byte (.L246-.L244)/2 + 5699 001a 5B .byte (.L245-.L244)/2 + 5700 001b 7C .byte (.L243-.L244)/2 + 5701 .p2align 1 + 5702 .L247: +2619:Src/main.c **** //tmp32=0; + 5703 .loc 1 2619 4 is_stmt 1 view .LVU1794 + 5704 001c 0022 movs r2, #0 + 5705 001e 4FF48041 mov r1, #16384 + 5706 .LVL482: +2619:Src/main.c **** //tmp32=0; + 5707 .loc 1 2619 4 is_stmt 0 view .LVU1795 + 5708 0022 4C48 ldr r0, .L277 + 5709 .LVL483: +2619:Src/main.c **** //tmp32=0; + 5710 .loc 1 2619 4 view .LVU1796 + 5711 0024 FFF7FEFF bl HAL_GPIO_WritePin + 5712 .LVL484: +2622:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 5713 .loc 1 2622 4 is_stmt 1 view .LVU1797 +2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5714 .loc 1 2623 4 view .LVU1798 +2622:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 5715 .loc 1 2622 10 is_stmt 0 view .LVU1799 + 5716 0028 0022 movs r2, #0 + 5717 .LVL485: + 5718 .L248: +2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5719 .loc 1 2623 42 is_stmt 1 discriminator 1 view .LVU1800 + 5720 .LBB550: + 5721 .LBI550: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4585 .loc 4 916 26 view .LVU1461 - 4586 .LBB478: + 5722 .loc 4 916 26 view .LVU1801 + 5723 .LBB551: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4587 .loc 4 918 3 view .LVU1462 + 5724 .loc 4 918 3 view .LVU1802 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4588 .loc 4 918 12 is_stmt 0 view .LVU1463 - 4589 0020 4A4B ldr r3, .L189+4 - 4590 0022 9B68 ldr r3, [r3, #8] + 5725 .loc 4 918 12 is_stmt 0 view .LVU1803 + 5726 002a 4B4B ldr r3, .L277+4 + 5727 002c 9B68 ldr r3, [r3, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4591 .loc 4 918 66 view .LVU1464 - 4592 0024 13F0020F tst r3, #2 - 4593 0028 04D1 bne .L164 - 4594 .LVL351: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4595 .loc 4 918 66 view .LVU1465 - 4596 .LBE478: - 4597 .LBE477: -2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4598 .loc 1 2277 42 discriminator 2 view .LVU1466 - 4599 002a B2F5FA7F cmp r2, #500 - 4600 002e 01D8 bhi .L164 -2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4601 .loc 1 2277 59 is_stmt 1 discriminator 3 view .LVU1467 -2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4602 .loc 1 2277 64 is_stmt 0 discriminator 3 view .LVU1468 - 4603 0030 0132 adds r2, r2, #1 - 4604 .LVL352: -2277:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4605 .loc 1 2277 64 discriminator 3 view .LVU1469 - 4606 0032 F5E7 b .L163 - ARM GAS /tmp/ccO46DoU.s page 437 + 5728 .loc 4 918 66 view .LVU1804 + ARM GAS /tmp/ccYgfTud.s page 469 - 4607 .L164: -2278:Src/main.c **** tmp32 = 0; - 4608 .loc 1 2278 4 is_stmt 1 view .LVU1470 - 4609 .LVL353: - 4610 .LBB479: - 4611 .LBI479: -1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } -1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** -1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** -1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write 8-Bits in the data register -1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_TransmitData8 -1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance -1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param TxData Value between Min_Data=0x00 and Max_Data=0xFF -1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None -1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ -1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData) -1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { -1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__) -1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint8_t *spidr = ((__IO uint8_t *)&SPIx->DR); -1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; -1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #else -1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *((__IO uint8_t *)&SPIx->DR) = TxData; -1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif /* __GNUC__ */ -1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } -1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** -1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** -1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write 16-Bits in the data register -1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_TransmitData16 -1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance -1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param TxData Value between Min_Data=0x00 and Max_Data=0xFFFF -1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None -1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) - 4612 .loc 4 1373 22 view .LVU1471 - 4613 .LBB480: -1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { -1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__) -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint16_t *spidr = ((__IO uint16_t *)&SPIx->DR); - 4614 .loc 4 1376 3 view .LVU1472 -1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 4615 .loc 4 1377 3 view .LVU1473 - 4616 .loc 4 1377 10 is_stmt 0 view .LVU1474 - 4617 0034 454B ldr r3, .L189+4 - 4618 0036 9C81 strh r4, [r3, #12] @ movhi - 4619 .LVL354: - 4620 .loc 4 1377 10 view .LVU1475 - 4621 .LBE480: - 4622 .LBE479: -2279:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4623 .loc 1 2279 4 is_stmt 1 view .LVU1476 -2280:Src/main.c **** (void) SPI2->DR; - 4624 .loc 1 2280 4 view .LVU1477 -2279:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4625 .loc 1 2279 10 is_stmt 0 view .LVU1478 - 4626 0038 0022 movs r2, #0 - 4627 .LVL355: - 4628 .L166: - ARM GAS /tmp/ccO46DoU.s page 438 - - -2280:Src/main.c **** (void) SPI2->DR; - 4629 .loc 1 2280 43 is_stmt 1 discriminator 1 view .LVU1479 - 4630 .LBB481: - 4631 .LBI481: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4632 .loc 4 905 26 view .LVU1480 - 4633 .LBB482: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4634 .loc 4 907 3 view .LVU1481 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4635 .loc 4 907 12 is_stmt 0 view .LVU1482 - 4636 003a 444B ldr r3, .L189+4 - 4637 003c 9B68 ldr r3, [r3, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4638 .loc 4 907 68 view .LVU1483 - 4639 003e 13F0010F tst r3, #1 - 4640 0042 04D1 bne .L167 - 4641 .LVL356: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4642 .loc 4 907 68 view .LVU1484 - 4643 .LBE482: - 4644 .LBE481: -2280:Src/main.c **** (void) SPI2->DR; - 4645 .loc 1 2280 43 discriminator 2 view .LVU1485 - 4646 0044 B2F5FA7F cmp r2, #500 - 4647 0048 01D8 bhi .L167 -2280:Src/main.c **** (void) SPI2->DR; - 4648 .loc 1 2280 60 is_stmt 1 discriminator 3 view .LVU1486 -2280:Src/main.c **** (void) SPI2->DR; - 4649 .loc 1 2280 65 is_stmt 0 discriminator 3 view .LVU1487 - 4650 004a 0132 adds r2, r2, #1 - 4651 .LVL357: -2280:Src/main.c **** (void) SPI2->DR; - 4652 .loc 1 2280 65 discriminator 3 view .LVU1488 - 4653 004c F5E7 b .L166 - 4654 .L167: -2281:Src/main.c **** break; - 4655 .loc 1 2281 4 is_stmt 1 view .LVU1489 - 4656 004e 3F4B ldr r3, .L189+4 - 4657 0050 DB68 ldr r3, [r3, #12] -2282:Src/main.c **** case 2: - 4658 .loc 1 2282 3 view .LVU1490 - 4659 .LVL358: - 4660 .L157: -2318:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 4661 .loc 1 2318 2 view .LVU1491 - 4662 0052 3D4D ldr r5, .L189 - 4663 0054 0122 movs r2, #1 - 4664 0056 4FF48041 mov r1, #16384 - 4665 005a 2846 mov r0, r5 - 4666 005c FFF7FEFF bl HAL_GPIO_WritePin - 4667 .LVL359: -2319:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 4668 .loc 1 2319 2 view .LVU1492 - 4669 0060 3B4C ldr r4, .L189+8 - 4670 .LVL360: -2319:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - ARM GAS /tmp/ccO46DoU.s page 439 - - - 4671 .loc 1 2319 2 is_stmt 0 view .LVU1493 - 4672 0062 0122 movs r2, #1 - 4673 0064 4021 movs r1, #64 - 4674 0066 2046 mov r0, r4 - 4675 0068 FFF7FEFF bl HAL_GPIO_WritePin - 4676 .LVL361: -2320:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 4677 .loc 1 2320 2 is_stmt 1 view .LVU1494 - 4678 006c 0122 movs r2, #1 - 4679 006e 4FF48051 mov r1, #4096 - 4680 0072 2846 mov r0, r5 - 4681 0074 FFF7FEFF bl HAL_GPIO_WritePin - 4682 .LVL362: -2321:Src/main.c **** } - 4683 .loc 1 2321 2 view .LVU1495 - 4684 0078 0122 movs r2, #1 - 4685 007a 1021 movs r1, #16 - 4686 007c 2046 mov r0, r4 - 4687 007e FFF7FEFF bl HAL_GPIO_WritePin - 4688 .LVL363: -2322:Src/main.c **** static uint16_t MPhD_T(uint8_t num) - 4689 .loc 1 2322 1 is_stmt 0 view .LVU1496 - 4690 0082 38BD pop {r3, r4, r5, pc} - 4691 .LVL364: - 4692 .L161: -2285:Src/main.c **** //tmp32=0; - 4693 .loc 1 2285 4 is_stmt 1 view .LVU1497 - 4694 0084 0022 movs r2, #0 - 4695 0086 4021 movs r1, #64 - 4696 .LVL365: -2285:Src/main.c **** //tmp32=0; - 4697 .loc 1 2285 4 is_stmt 0 view .LVU1498 - 4698 0088 3148 ldr r0, .L189+8 - 4699 008a FFF7FEFF bl HAL_GPIO_WritePin - 4700 .LVL366: -2288:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4701 .loc 1 2288 4 is_stmt 1 view .LVU1499 -2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4702 .loc 1 2289 4 view .LVU1500 -2288:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4703 .loc 1 2288 10 is_stmt 0 view .LVU1501 - 4704 008e 0022 movs r2, #0 - 4705 .LVL367: - 4706 .L169: -2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4707 .loc 1 2289 42 is_stmt 1 discriminator 1 view .LVU1502 - 4708 .LBB483: - 4709 .LBI483: - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4710 .loc 4 916 26 view .LVU1503 - 4711 .LBB484: + 5729 002e 13F0020F tst r3, #2 + 5730 0032 04D1 bne .L249 + 5731 .LVL486: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4712 .loc 4 918 3 view .LVU1504 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4713 .loc 4 918 12 is_stmt 0 view .LVU1505 - 4714 0090 304B ldr r3, .L189+12 - 4715 0092 9B68 ldr r3, [r3, #8] - ARM GAS /tmp/ccO46DoU.s page 440 - - - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4716 .loc 4 918 66 view .LVU1506 - 4717 0094 13F0020F tst r3, #2 - 4718 0098 04D1 bne .L170 - 4719 .LVL368: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4720 .loc 4 918 66 view .LVU1507 - 4721 .LBE484: - 4722 .LBE483: -2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4723 .loc 1 2289 42 discriminator 2 view .LVU1508 - 4724 009a B2F5FA7F cmp r2, #500 - 4725 009e 01D8 bhi .L170 -2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4726 .loc 1 2289 59 is_stmt 1 discriminator 3 view .LVU1509 -2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4727 .loc 1 2289 64 is_stmt 0 discriminator 3 view .LVU1510 - 4728 00a0 0132 adds r2, r2, #1 - 4729 .LVL369: -2289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4730 .loc 1 2289 64 discriminator 3 view .LVU1511 - 4731 00a2 F5E7 b .L169 - 4732 .L170: -2290:Src/main.c **** tmp32 = 0; - 4733 .loc 1 2290 4 is_stmt 1 view .LVU1512 - 4734 .LVL370: - 4735 .LBB485: - 4736 .LBI485: + 5732 .loc 4 918 66 view .LVU1805 + 5733 .LBE551: + 5734 .LBE550: +2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5735 .loc 1 2623 42 discriminator 2 view .LVU1806 + 5736 0034 B2F5FA7F cmp r2, #500 + 5737 0038 01D8 bhi .L249 +2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5738 .loc 1 2623 59 is_stmt 1 discriminator 3 view .LVU1807 +2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5739 .loc 1 2623 64 is_stmt 0 discriminator 3 view .LVU1808 + 5740 003a 0132 adds r2, r2, #1 + 5741 .LVL487: +2623:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5742 .loc 1 2623 64 discriminator 3 view .LVU1809 + 5743 003c F5E7 b .L248 + 5744 .L249: +2624:Src/main.c **** tmp32 = 0; + 5745 .loc 1 2624 4 is_stmt 1 view .LVU1810 + 5746 .LVL488: + 5747 .LBB552: + 5748 .LBI552: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4737 .loc 4 1373 22 view .LVU1513 - 4738 .LBB486: + 5749 .loc 4 1373 22 view .LVU1811 + 5750 .LBB553: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 4739 .loc 4 1376 3 view .LVU1514 - 4740 .loc 4 1377 3 view .LVU1515 - 4741 .loc 4 1377 10 is_stmt 0 view .LVU1516 - 4742 00a4 2B4B ldr r3, .L189+12 - 4743 00a6 9C81 strh r4, [r3, #12] @ movhi - 4744 .LVL371: - 4745 .loc 4 1377 10 view .LVU1517 - 4746 .LBE486: - 4747 .LBE485: -2291:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4748 .loc 1 2291 4 is_stmt 1 view .LVU1518 -2292:Src/main.c **** (void) SPI6->DR; - 4749 .loc 1 2292 4 view .LVU1519 -2291:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4750 .loc 1 2291 10 is_stmt 0 view .LVU1520 - 4751 00a8 0022 movs r2, #0 - 4752 .LVL372: - 4753 .L172: -2292:Src/main.c **** (void) SPI6->DR; - 4754 .loc 1 2292 43 is_stmt 1 discriminator 1 view .LVU1521 - 4755 .LBB487: - 4756 .LBI487: + 5751 .loc 4 1376 3 view .LVU1812 + 5752 .loc 4 1377 3 view .LVU1813 + 5753 .loc 4 1377 10 is_stmt 0 view .LVU1814 + 5754 003e 464B ldr r3, .L277+4 + 5755 0040 9C81 strh r4, [r3, #12] @ movhi + 5756 .LVL489: + 5757 .loc 4 1377 10 view .LVU1815 + 5758 .LBE553: + 5759 .LBE552: +2625:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 5760 .loc 1 2625 4 is_stmt 1 view .LVU1816 +2626:Src/main.c **** (void) SPI2->DR; + 5761 .loc 1 2626 4 view .LVU1817 +2625:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 5762 .loc 1 2625 10 is_stmt 0 view .LVU1818 + 5763 0042 0022 movs r2, #0 + 5764 .LVL490: + 5765 .L251: +2626:Src/main.c **** (void) SPI2->DR; + 5766 .loc 1 2626 43 is_stmt 1 discriminator 1 view .LVU1819 + 5767 .LBB554: + 5768 .LBI554: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4757 .loc 4 905 26 view .LVU1522 - 4758 .LBB488: - ARM GAS /tmp/ccO46DoU.s page 441 + 5769 .loc 4 905 26 view .LVU1820 + 5770 .LBB555: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 5771 .loc 4 907 3 view .LVU1821 + ARM GAS /tmp/ccYgfTud.s page 470 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4759 .loc 4 907 3 view .LVU1523 + 5772 .loc 4 907 12 is_stmt 0 view .LVU1822 + 5773 0044 444B ldr r3, .L277+4 + 5774 0046 9B68 ldr r3, [r3, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4760 .loc 4 907 12 is_stmt 0 view .LVU1524 - 4761 00aa 2A4B ldr r3, .L189+12 - 4762 00ac 9B68 ldr r3, [r3, #8] + 5775 .loc 4 907 68 view .LVU1823 + 5776 0048 13F0010F tst r3, #1 + 5777 004c 04D1 bne .L252 + 5778 .LVL491: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4763 .loc 4 907 68 view .LVU1525 - 4764 00ae 13F0010F tst r3, #1 - 4765 00b2 04D1 bne .L173 - 4766 .LVL373: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4767 .loc 4 907 68 view .LVU1526 - 4768 .LBE488: - 4769 .LBE487: -2292:Src/main.c **** (void) SPI6->DR; - 4770 .loc 1 2292 43 discriminator 2 view .LVU1527 - 4771 00b4 B2F5FA7F cmp r2, #500 - 4772 00b8 01D8 bhi .L173 -2292:Src/main.c **** (void) SPI6->DR; - 4773 .loc 1 2292 60 is_stmt 1 discriminator 3 view .LVU1528 -2292:Src/main.c **** (void) SPI6->DR; - 4774 .loc 1 2292 65 is_stmt 0 discriminator 3 view .LVU1529 - 4775 00ba 0132 adds r2, r2, #1 - 4776 .LVL374: -2292:Src/main.c **** (void) SPI6->DR; - 4777 .loc 1 2292 65 discriminator 3 view .LVU1530 - 4778 00bc F5E7 b .L172 - 4779 .L173: -2293:Src/main.c **** break; - 4780 .loc 1 2293 4 is_stmt 1 view .LVU1531 - 4781 00be 254B ldr r3, .L189+12 - 4782 00c0 DB68 ldr r3, [r3, #12] -2294:Src/main.c **** case 3: - 4783 .loc 1 2294 3 view .LVU1532 - 4784 00c2 C6E7 b .L157 - 4785 .LVL375: - 4786 .L160: -2296:Src/main.c **** //tmp32=0; - 4787 .loc 1 2296 4 view .LVU1533 - 4788 00c4 0022 movs r2, #0 - 4789 00c6 4FF48051 mov r1, #4096 - 4790 .LVL376: -2296:Src/main.c **** //tmp32=0; - 4791 .loc 1 2296 4 is_stmt 0 view .LVU1534 - 4792 00ca 1F48 ldr r0, .L189 - 4793 00cc FFF7FEFF bl HAL_GPIO_WritePin - 4794 .LVL377: -2299:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4795 .loc 1 2299 4 is_stmt 1 view .LVU1535 -2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4796 .loc 1 2300 4 view .LVU1536 -2299:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4797 .loc 1 2299 10 is_stmt 0 view .LVU1537 - 4798 00d0 0022 movs r2, #0 - 4799 .LVL378: - 4800 .L175: - ARM GAS /tmp/ccO46DoU.s page 442 + 5779 .loc 4 907 68 view .LVU1824 + 5780 .LBE555: + 5781 .LBE554: +2626:Src/main.c **** (void) SPI2->DR; + 5782 .loc 1 2626 43 discriminator 2 view .LVU1825 + 5783 004e B2F5FA7F cmp r2, #500 + 5784 0052 01D8 bhi .L252 +2626:Src/main.c **** (void) SPI2->DR; + 5785 .loc 1 2626 60 is_stmt 1 discriminator 3 view .LVU1826 +2626:Src/main.c **** (void) SPI2->DR; + 5786 .loc 1 2626 65 is_stmt 0 discriminator 3 view .LVU1827 + 5787 0054 0132 adds r2, r2, #1 + 5788 .LVL492: +2626:Src/main.c **** (void) SPI2->DR; + 5789 .loc 1 2626 65 discriminator 3 view .LVU1828 + 5790 0056 F5E7 b .L251 + 5791 .L252: +2627:Src/main.c **** break; + 5792 .loc 1 2627 4 is_stmt 1 view .LVU1829 + 5793 0058 3F4B ldr r3, .L277+4 + 5794 005a DB68 ldr r3, [r3, #12] +2628:Src/main.c **** case 2: + 5795 .loc 1 2628 3 view .LVU1830 + 5796 .LVL493: + 5797 .L242: +2664:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 5798 .loc 1 2664 2 view .LVU1831 + 5799 005c 3D4D ldr r5, .L277 + 5800 005e 0122 movs r2, #1 + 5801 0060 4FF48041 mov r1, #16384 + 5802 0064 2846 mov r0, r5 + 5803 0066 FFF7FEFF bl HAL_GPIO_WritePin + 5804 .LVL494: +2665:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 5805 .loc 1 2665 2 view .LVU1832 + 5806 006a 3C4C ldr r4, .L277+8 + 5807 .LVL495: +2665:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 5808 .loc 1 2665 2 is_stmt 0 view .LVU1833 + 5809 006c 0122 movs r2, #1 + 5810 006e 4021 movs r1, #64 + 5811 0070 2046 mov r0, r4 + 5812 0072 FFF7FEFF bl HAL_GPIO_WritePin + 5813 .LVL496: +2666:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 5814 .loc 1 2666 2 is_stmt 1 view .LVU1834 + 5815 0076 0122 movs r2, #1 + ARM GAS /tmp/ccYgfTud.s page 471 -2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4801 .loc 1 2300 42 is_stmt 1 discriminator 1 view .LVU1538 - 4802 .LBB489: - 4803 .LBI489: + 5816 0078 4FF48051 mov r1, #4096 + 5817 007c 2846 mov r0, r5 + 5818 007e FFF7FEFF bl HAL_GPIO_WritePin + 5819 .LVL497: +2667:Src/main.c **** } + 5820 .loc 1 2667 2 view .LVU1835 + 5821 0082 0122 movs r2, #1 + 5822 0084 1021 movs r1, #16 + 5823 0086 2046 mov r0, r4 + 5824 0088 FFF7FEFF bl HAL_GPIO_WritePin + 5825 .LVL498: +2668:Src/main.c **** static uint16_t MPhD_T(uint8_t num) + 5826 .loc 1 2668 1 is_stmt 0 view .LVU1836 + 5827 008c 38BD pop {r3, r4, r5, pc} + 5828 .LVL499: + 5829 .L246: +2631:Src/main.c **** //tmp32=0; + 5830 .loc 1 2631 4 is_stmt 1 view .LVU1837 + 5831 008e 0022 movs r2, #0 + 5832 0090 4021 movs r1, #64 + 5833 .LVL500: +2631:Src/main.c **** //tmp32=0; + 5834 .loc 1 2631 4 is_stmt 0 view .LVU1838 + 5835 0092 3248 ldr r0, .L277+8 + 5836 0094 FFF7FEFF bl HAL_GPIO_WritePin + 5837 .LVL501: +2634:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 5838 .loc 1 2634 4 is_stmt 1 view .LVU1839 +2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 5839 .loc 1 2635 4 view .LVU1840 +2634:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 5840 .loc 1 2634 10 is_stmt 0 view .LVU1841 + 5841 0098 0022 movs r2, #0 + 5842 .LVL502: + 5843 .L254: +2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 5844 .loc 1 2635 42 is_stmt 1 discriminator 1 view .LVU1842 + 5845 .LBB556: + 5846 .LBI556: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4804 .loc 4 916 26 view .LVU1539 - 4805 .LBB490: + 5847 .loc 4 916 26 view .LVU1843 + 5848 .LBB557: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4806 .loc 4 918 3 view .LVU1540 + 5849 .loc 4 918 3 view .LVU1844 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4807 .loc 4 918 12 is_stmt 0 view .LVU1541 - 4808 00d2 1E4B ldr r3, .L189+4 - 4809 00d4 9B68 ldr r3, [r3, #8] + 5850 .loc 4 918 12 is_stmt 0 view .LVU1845 + 5851 009a 314B ldr r3, .L277+12 + 5852 009c 9B68 ldr r3, [r3, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4810 .loc 4 918 66 view .LVU1542 - 4811 00d6 13F0020F tst r3, #2 - 4812 00da 04D1 bne .L176 - 4813 .LVL379: + 5853 .loc 4 918 66 view .LVU1846 + 5854 009e 13F0020F tst r3, #2 + 5855 00a2 04D1 bne .L255 + 5856 .LVL503: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4814 .loc 4 918 66 view .LVU1543 - 4815 .LBE490: - 4816 .LBE489: -2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4817 .loc 1 2300 42 discriminator 2 view .LVU1544 - 4818 00dc B2F5FA7F cmp r2, #500 - 4819 00e0 01D8 bhi .L176 -2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4820 .loc 1 2300 59 is_stmt 1 discriminator 3 view .LVU1545 -2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4821 .loc 1 2300 64 is_stmt 0 discriminator 3 view .LVU1546 - 4822 00e2 0132 adds r2, r2, #1 - 4823 .LVL380: -2300:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4824 .loc 1 2300 64 discriminator 3 view .LVU1547 - 4825 00e4 F5E7 b .L175 - 4826 .L176: -2301:Src/main.c **** tmp32 = 0; - 4827 .loc 1 2301 4 is_stmt 1 view .LVU1548 - 4828 .LVL381: - 4829 .LBB491: - 4830 .LBI491: + 5857 .loc 4 918 66 view .LVU1847 + 5858 .LBE557: + 5859 .LBE556: + ARM GAS /tmp/ccYgfTud.s page 472 + + +2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 5860 .loc 1 2635 42 discriminator 2 view .LVU1848 + 5861 00a4 B2F5FA7F cmp r2, #500 + 5862 00a8 01D8 bhi .L255 +2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 5863 .loc 1 2635 59 is_stmt 1 discriminator 3 view .LVU1849 +2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 5864 .loc 1 2635 64 is_stmt 0 discriminator 3 view .LVU1850 + 5865 00aa 0132 adds r2, r2, #1 + 5866 .LVL504: +2635:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 5867 .loc 1 2635 64 discriminator 3 view .LVU1851 + 5868 00ac F5E7 b .L254 + 5869 .L255: +2636:Src/main.c **** tmp32 = 0; + 5870 .loc 1 2636 4 is_stmt 1 view .LVU1852 + 5871 .LVL505: + 5872 .LBB558: + 5873 .LBI558: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4831 .loc 4 1373 22 view .LVU1549 - 4832 .LBB492: + 5874 .loc 4 1373 22 view .LVU1853 + 5875 .LBB559: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 4833 .loc 4 1376 3 view .LVU1550 - 4834 .loc 4 1377 3 view .LVU1551 - 4835 .loc 4 1377 10 is_stmt 0 view .LVU1552 - 4836 00e6 194B ldr r3, .L189+4 - 4837 00e8 9C81 strh r4, [r3, #12] @ movhi - 4838 .LVL382: - 4839 .loc 4 1377 10 view .LVU1553 - 4840 .LBE492: - 4841 .LBE491: -2302:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4842 .loc 1 2302 4 is_stmt 1 view .LVU1554 -2303:Src/main.c **** (void) SPI2->DR; - ARM GAS /tmp/ccO46DoU.s page 443 - - - 4843 .loc 1 2303 4 view .LVU1555 -2302:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4844 .loc 1 2302 10 is_stmt 0 view .LVU1556 - 4845 00ea 0022 movs r2, #0 - 4846 .LVL383: - 4847 .L178: -2303:Src/main.c **** (void) SPI2->DR; - 4848 .loc 1 2303 43 is_stmt 1 discriminator 1 view .LVU1557 - 4849 .LBB493: - 4850 .LBI493: + 5876 .loc 4 1376 3 view .LVU1854 + 5877 .loc 4 1377 3 view .LVU1855 + 5878 .loc 4 1377 10 is_stmt 0 view .LVU1856 + 5879 00ae 2C4B ldr r3, .L277+12 + 5880 00b0 9C81 strh r4, [r3, #12] @ movhi + 5881 .LVL506: + 5882 .loc 4 1377 10 view .LVU1857 + 5883 .LBE559: + 5884 .LBE558: +2637:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 5885 .loc 1 2637 4 is_stmt 1 view .LVU1858 +2638:Src/main.c **** (void) SPI6->DR; + 5886 .loc 1 2638 4 view .LVU1859 +2637:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 5887 .loc 1 2637 10 is_stmt 0 view .LVU1860 + 5888 00b2 0022 movs r2, #0 + 5889 .LVL507: + 5890 .L257: +2638:Src/main.c **** (void) SPI6->DR; + 5891 .loc 1 2638 43 is_stmt 1 discriminator 1 view .LVU1861 + 5892 .LBB560: + 5893 .LBI560: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4851 .loc 4 905 26 view .LVU1558 - 4852 .LBB494: + 5894 .loc 4 905 26 view .LVU1862 + 5895 .LBB561: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4853 .loc 4 907 3 view .LVU1559 + 5896 .loc 4 907 3 view .LVU1863 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4854 .loc 4 907 12 is_stmt 0 view .LVU1560 - 4855 00ec 174B ldr r3, .L189+4 - 4856 00ee 9B68 ldr r3, [r3, #8] + 5897 .loc 4 907 12 is_stmt 0 view .LVU1864 + 5898 00b4 2A4B ldr r3, .L277+12 + 5899 00b6 9B68 ldr r3, [r3, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4857 .loc 4 907 68 view .LVU1561 - 4858 00f0 13F0010F tst r3, #1 - 4859 00f4 04D1 bne .L179 - 4860 .LVL384: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4861 .loc 4 907 68 view .LVU1562 - 4862 .LBE494: - 4863 .LBE493: -2303:Src/main.c **** (void) SPI2->DR; - 4864 .loc 1 2303 43 discriminator 2 view .LVU1563 - 4865 00f6 B2F5FA7F cmp r2, #500 - 4866 00fa 01D8 bhi .L179 -2303:Src/main.c **** (void) SPI2->DR; - 4867 .loc 1 2303 60 is_stmt 1 discriminator 3 view .LVU1564 -2303:Src/main.c **** (void) SPI2->DR; - 4868 .loc 1 2303 65 is_stmt 0 discriminator 3 view .LVU1565 - 4869 00fc 0132 adds r2, r2, #1 - 4870 .LVL385: -2303:Src/main.c **** (void) SPI2->DR; - 4871 .loc 1 2303 65 discriminator 3 view .LVU1566 - 4872 00fe F5E7 b .L178 - 4873 .L179: -2304:Src/main.c **** break; - 4874 .loc 1 2304 4 is_stmt 1 view .LVU1567 - 4875 0100 124B ldr r3, .L189+4 - 4876 0102 DB68 ldr r3, [r3, #12] -2305:Src/main.c **** case 4: - 4877 .loc 1 2305 3 view .LVU1568 - 4878 0104 A5E7 b .L157 - 4879 .LVL386: - 4880 .L158: -2307:Src/main.c **** //tmp32=0; - 4881 .loc 1 2307 4 view .LVU1569 - 4882 0106 0022 movs r2, #0 - 4883 0108 1021 movs r1, #16 - 4884 .LVL387: -2307:Src/main.c **** //tmp32=0; - ARM GAS /tmp/ccO46DoU.s page 444 + 5900 .loc 4 907 68 view .LVU1865 + 5901 00b8 13F0010F tst r3, #1 + ARM GAS /tmp/ccYgfTud.s page 473 - 4885 .loc 1 2307 4 is_stmt 0 view .LVU1570 - 4886 010a 1148 ldr r0, .L189+8 - 4887 010c FFF7FEFF bl HAL_GPIO_WritePin - 4888 .LVL388: -2310:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4889 .loc 1 2310 4 is_stmt 1 view .LVU1571 -2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4890 .loc 1 2311 4 view .LVU1572 -2310:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4891 .loc 1 2310 10 is_stmt 0 view .LVU1573 - 4892 0110 0022 movs r2, #0 - 4893 .LVL389: - 4894 .L181: -2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4895 .loc 1 2311 42 is_stmt 1 discriminator 1 view .LVU1574 - 4896 .LBB495: - 4897 .LBI495: + 5902 00bc 04D1 bne .L258 + 5903 .LVL508: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 5904 .loc 4 907 68 view .LVU1866 + 5905 .LBE561: + 5906 .LBE560: +2638:Src/main.c **** (void) SPI6->DR; + 5907 .loc 1 2638 43 discriminator 2 view .LVU1867 + 5908 00be B2F5FA7F cmp r2, #500 + 5909 00c2 01D8 bhi .L258 +2638:Src/main.c **** (void) SPI6->DR; + 5910 .loc 1 2638 60 is_stmt 1 discriminator 3 view .LVU1868 +2638:Src/main.c **** (void) SPI6->DR; + 5911 .loc 1 2638 65 is_stmt 0 discriminator 3 view .LVU1869 + 5912 00c4 0132 adds r2, r2, #1 + 5913 .LVL509: +2638:Src/main.c **** (void) SPI6->DR; + 5914 .loc 1 2638 65 discriminator 3 view .LVU1870 + 5915 00c6 F5E7 b .L257 + 5916 .L258: +2639:Src/main.c **** break; + 5917 .loc 1 2639 4 is_stmt 1 view .LVU1871 + 5918 00c8 254B ldr r3, .L277+12 + 5919 00ca DB68 ldr r3, [r3, #12] +2640:Src/main.c **** case 3: + 5920 .loc 1 2640 3 view .LVU1872 + 5921 00cc C6E7 b .L242 + 5922 .LVL510: + 5923 .L245: +2642:Src/main.c **** //tmp32=0; + 5924 .loc 1 2642 4 view .LVU1873 + 5925 00ce 0022 movs r2, #0 + 5926 00d0 4FF48051 mov r1, #4096 + 5927 .LVL511: +2642:Src/main.c **** //tmp32=0; + 5928 .loc 1 2642 4 is_stmt 0 view .LVU1874 + 5929 00d4 1F48 ldr r0, .L277 + 5930 00d6 FFF7FEFF bl HAL_GPIO_WritePin + 5931 .LVL512: +2645:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 5932 .loc 1 2645 4 is_stmt 1 view .LVU1875 +2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5933 .loc 1 2646 4 view .LVU1876 +2645:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 5934 .loc 1 2645 10 is_stmt 0 view .LVU1877 + 5935 00da 0022 movs r2, #0 + 5936 .LVL513: + 5937 .L260: +2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5938 .loc 1 2646 42 is_stmt 1 discriminator 1 view .LVU1878 + 5939 .LBB562: + 5940 .LBI562: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4898 .loc 4 916 26 view .LVU1575 - 4899 .LBB496: + 5941 .loc 4 916 26 view .LVU1879 + 5942 .LBB563: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4900 .loc 4 918 3 view .LVU1576 + 5943 .loc 4 918 3 view .LVU1880 + ARM GAS /tmp/ccYgfTud.s page 474 + + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4901 .loc 4 918 12 is_stmt 0 view .LVU1577 - 4902 0112 104B ldr r3, .L189+12 - 4903 0114 9B68 ldr r3, [r3, #8] + 5944 .loc 4 918 12 is_stmt 0 view .LVU1881 + 5945 00dc 1E4B ldr r3, .L277+4 + 5946 00de 9B68 ldr r3, [r3, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4904 .loc 4 918 66 view .LVU1578 - 4905 0116 13F0020F tst r3, #2 - 4906 011a 04D1 bne .L182 - 4907 .LVL390: + 5947 .loc 4 918 66 view .LVU1882 + 5948 00e0 13F0020F tst r3, #2 + 5949 00e4 04D1 bne .L261 + 5950 .LVL514: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4908 .loc 4 918 66 view .LVU1579 - 4909 .LBE496: - 4910 .LBE495: -2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4911 .loc 1 2311 42 discriminator 2 view .LVU1580 - 4912 011c B2F5FA7F cmp r2, #500 - 4913 0120 01D8 bhi .L182 -2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4914 .loc 1 2311 59 is_stmt 1 discriminator 3 view .LVU1581 -2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4915 .loc 1 2311 64 is_stmt 0 discriminator 3 view .LVU1582 - 4916 0122 0132 adds r2, r2, #1 - 4917 .LVL391: -2311:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4918 .loc 1 2311 64 discriminator 3 view .LVU1583 - 4919 0124 F5E7 b .L181 - 4920 .L182: -2312:Src/main.c **** tmp32 = 0; - 4921 .loc 1 2312 4 is_stmt 1 view .LVU1584 - 4922 .LVL392: - 4923 .LBB497: - 4924 .LBI497: + 5951 .loc 4 918 66 view .LVU1883 + 5952 .LBE563: + 5953 .LBE562: +2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5954 .loc 1 2646 42 discriminator 2 view .LVU1884 + 5955 00e6 B2F5FA7F cmp r2, #500 + 5956 00ea 01D8 bhi .L261 +2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5957 .loc 1 2646 59 is_stmt 1 discriminator 3 view .LVU1885 +2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5958 .loc 1 2646 64 is_stmt 0 discriminator 3 view .LVU1886 + 5959 00ec 0132 adds r2, r2, #1 + 5960 .LVL515: +2646:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 5961 .loc 1 2646 64 discriminator 3 view .LVU1887 + 5962 00ee F5E7 b .L260 + 5963 .L261: +2647:Src/main.c **** tmp32 = 0; + 5964 .loc 1 2647 4 is_stmt 1 view .LVU1888 + 5965 .LVL516: + 5966 .LBB564: + 5967 .LBI564: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4925 .loc 4 1373 22 view .LVU1585 - 4926 .LBB498: - ARM GAS /tmp/ccO46DoU.s page 445 - - + 5968 .loc 4 1373 22 view .LVU1889 + 5969 .LBB565: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 4927 .loc 4 1376 3 view .LVU1586 - 4928 .loc 4 1377 3 view .LVU1587 - 4929 .loc 4 1377 10 is_stmt 0 view .LVU1588 - 4930 0126 0B4B ldr r3, .L189+12 - 4931 0128 9C81 strh r4, [r3, #12] @ movhi - 4932 .LVL393: - 4933 .loc 4 1377 10 view .LVU1589 - 4934 .LBE498: - 4935 .LBE497: -2313:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4936 .loc 1 2313 4 is_stmt 1 view .LVU1590 -2314:Src/main.c **** (void) SPI6->DR; - 4937 .loc 1 2314 4 view .LVU1591 -2313:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4938 .loc 1 2313 10 is_stmt 0 view .LVU1592 - 4939 012a 0022 movs r2, #0 - 4940 .LVL394: - 4941 .L184: -2314:Src/main.c **** (void) SPI6->DR; - 4942 .loc 1 2314 43 is_stmt 1 discriminator 1 view .LVU1593 - 4943 .LBB499: - 4944 .LBI499: + 5970 .loc 4 1376 3 view .LVU1890 + 5971 .loc 4 1377 3 view .LVU1891 + 5972 .loc 4 1377 10 is_stmt 0 view .LVU1892 + 5973 00f0 194B ldr r3, .L277+4 + 5974 00f2 9C81 strh r4, [r3, #12] @ movhi + 5975 .LVL517: + 5976 .loc 4 1377 10 view .LVU1893 + 5977 .LBE565: + 5978 .LBE564: +2648:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 5979 .loc 1 2648 4 is_stmt 1 view .LVU1894 +2649:Src/main.c **** (void) SPI2->DR; + 5980 .loc 1 2649 4 view .LVU1895 +2648:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 5981 .loc 1 2648 10 is_stmt 0 view .LVU1896 + 5982 00f4 0022 movs r2, #0 + 5983 .LVL518: + 5984 .L263: +2649:Src/main.c **** (void) SPI2->DR; + 5985 .loc 1 2649 43 is_stmt 1 discriminator 1 view .LVU1897 + 5986 .LBB566: + ARM GAS /tmp/ccYgfTud.s page 475 + + + 5987 .LBI566: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4945 .loc 4 905 26 view .LVU1594 - 4946 .LBB500: + 5988 .loc 4 905 26 view .LVU1898 + 5989 .LBB567: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4947 .loc 4 907 3 view .LVU1595 + 5990 .loc 4 907 3 view .LVU1899 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4948 .loc 4 907 12 is_stmt 0 view .LVU1596 - 4949 012c 094B ldr r3, .L189+12 - 4950 012e 9B68 ldr r3, [r3, #8] + 5991 .loc 4 907 12 is_stmt 0 view .LVU1900 + 5992 00f6 184B ldr r3, .L277+4 + 5993 00f8 9B68 ldr r3, [r3, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4951 .loc 4 907 68 view .LVU1597 - 4952 0130 13F0010F tst r3, #1 - 4953 0134 04D1 bne .L185 - 4954 .LVL395: + 5994 .loc 4 907 68 view .LVU1901 + 5995 00fa 13F0010F tst r3, #1 + 5996 00fe 04D1 bne .L264 + 5997 .LVL519: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4955 .loc 4 907 68 view .LVU1598 - 4956 .LBE500: - 4957 .LBE499: -2314:Src/main.c **** (void) SPI6->DR; - 4958 .loc 1 2314 43 discriminator 2 view .LVU1599 - 4959 0136 B2F5FA7F cmp r2, #500 - 4960 013a 01D8 bhi .L185 -2314:Src/main.c **** (void) SPI6->DR; - 4961 .loc 1 2314 60 is_stmt 1 discriminator 3 view .LVU1600 -2314:Src/main.c **** (void) SPI6->DR; - 4962 .loc 1 2314 65 is_stmt 0 discriminator 3 view .LVU1601 - 4963 013c 0132 adds r2, r2, #1 - 4964 .LVL396: -2314:Src/main.c **** (void) SPI6->DR; - 4965 .loc 1 2314 65 discriminator 3 view .LVU1602 - 4966 013e F5E7 b .L184 - 4967 .L185: -2315:Src/main.c **** break; - 4968 .loc 1 2315 4 is_stmt 1 view .LVU1603 - ARM GAS /tmp/ccO46DoU.s page 446 + 5998 .loc 4 907 68 view .LVU1902 + 5999 .LBE567: + 6000 .LBE566: +2649:Src/main.c **** (void) SPI2->DR; + 6001 .loc 1 2649 43 discriminator 2 view .LVU1903 + 6002 0100 B2F5FA7F cmp r2, #500 + 6003 0104 01D8 bhi .L264 +2649:Src/main.c **** (void) SPI2->DR; + 6004 .loc 1 2649 60 is_stmt 1 discriminator 3 view .LVU1904 +2649:Src/main.c **** (void) SPI2->DR; + 6005 .loc 1 2649 65 is_stmt 0 discriminator 3 view .LVU1905 + 6006 0106 0132 adds r2, r2, #1 + 6007 .LVL520: +2649:Src/main.c **** (void) SPI2->DR; + 6008 .loc 1 2649 65 discriminator 3 view .LVU1906 + 6009 0108 F5E7 b .L263 + 6010 .L264: +2650:Src/main.c **** break; + 6011 .loc 1 2650 4 is_stmt 1 view .LVU1907 + 6012 010a 134B ldr r3, .L277+4 + 6013 010c DB68 ldr r3, [r3, #12] +2651:Src/main.c **** case 4: + 6014 .loc 1 2651 3 view .LVU1908 + 6015 010e A5E7 b .L242 + 6016 .LVL521: + 6017 .L243: +2653:Src/main.c **** //tmp32=0; + 6018 .loc 1 2653 4 view .LVU1909 + 6019 0110 0022 movs r2, #0 + 6020 0112 1021 movs r1, #16 + 6021 .LVL522: +2653:Src/main.c **** //tmp32=0; + 6022 .loc 1 2653 4 is_stmt 0 view .LVU1910 + 6023 0114 1148 ldr r0, .L277+8 + 6024 0116 FFF7FEFF bl HAL_GPIO_WritePin + 6025 .LVL523: +2656:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 6026 .loc 1 2656 4 is_stmt 1 view .LVU1911 +2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6027 .loc 1 2657 4 view .LVU1912 +2656:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + ARM GAS /tmp/ccYgfTud.s page 476 - 4969 0140 044B ldr r3, .L189+12 - 4970 0142 DB68 ldr r3, [r3, #12] -2316:Src/main.c **** } - 4971 .loc 1 2316 3 view .LVU1604 - 4972 0144 85E7 b .L157 - 4973 .L190: - 4974 0146 00BF .align 2 - 4975 .L189: - 4976 0148 00040240 .word 1073873920 - 4977 014c 00380040 .word 1073756160 - 4978 0150 00000240 .word 1073872896 - 4979 0154 00540140 .word 1073828864 - 4980 .cfi_endproc - 4981 .LFE1211: - 4983 .section .text.Decode_uart,"ax",%progbits - 4984 .align 1 - 4985 .syntax unified - 4986 .thumb - 4987 .thumb_func - 4989 Decode_uart: - 4990 .LVL397: - 4991 .LFB1208: -2012:Src/main.c **** // uint8_t *temp1; - 4992 .loc 1 2012 1 view -0 - 4993 .cfi_startproc - 4994 @ args = 0, pretend = 0, frame = 0 - 4995 @ frame_needed = 0, uses_anonymous_args = 0 -2012:Src/main.c **** // uint8_t *temp1; - 4996 .loc 1 2012 1 is_stmt 0 view .LVU1606 - 4997 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} - 4998 .LCFI42: - 4999 .cfi_def_cfa_offset 32 - 5000 .cfi_offset 3, -32 - 5001 .cfi_offset 4, -28 - 5002 .cfi_offset 5, -24 - 5003 .cfi_offset 6, -20 - 5004 .cfi_offset 7, -16 - 5005 .cfi_offset 8, -12 - 5006 .cfi_offset 9, -8 - 5007 .cfi_offset 14, -4 - 5008 0004 0546 mov r5, r0 - 5009 0006 0F46 mov r7, r1 - 5010 0008 1646 mov r6, r2 - 5011 000a 1C46 mov r4, r3 -2014:Src/main.c **** - 5012 .loc 1 2014 2 is_stmt 1 view .LVU1607 -2019:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5013 .loc 1 2019 2 view .LVU1608 -2019:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5014 .loc 1 2019 6 is_stmt 0 view .LVU1609 - 5015 000c AF4B ldr r3, .L215 - 5016 .LVL398: -2019:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5017 .loc 1 2019 6 view .LVU1610 - 5018 000e 0022 movs r2, #0 - 5019 .LVL399: -2019:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - ARM GAS /tmp/ccO46DoU.s page 447 + 6028 .loc 1 2656 10 is_stmt 0 view .LVU1913 + 6029 011a 0022 movs r2, #0 + 6030 .LVL524: + 6031 .L266: +2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6032 .loc 1 2657 42 is_stmt 1 discriminator 1 view .LVU1914 + 6033 .LBB568: + 6034 .LBI568: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 6035 .loc 4 916 26 view .LVU1915 + 6036 .LBB569: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6037 .loc 4 918 3 view .LVU1916 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6038 .loc 4 918 12 is_stmt 0 view .LVU1917 + 6039 011c 104B ldr r3, .L277+12 + 6040 011e 9B68 ldr r3, [r3, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6041 .loc 4 918 66 view .LVU1918 + 6042 0120 13F0020F tst r3, #2 + 6043 0124 04D1 bne .L267 + 6044 .LVL525: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6045 .loc 4 918 66 view .LVU1919 + 6046 .LBE569: + 6047 .LBE568: +2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6048 .loc 1 2657 42 discriminator 2 view .LVU1920 + 6049 0126 B2F5FA7F cmp r2, #500 + 6050 012a 01D8 bhi .L267 +2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6051 .loc 1 2657 59 is_stmt 1 discriminator 3 view .LVU1921 +2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6052 .loc 1 2657 64 is_stmt 0 discriminator 3 view .LVU1922 + 6053 012c 0132 adds r2, r2, #1 + 6054 .LVL526: +2657:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 6055 .loc 1 2657 64 discriminator 3 view .LVU1923 + 6056 012e F5E7 b .L266 + 6057 .L267: +2658:Src/main.c **** tmp32 = 0; + 6058 .loc 1 2658 4 is_stmt 1 view .LVU1924 + 6059 .LVL527: + 6060 .LBB570: + 6061 .LBI570: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 6062 .loc 4 1373 22 view .LVU1925 + 6063 .LBB571: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 6064 .loc 4 1376 3 view .LVU1926 + 6065 .loc 4 1377 3 view .LVU1927 + 6066 .loc 4 1377 10 is_stmt 0 view .LVU1928 + 6067 0130 0B4B ldr r3, .L277+12 + 6068 0132 9C81 strh r4, [r3, #12] @ movhi + 6069 .LVL528: + 6070 .loc 4 1377 10 view .LVU1929 + 6071 .LBE571: + ARM GAS /tmp/ccYgfTud.s page 477 - 5020 .loc 1 2019 6 view .LVU1611 - 5021 0010 1A60 str r2, [r3] -2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5022 .loc 1 2020 2 is_stmt 1 view .LVU1612 -2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5023 .loc 1 2020 7 is_stmt 0 view .LVU1613 - 5024 0012 0121 movs r1, #1 - 5025 .LVL400: -2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5026 .loc 1 2020 7 view .LVU1614 - 5027 0014 AE48 ldr r0, .L215+4 - 5028 .LVL401: -2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5029 .loc 1 2020 7 view .LVU1615 - 5030 0016 FFF7FEFF bl HAL_GPIO_ReadPin - 5031 .LVL402: -2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5032 .loc 1 2020 5 discriminator 1 view .LVU1616 - 5033 001a 0028 cmp r0, #0 - 5034 001c 00F0D280 beq .L212 - 5035 .L192: -2035:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 5036 .loc 1 2035 2 is_stmt 1 view .LVU1617 - 5037 .LVL403: -2036:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5038 .loc 1 2036 2 view .LVU1618 -2036:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5039 .loc 1 2036 36 is_stmt 0 view .LVU1619 - 5040 0020 2B88 ldrh r3, [r5] -2036:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5041 .loc 1 2036 48 view .LVU1620 - 5042 0022 03F00103 and r3, r3, #1 -2036:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5043 .loc 1 2036 22 view .LVU1621 - 5044 0026 2370 strb r3, [r4] -2037:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5045 .loc 1 2037 2 is_stmt 1 view .LVU1622 -2037:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5046 .loc 1 2037 36 is_stmt 0 view .LVU1623 - 5047 0028 2B88 ldrh r3, [r5] -2037:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5048 .loc 1 2037 48 view .LVU1624 - 5049 002a C3F34003 ubfx r3, r3, #1, #1 -2037:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5050 .loc 1 2037 22 view .LVU1625 - 5051 002e 6370 strb r3, [r4, #1] -2038:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5052 .loc 1 2038 2 is_stmt 1 view .LVU1626 -2038:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5053 .loc 1 2038 36 is_stmt 0 view .LVU1627 - 5054 0030 2B88 ldrh r3, [r5] -2038:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5055 .loc 1 2038 48 view .LVU1628 - 5056 0032 C3F38003 ubfx r3, r3, #2, #1 -2038:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5057 .loc 1 2038 22 view .LVU1629 - 5058 0036 A370 strb r3, [r4, #2] - ARM GAS /tmp/ccO46DoU.s page 448 + 6072 .LBE570: +2659:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 6073 .loc 1 2659 4 is_stmt 1 view .LVU1930 +2660:Src/main.c **** (void) SPI6->DR; + 6074 .loc 1 2660 4 view .LVU1931 +2659:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 6075 .loc 1 2659 10 is_stmt 0 view .LVU1932 + 6076 0134 0022 movs r2, #0 + 6077 .LVL529: + 6078 .L269: +2660:Src/main.c **** (void) SPI6->DR; + 6079 .loc 1 2660 43 is_stmt 1 discriminator 1 view .LVU1933 + 6080 .LBB572: + 6081 .LBI572: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 6082 .loc 4 905 26 view .LVU1934 + 6083 .LBB573: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6084 .loc 4 907 3 view .LVU1935 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6085 .loc 4 907 12 is_stmt 0 view .LVU1936 + 6086 0136 0A4B ldr r3, .L277+12 + 6087 0138 9B68 ldr r3, [r3, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6088 .loc 4 907 68 view .LVU1937 + 6089 013a 13F0010F tst r3, #1 + 6090 013e 04D1 bne .L270 + 6091 .LVL530: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6092 .loc 4 907 68 view .LVU1938 + 6093 .LBE573: + 6094 .LBE572: +2660:Src/main.c **** (void) SPI6->DR; + 6095 .loc 1 2660 43 discriminator 2 view .LVU1939 + 6096 0140 B2F5FA7F cmp r2, #500 + 6097 0144 01D8 bhi .L270 +2660:Src/main.c **** (void) SPI6->DR; + 6098 .loc 1 2660 60 is_stmt 1 discriminator 3 view .LVU1940 +2660:Src/main.c **** (void) SPI6->DR; + 6099 .loc 1 2660 65 is_stmt 0 discriminator 3 view .LVU1941 + 6100 0146 0132 adds r2, r2, #1 + 6101 .LVL531: +2660:Src/main.c **** (void) SPI6->DR; + 6102 .loc 1 2660 65 discriminator 3 view .LVU1942 + 6103 0148 F5E7 b .L269 + 6104 .L270: +2661:Src/main.c **** break; + 6105 .loc 1 2661 4 is_stmt 1 view .LVU1943 + 6106 014a 054B ldr r3, .L277+12 + 6107 014c DB68 ldr r3, [r3, #12] +2662:Src/main.c **** } + 6108 .loc 1 2662 3 view .LVU1944 + 6109 014e 85E7 b .L242 + 6110 .LVL532: + 6111 .L274: + 6112 .LCFI56: + 6113 .cfi_def_cfa_offset 0 + ARM GAS /tmp/ccYgfTud.s page 478 -2039:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5059 .loc 1 2039 2 is_stmt 1 view .LVU1630 -2039:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5060 .loc 1 2039 35 is_stmt 0 view .LVU1631 - 5061 0038 2B88 ldrh r3, [r5] -2039:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5062 .loc 1 2039 47 view .LVU1632 - 5063 003a C3F3C003 ubfx r3, r3, #3, #1 -2039:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5064 .loc 1 2039 21 view .LVU1633 - 5065 003e E370 strb r3, [r4, #3] -2040:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5066 .loc 1 2040 2 is_stmt 1 view .LVU1634 -2040:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5067 .loc 1 2040 35 is_stmt 0 view .LVU1635 - 5068 0040 2B88 ldrh r3, [r5] -2040:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5069 .loc 1 2040 47 view .LVU1636 - 5070 0042 C3F30013 ubfx r3, r3, #4, #1 -2040:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5071 .loc 1 2040 21 view .LVU1637 - 5072 0046 2371 strb r3, [r4, #4] -2041:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5073 .loc 1 2041 2 is_stmt 1 view .LVU1638 -2041:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5074 .loc 1 2041 36 is_stmt 0 view .LVU1639 - 5075 0048 2B88 ldrh r3, [r5] -2041:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5076 .loc 1 2041 48 view .LVU1640 - 5077 004a C3F34013 ubfx r3, r3, #5, #1 -2041:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5078 .loc 1 2041 22 view .LVU1641 - 5079 004e 6371 strb r3, [r4, #5] -2042:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5080 .loc 1 2042 2 is_stmt 1 view .LVU1642 -2042:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5081 .loc 1 2042 36 is_stmt 0 view .LVU1643 - 5082 0050 2B88 ldrh r3, [r5] -2042:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5083 .loc 1 2042 48 view .LVU1644 - 5084 0052 C3F38013 ubfx r3, r3, #6, #1 -2042:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5085 .loc 1 2042 22 view .LVU1645 - 5086 0056 A371 strb r3, [r4, #6] -2043:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5087 .loc 1 2043 2 is_stmt 1 view .LVU1646 -2043:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5088 .loc 1 2043 36 is_stmt 0 view .LVU1647 - 5089 0058 2B88 ldrh r3, [r5] -2043:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5090 .loc 1 2043 48 view .LVU1648 - 5091 005a C3F3C013 ubfx r3, r3, #7, #1 -2043:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5092 .loc 1 2043 22 view .LVU1649 - 5093 005e E371 strb r3, [r4, #7] -2044:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5094 .loc 1 2044 2 is_stmt 1 view .LVU1650 - ARM GAS /tmp/ccO46DoU.s page 449 + 6114 .cfi_restore 3 + 6115 .cfi_restore 4 + 6116 .cfi_restore 5 + 6117 .cfi_restore 14 +2662:Src/main.c **** } + 6118 .loc 1 2662 3 is_stmt 0 view .LVU1945 + 6119 0150 7047 bx lr + 6120 .L278: + 6121 0152 00BF .align 2 + 6122 .L277: + 6123 0154 00040240 .word 1073873920 + 6124 0158 00380040 .word 1073756160 + 6125 015c 00000240 .word 1073872896 + 6126 0160 00540140 .word 1073828864 + 6127 .cfi_endproc + 6128 .LFE1217: + 6130 .section .text.Decode_uart,"ax",%progbits + 6131 .align 1 + 6132 .syntax unified + 6133 .thumb + 6134 .thumb_func + 6136 Decode_uart: + 6137 .LVL533: + 6138 .LFB1208: +2147:Src/main.c **** // uint8_t *temp1; + 6139 .loc 1 2147 1 is_stmt 1 view -0 + 6140 .cfi_startproc + 6141 @ args = 0, pretend = 0, frame = 0 + 6142 @ frame_needed = 0, uses_anonymous_args = 0 +2147:Src/main.c **** // uint8_t *temp1; + 6143 .loc 1 2147 1 is_stmt 0 view .LVU1947 + 6144 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 6145 .LCFI57: + 6146 .cfi_def_cfa_offset 32 + 6147 .cfi_offset 3, -32 + 6148 .cfi_offset 4, -28 + 6149 .cfi_offset 5, -24 + 6150 .cfi_offset 6, -20 + 6151 .cfi_offset 7, -16 + 6152 .cfi_offset 8, -12 + 6153 .cfi_offset 9, -8 + 6154 .cfi_offset 14, -4 + 6155 0004 0546 mov r5, r0 + 6156 0006 0F46 mov r7, r1 + 6157 0008 1646 mov r6, r2 + 6158 000a 1C46 mov r4, r3 +2149:Src/main.c **** + 6159 .loc 1 2149 2 is_stmt 1 view .LVU1948 +2154:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 6160 .loc 1 2154 2 view .LVU1949 +2154:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 6161 .loc 1 2154 6 is_stmt 0 view .LVU1950 + 6162 000c AF4B ldr r3, .L303 + 6163 .LVL534: +2154:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 6164 .loc 1 2154 6 view .LVU1951 + 6165 000e 0022 movs r2, #0 + ARM GAS /tmp/ccYgfTud.s page 479 -2044:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5095 .loc 1 2044 36 is_stmt 0 view .LVU1651 - 5096 0060 2B88 ldrh r3, [r5] -2044:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5097 .loc 1 2044 48 view .LVU1652 - 5098 0062 C3F30023 ubfx r3, r3, #8, #1 -2044:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5099 .loc 1 2044 22 view .LVU1653 - 5100 0066 2372 strb r3, [r4, #8] -2045:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5101 .loc 1 2045 2 is_stmt 1 view .LVU1654 -2045:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5102 .loc 1 2045 35 is_stmt 0 view .LVU1655 - 5103 0068 2B88 ldrh r3, [r5] -2045:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5104 .loc 1 2045 47 view .LVU1656 - 5105 006a C3F34023 ubfx r3, r3, #9, #1 -2045:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5106 .loc 1 2045 21 view .LVU1657 - 5107 006e 6372 strb r3, [r4, #9] -2046:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5108 .loc 1 2046 2 is_stmt 1 view .LVU1658 -2046:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5109 .loc 1 2046 35 is_stmt 0 view .LVU1659 - 5110 0070 2B88 ldrh r3, [r5] -2046:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5111 .loc 1 2046 48 view .LVU1660 - 5112 0072 C3F38023 ubfx r3, r3, #10, #1 -2046:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5113 .loc 1 2046 21 view .LVU1661 - 5114 0076 A372 strb r3, [r4, #10] -2047:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5115 .loc 1 2047 2 is_stmt 1 view .LVU1662 -2047:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5116 .loc 1 2047 34 is_stmt 0 view .LVU1663 - 5117 0078 2B88 ldrh r3, [r5] -2047:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5118 .loc 1 2047 47 view .LVU1664 - 5119 007a C3F3C023 ubfx r3, r3, #11, #1 -2047:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5120 .loc 1 2047 20 view .LVU1665 - 5121 007e E372 strb r3, [r4, #11] -2048:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5122 .loc 1 2048 2 is_stmt 1 view .LVU1666 -2048:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5123 .loc 1 2048 35 is_stmt 0 view .LVU1667 - 5124 0080 2B88 ldrh r3, [r5] -2048:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5125 .loc 1 2048 48 view .LVU1668 - 5126 0082 C3F30033 ubfx r3, r3, #12, #1 -2048:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5127 .loc 1 2048 21 view .LVU1669 - 5128 0086 2373 strb r3, [r4, #12] -2049:Src/main.c **** - 5129 .loc 1 2049 2 is_stmt 1 view .LVU1670 -2049:Src/main.c **** - 5130 .loc 1 2049 35 is_stmt 0 view .LVU1671 - ARM GAS /tmp/ccO46DoU.s page 450 + 6166 .LVL535: +2154:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 6167 .loc 1 2154 6 view .LVU1952 + 6168 0010 1A60 str r2, [r3] +2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 6169 .loc 1 2155 2 is_stmt 1 view .LVU1953 +2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 6170 .loc 1 2155 7 is_stmt 0 view .LVU1954 + 6171 0012 0121 movs r1, #1 + 6172 .LVL536: +2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 6173 .loc 1 2155 7 view .LVU1955 + 6174 0014 AE48 ldr r0, .L303+4 + 6175 .LVL537: +2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 6176 .loc 1 2155 7 view .LVU1956 + 6177 0016 FFF7FEFF bl HAL_GPIO_ReadPin + 6178 .LVL538: +2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 6179 .loc 1 2155 5 discriminator 1 view .LVU1957 + 6180 001a 0028 cmp r0, #0 + 6181 001c 00F0D280 beq .L300 + 6182 .L280: +2170:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 6183 .loc 1 2170 2 is_stmt 1 view .LVU1958 + 6184 .LVL539: +2171:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 6185 .loc 1 2171 2 view .LVU1959 +2171:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 6186 .loc 1 2171 36 is_stmt 0 view .LVU1960 + 6187 0020 2B88 ldrh r3, [r5] +2171:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 6188 .loc 1 2171 48 view .LVU1961 + 6189 0022 03F00103 and r3, r3, #1 +2171:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 6190 .loc 1 2171 22 view .LVU1962 + 6191 0026 2370 strb r3, [r4] +2172:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 6192 .loc 1 2172 2 is_stmt 1 view .LVU1963 +2172:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 6193 .loc 1 2172 36 is_stmt 0 view .LVU1964 + 6194 0028 2B88 ldrh r3, [r5] +2172:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 6195 .loc 1 2172 48 view .LVU1965 + 6196 002a C3F34003 ubfx r3, r3, #1, #1 +2172:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 6197 .loc 1 2172 22 view .LVU1966 + 6198 002e 6370 strb r3, [r4, #1] +2173:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 6199 .loc 1 2173 2 is_stmt 1 view .LVU1967 +2173:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 6200 .loc 1 2173 36 is_stmt 0 view .LVU1968 + 6201 0030 2B88 ldrh r3, [r5] +2173:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 6202 .loc 1 2173 48 view .LVU1969 + 6203 0032 C3F38003 ubfx r3, r3, #2, #1 +2173:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + ARM GAS /tmp/ccYgfTud.s page 480 - 5131 0088 2B88 ldrh r3, [r5] -2049:Src/main.c **** - 5132 .loc 1 2049 48 view .LVU1672 - 5133 008a C3F34033 ubfx r3, r3, #13, #1 -2049:Src/main.c **** - 5134 .loc 1 2049 21 view .LVU1673 - 5135 008e 6373 strb r3, [r4, #13] -2051:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 5136 .loc 1 2051 2 is_stmt 1 view .LVU1674 - 5137 .LVL404: -2052:Src/main.c **** temp2++; - 5138 .loc 1 2052 2 view .LVU1675 -2052:Src/main.c **** temp2++; - 5139 .loc 1 2052 28 is_stmt 0 view .LVU1676 - 5140 0090 6B88 ldrh r3, [r5, #2] -2052:Src/main.c **** temp2++; - 5141 .loc 1 2052 26 view .LVU1677 - 5142 0092 3B80 strh r3, [r7] @ movhi -2053:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 5143 .loc 1 2053 2 is_stmt 1 view .LVU1678 - 5144 .LVL405: -2054:Src/main.c **** temp2++; - 5145 .loc 1 2054 2 view .LVU1679 -2054:Src/main.c **** temp2++; - 5146 .loc 1 2054 28 is_stmt 0 view .LVU1680 - 5147 0094 AB88 ldrh r3, [r5, #4] -2054:Src/main.c **** temp2++; - 5148 .loc 1 2054 26 view .LVU1681 - 5149 0096 3380 strh r3, [r6] @ movhi -2055:Src/main.c **** temp2++; - 5150 .loc 1 2055 2 is_stmt 1 view .LVU1682 - 5151 .LVL406: -2056:Src/main.c **** temp2++; - 5152 .loc 1 2056 2 view .LVU1683 -2057:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); - 5153 .loc 1 2057 2 view .LVU1684 -2058:Src/main.c **** temp2++; - 5154 .loc 1 2058 2 view .LVU1685 -2058:Src/main.c **** temp2++; - 5155 .loc 1 2058 25 is_stmt 0 view .LVU1686 - 5156 0098 6B89 ldrh r3, [r5, #10] -2058:Src/main.c **** temp2++; - 5157 .loc 1 2058 23 view .LVU1687 - 5158 009a E381 strh r3, [r4, #14] @ movhi -2059:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5159 .loc 1 2059 2 is_stmt 1 view .LVU1688 - 5160 .LVL407: -2060:Src/main.c **** temp2++; - 5161 .loc 1 2060 2 view .LVU1689 -2060:Src/main.c **** temp2++; - 5162 .loc 1 2060 51 is_stmt 0 view .LVU1690 - 5163 009c AB89 ldrh r3, [r5, #12] - 5164 009e 07EE903A vmov s15, r3 @ int -2060:Src/main.c **** temp2++; - 5165 .loc 1 2060 32 view .LVU1691 - 5166 00a2 F8EE677A vcvt.f32.u32 s15, s15 -2060:Src/main.c **** temp2++; - ARM GAS /tmp/ccO46DoU.s page 451 + 6204 .loc 1 2173 22 view .LVU1970 + 6205 0036 A370 strb r3, [r4, #2] +2174:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 6206 .loc 1 2174 2 is_stmt 1 view .LVU1971 +2174:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 6207 .loc 1 2174 35 is_stmt 0 view .LVU1972 + 6208 0038 2B88 ldrh r3, [r5] +2174:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 6209 .loc 1 2174 47 view .LVU1973 + 6210 003a C3F3C003 ubfx r3, r3, #3, #1 +2174:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 6211 .loc 1 2174 21 view .LVU1974 + 6212 003e E370 strb r3, [r4, #3] +2175:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 6213 .loc 1 2175 2 is_stmt 1 view .LVU1975 +2175:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 6214 .loc 1 2175 35 is_stmt 0 view .LVU1976 + 6215 0040 2B88 ldrh r3, [r5] +2175:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 6216 .loc 1 2175 47 view .LVU1977 + 6217 0042 C3F30013 ubfx r3, r3, #4, #1 +2175:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 6218 .loc 1 2175 21 view .LVU1978 + 6219 0046 2371 strb r3, [r4, #4] +2176:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 6220 .loc 1 2176 2 is_stmt 1 view .LVU1979 +2176:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 6221 .loc 1 2176 36 is_stmt 0 view .LVU1980 + 6222 0048 2B88 ldrh r3, [r5] +2176:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 6223 .loc 1 2176 48 view .LVU1981 + 6224 004a C3F34013 ubfx r3, r3, #5, #1 +2176:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 6225 .loc 1 2176 22 view .LVU1982 + 6226 004e 6371 strb r3, [r4, #5] +2177:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 6227 .loc 1 2177 2 is_stmt 1 view .LVU1983 +2177:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 6228 .loc 1 2177 36 is_stmt 0 view .LVU1984 + 6229 0050 2B88 ldrh r3, [r5] +2177:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 6230 .loc 1 2177 48 view .LVU1985 + 6231 0052 C3F38013 ubfx r3, r3, #6, #1 +2177:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 6232 .loc 1 2177 22 view .LVU1986 + 6233 0056 A371 strb r3, [r4, #6] +2178:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 6234 .loc 1 2178 2 is_stmt 1 view .LVU1987 +2178:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 6235 .loc 1 2178 36 is_stmt 0 view .LVU1988 + 6236 0058 2B88 ldrh r3, [r5] +2178:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 6237 .loc 1 2178 48 view .LVU1989 + 6238 005a C3F3C013 ubfx r3, r3, #7, #1 +2178:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 6239 .loc 1 2178 22 view .LVU1990 + 6240 005e E371 strb r3, [r4, #7] + ARM GAS /tmp/ccYgfTud.s page 481 - 5167 .loc 1 2060 59 view .LVU1692 - 5168 00a6 9FED8B7A vldr.32 s14, .L215+8 - 5169 00aa 67EE877A vmul.f32 s15, s15, s14 -2060:Src/main.c **** temp2++; - 5170 .loc 1 2060 30 view .LVU1693 - 5171 00ae C7ED017A vstr.32 s15, [r7, #4] -2061:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5172 .loc 1 2061 2 is_stmt 1 view .LVU1694 - 5173 .LVL408: -2062:Src/main.c **** temp2++; - 5174 .loc 1 2062 2 view .LVU1695 -2062:Src/main.c **** temp2++; - 5175 .loc 1 2062 51 is_stmt 0 view .LVU1696 - 5176 00b2 EB89 ldrh r3, [r5, #14] - 5177 00b4 07EE903A vmov s15, r3 @ int -2062:Src/main.c **** temp2++; - 5178 .loc 1 2062 32 view .LVU1697 - 5179 00b8 F8EE677A vcvt.f32.u32 s15, s15 -2062:Src/main.c **** temp2++; - 5180 .loc 1 2062 59 view .LVU1698 - 5181 00bc 67EE877A vmul.f32 s15, s15, s14 -2062:Src/main.c **** temp2++; - 5182 .loc 1 2062 30 view .LVU1699 - 5183 00c0 C7ED027A vstr.32 s15, [r7, #8] -2063:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5184 .loc 1 2063 2 is_stmt 1 view .LVU1700 - 5185 .LVL409: -2064:Src/main.c **** temp2++; - 5186 .loc 1 2064 2 view .LVU1701 -2064:Src/main.c **** temp2++; - 5187 .loc 1 2064 51 is_stmt 0 view .LVU1702 - 5188 00c4 2B8A ldrh r3, [r5, #16] - 5189 00c6 07EE903A vmov s15, r3 @ int -2064:Src/main.c **** temp2++; - 5190 .loc 1 2064 32 view .LVU1703 - 5191 00ca F8EE677A vcvt.f32.u32 s15, s15 -2064:Src/main.c **** temp2++; - 5192 .loc 1 2064 59 view .LVU1704 - 5193 00ce 67EE877A vmul.f32 s15, s15, s14 -2064:Src/main.c **** temp2++; - 5194 .loc 1 2064 30 view .LVU1705 - 5195 00d2 C6ED017A vstr.32 s15, [r6, #4] -2065:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5196 .loc 1 2065 2 is_stmt 1 view .LVU1706 - 5197 .LVL410: -2066:Src/main.c **** temp2++; - 5198 .loc 1 2066 2 view .LVU1707 -2066:Src/main.c **** temp2++; - 5199 .loc 1 2066 51 is_stmt 0 view .LVU1708 - 5200 00d6 6B8A ldrh r3, [r5, #18] - 5201 00d8 07EE903A vmov s15, r3 @ int -2066:Src/main.c **** temp2++; - 5202 .loc 1 2066 32 view .LVU1709 - 5203 00dc F8EE677A vcvt.f32.u32 s15, s15 -2066:Src/main.c **** temp2++; - 5204 .loc 1 2066 59 view .LVU1710 - 5205 00e0 67EE877A vmul.f32 s15, s15, s14 - ARM GAS /tmp/ccO46DoU.s page 452 +2179:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 6241 .loc 1 2179 2 is_stmt 1 view .LVU1991 +2179:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 6242 .loc 1 2179 36 is_stmt 0 view .LVU1992 + 6243 0060 2B88 ldrh r3, [r5] +2179:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 6244 .loc 1 2179 48 view .LVU1993 + 6245 0062 C3F30023 ubfx r3, r3, #8, #1 +2179:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 6246 .loc 1 2179 22 view .LVU1994 + 6247 0066 2372 strb r3, [r4, #8] +2180:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 6248 .loc 1 2180 2 is_stmt 1 view .LVU1995 +2180:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 6249 .loc 1 2180 35 is_stmt 0 view .LVU1996 + 6250 0068 2B88 ldrh r3, [r5] +2180:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 6251 .loc 1 2180 47 view .LVU1997 + 6252 006a C3F34023 ubfx r3, r3, #9, #1 +2180:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 6253 .loc 1 2180 21 view .LVU1998 + 6254 006e 6372 strb r3, [r4, #9] +2181:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 6255 .loc 1 2181 2 is_stmt 1 view .LVU1999 +2181:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 6256 .loc 1 2181 35 is_stmt 0 view .LVU2000 + 6257 0070 2B88 ldrh r3, [r5] +2181:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 6258 .loc 1 2181 48 view .LVU2001 + 6259 0072 C3F38023 ubfx r3, r3, #10, #1 +2181:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 6260 .loc 1 2181 21 view .LVU2002 + 6261 0076 A372 strb r3, [r4, #10] +2182:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 6262 .loc 1 2182 2 is_stmt 1 view .LVU2003 +2182:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 6263 .loc 1 2182 34 is_stmt 0 view .LVU2004 + 6264 0078 2B88 ldrh r3, [r5] +2182:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 6265 .loc 1 2182 47 view .LVU2005 + 6266 007a C3F3C023 ubfx r3, r3, #11, #1 +2182:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 6267 .loc 1 2182 20 view .LVU2006 + 6268 007e E372 strb r3, [r4, #11] +2183:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 6269 .loc 1 2183 2 is_stmt 1 view .LVU2007 +2183:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 6270 .loc 1 2183 35 is_stmt 0 view .LVU2008 + 6271 0080 2B88 ldrh r3, [r5] +2183:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 6272 .loc 1 2183 48 view .LVU2009 + 6273 0082 C3F30033 ubfx r3, r3, #12, #1 +2183:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 6274 .loc 1 2183 21 view .LVU2010 + 6275 0086 2373 strb r3, [r4, #12] +2184:Src/main.c **** + 6276 .loc 1 2184 2 is_stmt 1 view .LVU2011 + ARM GAS /tmp/ccYgfTud.s page 482 -2066:Src/main.c **** temp2++; - 5206 .loc 1 2066 30 view .LVU1711 - 5207 00e4 C6ED027A vstr.32 s15, [r6, #8] -2067:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID - 5208 .loc 1 2067 2 is_stmt 1 view .LVU1712 - 5209 .LVL411: -2068:Src/main.c **** temp2++; - 5210 .loc 1 2068 2 view .LVU1713 -2068:Src/main.c **** temp2++; - 5211 .loc 1 2068 18 is_stmt 0 view .LVU1714 - 5212 00e8 AA8A ldrh r2, [r5, #20] -2068:Src/main.c **** temp2++; - 5213 .loc 1 2068 16 view .LVU1715 - 5214 00ea 7B4B ldr r3, .L215+12 - 5215 00ec 5A83 strh r2, [r3, #26] @ movhi -2069:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); - 5216 .loc 1 2069 2 is_stmt 1 view .LVU1716 - 5217 .LVL412: -2070:Src/main.c **** temp2++; - 5218 .loc 1 2070 2 view .LVU1717 -2070:Src/main.c **** temp2++; - 5219 .loc 1 2070 28 is_stmt 0 view .LVU1718 - 5220 00ee EB8A ldrh r3, [r5, #22] -2070:Src/main.c **** temp2++; - 5221 .loc 1 2070 26 view .LVU1719 - 5222 00f0 BB81 strh r3, [r7, #12] @ movhi -2071:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); - 5223 .loc 1 2071 2 is_stmt 1 view .LVU1720 - 5224 .LVL413: -2072:Src/main.c **** temp2++; - 5225 .loc 1 2072 2 view .LVU1721 -2072:Src/main.c **** temp2++; - 5226 .loc 1 2072 28 is_stmt 0 view .LVU1722 - 5227 00f2 2B8B ldrh r3, [r5, #24] -2072:Src/main.c **** temp2++; - 5228 .loc 1 2072 26 view .LVU1723 - 5229 00f4 B381 strh r3, [r6, #12] @ movhi -2073:Src/main.c **** - 5230 .loc 1 2073 2 is_stmt 1 view .LVU1724 - 5231 .LVL414: -2075:Src/main.c **** { - 5232 .loc 1 2075 2 view .LVU1725 -2075:Src/main.c **** { - 5233 .loc 1 2075 16 is_stmt 0 view .LVU1726 - 5234 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2 -2075:Src/main.c **** { - 5235 .loc 1 2075 5 view .LVU1727 - 5236 00f8 002B cmp r3, #0 - 5237 00fa 00F09580 beq .L193 -2077:Src/main.c **** } - 5238 .loc 1 2077 3 is_stmt 1 view .LVU1728 - 5239 00fe 0122 movs r2, #1 - 5240 0100 0821 movs r1, #8 - 5241 0102 7648 ldr r0, .L215+16 - 5242 0104 FFF7FEFF bl HAL_GPIO_WritePin - 5243 .LVL415: - 5244 .L194: - ARM GAS /tmp/ccO46DoU.s page 453 +2184:Src/main.c **** + 6277 .loc 1 2184 35 is_stmt 0 view .LVU2012 + 6278 0088 2B88 ldrh r3, [r5] +2184:Src/main.c **** + 6279 .loc 1 2184 48 view .LVU2013 + 6280 008a C3F34033 ubfx r3, r3, #13, #1 +2184:Src/main.c **** + 6281 .loc 1 2184 21 view .LVU2014 + 6282 008e 6373 strb r3, [r4, #13] +2186:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 6283 .loc 1 2186 2 is_stmt 1 view .LVU2015 + 6284 .LVL540: +2187:Src/main.c **** temp2++; + 6285 .loc 1 2187 2 view .LVU2016 +2187:Src/main.c **** temp2++; + 6286 .loc 1 2187 28 is_stmt 0 view .LVU2017 + 6287 0090 6B88 ldrh r3, [r5, #2] +2187:Src/main.c **** temp2++; + 6288 .loc 1 2187 26 view .LVU2018 + 6289 0092 3B80 strh r3, [r7] @ movhi +2188:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 6290 .loc 1 2188 2 is_stmt 1 view .LVU2019 + 6291 .LVL541: +2189:Src/main.c **** temp2++; + 6292 .loc 1 2189 2 view .LVU2020 +2189:Src/main.c **** temp2++; + 6293 .loc 1 2189 28 is_stmt 0 view .LVU2021 + 6294 0094 AB88 ldrh r3, [r5, #4] +2189:Src/main.c **** temp2++; + 6295 .loc 1 2189 26 view .LVU2022 + 6296 0096 3380 strh r3, [r6] @ movhi +2190:Src/main.c **** temp2++; + 6297 .loc 1 2190 2 is_stmt 1 view .LVU2023 + 6298 .LVL542: +2191:Src/main.c **** temp2++; + 6299 .loc 1 2191 2 view .LVU2024 +2192:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); + 6300 .loc 1 2192 2 view .LVU2025 +2193:Src/main.c **** temp2++; + 6301 .loc 1 2193 2 view .LVU2026 +2193:Src/main.c **** temp2++; + 6302 .loc 1 2193 25 is_stmt 0 view .LVU2027 + 6303 0098 6B89 ldrh r3, [r5, #10] +2193:Src/main.c **** temp2++; + 6304 .loc 1 2193 23 view .LVU2028 + 6305 009a E381 strh r3, [r4, #14] @ movhi +2194:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 6306 .loc 1 2194 2 is_stmt 1 view .LVU2029 + 6307 .LVL543: +2195:Src/main.c **** temp2++; + 6308 .loc 1 2195 2 view .LVU2030 +2195:Src/main.c **** temp2++; + 6309 .loc 1 2195 51 is_stmt 0 view .LVU2031 + 6310 009c AB89 ldrh r3, [r5, #12] + 6311 009e 07EE903A vmov s15, r3 @ int +2195:Src/main.c **** temp2++; + 6312 .loc 1 2195 32 view .LVU2032 + ARM GAS /tmp/ccYgfTud.s page 483 -2084:Src/main.c **** { - 5245 .loc 1 2084 2 view .LVU1729 -2084:Src/main.c **** { - 5246 .loc 1 2084 16 is_stmt 0 view .LVU1730 - 5247 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2 -2084:Src/main.c **** { - 5248 .loc 1 2084 5 view .LVU1731 - 5249 010a 002B cmp r3, #0 - 5250 010c 00F09280 beq .L195 -2086:Src/main.c **** } - 5251 .loc 1 2086 3 is_stmt 1 view .LVU1732 - 5252 0110 0122 movs r2, #1 - 5253 0112 0421 movs r1, #4 - 5254 0114 7148 ldr r0, .L215+16 - 5255 0116 FFF7FEFF bl HAL_GPIO_WritePin - 5256 .LVL416: - 5257 .L196: -2093:Src/main.c **** { - 5258 .loc 1 2093 2 view .LVU1733 -2093:Src/main.c **** { - 5259 .loc 1 2093 16 is_stmt 0 view .LVU1734 - 5260 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 -2093:Src/main.c **** { - 5261 .loc 1 2093 5 view .LVU1735 - 5262 011c 002B cmp r3, #0 - 5263 011e 00F08F80 beq .L197 -2095:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC - 5264 .loc 1 2095 3 is_stmt 1 view .LVU1736 - 5265 0122 0122 movs r2, #1 - 5266 0124 4FF48071 mov r1, #256 - 5267 0128 6948 ldr r0, .L215+4 - 5268 012a FFF7FEFF bl HAL_GPIO_WritePin - 5269 .LVL417: - 5270 .L198: -2104:Src/main.c **** { - 5271 .loc 1 2104 2 view .LVU1737 -2104:Src/main.c **** { - 5272 .loc 1 2104 16 is_stmt 0 view .LVU1738 - 5273 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2 -2104:Src/main.c **** { - 5274 .loc 1 2104 5 view .LVU1739 - 5275 0130 002B cmp r3, #0 - 5276 0132 00F08C80 beq .L199 -2106:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC - 5277 .loc 1 2106 3 is_stmt 1 view .LVU1740 - 5278 0136 0122 movs r2, #1 - 5279 0138 1021 movs r1, #16 - 5280 013a 6848 ldr r0, .L215+16 - 5281 013c FFF7FEFF bl HAL_GPIO_WritePin - 5282 .LVL418: - 5283 .L200: -2115:Src/main.c **** { - 5284 .loc 1 2115 2 view .LVU1741 -2115:Src/main.c **** { - 5285 .loc 1 2115 16 is_stmt 0 view .LVU1742 - 5286 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 -2115:Src/main.c **** { - ARM GAS /tmp/ccO46DoU.s page 454 + 6313 00a2 F8EE677A vcvt.f32.u32 s15, s15 +2195:Src/main.c **** temp2++; + 6314 .loc 1 2195 59 view .LVU2033 + 6315 00a6 9FED8B7A vldr.32 s14, .L303+8 + 6316 00aa 67EE877A vmul.f32 s15, s15, s14 +2195:Src/main.c **** temp2++; + 6317 .loc 1 2195 30 view .LVU2034 + 6318 00ae C7ED017A vstr.32 s15, [r7, #4] +2196:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 6319 .loc 1 2196 2 is_stmt 1 view .LVU2035 + 6320 .LVL544: +2197:Src/main.c **** temp2++; + 6321 .loc 1 2197 2 view .LVU2036 +2197:Src/main.c **** temp2++; + 6322 .loc 1 2197 51 is_stmt 0 view .LVU2037 + 6323 00b2 EB89 ldrh r3, [r5, #14] + 6324 00b4 07EE903A vmov s15, r3 @ int +2197:Src/main.c **** temp2++; + 6325 .loc 1 2197 32 view .LVU2038 + 6326 00b8 F8EE677A vcvt.f32.u32 s15, s15 +2197:Src/main.c **** temp2++; + 6327 .loc 1 2197 59 view .LVU2039 + 6328 00bc 67EE877A vmul.f32 s15, s15, s14 +2197:Src/main.c **** temp2++; + 6329 .loc 1 2197 30 view .LVU2040 + 6330 00c0 C7ED027A vstr.32 s15, [r7, #8] +2198:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 6331 .loc 1 2198 2 is_stmt 1 view .LVU2041 + 6332 .LVL545: +2199:Src/main.c **** temp2++; + 6333 .loc 1 2199 2 view .LVU2042 +2199:Src/main.c **** temp2++; + 6334 .loc 1 2199 51 is_stmt 0 view .LVU2043 + 6335 00c4 2B8A ldrh r3, [r5, #16] + 6336 00c6 07EE903A vmov s15, r3 @ int +2199:Src/main.c **** temp2++; + 6337 .loc 1 2199 32 view .LVU2044 + 6338 00ca F8EE677A vcvt.f32.u32 s15, s15 +2199:Src/main.c **** temp2++; + 6339 .loc 1 2199 59 view .LVU2045 + 6340 00ce 67EE877A vmul.f32 s15, s15, s14 +2199:Src/main.c **** temp2++; + 6341 .loc 1 2199 30 view .LVU2046 + 6342 00d2 C6ED017A vstr.32 s15, [r6, #4] +2200:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 6343 .loc 1 2200 2 is_stmt 1 view .LVU2047 + 6344 .LVL546: +2201:Src/main.c **** temp2++; + 6345 .loc 1 2201 2 view .LVU2048 +2201:Src/main.c **** temp2++; + 6346 .loc 1 2201 51 is_stmt 0 view .LVU2049 + 6347 00d6 6B8A ldrh r3, [r5, #18] + 6348 00d8 07EE903A vmov s15, r3 @ int +2201:Src/main.c **** temp2++; + 6349 .loc 1 2201 32 view .LVU2050 + 6350 00dc F8EE677A vcvt.f32.u32 s15, s15 +2201:Src/main.c **** temp2++; + ARM GAS /tmp/ccYgfTud.s page 484 - 5287 .loc 1 2115 5 view .LVU1743 - 5288 0142 002B cmp r3, #0 - 5289 0144 00F08980 beq .L201 -2117:Src/main.c **** } - 5290 .loc 1 2117 3 is_stmt 1 view .LVU1744 - 5291 0148 0122 movs r2, #1 - 5292 014a 4FF48061 mov r1, #1024 - 5293 014e 6448 ldr r0, .L215+20 - 5294 0150 FFF7FEFF bl HAL_GPIO_WritePin - 5295 .LVL419: - 5296 .L202: -2124:Src/main.c **** { - 5297 .loc 1 2124 2 view .LVU1745 -2124:Src/main.c **** { - 5298 .loc 1 2124 16 is_stmt 0 view .LVU1746 - 5299 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2 -2124:Src/main.c **** { - 5300 .loc 1 2124 5 view .LVU1747 - 5301 0156 002B cmp r3, #0 - 5302 0158 00F08680 beq .L203 -2126:Src/main.c **** } - 5303 .loc 1 2126 3 is_stmt 1 view .LVU1748 - 5304 015c 0122 movs r2, #1 - 5305 015e 0821 movs r1, #8 - 5306 0160 6048 ldr r0, .L215+24 - 5307 0162 FFF7FEFF bl HAL_GPIO_WritePin - 5308 .LVL420: - 5309 .L204: -2133:Src/main.c **** { - 5310 .loc 1 2133 2 view .LVU1749 -2133:Src/main.c **** { - 5311 .loc 1 2133 17 is_stmt 0 view .LVU1750 - 5312 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2 -2133:Src/main.c **** { - 5313 .loc 1 2133 5 view .LVU1751 - 5314 0168 1BB1 cbz r3, .L205 -2133:Src/main.c **** { - 5315 .loc 1 2133 39 discriminator 1 view .LVU1752 - 5316 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2 -2133:Src/main.c **** { - 5317 .loc 1 2133 26 discriminator 1 view .LVU1753 - 5318 016c 002B cmp r3, #0 - 5319 016e 40F08180 bne .L213 - 5320 .L205: -2142:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 5321 .loc 1 2142 3 is_stmt 1 view .LVU1754 - 5322 0172 0022 movs r2, #0 - 5323 0174 0121 movs r1, #1 - 5324 0176 5B48 ldr r0, .L215+24 - 5325 0178 FFF7FEFF bl HAL_GPIO_WritePin - 5326 .LVL421: -2143:Src/main.c **** } - 5327 .loc 1 2143 3 view .LVU1755 - 5328 017c 0022 movs r2, #0 - 5329 017e 4FF40061 mov r1, #2048 - 5330 0182 5748 ldr r0, .L215+20 - 5331 0184 FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccO46DoU.s page 455 + 6351 .loc 1 2201 59 view .LVU2051 + 6352 00e0 67EE877A vmul.f32 s15, s15, s14 +2201:Src/main.c **** temp2++; + 6353 .loc 1 2201 30 view .LVU2052 + 6354 00e4 C6ED027A vstr.32 s15, [r6, #8] +2202:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID + 6355 .loc 1 2202 2 is_stmt 1 view .LVU2053 + 6356 .LVL547: +2203:Src/main.c **** temp2++; + 6357 .loc 1 2203 2 view .LVU2054 +2203:Src/main.c **** temp2++; + 6358 .loc 1 2203 18 is_stmt 0 view .LVU2055 + 6359 00e8 AA8A ldrh r2, [r5, #20] +2203:Src/main.c **** temp2++; + 6360 .loc 1 2203 16 view .LVU2056 + 6361 00ea 7B4B ldr r3, .L303+12 + 6362 00ec 5A83 strh r2, [r3, #26] @ movhi +2204:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); + 6363 .loc 1 2204 2 is_stmt 1 view .LVU2057 + 6364 .LVL548: +2205:Src/main.c **** temp2++; + 6365 .loc 1 2205 2 view .LVU2058 +2205:Src/main.c **** temp2++; + 6366 .loc 1 2205 28 is_stmt 0 view .LVU2059 + 6367 00ee EB8A ldrh r3, [r5, #22] +2205:Src/main.c **** temp2++; + 6368 .loc 1 2205 26 view .LVU2060 + 6369 00f0 BB81 strh r3, [r7, #12] @ movhi +2206:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); + 6370 .loc 1 2206 2 is_stmt 1 view .LVU2061 + 6371 .LVL549: +2207:Src/main.c **** temp2++; + 6372 .loc 1 2207 2 view .LVU2062 +2207:Src/main.c **** temp2++; + 6373 .loc 1 2207 28 is_stmt 0 view .LVU2063 + 6374 00f2 2B8B ldrh r3, [r5, #24] +2207:Src/main.c **** temp2++; + 6375 .loc 1 2207 26 view .LVU2064 + 6376 00f4 B381 strh r3, [r6, #12] @ movhi +2208:Src/main.c **** + 6377 .loc 1 2208 2 is_stmt 1 view .LVU2065 + 6378 .LVL550: +2210:Src/main.c **** { + 6379 .loc 1 2210 2 view .LVU2066 +2210:Src/main.c **** { + 6380 .loc 1 2210 16 is_stmt 0 view .LVU2067 + 6381 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2 +2210:Src/main.c **** { + 6382 .loc 1 2210 5 view .LVU2068 + 6383 00f8 002B cmp r3, #0 + 6384 00fa 00F09580 beq .L281 +2212:Src/main.c **** } + 6385 .loc 1 2212 3 is_stmt 1 view .LVU2069 + 6386 00fe 0122 movs r2, #1 + 6387 0100 0821 movs r1, #8 + 6388 0102 7648 ldr r0, .L303+16 + 6389 0104 FFF7FEFF bl HAL_GPIO_WritePin + ARM GAS /tmp/ccYgfTud.s page 485 - 5332 .LVL422: - 5333 .L206: -2146:Src/main.c **** { - 5334 .loc 1 2146 2 view .LVU1756 -2146:Src/main.c **** { - 5335 .loc 1 2146 17 is_stmt 0 view .LVU1757 - 5336 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2 -2146:Src/main.c **** { - 5337 .loc 1 2146 5 view .LVU1758 - 5338 018a 1BB1 cbz r3, .L207 -2146:Src/main.c **** { - 5339 .loc 1 2146 39 discriminator 1 view .LVU1759 - 5340 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2 -2146:Src/main.c **** { - 5341 .loc 1 2146 26 discriminator 1 view .LVU1760 - 5342 018e 002B cmp r3, #0 - 5343 0190 40F08680 bne .L214 - 5344 .L207: -2155:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 5345 .loc 1 2155 3 is_stmt 1 view .LVU1761 - 5346 0194 0022 movs r2, #0 - 5347 0196 0221 movs r1, #2 - 5348 0198 5248 ldr r0, .L215+24 - 5349 019a FFF7FEFF bl HAL_GPIO_WritePin - 5350 .LVL423: -2156:Src/main.c **** } - 5351 .loc 1 2156 3 view .LVU1762 - 5352 019e 0022 movs r2, #0 - 5353 01a0 2021 movs r1, #32 - 5354 01a2 4E48 ldr r0, .L215+16 - 5355 01a4 FFF7FEFF bl HAL_GPIO_WritePin - 5356 .LVL424: - 5357 .L208: -2159:Src/main.c **** { - 5358 .loc 1 2159 2 view .LVU1763 -2159:Src/main.c **** { - 5359 .loc 1 2159 16 is_stmt 0 view .LVU1764 - 5360 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2 -2159:Src/main.c **** { - 5361 .loc 1 2159 5 view .LVU1765 - 5362 01aa 1BB9 cbnz r3, .L209 -2161:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 5363 .loc 1 2161 3 is_stmt 1 view .LVU1766 -2161:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 5364 .loc 1 2161 31 is_stmt 0 view .LVU1767 - 5365 01ac 4E4B ldr r3, .L215+28 - 5366 01ae 7B60 str r3, [r7, #4] @ float -2162:Src/main.c **** } - 5367 .loc 1 2162 3 is_stmt 1 view .LVU1768 -2162:Src/main.c **** } - 5368 .loc 1 2162 31 is_stmt 0 view .LVU1769 - 5369 01b0 4E4B ldr r3, .L215+32 - 5370 01b2 BB60 str r3, [r7, #8] @ float - 5371 .L209: -2165:Src/main.c **** { - 5372 .loc 1 2165 2 is_stmt 1 view .LVU1770 -2165:Src/main.c **** { - ARM GAS /tmp/ccO46DoU.s page 456 + 6390 .LVL551: + 6391 .L282: +2219:Src/main.c **** { + 6392 .loc 1 2219 2 view .LVU2070 +2219:Src/main.c **** { + 6393 .loc 1 2219 16 is_stmt 0 view .LVU2071 + 6394 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2 +2219:Src/main.c **** { + 6395 .loc 1 2219 5 view .LVU2072 + 6396 010a 002B cmp r3, #0 + 6397 010c 00F09280 beq .L283 +2221:Src/main.c **** } + 6398 .loc 1 2221 3 is_stmt 1 view .LVU2073 + 6399 0110 0122 movs r2, #1 + 6400 0112 0421 movs r1, #4 + 6401 0114 7148 ldr r0, .L303+16 + 6402 0116 FFF7FEFF bl HAL_GPIO_WritePin + 6403 .LVL552: + 6404 .L284: +2228:Src/main.c **** { + 6405 .loc 1 2228 2 view .LVU2074 +2228:Src/main.c **** { + 6406 .loc 1 2228 16 is_stmt 0 view .LVU2075 + 6407 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 +2228:Src/main.c **** { + 6408 .loc 1 2228 5 view .LVU2076 + 6409 011c 002B cmp r3, #0 + 6410 011e 00F08F80 beq .L285 +2230:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC + 6411 .loc 1 2230 3 is_stmt 1 view .LVU2077 + 6412 0122 0122 movs r2, #1 + 6413 0124 4FF48071 mov r1, #256 + 6414 0128 6948 ldr r0, .L303+4 + 6415 012a FFF7FEFF bl HAL_GPIO_WritePin + 6416 .LVL553: + 6417 .L286: +2239:Src/main.c **** { + 6418 .loc 1 2239 2 view .LVU2078 +2239:Src/main.c **** { + 6419 .loc 1 2239 16 is_stmt 0 view .LVU2079 + 6420 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2 +2239:Src/main.c **** { + 6421 .loc 1 2239 5 view .LVU2080 + 6422 0130 002B cmp r3, #0 + 6423 0132 00F08C80 beq .L287 +2241:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC + 6424 .loc 1 2241 3 is_stmt 1 view .LVU2081 + 6425 0136 0122 movs r2, #1 + 6426 0138 1021 movs r1, #16 + 6427 013a 6848 ldr r0, .L303+16 + 6428 013c FFF7FEFF bl HAL_GPIO_WritePin + 6429 .LVL554: + 6430 .L288: +2250:Src/main.c **** { + 6431 .loc 1 2250 2 view .LVU2082 +2250:Src/main.c **** { + 6432 .loc 1 2250 16 is_stmt 0 view .LVU2083 + ARM GAS /tmp/ccYgfTud.s page 486 - 5373 .loc 1 2165 16 is_stmt 0 view .LVU1771 - 5374 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2 -2165:Src/main.c **** { - 5375 .loc 1 2165 5 view .LVU1772 - 5376 01b6 1BB9 cbnz r3, .L191 -2167:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 5377 .loc 1 2167 3 is_stmt 1 view .LVU1773 -2167:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 5378 .loc 1 2167 31 is_stmt 0 view .LVU1774 - 5379 01b8 4B4B ldr r3, .L215+28 - 5380 01ba 7360 str r3, [r6, #4] @ float -2168:Src/main.c **** } - 5381 .loc 1 2168 3 is_stmt 1 view .LVU1775 -2168:Src/main.c **** } - 5382 .loc 1 2168 31 is_stmt 0 view .LVU1776 - 5383 01bc 4B4B ldr r3, .L215+32 - 5384 01be B360 str r3, [r6, #8] @ float - 5385 .L191: -2170:Src/main.c **** - 5386 .loc 1 2170 1 view .LVU1777 - 5387 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} - 5388 .LVL425: - 5389 .L212: -2021:Src/main.c **** { - 5390 .loc 1 2021 6 view .LVU1778 - 5391 01c4 4FF48071 mov r1, #256 - 5392 01c8 4648 ldr r0, .L215+24 - 5393 01ca FFF7FEFF bl HAL_GPIO_ReadPin - 5394 .LVL426: -2020:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5395 .loc 1 2020 78 discriminator 1 view .LVU1779 - 5396 01ce 0128 cmp r0, #1 - 5397 01d0 7FF426AF bne .L192 -2023:Src/main.c **** if (test == 0) //0 - suc - 5398 .loc 1 2023 3 is_stmt 1 view .LVU1780 -2023:Src/main.c **** if (test == 0) //0 - suc - 5399 .loc 1 2023 10 is_stmt 0 view .LVU1781 - 5400 01d4 4648 ldr r0, .L215+36 - 5401 01d6 FFF7FEFF bl Mount_SD - 5402 .LVL427: -2023:Src/main.c **** if (test == 0) //0 - suc - 5403 .loc 1 2023 8 discriminator 1 view .LVU1782 - 5404 01da 3C4B ldr r3, .L215 - 5405 01dc 1860 str r0, [r3] -2024:Src/main.c **** { - 5406 .loc 1 2024 3 is_stmt 1 view .LVU1783 -2024:Src/main.c **** { - 5407 .loc 1 2024 6 is_stmt 0 view .LVU1784 - 5408 01de 0028 cmp r0, #0 - 5409 01e0 7FF41EAF bne .L192 -2027:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 5410 .loc 1 2027 4 is_stmt 1 view .LVU1785 -2027:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 5411 .loc 1 2027 11 is_stmt 0 view .LVU1786 - 5412 01e4 DFF80C91 ldr r9, .L215+40 - 5413 01e8 4846 mov r0, r9 - 5414 01ea FFF7FEFF bl Remove_File - ARM GAS /tmp/ccO46DoU.s page 457 + 6433 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 +2250:Src/main.c **** { + 6434 .loc 1 2250 5 view .LVU2084 + 6435 0142 002B cmp r3, #0 + 6436 0144 00F08980 beq .L289 +2252:Src/main.c **** } + 6437 .loc 1 2252 3 is_stmt 1 view .LVU2085 + 6438 0148 0122 movs r2, #1 + 6439 014a 4FF48061 mov r1, #1024 + 6440 014e 6448 ldr r0, .L303+20 + 6441 0150 FFF7FEFF bl HAL_GPIO_WritePin + 6442 .LVL555: + 6443 .L290: +2259:Src/main.c **** { + 6444 .loc 1 2259 2 view .LVU2086 +2259:Src/main.c **** { + 6445 .loc 1 2259 16 is_stmt 0 view .LVU2087 + 6446 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2 +2259:Src/main.c **** { + 6447 .loc 1 2259 5 view .LVU2088 + 6448 0156 002B cmp r3, #0 + 6449 0158 00F08680 beq .L291 +2261:Src/main.c **** } + 6450 .loc 1 2261 3 is_stmt 1 view .LVU2089 + 6451 015c 0122 movs r2, #1 + 6452 015e 0821 movs r1, #8 + 6453 0160 6048 ldr r0, .L303+24 + 6454 0162 FFF7FEFF bl HAL_GPIO_WritePin + 6455 .LVL556: + 6456 .L292: +2268:Src/main.c **** { + 6457 .loc 1 2268 2 view .LVU2090 +2268:Src/main.c **** { + 6458 .loc 1 2268 17 is_stmt 0 view .LVU2091 + 6459 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2 +2268:Src/main.c **** { + 6460 .loc 1 2268 5 view .LVU2092 + 6461 0168 1BB1 cbz r3, .L293 +2268:Src/main.c **** { + 6462 .loc 1 2268 39 discriminator 1 view .LVU2093 + 6463 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2 +2268:Src/main.c **** { + 6464 .loc 1 2268 26 discriminator 1 view .LVU2094 + 6465 016c 002B cmp r3, #0 + 6466 016e 40F08180 bne .L301 + 6467 .L293: +2277:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 6468 .loc 1 2277 3 is_stmt 1 view .LVU2095 + 6469 0172 0022 movs r2, #0 + 6470 0174 0121 movs r1, #1 + 6471 0176 5B48 ldr r0, .L303+24 + 6472 0178 FFF7FEFF bl HAL_GPIO_WritePin + 6473 .LVL557: +2278:Src/main.c **** } + 6474 .loc 1 2278 3 view .LVU2096 + 6475 017c 0022 movs r2, #0 + 6476 017e 4FF40061 mov r1, #2048 + ARM GAS /tmp/ccYgfTud.s page 487 - 5415 .LVL428: -2027:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 5416 .loc 1 2027 9 discriminator 1 view .LVU1787 - 5417 01ee DFF8DC80 ldr r8, .L215 - 5418 01f2 C8F80000 str r0, [r8] -2028:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5419 .loc 1 2028 4 is_stmt 1 view .LVU1788 -2028:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5420 .loc 1 2028 11 is_stmt 0 view .LVU1789 - 5421 01f6 4846 mov r0, r9 - 5422 01f8 FFF7FEFF bl Create_File - 5423 .LVL429: -2028:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5424 .loc 1 2028 9 discriminator 1 view .LVU1790 - 5425 01fc C8F80000 str r0, [r8] -2029:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5426 .loc 1 2029 4 is_stmt 1 view .LVU1791 -2029:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5427 .loc 1 2029 11 is_stmt 0 view .LVU1792 - 5428 0200 1E22 movs r2, #30 - 5429 0202 2946 mov r1, r5 - 5430 0204 4846 mov r0, r9 - 5431 0206 FFF7FEFF bl Write_File_byte - 5432 .LVL430: -2029:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5433 .loc 1 2029 9 discriminator 1 view .LVU1793 - 5434 020a C8F80000 str r0, [r8] -2030:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5435 .loc 1 2030 4 is_stmt 1 view .LVU1794 -2030:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5436 .loc 1 2030 11 is_stmt 0 view .LVU1795 - 5437 020e 1E22 movs r2, #30 - 5438 0210 2946 mov r1, r5 - 5439 0212 4846 mov r0, r9 - 5440 0214 FFF7FEFF bl Update_File_byte - 5441 .LVL431: -2030:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5442 .loc 1 2030 9 discriminator 1 view .LVU1796 - 5443 0218 C8F80000 str r0, [r8] -2031:Src/main.c **** } - 5444 .loc 1 2031 4 is_stmt 1 view .LVU1797 -2031:Src/main.c **** } - 5445 .loc 1 2031 11 is_stmt 0 view .LVU1798 - 5446 021c 3448 ldr r0, .L215+36 - 5447 021e FFF7FEFF bl Unmount_SD - 5448 .LVL432: -2031:Src/main.c **** } - 5449 .loc 1 2031 9 discriminator 1 view .LVU1799 - 5450 0222 C8F80000 str r0, [r8] - 5451 0226 FBE6 b .L192 - 5452 .LVL433: - 5453 .L193: -2081:Src/main.c **** } - 5454 .loc 1 2081 3 is_stmt 1 view .LVU1800 - 5455 0228 0022 movs r2, #0 - 5456 022a 0821 movs r1, #8 - 5457 022c 2B48 ldr r0, .L215+16 - ARM GAS /tmp/ccO46DoU.s page 458 + 6477 0182 5748 ldr r0, .L303+20 + 6478 0184 FFF7FEFF bl HAL_GPIO_WritePin + 6479 .LVL558: + 6480 .L294: +2281:Src/main.c **** { + 6481 .loc 1 2281 2 view .LVU2097 +2281:Src/main.c **** { + 6482 .loc 1 2281 17 is_stmt 0 view .LVU2098 + 6483 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2 +2281:Src/main.c **** { + 6484 .loc 1 2281 5 view .LVU2099 + 6485 018a 1BB1 cbz r3, .L295 +2281:Src/main.c **** { + 6486 .loc 1 2281 39 discriminator 1 view .LVU2100 + 6487 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2 +2281:Src/main.c **** { + 6488 .loc 1 2281 26 discriminator 1 view .LVU2101 + 6489 018e 002B cmp r3, #0 + 6490 0190 40F08680 bne .L302 + 6491 .L295: +2290:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 6492 .loc 1 2290 3 is_stmt 1 view .LVU2102 + 6493 0194 0022 movs r2, #0 + 6494 0196 0221 movs r1, #2 + 6495 0198 5248 ldr r0, .L303+24 + 6496 019a FFF7FEFF bl HAL_GPIO_WritePin + 6497 .LVL559: +2291:Src/main.c **** } + 6498 .loc 1 2291 3 view .LVU2103 + 6499 019e 0022 movs r2, #0 + 6500 01a0 2021 movs r1, #32 + 6501 01a2 4E48 ldr r0, .L303+16 + 6502 01a4 FFF7FEFF bl HAL_GPIO_WritePin + 6503 .LVL560: + 6504 .L296: +2294:Src/main.c **** { + 6505 .loc 1 2294 2 view .LVU2104 +2294:Src/main.c **** { + 6506 .loc 1 2294 16 is_stmt 0 view .LVU2105 + 6507 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2 +2294:Src/main.c **** { + 6508 .loc 1 2294 5 view .LVU2106 + 6509 01aa 1BB9 cbnz r3, .L297 +2296:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 6510 .loc 1 2296 3 is_stmt 1 view .LVU2107 +2296:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 6511 .loc 1 2296 31 is_stmt 0 view .LVU2108 + 6512 01ac 4E4B ldr r3, .L303+28 + 6513 01ae 7B60 str r3, [r7, #4] @ float +2297:Src/main.c **** } + 6514 .loc 1 2297 3 is_stmt 1 view .LVU2109 +2297:Src/main.c **** } + 6515 .loc 1 2297 31 is_stmt 0 view .LVU2110 + 6516 01b0 4E4B ldr r3, .L303+32 + 6517 01b2 BB60 str r3, [r7, #8] @ float + 6518 .L297: +2300:Src/main.c **** { + ARM GAS /tmp/ccYgfTud.s page 488 - 5458 022e FFF7FEFF bl HAL_GPIO_WritePin - 5459 .LVL434: - 5460 0232 69E7 b .L194 - 5461 .L195: -2090:Src/main.c **** } - 5462 .loc 1 2090 3 view .LVU1801 - 5463 0234 0022 movs r2, #0 - 5464 0236 0421 movs r1, #4 - 5465 0238 2848 ldr r0, .L215+16 - 5466 023a FFF7FEFF bl HAL_GPIO_WritePin - 5467 .LVL435: - 5468 023e 6CE7 b .L196 - 5469 .L197: -2100:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC - 5470 .loc 1 2100 3 view .LVU1802 - 5471 0240 0022 movs r2, #0 - 5472 0242 4FF48071 mov r1, #256 - 5473 0246 2248 ldr r0, .L215+4 - 5474 0248 FFF7FEFF bl HAL_GPIO_WritePin - 5475 .LVL436: - 5476 024c 6FE7 b .L198 - 5477 .L199: -2111:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC - 5478 .loc 1 2111 3 view .LVU1803 - 5479 024e 0022 movs r2, #0 - 5480 0250 1021 movs r1, #16 - 5481 0252 2248 ldr r0, .L215+16 - 5482 0254 FFF7FEFF bl HAL_GPIO_WritePin - 5483 .LVL437: - 5484 0258 72E7 b .L200 - 5485 .L201: -2121:Src/main.c **** } - 5486 .loc 1 2121 3 view .LVU1804 - 5487 025a 0022 movs r2, #0 - 5488 025c 4FF48061 mov r1, #1024 - 5489 0260 1F48 ldr r0, .L215+20 - 5490 0262 FFF7FEFF bl HAL_GPIO_WritePin - 5491 .LVL438: - 5492 0266 75E7 b .L202 - 5493 .L203: -2130:Src/main.c **** } - 5494 .loc 1 2130 3 view .LVU1805 - 5495 0268 0022 movs r2, #0 - 5496 026a 0821 movs r1, #8 - 5497 026c 1D48 ldr r0, .L215+24 - 5498 026e FFF7FEFF bl HAL_GPIO_WritePin - 5499 .LVL439: - 5500 0272 78E7 b .L204 - 5501 .L213: -2135:Src/main.c **** Set_LTEC(3,32767); - 5502 .loc 1 2135 3 view .LVU1806 - 5503 0274 47F6FF71 movw r1, #32767 - 5504 0278 0320 movs r0, #3 - 5505 027a FFF7FEFF bl Set_LTEC - 5506 .LVL440: -2136:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); - 5507 .loc 1 2136 3 view .LVU1807 - ARM GAS /tmp/ccO46DoU.s page 459 + 6519 .loc 1 2300 2 is_stmt 1 view .LVU2111 +2300:Src/main.c **** { + 6520 .loc 1 2300 16 is_stmt 0 view .LVU2112 + 6521 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2 +2300:Src/main.c **** { + 6522 .loc 1 2300 5 view .LVU2113 + 6523 01b6 1BB9 cbnz r3, .L279 +2302:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 6524 .loc 1 2302 3 is_stmt 1 view .LVU2114 +2302:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 6525 .loc 1 2302 31 is_stmt 0 view .LVU2115 + 6526 01b8 4B4B ldr r3, .L303+28 + 6527 01ba 7360 str r3, [r6, #4] @ float +2303:Src/main.c **** } + 6528 .loc 1 2303 3 is_stmt 1 view .LVU2116 +2303:Src/main.c **** } + 6529 .loc 1 2303 31 is_stmt 0 view .LVU2117 + 6530 01bc 4B4B ldr r3, .L303+32 + 6531 01be B360 str r3, [r6, #8] @ float + 6532 .L279: +2305:Src/main.c **** + 6533 .loc 1 2305 1 view .LVU2118 + 6534 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 6535 .LVL561: + 6536 .L300: +2156:Src/main.c **** { + 6537 .loc 1 2156 6 view .LVU2119 + 6538 01c4 4FF48071 mov r1, #256 + 6539 01c8 4648 ldr r0, .L303+24 + 6540 01ca FFF7FEFF bl HAL_GPIO_ReadPin + 6541 .LVL562: +2155:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 6542 .loc 1 2155 78 discriminator 1 view .LVU2120 + 6543 01ce 0128 cmp r0, #1 + 6544 01d0 7FF426AF bne .L280 +2158:Src/main.c **** if (test == 0) //0 - suc + 6545 .loc 1 2158 3 is_stmt 1 view .LVU2121 +2158:Src/main.c **** if (test == 0) //0 - suc + 6546 .loc 1 2158 10 is_stmt 0 view .LVU2122 + 6547 01d4 4648 ldr r0, .L303+36 + 6548 01d6 FFF7FEFF bl Mount_SD + 6549 .LVL563: +2158:Src/main.c **** if (test == 0) //0 - suc + 6550 .loc 1 2158 8 discriminator 1 view .LVU2123 + 6551 01da 3C4B ldr r3, .L303 + 6552 01dc 1860 str r0, [r3] +2159:Src/main.c **** { + 6553 .loc 1 2159 3 is_stmt 1 view .LVU2124 +2159:Src/main.c **** { + 6554 .loc 1 2159 6 is_stmt 0 view .LVU2125 + 6555 01de 0028 cmp r0, #0 + 6556 01e0 7FF41EAF bne .L280 +2162:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 6557 .loc 1 2162 4 is_stmt 1 view .LVU2126 +2162:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 6558 .loc 1 2162 11 is_stmt 0 view .LVU2127 + 6559 01e4 DFF80C91 ldr r9, .L303+40 + ARM GAS /tmp/ccYgfTud.s page 489 - 5508 027e 47F6FF71 movw r1, #32767 - 5509 0282 0320 movs r0, #3 - 5510 0284 FFF7FEFF bl Set_LTEC - 5511 .LVL441: -2137:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); - 5512 .loc 1 2137 3 view .LVU1808 - 5513 0288 0122 movs r2, #1 - 5514 028a 4FF40061 mov r1, #2048 - 5515 028e 1448 ldr r0, .L215+20 - 5516 0290 FFF7FEFF bl HAL_GPIO_WritePin - 5517 .LVL442: -2138:Src/main.c **** } - 5518 .loc 1 2138 3 view .LVU1809 - 5519 0294 0122 movs r2, #1 - 5520 0296 1146 mov r1, r2 - 5521 0298 1248 ldr r0, .L215+24 - 5522 029a FFF7FEFF bl HAL_GPIO_WritePin - 5523 .LVL443: - 5524 029e 73E7 b .L206 - 5525 .L214: -2148:Src/main.c **** Set_LTEC(4,32767); - 5526 .loc 1 2148 3 view .LVU1810 - 5527 02a0 47F6FF71 movw r1, #32767 - 5528 02a4 0420 movs r0, #4 - 5529 02a6 FFF7FEFF bl Set_LTEC - 5530 .LVL444: -2149:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); - 5531 .loc 1 2149 3 view .LVU1811 - 5532 02aa 47F6FF71 movw r1, #32767 - 5533 02ae 0420 movs r0, #4 - 5534 02b0 FFF7FEFF bl Set_LTEC - 5535 .LVL445: -2150:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); - 5536 .loc 1 2150 3 view .LVU1812 - 5537 02b4 0122 movs r2, #1 - 5538 02b6 2021 movs r1, #32 - 5539 02b8 0848 ldr r0, .L215+16 - 5540 02ba FFF7FEFF bl HAL_GPIO_WritePin - 5541 .LVL446: -2151:Src/main.c **** } - 5542 .loc 1 2151 3 view .LVU1813 - 5543 02be 0122 movs r2, #1 - 5544 02c0 0221 movs r1, #2 - 5545 02c2 0848 ldr r0, .L215+24 - 5546 02c4 FFF7FEFF bl HAL_GPIO_WritePin - 5547 .LVL447: - 5548 02c8 6EE7 b .L208 - 5549 .L216: - 5550 02ca 00BF .align 2 - 5551 .L215: - 5552 02cc 00000000 .word test - 5553 02d0 000C0240 .word 1073875968 - 5554 02d4 0000803B .word 998244352 - 5555 02d8 00000000 .word Long_Data - 5556 02dc 00080240 .word 1073874944 - 5557 02e0 00040240 .word 1073873920 - 5558 02e4 00000240 .word 1073872896 - ARM GAS /tmp/ccO46DoU.s page 460 + 6560 01e8 4846 mov r0, r9 + 6561 01ea FFF7FEFF bl Remove_File + 6562 .LVL564: +2162:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 6563 .loc 1 2162 9 discriminator 1 view .LVU2128 + 6564 01ee DFF8DC80 ldr r8, .L303 + 6565 01f2 C8F80000 str r0, [r8] +2163:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 6566 .loc 1 2163 4 is_stmt 1 view .LVU2129 +2163:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 6567 .loc 1 2163 11 is_stmt 0 view .LVU2130 + 6568 01f6 4846 mov r0, r9 + 6569 01f8 FFF7FEFF bl Create_File + 6570 .LVL565: +2163:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 6571 .loc 1 2163 9 discriminator 1 view .LVU2131 + 6572 01fc C8F80000 str r0, [r8] +2164:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 6573 .loc 1 2164 4 is_stmt 1 view .LVU2132 +2164:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 6574 .loc 1 2164 11 is_stmt 0 view .LVU2133 + 6575 0200 1E22 movs r2, #30 + 6576 0202 2946 mov r1, r5 + 6577 0204 4846 mov r0, r9 + 6578 0206 FFF7FEFF bl Write_File_byte + 6579 .LVL566: +2164:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 6580 .loc 1 2164 9 discriminator 1 view .LVU2134 + 6581 020a C8F80000 str r0, [r8] +2165:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6582 .loc 1 2165 4 is_stmt 1 view .LVU2135 +2165:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6583 .loc 1 2165 11 is_stmt 0 view .LVU2136 + 6584 020e 1E22 movs r2, #30 + 6585 0210 2946 mov r1, r5 + 6586 0212 4846 mov r0, r9 + 6587 0214 FFF7FEFF bl Update_File_byte + 6588 .LVL567: +2165:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6589 .loc 1 2165 9 discriminator 1 view .LVU2137 + 6590 0218 C8F80000 str r0, [r8] +2166:Src/main.c **** } + 6591 .loc 1 2166 4 is_stmt 1 view .LVU2138 +2166:Src/main.c **** } + 6592 .loc 1 2166 11 is_stmt 0 view .LVU2139 + 6593 021c 3448 ldr r0, .L303+36 + 6594 021e FFF7FEFF bl Unmount_SD + 6595 .LVL568: +2166:Src/main.c **** } + 6596 .loc 1 2166 9 discriminator 1 view .LVU2140 + 6597 0222 C8F80000 str r0, [r8] + 6598 0226 FBE6 b .L280 + 6599 .LVL569: + 6600 .L281: +2216:Src/main.c **** } + 6601 .loc 1 2216 3 is_stmt 1 view .LVU2141 + 6602 0228 0022 movs r2, #0 + ARM GAS /tmp/ccYgfTud.s page 490 - 5559 02e8 00002041 .word 1092616192 - 5560 02ec 0AD7233C .word 1008981770 - 5561 02f0 00000000 .word .LC0 - 5562 02f4 04000000 .word .LC1 - 5563 .cfi_endproc - 5564 .LFE1208: - 5566 .section .text.Advanced_Controller_Temp,"ax",%progbits - 5567 .align 1 - 5568 .global Advanced_Controller_Temp - 5569 .syntax unified - 5570 .thumb - 5571 .thumb_func - 5573 Advanced_Controller_Temp: - 5574 .LVL448: - 5575 .LFB1214: -2468:Src/main.c **** // Main idea: - 5576 .loc 1 2468 1 view -0 - 5577 .cfi_startproc - 5578 @ args = 0, pretend = 0, frame = 0 - 5579 @ frame_needed = 0, uses_anonymous_args = 0 - 5580 @ link register save eliminated. -2468:Src/main.c **** // Main idea: - 5581 .loc 1 2468 1 is_stmt 0 view .LVU1815 - 5582 0000 30B4 push {r4, r5} - 5583 .LCFI43: - 5584 .cfi_def_cfa_offset 8 - 5585 .cfi_offset 4, -8 - 5586 .cfi_offset 5, -4 -2486:Src/main.c **** float P_coef_current;//, I_coef_current; - 5587 .loc 1 2486 2 is_stmt 1 view .LVU1816 -2487:Src/main.c **** float e_integral; - 5588 .loc 1 2487 2 view .LVU1817 -2488:Src/main.c **** int x_output; - 5589 .loc 1 2488 2 view .LVU1818 -2489:Src/main.c **** - 5590 .loc 1 2489 2 view .LVU1819 -2491:Src/main.c **** - 5591 .loc 1 2491 2 view .LVU1820 -2491:Src/main.c **** - 5592 .loc 1 2491 28 is_stmt 0 view .LVU1821 - 5593 0002 0B88 ldrh r3, [r1] -2491:Src/main.c **** - 5594 .loc 1 2491 65 view .LVU1822 - 5595 0004 0488 ldrh r4, [r0] -2491:Src/main.c **** - 5596 .loc 1 2491 8 view .LVU1823 - 5597 0006 1B1B subs r3, r3, r4 - 5598 .LVL449: -2493:Src/main.c **** - 5599 .loc 1 2493 2 is_stmt 1 view .LVU1824 -2493:Src/main.c **** - 5600 .loc 1 2493 13 is_stmt 0 view .LVU1825 - 5601 0008 D1ED017A vldr.32 s15, [r1, #4] - 5602 .LVL450: -2495:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 5603 .loc 1 2495 2 is_stmt 1 view .LVU1826 -2495:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - ARM GAS /tmp/ccO46DoU.s page 461 + 6603 022a 0821 movs r1, #8 + 6604 022c 2B48 ldr r0, .L303+16 + 6605 022e FFF7FEFF bl HAL_GPIO_WritePin + 6606 .LVL570: + 6607 0232 69E7 b .L282 + 6608 .L283: +2225:Src/main.c **** } + 6609 .loc 1 2225 3 view .LVU2142 + 6610 0234 0022 movs r2, #0 + 6611 0236 0421 movs r1, #4 + 6612 0238 2848 ldr r0, .L303+16 + 6613 023a FFF7FEFF bl HAL_GPIO_WritePin + 6614 .LVL571: + 6615 023e 6CE7 b .L284 + 6616 .L285: +2235:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC + 6617 .loc 1 2235 3 view .LVU2143 + 6618 0240 0022 movs r2, #0 + 6619 0242 4FF48071 mov r1, #256 + 6620 0246 2248 ldr r0, .L303+4 + 6621 0248 FFF7FEFF bl HAL_GPIO_WritePin + 6622 .LVL572: + 6623 024c 6FE7 b .L286 + 6624 .L287: +2246:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC + 6625 .loc 1 2246 3 view .LVU2144 + 6626 024e 0022 movs r2, #0 + 6627 0250 1021 movs r1, #16 + 6628 0252 2248 ldr r0, .L303+16 + 6629 0254 FFF7FEFF bl HAL_GPIO_WritePin + 6630 .LVL573: + 6631 0258 72E7 b .L288 + 6632 .L289: +2256:Src/main.c **** } + 6633 .loc 1 2256 3 view .LVU2145 + 6634 025a 0022 movs r2, #0 + 6635 025c 4FF48061 mov r1, #1024 + 6636 0260 1F48 ldr r0, .L303+20 + 6637 0262 FFF7FEFF bl HAL_GPIO_WritePin + 6638 .LVL574: + 6639 0266 75E7 b .L290 + 6640 .L291: +2265:Src/main.c **** } + 6641 .loc 1 2265 3 view .LVU2146 + 6642 0268 0022 movs r2, #0 + 6643 026a 0821 movs r1, #8 + 6644 026c 1D48 ldr r0, .L303+24 + 6645 026e FFF7FEFF bl HAL_GPIO_WritePin + 6646 .LVL575: + 6647 0272 78E7 b .L292 + 6648 .L301: +2270:Src/main.c **** Set_LTEC(3,32767); + 6649 .loc 1 2270 3 view .LVU2147 + 6650 0274 47F6FF71 movw r1, #32767 + 6651 0278 0320 movs r0, #3 + 6652 027a FFF7FEFF bl Set_LTEC + 6653 .LVL576: + ARM GAS /tmp/ccYgfTud.s page 491 - 5604 .loc 1 2495 20 is_stmt 0 view .LVU1827 - 5605 000c 03F6B73C addw ip, r3, #2999 -2495:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 5606 .loc 1 2495 4 view .LVU1828 - 5607 0010 41F26E74 movw r4, #5998 - 5608 0014 A445 cmp ip, r4 - 5609 0016 18D8 bhi .L218 -2496:Src/main.c **** } - 5610 .loc 1 2496 3 is_stmt 1 view .LVU1829 -2496:Src/main.c **** } - 5611 .loc 1 2496 31 is_stmt 0 view .LVU1830 - 5612 0018 90ED027A vldr.32 s14, [r0, #8] -2496:Src/main.c **** } - 5613 .loc 1 2496 47 view .LVU1831 - 5614 001c 06EE903A vmov s13, r3 @ int - 5615 0020 F8EEE66A vcvt.f32.s32 s13, s13 -2496:Src/main.c **** } - 5616 .loc 1 2496 45 view .LVU1832 - 5617 0024 27EE267A vmul.f32 s14, s14, s13 -2496:Src/main.c **** } - 5618 .loc 1 2496 76 view .LVU1833 - 5619 0028 284C ldr r4, .L228 - 5620 002a 2468 ldr r4, [r4] - 5621 002c 284D ldr r5, .L228+4 - 5622 002e 2D68 ldr r5, [r5] - 5623 0030 641B subs r4, r4, r5 -2496:Src/main.c **** } - 5624 .loc 1 2496 64 view .LVU1834 - 5625 0032 06EE904A vmov s13, r4 @ int - 5626 0036 F8EE666A vcvt.f32.u32 s13, s13 -2496:Src/main.c **** } - 5627 .loc 1 2496 62 view .LVU1835 - 5628 003a 27EE267A vmul.f32 s14, s14, s13 -2496:Src/main.c **** } - 5629 .loc 1 2496 87 view .LVU1836 - 5630 003e 9FED256A vldr.32 s12, .L228+8 - 5631 0042 C7EE066A vdiv.f32 s13, s14, s12 -2496:Src/main.c **** } - 5632 .loc 1 2496 14 view .LVU1837 - 5633 0046 77EEA67A vadd.f32 s15, s15, s13 - 5634 .LVL451: - 5635 .L218: -2498:Src/main.c **** - 5636 .loc 1 2498 2 is_stmt 1 view .LVU1838 -2498:Src/main.c **** - 5637 .loc 1 2498 17 is_stmt 0 view .LVU1839 - 5638 004a D0ED016A vldr.32 s13, [r0, #4] - 5639 .LVL452: -2500:Src/main.c **** e_integral = 32000; - 5640 .loc 1 2500 2 is_stmt 1 view .LVU1840 -2500:Src/main.c **** e_integral = 32000; - 5641 .loc 1 2500 5 is_stmt 0 view .LVU1841 - 5642 004e 9FED227A vldr.32 s14, .L228+12 - 5643 0052 F4EEC77A vcmpe.f32 s15, s14 - 5644 0056 F1EE10FA vmrs APSR_nzcv, FPSCR - 5645 005a 09DC bgt .L222 -2503:Src/main.c **** e_integral = -32000; - ARM GAS /tmp/ccO46DoU.s page 462 +2271:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); + 6654 .loc 1 2271 3 view .LVU2148 + 6655 027e 47F6FF71 movw r1, #32767 + 6656 0282 0320 movs r0, #3 + 6657 0284 FFF7FEFF bl Set_LTEC + 6658 .LVL577: +2272:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); + 6659 .loc 1 2272 3 view .LVU2149 + 6660 0288 0122 movs r2, #1 + 6661 028a 4FF40061 mov r1, #2048 + 6662 028e 1448 ldr r0, .L303+20 + 6663 0290 FFF7FEFF bl HAL_GPIO_WritePin + 6664 .LVL578: +2273:Src/main.c **** } + 6665 .loc 1 2273 3 view .LVU2150 + 6666 0294 0122 movs r2, #1 + 6667 0296 1146 mov r1, r2 + 6668 0298 1248 ldr r0, .L303+24 + 6669 029a FFF7FEFF bl HAL_GPIO_WritePin + 6670 .LVL579: + 6671 029e 73E7 b .L294 + 6672 .L302: +2283:Src/main.c **** Set_LTEC(4,32767); + 6673 .loc 1 2283 3 view .LVU2151 + 6674 02a0 47F6FF71 movw r1, #32767 + 6675 02a4 0420 movs r0, #4 + 6676 02a6 FFF7FEFF bl Set_LTEC + 6677 .LVL580: +2284:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); + 6678 .loc 1 2284 3 view .LVU2152 + 6679 02aa 47F6FF71 movw r1, #32767 + 6680 02ae 0420 movs r0, #4 + 6681 02b0 FFF7FEFF bl Set_LTEC + 6682 .LVL581: +2285:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); + 6683 .loc 1 2285 3 view .LVU2153 + 6684 02b4 0122 movs r2, #1 + 6685 02b6 2021 movs r1, #32 + 6686 02b8 0848 ldr r0, .L303+16 + 6687 02ba FFF7FEFF bl HAL_GPIO_WritePin + 6688 .LVL582: +2286:Src/main.c **** } + 6689 .loc 1 2286 3 view .LVU2154 + 6690 02be 0122 movs r2, #1 + 6691 02c0 0221 movs r1, #2 + 6692 02c2 0848 ldr r0, .L303+24 + 6693 02c4 FFF7FEFF bl HAL_GPIO_WritePin + 6694 .LVL583: + 6695 02c8 6EE7 b .L296 + 6696 .L304: + 6697 02ca 00BF .align 2 + 6698 .L303: + 6699 02cc 00000000 .word test + 6700 02d0 000C0240 .word 1073875968 + 6701 02d4 0000803B .word 998244352 + 6702 02d8 00000000 .word Long_Data + 6703 02dc 00080240 .word 1073874944 + ARM GAS /tmp/ccYgfTud.s page 492 - 5646 .loc 1 2503 7 is_stmt 1 view .LVU1842 -2503:Src/main.c **** e_integral = -32000; - 5647 .loc 1 2503 10 is_stmt 0 view .LVU1843 - 5648 005c 9FED1F7A vldr.32 s14, .L228+16 - 5649 0060 F4EEC77A vcmpe.f32 s15, s14 - 5650 0064 F1EE10FA vmrs APSR_nzcv, FPSCR - 5651 0068 04D5 bpl .L219 -2504:Src/main.c **** } - 5652 .loc 1 2504 15 view .LVU1844 - 5653 006a DFED1C7A vldr.32 s15, .L228+16 - 5654 .LVL453: -2504:Src/main.c **** } - 5655 .loc 1 2504 15 view .LVU1845 - 5656 006e 01E0 b .L219 - 5657 .LVL454: - 5658 .L222: -2501:Src/main.c **** } - 5659 .loc 1 2501 15 view .LVU1846 - 5660 0070 DFED197A vldr.32 s15, .L228+12 - 5661 .LVL455: - 5662 .L219: -2506:Src/main.c **** - 5663 .loc 1 2506 2 is_stmt 1 view .LVU1847 -2506:Src/main.c **** - 5664 .loc 1 2506 26 is_stmt 0 view .LVU1848 - 5665 0074 C1ED017A vstr.32 s15, [r1, #4] -2508:Src/main.c **** - 5666 .loc 1 2508 2 is_stmt 1 view .LVU1849 -2508:Src/main.c **** - 5667 .loc 1 2508 36 is_stmt 0 view .LVU1850 - 5668 0078 07EE103A vmov s14, r3 @ int - 5669 007c B8EEC77A vcvt.f32.s32 s14, s14 - 5670 0080 27EE267A vmul.f32 s14, s14, s13 -2508:Src/main.c **** - 5671 .loc 1 2508 19 view .LVU1851 - 5672 0084 DFED166A vldr.32 s13, .L228+20 - 5673 .LVL456: -2508:Src/main.c **** - 5674 .loc 1 2508 19 view .LVU1852 - 5675 0088 37EE267A vadd.f32 s14, s14, s13 -2508:Src/main.c **** - 5676 .loc 1 2508 46 view .LVU1853 - 5677 008c FDEEE77A vcvt.s32.f32 s15, s15 - 5678 .LVL457: -2508:Src/main.c **** - 5679 .loc 1 2508 44 view .LVU1854 - 5680 0090 F8EEE77A vcvt.f32.s32 s15, s15 - 5681 0094 77EE877A vadd.f32 s15, s15, s14 -2508:Src/main.c **** - 5682 .loc 1 2508 11 view .LVU1855 - 5683 0098 FDEEE77A vcvt.s32.f32 s15, s15 - 5684 009c 17EE900A vmov r0, s15 @ int - 5685 .LVL458: -2510:Src/main.c **** x_output = 8800; - 5686 .loc 1 2510 2 is_stmt 1 view .LVU1856 -2510:Src/main.c **** x_output = 8800; - 5687 .loc 1 2510 4 is_stmt 0 view .LVU1857 - ARM GAS /tmp/ccO46DoU.s page 463 + 6704 02e0 00040240 .word 1073873920 + 6705 02e4 00000240 .word 1073872896 + 6706 02e8 00002041 .word 1092616192 + 6707 02ec 0AD7233C .word 1008981770 + 6708 02f0 00000000 .word .LC0 + 6709 02f4 04000000 .word .LC1 + 6710 .cfi_endproc + 6711 .LFE1208: + 6713 .section .text.Advanced_Controller_Temp,"ax",%progbits + 6714 .align 1 + 6715 .global Advanced_Controller_Temp + 6716 .syntax unified + 6717 .thumb + 6718 .thumb_func + 6720 Advanced_Controller_Temp: + 6721 .LVL584: + 6722 .LFB1220: +2814:Src/main.c **** // Main idea: + 6723 .loc 1 2814 1 view -0 + 6724 .cfi_startproc + 6725 @ args = 0, pretend = 0, frame = 0 + 6726 @ frame_needed = 0, uses_anonymous_args = 0 + 6727 @ link register save eliminated. +2814:Src/main.c **** // Main idea: + 6728 .loc 1 2814 1 is_stmt 0 view .LVU2156 + 6729 0000 30B4 push {r4, r5} + 6730 .LCFI58: + 6731 .cfi_def_cfa_offset 8 + 6732 .cfi_offset 4, -8 + 6733 .cfi_offset 5, -4 +2832:Src/main.c **** float P_coef_current;//, I_coef_current; + 6734 .loc 1 2832 2 is_stmt 1 view .LVU2157 +2833:Src/main.c **** float e_integral; + 6735 .loc 1 2833 2 view .LVU2158 +2834:Src/main.c **** int x_output; + 6736 .loc 1 2834 2 view .LVU2159 +2835:Src/main.c **** + 6737 .loc 1 2835 2 view .LVU2160 +2837:Src/main.c **** + 6738 .loc 1 2837 2 view .LVU2161 +2837:Src/main.c **** + 6739 .loc 1 2837 28 is_stmt 0 view .LVU2162 + 6740 0002 0B88 ldrh r3, [r1] +2837:Src/main.c **** + 6741 .loc 1 2837 65 view .LVU2163 + 6742 0004 0488 ldrh r4, [r0] +2837:Src/main.c **** + 6743 .loc 1 2837 8 view .LVU2164 + 6744 0006 1B1B subs r3, r3, r4 + 6745 .LVL585: +2839:Src/main.c **** + 6746 .loc 1 2839 2 is_stmt 1 view .LVU2165 +2839:Src/main.c **** + 6747 .loc 1 2839 13 is_stmt 0 view .LVU2166 + 6748 0008 D1ED017A vldr.32 s15, [r1, #4] + 6749 .LVL586: +2841:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + ARM GAS /tmp/ccYgfTud.s page 493 - 5688 00a0 B0F57A7F cmp r0, #1000 - 5689 00a4 06DB blt .L224 -2513:Src/main.c **** x_output = 56800; - 5690 .loc 1 2513 7 is_stmt 1 view .LVU1858 -2513:Src/main.c **** x_output = 56800; - 5691 .loc 1 2513 9 is_stmt 0 view .LVU1859 - 5692 00a6 4DF6E053 movw r3, #56800 - 5693 .LVL459: -2513:Src/main.c **** x_output = 56800; - 5694 .loc 1 2513 9 view .LVU1860 - 5695 00aa 9842 cmp r0, r3 - 5696 00ac 04DD ble .L220 -2514:Src/main.c **** } - 5697 .loc 1 2514 12 view .LVU1861 - 5698 00ae 4DF6E050 movw r0, #56800 - 5699 .LVL460: -2514:Src/main.c **** } - 5700 .loc 1 2514 12 view .LVU1862 - 5701 00b2 01E0 b .L220 - 5702 .LVL461: - 5703 .L224: -2511:Src/main.c **** } - 5704 .loc 1 2511 12 view .LVU1863 - 5705 00b4 42F26020 movw r0, #8800 - 5706 .LVL462: - 5707 .L220: -2517:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 5708 .loc 1 2517 2 is_stmt 1 view .LVU1864 -2517:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 5709 .loc 1 2517 5 is_stmt 0 view .LVU1865 - 5710 00b8 022A cmp r2, #2 - 5711 00ba 02D0 beq .L227 - 5712 .LVL463: - 5713 .L221: -2520:Src/main.c **** } - 5714 .loc 1 2520 2 is_stmt 1 view .LVU1866 -2521:Src/main.c **** - 5715 .loc 1 2521 1 is_stmt 0 view .LVU1867 - 5716 00bc 80B2 uxth r0, r0 - 5717 .LVL464: -2521:Src/main.c **** - 5718 .loc 1 2521 1 view .LVU1868 - 5719 00be 30BC pop {r4, r5} - 5720 .LCFI44: - 5721 .cfi_remember_state - 5722 .cfi_restore 5 - 5723 .cfi_restore 4 - 5724 .cfi_def_cfa_offset 0 - 5725 00c0 7047 bx lr - 5726 .LVL465: - 5727 .L227: - 5728 .LCFI45: - 5729 .cfi_restore_state -2518:Src/main.c **** - 5730 .loc 1 2518 3 is_stmt 1 view .LVU1869 -2518:Src/main.c **** - 5731 .loc 1 2518 11 is_stmt 0 view .LVU1870 - ARM GAS /tmp/ccO46DoU.s page 464 + 6750 .loc 1 2841 2 is_stmt 1 view .LVU2167 +2841:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 6751 .loc 1 2841 20 is_stmt 0 view .LVU2168 + 6752 000c 03F6B73C addw ip, r3, #2999 +2841:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 6753 .loc 1 2841 4 view .LVU2169 + 6754 0010 41F26E74 movw r4, #5998 + 6755 0014 A445 cmp ip, r4 + 6756 0016 18D8 bhi .L306 +2842:Src/main.c **** } + 6757 .loc 1 2842 3 is_stmt 1 view .LVU2170 +2842:Src/main.c **** } + 6758 .loc 1 2842 31 is_stmt 0 view .LVU2171 + 6759 0018 90ED027A vldr.32 s14, [r0, #8] +2842:Src/main.c **** } + 6760 .loc 1 2842 47 view .LVU2172 + 6761 001c 06EE903A vmov s13, r3 @ int + 6762 0020 F8EEE66A vcvt.f32.s32 s13, s13 +2842:Src/main.c **** } + 6763 .loc 1 2842 45 view .LVU2173 + 6764 0024 27EE267A vmul.f32 s14, s14, s13 +2842:Src/main.c **** } + 6765 .loc 1 2842 76 view .LVU2174 + 6766 0028 284C ldr r4, .L316 + 6767 002a 2468 ldr r4, [r4] + 6768 002c 284D ldr r5, .L316+4 + 6769 002e 2D68 ldr r5, [r5] + 6770 0030 641B subs r4, r4, r5 +2842:Src/main.c **** } + 6771 .loc 1 2842 64 view .LVU2175 + 6772 0032 06EE904A vmov s13, r4 @ int + 6773 0036 F8EE666A vcvt.f32.u32 s13, s13 +2842:Src/main.c **** } + 6774 .loc 1 2842 62 view .LVU2176 + 6775 003a 27EE267A vmul.f32 s14, s14, s13 +2842:Src/main.c **** } + 6776 .loc 1 2842 87 view .LVU2177 + 6777 003e 9FED256A vldr.32 s12, .L316+8 + 6778 0042 C7EE066A vdiv.f32 s13, s14, s12 +2842:Src/main.c **** } + 6779 .loc 1 2842 14 view .LVU2178 + 6780 0046 77EEA67A vadd.f32 s15, s15, s13 + 6781 .LVL587: + 6782 .L306: +2844:Src/main.c **** + 6783 .loc 1 2844 2 is_stmt 1 view .LVU2179 +2844:Src/main.c **** + 6784 .loc 1 2844 17 is_stmt 0 view .LVU2180 + 6785 004a D0ED016A vldr.32 s13, [r0, #4] + 6786 .LVL588: +2846:Src/main.c **** e_integral = 32000; + 6787 .loc 1 2846 2 is_stmt 1 view .LVU2181 +2846:Src/main.c **** e_integral = 32000; + 6788 .loc 1 2846 5 is_stmt 0 view .LVU2182 + 6789 004e 9FED227A vldr.32 s14, .L316+12 + 6790 0052 F4EEC77A vcmpe.f32 s15, s14 + 6791 0056 F1EE10FA vmrs APSR_nzcv, FPSCR + ARM GAS /tmp/ccYgfTud.s page 494 - 5732 00c2 024B ldr r3, .L228 - 5733 00c4 1A68 ldr r2, [r3] - 5734 .LVL466: -2518:Src/main.c **** - 5735 .loc 1 2518 11 view .LVU1871 - 5736 00c6 024B ldr r3, .L228+4 - 5737 00c8 1A60 str r2, [r3] - 5738 00ca F7E7 b .L221 - 5739 .L229: - 5740 .align 2 - 5741 .L228: - 5742 00cc 00000000 .word TO7 - 5743 00d0 00000000 .word TO7_PID - 5744 00d4 0000C842 .word 1120403456 - 5745 00d8 0000FA46 .word 1190789120 - 5746 00dc 0000FAC6 .word -956694528 - 5747 00e0 00000047 .word 1191182336 - 5748 .cfi_endproc - 5749 .LFE1214: - 5751 .section .text.CalculateChecksum,"ax",%progbits - 5752 .align 1 - 5753 .global CalculateChecksum - 5754 .syntax unified - 5755 .thumb - 5756 .thumb_func - 5758 CalculateChecksum: - 5759 .LVL467: - 5760 .LFB1217: -2584:Src/main.c **** short i; - 5761 .loc 1 2584 1 is_stmt 1 view -0 - 5762 .cfi_startproc - 5763 @ args = 0, pretend = 0, frame = 0 - 5764 @ frame_needed = 0, uses_anonymous_args = 0 - 5765 @ link register save eliminated. -2584:Src/main.c **** short i; - 5766 .loc 1 2584 1 is_stmt 0 view .LVU1873 - 5767 0000 8446 mov ip, r0 -2585:Src/main.c **** uint16_t cs = *pbuff; - 5768 .loc 1 2585 2 is_stmt 1 view .LVU1874 -2586:Src/main.c **** - 5769 .loc 1 2586 2 view .LVU1875 -2586:Src/main.c **** - 5770 .loc 1 2586 11 is_stmt 0 view .LVU1876 - 5771 0002 0088 ldrh r0, [r0] - 5772 .LVL468: -2588:Src/main.c **** { - 5773 .loc 1 2588 3 is_stmt 1 view .LVU1877 -2588:Src/main.c **** { - 5774 .loc 1 2588 9 is_stmt 0 view .LVU1878 - 5775 0004 0123 movs r3, #1 -2588:Src/main.c **** { - 5776 .loc 1 2588 3 view .LVU1879 - 5777 0006 04E0 b .L231 - 5778 .LVL469: - 5779 .L232: -2590:Src/main.c **** } - 5780 .loc 1 2590 3 is_stmt 1 view .LVU1880 - ARM GAS /tmp/ccO46DoU.s page 465 + 6792 005a 09DC bgt .L310 +2849:Src/main.c **** e_integral = -32000; + 6793 .loc 1 2849 7 is_stmt 1 view .LVU2183 +2849:Src/main.c **** e_integral = -32000; + 6794 .loc 1 2849 10 is_stmt 0 view .LVU2184 + 6795 005c 9FED1F7A vldr.32 s14, .L316+16 + 6796 0060 F4EEC77A vcmpe.f32 s15, s14 + 6797 0064 F1EE10FA vmrs APSR_nzcv, FPSCR + 6798 0068 04D5 bpl .L307 +2850:Src/main.c **** } + 6799 .loc 1 2850 15 view .LVU2185 + 6800 006a DFED1C7A vldr.32 s15, .L316+16 + 6801 .LVL589: +2850:Src/main.c **** } + 6802 .loc 1 2850 15 view .LVU2186 + 6803 006e 01E0 b .L307 + 6804 .LVL590: + 6805 .L310: +2847:Src/main.c **** } + 6806 .loc 1 2847 15 view .LVU2187 + 6807 0070 DFED197A vldr.32 s15, .L316+12 + 6808 .LVL591: + 6809 .L307: +2852:Src/main.c **** + 6810 .loc 1 2852 2 is_stmt 1 view .LVU2188 +2852:Src/main.c **** + 6811 .loc 1 2852 26 is_stmt 0 view .LVU2189 + 6812 0074 C1ED017A vstr.32 s15, [r1, #4] +2854:Src/main.c **** + 6813 .loc 1 2854 2 is_stmt 1 view .LVU2190 +2854:Src/main.c **** + 6814 .loc 1 2854 36 is_stmt 0 view .LVU2191 + 6815 0078 07EE103A vmov s14, r3 @ int + 6816 007c B8EEC77A vcvt.f32.s32 s14, s14 + 6817 0080 27EE267A vmul.f32 s14, s14, s13 +2854:Src/main.c **** + 6818 .loc 1 2854 19 view .LVU2192 + 6819 0084 DFED166A vldr.32 s13, .L316+20 + 6820 .LVL592: +2854:Src/main.c **** + 6821 .loc 1 2854 19 view .LVU2193 + 6822 0088 37EE267A vadd.f32 s14, s14, s13 +2854:Src/main.c **** + 6823 .loc 1 2854 46 view .LVU2194 + 6824 008c FDEEE77A vcvt.s32.f32 s15, s15 + 6825 .LVL593: +2854:Src/main.c **** + 6826 .loc 1 2854 44 view .LVU2195 + 6827 0090 F8EEE77A vcvt.f32.s32 s15, s15 + 6828 0094 77EE877A vadd.f32 s15, s15, s14 +2854:Src/main.c **** + 6829 .loc 1 2854 11 view .LVU2196 + 6830 0098 FDEEE77A vcvt.s32.f32 s15, s15 + 6831 009c 17EE900A vmov r0, s15 @ int + 6832 .LVL594: +2856:Src/main.c **** x_output = 8800; + 6833 .loc 1 2856 2 is_stmt 1 view .LVU2197 + ARM GAS /tmp/ccYgfTud.s page 495 -2590:Src/main.c **** } - 5781 .loc 1 2590 9 is_stmt 0 view .LVU1881 - 5782 0008 3CF81320 ldrh r2, [ip, r3, lsl #1] -2590:Src/main.c **** } - 5783 .loc 1 2590 6 view .LVU1882 - 5784 000c 5040 eors r0, r0, r2 - 5785 .LVL470: -2588:Src/main.c **** { - 5786 .loc 1 2588 24 is_stmt 1 discriminator 3 view .LVU1883 - 5787 000e 0133 adds r3, r3, #1 - 5788 .LVL471: -2588:Src/main.c **** { - 5789 .loc 1 2588 24 is_stmt 0 discriminator 3 view .LVU1884 - 5790 0010 1BB2 sxth r3, r3 - 5791 .LVL472: - 5792 .L231: -2588:Src/main.c **** { - 5793 .loc 1 2588 16 is_stmt 1 discriminator 1 view .LVU1885 - 5794 0012 8B42 cmp r3, r1 - 5795 0014 F8DB blt .L232 -2592:Src/main.c **** } - 5796 .loc 1 2592 2 view .LVU1886 -2593:Src/main.c **** - 5797 .loc 1 2593 1 is_stmt 0 view .LVU1887 - 5798 0016 7047 bx lr - 5799 .cfi_endproc - 5800 .LFE1217: - 5802 .section .text.CheckChecksum,"ax",%progbits - 5803 .align 1 - 5804 .global CheckChecksum - 5805 .syntax unified - 5806 .thumb - 5807 .thumb_func - 5809 CheckChecksum: - 5810 .LVL473: - 5811 .LFB1216: -2563:Src/main.c **** uint16_t cl_ind; - 5812 .loc 1 2563 1 is_stmt 1 view -0 - 5813 .cfi_startproc - 5814 @ args = 0, pretend = 0, frame = 0 - 5815 @ frame_needed = 0, uses_anonymous_args = 0 -2563:Src/main.c **** uint16_t cl_ind; - 5816 .loc 1 2563 1 is_stmt 0 view .LVU1889 - 5817 0000 10B5 push {r4, lr} - 5818 .LCFI46: - 5819 .cfi_def_cfa_offset 8 - 5820 .cfi_offset 4, -8 - 5821 .cfi_offset 14, -4 -2564:Src/main.c **** - 5822 .loc 1 2564 3 is_stmt 1 view .LVU1890 -2566:Src/main.c **** { - 5823 .loc 1 2566 3 view .LVU1891 - 5824 0002 0E4B ldr r3, .L239 - 5825 0004 1B88 ldrh r3, [r3] - 5826 0006 41F21112 movw r2, #4369 - 5827 000a 9342 cmp r3, r2 - 5828 000c 05D0 beq .L236 - ARM GAS /tmp/ccO46DoU.s page 466 +2856:Src/main.c **** x_output = 8800; + 6834 .loc 1 2856 4 is_stmt 0 view .LVU2198 + 6835 00a0 B0F57A7F cmp r0, #1000 + 6836 00a4 06DB blt .L312 +2859:Src/main.c **** x_output = 56800; + 6837 .loc 1 2859 7 is_stmt 1 view .LVU2199 +2859:Src/main.c **** x_output = 56800; + 6838 .loc 1 2859 9 is_stmt 0 view .LVU2200 + 6839 00a6 4DF6E053 movw r3, #56800 + 6840 .LVL595: +2859:Src/main.c **** x_output = 56800; + 6841 .loc 1 2859 9 view .LVU2201 + 6842 00aa 9842 cmp r0, r3 + 6843 00ac 04DD ble .L308 +2860:Src/main.c **** } + 6844 .loc 1 2860 12 view .LVU2202 + 6845 00ae 4DF6E050 movw r0, #56800 + 6846 .LVL596: +2860:Src/main.c **** } + 6847 .loc 1 2860 12 view .LVU2203 + 6848 00b2 01E0 b .L308 + 6849 .LVL597: + 6850 .L312: +2857:Src/main.c **** } + 6851 .loc 1 2857 12 view .LVU2204 + 6852 00b4 42F26020 movw r0, #8800 + 6853 .LVL598: + 6854 .L308: +2863:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 6855 .loc 1 2863 2 is_stmt 1 view .LVU2205 +2863:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 6856 .loc 1 2863 5 is_stmt 0 view .LVU2206 + 6857 00b8 022A cmp r2, #2 + 6858 00ba 02D0 beq .L315 + 6859 .LVL599: + 6860 .L309: +2866:Src/main.c **** } + 6861 .loc 1 2866 2 is_stmt 1 view .LVU2207 +2867:Src/main.c **** + 6862 .loc 1 2867 1 is_stmt 0 view .LVU2208 + 6863 00bc 80B2 uxth r0, r0 + 6864 .LVL600: +2867:Src/main.c **** + 6865 .loc 1 2867 1 view .LVU2209 + 6866 00be 30BC pop {r4, r5} + 6867 .LCFI59: + 6868 .cfi_remember_state + 6869 .cfi_restore 5 + 6870 .cfi_restore 4 + 6871 .cfi_def_cfa_offset 0 + 6872 00c0 7047 bx lr + 6873 .LVL601: + 6874 .L315: + 6875 .LCFI60: + 6876 .cfi_restore_state +2864:Src/main.c **** + 6877 .loc 1 2864 3 is_stmt 1 view .LVU2210 + ARM GAS /tmp/ccYgfTud.s page 496 - 5829 000e 47F27772 movw r2, #30583 - 5830 0012 9342 cmp r3, r2 - 5831 0014 0FD1 bne .L237 - 5832 0016 0E24 movs r4, #14 - 5833 0018 00E0 b .L234 - 5834 .L236: -2572:Src/main.c **** break; - 5835 .loc 1 2572 14 is_stmt 0 view .LVU1892 - 5836 001a 0D24 movs r4, #13 - 5837 .L234: - 5838 .LVL474: -2576:Src/main.c **** } - 5839 .loc 1 2576 5 is_stmt 1 view .LVU1893 -2579:Src/main.c **** - 5840 .loc 1 2579 3 view .LVU1894 -2579:Src/main.c **** - 5841 .loc 1 2579 15 is_stmt 0 view .LVU1895 - 5842 001c 2146 mov r1, r4 - 5843 001e FFF7FEFF bl CalculateChecksum - 5844 .LVL475: -2579:Src/main.c **** - 5845 .loc 1 2579 13 discriminator 1 view .LVU1896 - 5846 0022 074B ldr r3, .L239+4 - 5847 0024 1880 strh r0, [r3] @ movhi -2581:Src/main.c **** } - 5848 .loc 1 2581 3 is_stmt 1 view .LVU1897 -2581:Src/main.c **** } - 5849 .loc 1 2581 32 is_stmt 0 view .LVU1898 - 5850 0026 074B ldr r3, .L239+8 - 5851 0028 33F81430 ldrh r3, [r3, r4, lsl #1] -2581:Src/main.c **** } - 5852 .loc 1 2581 46 view .LVU1899 - 5853 002c 9842 cmp r0, r3 - 5854 002e 14BF ite ne - 5855 0030 0020 movne r0, #0 - 5856 0032 0120 moveq r0, #1 - 5857 .LVL476: - 5858 .L235: -2582:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) - 5859 .loc 1 2582 1 view .LVU1900 - 5860 0034 10BD pop {r4, pc} - 5861 .LVL477: - 5862 .L237: -2566:Src/main.c **** { - 5863 .loc 1 2566 3 view .LVU1901 - 5864 0036 0020 movs r0, #0 - 5865 .LVL478: -2566:Src/main.c **** { - 5866 .loc 1 2566 3 view .LVU1902 - 5867 0038 FCE7 b .L235 - 5868 .L240: - 5869 003a 00BF .align 2 - 5870 .L239: - 5871 003c 00000000 .word UART_header - 5872 0040 00000000 .word CS_result - 5873 0044 00000000 .word COMMAND - 5874 .cfi_endproc - ARM GAS /tmp/ccO46DoU.s page 467 +2864:Src/main.c **** + 6878 .loc 1 2864 11 is_stmt 0 view .LVU2211 + 6879 00c2 024B ldr r3, .L316 + 6880 00c4 1A68 ldr r2, [r3] + 6881 .LVL602: +2864:Src/main.c **** + 6882 .loc 1 2864 11 view .LVU2212 + 6883 00c6 024B ldr r3, .L316+4 + 6884 00c8 1A60 str r2, [r3] + 6885 00ca F7E7 b .L309 + 6886 .L317: + 6887 .align 2 + 6888 .L316: + 6889 00cc 00000000 .word TO7 + 6890 00d0 00000000 .word TO7_PID + 6891 00d4 0000C842 .word 1120403456 + 6892 00d8 0000FA46 .word 1190789120 + 6893 00dc 0000FAC6 .word -956694528 + 6894 00e0 00000047 .word 1191182336 + 6895 .cfi_endproc + 6896 .LFE1220: + 6898 .section .text.CalculateChecksum,"ax",%progbits + 6899 .align 1 + 6900 .global CalculateChecksum + 6901 .syntax unified + 6902 .thumb + 6903 .thumb_func + 6905 CalculateChecksum: + 6906 .LVL603: + 6907 .LFB1223: +2930:Src/main.c **** short i; + 6908 .loc 1 2930 1 is_stmt 1 view -0 + 6909 .cfi_startproc + 6910 @ args = 0, pretend = 0, frame = 0 + 6911 @ frame_needed = 0, uses_anonymous_args = 0 + 6912 @ link register save eliminated. +2930:Src/main.c **** short i; + 6913 .loc 1 2930 1 is_stmt 0 view .LVU2214 + 6914 0000 8446 mov ip, r0 +2931:Src/main.c **** uint16_t cs = *pbuff; + 6915 .loc 1 2931 2 is_stmt 1 view .LVU2215 +2932:Src/main.c **** + 6916 .loc 1 2932 2 view .LVU2216 +2932:Src/main.c **** + 6917 .loc 1 2932 11 is_stmt 0 view .LVU2217 + 6918 0002 0088 ldrh r0, [r0] + 6919 .LVL604: +2934:Src/main.c **** { + 6920 .loc 1 2934 3 is_stmt 1 view .LVU2218 +2934:Src/main.c **** { + 6921 .loc 1 2934 9 is_stmt 0 view .LVU2219 + 6922 0004 0123 movs r3, #1 +2934:Src/main.c **** { + 6923 .loc 1 2934 3 view .LVU2220 + 6924 0006 04E0 b .L319 + 6925 .LVL605: + 6926 .L320: + ARM GAS /tmp/ccYgfTud.s page 497 - 5875 .LFE1216: - 5877 .section .rodata.SD_SAVE.str1.4,"aMS",%progbits,1 - 5878 .align 2 - 5879 .LC2: - 5880 0000 46494C45 .ascii "FILE1.TXT\000" - 5880 312E5458 - 5880 5400 - 5881 .section .text.SD_SAVE,"ax",%progbits - 5882 .align 1 - 5883 .global SD_SAVE - 5884 .syntax unified - 5885 .thumb - 5886 .thumb_func - 5888 SD_SAVE: - 5889 .LVL479: - 5890 .LFB1218: -2622:Src/main.c **** int test=0; - 5891 .loc 1 2622 1 is_stmt 1 view -0 - 5892 .cfi_startproc - 5893 @ args = 0, pretend = 0, frame = 0 - 5894 @ frame_needed = 0, uses_anonymous_args = 0 -2622:Src/main.c **** int test=0; - 5895 .loc 1 2622 1 is_stmt 0 view .LVU1904 - 5896 0000 10B5 push {r4, lr} - 5897 .LCFI47: - 5898 .cfi_def_cfa_offset 8 - 5899 .cfi_offset 4, -8 - 5900 .cfi_offset 14, -4 - 5901 0002 0446 mov r4, r0 -2623:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 5902 .loc 1 2623 2 is_stmt 1 view .LVU1905 - 5903 .LVL480: -2624:Src/main.c **** { - 5904 .loc 1 2624 2 view .LVU1906 -2624:Src/main.c **** { - 5905 .loc 1 2624 6 is_stmt 0 view .LVU1907 - 5906 0004 0121 movs r1, #1 - 5907 0006 0A48 ldr r0, .L248 - 5908 .LVL481: -2624:Src/main.c **** { - 5909 .loc 1 2624 6 view .LVU1908 - 5910 0008 FFF7FEFF bl HAL_GPIO_ReadPin - 5911 .LVL482: -2624:Src/main.c **** { - 5912 .loc 1 2624 5 discriminator 1 view .LVU1909 - 5913 000c 08B1 cbz r0, .L246 -2641:Src/main.c **** } - 5914 .loc 1 2641 10 view .LVU1910 - 5915 000e 0120 movs r0, #1 - 5916 .LVL483: - 5917 .L241: -2643:Src/main.c **** - 5918 .loc 1 2643 1 view .LVU1911 - 5919 0010 10BD pop {r4, pc} - 5920 .LVL484: - 5921 .L246: -2626:Src/main.c **** if (test == 0) //0 - suc - ARM GAS /tmp/ccO46DoU.s page 468 +2936:Src/main.c **** } + 6927 .loc 1 2936 3 is_stmt 1 view .LVU2221 +2936:Src/main.c **** } + 6928 .loc 1 2936 9 is_stmt 0 view .LVU2222 + 6929 0008 3CF81320 ldrh r2, [ip, r3, lsl #1] +2936:Src/main.c **** } + 6930 .loc 1 2936 6 view .LVU2223 + 6931 000c 5040 eors r0, r0, r2 + 6932 .LVL606: +2934:Src/main.c **** { + 6933 .loc 1 2934 24 is_stmt 1 discriminator 3 view .LVU2224 + 6934 000e 0133 adds r3, r3, #1 + 6935 .LVL607: +2934:Src/main.c **** { + 6936 .loc 1 2934 24 is_stmt 0 discriminator 3 view .LVU2225 + 6937 0010 1BB2 sxth r3, r3 + 6938 .LVL608: + 6939 .L319: +2934:Src/main.c **** { + 6940 .loc 1 2934 16 is_stmt 1 discriminator 1 view .LVU2226 + 6941 0012 8B42 cmp r3, r1 + 6942 0014 F8DB blt .L320 +2938:Src/main.c **** } + 6943 .loc 1 2938 2 view .LVU2227 +2939:Src/main.c **** + 6944 .loc 1 2939 1 is_stmt 0 view .LVU2228 + 6945 0016 7047 bx lr + 6946 .cfi_endproc + 6947 .LFE1223: + 6949 .section .text.CheckChecksum,"ax",%progbits + 6950 .align 1 + 6951 .global CheckChecksum + 6952 .syntax unified + 6953 .thumb + 6954 .thumb_func + 6956 CheckChecksum: + 6957 .LVL609: + 6958 .LFB1222: +2909:Src/main.c **** uint16_t cl_ind; + 6959 .loc 1 2909 1 is_stmt 1 view -0 + 6960 .cfi_startproc + 6961 @ args = 0, pretend = 0, frame = 0 + 6962 @ frame_needed = 0, uses_anonymous_args = 0 +2909:Src/main.c **** uint16_t cl_ind; + 6963 .loc 1 2909 1 is_stmt 0 view .LVU2230 + 6964 0000 10B5 push {r4, lr} + 6965 .LCFI61: + 6966 .cfi_def_cfa_offset 8 + 6967 .cfi_offset 4, -8 + 6968 .cfi_offset 14, -4 +2910:Src/main.c **** + 6969 .loc 1 2910 3 is_stmt 1 view .LVU2231 +2912:Src/main.c **** { + 6970 .loc 1 2912 3 view .LVU2232 + 6971 0002 0E4B ldr r3, .L327 + 6972 0004 1B88 ldrh r3, [r3] + 6973 0006 41F21112 movw r2, #4369 + ARM GAS /tmp/ccYgfTud.s page 498 - 5922 .loc 1 2626 3 is_stmt 1 view .LVU1912 -2626:Src/main.c **** if (test == 0) //0 - suc - 5923 .loc 1 2626 10 is_stmt 0 view .LVU1913 - 5924 0012 0848 ldr r0, .L248+4 - 5925 0014 FFF7FEFF bl Mount_SD - 5926 .LVL485: -2627:Src/main.c **** { - 5927 .loc 1 2627 3 is_stmt 1 view .LVU1914 -2627:Src/main.c **** { - 5928 .loc 1 2627 6 is_stmt 0 view .LVU1915 - 5929 0018 08B1 cbz r0, .L247 -2636:Src/main.c **** } - 5930 .loc 1 2636 11 view .LVU1916 - 5931 001a 0120 movs r0, #1 - 5932 .LVL486: -2636:Src/main.c **** } - 5933 .loc 1 2636 11 view .LVU1917 - 5934 001c F8E7 b .L241 - 5935 .LVL487: - 5936 .L247: -2630:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5937 .loc 1 2630 4 is_stmt 1 view .LVU1918 -2630:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5938 .loc 1 2630 11 is_stmt 0 view .LVU1919 - 5939 001e 1E22 movs r2, #30 - 5940 0020 2146 mov r1, r4 - 5941 0022 0548 ldr r0, .L248+8 - 5942 .LVL488: -2630:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5943 .loc 1 2630 11 view .LVU1920 - 5944 0024 FFF7FEFF bl Update_File_byte - 5945 .LVL489: -2631:Src/main.c **** return test; - 5946 .loc 1 2631 4 is_stmt 1 view .LVU1921 -2631:Src/main.c **** return test; - 5947 .loc 1 2631 11 is_stmt 0 view .LVU1922 - 5948 0028 0248 ldr r0, .L248+4 - 5949 002a FFF7FEFF bl Unmount_SD - 5950 .LVL490: -2632:Src/main.c **** } - 5951 .loc 1 2632 4 is_stmt 1 view .LVU1923 -2632:Src/main.c **** } - 5952 .loc 1 2632 11 is_stmt 0 view .LVU1924 - 5953 002e EFE7 b .L241 - 5954 .L249: - 5955 .align 2 - 5956 .L248: - 5957 0030 000C0240 .word 1073875968 - 5958 0034 00000000 .word .LC0 - 5959 0038 00000000 .word .LC2 - 5960 .cfi_endproc - 5961 .LFE1218: - 5963 .section .text.SD_READ,"ax",%progbits - 5964 .align 1 - 5965 .global SD_READ - 5966 .syntax unified - 5967 .thumb - ARM GAS /tmp/ccO46DoU.s page 469 + 6974 000a 9342 cmp r3, r2 + 6975 000c 05D0 beq .L324 + 6976 000e 47F27772 movw r2, #30583 + 6977 0012 9342 cmp r3, r2 + 6978 0014 0FD1 bne .L325 + 6979 0016 0E24 movs r4, #14 + 6980 0018 00E0 b .L322 + 6981 .L324: +2918:Src/main.c **** break; + 6982 .loc 1 2918 14 is_stmt 0 view .LVU2233 + 6983 001a 0D24 movs r4, #13 + 6984 .L322: + 6985 .LVL610: +2922:Src/main.c **** } + 6986 .loc 1 2922 5 is_stmt 1 view .LVU2234 +2925:Src/main.c **** + 6987 .loc 1 2925 3 view .LVU2235 +2925:Src/main.c **** + 6988 .loc 1 2925 15 is_stmt 0 view .LVU2236 + 6989 001c 2146 mov r1, r4 + 6990 001e FFF7FEFF bl CalculateChecksum + 6991 .LVL611: +2925:Src/main.c **** + 6992 .loc 1 2925 13 discriminator 1 view .LVU2237 + 6993 0022 074B ldr r3, .L327+4 + 6994 0024 1880 strh r0, [r3] @ movhi +2927:Src/main.c **** } + 6995 .loc 1 2927 3 is_stmt 1 view .LVU2238 +2927:Src/main.c **** } + 6996 .loc 1 2927 32 is_stmt 0 view .LVU2239 + 6997 0026 074B ldr r3, .L327+8 + 6998 0028 33F81430 ldrh r3, [r3, r4, lsl #1] +2927:Src/main.c **** } + 6999 .loc 1 2927 46 view .LVU2240 + 7000 002c 9842 cmp r0, r3 + 7001 002e 14BF ite ne + 7002 0030 0020 movne r0, #0 + 7003 0032 0120 moveq r0, #1 + 7004 .LVL612: + 7005 .L323: +2928:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) + 7006 .loc 1 2928 1 view .LVU2241 + 7007 0034 10BD pop {r4, pc} + 7008 .LVL613: + 7009 .L325: +2912:Src/main.c **** { + 7010 .loc 1 2912 3 view .LVU2242 + 7011 0036 0020 movs r0, #0 + 7012 .LVL614: +2912:Src/main.c **** { + 7013 .loc 1 2912 3 view .LVU2243 + 7014 0038 FCE7 b .L323 + 7015 .L328: + 7016 003a 00BF .align 2 + 7017 .L327: + 7018 003c 00000000 .word UART_header + 7019 0040 00000000 .word CS_result + ARM GAS /tmp/ccYgfTud.s page 499 - 5968 .thumb_func - 5970 SD_READ: - 5971 .LVL491: - 5972 .LFB1219: -2653:Src/main.c **** int test=0; - 5973 .loc 1 2653 1 is_stmt 1 view -0 - 5974 .cfi_startproc - 5975 @ args = 0, pretend = 0, frame = 0 - 5976 @ frame_needed = 0, uses_anonymous_args = 0 -2653:Src/main.c **** int test=0; - 5977 .loc 1 2653 1 is_stmt 0 view .LVU1926 - 5978 0000 38B5 push {r3, r4, r5, lr} - 5979 .LCFI48: - 5980 .cfi_def_cfa_offset 16 - 5981 .cfi_offset 3, -16 - 5982 .cfi_offset 4, -12 - 5983 .cfi_offset 5, -8 - 5984 .cfi_offset 14, -4 - 5985 0002 0446 mov r4, r0 -2654:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 5986 .loc 1 2654 2 is_stmt 1 view .LVU1927 - 5987 .LVL492: -2655:Src/main.c **** { - 5988 .loc 1 2655 2 view .LVU1928 -2655:Src/main.c **** { - 5989 .loc 1 2655 6 is_stmt 0 view .LVU1929 - 5990 0004 0121 movs r1, #1 - 5991 0006 0D48 ldr r0, .L257 - 5992 .LVL493: -2655:Src/main.c **** { - 5993 .loc 1 2655 6 view .LVU1930 - 5994 0008 FFF7FEFF bl HAL_GPIO_ReadPin - 5995 .LVL494: -2655:Src/main.c **** { - 5996 .loc 1 2655 5 discriminator 1 view .LVU1931 - 5997 000c 08B1 cbz r0, .L255 -2673:Src/main.c **** } - 5998 .loc 1 2673 10 view .LVU1932 - 5999 000e 0120 movs r0, #1 - 6000 .LVL495: - 6001 .L250: -2689:Src/main.c **** - 6002 .loc 1 2689 1 view .LVU1933 - 6003 0010 38BD pop {r3, r4, r5, pc} - 6004 .LVL496: - 6005 .L255: -2657:Src/main.c **** if (test == 0) //0 - suc - 6006 .loc 1 2657 3 is_stmt 1 view .LVU1934 -2657:Src/main.c **** if (test == 0) //0 - suc - 6007 .loc 1 2657 10 is_stmt 0 view .LVU1935 - 6008 0012 0B48 ldr r0, .L257+4 - 6009 0014 FFF7FEFF bl Mount_SD - 6010 .LVL497: -2658:Src/main.c **** { - 6011 .loc 1 2658 3 is_stmt 1 view .LVU1936 -2658:Src/main.c **** { - 6012 .loc 1 2658 6 is_stmt 0 view .LVU1937 - ARM GAS /tmp/ccO46DoU.s page 470 + 7020 0044 00000000 .word COMMAND + 7021 .cfi_endproc + 7022 .LFE1222: + 7024 .section .rodata.SD_SAVE.str1.4,"aMS",%progbits,1 + 7025 .align 2 + 7026 .LC2: + 7027 0000 46494C45 .ascii "FILE1.TXT\000" + 7027 312E5458 + 7027 5400 + 7028 .section .text.SD_SAVE,"ax",%progbits + 7029 .align 1 + 7030 .global SD_SAVE + 7031 .syntax unified + 7032 .thumb + 7033 .thumb_func + 7035 SD_SAVE: + 7036 .LVL615: + 7037 .LFB1224: +2968:Src/main.c **** int test=0; + 7038 .loc 1 2968 1 is_stmt 1 view -0 + 7039 .cfi_startproc + 7040 @ args = 0, pretend = 0, frame = 0 + 7041 @ frame_needed = 0, uses_anonymous_args = 0 +2968:Src/main.c **** int test=0; + 7042 .loc 1 2968 1 is_stmt 0 view .LVU2245 + 7043 0000 10B5 push {r4, lr} + 7044 .LCFI62: + 7045 .cfi_def_cfa_offset 8 + 7046 .cfi_offset 4, -8 + 7047 .cfi_offset 14, -4 + 7048 0002 0446 mov r4, r0 +2969:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 7049 .loc 1 2969 2 is_stmt 1 view .LVU2246 + 7050 .LVL616: +2970:Src/main.c **** { + 7051 .loc 1 2970 2 view .LVU2247 +2970:Src/main.c **** { + 7052 .loc 1 2970 6 is_stmt 0 view .LVU2248 + 7053 0004 0121 movs r1, #1 + 7054 0006 0A48 ldr r0, .L336 + 7055 .LVL617: +2970:Src/main.c **** { + 7056 .loc 1 2970 6 view .LVU2249 + 7057 0008 FFF7FEFF bl HAL_GPIO_ReadPin + 7058 .LVL618: +2970:Src/main.c **** { + 7059 .loc 1 2970 5 discriminator 1 view .LVU2250 + 7060 000c 08B1 cbz r0, .L334 +2987:Src/main.c **** } + 7061 .loc 1 2987 10 view .LVU2251 + 7062 000e 0120 movs r0, #1 + 7063 .LVL619: + 7064 .L329: +2989:Src/main.c **** + 7065 .loc 1 2989 1 view .LVU2252 + 7066 0010 10BD pop {r4, pc} + 7067 .LVL620: + ARM GAS /tmp/ccYgfTud.s page 500 - 6013 0018 08B1 cbz r0, .L256 -2668:Src/main.c **** } - 6014 .loc 1 2668 11 view .LVU1938 - 6015 001a 0120 movs r0, #1 - 6016 .LVL498: -2668:Src/main.c **** } - 6017 .loc 1 2668 11 view .LVU1939 - 6018 001c F8E7 b .L250 - 6019 .LVL499: - 6020 .L256: -2661:Src/main.c **** fgoto+=DL_8; - 6021 .loc 1 2661 4 is_stmt 1 view .LVU1940 -2661:Src/main.c **** fgoto+=DL_8; - 6022 .loc 1 2661 11 is_stmt 0 view .LVU1941 - 6023 001e 094D ldr r5, .L257+8 - 6024 0020 2B68 ldr r3, [r5] - 6025 0022 1E22 movs r2, #30 - 6026 0024 2146 mov r1, r4 - 6027 0026 0848 ldr r0, .L257+12 - 6028 .LVL500: -2661:Src/main.c **** fgoto+=DL_8; - 6029 .loc 1 2661 11 view .LVU1942 - 6030 0028 FFF7FEFF bl Seek_Read_File - 6031 .LVL501: -2662:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6032 .loc 1 2662 4 is_stmt 1 view .LVU1943 -2662:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6033 .loc 1 2662 9 is_stmt 0 view .LVU1944 - 6034 002c 2B68 ldr r3, [r5] - 6035 002e 1E33 adds r3, r3, #30 - 6036 0030 2B60 str r3, [r5] -2663:Src/main.c **** return test; - 6037 .loc 1 2663 4 is_stmt 1 view .LVU1945 -2663:Src/main.c **** return test; - 6038 .loc 1 2663 11 is_stmt 0 view .LVU1946 - 6039 0032 0348 ldr r0, .L257+4 - 6040 0034 FFF7FEFF bl Unmount_SD - 6041 .LVL502: -2664:Src/main.c **** } - 6042 .loc 1 2664 4 is_stmt 1 view .LVU1947 -2664:Src/main.c **** } - 6043 .loc 1 2664 11 is_stmt 0 view .LVU1948 - 6044 0038 EAE7 b .L250 - 6045 .L258: - 6046 003a 00BF .align 2 - 6047 .L257: - 6048 003c 000C0240 .word 1073875968 - 6049 0040 00000000 .word .LC0 - 6050 0044 00000000 .word fgoto - 6051 0048 00000000 .word .LC2 - 6052 .cfi_endproc - 6053 .LFE1219: - 6055 .section .text.SD_REMOVE,"ax",%progbits - 6056 .align 1 - 6057 .global SD_REMOVE - 6058 .syntax unified - 6059 .thumb - ARM GAS /tmp/ccO46DoU.s page 471 + 7068 .L334: +2972:Src/main.c **** if (test == 0) //0 - suc + 7069 .loc 1 2972 3 is_stmt 1 view .LVU2253 +2972:Src/main.c **** if (test == 0) //0 - suc + 7070 .loc 1 2972 10 is_stmt 0 view .LVU2254 + 7071 0012 0848 ldr r0, .L336+4 + 7072 0014 FFF7FEFF bl Mount_SD + 7073 .LVL621: +2973:Src/main.c **** { + 7074 .loc 1 2973 3 is_stmt 1 view .LVU2255 +2973:Src/main.c **** { + 7075 .loc 1 2973 6 is_stmt 0 view .LVU2256 + 7076 0018 08B1 cbz r0, .L335 +2982:Src/main.c **** } + 7077 .loc 1 2982 11 view .LVU2257 + 7078 001a 0120 movs r0, #1 + 7079 .LVL622: +2982:Src/main.c **** } + 7080 .loc 1 2982 11 view .LVU2258 + 7081 001c F8E7 b .L329 + 7082 .LVL623: + 7083 .L335: +2976:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7084 .loc 1 2976 4 is_stmt 1 view .LVU2259 +2976:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7085 .loc 1 2976 11 is_stmt 0 view .LVU2260 + 7086 001e 1E22 movs r2, #30 + 7087 0020 2146 mov r1, r4 + 7088 0022 0548 ldr r0, .L336+8 + 7089 .LVL624: +2976:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7090 .loc 1 2976 11 view .LVU2261 + 7091 0024 FFF7FEFF bl Update_File_byte + 7092 .LVL625: +2977:Src/main.c **** return test; + 7093 .loc 1 2977 4 is_stmt 1 view .LVU2262 +2977:Src/main.c **** return test; + 7094 .loc 1 2977 11 is_stmt 0 view .LVU2263 + 7095 0028 0248 ldr r0, .L336+4 + 7096 002a FFF7FEFF bl Unmount_SD + 7097 .LVL626: +2978:Src/main.c **** } + 7098 .loc 1 2978 4 is_stmt 1 view .LVU2264 +2978:Src/main.c **** } + 7099 .loc 1 2978 11 is_stmt 0 view .LVU2265 + 7100 002e EFE7 b .L329 + 7101 .L337: + 7102 .align 2 + 7103 .L336: + 7104 0030 000C0240 .word 1073875968 + 7105 0034 00000000 .word .LC0 + 7106 0038 00000000 .word .LC2 + 7107 .cfi_endproc + 7108 .LFE1224: + 7110 .section .text.SD_READ,"ax",%progbits + 7111 .align 1 + 7112 .global SD_READ + ARM GAS /tmp/ccYgfTud.s page 501 - 6060 .thumb_func - 6062 SD_REMOVE: - 6063 .LFB1220: -2692:Src/main.c **** int test=0; - 6064 .loc 1 2692 1 is_stmt 1 view -0 - 6065 .cfi_startproc - 6066 @ args = 0, pretend = 0, frame = 0 - 6067 @ frame_needed = 0, uses_anonymous_args = 0 - 6068 0000 10B5 push {r4, lr} - 6069 .LCFI49: - 6070 .cfi_def_cfa_offset 8 - 6071 .cfi_offset 4, -8 - 6072 .cfi_offset 14, -4 -2693:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 6073 .loc 1 2693 2 view .LVU1950 - 6074 .LVL503: -2694:Src/main.c **** { - 6075 .loc 1 2694 2 view .LVU1951 -2694:Src/main.c **** { - 6076 .loc 1 2694 6 is_stmt 0 view .LVU1952 - 6077 0002 0121 movs r1, #1 - 6078 0004 0B48 ldr r0, .L266 - 6079 0006 FFF7FEFF bl HAL_GPIO_ReadPin - 6080 .LVL504: -2694:Src/main.c **** { - 6081 .loc 1 2694 5 discriminator 1 view .LVU1953 - 6082 000a 08B1 cbz r0, .L264 -2712:Src/main.c **** } - 6083 .loc 1 2712 10 view .LVU1954 - 6084 000c 0120 movs r0, #1 - 6085 .LVL505: - 6086 .L259: -2714:Src/main.c **** - 6087 .loc 1 2714 1 view .LVU1955 - 6088 000e 10BD pop {r4, pc} - 6089 .LVL506: - 6090 .L264: -2696:Src/main.c **** if (test==FR_OK) - 6091 .loc 1 2696 3 is_stmt 1 view .LVU1956 -2696:Src/main.c **** if (test==FR_OK) - 6092 .loc 1 2696 10 is_stmt 0 view .LVU1957 - 6093 0010 0948 ldr r0, .L266+4 - 6094 0012 FFF7FEFF bl Mount_SD - 6095 .LVL507: -2697:Src/main.c **** { - 6096 .loc 1 2697 3 is_stmt 1 view .LVU1958 -2697:Src/main.c **** { - 6097 .loc 1 2697 6 is_stmt 0 view .LVU1959 - 6098 0016 08B1 cbz r0, .L265 -2707:Src/main.c **** } - 6099 .loc 1 2707 11 view .LVU1960 - 6100 0018 0120 movs r0, #1 - 6101 .LVL508: -2707:Src/main.c **** } - 6102 .loc 1 2707 11 view .LVU1961 - 6103 001a F8E7 b .L259 - 6104 .LVL509: - ARM GAS /tmp/ccO46DoU.s page 472 + 7113 .syntax unified + 7114 .thumb + 7115 .thumb_func + 7117 SD_READ: + 7118 .LVL627: + 7119 .LFB1225: +2999:Src/main.c **** int test=0; + 7120 .loc 1 2999 1 is_stmt 1 view -0 + 7121 .cfi_startproc + 7122 @ args = 0, pretend = 0, frame = 0 + 7123 @ frame_needed = 0, uses_anonymous_args = 0 +2999:Src/main.c **** int test=0; + 7124 .loc 1 2999 1 is_stmt 0 view .LVU2267 + 7125 0000 38B5 push {r3, r4, r5, lr} + 7126 .LCFI63: + 7127 .cfi_def_cfa_offset 16 + 7128 .cfi_offset 3, -16 + 7129 .cfi_offset 4, -12 + 7130 .cfi_offset 5, -8 + 7131 .cfi_offset 14, -4 + 7132 0002 0446 mov r4, r0 +3000:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 7133 .loc 1 3000 2 is_stmt 1 view .LVU2268 + 7134 .LVL628: +3001:Src/main.c **** { + 7135 .loc 1 3001 2 view .LVU2269 +3001:Src/main.c **** { + 7136 .loc 1 3001 6 is_stmt 0 view .LVU2270 + 7137 0004 0121 movs r1, #1 + 7138 0006 0D48 ldr r0, .L345 + 7139 .LVL629: +3001:Src/main.c **** { + 7140 .loc 1 3001 6 view .LVU2271 + 7141 0008 FFF7FEFF bl HAL_GPIO_ReadPin + 7142 .LVL630: +3001:Src/main.c **** { + 7143 .loc 1 3001 5 discriminator 1 view .LVU2272 + 7144 000c 08B1 cbz r0, .L343 +3019:Src/main.c **** } + 7145 .loc 1 3019 10 view .LVU2273 + 7146 000e 0120 movs r0, #1 + 7147 .LVL631: + 7148 .L338: +3035:Src/main.c **** + 7149 .loc 1 3035 1 view .LVU2274 + 7150 0010 38BD pop {r3, r4, r5, pc} + 7151 .LVL632: + 7152 .L343: +3003:Src/main.c **** if (test == 0) //0 - suc + 7153 .loc 1 3003 3 is_stmt 1 view .LVU2275 +3003:Src/main.c **** if (test == 0) //0 - suc + 7154 .loc 1 3003 10 is_stmt 0 view .LVU2276 + 7155 0012 0B48 ldr r0, .L345+4 + 7156 0014 FFF7FEFF bl Mount_SD + 7157 .LVL633: +3004:Src/main.c **** { + 7158 .loc 1 3004 3 is_stmt 1 view .LVU2277 + ARM GAS /tmp/ccYgfTud.s page 502 - 6105 .L265: -2699:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 6106 .loc 1 2699 4 is_stmt 1 view .LVU1962 -2699:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 6107 .loc 1 2699 11 is_stmt 0 view .LVU1963 - 6108 001c 074C ldr r4, .L266+8 - 6109 001e 2046 mov r0, r4 - 6110 .LVL510: -2699:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 6111 .loc 1 2699 11 view .LVU1964 - 6112 0020 FFF7FEFF bl Remove_File - 6113 .LVL511: -2700:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 6114 .loc 1 2700 4 is_stmt 1 view .LVU1965 -2700:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 6115 .loc 1 2700 11 is_stmt 0 view .LVU1966 - 6116 0024 2046 mov r0, r4 - 6117 0026 FFF7FEFF bl Create_File - 6118 .LVL512: -2702:Src/main.c **** return test; - 6119 .loc 1 2702 4 is_stmt 1 view .LVU1967 -2702:Src/main.c **** return test; - 6120 .loc 1 2702 11 is_stmt 0 view .LVU1968 - 6121 002a 0348 ldr r0, .L266+4 - 6122 002c FFF7FEFF bl Unmount_SD - 6123 .LVL513: -2703:Src/main.c **** } - 6124 .loc 1 2703 4 is_stmt 1 view .LVU1969 -2703:Src/main.c **** } - 6125 .loc 1 2703 11 is_stmt 0 view .LVU1970 - 6126 0030 EDE7 b .L259 - 6127 .L267: - 6128 0032 00BF .align 2 - 6129 .L266: - 6130 0034 000C0240 .word 1073875968 - 6131 0038 00000000 .word .LC0 - 6132 003c 00000000 .word .LC2 - 6133 .cfi_endproc - 6134 .LFE1220: - 6136 .section .text.USART_TX,"ax",%progbits - 6137 .align 1 - 6138 .global USART_TX - 6139 .syntax unified - 6140 .thumb - 6141 .thumb_func - 6143 USART_TX: - 6144 .LVL514: - 6145 .LFB1221: -2718:Src/main.c **** uint16_t ind = 0; - 6146 .loc 1 2718 1 is_stmt 1 view -0 - 6147 .cfi_startproc - 6148 @ args = 0, pretend = 0, frame = 0 - 6149 @ frame_needed = 0, uses_anonymous_args = 0 - 6150 @ link register save eliminated. -2718:Src/main.c **** uint16_t ind = 0; - 6151 .loc 1 2718 1 is_stmt 0 view .LVU1972 - 6152 0000 8C46 mov ip, r1 - ARM GAS /tmp/ccO46DoU.s page 473 +3004:Src/main.c **** { + 7159 .loc 1 3004 6 is_stmt 0 view .LVU2278 + 7160 0018 08B1 cbz r0, .L344 +3014:Src/main.c **** } + 7161 .loc 1 3014 11 view .LVU2279 + 7162 001a 0120 movs r0, #1 + 7163 .LVL634: +3014:Src/main.c **** } + 7164 .loc 1 3014 11 view .LVU2280 + 7165 001c F8E7 b .L338 + 7166 .LVL635: + 7167 .L344: +3007:Src/main.c **** fgoto+=DL_8; + 7168 .loc 1 3007 4 is_stmt 1 view .LVU2281 +3007:Src/main.c **** fgoto+=DL_8; + 7169 .loc 1 3007 11 is_stmt 0 view .LVU2282 + 7170 001e 094D ldr r5, .L345+8 + 7171 0020 2B68 ldr r3, [r5] + 7172 0022 1E22 movs r2, #30 + 7173 0024 2146 mov r1, r4 + 7174 0026 0848 ldr r0, .L345+12 + 7175 .LVL636: +3007:Src/main.c **** fgoto+=DL_8; + 7176 .loc 1 3007 11 view .LVU2283 + 7177 0028 FFF7FEFF bl Seek_Read_File + 7178 .LVL637: +3008:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7179 .loc 1 3008 4 is_stmt 1 view .LVU2284 +3008:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7180 .loc 1 3008 9 is_stmt 0 view .LVU2285 + 7181 002c 2B68 ldr r3, [r5] + 7182 002e 1E33 adds r3, r3, #30 + 7183 0030 2B60 str r3, [r5] +3009:Src/main.c **** return test; + 7184 .loc 1 3009 4 is_stmt 1 view .LVU2286 +3009:Src/main.c **** return test; + 7185 .loc 1 3009 11 is_stmt 0 view .LVU2287 + 7186 0032 0348 ldr r0, .L345+4 + 7187 0034 FFF7FEFF bl Unmount_SD + 7188 .LVL638: +3010:Src/main.c **** } + 7189 .loc 1 3010 4 is_stmt 1 view .LVU2288 +3010:Src/main.c **** } + 7190 .loc 1 3010 11 is_stmt 0 view .LVU2289 + 7191 0038 EAE7 b .L338 + 7192 .L346: + 7193 003a 00BF .align 2 + 7194 .L345: + 7195 003c 000C0240 .word 1073875968 + 7196 0040 00000000 .word .LC0 + 7197 0044 00000000 .word fgoto + 7198 0048 00000000 .word .LC2 + 7199 .cfi_endproc + 7200 .LFE1225: + 7202 .section .text.SD_REMOVE,"ax",%progbits + 7203 .align 1 + 7204 .global SD_REMOVE + ARM GAS /tmp/ccYgfTud.s page 503 -2719:Src/main.c **** while (indTDR = Value; - 6194 .loc 7 3683 3 view .LVU1988 - 6195 .loc 7 3683 15 is_stmt 0 view .LVU1989 - 6196 0018 034B ldr r3, .L273 - 6197 001a 9962 str r1, [r3, #40] - 6198 .LVL520: - 6199 .loc 7 3683 15 view .LVU1990 - 6200 .LBE504: - 6201 .LBE503: -2724:Src/main.c **** } - 6202 .loc 1 2724 5 is_stmt 1 view .LVU1991 -2724:Src/main.c **** } - 6203 .loc 1 2724 8 is_stmt 0 view .LVU1992 - 6204 001c 0132 adds r2, r2, #1 - 6205 .LVL521: -2724:Src/main.c **** } - 6206 .loc 1 2724 8 view .LVU1993 - 6207 001e 92B2 uxth r2, r2 - 6208 .LVL522: - 6209 .L269: -2720:Src/main.c **** { - 6210 .loc 1 2720 13 is_stmt 1 view .LVU1994 - 6211 0020 6245 cmp r2, ip - 6212 0022 F1D3 bcc .L271 -2726:Src/main.c **** - 6213 .loc 1 2726 1 is_stmt 0 view .LVU1995 - 6214 0024 7047 bx lr - 6215 .L274: - 6216 0026 00BF .align 2 - 6217 .L273: - 6218 0028 00100140 .word 1073811456 - 6219 .cfi_endproc - 6220 .LFE1221: - 6222 .section .text.USART_TX_DMA,"ax",%progbits - 6223 .align 1 - 6224 .global USART_TX_DMA - 6225 .syntax unified - 6226 .thumb - 6227 .thumb_func - 6229 USART_TX_DMA: - 6230 .LFB1222: -2729:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter - 6231 .loc 1 2729 1 is_stmt 1 view -0 - 6232 .cfi_startproc - 6233 @ args = 0, pretend = 0, frame = 0 - 6234 @ frame_needed = 0, uses_anonymous_args = 0 - 6235 @ link register save eliminated. - 6236 .LVL523: - 6237 .L276: - ARM GAS /tmp/ccO46DoU.s page 477 + 7341 .loc 7 3683 3 view .LVU2329 + 7342 .loc 7 3683 15 is_stmt 0 view .LVU2330 + 7343 0018 034B ldr r3, .L361 + 7344 001a 9962 str r1, [r3, #40] + 7345 .LVL656: + 7346 .loc 7 3683 15 view .LVU2331 + 7347 .LBE577: + 7348 .LBE576: +3070:Src/main.c **** } + 7349 .loc 1 3070 5 is_stmt 1 view .LVU2332 +3070:Src/main.c **** } + 7350 .loc 1 3070 8 is_stmt 0 view .LVU2333 + 7351 001c 0132 adds r2, r2, #1 + 7352 .LVL657: +3070:Src/main.c **** } + 7353 .loc 1 3070 8 view .LVU2334 + 7354 001e 92B2 uxth r2, r2 + 7355 .LVL658: + 7356 .L357: +3066:Src/main.c **** { + 7357 .loc 1 3066 13 is_stmt 1 view .LVU2335 + 7358 0020 6245 cmp r2, ip + 7359 0022 F1D3 bcc .L359 +3072:Src/main.c **** + 7360 .loc 1 3072 1 is_stmt 0 view .LVU2336 + 7361 0024 7047 bx lr + 7362 .L362: + 7363 0026 00BF .align 2 + 7364 .L361: + 7365 0028 00100140 .word 1073811456 + 7366 .cfi_endproc + 7367 .LFE1227: + 7369 .section .text.USART_TX_DMA,"ax",%progbits + 7370 .align 1 + 7371 .global USART_TX_DMA + 7372 .syntax unified + 7373 .thumb + 7374 .thumb_func + 7376 USART_TX_DMA: + 7377 .LFB1228: +3075:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter + 7378 .loc 1 3075 1 is_stmt 1 view -0 + 7379 .cfi_startproc + 7380 @ args = 0, pretend = 0, frame = 0 + 7381 @ frame_needed = 0, uses_anonymous_args = 0 + 7382 @ link register save eliminated. + ARM GAS /tmp/ccYgfTud.s page 509 -2730:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); - 6238 .loc 1 2730 20 discriminator 1 view .LVU1997 -2730:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); - 6239 .loc 1 2730 9 discriminator 1 view .LVU1998 - 6240 0000 0D4B ldr r3, .L277 - 6241 0002 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 6242 0004 002B cmp r3, #0 - 6243 0006 FBD1 bne .L276 -2731:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz); - 6244 .loc 1 2731 2 view .LVU1999 - 6245 .LVL524: - 6246 .LBB505: - 6247 .LBI505: + 7383 .LVL659: + 7384 .L364: +3076:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); + 7385 .loc 1 3076 20 discriminator 1 view .LVU2338 +3076:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); + 7386 .loc 1 3076 9 discriminator 1 view .LVU2339 + 7387 0000 0D4B ldr r3, .L365 + 7388 0002 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 7389 0004 002B cmp r3, #0 + 7390 0006 FBD1 bne .L364 +3077:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz); + 7391 .loc 1 3077 2 view .LVU2340 + 7392 .LVL660: + 7393 .LBB578: + 7394 .LBI578: 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6248 .loc 6 517 22 view .LVU2000 - 6249 .LBB506: + 7395 .loc 6 517 22 view .LVU2341 + 7396 .LBB579: 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6250 .loc 6 519 3 view .LVU2001 - 6251 0008 0C4B ldr r3, .L277+4 - 6252 000a D3F8B820 ldr r2, [r3, #184] - 6253 000e 22F00102 bic r2, r2, #1 - 6254 0012 C3F8B820 str r2, [r3, #184] - 6255 .LVL525: + 7397 .loc 6 519 3 view .LVU2342 + 7398 0008 0C4B ldr r3, .L365+4 + 7399 000a D3F8B820 ldr r2, [r3, #184] + 7400 000e 22F00102 bic r2, r2, #1 + 7401 0012 C3F8B820 str r2, [r3, #184] + 7402 .LVL661: 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6256 .loc 6 519 3 is_stmt 0 view .LVU2002 - 6257 .LBE506: - 6258 .LBE505: -2732:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7); - 6259 .loc 1 2732 3 is_stmt 1 view .LVU2003 - 6260 .LBB507: - 6261 .LBI507: + 7403 .loc 6 519 3 is_stmt 0 view .LVU2343 + 7404 .LBE579: + 7405 .LBE578: +3078:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7); + 7406 .loc 1 3078 3 is_stmt 1 view .LVU2344 + 7407 .LBB580: + 7408 .LBI580: 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6262 .loc 6 971 22 view .LVU2004 - 6263 .LBB508: + 7409 .loc 6 971 22 view .LVU2345 + 7410 .LBB581: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6264 .loc 6 973 3 view .LVU2005 - 6265 0016 D3F8BC20 ldr r2, [r3, #188] - 6266 001a 6FF30F02 bfc r2, #0, #16 - 6267 001e 1043 orrs r0, r0, r2 - 6268 .LVL526: + 7411 .loc 6 973 3 view .LVU2346 + 7412 0016 D3F8BC20 ldr r2, [r3, #188] + 7413 001a 6FF30F02 bfc r2, #0, #16 + 7414 001e 1043 orrs r0, r0, r2 + 7415 .LVL662: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6269 .loc 6 973 3 is_stmt 0 view .LVU2006 - 6270 0020 C3F8BC00 str r0, [r3, #188] - 6271 .LVL527: + 7416 .loc 6 973 3 is_stmt 0 view .LVU2347 + 7417 0020 C3F8BC00 str r0, [r3, #188] + 7418 .LVL663: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6272 .loc 6 973 3 view .LVU2007 - 6273 .LBE508: - 6274 .LBE507: -2733:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin - 6275 .loc 1 2733 3 is_stmt 1 view .LVU2008 - 6276 .LBB509: - 6277 .LBI509: + 7419 .loc 6 973 3 view .LVU2348 + 7420 .LBE581: + 7421 .LBE580: +3079:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin + 7422 .loc 1 3079 3 is_stmt 1 view .LVU2349 + 7423 .LBB582: + 7424 .LBI582: 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6278 .loc 6 497 22 view .LVU2009 - 6279 .LBB510: - 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6280 .loc 6 499 3 view .LVU2010 - ARM GAS /tmp/ccO46DoU.s page 478 + 7425 .loc 6 497 22 view .LVU2350 + 7426 .LBB583: + ARM GAS /tmp/ccYgfTud.s page 510 - 6281 0024 D3F8B820 ldr r2, [r3, #184] - 6282 0028 42F00102 orr r2, r2, #1 - 6283 002c C3F8B820 str r2, [r3, #184] - 6284 .LVL528: 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6285 .loc 6 499 3 is_stmt 0 view .LVU2011 - 6286 .LBE510: - 6287 .LBE509: -2734:Src/main.c **** } - 6288 .loc 1 2734 2 is_stmt 1 view .LVU2012 -2734:Src/main.c **** } - 6289 .loc 1 2734 11 is_stmt 0 view .LVU2013 - 6290 0030 014B ldr r3, .L277 - 6291 0032 0122 movs r2, #1 - 6292 0034 1A70 strb r2, [r3] -2735:Src/main.c **** - 6293 .loc 1 2735 1 view .LVU2014 - 6294 0036 7047 bx lr - 6295 .L278: - 6296 .align 2 - 6297 .L277: - 6298 0038 00000000 .word u_tx_flg - 6299 003c 00640240 .word 1073898496 - 6300 .cfi_endproc - 6301 .LFE1222: - 6303 .section .text.Error_Handler,"ax",%progbits - 6304 .align 1 - 6305 .global Error_Handler - 6306 .syntax unified - 6307 .thumb - 6308 .thumb_func - 6310 Error_Handler: - 6311 .LFB1224: -2743:Src/main.c **** //------------------------------------------------------- -2744:Src/main.c **** /* USER CODE END 4 */ -2745:Src/main.c **** -2746:Src/main.c **** /** -2747:Src/main.c **** * @brief This function is executed in case of error occurrence. -2748:Src/main.c **** * @retval None -2749:Src/main.c **** */ -2750:Src/main.c **** void Error_Handler(void) -2751:Src/main.c **** { - 6312 .loc 1 2751 1 is_stmt 1 view -0 - 6313 .cfi_startproc - 6314 @ Volatile: function does not return. - 6315 @ args = 0, pretend = 0, frame = 0 - 6316 @ frame_needed = 0, uses_anonymous_args = 0 - 6317 @ link register save eliminated. -2752:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ -2753:Src/main.c **** /* User can add his own implementation to report the HAL error return state */ -2754:Src/main.c **** __disable_irq(); - 6318 .loc 1 2754 3 view .LVU2016 - 6319 .LBB511: - 6320 .LBI511: + 7427 .loc 6 499 3 view .LVU2351 + 7428 0024 D3F8B820 ldr r2, [r3, #184] + 7429 0028 42F00102 orr r2, r2, #1 + 7430 002c C3F8B820 str r2, [r3, #184] + 7431 .LVL664: + 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 7432 .loc 6 499 3 is_stmt 0 view .LVU2352 + 7433 .LBE583: + 7434 .LBE582: +3080:Src/main.c **** } + 7435 .loc 1 3080 2 is_stmt 1 view .LVU2353 +3080:Src/main.c **** } + 7436 .loc 1 3080 11 is_stmt 0 view .LVU2354 + 7437 0030 014B ldr r3, .L365 + 7438 0032 0122 movs r2, #1 + 7439 0034 1A70 strb r2, [r3] +3081:Src/main.c **** + 7440 .loc 1 3081 1 view .LVU2355 + 7441 0036 7047 bx lr + 7442 .L366: + 7443 .align 2 + 7444 .L365: + 7445 0038 00000000 .word u_tx_flg + 7446 003c 00640240 .word 1073898496 + 7447 .cfi_endproc + 7448 .LFE1228: + 7450 .section .text.Error_Handler,"ax",%progbits + 7451 .align 1 + 7452 .global Error_Handler + 7453 .syntax unified + 7454 .thumb + 7455 .thumb_func + 7457 Error_Handler: + 7458 .LFB1230: +3089:Src/main.c **** //------------------------------------------------------- +3090:Src/main.c **** /* USER CODE END 4 */ +3091:Src/main.c **** +3092:Src/main.c **** /** +3093:Src/main.c **** * @brief This function is executed in case of error occurrence. +3094:Src/main.c **** * @retval None +3095:Src/main.c **** */ +3096:Src/main.c **** void Error_Handler(void) +3097:Src/main.c **** { + 7459 .loc 1 3097 1 is_stmt 1 view -0 + 7460 .cfi_startproc + 7461 @ Volatile: function does not return. + 7462 @ args = 0, pretend = 0, frame = 0 + 7463 @ frame_needed = 0, uses_anonymous_args = 0 + 7464 @ link register save eliminated. +3098:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ +3099:Src/main.c **** /* User can add his own implementation to report the HAL error return state */ +3100:Src/main.c **** __disable_irq(); + 7465 .loc 1 3100 3 view .LVU2357 + 7466 .LBB584: + 7467 .LBI584: 140:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 6321 .loc 8 140 27 view .LVU2017 - 6322 .LBB512: - ARM GAS /tmp/ccO46DoU.s page 479 + ARM GAS /tmp/ccYgfTud.s page 511 + 7468 .loc 8 140 27 view .LVU2358 + 7469 .LBB585: 142:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 6323 .loc 8 142 3 view .LVU2018 - 6324 .syntax unified - 6325 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 6326 0000 72B6 cpsid i - 6327 @ 0 "" 2 - 6328 .thumb - 6329 .syntax unified - 6330 .L280: - 6331 .LBE512: - 6332 .LBE511: -2755:Src/main.c **** while (1) - 6333 .loc 1 2755 3 view .LVU2019 -2756:Src/main.c **** { -2757:Src/main.c **** } - 6334 .loc 1 2757 3 view .LVU2020 -2755:Src/main.c **** while (1) - 6335 .loc 1 2755 9 view .LVU2021 - 6336 0002 FEE7 b .L280 - 6337 .cfi_endproc - 6338 .LFE1224: - 6340 .section .text.MX_ADC1_Init,"ax",%progbits - 6341 .align 1 - 6342 .syntax unified - 6343 .thumb - 6344 .thumb_func - 6346 MX_ADC1_Init: - 6347 .LFB1188: - 817:Src/main.c **** - 6348 .loc 1 817 1 view -0 - 6349 .cfi_startproc - 6350 @ args = 0, pretend = 0, frame = 16 - 6351 @ frame_needed = 0, uses_anonymous_args = 0 - 6352 0000 00B5 push {lr} - 6353 .LCFI50: - 6354 .cfi_def_cfa_offset 4 - 6355 .cfi_offset 14, -4 - 6356 0002 85B0 sub sp, sp, #20 - 6357 .LCFI51: - 6358 .cfi_def_cfa_offset 24 - 823:Src/main.c **** - 6359 .loc 1 823 3 view .LVU2023 - 823:Src/main.c **** - 6360 .loc 1 823 26 is_stmt 0 view .LVU2024 - 6361 0004 0023 movs r3, #0 - 6362 0006 0093 str r3, [sp] - 6363 0008 0193 str r3, [sp, #4] - 6364 000a 0293 str r3, [sp, #8] - 6365 000c 0393 str r3, [sp, #12] - 831:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 6366 .loc 1 831 3 is_stmt 1 view .LVU2025 - 831:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 6367 .loc 1 831 18 is_stmt 0 view .LVU2026 - 6368 000e 2B48 ldr r0, .L295 - 6369 0010 2B4A ldr r2, .L295+4 - 6370 0012 0260 str r2, [r0] - 832:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - ARM GAS /tmp/ccO46DoU.s page 480 + 7470 .loc 8 142 3 view .LVU2359 + 7471 .syntax unified + 7472 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7473 0000 72B6 cpsid i + 7474 @ 0 "" 2 + 7475 .thumb + 7476 .syntax unified + 7477 .L368: + 7478 .LBE585: + 7479 .LBE584: +3101:Src/main.c **** while (1) + 7480 .loc 1 3101 3 view .LVU2360 +3102:Src/main.c **** { +3103:Src/main.c **** } + 7481 .loc 1 3103 3 view .LVU2361 +3101:Src/main.c **** while (1) + 7482 .loc 1 3101 9 view .LVU2362 + 7483 0002 FEE7 b .L368 + 7484 .cfi_endproc + 7485 .LFE1230: + 7487 .section .text.MX_ADC1_Init,"ax",%progbits + 7488 .align 1 + 7489 .syntax unified + 7490 .thumb + 7491 .thumb_func + 7493 MX_ADC1_Init: + 7494 .LFB1188: + 939:Src/main.c **** + 7495 .loc 1 939 1 view -0 + 7496 .cfi_startproc + 7497 @ args = 0, pretend = 0, frame = 16 + 7498 @ frame_needed = 0, uses_anonymous_args = 0 + 7499 0000 00B5 push {lr} + 7500 .LCFI65: + 7501 .cfi_def_cfa_offset 4 + 7502 .cfi_offset 14, -4 + 7503 0002 85B0 sub sp, sp, #20 + 7504 .LCFI66: + 7505 .cfi_def_cfa_offset 24 + 945:Src/main.c **** + 7506 .loc 1 945 3 view .LVU2364 + 945:Src/main.c **** + 7507 .loc 1 945 26 is_stmt 0 view .LVU2365 + 7508 0004 0023 movs r3, #0 + 7509 0006 0093 str r3, [sp] + 7510 0008 0193 str r3, [sp, #4] + 7511 000a 0293 str r3, [sp, #8] + 7512 000c 0393 str r3, [sp, #12] + 953:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 7513 .loc 1 953 3 is_stmt 1 view .LVU2366 + 953:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 7514 .loc 1 953 18 is_stmt 0 view .LVU2367 + 7515 000e 2B48 ldr r0, .L383 + 7516 0010 2B4A ldr r2, .L383+4 + ARM GAS /tmp/ccYgfTud.s page 512 - 6371 .loc 1 832 3 is_stmt 1 view .LVU2027 - 832:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 6372 .loc 1 832 29 is_stmt 0 view .LVU2028 - 6373 0014 4FF44032 mov r2, #196608 - 6374 0018 4260 str r2, [r0, #4] - 833:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 6375 .loc 1 833 3 is_stmt 1 view .LVU2029 - 833:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 6376 .loc 1 833 25 is_stmt 0 view .LVU2030 - 6377 001a 8360 str r3, [r0, #8] - 834:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 6378 .loc 1 834 3 is_stmt 1 view .LVU2031 - 834:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 6379 .loc 1 834 27 is_stmt 0 view .LVU2032 - 6380 001c 0122 movs r2, #1 - 6381 001e 0261 str r2, [r0, #16] - 835:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 6382 .loc 1 835 3 is_stmt 1 view .LVU2033 - 835:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 6383 .loc 1 835 33 is_stmt 0 view .LVU2034 - 6384 0020 8361 str r3, [r0, #24] - 836:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 6385 .loc 1 836 3 is_stmt 1 view .LVU2035 - 836:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 6386 .loc 1 836 36 is_stmt 0 view .LVU2036 - 6387 0022 80F82030 strb r3, [r0, #32] - 837:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 6388 .loc 1 837 3 is_stmt 1 view .LVU2037 - 837:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 6389 .loc 1 837 35 is_stmt 0 view .LVU2038 - 6390 0026 C362 str r3, [r0, #44] - 838:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 6391 .loc 1 838 3 is_stmt 1 view .LVU2039 - 838:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 6392 .loc 1 838 31 is_stmt 0 view .LVU2040 - 6393 0028 2649 ldr r1, .L295+8 - 6394 002a 8162 str r1, [r0, #40] - 839:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 6395 .loc 1 839 3 is_stmt 1 view .LVU2041 - 839:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 6396 .loc 1 839 24 is_stmt 0 view .LVU2042 - 6397 002c C360 str r3, [r0, #12] - 840:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 6398 .loc 1 840 3 is_stmt 1 view .LVU2043 - 840:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 6399 .loc 1 840 30 is_stmt 0 view .LVU2044 - 6400 002e 0521 movs r1, #5 - 6401 0030 C161 str r1, [r0, #28] - 841:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 6402 .loc 1 841 3 is_stmt 1 view .LVU2045 - 841:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 6403 .loc 1 841 36 is_stmt 0 view .LVU2046 - 6404 0032 80F83030 strb r3, [r0, #48] - 842:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 6405 .loc 1 842 3 is_stmt 1 view .LVU2047 - 842:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 6406 .loc 1 842 27 is_stmt 0 view .LVU2048 - ARM GAS /tmp/ccO46DoU.s page 481 + 7517 0012 0260 str r2, [r0] + 954:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 7518 .loc 1 954 3 is_stmt 1 view .LVU2368 + 954:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 7519 .loc 1 954 29 is_stmt 0 view .LVU2369 + 7520 0014 4FF44032 mov r2, #196608 + 7521 0018 4260 str r2, [r0, #4] + 955:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 7522 .loc 1 955 3 is_stmt 1 view .LVU2370 + 955:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 7523 .loc 1 955 25 is_stmt 0 view .LVU2371 + 7524 001a 8360 str r3, [r0, #8] + 956:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 7525 .loc 1 956 3 is_stmt 1 view .LVU2372 + 956:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 7526 .loc 1 956 27 is_stmt 0 view .LVU2373 + 7527 001c 0122 movs r2, #1 + 7528 001e 0261 str r2, [r0, #16] + 957:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 7529 .loc 1 957 3 is_stmt 1 view .LVU2374 + 957:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 7530 .loc 1 957 33 is_stmt 0 view .LVU2375 + 7531 0020 8361 str r3, [r0, #24] + 958:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 7532 .loc 1 958 3 is_stmt 1 view .LVU2376 + 958:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 7533 .loc 1 958 36 is_stmt 0 view .LVU2377 + 7534 0022 80F82030 strb r3, [r0, #32] + 959:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 7535 .loc 1 959 3 is_stmt 1 view .LVU2378 + 959:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 7536 .loc 1 959 35 is_stmt 0 view .LVU2379 + 7537 0026 C362 str r3, [r0, #44] + 960:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 7538 .loc 1 960 3 is_stmt 1 view .LVU2380 + 960:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 7539 .loc 1 960 31 is_stmt 0 view .LVU2381 + 7540 0028 2649 ldr r1, .L383+8 + 7541 002a 8162 str r1, [r0, #40] + 961:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 7542 .loc 1 961 3 is_stmt 1 view .LVU2382 + 961:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 7543 .loc 1 961 24 is_stmt 0 view .LVU2383 + 7544 002c C360 str r3, [r0, #12] + 962:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 7545 .loc 1 962 3 is_stmt 1 view .LVU2384 + 962:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 7546 .loc 1 962 30 is_stmt 0 view .LVU2385 + 7547 002e 0521 movs r1, #5 + 7548 0030 C161 str r1, [r0, #28] + 963:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 7549 .loc 1 963 3 is_stmt 1 view .LVU2386 + 963:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 7550 .loc 1 963 36 is_stmt 0 view .LVU2387 + 7551 0032 80F83030 strb r3, [r0, #48] + 964:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 7552 .loc 1 964 3 is_stmt 1 view .LVU2388 + ARM GAS /tmp/ccYgfTud.s page 513 - 6407 0036 4261 str r2, [r0, #20] - 843:Src/main.c **** { - 6408 .loc 1 843 3 is_stmt 1 view .LVU2049 - 843:Src/main.c **** { - 6409 .loc 1 843 7 is_stmt 0 view .LVU2050 - 6410 0038 FFF7FEFF bl HAL_ADC_Init - 6411 .LVL529: - 843:Src/main.c **** { - 6412 .loc 1 843 6 discriminator 1 view .LVU2051 - 6413 003c 0028 cmp r0, #0 - 6414 003e 31D1 bne .L289 - 850:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 6415 .loc 1 850 3 is_stmt 1 view .LVU2052 - 850:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 6416 .loc 1 850 19 is_stmt 0 view .LVU2053 - 6417 0040 0923 movs r3, #9 - 6418 0042 0093 str r3, [sp] - 851:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 6419 .loc 1 851 3 is_stmt 1 view .LVU2054 - 851:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 6420 .loc 1 851 16 is_stmt 0 view .LVU2055 - 6421 0044 0123 movs r3, #1 - 6422 0046 0193 str r3, [sp, #4] - 852:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6423 .loc 1 852 3 is_stmt 1 view .LVU2056 - 852:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6424 .loc 1 852 24 is_stmt 0 view .LVU2057 - 6425 0048 0723 movs r3, #7 - 6426 004a 0293 str r3, [sp, #8] - 853:Src/main.c **** { - 6427 .loc 1 853 3 is_stmt 1 view .LVU2058 - 853:Src/main.c **** { - 6428 .loc 1 853 7 is_stmt 0 view .LVU2059 - 6429 004c 6946 mov r1, sp - 6430 004e 1B48 ldr r0, .L295 - 6431 0050 FFF7FEFF bl HAL_ADC_ConfigChannel - 6432 .LVL530: - 853:Src/main.c **** { - 6433 .loc 1 853 6 discriminator 1 view .LVU2060 - 6434 0054 40BB cbnz r0, .L290 - 860:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 6435 .loc 1 860 3 is_stmt 1 view .LVU2061 - 860:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 6436 .loc 1 860 19 is_stmt 0 view .LVU2062 - 6437 0056 0823 movs r3, #8 - 6438 0058 0093 str r3, [sp] - 861:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6439 .loc 1 861 3 is_stmt 1 view .LVU2063 - 861:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6440 .loc 1 861 16 is_stmt 0 view .LVU2064 - 6441 005a 0223 movs r3, #2 - 6442 005c 0193 str r3, [sp, #4] - 862:Src/main.c **** { - 6443 .loc 1 862 3 is_stmt 1 view .LVU2065 - 862:Src/main.c **** { - 6444 .loc 1 862 7 is_stmt 0 view .LVU2066 - 6445 005e 6946 mov r1, sp - ARM GAS /tmp/ccO46DoU.s page 482 + 964:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 7553 .loc 1 964 27 is_stmt 0 view .LVU2389 + 7554 0036 4261 str r2, [r0, #20] + 965:Src/main.c **** { + 7555 .loc 1 965 3 is_stmt 1 view .LVU2390 + 965:Src/main.c **** { + 7556 .loc 1 965 7 is_stmt 0 view .LVU2391 + 7557 0038 FFF7FEFF bl HAL_ADC_Init + 7558 .LVL665: + 965:Src/main.c **** { + 7559 .loc 1 965 6 discriminator 1 view .LVU2392 + 7560 003c 0028 cmp r0, #0 + 7561 003e 31D1 bne .L377 + 972:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 7562 .loc 1 972 3 is_stmt 1 view .LVU2393 + 972:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 7563 .loc 1 972 19 is_stmt 0 view .LVU2394 + 7564 0040 0923 movs r3, #9 + 7565 0042 0093 str r3, [sp] + 973:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 7566 .loc 1 973 3 is_stmt 1 view .LVU2395 + 973:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 7567 .loc 1 973 16 is_stmt 0 view .LVU2396 + 7568 0044 0123 movs r3, #1 + 7569 0046 0193 str r3, [sp, #4] + 974:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 7570 .loc 1 974 3 is_stmt 1 view .LVU2397 + 974:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 7571 .loc 1 974 24 is_stmt 0 view .LVU2398 + 7572 0048 0723 movs r3, #7 + 7573 004a 0293 str r3, [sp, #8] + 975:Src/main.c **** { + 7574 .loc 1 975 3 is_stmt 1 view .LVU2399 + 975:Src/main.c **** { + 7575 .loc 1 975 7 is_stmt 0 view .LVU2400 + 7576 004c 6946 mov r1, sp + 7577 004e 1B48 ldr r0, .L383 + 7578 0050 FFF7FEFF bl HAL_ADC_ConfigChannel + 7579 .LVL666: + 975:Src/main.c **** { + 7580 .loc 1 975 6 discriminator 1 view .LVU2401 + 7581 0054 40BB cbnz r0, .L378 + 982:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 7582 .loc 1 982 3 is_stmt 1 view .LVU2402 + 982:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 7583 .loc 1 982 19 is_stmt 0 view .LVU2403 + 7584 0056 0823 movs r3, #8 + 7585 0058 0093 str r3, [sp] + 983:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 7586 .loc 1 983 3 is_stmt 1 view .LVU2404 + 983:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 7587 .loc 1 983 16 is_stmt 0 view .LVU2405 + 7588 005a 0223 movs r3, #2 + 7589 005c 0193 str r3, [sp, #4] + 984:Src/main.c **** { + 7590 .loc 1 984 3 is_stmt 1 view .LVU2406 + 984:Src/main.c **** { + ARM GAS /tmp/ccYgfTud.s page 514 - 6446 0060 1648 ldr r0, .L295 - 6447 0062 FFF7FEFF bl HAL_ADC_ConfigChannel - 6448 .LVL531: - 862:Src/main.c **** { - 6449 .loc 1 862 6 discriminator 1 view .LVU2067 - 6450 0066 08BB cbnz r0, .L291 - 869:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 6451 .loc 1 869 3 is_stmt 1 view .LVU2068 - 869:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 6452 .loc 1 869 19 is_stmt 0 view .LVU2069 - 6453 0068 0223 movs r3, #2 - 6454 006a 0093 str r3, [sp] - 870:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6455 .loc 1 870 3 is_stmt 1 view .LVU2070 - 870:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6456 .loc 1 870 16 is_stmt 0 view .LVU2071 - 6457 006c 0323 movs r3, #3 - 6458 006e 0193 str r3, [sp, #4] - 871:Src/main.c **** { - 6459 .loc 1 871 3 is_stmt 1 view .LVU2072 - 871:Src/main.c **** { - 6460 .loc 1 871 7 is_stmt 0 view .LVU2073 - 6461 0070 6946 mov r1, sp - 6462 0072 1248 ldr r0, .L295 - 6463 0074 FFF7FEFF bl HAL_ADC_ConfigChannel - 6464 .LVL532: - 871:Src/main.c **** { - 6465 .loc 1 871 6 discriminator 1 view .LVU2074 - 6466 0078 D0B9 cbnz r0, .L292 - 878:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 6467 .loc 1 878 3 is_stmt 1 view .LVU2075 - 878:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 6468 .loc 1 878 19 is_stmt 0 view .LVU2076 - 6469 007a 0A23 movs r3, #10 - 6470 007c 0093 str r3, [sp] - 879:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6471 .loc 1 879 3 is_stmt 1 view .LVU2077 - 879:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6472 .loc 1 879 16 is_stmt 0 view .LVU2078 - 6473 007e 0423 movs r3, #4 - 6474 0080 0193 str r3, [sp, #4] - 880:Src/main.c **** { - 6475 .loc 1 880 3 is_stmt 1 view .LVU2079 - 880:Src/main.c **** { - 6476 .loc 1 880 7 is_stmt 0 view .LVU2080 - 6477 0082 6946 mov r1, sp - 6478 0084 0D48 ldr r0, .L295 - 6479 0086 FFF7FEFF bl HAL_ADC_ConfigChannel - 6480 .LVL533: - 880:Src/main.c **** { - 6481 .loc 1 880 6 discriminator 1 view .LVU2081 - 6482 008a 98B9 cbnz r0, .L293 - 887:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 6483 .loc 1 887 3 is_stmt 1 view .LVU2082 - 887:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 6484 .loc 1 887 19 is_stmt 0 view .LVU2083 - 6485 008c 0B23 movs r3, #11 - ARM GAS /tmp/ccO46DoU.s page 483 + 7591 .loc 1 984 7 is_stmt 0 view .LVU2407 + 7592 005e 6946 mov r1, sp + 7593 0060 1648 ldr r0, .L383 + 7594 0062 FFF7FEFF bl HAL_ADC_ConfigChannel + 7595 .LVL667: + 984:Src/main.c **** { + 7596 .loc 1 984 6 discriminator 1 view .LVU2408 + 7597 0066 08BB cbnz r0, .L379 + 991:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 7598 .loc 1 991 3 is_stmt 1 view .LVU2409 + 991:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 7599 .loc 1 991 19 is_stmt 0 view .LVU2410 + 7600 0068 0223 movs r3, #2 + 7601 006a 0093 str r3, [sp] + 992:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 7602 .loc 1 992 3 is_stmt 1 view .LVU2411 + 992:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 7603 .loc 1 992 16 is_stmt 0 view .LVU2412 + 7604 006c 0323 movs r3, #3 + 7605 006e 0193 str r3, [sp, #4] + 993:Src/main.c **** { + 7606 .loc 1 993 3 is_stmt 1 view .LVU2413 + 993:Src/main.c **** { + 7607 .loc 1 993 7 is_stmt 0 view .LVU2414 + 7608 0070 6946 mov r1, sp + 7609 0072 1248 ldr r0, .L383 + 7610 0074 FFF7FEFF bl HAL_ADC_ConfigChannel + 7611 .LVL668: + 993:Src/main.c **** { + 7612 .loc 1 993 6 discriminator 1 view .LVU2415 + 7613 0078 D0B9 cbnz r0, .L380 +1000:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 7614 .loc 1 1000 3 is_stmt 1 view .LVU2416 +1000:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 7615 .loc 1 1000 19 is_stmt 0 view .LVU2417 + 7616 007a 0A23 movs r3, #10 + 7617 007c 0093 str r3, [sp] +1001:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 7618 .loc 1 1001 3 is_stmt 1 view .LVU2418 +1001:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 7619 .loc 1 1001 16 is_stmt 0 view .LVU2419 + 7620 007e 0423 movs r3, #4 + 7621 0080 0193 str r3, [sp, #4] +1002:Src/main.c **** { + 7622 .loc 1 1002 3 is_stmt 1 view .LVU2420 +1002:Src/main.c **** { + 7623 .loc 1 1002 7 is_stmt 0 view .LVU2421 + 7624 0082 6946 mov r1, sp + 7625 0084 0D48 ldr r0, .L383 + 7626 0086 FFF7FEFF bl HAL_ADC_ConfigChannel + 7627 .LVL669: +1002:Src/main.c **** { + 7628 .loc 1 1002 6 discriminator 1 view .LVU2422 + 7629 008a 98B9 cbnz r0, .L381 +1009:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 7630 .loc 1 1009 3 is_stmt 1 view .LVU2423 +1009:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + ARM GAS /tmp/ccYgfTud.s page 515 - 6486 008e 0093 str r3, [sp] - 888:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6487 .loc 1 888 3 is_stmt 1 view .LVU2084 - 888:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6488 .loc 1 888 16 is_stmt 0 view .LVU2085 - 6489 0090 0523 movs r3, #5 - 6490 0092 0193 str r3, [sp, #4] - 889:Src/main.c **** { - 6491 .loc 1 889 3 is_stmt 1 view .LVU2086 - 889:Src/main.c **** { - 6492 .loc 1 889 7 is_stmt 0 view .LVU2087 - 6493 0094 6946 mov r1, sp - 6494 0096 0948 ldr r0, .L295 - 6495 0098 FFF7FEFF bl HAL_ADC_ConfigChannel - 6496 .LVL534: - 889:Src/main.c **** { - 6497 .loc 1 889 6 discriminator 1 view .LVU2088 - 6498 009c 60B9 cbnz r0, .L294 - 897:Src/main.c **** - 6499 .loc 1 897 1 view .LVU2089 - 6500 009e 05B0 add sp, sp, #20 - 6501 .LCFI52: - 6502 .cfi_remember_state - 6503 .cfi_def_cfa_offset 4 - 6504 @ sp needed - 6505 00a0 5DF804FB ldr pc, [sp], #4 - 6506 .L289: - 6507 .LCFI53: - 6508 .cfi_restore_state - 845:Src/main.c **** } - 6509 .loc 1 845 5 is_stmt 1 view .LVU2090 - 6510 00a4 FFF7FEFF bl Error_Handler - 6511 .LVL535: - 6512 .L290: - 855:Src/main.c **** } - 6513 .loc 1 855 5 view .LVU2091 - 6514 00a8 FFF7FEFF bl Error_Handler - 6515 .LVL536: - 6516 .L291: - 864:Src/main.c **** } - 6517 .loc 1 864 5 view .LVU2092 - 6518 00ac FFF7FEFF bl Error_Handler - 6519 .LVL537: - 6520 .L292: - 873:Src/main.c **** } - 6521 .loc 1 873 5 view .LVU2093 - 6522 00b0 FFF7FEFF bl Error_Handler - 6523 .LVL538: - 6524 .L293: - 882:Src/main.c **** } - 6525 .loc 1 882 5 view .LVU2094 - 6526 00b4 FFF7FEFF bl Error_Handler - 6527 .LVL539: - 6528 .L294: - 891:Src/main.c **** } - 6529 .loc 1 891 5 view .LVU2095 - 6530 00b8 FFF7FEFF bl Error_Handler - ARM GAS /tmp/ccO46DoU.s page 484 + 7631 .loc 1 1009 19 is_stmt 0 view .LVU2424 + 7632 008c 0B23 movs r3, #11 + 7633 008e 0093 str r3, [sp] +1010:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 7634 .loc 1 1010 3 is_stmt 1 view .LVU2425 +1010:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 7635 .loc 1 1010 16 is_stmt 0 view .LVU2426 + 7636 0090 0523 movs r3, #5 + 7637 0092 0193 str r3, [sp, #4] +1011:Src/main.c **** { + 7638 .loc 1 1011 3 is_stmt 1 view .LVU2427 +1011:Src/main.c **** { + 7639 .loc 1 1011 7 is_stmt 0 view .LVU2428 + 7640 0094 6946 mov r1, sp + 7641 0096 0948 ldr r0, .L383 + 7642 0098 FFF7FEFF bl HAL_ADC_ConfigChannel + 7643 .LVL670: +1011:Src/main.c **** { + 7644 .loc 1 1011 6 discriminator 1 view .LVU2429 + 7645 009c 60B9 cbnz r0, .L382 +1019:Src/main.c **** + 7646 .loc 1 1019 1 view .LVU2430 + 7647 009e 05B0 add sp, sp, #20 + 7648 .LCFI67: + 7649 .cfi_remember_state + 7650 .cfi_def_cfa_offset 4 + 7651 @ sp needed + 7652 00a0 5DF804FB ldr pc, [sp], #4 + 7653 .L377: + 7654 .LCFI68: + 7655 .cfi_restore_state + 967:Src/main.c **** } + 7656 .loc 1 967 5 is_stmt 1 view .LVU2431 + 7657 00a4 FFF7FEFF bl Error_Handler + 7658 .LVL671: + 7659 .L378: + 977:Src/main.c **** } + 7660 .loc 1 977 5 view .LVU2432 + 7661 00a8 FFF7FEFF bl Error_Handler + 7662 .LVL672: + 7663 .L379: + 986:Src/main.c **** } + 7664 .loc 1 986 5 view .LVU2433 + 7665 00ac FFF7FEFF bl Error_Handler + 7666 .LVL673: + 7667 .L380: + 995:Src/main.c **** } + 7668 .loc 1 995 5 view .LVU2434 + 7669 00b0 FFF7FEFF bl Error_Handler + 7670 .LVL674: + 7671 .L381: +1004:Src/main.c **** } + 7672 .loc 1 1004 5 view .LVU2435 + 7673 00b4 FFF7FEFF bl Error_Handler + 7674 .LVL675: + 7675 .L382: +1013:Src/main.c **** } + ARM GAS /tmp/ccYgfTud.s page 516 - 6531 .LVL540: - 6532 .L296: - 6533 .align 2 - 6534 .L295: - 6535 00bc 00000000 .word hadc1 - 6536 00c0 00200140 .word 1073815552 - 6537 00c4 0100000F .word 251658241 - 6538 .cfi_endproc - 6539 .LFE1188: - 6541 .section .text.MX_ADC3_Init,"ax",%progbits - 6542 .align 1 - 6543 .syntax unified - 6544 .thumb - 6545 .thumb_func - 6547 MX_ADC3_Init: - 6548 .LFB1189: - 905:Src/main.c **** - 6549 .loc 1 905 1 view -0 - 6550 .cfi_startproc - 6551 @ args = 0, pretend = 0, frame = 16 - 6552 @ frame_needed = 0, uses_anonymous_args = 0 - 6553 0000 00B5 push {lr} - 6554 .LCFI54: - 6555 .cfi_def_cfa_offset 4 - 6556 .cfi_offset 14, -4 - 6557 0002 85B0 sub sp, sp, #20 - 6558 .LCFI55: - 6559 .cfi_def_cfa_offset 24 - 911:Src/main.c **** - 6560 .loc 1 911 3 view .LVU2097 - 911:Src/main.c **** - 6561 .loc 1 911 26 is_stmt 0 view .LVU2098 - 6562 0004 0023 movs r3, #0 - 6563 0006 0093 str r3, [sp] - 6564 0008 0193 str r3, [sp, #4] - 6565 000a 0293 str r3, [sp, #8] - 6566 000c 0393 str r3, [sp, #12] - 919:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 6567 .loc 1 919 3 is_stmt 1 view .LVU2099 - 919:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 6568 .loc 1 919 18 is_stmt 0 view .LVU2100 - 6569 000e 1448 ldr r0, .L303 - 6570 0010 144A ldr r2, .L303+4 - 6571 0012 0260 str r2, [r0] - 920:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 6572 .loc 1 920 3 is_stmt 1 view .LVU2101 - 920:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 6573 .loc 1 920 29 is_stmt 0 view .LVU2102 - 6574 0014 4FF44032 mov r2, #196608 - 6575 0018 4260 str r2, [r0, #4] - 921:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 6576 .loc 1 921 3 is_stmt 1 view .LVU2103 - 921:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 6577 .loc 1 921 25 is_stmt 0 view .LVU2104 - 6578 001a 8360 str r3, [r0, #8] - 922:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 6579 .loc 1 922 3 is_stmt 1 view .LVU2105 - ARM GAS /tmp/ccO46DoU.s page 485 + 7676 .loc 1 1013 5 view .LVU2436 + 7677 00b8 FFF7FEFF bl Error_Handler + 7678 .LVL676: + 7679 .L384: + 7680 .align 2 + 7681 .L383: + 7682 00bc 00000000 .word hadc1 + 7683 00c0 00200140 .word 1073815552 + 7684 00c4 0100000F .word 251658241 + 7685 .cfi_endproc + 7686 .LFE1188: + 7688 .section .text.MX_ADC3_Init,"ax",%progbits + 7689 .align 1 + 7690 .syntax unified + 7691 .thumb + 7692 .thumb_func + 7694 MX_ADC3_Init: + 7695 .LFB1189: +1027:Src/main.c **** + 7696 .loc 1 1027 1 view -0 + 7697 .cfi_startproc + 7698 @ args = 0, pretend = 0, frame = 16 + 7699 @ frame_needed = 0, uses_anonymous_args = 0 + 7700 0000 00B5 push {lr} + 7701 .LCFI69: + 7702 .cfi_def_cfa_offset 4 + 7703 .cfi_offset 14, -4 + 7704 0002 85B0 sub sp, sp, #20 + 7705 .LCFI70: + 7706 .cfi_def_cfa_offset 24 +1033:Src/main.c **** + 7707 .loc 1 1033 3 view .LVU2438 +1033:Src/main.c **** + 7708 .loc 1 1033 26 is_stmt 0 view .LVU2439 + 7709 0004 0023 movs r3, #0 + 7710 0006 0093 str r3, [sp] + 7711 0008 0193 str r3, [sp, #4] + 7712 000a 0293 str r3, [sp, #8] + 7713 000c 0393 str r3, [sp, #12] +1041:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 7714 .loc 1 1041 3 is_stmt 1 view .LVU2440 +1041:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 7715 .loc 1 1041 18 is_stmt 0 view .LVU2441 + 7716 000e 1448 ldr r0, .L391 + 7717 0010 144A ldr r2, .L391+4 + 7718 0012 0260 str r2, [r0] +1042:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 7719 .loc 1 1042 3 is_stmt 1 view .LVU2442 +1042:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 7720 .loc 1 1042 29 is_stmt 0 view .LVU2443 + 7721 0014 4FF44032 mov r2, #196608 + 7722 0018 4260 str r2, [r0, #4] +1043:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 7723 .loc 1 1043 3 is_stmt 1 view .LVU2444 +1043:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 7724 .loc 1 1043 25 is_stmt 0 view .LVU2445 + 7725 001a 8360 str r3, [r0, #8] + ARM GAS /tmp/ccYgfTud.s page 517 - 922:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 6580 .loc 1 922 27 is_stmt 0 view .LVU2106 - 6581 001c 0361 str r3, [r0, #16] - 923:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 6582 .loc 1 923 3 is_stmt 1 view .LVU2107 - 923:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 6583 .loc 1 923 33 is_stmt 0 view .LVU2108 - 6584 001e 8361 str r3, [r0, #24] - 924:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 6585 .loc 1 924 3 is_stmt 1 view .LVU2109 - 924:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 6586 .loc 1 924 36 is_stmt 0 view .LVU2110 - 6587 0020 80F82030 strb r3, [r0, #32] - 925:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 6588 .loc 1 925 3 is_stmt 1 view .LVU2111 - 925:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 6589 .loc 1 925 35 is_stmt 0 view .LVU2112 - 6590 0024 C362 str r3, [r0, #44] - 926:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 6591 .loc 1 926 3 is_stmt 1 view .LVU2113 - 926:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 6592 .loc 1 926 31 is_stmt 0 view .LVU2114 - 6593 0026 104A ldr r2, .L303+8 - 6594 0028 8262 str r2, [r0, #40] - 927:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 6595 .loc 1 927 3 is_stmt 1 view .LVU2115 - 927:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 6596 .loc 1 927 24 is_stmt 0 view .LVU2116 - 6597 002a C360 str r3, [r0, #12] - 928:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 6598 .loc 1 928 3 is_stmt 1 view .LVU2117 - 928:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 6599 .loc 1 928 30 is_stmt 0 view .LVU2118 - 6600 002c 0122 movs r2, #1 - 6601 002e C261 str r2, [r0, #28] - 929:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 6602 .loc 1 929 3 is_stmt 1 view .LVU2119 - 929:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 6603 .loc 1 929 36 is_stmt 0 view .LVU2120 - 6604 0030 80F83030 strb r3, [r0, #48] - 930:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 6605 .loc 1 930 3 is_stmt 1 view .LVU2121 - 930:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 6606 .loc 1 930 27 is_stmt 0 view .LVU2122 - 6607 0034 4261 str r2, [r0, #20] - 931:Src/main.c **** { - 6608 .loc 1 931 3 is_stmt 1 view .LVU2123 - 931:Src/main.c **** { - 6609 .loc 1 931 7 is_stmt 0 view .LVU2124 - 6610 0036 FFF7FEFF bl HAL_ADC_Init - 6611 .LVL541: - 931:Src/main.c **** { - 6612 .loc 1 931 6 discriminator 1 view .LVU2125 - 6613 003a 68B9 cbnz r0, .L301 - 938:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 6614 .loc 1 938 3 is_stmt 1 view .LVU2126 - 938:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - ARM GAS /tmp/ccO46DoU.s page 486 +1044:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 7726 .loc 1 1044 3 is_stmt 1 view .LVU2446 +1044:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 7727 .loc 1 1044 27 is_stmt 0 view .LVU2447 + 7728 001c 0361 str r3, [r0, #16] +1045:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 7729 .loc 1 1045 3 is_stmt 1 view .LVU2448 +1045:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 7730 .loc 1 1045 33 is_stmt 0 view .LVU2449 + 7731 001e 8361 str r3, [r0, #24] +1046:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 7732 .loc 1 1046 3 is_stmt 1 view .LVU2450 +1046:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 7733 .loc 1 1046 36 is_stmt 0 view .LVU2451 + 7734 0020 80F82030 strb r3, [r0, #32] +1047:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 7735 .loc 1 1047 3 is_stmt 1 view .LVU2452 +1047:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 7736 .loc 1 1047 35 is_stmt 0 view .LVU2453 + 7737 0024 C362 str r3, [r0, #44] +1048:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 7738 .loc 1 1048 3 is_stmt 1 view .LVU2454 +1048:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 7739 .loc 1 1048 31 is_stmt 0 view .LVU2455 + 7740 0026 104A ldr r2, .L391+8 + 7741 0028 8262 str r2, [r0, #40] +1049:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 7742 .loc 1 1049 3 is_stmt 1 view .LVU2456 +1049:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 7743 .loc 1 1049 24 is_stmt 0 view .LVU2457 + 7744 002a C360 str r3, [r0, #12] +1050:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 7745 .loc 1 1050 3 is_stmt 1 view .LVU2458 +1050:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 7746 .loc 1 1050 30 is_stmt 0 view .LVU2459 + 7747 002c 0122 movs r2, #1 + 7748 002e C261 str r2, [r0, #28] +1051:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 7749 .loc 1 1051 3 is_stmt 1 view .LVU2460 +1051:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 7750 .loc 1 1051 36 is_stmt 0 view .LVU2461 + 7751 0030 80F83030 strb r3, [r0, #48] +1052:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 7752 .loc 1 1052 3 is_stmt 1 view .LVU2462 +1052:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 7753 .loc 1 1052 27 is_stmt 0 view .LVU2463 + 7754 0034 4261 str r2, [r0, #20] +1053:Src/main.c **** { + 7755 .loc 1 1053 3 is_stmt 1 view .LVU2464 +1053:Src/main.c **** { + 7756 .loc 1 1053 7 is_stmt 0 view .LVU2465 + 7757 0036 FFF7FEFF bl HAL_ADC_Init + 7758 .LVL677: +1053:Src/main.c **** { + 7759 .loc 1 1053 6 discriminator 1 view .LVU2466 + 7760 003a 68B9 cbnz r0, .L389 +1060:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + ARM GAS /tmp/ccYgfTud.s page 518 - 6615 .loc 1 938 19 is_stmt 0 view .LVU2127 - 6616 003c 0F23 movs r3, #15 - 6617 003e 0093 str r3, [sp] - 939:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 6618 .loc 1 939 3 is_stmt 1 view .LVU2128 - 939:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 6619 .loc 1 939 16 is_stmt 0 view .LVU2129 - 6620 0040 0123 movs r3, #1 - 6621 0042 0193 str r3, [sp, #4] - 940:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 6622 .loc 1 940 3 is_stmt 1 view .LVU2130 - 940:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 6623 .loc 1 940 24 is_stmt 0 view .LVU2131 - 6624 0044 0723 movs r3, #7 - 6625 0046 0293 str r3, [sp, #8] - 941:Src/main.c **** { - 6626 .loc 1 941 3 is_stmt 1 view .LVU2132 - 941:Src/main.c **** { - 6627 .loc 1 941 7 is_stmt 0 view .LVU2133 - 6628 0048 6946 mov r1, sp - 6629 004a 0548 ldr r0, .L303 - 6630 004c FFF7FEFF bl HAL_ADC_ConfigChannel - 6631 .LVL542: - 941:Src/main.c **** { - 6632 .loc 1 941 6 discriminator 1 view .LVU2134 - 6633 0050 20B9 cbnz r0, .L302 - 949:Src/main.c **** - 6634 .loc 1 949 1 view .LVU2135 - 6635 0052 05B0 add sp, sp, #20 - 6636 .LCFI56: - 6637 .cfi_remember_state - 6638 .cfi_def_cfa_offset 4 - 6639 @ sp needed - 6640 0054 5DF804FB ldr pc, [sp], #4 - 6641 .L301: - 6642 .LCFI57: - 6643 .cfi_restore_state - 933:Src/main.c **** } - 6644 .loc 1 933 5 is_stmt 1 view .LVU2136 - 6645 0058 FFF7FEFF bl Error_Handler - 6646 .LVL543: - 6647 .L302: - 943:Src/main.c **** } - 6648 .loc 1 943 5 view .LVU2137 - 6649 005c FFF7FEFF bl Error_Handler - 6650 .LVL544: - 6651 .L304: - 6652 .align 2 - 6653 .L303: - 6654 0060 00000000 .word hadc3 - 6655 0064 00220140 .word 1073816064 - 6656 0068 0100000F .word 251658241 - 6657 .cfi_endproc - 6658 .LFE1189: - 6660 .section .text.MX_USART1_UART_Init,"ax",%progbits - 6661 .align 1 - 6662 .syntax unified - ARM GAS /tmp/ccO46DoU.s page 487 + 7761 .loc 1 1060 3 is_stmt 1 view .LVU2467 +1060:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 7762 .loc 1 1060 19 is_stmt 0 view .LVU2468 + 7763 003c 0F23 movs r3, #15 + 7764 003e 0093 str r3, [sp] +1061:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 7765 .loc 1 1061 3 is_stmt 1 view .LVU2469 +1061:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 7766 .loc 1 1061 16 is_stmt 0 view .LVU2470 + 7767 0040 0123 movs r3, #1 + 7768 0042 0193 str r3, [sp, #4] +1062:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 7769 .loc 1 1062 3 is_stmt 1 view .LVU2471 +1062:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 7770 .loc 1 1062 24 is_stmt 0 view .LVU2472 + 7771 0044 0723 movs r3, #7 + 7772 0046 0293 str r3, [sp, #8] +1063:Src/main.c **** { + 7773 .loc 1 1063 3 is_stmt 1 view .LVU2473 +1063:Src/main.c **** { + 7774 .loc 1 1063 7 is_stmt 0 view .LVU2474 + 7775 0048 6946 mov r1, sp + 7776 004a 0548 ldr r0, .L391 + 7777 004c FFF7FEFF bl HAL_ADC_ConfigChannel + 7778 .LVL678: +1063:Src/main.c **** { + 7779 .loc 1 1063 6 discriminator 1 view .LVU2475 + 7780 0050 20B9 cbnz r0, .L390 +1071:Src/main.c **** + 7781 .loc 1 1071 1 view .LVU2476 + 7782 0052 05B0 add sp, sp, #20 + 7783 .LCFI71: + 7784 .cfi_remember_state + 7785 .cfi_def_cfa_offset 4 + 7786 @ sp needed + 7787 0054 5DF804FB ldr pc, [sp], #4 + 7788 .L389: + 7789 .LCFI72: + 7790 .cfi_restore_state +1055:Src/main.c **** } + 7791 .loc 1 1055 5 is_stmt 1 view .LVU2477 + 7792 0058 FFF7FEFF bl Error_Handler + 7793 .LVL679: + 7794 .L390: +1065:Src/main.c **** } + 7795 .loc 1 1065 5 view .LVU2478 + 7796 005c FFF7FEFF bl Error_Handler + 7797 .LVL680: + 7798 .L392: + 7799 .align 2 + 7800 .L391: + 7801 0060 00000000 .word hadc3 + 7802 0064 00220140 .word 1073816064 + 7803 0068 0100000F .word 251658241 + 7804 .cfi_endproc + 7805 .LFE1189: + 7807 .section .text.MX_USART1_UART_Init,"ax",%progbits + ARM GAS /tmp/ccYgfTud.s page 519 - 6663 .thumb - 6664 .thumb_func - 6666 MX_USART1_UART_Init: - 6667 .LFB1204: -1607:Src/main.c **** - 6668 .loc 1 1607 1 view -0 - 6669 .cfi_startproc - 6670 @ args = 0, pretend = 0, frame = 208 - 6671 @ frame_needed = 0, uses_anonymous_args = 0 - 6672 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 6673 .LCFI58: - 6674 .cfi_def_cfa_offset 24 - 6675 .cfi_offset 4, -24 - 6676 .cfi_offset 5, -20 - 6677 .cfi_offset 6, -16 - 6678 .cfi_offset 7, -12 - 6679 .cfi_offset 8, -8 - 6680 .cfi_offset 14, -4 - 6681 0004 B4B0 sub sp, sp, #208 - 6682 .LCFI59: - 6683 .cfi_def_cfa_offset 232 -1613:Src/main.c **** - 6684 .loc 1 1613 3 view .LVU2139 -1613:Src/main.c **** - 6685 .loc 1 1613 24 is_stmt 0 view .LVU2140 - 6686 0006 0021 movs r1, #0 - 6687 0008 2D91 str r1, [sp, #180] - 6688 000a 2E91 str r1, [sp, #184] - 6689 000c 2F91 str r1, [sp, #188] - 6690 000e 3091 str r1, [sp, #192] - 6691 0010 3191 str r1, [sp, #196] - 6692 0012 3291 str r1, [sp, #200] - 6693 0014 3391 str r1, [sp, #204] -1615:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 6694 .loc 1 1615 3 is_stmt 1 view .LVU2141 -1615:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 6695 .loc 1 1615 23 is_stmt 0 view .LVU2142 - 6696 0016 2791 str r1, [sp, #156] - 6697 0018 2891 str r1, [sp, #160] - 6698 001a 2991 str r1, [sp, #164] - 6699 001c 2A91 str r1, [sp, #168] - 6700 001e 2B91 str r1, [sp, #172] - 6701 0020 2C91 str r1, [sp, #176] -1616:Src/main.c **** - 6702 .loc 1 1616 3 is_stmt 1 view .LVU2143 -1616:Src/main.c **** - 6703 .loc 1 1616 28 is_stmt 0 view .LVU2144 - 6704 0022 9022 movs r2, #144 - 6705 0024 03A8 add r0, sp, #12 - 6706 0026 FFF7FEFF bl memset - 6707 .LVL545: -1620:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 6708 .loc 1 1620 3 is_stmt 1 view .LVU2145 -1620:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 6709 .loc 1 1620 44 is_stmt 0 view .LVU2146 - 6710 002a 4023 movs r3, #64 - 6711 002c 0393 str r3, [sp, #12] - ARM GAS /tmp/ccO46DoU.s page 488 + 7808 .align 1 + 7809 .syntax unified + 7810 .thumb + 7811 .thumb_func + 7813 MX_USART1_UART_Init: + 7814 .LFB1204: +1738:Src/main.c **** + 7815 .loc 1 1738 1 view -0 + 7816 .cfi_startproc + 7817 @ args = 0, pretend = 0, frame = 208 + 7818 @ frame_needed = 0, uses_anonymous_args = 0 + 7819 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 7820 .LCFI73: + 7821 .cfi_def_cfa_offset 24 + 7822 .cfi_offset 4, -24 + 7823 .cfi_offset 5, -20 + 7824 .cfi_offset 6, -16 + 7825 .cfi_offset 7, -12 + 7826 .cfi_offset 8, -8 + 7827 .cfi_offset 14, -4 + 7828 0004 B4B0 sub sp, sp, #208 + 7829 .LCFI74: + 7830 .cfi_def_cfa_offset 232 +1744:Src/main.c **** + 7831 .loc 1 1744 3 view .LVU2480 +1744:Src/main.c **** + 7832 .loc 1 1744 24 is_stmt 0 view .LVU2481 + 7833 0006 0021 movs r1, #0 + 7834 0008 2D91 str r1, [sp, #180] + 7835 000a 2E91 str r1, [sp, #184] + 7836 000c 2F91 str r1, [sp, #188] + 7837 000e 3091 str r1, [sp, #192] + 7838 0010 3191 str r1, [sp, #196] + 7839 0012 3291 str r1, [sp, #200] + 7840 0014 3391 str r1, [sp, #204] +1746:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + 7841 .loc 1 1746 3 is_stmt 1 view .LVU2482 +1746:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + 7842 .loc 1 1746 23 is_stmt 0 view .LVU2483 + 7843 0016 2791 str r1, [sp, #156] + 7844 0018 2891 str r1, [sp, #160] + 7845 001a 2991 str r1, [sp, #164] + 7846 001c 2A91 str r1, [sp, #168] + 7847 001e 2B91 str r1, [sp, #172] + 7848 0020 2C91 str r1, [sp, #176] +1747:Src/main.c **** + 7849 .loc 1 1747 3 is_stmt 1 view .LVU2484 +1747:Src/main.c **** + 7850 .loc 1 1747 28 is_stmt 0 view .LVU2485 + 7851 0022 9022 movs r2, #144 + 7852 0024 03A8 add r0, sp, #12 + 7853 0026 FFF7FEFF bl memset + 7854 .LVL681: +1751:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + 7855 .loc 1 1751 3 is_stmt 1 view .LVU2486 +1751:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + 7856 .loc 1 1751 44 is_stmt 0 view .LVU2487 + ARM GAS /tmp/ccYgfTud.s page 520 -1621:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 6712 .loc 1 1621 3 is_stmt 1 view .LVU2147 -1622:Src/main.c **** { - 6713 .loc 1 1622 3 view .LVU2148 -1622:Src/main.c **** { - 6714 .loc 1 1622 7 is_stmt 0 view .LVU2149 - 6715 002e 03A8 add r0, sp, #12 - 6716 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig - 6717 .LVL546: -1622:Src/main.c **** { - 6718 .loc 1 1622 6 discriminator 1 view .LVU2150 - 6719 0034 0028 cmp r0, #0 - 6720 0036 40F09E80 bne .L308 -1628:Src/main.c **** - 6721 .loc 1 1628 3 is_stmt 1 view .LVU2151 - 6722 .LVL547: - 6723 .LBB513: - 6724 .LBI513: + 7857 002a 4023 movs r3, #64 + 7858 002c 0393 str r3, [sp, #12] +1752:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + 7859 .loc 1 1752 3 is_stmt 1 view .LVU2488 +1753:Src/main.c **** { + 7860 .loc 1 1753 3 view .LVU2489 +1753:Src/main.c **** { + 7861 .loc 1 1753 7 is_stmt 0 view .LVU2490 + 7862 002e 03A8 add r0, sp, #12 + 7863 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig + 7864 .LVL682: +1753:Src/main.c **** { + 7865 .loc 1 1753 6 discriminator 1 view .LVU2491 + 7866 0034 0028 cmp r0, #0 + 7867 0036 40F09E80 bne .L396 +1759:Src/main.c **** + 7868 .loc 1 1759 3 is_stmt 1 view .LVU2492 + 7869 .LVL683: + 7870 .LBB586: + 7871 .LBI586: 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 6725 .loc 3 1587 22 view .LVU2152 - 6726 .LBB514: + 7872 .loc 3 1587 22 view .LVU2493 + 7873 .LBB587: 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 6727 .loc 3 1589 3 view .LVU2153 + 7874 .loc 3 1589 3 view .LVU2494 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 6728 .loc 3 1590 3 view .LVU2154 - 6729 003a 504B ldr r3, .L309 - 6730 003c 5A6C ldr r2, [r3, #68] - 6731 003e 42F01002 orr r2, r2, #16 - 6732 0042 5A64 str r2, [r3, #68] + 7875 .loc 3 1590 3 view .LVU2495 + 7876 003a 504B ldr r3, .L397 + 7877 003c 5A6C ldr r2, [r3, #68] + 7878 003e 42F01002 orr r2, r2, #16 + 7879 0042 5A64 str r2, [r3, #68] 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6733 .loc 3 1592 3 view .LVU2155 + 7880 .loc 3 1592 3 view .LVU2496 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6734 .loc 3 1592 12 is_stmt 0 view .LVU2156 - 6735 0044 5A6C ldr r2, [r3, #68] - 6736 0046 02F01002 and r2, r2, #16 + 7881 .loc 3 1592 12 is_stmt 0 view .LVU2497 + 7882 0044 5A6C ldr r2, [r3, #68] + 7883 0046 02F01002 and r2, r2, #16 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6737 .loc 3 1592 10 view .LVU2157 - 6738 004a 0292 str r2, [sp, #8] - 6739 .loc 3 1593 3 is_stmt 1 view .LVU2158 - 6740 004c 029A ldr r2, [sp, #8] - 6741 .LVL548: - 6742 .loc 3 1593 3 is_stmt 0 view .LVU2159 - 6743 .LBE514: - 6744 .LBE513: -1630:Src/main.c **** /**USART1 GPIO Configuration - 6745 .loc 1 1630 3 is_stmt 1 view .LVU2160 - 6746 .LBB515: - 6747 .LBI515: + 7884 .loc 3 1592 10 view .LVU2498 + 7885 004a 0292 str r2, [sp, #8] + 7886 .loc 3 1593 3 is_stmt 1 view .LVU2499 + 7887 004c 029A ldr r2, [sp, #8] + 7888 .LVL684: + 7889 .loc 3 1593 3 is_stmt 0 view .LVU2500 + 7890 .LBE587: + 7891 .LBE586: +1761:Src/main.c **** /**USART1 GPIO Configuration + 7892 .loc 1 1761 3 is_stmt 1 view .LVU2501 + 7893 .LBB588: + 7894 .LBI588: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 6748 .loc 3 309 22 view .LVU2161 - 6749 .LBB516: + 7895 .loc 3 309 22 view .LVU2502 + 7896 .LBB589: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 6750 .loc 3 311 3 view .LVU2162 + 7897 .loc 3 311 3 view .LVU2503 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 6751 .loc 3 312 3 view .LVU2163 - 6752 004e 1A6B ldr r2, [r3, #48] - 6753 0050 42F00102 orr r2, r2, #1 - ARM GAS /tmp/ccO46DoU.s page 489 + 7898 .loc 3 312 3 view .LVU2504 + ARM GAS /tmp/ccYgfTud.s page 521 - 6754 0054 1A63 str r2, [r3, #48] + 7899 004e 1A6B ldr r2, [r3, #48] + 7900 0050 42F00102 orr r2, r2, #1 + 7901 0054 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6755 .loc 3 314 3 view .LVU2164 + 7902 .loc 3 314 3 view .LVU2505 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6756 .loc 3 314 12 is_stmt 0 view .LVU2165 - 6757 0056 1B6B ldr r3, [r3, #48] - 6758 0058 03F00103 and r3, r3, #1 + 7903 .loc 3 314 12 is_stmt 0 view .LVU2506 + 7904 0056 1B6B ldr r3, [r3, #48] + 7905 0058 03F00103 and r3, r3, #1 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6759 .loc 3 314 10 view .LVU2166 - 6760 005c 0193 str r3, [sp, #4] + 7906 .loc 3 314 10 view .LVU2507 + 7907 005c 0193 str r3, [sp, #4] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 6761 .loc 3 315 3 is_stmt 1 view .LVU2167 - 6762 005e 019B ldr r3, [sp, #4] - 6763 .LVL549: + 7908 .loc 3 315 3 is_stmt 1 view .LVU2508 + 7909 005e 019B ldr r3, [sp, #4] + 7910 .LVL685: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 6764 .loc 3 315 3 is_stmt 0 view .LVU2168 - 6765 .LBE516: - 6766 .LBE515: -1635:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 6767 .loc 1 1635 3 is_stmt 1 view .LVU2169 -1635:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 6768 .loc 1 1635 23 is_stmt 0 view .LVU2170 - 6769 0060 4FF40073 mov r3, #512 - 6770 0064 2793 str r3, [sp, #156] -1636:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 6771 .loc 1 1636 3 is_stmt 1 view .LVU2171 -1636:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 6772 .loc 1 1636 24 is_stmt 0 view .LVU2172 - 6773 0066 4FF00208 mov r8, #2 - 6774 006a CDF8A080 str r8, [sp, #160] -1637:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 6775 .loc 1 1637 3 is_stmt 1 view .LVU2173 -1637:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 6776 .loc 1 1637 25 is_stmt 0 view .LVU2174 - 6777 006e 0327 movs r7, #3 - 6778 0070 2997 str r7, [sp, #164] -1638:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 6779 .loc 1 1638 3 is_stmt 1 view .LVU2175 -1638:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 6780 .loc 1 1638 30 is_stmt 0 view .LVU2176 - 6781 0072 0024 movs r4, #0 - 6782 0074 2A94 str r4, [sp, #168] -1639:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 6783 .loc 1 1639 3 is_stmt 1 view .LVU2177 -1639:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 6784 .loc 1 1639 24 is_stmt 0 view .LVU2178 - 6785 0076 2B94 str r4, [sp, #172] -1640:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 6786 .loc 1 1640 3 is_stmt 1 view .LVU2179 -1640:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 6787 .loc 1 1640 29 is_stmt 0 view .LVU2180 - 6788 0078 0726 movs r6, #7 - 6789 007a 2C96 str r6, [sp, #176] -1641:Src/main.c **** - 6790 .loc 1 1641 3 is_stmt 1 view .LVU2181 - 6791 007c 404D ldr r5, .L309+4 - 6792 007e 27A9 add r1, sp, #156 - ARM GAS /tmp/ccO46DoU.s page 490 + 7911 .loc 3 315 3 is_stmt 0 view .LVU2509 + 7912 .LBE589: + 7913 .LBE588: +1766:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 7914 .loc 1 1766 3 is_stmt 1 view .LVU2510 +1766:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 7915 .loc 1 1766 23 is_stmt 0 view .LVU2511 + 7916 0060 4FF40073 mov r3, #512 + 7917 0064 2793 str r3, [sp, #156] +1767:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 7918 .loc 1 1767 3 is_stmt 1 view .LVU2512 +1767:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 7919 .loc 1 1767 24 is_stmt 0 view .LVU2513 + 7920 0066 4FF00208 mov r8, #2 + 7921 006a CDF8A080 str r8, [sp, #160] +1768:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 7922 .loc 1 1768 3 is_stmt 1 view .LVU2514 +1768:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 7923 .loc 1 1768 25 is_stmt 0 view .LVU2515 + 7924 006e 0327 movs r7, #3 + 7925 0070 2997 str r7, [sp, #164] +1769:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 7926 .loc 1 1769 3 is_stmt 1 view .LVU2516 +1769:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 7927 .loc 1 1769 30 is_stmt 0 view .LVU2517 + 7928 0072 0024 movs r4, #0 + 7929 0074 2A94 str r4, [sp, #168] +1770:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 7930 .loc 1 1770 3 is_stmt 1 view .LVU2518 +1770:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 7931 .loc 1 1770 24 is_stmt 0 view .LVU2519 + 7932 0076 2B94 str r4, [sp, #172] +1771:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 7933 .loc 1 1771 3 is_stmt 1 view .LVU2520 +1771:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 7934 .loc 1 1771 29 is_stmt 0 view .LVU2521 + 7935 0078 0726 movs r6, #7 + 7936 007a 2C96 str r6, [sp, #176] +1772:Src/main.c **** + 7937 .loc 1 1772 3 is_stmt 1 view .LVU2522 + ARM GAS /tmp/ccYgfTud.s page 522 - 6793 0080 2846 mov r0, r5 - 6794 0082 FFF7FEFF bl LL_GPIO_Init - 6795 .LVL550: -1643:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 6796 .loc 1 1643 3 view .LVU2182 -1643:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 6797 .loc 1 1643 23 is_stmt 0 view .LVU2183 - 6798 0086 4FF48063 mov r3, #1024 - 6799 008a 2793 str r3, [sp, #156] -1644:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 6800 .loc 1 1644 3 is_stmt 1 view .LVU2184 -1644:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 6801 .loc 1 1644 24 is_stmt 0 view .LVU2185 - 6802 008c CDF8A080 str r8, [sp, #160] -1645:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 6803 .loc 1 1645 3 is_stmt 1 view .LVU2186 -1645:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 6804 .loc 1 1645 25 is_stmt 0 view .LVU2187 - 6805 0090 2997 str r7, [sp, #164] -1646:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 6806 .loc 1 1646 3 is_stmt 1 view .LVU2188 -1646:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 6807 .loc 1 1646 30 is_stmt 0 view .LVU2189 - 6808 0092 2A94 str r4, [sp, #168] -1647:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 6809 .loc 1 1647 3 is_stmt 1 view .LVU2190 -1647:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 6810 .loc 1 1647 24 is_stmt 0 view .LVU2191 - 6811 0094 2B94 str r4, [sp, #172] -1648:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 6812 .loc 1 1648 3 is_stmt 1 view .LVU2192 -1648:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 6813 .loc 1 1648 29 is_stmt 0 view .LVU2193 - 6814 0096 2C96 str r6, [sp, #176] -1649:Src/main.c **** - 6815 .loc 1 1649 3 is_stmt 1 view .LVU2194 - 6816 0098 27A9 add r1, sp, #156 - 6817 009a 2846 mov r0, r5 - 6818 009c FFF7FEFF bl LL_GPIO_Init - 6819 .LVL551: -1654:Src/main.c **** - 6820 .loc 1 1654 3 view .LVU2195 - 6821 .LBB517: - 6822 .LBI517: + 7938 007c 404D ldr r5, .L397+4 + 7939 007e 27A9 add r1, sp, #156 + 7940 0080 2846 mov r0, r5 + 7941 0082 FFF7FEFF bl LL_GPIO_Init + 7942 .LVL686: +1774:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 7943 .loc 1 1774 3 view .LVU2523 +1774:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 7944 .loc 1 1774 23 is_stmt 0 view .LVU2524 + 7945 0086 4FF48063 mov r3, #1024 + 7946 008a 2793 str r3, [sp, #156] +1775:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 7947 .loc 1 1775 3 is_stmt 1 view .LVU2525 +1775:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 7948 .loc 1 1775 24 is_stmt 0 view .LVU2526 + 7949 008c CDF8A080 str r8, [sp, #160] +1776:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 7950 .loc 1 1776 3 is_stmt 1 view .LVU2527 +1776:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 7951 .loc 1 1776 25 is_stmt 0 view .LVU2528 + 7952 0090 2997 str r7, [sp, #164] +1777:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 7953 .loc 1 1777 3 is_stmt 1 view .LVU2529 +1777:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 7954 .loc 1 1777 30 is_stmt 0 view .LVU2530 + 7955 0092 2A94 str r4, [sp, #168] +1778:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 7956 .loc 1 1778 3 is_stmt 1 view .LVU2531 +1778:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 7957 .loc 1 1778 24 is_stmt 0 view .LVU2532 + 7958 0094 2B94 str r4, [sp, #172] +1779:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 7959 .loc 1 1779 3 is_stmt 1 view .LVU2533 +1779:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 7960 .loc 1 1779 29 is_stmt 0 view .LVU2534 + 7961 0096 2C96 str r6, [sp, #176] +1780:Src/main.c **** + 7962 .loc 1 1780 3 is_stmt 1 view .LVU2535 + 7963 0098 27A9 add r1, sp, #156 + 7964 009a 2846 mov r0, r5 + 7965 009c FFF7FEFF bl LL_GPIO_Init + 7966 .LVL687: +1785:Src/main.c **** + 7967 .loc 1 1785 3 view .LVU2536 + 7968 .LBB590: + 7969 .LBI590: 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6823 .loc 6 1032 22 view .LVU2196 - 6824 .LBB518: + 7970 .loc 6 1032 22 view .LVU2537 + 7971 .LBB591: 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6825 .loc 6 1034 3 view .LVU2197 - 6826 00a0 384B ldr r3, .L309+8 - 6827 00a2 D3F8B820 ldr r2, [r3, #184] - 6828 00a6 22F0F052 bic r2, r2, #503316480 - 6829 00aa 42F00062 orr r2, r2, #134217728 - 6830 00ae C3F8B820 str r2, [r3, #184] - 6831 .LVL552: -1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6832 .loc 6 1034 3 is_stmt 0 view .LVU2198 - ARM GAS /tmp/ccO46DoU.s page 491 + 7972 .loc 6 1034 3 view .LVU2538 + 7973 00a0 384B ldr r3, .L397+8 + 7974 00a2 D3F8B820 ldr r2, [r3, #184] + 7975 00a6 22F0F052 bic r2, r2, #503316480 + 7976 00aa 42F00062 orr r2, r2, #134217728 + 7977 00ae C3F8B820 str r2, [r3, #184] + 7978 .LVL688: + ARM GAS /tmp/ccYgfTud.s page 523 - 6833 .LBE518: - 6834 .LBE517: -1656:Src/main.c **** - 6835 .loc 1 1656 3 is_stmt 1 view .LVU2199 - 6836 .LBB519: - 6837 .LBI519: +1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 7979 .loc 6 1034 3 is_stmt 0 view .LVU2539 + 7980 .LBE591: + 7981 .LBE590: +1787:Src/main.c **** + 7982 .loc 1 1787 3 is_stmt 1 view .LVU2540 + 7983 .LBB592: + 7984 .LBI592: 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6838 .loc 6 598 22 view .LVU2200 - 6839 .LBB520: + 7985 .loc 6 598 22 view .LVU2541 + 7986 .LBB593: 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6840 .loc 6 600 3 view .LVU2201 - 6841 00b2 D3F8B820 ldr r2, [r3, #184] - 6842 00b6 22F0C002 bic r2, r2, #192 - 6843 00ba 42F04002 orr r2, r2, #64 - 6844 00be C3F8B820 str r2, [r3, #184] - 6845 .LVL553: + 7987 .loc 6 600 3 view .LVU2542 + 7988 00b2 D3F8B820 ldr r2, [r3, #184] + 7989 00b6 22F0C002 bic r2, r2, #192 + 7990 00ba 42F04002 orr r2, r2, #64 + 7991 00be C3F8B820 str r2, [r3, #184] + 7992 .LVL689: 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6846 .loc 6 600 3 is_stmt 0 view .LVU2202 - 6847 .LBE520: - 6848 .LBE519: -1658:Src/main.c **** - 6849 .loc 1 1658 3 is_stmt 1 view .LVU2203 - 6850 .LBB521: - 6851 .LBI521: + 7993 .loc 6 600 3 is_stmt 0 view .LVU2543 + 7994 .LBE593: + 7995 .LBE592: +1789:Src/main.c **** + 7996 .loc 1 1789 3 is_stmt 1 view .LVU2544 + 7997 .LBB594: + 7998 .LBI594: 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6852 .loc 6 924 22 view .LVU2204 - 6853 .LBB522: + 7999 .loc 6 924 22 view .LVU2545 + 8000 .LBB595: 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6854 .loc 6 926 3 view .LVU2205 - 6855 00c2 D3F8B820 ldr r2, [r3, #184] - 6856 00c6 42F44032 orr r2, r2, #196608 - 6857 00ca C3F8B820 str r2, [r3, #184] - 6858 .LVL554: + 8001 .loc 6 926 3 view .LVU2546 + 8002 00c2 D3F8B820 ldr r2, [r3, #184] + 8003 00c6 42F44032 orr r2, r2, #196608 + 8004 00ca C3F8B820 str r2, [r3, #184] + 8005 .LVL690: 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6859 .loc 6 926 3 is_stmt 0 view .LVU2206 - 6860 .LBE522: - 6861 .LBE521: -1660:Src/main.c **** - 6862 .loc 1 1660 3 is_stmt 1 view .LVU2207 - 6863 .LBB523: - 6864 .LBI523: + 8006 .loc 6 926 3 is_stmt 0 view .LVU2547 + 8007 .LBE595: + 8008 .LBE594: +1791:Src/main.c **** + 8009 .loc 1 1791 3 is_stmt 1 view .LVU2548 + 8010 .LBB596: + 8011 .LBI596: 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6865 .loc 6 646 22 view .LVU2208 - 6866 .LBB524: + 8012 .loc 6 646 22 view .LVU2549 + 8013 .LBB597: 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6867 .loc 6 648 3 view .LVU2209 - 6868 00ce D3F8B820 ldr r2, [r3, #184] - 6869 00d2 22F49072 bic r2, r2, #288 - 6870 00d6 C3F8B820 str r2, [r3, #184] - 6871 .LVL555: + 8014 .loc 6 648 3 view .LVU2550 + 8015 00ce D3F8B820 ldr r2, [r3, #184] + 8016 00d2 22F49072 bic r2, r2, #288 + 8017 00d6 C3F8B820 str r2, [r3, #184] + 8018 .LVL691: 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6872 .loc 6 648 3 is_stmt 0 view .LVU2210 - 6873 .LBE524: - 6874 .LBE523: -1662:Src/main.c **** - 6875 .loc 1 1662 3 is_stmt 1 view .LVU2211 - 6876 .LBB525: - ARM GAS /tmp/ccO46DoU.s page 492 + 8019 .loc 6 648 3 is_stmt 0 view .LVU2551 + 8020 .LBE597: + 8021 .LBE596: +1793:Src/main.c **** + ARM GAS /tmp/ccYgfTud.s page 524 - 6877 .LBI525: + 8022 .loc 1 1793 3 is_stmt 1 view .LVU2552 + 8023 .LBB598: + 8024 .LBI598: 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6878 .loc 6 693 22 view .LVU2212 - 6879 .LBB526: + 8025 .loc 6 693 22 view .LVU2553 + 8026 .LBB599: 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6880 .loc 6 695 3 view .LVU2213 - 6881 00da D3F8B820 ldr r2, [r3, #184] - 6882 00de 22F40072 bic r2, r2, #512 - 6883 00e2 C3F8B820 str r2, [r3, #184] - 6884 .LVL556: + 8027 .loc 6 695 3 view .LVU2554 + 8028 00da D3F8B820 ldr r2, [r3, #184] + 8029 00de 22F40072 bic r2, r2, #512 + 8030 00e2 C3F8B820 str r2, [r3, #184] + 8031 .LVL692: 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6885 .loc 6 695 3 is_stmt 0 view .LVU2214 - 6886 .LBE526: - 6887 .LBE525: -1664:Src/main.c **** - 6888 .loc 1 1664 3 is_stmt 1 view .LVU2215 - 6889 .LBB527: - 6890 .LBI527: + 8032 .loc 6 695 3 is_stmt 0 view .LVU2555 + 8033 .LBE599: + 8034 .LBE598: +1795:Src/main.c **** + 8035 .loc 1 1795 3 is_stmt 1 view .LVU2556 + 8036 .LBB600: + 8037 .LBI600: 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6891 .loc 6 738 22 view .LVU2216 - 6892 .LBB528: + 8038 .loc 6 738 22 view .LVU2557 + 8039 .LBB601: 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6893 .loc 6 740 3 view .LVU2217 - 6894 00e6 D3F8B820 ldr r2, [r3, #184] - 6895 00ea 42F48062 orr r2, r2, #1024 - 6896 00ee C3F8B820 str r2, [r3, #184] - 6897 .LVL557: + 8040 .loc 6 740 3 view .LVU2558 + 8041 00e6 D3F8B820 ldr r2, [r3, #184] + 8042 00ea 42F48062 orr r2, r2, #1024 + 8043 00ee C3F8B820 str r2, [r3, #184] + 8044 .LVL693: 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6898 .loc 6 740 3 is_stmt 0 view .LVU2218 - 6899 .LBE528: - 6900 .LBE527: -1666:Src/main.c **** - 6901 .loc 1 1666 3 is_stmt 1 view .LVU2219 - 6902 .LBB529: - 6903 .LBI529: + 8045 .loc 6 740 3 is_stmt 0 view .LVU2559 + 8046 .LBE601: + 8047 .LBE600: +1797:Src/main.c **** + 8048 .loc 1 1797 3 is_stmt 1 view .LVU2560 + 8049 .LBB602: + 8050 .LBI602: 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6904 .loc 6 784 22 view .LVU2220 - 6905 .LBB530: + 8051 .loc 6 784 22 view .LVU2561 + 8052 .LBB603: 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6906 .loc 6 786 3 view .LVU2221 - 6907 00f2 D3F8B820 ldr r2, [r3, #184] - 6908 00f6 22F4C052 bic r2, r2, #6144 - 6909 00fa C3F8B820 str r2, [r3, #184] - 6910 .LVL558: + 8053 .loc 6 786 3 view .LVU2562 + 8054 00f2 D3F8B820 ldr r2, [r3, #184] + 8055 00f6 22F4C052 bic r2, r2, #6144 + 8056 00fa C3F8B820 str r2, [r3, #184] + 8057 .LVL694: 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6911 .loc 6 786 3 is_stmt 0 view .LVU2222 - 6912 .LBE530: - 6913 .LBE529: -1668:Src/main.c **** - 6914 .loc 1 1668 3 is_stmt 1 view .LVU2223 - 6915 .LBB531: - 6916 .LBI531: + 8058 .loc 6 786 3 is_stmt 0 view .LVU2563 + 8059 .LBE603: + 8060 .LBE602: +1799:Src/main.c **** + 8061 .loc 1 1799 3 is_stmt 1 view .LVU2564 + 8062 .LBB604: + 8063 .LBI604: 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6917 .loc 6 831 22 view .LVU2224 - 6918 .LBB532: - 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6919 .loc 6 833 3 view .LVU2225 - ARM GAS /tmp/ccO46DoU.s page 493 + 8064 .loc 6 831 22 view .LVU2565 + 8065 .LBB605: + ARM GAS /tmp/ccYgfTud.s page 525 - 6920 00fe D3F8B820 ldr r2, [r3, #184] - 6921 0102 22F4C042 bic r2, r2, #24576 - 6922 0106 C3F8B820 str r2, [r3, #184] - 6923 .LVL559: 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6924 .loc 6 833 3 is_stmt 0 view .LVU2226 - 6925 .LBE532: - 6926 .LBE531: -1670:Src/main.c **** - 6927 .loc 1 1670 3 is_stmt 1 view .LVU2227 - 6928 .LBB533: - 6929 .LBI533: + 8066 .loc 6 833 3 view .LVU2566 + 8067 00fe D3F8B820 ldr r2, [r3, #184] + 8068 0102 22F4C042 bic r2, r2, #24576 + 8069 0106 C3F8B820 str r2, [r3, #184] + 8070 .LVL695: + 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 8071 .loc 6 833 3 is_stmt 0 view .LVU2567 + 8072 .LBE605: + 8073 .LBE604: +1801:Src/main.c **** + 8074 .loc 1 1801 3 is_stmt 1 view .LVU2568 + 8075 .LBB606: + 8076 .LBI606: 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6930 .loc 6 1299 22 view .LVU2228 - 6931 .LBB534: + 8077 .loc 6 1299 22 view .LVU2569 + 8078 .LBB607: 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6932 .loc 6 1301 3 view .LVU2229 - 6933 010a D3F8CC20 ldr r2, [r3, #204] - 6934 010e 22F00402 bic r2, r2, #4 - 6935 0112 C3F8CC20 str r2, [r3, #204] - 6936 .LVL560: + 8079 .loc 6 1301 3 view .LVU2570 + 8080 010a D3F8CC20 ldr r2, [r3, #204] + 8081 010e 22F00402 bic r2, r2, #4 + 8082 0112 C3F8CC20 str r2, [r3, #204] + 8083 .LVL696: 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6937 .loc 6 1301 3 is_stmt 0 view .LVU2230 - 6938 .LBE534: - 6939 .LBE533: -1673:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); - 6940 .loc 1 1673 3 is_stmt 1 view .LVU2231 - 6941 .LBB535: - 6942 .LBI535: + 8084 .loc 6 1301 3 is_stmt 0 view .LVU2571 + 8085 .LBE607: + 8086 .LBE606: +1804:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); + 8087 .loc 1 1804 3 is_stmt 1 view .LVU2572 + 8088 .LBB608: + 8089 .LBI608: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 6943 .loc 2 1884 26 view .LVU2232 - 6944 .LBB536: + 8090 .loc 2 1884 26 view .LVU2573 + 8091 .LBB609: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 6945 .loc 2 1886 3 view .LVU2233 + 8092 .loc 2 1886 3 view .LVU2574 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 6946 .loc 2 1886 26 is_stmt 0 view .LVU2234 - 6947 0116 1C4B ldr r3, .L309+12 - 6948 0118 D868 ldr r0, [r3, #12] - 6949 .LBE536: - 6950 .LBE535: -1673:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); - 6951 .loc 1 1673 3 discriminator 1 view .LVU2235 - 6952 011a 2246 mov r2, r4 - 6953 011c 2146 mov r1, r4 - 6954 011e C0F30220 ubfx r0, r0, #8, #3 - 6955 0122 FFF7FEFF bl NVIC_EncodePriority - 6956 .LVL561: - 6957 .LBB537: - 6958 .LBI537: + 8093 .loc 2 1886 26 is_stmt 0 view .LVU2575 + 8094 0116 1C4B ldr r3, .L397+12 + 8095 0118 D868 ldr r0, [r3, #12] + 8096 .LBE609: + 8097 .LBE608: +1804:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); + 8098 .loc 1 1804 3 discriminator 1 view .LVU2576 + 8099 011a 2246 mov r2, r4 + 8100 011c 2146 mov r1, r4 + 8101 011e C0F30220 ubfx r0, r0, #8, #3 + 8102 0122 FFF7FEFF bl NVIC_EncodePriority + 8103 .LVL697: + 8104 .LBB610: + 8105 .LBI610: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 6959 .loc 2 2024 22 is_stmt 1 view .LVU2236 - 6960 .LBB538: + 8106 .loc 2 2024 22 is_stmt 1 view .LVU2577 + 8107 .LBB611: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 6961 .loc 2 2026 3 view .LVU2237 + 8108 .loc 2 2026 3 view .LVU2578 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6962 .loc 2 2028 5 view .LVU2238 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - ARM GAS /tmp/ccO46DoU.s page 494 + ARM GAS /tmp/ccYgfTud.s page 526 - 6963 .loc 2 2028 49 is_stmt 0 view .LVU2239 - 6964 0126 0001 lsls r0, r0, #4 - 6965 .LVL562: + 8109 .loc 2 2028 5 view .LVU2579 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6966 .loc 2 2028 49 view .LVU2240 - 6967 0128 C0B2 uxtb r0, r0 + 8110 .loc 2 2028 49 is_stmt 0 view .LVU2580 + 8111 0126 0001 lsls r0, r0, #4 + 8112 .LVL698: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6968 .loc 2 2028 47 view .LVU2241 - 6969 012a 184B ldr r3, .L309+16 - 6970 012c 83F82503 strb r0, [r3, #805] - 6971 .LVL563: + 8113 .loc 2 2028 49 view .LVU2581 + 8114 0128 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6972 .loc 2 2028 47 view .LVU2242 - 6973 .LBE538: - 6974 .LBE537: -1674:Src/main.c **** - 6975 .loc 1 1674 3 is_stmt 1 view .LVU2243 - 6976 .LBB539: - 6977 .LBI539: + 8115 .loc 2 2028 47 view .LVU2582 + 8116 012a 184B ldr r3, .L397+16 + 8117 012c 83F82503 strb r0, [r3, #805] + 8118 .LVL699: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 8119 .loc 2 2028 47 view .LVU2583 + 8120 .LBE611: + 8121 .LBE610: +1805:Src/main.c **** + 8122 .loc 1 1805 3 is_stmt 1 view .LVU2584 + 8123 .LBB612: + 8124 .LBI612: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 6978 .loc 2 1896 22 view .LVU2244 - 6979 .LBB540: + 8125 .loc 2 1896 22 view .LVU2585 + 8126 .LBB613: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 6980 .loc 2 1898 3 view .LVU2245 + 8127 .loc 2 1898 3 view .LVU2586 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6981 .loc 2 1900 5 view .LVU2246 + 8128 .loc 2 1900 5 view .LVU2587 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6982 .loc 2 1900 43 is_stmt 0 view .LVU2247 - 6983 0130 2022 movs r2, #32 - 6984 0132 5A60 str r2, [r3, #4] - 6985 .LVL564: + 8129 .loc 2 1900 43 is_stmt 0 view .LVU2588 + 8130 0130 2022 movs r2, #32 + 8131 0132 5A60 str r2, [r3, #4] + 8132 .LVL700: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6986 .loc 2 1900 43 view .LVU2248 - 6987 .LBE540: - 6988 .LBE539: -1679:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - 6989 .loc 1 1679 3 is_stmt 1 view .LVU2249 -1679:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - 6990 .loc 1 1679 29 is_stmt 0 view .LVU2250 - 6991 0134 4FF4E133 mov r3, #115200 - 6992 0138 2D93 str r3, [sp, #180] -1680:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - 6993 .loc 1 1680 3 is_stmt 1 view .LVU2251 -1680:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - 6994 .loc 1 1680 30 is_stmt 0 view .LVU2252 - 6995 013a 2E94 str r4, [sp, #184] -1681:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; - 6996 .loc 1 1681 3 is_stmt 1 view .LVU2253 -1681:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; - 6997 .loc 1 1681 29 is_stmt 0 view .LVU2254 - 6998 013c 2F94 str r4, [sp, #188] -1682:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - 6999 .loc 1 1682 3 is_stmt 1 view .LVU2255 -1682:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - 7000 .loc 1 1682 27 is_stmt 0 view .LVU2256 - 7001 013e 3094 str r4, [sp, #192] -1683:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; - ARM GAS /tmp/ccO46DoU.s page 495 + 8133 .loc 2 1900 43 view .LVU2589 + 8134 .LBE613: + 8135 .LBE612: +1810:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + 8136 .loc 1 1810 3 is_stmt 1 view .LVU2590 +1810:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + 8137 .loc 1 1810 29 is_stmt 0 view .LVU2591 + 8138 0134 4FF4E133 mov r3, #115200 + 8139 0138 2D93 str r3, [sp, #180] +1811:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + 8140 .loc 1 1811 3 is_stmt 1 view .LVU2592 +1811:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + 8141 .loc 1 1811 30 is_stmt 0 view .LVU2593 + 8142 013a 2E94 str r4, [sp, #184] +1812:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; + 8143 .loc 1 1812 3 is_stmt 1 view .LVU2594 +1812:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; + 8144 .loc 1 1812 29 is_stmt 0 view .LVU2595 + 8145 013c 2F94 str r4, [sp, #188] +1813:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + 8146 .loc 1 1813 3 is_stmt 1 view .LVU2596 +1813:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + 8147 .loc 1 1813 27 is_stmt 0 view .LVU2597 + ARM GAS /tmp/ccYgfTud.s page 527 - 7002 .loc 1 1683 3 is_stmt 1 view .LVU2257 -1683:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; - 7003 .loc 1 1683 38 is_stmt 0 view .LVU2258 - 7004 0140 0C23 movs r3, #12 - 7005 0142 3193 str r3, [sp, #196] -1684:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - 7006 .loc 1 1684 3 is_stmt 1 view .LVU2259 -1684:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - 7007 .loc 1 1684 40 is_stmt 0 view .LVU2260 - 7008 0144 3294 str r4, [sp, #200] -1685:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - 7009 .loc 1 1685 3 is_stmt 1 view .LVU2261 -1685:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - 7010 .loc 1 1685 33 is_stmt 0 view .LVU2262 - 7011 0146 3394 str r4, [sp, #204] -1686:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); - 7012 .loc 1 1686 3 is_stmt 1 view .LVU2263 - 7013 0148 04F18044 add r4, r4, #1073741824 - 7014 014c 04F58834 add r4, r4, #69632 - 7015 0150 2DA9 add r1, sp, #180 - 7016 0152 2046 mov r0, r4 - 7017 0154 FFF7FEFF bl LL_USART_Init - 7018 .LVL565: -1687:Src/main.c **** LL_USART_Enable(USART1); - 7019 .loc 1 1687 3 view .LVU2264 - 7020 .LBB541: - 7021 .LBI541: + 8148 013e 3094 str r4, [sp, #192] +1814:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + 8149 .loc 1 1814 3 is_stmt 1 view .LVU2598 +1814:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + 8150 .loc 1 1814 38 is_stmt 0 view .LVU2599 + 8151 0140 0C23 movs r3, #12 + 8152 0142 3193 str r3, [sp, #196] +1815:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + 8153 .loc 1 1815 3 is_stmt 1 view .LVU2600 +1815:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + 8154 .loc 1 1815 40 is_stmt 0 view .LVU2601 + 8155 0144 3294 str r4, [sp, #200] +1816:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + 8156 .loc 1 1816 3 is_stmt 1 view .LVU2602 +1816:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + 8157 .loc 1 1816 33 is_stmt 0 view .LVU2603 + 8158 0146 3394 str r4, [sp, #204] +1817:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); + 8159 .loc 1 1817 3 is_stmt 1 view .LVU2604 + 8160 0148 04F18044 add r4, r4, #1073741824 + 8161 014c 04F58834 add r4, r4, #69632 + 8162 0150 2DA9 add r1, sp, #180 + 8163 0152 2046 mov r0, r4 + 8164 0154 FFF7FEFF bl LL_USART_Init + 8165 .LVL701: +1818:Src/main.c **** LL_USART_Enable(USART1); + 8166 .loc 1 1818 3 view .LVU2605 + 8167 .LBB614: + 8168 .LBI614: 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 7022 .loc 7 2320 22 view .LVU2265 - 7023 .LBB542: + 8169 .loc 7 2320 22 view .LVU2606 + 8170 .LBB615: 2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); - 7024 .loc 7 2326 3 view .LVU2266 - 7025 0158 6368 ldr r3, [r4, #4] - 7026 015a 23F49043 bic r3, r3, #18432 - 7027 015e 6360 str r3, [r4, #4] + 8171 .loc 7 2326 3 view .LVU2607 + 8172 0158 6368 ldr r3, [r4, #4] + 8173 015a 23F49043 bic r3, r3, #18432 + 8174 015e 6360 str r3, [r4, #4] 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7028 .loc 7 2327 3 view .LVU2267 - 7029 0160 A368 ldr r3, [r4, #8] - 7030 0162 23F02A03 bic r3, r3, #42 - 7031 0166 A360 str r3, [r4, #8] - 7032 .LVL566: + 8175 .loc 7 2327 3 view .LVU2608 + 8176 0160 A368 ldr r3, [r4, #8] + 8177 0162 23F02A03 bic r3, r3, #42 + 8178 0166 A360 str r3, [r4, #8] + 8179 .LVL702: 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7033 .loc 7 2327 3 is_stmt 0 view .LVU2268 - 7034 .LBE542: - 7035 .LBE541: -1688:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ - 7036 .loc 1 1688 3 is_stmt 1 view .LVU2269 - 7037 .LBB543: - 7038 .LBI543: + 8180 .loc 7 2327 3 is_stmt 0 view .LVU2609 + 8181 .LBE615: + 8182 .LBE614: +1819:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ + 8183 .loc 1 1819 3 is_stmt 1 view .LVU2610 + 8184 .LBB616: + 8185 .LBI616: 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 7039 .loc 7 560 22 view .LVU2270 - 7040 .LBB544: + 8186 .loc 7 560 22 view .LVU2611 + 8187 .LBB617: 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7041 .loc 7 562 3 view .LVU2271 - 7042 0168 2368 ldr r3, [r4] - 7043 016a 43F00103 orr r3, r3, #1 - 7044 016e 2360 str r3, [r4] - ARM GAS /tmp/ccO46DoU.s page 496 + 8188 .loc 7 562 3 view .LVU2612 + 8189 0168 2368 ldr r3, [r4] + ARM GAS /tmp/ccYgfTud.s page 528 - 7045 .LVL567: + 8190 016a 43F00103 orr r3, r3, #1 + 8191 016e 2360 str r3, [r4] + 8192 .LVL703: 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7046 .loc 7 562 3 is_stmt 0 view .LVU2272 - 7047 .LBE544: - 7048 .LBE543: + 8193 .loc 7 562 3 is_stmt 0 view .LVU2613 + 8194 .LBE617: + 8195 .LBE616: +1824:Src/main.c **** + 8196 .loc 1 1824 1 view .LVU2614 + 8197 0170 34B0 add sp, sp, #208 + 8198 .LCFI75: + 8199 .cfi_remember_state + 8200 .cfi_def_cfa_offset 24 + 8201 @ sp needed + 8202 0172 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 8203 .L396: + 8204 .LCFI76: + 8205 .cfi_restore_state +1755:Src/main.c **** } + 8206 .loc 1 1755 5 is_stmt 1 view .LVU2615 + 8207 0176 FFF7FEFF bl Error_Handler + 8208 .LVL704: + 8209 .L398: + 8210 017a 00BF .align 2 + 8211 .L397: + 8212 017c 00380240 .word 1073887232 + 8213 0180 00000240 .word 1073872896 + 8214 0184 00640240 .word 1073898496 + 8215 0188 00ED00E0 .word -536810240 + 8216 018c 00E100E0 .word -536813312 + 8217 .cfi_endproc + 8218 .LFE1204: + 8220 .section .text.MX_TIM10_Init,"ax",%progbits + 8221 .align 1 + 8222 .syntax unified + 8223 .thumb + 8224 .thumb_func + 8226 MX_TIM10_Init: + 8227 .LFB1201: +1626:Src/main.c **** + 8228 .loc 1 1626 1 view -0 + 8229 .cfi_startproc + 8230 @ args = 0, pretend = 0, frame = 0 + 8231 @ frame_needed = 0, uses_anonymous_args = 0 + 8232 0000 08B5 push {r3, lr} + 8233 .LCFI77: + 8234 .cfi_def_cfa_offset 8 + 8235 .cfi_offset 3, -8 + 8236 .cfi_offset 14, -4 +1635:Src/main.c **** htim10.Init.Prescaler = 183; + 8237 .loc 1 1635 3 view .LVU2617 +1635:Src/main.c **** htim10.Init.Prescaler = 183; + 8238 .loc 1 1635 19 is_stmt 0 view .LVU2618 + 8239 0002 0848 ldr r0, .L403 + 8240 0004 084B ldr r3, .L403+4 + 8241 0006 0360 str r3, [r0] +1636:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; + ARM GAS /tmp/ccYgfTud.s page 529 + + + 8242 .loc 1 1636 3 is_stmt 1 view .LVU2619 +1636:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; + 8243 .loc 1 1636 25 is_stmt 0 view .LVU2620 + 8244 0008 B723 movs r3, #183 + 8245 000a 4360 str r3, [r0, #4] +1637:Src/main.c **** htim10.Init.Period = 9; + 8246 .loc 1 1637 3 is_stmt 1 view .LVU2621 +1637:Src/main.c **** htim10.Init.Period = 9; + 8247 .loc 1 1637 27 is_stmt 0 view .LVU2622 + 8248 000c 0023 movs r3, #0 + 8249 000e 8360 str r3, [r0, #8] +1638:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8250 .loc 1 1638 3 is_stmt 1 view .LVU2623 +1638:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8251 .loc 1 1638 22 is_stmt 0 view .LVU2624 + 8252 0010 0922 movs r2, #9 + 8253 0012 C260 str r2, [r0, #12] +1639:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8254 .loc 1 1639 3 is_stmt 1 view .LVU2625 +1639:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8255 .loc 1 1639 29 is_stmt 0 view .LVU2626 + 8256 0014 0361 str r3, [r0, #16] +1640:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) + 8257 .loc 1 1640 3 is_stmt 1 view .LVU2627 +1640:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) + 8258 .loc 1 1640 33 is_stmt 0 view .LVU2628 + 8259 0016 8361 str r3, [r0, #24] +1641:Src/main.c **** { + 8260 .loc 1 1641 3 is_stmt 1 view .LVU2629 +1641:Src/main.c **** { + 8261 .loc 1 1641 7 is_stmt 0 view .LVU2630 + 8262 0018 FFF7FEFF bl HAL_TIM_Base_Init + 8263 .LVL705: +1641:Src/main.c **** { + 8264 .loc 1 1641 6 discriminator 1 view .LVU2631 + 8265 001c 00B9 cbnz r0, .L402 +1649:Src/main.c **** + 8266 .loc 1 1649 1 view .LVU2632 + 8267 001e 08BD pop {r3, pc} + 8268 .L402: +1643:Src/main.c **** } + 8269 .loc 1 1643 5 is_stmt 1 view .LVU2633 + 8270 0020 FFF7FEFF bl Error_Handler + 8271 .LVL706: + 8272 .L404: + 8273 .align 2 + 8274 .L403: + 8275 0024 00000000 .word htim10 + 8276 0028 00440140 .word 1073824768 + 8277 .cfi_endproc + 8278 .LFE1201: + 8280 .section .text.MX_UART8_Init,"ax",%progbits + 8281 .align 1 + 8282 .syntax unified + 8283 .thumb + 8284 .thumb_func + 8286 MX_UART8_Init: + ARM GAS /tmp/ccYgfTud.s page 530 + + + 8287 .LFB1203: +1703:Src/main.c **** + 8288 .loc 1 1703 1 view -0 + 8289 .cfi_startproc + 8290 @ args = 0, pretend = 0, frame = 0 + 8291 @ frame_needed = 0, uses_anonymous_args = 0 + 8292 0000 08B5 push {r3, lr} + 8293 .LCFI78: + 8294 .cfi_def_cfa_offset 8 + 8295 .cfi_offset 3, -8 + 8296 .cfi_offset 14, -4 +1712:Src/main.c **** huart8.Init.BaudRate = 115200; + 8297 .loc 1 1712 3 view .LVU2635 +1712:Src/main.c **** huart8.Init.BaudRate = 115200; + 8298 .loc 1 1712 19 is_stmt 0 view .LVU2636 + 8299 0002 0B48 ldr r0, .L409 + 8300 0004 0B4B ldr r3, .L409+4 + 8301 0006 0360 str r3, [r0] +1713:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; + 8302 .loc 1 1713 3 is_stmt 1 view .LVU2637 +1713:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; + 8303 .loc 1 1713 24 is_stmt 0 view .LVU2638 + 8304 0008 4FF4E133 mov r3, #115200 + 8305 000c 4360 str r3, [r0, #4] +1714:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; + 8306 .loc 1 1714 3 is_stmt 1 view .LVU2639 +1714:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; + 8307 .loc 1 1714 26 is_stmt 0 view .LVU2640 + 8308 000e 0023 movs r3, #0 + 8309 0010 8360 str r3, [r0, #8] +1715:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; + 8310 .loc 1 1715 3 is_stmt 1 view .LVU2641 +1715:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; + 8311 .loc 1 1715 24 is_stmt 0 view .LVU2642 + 8312 0012 C360 str r3, [r0, #12] +1716:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + 8313 .loc 1 1716 3 is_stmt 1 view .LVU2643 +1716:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + 8314 .loc 1 1716 22 is_stmt 0 view .LVU2644 + 8315 0014 0361 str r3, [r0, #16] +1717:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 8316 .loc 1 1717 3 is_stmt 1 view .LVU2645 +1717:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 8317 .loc 1 1717 20 is_stmt 0 view .LVU2646 + 8318 0016 0C22 movs r2, #12 + 8319 0018 4261 str r2, [r0, #20] +1718:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; + 8320 .loc 1 1718 3 is_stmt 1 view .LVU2647 +1718:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; + 8321 .loc 1 1718 25 is_stmt 0 view .LVU2648 + 8322 001a 8361 str r3, [r0, #24] +1719:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 8323 .loc 1 1719 3 is_stmt 1 view .LVU2649 +1719:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 8324 .loc 1 1719 28 is_stmt 0 view .LVU2650 + 8325 001c C361 str r3, [r0, #28] +1720:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + ARM GAS /tmp/ccYgfTud.s page 531 + + + 8326 .loc 1 1720 3 is_stmt 1 view .LVU2651 +1720:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 8327 .loc 1 1720 30 is_stmt 0 view .LVU2652 + 8328 001e 0362 str r3, [r0, #32] +1721:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) + 8329 .loc 1 1721 3 is_stmt 1 view .LVU2653 +1721:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) + 8330 .loc 1 1721 38 is_stmt 0 view .LVU2654 + 8331 0020 4362 str r3, [r0, #36] +1722:Src/main.c **** { + 8332 .loc 1 1722 3 is_stmt 1 view .LVU2655 +1722:Src/main.c **** { + 8333 .loc 1 1722 7 is_stmt 0 view .LVU2656 + 8334 0022 FFF7FEFF bl HAL_UART_Init + 8335 .LVL707: +1722:Src/main.c **** { + 8336 .loc 1 1722 6 discriminator 1 view .LVU2657 + 8337 0026 00B9 cbnz r0, .L408 +1730:Src/main.c **** + 8338 .loc 1 1730 1 view .LVU2658 + 8339 0028 08BD pop {r3, pc} + 8340 .L408: +1724:Src/main.c **** } + 8341 .loc 1 1724 5 is_stmt 1 view .LVU2659 + 8342 002a FFF7FEFF bl Error_Handler + 8343 .LVL708: + 8344 .L410: + 8345 002e 00BF .align 2 + 8346 .L409: + 8347 0030 00000000 .word huart8 + 8348 0034 007C0040 .word 1073773568 + 8349 .cfi_endproc + 8350 .LFE1203: + 8352 .section .text.MX_TIM8_Init,"ax",%progbits + 8353 .align 1 + 8354 .syntax unified + 8355 .thumb + 8356 .thumb_func + 8358 MX_TIM8_Init: + 8359 .LFB1200: +1579:Src/main.c **** + 8360 .loc 1 1579 1 view -0 + 8361 .cfi_startproc + 8362 @ args = 0, pretend = 0, frame = 32 + 8363 @ frame_needed = 0, uses_anonymous_args = 0 + 8364 0000 00B5 push {lr} + 8365 .LCFI79: + 8366 .cfi_def_cfa_offset 4 + 8367 .cfi_offset 14, -4 + 8368 0002 89B0 sub sp, sp, #36 + 8369 .LCFI80: + 8370 .cfi_def_cfa_offset 40 +1585:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 8371 .loc 1 1585 3 view .LVU2661 +1585:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 8372 .loc 1 1585 26 is_stmt 0 view .LVU2662 + 8373 0004 0023 movs r3, #0 + ARM GAS /tmp/ccYgfTud.s page 532 + + + 8374 0006 0493 str r3, [sp, #16] + 8375 0008 0593 str r3, [sp, #20] + 8376 000a 0693 str r3, [sp, #24] + 8377 000c 0793 str r3, [sp, #28] +1586:Src/main.c **** + 8378 .loc 1 1586 3 is_stmt 1 view .LVU2663 +1586:Src/main.c **** + 8379 .loc 1 1586 27 is_stmt 0 view .LVU2664 + 8380 000e 0193 str r3, [sp, #4] + 8381 0010 0293 str r3, [sp, #8] + 8382 0012 0393 str r3, [sp, #12] +1591:Src/main.c **** htim8.Init.Prescaler = 0; + 8383 .loc 1 1591 3 is_stmt 1 view .LVU2665 +1591:Src/main.c **** htim8.Init.Prescaler = 0; + 8384 .loc 1 1591 18 is_stmt 0 view .LVU2666 + 8385 0014 1348 ldr r0, .L419 + 8386 0016 144A ldr r2, .L419+4 + 8387 0018 0260 str r2, [r0] +1592:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + 8388 .loc 1 1592 3 is_stmt 1 view .LVU2667 +1592:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + 8389 .loc 1 1592 24 is_stmt 0 view .LVU2668 + 8390 001a 4360 str r3, [r0, #4] +1593:Src/main.c **** htim8.Init.Period = 91; + 8391 .loc 1 1593 3 is_stmt 1 view .LVU2669 +1593:Src/main.c **** htim8.Init.Period = 91; + 8392 .loc 1 1593 26 is_stmt 0 view .LVU2670 + 8393 001c 8360 str r3, [r0, #8] +1594:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8394 .loc 1 1594 3 is_stmt 1 view .LVU2671 +1594:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8395 .loc 1 1594 21 is_stmt 0 view .LVU2672 + 8396 001e 5B22 movs r2, #91 + 8397 0020 C260 str r2, [r0, #12] +1595:Src/main.c **** htim8.Init.RepetitionCounter = 0; + 8398 .loc 1 1595 3 is_stmt 1 view .LVU2673 +1595:Src/main.c **** htim8.Init.RepetitionCounter = 0; + 8399 .loc 1 1595 28 is_stmt 0 view .LVU2674 + 8400 0022 0361 str r3, [r0, #16] +1596:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8401 .loc 1 1596 3 is_stmt 1 view .LVU2675 +1596:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8402 .loc 1 1596 32 is_stmt 0 view .LVU2676 + 8403 0024 4361 str r3, [r0, #20] +1597:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) + 8404 .loc 1 1597 3 is_stmt 1 view .LVU2677 +1597:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) + 8405 .loc 1 1597 32 is_stmt 0 view .LVU2678 + 8406 0026 8361 str r3, [r0, #24] +1598:Src/main.c **** { + 8407 .loc 1 1598 3 is_stmt 1 view .LVU2679 +1598:Src/main.c **** { + 8408 .loc 1 1598 7 is_stmt 0 view .LVU2680 + 8409 0028 FFF7FEFF bl HAL_TIM_Base_Init + 8410 .LVL709: +1598:Src/main.c **** { + 8411 .loc 1 1598 6 discriminator 1 view .LVU2681 + ARM GAS /tmp/ccYgfTud.s page 533 + + + 8412 002c 98B9 cbnz r0, .L416 +1602:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + 8413 .loc 1 1602 3 is_stmt 1 view .LVU2682 +1602:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + 8414 .loc 1 1602 34 is_stmt 0 view .LVU2683 + 8415 002e 4FF48053 mov r3, #4096 + 8416 0032 0493 str r3, [sp, #16] +1603:Src/main.c **** { + 8417 .loc 1 1603 3 is_stmt 1 view .LVU2684 +1603:Src/main.c **** { + 8418 .loc 1 1603 7 is_stmt 0 view .LVU2685 + 8419 0034 04A9 add r1, sp, #16 + 8420 0036 0B48 ldr r0, .L419 + 8421 0038 FFF7FEFF bl HAL_TIM_ConfigClockSource + 8422 .LVL710: +1603:Src/main.c **** { + 8423 .loc 1 1603 6 discriminator 1 view .LVU2686 + 8424 003c 68B9 cbnz r0, .L417 +1607:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 8425 .loc 1 1607 3 is_stmt 1 view .LVU2687 +1607:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 8426 .loc 1 1607 37 is_stmt 0 view .LVU2688 + 8427 003e 0023 movs r3, #0 + 8428 0040 0193 str r3, [sp, #4] +1608:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 8429 .loc 1 1608 3 is_stmt 1 view .LVU2689 +1608:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 8430 .loc 1 1608 38 is_stmt 0 view .LVU2690 + 8431 0042 0293 str r3, [sp, #8] +1609:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) + 8432 .loc 1 1609 3 is_stmt 1 view .LVU2691 +1609:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) + 8433 .loc 1 1609 33 is_stmt 0 view .LVU2692 + 8434 0044 0393 str r3, [sp, #12] +1610:Src/main.c **** { + 8435 .loc 1 1610 3 is_stmt 1 view .LVU2693 +1610:Src/main.c **** { + 8436 .loc 1 1610 7 is_stmt 0 view .LVU2694 + 8437 0046 01A9 add r1, sp, #4 + 8438 0048 0648 ldr r0, .L419 + 8439 004a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 8440 .LVL711: +1610:Src/main.c **** { + 8441 .loc 1 1610 6 discriminator 1 view .LVU2695 + 8442 004e 30B9 cbnz r0, .L418 +1618:Src/main.c **** + 8443 .loc 1 1618 1 view .LVU2696 + 8444 0050 09B0 add sp, sp, #36 + 8445 .LCFI81: + 8446 .cfi_remember_state + 8447 .cfi_def_cfa_offset 4 + 8448 @ sp needed + 8449 0052 5DF804FB ldr pc, [sp], #4 + 8450 .L416: + 8451 .LCFI82: + 8452 .cfi_restore_state +1600:Src/main.c **** } + ARM GAS /tmp/ccYgfTud.s page 534 + + + 8453 .loc 1 1600 5 is_stmt 1 view .LVU2697 + 8454 0056 FFF7FEFF bl Error_Handler + 8455 .LVL712: + 8456 .L417: +1605:Src/main.c **** } + 8457 .loc 1 1605 5 view .LVU2698 + 8458 005a FFF7FEFF bl Error_Handler + 8459 .LVL713: + 8460 .L418: +1612:Src/main.c **** } + 8461 .loc 1 1612 5 view .LVU2699 + 8462 005e FFF7FEFF bl Error_Handler + 8463 .LVL714: + 8464 .L420: + 8465 0062 00BF .align 2 + 8466 .L419: + 8467 0064 00000000 .word htim8 + 8468 0068 00040140 .word 1073808384 + 8469 .cfi_endproc + 8470 .LFE1200: + 8472 .section .text.MX_TIM11_Init,"ax",%progbits + 8473 .align 1 + 8474 .syntax unified + 8475 .thumb + 8476 .thumb_func + 8478 MX_TIM11_Init: + 8479 .LFB1202: +1657:Src/main.c **** + 8480 .loc 1 1657 1 view -0 + 8481 .cfi_startproc + 8482 @ args = 0, pretend = 0, frame = 32 + 8483 @ frame_needed = 0, uses_anonymous_args = 0 + 8484 0000 00B5 push {lr} + 8485 .LCFI83: + 8486 .cfi_def_cfa_offset 4 + 8487 .cfi_offset 14, -4 + 8488 0002 89B0 sub sp, sp, #36 + 8489 .LCFI84: + 8490 .cfi_def_cfa_offset 40 +1663:Src/main.c **** + 8491 .loc 1 1663 3 view .LVU2701 +1663:Src/main.c **** + 8492 .loc 1 1663 22 is_stmt 0 view .LVU2702 + 8493 0004 0023 movs r3, #0 + 8494 0006 0193 str r3, [sp, #4] + 8495 0008 0293 str r3, [sp, #8] + 8496 000a 0393 str r3, [sp, #12] + 8497 000c 0493 str r3, [sp, #16] + 8498 000e 0593 str r3, [sp, #20] + 8499 0010 0693 str r3, [sp, #24] + 8500 0012 0793 str r3, [sp, #28] +1668:Src/main.c **** htim11.Init.Prescaler = 1; + 8501 .loc 1 1668 3 is_stmt 1 view .LVU2703 +1668:Src/main.c **** htim11.Init.Prescaler = 1; + 8502 .loc 1 1668 19 is_stmt 0 view .LVU2704 + 8503 0014 1448 ldr r0, .L429 + 8504 0016 154A ldr r2, .L429+4 + ARM GAS /tmp/ccYgfTud.s page 535 + + + 8505 0018 0260 str r2, [r0] +1669:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + 8506 .loc 1 1669 3 is_stmt 1 view .LVU2705 +1669:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + 8507 .loc 1 1669 25 is_stmt 0 view .LVU2706 + 8508 001a 0122 movs r2, #1 + 8509 001c 4260 str r2, [r0, #4] +1670:Src/main.c **** htim11.Init.Period = 91; + 8510 .loc 1 1670 3 is_stmt 1 view .LVU2707 +1670:Src/main.c **** htim11.Init.Period = 91; + 8511 .loc 1 1670 27 is_stmt 0 view .LVU2708 + 8512 001e 8360 str r3, [r0, #8] +1671:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8513 .loc 1 1671 3 is_stmt 1 view .LVU2709 +1671:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8514 .loc 1 1671 22 is_stmt 0 view .LVU2710 + 8515 0020 5B22 movs r2, #91 + 8516 0022 C260 str r2, [r0, #12] +1672:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 8517 .loc 1 1672 3 is_stmt 1 view .LVU2711 +1672:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 8518 .loc 1 1672 29 is_stmt 0 view .LVU2712 + 8519 0024 0361 str r3, [r0, #16] +1673:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) + 8520 .loc 1 1673 3 is_stmt 1 view .LVU2713 +1673:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) + 8521 .loc 1 1673 33 is_stmt 0 view .LVU2714 + 8522 0026 8023 movs r3, #128 + 8523 0028 8361 str r3, [r0, #24] +1674:Src/main.c **** { + 8524 .loc 1 1674 3 is_stmt 1 view .LVU2715 +1674:Src/main.c **** { + 8525 .loc 1 1674 7 is_stmt 0 view .LVU2716 + 8526 002a FFF7FEFF bl HAL_TIM_Base_Init + 8527 .LVL715: +1674:Src/main.c **** { + 8528 .loc 1 1674 6 discriminator 1 view .LVU2717 + 8529 002e A8B9 cbnz r0, .L426 +1678:Src/main.c **** { + 8530 .loc 1 1678 3 is_stmt 1 view .LVU2718 +1678:Src/main.c **** { + 8531 .loc 1 1678 7 is_stmt 0 view .LVU2719 + 8532 0030 0D48 ldr r0, .L429 + 8533 0032 FFF7FEFF bl HAL_TIM_PWM_Init + 8534 .LVL716: +1678:Src/main.c **** { + 8535 .loc 1 1678 6 discriminator 1 view .LVU2720 + 8536 0036 98B9 cbnz r0, .L427 +1682:Src/main.c **** sConfigOC.Pulse = 91; + 8537 .loc 1 1682 3 is_stmt 1 view .LVU2721 +1682:Src/main.c **** sConfigOC.Pulse = 91; + 8538 .loc 1 1682 20 is_stmt 0 view .LVU2722 + 8539 0038 6023 movs r3, #96 + 8540 003a 0193 str r3, [sp, #4] +1683:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 8541 .loc 1 1683 3 is_stmt 1 view .LVU2723 +1683:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + ARM GAS /tmp/ccYgfTud.s page 536 + + + 8542 .loc 1 1683 19 is_stmt 0 view .LVU2724 + 8543 003c 5B23 movs r3, #91 + 8544 003e 0293 str r3, [sp, #8] +1684:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 8545 .loc 1 1684 3 is_stmt 1 view .LVU2725 +1684:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 8546 .loc 1 1684 24 is_stmt 0 view .LVU2726 + 8547 0040 0022 movs r2, #0 + 8548 0042 0392 str r2, [sp, #12] +1685:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 8549 .loc 1 1685 3 is_stmt 1 view .LVU2727 +1685:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 8550 .loc 1 1685 24 is_stmt 0 view .LVU2728 + 8551 0044 0592 str r2, [sp, #20] +1686:Src/main.c **** { + 8552 .loc 1 1686 3 is_stmt 1 view .LVU2729 +1686:Src/main.c **** { + 8553 .loc 1 1686 7 is_stmt 0 view .LVU2730 + 8554 0046 01A9 add r1, sp, #4 + 8555 0048 0748 ldr r0, .L429 + 8556 004a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 8557 .LVL717: +1686:Src/main.c **** { + 8558 .loc 1 1686 6 discriminator 1 view .LVU2731 + 8559 004e 48B9 cbnz r0, .L428 1693:Src/main.c **** - 7049 .loc 1 1693 1 view .LVU2273 - 7050 0170 34B0 add sp, sp, #208 - 7051 .LCFI60: - 7052 .cfi_remember_state - 7053 .cfi_def_cfa_offset 24 - 7054 @ sp needed - 7055 0172 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 7056 .L308: - 7057 .LCFI61: - 7058 .cfi_restore_state -1624:Src/main.c **** } - 7059 .loc 1 1624 5 is_stmt 1 view .LVU2274 - 7060 0176 FFF7FEFF bl Error_Handler - 7061 .LVL568: - 7062 .L310: - 7063 017a 00BF .align 2 - 7064 .L309: - 7065 017c 00380240 .word 1073887232 - 7066 0180 00000240 .word 1073872896 - 7067 0184 00640240 .word 1073898496 - 7068 0188 00ED00E0 .word -536810240 - 7069 018c 00E100E0 .word -536813312 - 7070 .cfi_endproc - 7071 .LFE1204: - 7073 .section .text.MX_TIM10_Init,"ax",%progbits - 7074 .align 1 - 7075 .syntax unified - 7076 .thumb - 7077 .thumb_func - 7079 MX_TIM10_Init: - 7080 .LFB1201: -1495:Src/main.c **** - 7081 .loc 1 1495 1 view -0 - 7082 .cfi_startproc - 7083 @ args = 0, pretend = 0, frame = 0 - 7084 @ frame_needed = 0, uses_anonymous_args = 0 - 7085 0000 08B5 push {r3, lr} - 7086 .LCFI62: - 7087 .cfi_def_cfa_offset 8 - 7088 .cfi_offset 3, -8 - 7089 .cfi_offset 14, -4 -1504:Src/main.c **** htim10.Init.Prescaler = 183; - 7090 .loc 1 1504 3 view .LVU2276 -1504:Src/main.c **** htim10.Init.Prescaler = 183; - 7091 .loc 1 1504 19 is_stmt 0 view .LVU2277 - 7092 0002 0848 ldr r0, .L315 - 7093 0004 084B ldr r3, .L315+4 - 7094 0006 0360 str r3, [r0] -1505:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; - 7095 .loc 1 1505 3 is_stmt 1 view .LVU2278 -1505:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; - ARM GAS /tmp/ccO46DoU.s page 497 + 8560 .loc 1 1693 3 is_stmt 1 view .LVU2732 + 8561 0050 0548 ldr r0, .L429 + 8562 0052 FFF7FEFF bl HAL_TIM_MspPostInit + 8563 .LVL718: +1695:Src/main.c **** + 8564 .loc 1 1695 1 is_stmt 0 view .LVU2733 + 8565 0056 09B0 add sp, sp, #36 + 8566 .LCFI85: + 8567 .cfi_remember_state + 8568 .cfi_def_cfa_offset 4 + 8569 @ sp needed + 8570 0058 5DF804FB ldr pc, [sp], #4 + 8571 .L426: + 8572 .LCFI86: + 8573 .cfi_restore_state +1676:Src/main.c **** } + 8574 .loc 1 1676 5 is_stmt 1 view .LVU2734 + 8575 005c FFF7FEFF bl Error_Handler + 8576 .LVL719: + 8577 .L427: +1680:Src/main.c **** } + 8578 .loc 1 1680 5 view .LVU2735 + 8579 0060 FFF7FEFF bl Error_Handler + 8580 .LVL720: + 8581 .L428: +1688:Src/main.c **** } + 8582 .loc 1 1688 5 view .LVU2736 + 8583 0064 FFF7FEFF bl Error_Handler + 8584 .LVL721: + 8585 .L430: + 8586 .align 2 + ARM GAS /tmp/ccYgfTud.s page 537 - 7096 .loc 1 1505 25 is_stmt 0 view .LVU2279 - 7097 0008 B723 movs r3, #183 - 7098 000a 4360 str r3, [r0, #4] -1506:Src/main.c **** htim10.Init.Period = 9; - 7099 .loc 1 1506 3 is_stmt 1 view .LVU2280 -1506:Src/main.c **** htim10.Init.Period = 9; - 7100 .loc 1 1506 27 is_stmt 0 view .LVU2281 - 7101 000c 0023 movs r3, #0 - 7102 000e 8360 str r3, [r0, #8] -1507:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7103 .loc 1 1507 3 is_stmt 1 view .LVU2282 -1507:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7104 .loc 1 1507 22 is_stmt 0 view .LVU2283 - 7105 0010 0922 movs r2, #9 - 7106 0012 C260 str r2, [r0, #12] -1508:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 7107 .loc 1 1508 3 is_stmt 1 view .LVU2284 -1508:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 7108 .loc 1 1508 29 is_stmt 0 view .LVU2285 - 7109 0014 0361 str r3, [r0, #16] -1509:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) - 7110 .loc 1 1509 3 is_stmt 1 view .LVU2286 -1509:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) - 7111 .loc 1 1509 33 is_stmt 0 view .LVU2287 - 7112 0016 8361 str r3, [r0, #24] -1510:Src/main.c **** { - 7113 .loc 1 1510 3 is_stmt 1 view .LVU2288 -1510:Src/main.c **** { - 7114 .loc 1 1510 7 is_stmt 0 view .LVU2289 - 7115 0018 FFF7FEFF bl HAL_TIM_Base_Init - 7116 .LVL569: -1510:Src/main.c **** { - 7117 .loc 1 1510 6 discriminator 1 view .LVU2290 - 7118 001c 00B9 cbnz r0, .L314 -1518:Src/main.c **** - 7119 .loc 1 1518 1 view .LVU2291 - 7120 001e 08BD pop {r3, pc} - 7121 .L314: -1512:Src/main.c **** } - 7122 .loc 1 1512 5 is_stmt 1 view .LVU2292 - 7123 0020 FFF7FEFF bl Error_Handler - 7124 .LVL570: - 7125 .L316: - 7126 .align 2 - 7127 .L315: - 7128 0024 00000000 .word htim10 - 7129 0028 00440140 .word 1073824768 - 7130 .cfi_endproc - 7131 .LFE1201: - 7133 .section .text.MX_UART8_Init,"ax",%progbits - 7134 .align 1 - 7135 .syntax unified - 7136 .thumb - 7137 .thumb_func - 7139 MX_UART8_Init: - 7140 .LFB1203: -1572:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 498 + 8587 .L429: + 8588 0068 00000000 .word htim11 + 8589 006c 00480140 .word 1073825792 + 8590 .cfi_endproc + 8591 .LFE1202: + 8593 .section .text.MX_TIM4_Init,"ax",%progbits + 8594 .align 1 + 8595 .syntax unified + 8596 .thumb + 8597 .thumb_func + 8599 MX_TIM4_Init: + 8600 .LFB1196: +1407:Src/main.c **** + 8601 .loc 1 1407 1 view -0 + 8602 .cfi_startproc + 8603 @ args = 0, pretend = 0, frame = 56 + 8604 @ frame_needed = 0, uses_anonymous_args = 0 + 8605 0000 00B5 push {lr} + 8606 .LCFI87: + 8607 .cfi_def_cfa_offset 4 + 8608 .cfi_offset 14, -4 + 8609 0002 8FB0 sub sp, sp, #60 + 8610 .LCFI88: + 8611 .cfi_def_cfa_offset 64 +1413:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 8612 .loc 1 1413 3 view .LVU2738 +1413:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 8613 .loc 1 1413 26 is_stmt 0 view .LVU2739 + 8614 0004 0023 movs r3, #0 + 8615 0006 0A93 str r3, [sp, #40] + 8616 0008 0B93 str r3, [sp, #44] + 8617 000a 0C93 str r3, [sp, #48] + 8618 000c 0D93 str r3, [sp, #52] +1414:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 8619 .loc 1 1414 3 is_stmt 1 view .LVU2740 +1414:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 8620 .loc 1 1414 27 is_stmt 0 view .LVU2741 + 8621 000e 0793 str r3, [sp, #28] + 8622 0010 0893 str r3, [sp, #32] + 8623 0012 0993 str r3, [sp, #36] +1415:Src/main.c **** + 8624 .loc 1 1415 3 is_stmt 1 view .LVU2742 +1415:Src/main.c **** + 8625 .loc 1 1415 22 is_stmt 0 view .LVU2743 + 8626 0014 0093 str r3, [sp] + 8627 0016 0193 str r3, [sp, #4] + 8628 0018 0293 str r3, [sp, #8] + 8629 001a 0393 str r3, [sp, #12] + 8630 001c 0493 str r3, [sp, #16] + 8631 001e 0593 str r3, [sp, #20] + 8632 0020 0693 str r3, [sp, #24] +1420:Src/main.c **** htim4.Init.Prescaler = 0; + 8633 .loc 1 1420 3 is_stmt 1 view .LVU2744 +1420:Src/main.c **** htim4.Init.Prescaler = 0; + 8634 .loc 1 1420 18 is_stmt 0 view .LVU2745 + 8635 0022 1E48 ldr r0, .L443 + 8636 0024 1E4A ldr r2, .L443+4 + ARM GAS /tmp/ccYgfTud.s page 538 - 7141 .loc 1 1572 1 view -0 - 7142 .cfi_startproc - 7143 @ args = 0, pretend = 0, frame = 0 - 7144 @ frame_needed = 0, uses_anonymous_args = 0 - 7145 0000 08B5 push {r3, lr} - 7146 .LCFI63: - 7147 .cfi_def_cfa_offset 8 - 7148 .cfi_offset 3, -8 - 7149 .cfi_offset 14, -4 -1581:Src/main.c **** huart8.Init.BaudRate = 115200; - 7150 .loc 1 1581 3 view .LVU2294 -1581:Src/main.c **** huart8.Init.BaudRate = 115200; - 7151 .loc 1 1581 19 is_stmt 0 view .LVU2295 - 7152 0002 0B48 ldr r0, .L321 - 7153 0004 0B4B ldr r3, .L321+4 - 7154 0006 0360 str r3, [r0] -1582:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; - 7155 .loc 1 1582 3 is_stmt 1 view .LVU2296 -1582:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; - 7156 .loc 1 1582 24 is_stmt 0 view .LVU2297 - 7157 0008 4FF4E133 mov r3, #115200 - 7158 000c 4360 str r3, [r0, #4] -1583:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; - 7159 .loc 1 1583 3 is_stmt 1 view .LVU2298 -1583:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; - 7160 .loc 1 1583 26 is_stmt 0 view .LVU2299 - 7161 000e 0023 movs r3, #0 - 7162 0010 8360 str r3, [r0, #8] -1584:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; - 7163 .loc 1 1584 3 is_stmt 1 view .LVU2300 -1584:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; - 7164 .loc 1 1584 24 is_stmt 0 view .LVU2301 - 7165 0012 C360 str r3, [r0, #12] -1585:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; - 7166 .loc 1 1585 3 is_stmt 1 view .LVU2302 -1585:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; - 7167 .loc 1 1585 22 is_stmt 0 view .LVU2303 - 7168 0014 0361 str r3, [r0, #16] -1586:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 7169 .loc 1 1586 3 is_stmt 1 view .LVU2304 -1586:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 7170 .loc 1 1586 20 is_stmt 0 view .LVU2305 - 7171 0016 0C22 movs r2, #12 - 7172 0018 4261 str r2, [r0, #20] -1587:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; - 7173 .loc 1 1587 3 is_stmt 1 view .LVU2306 -1587:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; - 7174 .loc 1 1587 25 is_stmt 0 view .LVU2307 - 7175 001a 8361 str r3, [r0, #24] -1588:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 7176 .loc 1 1588 3 is_stmt 1 view .LVU2308 -1588:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 7177 .loc 1 1588 28 is_stmt 0 view .LVU2309 - 7178 001c C361 str r3, [r0, #28] -1589:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 7179 .loc 1 1589 3 is_stmt 1 view .LVU2310 -1589:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - ARM GAS /tmp/ccO46DoU.s page 499 + 8637 0026 0260 str r2, [r0] +1421:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 8638 .loc 1 1421 3 is_stmt 1 view .LVU2746 +1421:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 8639 .loc 1 1421 24 is_stmt 0 view .LVU2747 + 8640 0028 4360 str r3, [r0, #4] +1422:Src/main.c **** htim4.Init.Period = 45; + 8641 .loc 1 1422 3 is_stmt 1 view .LVU2748 +1422:Src/main.c **** htim4.Init.Period = 45; + 8642 .loc 1 1422 26 is_stmt 0 view .LVU2749 + 8643 002a 8360 str r3, [r0, #8] +1423:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8644 .loc 1 1423 3 is_stmt 1 view .LVU2750 +1423:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 8645 .loc 1 1423 21 is_stmt 0 view .LVU2751 + 8646 002c 2D22 movs r2, #45 + 8647 002e C260 str r2, [r0, #12] +1424:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8648 .loc 1 1424 3 is_stmt 1 view .LVU2752 +1424:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 8649 .loc 1 1424 28 is_stmt 0 view .LVU2753 + 8650 0030 0361 str r3, [r0, #16] +1425:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + 8651 .loc 1 1425 3 is_stmt 1 view .LVU2754 +1425:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + 8652 .loc 1 1425 32 is_stmt 0 view .LVU2755 + 8653 0032 8361 str r3, [r0, #24] +1426:Src/main.c **** { + 8654 .loc 1 1426 3 is_stmt 1 view .LVU2756 +1426:Src/main.c **** { + 8655 .loc 1 1426 7 is_stmt 0 view .LVU2757 + 8656 0034 FFF7FEFF bl HAL_TIM_Base_Init + 8657 .LVL722: +1426:Src/main.c **** { + 8658 .loc 1 1426 6 discriminator 1 view .LVU2758 + 8659 0038 30BB cbnz r0, .L438 +1430:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + 8660 .loc 1 1430 3 is_stmt 1 view .LVU2759 +1430:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + 8661 .loc 1 1430 34 is_stmt 0 view .LVU2760 + 8662 003a 4FF48053 mov r3, #4096 + 8663 003e 0A93 str r3, [sp, #40] +1431:Src/main.c **** { + 8664 .loc 1 1431 3 is_stmt 1 view .LVU2761 +1431:Src/main.c **** { + 8665 .loc 1 1431 7 is_stmt 0 view .LVU2762 + 8666 0040 0AA9 add r1, sp, #40 + 8667 0042 1648 ldr r0, .L443 + 8668 0044 FFF7FEFF bl HAL_TIM_ConfigClockSource + 8669 .LVL723: +1431:Src/main.c **** { + 8670 .loc 1 1431 6 discriminator 1 view .LVU2763 + 8671 0048 00BB cbnz r0, .L439 +1435:Src/main.c **** { + 8672 .loc 1 1435 3 is_stmt 1 view .LVU2764 +1435:Src/main.c **** { + 8673 .loc 1 1435 7 is_stmt 0 view .LVU2765 + ARM GAS /tmp/ccYgfTud.s page 539 - 7180 .loc 1 1589 30 is_stmt 0 view .LVU2311 - 7181 001e 0362 str r3, [r0, #32] -1590:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) - 7182 .loc 1 1590 3 is_stmt 1 view .LVU2312 -1590:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) - 7183 .loc 1 1590 38 is_stmt 0 view .LVU2313 - 7184 0020 4362 str r3, [r0, #36] -1591:Src/main.c **** { - 7185 .loc 1 1591 3 is_stmt 1 view .LVU2314 -1591:Src/main.c **** { - 7186 .loc 1 1591 7 is_stmt 0 view .LVU2315 - 7187 0022 FFF7FEFF bl HAL_UART_Init - 7188 .LVL571: -1591:Src/main.c **** { - 7189 .loc 1 1591 6 discriminator 1 view .LVU2316 - 7190 0026 00B9 cbnz r0, .L320 -1599:Src/main.c **** - 7191 .loc 1 1599 1 view .LVU2317 - 7192 0028 08BD pop {r3, pc} - 7193 .L320: -1593:Src/main.c **** } - 7194 .loc 1 1593 5 is_stmt 1 view .LVU2318 - 7195 002a FFF7FEFF bl Error_Handler - 7196 .LVL572: - 7197 .L322: - 7198 002e 00BF .align 2 - 7199 .L321: - 7200 0030 00000000 .word huart8 - 7201 0034 007C0040 .word 1073773568 - 7202 .cfi_endproc - 7203 .LFE1203: - 7205 .section .text.MX_TIM8_Init,"ax",%progbits - 7206 .align 1 - 7207 .syntax unified - 7208 .thumb - 7209 .thumb_func - 7211 MX_TIM8_Init: - 7212 .LFB1200: -1448:Src/main.c **** - 7213 .loc 1 1448 1 view -0 - 7214 .cfi_startproc - 7215 @ args = 0, pretend = 0, frame = 32 - 7216 @ frame_needed = 0, uses_anonymous_args = 0 - 7217 0000 00B5 push {lr} - 7218 .LCFI64: - 7219 .cfi_def_cfa_offset 4 - 7220 .cfi_offset 14, -4 - 7221 0002 89B0 sub sp, sp, #36 - 7222 .LCFI65: - 7223 .cfi_def_cfa_offset 40 -1454:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 7224 .loc 1 1454 3 view .LVU2320 -1454:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 7225 .loc 1 1454 26 is_stmt 0 view .LVU2321 - 7226 0004 0023 movs r3, #0 - 7227 0006 0493 str r3, [sp, #16] - 7228 0008 0593 str r3, [sp, #20] - ARM GAS /tmp/ccO46DoU.s page 500 + 8674 004a 1448 ldr r0, .L443 + 8675 004c FFF7FEFF bl HAL_TIM_PWM_Init + 8676 .LVL724: +1435:Src/main.c **** { + 8677 .loc 1 1435 6 discriminator 1 view .LVU2766 + 8678 0050 F0B9 cbnz r0, .L440 +1439:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 8679 .loc 1 1439 3 is_stmt 1 view .LVU2767 +1439:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 8680 .loc 1 1439 37 is_stmt 0 view .LVU2768 + 8681 0052 0023 movs r3, #0 + 8682 0054 0793 str r3, [sp, #28] +1440:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + 8683 .loc 1 1440 3 is_stmt 1 view .LVU2769 +1440:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + 8684 .loc 1 1440 33 is_stmt 0 view .LVU2770 + 8685 0056 0993 str r3, [sp, #36] +1441:Src/main.c **** { + 8686 .loc 1 1441 3 is_stmt 1 view .LVU2771 +1441:Src/main.c **** { + 8687 .loc 1 1441 7 is_stmt 0 view .LVU2772 + 8688 0058 07A9 add r1, sp, #28 + 8689 005a 1048 ldr r0, .L443 + 8690 005c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 8691 .LVL725: +1441:Src/main.c **** { + 8692 .loc 1 1441 6 discriminator 1 view .LVU2773 + 8693 0060 C0B9 cbnz r0, .L441 +1445:Src/main.c **** sConfigOC.Pulse = 22; + 8694 .loc 1 1445 3 is_stmt 1 view .LVU2774 +1445:Src/main.c **** sConfigOC.Pulse = 22; + 8695 .loc 1 1445 20 is_stmt 0 view .LVU2775 + 8696 0062 6023 movs r3, #96 + 8697 0064 0093 str r3, [sp] +1446:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 8698 .loc 1 1446 3 is_stmt 1 view .LVU2776 +1446:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 8699 .loc 1 1446 19 is_stmt 0 view .LVU2777 + 8700 0066 1623 movs r3, #22 + 8701 0068 0193 str r3, [sp, #4] +1447:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 8702 .loc 1 1447 3 is_stmt 1 view .LVU2778 +1447:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 8703 .loc 1 1447 24 is_stmt 0 view .LVU2779 + 8704 006a 0023 movs r3, #0 + 8705 006c 0293 str r3, [sp, #8] +1448:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 8706 .loc 1 1448 3 is_stmt 1 view .LVU2780 +1448:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 8707 .loc 1 1448 24 is_stmt 0 view .LVU2781 + 8708 006e 0493 str r3, [sp, #16] +1449:Src/main.c **** { + 8709 .loc 1 1449 3 is_stmt 1 view .LVU2782 +1449:Src/main.c **** { + 8710 .loc 1 1449 7 is_stmt 0 view .LVU2783 + 8711 0070 0822 movs r2, #8 + 8712 0072 6946 mov r1, sp + ARM GAS /tmp/ccYgfTud.s page 540 - 7229 000a 0693 str r3, [sp, #24] - 7230 000c 0793 str r3, [sp, #28] -1455:Src/main.c **** - 7231 .loc 1 1455 3 is_stmt 1 view .LVU2322 -1455:Src/main.c **** - 7232 .loc 1 1455 27 is_stmt 0 view .LVU2323 - 7233 000e 0193 str r3, [sp, #4] - 7234 0010 0293 str r3, [sp, #8] - 7235 0012 0393 str r3, [sp, #12] -1460:Src/main.c **** htim8.Init.Prescaler = 0; - 7236 .loc 1 1460 3 is_stmt 1 view .LVU2324 -1460:Src/main.c **** htim8.Init.Prescaler = 0; - 7237 .loc 1 1460 18 is_stmt 0 view .LVU2325 - 7238 0014 1348 ldr r0, .L331 - 7239 0016 144A ldr r2, .L331+4 - 7240 0018 0260 str r2, [r0] -1461:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 7241 .loc 1 1461 3 is_stmt 1 view .LVU2326 -1461:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 7242 .loc 1 1461 24 is_stmt 0 view .LVU2327 - 7243 001a 4360 str r3, [r0, #4] -1462:Src/main.c **** htim8.Init.Period = 91; - 7244 .loc 1 1462 3 is_stmt 1 view .LVU2328 -1462:Src/main.c **** htim8.Init.Period = 91; - 7245 .loc 1 1462 26 is_stmt 0 view .LVU2329 - 7246 001c 8360 str r3, [r0, #8] -1463:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7247 .loc 1 1463 3 is_stmt 1 view .LVU2330 -1463:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7248 .loc 1 1463 21 is_stmt 0 view .LVU2331 - 7249 001e 5B22 movs r2, #91 - 7250 0020 C260 str r2, [r0, #12] -1464:Src/main.c **** htim8.Init.RepetitionCounter = 0; - 7251 .loc 1 1464 3 is_stmt 1 view .LVU2332 -1464:Src/main.c **** htim8.Init.RepetitionCounter = 0; - 7252 .loc 1 1464 28 is_stmt 0 view .LVU2333 - 7253 0022 0361 str r3, [r0, #16] -1465:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 7254 .loc 1 1465 3 is_stmt 1 view .LVU2334 -1465:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 7255 .loc 1 1465 32 is_stmt 0 view .LVU2335 - 7256 0024 4361 str r3, [r0, #20] -1466:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 7257 .loc 1 1466 3 is_stmt 1 view .LVU2336 -1466:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 7258 .loc 1 1466 32 is_stmt 0 view .LVU2337 - 7259 0026 8361 str r3, [r0, #24] -1467:Src/main.c **** { - 7260 .loc 1 1467 3 is_stmt 1 view .LVU2338 -1467:Src/main.c **** { - 7261 .loc 1 1467 7 is_stmt 0 view .LVU2339 - 7262 0028 FFF7FEFF bl HAL_TIM_Base_Init - 7263 .LVL573: -1467:Src/main.c **** { - 7264 .loc 1 1467 6 discriminator 1 view .LVU2340 - 7265 002c 98B9 cbnz r0, .L328 -1471:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - ARM GAS /tmp/ccO46DoU.s page 501 + 8713 0074 0948 ldr r0, .L443 + 8714 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 8715 .LVL726: +1449:Src/main.c **** { + 8716 .loc 1 1449 6 discriminator 1 view .LVU2784 + 8717 007a 68B9 cbnz r0, .L442 +1456:Src/main.c **** + 8718 .loc 1 1456 3 is_stmt 1 view .LVU2785 + 8719 007c 0748 ldr r0, .L443 + 8720 007e FFF7FEFF bl HAL_TIM_MspPostInit + 8721 .LVL727: +1458:Src/main.c **** + 8722 .loc 1 1458 1 is_stmt 0 view .LVU2786 + 8723 0082 0FB0 add sp, sp, #60 + 8724 .LCFI89: + 8725 .cfi_remember_state + 8726 .cfi_def_cfa_offset 4 + 8727 @ sp needed + 8728 0084 5DF804FB ldr pc, [sp], #4 + 8729 .L438: + 8730 .LCFI90: + 8731 .cfi_restore_state +1428:Src/main.c **** } + 8732 .loc 1 1428 5 is_stmt 1 view .LVU2787 + 8733 0088 FFF7FEFF bl Error_Handler + 8734 .LVL728: + 8735 .L439: +1433:Src/main.c **** } + 8736 .loc 1 1433 5 view .LVU2788 + 8737 008c FFF7FEFF bl Error_Handler + 8738 .LVL729: + 8739 .L440: +1437:Src/main.c **** } + 8740 .loc 1 1437 5 view .LVU2789 + 8741 0090 FFF7FEFF bl Error_Handler + 8742 .LVL730: + 8743 .L441: +1443:Src/main.c **** } + 8744 .loc 1 1443 5 view .LVU2790 + 8745 0094 FFF7FEFF bl Error_Handler + 8746 .LVL731: + 8747 .L442: +1451:Src/main.c **** } + 8748 .loc 1 1451 5 view .LVU2791 + 8749 0098 FFF7FEFF bl Error_Handler + 8750 .LVL732: + 8751 .L444: + 8752 .align 2 + 8753 .L443: + 8754 009c 00000000 .word htim4 + 8755 00a0 00080040 .word 1073743872 + 8756 .cfi_endproc + 8757 .LFE1196: + 8759 .section .text.SystemClock_Config,"ax",%progbits + 8760 .align 1 + 8761 .global SystemClock_Config + 8762 .syntax unified + ARM GAS /tmp/ccYgfTud.s page 541 - 7266 .loc 1 1471 3 is_stmt 1 view .LVU2341 -1471:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 7267 .loc 1 1471 34 is_stmt 0 view .LVU2342 - 7268 002e 4FF48053 mov r3, #4096 - 7269 0032 0493 str r3, [sp, #16] -1472:Src/main.c **** { - 7270 .loc 1 1472 3 is_stmt 1 view .LVU2343 -1472:Src/main.c **** { - 7271 .loc 1 1472 7 is_stmt 0 view .LVU2344 - 7272 0034 04A9 add r1, sp, #16 - 7273 0036 0B48 ldr r0, .L331 - 7274 0038 FFF7FEFF bl HAL_TIM_ConfigClockSource - 7275 .LVL574: -1472:Src/main.c **** { - 7276 .loc 1 1472 6 discriminator 1 view .LVU2345 - 7277 003c 68B9 cbnz r0, .L329 -1476:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 7278 .loc 1 1476 3 is_stmt 1 view .LVU2346 -1476:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 7279 .loc 1 1476 37 is_stmt 0 view .LVU2347 - 7280 003e 0023 movs r3, #0 - 7281 0040 0193 str r3, [sp, #4] -1477:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 7282 .loc 1 1477 3 is_stmt 1 view .LVU2348 -1477:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 7283 .loc 1 1477 38 is_stmt 0 view .LVU2349 - 7284 0042 0293 str r3, [sp, #8] -1478:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 7285 .loc 1 1478 3 is_stmt 1 view .LVU2350 -1478:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 7286 .loc 1 1478 33 is_stmt 0 view .LVU2351 - 7287 0044 0393 str r3, [sp, #12] -1479:Src/main.c **** { - 7288 .loc 1 1479 3 is_stmt 1 view .LVU2352 -1479:Src/main.c **** { - 7289 .loc 1 1479 7 is_stmt 0 view .LVU2353 - 7290 0046 01A9 add r1, sp, #4 - 7291 0048 0648 ldr r0, .L331 - 7292 004a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization - 7293 .LVL575: -1479:Src/main.c **** { - 7294 .loc 1 1479 6 discriminator 1 view .LVU2354 - 7295 004e 30B9 cbnz r0, .L330 -1487:Src/main.c **** - 7296 .loc 1 1487 1 view .LVU2355 - 7297 0050 09B0 add sp, sp, #36 - 7298 .LCFI66: - 7299 .cfi_remember_state - 7300 .cfi_def_cfa_offset 4 - 7301 @ sp needed - 7302 0052 5DF804FB ldr pc, [sp], #4 - 7303 .L328: - 7304 .LCFI67: - 7305 .cfi_restore_state -1469:Src/main.c **** } - 7306 .loc 1 1469 5 is_stmt 1 view .LVU2356 - 7307 0056 FFF7FEFF bl Error_Handler - ARM GAS /tmp/ccO46DoU.s page 502 + 8763 .thumb + 8764 .thumb_func + 8766 SystemClock_Config: + 8767 .LFB1187: + 885:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 8768 .loc 1 885 1 view -0 + 8769 .cfi_startproc + 8770 @ args = 0, pretend = 0, frame = 80 + 8771 @ frame_needed = 0, uses_anonymous_args = 0 + 8772 0000 00B5 push {lr} + 8773 .LCFI91: + 8774 .cfi_def_cfa_offset 4 + 8775 .cfi_offset 14, -4 + 8776 0002 95B0 sub sp, sp, #84 + 8777 .LCFI92: + 8778 .cfi_def_cfa_offset 88 + 886:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 8779 .loc 1 886 3 view .LVU2793 + 886:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 8780 .loc 1 886 22 is_stmt 0 view .LVU2794 + 8781 0004 3422 movs r2, #52 + 8782 0006 0021 movs r1, #0 + 8783 0008 07A8 add r0, sp, #28 + 8784 000a FFF7FEFF bl memset + 8785 .LVL733: + 887:Src/main.c **** + 8786 .loc 1 887 3 is_stmt 1 view .LVU2795 + 887:Src/main.c **** + 8787 .loc 1 887 22 is_stmt 0 view .LVU2796 + 8788 000e 0023 movs r3, #0 + 8789 0010 0293 str r3, [sp, #8] + 8790 0012 0393 str r3, [sp, #12] + 8791 0014 0493 str r3, [sp, #16] + 8792 0016 0593 str r3, [sp, #20] + 8793 0018 0693 str r3, [sp, #24] + 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 8794 .loc 1 891 3 is_stmt 1 view .LVU2797 + 8795 .LBB618: + 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 8796 .loc 1 891 3 view .LVU2798 + 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 8797 .loc 1 891 3 view .LVU2799 + 8798 001a 244B ldr r3, .L453 + 8799 001c 1A6C ldr r2, [r3, #64] + 8800 001e 42F08052 orr r2, r2, #268435456 + 8801 0022 1A64 str r2, [r3, #64] + 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 8802 .loc 1 891 3 view .LVU2800 + 8803 0024 1B6C ldr r3, [r3, #64] + 8804 0026 03F08053 and r3, r3, #268435456 + 8805 002a 0093 str r3, [sp] + 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 8806 .loc 1 891 3 view .LVU2801 + 8807 002c 009B ldr r3, [sp] + 8808 .LBE618: + 891:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 8809 .loc 1 891 3 view .LVU2802 + ARM GAS /tmp/ccYgfTud.s page 542 - 7308 .LVL576: - 7309 .L329: -1474:Src/main.c **** } - 7310 .loc 1 1474 5 view .LVU2357 - 7311 005a FFF7FEFF bl Error_Handler - 7312 .LVL577: - 7313 .L330: -1481:Src/main.c **** } - 7314 .loc 1 1481 5 view .LVU2358 - 7315 005e FFF7FEFF bl Error_Handler - 7316 .LVL578: - 7317 .L332: - 7318 0062 00BF .align 2 - 7319 .L331: - 7320 0064 00000000 .word htim8 - 7321 0068 00040140 .word 1073808384 - 7322 .cfi_endproc - 7323 .LFE1200: - 7325 .section .text.MX_TIM11_Init,"ax",%progbits - 7326 .align 1 - 7327 .syntax unified - 7328 .thumb - 7329 .thumb_func - 7331 MX_TIM11_Init: - 7332 .LFB1202: -1526:Src/main.c **** - 7333 .loc 1 1526 1 view -0 - 7334 .cfi_startproc - 7335 @ args = 0, pretend = 0, frame = 32 - 7336 @ frame_needed = 0, uses_anonymous_args = 0 - 7337 0000 00B5 push {lr} - 7338 .LCFI68: - 7339 .cfi_def_cfa_offset 4 - 7340 .cfi_offset 14, -4 - 7341 0002 89B0 sub sp, sp, #36 - 7342 .LCFI69: - 7343 .cfi_def_cfa_offset 40 -1532:Src/main.c **** - 7344 .loc 1 1532 3 view .LVU2360 -1532:Src/main.c **** - 7345 .loc 1 1532 22 is_stmt 0 view .LVU2361 - 7346 0004 0023 movs r3, #0 - 7347 0006 0193 str r3, [sp, #4] - 7348 0008 0293 str r3, [sp, #8] - 7349 000a 0393 str r3, [sp, #12] - 7350 000c 0493 str r3, [sp, #16] - 7351 000e 0593 str r3, [sp, #20] - 7352 0010 0693 str r3, [sp, #24] - 7353 0012 0793 str r3, [sp, #28] -1537:Src/main.c **** htim11.Init.Prescaler = 1; - 7354 .loc 1 1537 3 is_stmt 1 view .LVU2362 -1537:Src/main.c **** htim11.Init.Prescaler = 1; - 7355 .loc 1 1537 19 is_stmt 0 view .LVU2363 - 7356 0014 1448 ldr r0, .L341 - 7357 0016 154A ldr r2, .L341+4 - 7358 0018 0260 str r2, [r0] -1538:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - ARM GAS /tmp/ccO46DoU.s page 503 + 892:Src/main.c **** + 8810 .loc 1 892 3 view .LVU2803 + 8811 .LBB619: + 892:Src/main.c **** + 8812 .loc 1 892 3 view .LVU2804 + 892:Src/main.c **** + 8813 .loc 1 892 3 view .LVU2805 + 8814 002e 204B ldr r3, .L453+4 + 8815 0030 1A68 ldr r2, [r3] + 8816 0032 42F44042 orr r2, r2, #49152 + 8817 0036 1A60 str r2, [r3] + 892:Src/main.c **** + 8818 .loc 1 892 3 view .LVU2806 + 8819 0038 1B68 ldr r3, [r3] + 8820 003a 03F44043 and r3, r3, #49152 + 8821 003e 0193 str r3, [sp, #4] + 892:Src/main.c **** + 8822 .loc 1 892 3 view .LVU2807 + 8823 0040 019B ldr r3, [sp, #4] + 8824 .LBE619: + 892:Src/main.c **** + 8825 .loc 1 892 3 view .LVU2808 + 897:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 8826 .loc 1 897 3 view .LVU2809 + 897:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 8827 .loc 1 897 36 is_stmt 0 view .LVU2810 + 8828 0042 0123 movs r3, #1 + 8829 0044 0793 str r3, [sp, #28] + 898:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 8830 .loc 1 898 3 is_stmt 1 view .LVU2811 + 898:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 8831 .loc 1 898 30 is_stmt 0 view .LVU2812 + 8832 0046 4FF48033 mov r3, #65536 + 8833 004a 0893 str r3, [sp, #32] + 899:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 8834 .loc 1 899 3 is_stmt 1 view .LVU2813 + 899:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 8835 .loc 1 899 34 is_stmt 0 view .LVU2814 + 8836 004c 0223 movs r3, #2 + 8837 004e 0D93 str r3, [sp, #52] + 900:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 8838 .loc 1 900 3 is_stmt 1 view .LVU2815 + 900:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 8839 .loc 1 900 35 is_stmt 0 view .LVU2816 + 8840 0050 4FF48002 mov r2, #4194304 + 8841 0054 0E92 str r2, [sp, #56] + 901:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 8842 .loc 1 901 3 is_stmt 1 view .LVU2817 + 901:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 8843 .loc 1 901 30 is_stmt 0 view .LVU2818 + 8844 0056 1922 movs r2, #25 + 8845 0058 0F92 str r2, [sp, #60] + 902:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 8846 .loc 1 902 3 is_stmt 1 view .LVU2819 + 902:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 8847 .loc 1 902 30 is_stmt 0 view .LVU2820 + 8848 005a 4FF4B872 mov r2, #368 + ARM GAS /tmp/ccYgfTud.s page 543 - 7359 .loc 1 1538 3 is_stmt 1 view .LVU2364 -1538:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - 7360 .loc 1 1538 25 is_stmt 0 view .LVU2365 - 7361 001a 0122 movs r2, #1 - 7362 001c 4260 str r2, [r0, #4] -1539:Src/main.c **** htim11.Init.Period = 91; - 7363 .loc 1 1539 3 is_stmt 1 view .LVU2366 -1539:Src/main.c **** htim11.Init.Period = 91; - 7364 .loc 1 1539 27 is_stmt 0 view .LVU2367 - 7365 001e 8360 str r3, [r0, #8] -1540:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7366 .loc 1 1540 3 is_stmt 1 view .LVU2368 -1540:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7367 .loc 1 1540 22 is_stmt 0 view .LVU2369 - 7368 0020 5B22 movs r2, #91 - 7369 0022 C260 str r2, [r0, #12] -1541:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 7370 .loc 1 1541 3 is_stmt 1 view .LVU2370 -1541:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 7371 .loc 1 1541 29 is_stmt 0 view .LVU2371 - 7372 0024 0361 str r3, [r0, #16] -1542:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) - 7373 .loc 1 1542 3 is_stmt 1 view .LVU2372 -1542:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) - 7374 .loc 1 1542 33 is_stmt 0 view .LVU2373 - 7375 0026 8023 movs r3, #128 - 7376 0028 8361 str r3, [r0, #24] -1543:Src/main.c **** { - 7377 .loc 1 1543 3 is_stmt 1 view .LVU2374 -1543:Src/main.c **** { - 7378 .loc 1 1543 7 is_stmt 0 view .LVU2375 - 7379 002a FFF7FEFF bl HAL_TIM_Base_Init - 7380 .LVL579: -1543:Src/main.c **** { - 7381 .loc 1 1543 6 discriminator 1 view .LVU2376 - 7382 002e A8B9 cbnz r0, .L338 -1547:Src/main.c **** { - 7383 .loc 1 1547 3 is_stmt 1 view .LVU2377 -1547:Src/main.c **** { - 7384 .loc 1 1547 7 is_stmt 0 view .LVU2378 - 7385 0030 0D48 ldr r0, .L341 - 7386 0032 FFF7FEFF bl HAL_TIM_PWM_Init - 7387 .LVL580: -1547:Src/main.c **** { - 7388 .loc 1 1547 6 discriminator 1 view .LVU2379 - 7389 0036 98B9 cbnz r0, .L339 -1551:Src/main.c **** sConfigOC.Pulse = 91; - 7390 .loc 1 1551 3 is_stmt 1 view .LVU2380 -1551:Src/main.c **** sConfigOC.Pulse = 91; - 7391 .loc 1 1551 20 is_stmt 0 view .LVU2381 - 7392 0038 6023 movs r3, #96 - 7393 003a 0193 str r3, [sp, #4] -1552:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 7394 .loc 1 1552 3 is_stmt 1 view .LVU2382 -1552:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 7395 .loc 1 1552 19 is_stmt 0 view .LVU2383 - 7396 003c 5B23 movs r3, #91 - ARM GAS /tmp/ccO46DoU.s page 504 + 8849 005e 1092 str r2, [sp, #64] + 903:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 8850 .loc 1 903 3 is_stmt 1 view .LVU2821 + 903:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 8851 .loc 1 903 30 is_stmt 0 view .LVU2822 + 8852 0060 1193 str r3, [sp, #68] + 904:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 8853 .loc 1 904 3 is_stmt 1 view .LVU2823 + 904:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 8854 .loc 1 904 30 is_stmt 0 view .LVU2824 + 8855 0062 0822 movs r2, #8 + 8856 0064 1292 str r2, [sp, #72] + 905:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 8857 .loc 1 905 3 is_stmt 1 view .LVU2825 + 905:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 8858 .loc 1 905 30 is_stmt 0 view .LVU2826 + 8859 0066 1393 str r3, [sp, #76] + 906:Src/main.c **** { + 8860 .loc 1 906 3 is_stmt 1 view .LVU2827 + 906:Src/main.c **** { + 8861 .loc 1 906 7 is_stmt 0 view .LVU2828 + 8862 0068 07A8 add r0, sp, #28 + 8863 006a FFF7FEFF bl HAL_RCC_OscConfig + 8864 .LVL734: + 906:Src/main.c **** { + 8865 .loc 1 906 6 discriminator 1 view .LVU2829 + 8866 006e B0B9 cbnz r0, .L450 + 913:Src/main.c **** { + 8867 .loc 1 913 3 is_stmt 1 view .LVU2830 + 913:Src/main.c **** { + 8868 .loc 1 913 7 is_stmt 0 view .LVU2831 + 8869 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive + 8870 .LVL735: + 913:Src/main.c **** { + 8871 .loc 1 913 6 discriminator 1 view .LVU2832 + 8872 0074 A8B9 cbnz r0, .L451 + 920:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 8873 .loc 1 920 3 is_stmt 1 view .LVU2833 + 920:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 8874 .loc 1 920 31 is_stmt 0 view .LVU2834 + 8875 0076 0F23 movs r3, #15 + 8876 0078 0293 str r3, [sp, #8] + 922:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 8877 .loc 1 922 3 is_stmt 1 view .LVU2835 + 922:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 8878 .loc 1 922 34 is_stmt 0 view .LVU2836 + 8879 007a 0223 movs r3, #2 + 8880 007c 0393 str r3, [sp, #12] + 923:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 8881 .loc 1 923 3 is_stmt 1 view .LVU2837 + 923:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 8882 .loc 1 923 35 is_stmt 0 view .LVU2838 + 8883 007e 0023 movs r3, #0 + 8884 0080 0493 str r3, [sp, #16] + 924:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 8885 .loc 1 924 3 is_stmt 1 view .LVU2839 + 924:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + ARM GAS /tmp/ccYgfTud.s page 544 - 7397 003e 0293 str r3, [sp, #8] -1553:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 7398 .loc 1 1553 3 is_stmt 1 view .LVU2384 -1553:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 7399 .loc 1 1553 24 is_stmt 0 view .LVU2385 - 7400 0040 0022 movs r2, #0 - 7401 0042 0392 str r2, [sp, #12] -1554:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 7402 .loc 1 1554 3 is_stmt 1 view .LVU2386 -1554:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 7403 .loc 1 1554 24 is_stmt 0 view .LVU2387 - 7404 0044 0592 str r2, [sp, #20] -1555:Src/main.c **** { - 7405 .loc 1 1555 3 is_stmt 1 view .LVU2388 -1555:Src/main.c **** { - 7406 .loc 1 1555 7 is_stmt 0 view .LVU2389 - 7407 0046 01A9 add r1, sp, #4 - 7408 0048 0748 ldr r0, .L341 - 7409 004a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel - 7410 .LVL581: -1555:Src/main.c **** { - 7411 .loc 1 1555 6 discriminator 1 view .LVU2390 - 7412 004e 48B9 cbnz r0, .L340 -1562:Src/main.c **** - 7413 .loc 1 1562 3 is_stmt 1 view .LVU2391 - 7414 0050 0548 ldr r0, .L341 - 7415 0052 FFF7FEFF bl HAL_TIM_MspPostInit - 7416 .LVL582: -1564:Src/main.c **** - 7417 .loc 1 1564 1 is_stmt 0 view .LVU2392 - 7418 0056 09B0 add sp, sp, #36 - 7419 .LCFI70: - 7420 .cfi_remember_state - 7421 .cfi_def_cfa_offset 4 - 7422 @ sp needed - 7423 0058 5DF804FB ldr pc, [sp], #4 - 7424 .L338: - 7425 .LCFI71: - 7426 .cfi_restore_state -1545:Src/main.c **** } - 7427 .loc 1 1545 5 is_stmt 1 view .LVU2393 - 7428 005c FFF7FEFF bl Error_Handler - 7429 .LVL583: - 7430 .L339: -1549:Src/main.c **** } - 7431 .loc 1 1549 5 view .LVU2394 - 7432 0060 FFF7FEFF bl Error_Handler - 7433 .LVL584: - 7434 .L340: -1557:Src/main.c **** } - 7435 .loc 1 1557 5 view .LVU2395 - 7436 0064 FFF7FEFF bl Error_Handler - 7437 .LVL585: - 7438 .L342: - 7439 .align 2 - 7440 .L341: - 7441 0068 00000000 .word htim11 - ARM GAS /tmp/ccO46DoU.s page 505 + 8886 .loc 1 924 36 is_stmt 0 view .LVU2840 + 8887 0082 4FF4A053 mov r3, #5120 + 8888 0086 0593 str r3, [sp, #20] + 925:Src/main.c **** + 8889 .loc 1 925 3 is_stmt 1 view .LVU2841 + 925:Src/main.c **** + 8890 .loc 1 925 36 is_stmt 0 view .LVU2842 + 8891 0088 4FF48053 mov r3, #4096 + 8892 008c 0693 str r3, [sp, #24] + 927:Src/main.c **** { + 8893 .loc 1 927 3 is_stmt 1 view .LVU2843 + 927:Src/main.c **** { + 8894 .loc 1 927 7 is_stmt 0 view .LVU2844 + 8895 008e 0621 movs r1, #6 + 8896 0090 02A8 add r0, sp, #8 + 8897 0092 FFF7FEFF bl HAL_RCC_ClockConfig + 8898 .LVL736: + 927:Src/main.c **** { + 8899 .loc 1 927 6 discriminator 1 view .LVU2845 + 8900 0096 30B9 cbnz r0, .L452 + 931:Src/main.c **** + 8901 .loc 1 931 1 view .LVU2846 + 8902 0098 15B0 add sp, sp, #84 + 8903 .LCFI93: + 8904 .cfi_remember_state + 8905 .cfi_def_cfa_offset 4 + 8906 @ sp needed + 8907 009a 5DF804FB ldr pc, [sp], #4 + 8908 .L450: + 8909 .LCFI94: + 8910 .cfi_restore_state + 908:Src/main.c **** } + 8911 .loc 1 908 5 is_stmt 1 view .LVU2847 + 8912 009e FFF7FEFF bl Error_Handler + 8913 .LVL737: + 8914 .L451: + 915:Src/main.c **** } + 8915 .loc 1 915 5 view .LVU2848 + 8916 00a2 FFF7FEFF bl Error_Handler + 8917 .LVL738: + 8918 .L452: + 929:Src/main.c **** } + 8919 .loc 1 929 5 view .LVU2849 + 8920 00a6 FFF7FEFF bl Error_Handler + 8921 .LVL739: + 8922 .L454: + 8923 00aa 00BF .align 2 + 8924 .L453: + 8925 00ac 00380240 .word 1073887232 + 8926 00b0 00700040 .word 1073770496 + 8927 .cfi_endproc + 8928 .LFE1187: + 8930 .section .text.main,"ax",%progbits + 8931 .align 1 + 8932 .global main + 8933 .syntax unified + 8934 .thumb + ARM GAS /tmp/ccYgfTud.s page 545 - 7442 006c 00480140 .word 1073825792 - 7443 .cfi_endproc - 7444 .LFE1202: - 7446 .section .text.MX_TIM4_Init,"ax",%progbits - 7447 .align 1 - 7448 .syntax unified - 7449 .thumb - 7450 .thumb_func - 7452 MX_TIM4_Init: - 7453 .LFB1196: -1276:Src/main.c **** - 7454 .loc 1 1276 1 view -0 - 7455 .cfi_startproc - 7456 @ args = 0, pretend = 0, frame = 56 - 7457 @ frame_needed = 0, uses_anonymous_args = 0 - 7458 0000 00B5 push {lr} - 7459 .LCFI72: - 7460 .cfi_def_cfa_offset 4 - 7461 .cfi_offset 14, -4 - 7462 0002 8FB0 sub sp, sp, #60 - 7463 .LCFI73: - 7464 .cfi_def_cfa_offset 64 -1282:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 7465 .loc 1 1282 3 view .LVU2397 -1282:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 7466 .loc 1 1282 26 is_stmt 0 view .LVU2398 - 7467 0004 0023 movs r3, #0 - 7468 0006 0A93 str r3, [sp, #40] - 7469 0008 0B93 str r3, [sp, #44] - 7470 000a 0C93 str r3, [sp, #48] - 7471 000c 0D93 str r3, [sp, #52] -1283:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 7472 .loc 1 1283 3 is_stmt 1 view .LVU2399 -1283:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 7473 .loc 1 1283 27 is_stmt 0 view .LVU2400 - 7474 000e 0793 str r3, [sp, #28] - 7475 0010 0893 str r3, [sp, #32] - 7476 0012 0993 str r3, [sp, #36] -1284:Src/main.c **** - 7477 .loc 1 1284 3 is_stmt 1 view .LVU2401 -1284:Src/main.c **** - 7478 .loc 1 1284 22 is_stmt 0 view .LVU2402 - 7479 0014 0093 str r3, [sp] - 7480 0016 0193 str r3, [sp, #4] - 7481 0018 0293 str r3, [sp, #8] - 7482 001a 0393 str r3, [sp, #12] - 7483 001c 0493 str r3, [sp, #16] - 7484 001e 0593 str r3, [sp, #20] - 7485 0020 0693 str r3, [sp, #24] -1289:Src/main.c **** htim4.Init.Prescaler = 0; - 7486 .loc 1 1289 3 is_stmt 1 view .LVU2403 -1289:Src/main.c **** htim4.Init.Prescaler = 0; - 7487 .loc 1 1289 18 is_stmt 0 view .LVU2404 - 7488 0022 1E48 ldr r0, .L355 - 7489 0024 1E4A ldr r2, .L355+4 - 7490 0026 0260 str r2, [r0] -1290:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - ARM GAS /tmp/ccO46DoU.s page 506 + 8935 .thumb_func + 8937 main: + 8938 .LFB1186: + 202:Src/main.c **** + 8939 .loc 1 202 1 view -0 + 8940 .cfi_startproc + 8941 @ args = 0, pretend = 0, frame = 8 + 8942 @ frame_needed = 0, uses_anonymous_args = 0 + 8943 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 8944 .LCFI95: + 8945 .cfi_def_cfa_offset 28 + 8946 .cfi_offset 4, -28 + 8947 .cfi_offset 5, -24 + 8948 .cfi_offset 6, -20 + 8949 .cfi_offset 7, -16 + 8950 .cfi_offset 8, -12 + 8951 .cfi_offset 9, -8 + 8952 .cfi_offset 14, -4 + 8953 0004 85B0 sub sp, sp, #20 + 8954 .LCFI96: + 8955 .cfi_def_cfa_offset 48 + 205:Src/main.c **** /* USER CODE END 1 */ + 8956 .loc 1 205 2 view .LVU2851 + 211:Src/main.c **** + 8957 .loc 1 211 3 view .LVU2852 + 8958 0006 FFF7FEFF bl HAL_Init + 8959 .LVL740: + 218:Src/main.c **** + 8960 .loc 1 218 3 view .LVU2853 + 8961 000a FFF7FEFF bl SystemClock_Config + 8962 .LVL741: + 225:Src/main.c **** MX_DMA_Init(); + 8963 .loc 1 225 3 view .LVU2854 + 8964 000e FFF7FEFF bl MX_GPIO_Init + 8965 .LVL742: + 226:Src/main.c **** MX_SPI4_Init(); + 8966 .loc 1 226 3 view .LVU2855 + 8967 0012 FFF7FEFF bl MX_DMA_Init + 8968 .LVL743: + 227:Src/main.c **** MX_FATFS_Init(); + 8969 .loc 1 227 3 view .LVU2856 + 8970 0016 FFF7FEFF bl MX_SPI4_Init + 8971 .LVL744: + 228:Src/main.c **** MX_TIM2_Init(); + 8972 .loc 1 228 3 view .LVU2857 + 8973 001a FFF7FEFF bl MX_FATFS_Init + 8974 .LVL745: + 229:Src/main.c **** MX_TIM5_Init(); + 8975 .loc 1 229 3 view .LVU2858 + 8976 001e FFF7FEFF bl MX_TIM2_Init + 8977 .LVL746: + 230:Src/main.c **** MX_ADC1_Init(); + 8978 .loc 1 230 3 view .LVU2859 + 8979 0022 FFF7FEFF bl MX_TIM5_Init + 8980 .LVL747: + 231:Src/main.c **** MX_ADC3_Init(); + 8981 .loc 1 231 3 view .LVU2860 + ARM GAS /tmp/ccYgfTud.s page 546 - 7491 .loc 1 1290 3 is_stmt 1 view .LVU2405 -1290:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 7492 .loc 1 1290 24 is_stmt 0 view .LVU2406 - 7493 0028 4360 str r3, [r0, #4] -1291:Src/main.c **** htim4.Init.Period = 45; - 7494 .loc 1 1291 3 is_stmt 1 view .LVU2407 -1291:Src/main.c **** htim4.Init.Period = 45; - 7495 .loc 1 1291 26 is_stmt 0 view .LVU2408 - 7496 002a 8360 str r3, [r0, #8] -1292:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7497 .loc 1 1292 3 is_stmt 1 view .LVU2409 -1292:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7498 .loc 1 1292 21 is_stmt 0 view .LVU2410 - 7499 002c 2D22 movs r2, #45 - 7500 002e C260 str r2, [r0, #12] -1293:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 7501 .loc 1 1293 3 is_stmt 1 view .LVU2411 -1293:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 7502 .loc 1 1293 28 is_stmt 0 view .LVU2412 - 7503 0030 0361 str r3, [r0, #16] -1294:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 7504 .loc 1 1294 3 is_stmt 1 view .LVU2413 -1294:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 7505 .loc 1 1294 32 is_stmt 0 view .LVU2414 - 7506 0032 8361 str r3, [r0, #24] -1295:Src/main.c **** { - 7507 .loc 1 1295 3 is_stmt 1 view .LVU2415 -1295:Src/main.c **** { - 7508 .loc 1 1295 7 is_stmt 0 view .LVU2416 - 7509 0034 FFF7FEFF bl HAL_TIM_Base_Init - 7510 .LVL586: -1295:Src/main.c **** { - 7511 .loc 1 1295 6 discriminator 1 view .LVU2417 - 7512 0038 30BB cbnz r0, .L350 -1299:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 7513 .loc 1 1299 3 is_stmt 1 view .LVU2418 -1299:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 7514 .loc 1 1299 34 is_stmt 0 view .LVU2419 - 7515 003a 4FF48053 mov r3, #4096 - 7516 003e 0A93 str r3, [sp, #40] -1300:Src/main.c **** { - 7517 .loc 1 1300 3 is_stmt 1 view .LVU2420 -1300:Src/main.c **** { - 7518 .loc 1 1300 7 is_stmt 0 view .LVU2421 - 7519 0040 0AA9 add r1, sp, #40 - 7520 0042 1648 ldr r0, .L355 - 7521 0044 FFF7FEFF bl HAL_TIM_ConfigClockSource - 7522 .LVL587: -1300:Src/main.c **** { - 7523 .loc 1 1300 6 discriminator 1 view .LVU2422 - 7524 0048 00BB cbnz r0, .L351 -1304:Src/main.c **** { - 7525 .loc 1 1304 3 is_stmt 1 view .LVU2423 -1304:Src/main.c **** { - 7526 .loc 1 1304 7 is_stmt 0 view .LVU2424 - 7527 004a 1448 ldr r0, .L355 - 7528 004c FFF7FEFF bl HAL_TIM_PWM_Init - ARM GAS /tmp/ccO46DoU.s page 507 + 8982 0026 FFF7FEFF bl MX_ADC1_Init + 8983 .LVL748: + 232:Src/main.c **** MX_SPI2_Init(); + 8984 .loc 1 232 3 view .LVU2861 + 8985 002a FFF7FEFF bl MX_ADC3_Init + 8986 .LVL749: + 233:Src/main.c **** MX_SPI5_Init(); + 8987 .loc 1 233 3 view .LVU2862 + 8988 002e FFF7FEFF bl MX_SPI2_Init + 8989 .LVL750: + 234:Src/main.c **** MX_SPI6_Init(); + 8990 .loc 1 234 3 view .LVU2863 + 8991 0032 FFF7FEFF bl MX_SPI5_Init + 8992 .LVL751: + 235:Src/main.c **** MX_USART1_UART_Init(); + 8993 .loc 1 235 3 view .LVU2864 + 8994 0036 FFF7FEFF bl MX_SPI6_Init + 8995 .LVL752: + 236:Src/main.c **** MX_SDMMC1_SD_Init(); + 8996 .loc 1 236 3 view .LVU2865 + 8997 003a FFF7FEFF bl MX_USART1_UART_Init + 8998 .LVL753: + 237:Src/main.c **** MX_TIM7_Init(); + 8999 .loc 1 237 3 view .LVU2866 + 9000 003e FFF7FEFF bl MX_SDMMC1_SD_Init + 9001 .LVL754: + 238:Src/main.c **** MX_TIM6_Init(); + 9002 .loc 1 238 3 view .LVU2867 + 9003 0042 FFF7FEFF bl MX_TIM7_Init + 9004 .LVL755: + 239:Src/main.c **** MX_TIM10_Init(); + 9005 .loc 1 239 3 view .LVU2868 + 9006 0046 FFF7FEFF bl MX_TIM6_Init + 9007 .LVL756: + 240:Src/main.c **** MX_UART8_Init(); + 9008 .loc 1 240 3 view .LVU2869 + 9009 004a FFF7FEFF bl MX_TIM10_Init + 9010 .LVL757: + 241:Src/main.c **** MX_TIM8_Init(); + 9011 .loc 1 241 3 view .LVU2870 + 9012 004e FFF7FEFF bl MX_UART8_Init + 9013 .LVL758: + 242:Src/main.c **** MX_TIM11_Init(); + 9014 .loc 1 242 3 view .LVU2871 + 9015 0052 FFF7FEFF bl MX_TIM8_Init + 9016 .LVL759: + 243:Src/main.c **** MX_TIM4_Init(); + 9017 .loc 1 243 3 view .LVU2872 + 9018 0056 FFF7FEFF bl MX_TIM11_Init + 9019 .LVL760: + 244:Src/main.c **** /* USER CODE BEGIN 2 */ + 9020 .loc 1 244 3 view .LVU2873 + 9021 005a FFF7FEFF bl MX_TIM4_Init + 9022 .LVL761: + 246:Src/main.c **** //HAL_TIM_Base_Start(&htim11); + 9023 .loc 1 246 2 view .LVU2874 + 9024 005e FFF7FEFF bl Init_params + ARM GAS /tmp/ccYgfTud.s page 547 - 7529 .LVL588: -1304:Src/main.c **** { - 7530 .loc 1 1304 6 discriminator 1 view .LVU2425 - 7531 0050 F0B9 cbnz r0, .L352 -1308:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 7532 .loc 1 1308 3 is_stmt 1 view .LVU2426 -1308:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 7533 .loc 1 1308 37 is_stmt 0 view .LVU2427 - 7534 0052 0023 movs r3, #0 - 7535 0054 0793 str r3, [sp, #28] -1309:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 7536 .loc 1 1309 3 is_stmt 1 view .LVU2428 -1309:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 7537 .loc 1 1309 33 is_stmt 0 view .LVU2429 - 7538 0056 0993 str r3, [sp, #36] -1310:Src/main.c **** { - 7539 .loc 1 1310 3 is_stmt 1 view .LVU2430 -1310:Src/main.c **** { - 7540 .loc 1 1310 7 is_stmt 0 view .LVU2431 - 7541 0058 07A9 add r1, sp, #28 - 7542 005a 1048 ldr r0, .L355 - 7543 005c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization - 7544 .LVL589: -1310:Src/main.c **** { - 7545 .loc 1 1310 6 discriminator 1 view .LVU2432 - 7546 0060 C0B9 cbnz r0, .L353 -1314:Src/main.c **** sConfigOC.Pulse = 22; - 7547 .loc 1 1314 3 is_stmt 1 view .LVU2433 -1314:Src/main.c **** sConfigOC.Pulse = 22; - 7548 .loc 1 1314 20 is_stmt 0 view .LVU2434 - 7549 0062 6023 movs r3, #96 - 7550 0064 0093 str r3, [sp] -1315:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 7551 .loc 1 1315 3 is_stmt 1 view .LVU2435 -1315:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 7552 .loc 1 1315 19 is_stmt 0 view .LVU2436 - 7553 0066 1623 movs r3, #22 - 7554 0068 0193 str r3, [sp, #4] -1316:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 7555 .loc 1 1316 3 is_stmt 1 view .LVU2437 -1316:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 7556 .loc 1 1316 24 is_stmt 0 view .LVU2438 - 7557 006a 0023 movs r3, #0 - 7558 006c 0293 str r3, [sp, #8] -1317:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 7559 .loc 1 1317 3 is_stmt 1 view .LVU2439 -1317:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 7560 .loc 1 1317 24 is_stmt 0 view .LVU2440 - 7561 006e 0493 str r3, [sp, #16] -1318:Src/main.c **** { - 7562 .loc 1 1318 3 is_stmt 1 view .LVU2441 -1318:Src/main.c **** { - 7563 .loc 1 1318 7 is_stmt 0 view .LVU2442 - 7564 0070 0822 movs r2, #8 - 7565 0072 6946 mov r1, sp - 7566 0074 0948 ldr r0, .L355 - 7567 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel - ARM GAS /tmp/ccO46DoU.s page 508 + 9025 .LVL762: + 257:Src/main.c **** + 9026 .loc 1 257 2 view .LVU2875 + 257:Src/main.c **** + 9027 .loc 1 257 14 is_stmt 0 view .LVU2876 + 9028 0062 854A ldr r2, .L531 + 9029 0064 3523 movs r3, #53 + 9030 0066 D362 str r3, [r2, #44] + 259:Src/main.c **** + 9031 .loc 1 259 2 is_stmt 1 view .LVU2877 + 259:Src/main.c **** + 9032 .loc 1 259 23 is_stmt 0 view .LVU2878 + 9033 0068 D36A ldr r3, [r2, #44] + 259:Src/main.c **** + 9034 .loc 1 259 30 view .LVU2879 + 9035 006a 0133 adds r3, r3, #1 + 259:Src/main.c **** + 9036 .loc 1 259 33 view .LVU2880 + 9037 006c 5B08 lsrs r3, r3, #1 + 259:Src/main.c **** + 9038 .loc 1 259 36 view .LVU2881 + 9039 006e 013B subs r3, r3, #1 + 259:Src/main.c **** + 9040 .loc 1 259 15 view .LVU2882 + 9041 0070 D363 str r3, [r2, #60] + 264:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 9042 .loc 1 264 2 is_stmt 1 view .LVU2883 + 264:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 9043 .loc 1 264 23 is_stmt 0 view .LVU2884 + 9044 0072 D36A ldr r3, [r2, #44] + 264:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 9045 .loc 1 264 36 view .LVU2885 + 9046 0074 9B00 lsls r3, r3, #2 + 9047 0076 0333 adds r3, r3, #3 + 264:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 9048 .loc 1 264 15 view .LVU2886 + 9049 0078 02F5A032 add r2, r2, #81920 + 9050 007c D362 str r3, [r2, #44] + 265:Src/main.c **** + 9051 .loc 1 265 2 is_stmt 1 view .LVU2887 + 265:Src/main.c **** + 9052 .loc 1 265 25 is_stmt 0 view .LVU2888 + 9053 007e D36A ldr r3, [r2, #44] + 265:Src/main.c **** + 9054 .loc 1 265 32 view .LVU2889 + 9055 0080 0133 adds r3, r3, #1 + 265:Src/main.c **** + 9056 .loc 1 265 35 view .LVU2890 + 9057 0082 5B08 lsrs r3, r3, #1 + 265:Src/main.c **** + 9058 .loc 1 265 38 view .LVU2891 + 9059 0084 013B subs r3, r3, #1 + 265:Src/main.c **** + 9060 .loc 1 265 16 view .LVU2892 + 9061 0086 5363 str r3, [r2, #52] + 9062 0088 4CE0 b .L456 + 9063 .L522: + ARM GAS /tmp/ccYgfTud.s page 548 - 7568 .LVL590: -1318:Src/main.c **** { - 7569 .loc 1 1318 6 discriminator 1 view .LVU2443 - 7570 007a 68B9 cbnz r0, .L354 -1325:Src/main.c **** - 7571 .loc 1 1325 3 is_stmt 1 view .LVU2444 - 7572 007c 0748 ldr r0, .L355 - 7573 007e FFF7FEFF bl HAL_TIM_MspPostInit - 7574 .LVL591: -1327:Src/main.c **** - 7575 .loc 1 1327 1 is_stmt 0 view .LVU2445 - 7576 0082 0FB0 add sp, sp, #60 - 7577 .LCFI74: - 7578 .cfi_remember_state - 7579 .cfi_def_cfa_offset 4 - 7580 @ sp needed - 7581 0084 5DF804FB ldr pc, [sp], #4 - 7582 .L350: - 7583 .LCFI75: - 7584 .cfi_restore_state -1297:Src/main.c **** } - 7585 .loc 1 1297 5 is_stmt 1 view .LVU2446 - 7586 0088 FFF7FEFF bl Error_Handler - 7587 .LVL592: - 7588 .L351: -1302:Src/main.c **** } - 7589 .loc 1 1302 5 view .LVU2447 - 7590 008c FFF7FEFF bl Error_Handler - 7591 .LVL593: - 7592 .L352: -1306:Src/main.c **** } - 7593 .loc 1 1306 5 view .LVU2448 - 7594 0090 FFF7FEFF bl Error_Handler - 7595 .LVL594: - 7596 .L353: -1312:Src/main.c **** } - 7597 .loc 1 1312 5 view .LVU2449 - 7598 0094 FFF7FEFF bl Error_Handler - 7599 .LVL595: - 7600 .L354: -1320:Src/main.c **** } - 7601 .loc 1 1320 5 view .LVU2450 - 7602 0098 FFF7FEFF bl Error_Handler - 7603 .LVL596: - 7604 .L356: - 7605 .align 2 - 7606 .L355: - 7607 009c 00000000 .word htim4 - 7608 00a0 00080040 .word 1073743872 - 7609 .cfi_endproc - 7610 .LFE1196: - 7612 .section .text.SystemClock_Config,"ax",%progbits - 7613 .align 1 - 7614 .global SystemClock_Config - 7615 .syntax unified - 7616 .thumb - 7617 .thumb_func - ARM GAS /tmp/ccO46DoU.s page 509 - - - 7619 SystemClock_Config: - 7620 .LFB1187: - 763:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 7621 .loc 1 763 1 view -0 - 7622 .cfi_startproc - 7623 @ args = 0, pretend = 0, frame = 80 - 7624 @ frame_needed = 0, uses_anonymous_args = 0 - 7625 0000 00B5 push {lr} - 7626 .LCFI76: - 7627 .cfi_def_cfa_offset 4 - 7628 .cfi_offset 14, -4 - 7629 0002 95B0 sub sp, sp, #84 - 7630 .LCFI77: - 7631 .cfi_def_cfa_offset 88 - 764:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 7632 .loc 1 764 3 view .LVU2452 - 764:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 7633 .loc 1 764 22 is_stmt 0 view .LVU2453 - 7634 0004 3422 movs r2, #52 - 7635 0006 0021 movs r1, #0 - 7636 0008 07A8 add r0, sp, #28 - 7637 000a FFF7FEFF bl memset - 7638 .LVL597: - 765:Src/main.c **** - 7639 .loc 1 765 3 is_stmt 1 view .LVU2454 - 765:Src/main.c **** - 7640 .loc 1 765 22 is_stmt 0 view .LVU2455 - 7641 000e 0023 movs r3, #0 - 7642 0010 0293 str r3, [sp, #8] - 7643 0012 0393 str r3, [sp, #12] - 7644 0014 0493 str r3, [sp, #16] - 7645 0016 0593 str r3, [sp, #20] - 7646 0018 0693 str r3, [sp, #24] - 769:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7647 .loc 1 769 3 is_stmt 1 view .LVU2456 - 7648 .LBB545: - 769:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7649 .loc 1 769 3 view .LVU2457 - 769:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7650 .loc 1 769 3 view .LVU2458 - 7651 001a 244B ldr r3, .L365 - 7652 001c 1A6C ldr r2, [r3, #64] - 7653 001e 42F08052 orr r2, r2, #268435456 - 7654 0022 1A64 str r2, [r3, #64] - 769:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7655 .loc 1 769 3 view .LVU2459 - 7656 0024 1B6C ldr r3, [r3, #64] - 7657 0026 03F08053 and r3, r3, #268435456 - 7658 002a 0093 str r3, [sp] - 769:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7659 .loc 1 769 3 view .LVU2460 - 7660 002c 009B ldr r3, [sp] - 7661 .LBE545: - 769:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7662 .loc 1 769 3 view .LVU2461 - 770:Src/main.c **** - 7663 .loc 1 770 3 view .LVU2462 - ARM GAS /tmp/ccO46DoU.s page 510 - - - 7664 .LBB546: - 770:Src/main.c **** - 7665 .loc 1 770 3 view .LVU2463 - 770:Src/main.c **** - 7666 .loc 1 770 3 view .LVU2464 - 7667 002e 204B ldr r3, .L365+4 - 7668 0030 1A68 ldr r2, [r3] - 7669 0032 42F44042 orr r2, r2, #49152 - 7670 0036 1A60 str r2, [r3] - 770:Src/main.c **** - 7671 .loc 1 770 3 view .LVU2465 - 7672 0038 1B68 ldr r3, [r3] - 7673 003a 03F44043 and r3, r3, #49152 - 7674 003e 0193 str r3, [sp, #4] - 770:Src/main.c **** - 7675 .loc 1 770 3 view .LVU2466 - 7676 0040 019B ldr r3, [sp, #4] - 7677 .LBE546: - 770:Src/main.c **** - 7678 .loc 1 770 3 view .LVU2467 - 775:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 7679 .loc 1 775 3 view .LVU2468 - 775:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 7680 .loc 1 775 36 is_stmt 0 view .LVU2469 - 7681 0042 0123 movs r3, #1 - 7682 0044 0793 str r3, [sp, #28] - 776:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 7683 .loc 1 776 3 is_stmt 1 view .LVU2470 - 776:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 7684 .loc 1 776 30 is_stmt 0 view .LVU2471 - 7685 0046 4FF48033 mov r3, #65536 - 7686 004a 0893 str r3, [sp, #32] - 777:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 7687 .loc 1 777 3 is_stmt 1 view .LVU2472 - 777:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 7688 .loc 1 777 34 is_stmt 0 view .LVU2473 - 7689 004c 0223 movs r3, #2 - 7690 004e 0D93 str r3, [sp, #52] - 778:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 7691 .loc 1 778 3 is_stmt 1 view .LVU2474 - 778:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 7692 .loc 1 778 35 is_stmt 0 view .LVU2475 - 7693 0050 4FF48002 mov r2, #4194304 - 7694 0054 0E92 str r2, [sp, #56] - 779:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 7695 .loc 1 779 3 is_stmt 1 view .LVU2476 - 779:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 7696 .loc 1 779 30 is_stmt 0 view .LVU2477 - 7697 0056 1922 movs r2, #25 - 7698 0058 0F92 str r2, [sp, #60] - 780:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 7699 .loc 1 780 3 is_stmt 1 view .LVU2478 - 780:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 7700 .loc 1 780 30 is_stmt 0 view .LVU2479 - 7701 005a 4FF4B872 mov r2, #368 - 7702 005e 1092 str r2, [sp, #64] - 781:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - ARM GAS /tmp/ccO46DoU.s page 511 - - - 7703 .loc 1 781 3 is_stmt 1 view .LVU2480 - 781:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 7704 .loc 1 781 30 is_stmt 0 view .LVU2481 - 7705 0060 1193 str r3, [sp, #68] - 782:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 7706 .loc 1 782 3 is_stmt 1 view .LVU2482 - 782:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 7707 .loc 1 782 30 is_stmt 0 view .LVU2483 - 7708 0062 0822 movs r2, #8 - 7709 0064 1292 str r2, [sp, #72] - 783:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 7710 .loc 1 783 3 is_stmt 1 view .LVU2484 - 783:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 7711 .loc 1 783 30 is_stmt 0 view .LVU2485 - 7712 0066 1393 str r3, [sp, #76] - 784:Src/main.c **** { - 7713 .loc 1 784 3 is_stmt 1 view .LVU2486 - 784:Src/main.c **** { - 7714 .loc 1 784 7 is_stmt 0 view .LVU2487 - 7715 0068 07A8 add r0, sp, #28 - 7716 006a FFF7FEFF bl HAL_RCC_OscConfig - 7717 .LVL598: - 784:Src/main.c **** { - 7718 .loc 1 784 6 discriminator 1 view .LVU2488 - 7719 006e B0B9 cbnz r0, .L362 - 791:Src/main.c **** { - 7720 .loc 1 791 3 is_stmt 1 view .LVU2489 - 791:Src/main.c **** { - 7721 .loc 1 791 7 is_stmt 0 view .LVU2490 - 7722 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive - 7723 .LVL599: - 791:Src/main.c **** { - 7724 .loc 1 791 6 discriminator 1 view .LVU2491 - 7725 0074 A8B9 cbnz r0, .L363 - 798:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 7726 .loc 1 798 3 is_stmt 1 view .LVU2492 - 798:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 7727 .loc 1 798 31 is_stmt 0 view .LVU2493 - 7728 0076 0F23 movs r3, #15 - 7729 0078 0293 str r3, [sp, #8] - 800:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 7730 .loc 1 800 3 is_stmt 1 view .LVU2494 - 800:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 7731 .loc 1 800 34 is_stmt 0 view .LVU2495 - 7732 007a 0223 movs r3, #2 - 7733 007c 0393 str r3, [sp, #12] - 801:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 7734 .loc 1 801 3 is_stmt 1 view .LVU2496 - 801:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 7735 .loc 1 801 35 is_stmt 0 view .LVU2497 - 7736 007e 0023 movs r3, #0 - 7737 0080 0493 str r3, [sp, #16] - 802:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 7738 .loc 1 802 3 is_stmt 1 view .LVU2498 - 802:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 7739 .loc 1 802 36 is_stmt 0 view .LVU2499 - 7740 0082 4FF4A053 mov r3, #5120 - ARM GAS /tmp/ccO46DoU.s page 512 - - - 7741 0086 0593 str r3, [sp, #20] - 803:Src/main.c **** - 7742 .loc 1 803 3 is_stmt 1 view .LVU2500 - 803:Src/main.c **** - 7743 .loc 1 803 36 is_stmt 0 view .LVU2501 - 7744 0088 4FF48053 mov r3, #4096 - 7745 008c 0693 str r3, [sp, #24] - 805:Src/main.c **** { - 7746 .loc 1 805 3 is_stmt 1 view .LVU2502 - 805:Src/main.c **** { - 7747 .loc 1 805 7 is_stmt 0 view .LVU2503 - 7748 008e 0621 movs r1, #6 - 7749 0090 02A8 add r0, sp, #8 - 7750 0092 FFF7FEFF bl HAL_RCC_ClockConfig - 7751 .LVL600: - 805:Src/main.c **** { - 7752 .loc 1 805 6 discriminator 1 view .LVU2504 - 7753 0096 30B9 cbnz r0, .L364 - 809:Src/main.c **** - 7754 .loc 1 809 1 view .LVU2505 - 7755 0098 15B0 add sp, sp, #84 - 7756 .LCFI78: - 7757 .cfi_remember_state - 7758 .cfi_def_cfa_offset 4 - 7759 @ sp needed - 7760 009a 5DF804FB ldr pc, [sp], #4 - 7761 .L362: - 7762 .LCFI79: - 7763 .cfi_restore_state - 786:Src/main.c **** } - 7764 .loc 1 786 5 is_stmt 1 view .LVU2506 - 7765 009e FFF7FEFF bl Error_Handler - 7766 .LVL601: - 7767 .L363: - 793:Src/main.c **** } - 7768 .loc 1 793 5 view .LVU2507 - 7769 00a2 FFF7FEFF bl Error_Handler - 7770 .LVL602: - 7771 .L364: - 807:Src/main.c **** } - 7772 .loc 1 807 5 view .LVU2508 - 7773 00a6 FFF7FEFF bl Error_Handler - 7774 .LVL603: - 7775 .L366: - 7776 00aa 00BF .align 2 - 7777 .L365: - 7778 00ac 00380240 .word 1073887232 - 7779 00b0 00700040 .word 1073770496 - 7780 .cfi_endproc - 7781 .LFE1187: - 7783 .section .text.main,"ax",%progbits - 7784 .align 1 - 7785 .global main - 7786 .syntax unified - 7787 .thumb - 7788 .thumb_func - 7790 main: - ARM GAS /tmp/ccO46DoU.s page 513 - - - 7791 .LFB1186: - 129:Src/main.c **** - 7792 .loc 1 129 1 view -0 - 7793 .cfi_startproc - 7794 @ args = 0, pretend = 0, frame = 8 - 7795 @ frame_needed = 0, uses_anonymous_args = 0 - 7796 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} - 7797 .LCFI80: - 7798 .cfi_def_cfa_offset 28 - 7799 .cfi_offset 4, -28 - 7800 .cfi_offset 5, -24 - 7801 .cfi_offset 6, -20 - 7802 .cfi_offset 7, -16 - 7803 .cfi_offset 8, -12 - 7804 .cfi_offset 9, -8 - 7805 .cfi_offset 14, -4 - 7806 0004 83B0 sub sp, sp, #12 - 7807 .LCFI81: - 7808 .cfi_def_cfa_offset 40 - 132:Src/main.c **** /* USER CODE END 1 */ - 7809 .loc 1 132 2 view .LVU2510 - 138:Src/main.c **** - 7810 .loc 1 138 3 view .LVU2511 - 7811 0006 FFF7FEFF bl HAL_Init - 7812 .LVL604: - 145:Src/main.c **** - 7813 .loc 1 145 3 view .LVU2512 - 7814 000a FFF7FEFF bl SystemClock_Config - 7815 .LVL605: - 152:Src/main.c **** MX_DMA_Init(); - 7816 .loc 1 152 3 view .LVU2513 - 7817 000e FFF7FEFF bl MX_GPIO_Init - 7818 .LVL606: - 153:Src/main.c **** MX_SPI4_Init(); - 7819 .loc 1 153 3 view .LVU2514 - 7820 0012 FFF7FEFF bl MX_DMA_Init - 7821 .LVL607: - 154:Src/main.c **** MX_FATFS_Init(); - 7822 .loc 1 154 3 view .LVU2515 - 7823 0016 FFF7FEFF bl MX_SPI4_Init - 7824 .LVL608: - 155:Src/main.c **** MX_TIM2_Init(); - 7825 .loc 1 155 3 view .LVU2516 - 7826 001a FFF7FEFF bl MX_FATFS_Init - 7827 .LVL609: - 156:Src/main.c **** MX_TIM5_Init(); - 7828 .loc 1 156 3 view .LVU2517 - 7829 001e FFF7FEFF bl MX_TIM2_Init - 7830 .LVL610: - 157:Src/main.c **** MX_ADC1_Init(); - 7831 .loc 1 157 3 view .LVU2518 - 7832 0022 FFF7FEFF bl MX_TIM5_Init - 7833 .LVL611: - 158:Src/main.c **** MX_ADC3_Init(); - 7834 .loc 1 158 3 view .LVU2519 - 7835 0026 FFF7FEFF bl MX_ADC1_Init - 7836 .LVL612: - ARM GAS /tmp/ccO46DoU.s page 514 - - - 159:Src/main.c **** MX_SPI2_Init(); - 7837 .loc 1 159 3 view .LVU2520 - 7838 002a FFF7FEFF bl MX_ADC3_Init - 7839 .LVL613: - 160:Src/main.c **** MX_SPI5_Init(); - 7840 .loc 1 160 3 view .LVU2521 - 7841 002e FFF7FEFF bl MX_SPI2_Init - 7842 .LVL614: - 161:Src/main.c **** MX_SPI6_Init(); - 7843 .loc 1 161 3 view .LVU2522 - 7844 0032 FFF7FEFF bl MX_SPI5_Init - 7845 .LVL615: - 162:Src/main.c **** MX_USART1_UART_Init(); - 7846 .loc 1 162 3 view .LVU2523 - 7847 0036 FFF7FEFF bl MX_SPI6_Init - 7848 .LVL616: - 163:Src/main.c **** MX_SDMMC1_SD_Init(); - 7849 .loc 1 163 3 view .LVU2524 - 7850 003a FFF7FEFF bl MX_USART1_UART_Init - 7851 .LVL617: - 164:Src/main.c **** MX_TIM7_Init(); - 7852 .loc 1 164 3 view .LVU2525 - 7853 003e FFF7FEFF bl MX_SDMMC1_SD_Init - 7854 .LVL618: - 165:Src/main.c **** MX_TIM6_Init(); - 7855 .loc 1 165 3 view .LVU2526 - 7856 0042 FFF7FEFF bl MX_TIM7_Init - 7857 .LVL619: - 166:Src/main.c **** MX_TIM10_Init(); - 7858 .loc 1 166 3 view .LVU2527 - 7859 0046 FFF7FEFF bl MX_TIM6_Init - 7860 .LVL620: - 167:Src/main.c **** MX_UART8_Init(); - 7861 .loc 1 167 3 view .LVU2528 - 7862 004a FFF7FEFF bl MX_TIM10_Init - 7863 .LVL621: - 168:Src/main.c **** MX_TIM8_Init(); - 7864 .loc 1 168 3 view .LVU2529 - 7865 004e FFF7FEFF bl MX_UART8_Init - 7866 .LVL622: - 169:Src/main.c **** MX_TIM11_Init(); - 7867 .loc 1 169 3 view .LVU2530 - 7868 0052 FFF7FEFF bl MX_TIM8_Init - 7869 .LVL623: - 170:Src/main.c **** MX_TIM4_Init(); - 7870 .loc 1 170 3 view .LVU2531 - 7871 0056 FFF7FEFF bl MX_TIM11_Init - 7872 .LVL624: - 171:Src/main.c **** /* USER CODE BEGIN 2 */ - 7873 .loc 1 171 3 view .LVU2532 - 7874 005a FFF7FEFF bl MX_TIM4_Init - 7875 .LVL625: - 173:Src/main.c **** //HAL_TIM_Base_Start(&htim11); - 7876 .loc 1 173 2 view .LVU2533 - 7877 005e FFF7FEFF bl Init_params - 7878 .LVL626: - 184:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 515 - - - 7879 .loc 1 184 2 view .LVU2534 - 184:Src/main.c **** - 7880 .loc 1 184 14 is_stmt 0 view .LVU2535 - 7881 0062 844A ldr r2, .L432 - 7882 0064 3523 movs r3, #53 - 7883 0066 D362 str r3, [r2, #44] - 186:Src/main.c **** - 7884 .loc 1 186 2 is_stmt 1 view .LVU2536 - 186:Src/main.c **** - 7885 .loc 1 186 23 is_stmt 0 view .LVU2537 - 7886 0068 D36A ldr r3, [r2, #44] - 186:Src/main.c **** - 7887 .loc 1 186 30 view .LVU2538 - 7888 006a 0133 adds r3, r3, #1 - 186:Src/main.c **** - 7889 .loc 1 186 33 view .LVU2539 - 7890 006c 5B08 lsrs r3, r3, #1 - 186:Src/main.c **** - 7891 .loc 1 186 36 view .LVU2540 - 7892 006e 013B subs r3, r3, #1 - 186:Src/main.c **** - 7893 .loc 1 186 15 view .LVU2541 - 7894 0070 D363 str r3, [r2, #60] - 191:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7895 .loc 1 191 2 is_stmt 1 view .LVU2542 - 191:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7896 .loc 1 191 23 is_stmt 0 view .LVU2543 - 7897 0072 D36A ldr r3, [r2, #44] - 191:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7898 .loc 1 191 36 view .LVU2544 - 7899 0074 9B00 lsls r3, r3, #2 - 7900 0076 0333 adds r3, r3, #3 - 191:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7901 .loc 1 191 15 view .LVU2545 - 7902 0078 02F5A032 add r2, r2, #81920 - 7903 007c D362 str r3, [r2, #44] - 192:Src/main.c **** - 7904 .loc 1 192 2 is_stmt 1 view .LVU2546 - 192:Src/main.c **** - 7905 .loc 1 192 25 is_stmt 0 view .LVU2547 - 7906 007e D36A ldr r3, [r2, #44] - 192:Src/main.c **** - 7907 .loc 1 192 32 view .LVU2548 - 7908 0080 0133 adds r3, r3, #1 - 192:Src/main.c **** - 7909 .loc 1 192 35 view .LVU2549 - 7910 0082 5B08 lsrs r3, r3, #1 - 192:Src/main.c **** - 7911 .loc 1 192 38 view .LVU2550 - 7912 0084 013B subs r3, r3, #1 - 192:Src/main.c **** - 7913 .loc 1 192 16 view .LVU2551 - 7914 0086 5363 str r3, [r2, #52] - 7915 0088 4CE0 b .L368 - 7916 .L424: - 206:Src/main.c **** { - 7917 .loc 1 206 85 discriminator 1 view .LVU2552 - ARM GAS /tmp/ccO46DoU.s page 516 - - - 7918 008a 7B4B ldr r3, .L432+4 - 7919 008c 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 206:Src/main.c **** { - 7920 .loc 1 206 73 discriminator 1 view .LVU2553 - 7921 008e 002B cmp r3, #0 - 7922 0090 4FD1 bne .L369 - 7923 .L370: - 7924 .LBB547: + 279:Src/main.c **** { + 9064 .loc 1 279 85 discriminator 1 view .LVU2893 + 9065 008a 7C4B ldr r3, .L531+4 + 9066 008c 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 279:Src/main.c **** { + 9067 .loc 1 279 73 discriminator 1 view .LVU2894 + 9068 008e 002B cmp r3, #0 + 9069 0090 4FD1 bne .L457 + 9070 .L458: + 9071 .LBB620: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7925 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU2554 - 7926 .LBB548: + 9072 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU2895 + 9073 .LBB621: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7927 .loc 7 3073 3 discriminator 1 view .LVU2555 + 9074 .loc 7 3073 3 discriminator 1 view .LVU2896 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7928 .loc 7 3073 3 discriminator 1 view .LVU2556 + 9075 .loc 7 3073 3 discriminator 1 view .LVU2897 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7929 .loc 7 3073 3 discriminator 1 view .LVU2557 - 7930 .LVL627: - 7931 .LBB549: - 7932 .LBI549: + 9076 .loc 7 3073 3 discriminator 1 view .LVU2898 + 9077 .LVL763: + 9078 .LBB622: + 9079 .LBI622: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 7933 .loc 8 1068 31 view .LVU2558 - 7934 .LBB550: + 9080 .loc 8 1068 31 view .LVU2899 + 9081 .LBB623: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 7935 .loc 8 1070 5 view .LVU2559 + 9082 .loc 8 1070 5 view .LVU2900 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 7936 .loc 8 1072 4 view .LVU2560 - 7937 0092 7A4A ldr r2, .L432+8 - 7938 .syntax unified - 7939 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 7940 0094 52E8003F ldrex r3, [r2] - 7941 @ 0 "" 2 - 7942 .LVL628: + 9083 .loc 8 1072 4 view .LVU2901 + 9084 0092 7B4A ldr r2, .L531+8 + 9085 .syntax unified + 9086 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9087 0094 52E8003F ldrex r3, [r2] + 9088 @ 0 "" 2 + 9089 .LVL764: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 7943 .loc 8 1073 4 view .LVU2561 + 9090 .loc 8 1073 4 view .LVU2902 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 7944 .loc 8 1073 4 is_stmt 0 view .LVU2562 - 7945 .thumb - 7946 .syntax unified - 7947 .LBE550: - 7948 .LBE549: + 9091 .loc 8 1073 4 is_stmt 0 view .LVU2903 + 9092 .thumb + 9093 .syntax unified + 9094 .LBE623: + 9095 .LBE622: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7949 .loc 7 3073 3 discriminator 1 view .LVU2563 - 7950 0098 43F48073 orr r3, r3, #256 - 7951 .LVL629: + 9096 .loc 7 3073 3 discriminator 1 view .LVU2904 + 9097 0098 43F48073 orr r3, r3, #256 + 9098 .LVL765: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7952 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU2564 - 7953 .LBB551: - 7954 .LBI551: + 9099 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU2905 + 9100 .LBB624: + 9101 .LBI624: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 7955 .loc 8 1119 31 view .LVU2565 - 7956 .LBB552: + 9102 .loc 8 1119 31 view .LVU2906 + 9103 .LBB625: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 7957 .loc 8 1121 4 view .LVU2566 + 9104 .loc 8 1121 4 view .LVU2907 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 7958 .loc 8 1123 4 view .LVU2567 - 7959 .syntax unified - ARM GAS /tmp/ccO46DoU.s page 517 + ARM GAS /tmp/ccYgfTud.s page 549 - 7960 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 7961 009c 42E80031 strex r1, r3, [r2] - 7962 @ 0 "" 2 - 7963 .LVL630: - 7964 .loc 8 1124 4 view .LVU2568 - 7965 .loc 8 1124 4 is_stmt 0 view .LVU2569 - 7966 .thumb - 7967 .syntax unified - 7968 .LBE552: - 7969 .LBE551: + 9105 .loc 8 1123 4 view .LVU2908 + 9106 .syntax unified + 9107 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9108 009c 42E80031 strex r1, r3, [r2] + 9109 @ 0 "" 2 + 9110 .LVL766: + 9111 .loc 8 1124 4 view .LVU2909 + 9112 .loc 8 1124 4 is_stmt 0 view .LVU2910 + 9113 .thumb + 9114 .syntax unified + 9115 .LBE625: + 9116 .LBE624: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7970 .loc 7 3073 3 discriminator 1 view .LVU2570 - 7971 00a0 0029 cmp r1, #0 - 7972 00a2 F6D1 bne .L370 - 7973 .LVL631: - 7974 .L371: + 9117 .loc 7 3073 3 discriminator 1 view .LVU2911 + 9118 00a0 0029 cmp r1, #0 + 9119 00a2 F6D1 bne .L458 + 9120 .LVL767: + 9121 .L459: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7975 .loc 7 3073 3 discriminator 1 view .LVU2571 - 7976 .LBE548: - 7977 .LBE547: - 7978 .LBB553: + 9122 .loc 7 3073 3 discriminator 1 view .LVU2912 + 9123 .LBE621: + 9124 .LBE620: + 9125 .LBB626: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7979 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2572 - 7980 .LBB554: + 9126 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2913 + 9127 .LBB627: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7981 .loc 7 3040 3 discriminator 1 view .LVU2573 + 9128 .loc 7 3040 3 discriminator 1 view .LVU2914 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7982 .loc 7 3040 3 discriminator 1 view .LVU2574 + 9129 .loc 7 3040 3 discriminator 1 view .LVU2915 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7983 .loc 7 3040 3 discriminator 1 view .LVU2575 - 7984 .LBB555: - 7985 .LBI555: + 9130 .loc 7 3040 3 discriminator 1 view .LVU2916 + 9131 .LBB628: + 9132 .LBI628: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 7986 .loc 8 1068 31 view .LVU2576 - 7987 .LBB556: + 9133 .loc 8 1068 31 view .LVU2917 + 9134 .LBB629: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 7988 .loc 8 1070 5 view .LVU2577 + 9135 .loc 8 1070 5 view .LVU2918 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 7989 .loc 8 1072 4 view .LVU2578 - 7990 00a4 754A ldr r2, .L432+8 - 7991 .syntax unified - 7992 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 7993 00a6 52E8003F ldrex r3, [r2] - 7994 @ 0 "" 2 - 7995 .LVL632: + 9136 .loc 8 1072 4 view .LVU2919 + 9137 00a4 764A ldr r2, .L531+8 + 9138 .syntax unified + 9139 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9140 00a6 52E8003F ldrex r3, [r2] + 9141 @ 0 "" 2 + 9142 .LVL768: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 7996 .loc 8 1073 4 view .LVU2579 + 9143 .loc 8 1073 4 view .LVU2920 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 7997 .loc 8 1073 4 is_stmt 0 view .LVU2580 - 7998 .thumb - 7999 .syntax unified - 8000 .LBE556: - 8001 .LBE555: + 9144 .loc 8 1073 4 is_stmt 0 view .LVU2921 + 9145 .thumb + 9146 .syntax unified + 9147 .LBE629: + 9148 .LBE628: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8002 .loc 7 3040 3 discriminator 1 view .LVU2581 - 8003 00aa 43F02003 orr r3, r3, #32 - 8004 .LVL633: - ARM GAS /tmp/ccO46DoU.s page 518 + 9149 .loc 7 3040 3 discriminator 1 view .LVU2922 + ARM GAS /tmp/ccYgfTud.s page 550 + 9150 00aa 43F02003 orr r3, r3, #32 + 9151 .LVL769: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8005 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2582 - 8006 .LBB557: - 8007 .LBI557: + 9152 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2923 + 9153 .LBB630: + 9154 .LBI630: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 8008 .loc 8 1119 31 view .LVU2583 - 8009 .LBB558: + 9155 .loc 8 1119 31 view .LVU2924 + 9156 .LBB631: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 8010 .loc 8 1121 4 view .LVU2584 + 9157 .loc 8 1121 4 view .LVU2925 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 8011 .loc 8 1123 4 view .LVU2585 - 8012 .syntax unified - 8013 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 8014 00ae 42E80031 strex r1, r3, [r2] - 8015 @ 0 "" 2 - 8016 .LVL634: - 8017 .loc 8 1124 4 view .LVU2586 - 8018 .loc 8 1124 4 is_stmt 0 view .LVU2587 - 8019 .thumb - 8020 .syntax unified - 8021 .LBE558: - 8022 .LBE557: + 9158 .loc 8 1123 4 view .LVU2926 + 9159 .syntax unified + 9160 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9161 00ae 42E80031 strex r1, r3, [r2] + 9162 @ 0 "" 2 + 9163 .LVL770: + 9164 .loc 8 1124 4 view .LVU2927 + 9165 .loc 8 1124 4 is_stmt 0 view .LVU2928 + 9166 .thumb + 9167 .syntax unified + 9168 .LBE631: + 9169 .LBE630: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8023 .loc 7 3040 3 discriminator 1 view .LVU2588 - 8024 00b2 0029 cmp r1, #0 - 8025 00b4 F6D1 bne .L371 - 8026 .LVL635: - 8027 .L372: + 9170 .loc 7 3040 3 discriminator 1 view .LVU2929 + 9171 00b2 0029 cmp r1, #0 + 9172 00b4 F6D1 bne .L459 + 9173 .LVL771: + 9174 .L460: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8028 .loc 7 3040 3 discriminator 1 view .LVU2589 - 8029 .LBE554: - 8030 .LBE553: - 8031 .LBB559: + 9175 .loc 7 3040 3 discriminator 1 view .LVU2930 + 9176 .LBE627: + 9177 .LBE626: + 9178 .LBB632: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8032 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU2590 - 8033 .LBB560: + 9179 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU2931 + 9180 .LBB633: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8034 .loc 7 3136 3 discriminator 1 view .LVU2591 + 9181 .loc 7 3136 3 discriminator 1 view .LVU2932 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8035 .loc 7 3136 3 discriminator 1 view .LVU2592 + 9182 .loc 7 3136 3 discriminator 1 view .LVU2933 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8036 .loc 7 3136 3 discriminator 1 view .LVU2593 - 8037 .LBB561: - 8038 .LBI561: + 9183 .loc 7 3136 3 discriminator 1 view .LVU2934 + 9184 .LBB634: + 9185 .LBI634: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 8039 .loc 8 1068 31 view .LVU2594 - 8040 .LBB562: + 9186 .loc 8 1068 31 view .LVU2935 + 9187 .LBB635: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 8041 .loc 8 1070 5 view .LVU2595 + 9188 .loc 8 1070 5 view .LVU2936 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 8042 .loc 8 1072 4 view .LVU2596 - 8043 00b6 714A ldr r2, .L432+8 - 8044 00b8 02F10803 add r3, r2, #8 - 8045 .syntax unified - 8046 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 8047 00bc 53E8003F ldrex r3, [r3] - 8048 @ 0 "" 2 - ARM GAS /tmp/ccO46DoU.s page 519 + 9189 .loc 8 1072 4 view .LVU2937 + 9190 00b6 724A ldr r2, .L531+8 + 9191 00b8 02F10803 add r3, r2, #8 + 9192 .syntax unified + 9193 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccYgfTud.s page 551 - 8049 .LVL636: + 9194 00bc 53E8003F ldrex r3, [r3] + 9195 @ 0 "" 2 + 9196 .LVL772: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 8050 .loc 8 1073 4 view .LVU2597 + 9197 .loc 8 1073 4 view .LVU2938 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 8051 .loc 8 1073 4 is_stmt 0 view .LVU2598 - 8052 .thumb - 8053 .syntax unified - 8054 .LBE562: - 8055 .LBE561: + 9198 .loc 8 1073 4 is_stmt 0 view .LVU2939 + 9199 .thumb + 9200 .syntax unified + 9201 .LBE635: + 9202 .LBE634: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8056 .loc 7 3136 3 discriminator 1 view .LVU2599 - 8057 00c0 43F00103 orr r3, r3, #1 - 8058 .LVL637: + 9203 .loc 7 3136 3 discriminator 1 view .LVU2940 + 9204 00c0 43F00103 orr r3, r3, #1 + 9205 .LVL773: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8059 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU2600 - 8060 .LBB563: - 8061 .LBI563: + 9206 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU2941 + 9207 .LBB636: + 9208 .LBI636: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 8062 .loc 8 1119 31 view .LVU2601 - 8063 .LBB564: + 9209 .loc 8 1119 31 view .LVU2942 + 9210 .LBB637: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 8064 .loc 8 1121 4 view .LVU2602 + 9211 .loc 8 1121 4 view .LVU2943 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 8065 .loc 8 1123 4 view .LVU2603 - 8066 00c4 0832 adds r2, r2, #8 - 8067 .syntax unified - 8068 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 8069 00c6 42E80031 strex r1, r3, [r2] - 8070 @ 0 "" 2 - 8071 .LVL638: - 8072 .loc 8 1124 4 view .LVU2604 - 8073 .loc 8 1124 4 is_stmt 0 view .LVU2605 - 8074 .thumb - 8075 .syntax unified - 8076 .LBE564: - 8077 .LBE563: + 9212 .loc 8 1123 4 view .LVU2944 + 9213 00c4 0832 adds r2, r2, #8 + 9214 .syntax unified + 9215 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9216 00c6 42E80031 strex r1, r3, [r2] + 9217 @ 0 "" 2 + 9218 .LVL774: + 9219 .loc 8 1124 4 view .LVU2945 + 9220 .loc 8 1124 4 is_stmt 0 view .LVU2946 + 9221 .thumb + 9222 .syntax unified + 9223 .LBE637: + 9224 .LBE636: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8078 .loc 7 3136 3 discriminator 1 view .LVU2606 - 8079 00ca 0029 cmp r1, #0 - 8080 00cc F3D1 bne .L372 - 8081 .LBE560: + 9225 .loc 7 3136 3 discriminator 1 view .LVU2947 + 9226 00ca 0029 cmp r1, #0 + 9227 00cc F3D1 bne .L460 + 9228 .LBE633: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8082 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU2607 - 8083 .LVL639: + 9229 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU2948 + 9230 .LVL775: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8084 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU2608 - 8085 .LBE559: - 212:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 8086 .loc 1 212 4 is_stmt 1 view .LVU2609 - 8087 .LBB565: - 8088 .LBI565: + 9231 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU2949 + 9232 .LBE632: + 285:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 9233 .loc 1 285 4 is_stmt 1 view .LVU2950 + 9234 .LBB638: + 9235 .LBI638: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 8089 .loc 2 2024 22 view .LVU2610 - 8090 .LBB566: + 9236 .loc 2 2024 22 view .LVU2951 + 9237 .LBB639: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 8091 .loc 2 2026 3 view .LVU2611 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - ARM GAS /tmp/ccO46DoU.s page 520 + ARM GAS /tmp/ccYgfTud.s page 552 - 8092 .loc 2 2028 5 view .LVU2612 + 9238 .loc 2 2026 3 view .LVU2952 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 8093 .loc 2 2028 47 is_stmt 0 view .LVU2613 - 8094 00ce 6C4B ldr r3, .L432+12 - 8095 00d0 0022 movs r2, #0 - 8096 00d2 83F82523 strb r2, [r3, #805] - 8097 .LVL640: + 9239 .loc 2 2028 5 view .LVU2953 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 8098 .loc 2 2028 47 view .LVU2614 - 8099 .LBE566: - 8100 .LBE565: - 213:Src/main.c **** u_rx_flg = 1; - 8101 .loc 1 213 4 is_stmt 1 view .LVU2615 - 8102 .LBB567: - 8103 .LBI567: + 9240 .loc 2 2028 47 is_stmt 0 view .LVU2954 + 9241 00ce 6D4B ldr r3, .L531+12 + 9242 00d0 0022 movs r2, #0 + 9243 00d2 83F82523 strb r2, [r3, #805] + 9244 .LVL776: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 9245 .loc 2 2028 47 view .LVU2955 + 9246 .LBE639: + 9247 .LBE638: + 286:Src/main.c **** u_rx_flg = 1; + 9248 .loc 1 286 4 is_stmt 1 view .LVU2956 + 9249 .LBB640: + 9250 .LBI640: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 8104 .loc 2 1896 22 view .LVU2616 - 8105 .LBB568: + 9251 .loc 2 1896 22 view .LVU2957 + 9252 .LBB641: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 8106 .loc 2 1898 3 view .LVU2617 + 9253 .loc 2 1898 3 view .LVU2958 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 8107 .loc 2 1900 5 view .LVU2618 + 9254 .loc 2 1900 5 view .LVU2959 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 8108 .loc 2 1900 43 is_stmt 0 view .LVU2619 - 8109 00d6 2022 movs r2, #32 - 8110 00d8 5A60 str r2, [r3, #4] - 8111 .LVL641: + 9255 .loc 2 1900 43 is_stmt 0 view .LVU2960 + 9256 00d6 2022 movs r2, #32 + 9257 00d8 5A60 str r2, [r3, #4] + 9258 .LVL777: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 8112 .loc 2 1900 43 view .LVU2620 - 8113 .LBE568: - 8114 .LBE567: - 214:Src/main.c **** } - 8115 .loc 1 214 4 is_stmt 1 view .LVU2621 - 214:Src/main.c **** } - 8116 .loc 1 214 13 is_stmt 0 view .LVU2622 - 8117 00da 674B ldr r3, .L432+4 - 8118 00dc 0122 movs r2, #1 - 8119 00de 1A70 strb r2, [r3] - 8120 00e0 27E0 b .L369 - 8121 .L384: - 224:Src/main.c **** task.current_param = task.min_param; - 8122 .loc 1 224 6 is_stmt 1 view .LVU2623 - 224:Src/main.c **** task.current_param = task.min_param; - 8123 .loc 1 224 20 is_stmt 0 view .LVU2624 - 8124 00e2 684B ldr r3, .L432+16 - 8125 00e4 0022 movs r2, #0 - 8126 00e6 1A70 strb r2, [r3] - 225:Src/main.c **** Stop_TIM10(); - 8127 .loc 1 225 6 is_stmt 1 view .LVU2625 - 225:Src/main.c **** Stop_TIM10(); - 8128 .loc 1 225 31 is_stmt 0 view .LVU2626 - 8129 00e8 674B ldr r3, .L432+20 - 8130 00ea 5A68 ldr r2, [r3, #4] @ float - 225:Src/main.c **** Stop_TIM10(); - 8131 .loc 1 225 25 view .LVU2627 - 8132 00ec 1A61 str r2, [r3, #16] @ float - 226:Src/main.c **** break; - ARM GAS /tmp/ccO46DoU.s page 521 + 9259 .loc 2 1900 43 view .LVU2961 + 9260 .LBE641: + 9261 .LBE640: + 287:Src/main.c **** } + 9262 .loc 1 287 4 is_stmt 1 view .LVU2962 + 287:Src/main.c **** } + 9263 .loc 1 287 13 is_stmt 0 view .LVU2963 + 9264 00da 684B ldr r3, .L531+4 + 9265 00dc 0122 movs r2, #1 + 9266 00de 1A70 strb r2, [r3] + 9267 00e0 27E0 b .L457 + 9268 .L473: + 297:Src/main.c **** task.current_param = task.min_param; + 9269 .loc 1 297 6 is_stmt 1 view .LVU2964 + 297:Src/main.c **** task.current_param = task.min_param; + 9270 .loc 1 297 20 is_stmt 0 view .LVU2965 + 9271 00e2 694B ldr r3, .L531+16 + 9272 00e4 0022 movs r2, #0 + 9273 00e6 1A70 strb r2, [r3] + 298:Src/main.c **** Stop_TIM10(); + 9274 .loc 1 298 6 is_stmt 1 view .LVU2966 + 298:Src/main.c **** Stop_TIM10(); + 9275 .loc 1 298 31 is_stmt 0 view .LVU2967 + 9276 00e8 684B ldr r3, .L531+20 + 9277 00ea 5A68 ldr r2, [r3, #4] @ float + 298:Src/main.c **** Stop_TIM10(); + 9278 .loc 1 298 25 view .LVU2968 + ARM GAS /tmp/ccYgfTud.s page 553 - 8133 .loc 1 226 6 is_stmt 1 view .LVU2628 - 8134 00ee FFF7FEFF bl Stop_TIM10 - 8135 .LVL642: - 227:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 8136 .loc 1 227 5 view .LVU2629 - 8137 .L373: - 702:Src/main.c **** { - 8138 .loc 1 702 3 view .LVU2630 - 8139 00f2 664B ldr r3, .L432+24 - 8140 00f4 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 8141 00f6 022B cmp r3, #2 - 8142 00f8 00F01C84 beq .L413 - 8143 00fc 032B cmp r3, #3 - 8144 00fe 00F04F84 beq .L420 - 8145 0102 012B cmp r3, #1 - 8146 0104 09D1 bne .L415 - 705:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 8147 .loc 1 705 5 view .LVU2631 - 8148 0106 624C ldr r4, .L432+28 - 8149 0108 0221 movs r1, #2 - 8150 010a 2046 mov r0, r4 - 8151 010c FFF7FEFF bl USART_TX - 8152 .LVL643: - 707:Src/main.c **** State_Data[1]=0;//All OK! - 8153 .loc 1 707 5 view .LVU2632 - 707:Src/main.c **** State_Data[1]=0;//All OK! - 8154 .loc 1 707 18 is_stmt 0 view .LVU2633 - 8155 0110 0023 movs r3, #0 - 8156 0112 2370 strb r3, [r4] - 708:Src/main.c **** UART_transmission_request = NO_MESS; - 8157 .loc 1 708 5 is_stmt 1 view .LVU2634 - 708:Src/main.c **** UART_transmission_request = NO_MESS; - 8158 .loc 1 708 18 is_stmt 0 view .LVU2635 - 8159 0114 6370 strb r3, [r4, #1] - 709:Src/main.c **** break; - 8160 .loc 1 709 5 is_stmt 1 view .LVU2636 - 709:Src/main.c **** break; - 8161 .loc 1 709 31 is_stmt 0 view .LVU2637 - 8162 0116 5D4A ldr r2, .L432+24 - 8163 0118 1370 strb r3, [r2] - 710:Src/main.c **** case MESS_02://Transmith packet - 8164 .loc 1 710 4 is_stmt 1 view .LVU2638 - 8165 .L415: - 744:Src/main.c **** { - 8166 .loc 1 744 5 view .LVU2639 - 744:Src/main.c **** { - 8167 .loc 1 744 17 is_stmt 0 view .LVU2640 - 8168 011a 5E4B ldr r3, .L432+32 - 8169 011c 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 744:Src/main.c **** { - 8170 .loc 1 744 8 view .LVU2641 - 8171 011e 012B cmp r3, #1 - 8172 0120 00F04084 beq .L423 - 8173 .L368: - 204:Src/main.c **** { - 8174 .loc 1 204 3 is_stmt 1 view .LVU2642 - 206:Src/main.c **** { - ARM GAS /tmp/ccO46DoU.s page 522 + 9279 00ec 1A61 str r2, [r3, #16] @ float + 299:Src/main.c **** break; + 9280 .loc 1 299 6 is_stmt 1 view .LVU2969 + 9281 00ee FFF7FEFF bl Stop_TIM10 + 9282 .LVL778: + 300:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 9283 .loc 1 300 5 view .LVU2970 + 9284 .L461: + 824:Src/main.c **** { + 9285 .loc 1 824 3 view .LVU2971 + 9286 00f2 674B ldr r3, .L531+24 + 9287 00f4 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 9288 00f6 022B cmp r3, #2 + 9289 00f8 00F06884 beq .L507 + 9290 00fc 032B cmp r3, #3 + 9291 00fe 00F09B84 beq .L518 + 9292 0102 012B cmp r3, #1 + 9293 0104 09D1 bne .L509 + 827:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 9294 .loc 1 827 5 view .LVU2972 + 9295 0106 634C ldr r4, .L531+28 + 9296 0108 0221 movs r1, #2 + 9297 010a 2046 mov r0, r4 + 9298 010c FFF7FEFF bl USART_TX + 9299 .LVL779: + 829:Src/main.c **** State_Data[1]=0;//All OK! + 9300 .loc 1 829 5 view .LVU2973 + 829:Src/main.c **** State_Data[1]=0;//All OK! + 9301 .loc 1 829 18 is_stmt 0 view .LVU2974 + 9302 0110 0023 movs r3, #0 + 9303 0112 2370 strb r3, [r4] + 830:Src/main.c **** UART_transmission_request = NO_MESS; + 9304 .loc 1 830 5 is_stmt 1 view .LVU2975 + 830:Src/main.c **** UART_transmission_request = NO_MESS; + 9305 .loc 1 830 18 is_stmt 0 view .LVU2976 + 9306 0114 6370 strb r3, [r4, #1] + 831:Src/main.c **** break; + 9307 .loc 1 831 5 is_stmt 1 view .LVU2977 + 831:Src/main.c **** break; + 9308 .loc 1 831 31 is_stmt 0 view .LVU2978 + 9309 0116 5E4A ldr r2, .L531+24 + 9310 0118 1370 strb r3, [r2] + 832:Src/main.c **** case MESS_02://Transmith packet + 9311 .loc 1 832 4 is_stmt 1 view .LVU2979 + 9312 .L509: + 866:Src/main.c **** { + 9313 .loc 1 866 5 view .LVU2980 + 866:Src/main.c **** { + 9314 .loc 1 866 17 is_stmt 0 view .LVU2981 + 9315 011a 5F4B ldr r3, .L531+32 + 9316 011c 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 866:Src/main.c **** { + 9317 .loc 1 866 8 view .LVU2982 + 9318 011e 012B cmp r3, #1 + 9319 0120 00F08C84 beq .L521 + 9320 .L456: + 277:Src/main.c **** { + ARM GAS /tmp/ccYgfTud.s page 554 - 8175 .loc 1 206 3 view .LVU2643 - 206:Src/main.c **** { - 8176 .loc 1 206 8 is_stmt 0 view .LVU2644 - 8177 0124 4FF48071 mov r1, #256 - 8178 0128 5B48 ldr r0, .L432+36 - 8179 012a FFF7FEFF bl HAL_GPIO_ReadPin - 8180 .LVL644: - 206:Src/main.c **** { - 8181 .loc 1 206 6 discriminator 1 view .LVU2645 - 8182 012e 0128 cmp r0, #1 - 8183 0130 ABD0 beq .L424 - 8184 .L369: - 221:Src/main.c **** { - 8185 .loc 1 221 4 is_stmt 1 view .LVU2646 - 8186 0132 5A4B ldr r3, .L432+40 - 8187 0134 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 8188 0136 092B cmp r3, #9 - 8189 0138 DBD8 bhi .L373 - 8190 013a 01A2 adr r2, .L375 - 8191 013c 52F823F0 ldr pc, [r2, r3, lsl #2] - 8192 .p2align 2 - 8193 .L375: - 8194 0140 E3000000 .word .L384+1 - 8195 0144 69010000 .word .L383+1 - 8196 0148 D3010000 .word .L382+1 - 8197 014c 09020000 .word .L381+1 - 8198 0150 39020000 .word .L380+1 - 8199 0154 49020000 .word .L379+1 - 8200 0158 65020000 .word .L378+1 - 8201 015c C9020000 .word .L377+1 - 8202 0160 1D040000 .word .L376+1 - 8203 0164 63040000 .word .L374+1 - 8204 .p2align 1 - 8205 .L383: - 229:Src/main.c **** if (CheckChecksum(COMMAND)) - 8206 .loc 1 229 6 view .LVU2647 - 229:Src/main.c **** if (CheckChecksum(COMMAND)) - 8207 .loc 1 229 18 is_stmt 0 view .LVU2648 - 8208 0168 4D4C ldr r4, .L432+44 - 8209 016a 0D21 movs r1, #13 - 8210 016c 2046 mov r0, r4 - 8211 016e FFF7FEFF bl CalculateChecksum - 8212 .LVL645: - 229:Src/main.c **** if (CheckChecksum(COMMAND)) - 8213 .loc 1 229 16 discriminator 1 view .LVU2649 - 8214 0172 4C4B ldr r3, .L432+48 - 8215 0174 1880 strh r0, [r3] @ movhi - 230:Src/main.c **** { - 8216 .loc 1 230 6 is_stmt 1 view .LVU2650 - 230:Src/main.c **** { - 8217 .loc 1 230 10 is_stmt 0 view .LVU2651 - 8218 0176 2046 mov r0, r4 - 8219 0178 FFF7FEFF bl CheckChecksum - 8220 .LVL646: - 230:Src/main.c **** { - 8221 .loc 1 230 9 discriminator 1 view .LVU2652 - 8222 017c 70B9 cbnz r0, .L425 - ARM GAS /tmp/ccO46DoU.s page 523 + 9321 .loc 1 277 3 is_stmt 1 view .LVU2983 + 279:Src/main.c **** { + 9322 .loc 1 279 3 view .LVU2984 + 279:Src/main.c **** { + 9323 .loc 1 279 8 is_stmt 0 view .LVU2985 + 9324 0124 4FF48071 mov r1, #256 + 9325 0128 5C48 ldr r0, .L531+36 + 9326 012a FFF7FEFF bl HAL_GPIO_ReadPin + 9327 .LVL780: + 279:Src/main.c **** { + 9328 .loc 1 279 6 discriminator 1 view .LVU2986 + 9329 012e 0128 cmp r0, #1 + 9330 0130 ABD0 beq .L522 + 9331 .L457: + 294:Src/main.c **** { + 9332 .loc 1 294 4 is_stmt 1 view .LVU2987 + 9333 0132 5B4B ldr r3, .L531+40 + 9334 0134 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 9335 0136 0A2B cmp r3, #10 + 9336 0138 DBD8 bhi .L461 + 9337 013a 01A2 adr r2, .L463 + 9338 013c 52F823F0 ldr pc, [r2, r3, lsl #2] + 9339 .p2align 2 + 9340 .L463: + 9341 0140 E3000000 .word .L473+1 + 9342 0144 6D010000 .word .L472+1 + 9343 0148 D7010000 .word .L471+1 + 9344 014c 0D020000 .word .L470+1 + 9345 0150 3D020000 .word .L469+1 + 9346 0154 4D020000 .word .L468+1 + 9347 0158 69020000 .word .L467+1 + 9348 015c CD020000 .word .L466+1 + 9349 0160 B7040000 .word .L465+1 + 9350 0164 FD040000 .word .L464+1 + 9351 0168 21040000 .word .L462+1 + 9352 .p2align 1 + 9353 .L472: + 302:Src/main.c **** if (CheckChecksum(COMMAND)) + 9354 .loc 1 302 6 view .LVU2988 + 302:Src/main.c **** if (CheckChecksum(COMMAND)) + 9355 .loc 1 302 18 is_stmt 0 view .LVU2989 + 9356 016c 4D4C ldr r4, .L531+44 + 9357 016e 0D21 movs r1, #13 + 9358 0170 2046 mov r0, r4 + 9359 0172 FFF7FEFF bl CalculateChecksum + 9360 .LVL781: + 302:Src/main.c **** if (CheckChecksum(COMMAND)) + 9361 .loc 1 302 16 discriminator 1 view .LVU2990 + 9362 0176 4C4B ldr r3, .L531+48 + 9363 0178 1880 strh r0, [r3] @ movhi + 303:Src/main.c **** { + 9364 .loc 1 303 6 is_stmt 1 view .LVU2991 + 303:Src/main.c **** { + 9365 .loc 1 303 10 is_stmt 0 view .LVU2992 + 9366 017a 2046 mov r0, r4 + 9367 017c FFF7FEFF bl CheckChecksum + 9368 .LVL782: + ARM GAS /tmp/ccYgfTud.s page 555 - 243:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8223 .loc 1 243 7 is_stmt 1 view .LVU2653 - 243:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8224 .loc 1 243 17 is_stmt 0 view .LVU2654 - 8225 017e 444A ldr r2, .L432+28 - 8226 0180 1378 ldrb r3, [r2] @ zero_extendqisi2 - 243:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8227 .loc 1 243 21 view .LVU2655 - 8228 0182 43F00403 orr r3, r3, #4 - 8229 0186 1370 strb r3, [r2] - 244:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8230 .loc 1 244 7 is_stmt 1 view .LVU2656 - 244:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8231 .loc 1 244 17 is_stmt 0 view .LVU2657 - 8232 0188 444B ldr r3, .L432+40 - 8233 018a 0222 movs r2, #2 - 8234 018c 1A70 strb r2, [r3] - 245:Src/main.c **** } - 8235 .loc 1 245 7 is_stmt 1 view .LVU2658 - 245:Src/main.c **** } - 8236 .loc 1 245 21 is_stmt 0 view .LVU2659 - 8237 018e 3D4B ldr r3, .L432+16 - 8238 0190 0022 movs r2, #0 - 8239 0192 1A70 strb r2, [r3] - 8240 .L386: - 247:Src/main.c **** break; - 8241 .loc 1 247 6 is_stmt 1 view .LVU2660 - 247:Src/main.c **** break; - 8242 .loc 1 247 32 is_stmt 0 view .LVU2661 - 8243 0194 3D4B ldr r3, .L432+24 - 8244 0196 0122 movs r2, #1 - 8245 0198 1A70 strb r2, [r3] - 248:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 8246 .loc 1 248 5 is_stmt 1 view .LVU2662 - 8247 019a AAE7 b .L373 - 8248 .L425: - 232:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 8249 .loc 1 232 7 view .LVU2663 - 8250 .LVL647: - 8251 .LBB569: - 8252 .LBI569: + 303:Src/main.c **** { + 9369 .loc 1 303 9 discriminator 1 view .LVU2993 + 9370 0180 70B9 cbnz r0, .L523 + 316:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 9371 .loc 1 316 7 is_stmt 1 view .LVU2994 + 316:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 9372 .loc 1 316 17 is_stmt 0 view .LVU2995 + 9373 0182 444A ldr r2, .L531+28 + 9374 0184 1378 ldrb r3, [r2] @ zero_extendqisi2 + 316:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 9375 .loc 1 316 21 view .LVU2996 + 9376 0186 43F00403 orr r3, r3, #4 + 9377 018a 1370 strb r3, [r2] + 317:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 9378 .loc 1 317 7 is_stmt 1 view .LVU2997 + 317:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 9379 .loc 1 317 17 is_stmt 0 view .LVU2998 + 9380 018c 444B ldr r3, .L531+40 + 9381 018e 0222 movs r2, #2 + 9382 0190 1A70 strb r2, [r3] + 318:Src/main.c **** } + 9383 .loc 1 318 7 is_stmt 1 view .LVU2999 + 318:Src/main.c **** } + 9384 .loc 1 318 21 is_stmt 0 view .LVU3000 + 9385 0192 3D4B ldr r3, .L531+16 + 9386 0194 0022 movs r2, #0 + 9387 0196 1A70 strb r2, [r3] + 9388 .L475: + 320:Src/main.c **** break; + 9389 .loc 1 320 6 is_stmt 1 view .LVU3001 + 320:Src/main.c **** break; + 9390 .loc 1 320 32 is_stmt 0 view .LVU3002 + 9391 0198 3D4B ldr r3, .L531+24 + 9392 019a 0122 movs r2, #1 + 9393 019c 1A70 strb r2, [r3] + 321:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 9394 .loc 1 321 5 is_stmt 1 view .LVU3003 + 9395 019e A8E7 b .L461 + 9396 .L523: + 305:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 9397 .loc 1 305 7 view .LVU3004 + 9398 .LVL783: + 9399 .LBB642: + 9400 .LBI642: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 8253 .loc 4 358 22 view .LVU2664 - 8254 .LBB570: + 9401 .loc 4 358 22 view .LVU3005 + 9402 .LBB643: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8255 .loc 4 360 3 view .LVU2665 - 8256 019c 424A ldr r2, .L432+52 - 8257 019e 1368 ldr r3, [r2] - 8258 01a0 43F04003 orr r3, r3, #64 - 8259 01a4 1360 str r3, [r2] - 8260 .LVL648: + 9403 .loc 4 360 3 view .LVU3006 + 9404 01a0 424A ldr r2, .L531+52 + 9405 01a2 1368 ldr r3, [r2] + 9406 01a4 43F04003 orr r3, r3, #64 + 9407 01a8 1360 str r3, [r2] + 9408 .LVL784: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8261 .loc 4 360 3 is_stmt 0 view .LVU2666 - 8262 .LBE570: - 8263 .LBE569: - 233:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 8264 .loc 1 233 7 is_stmt 1 view .LVU2667 - ARM GAS /tmp/ccO46DoU.s page 524 + 9409 .loc 4 360 3 is_stmt 0 view .LVU3007 + 9410 .LBE643: + ARM GAS /tmp/ccYgfTud.s page 556 - 8265 .LBB571: - 8266 .LBI571: + 9411 .LBE642: + 306:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 9412 .loc 1 306 7 is_stmt 1 view .LVU3008 + 9413 .LBB644: + 9414 .LBI644: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 8267 .loc 4 358 22 view .LVU2668 - 8268 .LBB572: + 9415 .loc 4 358 22 view .LVU3009 + 9416 .LBB645: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8269 .loc 4 360 3 view .LVU2669 - 8270 01a6 02F58E32 add r2, r2, #72704 - 8271 01aa 1368 ldr r3, [r2] - 8272 01ac 43F04003 orr r3, r3, #64 - 8273 01b0 1360 str r3, [r2] - 8274 .LVL649: + 9417 .loc 4 360 3 view .LVU3010 + 9418 01aa 02F58E32 add r2, r2, #72704 + 9419 01ae 1368 ldr r3, [r2] + 9420 01b0 43F04003 orr r3, r3, #64 + 9421 01b4 1360 str r3, [r2] + 9422 .LVL785: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8275 .loc 4 360 3 is_stmt 0 view .LVU2670 - 8276 .LBE572: - 8277 .LBE571: - 234:Src/main.c **** TO6_before = TO6; - 8278 .loc 1 234 7 is_stmt 1 view .LVU2671 - 8279 01b2 3E4B ldr r3, .L432+56 - 8280 01b4 3E4A ldr r2, .L432+60 - 8281 01b6 3F49 ldr r1, .L432+64 - 8282 01b8 2046 mov r0, r4 - 8283 01ba FFF7FEFF bl Decode_uart - 8284 .LVL650: - 235:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 8285 .loc 1 235 7 view .LVU2672 - 235:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 8286 .loc 1 235 18 is_stmt 0 view .LVU2673 - 8287 01be 3E4B ldr r3, .L432+68 - 8288 01c0 1A68 ldr r2, [r3] - 8289 01c2 3E4B ldr r3, .L432+72 - 8290 01c4 1A60 str r2, [r3] - 238:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 8291 .loc 1 238 7 is_stmt 1 view .LVU2674 - 238:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 8292 .loc 1 238 17 is_stmt 0 view .LVU2675 - 8293 01c6 0723 movs r3, #7 - 8294 01c8 344A ldr r2, .L432+40 - 8295 01ca 1370 strb r3, [r2] - 239:Src/main.c **** } - 8296 .loc 1 239 7 is_stmt 1 view .LVU2676 - 239:Src/main.c **** } - 8297 .loc 1 239 21 is_stmt 0 view .LVU2677 - 8298 01cc 2D4A ldr r2, .L432+16 - 8299 01ce 1370 strb r3, [r2] - 8300 01d0 E0E7 b .L386 - 8301 .L382: - 251:Src/main.c **** Stop_TIM10(); - 8302 .loc 1 251 6 is_stmt 1 view .LVU2678 - 251:Src/main.c **** Stop_TIM10(); - 8303 .loc 1 251 31 is_stmt 0 view .LVU2679 - 8304 01d2 2D4B ldr r3, .L432+20 - 8305 01d4 5A68 ldr r2, [r3, #4] @ float - 251:Src/main.c **** Stop_TIM10(); - 8306 .loc 1 251 25 view .LVU2680 - 8307 01d6 1A61 str r2, [r3, #16] @ float - 252:Src/main.c **** Init_params(); - ARM GAS /tmp/ccO46DoU.s page 525 + 9423 .loc 4 360 3 is_stmt 0 view .LVU3011 + 9424 .LBE645: + 9425 .LBE644: + 307:Src/main.c **** TO6_before = TO6; + 9426 .loc 1 307 7 is_stmt 1 view .LVU3012 + 9427 01b6 3E4B ldr r3, .L531+56 + 9428 01b8 3E4A ldr r2, .L531+60 + 9429 01ba 3F49 ldr r1, .L531+64 + 9430 01bc 2046 mov r0, r4 + 9431 01be FFF7FEFF bl Decode_uart + 9432 .LVL786: + 308:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 9433 .loc 1 308 7 view .LVU3013 + 308:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 9434 .loc 1 308 18 is_stmt 0 view .LVU3014 + 9435 01c2 3E4B ldr r3, .L531+68 + 9436 01c4 1A68 ldr r2, [r3] + 9437 01c6 3E4B ldr r3, .L531+72 + 9438 01c8 1A60 str r2, [r3] + 311:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 9439 .loc 1 311 7 is_stmt 1 view .LVU3015 + 311:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 9440 .loc 1 311 17 is_stmt 0 view .LVU3016 + 9441 01ca 0723 movs r3, #7 + 9442 01cc 344A ldr r2, .L531+40 + 9443 01ce 1370 strb r3, [r2] + 312:Src/main.c **** } + 9444 .loc 1 312 7 is_stmt 1 view .LVU3017 + 312:Src/main.c **** } + 9445 .loc 1 312 21 is_stmt 0 view .LVU3018 + 9446 01d0 2D4A ldr r2, .L531+16 + 9447 01d2 1370 strb r3, [r2] + 9448 01d4 E0E7 b .L475 + 9449 .L471: + 324:Src/main.c **** Stop_TIM10(); + 9450 .loc 1 324 6 is_stmt 1 view .LVU3019 + 324:Src/main.c **** Stop_TIM10(); + 9451 .loc 1 324 31 is_stmt 0 view .LVU3020 + 9452 01d6 2D4B ldr r3, .L531+20 + 9453 01d8 5A68 ldr r2, [r3, #4] @ float + 324:Src/main.c **** Stop_TIM10(); + ARM GAS /tmp/ccYgfTud.s page 557 - 8308 .loc 1 252 6 is_stmt 1 view .LVU2681 - 8309 01d8 FFF7FEFF bl Stop_TIM10 - 8310 .LVL651: - 253:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 8311 .loc 1 253 6 view .LVU2682 - 8312 01dc FFF7FEFF bl Init_params - 8313 .LVL652: - 254:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 8314 .loc 1 254 6 view .LVU2683 - 8315 .LBB573: - 8316 .LBI573: + 9454 .loc 1 324 25 view .LVU3021 + 9455 01da 1A61 str r2, [r3, #16] @ float + 325:Src/main.c **** Init_params(); + 9456 .loc 1 325 6 is_stmt 1 view .LVU3022 + 9457 01dc FFF7FEFF bl Stop_TIM10 + 9458 .LVL787: + 326:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 9459 .loc 1 326 6 view .LVU3023 + 9460 01e0 FFF7FEFF bl Init_params + 9461 .LVL788: + 327:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 9462 .loc 1 327 6 view .LVU3024 + 9463 .LBB646: + 9464 .LBI646: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 8317 .loc 4 370 22 view .LVU2684 - 8318 .LBB574: + 9465 .loc 4 370 22 view .LVU3025 + 9466 .LBB647: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8319 .loc 4 372 3 view .LVU2685 - 8320 01e0 314A ldr r2, .L432+52 - 8321 01e2 1368 ldr r3, [r2] - 8322 01e4 23F04003 bic r3, r3, #64 - 8323 01e8 1360 str r3, [r2] - 8324 .LVL653: + 9467 .loc 4 372 3 view .LVU3026 + 9468 01e4 314A ldr r2, .L531+52 + 9469 01e6 1368 ldr r3, [r2] + 9470 01e8 23F04003 bic r3, r3, #64 + 9471 01ec 1360 str r3, [r2] + 9472 .LVL789: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8325 .loc 4 372 3 is_stmt 0 view .LVU2686 - 8326 .LBE574: - 8327 .LBE573: - 255:Src/main.c **** CPU_state = HALT; - 8328 .loc 1 255 6 is_stmt 1 view .LVU2687 - 8329 .LBB575: - 8330 .LBI575: + 9473 .loc 4 372 3 is_stmt 0 view .LVU3027 + 9474 .LBE647: + 9475 .LBE646: + 328:Src/main.c **** CPU_state = HALT; + 9476 .loc 1 328 6 is_stmt 1 view .LVU3028 + 9477 .LBB648: + 9478 .LBI648: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 8331 .loc 4 370 22 view .LVU2688 - 8332 .LBB576: + 9479 .loc 4 370 22 view .LVU3029 + 9480 .LBB649: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8333 .loc 4 372 3 view .LVU2689 - 8334 01ea 02F58E32 add r2, r2, #72704 - 8335 01ee 1368 ldr r3, [r2] - 8336 01f0 23F04003 bic r3, r3, #64 - 8337 01f4 1360 str r3, [r2] - 8338 .LVL654: + 9481 .loc 4 372 3 view .LVU3030 + 9482 01ee 02F58E32 add r2, r2, #72704 + 9483 01f2 1368 ldr r3, [r2] + 9484 01f4 23F04003 bic r3, r3, #64 + 9485 01f8 1360 str r3, [r2] + 9486 .LVL790: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8339 .loc 4 372 3 is_stmt 0 view .LVU2690 - 8340 .LBE576: - 8341 .LBE575: - 256:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8342 .loc 1 256 6 is_stmt 1 view .LVU2691 - 256:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8343 .loc 1 256 16 is_stmt 0 view .LVU2692 - 8344 01f6 0023 movs r3, #0 - 8345 01f8 284A ldr r2, .L432+40 - 8346 01fa 1370 strb r3, [r2] - 257:Src/main.c **** UART_transmission_request = MESS_01; - 8347 .loc 1 257 6 is_stmt 1 view .LVU2693 - 257:Src/main.c **** UART_transmission_request = MESS_01; - 8348 .loc 1 257 20 is_stmt 0 view .LVU2694 - 8349 01fc 214A ldr r2, .L432+16 - 8350 01fe 1370 strb r3, [r2] - 258:Src/main.c **** break; - ARM GAS /tmp/ccO46DoU.s page 526 + 9487 .loc 4 372 3 is_stmt 0 view .LVU3031 + 9488 .LBE649: + 9489 .LBE648: + 329:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 9490 .loc 1 329 6 is_stmt 1 view .LVU3032 + 329:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 9491 .loc 1 329 16 is_stmt 0 view .LVU3033 + 9492 01fa 0023 movs r3, #0 + 9493 01fc 284A ldr r2, .L531+40 + 9494 01fe 1370 strb r3, [r2] + 330:Src/main.c **** UART_transmission_request = MESS_01; + 9495 .loc 1 330 6 is_stmt 1 view .LVU3034 + 330:Src/main.c **** UART_transmission_request = MESS_01; + 9496 .loc 1 330 20 is_stmt 0 view .LVU3035 + ARM GAS /tmp/ccYgfTud.s page 558 - 8351 .loc 1 258 6 is_stmt 1 view .LVU2695 - 258:Src/main.c **** break; - 8352 .loc 1 258 32 is_stmt 0 view .LVU2696 - 8353 0200 224B ldr r3, .L432+24 - 8354 0202 0122 movs r2, #1 - 8355 0204 1A70 strb r2, [r3] - 259:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 8356 .loc 1 259 5 is_stmt 1 view .LVU2697 - 8357 0206 74E7 b .L373 - 8358 .L381: - 261:Src/main.c **** State_Data[0]|=temp16&0xff; - 8359 .loc 1 261 6 view .LVU2698 - 261:Src/main.c **** State_Data[0]|=temp16&0xff; - 8360 .loc 1 261 15 is_stmt 0 view .LVU2699 - 8361 0208 2D48 ldr r0, .L432+76 - 8362 020a FFF7FEFF bl SD_READ - 8363 .LVL655: - 261:Src/main.c **** State_Data[0]|=temp16&0xff; - 8364 .loc 1 261 13 discriminator 1 view .LVU2700 - 8365 020e 82B2 uxth r2, r0 - 8366 0210 2C4B ldr r3, .L432+80 - 8367 0212 1A80 strh r2, [r3] @ movhi - 262:Src/main.c **** if (temp16==0) - 8368 .loc 1 262 6 is_stmt 1 view .LVU2701 - 262:Src/main.c **** if (temp16==0) - 8369 .loc 1 262 16 is_stmt 0 view .LVU2702 - 8370 0214 1E49 ldr r1, .L432+28 - 8371 0216 0B78 ldrb r3, [r1] @ zero_extendqisi2 - 262:Src/main.c **** if (temp16==0) - 8372 .loc 1 262 19 view .LVU2703 - 8373 0218 0343 orrs r3, r3, r0 - 8374 021a 0B70 strb r3, [r1] - 263:Src/main.c **** { - 8375 .loc 1 263 6 is_stmt 1 view .LVU2704 - 263:Src/main.c **** { - 8376 .loc 1 263 9 is_stmt 0 view .LVU2705 - 8377 021c 42B9 cbnz r2, .L387 - 265:Src/main.c **** } - 8378 .loc 1 265 7 is_stmt 1 view .LVU2706 - 265:Src/main.c **** } - 8379 .loc 1 265 33 is_stmt 0 view .LVU2707 - 8380 021e 1B4B ldr r3, .L432+24 - 8381 0220 0322 movs r2, #3 - 8382 0222 1A70 strb r2, [r3] - 8383 .L388: - 271:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8384 .loc 1 271 6 is_stmt 1 view .LVU2708 - 271:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8385 .loc 1 271 20 is_stmt 0 view .LVU2709 - 8386 0224 0023 movs r3, #0 - 8387 0226 174A ldr r2, .L432+16 - 8388 0228 1370 strb r3, [r2] - 272:Src/main.c **** break; - 8389 .loc 1 272 6 is_stmt 1 view .LVU2710 - 272:Src/main.c **** break; - 8390 .loc 1 272 16 is_stmt 0 view .LVU2711 - 8391 022a 1C4A ldr r2, .L432+40 - ARM GAS /tmp/ccO46DoU.s page 527 + 9497 0200 214A ldr r2, .L531+16 + 9498 0202 1370 strb r3, [r2] + 331:Src/main.c **** break; + 9499 .loc 1 331 6 is_stmt 1 view .LVU3036 + 331:Src/main.c **** break; + 9500 .loc 1 331 32 is_stmt 0 view .LVU3037 + 9501 0204 224B ldr r3, .L531+24 + 9502 0206 0122 movs r2, #1 + 9503 0208 1A70 strb r2, [r3] + 332:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 9504 .loc 1 332 5 is_stmt 1 view .LVU3038 + 9505 020a 72E7 b .L461 + 9506 .L470: + 334:Src/main.c **** State_Data[0]|=temp16&0xff; + 9507 .loc 1 334 6 view .LVU3039 + 334:Src/main.c **** State_Data[0]|=temp16&0xff; + 9508 .loc 1 334 15 is_stmt 0 view .LVU3040 + 9509 020c 2D48 ldr r0, .L531+76 + 9510 020e FFF7FEFF bl SD_READ + 9511 .LVL791: + 334:Src/main.c **** State_Data[0]|=temp16&0xff; + 9512 .loc 1 334 13 discriminator 1 view .LVU3041 + 9513 0212 82B2 uxth r2, r0 + 9514 0214 2C4B ldr r3, .L531+80 + 9515 0216 1A80 strh r2, [r3] @ movhi + 335:Src/main.c **** if (temp16==0) + 9516 .loc 1 335 6 is_stmt 1 view .LVU3042 + 335:Src/main.c **** if (temp16==0) + 9517 .loc 1 335 16 is_stmt 0 view .LVU3043 + 9518 0218 1E49 ldr r1, .L531+28 + 9519 021a 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 335:Src/main.c **** if (temp16==0) + 9520 .loc 1 335 19 view .LVU3044 + 9521 021c 0343 orrs r3, r3, r0 + 9522 021e 0B70 strb r3, [r1] + 336:Src/main.c **** { + 9523 .loc 1 336 6 is_stmt 1 view .LVU3045 + 336:Src/main.c **** { + 9524 .loc 1 336 9 is_stmt 0 view .LVU3046 + 9525 0220 42B9 cbnz r2, .L476 + 338:Src/main.c **** } + 9526 .loc 1 338 7 is_stmt 1 view .LVU3047 + 338:Src/main.c **** } + 9527 .loc 1 338 33 is_stmt 0 view .LVU3048 + 9528 0222 1B4B ldr r3, .L531+24 + 9529 0224 0322 movs r2, #3 + 9530 0226 1A70 strb r2, [r3] + 9531 .L477: + 344:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 9532 .loc 1 344 6 is_stmt 1 view .LVU3049 + 344:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 9533 .loc 1 344 20 is_stmt 0 view .LVU3050 + 9534 0228 0023 movs r3, #0 + 9535 022a 174A ldr r2, .L531+16 + 9536 022c 1370 strb r3, [r2] + 345:Src/main.c **** break; + 9537 .loc 1 345 6 is_stmt 1 view .LVU3051 + ARM GAS /tmp/ccYgfTud.s page 559 - 8392 022c 1370 strb r3, [r2] - 273:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 8393 .loc 1 273 5 is_stmt 1 view .LVU2712 - 8394 022e 60E7 b .L373 - 8395 .L387: - 269:Src/main.c **** } - 8396 .loc 1 269 7 view .LVU2713 - 269:Src/main.c **** } - 8397 .loc 1 269 33 is_stmt 0 view .LVU2714 - 8398 0230 164B ldr r3, .L432+24 - 8399 0232 0122 movs r2, #1 - 8400 0234 1A70 strb r2, [r3] - 8401 0236 F5E7 b .L388 - 8402 .L380: - 275:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8403 .loc 1 275 6 is_stmt 1 view .LVU2715 - 275:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8404 .loc 1 275 32 is_stmt 0 view .LVU2716 - 8405 0238 144B ldr r3, .L432+24 - 8406 023a 0222 movs r2, #2 - 8407 023c 1A70 strb r2, [r3] - 276:Src/main.c **** break; - 8408 .loc 1 276 6 is_stmt 1 view .LVU2717 - 276:Src/main.c **** break; - 8409 .loc 1 276 16 is_stmt 0 view .LVU2718 - 8410 023e 114B ldr r3, .L432+16 - 8411 0240 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 8412 0242 164B ldr r3, .L432+40 - 8413 0244 1A70 strb r2, [r3] - 277:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 8414 .loc 1 277 5 is_stmt 1 view .LVU2719 - 8415 0246 54E7 b .L373 - 8416 .L379: - 279:Src/main.c **** UART_transmission_request = MESS_01; - 8417 .loc 1 279 6 view .LVU2720 - 279:Src/main.c **** UART_transmission_request = MESS_01; - 8418 .loc 1 279 21 is_stmt 0 view .LVU2721 - 8419 0248 FFF7FEFF bl SD_REMOVE - 8420 .LVL656: - 279:Src/main.c **** UART_transmission_request = MESS_01; - 8421 .loc 1 279 16 discriminator 1 view .LVU2722 - 8422 024c 104A ldr r2, .L432+28 - 8423 024e 1378 ldrb r3, [r2] @ zero_extendqisi2 - 279:Src/main.c **** UART_transmission_request = MESS_01; - 8424 .loc 1 279 19 discriminator 1 view .LVU2723 - 8425 0250 0343 orrs r3, r3, r0 - 8426 0252 1370 strb r3, [r2] - 280:Src/main.c **** CPU_state = CPU_state_old; - 8427 .loc 1 280 6 is_stmt 1 view .LVU2724 - 280:Src/main.c **** CPU_state = CPU_state_old; - 8428 .loc 1 280 32 is_stmt 0 view .LVU2725 - 8429 0254 0D4B ldr r3, .L432+24 - 8430 0256 0122 movs r2, #1 - 8431 0258 1A70 strb r2, [r3] - 281:Src/main.c **** break; - 8432 .loc 1 281 6 is_stmt 1 view .LVU2726 - 281:Src/main.c **** break; - ARM GAS /tmp/ccO46DoU.s page 528 + 345:Src/main.c **** break; + 9538 .loc 1 345 16 is_stmt 0 view .LVU3052 + 9539 022e 1C4A ldr r2, .L531+40 + 9540 0230 1370 strb r3, [r2] + 346:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 9541 .loc 1 346 5 is_stmt 1 view .LVU3053 + 9542 0232 5EE7 b .L461 + 9543 .L476: + 342:Src/main.c **** } + 9544 .loc 1 342 7 view .LVU3054 + 342:Src/main.c **** } + 9545 .loc 1 342 33 is_stmt 0 view .LVU3055 + 9546 0234 164B ldr r3, .L531+24 + 9547 0236 0122 movs r2, #1 + 9548 0238 1A70 strb r2, [r3] + 9549 023a F5E7 b .L477 + 9550 .L469: + 348:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 9551 .loc 1 348 6 is_stmt 1 view .LVU3056 + 348:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 9552 .loc 1 348 32 is_stmt 0 view .LVU3057 + 9553 023c 144B ldr r3, .L531+24 + 9554 023e 0222 movs r2, #2 + 9555 0240 1A70 strb r2, [r3] + 349:Src/main.c **** break; + 9556 .loc 1 349 6 is_stmt 1 view .LVU3058 + 349:Src/main.c **** break; + 9557 .loc 1 349 16 is_stmt 0 view .LVU3059 + 9558 0242 114B ldr r3, .L531+16 + 9559 0244 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 9560 0246 164B ldr r3, .L531+40 + 9561 0248 1A70 strb r2, [r3] + 350:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 9562 .loc 1 350 5 is_stmt 1 view .LVU3060 + 9563 024a 52E7 b .L461 + 9564 .L468: + 352:Src/main.c **** UART_transmission_request = MESS_01; + 9565 .loc 1 352 6 view .LVU3061 + 352:Src/main.c **** UART_transmission_request = MESS_01; + 9566 .loc 1 352 21 is_stmt 0 view .LVU3062 + 9567 024c FFF7FEFF bl SD_REMOVE + 9568 .LVL792: + 352:Src/main.c **** UART_transmission_request = MESS_01; + 9569 .loc 1 352 16 discriminator 1 view .LVU3063 + 9570 0250 104A ldr r2, .L531+28 + 9571 0252 1378 ldrb r3, [r2] @ zero_extendqisi2 + 352:Src/main.c **** UART_transmission_request = MESS_01; + 9572 .loc 1 352 19 discriminator 1 view .LVU3064 + 9573 0254 0343 orrs r3, r3, r0 + 9574 0256 1370 strb r3, [r2] + 353:Src/main.c **** CPU_state = CPU_state_old; + 9575 .loc 1 353 6 is_stmt 1 view .LVU3065 + 353:Src/main.c **** CPU_state = CPU_state_old; + 9576 .loc 1 353 32 is_stmt 0 view .LVU3066 + 9577 0258 0D4B ldr r3, .L531+24 + 9578 025a 0122 movs r2, #1 + 9579 025c 1A70 strb r2, [r3] + ARM GAS /tmp/ccYgfTud.s page 560 - 8433 .loc 1 281 16 is_stmt 0 view .LVU2727 - 8434 025a 0A4B ldr r3, .L432+16 - 8435 025c 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 8436 025e 0F4B ldr r3, .L432+40 - 8437 0260 1A70 strb r2, [r3] - 282:Src/main.c **** case STATE://6 - Transmith state message - 8438 .loc 1 282 5 is_stmt 1 view .LVU2728 - 8439 0262 46E7 b .L373 - 8440 .L378: - 284:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8441 .loc 1 284 6 view .LVU2729 - 284:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8442 .loc 1 284 32 is_stmt 0 view .LVU2730 - 8443 0264 094B ldr r3, .L432+24 - 8444 0266 0122 movs r2, #1 - 8445 0268 1A70 strb r2, [r3] - 285:Src/main.c **** break; - 8446 .loc 1 285 6 is_stmt 1 view .LVU2731 - 285:Src/main.c **** break; - 8447 .loc 1 285 16 is_stmt 0 view .LVU2732 - 8448 026a 064B ldr r3, .L432+16 - 8449 026c 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 8450 026e 0B4B ldr r3, .L432+40 - 8451 0270 1A70 strb r2, [r3] - 286:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 8452 .loc 1 286 5 is_stmt 1 view .LVU2733 - 8453 0272 3EE7 b .L373 - 8454 .L433: - 8455 .align 2 - 8456 .L432: - 8457 0274 00080040 .word 1073743872 - 8458 0278 00000000 .word u_rx_flg - 8459 027c 00100140 .word 1073811456 - 8460 0280 00E100E0 .word -536813312 - 8461 0284 00000000 .word CPU_state_old - 8462 0288 00000000 .word task - 8463 028c 00000000 .word UART_transmission_request - 8464 0290 00000000 .word State_Data - 8465 0294 00000000 .word flg_tmt - 8466 0298 00000240 .word 1073872896 - 8467 029c 00000000 .word CPU_state - 8468 02a0 00000000 .word COMMAND - 8469 02a4 00000000 .word CS_result - 8470 02a8 00380040 .word 1073756160 - 8471 02ac 00000000 .word Curr_setup - 8472 02b0 00000000 .word LD2_curr_setup - 8473 02b4 00000000 .word LD1_curr_setup - 8474 02b8 00000000 .word TO6 - 8475 02bc 00000000 .word TO6_before - 8476 02c0 00000000 .word Long_Data - 8477 02c4 00000000 .word temp16 - 8478 .L377: - 288:Src/main.c **** Stop_TIM10(); - 8479 .loc 1 288 6 view .LVU2734 - 288:Src/main.c **** Stop_TIM10(); - 8480 .loc 1 288 31 is_stmt 0 view .LVU2735 - 8481 02c8 7A4B ldr r3, .L434 - ARM GAS /tmp/ccO46DoU.s page 529 + 354:Src/main.c **** break; + 9580 .loc 1 354 6 is_stmt 1 view .LVU3067 + 354:Src/main.c **** break; + 9581 .loc 1 354 16 is_stmt 0 view .LVU3068 + 9582 025e 0A4B ldr r3, .L531+16 + 9583 0260 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 9584 0262 0F4B ldr r3, .L531+40 + 9585 0264 1A70 strb r2, [r3] + 355:Src/main.c **** case STATE://6 - Transmith state message + 9586 .loc 1 355 5 is_stmt 1 view .LVU3069 + 9587 0266 44E7 b .L461 + 9588 .L467: + 357:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 9589 .loc 1 357 6 view .LVU3070 + 357:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 9590 .loc 1 357 32 is_stmt 0 view .LVU3071 + 9591 0268 094B ldr r3, .L531+24 + 9592 026a 0122 movs r2, #1 + 9593 026c 1A70 strb r2, [r3] + 358:Src/main.c **** break; + 9594 .loc 1 358 6 is_stmt 1 view .LVU3072 + 358:Src/main.c **** break; + 9595 .loc 1 358 16 is_stmt 0 view .LVU3073 + 9596 026e 064B ldr r3, .L531+16 + 9597 0270 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 9598 0272 0B4B ldr r3, .L531+40 + 9599 0274 1A70 strb r2, [r3] + 359:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 9600 .loc 1 359 5 is_stmt 1 view .LVU3074 + 9601 0276 3CE7 b .L461 + 9602 .L532: + 9603 .align 2 + 9604 .L531: + 9605 0278 00080040 .word 1073743872 + 9606 027c 00000000 .word u_rx_flg + 9607 0280 00100140 .word 1073811456 + 9608 0284 00E100E0 .word -536813312 + 9609 0288 00000000 .word CPU_state_old + 9610 028c 00000000 .word task + 9611 0290 00000000 .word UART_transmission_request + 9612 0294 00000000 .word State_Data + 9613 0298 00000000 .word flg_tmt + 9614 029c 00000240 .word 1073872896 + 9615 02a0 00000000 .word CPU_state + 9616 02a4 00000000 .word COMMAND + 9617 02a8 00000000 .word CS_result + 9618 02ac 00380040 .word 1073756160 + 9619 02b0 00000000 .word Curr_setup + 9620 02b4 00000000 .word LD2_curr_setup + 9621 02b8 00000000 .word LD1_curr_setup + 9622 02bc 00000000 .word TO6 + 9623 02c0 00000000 .word TO6_before + 9624 02c4 00000000 .word Long_Data + 9625 02c8 00000000 .word temp16 + 9626 .L466: + 361:Src/main.c **** Stop_TIM10(); + 9627 .loc 1 361 6 view .LVU3075 + ARM GAS /tmp/ccYgfTud.s page 561 - 8482 02ca 5A68 ldr r2, [r3, #4] @ float - 288:Src/main.c **** Stop_TIM10(); - 8483 .loc 1 288 25 view .LVU2736 - 8484 02cc 1A61 str r2, [r3, #16] @ float - 289:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 8485 .loc 1 289 6 is_stmt 1 view .LVU2737 - 8486 02ce FFF7FEFF bl Stop_TIM10 - 8487 .LVL657: - 290:Src/main.c **** { - 8488 .loc 1 290 6 view .LVU2738 - 290:Src/main.c **** { - 8489 .loc 1 290 13 is_stmt 0 view .LVU2739 - 8490 02d2 794B ldr r3, .L434+4 - 8491 02d4 1B68 ldr r3, [r3] - 8492 02d6 794A ldr r2, .L434+8 - 8493 02d8 1268 ldr r2, [r2] - 290:Src/main.c **** { - 8494 .loc 1 290 9 view .LVU2740 - 8495 02da 9342 cmp r3, r2 - 8496 02dc 7FF609AF bls .L373 - 292:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8497 .loc 1 292 7 is_stmt 1 view .LVU2741 - 292:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8498 .loc 1 292 18 is_stmt 0 view .LVU2742 - 8499 02e0 764A ldr r2, .L434+8 - 8500 02e2 1360 str r3, [r2] - 293:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8501 .loc 1 293 7 is_stmt 1 view .LVU2743 - 293:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8502 .loc 1 293 25 is_stmt 0 view .LVU2744 - 8503 02e4 0120 movs r0, #1 - 8504 02e6 FFF7FEFF bl MPhD_T - 8505 .LVL658: - 293:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8506 .loc 1 293 23 discriminator 1 view .LVU2745 - 8507 02ea 754F ldr r7, .L434+12 - 8508 02ec 3881 strh r0, [r7, #8] @ movhi - 294:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8509 .loc 1 294 7 is_stmt 1 view .LVU2746 - 294:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8510 .loc 1 294 25 is_stmt 0 view .LVU2747 - 8511 02ee 0120 movs r0, #1 - 8512 02f0 FFF7FEFF bl MPhD_T - 8513 .LVL659: - 294:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8514 .loc 1 294 23 discriminator 1 view .LVU2748 - 8515 02f4 3881 strh r0, [r7, #8] @ movhi - 295:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8516 .loc 1 295 7 is_stmt 1 view .LVU2749 - 295:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8517 .loc 1 295 25 is_stmt 0 view .LVU2750 - 8518 02f6 0220 movs r0, #2 - 8519 02f8 FFF7FEFF bl MPhD_T - 8520 .LVL660: - 295:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8521 .loc 1 295 23 discriminator 1 view .LVU2751 - 8522 02fc 714E ldr r6, .L434+16 - ARM GAS /tmp/ccO46DoU.s page 530 + 361:Src/main.c **** Stop_TIM10(); + 9628 .loc 1 361 31 is_stmt 0 view .LVU3076 + 9629 02cc 9F4B ldr r3, .L533 + 9630 02ce 5A68 ldr r2, [r3, #4] @ float + 361:Src/main.c **** Stop_TIM10(); + 9631 .loc 1 361 25 view .LVU3077 + 9632 02d0 1A61 str r2, [r3, #16] @ float + 362:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 9633 .loc 1 362 6 is_stmt 1 view .LVU3078 + 9634 02d2 FFF7FEFF bl Stop_TIM10 + 9635 .LVL793: + 363:Src/main.c **** { + 9636 .loc 1 363 6 view .LVU3079 + 363:Src/main.c **** { + 9637 .loc 1 363 13 is_stmt 0 view .LVU3080 + 9638 02d6 9E4B ldr r3, .L533+4 + 9639 02d8 1B68 ldr r3, [r3] + 9640 02da 9E4A ldr r2, .L533+8 + 9641 02dc 1268 ldr r2, [r2] + 363:Src/main.c **** { + 9642 .loc 1 363 9 view .LVU3081 + 9643 02de 9342 cmp r3, r2 + 9644 02e0 7FF607AF bls .L461 + 365:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9645 .loc 1 365 7 is_stmt 1 view .LVU3082 + 365:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9646 .loc 1 365 18 is_stmt 0 view .LVU3083 + 9647 02e4 9B4A ldr r2, .L533+8 + 9648 02e6 1360 str r3, [r2] + 366:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9649 .loc 1 366 7 is_stmt 1 view .LVU3084 + 366:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9650 .loc 1 366 25 is_stmt 0 view .LVU3085 + 9651 02e8 0120 movs r0, #1 + 9652 02ea FFF7FEFF bl MPhD_T + 9653 .LVL794: + 366:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9654 .loc 1 366 23 discriminator 1 view .LVU3086 + 9655 02ee 9A4F ldr r7, .L533+12 + 9656 02f0 3881 strh r0, [r7, #8] @ movhi + 367:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9657 .loc 1 367 7 is_stmt 1 view .LVU3087 + 367:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9658 .loc 1 367 25 is_stmt 0 view .LVU3088 + 9659 02f2 0120 movs r0, #1 + 9660 02f4 FFF7FEFF bl MPhD_T + 9661 .LVL795: + 367:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9662 .loc 1 367 23 discriminator 1 view .LVU3089 + 9663 02f8 3881 strh r0, [r7, #8] @ movhi + 368:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9664 .loc 1 368 7 is_stmt 1 view .LVU3090 + 368:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9665 .loc 1 368 25 is_stmt 0 view .LVU3091 + 9666 02fa 0220 movs r0, #2 + 9667 02fc FFF7FEFF bl MPhD_T + 9668 .LVL796: + ARM GAS /tmp/ccYgfTud.s page 562 - 8523 02fe 3081 strh r0, [r6, #8] @ movhi - 296:Src/main.c **** - 8524 .loc 1 296 7 is_stmt 1 view .LVU2752 - 296:Src/main.c **** - 8525 .loc 1 296 25 is_stmt 0 view .LVU2753 - 8526 0300 0220 movs r0, #2 - 8527 0302 FFF7FEFF bl MPhD_T - 8528 .LVL661: - 296:Src/main.c **** - 8529 .loc 1 296 23 discriminator 1 view .LVU2754 - 8530 0306 3081 strh r0, [r6, #8] @ movhi - 299:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 8531 .loc 1 299 7 is_stmt 1 view .LVU2755 - 299:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 8532 .loc 1 299 14 is_stmt 0 view .LVU2756 - 8533 0308 0320 movs r0, #3 - 8534 030a FFF7FEFF bl MPhD_T - 8535 .LVL662: - 300:Src/main.c **** (void) MPhD_T(4); - 8536 .loc 1 300 7 is_stmt 1 view .LVU2757 - 300:Src/main.c **** (void) MPhD_T(4); - 8537 .loc 1 300 32 is_stmt 0 view .LVU2758 - 8538 030e 0320 movs r0, #3 - 8539 0310 FFF7FEFF bl MPhD_T - 8540 .LVL663: - 300:Src/main.c **** (void) MPhD_T(4); - 8541 .loc 1 300 30 discriminator 1 view .LVU2759 - 8542 0314 3880 strh r0, [r7] @ movhi - 301:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 8543 .loc 1 301 7 is_stmt 1 view .LVU2760 - 301:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 8544 .loc 1 301 14 is_stmt 0 view .LVU2761 - 8545 0316 0420 movs r0, #4 - 8546 0318 FFF7FEFF bl MPhD_T - 8547 .LVL664: - 302:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8548 .loc 1 302 7 is_stmt 1 view .LVU2762 - 302:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8549 .loc 1 302 32 is_stmt 0 view .LVU2763 - 8550 031c 0420 movs r0, #4 - 8551 031e FFF7FEFF bl MPhD_T - 8552 .LVL665: - 302:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8553 .loc 1 302 30 discriminator 1 view .LVU2764 - 8554 0322 3080 strh r0, [r6] @ movhi - 303:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 8555 .loc 1 303 7 is_stmt 1 view .LVU2765 - 303:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 8556 .loc 1 303 14 is_stmt 0 view .LVU2766 - 8557 0324 DFF8D081 ldr r8, .L434+68 - 8558 0328 0122 movs r2, #1 - 8559 032a 3946 mov r1, r7 - 8560 032c 4046 mov r0, r8 - 8561 032e FFF7FEFF bl PID_Controller_Temp - 8562 .LVL666: - 8563 0332 0146 mov r1, r0 - 303:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - ARM GAS /tmp/ccO46DoU.s page 531 + 368:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9669 .loc 1 368 23 discriminator 1 view .LVU3092 + 9670 0300 964E ldr r6, .L533+16 + 9671 0302 3081 strh r0, [r6, #8] @ movhi + 369:Src/main.c **** + 9672 .loc 1 369 7 is_stmt 1 view .LVU3093 + 369:Src/main.c **** + 9673 .loc 1 369 25 is_stmt 0 view .LVU3094 + 9674 0304 0220 movs r0, #2 + 9675 0306 FFF7FEFF bl MPhD_T + 9676 .LVL797: + 369:Src/main.c **** + 9677 .loc 1 369 23 discriminator 1 view .LVU3095 + 9678 030a 3081 strh r0, [r6, #8] @ movhi + 372:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 9679 .loc 1 372 7 is_stmt 1 view .LVU3096 + 372:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 9680 .loc 1 372 14 is_stmt 0 view .LVU3097 + 9681 030c 0320 movs r0, #3 + 9682 030e FFF7FEFF bl MPhD_T + 9683 .LVL798: + 373:Src/main.c **** (void) MPhD_T(4); + 9684 .loc 1 373 7 is_stmt 1 view .LVU3098 + 373:Src/main.c **** (void) MPhD_T(4); + 9685 .loc 1 373 32 is_stmt 0 view .LVU3099 + 9686 0312 0320 movs r0, #3 + 9687 0314 FFF7FEFF bl MPhD_T + 9688 .LVL799: + 373:Src/main.c **** (void) MPhD_T(4); + 9689 .loc 1 373 30 discriminator 1 view .LVU3100 + 9690 0318 3880 strh r0, [r7] @ movhi + 374:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 9691 .loc 1 374 7 is_stmt 1 view .LVU3101 + 374:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 9692 .loc 1 374 14 is_stmt 0 view .LVU3102 + 9693 031a 0420 movs r0, #4 + 9694 031c FFF7FEFF bl MPhD_T + 9695 .LVL800: + 375:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 9696 .loc 1 375 7 is_stmt 1 view .LVU3103 + 375:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 9697 .loc 1 375 32 is_stmt 0 view .LVU3104 + 9698 0320 0420 movs r0, #4 + 9699 0322 FFF7FEFF bl MPhD_T + 9700 .LVL801: + 375:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 9701 .loc 1 375 30 discriminator 1 view .LVU3105 + 9702 0326 3080 strh r0, [r6] @ movhi + 376:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 9703 .loc 1 376 7 is_stmt 1 view .LVU3106 + 376:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 9704 .loc 1 376 14 is_stmt 0 view .LVU3107 + 9705 0328 DFF86482 ldr r8, .L533+68 + 9706 032c 0122 movs r2, #1 + 9707 032e 3946 mov r1, r7 + 9708 0330 4046 mov r0, r8 + 9709 0332 FFF7FEFF bl PID_Controller_Temp + ARM GAS /tmp/ccYgfTud.s page 563 - 8564 .loc 1 303 13 discriminator 1 view .LVU2767 - 8565 0334 644D ldr r5, .L434+20 - 8566 0336 2880 strh r0, [r5] @ movhi - 304:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 8567 .loc 1 304 7 is_stmt 1 view .LVU2768 - 8568 0338 0320 movs r0, #3 - 8569 033a FFF7FEFF bl Set_LTEC - 8570 .LVL667: - 305:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 8571 .loc 1 305 7 view .LVU2769 - 305:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 8572 .loc 1 305 14 is_stmt 0 view .LVU2770 - 8573 033e DFF8B491 ldr r9, .L434+64 - 8574 0342 0222 movs r2, #2 - 8575 0344 3146 mov r1, r6 - 8576 0346 4846 mov r0, r9 - 8577 0348 FFF7FEFF bl PID_Controller_Temp - 8578 .LVL668: - 8579 034c 0146 mov r1, r0 - 305:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 8580 .loc 1 305 13 discriminator 1 view .LVU2771 - 8581 034e 2880 strh r0, [r5] @ movhi - 306:Src/main.c **** - 8582 .loc 1 306 7 is_stmt 1 view .LVU2772 - 8583 0350 0420 movs r0, #4 - 8584 0352 FFF7FEFF bl Set_LTEC - 8585 .LVL669: - 308:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 8586 .loc 1 308 7 view .LVU2773 - 308:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 8587 .loc 1 308 31 is_stmt 0 view .LVU2774 - 8588 0356 3B89 ldrh r3, [r7, #8] - 308:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 8589 .loc 1 308 20 view .LVU2775 - 8590 0358 5C4C ldr r4, .L434+24 - 8591 035a 6380 strh r3, [r4, #2] @ movhi - 309:Src/main.c **** - 8592 .loc 1 309 7 is_stmt 1 view .LVU2776 - 309:Src/main.c **** - 8593 .loc 1 309 31 is_stmt 0 view .LVU2777 - 8594 035c 3389 ldrh r3, [r6, #8] - 309:Src/main.c **** - 8595 .loc 1 309 20 view .LVU2778 - 8596 035e A380 strh r3, [r4, #4] @ movhi - 311:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 8597 .loc 1 311 7 is_stmt 1 view .LVU2779 - 8598 0360 B8F80C10 ldrh r1, [r8, #12] - 8599 0364 0120 movs r0, #1 - 8600 0366 FFF7FEFF bl Set_LTEC - 8601 .LVL670: - 312:Src/main.c **** - 8602 .loc 1 312 7 view .LVU2780 - 8603 036a B9F80C10 ldrh r1, [r9, #12] - 8604 036e 0220 movs r0, #2 - 8605 0370 FFF7FEFF bl Set_LTEC - 8606 .LVL671: - 316:Src/main.c **** temp16 = Get_ADC(1); - ARM GAS /tmp/ccO46DoU.s page 532 + 9710 .LVL802: + 9711 0336 0146 mov r1, r0 + 376:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 9712 .loc 1 376 13 discriminator 1 view .LVU3108 + 9713 0338 894D ldr r5, .L533+20 + 9714 033a 2880 strh r0, [r5] @ movhi + 377:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 9715 .loc 1 377 7 is_stmt 1 view .LVU3109 + 9716 033c 0320 movs r0, #3 + 9717 033e FFF7FEFF bl Set_LTEC + 9718 .LVL803: + 378:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 9719 .loc 1 378 7 view .LVU3110 + 378:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 9720 .loc 1 378 14 is_stmt 0 view .LVU3111 + 9721 0342 DFF84892 ldr r9, .L533+64 + 9722 0346 0222 movs r2, #2 + 9723 0348 3146 mov r1, r6 + 9724 034a 4846 mov r0, r9 + 9725 034c FFF7FEFF bl PID_Controller_Temp + 9726 .LVL804: + 9727 0350 0146 mov r1, r0 + 378:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 9728 .loc 1 378 13 discriminator 1 view .LVU3112 + 9729 0352 2880 strh r0, [r5] @ movhi + 379:Src/main.c **** + 9730 .loc 1 379 7 is_stmt 1 view .LVU3113 + 9731 0354 0420 movs r0, #4 + 9732 0356 FFF7FEFF bl Set_LTEC + 9733 .LVL805: + 381:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 9734 .loc 1 381 7 view .LVU3114 + 381:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 9735 .loc 1 381 31 is_stmt 0 view .LVU3115 + 9736 035a 3B89 ldrh r3, [r7, #8] + 381:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 9737 .loc 1 381 20 view .LVU3116 + 9738 035c 814C ldr r4, .L533+24 + 9739 035e 6380 strh r3, [r4, #2] @ movhi + 382:Src/main.c **** + 9740 .loc 1 382 7 is_stmt 1 view .LVU3117 + 382:Src/main.c **** + 9741 .loc 1 382 31 is_stmt 0 view .LVU3118 + 9742 0360 3389 ldrh r3, [r6, #8] + 382:Src/main.c **** + 9743 .loc 1 382 20 view .LVU3119 + 9744 0362 A380 strh r3, [r4, #4] @ movhi + 384:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 9745 .loc 1 384 7 is_stmt 1 view .LVU3120 + 9746 0364 B8F80C10 ldrh r1, [r8, #12] + 9747 0368 0120 movs r0, #1 + 9748 036a FFF7FEFF bl Set_LTEC + 9749 .LVL806: + 385:Src/main.c **** + 9750 .loc 1 385 7 view .LVU3121 + 9751 036e B9F80C10 ldrh r1, [r9, #12] + 9752 0372 0220 movs r0, #2 + ARM GAS /tmp/ccYgfTud.s page 564 - 8607 .loc 1 316 7 view .LVU2781 - 316:Src/main.c **** temp16 = Get_ADC(1); - 8608 .loc 1 316 16 is_stmt 0 view .LVU2782 - 8609 0374 0020 movs r0, #0 - 8610 0376 FFF7FEFF bl Get_ADC - 8611 .LVL672: - 316:Src/main.c **** temp16 = Get_ADC(1); - 8612 .loc 1 316 14 discriminator 1 view .LVU2783 - 8613 037a 2880 strh r0, [r5] @ movhi - 317:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 8614 .loc 1 317 7 is_stmt 1 view .LVU2784 - 317:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 8615 .loc 1 317 16 is_stmt 0 view .LVU2785 - 8616 037c 0120 movs r0, #1 - 8617 037e FFF7FEFF bl Get_ADC - 8618 .LVL673: - 317:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 8619 .loc 1 317 14 discriminator 1 view .LVU2786 - 8620 0382 2880 strh r0, [r5] @ movhi - 318:Src/main.c **** - 8621 .loc 1 318 7 is_stmt 1 view .LVU2787 - 318:Src/main.c **** - 8622 .loc 1 318 20 is_stmt 0 view .LVU2788 - 8623 0384 E081 strh r0, [r4, #14] @ movhi - 321:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 8624 .loc 1 321 7 is_stmt 1 view .LVU2789 - 321:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 8625 .loc 1 321 16 is_stmt 0 view .LVU2790 - 8626 0386 0120 movs r0, #1 - 8627 0388 FFF7FEFF bl Get_ADC - 8628 .LVL674: - 321:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 8629 .loc 1 321 14 discriminator 1 view .LVU2791 - 8630 038c 2880 strh r0, [r5] @ movhi - 322:Src/main.c **** - 8631 .loc 1 322 7 is_stmt 1 view .LVU2792 - 322:Src/main.c **** - 8632 .loc 1 322 20 is_stmt 0 view .LVU2793 - 8633 038e 2082 strh r0, [r4, #16] @ movhi - 325:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 8634 .loc 1 325 7 is_stmt 1 view .LVU2794 - 325:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 8635 .loc 1 325 16 is_stmt 0 view .LVU2795 - 8636 0390 0120 movs r0, #1 - 8637 0392 FFF7FEFF bl Get_ADC - 8638 .LVL675: - 325:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 8639 .loc 1 325 14 discriminator 1 view .LVU2796 - 8640 0396 2880 strh r0, [r5] @ movhi - 326:Src/main.c **** - 8641 .loc 1 326 7 is_stmt 1 view .LVU2797 - 326:Src/main.c **** - 8642 .loc 1 326 20 is_stmt 0 view .LVU2798 - 8643 0398 6082 strh r0, [r4, #18] @ movhi - 329:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 8644 .loc 1 329 7 is_stmt 1 view .LVU2799 - 329:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - ARM GAS /tmp/ccO46DoU.s page 533 + 9753 0374 FFF7FEFF bl Set_LTEC + 9754 .LVL807: + 389:Src/main.c **** temp16 = Get_ADC(1); + 9755 .loc 1 389 7 view .LVU3122 + 389:Src/main.c **** temp16 = Get_ADC(1); + 9756 .loc 1 389 16 is_stmt 0 view .LVU3123 + 9757 0378 0020 movs r0, #0 + 9758 037a FFF7FEFF bl Get_ADC + 9759 .LVL808: + 389:Src/main.c **** temp16 = Get_ADC(1); + 9760 .loc 1 389 14 discriminator 1 view .LVU3124 + 9761 037e 2880 strh r0, [r5] @ movhi + 390:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 9762 .loc 1 390 7 is_stmt 1 view .LVU3125 + 390:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 9763 .loc 1 390 16 is_stmt 0 view .LVU3126 + 9764 0380 0120 movs r0, #1 + 9765 0382 FFF7FEFF bl Get_ADC + 9766 .LVL809: + 390:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 9767 .loc 1 390 14 discriminator 1 view .LVU3127 + 9768 0386 2880 strh r0, [r5] @ movhi + 391:Src/main.c **** + 9769 .loc 1 391 7 is_stmt 1 view .LVU3128 + 391:Src/main.c **** + 9770 .loc 1 391 20 is_stmt 0 view .LVU3129 + 9771 0388 E081 strh r0, [r4, #14] @ movhi + 394:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 9772 .loc 1 394 7 is_stmt 1 view .LVU3130 + 394:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 9773 .loc 1 394 16 is_stmt 0 view .LVU3131 + 9774 038a 0120 movs r0, #1 + 9775 038c FFF7FEFF bl Get_ADC + 9776 .LVL810: + 394:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 9777 .loc 1 394 14 discriminator 1 view .LVU3132 + 9778 0390 2880 strh r0, [r5] @ movhi + 395:Src/main.c **** + 9779 .loc 1 395 7 is_stmt 1 view .LVU3133 + 395:Src/main.c **** + 9780 .loc 1 395 20 is_stmt 0 view .LVU3134 + 9781 0392 2082 strh r0, [r4, #16] @ movhi + 398:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 9782 .loc 1 398 7 is_stmt 1 view .LVU3135 + 398:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 9783 .loc 1 398 16 is_stmt 0 view .LVU3136 + 9784 0394 0120 movs r0, #1 + 9785 0396 FFF7FEFF bl Get_ADC + 9786 .LVL811: + 398:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 9787 .loc 1 398 14 discriminator 1 view .LVU3137 + 9788 039a 2880 strh r0, [r5] @ movhi + 399:Src/main.c **** + 9789 .loc 1 399 7 is_stmt 1 view .LVU3138 + 399:Src/main.c **** + 9790 .loc 1 399 20 is_stmt 0 view .LVU3139 + 9791 039c 6082 strh r0, [r4, #18] @ movhi + ARM GAS /tmp/ccYgfTud.s page 565 - 8645 .loc 1 329 16 is_stmt 0 view .LVU2800 - 8646 039a 0120 movs r0, #1 - 8647 039c FFF7FEFF bl Get_ADC - 8648 .LVL676: - 329:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 8649 .loc 1 329 14 discriminator 1 view .LVU2801 - 8650 03a0 2880 strh r0, [r5] @ movhi - 330:Src/main.c **** - 8651 .loc 1 330 7 is_stmt 1 view .LVU2802 - 330:Src/main.c **** - 8652 .loc 1 330 21 is_stmt 0 view .LVU2803 - 8653 03a2 A082 strh r0, [r4, #20] @ movhi - 333:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 8654 .loc 1 333 7 is_stmt 1 view .LVU2804 - 333:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 8655 .loc 1 333 16 is_stmt 0 view .LVU2805 - 8656 03a4 0120 movs r0, #1 - 8657 03a6 FFF7FEFF bl Get_ADC - 8658 .LVL677: - 333:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 8659 .loc 1 333 14 discriminator 1 view .LVU2806 - 8660 03aa 2880 strh r0, [r5] @ movhi - 334:Src/main.c **** temp16 = Get_ADC(2); - 8661 .loc 1 334 7 is_stmt 1 view .LVU2807 - 334:Src/main.c **** temp16 = Get_ADC(2); - 8662 .loc 1 334 21 is_stmt 0 view .LVU2808 - 8663 03ac E082 strh r0, [r4, #22] @ movhi - 335:Src/main.c **** - 8664 .loc 1 335 7 is_stmt 1 view .LVU2809 - 335:Src/main.c **** - 8665 .loc 1 335 16 is_stmt 0 view .LVU2810 - 8666 03ae 0220 movs r0, #2 - 8667 03b0 FFF7FEFF bl Get_ADC - 8668 .LVL678: - 335:Src/main.c **** - 8669 .loc 1 335 14 discriminator 1 view .LVU2811 - 8670 03b4 2880 strh r0, [r5] @ movhi - 338:Src/main.c **** temp16 = Get_ADC(4); - 8671 .loc 1 338 7 is_stmt 1 view .LVU2812 - 338:Src/main.c **** temp16 = Get_ADC(4); - 8672 .loc 1 338 16 is_stmt 0 view .LVU2813 - 8673 03b6 0320 movs r0, #3 - 8674 03b8 FFF7FEFF bl Get_ADC - 8675 .LVL679: - 338:Src/main.c **** temp16 = Get_ADC(4); - 8676 .loc 1 338 14 discriminator 1 view .LVU2814 - 8677 03bc 2880 strh r0, [r5] @ movhi - 339:Src/main.c **** Long_Data[12] = temp16; - 8678 .loc 1 339 7 is_stmt 1 view .LVU2815 - 339:Src/main.c **** Long_Data[12] = temp16; - 8679 .loc 1 339 16 is_stmt 0 view .LVU2816 - 8680 03be 0420 movs r0, #4 - 8681 03c0 FFF7FEFF bl Get_ADC - 8682 .LVL680: - 339:Src/main.c **** Long_Data[12] = temp16; - 8683 .loc 1 339 14 discriminator 1 view .LVU2817 - 8684 03c4 2880 strh r0, [r5] @ movhi - ARM GAS /tmp/ccO46DoU.s page 534 + 402:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 9792 .loc 1 402 7 is_stmt 1 view .LVU3140 + 402:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 9793 .loc 1 402 16 is_stmt 0 view .LVU3141 + 9794 039e 0120 movs r0, #1 + 9795 03a0 FFF7FEFF bl Get_ADC + 9796 .LVL812: + 402:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 9797 .loc 1 402 14 discriminator 1 view .LVU3142 + 9798 03a4 2880 strh r0, [r5] @ movhi + 403:Src/main.c **** + 9799 .loc 1 403 7 is_stmt 1 view .LVU3143 + 403:Src/main.c **** + 9800 .loc 1 403 21 is_stmt 0 view .LVU3144 + 9801 03a6 A082 strh r0, [r4, #20] @ movhi + 406:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 9802 .loc 1 406 7 is_stmt 1 view .LVU3145 + 406:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 9803 .loc 1 406 16 is_stmt 0 view .LVU3146 + 9804 03a8 0120 movs r0, #1 + 9805 03aa FFF7FEFF bl Get_ADC + 9806 .LVL813: + 406:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 9807 .loc 1 406 14 discriminator 1 view .LVU3147 + 9808 03ae 2880 strh r0, [r5] @ movhi + 407:Src/main.c **** temp16 = Get_ADC(2); + 9809 .loc 1 407 7 is_stmt 1 view .LVU3148 + 407:Src/main.c **** temp16 = Get_ADC(2); + 9810 .loc 1 407 21 is_stmt 0 view .LVU3149 + 9811 03b0 E082 strh r0, [r4, #22] @ movhi + 408:Src/main.c **** + 9812 .loc 1 408 7 is_stmt 1 view .LVU3150 + 408:Src/main.c **** + 9813 .loc 1 408 16 is_stmt 0 view .LVU3151 + 9814 03b2 0220 movs r0, #2 + 9815 03b4 FFF7FEFF bl Get_ADC + 9816 .LVL814: + 408:Src/main.c **** + 9817 .loc 1 408 14 discriminator 1 view .LVU3152 + 9818 03b8 2880 strh r0, [r5] @ movhi + 411:Src/main.c **** temp16 = Get_ADC(4); + 9819 .loc 1 411 7 is_stmt 1 view .LVU3153 + 411:Src/main.c **** temp16 = Get_ADC(4); + 9820 .loc 1 411 16 is_stmt 0 view .LVU3154 + 9821 03ba 0320 movs r0, #3 + 9822 03bc FFF7FEFF bl Get_ADC + 9823 .LVL815: + 411:Src/main.c **** temp16 = Get_ADC(4); + 9824 .loc 1 411 14 discriminator 1 view .LVU3155 + 9825 03c0 2880 strh r0, [r5] @ movhi + 412:Src/main.c **** Long_Data[12] = temp16; + 9826 .loc 1 412 7 is_stmt 1 view .LVU3156 + 412:Src/main.c **** Long_Data[12] = temp16; + 9827 .loc 1 412 16 is_stmt 0 view .LVU3157 + 9828 03c2 0420 movs r0, #4 + 9829 03c4 FFF7FEFF bl Get_ADC + 9830 .LVL816: + ARM GAS /tmp/ccYgfTud.s page 566 - 340:Src/main.c **** temp16 = Get_ADC(5); - 8685 .loc 1 340 7 is_stmt 1 view .LVU2818 - 340:Src/main.c **** temp16 = Get_ADC(5); - 8686 .loc 1 340 21 is_stmt 0 view .LVU2819 - 8687 03c6 2083 strh r0, [r4, #24] @ movhi - 341:Src/main.c **** - 8688 .loc 1 341 7 is_stmt 1 view .LVU2820 - 341:Src/main.c **** - 8689 .loc 1 341 16 is_stmt 0 view .LVU2821 - 8690 03c8 0520 movs r0, #5 - 8691 03ca FFF7FEFF bl Get_ADC - 8692 .LVL681: - 341:Src/main.c **** - 8693 .loc 1 341 14 discriminator 1 view .LVU2822 - 8694 03ce 2880 strh r0, [r5] @ movhi - 344:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 8695 .loc 1 344 7 is_stmt 1 view .LVU2823 - 344:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 8696 .loc 1 344 16 is_stmt 0 view .LVU2824 - 8697 03d0 3F4B ldr r3, .L434+28 - 8698 03d2 1B68 ldr r3, [r3] - 8699 03d4 3F4A ldr r2, .L434+32 - 8700 03d6 1360 str r3, [r2] - 345:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 8701 .loc 1 345 7 is_stmt 1 view .LVU2825 - 345:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 8702 .loc 1 345 20 is_stmt 0 view .LVU2826 - 8703 03d8 E380 strh r3, [r4, #6] @ movhi - 346:Src/main.c **** - 8704 .loc 1 346 7 is_stmt 1 view .LVU2827 - 346:Src/main.c **** - 8705 .loc 1 346 31 is_stmt 0 view .LVU2828 - 8706 03da 1B0C lsrs r3, r3, #16 - 346:Src/main.c **** - 8707 .loc 1 346 20 view .LVU2829 - 8708 03dc 2381 strh r3, [r4, #8] @ movhi - 349:Src/main.c **** - 8709 .loc 1 349 7 is_stmt 1 view .LVU2830 - 349:Src/main.c **** - 8710 .loc 1 349 31 is_stmt 0 view .LVU2831 - 8711 03de 3B88 ldrh r3, [r7] - 349:Src/main.c **** - 8712 .loc 1 349 20 view .LVU2832 - 8713 03e0 6381 strh r3, [r4, #10] @ movhi - 352:Src/main.c **** - 8714 .loc 1 352 7 is_stmt 1 view .LVU2833 - 352:Src/main.c **** - 8715 .loc 1 352 31 is_stmt 0 view .LVU2834 - 8716 03e2 3388 ldrh r3, [r6] - 352:Src/main.c **** - 8717 .loc 1 352 20 view .LVU2835 - 8718 03e4 A381 strh r3, [r4, #12] @ movhi - 354:Src/main.c **** { - 8719 .loc 1 354 7 is_stmt 1 view .LVU2836 - 354:Src/main.c **** { - 8720 .loc 1 354 21 is_stmt 0 view .LVU2837 - 8721 03e6 3C4B ldr r3, .L434+36 - ARM GAS /tmp/ccO46DoU.s page 535 + 412:Src/main.c **** Long_Data[12] = temp16; + 9831 .loc 1 412 14 discriminator 1 view .LVU3158 + 9832 03c8 2880 strh r0, [r5] @ movhi + 413:Src/main.c **** temp16 = Get_ADC(5); + 9833 .loc 1 413 7 is_stmt 1 view .LVU3159 + 413:Src/main.c **** temp16 = Get_ADC(5); + 9834 .loc 1 413 21 is_stmt 0 view .LVU3160 + 9835 03ca 2083 strh r0, [r4, #24] @ movhi + 414:Src/main.c **** + 9836 .loc 1 414 7 is_stmt 1 view .LVU3161 + 414:Src/main.c **** + 9837 .loc 1 414 16 is_stmt 0 view .LVU3162 + 9838 03cc 0520 movs r0, #5 + 9839 03ce FFF7FEFF bl Get_ADC + 9840 .LVL817: + 414:Src/main.c **** + 9841 .loc 1 414 14 discriminator 1 view .LVU3163 + 9842 03d2 2880 strh r0, [r5] @ movhi + 417:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 9843 .loc 1 417 7 is_stmt 1 view .LVU3164 + 417:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 9844 .loc 1 417 16 is_stmt 0 view .LVU3165 + 9845 03d4 644B ldr r3, .L533+28 + 9846 03d6 1B68 ldr r3, [r3] + 9847 03d8 644A ldr r2, .L533+32 + 9848 03da 1360 str r3, [r2] + 418:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 9849 .loc 1 418 7 is_stmt 1 view .LVU3166 + 418:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 9850 .loc 1 418 20 is_stmt 0 view .LVU3167 + 9851 03dc E380 strh r3, [r4, #6] @ movhi + 419:Src/main.c **** + 9852 .loc 1 419 7 is_stmt 1 view .LVU3168 + 419:Src/main.c **** + 9853 .loc 1 419 31 is_stmt 0 view .LVU3169 + 9854 03de 1B0C lsrs r3, r3, #16 + 419:Src/main.c **** + 9855 .loc 1 419 20 view .LVU3170 + 9856 03e0 2381 strh r3, [r4, #8] @ movhi + 422:Src/main.c **** + 9857 .loc 1 422 7 is_stmt 1 view .LVU3171 + 422:Src/main.c **** + 9858 .loc 1 422 31 is_stmt 0 view .LVU3172 + 9859 03e2 3B88 ldrh r3, [r7] + 422:Src/main.c **** + 9860 .loc 1 422 20 view .LVU3173 + 9861 03e4 6381 strh r3, [r4, #10] @ movhi + 425:Src/main.c **** + 9862 .loc 1 425 7 is_stmt 1 view .LVU3174 + 425:Src/main.c **** + 9863 .loc 1 425 31 is_stmt 0 view .LVU3175 + 9864 03e6 3388 ldrh r3, [r6] + 425:Src/main.c **** + 9865 .loc 1 425 20 view .LVU3176 + 9866 03e8 A381 strh r3, [r4, #12] @ movhi + 427:Src/main.c **** { + 9867 .loc 1 427 7 is_stmt 1 view .LVU3177 + ARM GAS /tmp/ccYgfTud.s page 567 - 8722 03e8 DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 - 354:Src/main.c **** { - 8723 .loc 1 354 10 view .LVU2838 - 8724 03ea 012B cmp r3, #1 - 8725 03ec 03D0 beq .L426 - 8726 .L389: - 361:Src/main.c **** } - 8727 .loc 1 361 7 is_stmt 1 view .LVU2839 - 361:Src/main.c **** } - 8728 .loc 1 361 21 is_stmt 0 view .LVU2840 - 8729 03ee 3B4B ldr r3, .L434+40 - 8730 03f0 0722 movs r2, #7 - 8731 03f2 1A70 strb r2, [r3] - 8732 03f4 7DE6 b .L373 - 8733 .L426: - 356:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 8734 .loc 1 356 8 is_stmt 1 view .LVU2841 - 356:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 8735 .loc 1 356 20 is_stmt 0 view .LVU2842 - 8736 03f6 0234 adds r4, r4, #2 - 8737 03f8 0D21 movs r1, #13 - 8738 03fa 2046 mov r0, r4 - 8739 03fc FFF7FEFF bl CalculateChecksum - 8740 .LVL682: - 8741 0400 0346 mov r3, r0 - 356:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 8742 .loc 1 356 18 discriminator 1 view .LVU2843 - 8743 0402 374A ldr r2, .L434+44 - 8744 0404 1080 strh r0, [r2] @ movhi - 357:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 8745 .loc 1 357 8 is_stmt 1 view .LVU2844 - 357:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 8746 .loc 1 357 27 is_stmt 0 view .LVU2845 - 8747 0406 A01E subs r0, r4, #2 - 8748 0408 8383 strh r3, [r0, #28] @ movhi - 358:Src/main.c **** State_Data[0]|=temp16&0xff; - 8749 .loc 1 358 8 is_stmt 1 view .LVU2846 - 358:Src/main.c **** State_Data[0]|=temp16&0xff; - 8750 .loc 1 358 17 is_stmt 0 view .LVU2847 - 8751 040a FFF7FEFF bl SD_SAVE - 8752 .LVL683: - 8753 040e 0346 mov r3, r0 - 358:Src/main.c **** State_Data[0]|=temp16&0xff; - 8754 .loc 1 358 15 discriminator 1 view .LVU2848 - 8755 0410 2880 strh r0, [r5] @ movhi - 359:Src/main.c **** } - 8756 .loc 1 359 8 is_stmt 1 view .LVU2849 - 359:Src/main.c **** } - 8757 .loc 1 359 18 is_stmt 0 view .LVU2850 - 8758 0412 3449 ldr r1, .L434+48 - 8759 0414 0A78 ldrb r2, [r1] @ zero_extendqisi2 - 359:Src/main.c **** } - 8760 .loc 1 359 21 view .LVU2851 - 8761 0416 1343 orrs r3, r3, r2 - 8762 0418 0B70 strb r3, [r1] - 8763 041a E8E7 b .L389 - 8764 .L376: - ARM GAS /tmp/ccO46DoU.s page 536 + 427:Src/main.c **** { + 9868 .loc 1 427 21 is_stmt 0 view .LVU3178 + 9869 03ea 614B ldr r3, .L533+36 + 9870 03ec DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 + 427:Src/main.c **** { + 9871 .loc 1 427 10 view .LVU3179 + 9872 03ee 012B cmp r3, #1 + 9873 03f0 03D0 beq .L524 + 9874 .L478: + 434:Src/main.c **** } + 9875 .loc 1 434 7 is_stmt 1 view .LVU3180 + 434:Src/main.c **** } + 9876 .loc 1 434 21 is_stmt 0 view .LVU3181 + 9877 03f2 604B ldr r3, .L533+40 + 9878 03f4 0722 movs r2, #7 + 9879 03f6 1A70 strb r2, [r3] + 9880 03f8 7BE6 b .L461 + 9881 .L524: + 429:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 9882 .loc 1 429 8 is_stmt 1 view .LVU3182 + 429:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 9883 .loc 1 429 20 is_stmt 0 view .LVU3183 + 9884 03fa 0234 adds r4, r4, #2 + 9885 03fc 0D21 movs r1, #13 + 9886 03fe 2046 mov r0, r4 + 9887 0400 FFF7FEFF bl CalculateChecksum + 9888 .LVL818: + 9889 0404 0346 mov r3, r0 + 429:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 9890 .loc 1 429 18 discriminator 1 view .LVU3184 + 9891 0406 5C4A ldr r2, .L533+44 + 9892 0408 1080 strh r0, [r2] @ movhi + 430:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 9893 .loc 1 430 8 is_stmt 1 view .LVU3185 + 430:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 9894 .loc 1 430 27 is_stmt 0 view .LVU3186 + 9895 040a A01E subs r0, r4, #2 + 9896 040c 8383 strh r3, [r0, #28] @ movhi + 431:Src/main.c **** State_Data[0]|=temp16&0xff; + 9897 .loc 1 431 8 is_stmt 1 view .LVU3187 + 431:Src/main.c **** State_Data[0]|=temp16&0xff; + 9898 .loc 1 431 17 is_stmt 0 view .LVU3188 + 9899 040e FFF7FEFF bl SD_SAVE + 9900 .LVL819: + 9901 0412 0346 mov r3, r0 + 431:Src/main.c **** State_Data[0]|=temp16&0xff; + 9902 .loc 1 431 15 discriminator 1 view .LVU3189 + 9903 0414 2880 strh r0, [r5] @ movhi + 432:Src/main.c **** } + 9904 .loc 1 432 8 is_stmt 1 view .LVU3190 + 432:Src/main.c **** } + 9905 .loc 1 432 18 is_stmt 0 view .LVU3191 + 9906 0416 5949 ldr r1, .L533+48 + 9907 0418 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 432:Src/main.c **** } + 9908 .loc 1 432 21 view .LVU3192 + 9909 041a 1343 orrs r3, r3, r2 + ARM GAS /tmp/ccYgfTud.s page 568 - 365:Src/main.c **** { - 8765 .loc 1 365 6 is_stmt 1 view .LVU2852 - 365:Src/main.c **** { - 8766 .loc 1 365 10 is_stmt 0 view .LVU2853 - 8767 041c 3248 ldr r0, .L434+52 - 8768 041e FFF7FEFF bl CheckChecksum - 8769 .LVL684: - 365:Src/main.c **** { - 8770 .loc 1 365 9 discriminator 1 view .LVU2854 - 8771 0422 70B9 cbnz r0, .L427 - 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8772 .loc 1 374 7 is_stmt 1 view .LVU2855 - 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8773 .loc 1 374 17 is_stmt 0 view .LVU2856 - 8774 0424 2F4A ldr r2, .L434+48 - 8775 0426 1378 ldrb r3, [r2] @ zero_extendqisi2 - 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8776 .loc 1 374 21 view .LVU2857 - 8777 0428 43F00403 orr r3, r3, #4 - 8778 042c 1370 strb r3, [r2] - 375:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8779 .loc 1 375 7 is_stmt 1 view .LVU2858 - 375:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8780 .loc 1 375 17 is_stmt 0 view .LVU2859 - 8781 042e 2F4B ldr r3, .L434+56 - 8782 0430 0222 movs r2, #2 - 8783 0432 1A70 strb r2, [r3] - 376:Src/main.c **** } - 8784 .loc 1 376 7 is_stmt 1 view .LVU2860 - 376:Src/main.c **** } - 8785 .loc 1 376 21 is_stmt 0 view .LVU2861 - 8786 0434 294B ldr r3, .L434+40 - 8787 0436 0022 movs r2, #0 - 8788 0438 1A70 strb r2, [r3] - 8789 .L391: - 378:Src/main.c **** break; - 8790 .loc 1 378 6 is_stmt 1 view .LVU2862 - 378:Src/main.c **** break; - 8791 .loc 1 378 32 is_stmt 0 view .LVU2863 - 8792 043a 2D4B ldr r3, .L434+60 - 8793 043c 0122 movs r2, #1 - 8794 043e 1A70 strb r2, [r3] - 379:Src/main.c **** case RUN_TASK: - 8795 .loc 1 379 5 is_stmt 1 view .LVU2864 - 8796 0440 57E6 b .L373 - 8797 .L427: - 367:Src/main.c **** TO6_before = TO6; - 8798 .loc 1 367 7 view .LVU2865 - 8799 0442 254B ldr r3, .L434+36 - 8800 0444 2B4A ldr r2, .L434+64 - 8801 0446 2C49 ldr r1, .L434+68 - 8802 0448 2748 ldr r0, .L434+52 - 8803 044a FFF7FEFF bl Decode_task - 8804 .LVL685: - 368:Src/main.c **** CPU_state = RUN_TASK; - 8805 .loc 1 368 7 view .LVU2866 - 368:Src/main.c **** CPU_state = RUN_TASK; - ARM GAS /tmp/ccO46DoU.s page 537 + 9910 041c 0B70 strb r3, [r1] + 9911 041e E8E7 b .L478 + 9912 .L462: + 438:Src/main.c **** { + 9913 .loc 1 438 6 is_stmt 1 view .LVU3193 + 438:Src/main.c **** { + 9914 .loc 1 438 10 is_stmt 0 view .LVU3194 + 9915 0420 574C ldr r4, .L533+52 + 9916 0422 0321 movs r1, #3 + 9917 0424 2046 mov r0, r4 + 9918 0426 FFF7FEFF bl CalculateChecksum + 9919 .LVL820: + 438:Src/main.c **** { + 9920 .loc 1 438 69 discriminator 1 view .LVU3195 + 9921 042a E388 ldrh r3, [r4, #6] + 438:Src/main.c **** { + 9922 .loc 1 438 9 discriminator 1 view .LVU3196 + 9923 042c 9842 cmp r0, r3 + 9924 042e 0CD0 beq .L525 + 481:Src/main.c **** } + 9925 .loc 1 481 7 is_stmt 1 view .LVU3197 + 481:Src/main.c **** } + 9926 .loc 1 481 17 is_stmt 0 view .LVU3198 + 9927 0430 524A ldr r2, .L533+48 + 9928 0432 1378 ldrb r3, [r2] @ zero_extendqisi2 + 481:Src/main.c **** } + 9929 .loc 1 481 21 view .LVU3199 + 9930 0434 43F00403 orr r3, r3, #4 + 9931 0438 1370 strb r3, [r2] + 9932 .L483: + 483:Src/main.c **** CPU_state = CPU_state_old; + 9933 .loc 1 483 6 is_stmt 1 view .LVU3200 + 483:Src/main.c **** CPU_state = CPU_state_old; + 9934 .loc 1 483 32 is_stmt 0 view .LVU3201 + 9935 043a 524B ldr r3, .L533+56 + 9936 043c 0122 movs r2, #1 + 9937 043e 1A70 strb r2, [r3] + 484:Src/main.c **** break; + 9938 .loc 1 484 6 is_stmt 1 view .LVU3202 + 484:Src/main.c **** break; + 9939 .loc 1 484 16 is_stmt 0 view .LVU3203 + 9940 0440 4C4B ldr r3, .L533+40 + 9941 0442 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 9942 0444 504B ldr r3, .L533+60 + 9943 0446 1A70 strb r2, [r3] + 485:Src/main.c **** case DECODE_TASK: + 9944 .loc 1 485 5 is_stmt 1 view .LVU3204 + 9945 0448 53E6 b .L461 + 9946 .L525: + 9947 .LBB650: + 440:Src/main.c **** uint16_t param0 = COMMAND[1]; + 9948 .loc 1 440 7 view .LVU3205 + 440:Src/main.c **** uint16_t param0 = COMMAND[1]; + 9949 .loc 1 440 16 is_stmt 0 view .LVU3206 + 9950 044a 2288 ldrh r2, [r4] + 9951 .LVL821: + 441:Src/main.c **** uint16_t param1 = COMMAND[2]; + ARM GAS /tmp/ccYgfTud.s page 569 - 8806 .loc 1 368 18 is_stmt 0 view .LVU2867 - 8807 044e 204B ldr r3, .L434+28 - 8808 0450 1A68 ldr r2, [r3] - 8809 0452 2A4B ldr r3, .L434+72 - 8810 0454 1A60 str r2, [r3] - 369:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 8811 .loc 1 369 7 is_stmt 1 view .LVU2868 - 369:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 8812 .loc 1 369 17 is_stmt 0 view .LVU2869 - 8813 0456 0923 movs r3, #9 - 8814 0458 244A ldr r2, .L434+56 - 8815 045a 1370 strb r3, [r2] - 370:Src/main.c **** } - 8816 .loc 1 370 7 is_stmt 1 view .LVU2870 - 370:Src/main.c **** } - 8817 .loc 1 370 21 is_stmt 0 view .LVU2871 - 8818 045c 1F4A ldr r2, .L434+40 - 8819 045e 1370 strb r3, [r2] - 8820 0460 EBE7 b .L391 - 8821 .L374: - 381:Src/main.c **** { - 8822 .loc 1 381 6 is_stmt 1 view .LVU2872 - 381:Src/main.c **** { - 8823 .loc 1 381 18 is_stmt 0 view .LVU2873 - 8824 0462 144B ldr r3, .L434 - 8825 0464 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 8826 0466 012B cmp r3, #1 - 8827 0468 54D0 beq .L392 - 8828 046a 022B cmp r3, #2 - 8829 046c 00F03781 beq .L393 - 8830 .L394: - 636:Src/main.c **** { - 8831 .loc 1 636 6 is_stmt 1 view .LVU2874 - 636:Src/main.c **** { - 8832 .loc 1 636 13 is_stmt 0 view .LVU2875 - 8833 0470 114B ldr r3, .L434+4 - 8834 0472 1B68 ldr r3, [r3] - 8835 0474 114A ldr r2, .L434+8 - 8836 0476 1268 ldr r2, [r2] - 636:Src/main.c **** { - 8837 .loc 1 636 9 view .LVU2876 - 8838 0478 9342 cmp r3, r2 - 8839 047a 00F20882 bhi .L428 - 8840 .L411: - 688:Src/main.c **** - 8841 .loc 1 688 13 is_stmt 1 discriminator 1 view .LVU2877 - 8842 047e 204B ldr r3, .L434+76 - 8843 0480 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 8844 0482 002B cmp r3, #0 - 8845 0484 FBD0 beq .L411 - 690:Src/main.c **** - 8846 .loc 1 690 6 view .LVU2878 - 8847 0486 FFF7FEFF bl Stop_TIM10 - 8848 .LVL686: - 692:Src/main.c **** { - 8849 .loc 1 692 6 view .LVU2879 - 692:Src/main.c **** { - ARM GAS /tmp/ccO46DoU.s page 538 + 9952 .loc 1 441 7 is_stmt 1 view .LVU3207 + 441:Src/main.c **** uint16_t param1 = COMMAND[2]; + 9953 .loc 1 441 16 is_stmt 0 view .LVU3208 + 9954 044c 6388 ldrh r3, [r4, #2] + 9955 .LVL822: + 442:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 9956 .loc 1 442 7 is_stmt 1 view .LVU3209 + 442:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 9957 .loc 1 442 16 is_stmt 0 view .LVU3210 + 9958 044e A488 ldrh r4, [r4, #4] + 9959 .LVL823: + 443:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 9960 .loc 1 443 7 is_stmt 1 view .LVU3211 + 443:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 9961 .loc 1 443 15 is_stmt 0 view .LVU3212 + 9962 0450 02F00108 and r8, r2, #1 + 9963 .LVL824: + 444:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; + 9964 .loc 1 444 7 is_stmt 1 view .LVU3213 + 444:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; + 9965 .loc 1 444 15 is_stmt 0 view .LVU3214 + 9966 0454 C2F34006 ubfx r6, r2, #1, #1 + 9967 .LVL825: + 445:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 9968 .loc 1 445 7 is_stmt 1 view .LVU3215 + 445:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 9969 .loc 1 445 15 is_stmt 0 view .LVU3216 + 9970 0458 12F0020F tst r2, #2 + 9971 045c 00D0 beq .L480 + 445:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 9972 .loc 1 445 15 discriminator 1 view .LVU3217 + 9973 045e 0226 movs r6, #2 + 9974 .LVL826: + 9975 .L480: + 446:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 9976 .loc 1 446 7 is_stmt 1 view .LVU3218 + 446:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 9977 .loc 1 446 15 is_stmt 0 view .LVU3219 + 9978 0460 DDB2 uxtb r5, r3 + 9979 .LVL827: + 447:Src/main.c **** uint16_t pat_period = param1; + 9980 .loc 1 447 7 is_stmt 1 view .LVU3220 + 447:Src/main.c **** uint16_t pat_period = param1; + 9981 .loc 1 447 15 is_stmt 0 view .LVU3221 + 9982 0462 C3F30327 ubfx r7, r3, #8, #4 + 9983 .LVL828: + 448:Src/main.c **** + 9984 .loc 1 448 7 is_stmt 1 view .LVU3222 + 450:Src/main.c **** { + 9985 .loc 1 450 7 view .LVU3223 + 450:Src/main.c **** { + 9986 .loc 1 450 10 is_stmt 0 view .LVU3224 + 9987 0466 2343 orrs r3, r3, r4 + 9988 .LVL829: + 450:Src/main.c **** { + 9989 .loc 1 450 10 view .LVU3225 + 9990 0468 09D0 beq .L514 + ARM GAS /tmp/ccYgfTud.s page 570 - 8850 .loc 1 692 14 is_stmt 0 view .LVU2880 - 8851 048a 0A4B ldr r3, .L434 - 8852 048c DB8A ldrh r3, [r3, #22] - 692:Src/main.c **** { - 8853 .loc 1 692 9 view .LVU2881 - 8854 048e 032B cmp r3, #3 - 8855 0490 0BD9 bls .L412 - 694:Src/main.c **** TO10_counter = task.dt / 10; - 8856 .loc 1 694 7 is_stmt 1 view .LVU2882 - 694:Src/main.c **** TO10_counter = task.dt / 10; - 8857 .loc 1 694 26 is_stmt 0 view .LVU2883 - 8858 0492 1C4B ldr r3, .L434+80 - 8859 0494 1A68 ldr r2, [r3] - 8860 0496 1C4B ldr r3, .L434+84 - 8861 0498 DA60 str r2, [r3, #12] - 695:Src/main.c **** } - 8862 .loc 1 695 7 is_stmt 1 view .LVU2884 - 695:Src/main.c **** } - 8863 .loc 1 695 26 is_stmt 0 view .LVU2885 - 8864 049a 064B ldr r3, .L434 - 8865 049c 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 - 695:Src/main.c **** } - 8866 .loc 1 695 30 view .LVU2886 - 8867 049e 1B4A ldr r2, .L434+88 - 8868 04a0 A2FB0323 umull r2, r3, r2, r3 - 8869 04a4 DB08 lsrs r3, r3, #3 - 695:Src/main.c **** } - 8870 .loc 1 695 20 view .LVU2887 - 8871 04a6 1A4A ldr r2, .L434+92 - 8872 04a8 1360 str r3, [r2] - 8873 .L412: - 698:Src/main.c **** break; - 8874 .loc 1 698 6 is_stmt 1 view .LVU2888 - 698:Src/main.c **** break; - 8875 .loc 1 698 20 is_stmt 0 view .LVU2889 - 8876 04aa 0C4B ldr r3, .L434+40 - 8877 04ac 0922 movs r2, #9 - 8878 04ae 1A70 strb r2, [r3] - 699:Src/main.c **** } - 8879 .loc 1 699 9 is_stmt 1 view .LVU2890 - 8880 04b0 1FE6 b .L373 - 8881 .L435: - 8882 04b2 00BF .align 2 - 8883 .L434: - 8884 04b4 00000000 .word task - 8885 04b8 00000000 .word TO7 - 8886 04bc 00000000 .word TO7_before - 8887 04c0 00000000 .word LD1_param - 8888 04c4 00000000 .word LD2_param - 8889 04c8 00000000 .word temp16 - 8890 04cc 00000000 .word Long_Data - 8891 04d0 00000000 .word TO6 - 8892 04d4 00000000 .word TO6_stop - 8893 04d8 00000000 .word Curr_setup - 8894 04dc 00000000 .word CPU_state_old - 8895 04e0 00000000 .word CS_result - 8896 04e4 00000000 .word State_Data - ARM GAS /tmp/ccO46DoU.s page 539 + 458:Src/main.c **** { + 9991 .loc 1 458 8 is_stmt 1 view .LVU3226 + 458:Src/main.c **** { + 9992 .loc 1 458 11 is_stmt 0 view .LVU3227 + 9993 046a 1DB1 cbz r5, .L515 + 462:Src/main.c **** { + 9994 .loc 1 462 13 is_stmt 1 view .LVU3228 + 462:Src/main.c **** { + 9995 .loc 1 462 16 is_stmt 0 view .LVU3229 + 9996 046c 3F2D cmp r5, #63 + 9997 046e 02D9 bls .L482 + 464:Src/main.c **** } + 9998 .loc 1 464 18 view .LVU3230 + 9999 0470 3F25 movs r5, #63 + 10000 .LVL830: + 464:Src/main.c **** } + 10001 .loc 1 464 18 view .LVU3231 + 10002 0472 00E0 b .L482 + 10003 .LVL831: + 10004 .L515: + 460:Src/main.c **** } + 10005 .loc 1 460 18 view .LVU3232 + 10006 0474 0125 movs r5, #1 + 10007 .LVL832: + 10008 .L482: + 466:Src/main.c **** { + 10009 .loc 1 466 8 is_stmt 1 view .LVU3233 + 466:Src/main.c **** { + 10010 .loc 1 466 11 is_stmt 0 view .LVU3234 + 10011 0476 34B9 cbnz r4, .L481 + 468:Src/main.c **** } + 10012 .loc 1 468 20 view .LVU3235 + 10013 0478 4FF6FF74 movw r4, #65535 + 10014 .LVL833: + 468:Src/main.c **** } + 10015 .loc 1 468 20 view .LVU3236 + 10016 047c 03E0 b .L481 + 10017 .LVL834: + 10018 .L514: + 454:Src/main.c **** } + 10019 .loc 1 454 19 view .LVU3237 + 10020 047e 4FF6FF74 movw r4, #65535 + 10021 .LVL835: + 453:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + 10022 .loc 1 453 17 view .LVU3238 + 10023 0482 0227 movs r7, #2 + 10024 .LVL836: + 452:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; + 10025 .loc 1 452 17 view .LVU3239 + 10026 0484 0125 movs r5, #1 + 10027 .LVL837: + 10028 .L481: + 472:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 10029 .loc 1 472 7 is_stmt 1 view .LVU3240 + 472:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 10030 .loc 1 472 29 is_stmt 0 view .LVU3241 + 10031 0486 0094 str r4, [sp] + ARM GAS /tmp/ccYgfTud.s page 571 - 8897 04e8 00000000 .word COMMAND - 8898 04ec 00000000 .word CPU_state - 8899 04f0 00000000 .word UART_transmission_request - 8900 04f4 00000000 .word LD2_curr_setup - 8901 04f8 00000000 .word LD1_curr_setup - 8902 04fc 00000000 .word TO6_before - 8903 0500 00000000 .word TIM10_coflag - 8904 0504 00000000 .word TIM10_period - 8905 0508 00000000 .word htim10 - 8906 050c CDCCCCCC .word -858993459 - 8907 0510 00000000 .word TO10_counter - 8908 .L392: - 8909 .LBB577: - 403:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 8910 .loc 1 403 7 view .LVU2891 - 403:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 8911 .loc 1 403 38 is_stmt 0 view .LVU2892 - 8912 0514 AD4B ldr r3, .L436 - 8913 0516 D3ED077A vldr.32 s15, [r3, #28] - 403:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 8914 .loc 1 403 7 view .LVU2893 - 8915 051a FCEEE77A vcvt.u32.f32 s15, s15 - 8916 051e 17EE903A vmov r3, s15 @ int - 8917 0522 99B2 uxth r1, r3 - 8918 0524 0220 movs r0, #2 - 8919 0526 FFF7FEFF bl Set_LTEC - 8920 .LVL687: - 404:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 8921 .loc 1 404 7 is_stmt 1 view .LVU2894 - 404:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 8922 .loc 1 404 14 is_stmt 0 view .LVU2895 - 8923 052a 0320 movs r0, #3 - 8924 052c FFF7FEFF bl MPhD_T - 8925 .LVL688: - 405:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 8926 .loc 1 405 7 is_stmt 1 view .LVU2896 - 405:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 8927 .loc 1 405 32 is_stmt 0 view .LVU2897 - 8928 0530 0320 movs r0, #3 - 8929 0532 FFF7FEFF bl MPhD_T - 8930 .LVL689: - 405:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 8931 .loc 1 405 30 discriminator 1 view .LVU2898 - 8932 0536 A64C ldr r4, .L436+4 - 8933 0538 2080 strh r0, [r4] @ movhi - 406:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 8934 .loc 1 406 7 is_stmt 1 view .LVU2899 - 406:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 8935 .loc 1 406 14 is_stmt 0 view .LVU2900 - 8936 053a 0420 movs r0, #4 - 8937 053c FFF7FEFF bl MPhD_T - 8938 .LVL690: - 407:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8939 .loc 1 407 7 is_stmt 1 view .LVU2901 - 407:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8940 .loc 1 407 32 is_stmt 0 view .LVU2902 - 8941 0540 0420 movs r0, #4 - ARM GAS /tmp/ccO46DoU.s page 540 + 10032 0488 3B46 mov r3, r7 + 10033 048a 2A46 mov r2, r5 + 10034 .LVL838: + 472:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 10035 .loc 1 472 29 view .LVU3242 + 10036 048c 4146 mov r1, r8 + 10037 048e 3046 mov r0, r6 + 10038 0490 FFF7FEFF bl AD9102_Apply + 10039 .LVL839: + 473:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 10040 .loc 1 473 7 is_stmt 1 view .LVU3243 + 473:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 10041 .loc 1 473 21 is_stmt 0 view .LVU3244 + 10042 0494 394B ldr r3, .L533+48 + 10043 0496 5870 strb r0, [r3, #1] + 474:Src/main.c **** { + 10044 .loc 1 474 7 is_stmt 1 view .LVU3245 + 474:Src/main.c **** { + 10045 .loc 1 474 11 is_stmt 0 view .LVU3246 + 10046 0498 0194 str r4, [sp, #4] + 10047 049a 0097 str r7, [sp] + 10048 049c 2B46 mov r3, r5 + 10049 049e 3246 mov r2, r6 + 10050 04a0 4146 mov r1, r8 + 10051 04a2 FFF7FEFF bl AD9102_CheckFlags + 10052 .LVL840: + 474:Src/main.c **** { + 10053 .loc 1 474 10 discriminator 1 view .LVU3247 + 10054 04a6 0028 cmp r0, #0 + 10055 04a8 C7D0 beq .L483 + 476:Src/main.c **** } + 10056 .loc 1 476 8 is_stmt 1 view .LVU3248 + 476:Src/main.c **** } + 10057 .loc 1 476 18 is_stmt 0 view .LVU3249 + 10058 04aa 344A ldr r2, .L533+48 + 10059 04ac 1378 ldrb r3, [r2] @ zero_extendqisi2 + 476:Src/main.c **** } + 10060 .loc 1 476 22 view .LVU3250 + 10061 04ae 63F07F03 orn r3, r3, #127 + 10062 04b2 1370 strb r3, [r2] + 10063 04b4 C1E7 b .L483 + 10064 .LVL841: + 10065 .L465: + 476:Src/main.c **** } + 10066 .loc 1 476 22 view .LVU3251 + 10067 .LBE650: + 487:Src/main.c **** { + 10068 .loc 1 487 6 is_stmt 1 view .LVU3252 + 487:Src/main.c **** { + 10069 .loc 1 487 10 is_stmt 0 view .LVU3253 + 10070 04b6 3248 ldr r0, .L533+52 + 10071 04b8 FFF7FEFF bl CheckChecksum + 10072 .LVL842: + 487:Src/main.c **** { + 10073 .loc 1 487 9 discriminator 1 view .LVU3254 + 10074 04bc 70B9 cbnz r0, .L526 + 496:Src/main.c **** CPU_state = DEFAULT_ENABLE; + ARM GAS /tmp/ccYgfTud.s page 572 - 8942 0542 FFF7FEFF bl MPhD_T - 8943 .LVL691: - 407:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8944 .loc 1 407 30 discriminator 1 view .LVU2903 - 8945 0546 A34D ldr r5, .L436+8 - 8946 0548 2880 strh r0, [r5] @ movhi - 408:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 8947 .loc 1 408 7 is_stmt 1 view .LVU2904 - 408:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 8948 .loc 1 408 14 is_stmt 0 view .LVU2905 - 8949 054a 0122 movs r2, #1 - 8950 054c 2146 mov r1, r4 - 8951 054e A248 ldr r0, .L436+12 - 8952 0550 FFF7FEFF bl PID_Controller_Temp - 8953 .LVL692: - 8954 0554 0146 mov r1, r0 - 408:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 8955 .loc 1 408 13 discriminator 1 view .LVU2906 - 8956 0556 A14C ldr r4, .L436+16 - 8957 0558 2080 strh r0, [r4] @ movhi - 409:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 8958 .loc 1 409 7 is_stmt 1 view .LVU2907 - 8959 055a 0320 movs r0, #3 - 8960 055c FFF7FEFF bl Set_LTEC - 8961 .LVL693: - 410:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 8962 .loc 1 410 7 view .LVU2908 - 410:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 8963 .loc 1 410 14 is_stmt 0 view .LVU2909 - 8964 0560 0222 movs r2, #2 - 8965 0562 2946 mov r1, r5 - 8966 0564 9E48 ldr r0, .L436+20 - 8967 0566 FFF7FEFF bl PID_Controller_Temp - 8968 .LVL694: - 8969 056a 0146 mov r1, r0 - 410:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 8970 .loc 1 410 13 discriminator 1 view .LVU2910 - 8971 056c 2080 strh r0, [r4] @ movhi - 411:Src/main.c **** - 8972 .loc 1 411 7 is_stmt 1 view .LVU2911 - 8973 056e 0420 movs r0, #4 - 8974 0570 FFF7FEFF bl Set_LTEC - 8975 .LVL695: - 414:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 8976 .loc 1 414 7 view .LVU2912 - 8977 0574 9B4C ldr r4, .L436+24 - 8978 0576 0122 movs r2, #1 - 8979 0578 8021 movs r1, #128 - 8980 057a 2046 mov r0, r4 - 8981 057c FFF7FEFF bl HAL_GPIO_WritePin - 8982 .LVL696: - 415:Src/main.c **** - 8983 .loc 1 415 7 view .LVU2913 - 8984 0580 0022 movs r2, #0 - 8985 0582 8021 movs r1, #128 - 8986 0584 2046 mov r0, r4 - 8987 0586 FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccO46DoU.s page 541 + 10075 .loc 1 496 7 is_stmt 1 view .LVU3255 + 496:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 10076 .loc 1 496 17 is_stmt 0 view .LVU3256 + 10077 04be 2F4A ldr r2, .L533+48 + 10078 04c0 1378 ldrb r3, [r2] @ zero_extendqisi2 + 496:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 10079 .loc 1 496 21 view .LVU3257 + 10080 04c2 43F00403 orr r3, r3, #4 + 10081 04c6 1370 strb r3, [r2] + 497:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 10082 .loc 1 497 7 is_stmt 1 view .LVU3258 + 497:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 10083 .loc 1 497 17 is_stmt 0 view .LVU3259 + 10084 04c8 2F4B ldr r3, .L533+60 + 10085 04ca 0222 movs r2, #2 + 10086 04cc 1A70 strb r2, [r3] + 498:Src/main.c **** } + 10087 .loc 1 498 7 is_stmt 1 view .LVU3260 + 498:Src/main.c **** } + 10088 .loc 1 498 21 is_stmt 0 view .LVU3261 + 10089 04ce 294B ldr r3, .L533+40 + 10090 04d0 0022 movs r2, #0 + 10091 04d2 1A70 strb r2, [r3] + 10092 .L485: + 500:Src/main.c **** break; + 10093 .loc 1 500 6 is_stmt 1 view .LVU3262 + 500:Src/main.c **** break; + 10094 .loc 1 500 32 is_stmt 0 view .LVU3263 + 10095 04d4 2B4B ldr r3, .L533+56 + 10096 04d6 0122 movs r2, #1 + 10097 04d8 1A70 strb r2, [r3] + 501:Src/main.c **** case RUN_TASK: + 10098 .loc 1 501 5 is_stmt 1 view .LVU3264 + 10099 04da 0AE6 b .L461 + 10100 .L526: + 489:Src/main.c **** TO6_before = TO6; + 10101 .loc 1 489 7 view .LVU3265 + 10102 04dc 244B ldr r3, .L533+36 + 10103 04de 2B4A ldr r2, .L533+64 + 10104 04e0 2B49 ldr r1, .L533+68 + 10105 04e2 2748 ldr r0, .L533+52 + 10106 04e4 FFF7FEFF bl Decode_task + 10107 .LVL843: + 490:Src/main.c **** CPU_state = RUN_TASK; + 10108 .loc 1 490 7 view .LVU3266 + 490:Src/main.c **** CPU_state = RUN_TASK; + 10109 .loc 1 490 18 is_stmt 0 view .LVU3267 + 10110 04e8 1F4B ldr r3, .L533+28 + 10111 04ea 1A68 ldr r2, [r3] + 10112 04ec 294B ldr r3, .L533+72 + 10113 04ee 1A60 str r2, [r3] + 491:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 10114 .loc 1 491 7 is_stmt 1 view .LVU3268 + 491:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 10115 .loc 1 491 17 is_stmt 0 view .LVU3269 + 10116 04f0 0923 movs r3, #9 + 10117 04f2 254A ldr r2, .L533+60 + ARM GAS /tmp/ccYgfTud.s page 573 - 8988 .LVL697: - 417:Src/main.c **** if (st != HAL_OK) - 8989 .loc 1 417 7 view .LVU2914 - 417:Src/main.c **** if (st != HAL_OK) - 8990 .loc 1 417 12 is_stmt 0 view .LVU2915 - 8991 058a 9748 ldr r0, .L436+28 - 8992 058c FFF7FEFF bl HAL_TIM_Base_Start_IT - 8993 .LVL698: - 418:Src/main.c **** while(1); - 8994 .loc 1 418 7 is_stmt 1 view .LVU2916 - 418:Src/main.c **** while(1); - 8995 .loc 1 418 10 is_stmt 0 view .LVU2917 - 8996 0590 0028 cmp r0, #0 - 8997 0592 75D1 bne .L396 - 421:Src/main.c **** uint16_t trigger_counter = 0; - 8998 .loc 1 421 7 is_stmt 1 view .LVU2918 - 8999 .LVL699: - 422:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 9000 .loc 1 422 7 view .LVU2919 - 423:Src/main.c **** uint16_t task_sheduler = 0; - 9001 .loc 1 423 7 view .LVU2920 - 423:Src/main.c **** uint16_t task_sheduler = 0; - 9002 .loc 1 423 47 is_stmt 0 view .LVU2921 - 9003 0594 8D4B ldr r3, .L436 - 9004 0596 93ED027A vldr.32 s14, [r3, #8] - 423:Src/main.c **** uint16_t task_sheduler = 0; - 9005 .loc 1 423 64 view .LVU2922 - 9006 059a D3ED047A vldr.32 s15, [r3, #16] - 423:Src/main.c **** uint16_t task_sheduler = 0; - 9007 .loc 1 423 58 view .LVU2923 - 9008 059e 37EE677A vsub.f32 s14, s14, s15 - 423:Src/main.c **** uint16_t task_sheduler = 0; - 9009 .loc 1 423 84 view .LVU2924 - 9010 05a2 D3ED036A vldr.32 s13, [r3, #12] - 423:Src/main.c **** uint16_t task_sheduler = 0; - 9011 .loc 1 423 79 view .LVU2925 - 9012 05a6 C7EE267A vdiv.f32 s15, s14, s13 - 423:Src/main.c **** uint16_t task_sheduler = 0; - 9013 .loc 1 423 97 view .LVU2926 - 9014 05aa B2EE047A vmov.f32 s14, #1.0e+1 - 9015 05ae 67EE877A vmul.f32 s15, s15, s14 - 423:Src/main.c **** uint16_t task_sheduler = 0; - 9016 .loc 1 423 31 view .LVU2927 - 9017 05b2 FCEEE77A vcvt.u32.f32 s15, s15 - 9018 05b6 CDED017A vstr.32 s15, [sp, #4] @ int - 9019 05ba 9DF80460 ldrb r6, [sp, #4] @ zero_extendqisi2 - 9020 .LVL700: - 424:Src/main.c **** - 9021 .loc 1 424 7 is_stmt 1 view .LVU2928 - 428:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 9022 .loc 1 428 7 view .LVU2929 - 9023 05be DFF85492 ldr r9, .L436+72 - 9024 05c2 0021 movs r1, #0 - 9025 05c4 4846 mov r0, r9 - 9026 .LVL701: - 428:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 9027 .loc 1 428 7 is_stmt 0 view .LVU2930 - ARM GAS /tmp/ccO46DoU.s page 542 + 10118 04f4 1370 strb r3, [r2] + 492:Src/main.c **** } + 10119 .loc 1 492 7 is_stmt 1 view .LVU3270 + 492:Src/main.c **** } + 10120 .loc 1 492 21 is_stmt 0 view .LVU3271 + 10121 04f6 1F4A ldr r2, .L533+40 + 10122 04f8 1370 strb r3, [r2] + 10123 04fa EBE7 b .L485 + 10124 .L464: + 503:Src/main.c **** { + 10125 .loc 1 503 6 is_stmt 1 view .LVU3272 + 503:Src/main.c **** { + 10126 .loc 1 503 18 is_stmt 0 view .LVU3273 + 10127 04fc 134B ldr r3, .L533 + 10128 04fe 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 10129 0500 012B cmp r3, #1 + 10130 0502 53D0 beq .L486 + 10131 0504 022B cmp r3, #2 + 10132 0506 00F03681 beq .L487 + 10133 .L488: + 758:Src/main.c **** { + 10134 .loc 1 758 6 is_stmt 1 view .LVU3274 + 758:Src/main.c **** { + 10135 .loc 1 758 13 is_stmt 0 view .LVU3275 + 10136 050a 114B ldr r3, .L533+4 + 10137 050c 1B68 ldr r3, [r3] + 10138 050e 114A ldr r2, .L533+8 + 10139 0510 1268 ldr r2, [r2] + 758:Src/main.c **** { + 10140 .loc 1 758 9 view .LVU3276 + 10141 0512 9342 cmp r3, r2 + 10142 0514 00F20782 bhi .L527 + 10143 .L505: + 810:Src/main.c **** + 10144 .loc 1 810 13 is_stmt 1 discriminator 1 view .LVU3277 + 10145 0518 1F4B ldr r3, .L533+76 + 10146 051a 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 10147 051c 002B cmp r3, #0 + 10148 051e FBD0 beq .L505 + 812:Src/main.c **** + 10149 .loc 1 812 6 view .LVU3278 + 10150 0520 FFF7FEFF bl Stop_TIM10 + 10151 .LVL844: + 814:Src/main.c **** { + 10152 .loc 1 814 6 view .LVU3279 + 814:Src/main.c **** { + 10153 .loc 1 814 14 is_stmt 0 view .LVU3280 + 10154 0524 094B ldr r3, .L533 + 10155 0526 DB8A ldrh r3, [r3, #22] + 814:Src/main.c **** { + 10156 .loc 1 814 9 view .LVU3281 + 10157 0528 032B cmp r3, #3 + 10158 052a 0BD9 bls .L506 + 816:Src/main.c **** TO10_counter = task.dt / 10; + 10159 .loc 1 816 7 is_stmt 1 view .LVU3282 + 816:Src/main.c **** TO10_counter = task.dt / 10; + 10160 .loc 1 816 26 is_stmt 0 view .LVU3283 + ARM GAS /tmp/ccYgfTud.s page 574 - 9028 05c6 FFF7FEFF bl HAL_TIM_PWM_Stop - 9029 .LVL702: - 429:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9030 .loc 1 429 7 is_stmt 1 view .LVU2931 - 9031 05ca DFF84C82 ldr r8, .L436+76 - 9032 05ce 0821 movs r1, #8 - 9033 05d0 4046 mov r0, r8 - 9034 05d2 FFF7FEFF bl HAL_TIM_PWM_Stop - 9035 .LVL703: - 430:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9036 .loc 1 430 7 view .LVU2932 - 430:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9037 .loc 1 430 13 is_stmt 0 view .LVU2933 - 9038 05d6 854F ldr r7, .L436+32 - 9039 05d8 3B68 ldr r3, [r7] - 430:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9040 .loc 1 430 20 view .LVU2934 - 9041 05da 23F00803 bic r3, r3, #8 - 9042 05de 3B60 str r3, [r7] - 431:Src/main.c **** - 9043 .loc 1 431 7 is_stmt 1 view .LVU2935 - 431:Src/main.c **** - 9044 .loc 1 431 12 is_stmt 0 view .LVU2936 - 9045 05e0 834D ldr r5, .L436+36 - 9046 05e2 2B68 ldr r3, [r5] - 431:Src/main.c **** - 9047 .loc 1 431 19 view .LVU2937 - 9048 05e4 23F00803 bic r3, r3, #8 - 9049 05e8 2B60 str r3, [r5] - 435:Src/main.c **** TIM4 -> CNT = 0; - 9050 .loc 1 435 7 is_stmt 1 view .LVU2938 - 435:Src/main.c **** TIM4 -> CNT = 0; - 9051 .loc 1 435 20 is_stmt 0 view .LVU2939 - 9052 05ea 0024 movs r4, #0 - 9053 05ec 7C62 str r4, [r7, #36] - 436:Src/main.c **** - 9054 .loc 1 436 7 is_stmt 1 view .LVU2940 - 436:Src/main.c **** - 9055 .loc 1 436 19 is_stmt 0 view .LVU2941 - 9056 05ee 6C62 str r4, [r5, #36] - 438:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 9057 .loc 1 438 7 is_stmt 1 view .LVU2942 - 9058 05f0 2146 mov r1, r4 - 9059 05f2 4846 mov r0, r9 - 9060 05f4 FFF7FEFF bl HAL_TIM_PWM_Start - 9061 .LVL704: - 439:Src/main.c **** //TIM4 -> CNT = 0; - 9062 .loc 1 439 7 view .LVU2943 - 9063 05f8 0821 movs r1, #8 - 9064 05fa 4046 mov r0, r8 - 9065 05fc FFF7FEFF bl HAL_TIM_PWM_Start - 9066 .LVL705: - 442:Src/main.c **** TIM11 -> CNT = 0; - 9067 .loc 1 442 7 view .LVU2944 - 442:Src/main.c **** TIM11 -> CNT = 0; - 9068 .loc 1 442 26 is_stmt 0 view .LVU2945 - 9069 0600 EB6A ldr r3, [r5, #44] - ARM GAS /tmp/ccO46DoU.s page 543 + 10161 052c 1B4B ldr r3, .L533+80 + 10162 052e 1A68 ldr r2, [r3] + 10163 0530 1B4B ldr r3, .L533+84 + 10164 0532 DA60 str r2, [r3, #12] + 817:Src/main.c **** } + 10165 .loc 1 817 7 is_stmt 1 view .LVU3284 + 817:Src/main.c **** } + 10166 .loc 1 817 26 is_stmt 0 view .LVU3285 + 10167 0534 054B ldr r3, .L533 + 10168 0536 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 + 817:Src/main.c **** } + 10169 .loc 1 817 30 view .LVU3286 + 10170 0538 1A4A ldr r2, .L533+88 + 10171 053a A2FB0323 umull r2, r3, r2, r3 + 10172 053e DB08 lsrs r3, r3, #3 + 817:Src/main.c **** } + 10173 .loc 1 817 20 view .LVU3287 + 10174 0540 194A ldr r2, .L533+92 + 10175 0542 1360 str r3, [r2] + 10176 .L506: + 820:Src/main.c **** break; + 10177 .loc 1 820 6 is_stmt 1 view .LVU3288 + 820:Src/main.c **** break; + 10178 .loc 1 820 20 is_stmt 0 view .LVU3289 + 10179 0544 0B4B ldr r3, .L533+40 + 10180 0546 0922 movs r2, #9 + 10181 0548 1A70 strb r2, [r3] + 821:Src/main.c **** } + 10182 .loc 1 821 9 is_stmt 1 view .LVU3290 + 10183 054a D2E5 b .L461 + 10184 .L534: + 10185 .align 2 + 10186 .L533: + 10187 054c 00000000 .word task + 10188 0550 00000000 .word TO7 + 10189 0554 00000000 .word TO7_before + 10190 0558 00000000 .word LD1_param + 10191 055c 00000000 .word LD2_param + 10192 0560 00000000 .word temp16 + 10193 0564 00000000 .word Long_Data + 10194 0568 00000000 .word TO6 + 10195 056c 00000000 .word TO6_stop + 10196 0570 00000000 .word Curr_setup + 10197 0574 00000000 .word CPU_state_old + 10198 0578 00000000 .word CS_result + 10199 057c 00000000 .word State_Data + 10200 0580 00000000 .word COMMAND + 10201 0584 00000000 .word UART_transmission_request + 10202 0588 00000000 .word CPU_state + 10203 058c 00000000 .word LD2_curr_setup + 10204 0590 00000000 .word LD1_curr_setup + 10205 0594 00000000 .word TO6_before + 10206 0598 00000000 .word TIM10_coflag + 10207 059c 00000000 .word TIM10_period + 10208 05a0 00000000 .word htim10 + 10209 05a4 CDCCCCCC .word -858993459 + 10210 05a8 00000000 .word TO10_counter + ARM GAS /tmp/ccYgfTud.s page 575 - 442:Src/main.c **** TIM11 -> CNT = 0; - 9070 .loc 1 442 33 view .LVU2946 - 9071 0602 143B subs r3, r3, #20 - 442:Src/main.c **** TIM11 -> CNT = 0; - 9072 .loc 1 442 19 view .LVU2947 - 9073 0604 6B62 str r3, [r5, #36] - 443:Src/main.c **** - 9074 .loc 1 443 7 is_stmt 1 view .LVU2948 - 443:Src/main.c **** - 9075 .loc 1 443 20 is_stmt 0 view .LVU2949 - 9076 0606 7C62 str r4, [r7, #36] - 446:Src/main.c **** { - 9077 .loc 1 446 7 is_stmt 1 view .LVU2950 - 422:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 9078 .loc 1 422 16 is_stmt 0 view .LVU2951 - 9079 0608 2546 mov r5, r4 - 9080 .LVL706: - 9081 .L398: - 446:Src/main.c **** { - 9082 .loc 1 446 33 is_stmt 1 view .LVU2952 - 446:Src/main.c **** { - 9083 .loc 1 446 18 is_stmt 0 view .LVU2953 - 9084 060a 704B ldr r3, .L436 - 9085 060c D3ED047A vldr.32 s15, [r3, #16] - 446:Src/main.c **** { - 9086 .loc 1 446 39 view .LVU2954 - 9087 0610 93ED027A vldr.32 s14, [r3, #8] - 446:Src/main.c **** { - 9088 .loc 1 446 33 view .LVU2955 - 9089 0614 F4EEC77A vcmpe.f32 s15, s14 - 9090 0618 F1EE10FA vmrs APSR_nzcv, FPSCR - 9091 061c 37D5 bpl .L429 - 448:Src/main.c **** { - 9092 .loc 1 448 8 is_stmt 1 view .LVU2956 - 448:Src/main.c **** { - 9093 .loc 1 448 12 is_stmt 0 view .LVU2957 - 9094 061e 754B ldr r3, .L436+40 - 9095 0620 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 448:Src/main.c **** { - 9096 .loc 1 448 11 view .LVU2958 - 9097 0622 002B cmp r3, #0 - 9098 0624 F1D0 beq .L398 - 450:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 9099 .loc 1 450 9 is_stmt 1 view .LVU2959 - 9100 0626 FCEEE77A vcvt.u32.f32 s15, s15 - 9101 062a 17EE903A vmov r3, s15 @ int - 9102 062e 99B2 uxth r1, r3 - 9103 0630 0120 movs r0, #1 - 9104 0632 FFF7FEFF bl Set_LTEC - 9105 .LVL707: - 453:Src/main.c **** TO10 = 0; - 9106 .loc 1 453 9 view .LVU2960 - 453:Src/main.c **** TO10 = 0; - 9107 .loc 1 453 13 is_stmt 0 view .LVU2961 - 9108 0636 654B ldr r3, .L436 - 9109 0638 D3ED047A vldr.32 s15, [r3, #16] - 453:Src/main.c **** TO10 = 0; - ARM GAS /tmp/ccO46DoU.s page 544 + 10211 .L486: + 10212 .LBB651: + 525:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 10213 .loc 1 525 7 view .LVU3291 + 525:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 10214 .loc 1 525 38 is_stmt 0 view .LVU3292 + 10215 05ac AD4B ldr r3, .L535 + 10216 05ae D3ED077A vldr.32 s15, [r3, #28] + 525:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 10217 .loc 1 525 7 view .LVU3293 + 10218 05b2 FCEEE77A vcvt.u32.f32 s15, s15 + 10219 05b6 17EE903A vmov r3, s15 @ int + 10220 05ba 99B2 uxth r1, r3 + 10221 05bc 0220 movs r0, #2 + 10222 05be FFF7FEFF bl Set_LTEC + 10223 .LVL845: + 526:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 10224 .loc 1 526 7 is_stmt 1 view .LVU3294 + 526:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 10225 .loc 1 526 14 is_stmt 0 view .LVU3295 + 10226 05c2 0320 movs r0, #3 + 10227 05c4 FFF7FEFF bl MPhD_T + 10228 .LVL846: + 527:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 10229 .loc 1 527 7 is_stmt 1 view .LVU3296 + 527:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 10230 .loc 1 527 32 is_stmt 0 view .LVU3297 + 10231 05c8 0320 movs r0, #3 + 10232 05ca FFF7FEFF bl MPhD_T + 10233 .LVL847: + 527:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 10234 .loc 1 527 30 discriminator 1 view .LVU3298 + 10235 05ce A64C ldr r4, .L535+4 + 10236 05d0 2080 strh r0, [r4] @ movhi + 528:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 10237 .loc 1 528 7 is_stmt 1 view .LVU3299 + 528:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 10238 .loc 1 528 14 is_stmt 0 view .LVU3300 + 10239 05d2 0420 movs r0, #4 + 10240 05d4 FFF7FEFF bl MPhD_T + 10241 .LVL848: + 529:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 10242 .loc 1 529 7 is_stmt 1 view .LVU3301 + 529:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 10243 .loc 1 529 32 is_stmt 0 view .LVU3302 + 10244 05d8 0420 movs r0, #4 + 10245 05da FFF7FEFF bl MPhD_T + 10246 .LVL849: + 529:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 10247 .loc 1 529 30 discriminator 1 view .LVU3303 + 10248 05de A34D ldr r5, .L535+8 + 10249 05e0 2880 strh r0, [r5] @ movhi + 530:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 10250 .loc 1 530 7 is_stmt 1 view .LVU3304 + 530:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 10251 .loc 1 530 14 is_stmt 0 view .LVU3305 + 10252 05e2 0122 movs r2, #1 + ARM GAS /tmp/ccYgfTud.s page 576 - 9110 .loc 1 453 35 view .LVU2962 - 9111 063c 93ED037A vldr.32 s14, [r3, #12] - 453:Src/main.c **** TO10 = 0; - 9112 .loc 1 453 28 view .LVU2963 - 9113 0640 77EE877A vadd.f32 s15, s15, s14 - 9114 0644 C3ED047A vstr.32 s15, [r3, #16] - 454:Src/main.c **** TIM10_coflag = 0; - 9115 .loc 1 454 9 is_stmt 1 view .LVU2964 - 454:Src/main.c **** TIM10_coflag = 0; - 9116 .loc 1 454 14 is_stmt 0 view .LVU2965 - 9117 0648 0027 movs r7, #0 - 9118 064a 6B4B ldr r3, .L436+44 - 9119 064c 1F60 str r7, [r3] - 455:Src/main.c **** - 9120 .loc 1 455 9 is_stmt 1 view .LVU2966 - 455:Src/main.c **** - 9121 .loc 1 455 22 is_stmt 0 view .LVU2967 - 9122 064e 694B ldr r3, .L436+40 - 9123 0650 1F70 strb r7, [r3] - 457:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 9124 .loc 1 457 9 is_stmt 1 view .LVU2968 - 9125 0652 DFF8C881 ldr r8, .L436+80 - 9126 0656 0122 movs r2, #1 - 9127 0658 4FF40071 mov r1, #512 - 9128 065c 4046 mov r0, r8 - 9129 065e FFF7FEFF bl HAL_GPIO_WritePin - 9130 .LVL708: - 458:Src/main.c **** //* - 9131 .loc 1 458 9 view .LVU2969 - 9132 0662 3A46 mov r2, r7 - 9133 0664 4FF40071 mov r1, #512 - 9134 0668 4046 mov r0, r8 - 9135 066a FFF7FEFF bl HAL_GPIO_WritePin - 9136 .LVL709: - 460:Src/main.c **** OUT_trigger(trigger_counter); - 9137 .loc 1 460 9 view .LVU2970 - 460:Src/main.c **** OUT_trigger(trigger_counter); - 9138 .loc 1 460 41 is_stmt 0 view .LVU2971 - 9139 066e B4FBF6F3 udiv r3, r4, r6 - 9140 0672 06FB1343 mls r3, r6, r3, r4 - 9141 0676 9BB2 uxth r3, r3 - 460:Src/main.c **** OUT_trigger(trigger_counter); - 9142 .loc 1 460 12 view .LVU2972 - 9143 0678 1BB1 cbz r3, .L430 - 9144 .L399: - 464:Src/main.c **** //*/ - 9145 .loc 1 464 9 is_stmt 1 view .LVU2973 - 9146 067a 0134 adds r4, r4, #1 - 9147 .LVL710: - 464:Src/main.c **** //*/ - 9148 .loc 1 464 9 is_stmt 0 view .LVU2974 - 9149 067c A4B2 uxth r4, r4 - 9150 .LVL711: - 464:Src/main.c **** //*/ - 9151 .loc 1 464 9 view .LVU2975 - 9152 067e C4E7 b .L398 - 9153 .LVL712: - ARM GAS /tmp/ccO46DoU.s page 545 + 10253 05e4 2146 mov r1, r4 + 10254 05e6 A248 ldr r0, .L535+12 + 10255 05e8 FFF7FEFF bl PID_Controller_Temp + 10256 .LVL850: + 10257 05ec 0146 mov r1, r0 + 530:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 10258 .loc 1 530 13 discriminator 1 view .LVU3306 + 10259 05ee A14C ldr r4, .L535+16 + 10260 05f0 2080 strh r0, [r4] @ movhi + 531:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 10261 .loc 1 531 7 is_stmt 1 view .LVU3307 + 10262 05f2 0320 movs r0, #3 + 10263 05f4 FFF7FEFF bl Set_LTEC + 10264 .LVL851: + 532:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 10265 .loc 1 532 7 view .LVU3308 + 532:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 10266 .loc 1 532 14 is_stmt 0 view .LVU3309 + 10267 05f8 0222 movs r2, #2 + 10268 05fa 2946 mov r1, r5 + 10269 05fc 9E48 ldr r0, .L535+20 + 10270 05fe FFF7FEFF bl PID_Controller_Temp + 10271 .LVL852: + 10272 0602 0146 mov r1, r0 + 532:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 10273 .loc 1 532 13 discriminator 1 view .LVU3310 + 10274 0604 2080 strh r0, [r4] @ movhi + 533:Src/main.c **** + 10275 .loc 1 533 7 is_stmt 1 view .LVU3311 + 10276 0606 0420 movs r0, #4 + 10277 0608 FFF7FEFF bl Set_LTEC + 10278 .LVL853: + 536:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 10279 .loc 1 536 7 view .LVU3312 + 10280 060c 9B4C ldr r4, .L535+24 + 10281 060e 0122 movs r2, #1 + 10282 0610 8021 movs r1, #128 + 10283 0612 2046 mov r0, r4 + 10284 0614 FFF7FEFF bl HAL_GPIO_WritePin + 10285 .LVL854: + 537:Src/main.c **** + 10286 .loc 1 537 7 view .LVU3313 + 10287 0618 0022 movs r2, #0 + 10288 061a 8021 movs r1, #128 + 10289 061c 2046 mov r0, r4 + 10290 061e FFF7FEFF bl HAL_GPIO_WritePin + 10291 .LVL855: + 539:Src/main.c **** if (st != HAL_OK) + 10292 .loc 1 539 7 view .LVU3314 + 539:Src/main.c **** if (st != HAL_OK) + 10293 .loc 1 539 12 is_stmt 0 view .LVU3315 + 10294 0622 9748 ldr r0, .L535+28 + 10295 0624 FFF7FEFF bl HAL_TIM_Base_Start_IT + 10296 .LVL856: + 540:Src/main.c **** while(1); + 10297 .loc 1 540 7 is_stmt 1 view .LVU3316 + 540:Src/main.c **** while(1); + ARM GAS /tmp/ccYgfTud.s page 577 - 9154 .L396: - 419:Src/main.c **** - 9155 .loc 1 419 8 is_stmt 1 view .LVU2976 - 419:Src/main.c **** - 9156 .loc 1 419 13 view .LVU2977 - 9157 0680 FEE7 b .L396 - 9158 .LVL713: - 9159 .L430: - 461:Src/main.c **** ++trigger_counter; - 9160 .loc 1 461 10 view .LVU2978 - 9161 0682 E8B2 uxtb r0, r5 - 9162 0684 FFF7FEFF bl OUT_trigger - 9163 .LVL714: - 462:Src/main.c **** } - 9164 .loc 1 462 10 view .LVU2979 - 9165 0688 0135 adds r5, r5, #1 - 9166 .LVL715: - 462:Src/main.c **** } - 9167 .loc 1 462 10 is_stmt 0 view .LVU2980 - 9168 068a ADB2 uxth r5, r5 - 9169 .LVL716: - 462:Src/main.c **** } - 9170 .loc 1 462 10 view .LVU2981 - 9171 068c F5E7 b .L399 - 9172 .L429: - 489:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 9173 .loc 1 489 7 is_stmt 1 view .LVU2982 - 489:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 9174 .loc 1 489 13 is_stmt 0 view .LVU2983 - 9175 068e 574A ldr r2, .L436+32 - 9176 0690 D368 ldr r3, [r2, #12] - 489:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 9177 .loc 1 489 21 view .LVU2984 - 9178 0692 43F00103 orr r3, r3, #1 - 9179 0696 D360 str r3, [r2, #12] - 499:Src/main.c **** - 9180 .loc 1 499 7 is_stmt 1 view .LVU2985 - 9181 0698 FFF7FEFF bl Stop_TIM10 - 9182 .LVL717: - 501:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9183 .loc 1 501 7 view .LVU2986 - 501:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9184 .loc 1 501 32 is_stmt 0 view .LVU2987 - 9185 069c 4B4C ldr r4, .L436 - 9186 .LVL718: - 501:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9187 .loc 1 501 32 view .LVU2988 - 9188 069e D4ED017A vldr.32 s15, [r4, #4] - 501:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9189 .loc 1 501 26 view .LVU2989 - 9190 06a2 C4ED047A vstr.32 s15, [r4, #16] - 502:Src/main.c **** if (task.tau > 3) - 9191 .loc 1 502 7 is_stmt 1 view .LVU2990 - 9192 06a6 FCEEE77A vcvt.u32.f32 s15, s15 - 9193 06aa 17EE903A vmov r3, s15 @ int - 9194 06ae 99B2 uxth r1, r3 - 9195 06b0 0120 movs r0, #1 - ARM GAS /tmp/ccO46DoU.s page 546 + 10298 .loc 1 540 10 is_stmt 0 view .LVU3317 + 10299 0628 0028 cmp r0, #0 + 10300 062a 75D1 bne .L490 + 543:Src/main.c **** uint16_t trigger_counter = 0; + 10301 .loc 1 543 7 is_stmt 1 view .LVU3318 + 10302 .LVL857: + 544:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 10303 .loc 1 544 7 view .LVU3319 + 545:Src/main.c **** uint16_t task_sheduler = 0; + 10304 .loc 1 545 7 view .LVU3320 + 545:Src/main.c **** uint16_t task_sheduler = 0; + 10305 .loc 1 545 47 is_stmt 0 view .LVU3321 + 10306 062c 8D4B ldr r3, .L535 + 10307 062e 93ED027A vldr.32 s14, [r3, #8] + 545:Src/main.c **** uint16_t task_sheduler = 0; + 10308 .loc 1 545 64 view .LVU3322 + 10309 0632 D3ED047A vldr.32 s15, [r3, #16] + 545:Src/main.c **** uint16_t task_sheduler = 0; + 10310 .loc 1 545 58 view .LVU3323 + 10311 0636 37EE677A vsub.f32 s14, s14, s15 + 545:Src/main.c **** uint16_t task_sheduler = 0; + 10312 .loc 1 545 84 view .LVU3324 + 10313 063a D3ED036A vldr.32 s13, [r3, #12] + 545:Src/main.c **** uint16_t task_sheduler = 0; + 10314 .loc 1 545 79 view .LVU3325 + 10315 063e C7EE267A vdiv.f32 s15, s14, s13 + 545:Src/main.c **** uint16_t task_sheduler = 0; + 10316 .loc 1 545 97 view .LVU3326 + 10317 0642 B2EE047A vmov.f32 s14, #1.0e+1 + 10318 0646 67EE877A vmul.f32 s15, s15, s14 + 545:Src/main.c **** uint16_t task_sheduler = 0; + 10319 .loc 1 545 31 view .LVU3327 + 10320 064a FCEEE77A vcvt.u32.f32 s15, s15 + 10321 064e CDED037A vstr.32 s15, [sp, #12] @ int + 10322 0652 9DF80C60 ldrb r6, [sp, #12] @ zero_extendqisi2 + 10323 .LVL858: + 546:Src/main.c **** + 10324 .loc 1 546 7 is_stmt 1 view .LVU3328 + 550:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 10325 .loc 1 550 7 view .LVU3329 + 10326 0656 DFF85492 ldr r9, .L535+72 + 10327 065a 0021 movs r1, #0 + 10328 065c 4846 mov r0, r9 + 10329 .LVL859: + 550:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 10330 .loc 1 550 7 is_stmt 0 view .LVU3330 + 10331 065e FFF7FEFF bl HAL_TIM_PWM_Stop + 10332 .LVL860: + 551:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 10333 .loc 1 551 7 is_stmt 1 view .LVU3331 + 10334 0662 DFF84C82 ldr r8, .L535+76 + 10335 0666 0821 movs r1, #8 + 10336 0668 4046 mov r0, r8 + 10337 066a FFF7FEFF bl HAL_TIM_PWM_Stop + 10338 .LVL861: + 552:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 10339 .loc 1 552 7 view .LVU3332 + ARM GAS /tmp/ccYgfTud.s page 578 - 9196 06b2 FFF7FEFF bl Set_LTEC - 9197 .LVL719: - 503:Src/main.c **** { - 9198 .loc 1 503 7 view .LVU2991 - 503:Src/main.c **** { - 9199 .loc 1 503 15 is_stmt 0 view .LVU2992 - 9200 06b6 E38A ldrh r3, [r4, #22] - 503:Src/main.c **** { - 9201 .loc 1 503 10 view .LVU2993 - 9202 06b8 032B cmp r3, #3 - 9203 06ba 0CD9 bls .L401 - 505:Src/main.c **** htim10.Init.Period = 9999; - 9204 .loc 1 505 8 is_stmt 1 view .LVU2994 - 505:Src/main.c **** htim10.Init.Period = 9999; - 9205 .loc 1 505 34 is_stmt 0 view .LVU2995 - 9206 06bc 4A4A ldr r2, .L436+28 - 9207 06be D068 ldr r0, [r2, #12] - 505:Src/main.c **** htim10.Init.Period = 9999; - 9208 .loc 1 505 21 view .LVU2996 - 9209 06c0 4E49 ldr r1, .L436+48 - 9210 06c2 0860 str r0, [r1] - 506:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9211 .loc 1 506 8 is_stmt 1 view .LVU2997 - 506:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9212 .loc 1 506 27 is_stmt 0 view .LVU2998 - 9213 06c4 42F20F71 movw r1, #9999 - 9214 06c8 D160 str r1, [r2, #12] - 507:Src/main.c **** } - 9215 .loc 1 507 8 is_stmt 1 view .LVU2999 - 507:Src/main.c **** } - 9216 .loc 1 507 33 is_stmt 0 view .LVU3000 - 9217 06ca 013B subs r3, r3, #1 - 507:Src/main.c **** } - 9218 .loc 1 507 38 view .LVU3001 - 9219 06cc 6422 movs r2, #100 - 9220 06ce 02FB03F3 mul r3, r2, r3 - 507:Src/main.c **** } - 9221 .loc 1 507 21 view .LVU3002 - 9222 06d2 4B4A ldr r2, .L436+52 - 9223 06d4 1360 str r3, [r2] - 9224 .L401: - 509:Src/main.c **** break; - 9225 .loc 1 509 7 is_stmt 1 view .LVU3003 - 9226 06d6 4448 ldr r0, .L436+28 - 9227 06d8 FFF7FEFF bl HAL_TIM_Base_Start_IT - 9228 .LVL720: - 510:Src/main.c **** case TT_CHANGE_CURR_2: - 9229 .loc 1 510 6 view .LVU3004 - 9230 06dc C8E6 b .L394 - 9231 .LVL721: - 9232 .L393: - 514:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 9233 .loc 1 514 7 view .LVU3005 - 514:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 9234 .loc 1 514 38 is_stmt 0 view .LVU3006 - 9235 06de 3B4B ldr r3, .L436 - 9236 06e0 D3ED077A vldr.32 s15, [r3, #28] - ARM GAS /tmp/ccO46DoU.s page 547 - - - 514:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 9237 .loc 1 514 7 view .LVU3007 - 9238 06e4 FCEEE77A vcvt.u32.f32 s15, s15 - 9239 06e8 17EE903A vmov r3, s15 @ int - 9240 06ec 99B2 uxth r1, r3 - 9241 06ee 0120 movs r0, #1 - 9242 06f0 FFF7FEFF bl Set_LTEC - 9243 .LVL722: - 515:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 9244 .loc 1 515 7 is_stmt 1 view .LVU3008 - 515:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 9245 .loc 1 515 14 is_stmt 0 view .LVU3009 - 9246 06f4 0320 movs r0, #3 - 9247 06f6 FFF7FEFF bl MPhD_T - 9248 .LVL723: - 516:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 9249 .loc 1 516 7 is_stmt 1 view .LVU3010 - 516:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 9250 .loc 1 516 32 is_stmt 0 view .LVU3011 - 9251 06fa 0320 movs r0, #3 - 9252 06fc FFF7FEFF bl MPhD_T - 9253 .LVL724: - 516:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 9254 .loc 1 516 30 discriminator 1 view .LVU3012 - 9255 0700 334C ldr r4, .L436+4 - 9256 0702 2080 strh r0, [r4] @ movhi - 517:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 9257 .loc 1 517 7 is_stmt 1 view .LVU3013 - 517:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 9258 .loc 1 517 14 is_stmt 0 view .LVU3014 - 9259 0704 0420 movs r0, #4 - 9260 0706 FFF7FEFF bl MPhD_T - 9261 .LVL725: - 518:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9262 .loc 1 518 7 is_stmt 1 view .LVU3015 - 518:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9263 .loc 1 518 32 is_stmt 0 view .LVU3016 - 9264 070a 0420 movs r0, #4 - 9265 070c FFF7FEFF bl MPhD_T - 9266 .LVL726: - 518:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9267 .loc 1 518 30 discriminator 1 view .LVU3017 - 9268 0710 304D ldr r5, .L436+8 - 9269 0712 2880 strh r0, [r5] @ movhi - 519:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 9270 .loc 1 519 7 is_stmt 1 view .LVU3018 - 519:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 9271 .loc 1 519 14 is_stmt 0 view .LVU3019 - 9272 0714 0122 movs r2, #1 - 9273 0716 2146 mov r1, r4 - 9274 0718 2F48 ldr r0, .L436+12 - 9275 071a FFF7FEFF bl PID_Controller_Temp - 9276 .LVL727: - 9277 071e 0146 mov r1, r0 - 519:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 9278 .loc 1 519 13 discriminator 1 view .LVU3020 - 9279 0720 2E4C ldr r4, .L436+16 - ARM GAS /tmp/ccO46DoU.s page 548 - - - 9280 0722 2080 strh r0, [r4] @ movhi - 520:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 9281 .loc 1 520 7 is_stmt 1 view .LVU3021 - 9282 0724 0320 movs r0, #3 - 9283 0726 FFF7FEFF bl Set_LTEC - 9284 .LVL728: - 521:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 9285 .loc 1 521 7 view .LVU3022 - 521:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 9286 .loc 1 521 14 is_stmt 0 view .LVU3023 - 9287 072a 0222 movs r2, #2 - 9288 072c 2946 mov r1, r5 - 9289 072e 2C48 ldr r0, .L436+20 - 9290 0730 FFF7FEFF bl PID_Controller_Temp - 9291 .LVL729: - 9292 0734 0146 mov r1, r0 - 521:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 9293 .loc 1 521 13 discriminator 1 view .LVU3024 - 9294 0736 2080 strh r0, [r4] @ movhi - 522:Src/main.c **** - 9295 .loc 1 522 7 is_stmt 1 view .LVU3025 - 9296 0738 0420 movs r0, #4 - 9297 073a FFF7FEFF bl Set_LTEC - 9298 .LVL730: - 524:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 9299 .loc 1 524 7 view .LVU3026 - 524:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 9300 .loc 1 524 28 is_stmt 0 view .LVU3027 - 9301 073e 314B ldr r3, .L436+56 - 9302 0740 0222 movs r2, #2 - 9303 0742 1A70 strb r2, [r3] - 525:Src/main.c **** //LD_blinker.param = task.current_param; - 9304 .loc 1 525 7 is_stmt 1 view .LVU3028 - 525:Src/main.c **** //LD_blinker.param = task.current_param; - 9305 .loc 1 525 24 is_stmt 0 view .LVU3029 - 9306 0744 0022 movs r2, #0 - 9307 0746 9A72 strb r2, [r3, #10] - 527:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 9308 .loc 1 527 7 is_stmt 1 view .LVU3030 - 527:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 9309 .loc 1 527 24 is_stmt 0 view .LVU3031 - 9310 0748 1A81 strh r2, [r3, #8] @ movhi - 528:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 9311 .loc 1 528 7 is_stmt 1 view .LVU3032 - 528:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 9312 .loc 1 528 24 is_stmt 0 view .LVU3033 - 9313 074a 4FF47A72 mov r2, #1000 - 9314 074e 1A81 strh r2, [r3, #8] @ movhi - 529:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 9315 .loc 1 529 7 is_stmt 1 view .LVU3034 - 529:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 9316 .loc 1 529 30 is_stmt 0 view .LVU3035 - 9317 0750 2D4A ldr r2, .L436+60 - 9318 0752 5A60 str r2, [r3, #4] - 530:Src/main.c **** - 9319 .loc 1 530 7 is_stmt 1 view .LVU3036 - 530:Src/main.c **** - ARM GAS /tmp/ccO46DoU.s page 549 - - - 9320 .loc 1 530 29 is_stmt 0 view .LVU3037 - 9321 0754 8022 movs r2, #128 - 9322 0756 5A80 strh r2, [r3, #2] @ movhi - 532:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 9323 .loc 1 532 7 is_stmt 1 view .LVU3038 - 532:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 9324 .loc 1 532 17 is_stmt 0 view .LVU3039 - 9325 0758 2C4B ldr r3, .L436+64 - 9326 075a 42F21072 movw r2, #10000 - 9327 075e DA62 str r2, [r3, #44] - 534:Src/main.c **** if (st != HAL_OK) - 9328 .loc 1 534 7 is_stmt 1 view .LVU3040 - 534:Src/main.c **** if (st != HAL_OK) - 9329 .loc 1 534 12 is_stmt 0 view .LVU3041 - 9330 0760 2B48 ldr r0, .L436+68 - 9331 0762 FFF7FEFF bl HAL_TIM_Base_Start_IT - 9332 .LVL731: - 535:Src/main.c **** while(1); - 9333 .loc 1 535 7 is_stmt 1 view .LVU3042 - 535:Src/main.c **** while(1); - 9334 .loc 1 535 10 is_stmt 0 view .LVU3043 - 9335 0766 78BB cbnz r0, .L403 - 540:Src/main.c **** uint32_t i = 10000; while (--i){} - 9336 .loc 1 540 7 is_stmt 1 view .LVU3044 - 9337 0768 0122 movs r2, #1 - 9338 076a 8021 movs r1, #128 - 9339 076c 1D48 ldr r0, .L436+24 - 9340 .LVL732: - 540:Src/main.c **** uint32_t i = 10000; while (--i){} - 9341 .loc 1 540 7 is_stmt 0 view .LVU3045 - 9342 076e FFF7FEFF bl HAL_GPIO_WritePin - 9343 .LVL733: - 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9344 .loc 1 541 7 is_stmt 1 view .LVU3046 - 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9345 .loc 1 541 27 view .LVU3047 - 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9346 .loc 1 541 16 is_stmt 0 view .LVU3048 - 9347 0772 42F21073 movw r3, #10000 - 9348 .LVL734: - 9349 .L404: - 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9350 .loc 1 541 39 is_stmt 1 discriminator 2 view .LVU3049 - 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9351 .loc 1 541 34 discriminator 2 view .LVU3050 - 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9352 .loc 1 541 34 is_stmt 0 discriminator 2 view .LVU3051 - 9353 0776 013B subs r3, r3, #1 - 9354 .LVL735: - 541:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9355 .loc 1 541 34 discriminator 2 view .LVU3052 - 9356 0778 FDD1 bne .L404 - 542:Src/main.c **** LD_blinker.state = 2; - 9357 .loc 1 542 7 is_stmt 1 view .LVU3053 - 9358 077a 0022 movs r2, #0 - 9359 077c 8021 movs r1, #128 - 9360 077e 1948 ldr r0, .L436+24 - ARM GAS /tmp/ccO46DoU.s page 550 - - - 9361 0780 FFF7FEFF bl HAL_GPIO_WritePin - 9362 .LVL736: - 543:Src/main.c **** - 9363 .loc 1 543 7 view .LVU3054 - 543:Src/main.c **** - 9364 .loc 1 543 24 is_stmt 0 view .LVU3055 - 9365 0784 1F4B ldr r3, .L436+56 - 9366 0786 0222 movs r2, #2 - 9367 0788 9A72 strb r2, [r3, #10] - 545:Src/main.c **** if (st != HAL_OK) - 9368 .loc 1 545 7 is_stmt 1 view .LVU3056 - 545:Src/main.c **** if (st != HAL_OK) - 9369 .loc 1 545 12 is_stmt 0 view .LVU3057 - 9370 078a 1748 ldr r0, .L436+28 - 9371 078c FFF7FEFF bl HAL_TIM_Base_Start_IT - 9372 .LVL737: - 546:Src/main.c **** while(1); - 9373 .loc 1 546 7 is_stmt 1 view .LVU3058 - 546:Src/main.c **** while(1); - 9374 .loc 1 546 10 is_stmt 0 view .LVU3059 - 9375 0790 D8B9 cbnz r0, .L406 - 9376 .L407: - 548:Src/main.c **** { - 9377 .loc 1 548 33 is_stmt 1 view .LVU3060 - 548:Src/main.c **** { - 9378 .loc 1 548 18 is_stmt 0 view .LVU3061 - 9379 0792 0E4B ldr r3, .L436 - 9380 0794 D3ED047A vldr.32 s15, [r3, #16] - 548:Src/main.c **** { - 9381 .loc 1 548 39 view .LVU3062 - 9382 0798 93ED027A vldr.32 s14, [r3, #8] - 548:Src/main.c **** { - 9383 .loc 1 548 33 view .LVU3063 - 9384 079c F4EEC77A vcmpe.f32 s15, s14 - 9385 07a0 F1EE10FA vmrs APSR_nzcv, FPSCR - 9386 07a4 3CD5 bpl .L431 - 550:Src/main.c **** { - 9387 .loc 1 550 8 is_stmt 1 view .LVU3064 - 550:Src/main.c **** { - 9388 .loc 1 550 12 is_stmt 0 view .LVU3065 - 9389 07a6 134B ldr r3, .L436+40 - 9390 07a8 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 550:Src/main.c **** { - 9391 .loc 1 550 11 view .LVU3066 - 9392 07aa 002B cmp r3, #0 - 9393 07ac F1D0 beq .L407 - 555:Src/main.c **** TO10 = 0; - 9394 .loc 1 555 9 is_stmt 1 view .LVU3067 - 555:Src/main.c **** TO10 = 0; - 9395 .loc 1 555 35 is_stmt 0 view .LVU3068 - 9396 07ae 074B ldr r3, .L436 - 9397 07b0 93ED037A vldr.32 s14, [r3, #12] - 555:Src/main.c **** TO10 = 0; - 9398 .loc 1 555 28 view .LVU3069 - 9399 07b4 77EE277A vadd.f32 s15, s14, s15 - 9400 07b8 C3ED047A vstr.32 s15, [r3, #16] - 556:Src/main.c **** TIM10_coflag = 0; - ARM GAS /tmp/ccO46DoU.s page 551 - - - 9401 .loc 1 556 9 is_stmt 1 view .LVU3070 - 556:Src/main.c **** TIM10_coflag = 0; - 9402 .loc 1 556 14 is_stmt 0 view .LVU3071 - 9403 07bc 0023 movs r3, #0 - 9404 07be 0E4A ldr r2, .L436+44 - 9405 07c0 1360 str r3, [r2] - 557:Src/main.c **** - 9406 .loc 1 557 9 is_stmt 1 view .LVU3072 - 557:Src/main.c **** - 9407 .loc 1 557 22 is_stmt 0 view .LVU3073 - 9408 07c2 0C4A ldr r2, .L436+40 - 9409 07c4 1370 strb r3, [r2] - 9410 07c6 E4E7 b .L407 - 9411 .LVL738: - 9412 .L403: - 536:Src/main.c **** // */ - 9413 .loc 1 536 8 is_stmt 1 view .LVU3074 - 536:Src/main.c **** // */ - 9414 .loc 1 536 13 view .LVU3075 - 9415 07c8 FEE7 b .L403 - 9416 .LVL739: - 9417 .L406: - 547:Src/main.c **** while (task.current_param < task.max_param) - 9418 .loc 1 547 8 view .LVU3076 - 547:Src/main.c **** while (task.current_param < task.max_param) - 9419 .loc 1 547 13 view .LVU3077 - 9420 07ca FEE7 b .L406 - 9421 .L437: - 9422 .align 2 - 9423 .L436: - 9424 07cc 00000000 .word task - 9425 07d0 00000000 .word LD1_param - 9426 07d4 00000000 .word LD2_param - 9427 07d8 00000000 .word LD1_curr_setup - 9428 07dc 00000000 .word temp16 - 9429 07e0 00000000 .word LD2_curr_setup - 9430 07e4 000C0240 .word 1073875968 - 9431 07e8 00000000 .word htim10 - 9432 07ec 00480140 .word 1073825792 - 9433 07f0 00080040 .word 1073743872 - 9434 07f4 00000000 .word TIM10_coflag - 9435 07f8 00000000 .word TO10 - 9436 07fc 00000000 .word TIM10_period - 9437 0800 00000000 .word TO10_counter - 9438 0804 00000000 .word LD_blinker - 9439 0808 00040240 .word 1073873920 - 9440 080c 00040140 .word 1073808384 - 9441 0810 00000000 .word htim8 - 9442 0814 00000000 .word htim11 - 9443 0818 00000000 .word htim4 - 9444 081c 00180240 .word 1073879040 - 9445 .L431: - 562:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 9446 .loc 1 562 7 view .LVU3078 - 9447 0820 6C48 ldr r0, .L438 - 9448 .LVL740: - 562:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - ARM GAS /tmp/ccO46DoU.s page 552 - - - 9449 .loc 1 562 7 is_stmt 0 view .LVU3079 - 9450 0822 FFF7FEFF bl HAL_TIM_Base_Stop - 9451 .LVL741: - 563:Src/main.c **** - 9452 .loc 1 563 7 is_stmt 1 view .LVU3080 - 9453 0826 6C4C ldr r4, .L438+4 - 9454 0828 0122 movs r2, #1 - 9455 082a 8021 movs r1, #128 - 9456 082c 2046 mov r0, r4 - 9457 082e FFF7FEFF bl HAL_GPIO_WritePin - 9458 .LVL742: + 552:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 10340 .loc 1 552 13 is_stmt 0 view .LVU3333 + 10341 066e 854F ldr r7, .L535+32 + 10342 0670 3B68 ldr r3, [r7] + 552:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 10343 .loc 1 552 20 view .LVU3334 + 10344 0672 23F00803 bic r3, r3, #8 + 10345 0676 3B60 str r3, [r7] + 553:Src/main.c **** + 10346 .loc 1 553 7 is_stmt 1 view .LVU3335 + 553:Src/main.c **** + 10347 .loc 1 553 12 is_stmt 0 view .LVU3336 + 10348 0678 834D ldr r5, .L535+36 + 10349 067a 2B68 ldr r3, [r5] + 553:Src/main.c **** + 10350 .loc 1 553 19 view .LVU3337 + 10351 067c 23F00803 bic r3, r3, #8 + 10352 0680 2B60 str r3, [r5] + 557:Src/main.c **** TIM4 -> CNT = 0; + 10353 .loc 1 557 7 is_stmt 1 view .LVU3338 + 557:Src/main.c **** TIM4 -> CNT = 0; + 10354 .loc 1 557 20 is_stmt 0 view .LVU3339 + 10355 0682 0024 movs r4, #0 + 10356 0684 7C62 str r4, [r7, #36] + 558:Src/main.c **** + 10357 .loc 1 558 7 is_stmt 1 view .LVU3340 + 558:Src/main.c **** + 10358 .loc 1 558 19 is_stmt 0 view .LVU3341 + 10359 0686 6C62 str r4, [r5, #36] + 560:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 10360 .loc 1 560 7 is_stmt 1 view .LVU3342 + 10361 0688 2146 mov r1, r4 + 10362 068a 4846 mov r0, r9 + 10363 068c FFF7FEFF bl HAL_TIM_PWM_Start + 10364 .LVL862: + 561:Src/main.c **** //TIM4 -> CNT = 0; + 10365 .loc 1 561 7 view .LVU3343 + 10366 0690 0821 movs r1, #8 + 10367 0692 4046 mov r0, r8 + 10368 0694 FFF7FEFF bl HAL_TIM_PWM_Start + 10369 .LVL863: + 564:Src/main.c **** TIM11 -> CNT = 0; + 10370 .loc 1 564 7 view .LVU3344 + 564:Src/main.c **** TIM11 -> CNT = 0; + 10371 .loc 1 564 26 is_stmt 0 view .LVU3345 + 10372 0698 EB6A ldr r3, [r5, #44] + 564:Src/main.c **** TIM11 -> CNT = 0; + 10373 .loc 1 564 33 view .LVU3346 + 10374 069a 143B subs r3, r3, #20 + 564:Src/main.c **** TIM11 -> CNT = 0; + 10375 .loc 1 564 19 view .LVU3347 + 10376 069c 6B62 str r3, [r5, #36] 565:Src/main.c **** - 9459 .loc 1 565 7 view .LVU3081 - 9460 0832 0022 movs r2, #0 - 9461 0834 8021 movs r1, #128 - 9462 0836 2046 mov r0, r4 - 9463 0838 FFF7FEFF bl HAL_GPIO_WritePin - 9464 .LVL743: - 567:Src/main.c **** TIM8->CNT = 0; - 9465 .loc 1 567 7 view .LVU3082 - 9466 083c 6748 ldr r0, .L438+8 - 9467 083e FFF7FEFF bl HAL_TIM_Base_Stop_IT - 9468 .LVL744: - 568:Src/main.c **** - 9469 .loc 1 568 7 view .LVU3083 - 568:Src/main.c **** - 9470 .loc 1 568 17 is_stmt 0 view .LVU3084 - 9471 0842 674B ldr r3, .L438+12 - 9472 0844 0022 movs r2, #0 - 9473 0846 5A62 str r2, [r3, #36] - 570:Src/main.c **** task.current_param = task.min_param; - 9474 .loc 1 570 7 is_stmt 1 view .LVU3085 - 9475 0848 FFF7FEFF bl Stop_TIM10 - 9476 .LVL745: - 571:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 9477 .loc 1 571 7 view .LVU3086 - 571:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 9478 .loc 1 571 32 is_stmt 0 view .LVU3087 - 9479 084c 654C ldr r4, .L438+16 - 9480 084e D4ED017A vldr.32 s15, [r4, #4] - 571:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 9481 .loc 1 571 26 view .LVU3088 - 9482 0852 C4ED047A vstr.32 s15, [r4, #16] - 572:Src/main.c **** if (task.tau > 3) - 9483 .loc 1 572 7 is_stmt 1 view .LVU3089 - 9484 0856 FCEEE77A vcvt.u32.f32 s15, s15 - 9485 085a 17EE903A vmov r3, s15 @ int - 9486 085e 99B2 uxth r1, r3 - 9487 0860 0220 movs r0, #2 - 9488 0862 FFF7FEFF bl Set_LTEC - 9489 .LVL746: - 573:Src/main.c **** { - 9490 .loc 1 573 7 view .LVU3090 - 573:Src/main.c **** { - 9491 .loc 1 573 15 is_stmt 0 view .LVU3091 - 9492 0866 E38A ldrh r3, [r4, #22] - 573:Src/main.c **** { - ARM GAS /tmp/ccO46DoU.s page 553 + 10377 .loc 1 565 7 is_stmt 1 view .LVU3348 + 565:Src/main.c **** + 10378 .loc 1 565 20 is_stmt 0 view .LVU3349 + 10379 069e 7C62 str r4, [r7, #36] + ARM GAS /tmp/ccYgfTud.s page 579 - 9493 .loc 1 573 10 view .LVU3092 - 9494 0868 032B cmp r3, #3 - 9495 086a 0CD9 bls .L409 - 575:Src/main.c **** htim10.Init.Period = 9999; - 9496 .loc 1 575 8 is_stmt 1 view .LVU3093 - 575:Src/main.c **** htim10.Init.Period = 9999; - 9497 .loc 1 575 34 is_stmt 0 view .LVU3094 - 9498 086c 594A ldr r2, .L438 - 9499 086e D068 ldr r0, [r2, #12] - 575:Src/main.c **** htim10.Init.Period = 9999; - 9500 .loc 1 575 21 view .LVU3095 - 9501 0870 5D49 ldr r1, .L438+20 - 9502 0872 0860 str r0, [r1] - 576:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9503 .loc 1 576 8 is_stmt 1 view .LVU3096 - 576:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9504 .loc 1 576 27 is_stmt 0 view .LVU3097 - 9505 0874 42F20F71 movw r1, #9999 - 9506 0878 D160 str r1, [r2, #12] - 577:Src/main.c **** } - 9507 .loc 1 577 8 is_stmt 1 view .LVU3098 - 577:Src/main.c **** } - 9508 .loc 1 577 33 is_stmt 0 view .LVU3099 - 9509 087a 013B subs r3, r3, #1 - 577:Src/main.c **** } - 9510 .loc 1 577 38 view .LVU3100 - 9511 087c 6422 movs r2, #100 - 9512 087e 02FB03F3 mul r3, r2, r3 - 577:Src/main.c **** } - 9513 .loc 1 577 21 view .LVU3101 - 9514 0882 5A4A ldr r2, .L438+24 - 9515 0884 1360 str r3, [r2] - 9516 .L409: - 579:Src/main.c **** - 9517 .loc 1 579 7 is_stmt 1 view .LVU3102 - 9518 0886 5348 ldr r0, .L438 - 9519 0888 FFF7FEFF bl HAL_TIM_Base_Start_IT - 9520 .LVL747: - 627:Src/main.c **** case TT_CHANGE_TEMP_1: - 9521 .loc 1 627 6 view .LVU3103 - 9522 088c F0E5 b .L394 - 9523 .LVL748: - 9524 .L428: - 627:Src/main.c **** case TT_CHANGE_TEMP_1: - 9525 .loc 1 627 6 is_stmt 0 view .LVU3104 - 9526 .LBE577: - 638:Src/main.c **** - 9527 .loc 1 638 7 is_stmt 1 view .LVU3105 - 638:Src/main.c **** - 9528 .loc 1 638 18 is_stmt 0 view .LVU3106 - 9529 088e 584A ldr r2, .L438+28 - 9530 0890 1360 str r3, [r2] - 640:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9531 .loc 1 640 7 is_stmt 1 view .LVU3107 - 640:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9532 .loc 1 640 25 is_stmt 0 view .LVU3108 - 9533 0892 0120 movs r0, #1 - ARM GAS /tmp/ccO46DoU.s page 554 + 568:Src/main.c **** { + 10380 .loc 1 568 7 is_stmt 1 view .LVU3350 + 544:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 10381 .loc 1 544 16 is_stmt 0 view .LVU3351 + 10382 06a0 2546 mov r5, r4 + 10383 .LVL864: + 10384 .L492: + 568:Src/main.c **** { + 10385 .loc 1 568 33 is_stmt 1 view .LVU3352 + 568:Src/main.c **** { + 10386 .loc 1 568 18 is_stmt 0 view .LVU3353 + 10387 06a2 704B ldr r3, .L535 + 10388 06a4 D3ED047A vldr.32 s15, [r3, #16] + 568:Src/main.c **** { + 10389 .loc 1 568 39 view .LVU3354 + 10390 06a8 93ED027A vldr.32 s14, [r3, #8] + 568:Src/main.c **** { + 10391 .loc 1 568 33 view .LVU3355 + 10392 06ac F4EEC77A vcmpe.f32 s15, s14 + 10393 06b0 F1EE10FA vmrs APSR_nzcv, FPSCR + 10394 06b4 37D5 bpl .L528 + 570:Src/main.c **** { + 10395 .loc 1 570 8 is_stmt 1 view .LVU3356 + 570:Src/main.c **** { + 10396 .loc 1 570 12 is_stmt 0 view .LVU3357 + 10397 06b6 754B ldr r3, .L535+40 + 10398 06b8 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 570:Src/main.c **** { + 10399 .loc 1 570 11 view .LVU3358 + 10400 06ba 002B cmp r3, #0 + 10401 06bc F1D0 beq .L492 + 572:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 10402 .loc 1 572 9 is_stmt 1 view .LVU3359 + 10403 06be FCEEE77A vcvt.u32.f32 s15, s15 + 10404 06c2 17EE903A vmov r3, s15 @ int + 10405 06c6 99B2 uxth r1, r3 + 10406 06c8 0120 movs r0, #1 + 10407 06ca FFF7FEFF bl Set_LTEC + 10408 .LVL865: + 575:Src/main.c **** TO10 = 0; + 10409 .loc 1 575 9 view .LVU3360 + 575:Src/main.c **** TO10 = 0; + 10410 .loc 1 575 13 is_stmt 0 view .LVU3361 + 10411 06ce 654B ldr r3, .L535 + 10412 06d0 D3ED047A vldr.32 s15, [r3, #16] + 575:Src/main.c **** TO10 = 0; + 10413 .loc 1 575 35 view .LVU3362 + 10414 06d4 93ED037A vldr.32 s14, [r3, #12] + 575:Src/main.c **** TO10 = 0; + 10415 .loc 1 575 28 view .LVU3363 + 10416 06d8 77EE877A vadd.f32 s15, s15, s14 + 10417 06dc C3ED047A vstr.32 s15, [r3, #16] + 576:Src/main.c **** TIM10_coflag = 0; + 10418 .loc 1 576 9 is_stmt 1 view .LVU3364 + 576:Src/main.c **** TIM10_coflag = 0; + 10419 .loc 1 576 14 is_stmt 0 view .LVU3365 + 10420 06e0 0027 movs r7, #0 + ARM GAS /tmp/ccYgfTud.s page 580 - 9534 0894 FFF7FEFF bl MPhD_T - 9535 .LVL749: - 640:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9536 .loc 1 640 23 discriminator 1 view .LVU3109 - 9537 0898 564E ldr r6, .L438+32 - 9538 089a 3081 strh r0, [r6, #8] @ movhi - 641:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9539 .loc 1 641 7 is_stmt 1 view .LVU3110 - 641:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9540 .loc 1 641 25 is_stmt 0 view .LVU3111 - 9541 089c 0120 movs r0, #1 - 9542 089e FFF7FEFF bl MPhD_T - 9543 .LVL750: - 641:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9544 .loc 1 641 23 discriminator 1 view .LVU3112 - 9545 08a2 3081 strh r0, [r6, #8] @ movhi - 642:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9546 .loc 1 642 7 is_stmt 1 view .LVU3113 - 642:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9547 .loc 1 642 25 is_stmt 0 view .LVU3114 - 9548 08a4 0220 movs r0, #2 - 9549 08a6 FFF7FEFF bl MPhD_T - 9550 .LVL751: - 642:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9551 .loc 1 642 23 discriminator 1 view .LVU3115 - 9552 08aa 534F ldr r7, .L438+36 - 9553 08ac 3881 strh r0, [r7, #8] @ movhi - 643:Src/main.c **** - 9554 .loc 1 643 7 is_stmt 1 view .LVU3116 - 643:Src/main.c **** - 9555 .loc 1 643 25 is_stmt 0 view .LVU3117 - 9556 08ae 0220 movs r0, #2 - 9557 08b0 FFF7FEFF bl MPhD_T - 9558 .LVL752: - 643:Src/main.c **** - 9559 .loc 1 643 23 discriminator 1 view .LVU3118 - 9560 08b4 3881 strh r0, [r7, #8] @ movhi - 645:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9561 .loc 1 645 7 is_stmt 1 view .LVU3119 - 645:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9562 .loc 1 645 31 is_stmt 0 view .LVU3120 - 9563 08b6 3389 ldrh r3, [r6, #8] - 645:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9564 .loc 1 645 20 view .LVU3121 - 9565 08b8 504C ldr r4, .L438+40 - 9566 08ba 6380 strh r3, [r4, #2] @ movhi - 646:Src/main.c **** - 9567 .loc 1 646 7 is_stmt 1 view .LVU3122 - 646:Src/main.c **** - 9568 .loc 1 646 20 is_stmt 0 view .LVU3123 - 9569 08bc A080 strh r0, [r4, #4] @ movhi - 650:Src/main.c **** temp16 = Get_ADC(1); - 9570 .loc 1 650 7 is_stmt 1 view .LVU3124 - 650:Src/main.c **** temp16 = Get_ADC(1); - 9571 .loc 1 650 16 is_stmt 0 view .LVU3125 - 9572 08be 0020 movs r0, #0 - 9573 08c0 FFF7FEFF bl Get_ADC - ARM GAS /tmp/ccO46DoU.s page 555 + 10421 06e2 6B4B ldr r3, .L535+44 + 10422 06e4 1F60 str r7, [r3] + 577:Src/main.c **** + 10423 .loc 1 577 9 is_stmt 1 view .LVU3366 + 577:Src/main.c **** + 10424 .loc 1 577 22 is_stmt 0 view .LVU3367 + 10425 06e6 694B ldr r3, .L535+40 + 10426 06e8 1F70 strb r7, [r3] + 579:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 10427 .loc 1 579 9 is_stmt 1 view .LVU3368 + 10428 06ea DFF8C881 ldr r8, .L535+80 + 10429 06ee 0122 movs r2, #1 + 10430 06f0 4FF40071 mov r1, #512 + 10431 06f4 4046 mov r0, r8 + 10432 06f6 FFF7FEFF bl HAL_GPIO_WritePin + 10433 .LVL866: + 580:Src/main.c **** //* + 10434 .loc 1 580 9 view .LVU3369 + 10435 06fa 3A46 mov r2, r7 + 10436 06fc 4FF40071 mov r1, #512 + 10437 0700 4046 mov r0, r8 + 10438 0702 FFF7FEFF bl HAL_GPIO_WritePin + 10439 .LVL867: + 582:Src/main.c **** OUT_trigger(trigger_counter); + 10440 .loc 1 582 9 view .LVU3370 + 582:Src/main.c **** OUT_trigger(trigger_counter); + 10441 .loc 1 582 41 is_stmt 0 view .LVU3371 + 10442 0706 B4FBF6F3 udiv r3, r4, r6 + 10443 070a 06FB1343 mls r3, r6, r3, r4 + 10444 070e 9BB2 uxth r3, r3 + 582:Src/main.c **** OUT_trigger(trigger_counter); + 10445 .loc 1 582 12 view .LVU3372 + 10446 0710 1BB1 cbz r3, .L529 + 10447 .L493: + 586:Src/main.c **** //*/ + 10448 .loc 1 586 9 is_stmt 1 view .LVU3373 + 10449 0712 0134 adds r4, r4, #1 + 10450 .LVL868: + 586:Src/main.c **** //*/ + 10451 .loc 1 586 9 is_stmt 0 view .LVU3374 + 10452 0714 A4B2 uxth r4, r4 + 10453 .LVL869: + 586:Src/main.c **** //*/ + 10454 .loc 1 586 9 view .LVU3375 + 10455 0716 C4E7 b .L492 + 10456 .LVL870: + 10457 .L490: + 541:Src/main.c **** + 10458 .loc 1 541 8 is_stmt 1 view .LVU3376 + 541:Src/main.c **** + 10459 .loc 1 541 13 view .LVU3377 + 10460 0718 FEE7 b .L490 + 10461 .LVL871: + 10462 .L529: + 583:Src/main.c **** ++trigger_counter; + 10463 .loc 1 583 10 view .LVU3378 + 10464 071a E8B2 uxtb r0, r5 + ARM GAS /tmp/ccYgfTud.s page 581 - 9574 .LVL753: - 650:Src/main.c **** temp16 = Get_ADC(1); - 9575 .loc 1 650 14 discriminator 1 view .LVU3126 - 9576 08c4 4E4D ldr r5, .L438+44 - 9577 08c6 2880 strh r0, [r5] @ movhi - 651:Src/main.c **** Long_Data[7] = temp16; - 9578 .loc 1 651 7 is_stmt 1 view .LVU3127 - 651:Src/main.c **** Long_Data[7] = temp16; - 9579 .loc 1 651 16 is_stmt 0 view .LVU3128 - 9580 08c8 0120 movs r0, #1 - 9581 08ca FFF7FEFF bl Get_ADC - 9582 .LVL754: - 651:Src/main.c **** Long_Data[7] = temp16; - 9583 .loc 1 651 14 discriminator 1 view .LVU3129 - 9584 08ce 2880 strh r0, [r5] @ movhi - 652:Src/main.c **** - 9585 .loc 1 652 7 is_stmt 1 view .LVU3130 - 652:Src/main.c **** - 9586 .loc 1 652 20 is_stmt 0 view .LVU3131 - 9587 08d0 E081 strh r0, [r4, #14] @ movhi - 655:Src/main.c **** Long_Data[8] = temp16; - 9588 .loc 1 655 7 is_stmt 1 view .LVU3132 - 655:Src/main.c **** Long_Data[8] = temp16; - 9589 .loc 1 655 16 is_stmt 0 view .LVU3133 - 9590 08d2 0120 movs r0, #1 - 9591 08d4 FFF7FEFF bl Get_ADC - 9592 .LVL755: - 655:Src/main.c **** Long_Data[8] = temp16; - 9593 .loc 1 655 14 discriminator 1 view .LVU3134 - 9594 08d8 2880 strh r0, [r5] @ movhi - 656:Src/main.c **** - 9595 .loc 1 656 7 is_stmt 1 view .LVU3135 - 656:Src/main.c **** - 9596 .loc 1 656 20 is_stmt 0 view .LVU3136 - 9597 08da 2082 strh r0, [r4, #16] @ movhi - 659:Src/main.c **** Long_Data[9] = temp16; - 9598 .loc 1 659 7 is_stmt 1 view .LVU3137 - 659:Src/main.c **** Long_Data[9] = temp16; - 9599 .loc 1 659 16 is_stmt 0 view .LVU3138 - 9600 08dc 0120 movs r0, #1 - 9601 08de FFF7FEFF bl Get_ADC - 9602 .LVL756: - 659:Src/main.c **** Long_Data[9] = temp16; - 9603 .loc 1 659 14 discriminator 1 view .LVU3139 - 9604 08e2 2880 strh r0, [r5] @ movhi - 660:Src/main.c **** - 9605 .loc 1 660 7 is_stmt 1 view .LVU3140 - 660:Src/main.c **** - 9606 .loc 1 660 20 is_stmt 0 view .LVU3141 - 9607 08e4 6082 strh r0, [r4, #18] @ movhi - 663:Src/main.c **** Long_Data[10] = temp16; - 9608 .loc 1 663 7 is_stmt 1 view .LVU3142 - 663:Src/main.c **** Long_Data[10] = temp16; - 9609 .loc 1 663 16 is_stmt 0 view .LVU3143 - 9610 08e6 0120 movs r0, #1 - 9611 08e8 FFF7FEFF bl Get_ADC - 9612 .LVL757: - ARM GAS /tmp/ccO46DoU.s page 556 + 10465 071c FFF7FEFF bl OUT_trigger + 10466 .LVL872: + 584:Src/main.c **** } + 10467 .loc 1 584 10 view .LVU3379 + 10468 0720 0135 adds r5, r5, #1 + 10469 .LVL873: + 584:Src/main.c **** } + 10470 .loc 1 584 10 is_stmt 0 view .LVU3380 + 10471 0722 ADB2 uxth r5, r5 + 10472 .LVL874: + 584:Src/main.c **** } + 10473 .loc 1 584 10 view .LVU3381 + 10474 0724 F5E7 b .L493 + 10475 .L528: + 611:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 10476 .loc 1 611 7 is_stmt 1 view .LVU3382 + 611:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 10477 .loc 1 611 13 is_stmt 0 view .LVU3383 + 10478 0726 574A ldr r2, .L535+32 + 10479 0728 D368 ldr r3, [r2, #12] + 611:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 10480 .loc 1 611 21 view .LVU3384 + 10481 072a 43F00103 orr r3, r3, #1 + 10482 072e D360 str r3, [r2, #12] + 621:Src/main.c **** + 10483 .loc 1 621 7 is_stmt 1 view .LVU3385 + 10484 0730 FFF7FEFF bl Stop_TIM10 + 10485 .LVL875: + 623:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 10486 .loc 1 623 7 view .LVU3386 + 623:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 10487 .loc 1 623 32 is_stmt 0 view .LVU3387 + 10488 0734 4B4C ldr r4, .L535 + 10489 .LVL876: + 623:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 10490 .loc 1 623 32 view .LVU3388 + 10491 0736 D4ED017A vldr.32 s15, [r4, #4] + 623:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 10492 .loc 1 623 26 view .LVU3389 + 10493 073a C4ED047A vstr.32 s15, [r4, #16] + 624:Src/main.c **** if (task.tau > 3) + 10494 .loc 1 624 7 is_stmt 1 view .LVU3390 + 10495 073e FCEEE77A vcvt.u32.f32 s15, s15 + 10496 0742 17EE903A vmov r3, s15 @ int + 10497 0746 99B2 uxth r1, r3 + 10498 0748 0120 movs r0, #1 + 10499 074a FFF7FEFF bl Set_LTEC + 10500 .LVL877: + 625:Src/main.c **** { + 10501 .loc 1 625 7 view .LVU3391 + 625:Src/main.c **** { + 10502 .loc 1 625 15 is_stmt 0 view .LVU3392 + 10503 074e E38A ldrh r3, [r4, #22] + 625:Src/main.c **** { + 10504 .loc 1 625 10 view .LVU3393 + 10505 0750 032B cmp r3, #3 + 10506 0752 0CD9 bls .L495 + ARM GAS /tmp/ccYgfTud.s page 582 - 663:Src/main.c **** Long_Data[10] = temp16; - 9613 .loc 1 663 14 discriminator 1 view .LVU3144 - 9614 08ec 2880 strh r0, [r5] @ movhi - 664:Src/main.c **** - 9615 .loc 1 664 7 is_stmt 1 view .LVU3145 - 664:Src/main.c **** - 9616 .loc 1 664 21 is_stmt 0 view .LVU3146 - 9617 08ee A082 strh r0, [r4, #20] @ movhi - 667:Src/main.c **** Long_Data[11] = temp16; - 9618 .loc 1 667 7 is_stmt 1 view .LVU3147 - 667:Src/main.c **** Long_Data[11] = temp16; - 9619 .loc 1 667 16 is_stmt 0 view .LVU3148 - 9620 08f0 0120 movs r0, #1 - 9621 08f2 FFF7FEFF bl Get_ADC - 9622 .LVL758: - 667:Src/main.c **** Long_Data[11] = temp16; - 9623 .loc 1 667 14 discriminator 1 view .LVU3149 - 9624 08f6 2880 strh r0, [r5] @ movhi - 668:Src/main.c **** temp16 = Get_ADC(2); - 9625 .loc 1 668 7 is_stmt 1 view .LVU3150 - 668:Src/main.c **** temp16 = Get_ADC(2); - 9626 .loc 1 668 21 is_stmt 0 view .LVU3151 - 9627 08f8 E082 strh r0, [r4, #22] @ movhi - 669:Src/main.c **** - 9628 .loc 1 669 7 is_stmt 1 view .LVU3152 - 669:Src/main.c **** - 9629 .loc 1 669 16 is_stmt 0 view .LVU3153 - 9630 08fa 0220 movs r0, #2 - 9631 08fc FFF7FEFF bl Get_ADC - 9632 .LVL759: - 669:Src/main.c **** - 9633 .loc 1 669 14 discriminator 1 view .LVU3154 - 9634 0900 2880 strh r0, [r5] @ movhi - 672:Src/main.c **** temp16 = Get_ADC(4); - 9635 .loc 1 672 7 is_stmt 1 view .LVU3155 - 672:Src/main.c **** temp16 = Get_ADC(4); - 9636 .loc 1 672 16 is_stmt 0 view .LVU3156 - 9637 0902 0320 movs r0, #3 - 9638 0904 FFF7FEFF bl Get_ADC - 9639 .LVL760: - 672:Src/main.c **** temp16 = Get_ADC(4); - 9640 .loc 1 672 14 discriminator 1 view .LVU3157 - 9641 0908 2880 strh r0, [r5] @ movhi - 673:Src/main.c **** Long_Data[12] = temp16; - 9642 .loc 1 673 7 is_stmt 1 view .LVU3158 - 673:Src/main.c **** Long_Data[12] = temp16; - 9643 .loc 1 673 16 is_stmt 0 view .LVU3159 - 9644 090a 0420 movs r0, #4 - 9645 090c FFF7FEFF bl Get_ADC - 9646 .LVL761: - 673:Src/main.c **** Long_Data[12] = temp16; - 9647 .loc 1 673 14 discriminator 1 view .LVU3160 - 9648 0910 2880 strh r0, [r5] @ movhi - 674:Src/main.c **** temp16 = Get_ADC(5); - 9649 .loc 1 674 7 is_stmt 1 view .LVU3161 - 674:Src/main.c **** temp16 = Get_ADC(5); - 9650 .loc 1 674 21 is_stmt 0 view .LVU3162 - ARM GAS /tmp/ccO46DoU.s page 557 + 627:Src/main.c **** htim10.Init.Period = 9999; + 10507 .loc 1 627 8 is_stmt 1 view .LVU3394 + 627:Src/main.c **** htim10.Init.Period = 9999; + 10508 .loc 1 627 34 is_stmt 0 view .LVU3395 + 10509 0754 4A4A ldr r2, .L535+28 + 10510 0756 D068 ldr r0, [r2, #12] + 627:Src/main.c **** htim10.Init.Period = 9999; + 10511 .loc 1 627 21 view .LVU3396 + 10512 0758 4E49 ldr r1, .L535+48 + 10513 075a 0860 str r0, [r1] + 628:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 10514 .loc 1 628 8 is_stmt 1 view .LVU3397 + 628:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 10515 .loc 1 628 27 is_stmt 0 view .LVU3398 + 10516 075c 42F20F71 movw r1, #9999 + 10517 0760 D160 str r1, [r2, #12] + 629:Src/main.c **** } + 10518 .loc 1 629 8 is_stmt 1 view .LVU3399 + 629:Src/main.c **** } + 10519 .loc 1 629 33 is_stmt 0 view .LVU3400 + 10520 0762 013B subs r3, r3, #1 + 629:Src/main.c **** } + 10521 .loc 1 629 38 view .LVU3401 + 10522 0764 6422 movs r2, #100 + 10523 0766 02FB03F3 mul r3, r2, r3 + 629:Src/main.c **** } + 10524 .loc 1 629 21 view .LVU3402 + 10525 076a 4B4A ldr r2, .L535+52 + 10526 076c 1360 str r3, [r2] + 10527 .L495: + 631:Src/main.c **** break; + 10528 .loc 1 631 7 is_stmt 1 view .LVU3403 + 10529 076e 4448 ldr r0, .L535+28 + 10530 0770 FFF7FEFF bl HAL_TIM_Base_Start_IT + 10531 .LVL878: + 632:Src/main.c **** case TT_CHANGE_CURR_2: + 10532 .loc 1 632 6 view .LVU3404 + 10533 0774 C9E6 b .L488 + 10534 .LVL879: + 10535 .L487: + 636:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 10536 .loc 1 636 7 view .LVU3405 + 636:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 10537 .loc 1 636 38 is_stmt 0 view .LVU3406 + 10538 0776 3B4B ldr r3, .L535 + 10539 0778 D3ED077A vldr.32 s15, [r3, #28] + 636:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 10540 .loc 1 636 7 view .LVU3407 + 10541 077c FCEEE77A vcvt.u32.f32 s15, s15 + 10542 0780 17EE903A vmov r3, s15 @ int + 10543 0784 99B2 uxth r1, r3 + 10544 0786 0120 movs r0, #1 + 10545 0788 FFF7FEFF bl Set_LTEC + 10546 .LVL880: + 637:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 10547 .loc 1 637 7 is_stmt 1 view .LVU3408 + 637:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + ARM GAS /tmp/ccYgfTud.s page 583 - 9651 0912 2083 strh r0, [r4, #24] @ movhi - 675:Src/main.c **** - 9652 .loc 1 675 7 is_stmt 1 view .LVU3163 - 675:Src/main.c **** - 9653 .loc 1 675 16 is_stmt 0 view .LVU3164 - 9654 0914 0520 movs r0, #5 - 9655 0916 FFF7FEFF bl Get_ADC - 9656 .LVL762: - 675:Src/main.c **** - 9657 .loc 1 675 14 discriminator 1 view .LVU3165 - 9658 091a 2880 strh r0, [r5] @ movhi - 678:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 9659 .loc 1 678 7 is_stmt 1 view .LVU3166 - 678:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 9660 .loc 1 678 16 is_stmt 0 view .LVU3167 - 9661 091c 394B ldr r3, .L438+48 - 9662 091e 1B68 ldr r3, [r3] - 9663 0920 394A ldr r2, .L438+52 - 9664 0922 1360 str r3, [r2] - 679:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 9665 .loc 1 679 7 is_stmt 1 view .LVU3168 - 679:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 9666 .loc 1 679 20 is_stmt 0 view .LVU3169 - 9667 0924 E380 strh r3, [r4, #6] @ movhi - 680:Src/main.c **** - 9668 .loc 1 680 7 is_stmt 1 view .LVU3170 - 680:Src/main.c **** - 9669 .loc 1 680 31 is_stmt 0 view .LVU3171 - 9670 0926 1B0C lsrs r3, r3, #16 - 680:Src/main.c **** - 9671 .loc 1 680 20 view .LVU3172 - 9672 0928 2381 strh r3, [r4, #8] @ movhi - 683:Src/main.c **** - 9673 .loc 1 683 7 is_stmt 1 view .LVU3173 - 683:Src/main.c **** - 9674 .loc 1 683 31 is_stmt 0 view .LVU3174 - 9675 092a 3388 ldrh r3, [r6] - 683:Src/main.c **** - 9676 .loc 1 683 20 view .LVU3175 - 9677 092c 6381 strh r3, [r4, #10] @ movhi - 686:Src/main.c **** } - 9678 .loc 1 686 7 is_stmt 1 view .LVU3176 - 686:Src/main.c **** } - 9679 .loc 1 686 31 is_stmt 0 view .LVU3177 - 9680 092e 3B88 ldrh r3, [r7] - 686:Src/main.c **** } - 9681 .loc 1 686 20 view .LVU3178 - 9682 0930 A381 strh r3, [r4, #12] @ movhi - 9683 0932 A4E5 b .L411 - 9684 .L413: - 714:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9685 .loc 1 714 5 is_stmt 1 view .LVU3179 - 714:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9686 .loc 1 714 17 is_stmt 0 view .LVU3180 - 9687 0934 354C ldr r4, .L438+56 - 9688 0936 0D21 movs r1, #13 - 9689 0938 2046 mov r0, r4 - ARM GAS /tmp/ccO46DoU.s page 558 + 10548 .loc 1 637 14 is_stmt 0 view .LVU3409 + 10549 078c 0320 movs r0, #3 + 10550 078e FFF7FEFF bl MPhD_T + 10551 .LVL881: + 638:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 10552 .loc 1 638 7 is_stmt 1 view .LVU3410 + 638:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 10553 .loc 1 638 32 is_stmt 0 view .LVU3411 + 10554 0792 0320 movs r0, #3 + 10555 0794 FFF7FEFF bl MPhD_T + 10556 .LVL882: + 638:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 10557 .loc 1 638 30 discriminator 1 view .LVU3412 + 10558 0798 334C ldr r4, .L535+4 + 10559 079a 2080 strh r0, [r4] @ movhi + 639:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 10560 .loc 1 639 7 is_stmt 1 view .LVU3413 + 639:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 10561 .loc 1 639 14 is_stmt 0 view .LVU3414 + 10562 079c 0420 movs r0, #4 + 10563 079e FFF7FEFF bl MPhD_T + 10564 .LVL883: + 640:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 10565 .loc 1 640 7 is_stmt 1 view .LVU3415 + 640:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 10566 .loc 1 640 32 is_stmt 0 view .LVU3416 + 10567 07a2 0420 movs r0, #4 + 10568 07a4 FFF7FEFF bl MPhD_T + 10569 .LVL884: + 640:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 10570 .loc 1 640 30 discriminator 1 view .LVU3417 + 10571 07a8 304D ldr r5, .L535+8 + 10572 07aa 2880 strh r0, [r5] @ movhi + 641:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 10573 .loc 1 641 7 is_stmt 1 view .LVU3418 + 641:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 10574 .loc 1 641 14 is_stmt 0 view .LVU3419 + 10575 07ac 0122 movs r2, #1 + 10576 07ae 2146 mov r1, r4 + 10577 07b0 2F48 ldr r0, .L535+12 + 10578 07b2 FFF7FEFF bl PID_Controller_Temp + 10579 .LVL885: + 10580 07b6 0146 mov r1, r0 + 641:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 10581 .loc 1 641 13 discriminator 1 view .LVU3420 + 10582 07b8 2E4C ldr r4, .L535+16 + 10583 07ba 2080 strh r0, [r4] @ movhi + 642:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 10584 .loc 1 642 7 is_stmt 1 view .LVU3421 + 10585 07bc 0320 movs r0, #3 + 10586 07be FFF7FEFF bl Set_LTEC + 10587 .LVL886: + 643:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 10588 .loc 1 643 7 view .LVU3422 + 643:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 10589 .loc 1 643 14 is_stmt 0 view .LVU3423 + 10590 07c2 0222 movs r2, #2 + ARM GAS /tmp/ccYgfTud.s page 584 - 9690 093a FFF7FEFF bl CalculateChecksum - 9691 .LVL763: - 714:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9692 .loc 1 714 15 discriminator 1 view .LVU3181 - 9693 093e 344B ldr r3, .L438+60 - 9694 0940 1880 strh r0, [r3] @ movhi - 715:Src/main.c **** - 9695 .loc 1 715 5 is_stmt 1 view .LVU3182 - 715:Src/main.c **** - 9696 .loc 1 715 24 is_stmt 0 view .LVU3183 - 9697 0942 6083 strh r0, [r4, #26] @ movhi - 717:Src/main.c **** { - 9698 .loc 1 717 5 is_stmt 1 view .LVU3184 - 9699 .LBB578: - 717:Src/main.c **** { - 9700 .loc 1 717 10 view .LVU3185 - 9701 .LVL764: - 717:Src/main.c **** { - 9702 .loc 1 717 19 is_stmt 0 view .LVU3186 - 9703 0944 0023 movs r3, #0 - 717:Src/main.c **** { - 9704 .loc 1 717 5 view .LVU3187 - 9705 0946 0BE0 b .L416 - 9706 .LVL765: - 9707 .L417: - 719:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9708 .loc 1 719 6 is_stmt 1 view .LVU3188 - 719:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9709 .loc 1 719 33 is_stmt 0 view .LVU3189 - 9710 0948 2C4A ldr r2, .L438+40 - 9711 094a 32F81320 ldrh r2, [r2, r3, lsl #1] - 719:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9712 .loc 1 719 17 view .LVU3190 - 9713 094e 5900 lsls r1, r3, #1 - 719:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9714 .loc 1 719 21 view .LVU3191 - 9715 0950 3048 ldr r0, .L438+64 - 9716 0952 00F81320 strb r2, [r0, r3, lsl #1] - 720:Src/main.c **** } - 9717 .loc 1 720 6 is_stmt 1 view .LVU3192 - 720:Src/main.c **** } - 9718 .loc 1 720 19 is_stmt 0 view .LVU3193 - 9719 0956 0131 adds r1, r1, #1 - 720:Src/main.c **** } - 9720 .loc 1 720 23 view .LVU3194 - 9721 0958 120A lsrs r2, r2, #8 - 9722 095a 4254 strb r2, [r0, r1] - 717:Src/main.c **** { - 9723 .loc 1 717 38 is_stmt 1 discriminator 3 view .LVU3195 - 9724 095c 0133 adds r3, r3, #1 - 9725 .LVL766: - 717:Src/main.c **** { - 9726 .loc 1 717 38 is_stmt 0 discriminator 3 view .LVU3196 - 9727 095e 9BB2 uxth r3, r3 - 9728 .LVL767: - 9729 .L416: - 717:Src/main.c **** { - ARM GAS /tmp/ccO46DoU.s page 559 + 10591 07c4 2946 mov r1, r5 + 10592 07c6 2C48 ldr r0, .L535+20 + 10593 07c8 FFF7FEFF bl PID_Controller_Temp + 10594 .LVL887: + 10595 07cc 0146 mov r1, r0 + 643:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 10596 .loc 1 643 13 discriminator 1 view .LVU3424 + 10597 07ce 2080 strh r0, [r4] @ movhi + 644:Src/main.c **** + 10598 .loc 1 644 7 is_stmt 1 view .LVU3425 + 10599 07d0 0420 movs r0, #4 + 10600 07d2 FFF7FEFF bl Set_LTEC + 10601 .LVL888: + 646:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 10602 .loc 1 646 7 view .LVU3426 + 646:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 10603 .loc 1 646 28 is_stmt 0 view .LVU3427 + 10604 07d6 314B ldr r3, .L535+56 + 10605 07d8 0222 movs r2, #2 + 10606 07da 1A70 strb r2, [r3] + 647:Src/main.c **** //LD_blinker.param = task.current_param; + 10607 .loc 1 647 7 is_stmt 1 view .LVU3428 + 647:Src/main.c **** //LD_blinker.param = task.current_param; + 10608 .loc 1 647 24 is_stmt 0 view .LVU3429 + 10609 07dc 0022 movs r2, #0 + 10610 07de 9A72 strb r2, [r3, #10] + 649:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 10611 .loc 1 649 7 is_stmt 1 view .LVU3430 + 649:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 10612 .loc 1 649 24 is_stmt 0 view .LVU3431 + 10613 07e0 1A81 strh r2, [r3, #8] @ movhi + 650:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 10614 .loc 1 650 7 is_stmt 1 view .LVU3432 + 650:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 10615 .loc 1 650 24 is_stmt 0 view .LVU3433 + 10616 07e2 4FF47A72 mov r2, #1000 + 10617 07e6 1A81 strh r2, [r3, #8] @ movhi + 651:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 10618 .loc 1 651 7 is_stmt 1 view .LVU3434 + 651:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 10619 .loc 1 651 30 is_stmt 0 view .LVU3435 + 10620 07e8 2D4A ldr r2, .L535+60 + 10621 07ea 5A60 str r2, [r3, #4] + 652:Src/main.c **** + 10622 .loc 1 652 7 is_stmt 1 view .LVU3436 + 652:Src/main.c **** + 10623 .loc 1 652 29 is_stmt 0 view .LVU3437 + 10624 07ec 8022 movs r2, #128 + 10625 07ee 5A80 strh r2, [r3, #2] @ movhi + 654:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 10626 .loc 1 654 7 is_stmt 1 view .LVU3438 + 654:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 10627 .loc 1 654 17 is_stmt 0 view .LVU3439 + 10628 07f0 2C4B ldr r3, .L535+64 + 10629 07f2 42F21072 movw r2, #10000 + 10630 07f6 DA62 str r2, [r3, #44] + 656:Src/main.c **** if (st != HAL_OK) + ARM GAS /tmp/ccYgfTud.s page 585 - 9730 .loc 1 717 28 is_stmt 1 discriminator 1 view .LVU3197 - 9731 0960 0E2B cmp r3, #14 - 9732 0962 F1D9 bls .L417 - 9733 .LBE578: - 727:Src/main.c **** UART_transmission_request = NO_MESS; - 9734 .loc 1 727 5 view .LVU3198 - 9735 0964 1E20 movs r0, #30 - 9736 0966 FFF7FEFF bl USART_TX_DMA - 9737 .LVL768: - 728:Src/main.c **** break; - 9738 .loc 1 728 5 view .LVU3199 - 728:Src/main.c **** break; - 9739 .loc 1 728 31 is_stmt 0 view .LVU3200 - 9740 096a 2B4B ldr r3, .L438+68 - 9741 096c 0022 movs r2, #0 - 9742 096e 1A70 strb r2, [r3] - 729:Src/main.c **** case MESS_03://Transmith saved packet - 9743 .loc 1 729 4 is_stmt 1 view .LVU3201 - 9744 0970 FFF7D3BB b .L415 - 9745 .LVL769: - 9746 .L418: - 9747 .LBB579: - 733:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9748 .loc 1 733 6 view .LVU3202 - 733:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9749 .loc 1 733 33 is_stmt 0 view .LVU3203 - 9750 0974 214A ldr r2, .L438+40 - 9751 0976 32F81320 ldrh r2, [r2, r3, lsl #1] - 733:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9752 .loc 1 733 17 view .LVU3204 - 9753 097a 5900 lsls r1, r3, #1 - 733:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9754 .loc 1 733 21 view .LVU3205 - 9755 097c 2548 ldr r0, .L438+64 - 9756 097e 00F81320 strb r2, [r0, r3, lsl #1] - 734:Src/main.c **** } - 9757 .loc 1 734 6 is_stmt 1 view .LVU3206 - 734:Src/main.c **** } - 9758 .loc 1 734 19 is_stmt 0 view .LVU3207 - 9759 0982 0131 adds r1, r1, #1 - 734:Src/main.c **** } - 9760 .loc 1 734 23 view .LVU3208 - 9761 0984 120A lsrs r2, r2, #8 - 9762 0986 4254 strb r2, [r0, r1] - 731:Src/main.c **** { - 9763 .loc 1 731 38 is_stmt 1 discriminator 3 view .LVU3209 - 9764 0988 0133 adds r3, r3, #1 - 9765 .LVL770: - 731:Src/main.c **** { - 9766 .loc 1 731 38 is_stmt 0 discriminator 3 view .LVU3210 - 9767 098a 9BB2 uxth r3, r3 - 9768 .LVL771: - 9769 .L414: - 731:Src/main.c **** { - 9770 .loc 1 731 28 is_stmt 1 discriminator 1 view .LVU3211 - 9771 098c 0E2B cmp r3, #14 - 9772 098e F1D9 bls .L418 - ARM GAS /tmp/ccO46DoU.s page 560 + 10631 .loc 1 656 7 is_stmt 1 view .LVU3440 + 656:Src/main.c **** if (st != HAL_OK) + 10632 .loc 1 656 12 is_stmt 0 view .LVU3441 + 10633 07f8 2B48 ldr r0, .L535+68 + 10634 07fa FFF7FEFF bl HAL_TIM_Base_Start_IT + 10635 .LVL889: + 657:Src/main.c **** while(1); + 10636 .loc 1 657 7 is_stmt 1 view .LVU3442 + 657:Src/main.c **** while(1); + 10637 .loc 1 657 10 is_stmt 0 view .LVU3443 + 10638 07fe 78BB cbnz r0, .L497 + 662:Src/main.c **** uint32_t i = 10000; while (--i){} + 10639 .loc 1 662 7 is_stmt 1 view .LVU3444 + 10640 0800 0122 movs r2, #1 + 10641 0802 8021 movs r1, #128 + 10642 0804 1D48 ldr r0, .L535+24 + 10643 .LVL890: + 662:Src/main.c **** uint32_t i = 10000; while (--i){} + 10644 .loc 1 662 7 is_stmt 0 view .LVU3445 + 10645 0806 FFF7FEFF bl HAL_GPIO_WritePin + 10646 .LVL891: + 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 10647 .loc 1 663 7 is_stmt 1 view .LVU3446 + 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 10648 .loc 1 663 27 view .LVU3447 + 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 10649 .loc 1 663 16 is_stmt 0 view .LVU3448 + 10650 080a 42F21073 movw r3, #10000 + 10651 .LVL892: + 10652 .L498: + 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 10653 .loc 1 663 39 is_stmt 1 discriminator 2 view .LVU3449 + 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 10654 .loc 1 663 34 discriminator 2 view .LVU3450 + 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 10655 .loc 1 663 34 is_stmt 0 discriminator 2 view .LVU3451 + 10656 080e 013B subs r3, r3, #1 + 10657 .LVL893: + 663:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 10658 .loc 1 663 34 discriminator 2 view .LVU3452 + 10659 0810 FDD1 bne .L498 + 664:Src/main.c **** LD_blinker.state = 2; + 10660 .loc 1 664 7 is_stmt 1 view .LVU3453 + 10661 0812 0022 movs r2, #0 + 10662 0814 8021 movs r1, #128 + 10663 0816 1948 ldr r0, .L535+24 + 10664 0818 FFF7FEFF bl HAL_GPIO_WritePin + 10665 .LVL894: + 665:Src/main.c **** + 10666 .loc 1 665 7 view .LVU3454 + 665:Src/main.c **** + 10667 .loc 1 665 24 is_stmt 0 view .LVU3455 + 10668 081c 1F4B ldr r3, .L535+56 + 10669 081e 0222 movs r2, #2 + 10670 0820 9A72 strb r2, [r3, #10] + 667:Src/main.c **** if (st != HAL_OK) + 10671 .loc 1 667 7 is_stmt 1 view .LVU3456 + ARM GAS /tmp/ccYgfTud.s page 586 - 9773 .LBE579: - 740:Src/main.c **** UART_transmission_request = NO_MESS; - 9774 .loc 1 740 5 view .LVU3212 - 9775 0990 1E20 movs r0, #30 - 9776 0992 FFF7FEFF bl USART_TX_DMA - 9777 .LVL772: - 741:Src/main.c **** break; - 9778 .loc 1 741 5 view .LVU3213 - 741:Src/main.c **** break; - 9779 .loc 1 741 31 is_stmt 0 view .LVU3214 - 9780 0996 204B ldr r3, .L438+68 - 9781 0998 0022 movs r2, #0 - 9782 099a 1A70 strb r2, [r3] - 742:Src/main.c **** } - 9783 .loc 1 742 4 is_stmt 1 view .LVU3215 - 9784 099c FFF7BDBB b .L415 - 9785 .LVL773: - 9786 .L420: - 702:Src/main.c **** { - 9787 .loc 1 702 3 is_stmt 0 view .LVU3216 - 9788 09a0 0023 movs r3, #0 - 9789 09a2 F3E7 b .L414 - 9790 .L423: - 744:Src/main.c **** { - 9791 .loc 1 744 28 discriminator 1 view .LVU3217 - 9792 09a4 174B ldr r3, .L438+48 - 9793 09a6 1B68 ldr r3, [r3] - 9794 09a8 1C4A ldr r2, .L438+72 - 9795 09aa 1268 ldr r2, [r2] - 9796 09ac 9B1A subs r3, r3, r2 - 744:Src/main.c **** { - 9797 .loc 1 744 21 discriminator 1 view .LVU3218 - 9798 09ae 642B cmp r3, #100 - 9799 09b0 7FF6B8AB bls .L368 - 746:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 9800 .loc 1 746 4 is_stmt 1 view .LVU3219 - 746:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 9801 .loc 1 746 18 is_stmt 0 view .LVU3220 - 9802 09b4 0022 movs r2, #0 - 9803 09b6 1A4B ldr r3, .L438+76 - 9804 09b8 1A80 strh r2, [r3] @ movhi - 747:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 9805 .loc 1 747 4 is_stmt 1 view .LVU3221 - 747:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 9806 .loc 1 747 14 is_stmt 0 view .LVU3222 - 9807 09ba 1A49 ldr r1, .L438+80 - 9808 09bc 0B78 ldrb r3, [r1] @ zero_extendqisi2 - 747:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 9809 .loc 1 747 18 view .LVU3223 - 9810 09be 43F00203 orr r3, r3, #2 - 9811 09c2 0B70 strb r3, [r1] - 748:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 9812 .loc 1 748 4 is_stmt 1 view .LVU3224 - 748:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 9813 .loc 1 748 30 is_stmt 0 view .LVU3225 - 9814 09c4 144B ldr r3, .L438+68 - 9815 09c6 0121 movs r1, #1 - ARM GAS /tmp/ccO46DoU.s page 561 + 667:Src/main.c **** if (st != HAL_OK) + 10672 .loc 1 667 12 is_stmt 0 view .LVU3457 + 10673 0822 1748 ldr r0, .L535+28 + 10674 0824 FFF7FEFF bl HAL_TIM_Base_Start_IT + 10675 .LVL895: + 668:Src/main.c **** while(1); + 10676 .loc 1 668 7 is_stmt 1 view .LVU3458 + 668:Src/main.c **** while(1); + 10677 .loc 1 668 10 is_stmt 0 view .LVU3459 + 10678 0828 D8B9 cbnz r0, .L500 + 10679 .L501: + 670:Src/main.c **** { + 10680 .loc 1 670 33 is_stmt 1 view .LVU3460 + 670:Src/main.c **** { + 10681 .loc 1 670 18 is_stmt 0 view .LVU3461 + 10682 082a 0E4B ldr r3, .L535 + 10683 082c D3ED047A vldr.32 s15, [r3, #16] + 670:Src/main.c **** { + 10684 .loc 1 670 39 view .LVU3462 + 10685 0830 93ED027A vldr.32 s14, [r3, #8] + 670:Src/main.c **** { + 10686 .loc 1 670 33 view .LVU3463 + 10687 0834 F4EEC77A vcmpe.f32 s15, s14 + 10688 0838 F1EE10FA vmrs APSR_nzcv, FPSCR + 10689 083c 3CD5 bpl .L530 + 672:Src/main.c **** { + 10690 .loc 1 672 8 is_stmt 1 view .LVU3464 + 672:Src/main.c **** { + 10691 .loc 1 672 12 is_stmt 0 view .LVU3465 + 10692 083e 134B ldr r3, .L535+40 + 10693 0840 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 672:Src/main.c **** { + 10694 .loc 1 672 11 view .LVU3466 + 10695 0842 002B cmp r3, #0 + 10696 0844 F1D0 beq .L501 + 677:Src/main.c **** TO10 = 0; + 10697 .loc 1 677 9 is_stmt 1 view .LVU3467 + 677:Src/main.c **** TO10 = 0; + 10698 .loc 1 677 35 is_stmt 0 view .LVU3468 + 10699 0846 074B ldr r3, .L535 + 10700 0848 93ED037A vldr.32 s14, [r3, #12] + 677:Src/main.c **** TO10 = 0; + 10701 .loc 1 677 28 view .LVU3469 + 10702 084c 77EE277A vadd.f32 s15, s14, s15 + 10703 0850 C3ED047A vstr.32 s15, [r3, #16] + 678:Src/main.c **** TIM10_coflag = 0; + 10704 .loc 1 678 9 is_stmt 1 view .LVU3470 + 678:Src/main.c **** TIM10_coflag = 0; + 10705 .loc 1 678 14 is_stmt 0 view .LVU3471 + 10706 0854 0023 movs r3, #0 + 10707 0856 0E4A ldr r2, .L535+44 + 10708 0858 1360 str r3, [r2] + 679:Src/main.c **** + 10709 .loc 1 679 9 is_stmt 1 view .LVU3472 + 679:Src/main.c **** + 10710 .loc 1 679 22 is_stmt 0 view .LVU3473 + 10711 085a 0C4A ldr r2, .L535+40 + ARM GAS /tmp/ccYgfTud.s page 587 - 9816 09c8 1970 strb r1, [r3] - 749:Src/main.c **** } - 9817 .loc 1 749 4 is_stmt 1 view .LVU3226 - 749:Src/main.c **** } - 9818 .loc 1 749 12 is_stmt 0 view .LVU3227 - 9819 09ca 174B ldr r3, .L438+84 - 9820 09cc 1A70 strb r2, [r3] - 9821 09ce FFF7A9BB b .L368 - 9822 .L439: - 9823 09d2 00BF .align 2 - 9824 .L438: - 9825 09d4 00000000 .word htim10 - 9826 09d8 000C0240 .word 1073875968 - 9827 09dc 00000000 .word htim8 - 9828 09e0 00040140 .word 1073808384 - 9829 09e4 00000000 .word task - 9830 09e8 00000000 .word TIM10_period - 9831 09ec 00000000 .word TO10_counter - 9832 09f0 00000000 .word TO7_before - 9833 09f4 00000000 .word LD1_param - 9834 09f8 00000000 .word LD2_param - 9835 09fc 00000000 .word Long_Data - 9836 0a00 00000000 .word temp16 - 9837 0a04 00000000 .word TO6 - 9838 0a08 00000000 .word TO6_stop - 9839 0a0c 02000000 .word Long_Data+2 - 9840 0a10 00000000 .word CS_result - 9841 0a14 00000000 .word UART_DATA - 9842 0a18 00000000 .word UART_transmission_request - 9843 0a1c 00000000 .word TO6_uart - 9844 0a20 00000000 .word UART_rec_incr - 9845 0a24 00000000 .word State_Data - 9846 0a28 00000000 .word flg_tmt - 9847 .cfi_endproc - 9848 .LFE1186: - 9850 .global task - 9851 .section .bss.task,"aw",%nobits - 9852 .align 2 - 9855 task: - 9856 0000 00000000 .space 52 - 9856 00000000 - 9856 00000000 - 9856 00000000 - 9856 00000000 - 9857 .global LD_blinker - 9858 .section .bss.LD_blinker,"aw",%nobits - 9859 .align 2 - 9862 LD_blinker: - 9863 0000 00000000 .space 12 - 9863 00000000 - 9863 00000000 - 9864 .global LD2_param - 9865 .section .bss.LD2_param,"aw",%nobits - 9866 .align 2 - 9869 LD2_param: - 9870 0000 00000000 .space 12 - 9870 00000000 - ARM GAS /tmp/ccO46DoU.s page 562 + 10712 085c 1370 strb r3, [r2] + 10713 085e E4E7 b .L501 + 10714 .LVL896: + 10715 .L497: + 658:Src/main.c **** // */ + 10716 .loc 1 658 8 is_stmt 1 view .LVU3474 + 658:Src/main.c **** // */ + 10717 .loc 1 658 13 view .LVU3475 + 10718 0860 FEE7 b .L497 + 10719 .LVL897: + 10720 .L500: + 669:Src/main.c **** while (task.current_param < task.max_param) + 10721 .loc 1 669 8 view .LVU3476 + 669:Src/main.c **** while (task.current_param < task.max_param) + 10722 .loc 1 669 13 view .LVU3477 + 10723 0862 FEE7 b .L500 + 10724 .L536: + 10725 .align 2 + 10726 .L535: + 10727 0864 00000000 .word task + 10728 0868 00000000 .word LD1_param + 10729 086c 00000000 .word LD2_param + 10730 0870 00000000 .word LD1_curr_setup + 10731 0874 00000000 .word temp16 + 10732 0878 00000000 .word LD2_curr_setup + 10733 087c 000C0240 .word 1073875968 + 10734 0880 00000000 .word htim10 + 10735 0884 00480140 .word 1073825792 + 10736 0888 00080040 .word 1073743872 + 10737 088c 00000000 .word TIM10_coflag + 10738 0890 00000000 .word TO10 + 10739 0894 00000000 .word TIM10_period + 10740 0898 00000000 .word TO10_counter + 10741 089c 00000000 .word LD_blinker + 10742 08a0 00040240 .word 1073873920 + 10743 08a4 00040140 .word 1073808384 + 10744 08a8 00000000 .word htim8 + 10745 08ac 00000000 .word htim11 + 10746 08b0 00000000 .word htim4 + 10747 08b4 00180240 .word 1073879040 + 10748 .L530: + 684:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 10749 .loc 1 684 7 view .LVU3478 + 10750 08b8 6C48 ldr r0, .L537 + 10751 .LVL898: + 684:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 10752 .loc 1 684 7 is_stmt 0 view .LVU3479 + 10753 08ba FFF7FEFF bl HAL_TIM_Base_Stop + 10754 .LVL899: + 685:Src/main.c **** + 10755 .loc 1 685 7 is_stmt 1 view .LVU3480 + 10756 08be 6C4C ldr r4, .L537+4 + 10757 08c0 0122 movs r2, #1 + 10758 08c2 8021 movs r1, #128 + 10759 08c4 2046 mov r0, r4 + 10760 08c6 FFF7FEFF bl HAL_GPIO_WritePin + 10761 .LVL900: + ARM GAS /tmp/ccYgfTud.s page 588 - 9870 00000000 - 9871 .global LD1_param - 9872 .section .bss.LD1_param,"aw",%nobits - 9873 .align 2 - 9876 LD1_param: - 9877 0000 00000000 .space 12 - 9877 00000000 - 9877 00000000 - 9878 .global Def_setup - 9879 .section .bss.Def_setup,"aw",%nobits - 9880 .align 2 - 9883 Def_setup: - 9884 0000 00000000 .space 18 - 9884 00000000 - 9884 00000000 - 9884 00000000 - 9884 0000 - 9885 .global Curr_setup - 9886 .section .bss.Curr_setup,"aw",%nobits - 9887 .align 2 - 9890 Curr_setup: - 9891 0000 00000000 .space 18 - 9891 00000000 - 9891 00000000 - 9891 00000000 - 9891 0000 - 9892 .global LD2_def_setup - 9893 .section .bss.LD2_def_setup,"aw",%nobits - 9894 .align 2 - 9897 LD2_def_setup: - 9898 0000 00000000 .space 16 - 9898 00000000 - 9898 00000000 - 9898 00000000 - 9899 .global LD1_def_setup - 9900 .section .bss.LD1_def_setup,"aw",%nobits - 9901 .align 2 - 9904 LD1_def_setup: - 9905 0000 00000000 .space 16 - 9905 00000000 - 9905 00000000 - 9905 00000000 - 9906 .global LD2_curr_setup - 9907 .section .bss.LD2_curr_setup,"aw",%nobits - 9908 .align 2 - 9911 LD2_curr_setup: - 9912 0000 00000000 .space 16 - 9912 00000000 - 9912 00000000 - 9912 00000000 - 9913 .global LD1_curr_setup - 9914 .section .bss.LD1_curr_setup,"aw",%nobits - 9915 .align 2 - 9918 LD1_curr_setup: - 9919 0000 00000000 .space 16 - 9919 00000000 - 9919 00000000 - ARM GAS /tmp/ccO46DoU.s page 563 + 687:Src/main.c **** + 10762 .loc 1 687 7 view .LVU3481 + 10763 08ca 0022 movs r2, #0 + 10764 08cc 8021 movs r1, #128 + 10765 08ce 2046 mov r0, r4 + 10766 08d0 FFF7FEFF bl HAL_GPIO_WritePin + 10767 .LVL901: + 689:Src/main.c **** TIM8->CNT = 0; + 10768 .loc 1 689 7 view .LVU3482 + 10769 08d4 6748 ldr r0, .L537+8 + 10770 08d6 FFF7FEFF bl HAL_TIM_Base_Stop_IT + 10771 .LVL902: + 690:Src/main.c **** + 10772 .loc 1 690 7 view .LVU3483 + 690:Src/main.c **** + 10773 .loc 1 690 17 is_stmt 0 view .LVU3484 + 10774 08da 674B ldr r3, .L537+12 + 10775 08dc 0022 movs r2, #0 + 10776 08de 5A62 str r2, [r3, #36] + 692:Src/main.c **** task.current_param = task.min_param; + 10777 .loc 1 692 7 is_stmt 1 view .LVU3485 + 10778 08e0 FFF7FEFF bl Stop_TIM10 + 10779 .LVL903: + 693:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 10780 .loc 1 693 7 view .LVU3486 + 693:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 10781 .loc 1 693 32 is_stmt 0 view .LVU3487 + 10782 08e4 654C ldr r4, .L537+16 + 10783 08e6 D4ED017A vldr.32 s15, [r4, #4] + 693:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 10784 .loc 1 693 26 view .LVU3488 + 10785 08ea C4ED047A vstr.32 s15, [r4, #16] + 694:Src/main.c **** if (task.tau > 3) + 10786 .loc 1 694 7 is_stmt 1 view .LVU3489 + 10787 08ee FCEEE77A vcvt.u32.f32 s15, s15 + 10788 08f2 17EE903A vmov r3, s15 @ int + 10789 08f6 99B2 uxth r1, r3 + 10790 08f8 0220 movs r0, #2 + 10791 08fa FFF7FEFF bl Set_LTEC + 10792 .LVL904: + 695:Src/main.c **** { + 10793 .loc 1 695 7 view .LVU3490 + 695:Src/main.c **** { + 10794 .loc 1 695 15 is_stmt 0 view .LVU3491 + 10795 08fe E38A ldrh r3, [r4, #22] + 695:Src/main.c **** { + 10796 .loc 1 695 10 view .LVU3492 + 10797 0900 032B cmp r3, #3 + 10798 0902 0CD9 bls .L503 + 697:Src/main.c **** htim10.Init.Period = 9999; + 10799 .loc 1 697 8 is_stmt 1 view .LVU3493 + 697:Src/main.c **** htim10.Init.Period = 9999; + 10800 .loc 1 697 34 is_stmt 0 view .LVU3494 + 10801 0904 594A ldr r2, .L537 + 10802 0906 D068 ldr r0, [r2, #12] + 697:Src/main.c **** htim10.Init.Period = 9999; + 10803 .loc 1 697 21 view .LVU3495 + ARM GAS /tmp/ccYgfTud.s page 589 - 9919 00000000 - 9920 .global sizeoffile - 9921 .section .bss.sizeoffile,"aw",%nobits - 9922 .align 2 - 9925 sizeoffile: - 9926 0000 00000000 .space 4 - 9927 .global fgoto - 9928 .section .bss.fgoto,"aw",%nobits - 9929 .align 2 - 9932 fgoto: - 9933 0000 00000000 .space 4 - 9934 .global test - 9935 .section .bss.test,"aw",%nobits - 9936 .align 2 - 9939 test: - 9940 0000 00000000 .space 4 - 9941 .global fresult - 9942 .section .bss.fresult,"aw",%nobits - 9945 fresult: - 9946 0000 00 .space 1 - 9947 .global COMMAND - 9948 .section .bss.COMMAND,"aw",%nobits - 9949 .align 2 - 9952 COMMAND: - 9953 0000 00000000 .space 30 - 9953 00000000 - 9953 00000000 - 9953 00000000 - 9953 00000000 - 9954 .global Long_Data - 9955 .section .bss.Long_Data,"aw",%nobits - 9956 .align 2 - 9959 Long_Data: - 9960 0000 00000000 .space 30 - 9960 00000000 - 9960 00000000 - 9960 00000000 - 9960 00000000 - 9961 .global temp16 - 9962 .section .bss.temp16,"aw",%nobits - 9963 .align 1 - 9966 temp16: - 9967 0000 0000 .space 2 - 9968 .global CS_result - 9969 .section .bss.CS_result,"aw",%nobits - 9970 .align 1 - 9973 CS_result: - 9974 0000 0000 .space 2 - 9975 .global UART_header - 9976 .section .bss.UART_header,"aw",%nobits - 9977 .align 1 - 9980 UART_header: - 9981 0000 0000 .space 2 - 9982 .global UART_rec_incr - 9983 .section .bss.UART_rec_incr,"aw",%nobits - 9984 .align 1 - 9987 UART_rec_incr: - ARM GAS /tmp/ccO46DoU.s page 564 + 10804 0908 5D49 ldr r1, .L537+20 + 10805 090a 0860 str r0, [r1] + 698:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 10806 .loc 1 698 8 is_stmt 1 view .LVU3496 + 698:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 10807 .loc 1 698 27 is_stmt 0 view .LVU3497 + 10808 090c 42F20F71 movw r1, #9999 + 10809 0910 D160 str r1, [r2, #12] + 699:Src/main.c **** } + 10810 .loc 1 699 8 is_stmt 1 view .LVU3498 + 699:Src/main.c **** } + 10811 .loc 1 699 33 is_stmt 0 view .LVU3499 + 10812 0912 013B subs r3, r3, #1 + 699:Src/main.c **** } + 10813 .loc 1 699 38 view .LVU3500 + 10814 0914 6422 movs r2, #100 + 10815 0916 02FB03F3 mul r3, r2, r3 + 699:Src/main.c **** } + 10816 .loc 1 699 21 view .LVU3501 + 10817 091a 5A4A ldr r2, .L537+24 + 10818 091c 1360 str r3, [r2] + 10819 .L503: + 701:Src/main.c **** + 10820 .loc 1 701 7 is_stmt 1 view .LVU3502 + 10821 091e 5348 ldr r0, .L537 + 10822 0920 FFF7FEFF bl HAL_TIM_Base_Start_IT + 10823 .LVL905: + 749:Src/main.c **** case TT_CHANGE_TEMP_1: + 10824 .loc 1 749 6 view .LVU3503 + 10825 0924 F1E5 b .L488 + 10826 .LVL906: + 10827 .L527: + 749:Src/main.c **** case TT_CHANGE_TEMP_1: + 10828 .loc 1 749 6 is_stmt 0 view .LVU3504 + 10829 .LBE651: + 760:Src/main.c **** + 10830 .loc 1 760 7 is_stmt 1 view .LVU3505 + 760:Src/main.c **** + 10831 .loc 1 760 18 is_stmt 0 view .LVU3506 + 10832 0926 584A ldr r2, .L537+28 + 10833 0928 1360 str r3, [r2] + 762:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 10834 .loc 1 762 7 is_stmt 1 view .LVU3507 + 762:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 10835 .loc 1 762 25 is_stmt 0 view .LVU3508 + 10836 092a 0120 movs r0, #1 + 10837 092c FFF7FEFF bl MPhD_T + 10838 .LVL907: + 762:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 10839 .loc 1 762 23 discriminator 1 view .LVU3509 + 10840 0930 564E ldr r6, .L537+32 + 10841 0932 3081 strh r0, [r6, #8] @ movhi + 763:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10842 .loc 1 763 7 is_stmt 1 view .LVU3510 + 763:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10843 .loc 1 763 25 is_stmt 0 view .LVU3511 + 10844 0934 0120 movs r0, #1 + ARM GAS /tmp/ccYgfTud.s page 590 - 9988 0000 0000 .space 2 - 9989 .global TIM10_coflag - 9990 .section .bss.TIM10_coflag,"aw",%nobits - 9993 TIM10_coflag: - 9994 0000 00 .space 1 - 9995 .global u_rx_flg - 9996 .section .bss.u_rx_flg,"aw",%nobits - 9999 u_rx_flg: - 10000 0000 00 .space 1 - 10001 .global u_tx_flg - 10002 .section .bss.u_tx_flg,"aw",%nobits - 10005 u_tx_flg: - 10006 0000 00 .space 1 - 10007 .global flg_tmt - 10008 .section .bss.flg_tmt,"aw",%nobits - 10011 flg_tmt: - 10012 0000 00 .space 1 - 10013 .global UART_DATA - 10014 .section .bss.UART_DATA,"aw",%nobits - 10015 .align 2 - 10018 UART_DATA: - 10019 0000 00000000 .space 30 - 10019 00000000 - 10019 00000000 - 10019 00000000 - 10019 00000000 - 10020 .global State_Data - 10021 .section .bss.State_Data,"aw",%nobits - 10022 .align 2 - 10025 State_Data: - 10026 0000 0000 .space 2 - 10027 .global UART_transmission_request - 10028 .section .bss.UART_transmission_request,"aw",%nobits - 10031 UART_transmission_request: - 10032 0000 00 .space 1 - 10033 .global CPU_state_old - 10034 .section .bss.CPU_state_old,"aw",%nobits - 10037 CPU_state_old: - 10038 0000 00 .space 1 - 10039 .global CPU_state - 10040 .section .bss.CPU_state,"aw",%nobits - 10043 CPU_state: - 10044 0000 00 .space 1 - 10045 .global uart_buf - 10046 .section .bss.uart_buf,"aw",%nobits - 10049 uart_buf: - 10050 0000 00 .space 1 - 10051 .global TIM10_period - 10052 .section .bss.TIM10_period,"aw",%nobits - 10053 .align 2 - 10056 TIM10_period: - 10057 0000 00000000 .space 4 - 10058 .global TO10_counter - 10059 .section .bss.TO10_counter,"aw",%nobits - 10060 .align 2 - 10063 TO10_counter: - 10064 0000 00000000 .space 4 - ARM GAS /tmp/ccO46DoU.s page 565 + 10845 0936 FFF7FEFF bl MPhD_T + 10846 .LVL908: + 763:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10847 .loc 1 763 23 discriminator 1 view .LVU3512 + 10848 093a 3081 strh r0, [r6, #8] @ movhi + 764:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10849 .loc 1 764 7 is_stmt 1 view .LVU3513 + 764:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10850 .loc 1 764 25 is_stmt 0 view .LVU3514 + 10851 093c 0220 movs r0, #2 + 10852 093e FFF7FEFF bl MPhD_T + 10853 .LVL909: + 764:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 10854 .loc 1 764 23 discriminator 1 view .LVU3515 + 10855 0942 534F ldr r7, .L537+36 + 10856 0944 3881 strh r0, [r7, #8] @ movhi + 765:Src/main.c **** + 10857 .loc 1 765 7 is_stmt 1 view .LVU3516 + 765:Src/main.c **** + 10858 .loc 1 765 25 is_stmt 0 view .LVU3517 + 10859 0946 0220 movs r0, #2 + 10860 0948 FFF7FEFF bl MPhD_T + 10861 .LVL910: + 765:Src/main.c **** + 10862 .loc 1 765 23 discriminator 1 view .LVU3518 + 10863 094c 3881 strh r0, [r7, #8] @ movhi + 767:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 10864 .loc 1 767 7 is_stmt 1 view .LVU3519 + 767:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 10865 .loc 1 767 31 is_stmt 0 view .LVU3520 + 10866 094e 3389 ldrh r3, [r6, #8] + 767:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 10867 .loc 1 767 20 view .LVU3521 + 10868 0950 504C ldr r4, .L537+40 + 10869 0952 6380 strh r3, [r4, #2] @ movhi + 768:Src/main.c **** + 10870 .loc 1 768 7 is_stmt 1 view .LVU3522 + 768:Src/main.c **** + 10871 .loc 1 768 20 is_stmt 0 view .LVU3523 + 10872 0954 A080 strh r0, [r4, #4] @ movhi + 772:Src/main.c **** temp16 = Get_ADC(1); + 10873 .loc 1 772 7 is_stmt 1 view .LVU3524 + 772:Src/main.c **** temp16 = Get_ADC(1); + 10874 .loc 1 772 16 is_stmt 0 view .LVU3525 + 10875 0956 0020 movs r0, #0 + 10876 0958 FFF7FEFF bl Get_ADC + 10877 .LVL911: + 772:Src/main.c **** temp16 = Get_ADC(1); + 10878 .loc 1 772 14 discriminator 1 view .LVU3526 + 10879 095c 4E4D ldr r5, .L537+44 + 10880 095e 2880 strh r0, [r5] @ movhi + 773:Src/main.c **** Long_Data[7] = temp16; + 10881 .loc 1 773 7 is_stmt 1 view .LVU3527 + 773:Src/main.c **** Long_Data[7] = temp16; + 10882 .loc 1 773 16 is_stmt 0 view .LVU3528 + 10883 0960 0120 movs r0, #1 + 10884 0962 FFF7FEFF bl Get_ADC + ARM GAS /tmp/ccYgfTud.s page 591 - 10065 .global TO10 - 10066 .section .bss.TO10,"aw",%nobits - 10067 .align 2 - 10070 TO10: - 10071 0000 00000000 .space 4 - 10072 .global TO7_PID - 10073 .section .bss.TO7_PID,"aw",%nobits - 10074 .align 2 - 10077 TO7_PID: - 10078 0000 00000000 .space 4 - 10079 .global TO7_before - 10080 .section .bss.TO7_before,"aw",%nobits - 10081 .align 2 - 10084 TO7_before: - 10085 0000 00000000 .space 4 - 10086 .global TO7 - 10087 .section .bss.TO7,"aw",%nobits - 10088 .align 2 - 10091 TO7: - 10092 0000 00000000 .space 4 - 10093 .global temp32 - 10094 .section .bss.temp32,"aw",%nobits - 10095 .align 2 - 10098 temp32: - 10099 0000 00000000 .space 4 - 10100 .global SD_SLIDE - 10101 .section .bss.SD_SLIDE,"aw",%nobits - 10102 .align 2 - 10105 SD_SLIDE: - 10106 0000 00000000 .space 4 - 10107 .global SD_SEEK - 10108 .section .bss.SD_SEEK,"aw",%nobits - 10109 .align 2 - 10112 SD_SEEK: - 10113 0000 00000000 .space 4 - 10114 .global TO6_uart - 10115 .section .bss.TO6_uart,"aw",%nobits - 10116 .align 2 - 10119 TO6_uart: - 10120 0000 00000000 .space 4 - 10121 .global TO6_stop - 10122 .section .bss.TO6_stop,"aw",%nobits - 10123 .align 2 - 10126 TO6_stop: - 10127 0000 00000000 .space 4 - 10128 .global TO6_before - 10129 .section .bss.TO6_before,"aw",%nobits - 10130 .align 2 - 10133 TO6_before: - 10134 0000 00000000 .space 4 - 10135 .global TO6 - 10136 .section .bss.TO6,"aw",%nobits - 10137 .align 2 - 10140 TO6: - 10141 0000 00000000 .space 4 - 10142 .global huart8 - 10143 .section .bss.huart8,"aw",%nobits - ARM GAS /tmp/ccO46DoU.s page 566 + 10885 .LVL912: + 773:Src/main.c **** Long_Data[7] = temp16; + 10886 .loc 1 773 14 discriminator 1 view .LVU3529 + 10887 0966 2880 strh r0, [r5] @ movhi + 774:Src/main.c **** + 10888 .loc 1 774 7 is_stmt 1 view .LVU3530 + 774:Src/main.c **** + 10889 .loc 1 774 20 is_stmt 0 view .LVU3531 + 10890 0968 E081 strh r0, [r4, #14] @ movhi + 777:Src/main.c **** Long_Data[8] = temp16; + 10891 .loc 1 777 7 is_stmt 1 view .LVU3532 + 777:Src/main.c **** Long_Data[8] = temp16; + 10892 .loc 1 777 16 is_stmt 0 view .LVU3533 + 10893 096a 0120 movs r0, #1 + 10894 096c FFF7FEFF bl Get_ADC + 10895 .LVL913: + 777:Src/main.c **** Long_Data[8] = temp16; + 10896 .loc 1 777 14 discriminator 1 view .LVU3534 + 10897 0970 2880 strh r0, [r5] @ movhi + 778:Src/main.c **** + 10898 .loc 1 778 7 is_stmt 1 view .LVU3535 + 778:Src/main.c **** + 10899 .loc 1 778 20 is_stmt 0 view .LVU3536 + 10900 0972 2082 strh r0, [r4, #16] @ movhi + 781:Src/main.c **** Long_Data[9] = temp16; + 10901 .loc 1 781 7 is_stmt 1 view .LVU3537 + 781:Src/main.c **** Long_Data[9] = temp16; + 10902 .loc 1 781 16 is_stmt 0 view .LVU3538 + 10903 0974 0120 movs r0, #1 + 10904 0976 FFF7FEFF bl Get_ADC + 10905 .LVL914: + 781:Src/main.c **** Long_Data[9] = temp16; + 10906 .loc 1 781 14 discriminator 1 view .LVU3539 + 10907 097a 2880 strh r0, [r5] @ movhi + 782:Src/main.c **** + 10908 .loc 1 782 7 is_stmt 1 view .LVU3540 + 782:Src/main.c **** + 10909 .loc 1 782 20 is_stmt 0 view .LVU3541 + 10910 097c 6082 strh r0, [r4, #18] @ movhi + 785:Src/main.c **** Long_Data[10] = temp16; + 10911 .loc 1 785 7 is_stmt 1 view .LVU3542 + 785:Src/main.c **** Long_Data[10] = temp16; + 10912 .loc 1 785 16 is_stmt 0 view .LVU3543 + 10913 097e 0120 movs r0, #1 + 10914 0980 FFF7FEFF bl Get_ADC + 10915 .LVL915: + 785:Src/main.c **** Long_Data[10] = temp16; + 10916 .loc 1 785 14 discriminator 1 view .LVU3544 + 10917 0984 2880 strh r0, [r5] @ movhi + 786:Src/main.c **** + 10918 .loc 1 786 7 is_stmt 1 view .LVU3545 + 786:Src/main.c **** + 10919 .loc 1 786 21 is_stmt 0 view .LVU3546 + 10920 0986 A082 strh r0, [r4, #20] @ movhi + 789:Src/main.c **** Long_Data[11] = temp16; + 10921 .loc 1 789 7 is_stmt 1 view .LVU3547 + 789:Src/main.c **** Long_Data[11] = temp16; + ARM GAS /tmp/ccYgfTud.s page 592 - 10144 .align 2 - 10147 huart8: - 10148 0000 00000000 .space 136 - 10148 00000000 - 10148 00000000 - 10148 00000000 - 10148 00000000 - 10149 .global htim11 - 10150 .section .bss.htim11,"aw",%nobits - 10151 .align 2 - 10154 htim11: - 10155 0000 00000000 .space 76 - 10155 00000000 - 10155 00000000 - 10155 00000000 - 10155 00000000 - 10156 .global htim10 - 10157 .section .bss.htim10,"aw",%nobits - 10158 .align 2 - 10161 htim10: - 10162 0000 00000000 .space 76 - 10162 00000000 - 10162 00000000 - 10162 00000000 - 10162 00000000 - 10163 .global htim8 - 10164 .section .bss.htim8,"aw",%nobits - 10165 .align 2 - 10168 htim8: - 10169 0000 00000000 .space 76 - 10169 00000000 - 10169 00000000 - 10169 00000000 - 10169 00000000 - 10170 .global htim4 - 10171 .section .bss.htim4,"aw",%nobits - 10172 .align 2 - 10175 htim4: - 10176 0000 00000000 .space 76 - 10176 00000000 - 10176 00000000 - 10176 00000000 - 10176 00000000 - 10177 .global hsd1 - 10178 .section .bss.hsd1,"aw",%nobits - 10179 .align 2 - 10182 hsd1: - 10183 0000 00000000 .space 132 - 10183 00000000 - 10183 00000000 - 10183 00000000 - 10183 00000000 - 10184 .global hadc3 - 10185 .section .bss.hadc3,"aw",%nobits - 10186 .align 2 - 10189 hadc3: - 10190 0000 00000000 .space 72 - ARM GAS /tmp/ccO46DoU.s page 567 + 10922 .loc 1 789 16 is_stmt 0 view .LVU3548 + 10923 0988 0120 movs r0, #1 + 10924 098a FFF7FEFF bl Get_ADC + 10925 .LVL916: + 789:Src/main.c **** Long_Data[11] = temp16; + 10926 .loc 1 789 14 discriminator 1 view .LVU3549 + 10927 098e 2880 strh r0, [r5] @ movhi + 790:Src/main.c **** temp16 = Get_ADC(2); + 10928 .loc 1 790 7 is_stmt 1 view .LVU3550 + 790:Src/main.c **** temp16 = Get_ADC(2); + 10929 .loc 1 790 21 is_stmt 0 view .LVU3551 + 10930 0990 E082 strh r0, [r4, #22] @ movhi + 791:Src/main.c **** + 10931 .loc 1 791 7 is_stmt 1 view .LVU3552 + 791:Src/main.c **** + 10932 .loc 1 791 16 is_stmt 0 view .LVU3553 + 10933 0992 0220 movs r0, #2 + 10934 0994 FFF7FEFF bl Get_ADC + 10935 .LVL917: + 791:Src/main.c **** + 10936 .loc 1 791 14 discriminator 1 view .LVU3554 + 10937 0998 2880 strh r0, [r5] @ movhi + 794:Src/main.c **** temp16 = Get_ADC(4); + 10938 .loc 1 794 7 is_stmt 1 view .LVU3555 + 794:Src/main.c **** temp16 = Get_ADC(4); + 10939 .loc 1 794 16 is_stmt 0 view .LVU3556 + 10940 099a 0320 movs r0, #3 + 10941 099c FFF7FEFF bl Get_ADC + 10942 .LVL918: + 794:Src/main.c **** temp16 = Get_ADC(4); + 10943 .loc 1 794 14 discriminator 1 view .LVU3557 + 10944 09a0 2880 strh r0, [r5] @ movhi + 795:Src/main.c **** Long_Data[12] = temp16; + 10945 .loc 1 795 7 is_stmt 1 view .LVU3558 + 795:Src/main.c **** Long_Data[12] = temp16; + 10946 .loc 1 795 16 is_stmt 0 view .LVU3559 + 10947 09a2 0420 movs r0, #4 + 10948 09a4 FFF7FEFF bl Get_ADC + 10949 .LVL919: + 795:Src/main.c **** Long_Data[12] = temp16; + 10950 .loc 1 795 14 discriminator 1 view .LVU3560 + 10951 09a8 2880 strh r0, [r5] @ movhi + 796:Src/main.c **** temp16 = Get_ADC(5); + 10952 .loc 1 796 7 is_stmt 1 view .LVU3561 + 796:Src/main.c **** temp16 = Get_ADC(5); + 10953 .loc 1 796 21 is_stmt 0 view .LVU3562 + 10954 09aa 2083 strh r0, [r4, #24] @ movhi + 797:Src/main.c **** + 10955 .loc 1 797 7 is_stmt 1 view .LVU3563 + 797:Src/main.c **** + 10956 .loc 1 797 16 is_stmt 0 view .LVU3564 + 10957 09ac 0520 movs r0, #5 + 10958 09ae FFF7FEFF bl Get_ADC + 10959 .LVL920: + 797:Src/main.c **** + 10960 .loc 1 797 14 discriminator 1 view .LVU3565 + 10961 09b2 2880 strh r0, [r5] @ movhi + ARM GAS /tmp/ccYgfTud.s page 593 - 10190 00000000 - 10190 00000000 - 10190 00000000 - 10190 00000000 - 10191 .global hadc1 - 10192 .section .bss.hadc1,"aw",%nobits - 10193 .align 2 - 10196 hadc1: - 10197 0000 00000000 .space 72 - 10197 00000000 - 10197 00000000 - 10197 00000000 - 10197 00000000 - 10198 .text - 10199 .Letext0: - 10200 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" - 10201 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 10202 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - 10203 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" - 10204 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" - 10205 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" - 10206 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" - 10207 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" - 10208 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" - 10209 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" - 10210 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" - 10211 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" - 10212 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" - 10213 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - 10214 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h" - 10215 .file 24 "Inc/main.h" - 10216 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h" - 10217 .file 26 "Inc/File_Handling.h" - 10218 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" - 10219 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h" - 10220 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - 10221 .file 30 "Inc/fatfs.h" - 10222 .file 31 "" - ARM GAS /tmp/ccO46DoU.s page 568 + 800:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 10962 .loc 1 800 7 is_stmt 1 view .LVU3566 + 800:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 10963 .loc 1 800 16 is_stmt 0 view .LVU3567 + 10964 09b4 394B ldr r3, .L537+48 + 10965 09b6 1B68 ldr r3, [r3] + 10966 09b8 394A ldr r2, .L537+52 + 10967 09ba 1360 str r3, [r2] + 801:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 10968 .loc 1 801 7 is_stmt 1 view .LVU3568 + 801:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 10969 .loc 1 801 20 is_stmt 0 view .LVU3569 + 10970 09bc E380 strh r3, [r4, #6] @ movhi + 802:Src/main.c **** + 10971 .loc 1 802 7 is_stmt 1 view .LVU3570 + 802:Src/main.c **** + 10972 .loc 1 802 31 is_stmt 0 view .LVU3571 + 10973 09be 1B0C lsrs r3, r3, #16 + 802:Src/main.c **** + 10974 .loc 1 802 20 view .LVU3572 + 10975 09c0 2381 strh r3, [r4, #8] @ movhi + 805:Src/main.c **** + 10976 .loc 1 805 7 is_stmt 1 view .LVU3573 + 805:Src/main.c **** + 10977 .loc 1 805 31 is_stmt 0 view .LVU3574 + 10978 09c2 3388 ldrh r3, [r6] + 805:Src/main.c **** + 10979 .loc 1 805 20 view .LVU3575 + 10980 09c4 6381 strh r3, [r4, #10] @ movhi + 808:Src/main.c **** } + 10981 .loc 1 808 7 is_stmt 1 view .LVU3576 + 808:Src/main.c **** } + 10982 .loc 1 808 31 is_stmt 0 view .LVU3577 + 10983 09c6 3B88 ldrh r3, [r7] + 808:Src/main.c **** } + 10984 .loc 1 808 20 view .LVU3578 + 10985 09c8 A381 strh r3, [r4, #12] @ movhi + 10986 09ca A5E5 b .L505 + 10987 .L507: + 836:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 10988 .loc 1 836 5 is_stmt 1 view .LVU3579 + 836:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 10989 .loc 1 836 17 is_stmt 0 view .LVU3580 + 10990 09cc 354C ldr r4, .L537+56 + 10991 09ce 0D21 movs r1, #13 + 10992 09d0 2046 mov r0, r4 + 10993 09d2 FFF7FEFF bl CalculateChecksum + 10994 .LVL921: + 836:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 10995 .loc 1 836 15 discriminator 1 view .LVU3581 + 10996 09d6 344B ldr r3, .L537+60 + 10997 09d8 1880 strh r0, [r3] @ movhi + 837:Src/main.c **** + 10998 .loc 1 837 5 is_stmt 1 view .LVU3582 + 837:Src/main.c **** + 10999 .loc 1 837 24 is_stmt 0 view .LVU3583 + 11000 09da 6083 strh r0, [r4, #26] @ movhi + ARM GAS /tmp/ccYgfTud.s page 594 + + + 839:Src/main.c **** { + 11001 .loc 1 839 5 is_stmt 1 view .LVU3584 + 11002 .LBB652: + 839:Src/main.c **** { + 11003 .loc 1 839 10 view .LVU3585 + 11004 .LVL922: + 839:Src/main.c **** { + 11005 .loc 1 839 19 is_stmt 0 view .LVU3586 + 11006 09dc 0023 movs r3, #0 + 839:Src/main.c **** { + 11007 .loc 1 839 5 view .LVU3587 + 11008 09de 0BE0 b .L510 + 11009 .LVL923: + 11010 .L511: + 841:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11011 .loc 1 841 6 is_stmt 1 view .LVU3588 + 841:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11012 .loc 1 841 33 is_stmt 0 view .LVU3589 + 11013 09e0 2C4A ldr r2, .L537+40 + 11014 09e2 32F81320 ldrh r2, [r2, r3, lsl #1] + 841:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11015 .loc 1 841 17 view .LVU3590 + 11016 09e6 5900 lsls r1, r3, #1 + 841:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11017 .loc 1 841 21 view .LVU3591 + 11018 09e8 3048 ldr r0, .L537+64 + 11019 09ea 00F81320 strb r2, [r0, r3, lsl #1] + 842:Src/main.c **** } + 11020 .loc 1 842 6 is_stmt 1 view .LVU3592 + 842:Src/main.c **** } + 11021 .loc 1 842 19 is_stmt 0 view .LVU3593 + 11022 09ee 0131 adds r1, r1, #1 + 842:Src/main.c **** } + 11023 .loc 1 842 23 view .LVU3594 + 11024 09f0 120A lsrs r2, r2, #8 + 11025 09f2 4254 strb r2, [r0, r1] + 839:Src/main.c **** { + 11026 .loc 1 839 38 is_stmt 1 discriminator 3 view .LVU3595 + 11027 09f4 0133 adds r3, r3, #1 + 11028 .LVL924: + 839:Src/main.c **** { + 11029 .loc 1 839 38 is_stmt 0 discriminator 3 view .LVU3596 + 11030 09f6 9BB2 uxth r3, r3 + 11031 .LVL925: + 11032 .L510: + 839:Src/main.c **** { + 11033 .loc 1 839 28 is_stmt 1 discriminator 1 view .LVU3597 + 11034 09f8 0E2B cmp r3, #14 + 11035 09fa F1D9 bls .L511 + 11036 .LBE652: + 849:Src/main.c **** UART_transmission_request = NO_MESS; + 11037 .loc 1 849 5 view .LVU3598 + 11038 09fc 1E20 movs r0, #30 + 11039 09fe FFF7FEFF bl USART_TX_DMA + 11040 .LVL926: + 850:Src/main.c **** break; + 11041 .loc 1 850 5 view .LVU3599 + ARM GAS /tmp/ccYgfTud.s page 595 + + + 850:Src/main.c **** break; + 11042 .loc 1 850 31 is_stmt 0 view .LVU3600 + 11043 0a02 2B4B ldr r3, .L537+68 + 11044 0a04 0022 movs r2, #0 + 11045 0a06 1A70 strb r2, [r3] + 851:Src/main.c **** case MESS_03://Transmith saved packet + 11046 .loc 1 851 4 is_stmt 1 view .LVU3601 + 11047 0a08 FFF787BB b .L509 + 11048 .LVL927: + 11049 .L512: + 11050 .LBB653: + 855:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11051 .loc 1 855 6 view .LVU3602 + 855:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11052 .loc 1 855 33 is_stmt 0 view .LVU3603 + 11053 0a0c 214A ldr r2, .L537+40 + 11054 0a0e 32F81320 ldrh r2, [r2, r3, lsl #1] + 855:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11055 .loc 1 855 17 view .LVU3604 + 11056 0a12 5900 lsls r1, r3, #1 + 855:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 11057 .loc 1 855 21 view .LVU3605 + 11058 0a14 2548 ldr r0, .L537+64 + 11059 0a16 00F81320 strb r2, [r0, r3, lsl #1] + 856:Src/main.c **** } + 11060 .loc 1 856 6 is_stmt 1 view .LVU3606 + 856:Src/main.c **** } + 11061 .loc 1 856 19 is_stmt 0 view .LVU3607 + 11062 0a1a 0131 adds r1, r1, #1 + 856:Src/main.c **** } + 11063 .loc 1 856 23 view .LVU3608 + 11064 0a1c 120A lsrs r2, r2, #8 + 11065 0a1e 4254 strb r2, [r0, r1] + 853:Src/main.c **** { + 11066 .loc 1 853 38 is_stmt 1 discriminator 3 view .LVU3609 + 11067 0a20 0133 adds r3, r3, #1 + 11068 .LVL928: + 853:Src/main.c **** { + 11069 .loc 1 853 38 is_stmt 0 discriminator 3 view .LVU3610 + 11070 0a22 9BB2 uxth r3, r3 + 11071 .LVL929: + 11072 .L508: + 853:Src/main.c **** { + 11073 .loc 1 853 28 is_stmt 1 discriminator 1 view .LVU3611 + 11074 0a24 0E2B cmp r3, #14 + 11075 0a26 F1D9 bls .L512 + 11076 .LBE653: + 862:Src/main.c **** UART_transmission_request = NO_MESS; + 11077 .loc 1 862 5 view .LVU3612 + 11078 0a28 1E20 movs r0, #30 + 11079 0a2a FFF7FEFF bl USART_TX_DMA + 11080 .LVL930: + 863:Src/main.c **** break; + 11081 .loc 1 863 5 view .LVU3613 + 863:Src/main.c **** break; + 11082 .loc 1 863 31 is_stmt 0 view .LVU3614 + 11083 0a2e 204B ldr r3, .L537+68 + ARM GAS /tmp/ccYgfTud.s page 596 + + + 11084 0a30 0022 movs r2, #0 + 11085 0a32 1A70 strb r2, [r3] + 864:Src/main.c **** } + 11086 .loc 1 864 4 is_stmt 1 view .LVU3615 + 11087 0a34 FFF771BB b .L509 + 11088 .LVL931: + 11089 .L518: + 824:Src/main.c **** { + 11090 .loc 1 824 3 is_stmt 0 view .LVU3616 + 11091 0a38 0023 movs r3, #0 + 11092 0a3a F3E7 b .L508 + 11093 .L521: + 866:Src/main.c **** { + 11094 .loc 1 866 28 discriminator 1 view .LVU3617 + 11095 0a3c 174B ldr r3, .L537+48 + 11096 0a3e 1B68 ldr r3, [r3] + 11097 0a40 1C4A ldr r2, .L537+72 + 11098 0a42 1268 ldr r2, [r2] + 11099 0a44 9B1A subs r3, r3, r2 + 866:Src/main.c **** { + 11100 .loc 1 866 21 discriminator 1 view .LVU3618 + 11101 0a46 642B cmp r3, #100 + 11102 0a48 7FF66CAB bls .L456 + 868:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 11103 .loc 1 868 4 is_stmt 1 view .LVU3619 + 868:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 11104 .loc 1 868 18 is_stmt 0 view .LVU3620 + 11105 0a4c 0022 movs r2, #0 + 11106 0a4e 1A4B ldr r3, .L537+76 + 11107 0a50 1A80 strh r2, [r3] @ movhi + 869:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 11108 .loc 1 869 4 is_stmt 1 view .LVU3621 + 869:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 11109 .loc 1 869 14 is_stmt 0 view .LVU3622 + 11110 0a52 1A49 ldr r1, .L537+80 + 11111 0a54 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 869:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 11112 .loc 1 869 18 view .LVU3623 + 11113 0a56 43F00203 orr r3, r3, #2 + 11114 0a5a 0B70 strb r3, [r1] + 870:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 11115 .loc 1 870 4 is_stmt 1 view .LVU3624 + 870:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 11116 .loc 1 870 30 is_stmt 0 view .LVU3625 + 11117 0a5c 144B ldr r3, .L537+68 + 11118 0a5e 0121 movs r1, #1 + 11119 0a60 1970 strb r1, [r3] + 871:Src/main.c **** } + 11120 .loc 1 871 4 is_stmt 1 view .LVU3626 + 871:Src/main.c **** } + 11121 .loc 1 871 12 is_stmt 0 view .LVU3627 + 11122 0a62 174B ldr r3, .L537+84 + 11123 0a64 1A70 strb r2, [r3] + 11124 0a66 FFF75DBB b .L456 + 11125 .L538: + 11126 0a6a 00BF .align 2 + 11127 .L537: + ARM GAS /tmp/ccYgfTud.s page 597 + + + 11128 0a6c 00000000 .word htim10 + 11129 0a70 000C0240 .word 1073875968 + 11130 0a74 00000000 .word htim8 + 11131 0a78 00040140 .word 1073808384 + 11132 0a7c 00000000 .word task + 11133 0a80 00000000 .word TIM10_period + 11134 0a84 00000000 .word TO10_counter + 11135 0a88 00000000 .word TO7_before + 11136 0a8c 00000000 .word LD1_param + 11137 0a90 00000000 .word LD2_param + 11138 0a94 00000000 .word Long_Data + 11139 0a98 00000000 .word temp16 + 11140 0a9c 00000000 .word TO6 + 11141 0aa0 00000000 .word TO6_stop + 11142 0aa4 02000000 .word Long_Data+2 + 11143 0aa8 00000000 .word CS_result + 11144 0aac 00000000 .word UART_DATA + 11145 0ab0 00000000 .word UART_transmission_request + 11146 0ab4 00000000 .word TO6_uart + 11147 0ab8 00000000 .word UART_rec_incr + 11148 0abc 00000000 .word State_Data + 11149 0ac0 00000000 .word flg_tmt + 11150 .cfi_endproc + 11151 .LFE1186: + 11153 .section .rodata.ad9102_example4_regval,"a" + 11154 .align 2 + 11157 ad9102_example4_regval: + 11158 0000 0000 .short 0 + 11159 0002 0000 .short 0 + 11160 0004 0000 .short 0 + 11161 0006 0000 .short 0 + 11162 0008 0000 .short 0 + 11163 000a 0000 .short 0 + 11164 000c 0000 .short 0 + 11165 000e 0040 .short 16384 + 11166 0010 0000 .short 0 + 11167 0012 0000 .short 0 + 11168 0014 0000 .short 0 + 11169 0016 0000 .short 0 + 11170 0018 001F .short 7936 + 11171 001a 0000 .short 0 + 11172 001c 0000 .short 0 + 11173 001e 0000 .short 0 + 11174 0020 0E00 .short 14 + 11175 0022 0000 .short 0 + 11176 0024 0000 .short 0 + 11177 0026 0000 .short 0 + 11178 0028 0000 .short 0 + 11179 002a 0000 .short 0 + 11180 002c 1232 .short 12818 + 11181 002e 2101 .short 289 + 11182 0030 FFFF .short -1 + 11183 0032 0000 .short 0 + 11184 0034 0101 .short 257 + 11185 0036 0300 .short 3 + 11186 0038 0000 .short 0 + 11187 003a 0000 .short 0 + ARM GAS /tmp/ccYgfTud.s page 598 + + + 11188 003c 0000 .short 0 + 11189 003e 0000 .short 0 + 11190 0040 0000 .short 0 + 11191 0042 0000 .short 0 + 11192 0044 0000 .short 0 + 11193 0046 0000 .short 0 + 11194 0048 0040 .short 16384 + 11195 004a 0000 .short 0 + 11196 004c 0606 .short 1542 + 11197 004e 9919 .short 6553 + 11198 0050 009A .short -26112 + 11199 0052 0000 .short 0 + 11200 0054 0000 .short 0 + 11201 0056 0000 .short 0 + 11202 0058 0000 .short 0 + 11203 005a 0000 .short 0 + 11204 005c 0000 .short 0 + 11205 005e 0000 .short 0 + 11206 0060 A00F .short 4000 + 11207 0062 0000 .short 0 + 11208 0064 0000 .short 0 + 11209 0066 0000 .short 0 + 11210 0068 0000 .short 0 + 11211 006a 0000 .short 0 + 11212 006c 0000 .short 0 + 11213 006e 0000 .short 0 + 11214 0070 0000 .short 0 + 11215 0072 0000 .short 0 + 11216 0074 0000 .short 0 + 11217 0076 0000 .short 0 + 11218 0078 0000 .short 0 + 11219 007a 0000 .short 0 + 11220 007c 0000 .short 0 + 11221 007e FF16 .short 5887 + 11222 0080 0100 .short 1 + 11223 0082 0100 .short 1 + 11224 .section .rodata.ad9102_reg_addr,"a" + 11225 .align 2 + 11228 ad9102_reg_addr: + 11229 0000 0000 .short 0 + 11230 0002 0100 .short 1 + 11231 0004 0200 .short 2 + 11232 0006 0300 .short 3 + 11233 0008 0400 .short 4 + 11234 000a 0500 .short 5 + 11235 000c 0600 .short 6 + 11236 000e 0700 .short 7 + 11237 0010 0800 .short 8 + 11238 0012 0900 .short 9 + 11239 0014 0A00 .short 10 + 11240 0016 0B00 .short 11 + 11241 0018 0C00 .short 12 + 11242 001a 0D00 .short 13 + 11243 001c 0E00 .short 14 + 11244 001e 1F00 .short 31 + 11245 0020 2000 .short 32 + 11246 0022 2200 .short 34 + ARM GAS /tmp/ccYgfTud.s page 599 + + + 11247 0024 2300 .short 35 + 11248 0026 2400 .short 36 + 11249 0028 2500 .short 37 + 11250 002a 2600 .short 38 + 11251 002c 2700 .short 39 + 11252 002e 2800 .short 40 + 11253 0030 2900 .short 41 + 11254 0032 2A00 .short 42 + 11255 0034 2B00 .short 43 + 11256 0036 2C00 .short 44 + 11257 0038 2D00 .short 45 + 11258 003a 2E00 .short 46 + 11259 003c 2F00 .short 47 + 11260 003e 3000 .short 48 + 11261 0040 3100 .short 49 + 11262 0042 3200 .short 50 + 11263 0044 3300 .short 51 + 11264 0046 3400 .short 52 + 11265 0048 3500 .short 53 + 11266 004a 3600 .short 54 + 11267 004c 3700 .short 55 + 11268 004e 3E00 .short 62 + 11269 0050 3F00 .short 63 + 11270 0052 4000 .short 64 + 11271 0054 4100 .short 65 + 11272 0056 4200 .short 66 + 11273 0058 4300 .short 67 + 11274 005a 4400 .short 68 + 11275 005c 4500 .short 69 + 11276 005e 4700 .short 71 + 11277 0060 5000 .short 80 + 11278 0062 5100 .short 81 + 11279 0064 5200 .short 82 + 11280 0066 5300 .short 83 + 11281 0068 5400 .short 84 + 11282 006a 5500 .short 85 + 11283 006c 5600 .short 86 + 11284 006e 5700 .short 87 + 11285 0070 5800 .short 88 + 11286 0072 5900 .short 89 + 11287 0074 5A00 .short 90 + 11288 0076 5B00 .short 91 + 11289 0078 5C00 .short 92 + 11290 007a 5D00 .short 93 + 11291 007c 5E00 .short 94 + 11292 007e 5F00 .short 95 + 11293 0080 1E00 .short 30 + 11294 0082 1D00 .short 29 + 11295 .global task + 11296 .section .bss.task,"aw",%nobits + 11297 .align 2 + 11300 task: + 11301 0000 00000000 .space 52 + 11301 00000000 + 11301 00000000 + 11301 00000000 + 11301 00000000 + ARM GAS /tmp/ccYgfTud.s page 600 + + + 11302 .global LD_blinker + 11303 .section .bss.LD_blinker,"aw",%nobits + 11304 .align 2 + 11307 LD_blinker: + 11308 0000 00000000 .space 12 + 11308 00000000 + 11308 00000000 + 11309 .global LD2_param + 11310 .section .bss.LD2_param,"aw",%nobits + 11311 .align 2 + 11314 LD2_param: + 11315 0000 00000000 .space 12 + 11315 00000000 + 11315 00000000 + 11316 .global LD1_param + 11317 .section .bss.LD1_param,"aw",%nobits + 11318 .align 2 + 11321 LD1_param: + 11322 0000 00000000 .space 12 + 11322 00000000 + 11322 00000000 + 11323 .global Def_setup + 11324 .section .bss.Def_setup,"aw",%nobits + 11325 .align 2 + 11328 Def_setup: + 11329 0000 00000000 .space 18 + 11329 00000000 + 11329 00000000 + 11329 00000000 + 11329 0000 + 11330 .global Curr_setup + 11331 .section .bss.Curr_setup,"aw",%nobits + 11332 .align 2 + 11335 Curr_setup: + 11336 0000 00000000 .space 18 + 11336 00000000 + 11336 00000000 + 11336 00000000 + 11336 0000 + 11337 .global LD2_def_setup + 11338 .section .bss.LD2_def_setup,"aw",%nobits + 11339 .align 2 + 11342 LD2_def_setup: + 11343 0000 00000000 .space 16 + 11343 00000000 + 11343 00000000 + 11343 00000000 + 11344 .global LD1_def_setup + 11345 .section .bss.LD1_def_setup,"aw",%nobits + 11346 .align 2 + 11349 LD1_def_setup: + 11350 0000 00000000 .space 16 + 11350 00000000 + 11350 00000000 + 11350 00000000 + 11351 .global LD2_curr_setup + 11352 .section .bss.LD2_curr_setup,"aw",%nobits + ARM GAS /tmp/ccYgfTud.s page 601 + + + 11353 .align 2 + 11356 LD2_curr_setup: + 11357 0000 00000000 .space 16 + 11357 00000000 + 11357 00000000 + 11357 00000000 + 11358 .global LD1_curr_setup + 11359 .section .bss.LD1_curr_setup,"aw",%nobits + 11360 .align 2 + 11363 LD1_curr_setup: + 11364 0000 00000000 .space 16 + 11364 00000000 + 11364 00000000 + 11364 00000000 + 11365 .global sizeoffile + 11366 .section .bss.sizeoffile,"aw",%nobits + 11367 .align 2 + 11370 sizeoffile: + 11371 0000 00000000 .space 4 + 11372 .global fgoto + 11373 .section .bss.fgoto,"aw",%nobits + 11374 .align 2 + 11377 fgoto: + 11378 0000 00000000 .space 4 + 11379 .global test + 11380 .section .bss.test,"aw",%nobits + 11381 .align 2 + 11384 test: + 11385 0000 00000000 .space 4 + 11386 .global fresult + 11387 .section .bss.fresult,"aw",%nobits + 11390 fresult: + 11391 0000 00 .space 1 + 11392 .global COMMAND + 11393 .section .bss.COMMAND,"aw",%nobits + 11394 .align 2 + 11397 COMMAND: + 11398 0000 00000000 .space 30 + 11398 00000000 + 11398 00000000 + 11398 00000000 + 11398 00000000 + 11399 .global Long_Data + 11400 .section .bss.Long_Data,"aw",%nobits + 11401 .align 2 + 11404 Long_Data: + 11405 0000 00000000 .space 30 + 11405 00000000 + 11405 00000000 + 11405 00000000 + 11405 00000000 + 11406 .global temp16 + 11407 .section .bss.temp16,"aw",%nobits + 11408 .align 1 + 11411 temp16: + 11412 0000 0000 .space 2 + 11413 .global CS_result + ARM GAS /tmp/ccYgfTud.s page 602 + + + 11414 .section .bss.CS_result,"aw",%nobits + 11415 .align 1 + 11418 CS_result: + 11419 0000 0000 .space 2 + 11420 .global UART_header + 11421 .section .bss.UART_header,"aw",%nobits + 11422 .align 1 + 11425 UART_header: + 11426 0000 0000 .space 2 + 11427 .global UART_rec_incr + 11428 .section .bss.UART_rec_incr,"aw",%nobits + 11429 .align 1 + 11432 UART_rec_incr: + 11433 0000 0000 .space 2 + 11434 .global TIM10_coflag + 11435 .section .bss.TIM10_coflag,"aw",%nobits + 11438 TIM10_coflag: + 11439 0000 00 .space 1 + 11440 .global u_rx_flg + 11441 .section .bss.u_rx_flg,"aw",%nobits + 11444 u_rx_flg: + 11445 0000 00 .space 1 + 11446 .global u_tx_flg + 11447 .section .bss.u_tx_flg,"aw",%nobits + 11450 u_tx_flg: + 11451 0000 00 .space 1 + 11452 .global flg_tmt + 11453 .section .bss.flg_tmt,"aw",%nobits + 11456 flg_tmt: + 11457 0000 00 .space 1 + 11458 .global UART_DATA + 11459 .section .bss.UART_DATA,"aw",%nobits + 11460 .align 2 + 11463 UART_DATA: + 11464 0000 00000000 .space 30 + 11464 00000000 + 11464 00000000 + 11464 00000000 + 11464 00000000 + 11465 .global State_Data + 11466 .section .bss.State_Data,"aw",%nobits + 11467 .align 2 + 11470 State_Data: + 11471 0000 0000 .space 2 + 11472 .global UART_transmission_request + 11473 .section .bss.UART_transmission_request,"aw",%nobits + 11476 UART_transmission_request: + 11477 0000 00 .space 1 + 11478 .global CPU_state_old + 11479 .section .bss.CPU_state_old,"aw",%nobits + 11482 CPU_state_old: + 11483 0000 00 .space 1 + 11484 .global CPU_state + 11485 .section .bss.CPU_state,"aw",%nobits + 11488 CPU_state: + 11489 0000 00 .space 1 + 11490 .global uart_buf + ARM GAS /tmp/ccYgfTud.s page 603 + + + 11491 .section .bss.uart_buf,"aw",%nobits + 11494 uart_buf: + 11495 0000 00 .space 1 + 11496 .global TIM10_period + 11497 .section .bss.TIM10_period,"aw",%nobits + 11498 .align 2 + 11501 TIM10_period: + 11502 0000 00000000 .space 4 + 11503 .global TO10_counter + 11504 .section .bss.TO10_counter,"aw",%nobits + 11505 .align 2 + 11508 TO10_counter: + 11509 0000 00000000 .space 4 + 11510 .global TO10 + 11511 .section .bss.TO10,"aw",%nobits + 11512 .align 2 + 11515 TO10: + 11516 0000 00000000 .space 4 + 11517 .global TO7_PID + 11518 .section .bss.TO7_PID,"aw",%nobits + 11519 .align 2 + 11522 TO7_PID: + 11523 0000 00000000 .space 4 + 11524 .global TO7_before + 11525 .section .bss.TO7_before,"aw",%nobits + 11526 .align 2 + 11529 TO7_before: + 11530 0000 00000000 .space 4 + 11531 .global TO7 + 11532 .section .bss.TO7,"aw",%nobits + 11533 .align 2 + 11536 TO7: + 11537 0000 00000000 .space 4 + 11538 .global temp32 + 11539 .section .bss.temp32,"aw",%nobits + 11540 .align 2 + 11543 temp32: + 11544 0000 00000000 .space 4 + 11545 .global SD_SLIDE + 11546 .section .bss.SD_SLIDE,"aw",%nobits + 11547 .align 2 + 11550 SD_SLIDE: + 11551 0000 00000000 .space 4 + 11552 .global SD_SEEK + 11553 .section .bss.SD_SEEK,"aw",%nobits + 11554 .align 2 + 11557 SD_SEEK: + 11558 0000 00000000 .space 4 + 11559 .global TO6_uart + 11560 .section .bss.TO6_uart,"aw",%nobits + 11561 .align 2 + 11564 TO6_uart: + 11565 0000 00000000 .space 4 + 11566 .global TO6_stop + 11567 .section .bss.TO6_stop,"aw",%nobits + 11568 .align 2 + 11571 TO6_stop: + ARM GAS /tmp/ccYgfTud.s page 604 + + + 11572 0000 00000000 .space 4 + 11573 .global TO6_before + 11574 .section .bss.TO6_before,"aw",%nobits + 11575 .align 2 + 11578 TO6_before: + 11579 0000 00000000 .space 4 + 11580 .global TO6 + 11581 .section .bss.TO6,"aw",%nobits + 11582 .align 2 + 11585 TO6: + 11586 0000 00000000 .space 4 + 11587 .global huart8 + 11588 .section .bss.huart8,"aw",%nobits + 11589 .align 2 + 11592 huart8: + 11593 0000 00000000 .space 136 + 11593 00000000 + 11593 00000000 + 11593 00000000 + 11593 00000000 + 11594 .global htim11 + 11595 .section .bss.htim11,"aw",%nobits + 11596 .align 2 + 11599 htim11: + 11600 0000 00000000 .space 76 + 11600 00000000 + 11600 00000000 + 11600 00000000 + 11600 00000000 + 11601 .global htim10 + 11602 .section .bss.htim10,"aw",%nobits + 11603 .align 2 + 11606 htim10: + 11607 0000 00000000 .space 76 + 11607 00000000 + 11607 00000000 + 11607 00000000 + 11607 00000000 + 11608 .global htim8 + 11609 .section .bss.htim8,"aw",%nobits + 11610 .align 2 + 11613 htim8: + 11614 0000 00000000 .space 76 + 11614 00000000 + 11614 00000000 + 11614 00000000 + 11614 00000000 + 11615 .global htim4 + 11616 .section .bss.htim4,"aw",%nobits + 11617 .align 2 + 11620 htim4: + 11621 0000 00000000 .space 76 + 11621 00000000 + 11621 00000000 + 11621 00000000 + 11621 00000000 + 11622 .global hsd1 + ARM GAS /tmp/ccYgfTud.s page 605 + + + 11623 .section .bss.hsd1,"aw",%nobits + 11624 .align 2 + 11627 hsd1: + 11628 0000 00000000 .space 132 + 11628 00000000 + 11628 00000000 + 11628 00000000 + 11628 00000000 + 11629 .global hadc3 + 11630 .section .bss.hadc3,"aw",%nobits + 11631 .align 2 + 11634 hadc3: + 11635 0000 00000000 .space 72 + 11635 00000000 + 11635 00000000 + 11635 00000000 + 11635 00000000 + 11636 .global hadc1 + 11637 .section .bss.hadc1,"aw",%nobits + 11638 .align 2 + 11641 hadc1: + 11642 0000 00000000 .space 72 + 11642 00000000 + 11642 00000000 + 11642 00000000 + 11642 00000000 + 11643 .text + 11644 .Letext0: + 11645 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" + 11646 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 11647 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" + 11648 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" + 11649 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" + 11650 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" + 11651 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" + 11652 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" + 11653 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" + 11654 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" + 11655 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" + 11656 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" + 11657 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" + 11658 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" + 11659 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h" + 11660 .file 24 "Inc/main.h" + 11661 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h" + 11662 .file 26 "Inc/File_Handling.h" + 11663 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" + 11664 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h" + 11665 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" + 11666 .file 30 "Inc/fatfs.h" + 11667 .file 31 "" + ARM GAS /tmp/ccYgfTud.s page 606 DEFINED SYMBOLS *ABS*:00000000 main.c - /tmp/ccO46DoU.s:20 .text.NVIC_EncodePriority:00000000 $t - /tmp/ccO46DoU.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority - /tmp/ccO46DoU.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t - /tmp/ccO46DoU.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init - /tmp/ccO46DoU.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d - /tmp/ccO46DoU.s:10182 .bss.hsd1:00000000 hsd1 - /tmp/ccO46DoU.s:137 .text.MX_DMA_Init:00000000 $t - /tmp/ccO46DoU.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init - /tmp/ccO46DoU.s:238 .text.MX_DMA_Init:0000003c $d - /tmp/ccO46DoU.s:245 .text.Decode_task:00000000 $t - /tmp/ccO46DoU.s:250 .text.Decode_task:00000000 Decode_task - /tmp/ccO46DoU.s:527 .text.Decode_task:00000150 $d - /tmp/ccO46DoU.s:9855 .bss.task:00000000 task - /tmp/ccO46DoU.s:10063 .bss.TO10_counter:00000000 TO10_counter - /tmp/ccO46DoU.s:537 .text.PID_Controller_Temp:00000000 $t - /tmp/ccO46DoU.s:542 .text.PID_Controller_Temp:00000000 PID_Controller_Temp - /tmp/ccO46DoU.s:711 .text.PID_Controller_Temp:000000cc $d - /tmp/ccO46DoU.s:10091 .bss.TO7:00000000 TO7 - /tmp/ccO46DoU.s:10077 .bss.TO7_PID:00000000 TO7_PID - /tmp/ccO46DoU.s:721 .text.OUT_trigger:00000000 $t - /tmp/ccO46DoU.s:726 .text.OUT_trigger:00000000 OUT_trigger - /tmp/ccO46DoU.s:744 .text.OUT_trigger:0000000a $d - /tmp/ccO46DoU.s:754 .text.OUT_trigger:00000014 $t - /tmp/ccO46DoU.s:950 .text.OUT_trigger:0000011c $d - /tmp/ccO46DoU.s:956 .text.MPhD_T:00000000 $t - /tmp/ccO46DoU.s:961 .text.MPhD_T:00000000 MPhD_T - /tmp/ccO46DoU.s:1045 .text.MPhD_T:00000056 $d - /tmp/ccO46DoU.s:1049 .text.MPhD_T:0000005a $t - /tmp/ccO46DoU.s:1593 .text.MPhD_T:00000210 $d - /tmp/ccO46DoU.s:1603 .text.Stop_TIM10:00000000 $t - /tmp/ccO46DoU.s:1608 .text.Stop_TIM10:00000000 Stop_TIM10 - /tmp/ccO46DoU.s:1637 .text.Stop_TIM10:00000014 $d - /tmp/ccO46DoU.s:10161 .bss.htim10:00000000 htim10 - /tmp/ccO46DoU.s:9993 .bss.TIM10_coflag:00000000 TIM10_coflag - /tmp/ccO46DoU.s:10070 .bss.TO10:00000000 TO10 - /tmp/ccO46DoU.s:1644 .text.MX_GPIO_Init:00000000 $t - /tmp/ccO46DoU.s:1649 .text.MX_GPIO_Init:00000000 MX_GPIO_Init - /tmp/ccO46DoU.s:2098 .text.MX_GPIO_Init:00000228 $d - /tmp/ccO46DoU.s:2110 .text.MX_SPI4_Init:00000000 $t - /tmp/ccO46DoU.s:2115 .text.MX_SPI4_Init:00000000 MX_SPI4_Init - /tmp/ccO46DoU.s:2320 .text.MX_SPI4_Init:000000c8 $d - /tmp/ccO46DoU.s:2327 .text.MX_SPI2_Init:00000000 $t - /tmp/ccO46DoU.s:2332 .text.MX_SPI2_Init:00000000 MX_SPI2_Init - /tmp/ccO46DoU.s:2537 .text.MX_SPI2_Init:000000c4 $d - /tmp/ccO46DoU.s:2544 .text.MX_SPI5_Init:00000000 $t - /tmp/ccO46DoU.s:2549 .text.MX_SPI5_Init:00000000 MX_SPI5_Init - /tmp/ccO46DoU.s:2754 .text.MX_SPI5_Init:000000c4 $d - /tmp/ccO46DoU.s:2761 .text.MX_SPI6_Init:00000000 $t - /tmp/ccO46DoU.s:2766 .text.MX_SPI6_Init:00000000 MX_SPI6_Init - /tmp/ccO46DoU.s:2971 .text.MX_SPI6_Init:000000c4 $d - /tmp/ccO46DoU.s:2978 .text.MX_TIM2_Init:00000000 $t - /tmp/ccO46DoU.s:2983 .text.MX_TIM2_Init:00000000 MX_TIM2_Init - /tmp/ccO46DoU.s:3161 .text.MX_TIM2_Init:00000088 $d - /tmp/ccO46DoU.s:3170 .text.MX_TIM5_Init:00000000 $t - /tmp/ccO46DoU.s:3175 .text.MX_TIM5_Init:00000000 MX_TIM5_Init - ARM GAS /tmp/ccO46DoU.s page 569 + /tmp/ccYgfTud.s:20 .text.NVIC_EncodePriority:00000000 $t + /tmp/ccYgfTud.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority + /tmp/ccYgfTud.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t + /tmp/ccYgfTud.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init + /tmp/ccYgfTud.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d + /tmp/ccYgfTud.s:11627 .bss.hsd1:00000000 hsd1 + /tmp/ccYgfTud.s:137 .text.MX_DMA_Init:00000000 $t + /tmp/ccYgfTud.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init + /tmp/ccYgfTud.s:238 .text.MX_DMA_Init:0000003c $d + /tmp/ccYgfTud.s:245 .text.Decode_task:00000000 $t + /tmp/ccYgfTud.s:250 .text.Decode_task:00000000 Decode_task + /tmp/ccYgfTud.s:527 .text.Decode_task:00000150 $d + /tmp/ccYgfTud.s:11300 .bss.task:00000000 task + /tmp/ccYgfTud.s:11508 .bss.TO10_counter:00000000 TO10_counter + /tmp/ccYgfTud.s:537 .text.PID_Controller_Temp:00000000 $t + /tmp/ccYgfTud.s:542 .text.PID_Controller_Temp:00000000 PID_Controller_Temp + /tmp/ccYgfTud.s:711 .text.PID_Controller_Temp:000000cc $d + /tmp/ccYgfTud.s:11536 .bss.TO7:00000000 TO7 + /tmp/ccYgfTud.s:11522 .bss.TO7_PID:00000000 TO7_PID + /tmp/ccYgfTud.s:721 .text.AD9102_WriteReg:00000000 $t + /tmp/ccYgfTud.s:726 .text.AD9102_WriteReg:00000000 AD9102_WriteReg + /tmp/ccYgfTud.s:973 .text.AD9102_WriteReg:000000a8 $d + /tmp/ccYgfTud.s:979 .text.AD9102_WriteRegTable:00000000 $t + /tmp/ccYgfTud.s:984 .text.AD9102_WriteRegTable:00000000 AD9102_WriteRegTable + /tmp/ccYgfTud.s:1035 .text.AD9102_WriteRegTable:00000024 $d + /tmp/ccYgfTud.s:11228 .rodata.ad9102_reg_addr:00000000 ad9102_reg_addr + /tmp/ccYgfTud.s:1040 .text.AD9102_Init:00000000 $t + /tmp/ccYgfTud.s:1045 .text.AD9102_Init:00000000 AD9102_Init + /tmp/ccYgfTud.s:1126 .text.AD9102_Init:00000064 $d + /tmp/ccYgfTud.s:11157 .rodata.ad9102_example4_regval:00000000 ad9102_example4_regval + /tmp/ccYgfTud.s:1134 .text.AD9102_ReadReg:00000000 $t + /tmp/ccYgfTud.s:1139 .text.AD9102_ReadReg:00000000 AD9102_ReadReg + /tmp/ccYgfTud.s:1394 .text.AD9102_ReadReg:000000a8 $d + /tmp/ccYgfTud.s:1400 .text.AD9102_CheckFlags:00000000 $t + /tmp/ccYgfTud.s:1405 .text.AD9102_CheckFlags:00000000 AD9102_CheckFlags + /tmp/ccYgfTud.s:1635 .text.AD9102_Apply:00000000 $t + /tmp/ccYgfTud.s:1640 .text.AD9102_Apply:00000000 AD9102_Apply + /tmp/ccYgfTud.s:1811 .text.AD9102_Apply:000000b4 $d + /tmp/ccYgfTud.s:1816 .text.OUT_trigger:00000000 $t + /tmp/ccYgfTud.s:1821 .text.OUT_trigger:00000000 OUT_trigger + /tmp/ccYgfTud.s:1839 .text.OUT_trigger:0000000a $d + /tmp/ccYgfTud.s:1849 .text.OUT_trigger:00000014 $t + /tmp/ccYgfTud.s:2045 .text.OUT_trigger:0000011c $d + /tmp/ccYgfTud.s:2051 .text.MPhD_T:00000000 $t + /tmp/ccYgfTud.s:2056 .text.MPhD_T:00000000 MPhD_T + /tmp/ccYgfTud.s:2140 .text.MPhD_T:00000056 $d + /tmp/ccYgfTud.s:2144 .text.MPhD_T:0000005a $t + /tmp/ccYgfTud.s:2687 .text.MPhD_T:00000210 $d + /tmp/ccYgfTud.s:2697 .text.Stop_TIM10:00000000 $t + /tmp/ccYgfTud.s:2702 .text.Stop_TIM10:00000000 Stop_TIM10 + /tmp/ccYgfTud.s:2731 .text.Stop_TIM10:00000014 $d + /tmp/ccYgfTud.s:11606 .bss.htim10:00000000 htim10 + /tmp/ccYgfTud.s:11438 .bss.TIM10_coflag:00000000 TIM10_coflag + /tmp/ccYgfTud.s:11515 .bss.TO10:00000000 TO10 + /tmp/ccYgfTud.s:2738 .text.MX_GPIO_Init:00000000 $t + ARM GAS /tmp/ccYgfTud.s page 607 - /tmp/ccO46DoU.s:3352 .text.MX_TIM5_Init:00000084 $d - /tmp/ccO46DoU.s:3361 .text.MX_TIM7_Init:00000000 $t - /tmp/ccO46DoU.s:3366 .text.MX_TIM7_Init:00000000 MX_TIM7_Init - /tmp/ccO46DoU.s:3527 .text.MX_TIM7_Init:0000007c $d - /tmp/ccO46DoU.s:3535 .text.MX_TIM6_Init:00000000 $t - /tmp/ccO46DoU.s:3540 .text.MX_TIM6_Init:00000000 MX_TIM6_Init - /tmp/ccO46DoU.s:3701 .text.MX_TIM6_Init:0000007c $d - /tmp/ccO46DoU.s:3709 .rodata.Init_params.str1.4:00000000 $d - /tmp/ccO46DoU.s:3716 .text.Init_params:00000000 $t - /tmp/ccO46DoU.s:3721 .text.Init_params:00000000 Init_params - /tmp/ccO46DoU.s:4355 .text.Init_params:00000280 $d - /tmp/ccO46DoU.s:10140 .bss.TO6:00000000 TO6 - /tmp/ccO46DoU.s:10084 .bss.TO7_before:00000000 TO7_before - /tmp/ccO46DoU.s:10133 .bss.TO6_before:00000000 TO6_before - /tmp/ccO46DoU.s:10119 .bss.TO6_uart:00000000 TO6_uart - /tmp/ccO46DoU.s:10011 .bss.flg_tmt:00000000 flg_tmt - /tmp/ccO46DoU.s:9987 .bss.UART_rec_incr:00000000 UART_rec_incr - /tmp/ccO46DoU.s:9932 .bss.fgoto:00000000 fgoto - /tmp/ccO46DoU.s:9925 .bss.sizeoffile:00000000 sizeoffile - /tmp/ccO46DoU.s:10005 .bss.u_tx_flg:00000000 u_tx_flg - /tmp/ccO46DoU.s:9999 .bss.u_rx_flg:00000000 u_rx_flg - /tmp/ccO46DoU.s:9959 .bss.Long_Data:00000000 Long_Data - /tmp/ccO46DoU.s:9883 .bss.Def_setup:00000000 Def_setup - /tmp/ccO46DoU.s:9904 .bss.LD1_def_setup:00000000 LD1_def_setup - /tmp/ccO46DoU.s:9897 .bss.LD2_def_setup:00000000 LD2_def_setup - /tmp/ccO46DoU.s:9890 .bss.Curr_setup:00000000 Curr_setup - /tmp/ccO46DoU.s:9918 .bss.LD1_curr_setup:00000000 LD1_curr_setup - /tmp/ccO46DoU.s:9911 .bss.LD2_curr_setup:00000000 LD2_curr_setup - /tmp/ccO46DoU.s:10018 .bss.UART_DATA:00000000 UART_DATA - /tmp/ccO46DoU.s:10112 .bss.SD_SEEK:00000000 SD_SEEK - /tmp/ccO46DoU.s:10105 .bss.SD_SLIDE:00000000 SD_SLIDE - /tmp/ccO46DoU.s:9939 .bss.test:00000000 test - /tmp/ccO46DoU.s:10043 .bss.CPU_state:00000000 CPU_state - /tmp/ccO46DoU.s:9952 .bss.COMMAND:00000000 COMMAND - /tmp/ccO46DoU.s:4394 .text.Get_ADC:00000000 $t - /tmp/ccO46DoU.s:4399 .text.Get_ADC:00000000 Get_ADC - /tmp/ccO46DoU.s:4419 .text.Get_ADC:0000000c $d - /tmp/ccO46DoU.s:4425 .text.Get_ADC:00000012 $t - /tmp/ccO46DoU.s:4523 .text.Get_ADC:00000068 $d - /tmp/ccO46DoU.s:10196 .bss.hadc1:00000000 hadc1 - /tmp/ccO46DoU.s:10189 .bss.hadc3:00000000 hadc3 - /tmp/ccO46DoU.s:4529 .text.Set_LTEC:00000000 $t - /tmp/ccO46DoU.s:4535 .text.Set_LTEC:00000000 Set_LTEC - /tmp/ccO46DoU.s:4560 .text.Set_LTEC:0000000e $d - /tmp/ccO46DoU.s:4564 .text.Set_LTEC:00000012 $t - /tmp/ccO46DoU.s:4976 .text.Set_LTEC:00000148 $d - /tmp/ccO46DoU.s:4984 .text.Decode_uart:00000000 $t - /tmp/ccO46DoU.s:4989 .text.Decode_uart:00000000 Decode_uart - /tmp/ccO46DoU.s:5552 .text.Decode_uart:000002cc $d - /tmp/ccO46DoU.s:5567 .text.Advanced_Controller_Temp:00000000 $t - /tmp/ccO46DoU.s:5573 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp - /tmp/ccO46DoU.s:5742 .text.Advanced_Controller_Temp:000000cc $d - /tmp/ccO46DoU.s:5752 .text.CalculateChecksum:00000000 $t - /tmp/ccO46DoU.s:5758 .text.CalculateChecksum:00000000 CalculateChecksum - /tmp/ccO46DoU.s:5803 .text.CheckChecksum:00000000 $t - /tmp/ccO46DoU.s:5809 .text.CheckChecksum:00000000 CheckChecksum - /tmp/ccO46DoU.s:5871 .text.CheckChecksum:0000003c $d - ARM GAS /tmp/ccO46DoU.s page 570 + /tmp/ccYgfTud.s:2743 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/ccYgfTud.s:3204 .text.MX_GPIO_Init:0000023c $d + /tmp/ccYgfTud.s:3216 .text.MX_SPI4_Init:00000000 $t + /tmp/ccYgfTud.s:3221 .text.MX_SPI4_Init:00000000 MX_SPI4_Init + /tmp/ccYgfTud.s:3426 .text.MX_SPI4_Init:000000c8 $d + /tmp/ccYgfTud.s:3433 .text.MX_SPI2_Init:00000000 $t + /tmp/ccYgfTud.s:3438 .text.MX_SPI2_Init:00000000 MX_SPI2_Init + /tmp/ccYgfTud.s:3666 .text.MX_SPI2_Init:000000dc $d + /tmp/ccYgfTud.s:3673 .text.MX_SPI5_Init:00000000 $t + /tmp/ccYgfTud.s:3678 .text.MX_SPI5_Init:00000000 MX_SPI5_Init + /tmp/ccYgfTud.s:3883 .text.MX_SPI5_Init:000000c4 $d + /tmp/ccYgfTud.s:3890 .text.MX_SPI6_Init:00000000 $t + /tmp/ccYgfTud.s:3895 .text.MX_SPI6_Init:00000000 MX_SPI6_Init + /tmp/ccYgfTud.s:4100 .text.MX_SPI6_Init:000000c4 $d + /tmp/ccYgfTud.s:4107 .text.MX_TIM2_Init:00000000 $t + /tmp/ccYgfTud.s:4112 .text.MX_TIM2_Init:00000000 MX_TIM2_Init + /tmp/ccYgfTud.s:4290 .text.MX_TIM2_Init:00000088 $d + /tmp/ccYgfTud.s:4299 .text.MX_TIM5_Init:00000000 $t + /tmp/ccYgfTud.s:4304 .text.MX_TIM5_Init:00000000 MX_TIM5_Init + /tmp/ccYgfTud.s:4481 .text.MX_TIM5_Init:00000084 $d + /tmp/ccYgfTud.s:4490 .text.MX_TIM7_Init:00000000 $t + /tmp/ccYgfTud.s:4495 .text.MX_TIM7_Init:00000000 MX_TIM7_Init + /tmp/ccYgfTud.s:4656 .text.MX_TIM7_Init:0000007c $d + /tmp/ccYgfTud.s:4664 .text.MX_TIM6_Init:00000000 $t + /tmp/ccYgfTud.s:4669 .text.MX_TIM6_Init:00000000 MX_TIM6_Init + /tmp/ccYgfTud.s:4830 .text.MX_TIM6_Init:0000007c $d + /tmp/ccYgfTud.s:4838 .rodata.Init_params.str1.4:00000000 $d + /tmp/ccYgfTud.s:4845 .text.Init_params:00000000 $t + /tmp/ccYgfTud.s:4850 .text.Init_params:00000000 Init_params + /tmp/ccYgfTud.s:5486 .text.Init_params:00000284 $d + /tmp/ccYgfTud.s:11585 .bss.TO6:00000000 TO6 + /tmp/ccYgfTud.s:11529 .bss.TO7_before:00000000 TO7_before + /tmp/ccYgfTud.s:11578 .bss.TO6_before:00000000 TO6_before + /tmp/ccYgfTud.s:11564 .bss.TO6_uart:00000000 TO6_uart + /tmp/ccYgfTud.s:11456 .bss.flg_tmt:00000000 flg_tmt + /tmp/ccYgfTud.s:11432 .bss.UART_rec_incr:00000000 UART_rec_incr + /tmp/ccYgfTud.s:11377 .bss.fgoto:00000000 fgoto + /tmp/ccYgfTud.s:11370 .bss.sizeoffile:00000000 sizeoffile + /tmp/ccYgfTud.s:11450 .bss.u_tx_flg:00000000 u_tx_flg + /tmp/ccYgfTud.s:11444 .bss.u_rx_flg:00000000 u_rx_flg + /tmp/ccYgfTud.s:11404 .bss.Long_Data:00000000 Long_Data + /tmp/ccYgfTud.s:11328 .bss.Def_setup:00000000 Def_setup + /tmp/ccYgfTud.s:11349 .bss.LD1_def_setup:00000000 LD1_def_setup + /tmp/ccYgfTud.s:11342 .bss.LD2_def_setup:00000000 LD2_def_setup + /tmp/ccYgfTud.s:11335 .bss.Curr_setup:00000000 Curr_setup + /tmp/ccYgfTud.s:11363 .bss.LD1_curr_setup:00000000 LD1_curr_setup + /tmp/ccYgfTud.s:11356 .bss.LD2_curr_setup:00000000 LD2_curr_setup + /tmp/ccYgfTud.s:11463 .bss.UART_DATA:00000000 UART_DATA + /tmp/ccYgfTud.s:11557 .bss.SD_SEEK:00000000 SD_SEEK + /tmp/ccYgfTud.s:11550 .bss.SD_SLIDE:00000000 SD_SLIDE + /tmp/ccYgfTud.s:11384 .bss.test:00000000 test + /tmp/ccYgfTud.s:11488 .bss.CPU_state:00000000 CPU_state + /tmp/ccYgfTud.s:11397 .bss.COMMAND:00000000 COMMAND + /tmp/ccYgfTud.s:5525 .text.Get_ADC:00000000 $t + /tmp/ccYgfTud.s:5530 .text.Get_ADC:00000000 Get_ADC + /tmp/ccYgfTud.s:5550 .text.Get_ADC:0000000c $d + /tmp/ccYgfTud.s:5556 .text.Get_ADC:00000012 $t + ARM GAS /tmp/ccYgfTud.s page 608 - /tmp/ccO46DoU.s:9980 .bss.UART_header:00000000 UART_header - /tmp/ccO46DoU.s:9973 .bss.CS_result:00000000 CS_result - /tmp/ccO46DoU.s:5878 .rodata.SD_SAVE.str1.4:00000000 $d - /tmp/ccO46DoU.s:5882 .text.SD_SAVE:00000000 $t - /tmp/ccO46DoU.s:5888 .text.SD_SAVE:00000000 SD_SAVE - /tmp/ccO46DoU.s:5957 .text.SD_SAVE:00000030 $d - /tmp/ccO46DoU.s:5964 .text.SD_READ:00000000 $t - /tmp/ccO46DoU.s:5970 .text.SD_READ:00000000 SD_READ - /tmp/ccO46DoU.s:6048 .text.SD_READ:0000003c $d - /tmp/ccO46DoU.s:6056 .text.SD_REMOVE:00000000 $t - /tmp/ccO46DoU.s:6062 .text.SD_REMOVE:00000000 SD_REMOVE - /tmp/ccO46DoU.s:6130 .text.SD_REMOVE:00000034 $d - /tmp/ccO46DoU.s:6137 .text.USART_TX:00000000 $t - /tmp/ccO46DoU.s:6143 .text.USART_TX:00000000 USART_TX - /tmp/ccO46DoU.s:6218 .text.USART_TX:00000028 $d - /tmp/ccO46DoU.s:6223 .text.USART_TX_DMA:00000000 $t - /tmp/ccO46DoU.s:6229 .text.USART_TX_DMA:00000000 USART_TX_DMA - /tmp/ccO46DoU.s:6298 .text.USART_TX_DMA:00000038 $d - /tmp/ccO46DoU.s:6304 .text.Error_Handler:00000000 $t - /tmp/ccO46DoU.s:6310 .text.Error_Handler:00000000 Error_Handler - /tmp/ccO46DoU.s:6341 .text.MX_ADC1_Init:00000000 $t - /tmp/ccO46DoU.s:6346 .text.MX_ADC1_Init:00000000 MX_ADC1_Init - /tmp/ccO46DoU.s:6535 .text.MX_ADC1_Init:000000bc $d - /tmp/ccO46DoU.s:6542 .text.MX_ADC3_Init:00000000 $t - /tmp/ccO46DoU.s:6547 .text.MX_ADC3_Init:00000000 MX_ADC3_Init - /tmp/ccO46DoU.s:6654 .text.MX_ADC3_Init:00000060 $d - /tmp/ccO46DoU.s:6661 .text.MX_USART1_UART_Init:00000000 $t - /tmp/ccO46DoU.s:6666 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init - /tmp/ccO46DoU.s:7065 .text.MX_USART1_UART_Init:0000017c $d - /tmp/ccO46DoU.s:7074 .text.MX_TIM10_Init:00000000 $t - /tmp/ccO46DoU.s:7079 .text.MX_TIM10_Init:00000000 MX_TIM10_Init - /tmp/ccO46DoU.s:7128 .text.MX_TIM10_Init:00000024 $d - /tmp/ccO46DoU.s:7134 .text.MX_UART8_Init:00000000 $t - /tmp/ccO46DoU.s:7139 .text.MX_UART8_Init:00000000 MX_UART8_Init - /tmp/ccO46DoU.s:7200 .text.MX_UART8_Init:00000030 $d - /tmp/ccO46DoU.s:10147 .bss.huart8:00000000 huart8 - /tmp/ccO46DoU.s:7206 .text.MX_TIM8_Init:00000000 $t - /tmp/ccO46DoU.s:7211 .text.MX_TIM8_Init:00000000 MX_TIM8_Init - /tmp/ccO46DoU.s:7320 .text.MX_TIM8_Init:00000064 $d - /tmp/ccO46DoU.s:10168 .bss.htim8:00000000 htim8 - /tmp/ccO46DoU.s:7326 .text.MX_TIM11_Init:00000000 $t - /tmp/ccO46DoU.s:7331 .text.MX_TIM11_Init:00000000 MX_TIM11_Init - /tmp/ccO46DoU.s:7441 .text.MX_TIM11_Init:00000068 $d - /tmp/ccO46DoU.s:10154 .bss.htim11:00000000 htim11 - /tmp/ccO46DoU.s:7447 .text.MX_TIM4_Init:00000000 $t - /tmp/ccO46DoU.s:7452 .text.MX_TIM4_Init:00000000 MX_TIM4_Init - /tmp/ccO46DoU.s:7607 .text.MX_TIM4_Init:0000009c $d - /tmp/ccO46DoU.s:10175 .bss.htim4:00000000 htim4 - /tmp/ccO46DoU.s:7613 .text.SystemClock_Config:00000000 $t - /tmp/ccO46DoU.s:7619 .text.SystemClock_Config:00000000 SystemClock_Config - /tmp/ccO46DoU.s:7778 .text.SystemClock_Config:000000ac $d - /tmp/ccO46DoU.s:7784 .text.main:00000000 $t - /tmp/ccO46DoU.s:7790 .text.main:00000000 main - /tmp/ccO46DoU.s:8194 .text.main:00000140 $d - /tmp/ccO46DoU.s:8204 .text.main:00000168 $t - /tmp/ccO46DoU.s:8457 .text.main:00000274 $d - /tmp/ccO46DoU.s:10037 .bss.CPU_state_old:00000000 CPU_state_old - ARM GAS /tmp/ccO46DoU.s page 571 + /tmp/ccYgfTud.s:5654 .text.Get_ADC:00000068 $d + /tmp/ccYgfTud.s:11641 .bss.hadc1:00000000 hadc1 + /tmp/ccYgfTud.s:11634 .bss.hadc3:00000000 hadc3 + /tmp/ccYgfTud.s:5660 .text.Set_LTEC:00000000 $t + /tmp/ccYgfTud.s:5666 .text.Set_LTEC:00000000 Set_LTEC + /tmp/ccYgfTud.s:5697 .text.Set_LTEC:00000018 $d + /tmp/ccYgfTud.s:5701 .text.Set_LTEC:0000001c $t + /tmp/ccYgfTud.s:6123 .text.Set_LTEC:00000154 $d + /tmp/ccYgfTud.s:6131 .text.Decode_uart:00000000 $t + /tmp/ccYgfTud.s:6136 .text.Decode_uart:00000000 Decode_uart + /tmp/ccYgfTud.s:6699 .text.Decode_uart:000002cc $d + /tmp/ccYgfTud.s:6714 .text.Advanced_Controller_Temp:00000000 $t + /tmp/ccYgfTud.s:6720 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp + /tmp/ccYgfTud.s:6889 .text.Advanced_Controller_Temp:000000cc $d + /tmp/ccYgfTud.s:6899 .text.CalculateChecksum:00000000 $t + /tmp/ccYgfTud.s:6905 .text.CalculateChecksum:00000000 CalculateChecksum + /tmp/ccYgfTud.s:6950 .text.CheckChecksum:00000000 $t + /tmp/ccYgfTud.s:6956 .text.CheckChecksum:00000000 CheckChecksum + /tmp/ccYgfTud.s:7018 .text.CheckChecksum:0000003c $d + /tmp/ccYgfTud.s:11425 .bss.UART_header:00000000 UART_header + /tmp/ccYgfTud.s:11418 .bss.CS_result:00000000 CS_result + /tmp/ccYgfTud.s:7025 .rodata.SD_SAVE.str1.4:00000000 $d + /tmp/ccYgfTud.s:7029 .text.SD_SAVE:00000000 $t + /tmp/ccYgfTud.s:7035 .text.SD_SAVE:00000000 SD_SAVE + /tmp/ccYgfTud.s:7104 .text.SD_SAVE:00000030 $d + /tmp/ccYgfTud.s:7111 .text.SD_READ:00000000 $t + /tmp/ccYgfTud.s:7117 .text.SD_READ:00000000 SD_READ + /tmp/ccYgfTud.s:7195 .text.SD_READ:0000003c $d + /tmp/ccYgfTud.s:7203 .text.SD_REMOVE:00000000 $t + /tmp/ccYgfTud.s:7209 .text.SD_REMOVE:00000000 SD_REMOVE + /tmp/ccYgfTud.s:7277 .text.SD_REMOVE:00000034 $d + /tmp/ccYgfTud.s:7284 .text.USART_TX:00000000 $t + /tmp/ccYgfTud.s:7290 .text.USART_TX:00000000 USART_TX + /tmp/ccYgfTud.s:7365 .text.USART_TX:00000028 $d + /tmp/ccYgfTud.s:7370 .text.USART_TX_DMA:00000000 $t + /tmp/ccYgfTud.s:7376 .text.USART_TX_DMA:00000000 USART_TX_DMA + /tmp/ccYgfTud.s:7445 .text.USART_TX_DMA:00000038 $d + /tmp/ccYgfTud.s:7451 .text.Error_Handler:00000000 $t + /tmp/ccYgfTud.s:7457 .text.Error_Handler:00000000 Error_Handler + /tmp/ccYgfTud.s:7488 .text.MX_ADC1_Init:00000000 $t + /tmp/ccYgfTud.s:7493 .text.MX_ADC1_Init:00000000 MX_ADC1_Init + /tmp/ccYgfTud.s:7682 .text.MX_ADC1_Init:000000bc $d + /tmp/ccYgfTud.s:7689 .text.MX_ADC3_Init:00000000 $t + /tmp/ccYgfTud.s:7694 .text.MX_ADC3_Init:00000000 MX_ADC3_Init + /tmp/ccYgfTud.s:7801 .text.MX_ADC3_Init:00000060 $d + /tmp/ccYgfTud.s:7808 .text.MX_USART1_UART_Init:00000000 $t + /tmp/ccYgfTud.s:7813 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init + /tmp/ccYgfTud.s:8212 .text.MX_USART1_UART_Init:0000017c $d + /tmp/ccYgfTud.s:8221 .text.MX_TIM10_Init:00000000 $t + /tmp/ccYgfTud.s:8226 .text.MX_TIM10_Init:00000000 MX_TIM10_Init + /tmp/ccYgfTud.s:8275 .text.MX_TIM10_Init:00000024 $d + /tmp/ccYgfTud.s:8281 .text.MX_UART8_Init:00000000 $t + /tmp/ccYgfTud.s:8286 .text.MX_UART8_Init:00000000 MX_UART8_Init + /tmp/ccYgfTud.s:8347 .text.MX_UART8_Init:00000030 $d + /tmp/ccYgfTud.s:11592 .bss.huart8:00000000 huart8 + /tmp/ccYgfTud.s:8353 .text.MX_TIM8_Init:00000000 $t + /tmp/ccYgfTud.s:8358 .text.MX_TIM8_Init:00000000 MX_TIM8_Init + ARM GAS /tmp/ccYgfTud.s page 609 - /tmp/ccO46DoU.s:10031 .bss.UART_transmission_request:00000000 UART_transmission_request - /tmp/ccO46DoU.s:10025 .bss.State_Data:00000000 State_Data - /tmp/ccO46DoU.s:9966 .bss.temp16:00000000 temp16 - /tmp/ccO46DoU.s:8481 .text.main:000002c8 $t - /tmp/ccO46DoU.s:8884 .text.main:000004b4 $d - /tmp/ccO46DoU.s:9876 .bss.LD1_param:00000000 LD1_param - /tmp/ccO46DoU.s:9869 .bss.LD2_param:00000000 LD2_param - /tmp/ccO46DoU.s:10126 .bss.TO6_stop:00000000 TO6_stop - /tmp/ccO46DoU.s:10056 .bss.TIM10_period:00000000 TIM10_period - /tmp/ccO46DoU.s:8912 .text.main:00000514 $t - /tmp/ccO46DoU.s:9424 .text.main:000007cc $d - /tmp/ccO46DoU.s:9862 .bss.LD_blinker:00000000 LD_blinker - /tmp/ccO46DoU.s:9447 .text.main:00000820 $t - /tmp/ccO46DoU.s:9825 .text.main:000009d4 $d - /tmp/ccO46DoU.s:9852 .bss.task:00000000 $d - /tmp/ccO46DoU.s:9859 .bss.LD_blinker:00000000 $d - /tmp/ccO46DoU.s:9866 .bss.LD2_param:00000000 $d - /tmp/ccO46DoU.s:9873 .bss.LD1_param:00000000 $d - /tmp/ccO46DoU.s:9880 .bss.Def_setup:00000000 $d - /tmp/ccO46DoU.s:9887 .bss.Curr_setup:00000000 $d - /tmp/ccO46DoU.s:9894 .bss.LD2_def_setup:00000000 $d - /tmp/ccO46DoU.s:9901 .bss.LD1_def_setup:00000000 $d - /tmp/ccO46DoU.s:9908 .bss.LD2_curr_setup:00000000 $d - /tmp/ccO46DoU.s:9915 .bss.LD1_curr_setup:00000000 $d - /tmp/ccO46DoU.s:9922 .bss.sizeoffile:00000000 $d - /tmp/ccO46DoU.s:9929 .bss.fgoto:00000000 $d - /tmp/ccO46DoU.s:9936 .bss.test:00000000 $d - /tmp/ccO46DoU.s:9945 .bss.fresult:00000000 fresult - /tmp/ccO46DoU.s:9946 .bss.fresult:00000000 $d - /tmp/ccO46DoU.s:9949 .bss.COMMAND:00000000 $d - /tmp/ccO46DoU.s:9956 .bss.Long_Data:00000000 $d - /tmp/ccO46DoU.s:9963 .bss.temp16:00000000 $d - /tmp/ccO46DoU.s:9970 .bss.CS_result:00000000 $d - /tmp/ccO46DoU.s:9977 .bss.UART_header:00000000 $d - /tmp/ccO46DoU.s:9984 .bss.UART_rec_incr:00000000 $d - /tmp/ccO46DoU.s:9994 .bss.TIM10_coflag:00000000 $d - /tmp/ccO46DoU.s:10000 .bss.u_rx_flg:00000000 $d - /tmp/ccO46DoU.s:10006 .bss.u_tx_flg:00000000 $d - /tmp/ccO46DoU.s:10012 .bss.flg_tmt:00000000 $d - /tmp/ccO46DoU.s:10015 .bss.UART_DATA:00000000 $d - /tmp/ccO46DoU.s:10022 .bss.State_Data:00000000 $d - /tmp/ccO46DoU.s:10032 .bss.UART_transmission_request:00000000 $d - /tmp/ccO46DoU.s:10038 .bss.CPU_state_old:00000000 $d - /tmp/ccO46DoU.s:10044 .bss.CPU_state:00000000 $d - /tmp/ccO46DoU.s:10049 .bss.uart_buf:00000000 uart_buf - /tmp/ccO46DoU.s:10050 .bss.uart_buf:00000000 $d - /tmp/ccO46DoU.s:10053 .bss.TIM10_period:00000000 $d - /tmp/ccO46DoU.s:10060 .bss.TO10_counter:00000000 $d - /tmp/ccO46DoU.s:10067 .bss.TO10:00000000 $d - /tmp/ccO46DoU.s:10074 .bss.TO7_PID:00000000 $d - /tmp/ccO46DoU.s:10081 .bss.TO7_before:00000000 $d - /tmp/ccO46DoU.s:10088 .bss.TO7:00000000 $d - /tmp/ccO46DoU.s:10098 .bss.temp32:00000000 temp32 - /tmp/ccO46DoU.s:10095 .bss.temp32:00000000 $d - /tmp/ccO46DoU.s:10102 .bss.SD_SLIDE:00000000 $d - /tmp/ccO46DoU.s:10109 .bss.SD_SEEK:00000000 $d - /tmp/ccO46DoU.s:10116 .bss.TO6_uart:00000000 $d - ARM GAS /tmp/ccO46DoU.s page 572 + /tmp/ccYgfTud.s:8467 .text.MX_TIM8_Init:00000064 $d + /tmp/ccYgfTud.s:11613 .bss.htim8:00000000 htim8 + /tmp/ccYgfTud.s:8473 .text.MX_TIM11_Init:00000000 $t + /tmp/ccYgfTud.s:8478 .text.MX_TIM11_Init:00000000 MX_TIM11_Init + /tmp/ccYgfTud.s:8588 .text.MX_TIM11_Init:00000068 $d + /tmp/ccYgfTud.s:11599 .bss.htim11:00000000 htim11 + /tmp/ccYgfTud.s:8594 .text.MX_TIM4_Init:00000000 $t + /tmp/ccYgfTud.s:8599 .text.MX_TIM4_Init:00000000 MX_TIM4_Init + /tmp/ccYgfTud.s:8754 .text.MX_TIM4_Init:0000009c $d + /tmp/ccYgfTud.s:11620 .bss.htim4:00000000 htim4 + /tmp/ccYgfTud.s:8760 .text.SystemClock_Config:00000000 $t + /tmp/ccYgfTud.s:8766 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/ccYgfTud.s:8925 .text.SystemClock_Config:000000ac $d + /tmp/ccYgfTud.s:8931 .text.main:00000000 $t + /tmp/ccYgfTud.s:8937 .text.main:00000000 main + /tmp/ccYgfTud.s:9341 .text.main:00000140 $d + /tmp/ccYgfTud.s:9352 .text.main:0000016c $t + /tmp/ccYgfTud.s:9605 .text.main:00000278 $d + /tmp/ccYgfTud.s:11482 .bss.CPU_state_old:00000000 CPU_state_old + /tmp/ccYgfTud.s:11476 .bss.UART_transmission_request:00000000 UART_transmission_request + /tmp/ccYgfTud.s:11470 .bss.State_Data:00000000 State_Data + /tmp/ccYgfTud.s:11411 .bss.temp16:00000000 temp16 + /tmp/ccYgfTud.s:9629 .text.main:000002cc $t + /tmp/ccYgfTud.s:10187 .text.main:0000054c $d + /tmp/ccYgfTud.s:11321 .bss.LD1_param:00000000 LD1_param + /tmp/ccYgfTud.s:11314 .bss.LD2_param:00000000 LD2_param + /tmp/ccYgfTud.s:11571 .bss.TO6_stop:00000000 TO6_stop + /tmp/ccYgfTud.s:11501 .bss.TIM10_period:00000000 TIM10_period + /tmp/ccYgfTud.s:10215 .text.main:000005ac $t + /tmp/ccYgfTud.s:10727 .text.main:00000864 $d + /tmp/ccYgfTud.s:11307 .bss.LD_blinker:00000000 LD_blinker + /tmp/ccYgfTud.s:10750 .text.main:000008b8 $t + /tmp/ccYgfTud.s:11128 .text.main:00000a6c $d + /tmp/ccYgfTud.s:11154 .rodata.ad9102_example4_regval:00000000 $d + /tmp/ccYgfTud.s:11225 .rodata.ad9102_reg_addr:00000000 $d + /tmp/ccYgfTud.s:11297 .bss.task:00000000 $d + /tmp/ccYgfTud.s:11304 .bss.LD_blinker:00000000 $d + /tmp/ccYgfTud.s:11311 .bss.LD2_param:00000000 $d + /tmp/ccYgfTud.s:11318 .bss.LD1_param:00000000 $d + /tmp/ccYgfTud.s:11325 .bss.Def_setup:00000000 $d + /tmp/ccYgfTud.s:11332 .bss.Curr_setup:00000000 $d + /tmp/ccYgfTud.s:11339 .bss.LD2_def_setup:00000000 $d + /tmp/ccYgfTud.s:11346 .bss.LD1_def_setup:00000000 $d + /tmp/ccYgfTud.s:11353 .bss.LD2_curr_setup:00000000 $d + /tmp/ccYgfTud.s:11360 .bss.LD1_curr_setup:00000000 $d + /tmp/ccYgfTud.s:11367 .bss.sizeoffile:00000000 $d + /tmp/ccYgfTud.s:11374 .bss.fgoto:00000000 $d + /tmp/ccYgfTud.s:11381 .bss.test:00000000 $d + /tmp/ccYgfTud.s:11390 .bss.fresult:00000000 fresult + /tmp/ccYgfTud.s:11391 .bss.fresult:00000000 $d + /tmp/ccYgfTud.s:11394 .bss.COMMAND:00000000 $d + /tmp/ccYgfTud.s:11401 .bss.Long_Data:00000000 $d + /tmp/ccYgfTud.s:11408 .bss.temp16:00000000 $d + /tmp/ccYgfTud.s:11415 .bss.CS_result:00000000 $d + /tmp/ccYgfTud.s:11422 .bss.UART_header:00000000 $d + /tmp/ccYgfTud.s:11429 .bss.UART_rec_incr:00000000 $d + /tmp/ccYgfTud.s:11439 .bss.TIM10_coflag:00000000 $d + ARM GAS /tmp/ccYgfTud.s page 610 - /tmp/ccO46DoU.s:10123 .bss.TO6_stop:00000000 $d - /tmp/ccO46DoU.s:10130 .bss.TO6_before:00000000 $d - /tmp/ccO46DoU.s:10137 .bss.TO6:00000000 $d - /tmp/ccO46DoU.s:10144 .bss.huart8:00000000 $d - /tmp/ccO46DoU.s:10151 .bss.htim11:00000000 $d - /tmp/ccO46DoU.s:10158 .bss.htim10:00000000 $d - /tmp/ccO46DoU.s:10165 .bss.htim8:00000000 $d - /tmp/ccO46DoU.s:10172 .bss.htim4:00000000 $d - /tmp/ccO46DoU.s:10179 .bss.hsd1:00000000 $d - /tmp/ccO46DoU.s:10186 .bss.hadc3:00000000 $d - /tmp/ccO46DoU.s:10193 .bss.hadc1:00000000 $d + /tmp/ccYgfTud.s:11445 .bss.u_rx_flg:00000000 $d + /tmp/ccYgfTud.s:11451 .bss.u_tx_flg:00000000 $d + /tmp/ccYgfTud.s:11457 .bss.flg_tmt:00000000 $d + /tmp/ccYgfTud.s:11460 .bss.UART_DATA:00000000 $d + /tmp/ccYgfTud.s:11467 .bss.State_Data:00000000 $d + /tmp/ccYgfTud.s:11477 .bss.UART_transmission_request:00000000 $d + /tmp/ccYgfTud.s:11483 .bss.CPU_state_old:00000000 $d + /tmp/ccYgfTud.s:11489 .bss.CPU_state:00000000 $d + /tmp/ccYgfTud.s:11494 .bss.uart_buf:00000000 uart_buf + /tmp/ccYgfTud.s:11495 .bss.uart_buf:00000000 $d + /tmp/ccYgfTud.s:11498 .bss.TIM10_period:00000000 $d + /tmp/ccYgfTud.s:11505 .bss.TO10_counter:00000000 $d + /tmp/ccYgfTud.s:11512 .bss.TO10:00000000 $d + /tmp/ccYgfTud.s:11519 .bss.TO7_PID:00000000 $d + /tmp/ccYgfTud.s:11526 .bss.TO7_before:00000000 $d + /tmp/ccYgfTud.s:11533 .bss.TO7:00000000 $d + /tmp/ccYgfTud.s:11543 .bss.temp32:00000000 temp32 + /tmp/ccYgfTud.s:11540 .bss.temp32:00000000 $d + /tmp/ccYgfTud.s:11547 .bss.SD_SLIDE:00000000 $d + /tmp/ccYgfTud.s:11554 .bss.SD_SEEK:00000000 $d + /tmp/ccYgfTud.s:11561 .bss.TO6_uart:00000000 $d + /tmp/ccYgfTud.s:11568 .bss.TO6_stop:00000000 $d + /tmp/ccYgfTud.s:11575 .bss.TO6_before:00000000 $d + /tmp/ccYgfTud.s:11582 .bss.TO6:00000000 $d + /tmp/ccYgfTud.s:11589 .bss.huart8:00000000 $d + /tmp/ccYgfTud.s:11596 .bss.htim11:00000000 $d + /tmp/ccYgfTud.s:11603 .bss.htim10:00000000 $d + /tmp/ccYgfTud.s:11610 .bss.htim8:00000000 $d + /tmp/ccYgfTud.s:11617 .bss.htim4:00000000 $d + /tmp/ccYgfTud.s:11624 .bss.hsd1:00000000 $d + /tmp/ccYgfTud.s:11631 .bss.hadc3:00000000 $d + /tmp/ccYgfTud.s:11638 .bss.hadc1:00000000 $d UNDEFINED SYMBOLS HAL_GPIO_WritePin @@ -34278,6 +36592,9 @@ HAL_ADC_Init HAL_ADC_ConfigChannel HAL_RCCEx_PeriphCLKConfig LL_USART_Init + ARM GAS /tmp/ccYgfTud.s page 611 + + HAL_TIM_Base_Init HAL_UART_Init HAL_TIM_ConfigClockSource diff --git a/build/main.o b/build/main.o index cc8bb09..1b75b56 100644 Binary files a/build/main.o and b/build/main.o differ diff --git a/build/sd_diskio.lst b/build/sd_diskio.lst index ed9a6f5..57c3ba7 100644 --- a/build/sd_diskio.lst +++ b/build/sd_diskio.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccYOHnte.s page 1 +ARM GAS /tmp/cc8X4L5w.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 29:Src/sd_diskio.c **** #include "sd_diskio.h" 30:Src/sd_diskio.c **** 31:Src/sd_diskio.c **** /* Private typedef -----------------------------------------------------------*/ - ARM GAS /tmp/ccYOHnte.s page 2 + ARM GAS /tmp/cc8X4L5w.s page 2 32:Src/sd_diskio.c **** /* Private define ------------------------------------------------------------*/ @@ -118,7 +118,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 86:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */ 87:Src/sd_diskio.c **** 88:Src/sd_diskio.c **** /* Private functions ---------------------------------------------------------*/ - ARM GAS /tmp/ccYOHnte.s page 3 + ARM GAS /tmp/cc8X4L5w.s page 3 89:Src/sd_diskio.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 71 .global SD_initialize 72 .syntax unified 73 .thumb - ARM GAS /tmp/ccYOHnte.s page 4 + ARM GAS /tmp/cc8X4L5w.s page 4 74 .thumb_func @@ -238,7 +238,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 106 .loc 1 123 1 view .LVU21 107 0014 10BD pop {r4, pc} 108 .LVL4: - ARM GAS /tmp/ccYOHnte.s page 5 + ARM GAS /tmp/cc8X4L5w.s page 5 109 .L9: @@ -298,7 +298,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 152 .cfi_endproc 153 .LFE1185: 155 .section .text.SD_read,"ax",%progbits - ARM GAS /tmp/ccYOHnte.s page 6 + ARM GAS /tmp/cc8X4L5w.s page 6 156 .align 1 @@ -358,7 +358,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 193 .L16: 152:Src/sd_diskio.c **** (uint32_t) (sector), 153:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK) - ARM GAS /tmp/ccYOHnte.s page 7 + ARM GAS /tmp/cc8X4L5w.s page 7 154:Src/sd_diskio.c **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 173:Src/sd_diskio.c **** * @param count: Number of sectors to write (1..128) 174:Src/sd_diskio.c **** * @retval DRESULT: Operation result 175:Src/sd_diskio.c **** */ - ARM GAS /tmp/ccYOHnte.s page 8 + ARM GAS /tmp/cc8X4L5w.s page 8 176:Src/sd_diskio.c **** #if _USE_WRITE == 1 @@ -478,7 +478,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 264 001a FAD1 bne .L21 265 .L20: 266 .LVL24: - ARM GAS /tmp/ccYOHnte.s page 9 + ARM GAS /tmp/cc8X4L5w.s page 9 190:Src/sd_diskio.c **** res = RES_OK; @@ -538,7 +538,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 302 .cfi_def_cfa_offset 48 210:Src/sd_diskio.c **** DRESULT res = RES_ERROR; 303 .loc 1 210 3 is_stmt 1 view .LVU64 - ARM GAS /tmp/ccYOHnte.s page 10 + ARM GAS /tmp/cc8X4L5w.s page 10 304 .LVL27: @@ -598,7 +598,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 341 002a 0DE0 b .L25 342 .LVL31: 343 .L28: - ARM GAS /tmp/ccYOHnte.s page 11 + ARM GAS /tmp/cc8X4L5w.s page 11 228:Src/sd_diskio.c **** @@ -658,7 +658,7 @@ ARM GAS /tmp/ccYOHnte.s page 1 245:Src/sd_diskio.c **** } 246:Src/sd_diskio.c **** 247:Src/sd_diskio.c **** return res; - ARM GAS /tmp/ccYOHnte.s page 12 + ARM GAS /tmp/cc8X4L5w.s page 12 248:Src/sd_diskio.c **** } @@ -708,31 +708,31 @@ ARM GAS /tmp/ccYOHnte.s page 1 427 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 428 .file 10 "Inc/bsp_driver_sd.h" 429 .file 11 "Inc/sd_diskio.h" - ARM GAS /tmp/ccYOHnte.s page 13 + ARM GAS /tmp/cc8X4L5w.s page 13 DEFINED SYMBOLS *ABS*:00000000 sd_diskio.c - /tmp/ccYOHnte.s:20 .text.SD_CheckStatus:00000000 $t - /tmp/ccYOHnte.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus - /tmp/ccYOHnte.s:65 .text.SD_CheckStatus:00000020 $d - /tmp/ccYOHnte.s:416 .data.Stat:00000000 Stat - /tmp/ccYOHnte.s:70 .text.SD_initialize:00000000 $t - /tmp/ccYOHnte.s:76 .text.SD_initialize:00000000 SD_initialize - /tmp/ccYOHnte.s:122 .text.SD_initialize:00000024 $d - /tmp/ccYOHnte.s:127 .text.SD_status:00000000 $t - /tmp/ccYOHnte.s:133 .text.SD_status:00000000 SD_status - /tmp/ccYOHnte.s:156 .text.SD_read:00000000 $t - /tmp/ccYOHnte.s:162 .text.SD_read:00000000 SD_read - /tmp/ccYOHnte.s:218 .text.SD_write:00000000 $t - /tmp/ccYOHnte.s:224 .text.SD_write:00000000 SD_write - /tmp/ccYOHnte.s:280 .text.SD_ioctl:00000000 $t - /tmp/ccYOHnte.s:286 .text.SD_ioctl:00000000 SD_ioctl - /tmp/ccYOHnte.s:320 .text.SD_ioctl:00000018 $d - /tmp/ccYOHnte.s:324 .text.SD_ioctl:0000001c $t - /tmp/ccYOHnte.s:398 .text.SD_ioctl:00000054 $d - /tmp/ccYOHnte.s:407 .rodata.SD_Driver:00000000 SD_Driver - /tmp/ccYOHnte.s:404 .rodata.SD_Driver:00000000 $d + /tmp/cc8X4L5w.s:20 .text.SD_CheckStatus:00000000 $t + /tmp/cc8X4L5w.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus + /tmp/cc8X4L5w.s:65 .text.SD_CheckStatus:00000020 $d + /tmp/cc8X4L5w.s:416 .data.Stat:00000000 Stat + /tmp/cc8X4L5w.s:70 .text.SD_initialize:00000000 $t + /tmp/cc8X4L5w.s:76 .text.SD_initialize:00000000 SD_initialize + /tmp/cc8X4L5w.s:122 .text.SD_initialize:00000024 $d + /tmp/cc8X4L5w.s:127 .text.SD_status:00000000 $t + /tmp/cc8X4L5w.s:133 .text.SD_status:00000000 SD_status + /tmp/cc8X4L5w.s:156 .text.SD_read:00000000 $t + /tmp/cc8X4L5w.s:162 .text.SD_read:00000000 SD_read + /tmp/cc8X4L5w.s:218 .text.SD_write:00000000 $t + /tmp/cc8X4L5w.s:224 .text.SD_write:00000000 SD_write + /tmp/cc8X4L5w.s:280 .text.SD_ioctl:00000000 $t + /tmp/cc8X4L5w.s:286 .text.SD_ioctl:00000000 SD_ioctl + /tmp/cc8X4L5w.s:320 .text.SD_ioctl:00000018 $d + /tmp/cc8X4L5w.s:324 .text.SD_ioctl:0000001c $t + /tmp/cc8X4L5w.s:398 .text.SD_ioctl:00000054 $d + /tmp/cc8X4L5w.s:407 .rodata.SD_Driver:00000000 SD_Driver + /tmp/cc8X4L5w.s:404 .rodata.SD_Driver:00000000 $d UNDEFINED SYMBOLS BSP_SD_GetCardState diff --git a/build/sd_diskio.o b/build/sd_diskio.o index aa128f7..181af8a 100644 Binary files a/build/sd_diskio.o and b/build/sd_diskio.o differ diff --git a/build/startup_stm32f767xx.o b/build/startup_stm32f767xx.o index 01af7b7..d34120c 100644 Binary files a/build/startup_stm32f767xx.o and b/build/startup_stm32f767xx.o differ diff --git a/build/stm32f7xx_hal_msp.lst b/build/stm32f7xx_hal_msp.lst index 3edf55b..1973483 100644 --- a/build/stm32f7xx_hal_msp.lst +++ b/build/stm32f7xx_hal_msp.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cc5mtMNQ.s page 1 +ARM GAS /tmp/ccehMqBJ.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 29:Src/stm32f7xx_hal_msp.c **** 30:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TD */ 31:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/cc5mtMNQ.s page 2 + ARM GAS /tmp/ccehMqBJ.s page 2 32:Src/stm32f7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ @@ -118,7 +118,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 41 0004 1A6C ldr r2, [r3, #64] 42 0006 42F08052 orr r2, r2, #268435456 43 000a 1A64 str r2, [r3, #64] - ARM GAS /tmp/cc5mtMNQ.s page 3 + ARM GAS /tmp/ccehMqBJ.s page 3 44 .loc 1 72 3 view .LVU4 @@ -178,7 +178,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 83:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP Initialization 84:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example 85:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer - ARM GAS /tmp/cc5mtMNQ.s page 4 + ARM GAS /tmp/ccehMqBJ.s page 4 86:Src/stm32f7xx_hal_msp.c **** * @retval None @@ -238,7 +238,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 111:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 112:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 113:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/cc5mtMNQ.s page 5 + ARM GAS /tmp/ccehMqBJ.s page 5 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2; @@ -298,7 +298,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 130 .cfi_def_cfa_offset 12 131 @ sp needed 132 0020 30BD pop {r4, r5, pc} - ARM GAS /tmp/cc5mtMNQ.s page 6 + ARM GAS /tmp/ccehMqBJ.s page 6 133 .LVL2: @@ -358,7 +358,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 172 0048 1A6B ldr r2, [r3, #48] 173 004a 42F00102 orr r2, r2, #1 174 004e 1A63 str r2, [r3, #48] - ARM GAS /tmp/cc5mtMNQ.s page 7 + ARM GAS /tmp/ccehMqBJ.s page 7 100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); @@ -418,7 +418,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 213 .loc 1 114 5 is_stmt 1 view .LVU55 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - ARM GAS /tmp/cc5mtMNQ.s page 8 + ARM GAS /tmp/ccehMqBJ.s page 8 214 .loc 1 114 25 is_stmt 0 view .LVU56 @@ -478,7 +478,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 254 .LVL9: 255 .L10: 137:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/cc5mtMNQ.s page 9 + ARM GAS /tmp/ccehMqBJ.s page 9 256 .loc 1 137 5 view .LVU71 @@ -538,7 +538,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 145:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 295 .loc 1 145 5 is_stmt 1 view .LVU87 146:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/cc5mtMNQ.s page 10 + ARM GAS /tmp/ccehMqBJ.s page 10 296 .loc 1 146 5 view .LVU88 @@ -598,7 +598,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 340 @ args = 0, pretend = 0, frame = 0 341 @ frame_needed = 0, uses_anonymous_args = 0 342 .loc 1 165 1 is_stmt 0 view .LVU94 - ARM GAS /tmp/cc5mtMNQ.s page 11 + ARM GAS /tmp/ccehMqBJ.s page 11 343 0000 08B5 push {r3, lr} @@ -658,7 +658,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 201:Src/stm32f7xx_hal_msp.c **** { 202:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 0 */ 203:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/cc5mtMNQ.s page 12 + ARM GAS /tmp/ccehMqBJ.s page 12 204:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 0 */ @@ -718,7 +718,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 387 .LVL20: 388 0036 EBE7 b .L13 389 .LVL21: - ARM GAS /tmp/cc5mtMNQ.s page 13 + ARM GAS /tmp/ccehMqBJ.s page 13 390 .L18: @@ -778,7 +778,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 434 .cfi_def_cfa_offset 20 435 .cfi_offset 4, -20 436 .cfi_offset 5, -16 - ARM GAS /tmp/cc5mtMNQ.s page 14 + ARM GAS /tmp/ccehMqBJ.s page 14 437 .cfi_offset 6, -12 @@ -838,7 +838,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); 260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration 261:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0 - ARM GAS /tmp/cc5mtMNQ.s page 15 + ARM GAS /tmp/ccehMqBJ.s page 15 262:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1 @@ -898,7 +898,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 489 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 490 .LVL29: 250:Src/stm32f7xx_hal_msp.c **** { - ARM GAS /tmp/cc5mtMNQ.s page 16 + ARM GAS /tmp/ccehMqBJ.s page 16 491 .loc 1 250 8 discriminator 1 view .LVU127 @@ -958,7 +958,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 530 005c 1A6B ldr r2, [r3, #48] 531 005e 42F00802 orr r2, r2, #8 532 0062 1A63 str r2, [r3, #48] - ARM GAS /tmp/cc5mtMNQ.s page 17 + ARM GAS /tmp/ccehMqBJ.s page 17 259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 570 008c 0423 movs r3, #4 571 008e 2793 str r3, [sp, #156] 277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; - ARM GAS /tmp/cc5mtMNQ.s page 18 + ARM GAS /tmp/ccehMqBJ.s page 18 572 .loc 1 277 5 is_stmt 1 view .LVU160 @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 292:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP De-Initialization 293:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example 294:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer - ARM GAS /tmp/cc5mtMNQ.s page 19 + ARM GAS /tmp/ccehMqBJ.s page 19 295:Src/stm32f7xx_hal_msp.c **** * @retval None @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 305:Src/stm32f7xx_hal_msp.c **** 640 .loc 1 305 5 is_stmt 1 view .LVU177 641 000c 084A ldr r2, .L33+4 - ARM GAS /tmp/cc5mtMNQ.s page 20 + ARM GAS /tmp/ccehMqBJ.s page 20 642 000e 536C ldr r3, [r2, #68] @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 686 .cfi_def_cfa_offset 4 687 .cfi_offset 14, -4 688 0002 85B0 sub sp, sp, #20 - ARM GAS /tmp/cc5mtMNQ.s page 21 + ARM GAS /tmp/ccehMqBJ.s page 21 689 .LCFI13: @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 370:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM10_MspInit 1 */ 371:Src/stm32f7xx_hal_msp.c **** 372:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM10_MspInit 1 */ - ARM GAS /tmp/cc5mtMNQ.s page 22 + ARM GAS /tmp/ccehMqBJ.s page 22 373:Src/stm32f7xx_hal_msp.c **** } @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 740 .LBE13: 341:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspInit 1 */ 741 .loc 1 341 5 view .LVU199 - ARM GAS /tmp/cc5mtMNQ.s page 23 + ARM GAS /tmp/ccehMqBJ.s page 23 742 0038 F1E7 b .L35 @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 783 .loc 1 366 5 view .LVU212 784 006a 5B6C ldr r3, [r3, #68] 785 006c 03F40033 and r3, r3, #131072 - ARM GAS /tmp/cc5mtMNQ.s page 24 + ARM GAS /tmp/ccehMqBJ.s page 24 786 0070 0293 str r3, [sp, #8] @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 827 .loc 1 382 5 is_stmt 0 view .LVU225 828 00a0 FFF7FEFF bl HAL_NVIC_SetPriority 829 .LVL53: - ARM GAS /tmp/cc5mtMNQ.s page 25 + ARM GAS /tmp/ccehMqBJ.s page 25 383:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspInit 1 */ @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 880 .loc 1 394 5 view .LVU234 881 0012 1A4A ldr r2, .L53 882 0014 9342 cmp r3, r2 - ARM GAS /tmp/cc5mtMNQ.s page 26 + ARM GAS /tmp/ccehMqBJ.s page 26 883 0016 05D0 beq .L51 @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 895 .cfi_def_cfa_offset 4 896 @ sp needed 897 0020 5DF804FB ldr pc, [sp], #4 - ARM GAS /tmp/cc5mtMNQ.s page 27 + ARM GAS /tmp/ccehMqBJ.s page 27 898 .LVL57: @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 936 0048 FFF7FEFF bl HAL_GPIO_Init 937 .LVL59: 938 004c E7E7 b .L47 - ARM GAS /tmp/cc5mtMNQ.s page 28 + ARM GAS /tmp/ccehMqBJ.s page 28 939 .LVL60: @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 977 .LVL62: 978 .loc 1 436 1 view .LVU270 979 0078 D1E7 b .L47 - ARM GAS /tmp/cc5mtMNQ.s page 29 + ARM GAS /tmp/ccehMqBJ.s page 29 980 .L54: @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 456:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM8) 1017 .loc 1 456 8 is_stmt 1 view .LVU276 1018 .loc 1 456 10 is_stmt 0 view .LVU277 - ARM GAS /tmp/cc5mtMNQ.s page 30 + ARM GAS /tmp/ccehMqBJ.s page 30 1019 000a 184A ldr r2, .L65+4 @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 496:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM11_MspDeInit 1 */ 497:Src/stm32f7xx_hal_msp.c **** } 498:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/cc5mtMNQ.s page 31 + ARM GAS /tmp/ccehMqBJ.s page 31 499:Src/stm32f7xx_hal_msp.c **** } @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 1078 .loc 1 493 5 view .LVU291 1079 0060 1A20 movs r0, #26 1080 .LVL72: - ARM GAS /tmp/cc5mtMNQ.s page 32 + ARM GAS /tmp/ccehMqBJ.s page 32 493:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM11_MspDeInit 1 */ @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 1126 000e 2A91 str r1, [sp, #168] 1127 0010 2B91 str r1, [sp, #172] 510:Src/stm32f7xx_hal_msp.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - ARM GAS /tmp/cc5mtMNQ.s page 33 + ARM GAS /tmp/ccehMqBJ.s page 33 1128 .loc 1 510 3 is_stmt 1 view .LVU298 @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 1145 0022 2CB0 add sp, sp, #176 1146 .LCFI23: 1147 .cfi_remember_state - ARM GAS /tmp/cc5mtMNQ.s page 34 + ARM GAS /tmp/ccehMqBJ.s page 34 1148 .cfi_def_cfa_offset 8 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 1187 .loc 1 529 5 view .LVU319 1188 0048 1A6B ldr r2, [r3, #48] 1189 004a 42F01002 orr r2, r2, #16 - ARM GAS /tmp/cc5mtMNQ.s page 35 + ARM GAS /tmp/ccehMqBJ.s page 35 1190 004e 1A63 str r2, [r3, #48] @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 1229 007a DBE7 b .L69 1230 .L74: 1231 .align 2 - ARM GAS /tmp/cc5mtMNQ.s page 36 + ARM GAS /tmp/ccehMqBJ.s page 36 1232 .L73: @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 568:Src/stm32f7xx_hal_msp.c **** */ 569:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1); 570:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/cc5mtMNQ.s page 37 + ARM GAS /tmp/ccehMqBJ.s page 37 571:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN UART8_MspDeInit 1 */ @@ -2216,41 +2216,41 @@ ARM GAS /tmp/cc5mtMNQ.s page 1 1312 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h" 1313 .file 18 "Inc/main.h" 1314 .file 19 "" - ARM GAS /tmp/cc5mtMNQ.s page 38 + ARM GAS /tmp/ccehMqBJ.s page 38 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_msp.c - /tmp/cc5mtMNQ.s:20 .text.HAL_MspInit:00000000 $t - /tmp/cc5mtMNQ.s:26 .text.HAL_MspInit:00000000 HAL_MspInit - /tmp/cc5mtMNQ.s:76 .text.HAL_MspInit:0000002c $d - /tmp/cc5mtMNQ.s:81 .text.HAL_ADC_MspInit:00000000 $t - /tmp/cc5mtMNQ.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit - /tmp/cc5mtMNQ.s:318 .text.HAL_ADC_MspInit:000000f4 $d - /tmp/cc5mtMNQ.s:329 .text.HAL_ADC_MspDeInit:00000000 $t - /tmp/cc5mtMNQ.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit - /tmp/cc5mtMNQ.s:408 .text.HAL_ADC_MspDeInit:00000050 $d - /tmp/cc5mtMNQ.s:418 .text.HAL_SD_MspInit:00000000 $t - /tmp/cc5mtMNQ.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit - /tmp/cc5mtMNQ.s:600 .text.HAL_SD_MspInit:000000a8 $d - /tmp/cc5mtMNQ.s:608 .text.HAL_SD_MspDeInit:00000000 $t - /tmp/cc5mtMNQ.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit - /tmp/cc5mtMNQ.s:662 .text.HAL_SD_MspDeInit:0000002c $d - /tmp/cc5mtMNQ.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t - /tmp/cc5mtMNQ.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit - /tmp/cc5mtMNQ.s:839 .text.HAL_TIM_Base_MspInit:000000ac $d - /tmp/cc5mtMNQ.s:848 .text.HAL_TIM_MspPostInit:00000000 $t - /tmp/cc5mtMNQ.s:854 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit - /tmp/cc5mtMNQ.s:983 .text.HAL_TIM_MspPostInit:0000007c $d - /tmp/cc5mtMNQ.s:991 .text.HAL_TIM_Base_MspDeInit:00000000 $t - /tmp/cc5mtMNQ.s:997 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit - /tmp/cc5mtMNQ.s:1089 .text.HAL_TIM_Base_MspDeInit:00000068 $d - /tmp/cc5mtMNQ.s:1097 .text.HAL_UART_MspInit:00000000 $t - /tmp/cc5mtMNQ.s:1103 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit - /tmp/cc5mtMNQ.s:1233 .text.HAL_UART_MspInit:0000007c $d - /tmp/cc5mtMNQ.s:1240 .text.HAL_UART_MspDeInit:00000000 $t - /tmp/cc5mtMNQ.s:1246 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit - /tmp/cc5mtMNQ.s:1289 .text.HAL_UART_MspDeInit:00000020 $d + /tmp/ccehMqBJ.s:20 .text.HAL_MspInit:00000000 $t + /tmp/ccehMqBJ.s:26 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/ccehMqBJ.s:76 .text.HAL_MspInit:0000002c $d + /tmp/ccehMqBJ.s:81 .text.HAL_ADC_MspInit:00000000 $t + /tmp/ccehMqBJ.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit + /tmp/ccehMqBJ.s:318 .text.HAL_ADC_MspInit:000000f4 $d + /tmp/ccehMqBJ.s:329 .text.HAL_ADC_MspDeInit:00000000 $t + /tmp/ccehMqBJ.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit + /tmp/ccehMqBJ.s:408 .text.HAL_ADC_MspDeInit:00000050 $d + /tmp/ccehMqBJ.s:418 .text.HAL_SD_MspInit:00000000 $t + /tmp/ccehMqBJ.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit + /tmp/ccehMqBJ.s:600 .text.HAL_SD_MspInit:000000a8 $d + /tmp/ccehMqBJ.s:608 .text.HAL_SD_MspDeInit:00000000 $t + /tmp/ccehMqBJ.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit + /tmp/ccehMqBJ.s:662 .text.HAL_SD_MspDeInit:0000002c $d + /tmp/ccehMqBJ.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t + /tmp/ccehMqBJ.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit + /tmp/ccehMqBJ.s:839 .text.HAL_TIM_Base_MspInit:000000ac $d + /tmp/ccehMqBJ.s:848 .text.HAL_TIM_MspPostInit:00000000 $t + /tmp/ccehMqBJ.s:854 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit + /tmp/ccehMqBJ.s:983 .text.HAL_TIM_MspPostInit:0000007c $d + /tmp/ccehMqBJ.s:991 .text.HAL_TIM_Base_MspDeInit:00000000 $t + /tmp/ccehMqBJ.s:997 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit + /tmp/ccehMqBJ.s:1089 .text.HAL_TIM_Base_MspDeInit:00000068 $d + /tmp/ccehMqBJ.s:1097 .text.HAL_UART_MspInit:00000000 $t + /tmp/ccehMqBJ.s:1103 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit + /tmp/ccehMqBJ.s:1233 .text.HAL_UART_MspInit:0000007c $d + /tmp/ccehMqBJ.s:1240 .text.HAL_UART_MspDeInit:00000000 $t + /tmp/ccehMqBJ.s:1246 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit + /tmp/ccehMqBJ.s:1289 .text.HAL_UART_MspDeInit:00000020 $d UNDEFINED SYMBOLS HAL_GPIO_Init diff --git a/build/stm32f7xx_hal_msp.o b/build/stm32f7xx_hal_msp.o index 2270d73..f0c305b 100644 Binary files a/build/stm32f7xx_hal_msp.o and b/build/stm32f7xx_hal_msp.o differ diff --git a/build/stm32f7xx_it.lst b/build/stm32f7xx_it.lst index 400b9aa..94f5d85 100644 --- a/build/stm32f7xx_it.lst +++ b/build/stm32f7xx_it.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccvzubVv.s page 1 +ARM GAS /tmp/ccdl7gEi.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 29:Src/stm32f7xx_it.c **** 30:Src/stm32f7xx_it.c **** /* USER CODE END TD */ 31:Src/stm32f7xx_it.c **** - ARM GAS /tmp/ccvzubVv.s page 2 + ARM GAS /tmp/ccdl7gEi.s page 2 32:Src/stm32f7xx_it.c **** /* Private define ------------------------------------------------------------*/ @@ -118,7 +118,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 33 @ link register save eliminated. 34 .L2: 81:Src/stm32f7xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ - ARM GAS /tmp/ccvzubVv.s page 3 + ARM GAS /tmp/ccdl7gEi.s page 3 82:Src/stm32f7xx_it.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 68 .syntax unified 69 .thumb 70 .thumb_func - ARM GAS /tmp/ccvzubVv.s page 4 + ARM GAS /tmp/ccdl7gEi.s page 4 72 MemManage_Handler: @@ -238,7 +238,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 127:Src/stm32f7xx_it.c **** 128:Src/stm32f7xx_it.c **** /* USER CODE END BusFault_IRQn 0 */ 129:Src/stm32f7xx_it.c **** while (1) - ARM GAS /tmp/ccvzubVv.s page 5 + ARM GAS /tmp/ccdl7gEi.s page 5 104 .loc 1 129 3 view .LVU13 @@ -298,7 +298,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 141 SVC_Handler: 142 .LFB1188: 149:Src/stm32f7xx_it.c **** } - ARM GAS /tmp/ccvzubVv.s page 6 + ARM GAS /tmp/ccdl7gEi.s page 6 150:Src/stm32f7xx_it.c **** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 174 .global PendSV_Handler 175 .syntax unified 176 .thumb - ARM GAS /tmp/ccvzubVv.s page 7 + ARM GAS /tmp/ccdl7gEi.s page 7 177 .thumb_func @@ -418,7 +418,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 211 .LVL0: 199:Src/stm32f7xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */ 200:Src/stm32f7xx_it.c **** - ARM GAS /tmp/ccvzubVv.s page 8 + ARM GAS /tmp/ccdl7gEi.s page 8 201:Src/stm32f7xx_it.c **** /* USER CODE END SysTick_IRQn 1 */ @@ -478,7 +478,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 244 000e 08BD pop {r3, pc} 245 .L19: 246 .align 2 - ARM GAS /tmp/ccvzubVv.s page 9 + ARM GAS /tmp/ccdl7gEi.s page 9 247 .L18: @@ -538,7 +538,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 239:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */ 240:Src/stm32f7xx_it.c **** 241:Src/stm32f7xx_it.c **** /* USER CODE END TIM1_UP_TIM10_IRQn 1 */ - ARM GAS /tmp/ccvzubVv.s page 10 + ARM GAS /tmp/ccdl7gEi.s page 10 242:Src/stm32f7xx_it.c **** } @@ -598,7 +598,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 333 .loc 1 251 2 is_stmt 1 view .LVU47 334 .loc 1 251 7 is_stmt 0 view .LVU48 335 000c 0749 ldr r1, .L28+4 - ARM GAS /tmp/ccvzubVv.s page 11 + ARM GAS /tmp/ccdl7gEi.s page 11 336 000e 0A68 ldr r2, [r1] @@ -658,7 +658,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 269:Src/stm32f7xx_it.c **** 270:Src/stm32f7xx_it.c **** /* USER CODE END TIM2_IRQn 1 */ 271:Src/stm32f7xx_it.c **** } - ARM GAS /tmp/ccvzubVv.s page 12 + ARM GAS /tmp/ccdl7gEi.s page 12 375 .loc 1 271 1 view .LVU56 @@ -718,7 +718,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 314:Src/stm32f7xx_it.c **** //UART_transmission_busy = 0; 315:Src/stm32f7xx_it.c **** } 316:Src/stm32f7xx_it.c **** } - ARM GAS /tmp/ccvzubVv.s page 13 + ARM GAS /tmp/ccdl7gEi.s page 13 317:Src/stm32f7xx_it.c **** } @@ -778,7 +778,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 411 .LVL5: 349:Src/stm32f7xx_it.c **** HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_RESET); 412 .loc 1 349 4 view .LVU62 - ARM GAS /tmp/ccvzubVv.s page 14 + ARM GAS /tmp/ccdl7gEi.s page 14 413 0016 0C4C ldr r4, .L36 @@ -838,7 +838,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 452 .L36: 453 0048 00000000 .word LD_blinker 454 004c 00000000 .word htim8 - ARM GAS /tmp/ccvzubVv.s page 15 + ARM GAS /tmp/ccdl7gEi.s page 15 455 .cfi_endproc @@ -898,7 +898,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 494 .cfi_offset 14, -4 379:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM6_DAC_IRQn 0 */ 380:Src/stm32f7xx_it.c **** - ARM GAS /tmp/ccvzubVv.s page 16 + ARM GAS /tmp/ccdl7gEi.s page 16 381:Src/stm32f7xx_it.c **** /* USER CODE END TIM6_DAC_IRQn 0 */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 0: TIMx_CH1 */ 48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 1: TIMx_CH1N */ 49:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 2: TIMx_CH2 */ - ARM GAS /tmp/ccvzubVv.s page 17 + ARM GAS /tmp/ccdl7gEi.s page 17 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 3: TIMx_CH2N */ @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 5U, /* 5: OIS3N */ 105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 6U, /* 6: OIS4 */ 106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 7: OIS5 */ - ARM GAS /tmp/ccvzubVv.s page 18 + ARM GAS /tmp/ccdl7gEi.s page 18 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 10U /* 8: OIS6 */ @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 - ARM GAS /tmp/ccvzubVv.s page 19 + ARM GAS /tmp/ccdl7gEi.s page 19 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Auto-Reload Register at the next update event. 219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter must be a number between Min_Data=0x0000 and Max_ 220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Some timer instances may support 32 bits counters. In that case - ARM GAS /tmp/ccvzubVv.s page 20 + ARM GAS /tmp/ccdl7gEi.s page 20 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** be a number between 0x0000 and 0xFFFFFFFF. @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCPolarity; /*!< Specifies the output polarity. 277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. - ARM GAS /tmp/ccvzubVv.s page 21 + ARM GAS /tmp/ccdl7gEi.s page 21 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_IC_InitTypeDef; 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccvzubVv.s page 22 + ARM GAS /tmp/ccdl7gEi.s page 22 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function - ARM GAS /tmp/ccvzubVv.s page 23 + ARM GAS /tmp/ccdl7gEi.s page 23 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/ @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state. 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OSSI 448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccvzubVv.s page 24 + ARM GAS /tmp/ccdl7gEi.s page 24 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve 505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ - ARM GAS /tmp/ccvzubVv.s page 25 + ARM GAS /tmp/ccdl7gEi.s page 25 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC1OF TIM_SR_CC1OF /*!< Capture/Compare 1 overcapt 561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC2OF TIM_SR_CC2OF /*!< Capture/Compare 2 overcapt 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC3OF TIM_SR_CC3OF /*!< Capture/Compare 3 overcapt - ARM GAS /tmp/ccvzubVv.s page 26 + ARM GAS /tmp/ccdl7gEi.s page 26 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4OF TIM_SR_CC4OF /*!< Capture/Compare 4 overcapt @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_REGULAR 0x00000000U /*!< Counter overflow/underflow 618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /*!< Only counter overflow/unde 619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccvzubVv.s page 27 + ARM GAS /tmp/ccdl7gEi.s page 27 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCDMAREQUEST_CC 0x00000000U /*!< CCx DMA request sent when 676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /*!< CCx DMA requests sent when - ARM GAS /tmp/ccvzubVv.s page 28 + ARM GAS /tmp/ccdl7gEi.s page 28 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FROZEN 0x00000000U 732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0 733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1 - ARM GAS /tmp/ccvzubVv.s page 29 + ARM GAS /tmp/ccdl7gEi.s page 29 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ICPSC Input Configuration Prescaler 789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccvzubVv.s page 30 + ARM GAS /tmp/ccdl7gEi.s page 30 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV1 0x00000000U /*!< No prescaler, ca @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ENCODERMODE_X2_TI1 TIM_SMCR_SMS_0 846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ENCODERMODE_X2_TI2 TIM_SMCR_SMS_1 847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ENCODERMODE_X4_TI12 (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0) - ARM GAS /tmp/ccvzubVv.s page 31 + ARM GAS /tmp/ccdl7gEi.s page 31 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TS Trigger Selection 903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccvzubVv.s page 32 + ARM GAS /tmp/ccdl7gEi.s page 32 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR0 0x00000000U @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_POLARITY break polarity - ARM GAS /tmp/ccvzubVv.s page 33 + ARM GAS /tmp/ccdl7gEi.s page 33 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV16_N6 0x00B00000U /*!< fSAMPLING=fDTS/16, N=6 */ 1017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV16_N8 0x00C00000U /*!< fSAMPLING=fDTS/16, N=8 */ 1018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV32_N5 0x00D00000U /*!< fSAMPLING=fDTS/32, N=5 */ - ARM GAS /tmp/ccvzubVv.s page 34 + ARM GAS /tmp/ccdl7gEi.s page 34 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_FILTER_FDIV32_N6 0x00E00000U /*!< fSAMPLING=fDTS/32, N=6 */ @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CR1 0x00000000U - ARM GAS /tmp/ccvzubVv.s page 35 + ARM GAS /tmp/ccdl7gEi.s page 35 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CR2 TIM_DCR_DBA_0 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TIM2_ITR1_RMP_TIM8 TIM2 Internal Trigger1 Remap TIM8 1132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ - ARM GAS /tmp/ccvzubVv.s page 36 + ARM GAS /tmp/ccdl7gEi.s page 36 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Read a value in TIM register. 1188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __INSTANCE__ TIM Instance 1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __REG__ Register to be read - ARM GAS /tmp/ccvzubVv.s page 37 + ARM GAS /tmp/ccdl7gEi.s page 37 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Register value @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the auto-reload value to achieve the required output signal fr 1245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000); 1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) - ARM GAS /tmp/ccvzubVv.s page 38 + ARM GAS /tmp/ccdl7gEi.s page 38 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccvzubVv.s page 39 + ARM GAS /tmp/ccdl7gEi.s page 39 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Time_Base Time Base configuration @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UDIS); 1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccvzubVv.s page 40 + ARM GAS /tmp/ccdl7gEi.s page 40 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode) 1417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccvzubVv.s page 41 + ARM GAS /tmp/ccdl7gEi.s page 41 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx) 1474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccvzubVv.s page 42 + ARM GAS /tmp/ccdl7gEi.s page 42 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t counter_mode; @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 - ARM GAS /tmp/ccvzubVv.s page 43 + ARM GAS /tmp/ccdl7gEi.s page 43 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetDirection 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccvzubVv.s page 44 + ARM GAS /tmp/ccdl7gEi.s page 44 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_UP @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 1644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 1645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccvzubVv.s page 45 + ARM GAS /tmp/ccdl7gEi.s page 45 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx) 1701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); - ARM GAS /tmp/ccvzubVv.s page 46 + ARM GAS /tmp/ccdl7gEi.s page 46 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx) 1758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL); - ARM GAS /tmp/ccvzubVv.s page 47 + ARM GAS /tmp/ccdl7gEi.s page 47 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_1 1815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_2 1816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_3 - ARM GAS /tmp/ccvzubVv.s page 48 + ARM GAS /tmp/ccdl7gEi.s page 48 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 1872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 - ARM GAS /tmp/ccvzubVv.s page 49 + ARM GAS /tmp/ccdl7gEi.s page 49 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_ConfigOutput\n 1929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_ConfigOutput\n 1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_ConfigOutput\n - ARM GAS /tmp/ccvzubVv.s page 50 + ARM GAS /tmp/ccdl7gEi.s page 50 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_ConfigOutput\n @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE 1986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1 1987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2 - ARM GAS /tmp/ccvzubVv.s page 51 + ARM GAS /tmp/ccdl7gEi.s page 51 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1 @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the polarity of an output channel. 2044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n - ARM GAS /tmp/ccvzubVv.s page 52 + ARM GAS /tmp/ccdl7gEi.s page 52 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_SetPolarity\n @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW 2100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) - ARM GAS /tmp/ccvzubVv.s page 53 + ARM GAS /tmp/ccdl7gEi.s page 53 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N - ARM GAS /tmp/ccvzubVv.s page 54 + ARM GAS /tmp/ccdl7gEi.s page 54 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 - ARM GAS /tmp/ccvzubVv.s page 55 + ARM GAS /tmp/ccdl7gEi.s page 55 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccvzubVv.s page 56 + ARM GAS /tmp/ccdl7gEi.s page 56 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]; 2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccvzubVv.s page 57 + ARM GAS /tmp/ccdl7gEi.s page 57 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccvzubVv.s page 58 + ARM GAS /tmp/ccdl7gEi.s page 58 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates clearing the output channel on an external event is enabled for the output ch @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccvzubVv.s page 59 + ARM GAS /tmp/ccdl7gEi.s page 59 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccvzubVv.s page 60 + ARM GAS /tmp/ccdl7gEi.s page 60 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 5 (TIMx_CCR5). @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); - ARM GAS /tmp/ccvzubVv.s page 61 + ARM GAS /tmp/ccdl7gEi.s page 61 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx) 2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccvzubVv.s page 62 + ARM GAS /tmp/ccdl7gEi.s page 62 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR6)); @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 - ARM GAS /tmp/ccvzubVv.s page 63 + ARM GAS /tmp/ccdl7gEi.s page 63 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccvzubVv.s page 64 + ARM GAS /tmp/ccdl7gEi.s page 64 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) 2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccvzubVv.s page 65 + ARM GAS /tmp/ccdl7gEi.s page 65 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 - ARM GAS /tmp/ccvzubVv.s page 66 + ARM GAS /tmp/ccdl7gEi.s page 66 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n 2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n 2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n - ARM GAS /tmp/ccvzubVv.s page 67 + ARM GAS /tmp/ccdl7gEi.s page 67 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_GetPolarity\n @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccvzubVv.s page 68 + ARM GAS /tmp/ccdl7gEi.s page 68 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx) @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 4. 3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF 3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check - ARM GAS /tmp/ccvzubVv.s page 69 + ARM GAS /tmp/ccdl7gEi.s page 69 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) 3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); - ARM GAS /tmp/ccvzubVv.s page 70 + ARM GAS /tmp/ccdl7gEi.s page 70 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput 3126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TimerSynchronization This parameter can be one of the following values: - ARM GAS /tmp/ccvzubVv.s page 71 + ARM GAS /tmp/ccdl7gEi.s page 71 3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_RESET @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_GATED 3183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_TRIGGER 3184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER - ARM GAS /tmp/ccvzubVv.s page 72 + ARM GAS /tmp/ccdl7gEi.s page 72 3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled. - ARM GAS /tmp/ccvzubVv.s page 73 + ARM GAS /tmp/ccdl7gEi.s page 73 3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration - ARM GAS /tmp/ccvzubVv.s page 74 + ARM GAS /tmp/ccdl7gEi.s page 74 3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8 3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccvzubVv.s page 75 + ARM GAS /tmp/ccdl7gEi.s page 75 3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6 3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8 3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5 - ARM GAS /tmp/ccvzubVv.s page 76 + ARM GAS /tmp/ccdl7gEi.s page 76 3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6 @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled. - ARM GAS /tmp/ccvzubVv.s page 77 + ARM GAS /tmp/ccdl7gEi.s page 77 3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT) 3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input. - ARM GAS /tmp/ccvzubVv.s page 78 + ARM GAS /tmp/ccdl7gEi.s page 78 3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN 3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2 3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values: - ARM GAS /tmp/ccvzubVv.s page 79 + ARM GAS /tmp/ccdl7gEi.s page 79 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values: 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS - ARM GAS /tmp/ccvzubVv.s page 80 + ARM GAS /tmp/ccdl7gEi.s page 80 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO 3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI 3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE - ARM GAS /tmp/ccvzubVv.s page 81 + ARM GAS /tmp/ccdl7gEi.s page 81 3698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_RTC @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 511 .LBE59: 512 .LBE58: 384:Src/stm32f7xx_it.c **** { - ARM GAS /tmp/ccvzubVv.s page 82 + ARM GAS /tmp/ccdl7gEi.s page 82 385:Src/stm32f7xx_it.c **** LL_TIM_ClearFlag_UPDATE(TIM6); @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 393:Src/stm32f7xx_it.c **** 394:Src/stm32f7xx_it.c **** /** 395:Src/stm32f7xx_it.c **** * @brief This function handles TIM7 global interrupt. - ARM GAS /tmp/ccvzubVv.s page 83 + ARM GAS /tmp/ccdl7gEi.s page 83 396:Src/stm32f7xx_it.c **** */ @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 597 0016 0133 adds r3, r3, #1 598 0018 1360 str r3, [r2] 599 .L44: - ARM GAS /tmp/ccvzubVv.s page 84 + ARM GAS /tmp/ccdl7gEi.s page 84 407:Src/stm32f7xx_it.c **** //1 ms or 1000 Hz @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 626 .cfi_def_cfa_offset 4 627 .cfi_offset 4, -4 437:Src/stm32f7xx_it.c **** uart_buf = LL_USART_ReceiveData8(USART1); - ARM GAS /tmp/ccvzubVv.s page 85 + ARM GAS /tmp/ccdl7gEi.s page 85 628 .loc 1 437 5 view .LVU105 @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private macros ------------------------------------------------------------*/ 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER) - ARM GAS /tmp/ccvzubVv.s page 86 + ARM GAS /tmp/ccdl7gEi.s page 86 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Private_Macros USART Private Macros @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8. 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_OVERSA - ARM GAS /tmp/ccvzubVv.s page 87 + ARM GAS /tmp/ccdl7gEi.s page 87 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_PECF USART_ICR_PECF /*!< Parity error cle - ARM GAS /tmp/ccvzubVv.s page 88 + ARM GAS /tmp/ccdl7gEi.s page 88 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_FECF USART_ICR_FECF /*!< Framing error cl @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT) 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TCBGT USART_ISR_TCBGT /*!< Transmission com 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */ - ARM GAS /tmp/ccvzubVv.s page 89 + ARM GAS /tmp/ccdl7gEi.s page 89 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute - ARM GAS /tmp/ccvzubVv.s page 90 + ARM GAS /tmp/ccdl7gEi.s page 90 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK - ARM GAS /tmp/ccvzubVv.s page 91 + ARM GAS /tmp/ccdl7gEi.s page 91 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCL @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/rece 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/rece - ARM GAS /tmp/ccvzubVv.s page 92 + ARM GAS /tmp/ccdl7gEi.s page 92 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccvzubVv.s page 93 + ARM GAS /tmp/ccdl7gEi.s page 93 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Register value 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) - ARM GAS /tmp/ccvzubVv.s page 94 + ARM GAS /tmp/ccdl7gEi.s page 94 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccvzubVv.s page 95 + ARM GAS /tmp/ccdl7gEi.s page 95 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART Disable (all USART prescalers and outputs are disabled) @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if USART is enabled in STOP Mode (able to wake up MCU from Stop mode or not) 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccvzubVv.s page 96 + ARM GAS /tmp/ccdl7gEi.s page 96 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx) 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE); - ARM GAS /tmp/ccvzubVv.s page 97 + ARM GAS /tmp/ccdl7gEi.s page 97 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return enabled/disabled states of Transmitter and Receiver 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RE LL_USART_GetTransferDirection\n 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 TE LL_USART_GetTransferDirection - ARM GAS /tmp/ccvzubVv.s page 98 + ARM GAS /tmp/ccdl7gEi.s page 98 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method) 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccvzubVv.s page 99 + ARM GAS /tmp/ccdl7gEi.s page 99 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method); @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_MME); 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccvzubVv.s page 100 + ARM GAS /tmp/ccdl7gEi.s page 100 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param LastBitClockPulse This parameter can be one of the following values: - ARM GAS /tmp/ccvzubVv.s page 101 + ARM GAS /tmp/ccdl7gEi.s page 101 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT @@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccvzubVv.s page 102 + ARM GAS /tmp/ccdl7gEi.s page 102 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode @@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCP 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccvzubVv.s page 103 + ARM GAS /tmp/ccdl7gEi.s page 103 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccvzubVv.s page 104 + ARM GAS /tmp/ccdl7gEi.s page 104 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve the length of the stop bits @@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXRX_SWAPPED 1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccvzubVv.s page 105 + ARM GAS /tmp/ccdl7gEi.s page 105 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig) @@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod) 1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod); - ARM GAS /tmp/ccvzubVv.s page 106 + ARM GAS /tmp/ccdl7gEi.s page 106 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder) 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccvzubVv.s page 107 + ARM GAS /tmp/ccdl7gEi.s page 107 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder); @@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL); 1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccvzubVv.s page 108 + ARM GAS /tmp/ccdl7gEi.s page 108 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN); 1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccvzubVv.s page 109 + ARM GAS /tmp/ccdl7gEi.s page 109 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) - ARM GAS /tmp/ccvzubVv.s page 110 + ARM GAS /tmp/ccdl7gEi.s page 110 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ADDM7 LL_USART_GetNodeAddressLen @@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl 1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccvzubVv.s page 111 + ARM GAS /tmp/ccdl7gEi.s page 111 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable One bit sampling method 1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp - ARM GAS /tmp/ccvzubVv.s page 112 + ARM GAS /tmp/ccdl7gEi.s page 112 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits) 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccvzubVv.s page 113 + ARM GAS /tmp/ccdl7gEi.s page 113 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. @@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if (OverSampling == LL_USART_OVERSAMPLING_8) 1647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate)); - ARM GAS /tmp/ccvzubVv.s page 114 + ARM GAS /tmp/ccdl7gEi.s page 114 1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrtemp = usartdiv & 0xFFF0U; @@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR RTO LL_USART_SetRxTimeout 1704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Timeout Value between Min_Data=0x00 and Max_Data=0x00FFFFFF - ARM GAS /tmp/ccvzubVv.s page 115 + ARM GAS /tmp/ccdl7gEi.s page 115 1706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccvzubVv.s page 116 + ARM GAS /tmp/ccdl7gEi.s page 116 1763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx) @@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_IRDA_POWER_NORMAL 1818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE 1819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccvzubVv.s page 117 + ARM GAS /tmp/ccdl7gEi.s page 117 1820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(const USART_TypeDef *USARTx) @@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Smartcard NACK transmission - ARM GAS /tmp/ccvzubVv.s page 118 + ARM GAS /tmp/ccdl7gEi.s page 118 1877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard 1932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccvzubVv.s page 119 + ARM GAS /tmp/ccdl7gEi.s page 119 1934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Smartcard prescaler value, used for dividing the USART clock 1989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * source to provide the SMARTCARD Clock (5 bits value) 1990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccvzubVv.s page 120 + ARM GAS /tmp/ccdl7gEi.s page 120 1991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. @@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx) 2047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccvzubVv.s page 121 + ARM GAS /tmp/ccdl7gEi.s page 121 2048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_HDSEL); @@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return LIN Break Detection Length 2103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. - ARM GAS /tmp/ccvzubVv.s page 122 + ARM GAS /tmp/ccdl7gEi.s page 122 2105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen @@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature 2160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 2161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccvzubVv.s page 123 + ARM GAS /tmp/ccdl7gEi.s page 123 2162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Driver Enable (DE) Mode - ARM GAS /tmp/ccvzubVv.s page 124 + ARM GAS /tmp/ccdl7gEi.s page 124 2219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not @@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Driver Enable Polarity 2274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance. - ARM GAS /tmp/ccvzubVv.s page 125 + ARM GAS /tmp/ccdl7gEi.s page 125 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DEP LL_USART_GetDESignalPolarity @@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Synchronous Mode 2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In Synchronous mode, the following bits must be kept cleared: - ARM GAS /tmp/ccvzubVv.s page 126 + ARM GAS /tmp/ccdl7gEi.s page 126 2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, @@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using 2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n - ARM GAS /tmp/ccvzubVv.s page 127 + ARM GAS /tmp/ccdl7gEi.s page 127 2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigLINMode\n @@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); 2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Half Duplex mode */ 2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_HDSEL); - ARM GAS /tmp/ccvzubVv.s page 128 + ARM GAS /tmp/ccdl7gEi.s page 128 2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not 2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. 2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : - ARM GAS /tmp/ccvzubVv.s page 129 + ARM GAS /tmp/ccdl7gEi.s page 129 2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function @@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccvzubVv.s page 130 + ARM GAS /tmp/ccdl7gEi.s page 130 2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx) @@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccvzubVv.s page 131 + ARM GAS /tmp/ccdl7gEi.s page 131 2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx) @@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccvzubVv.s page 132 + ARM GAS /tmp/ccdl7gEi.s page 132 2675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx) @@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Auto-Baud Rate Error Flag is set or not - ARM GAS /tmp/ccvzubVv.s page 133 + ARM GAS /tmp/ccdl7gEi.s page 133 2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or @@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL); 2787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccvzubVv.s page 134 + ARM GAS /tmp/ccdl7gEi.s page 134 2789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not 2845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TCBGT LL_USART_IsActiveFlag_TCBGT - ARM GAS /tmp/ccvzubVv.s page 135 + ARM GAS /tmp/ccdl7gEi.s page 135 2846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear IDLE line detected Flag 2901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR IDLECF LL_USART_ClearFlag_IDLE 2902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccvzubVv.s page 136 + ARM GAS /tmp/ccdl7gEi.s page 136 2903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_CTSCF); 2959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccvzubVv.s page 137 + ARM GAS /tmp/ccdl7gEi.s page 137 2960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 3015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccvzubVv.s page 138 + ARM GAS /tmp/ccdl7gEi.s page 138 3017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_IT_Management IT_Management @@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx) 3072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE); - ARM GAS /tmp/ccvzubVv.s page 139 + ARM GAS /tmp/ccdl7gEi.s page 139 3074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 0: Interrupt is inhibited 3129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register. 3130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR - ARM GAS /tmp/ccvzubVv.s page 140 + ARM GAS /tmp/ccdl7gEi.s page 140 3131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable IDLE Interrupt 3187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE - ARM GAS /tmp/ccvzubVv.s page 141 + ARM GAS /tmp/ccdl7gEi.s page 141 3188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 CMIE LL_USART_DisableIT_CM 3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccvzubVv.s page 142 + ARM GAS /tmp/ccdl7gEi.s page 142 3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); 3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccvzubVv.s page 143 + ARM GAS /tmp/ccdl7gEi.s page 143 3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL); 3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccvzubVv.s page 144 + ARM GAS /tmp/ccdl7gEi.s page 144 3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccvzubVv.s page 145 + ARM GAS /tmp/ccdl7gEi.s page 145 3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receiver Timeout Interrupt is enabled or disabled. @@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx) 3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccvzubVv.s page 146 + ARM GAS /tmp/ccdl7gEi.s page 146 3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL); @@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable DMA Mode for reception - ARM GAS /tmp/ccvzubVv.s page 147 + ARM GAS /tmp/ccdl7gEi.s page 147 3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX @@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Disabling on Reception Error 3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DDRE LL_USART_EnableDMADeactOnRxErr 3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccvzubVv.s page 148 + ARM GAS /tmp/ccdl7gEi.s page 148 3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return data_reg_addr; 3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccvzubVv.s page 149 + ARM GAS /tmp/ccdl7gEi.s page 149 3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -8902,7 +8902,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 3660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU); 635 .loc 3 3660 3 view .LVU107 636 .loc 3 3660 20 is_stmt 0 view .LVU108 - 637 0002 974B ldr r3, .L80 + 637 0002 9B4B ldr r3, .L89 638 0004 5A6A ldr r2, [r3, #36] 639 .loc 3 3660 10 view .LVU109 640 0006 D2B2 uxtb r2, r2 @@ -8911,78 +8911,78 @@ ARM GAS /tmp/ccvzubVv.s page 1 643 .LBE67: 644 .LBE66: 645 .loc 1 437 14 discriminator 1 view .LVU111 - 646 0008 964B ldr r3, .L80+4 + 646 0008 9A4B ldr r3, .L89+4 647 000a 1A70 strb r2, [r3] 438:Src/stm32f7xx_it.c **** switch (UART_rec_incr) 648 .loc 1 438 5 is_stmt 1 view .LVU112 - 649 000c 964B ldr r3, .L80+8 + 649 000c 9A4B ldr r3, .L89+8 650 000e 1B88 ldrh r3, [r3] 651 0010 1F2B cmp r3, #31 - 652 0012 00F20B81 bhi .L49 + 652 0012 00F26481 bhi .L49 653 0016 DFE813F0 tbh [pc, r3, lsl #1] 654 .L51: - 655 001a 2000 .2byte (.L54-.L51)/2 - 656 001c 2F00 .2byte (.L53-.L51)/2 - 657 001e 0901 .2byte (.L49-.L51)/2 - 658 0020 0901 .2byte (.L49-.L51)/2 - 659 0022 0901 .2byte (.L49-.L51)/2 - 660 0024 0901 .2byte (.L49-.L51)/2 - 661 0026 0901 .2byte (.L49-.L51)/2 - 662 0028 0901 .2byte (.L49-.L51)/2 - 663 002a 0901 .2byte (.L49-.L51)/2 - 664 002c 0901 .2byte (.L49-.L51)/2 - 665 002e 0901 .2byte (.L49-.L51)/2 - 666 0030 0901 .2byte (.L49-.L51)/2 - 667 0032 0901 .2byte (.L49-.L51)/2 - 668 0034 0901 .2byte (.L49-.L51)/2 - 669 0036 0901 .2byte (.L49-.L51)/2 - 670 0038 0901 .2byte (.L49-.L51)/2 - 671 003a 0901 .2byte (.L49-.L51)/2 - ARM GAS /tmp/ccvzubVv.s page 150 + 655 001a 2000 .2byte (.L55-.L51)/2 + 656 001c 2F00 .2byte (.L54-.L51)/2 + 657 001e 6201 .2byte (.L49-.L51)/2 + 658 0020 6201 .2byte (.L49-.L51)/2 + 659 0022 6201 .2byte (.L49-.L51)/2 + 660 0024 6201 .2byte (.L49-.L51)/2 + 661 0026 6201 .2byte (.L49-.L51)/2 + 662 0028 6201 .2byte (.L49-.L51)/2 + 663 002a 6201 .2byte (.L49-.L51)/2 + 664 002c 9E00 .2byte (.L53-.L51)/2 + 665 002e 6201 .2byte (.L49-.L51)/2 + 666 0030 6201 .2byte (.L49-.L51)/2 + 667 0032 6201 .2byte (.L49-.L51)/2 + 668 0034 6201 .2byte (.L49-.L51)/2 + 669 0036 6201 .2byte (.L49-.L51)/2 + 670 0038 6201 .2byte (.L49-.L51)/2 + 671 003a 6201 .2byte (.L49-.L51)/2 + ARM GAS /tmp/ccdl7gEi.s page 150 - 672 003c 0901 .2byte (.L49-.L51)/2 - 673 003e 0901 .2byte (.L49-.L51)/2 - 674 0040 0901 .2byte (.L49-.L51)/2 - 675 0042 0901 .2byte (.L49-.L51)/2 - 676 0044 0901 .2byte (.L49-.L51)/2 - 677 0046 0901 .2byte (.L49-.L51)/2 - 678 0048 0901 .2byte (.L49-.L51)/2 - 679 004a 0901 .2byte (.L49-.L51)/2 - 680 004c 0901 .2byte (.L49-.L51)/2 - 681 004e 0901 .2byte (.L49-.L51)/2 - 682 0050 0901 .2byte (.L49-.L51)/2 - 683 0052 0901 .2byte (.L49-.L51)/2 - 684 0054 9500 .2byte (.L52-.L51)/2 - 685 0056 0901 .2byte (.L49-.L51)/2 - 686 0058 CF00 .2byte (.L50-.L51)/2 + 672 003c 6201 .2byte (.L49-.L51)/2 + 673 003e 6201 .2byte (.L49-.L51)/2 + 674 0040 6201 .2byte (.L49-.L51)/2 + 675 0042 6201 .2byte (.L49-.L51)/2 + 676 0044 6201 .2byte (.L49-.L51)/2 + 677 0046 6201 .2byte (.L49-.L51)/2 + 678 0048 6201 .2byte (.L49-.L51)/2 + 679 004a 6201 .2byte (.L49-.L51)/2 + 680 004c 6201 .2byte (.L49-.L51)/2 + 681 004e 6201 .2byte (.L49-.L51)/2 + 682 0050 6201 .2byte (.L49-.L51)/2 + 683 0052 6201 .2byte (.L49-.L51)/2 + 684 0054 D800 .2byte (.L52-.L51)/2 + 685 0056 6201 .2byte (.L49-.L51)/2 + 686 0058 1201 .2byte (.L50-.L51)/2 687 .p2align 1 - 688 .L54: + 688 .L55: 439:Src/stm32f7xx_it.c **** { 440:Src/stm32f7xx_it.c **** case 0: 441:Src/stm32f7xx_it.c **** TO6_uart = TO6;//Save the time of start rec. command 689 .loc 1 441 9 view .LVU113 690 .loc 1 441 18 is_stmt 0 view .LVU114 - 691 005a 8449 ldr r1, .L80+12 + 691 005a 8849 ldr r1, .L89+12 692 005c 0868 ldr r0, [r1] - 693 005e 8449 ldr r1, .L80+16 + 693 005e 8849 ldr r1, .L89+16 694 0060 0860 str r0, [r1] 442:Src/stm32f7xx_it.c **** flg_tmt = 1;//Set the timeout flag 695 .loc 1 442 9 is_stmt 1 view .LVU115 696 .loc 1 442 17 is_stmt 0 view .LVU116 - 697 0062 8449 ldr r1, .L80+20 + 697 0062 8849 ldr r1, .L89+20 698 0064 0120 movs r0, #1 699 0066 0870 strb r0, [r1] 443:Src/stm32f7xx_it.c **** UART_header = uart_buf; 700 .loc 1 443 9 is_stmt 1 view .LVU117 701 .loc 1 443 21 is_stmt 0 view .LVU118 - 702 0068 8349 ldr r1, .L80+24 + 702 0068 8749 ldr r1, .L89+24 703 006a 0A80 strh r2, [r1] @ movhi 444:Src/stm32f7xx_it.c **** UART_rec_incr++; 704 .loc 1 444 9 is_stmt 1 view .LVU119 705 .loc 1 444 22 is_stmt 0 view .LVU120 706 006c 0344 add r3, r3, r0 - 707 006e 7E4A ldr r2, .L80+8 + 707 006e 824A ldr r2, .L89+8 708 0070 1380 strh r3, [r2] @ movhi 445:Src/stm32f7xx_it.c **** break; 709 .loc 1 445 5 is_stmt 1 view .LVU121 @@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccvzubVv.s page 1 454:Src/stm32f7xx_it.c **** UART_rec_incr = 0; 455:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag 456:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; - ARM GAS /tmp/ccvzubVv.s page 151 + ARM GAS /tmp/ccdl7gEi.s page 151 457:Src/stm32f7xx_it.c **** break; @@ -9025,866 +9025,1038 @@ ARM GAS /tmp/ccvzubVv.s page 1 478:Src/stm32f7xx_it.c **** case 0x7777: 479:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting! 480:Src/stm32f7xx_it.c **** break; - 481:Src/stm32f7xx_it.c **** default: //error decoding header - 482:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 483:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 484:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; - 485:Src/stm32f7xx_it.c **** //CPU_state = HALT; - 486:Src/stm32f7xx_it.c **** State_Data[0] |= UART_ERR; - 487:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 488:Src/stm32f7xx_it.c **** break; - 489:Src/stm32f7xx_it.c **** } - 490:Src/stm32f7xx_it.c **** break; - 491:Src/stm32f7xx_it.c **** - 492:Src/stm32f7xx_it.c **** case (CL_8 - 1): - 493:Src/stm32f7xx_it.c **** if (UART_header == 0x1111) - 494:Src/stm32f7xx_it.c **** { - 495:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) - 496:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 497:Src/stm32f7xx_it.c **** else - 498:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - 499:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 500:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 501:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 502:Src/stm32f7xx_it.c **** } - 503:Src/stm32f7xx_it.c **** else - 504:Src/stm32f7xx_it.c **** { - 505:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 506:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 507:Src/stm32f7xx_it.c **** else - 508:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 509:Src/stm32f7xx_it.c **** UART_rec_incr++; - 510:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 511:Src/stm32f7xx_it.c **** } - 512:Src/stm32f7xx_it.c **** break; - 513:Src/stm32f7xx_it.c **** case (TSK_8 - 1): - ARM GAS /tmp/ccvzubVv.s page 152 + 481:Src/stm32f7xx_it.c **** case AD9102_CMD_HEADER: // AD9102 command + 482:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting! + 483:Src/stm32f7xx_it.c **** break; + 484:Src/stm32f7xx_it.c **** default: //error decoding header + 485:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 486:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 487:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; + 488:Src/stm32f7xx_it.c **** //CPU_state = HALT; + 489:Src/stm32f7xx_it.c **** State_Data[0] |= UART_ERR; + 490:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 491:Src/stm32f7xx_it.c **** break; + 492:Src/stm32f7xx_it.c **** } + 493:Src/stm32f7xx_it.c **** break; + 494:Src/stm32f7xx_it.c **** + 495:Src/stm32f7xx_it.c **** case (AD9102_CMD_8 - 1): + 496:Src/stm32f7xx_it.c **** if (UART_header == AD9102_CMD_HEADER) + 497:Src/stm32f7xx_it.c **** { + 498:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 499:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 500:Src/stm32f7xx_it.c **** else + 501:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 502:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 503:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 504:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 505:Src/stm32f7xx_it.c **** } + 506:Src/stm32f7xx_it.c **** else + 507:Src/stm32f7xx_it.c **** { + 508:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 509:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 510:Src/stm32f7xx_it.c **** else + 511:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 512:Src/stm32f7xx_it.c **** UART_rec_incr++; + 513:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + ARM GAS /tmp/ccdl7gEi.s page 152 + + + 514:Src/stm32f7xx_it.c **** } + 515:Src/stm32f7xx_it.c **** break; + 516:Src/stm32f7xx_it.c **** + 517:Src/stm32f7xx_it.c **** case (CL_8 - 1): + 518:Src/stm32f7xx_it.c **** if (UART_header == 0x1111) + 519:Src/stm32f7xx_it.c **** { + 520:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 521:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 522:Src/stm32f7xx_it.c **** else + 523:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 524:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 525:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 526:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 527:Src/stm32f7xx_it.c **** } + 528:Src/stm32f7xx_it.c **** else + 529:Src/stm32f7xx_it.c **** { + 530:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 531:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 532:Src/stm32f7xx_it.c **** else + 533:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 534:Src/stm32f7xx_it.c **** UART_rec_incr++; + 535:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 536:Src/stm32f7xx_it.c **** } + 537:Src/stm32f7xx_it.c **** break; + 538:Src/stm32f7xx_it.c **** case (TSK_8 - 1): + 539:Src/stm32f7xx_it.c **** if (UART_header == 0x7777) + 540:Src/stm32f7xx_it.c **** { + 541:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 542:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 543:Src/stm32f7xx_it.c **** else + 544:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 545:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 546:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 547:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 548:Src/stm32f7xx_it.c **** } + 549:Src/stm32f7xx_it.c **** else + 550:Src/stm32f7xx_it.c **** { + 551:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 552:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 553:Src/stm32f7xx_it.c **** else + 554:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 555:Src/stm32f7xx_it.c **** UART_rec_incr++; + 556:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 557:Src/stm32f7xx_it.c **** } + 558:Src/stm32f7xx_it.c **** break; + 559:Src/stm32f7xx_it.c **** default: + 560:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 561:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 562:Src/stm32f7xx_it.c **** else + 563:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 564:Src/stm32f7xx_it.c **** UART_rec_incr++; + 565:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 566:Src/stm32f7xx_it.c **** break; + 567:Src/stm32f7xx_it.c **** } + 568:Src/stm32f7xx_it.c **** // HAL_UART_Receive_IT(&huart1, &uart_buf, 1); + 569:Src/stm32f7xx_it.c **** } + 711 .loc 1 569 1 is_stmt 0 view .LVU122 + ARM GAS /tmp/ccdl7gEi.s page 153 - 514:Src/stm32f7xx_it.c **** if (UART_header == 0x7777) - 515:Src/stm32f7xx_it.c **** { - 516:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 517:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 518:Src/stm32f7xx_it.c **** else - 519:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 520:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 521:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 522:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 523:Src/stm32f7xx_it.c **** } - 524:Src/stm32f7xx_it.c **** else - 525:Src/stm32f7xx_it.c **** { - 526:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 527:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 528:Src/stm32f7xx_it.c **** else - 529:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 530:Src/stm32f7xx_it.c **** UART_rec_incr++; - 531:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 532:Src/stm32f7xx_it.c **** } - 533:Src/stm32f7xx_it.c **** break; - 534:Src/stm32f7xx_it.c **** default: - 535:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 536:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 537:Src/stm32f7xx_it.c **** else - 538:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 539:Src/stm32f7xx_it.c **** UART_rec_incr++; - 540:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 541:Src/stm32f7xx_it.c **** break; - 542:Src/stm32f7xx_it.c **** } - 543:Src/stm32f7xx_it.c **** // HAL_UART_Receive_IT(&huart1, &uart_buf, 1); - 544:Src/stm32f7xx_it.c **** } - 711 .loc 1 544 1 is_stmt 0 view .LVU122 712 0072 5DF8044B ldr r4, [sp], #4 713 .LCFI7: 714 .cfi_remember_state 715 .cfi_restore 4 716 .cfi_def_cfa_offset 0 717 0076 7047 bx lr - 718 .L53: + 718 .L54: 719 .LCFI8: 720 .cfi_restore_state 447:Src/stm32f7xx_it.c **** switch (UART_header) 721 .loc 1 447 9 is_stmt 1 view .LVU123 447:Src/stm32f7xx_it.c **** switch (UART_header) 722 .loc 1 447 21 is_stmt 0 view .LVU124 - 723 0078 7F49 ldr r1, .L80+24 + 723 0078 8349 ldr r1, .L89+24 724 007a 0B88 ldrh r3, [r1] 725 007c 03EB0223 add r3, r3, r2, lsl #8 726 0080 9BB2 uxth r3, r3 727 0082 0B80 strh r3, [r1] @ movhi 448:Src/stm32f7xx_it.c **** { 728 .loc 1 448 9 is_stmt 1 view .LVU125 - 729 0084 44F24442 movw r2, #17476 + 729 0084 45F25552 movw r2, #21845 730 0088 9342 cmp r3, r2 - 731 008a 37D0 beq .L56 - 732 008c 0FD8 bhi .L57 - 733 008e 42F22222 movw r2, #8738 - ARM GAS /tmp/ccvzubVv.s page 153 - - + 731 008a 45D0 beq .L57 + 732 008c 22D8 bhi .L58 + 733 008e 43F23332 movw r2, #13107 734 0092 9342 cmp r3, r2 - 735 0094 20D0 beq .L58 - 736 0096 43F23332 movw r2, #13107 - 737 009a 9342 cmp r3, r2 - 738 009c 25D0 beq .L59 - 739 009e 41F21112 movw r2, #4369 - 740 00a2 9342 cmp r3, r2 - 741 00a4 40D1 bne .L61 - 451:Src/stm32f7xx_it.c **** break; - 742 .loc 1 451 13 view .LVU126 - 451:Src/stm32f7xx_it.c **** break; - 743 .loc 1 451 27 is_stmt 0 view .LVU127 - 744 00a6 704B ldr r3, .L80+8 - 745 00a8 0222 movs r2, #2 - 746 00aa 1A80 strh r2, [r3] @ movhi - 452:Src/stm32f7xx_it.c **** case 0x2222: //Back to default - 747 .loc 1 452 9 is_stmt 1 view .LVU128 - 748 00ac E1E7 b .L48 - 749 .L57: - 750 00ae 46F26662 movw r2, #26214 - 751 00b2 9342 cmp r3, r2 - 752 00b4 2BD0 beq .L62 - 753 00b6 47F27772 movw r2, #30583 - 754 00ba 9342 cmp r3, r2 - 755 00bc 30D0 beq .L63 - 756 00be 45F25552 movw r2, #21845 - 757 00c2 9342 cmp r3, r2 - 758 00c4 30D1 bne .L61 - 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 759 .loc 1 469 13 view .LVU129 - 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 760 .loc 1 469 27 is_stmt 0 view .LVU130 - 761 00c6 0023 movs r3, #0 - 762 00c8 674A ldr r2, .L80+8 - 763 00ca 1380 strh r3, [r2] @ movhi - 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; - 764 .loc 1 470 13 is_stmt 1 view .LVU131 - 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; - 765 .loc 1 470 21 is_stmt 0 view .LVU132 - 766 00cc 694A ldr r2, .L80+20 - 767 00ce 1370 strb r3, [r2] - 471:Src/stm32f7xx_it.c **** break; - 768 .loc 1 471 13 is_stmt 1 view .LVU133 - 471:Src/stm32f7xx_it.c **** break; - 769 .loc 1 471 23 is_stmt 0 view .LVU134 - 770 00d0 6A4B ldr r3, .L80+28 - 771 00d2 0522 movs r2, #5 - 772 00d4 1A70 strb r2, [r3] - 472:Src/stm32f7xx_it.c **** case 0x6666: //Request state - 773 .loc 1 472 9 is_stmt 1 view .LVU135 - 774 00d6 CCE7 b .L48 - 775 .L58: + 735 0094 37D0 beq .L59 + 736 0096 10D8 bhi .L60 + 737 0098 41F21112 movw r2, #4369 + 738 009c 9342 cmp r3, r2 + 739 009e 2ED0 beq .L61 + 740 00a0 42F22222 movw r2, #8738 + 741 00a4 9342 cmp r3, r2 + 742 00a6 48D1 bne .L63 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 776 .loc 1 454 13 view .LVU136 + 743 .loc 1 454 13 view .LVU126 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 777 .loc 1 454 27 is_stmt 0 view .LVU137 - 778 00d8 0023 movs r3, #0 - ARM GAS /tmp/ccvzubVv.s page 154 - - - 779 00da 634A ldr r2, .L80+8 - 780 00dc 1380 strh r3, [r2] @ movhi + 744 .loc 1 454 27 is_stmt 0 view .LVU127 + 745 00a8 0023 movs r3, #0 + 746 00aa 734A ldr r2, .L89+8 + 747 00ac 1380 strh r3, [r2] @ movhi 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; - 781 .loc 1 455 13 is_stmt 1 view .LVU138 + 748 .loc 1 455 13 is_stmt 1 view .LVU128 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; - 782 .loc 1 455 21 is_stmt 0 view .LVU139 - 783 00de 654A ldr r2, .L80+20 - 784 00e0 1370 strb r3, [r2] + 749 .loc 1 455 21 is_stmt 0 view .LVU129 + 750 00ae 754A ldr r2, .L89+20 + 751 00b0 1370 strb r3, [r2] 456:Src/stm32f7xx_it.c **** break; - 785 .loc 1 456 13 is_stmt 1 view .LVU140 + 752 .loc 1 456 13 is_stmt 1 view .LVU130 456:Src/stm32f7xx_it.c **** break; - 786 .loc 1 456 23 is_stmt 0 view .LVU141 - 787 00e2 664B ldr r3, .L80+28 - 788 00e4 0222 movs r2, #2 - 789 00e6 1A70 strb r2, [r3] + 753 .loc 1 456 23 is_stmt 0 view .LVU131 + 754 00b2 764B ldr r3, .L89+28 + 755 00b4 0222 movs r2, #2 + 756 00b6 1A70 strb r2, [r3] 457:Src/stm32f7xx_it.c **** case 0x3333: //Transmith saved DATA - 790 .loc 1 457 9 is_stmt 1 view .LVU142 - 791 00e8 C3E7 b .L48 - 792 .L59: - 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 793 .loc 1 459 13 view .LVU143 - 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 794 .loc 1 459 27 is_stmt 0 view .LVU144 - 795 00ea 0023 movs r3, #0 - 796 00ec 5E4A ldr r2, .L80+8 - 797 00ee 1380 strh r3, [r2] @ movhi - 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE; - 798 .loc 1 460 13 is_stmt 1 view .LVU145 - 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE; - 799 .loc 1 460 21 is_stmt 0 view .LVU146 - 800 00f0 604A ldr r2, .L80+20 - 801 00f2 1370 strb r3, [r2] - 461:Src/stm32f7xx_it.c **** break; - 802 .loc 1 461 13 is_stmt 1 view .LVU147 - 461:Src/stm32f7xx_it.c **** break; - 803 .loc 1 461 23 is_stmt 0 view .LVU148 - 804 00f4 614B ldr r3, .L80+28 - 805 00f6 0322 movs r2, #3 - 806 00f8 1A70 strb r2, [r3] - 462:Src/stm32f7xx_it.c **** case 0x4444: //Received packet - 807 .loc 1 462 9 is_stmt 1 view .LVU149 - 808 00fa BAE7 b .L48 - 809 .L56: - 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 810 .loc 1 464 13 view .LVU150 - 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 811 .loc 1 464 27 is_stmt 0 view .LVU151 - 812 00fc 0023 movs r3, #0 - 813 00fe 5A4A ldr r2, .L80+8 - 814 0100 1380 strh r3, [r2] @ movhi - 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE; - 815 .loc 1 465 13 is_stmt 1 view .LVU152 - 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE; - 816 .loc 1 465 21 is_stmt 0 view .LVU153 - 817 0102 5C4A ldr r2, .L80+20 - 818 0104 1370 strb r3, [r2] - 466:Src/stm32f7xx_it.c **** break; - ARM GAS /tmp/ccvzubVv.s page 155 + 757 .loc 1 457 9 is_stmt 1 view .LVU132 + 758 00b8 DBE7 b .L48 + ARM GAS /tmp/ccdl7gEi.s page 154 - 819 .loc 1 466 13 is_stmt 1 view .LVU154 + 759 .L60: + 760 00ba 44F24442 movw r2, #17476 + 761 00be 9342 cmp r3, r2 + 762 00c0 3BD1 bne .L63 + 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 763 .loc 1 464 13 view .LVU133 + 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 764 .loc 1 464 27 is_stmt 0 view .LVU134 + 765 00c2 0023 movs r3, #0 + 766 00c4 6C4A ldr r2, .L89+8 + 767 00c6 1380 strh r3, [r2] @ movhi + 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE; + 768 .loc 1 465 13 is_stmt 1 view .LVU135 + 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE; + 769 .loc 1 465 21 is_stmt 0 view .LVU136 + 770 00c8 6E4A ldr r2, .L89+20 + 771 00ca 1370 strb r3, [r2] 466:Src/stm32f7xx_it.c **** break; - 820 .loc 1 466 23 is_stmt 0 view .LVU155 - 821 0106 5D4B ldr r3, .L80+28 - 822 0108 0422 movs r2, #4 - 823 010a 1A70 strb r2, [r3] + 772 .loc 1 466 13 is_stmt 1 view .LVU137 + 466:Src/stm32f7xx_it.c **** break; + 773 .loc 1 466 23 is_stmt 0 view .LVU138 + 774 00cc 6F4B ldr r3, .L89+28 + 775 00ce 0422 movs r2, #4 + 776 00d0 1A70 strb r2, [r3] 467:Src/stm32f7xx_it.c **** case 0x5555: //Erase saved DATA - 824 .loc 1 467 9 is_stmt 1 view .LVU156 - 825 010c B1E7 b .L48 - 826 .L62: + 777 .loc 1 467 9 is_stmt 1 view .LVU139 + 778 00d2 CEE7 b .L48 + 779 .L58: + 780 00d4 47F27772 movw r2, #30583 + 781 00d8 9342 cmp r3, r2 + 782 00da 26D0 beq .L65 + 783 00dc 48F68802 movw r2, #34952 + 784 00e0 9342 cmp r3, r2 + 785 00e2 26D0 beq .L66 + 786 00e4 46F26662 movw r2, #26214 + 787 00e8 9342 cmp r3, r2 + 788 00ea 26D1 bne .L63 474:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 827 .loc 1 474 13 view .LVU157 + 789 .loc 1 474 13 view .LVU140 474:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 828 .loc 1 474 27 is_stmt 0 view .LVU158 - 829 010e 0023 movs r3, #0 - 830 0110 554A ldr r2, .L80+8 - 831 0112 1380 strh r3, [r2] @ movhi + 790 .loc 1 474 27 is_stmt 0 view .LVU141 + 791 00ec 0023 movs r3, #0 + 792 00ee 624A ldr r2, .L89+8 + 793 00f0 1380 strh r3, [r2] @ movhi 475:Src/stm32f7xx_it.c **** CPU_state = STATE; - 832 .loc 1 475 13 is_stmt 1 view .LVU159 + 794 .loc 1 475 13 is_stmt 1 view .LVU142 475:Src/stm32f7xx_it.c **** CPU_state = STATE; - 833 .loc 1 475 21 is_stmt 0 view .LVU160 - 834 0114 574A ldr r2, .L80+20 - 835 0116 1370 strb r3, [r2] + 795 .loc 1 475 21 is_stmt 0 view .LVU143 + 796 00f2 644A ldr r2, .L89+20 + 797 00f4 1370 strb r3, [r2] 476:Src/stm32f7xx_it.c **** break; - 836 .loc 1 476 13 is_stmt 1 view .LVU161 + 798 .loc 1 476 13 is_stmt 1 view .LVU144 476:Src/stm32f7xx_it.c **** break; - 837 .loc 1 476 23 is_stmt 0 view .LVU162 - 838 0118 584B ldr r3, .L80+28 - 839 011a 0622 movs r2, #6 - 840 011c 1A70 strb r2, [r3] + 799 .loc 1 476 23 is_stmt 0 view .LVU145 + 800 00f6 654B ldr r3, .L89+28 + 801 00f8 0622 movs r2, #6 + 802 00fa 1A70 strb r2, [r3] + ARM GAS /tmp/ccdl7gEi.s page 155 + + 477:Src/stm32f7xx_it.c **** case 0x7777: - 841 .loc 1 477 9 is_stmt 1 view .LVU163 - 842 011e A8E7 b .L48 - 843 .L63: + 803 .loc 1 477 9 is_stmt 1 view .LVU146 + 804 00fc B9E7 b .L48 + 805 .L61: + 451:Src/stm32f7xx_it.c **** break; + 806 .loc 1 451 13 view .LVU147 + 451:Src/stm32f7xx_it.c **** break; + 807 .loc 1 451 27 is_stmt 0 view .LVU148 + 808 00fe 5E4B ldr r3, .L89+8 + 809 0100 0222 movs r2, #2 + 810 0102 1A80 strh r2, [r3] @ movhi + 452:Src/stm32f7xx_it.c **** case 0x2222: //Back to default + 811 .loc 1 452 9 is_stmt 1 view .LVU149 + 812 0104 B5E7 b .L48 + 813 .L59: + 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 814 .loc 1 459 13 view .LVU150 + 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 815 .loc 1 459 27 is_stmt 0 view .LVU151 + 816 0106 0023 movs r3, #0 + 817 0108 5B4A ldr r2, .L89+8 + 818 010a 1380 strh r3, [r2] @ movhi + 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE; + 819 .loc 1 460 13 is_stmt 1 view .LVU152 + 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE; + 820 .loc 1 460 21 is_stmt 0 view .LVU153 + 821 010c 5D4A ldr r2, .L89+20 + 822 010e 1370 strb r3, [r2] + 461:Src/stm32f7xx_it.c **** break; + 823 .loc 1 461 13 is_stmt 1 view .LVU154 + 461:Src/stm32f7xx_it.c **** break; + 824 .loc 1 461 23 is_stmt 0 view .LVU155 + 825 0110 5E4B ldr r3, .L89+28 + 826 0112 0322 movs r2, #3 + 827 0114 1A70 strb r2, [r3] + 462:Src/stm32f7xx_it.c **** case 0x4444: //Received packet + 828 .loc 1 462 9 is_stmt 1 view .LVU156 + 829 0116 ACE7 b .L48 + 830 .L57: + 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 831 .loc 1 469 13 view .LVU157 + 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 832 .loc 1 469 27 is_stmt 0 view .LVU158 + 833 0118 0023 movs r3, #0 + 834 011a 574A ldr r2, .L89+8 + 835 011c 1380 strh r3, [r2] @ movhi + 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; + 836 .loc 1 470 13 is_stmt 1 view .LVU159 + 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; + 837 .loc 1 470 21 is_stmt 0 view .LVU160 + 838 011e 594A ldr r2, .L89+20 + 839 0120 1370 strb r3, [r2] + 471:Src/stm32f7xx_it.c **** break; + 840 .loc 1 471 13 is_stmt 1 view .LVU161 + 471:Src/stm32f7xx_it.c **** break; + 841 .loc 1 471 23 is_stmt 0 view .LVU162 + 842 0122 5A4B ldr r3, .L89+28 + ARM GAS /tmp/ccdl7gEi.s page 156 + + + 843 0124 0522 movs r2, #5 + 844 0126 1A70 strb r2, [r3] + 472:Src/stm32f7xx_it.c **** case 0x6666: //Request state + 845 .loc 1 472 9 is_stmt 1 view .LVU163 + 846 0128 A3E7 b .L48 + 847 .L65: 479:Src/stm32f7xx_it.c **** break; - 844 .loc 1 479 13 view .LVU164 + 848 .loc 1 479 13 view .LVU164 479:Src/stm32f7xx_it.c **** break; - 845 .loc 1 479 27 is_stmt 0 view .LVU165 - 846 0120 514B ldr r3, .L80+8 - 847 0122 0222 movs r2, #2 - 848 0124 1A80 strh r2, [r3] @ movhi - 480:Src/stm32f7xx_it.c **** default: //error decoding header - 849 .loc 1 480 13 is_stmt 1 view .LVU166 - 850 0126 A4E7 b .L48 - 851 .L61: - 482:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 852 .loc 1 482 13 view .LVU167 - 482:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 853 .loc 1 482 27 is_stmt 0 view .LVU168 - 854 0128 0023 movs r3, #0 - 855 012a 4F4A ldr r2, .L80+8 - 856 012c 1380 strh r3, [r2] @ movhi - 483:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; - 857 .loc 1 483 13 is_stmt 1 view .LVU169 - 483:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; - 858 .loc 1 483 21 is_stmt 0 view .LVU170 - 859 012e 514A ldr r2, .L80+20 - ARM GAS /tmp/ccvzubVv.s page 156 + 849 .loc 1 479 27 is_stmt 0 view .LVU165 + 850 012a 534B ldr r3, .L89+8 + 851 012c 0222 movs r2, #2 + 852 012e 1A80 strh r2, [r3] @ movhi + 480:Src/stm32f7xx_it.c **** case AD9102_CMD_HEADER: // AD9102 command + 853 .loc 1 480 13 is_stmt 1 view .LVU166 + 854 0130 9FE7 b .L48 + 855 .L66: + 482:Src/stm32f7xx_it.c **** break; + 856 .loc 1 482 13 view .LVU167 + 482:Src/stm32f7xx_it.c **** break; + 857 .loc 1 482 27 is_stmt 0 view .LVU168 + 858 0132 514B ldr r3, .L89+8 + 859 0134 0222 movs r2, #2 + 860 0136 1A80 strh r2, [r3] @ movhi + 483:Src/stm32f7xx_it.c **** default: //error decoding header + 861 .loc 1 483 9 is_stmt 1 view .LVU169 + 862 0138 9BE7 b .L48 + 863 .L63: + 485:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 864 .loc 1 485 13 view .LVU170 + 485:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 865 .loc 1 485 27 is_stmt 0 view .LVU171 + 866 013a 0023 movs r3, #0 + 867 013c 4E4A ldr r2, .L89+8 + 868 013e 1380 strh r3, [r2] @ movhi + 486:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; + 869 .loc 1 486 13 is_stmt 1 view .LVU172 + 486:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; + 870 .loc 1 486 21 is_stmt 0 view .LVU173 + 871 0140 504A ldr r2, .L89+20 + 872 0142 1370 strb r3, [r2] + 489:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 873 .loc 1 489 13 is_stmt 1 view .LVU174 + 489:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 874 .loc 1 489 23 is_stmt 0 view .LVU175 + 875 0144 524A ldr r2, .L89+32 + 876 0146 1378 ldrb r3, [r2] @ zero_extendqisi2 + 489:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 877 .loc 1 489 27 view .LVU176 + 878 0148 43F00203 orr r3, r3, #2 + 879 014c 1370 strb r3, [r2] + 490:Src/stm32f7xx_it.c **** break; + 880 .loc 1 490 13 is_stmt 1 view .LVU177 + 490:Src/stm32f7xx_it.c **** break; + 881 .loc 1 490 23 is_stmt 0 view .LVU178 + 882 014e 4F4B ldr r3, .L89+28 + 883 0150 0222 movs r2, #2 + ARM GAS /tmp/ccdl7gEi.s page 157 - 860 0130 1370 strb r3, [r2] - 486:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 861 .loc 1 486 13 is_stmt 1 view .LVU171 - 486:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 862 .loc 1 486 23 is_stmt 0 view .LVU172 - 863 0132 534A ldr r2, .L80+32 - 864 0134 1378 ldrb r3, [r2] @ zero_extendqisi2 - 486:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 865 .loc 1 486 27 view .LVU173 - 866 0136 43F00203 orr r3, r3, #2 - 867 013a 1370 strb r3, [r2] - 487:Src/stm32f7xx_it.c **** break; - 868 .loc 1 487 13 is_stmt 1 view .LVU174 - 487:Src/stm32f7xx_it.c **** break; - 869 .loc 1 487 23 is_stmt 0 view .LVU175 - 870 013c 4F4B ldr r3, .L80+28 - 871 013e 0222 movs r2, #2 - 872 0140 1A70 strb r2, [r3] - 488:Src/stm32f7xx_it.c **** } - 873 .loc 1 488 9 is_stmt 1 view .LVU176 - 874 0142 96E7 b .L48 - 875 .L52: - 493:Src/stm32f7xx_it.c **** { - 876 .loc 1 493 9 view .LVU177 - 493:Src/stm32f7xx_it.c **** { - 877 .loc 1 493 25 is_stmt 0 view .LVU178 - 878 0144 4C49 ldr r1, .L80+24 - 879 0146 0888 ldrh r0, [r1] - 493:Src/stm32f7xx_it.c **** { - 880 .loc 1 493 12 view .LVU179 - 881 0148 41F21111 movw r1, #4369 - 882 014c 8842 cmp r0, r1 - 883 014e 12D0 beq .L78 - 505:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 884 .loc 1 505 13 is_stmt 1 view .LVU180 - 505:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 885 .loc 1 505 16 is_stmt 0 view .LVU181 - 886 0150 13F0010F tst r3, #1 - 887 0154 2AD0 beq .L68 - 506:Src/stm32f7xx_it.c **** else - 888 .loc 1 506 17 is_stmt 1 view .LVU182 - 506:Src/stm32f7xx_it.c **** else - 889 .loc 1 506 24 is_stmt 0 view .LVU183 - 890 0156 5908 lsrs r1, r3, #1 - 891 0158 0139 subs r1, r1, #1 - 892 015a 4A4C ldr r4, .L80+36 - 893 015c 34F81100 ldrh r0, [r4, r1, lsl #1] - 506:Src/stm32f7xx_it.c **** else - 894 .loc 1 506 47 view .LVU184 - 895 0160 00EB0222 add r2, r0, r2, lsl #8 - 896 0164 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - 897 .L69: - 509:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 898 .loc 1 509 12 is_stmt 1 view .LVU185 - 509:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 899 .loc 1 509 25 is_stmt 0 view .LVU186 - 900 0168 0133 adds r3, r3, #1 - ARM GAS /tmp/ccvzubVv.s page 157 + 884 0152 1A70 strb r2, [r3] + 491:Src/stm32f7xx_it.c **** } + 885 .loc 1 491 9 is_stmt 1 view .LVU179 + 886 0154 8DE7 b .L48 + 887 .L53: + 496:Src/stm32f7xx_it.c **** { + 888 .loc 1 496 9 view .LVU180 + 496:Src/stm32f7xx_it.c **** { + 889 .loc 1 496 25 is_stmt 0 view .LVU181 + 890 0156 4C49 ldr r1, .L89+24 + 891 0158 0888 ldrh r0, [r1] + 496:Src/stm32f7xx_it.c **** { + 892 .loc 1 496 12 view .LVU182 + 893 015a 48F68801 movw r1, #34952 + 894 015e 8842 cmp r0, r1 + 895 0160 12D0 beq .L86 + 508:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 896 .loc 1 508 13 is_stmt 1 view .LVU183 + 508:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 897 .loc 1 508 16 is_stmt 0 view .LVU184 + 898 0162 13F0010F tst r3, #1 + 899 0166 2AD0 beq .L71 + 509:Src/stm32f7xx_it.c **** else + 900 .loc 1 509 17 is_stmt 1 view .LVU185 + 509:Src/stm32f7xx_it.c **** else + 901 .loc 1 509 24 is_stmt 0 view .LVU186 + 902 0168 5908 lsrs r1, r3, #1 + 903 016a 0139 subs r1, r1, #1 + 904 016c 494C ldr r4, .L89+36 + 905 016e 34F81100 ldrh r0, [r4, r1, lsl #1] + 509:Src/stm32f7xx_it.c **** else + 906 .loc 1 509 47 view .LVU187 + 907 0172 00EB0222 add r2, r0, r2, lsl #8 + 908 0176 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 909 .L72: + 512:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 910 .loc 1 512 13 is_stmt 1 view .LVU188 + 512:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 911 .loc 1 512 26 is_stmt 0 view .LVU189 + 912 017a 0133 adds r3, r3, #1 + 913 017c 3E4A ldr r2, .L89+8 + 914 017e 1380 strh r3, [r2] @ movhi + 513:Src/stm32f7xx_it.c **** } + 915 .loc 1 513 13 is_stmt 1 view .LVU190 + 513:Src/stm32f7xx_it.c **** } + 916 .loc 1 513 39 is_stmt 0 view .LVU191 + 917 0180 454B ldr r3, .L89+40 + 918 0182 0022 movs r2, #0 + 919 0184 1A70 strb r2, [r3] + 920 0186 74E7 b .L48 + 921 .L86: + 498:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 922 .loc 1 498 13 is_stmt 1 view .LVU192 + 498:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 923 .loc 1 498 16 is_stmt 0 view .LVU193 + 924 0188 13F0010F tst r3, #1 + 925 018c 11D0 beq .L69 + ARM GAS /tmp/ccdl7gEi.s page 158 - 901 016a 3F4A ldr r2, .L80+8 - 902 016c 1380 strh r3, [r2] @ movhi - 510:Src/stm32f7xx_it.c **** } - 903 .loc 1 510 12 is_stmt 1 view .LVU187 - 510:Src/stm32f7xx_it.c **** } - 904 .loc 1 510 38 is_stmt 0 view .LVU188 - 905 016e 464B ldr r3, .L80+40 - 906 0170 0022 movs r2, #0 - 907 0172 1A70 strb r2, [r3] - 908 0174 7DE7 b .L48 - 909 .L78: - 495:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 910 .loc 1 495 13 is_stmt 1 view .LVU189 - 495:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 911 .loc 1 495 16 is_stmt 0 view .LVU190 - 912 0176 13F0010F tst r3, #1 - 913 017a 11D0 beq .L66 - 496:Src/stm32f7xx_it.c **** else - 914 .loc 1 496 17 is_stmt 1 view .LVU191 - 496:Src/stm32f7xx_it.c **** else - 915 .loc 1 496 24 is_stmt 0 view .LVU192 - 916 017c 5B08 lsrs r3, r3, #1 - 917 017e 013B subs r3, r3, #1 - 918 0180 4048 ldr r0, .L80+36 - 919 0182 30F81310 ldrh r1, [r0, r3, lsl #1] - 496:Src/stm32f7xx_it.c **** else - 920 .loc 1 496 51 view .LVU193 - 921 0186 01EB0222 add r2, r1, r2, lsl #8 - 922 018a 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 923 .L67: - 499:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 924 .loc 1 499 13 is_stmt 1 view .LVU194 - 499:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 925 .loc 1 499 23 is_stmt 0 view .LVU195 - 926 018e 3B4B ldr r3, .L80+28 - 927 0190 0122 movs r2, #1 - 928 0192 1A70 strb r2, [r3] - 500:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 929 .loc 1 500 13 is_stmt 1 view .LVU196 - 500:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 930 .loc 1 500 27 is_stmt 0 view .LVU197 - 931 0194 0023 movs r3, #0 - 932 0196 344A ldr r2, .L80+8 - 933 0198 1380 strh r3, [r2] @ movhi - 501:Src/stm32f7xx_it.c **** } - 934 .loc 1 501 13 is_stmt 1 view .LVU198 - 501:Src/stm32f7xx_it.c **** } - 935 .loc 1 501 21 is_stmt 0 view .LVU199 - 936 019a 364A ldr r2, .L80+20 - 937 019c 1370 strb r3, [r2] - 938 019e 68E7 b .L48 - 939 .L66: - 498:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 940 .loc 1 498 17 is_stmt 1 view .LVU200 - 498:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 941 .loc 1 498 40 is_stmt 0 view .LVU201 - 942 01a0 5B08 lsrs r3, r3, #1 - ARM GAS /tmp/ccvzubVv.s page 158 + 499:Src/stm32f7xx_it.c **** else + 926 .loc 1 499 17 is_stmt 1 view .LVU194 + 499:Src/stm32f7xx_it.c **** else + 927 .loc 1 499 24 is_stmt 0 view .LVU195 + 928 018e 5B08 lsrs r3, r3, #1 + 929 0190 013B subs r3, r3, #1 + 930 0192 4048 ldr r0, .L89+36 + 931 0194 30F81310 ldrh r1, [r0, r3, lsl #1] + 499:Src/stm32f7xx_it.c **** else + 932 .loc 1 499 51 view .LVU196 + 933 0198 01EB0222 add r2, r1, r2, lsl #8 + 934 019c 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 935 .L70: + 502:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 936 .loc 1 502 13 is_stmt 1 view .LVU197 + 502:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 937 .loc 1 502 23 is_stmt 0 view .LVU198 + 938 01a0 3A4B ldr r3, .L89+28 + 939 01a2 0A22 movs r2, #10 + 940 01a4 1A70 strb r2, [r3] + 503:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 941 .loc 1 503 13 is_stmt 1 view .LVU199 + 503:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 942 .loc 1 503 27 is_stmt 0 view .LVU200 + 943 01a6 0023 movs r3, #0 + 944 01a8 334A ldr r2, .L89+8 + 945 01aa 1380 strh r3, [r2] @ movhi + 504:Src/stm32f7xx_it.c **** } + 946 .loc 1 504 13 is_stmt 1 view .LVU201 + 504:Src/stm32f7xx_it.c **** } + 947 .loc 1 504 21 is_stmt 0 view .LVU202 + 948 01ac 354A ldr r2, .L89+20 + 949 01ae 1370 strb r3, [r2] + 950 01b0 5FE7 b .L48 + 951 .L69: + 501:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 952 .loc 1 501 17 is_stmt 1 view .LVU203 + 501:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 953 .loc 1 501 40 is_stmt 0 view .LVU204 + 954 01b2 5B08 lsrs r3, r3, #1 + 501:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 955 .loc 1 501 46 view .LVU205 + 956 01b4 013B subs r3, r3, #1 + 501:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 957 .loc 1 501 51 view .LVU206 + 958 01b6 3749 ldr r1, .L89+36 + 959 01b8 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 960 01bc F0E7 b .L70 + 961 .L71: + 511:Src/stm32f7xx_it.c **** UART_rec_incr++; + 962 .loc 1 511 17 is_stmt 1 view .LVU207 + 511:Src/stm32f7xx_it.c **** UART_rec_incr++; + 963 .loc 1 511 39 is_stmt 0 view .LVU208 + 964 01be 5908 lsrs r1, r3, #1 + 511:Src/stm32f7xx_it.c **** UART_rec_incr++; + 965 .loc 1 511 43 view .LVU209 + 966 01c0 0139 subs r1, r1, #1 + ARM GAS /tmp/ccdl7gEi.s page 159 - 498:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 943 .loc 1 498 46 view .LVU202 - 944 01a2 013B subs r3, r3, #1 - 498:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 945 .loc 1 498 51 view .LVU203 - 946 01a4 3749 ldr r1, .L80+36 - 947 01a6 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 948 01aa F0E7 b .L67 - 949 .L68: - 508:Src/stm32f7xx_it.c **** UART_rec_incr++; - 950 .loc 1 508 17 is_stmt 1 view .LVU204 - 508:Src/stm32f7xx_it.c **** UART_rec_incr++; - 951 .loc 1 508 39 is_stmt 0 view .LVU205 - 952 01ac 5908 lsrs r1, r3, #1 - 508:Src/stm32f7xx_it.c **** UART_rec_incr++; - 953 .loc 1 508 43 view .LVU206 - 954 01ae 0139 subs r1, r1, #1 - 508:Src/stm32f7xx_it.c **** UART_rec_incr++; - 955 .loc 1 508 47 view .LVU207 - 956 01b0 3448 ldr r0, .L80+36 - 957 01b2 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 958 01b6 D7E7 b .L69 - 959 .L50: - 514:Src/stm32f7xx_it.c **** { - 960 .loc 1 514 9 is_stmt 1 view .LVU208 - 514:Src/stm32f7xx_it.c **** { - 961 .loc 1 514 25 is_stmt 0 view .LVU209 - 962 01b8 2F49 ldr r1, .L80+24 - 963 01ba 0888 ldrh r0, [r1] - 514:Src/stm32f7xx_it.c **** { - 964 .loc 1 514 12 view .LVU210 - 965 01bc 47F27771 movw r1, #30583 - 966 01c0 8842 cmp r0, r1 - 967 01c2 12D0 beq .L79 - 526:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 968 .loc 1 526 13 is_stmt 1 view .LVU211 - 526:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 969 .loc 1 526 16 is_stmt 0 view .LVU212 - 970 01c4 13F0010F tst r3, #1 - 971 01c8 2AD0 beq .L73 - 527:Src/stm32f7xx_it.c **** else - 972 .loc 1 527 17 is_stmt 1 view .LVU213 - 527:Src/stm32f7xx_it.c **** else - 973 .loc 1 527 24 is_stmt 0 view .LVU214 - 974 01ca 5908 lsrs r1, r3, #1 - 975 01cc 0139 subs r1, r1, #1 - 976 01ce 2D4C ldr r4, .L80+36 - 977 01d0 34F81100 ldrh r0, [r4, r1, lsl #1] - 527:Src/stm32f7xx_it.c **** else - 978 .loc 1 527 47 view .LVU215 - 979 01d4 00EB0222 add r2, r0, r2, lsl #8 - 980 01d8 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - 981 .L74: - 530:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 982 .loc 1 530 13 is_stmt 1 view .LVU216 - 530:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 983 .loc 1 530 26 is_stmt 0 view .LVU217 - ARM GAS /tmp/ccvzubVv.s page 159 + 511:Src/stm32f7xx_it.c **** UART_rec_incr++; + 967 .loc 1 511 47 view .LVU210 + 968 01c2 3448 ldr r0, .L89+36 + 969 01c4 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 970 01c8 D7E7 b .L72 + 971 .L52: + 518:Src/stm32f7xx_it.c **** { + 972 .loc 1 518 9 is_stmt 1 view .LVU211 + 518:Src/stm32f7xx_it.c **** { + 973 .loc 1 518 25 is_stmt 0 view .LVU212 + 974 01ca 2F49 ldr r1, .L89+24 + 975 01cc 0888 ldrh r0, [r1] + 518:Src/stm32f7xx_it.c **** { + 976 .loc 1 518 12 view .LVU213 + 977 01ce 41F21111 movw r1, #4369 + 978 01d2 8842 cmp r0, r1 + 979 01d4 12D0 beq .L87 + 530:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 980 .loc 1 530 13 is_stmt 1 view .LVU214 + 530:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 981 .loc 1 530 16 is_stmt 0 view .LVU215 + 982 01d6 13F0010F tst r3, #1 + 983 01da 2AD0 beq .L76 + 531:Src/stm32f7xx_it.c **** else + 984 .loc 1 531 17 is_stmt 1 view .LVU216 + 531:Src/stm32f7xx_it.c **** else + 985 .loc 1 531 24 is_stmt 0 view .LVU217 + 986 01dc 5908 lsrs r1, r3, #1 + 987 01de 0139 subs r1, r1, #1 + 988 01e0 2C4C ldr r4, .L89+36 + 989 01e2 34F81100 ldrh r0, [r4, r1, lsl #1] + 531:Src/stm32f7xx_it.c **** else + 990 .loc 1 531 47 view .LVU218 + 991 01e6 00EB0222 add r2, r0, r2, lsl #8 + 992 01ea 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 993 .L77: + 534:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 994 .loc 1 534 12 is_stmt 1 view .LVU219 + 534:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 995 .loc 1 534 25 is_stmt 0 view .LVU220 + 996 01ee 0133 adds r3, r3, #1 + 997 01f0 214A ldr r2, .L89+8 + 998 01f2 1380 strh r3, [r2] @ movhi + 535:Src/stm32f7xx_it.c **** } + 999 .loc 1 535 12 is_stmt 1 view .LVU221 + 535:Src/stm32f7xx_it.c **** } + 1000 .loc 1 535 38 is_stmt 0 view .LVU222 + 1001 01f4 284B ldr r3, .L89+40 + 1002 01f6 0022 movs r2, #0 + 1003 01f8 1A70 strb r2, [r3] + 1004 01fa 3AE7 b .L48 + 1005 .L87: + 520:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1006 .loc 1 520 13 is_stmt 1 view .LVU223 + 520:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1007 .loc 1 520 16 is_stmt 0 view .LVU224 + 1008 01fc 13F0010F tst r3, #1 + ARM GAS /tmp/ccdl7gEi.s page 160 - 984 01dc 0133 adds r3, r3, #1 - 985 01de 224A ldr r2, .L80+8 - 986 01e0 1380 strh r3, [r2] @ movhi - 531:Src/stm32f7xx_it.c **** } - 987 .loc 1 531 13 is_stmt 1 view .LVU218 - 531:Src/stm32f7xx_it.c **** } - 988 .loc 1 531 39 is_stmt 0 view .LVU219 - 989 01e2 294B ldr r3, .L80+40 - 990 01e4 0022 movs r2, #0 - 991 01e6 1A70 strb r2, [r3] - 992 01e8 43E7 b .L48 - 993 .L79: - 516:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 994 .loc 1 516 13 is_stmt 1 view .LVU220 - 516:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 995 .loc 1 516 16 is_stmt 0 view .LVU221 - 996 01ea 13F0010F tst r3, #1 - 997 01ee 11D0 beq .L71 - 517:Src/stm32f7xx_it.c **** else - 998 .loc 1 517 16 is_stmt 1 view .LVU222 - 517:Src/stm32f7xx_it.c **** else - 999 .loc 1 517 23 is_stmt 0 view .LVU223 - 1000 01f0 5B08 lsrs r3, r3, #1 - 1001 01f2 013B subs r3, r3, #1 - 1002 01f4 2348 ldr r0, .L80+36 - 1003 01f6 30F81310 ldrh r1, [r0, r3, lsl #1] - 517:Src/stm32f7xx_it.c **** else - 1004 .loc 1 517 46 view .LVU224 - 1005 01fa 01EB0222 add r2, r1, r2, lsl #8 - 1006 01fe 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 1007 .L72: - 520:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1008 .loc 1 520 13 is_stmt 1 view .LVU225 - 520:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1009 .loc 1 520 23 is_stmt 0 view .LVU226 - 1010 0202 1E4B ldr r3, .L80+28 - 1011 0204 0822 movs r2, #8 - 1012 0206 1A70 strb r2, [r3] - 521:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1013 .loc 1 521 13 is_stmt 1 view .LVU227 - 521:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1014 .loc 1 521 27 is_stmt 0 view .LVU228 - 1015 0208 0023 movs r3, #0 - 1016 020a 174A ldr r2, .L80+8 - 1017 020c 1380 strh r3, [r2] @ movhi - 522:Src/stm32f7xx_it.c **** } - 1018 .loc 1 522 13 is_stmt 1 view .LVU229 - 522:Src/stm32f7xx_it.c **** } - 1019 .loc 1 522 21 is_stmt 0 view .LVU230 - 1020 020e 194A ldr r2, .L80+20 - 1021 0210 1370 strb r3, [r2] - 1022 0212 2EE7 b .L48 - 1023 .L71: - 519:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1024 .loc 1 519 17 is_stmt 1 view .LVU231 - 519:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1025 .loc 1 519 39 is_stmt 0 view .LVU232 - ARM GAS /tmp/ccvzubVv.s page 160 + 1009 0200 11D0 beq .L74 + 521:Src/stm32f7xx_it.c **** else + 1010 .loc 1 521 17 is_stmt 1 view .LVU225 + 521:Src/stm32f7xx_it.c **** else + 1011 .loc 1 521 24 is_stmt 0 view .LVU226 + 1012 0202 5B08 lsrs r3, r3, #1 + 1013 0204 013B subs r3, r3, #1 + 1014 0206 2348 ldr r0, .L89+36 + 1015 0208 30F81310 ldrh r1, [r0, r3, lsl #1] + 521:Src/stm32f7xx_it.c **** else + 1016 .loc 1 521 51 view .LVU227 + 1017 020c 01EB0222 add r2, r1, r2, lsl #8 + 1018 0210 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1019 .L75: + 524:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1020 .loc 1 524 13 is_stmt 1 view .LVU228 + 524:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1021 .loc 1 524 23 is_stmt 0 view .LVU229 + 1022 0214 1D4B ldr r3, .L89+28 + 1023 0216 0122 movs r2, #1 + 1024 0218 1A70 strb r2, [r3] + 525:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1025 .loc 1 525 13 is_stmt 1 view .LVU230 + 525:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1026 .loc 1 525 27 is_stmt 0 view .LVU231 + 1027 021a 0023 movs r3, #0 + 1028 021c 164A ldr r2, .L89+8 + 1029 021e 1380 strh r3, [r2] @ movhi + 526:Src/stm32f7xx_it.c **** } + 1030 .loc 1 526 13 is_stmt 1 view .LVU232 + 526:Src/stm32f7xx_it.c **** } + 1031 .loc 1 526 21 is_stmt 0 view .LVU233 + 1032 0220 184A ldr r2, .L89+20 + 1033 0222 1370 strb r3, [r2] + 1034 0224 25E7 b .L48 + 1035 .L74: + 523:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1036 .loc 1 523 17 is_stmt 1 view .LVU234 + 523:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1037 .loc 1 523 40 is_stmt 0 view .LVU235 + 1038 0226 5B08 lsrs r3, r3, #1 + 523:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1039 .loc 1 523 46 view .LVU236 + 1040 0228 013B subs r3, r3, #1 + 523:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1041 .loc 1 523 51 view .LVU237 + 1042 022a 1A49 ldr r1, .L89+36 + 1043 022c 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1044 0230 F0E7 b .L75 + 1045 .L76: + 533:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1046 .loc 1 533 17 is_stmt 1 view .LVU238 + 533:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1047 .loc 1 533 39 is_stmt 0 view .LVU239 + 1048 0232 5908 lsrs r1, r3, #1 + 533:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1049 .loc 1 533 43 view .LVU240 + ARM GAS /tmp/ccdl7gEi.s page 161 - 1026 0214 5B08 lsrs r3, r3, #1 - 519:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1027 .loc 1 519 43 view .LVU233 - 1028 0216 013B subs r3, r3, #1 - 519:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1029 .loc 1 519 47 view .LVU234 - 1030 0218 1A49 ldr r1, .L80+36 - 1031 021a 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 1032 021e F0E7 b .L72 - 1033 .L73: - 529:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1034 .loc 1 529 17 is_stmt 1 view .LVU235 - 529:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1035 .loc 1 529 39 is_stmt 0 view .LVU236 - 1036 0220 5908 lsrs r1, r3, #1 - 529:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1037 .loc 1 529 43 view .LVU237 - 1038 0222 0139 subs r1, r1, #1 - 529:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1039 .loc 1 529 47 view .LVU238 - 1040 0224 1748 ldr r0, .L80+36 - 1041 0226 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 1042 022a D7E7 b .L74 - 1043 .L49: - 535:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1044 .loc 1 535 9 is_stmt 1 view .LVU239 - 535:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1045 .loc 1 535 12 is_stmt 0 view .LVU240 - 1046 022c 13F0010F tst r3, #1 - 1047 0230 0FD0 beq .L75 - 536:Src/stm32f7xx_it.c **** else - 1048 .loc 1 536 13 is_stmt 1 view .LVU241 - 536:Src/stm32f7xx_it.c **** else - 1049 .loc 1 536 20 is_stmt 0 view .LVU242 - 1050 0232 5908 lsrs r1, r3, #1 - 1051 0234 0139 subs r1, r1, #1 - 1052 0236 134C ldr r4, .L80+36 - 1053 0238 34F81100 ldrh r0, [r4, r1, lsl #1] - 536:Src/stm32f7xx_it.c **** else - 1054 .loc 1 536 43 view .LVU243 - 1055 023c 00EB0222 add r2, r0, r2, lsl #8 - 1056 0240 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - 1057 .L76: - 539:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1058 .loc 1 539 9 is_stmt 1 view .LVU244 - 539:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1059 .loc 1 539 22 is_stmt 0 view .LVU245 - 1060 0244 0133 adds r3, r3, #1 - 1061 0246 084A ldr r2, .L80+8 - 1062 0248 1380 strh r3, [r2] @ movhi - 540:Src/stm32f7xx_it.c **** break; - 1063 .loc 1 540 9 is_stmt 1 view .LVU246 - 540:Src/stm32f7xx_it.c **** break; - 1064 .loc 1 540 35 is_stmt 0 view .LVU247 - 1065 024a 0F4B ldr r3, .L80+40 - 1066 024c 0022 movs r2, #0 - 1067 024e 1A70 strb r2, [r3] - ARM GAS /tmp/ccvzubVv.s page 161 + 1050 0234 0139 subs r1, r1, #1 + 533:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1051 .loc 1 533 47 view .LVU241 + 1052 0236 1748 ldr r0, .L89+36 + 1053 0238 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1054 023c D7E7 b .L77 + 1055 .L50: + 539:Src/stm32f7xx_it.c **** { + 1056 .loc 1 539 9 is_stmt 1 view .LVU242 + 539:Src/stm32f7xx_it.c **** { + 1057 .loc 1 539 25 is_stmt 0 view .LVU243 + 1058 023e 1249 ldr r1, .L89+24 + 1059 0240 0888 ldrh r0, [r1] + 539:Src/stm32f7xx_it.c **** { + 1060 .loc 1 539 12 view .LVU244 + 1061 0242 47F27771 movw r1, #30583 + 1062 0246 8842 cmp r0, r1 + 1063 0248 28D0 beq .L88 + 551:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1064 .loc 1 551 13 is_stmt 1 view .LVU245 + 551:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1065 .loc 1 551 16 is_stmt 0 view .LVU246 + 1066 024a 13F0010F tst r3, #1 + 1067 024e 40D0 beq .L81 + 552:Src/stm32f7xx_it.c **** else + 1068 .loc 1 552 17 is_stmt 1 view .LVU247 + 552:Src/stm32f7xx_it.c **** else + 1069 .loc 1 552 24 is_stmt 0 view .LVU248 + 1070 0250 5908 lsrs r1, r3, #1 + 1071 0252 0139 subs r1, r1, #1 + 1072 0254 0F4C ldr r4, .L89+36 + 1073 0256 34F81100 ldrh r0, [r4, r1, lsl #1] + 552:Src/stm32f7xx_it.c **** else + 1074 .loc 1 552 47 view .LVU249 + 1075 025a 00EB0222 add r2, r0, r2, lsl #8 + 1076 025e 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 1077 .L82: + 555:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1078 .loc 1 555 13 is_stmt 1 view .LVU250 + 555:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1079 .loc 1 555 26 is_stmt 0 view .LVU251 + 1080 0262 0133 adds r3, r3, #1 + 1081 0264 044A ldr r2, .L89+8 + 1082 0266 1380 strh r3, [r2] @ movhi + 556:Src/stm32f7xx_it.c **** } + 1083 .loc 1 556 13 is_stmt 1 view .LVU252 + 556:Src/stm32f7xx_it.c **** } + 1084 .loc 1 556 39 is_stmt 0 view .LVU253 + 1085 0268 0B4B ldr r3, .L89+40 + 1086 026a 0022 movs r2, #0 + 1087 026c 1A70 strb r2, [r3] + 1088 026e 00E7 b .L48 + 1089 .L90: + 1090 .align 2 + 1091 .L89: + 1092 0270 00100140 .word 1073811456 + 1093 0274 00000000 .word uart_buf + ARM GAS /tmp/ccdl7gEi.s page 162 - 541:Src/stm32f7xx_it.c **** } - 1068 .loc 1 541 5 is_stmt 1 view .LVU248 - 1069 .loc 1 544 1 is_stmt 0 view .LVU249 - 1070 0250 0FE7 b .L48 - 1071 .L75: - 538:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1072 .loc 1 538 13 is_stmt 1 view .LVU250 - 538:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1073 .loc 1 538 35 is_stmt 0 view .LVU251 - 1074 0252 5908 lsrs r1, r3, #1 - 538:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1075 .loc 1 538 39 view .LVU252 - 1076 0254 0139 subs r1, r1, #1 - 538:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1077 .loc 1 538 43 view .LVU253 - 1078 0256 0B48 ldr r0, .L80+36 - 1079 0258 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 1080 025c F2E7 b .L76 - 1081 .L81: - 1082 025e 00BF .align 2 - 1083 .L80: - 1084 0260 00100140 .word 1073811456 - 1085 0264 00000000 .word uart_buf - 1086 0268 00000000 .word UART_rec_incr - 1087 026c 00000000 .word TO6 - 1088 0270 00000000 .word TO6_uart - 1089 0274 00000000 .word flg_tmt - 1090 0278 00000000 .word UART_header - 1091 027c 00000000 .word CPU_state - 1092 0280 00000000 .word State_Data - 1093 0284 00000000 .word COMMAND - 1094 0288 00000000 .word UART_transmission_request - 1095 .cfi_endproc - 1096 .LFE1202: - 1098 .section .text.USART1_IRQHandler,"ax",%progbits - 1099 .align 1 - 1100 .global USART1_IRQHandler - 1101 .syntax unified - 1102 .thumb - 1103 .thumb_func - 1105 USART1_IRQHandler: - 1106 .LFB1196: + 1094 0278 00000000 .word UART_rec_incr + 1095 027c 00000000 .word TO6 + 1096 0280 00000000 .word TO6_uart + 1097 0284 00000000 .word flg_tmt + 1098 0288 00000000 .word UART_header + 1099 028c 00000000 .word CPU_state + 1100 0290 00000000 .word State_Data + 1101 0294 00000000 .word COMMAND + 1102 0298 00000000 .word UART_transmission_request + 1103 .L88: + 541:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1104 .loc 1 541 13 is_stmt 1 view .LVU254 + 541:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1105 .loc 1 541 16 is_stmt 0 view .LVU255 + 1106 029c 13F0010F tst r3, #1 + 1107 02a0 11D0 beq .L79 + 542:Src/stm32f7xx_it.c **** else + 1108 .loc 1 542 16 is_stmt 1 view .LVU256 + 542:Src/stm32f7xx_it.c **** else + 1109 .loc 1 542 23 is_stmt 0 view .LVU257 + 1110 02a2 5B08 lsrs r3, r3, #1 + 1111 02a4 013B subs r3, r3, #1 + 1112 02a6 1A48 ldr r0, .L91 + 1113 02a8 30F81310 ldrh r1, [r0, r3, lsl #1] + 542:Src/stm32f7xx_it.c **** else + 1114 .loc 1 542 46 view .LVU258 + 1115 02ac 01EB0222 add r2, r1, r2, lsl #8 + 1116 02b0 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1117 .L80: + 545:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1118 .loc 1 545 13 is_stmt 1 view .LVU259 + 545:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1119 .loc 1 545 23 is_stmt 0 view .LVU260 + 1120 02b4 174B ldr r3, .L91+4 + 1121 02b6 0822 movs r2, #8 + 1122 02b8 1A70 strb r2, [r3] + 546:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1123 .loc 1 546 13 is_stmt 1 view .LVU261 + 546:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1124 .loc 1 546 27 is_stmt 0 view .LVU262 + 1125 02ba 0023 movs r3, #0 + 1126 02bc 164A ldr r2, .L91+8 + 1127 02be 1380 strh r3, [r2] @ movhi + 547:Src/stm32f7xx_it.c **** } + 1128 .loc 1 547 13 is_stmt 1 view .LVU263 + 547:Src/stm32f7xx_it.c **** } + 1129 .loc 1 547 21 is_stmt 0 view .LVU264 + 1130 02c0 164A ldr r2, .L91+12 + 1131 02c2 1370 strb r3, [r2] + 1132 02c4 D5E6 b .L48 + 1133 .L79: + 544:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1134 .loc 1 544 17 is_stmt 1 view .LVU265 + 544:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1135 .loc 1 544 39 is_stmt 0 view .LVU266 + 1136 02c6 5B08 lsrs r3, r3, #1 + 544:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + ARM GAS /tmp/ccdl7gEi.s page 163 + + + 1137 .loc 1 544 43 view .LVU267 + 1138 02c8 013B subs r3, r3, #1 + 544:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1139 .loc 1 544 47 view .LVU268 + 1140 02ca 1149 ldr r1, .L91 + 1141 02cc 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1142 02d0 F0E7 b .L80 + 1143 .L81: + 554:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1144 .loc 1 554 17 is_stmt 1 view .LVU269 + 554:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1145 .loc 1 554 39 is_stmt 0 view .LVU270 + 1146 02d2 5908 lsrs r1, r3, #1 + 554:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1147 .loc 1 554 43 view .LVU271 + 1148 02d4 0139 subs r1, r1, #1 + 554:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1149 .loc 1 554 47 view .LVU272 + 1150 02d6 0E48 ldr r0, .L91 + 1151 02d8 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1152 02dc C1E7 b .L82 + 1153 .L49: + 560:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1154 .loc 1 560 9 is_stmt 1 view .LVU273 + 560:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1155 .loc 1 560 12 is_stmt 0 view .LVU274 + 1156 02de 13F0010F tst r3, #1 + 1157 02e2 0FD0 beq .L83 + 561:Src/stm32f7xx_it.c **** else + 1158 .loc 1 561 13 is_stmt 1 view .LVU275 + 561:Src/stm32f7xx_it.c **** else + 1159 .loc 1 561 20 is_stmt 0 view .LVU276 + 1160 02e4 5908 lsrs r1, r3, #1 + 1161 02e6 0139 subs r1, r1, #1 + 1162 02e8 094C ldr r4, .L91 + 1163 02ea 34F81100 ldrh r0, [r4, r1, lsl #1] + 561:Src/stm32f7xx_it.c **** else + 1164 .loc 1 561 43 view .LVU277 + 1165 02ee 00EB0222 add r2, r0, r2, lsl #8 + 1166 02f2 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 1167 .L84: + 564:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1168 .loc 1 564 9 is_stmt 1 view .LVU278 + 564:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1169 .loc 1 564 22 is_stmt 0 view .LVU279 + 1170 02f6 0133 adds r3, r3, #1 + 1171 02f8 074A ldr r2, .L91+8 + 1172 02fa 1380 strh r3, [r2] @ movhi + 565:Src/stm32f7xx_it.c **** break; + 1173 .loc 1 565 9 is_stmt 1 view .LVU280 + 565:Src/stm32f7xx_it.c **** break; + 1174 .loc 1 565 35 is_stmt 0 view .LVU281 + 1175 02fc 084B ldr r3, .L91+16 + 1176 02fe 0022 movs r2, #0 + 1177 0300 1A70 strb r2, [r3] + 566:Src/stm32f7xx_it.c **** } + 1178 .loc 1 566 5 is_stmt 1 view .LVU282 + ARM GAS /tmp/ccdl7gEi.s page 164 + + + 1179 .loc 1 569 1 is_stmt 0 view .LVU283 + 1180 0302 B6E6 b .L48 + 1181 .L83: + 563:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1182 .loc 1 563 13 is_stmt 1 view .LVU284 + 563:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1183 .loc 1 563 35 is_stmt 0 view .LVU285 + 1184 0304 5908 lsrs r1, r3, #1 + 563:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1185 .loc 1 563 39 view .LVU286 + 1186 0306 0139 subs r1, r1, #1 + 563:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1187 .loc 1 563 43 view .LVU287 + 1188 0308 0148 ldr r0, .L91 + 1189 030a 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1190 030e F2E7 b .L84 + 1191 .L92: + 1192 .align 2 + 1193 .L91: + 1194 0310 00000000 .word COMMAND + 1195 0314 00000000 .word CPU_state + 1196 0318 00000000 .word UART_rec_incr + 1197 031c 00000000 .word flg_tmt + 1198 0320 00000000 .word UART_transmission_request + 1199 .cfi_endproc + 1200 .LFE1202: + 1202 .section .text.USART1_IRQHandler,"ax",%progbits + 1203 .align 1 + 1204 .global USART1_IRQHandler + 1205 .syntax unified + 1206 .thumb + 1207 .thumb_func + 1209 USART1_IRQHandler: + 1210 .LFB1196: 277:Src/stm32f7xx_it.c **** /* USER CODE BEGIN USART1_IRQn 0 */ - 1107 .loc 1 277 1 is_stmt 1 view -0 - 1108 .cfi_startproc - 1109 @ args = 0, pretend = 0, frame = 8 - 1110 @ frame_needed = 0, uses_anonymous_args = 0 - 1111 0000 00B5 push {lr} - 1112 .LCFI9: - 1113 .cfi_def_cfa_offset 4 - 1114 .cfi_offset 14, -4 - 1115 0002 83B0 sub sp, sp, #12 - 1116 .LCFI10: - 1117 .cfi_def_cfa_offset 16 + 1211 .loc 1 277 1 is_stmt 1 view -0 + 1212 .cfi_startproc + 1213 @ args = 0, pretend = 0, frame = 8 + 1214 @ frame_needed = 0, uses_anonymous_args = 0 + 1215 0000 00B5 push {lr} + 1216 .LCFI9: + 1217 .cfi_def_cfa_offset 4 + 1218 .cfi_offset 14, -4 + 1219 0002 83B0 sub sp, sp, #12 + 1220 .LCFI10: + 1221 .cfi_def_cfa_offset 16 279:Src/stm32f7xx_it.c **** if(LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1)) - 1118 .loc 1 279 3 view .LVU255 + 1222 .loc 1 279 3 view .LVU289 280:Src/stm32f7xx_it.c **** { - ARM GAS /tmp/ccvzubVv.s page 162 - - - 1119 .loc 1 280 3 view .LVU256 - 1120 .LVL19: - 1121 .LBB68: - 1122 .LBI68: + 1223 .loc 1 280 3 view .LVU290 + 1224 .LVL19: + 1225 .LBB68: + 1226 .LBI68: 2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1123 .loc 3 2640 26 view .LVU257 - 1124 .LBB69: + 1227 .loc 3 2640 26 view .LVU291 + 1228 .LBB69: 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1125 .loc 3 2642 3 view .LVU258 + ARM GAS /tmp/ccdl7gEi.s page 165 + + + 1229 .loc 3 2642 3 view .LVU292 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1126 .loc 3 2642 12 is_stmt 0 view .LVU259 - 1127 0004 304B ldr r3, .L98 - 1128 0006 DB69 ldr r3, [r3, #28] + 1230 .loc 3 2642 12 is_stmt 0 view .LVU293 + 1231 0004 304B ldr r3, .L109 + 1232 0006 DB69 ldr r3, [r3, #28] 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1129 .loc 3 2642 77 view .LVU260 - 1130 0008 13F0200F tst r3, #32 - 1131 000c 07D0 beq .L83 - 1132 .LVL20: + 1233 .loc 3 2642 77 view .LVU294 + 1234 0008 13F0200F tst r3, #32 + 1235 000c 07D0 beq .L94 + 1236 .LVL20: 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1133 .loc 3 2642 77 view .LVU261 - 1134 .LBE69: - 1135 .LBE68: - 1136 .LBB70: - 1137 .LBI70: + 1237 .loc 3 2642 77 view .LVU295 + 1238 .LBE69: + 1239 .LBE68: + 1240 .LBB70: + 1241 .LBI70: 3366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1138 .loc 3 3366 26 is_stmt 1 view .LVU262 - 1139 .LBB71: + 1242 .loc 3 3366 26 is_stmt 1 view .LVU296 + 1243 .LBB71: 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1140 .loc 3 3368 3 view .LVU263 + 1244 .loc 3 3368 3 view .LVU297 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1141 .loc 3 3368 12 is_stmt 0 view .LVU264 - 1142 000e 2E4B ldr r3, .L98 - 1143 0010 1B68 ldr r3, [r3] + 1245 .loc 3 3368 12 is_stmt 0 view .LVU298 + 1246 000e 2E4B ldr r3, .L109 + 1247 0010 1B68 ldr r3, [r3] 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1144 .loc 3 3368 80 view .LVU265 - 1145 0012 13F0200F tst r3, #32 - 1146 0016 02D0 beq .L83 - 1147 .LVL21: + 1248 .loc 3 3368 80 view .LVU299 + 1249 0012 13F0200F tst r3, #32 + 1250 0016 02D0 beq .L94 + 1251 .LVL21: 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1148 .loc 3 3368 80 view .LVU266 - 1149 .LBE71: - 1150 .LBE70: + 1252 .loc 3 3368 80 view .LVU300 + 1253 .LBE71: + 1254 .LBE70: 282:Src/stm32f7xx_it.c **** } - 1151 .loc 1 282 5 is_stmt 1 view .LVU267 - 1152 0018 FFF7FEFF bl UART_RxCpltCallback - 1153 .LVL22: - 1154 001c 33E0 b .L82 - 1155 .L83: + 1255 .loc 1 282 5 is_stmt 1 view .LVU301 + 1256 0018 FFF7FEFF bl UART_RxCpltCallback + 1257 .LVL22: + 1258 001c 33E0 b .L93 + 1259 .L94: 286:Src/stm32f7xx_it.c **** { - 1156 .loc 1 286 5 view .LVU268 - 1157 .LVL23: - 1158 .LBB72: - 1159 .LBI72: + 1260 .loc 1 286 5 view .LVU302 + 1261 .LVL23: + 1262 .LBB72: + 1263 .LBI72: 2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1160 .loc 3 2618 26 view .LVU269 - 1161 .LBB73: + 1264 .loc 3 2618 26 view .LVU303 + 1265 .LBB73: 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccvzubVv.s page 163 + 1266 .loc 3 2620 3 view .LVU304 +2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 1267 .loc 3 2620 12 is_stmt 0 view .LVU305 + 1268 001e 2A4B ldr r3, .L109 + 1269 0020 DB69 ldr r3, [r3, #28] +2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 1270 .loc 3 2620 75 view .LVU306 + 1271 0022 13F0080F tst r3, #8 + ARM GAS /tmp/ccdl7gEi.s page 166 - 1162 .loc 3 2620 3 view .LVU270 + 1272 0026 25D1 bne .L96 + 1273 .LVL24: 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1163 .loc 3 2620 12 is_stmt 0 view .LVU271 - 1164 001e 2A4B ldr r3, .L98 - 1165 0020 DB69 ldr r3, [r3, #28] -2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1166 .loc 3 2620 75 view .LVU272 - 1167 0022 13F0080F tst r3, #8 - 1168 0026 25D1 bne .L85 - 1169 .LVL24: -2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1170 .loc 3 2620 75 view .LVU273 - 1171 .LBE73: - 1172 .LBE72: + 1274 .loc 3 2620 75 view .LVU307 + 1275 .LBE73: + 1276 .LBE72: 291:Src/stm32f7xx_it.c **** { - 1173 .loc 1 291 10 is_stmt 1 view .LVU274 - 1174 .LBB74: - 1175 .LBI74: + 1277 .loc 1 291 10 is_stmt 1 view .LVU308 + 1278 .LBB74: + 1279 .LBI74: 2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1176 .loc 3 2596 26 view .LVU275 - 1177 .LBB75: + 1280 .loc 3 2596 26 view .LVU309 + 1281 .LBB75: 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1178 .loc 3 2598 3 view .LVU276 + 1282 .loc 3 2598 3 view .LVU310 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1179 .loc 3 2598 12 is_stmt 0 view .LVU277 - 1180 0028 274B ldr r3, .L98 - 1181 002a DB69 ldr r3, [r3, #28] + 1283 .loc 3 2598 12 is_stmt 0 view .LVU311 + 1284 0028 274B ldr r3, .L109 + 1285 002a DB69 ldr r3, [r3, #28] 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1182 .loc 3 2598 73 view .LVU278 - 1183 002c 13F0020F tst r3, #2 - 1184 0030 2CD1 bne .L86 - 1185 .LVL25: + 1286 .loc 3 2598 73 view .LVU312 + 1287 002c 13F0020F tst r3, #2 + 1288 0030 2CD1 bne .L97 + 1289 .LVL25: 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1186 .loc 3 2598 73 view .LVU279 - 1187 .LBE75: - 1188 .LBE74: + 1290 .loc 3 2598 73 view .LVU313 + 1291 .LBE75: + 1292 .LBE74: 296:Src/stm32f7xx_it.c **** { - 1189 .loc 1 296 10 is_stmt 1 view .LVU280 - 1190 .LBB76: - 1191 .LBI76: + 1293 .loc 1 296 10 is_stmt 1 view .LVU314 + 1294 .LBB76: + 1295 .LBI76: 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1192 .loc 3 2607 26 view .LVU281 - 1193 .LBB77: + 1296 .loc 3 2607 26 view .LVU315 + 1297 .LBB77: 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1194 .loc 3 2609 3 view .LVU282 + 1298 .loc 3 2609 3 view .LVU316 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1195 .loc 3 2609 12 is_stmt 0 view .LVU283 - 1196 0032 254B ldr r3, .L98 - 1197 0034 DB69 ldr r3, [r3, #28] + 1299 .loc 3 2609 12 is_stmt 0 view .LVU317 + 1300 0032 254B ldr r3, .L109 + 1301 0034 DB69 ldr r3, [r3, #28] 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1198 .loc 3 2609 73 view .LVU284 - 1199 0036 13F0040F tst r3, #4 - 1200 003a 31D1 bne .L88 - 1201 .LVL26: + 1302 .loc 3 2609 73 view .LVU318 + 1303 0036 13F0040F tst r3, #4 + 1304 003a 31D1 bne .L99 + 1305 .LVL26: 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1202 .loc 3 2609 73 view .LVU285 - 1203 .LBE77: - ARM GAS /tmp/ccvzubVv.s page 164 - - - 1204 .LBE76: + 1306 .loc 3 2609 73 view .LVU319 + 1307 .LBE77: + 1308 .LBE76: 301:Src/stm32f7xx_it.c **** { - 1205 .loc 1 301 10 is_stmt 1 view .LVU286 - 1206 .LBB78: - 1207 .LBI78: + 1309 .loc 1 301 10 is_stmt 1 view .LVU320 + 1310 .LBB78: + 1311 .LBI78: 2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1208 .loc 3 2585 26 view .LVU287 - 1209 .LBB79: + 1312 .loc 3 2585 26 view .LVU321 + 1313 .LBB79: + ARM GAS /tmp/ccdl7gEi.s page 167 + + 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1210 .loc 3 2587 3 view .LVU288 + 1314 .loc 3 2587 3 view .LVU322 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1211 .loc 3 2587 12 is_stmt 0 view .LVU289 - 1212 003c 224B ldr r3, .L98 - 1213 003e DB69 ldr r3, [r3, #28] + 1315 .loc 3 2587 12 is_stmt 0 view .LVU323 + 1316 003c 224B ldr r3, .L109 + 1317 003e DB69 ldr r3, [r3, #28] 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1214 .loc 3 2587 73 view .LVU290 - 1215 0040 13F0010F tst r3, #1 - 1216 0044 36D1 bne .L90 - 1217 .LVL27: + 1318 .loc 3 2587 73 view .LVU324 + 1319 0040 13F0010F tst r3, #1 + 1320 0044 36D1 bne .L101 + 1321 .LVL27: 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1218 .loc 3 2587 73 view .LVU291 - 1219 .LBE79: - 1220 .LBE78: + 1322 .loc 3 2587 73 view .LVU325 + 1323 .LBE79: + 1324 .LBE78: 308:Src/stm32f7xx_it.c **** { - 1221 .loc 1 308 7 is_stmt 1 view .LVU292 - 1222 .LBB80: - 1223 .LBI80: + 1325 .loc 1 308 7 is_stmt 1 view .LVU326 + 1326 .LBB80: + 1327 .LBI80: 2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1224 .loc 3 2651 26 view .LVU293 - 1225 .LBB81: + 1328 .loc 3 2651 26 view .LVU327 + 1329 .LBB81: 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1226 .loc 3 2653 3 view .LVU294 + 1330 .loc 3 2653 3 view .LVU328 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1227 .loc 3 2653 12 is_stmt 0 view .LVU295 - 1228 0046 214B ldr r3, .L98+4 - 1229 0048 DB69 ldr r3, [r3, #28] + 1331 .loc 3 2653 12 is_stmt 0 view .LVU329 + 1332 0046 214B ldr r3, .L109+4 + 1333 0048 DB69 ldr r3, [r3, #28] 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1230 .loc 3 2653 73 view .LVU296 - 1231 004a 13F0400F tst r3, #64 - 1232 004e 1AD0 beq .L82 - 1233 .LVL28: + 1334 .loc 3 2653 73 view .LVU330 + 1335 004a 13F0400F tst r3, #64 + 1336 004e 1AD0 beq .L93 + 1337 .LVL28: 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1234 .loc 3 2653 73 view .LVU297 - 1235 .LBE81: - 1236 .LBE80: - 1237 .LBB82: - 1238 .LBI82: + 1338 .loc 3 2653 73 view .LVU331 + 1339 .LBE81: + 1340 .LBE80: + 1341 .LBB82: + 1342 .LBI82: 3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1239 .loc 3 3377 26 is_stmt 1 view .LVU298 - 1240 .LBB83: + 1343 .loc 3 3377 26 is_stmt 1 view .LVU332 + 1344 .LBB83: 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1241 .loc 3 3379 3 view .LVU299 + 1345 .loc 3 3379 3 view .LVU333 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1242 .loc 3 3379 12 is_stmt 0 view .LVU300 - 1243 0050 1E4B ldr r3, .L98+4 - 1244 0052 1B68 ldr r3, [r3] + 1346 .loc 3 3379 12 is_stmt 0 view .LVU334 + 1347 0050 1E4B ldr r3, .L109+4 + 1348 0052 1B68 ldr r3, [r3] 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccvzubVv.s page 165 + 1349 .loc 3 3379 77 view .LVU335 + 1350 0054 13F0400F tst r3, #64 + 1351 0058 15D0 beq .L93 + 1352 .LVL29: +3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 1353 .loc 3 3379 77 view .LVU336 + 1354 .LBE83: + 1355 .LBE82: + ARM GAS /tmp/ccdl7gEi.s page 168 - 1245 .loc 3 3379 77 view .LVU301 - 1246 0054 13F0400F tst r3, #64 - 1247 0058 15D0 beq .L82 - 1248 .LVL29: -3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1249 .loc 3 3379 77 view .LVU302 - 1250 .LBE83: - 1251 .LBE82: 310:Src/stm32f7xx_it.c **** //test_counter += 1; - 1252 .loc 1 310 9 is_stmt 1 view .LVU303 - 1253 .LBB84: - 1254 .LBI84: + 1356 .loc 1 310 9 is_stmt 1 view .LVU337 + 1357 .LBB84: + 1358 .LBI84: 2916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1255 .loc 3 2916 22 view .LVU304 - 1256 .LBB85: + 1359 .loc 3 2916 22 view .LVU338 + 1360 .LBB85: 2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1257 .loc 3 2918 3 view .LVU305 - 1258 005a 1B4B ldr r3, .L98 - 1259 005c 4022 movs r2, #64 - 1260 005e 1A62 str r2, [r3, #32] - 1261 .LVL30: + 1361 .loc 3 2918 3 view .LVU339 + 1362 005a 1B4B ldr r3, .L109 + 1363 005c 4022 movs r2, #64 + 1364 005e 1A62 str r2, [r3, #32] + 1365 .LVL30: 2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1262 .loc 3 2918 3 is_stmt 0 view .LVU306 - 1263 .LBE85: - 1264 .LBE84: + 1366 .loc 3 2918 3 is_stmt 0 view .LVU340 + 1367 .LBE85: + 1368 .LBE84: 313:Src/stm32f7xx_it.c **** //UART_transmission_busy = 0; - 1265 .loc 1 313 9 is_stmt 1 view .LVU307 - 1266 .LBB86: - 1267 .LBI86: + 1369 .loc 1 313 9 is_stmt 1 view .LVU341 + 1370 .LBB86: + 1371 .LBI86: 3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1268 .loc 3 3213 22 view .LVU308 - 1269 .L93: + 1372 .loc 3 3213 22 view .LVU342 + 1373 .L104: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1270 .loc 3 3215 3 discriminator 1 view .LVU309 - 1271 .LBB87: + 1374 .loc 3 3215 3 discriminator 1 view .LVU343 + 1375 .LBB87: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1272 .loc 3 3215 3 discriminator 1 view .LVU310 + 1376 .loc 3 3215 3 discriminator 1 view .LVU344 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1273 .loc 3 3215 3 discriminator 1 view .LVU311 + 1377 .loc 3 3215 3 discriminator 1 view .LVU345 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1274 .loc 3 3215 3 discriminator 1 view .LVU312 - 1275 .LBB88: - 1276 .LBI88: - 1277 .file 4 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1378 .loc 3 3215 3 discriminator 1 view .LVU346 + 1379 .LBB88: + 1380 .LBI88: + 1381 .file 4 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file @@ -9898,9 +10070,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. - ARM GAS /tmp/ccvzubVv.s page 166 - - 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 @@ -9909,6 +10078,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + ARM GAS /tmp/ccdl7gEi.s page 169 + + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -9958,9 +10130,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ - ARM GAS /tmp/ccvzubVv.s page 167 - - 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" @@ -9969,6 +10138,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + ARM GAS /tmp/ccdl7gEi.s page 170 + + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" @@ -10018,9 +10190,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - ARM GAS /tmp/ccvzubVv.s page 168 - - 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -10029,6 +10198,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccdl7gEi.s page 171 + + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. @@ -10078,9 +10250,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccvzubVv.s page 169 - - 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 186:Drivers/CMSIS/Include/cmsis_gcc.h **** 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) @@ -10089,6 +10258,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccdl7gEi.s page 172 + + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); @@ -10138,9 +10310,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** 241:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccvzubVv.s page 170 - - 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). @@ -10149,6 +10318,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + ARM GAS /tmp/ccdl7gEi.s page 173 + + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -10198,9 +10370,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). - ARM GAS /tmp/ccvzubVv.s page 171 - - 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) @@ -10209,6 +10378,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 304:Drivers/CMSIS/Include/cmsis_gcc.h **** 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccdl7gEi.s page 174 + + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10258,9 +10430,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccvzubVv.s page 172 - - 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -10269,6 +10438,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccdl7gEi.s page 175 + + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) @@ -10318,9 +10490,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) - ARM GAS /tmp/ccvzubVv.s page 173 - - 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -10329,6 +10498,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + ARM GAS /tmp/ccdl7gEi.s page 176 + + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -10378,9 +10550,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } 468:Drivers/CMSIS/Include/cmsis_gcc.h **** 469:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccvzubVv.s page 174 - - 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) @@ -10389,6 +10558,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccdl7gEi.s page 177 + + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 479:Drivers/CMSIS/Include/cmsis_gcc.h **** 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); @@ -10438,9 +10610,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccvzubVv.s page 175 - - 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -10449,6 +10618,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccdl7gEi.s page 178 + + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -10498,9 +10670,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 582:Drivers/CMSIS/Include/cmsis_gcc.h **** 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccvzubVv.s page 176 - - 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure @@ -10509,6 +10678,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccdl7gEi.s page 179 + + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ @@ -10558,9 +10730,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - ARM GAS /tmp/ccvzubVv.s page 177 - - 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else @@ -10569,6 +10738,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } 647:Drivers/CMSIS/Include/cmsis_gcc.h **** 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccdl7gEi.s page 180 + + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) @@ -10618,9 +10790,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. - ARM GAS /tmp/ccvzubVv.s page 178 - - 698:Drivers/CMSIS/Include/cmsis_gcc.h **** 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value @@ -10629,6 +10798,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + ARM GAS /tmp/ccdl7gEi.s page 181 + + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -10678,9 +10850,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccvzubVv.s page 179 - - 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 756:Drivers/CMSIS/Include/cmsis_gcc.h **** 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ @@ -10689,6 +10858,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 760:Drivers/CMSIS/Include/cmsis_gcc.h **** 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + ARM GAS /tmp/ccdl7gEi.s page 182 + + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -10738,9 +10910,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 811:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccvzubVv.s page 180 - - 812:Drivers/CMSIS/Include/cmsis_gcc.h **** 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface @@ -10749,6 +10918,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 818:Drivers/CMSIS/Include/cmsis_gcc.h **** 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + ARM GAS /tmp/ccdl7gEi.s page 183 + + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) @@ -10798,9 +10970,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); - ARM GAS /tmp/ccvzubVv.s page 181 - - 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 870:Drivers/CMSIS/Include/cmsis_gcc.h **** 871:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10809,6 +10978,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccdl7gEi.s page 184 + + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); @@ -10858,9 +11030,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccvzubVv.s page 182 - - 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -10869,6 +11038,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccdl7gEi.s page 185 + + 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) @@ -10918,9 +11090,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccvzubVv.s page 183 - - 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 984:Drivers/CMSIS/Include/cmsis_gcc.h **** 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ @@ -10929,6 +11098,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + ARM GAS /tmp/ccdl7gEi.s page 186 + + 991:Drivers/CMSIS/Include/cmsis_gcc.h **** 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) @@ -10978,9 +11150,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccvzubVv.s page 184 - - 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit) 1042:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values. @@ -10989,6 +11158,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccdl7gEi.s page 187 + + 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) @@ -11010,38 +11182,35 @@ ARM GAS /tmp/ccvzubVv.s page 1 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) - 1278 .loc 4 1068 31 view .LVU313 - 1279 .LBB89: + 1382 .loc 4 1068 31 view .LVU347 + 1383 .LBB89: 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 1280 .loc 4 1070 5 view .LVU314 + 1384 .loc 4 1070 5 view .LVU348 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 1281 .loc 4 1072 4 view .LVU315 - 1282 0060 194A ldr r2, .L98 - 1283 .syntax unified - 1284 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 1285 0062 52E8003F ldrex r3, [r2] - 1286 @ 0 "" 2 - 1287 .LVL31: + 1385 .loc 4 1072 4 view .LVU349 + 1386 0060 194A ldr r2, .L109 + 1387 .syntax unified + 1388 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1389 0062 52E8003F ldrex r3, [r2] + 1390 @ 0 "" 2 + 1391 .LVL31: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 1288 .loc 4 1073 4 view .LVU316 - 1289 .loc 4 1073 4 is_stmt 0 view .LVU317 - 1290 .thumb - 1291 .syntax unified - 1292 .LBE89: - 1293 .LBE88: + 1392 .loc 4 1073 4 view .LVU350 + 1393 .loc 4 1073 4 is_stmt 0 view .LVU351 + 1394 .thumb + 1395 .syntax unified + 1396 .LBE89: + 1397 .LBE88: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1294 .loc 3 3215 3 discriminator 1 view .LVU318 - 1295 0066 23F04003 bic r3, r3, #64 - 1296 .LVL32: + 1398 .loc 3 3215 3 discriminator 1 view .LVU352 + 1399 0066 23F04003 bic r3, r3, #64 + 1400 .LVL32: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1297 .loc 3 3215 3 is_stmt 1 discriminator 1 view .LVU319 - 1298 .LBB90: - ARM GAS /tmp/ccvzubVv.s page 185 - - - 1299 .LBI90: + 1401 .loc 3 3215 3 is_stmt 1 discriminator 1 view .LVU353 + 1402 .LBB90: + 1403 .LBI90: 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11049,6 +11218,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit) 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values. 1080:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store + ARM GAS /tmp/ccdl7gEi.s page 188 + + 1081:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1082:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1083:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed @@ -11088,180 +11260,180 @@ ARM GAS /tmp/ccvzubVv.s page 1 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) - 1300 .loc 4 1119 31 view .LVU320 - 1301 .LBB91: + 1404 .loc 4 1119 31 view .LVU354 + 1405 .LBB91: 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 1302 .loc 4 1121 4 view .LVU321 + 1406 .loc 4 1121 4 view .LVU355 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 1303 .loc 4 1123 4 view .LVU322 - 1304 .syntax unified - 1305 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - ARM GAS /tmp/ccvzubVv.s page 186 - - - 1306 006a 42E80031 strex r1, r3, [r2] - 1307 @ 0 "" 2 - 1308 .LVL33: + 1407 .loc 4 1123 4 view .LVU356 + 1408 .syntax unified + 1409 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1410 006a 42E80031 strex r1, r3, [r2] + 1411 @ 0 "" 2 + 1412 .LVL33: 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 1309 .loc 4 1124 4 view .LVU323 - 1310 .loc 4 1124 4 is_stmt 0 view .LVU324 - 1311 .thumb - 1312 .syntax unified - 1313 .LBE91: - 1314 .LBE90: + 1413 .loc 4 1124 4 view .LVU357 + 1414 .loc 4 1124 4 is_stmt 0 view .LVU358 + 1415 .thumb + 1416 .syntax unified + ARM GAS /tmp/ccdl7gEi.s page 189 + + + 1417 .LBE91: + 1418 .LBE90: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1315 .loc 3 3215 3 discriminator 1 view .LVU325 - 1316 006e 0029 cmp r1, #0 - 1317 0070 F6D1 bne .L93 - 1318 0072 08E0 b .L82 - 1319 .LVL34: - 1320 .L85: + 1419 .loc 3 3215 3 discriminator 1 view .LVU359 + 1420 006e 0029 cmp r1, #0 + 1421 0070 F6D1 bne .L104 + 1422 0072 08E0 b .L93 + 1423 .LVL34: + 1424 .L96: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1321 .loc 3 3215 3 discriminator 1 view .LVU326 - 1322 .LBE87: - 1323 .LBE86: + 1425 .loc 3 3215 3 discriminator 1 view .LVU360 + 1426 .LBE87: + 1427 .LBE86: 289:Src/stm32f7xx_it.c **** } - 1324 .loc 1 289 7 is_stmt 1 view .LVU327 - 1325 .LBB92: - 1326 .LBI92: + 1428 .loc 1 289 7 is_stmt 1 view .LVU361 + 1429 .LBB92: + 1430 .LBI92: 3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1327 .loc 3 3658 25 view .LVU328 - 1328 .LBB93: - 1329 .loc 3 3660 3 view .LVU329 - 1330 .loc 3 3660 20 is_stmt 0 view .LVU330 - 1331 0074 144B ldr r3, .L98 - 1332 0076 5B6A ldr r3, [r3, #36] - 1333 .LVL35: - 1334 .loc 3 3660 20 view .LVU331 - 1335 .LBE93: - 1336 .LBE92: + 1431 .loc 3 3658 25 view .LVU362 + 1432 .LBB93: + 1433 .loc 3 3660 3 view .LVU363 + 1434 .loc 3 3660 20 is_stmt 0 view .LVU364 + 1435 0074 144B ldr r3, .L109 + 1436 0076 5B6A ldr r3, [r3, #36] + 1437 .LVL35: + 1438 .loc 3 3660 20 view .LVU365 + 1439 .LBE93: + 1440 .LBE92: 289:Src/stm32f7xx_it.c **** } - 1337 .loc 1 289 11 discriminator 1 view .LVU332 - 1338 0078 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1339 007c 52FA83F3 uxtab r3, r2, r3 - 1340 0080 DBB2 uxtb r3, r3 - 1341 0082 8DF80730 strb r3, [sp, #7] - 1342 .L82: + 1441 .loc 1 289 11 discriminator 1 view .LVU366 + 1442 0078 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1443 007c 52FA83F3 uxtab r3, r2, r3 + 1444 0080 DBB2 uxtb r3, r3 + 1445 0082 8DF80730 strb r3, [sp, #7] + 1446 .L93: 323:Src/stm32f7xx_it.c **** - 1343 .loc 1 323 1 view .LVU333 - 1344 0086 03B0 add sp, sp, #12 - 1345 .LCFI11: - 1346 .cfi_remember_state - 1347 .cfi_def_cfa_offset 4 - 1348 @ sp needed - 1349 0088 5DF804FB ldr pc, [sp], #4 - 1350 .LVL36: - 1351 .L86: - 1352 .LCFI12: - 1353 .cfi_restore_state + 1447 .loc 1 323 1 view .LVU367 + 1448 0086 03B0 add sp, sp, #12 + 1449 .LCFI11: + 1450 .cfi_remember_state + 1451 .cfi_def_cfa_offset 4 + 1452 @ sp needed + 1453 0088 5DF804FB ldr pc, [sp], #4 + 1454 .LVL36: + 1455 .L97: + 1456 .LCFI12: + 1457 .cfi_restore_state 294:Src/stm32f7xx_it.c **** } - 1354 .loc 1 294 7 is_stmt 1 view .LVU334 - ARM GAS /tmp/ccvzubVv.s page 187 - - - 1355 .LBB94: - 1356 .LBI94: + 1458 .loc 1 294 7 is_stmt 1 view .LVU368 + 1459 .LBB94: + 1460 .LBI94: 3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1357 .loc 3 3658 25 view .LVU335 - 1358 .LBB95: - 1359 .loc 3 3660 3 view .LVU336 - 1360 .loc 3 3660 20 is_stmt 0 view .LVU337 - 1361 008c 0E4B ldr r3, .L98 - 1362 008e 5B6A ldr r3, [r3, #36] - 1363 .LVL37: - 1364 .loc 3 3660 20 view .LVU338 - 1365 .LBE95: - 1366 .LBE94: + 1461 .loc 3 3658 25 view .LVU369 + 1462 .LBB95: + 1463 .loc 3 3660 3 view .LVU370 + 1464 .loc 3 3660 20 is_stmt 0 view .LVU371 + 1465 008c 0E4B ldr r3, .L109 + ARM GAS /tmp/ccdl7gEi.s page 190 + + + 1466 008e 5B6A ldr r3, [r3, #36] + 1467 .LVL37: + 1468 .loc 3 3660 20 view .LVU372 + 1469 .LBE95: + 1470 .LBE94: 294:Src/stm32f7xx_it.c **** } - 1367 .loc 1 294 11 discriminator 1 view .LVU339 - 1368 0090 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1369 0094 52FA83F3 uxtab r3, r2, r3 - 1370 0098 DBB2 uxtb r3, r3 - 1371 009a 8DF80730 strb r3, [sp, #7] - 1372 009e F2E7 b .L82 - 1373 .LVL38: - 1374 .L88: + 1471 .loc 1 294 11 discriminator 1 view .LVU373 + 1472 0090 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1473 0094 52FA83F3 uxtab r3, r2, r3 + 1474 0098 DBB2 uxtb r3, r3 + 1475 009a 8DF80730 strb r3, [sp, #7] + 1476 009e F2E7 b .L93 + 1477 .LVL38: + 1478 .L99: 299:Src/stm32f7xx_it.c **** } - 1375 .loc 1 299 7 is_stmt 1 view .LVU340 - 1376 .LBB96: - 1377 .LBI96: + 1479 .loc 1 299 7 is_stmt 1 view .LVU374 + 1480 .LBB96: + 1481 .LBI96: 3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1378 .loc 3 3658 25 view .LVU341 - 1379 .LBB97: - 1380 .loc 3 3660 3 view .LVU342 - 1381 .loc 3 3660 20 is_stmt 0 view .LVU343 - 1382 00a0 094B ldr r3, .L98 - 1383 00a2 5B6A ldr r3, [r3, #36] - 1384 .LVL39: - 1385 .loc 3 3660 20 view .LVU344 - 1386 .LBE97: - 1387 .LBE96: + 1482 .loc 3 3658 25 view .LVU375 + 1483 .LBB97: + 1484 .loc 3 3660 3 view .LVU376 + 1485 .loc 3 3660 20 is_stmt 0 view .LVU377 + 1486 00a0 094B ldr r3, .L109 + 1487 00a2 5B6A ldr r3, [r3, #36] + 1488 .LVL39: + 1489 .loc 3 3660 20 view .LVU378 + 1490 .LBE97: + 1491 .LBE96: 299:Src/stm32f7xx_it.c **** } - 1388 .loc 1 299 11 discriminator 1 view .LVU345 - 1389 00a4 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1390 00a8 52FA83F3 uxtab r3, r2, r3 - 1391 00ac DBB2 uxtb r3, r3 - 1392 00ae 8DF80730 strb r3, [sp, #7] - 1393 00b2 E8E7 b .L82 - 1394 .LVL40: - 1395 .L90: + 1492 .loc 1 299 11 discriminator 1 view .LVU379 + 1493 00a4 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1494 00a8 52FA83F3 uxtab r3, r2, r3 + 1495 00ac DBB2 uxtb r3, r3 + 1496 00ae 8DF80730 strb r3, [sp, #7] + 1497 00b2 E8E7 b .L93 + 1498 .LVL40: + 1499 .L101: 304:Src/stm32f7xx_it.c **** } - 1396 .loc 1 304 7 is_stmt 1 view .LVU346 - 1397 .LBB98: - 1398 .LBI98: + 1500 .loc 1 304 7 is_stmt 1 view .LVU380 + 1501 .LBB98: + 1502 .LBI98: 3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1399 .loc 3 3658 25 view .LVU347 - 1400 .LBB99: - 1401 .loc 3 3660 3 view .LVU348 - 1402 .loc 3 3660 20 is_stmt 0 view .LVU349 - 1403 00b4 044B ldr r3, .L98 - 1404 00b6 5B6A ldr r3, [r3, #36] - ARM GAS /tmp/ccvzubVv.s page 188 + 1503 .loc 3 3658 25 view .LVU381 + 1504 .LBB99: + 1505 .loc 3 3660 3 view .LVU382 + 1506 .loc 3 3660 20 is_stmt 0 view .LVU383 + 1507 00b4 044B ldr r3, .L109 + 1508 00b6 5B6A ldr r3, [r3, #36] + 1509 .LVL41: + 1510 .loc 3 3660 20 view .LVU384 + 1511 .LBE99: + 1512 .LBE98: + 304:Src/stm32f7xx_it.c **** } + 1513 .loc 1 304 11 discriminator 1 view .LVU385 + 1514 00b8 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1515 00bc 52FA83F3 uxtab r3, r2, r3 + ARM GAS /tmp/ccdl7gEi.s page 191 - 1405 .LVL41: - 1406 .loc 3 3660 20 view .LVU350 - 1407 .LBE99: - 1408 .LBE98: - 304:Src/stm32f7xx_it.c **** } - 1409 .loc 1 304 11 discriminator 1 view .LVU351 - 1410 00b8 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1411 00bc 52FA83F3 uxtab r3, r2, r3 - 1412 00c0 DBB2 uxtb r3, r3 - 1413 00c2 8DF80730 strb r3, [sp, #7] - 1414 00c6 DEE7 b .L82 - 1415 .L99: - 1416 .align 2 - 1417 .L98: - 1418 00c8 00100140 .word 1073811456 - 1419 00cc 00140140 .word 1073812480 - 1420 .cfi_endproc - 1421 .LFE1196: - 1423 .section .text.DMA2_Stream7_TransferComplete,"ax",%progbits - 1424 .align 1 - 1425 .global DMA2_Stream7_TransferComplete - 1426 .syntax unified - 1427 .thumb - 1428 .thumb_func - 1430 DMA2_Stream7_TransferComplete: - 1431 .LFB1203: - 545:Src/stm32f7xx_it.c **** - 546:Src/stm32f7xx_it.c **** //----------------------------------------------- - 547:Src/stm32f7xx_it.c **** void DMA2_Stream7_TransferComplete(void) - 548:Src/stm32f7xx_it.c **** { - 1432 .loc 1 548 1 is_stmt 1 view -0 - 1433 .cfi_startproc - 1434 @ args = 0, pretend = 0, frame = 0 - 1435 @ frame_needed = 0, uses_anonymous_args = 0 - 1436 @ link register save eliminated. - 549:Src/stm32f7xx_it.c **** LL_DMA_ClearFlag_TC7(DMA2); - 1437 .loc 1 549 3 view .LVU353 - 1438 .LVL42: - 1439 .LBB100: - 1440 .LBI100: - 1441 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" + 1516 00c0 DBB2 uxtb r3, r3 + 1517 00c2 8DF80730 strb r3, [sp, #7] + 1518 00c6 DEE7 b .L93 + 1519 .L110: + 1520 .align 2 + 1521 .L109: + 1522 00c8 00100140 .word 1073811456 + 1523 00cc 00140140 .word 1073812480 + 1524 .cfi_endproc + 1525 .LFE1196: + 1527 .section .text.DMA2_Stream7_TransferComplete,"ax",%progbits + 1528 .align 1 + 1529 .global DMA2_Stream7_TransferComplete + 1530 .syntax unified + 1531 .thumb + 1532 .thumb_func + 1534 DMA2_Stream7_TransferComplete: + 1535 .LFB1203: + 570:Src/stm32f7xx_it.c **** + 571:Src/stm32f7xx_it.c **** //----------------------------------------------- + 572:Src/stm32f7xx_it.c **** void DMA2_Stream7_TransferComplete(void) + 573:Src/stm32f7xx_it.c **** { + 1536 .loc 1 573 1 is_stmt 1 view -0 + 1537 .cfi_startproc + 1538 @ args = 0, pretend = 0, frame = 0 + 1539 @ frame_needed = 0, uses_anonymous_args = 0 + 1540 @ link register save eliminated. + 574:Src/stm32f7xx_it.c **** LL_DMA_ClearFlag_TC7(DMA2); + 1541 .loc 1 574 3 view .LVU387 + 1542 .LVL42: + 1543 .LBB100: + 1544 .LBI100: + 1545 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @file stm32f7xx_ll_dma.h @@ -11278,9 +11450,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 14:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * 16:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ****************************************************************************** - ARM GAS /tmp/ccvzubVv.s page 189 - - 17:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 18:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 19:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Define to prevent recursive inclusion -------------------------------------*/ @@ -11289,6 +11458,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #ifdef __cplusplus 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** extern "C" { + ARM GAS /tmp/ccdl7gEi.s page 192 + + 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif 26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Includes ------------------------------------------------------------------*/ @@ -11338,9 +11510,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 71:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 72:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 73:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccvzubVv.s page 190 - - 74:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Private macros ------------------------------------------------------------*/ 75:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Exported types ------------------------------------------------------------*/ 76:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined(USE_FULL_LL_DRIVER) @@ -11349,6 +11518,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** typedef struct 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccdl7gEi.s page 193 + + 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t PeriphOrM2MSrcAddress; /*!< Specifies the peripheral base address for DMA transfer 83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** or as Source base address in case of memory to memory trans 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -11398,9 +11570,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t NbData; /*!< Specifies the number of data to transfer, in data unit. 130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** The data unit is equal to the source buffer configuration s - ARM GAS /tmp/ccvzubVv.s page 191 - - 131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** or MemorySize parameters depending in the transfer directio 132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter must be a value between Min_Data = 0 and Max 133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -11409,6 +11578,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t Channel; /*!< Specifies the peripheral channel. 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_CHANNEL 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccdl7gEi.s page 194 + + 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t Priority; /*!< Specifies the channel priority level. @@ -11458,9 +11630,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_0 0x00000000U - ARM GAS /tmp/ccvzubVv.s page 192 - - 188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_1 0x00000001U 189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_2 0x00000002U 190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_3 0x00000003U @@ -11469,6 +11638,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_6 0x00000006U 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_7 0x00000007U 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_ALL 0xFFFF0000U + ARM GAS /tmp/ccdl7gEi.s page 195 + + 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -11518,9 +11690,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MEMORY_INCREMENT DMA_SxCR_MINC /*!< Memory increment mode Enab 243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} - ARM GAS /tmp/ccvzubVv.s page 193 - - 245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PDATAALIGN PDATAALIGN @@ -11529,6 +11698,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_HALFWORD DMA_SxCR_PSIZE_0 /*!< Peripheral data alignment 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_WORD DMA_SxCR_PSIZE_1 /*!< Peripheral data alignment + ARM GAS /tmp/ccdl7gEi.s page 196 + + 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -11578,9 +11750,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_8 DMA_SxCR_CHSEL_3 300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_9 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_0) 301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_10 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1) - ARM GAS /tmp/ccvzubVv.s page 194 - - 302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_11 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) 303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_12 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2) 304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_13 (DMA_SxCR_CHSEL_3 | DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_0) @@ -11589,6 +11758,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif /* DMA_CHANNEL_SELECTION_8_15 */ 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} + ARM GAS /tmp/ccdl7gEi.s page 197 + + 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MBURST MBURST @@ -11638,9 +11810,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_FIFOTHRESHOLD FIFOTHRESHOLD 357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccvzubVv.s page 195 - - 359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_1_4 0x00000000U /*!< FIFO thresho 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_1_2 DMA_SxFCR_FTH_0 /*!< FIFO thresho 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOTHRESHOLD_3_4 DMA_SxFCR_FTH_1 /*!< FIFO thresho @@ -11649,6 +11818,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccdl7gEi.s page 198 + + 367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_CURRENTTARGETMEM CURRENTTARGETMEM 368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -11698,9 +11870,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __STREAM_INSTANCE__ DMAx_Streamy 414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval DMAx 415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccvzubVv.s page 196 - - 416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __LL_DMA_GET_INSTANCE(__STREAM_INSTANCE__) \ 417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__STREAM_INSTANCE__) > ((uint32_t)DMA1_Stream7)) ? DMA2 : DMA1) 418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -11709,6 +11878,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __STREAM_INSTANCE__ DMAx_Streamy 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval LL_DMA_CHANNEL_y 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccdl7gEi.s page 199 + + 424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __LL_DMA_GET_STREAM(__STREAM_INSTANCE__) \ 425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream0)) ? LL_DMA_STREAM_0 : \ 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream0)) ? LL_DMA_STREAM_0 : \ @@ -11758,9 +11930,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccvzubVv.s page 197 - - 473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Exported functions --------------------------------------------------------*/ 475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Exported_Functions DMA Exported Functions @@ -11769,6 +11938,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_Configuration Configuration 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ + ARM GAS /tmp/ccdl7gEi.s page 200 + + 481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Enable DMA stream. @@ -11818,9 +11990,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccvzubVv.s page 198 - - 530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -11829,6 +11998,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsEnabledStream(DMA_TypeDef *DMAx, uint32_t Stream) + ARM GAS /tmp/ccdl7gEi.s page 201 + + 538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -11878,9 +12050,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccvzubVv.s page 199 - - 587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -11889,6 +12058,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Direction This parameter can be one of the following values: 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY 594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH + ARM GAS /tmp/ccdl7gEi.s page 202 + + 595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY 596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -11938,9 +12110,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_CIRCULAR 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_PFCTRL - ARM GAS /tmp/ccvzubVv.s page 200 - - 644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Mode) @@ -11949,6 +12118,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccdl7gEi.s page 203 + + 652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get DMA mode normal, circular or peripheral flow control. 653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CIRC LL_DMA_GetMode\n 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PFCTRL LL_DMA_GetMode @@ -11998,9 +12170,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Peripheral increment mode. 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PINC LL_DMA_GetPeriphIncMode - ARM GAS /tmp/ccvzubVv.s page 201 - - 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -12009,6 +12178,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 + ARM GAS /tmp/ccdl7gEi.s page 204 + + 709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: @@ -12058,9 +12230,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_NOINCREMENT - ARM GAS /tmp/ccvzubVv.s page 202 - - 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_INCREMENT 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Stream) @@ -12069,6 +12238,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccdl7gEi.s page 205 + + 766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Peripheral size. 767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PSIZE LL_DMA_SetPeriphSize 768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -12118,9 +12290,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Memory size. 814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MSIZE LL_DMA_SetMemorySize - ARM GAS /tmp/ccvzubVv.s page 203 - - 815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -12129,6 +12298,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 + ARM GAS /tmp/ccdl7gEi.s page 206 + + 823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Size This parameter can be one of the following values: @@ -12178,9 +12350,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 - ARM GAS /tmp/ccvzubVv.s page 204 - - 872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param OffsetSize This parameter can be one of the following values: 873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_PSIZE 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_FIXEDTO4 @@ -12189,6 +12358,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetIncOffsetSize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t OffsetSiz 878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D + ARM GAS /tmp/ccdl7gEi.s page 207 + + 880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -12238,9 +12410,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccvzubVv.s page 205 - - 929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream priority level. 931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PL LL_DMA_GetStreamPriorityLevel @@ -12249,6 +12418,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccdl7gEi.s page 208 + + 937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -12298,9 +12470,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccvzubVv.s page 206 - - 986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -12309,6 +12478,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF 992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef* DMAx, uint32_t Stream) + ARM GAS /tmp/ccdl7gEi.s page 209 + + 994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -12358,9 +12530,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 - ARM GAS /tmp/ccvzubVv.s page 207 - - 1043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -12369,6 +12538,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccdl7gEi.s page 210 + + 1051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_0 1052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 @@ -12418,9 +12590,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccvzubVv.s page 208 - - 1100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory burst transfer configuration. 1102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MBURST LL_DMA_GetMemoryBurstxfer @@ -12429,6 +12598,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccdl7gEi.s page 211 + + 1108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -12478,9 +12650,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccvzubVv.s page 209 - - 1157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -12489,6 +12658,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 1163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PBURST_SINGLE 1164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PBURST_INC4 + ARM GAS /tmp/ccdl7gEi.s page 212 + + 1165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PBURST_INC8 1166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PBURST_INC16 1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -12538,9 +12710,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CURRENTTARGETMEM1 1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetCurrentTargetMem(DMA_TypeDef *DMAx, uint32_t Stream) - ARM GAS /tmp/ccvzubVv.s page 210 - - 1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -12549,6 +12718,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Enable the double buffer mode. 1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DBM LL_DMA_EnableDoubleBufferMode 1221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccdl7gEi.s page 213 + + 1222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -12598,9 +12770,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 - ARM GAS /tmp/ccvzubVv.s page 211 - - 1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOSTATUS_0_25 1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOSTATUS_25_50 @@ -12609,6 +12778,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOSTATUS_EMPTY 1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOSTATUS_FULL 1278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccdl7gEi.s page 214 + + 1279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetFIFOStatus(DMA_TypeDef *DMAx, uint32_t Stream) 1280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- @@ -12658,9 +12830,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Select FIFO threshold. 1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_SetFIFOThreshold 1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccvzubVv.s page 212 - - 1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -12669,6 +12838,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 + ARM GAS /tmp/ccdl7gEi.s page 215 + + 1336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Threshold This parameter can be one of the following values: 1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_4 @@ -12718,9 +12890,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccvzubVv.s page 213 - - 1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param FifoMode This parameter can be one of the following values: @@ -12729,6 +12898,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param FifoThreshold This parameter can be one of the following values: 1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_4 1392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_2 + ARM GAS /tmp/ccdl7gEi.s page 216 + + 1393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4 1394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL 1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -12778,9 +12950,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccvzubVv.s page 214 - - 1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory address. 1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_SetMemoryAddress 1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO @@ -12789,6 +12958,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 + ARM GAS /tmp/ccdl7gEi.s page 217 + + 1450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -12838,9 +13010,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccvzubVv.s page 215 - - 1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF @@ -12849,6 +13018,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccdl7gEi.s page 218 + + 1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Peripheral address. @@ -12898,9 +13070,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory to Memory Destination address. 1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_SetM2MDstAddress 1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. - ARM GAS /tmp/ccvzubVv.s page 216 - - 1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. 1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -12909,6 +13078,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 + ARM GAS /tmp/ccdl7gEi.s page 219 + + 1564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 @@ -12958,9 +13130,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF 1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream) - ARM GAS /tmp/ccvzubVv.s page 217 - - 1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-> 1615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -12969,6 +13138,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Memory 1 address (used in case of Double buffer mode). 1619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M1AR M1A LL_DMA_SetMemory1Address 1620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccdl7gEi.s page 220 + + 1621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -13018,9 +13190,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 half transfer flag. 1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF0 LL_DMA_IsActiveFlag_HT0 1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccvzubVv.s page 218 - - 1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT0(DMA_TypeDef *DMAx) @@ -13029,6 +13198,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccdl7gEi.s page 221 + + 1678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 half transfer flag. 1679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF1 LL_DMA_IsActiveFlag_HT1 1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -13078,9 +13250,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccvzubVv.s page 219 - - 1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx) 1728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF5)==(DMA_HISR_HTIF5)); @@ -13089,6 +13258,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 half transfer flag. 1734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF6 LL_DMA_IsActiveFlag_HT6 + ARM GAS /tmp/ccdl7gEi.s page 222 + + 1735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -13138,9 +13310,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx) 1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccvzubVv.s page 220 - - 1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF2)==(DMA_LISR_TCIF2)); 1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -13149,6 +13318,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TCIF3 LL_DMA_IsActiveFlag_TC3 1790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccdl7gEi.s page 223 + + 1792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx) 1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -13198,9 +13370,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF7)==(DMA_HISR_TCIF7)); 1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccvzubVv.s page 221 - - 1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 transfer error flag. @@ -13209,6 +13378,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE0(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccdl7gEi.s page 224 + + 1849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF0)==(DMA_LISR_TEIF0)); 1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -13258,9 +13430,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccvzubVv.s page 222 - - 1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 transfer error flag. 1899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF0 LL_DMA_IsActiveFlag_TE5 1900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -13269,6 +13438,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx) 1904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF5)==(DMA_HISR_TEIF5)); + ARM GAS /tmp/ccdl7gEi.s page 225 + + 1906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -13318,9 +13490,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 direct mode error flag. 1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF2 LL_DMA_IsActiveFlag_DME2 - ARM GAS /tmp/ccvzubVv.s page 223 - - 1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -13329,6 +13498,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 1960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF2)==(DMA_LISR_DMEIF2)); 1961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccdl7gEi.s page 226 + + 1963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 3 direct mode error flag. 1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF3 LL_DMA_IsActiveFlag_DME3 @@ -13378,9 +13550,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF7 LL_DMA_IsActiveFlag_DME7 2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccvzubVv.s page 224 - - 2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME7(DMA_TypeDef *DMAx) 2014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -13389,6 +13558,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 2017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 FIFO error flag. + ARM GAS /tmp/ccdl7gEi.s page 227 + + 2020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF0 LL_DMA_IsActiveFlag_FE0 2021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). @@ -13438,9 +13610,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE4(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccvzubVv.s page 225 - - 2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF4)==(DMA_HISR_FEIF4)); 2071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -13449,6 +13618,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 2074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 FIFO error flag. 2075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR FEIF0 LL_DMA_IsActiveFlag_FE5 2076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccdl7gEi.s page 228 + + 2077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE5(DMA_TypeDef *DMAx) @@ -13498,9 +13670,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx) 2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF1); - ARM GAS /tmp/ccvzubVv.s page 226 - - 2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -13509,6 +13678,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 2131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccdl7gEi.s page 229 + + 2134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx) 2135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF2); @@ -13558,9 +13730,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF6); 2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccvzubVv.s page 227 - - 2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 half transfer flag. 2185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF7 LL_DMA_ClearFlag_HT7 @@ -13569,6 +13738,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 2188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx) 2190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccdl7gEi.s page 230 + + 2191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF7); 2192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -13618,9 +13790,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 transfer complete flag. - ARM GAS /tmp/ccvzubVv.s page 228 - - 2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF4 LL_DMA_ClearFlag_TC4 2241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -13629,6 +13798,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 2245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF4); 2247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccdl7gEi.s page 231 + + 2248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 transfer complete flag. @@ -13659,102 +13831,102 @@ ARM GAS /tmp/ccvzubVv.s page 1 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx) - 1442 .loc 5 2277 22 view .LVU354 - 1443 .LBB101: + 1546 .loc 5 2277 22 view .LVU388 + 1547 .LBB101: 2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7); - 1444 .loc 5 2279 3 view .LVU355 - 1445 0000 024B ldr r3, .L101 - 1446 0002 4FF00062 mov r2, #134217728 - 1447 0006 DA60 str r2, [r3, #12] - 1448 .LVL43: - 1449 .loc 5 2279 3 is_stmt 0 view .LVU356 - 1450 .LBE101: - 1451 .LBE100: - 550:Src/stm32f7xx_it.c **** } - 1452 .loc 1 550 1 view .LVU357 - 1453 0008 7047 bx lr - 1454 .L102: - 1455 000a 00BF .align 2 - 1456 .L101: - 1457 000c 00640240 .word 1073898496 - ARM GAS /tmp/ccvzubVv.s page 229 + 1548 .loc 5 2279 3 view .LVU389 + 1549 0000 024B ldr r3, .L112 + 1550 0002 4FF00062 mov r2, #134217728 + 1551 0006 DA60 str r2, [r3, #12] + 1552 .LVL43: + 1553 .loc 5 2279 3 is_stmt 0 view .LVU390 + 1554 .LBE101: + 1555 .LBE100: + 575:Src/stm32f7xx_it.c **** } + 1556 .loc 1 575 1 view .LVU391 + 1557 0008 7047 bx lr + 1558 .L113: + 1559 000a 00BF .align 2 + 1560 .L112: + 1561 000c 00640240 .word 1073898496 + 1562 .cfi_endproc + 1563 .LFE1203: + 1565 .section .text.DMA2_Stream7_IRQHandler,"ax",%progbits + 1566 .align 1 + 1567 .global DMA2_Stream7_IRQHandler + 1568 .syntax unified + 1569 .thumb + 1570 .thumb_func + ARM GAS /tmp/ccdl7gEi.s page 232 - 1458 .cfi_endproc - 1459 .LFE1203: - 1461 .section .text.DMA2_Stream7_IRQHandler,"ax",%progbits - 1462 .align 1 - 1463 .global DMA2_Stream7_IRQHandler - 1464 .syntax unified - 1465 .thumb - 1466 .thumb_func - 1468 DMA2_Stream7_IRQHandler: - 1469 .LFB1201: + 1572 DMA2_Stream7_IRQHandler: + 1573 .LFB1201: 417:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */ - 1470 .loc 1 417 1 is_stmt 1 view -0 - 1471 .cfi_startproc - 1472 @ args = 0, pretend = 0, frame = 0 - 1473 @ frame_needed = 0, uses_anonymous_args = 0 - 1474 0000 08B5 push {r3, lr} - 1475 .LCFI13: - 1476 .cfi_def_cfa_offset 8 - 1477 .cfi_offset 3, -8 - 1478 .cfi_offset 14, -4 + 1574 .loc 1 417 1 is_stmt 1 view -0 + 1575 .cfi_startproc + 1576 @ args = 0, pretend = 0, frame = 0 + 1577 @ frame_needed = 0, uses_anonymous_args = 0 + 1578 0000 08B5 push {r3, lr} + 1579 .LCFI13: + 1580 .cfi_def_cfa_offset 8 + 1581 .cfi_offset 3, -8 + 1582 .cfi_offset 14, -4 419:Src/stm32f7xx_it.c **** { - 1479 .loc 1 419 3 view .LVU359 - 1480 .LVL44: - 1481 .LBB102: - 1482 .LBI102: + 1583 .loc 1 419 3 view .LVU393 + 1584 .LVL44: + 1585 .LBB102: + 1586 .LBI102: 1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 1483 .loc 5 1837 26 view .LVU360 - 1484 .LBB103: + 1587 .loc 5 1837 26 view .LVU394 + 1588 .LBB103: 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1485 .loc 5 1839 3 view .LVU361 + 1589 .loc 5 1839 3 view .LVU395 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1486 .loc 5 1839 11 is_stmt 0 view .LVU362 - 1487 0002 0A4B ldr r3, .L108 - 1488 0004 5B68 ldr r3, [r3, #4] - 1489 .LVL45: + 1590 .loc 5 1839 11 is_stmt 0 view .LVU396 + 1591 0002 0A4B ldr r3, .L119 + 1592 0004 5B68 ldr r3, [r3, #4] + 1593 .LVL45: 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1490 .loc 5 1839 11 view .LVU363 - 1491 .LBE103: - 1492 .LBE102: + 1594 .loc 5 1839 11 view .LVU397 + 1595 .LBE103: + 1596 .LBE102: 419:Src/stm32f7xx_it.c **** { - 1493 .loc 1 419 5 discriminator 1 view .LVU364 - 1494 0006 13F0006F tst r3, #134217728 - 1495 000a 09D1 bne .L107 + 1597 .loc 1 419 5 discriminator 1 view .LVU398 + 1598 0006 13F0006F tst r3, #134217728 + 1599 000a 09D1 bne .L118 424:Src/stm32f7xx_it.c **** { - 1496 .loc 1 424 8 is_stmt 1 view .LVU365 - 1497 .LVL46: - 1498 .LBB104: - 1499 .LBI104: + 1600 .loc 1 424 8 is_stmt 1 view .LVU399 + 1601 .LVL46: + 1602 .LBB104: + 1603 .LBI104: 1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 1500 .loc 5 1925 26 view .LVU366 - 1501 .LBB105: + 1604 .loc 5 1925 26 view .LVU400 + 1605 .LBB105: 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1502 .loc 5 1927 3 view .LVU367 + 1606 .loc 5 1927 3 view .LVU401 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1503 .loc 5 1927 11 is_stmt 0 view .LVU368 - 1504 000c 074B ldr r3, .L108 - 1505 000e 5B68 ldr r3, [r3, #4] - ARM GAS /tmp/ccvzubVv.s page 230 - - - 1506 .LVL47: + 1607 .loc 5 1927 11 is_stmt 0 view .LVU402 + 1608 000c 074B ldr r3, .L119 + 1609 000e 5B68 ldr r3, [r3, #4] + 1610 .LVL47: 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1507 .loc 5 1927 11 view .LVU369 - 1508 .LBE105: - 1509 .LBE104: + 1611 .loc 5 1927 11 view .LVU403 + 1612 .LBE105: + 1613 .LBE104: 424:Src/stm32f7xx_it.c **** { - 1510 .loc 1 424 10 discriminator 1 view .LVU370 - 1511 0010 13F0007F tst r3, #33554432 - 1512 0014 03D0 beq .L103 + 1614 .loc 1 424 10 discriminator 1 view .LVU404 + 1615 0010 13F0007F tst r3, #33554432 + ARM GAS /tmp/ccdl7gEi.s page 233 + + + 1616 0014 03D0 beq .L114 426:Src/stm32f7xx_it.c **** } - 1513 .loc 1 426 5 is_stmt 1 view .LVU371 - 1514 .LVL48: - 1515 .LBB106: - 1516 .LBI106: + 1617 .loc 1 426 5 is_stmt 1 view .LVU405 + 1618 .LVL48: + 1619 .LBB106: + 1620 .LBI106: 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -13798,9 +13970,6 @@ ARM GAS /tmp/ccvzubVv.s page 1 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx) 2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccvzubVv.s page 231 - - 2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF3); 2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -13809,6 +13978,9 @@ ARM GAS /tmp/ccvzubVv.s page 1 2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF4 LL_DMA_ClearFlag_TE4 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccdl7gEi.s page 234 + + 2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx) 2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -13844,120 +14016,122 @@ ARM GAS /tmp/ccvzubVv.s page 1 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx) - 1517 .loc 5 2365 22 view .LVU372 - 1518 .LBB107: + 1621 .loc 5 2365 22 view .LVU406 + 1622 .LBB107: 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7); - 1519 .loc 5 2367 3 view .LVU373 - 1520 0016 054B ldr r3, .L108 - 1521 0018 4FF00072 mov r2, #33554432 - 1522 001c DA60 str r2, [r3, #12] - 1523 .LVL49: - 1524 .L103: - 1525 .loc 5 2367 3 is_stmt 0 view .LVU374 - 1526 .LBE107: - 1527 .LBE106: + 1623 .loc 5 2367 3 view .LVU407 + 1624 0016 054B ldr r3, .L119 + 1625 0018 4FF00072 mov r2, #33554432 + 1626 001c DA60 str r2, [r3, #12] + 1627 .LVL49: + 1628 .L114: + 1629 .loc 5 2367 3 is_stmt 0 view .LVU408 + 1630 .LBE107: + 1631 .LBE106: 432:Src/stm32f7xx_it.c **** - ARM GAS /tmp/ccvzubVv.s page 232 - - - 1528 .loc 1 432 1 view .LVU375 - 1529 001e 08BD pop {r3, pc} - 1530 .L107: + 1632 .loc 1 432 1 view .LVU409 + 1633 001e 08BD pop {r3, pc} + 1634 .L118: 421:Src/stm32f7xx_it.c **** u_tx_flg = 0;//indicate that transfer compete - 1531 .loc 1 421 5 is_stmt 1 view .LVU376 - 1532 0020 FFF7FEFF bl DMA2_Stream7_TransferComplete - 1533 .LVL50: + 1635 .loc 1 421 5 is_stmt 1 view .LVU410 + 1636 0020 FFF7FEFF bl DMA2_Stream7_TransferComplete + 1637 .LVL50: 422:Src/stm32f7xx_it.c **** } - 1534 .loc 1 422 5 view .LVU377 + ARM GAS /tmp/ccdl7gEi.s page 235 + + + 1638 .loc 1 422 5 view .LVU411 422:Src/stm32f7xx_it.c **** } - 1535 .loc 1 422 14 is_stmt 0 view .LVU378 - 1536 0024 024B ldr r3, .L108+4 - 1537 0026 0022 movs r2, #0 - 1538 0028 1A70 strb r2, [r3] - 1539 002a F8E7 b .L103 - 1540 .L109: - 1541 .align 2 - 1542 .L108: - 1543 002c 00640240 .word 1073898496 - 1544 0030 00000000 .word u_tx_flg - 1545 .cfi_endproc - 1546 .LFE1201: - 1548 .text - 1549 .Letext0: - 1550 .file 6 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 1551 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" - 1552 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - 1553 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" - 1554 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" - 1555 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" - 1556 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" - 1557 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" - 1558 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - 1559 .file 15 "Inc/main.h" - 1560 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/ccvzubVv.s page 233 + 1639 .loc 1 422 14 is_stmt 0 view .LVU412 + 1640 0024 024B ldr r3, .L119+4 + 1641 0026 0022 movs r2, #0 + 1642 0028 1A70 strb r2, [r3] + 1643 002a F8E7 b .L114 + 1644 .L120: + 1645 .align 2 + 1646 .L119: + 1647 002c 00640240 .word 1073898496 + 1648 0030 00000000 .word u_tx_flg + 1649 .cfi_endproc + 1650 .LFE1201: + 1652 .text + 1653 .Letext0: + 1654 .file 6 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 1655 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" + 1656 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" + 1657 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" + 1658 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" + 1659 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" + 1660 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" + 1661 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" + 1662 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" + 1663 .file 15 "Inc/main.h" + 1664 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" + ARM GAS /tmp/ccdl7gEi.s page 236 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_it.c - /tmp/ccvzubVv.s:20 .text.NMI_Handler:00000000 $t - /tmp/ccvzubVv.s:26 .text.NMI_Handler:00000000 NMI_Handler - /tmp/ccvzubVv.s:43 .text.HardFault_Handler:00000000 $t - /tmp/ccvzubVv.s:49 .text.HardFault_Handler:00000000 HardFault_Handler - /tmp/ccvzubVv.s:66 .text.MemManage_Handler:00000000 $t - /tmp/ccvzubVv.s:72 .text.MemManage_Handler:00000000 MemManage_Handler - /tmp/ccvzubVv.s:89 .text.BusFault_Handler:00000000 $t - /tmp/ccvzubVv.s:95 .text.BusFault_Handler:00000000 BusFault_Handler - /tmp/ccvzubVv.s:112 .text.UsageFault_Handler:00000000 $t - /tmp/ccvzubVv.s:118 .text.UsageFault_Handler:00000000 UsageFault_Handler - /tmp/ccvzubVv.s:135 .text.SVC_Handler:00000000 $t - /tmp/ccvzubVv.s:141 .text.SVC_Handler:00000000 SVC_Handler - /tmp/ccvzubVv.s:154 .text.DebugMon_Handler:00000000 $t - /tmp/ccvzubVv.s:160 .text.DebugMon_Handler:00000000 DebugMon_Handler - /tmp/ccvzubVv.s:173 .text.PendSV_Handler:00000000 $t - /tmp/ccvzubVv.s:179 .text.PendSV_Handler:00000000 PendSV_Handler - /tmp/ccvzubVv.s:192 .text.SysTick_Handler:00000000 $t - /tmp/ccvzubVv.s:198 .text.SysTick_Handler:00000000 SysTick_Handler - /tmp/ccvzubVv.s:218 .text.ADC_IRQHandler:00000000 $t - /tmp/ccvzubVv.s:224 .text.ADC_IRQHandler:00000000 ADC_IRQHandler - /tmp/ccvzubVv.s:248 .text.ADC_IRQHandler:00000010 $d - /tmp/ccvzubVv.s:254 .text.TIM1_UP_TIM10_IRQHandler:00000000 $t - /tmp/ccvzubVv.s:260 .text.TIM1_UP_TIM10_IRQHandler:00000000 TIM1_UP_TIM10_IRQHandler - /tmp/ccvzubVv.s:301 .text.TIM1_UP_TIM10_IRQHandler:00000024 $d - /tmp/ccvzubVv.s:309 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 $t - /tmp/ccvzubVv.s:315 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 TIM1_TRG_COM_TIM11_IRQHandler - /tmp/ccvzubVv.s:355 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000028 $d - /tmp/ccvzubVv.s:362 .text.TIM2_IRQHandler:00000000 $t - /tmp/ccvzubVv.s:368 .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler - /tmp/ccvzubVv.s:381 .text.TIM8_UP_TIM13_IRQHandler:00000000 $t - /tmp/ccvzubVv.s:387 .text.TIM8_UP_TIM13_IRQHandler:00000000 TIM8_UP_TIM13_IRQHandler - /tmp/ccvzubVv.s:453 .text.TIM8_UP_TIM13_IRQHandler:00000048 $d - /tmp/ccvzubVv.s:459 .text.TIM5_IRQHandler:00000000 $t - /tmp/ccvzubVv.s:465 .text.TIM5_IRQHandler:00000000 TIM5_IRQHandler - /tmp/ccvzubVv.s:478 .text.TIM6_DAC_IRQHandler:00000000 $t - /tmp/ccvzubVv.s:484 .text.TIM6_DAC_IRQHandler:00000000 TIM6_DAC_IRQHandler - /tmp/ccvzubVv.s:543 .text.TIM6_DAC_IRQHandler:00000028 $d - /tmp/ccvzubVv.s:550 .text.TIM7_IRQHandler:00000000 $t - /tmp/ccvzubVv.s:556 .text.TIM7_IRQHandler:00000000 TIM7_IRQHandler - /tmp/ccvzubVv.s:605 .text.TIM7_IRQHandler:0000001c $d - /tmp/ccvzubVv.s:611 .text.UART_RxCpltCallback:00000000 $t - /tmp/ccvzubVv.s:617 .text.UART_RxCpltCallback:00000000 UART_RxCpltCallback - /tmp/ccvzubVv.s:655 .text.UART_RxCpltCallback:0000001a $d - /tmp/ccvzubVv.s:687 .text.UART_RxCpltCallback:0000005a $t - /tmp/ccvzubVv.s:1084 .text.UART_RxCpltCallback:00000260 $d - /tmp/ccvzubVv.s:1099 .text.USART1_IRQHandler:00000000 $t - /tmp/ccvzubVv.s:1105 .text.USART1_IRQHandler:00000000 USART1_IRQHandler - /tmp/ccvzubVv.s:1418 .text.USART1_IRQHandler:000000c8 $d - /tmp/ccvzubVv.s:1424 .text.DMA2_Stream7_TransferComplete:00000000 $t - /tmp/ccvzubVv.s:1430 .text.DMA2_Stream7_TransferComplete:00000000 DMA2_Stream7_TransferComplete - /tmp/ccvzubVv.s:1457 .text.DMA2_Stream7_TransferComplete:0000000c $d - /tmp/ccvzubVv.s:1462 .text.DMA2_Stream7_IRQHandler:00000000 $t - /tmp/ccvzubVv.s:1468 .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler - /tmp/ccvzubVv.s:1543 .text.DMA2_Stream7_IRQHandler:0000002c $d + /tmp/ccdl7gEi.s:20 .text.NMI_Handler:00000000 $t + /tmp/ccdl7gEi.s:26 .text.NMI_Handler:00000000 NMI_Handler + /tmp/ccdl7gEi.s:43 .text.HardFault_Handler:00000000 $t + /tmp/ccdl7gEi.s:49 .text.HardFault_Handler:00000000 HardFault_Handler + /tmp/ccdl7gEi.s:66 .text.MemManage_Handler:00000000 $t + /tmp/ccdl7gEi.s:72 .text.MemManage_Handler:00000000 MemManage_Handler + /tmp/ccdl7gEi.s:89 .text.BusFault_Handler:00000000 $t + /tmp/ccdl7gEi.s:95 .text.BusFault_Handler:00000000 BusFault_Handler + /tmp/ccdl7gEi.s:112 .text.UsageFault_Handler:00000000 $t + /tmp/ccdl7gEi.s:118 .text.UsageFault_Handler:00000000 UsageFault_Handler + /tmp/ccdl7gEi.s:135 .text.SVC_Handler:00000000 $t + /tmp/ccdl7gEi.s:141 .text.SVC_Handler:00000000 SVC_Handler + /tmp/ccdl7gEi.s:154 .text.DebugMon_Handler:00000000 $t + /tmp/ccdl7gEi.s:160 .text.DebugMon_Handler:00000000 DebugMon_Handler + /tmp/ccdl7gEi.s:173 .text.PendSV_Handler:00000000 $t + /tmp/ccdl7gEi.s:179 .text.PendSV_Handler:00000000 PendSV_Handler + /tmp/ccdl7gEi.s:192 .text.SysTick_Handler:00000000 $t + /tmp/ccdl7gEi.s:198 .text.SysTick_Handler:00000000 SysTick_Handler + /tmp/ccdl7gEi.s:218 .text.ADC_IRQHandler:00000000 $t + /tmp/ccdl7gEi.s:224 .text.ADC_IRQHandler:00000000 ADC_IRQHandler + /tmp/ccdl7gEi.s:248 .text.ADC_IRQHandler:00000010 $d + /tmp/ccdl7gEi.s:254 .text.TIM1_UP_TIM10_IRQHandler:00000000 $t + /tmp/ccdl7gEi.s:260 .text.TIM1_UP_TIM10_IRQHandler:00000000 TIM1_UP_TIM10_IRQHandler + /tmp/ccdl7gEi.s:301 .text.TIM1_UP_TIM10_IRQHandler:00000024 $d + /tmp/ccdl7gEi.s:309 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 $t + /tmp/ccdl7gEi.s:315 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 TIM1_TRG_COM_TIM11_IRQHandler + /tmp/ccdl7gEi.s:355 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000028 $d + /tmp/ccdl7gEi.s:362 .text.TIM2_IRQHandler:00000000 $t + /tmp/ccdl7gEi.s:368 .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler + /tmp/ccdl7gEi.s:381 .text.TIM8_UP_TIM13_IRQHandler:00000000 $t + /tmp/ccdl7gEi.s:387 .text.TIM8_UP_TIM13_IRQHandler:00000000 TIM8_UP_TIM13_IRQHandler + /tmp/ccdl7gEi.s:453 .text.TIM8_UP_TIM13_IRQHandler:00000048 $d + /tmp/ccdl7gEi.s:459 .text.TIM5_IRQHandler:00000000 $t + /tmp/ccdl7gEi.s:465 .text.TIM5_IRQHandler:00000000 TIM5_IRQHandler + /tmp/ccdl7gEi.s:478 .text.TIM6_DAC_IRQHandler:00000000 $t + /tmp/ccdl7gEi.s:484 .text.TIM6_DAC_IRQHandler:00000000 TIM6_DAC_IRQHandler + /tmp/ccdl7gEi.s:543 .text.TIM6_DAC_IRQHandler:00000028 $d + /tmp/ccdl7gEi.s:550 .text.TIM7_IRQHandler:00000000 $t + /tmp/ccdl7gEi.s:556 .text.TIM7_IRQHandler:00000000 TIM7_IRQHandler + /tmp/ccdl7gEi.s:605 .text.TIM7_IRQHandler:0000001c $d + /tmp/ccdl7gEi.s:611 .text.UART_RxCpltCallback:00000000 $t + /tmp/ccdl7gEi.s:617 .text.UART_RxCpltCallback:00000000 UART_RxCpltCallback + /tmp/ccdl7gEi.s:655 .text.UART_RxCpltCallback:0000001a $d + /tmp/ccdl7gEi.s:687 .text.UART_RxCpltCallback:0000005a $t + /tmp/ccdl7gEi.s:1092 .text.UART_RxCpltCallback:00000270 $d + /tmp/ccdl7gEi.s:1106 .text.UART_RxCpltCallback:0000029c $t + /tmp/ccdl7gEi.s:1194 .text.UART_RxCpltCallback:00000310 $d + /tmp/ccdl7gEi.s:1203 .text.USART1_IRQHandler:00000000 $t + /tmp/ccdl7gEi.s:1209 .text.USART1_IRQHandler:00000000 USART1_IRQHandler + /tmp/ccdl7gEi.s:1522 .text.USART1_IRQHandler:000000c8 $d + /tmp/ccdl7gEi.s:1528 .text.DMA2_Stream7_TransferComplete:00000000 $t + /tmp/ccdl7gEi.s:1534 .text.DMA2_Stream7_TransferComplete:00000000 DMA2_Stream7_TransferComplete + /tmp/ccdl7gEi.s:1561 .text.DMA2_Stream7_TransferComplete:0000000c $d + /tmp/ccdl7gEi.s:1566 .text.DMA2_Stream7_IRQHandler:00000000 $t + /tmp/ccdl7gEi.s:1572 .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler + ARM GAS /tmp/ccdl7gEi.s page 237 - ARM GAS /tmp/ccvzubVv.s page 234 + /tmp/ccdl7gEi.s:1647 .text.DMA2_Stream7_IRQHandler:0000002c $d UNDEFINED SYMBOLS HAL_IncTick diff --git a/build/stm32f7xx_it.o b/build/stm32f7xx_it.o index ebac6fa..3b20d02 100644 Binary files a/build/stm32f7xx_it.o and b/build/stm32f7xx_it.o differ diff --git a/build/syscall.lst b/build/syscall.lst index be05997..723cae3 100644 --- a/build/syscall.lst +++ b/build/syscall.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccLTnVRs.s page 1 +ARM GAS /tmp/ccd6fn4Z.s page 1 1 .cpu cortex-m7 @@ -24,7 +24,7 @@ ARM GAS /tmp/ccLTnVRs.s page 1 21 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 22 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 23 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - ARM GAS /tmp/ccLTnVRs.s page 2 + ARM GAS /tmp/ccd6fn4Z.s page 2 DEFINED SYMBOLS diff --git a/build/syscall.o b/build/syscall.o index 147e031..c5e5a6d 100644 Binary files a/build/syscall.o and b/build/syscall.o differ