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saw AD9102 done

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This commit is contained in:
Ayzen
2026-02-03 18:57:12 +03:00
parent bd15847b76
commit fedc27bfa8
31 changed files with 25122 additions and 22131 deletions
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364
Src/main.c
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@ -34,6 +34,48 @@
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
// AD9102 register addresses and bit fields (see ad9102.pdf)
#define AD9102_REG_RAMUPDATE 0x001Du
#define AD9102_REG_PAT_STATUS 0x001Eu
#define AD9102_REG_PAT_TYPE 0x001Fu
#define AD9102_REG_SPICONFIG 0x0000u
#define AD9102_REG_POWERCONFIG 0x0001u
#define AD9102_REG_CLOCKCONFIG 0x0002u
#define AD9102_REG_WAV_CONFIG 0x0027u
#define AD9102_REG_PAT_TIMEBASE 0x0028u
#define AD9102_REG_PAT_PERIOD 0x0029u
#define AD9102_REG_SAW_CONFIG 0x0037u
#define AD9102_REG_CFG_ERROR 0x0060u
#define AD9102_PAT_STATUS_RUN (1u << 0)
#define AD9102_WAV_PRESTORE_SEL_SHIFT 4
#define AD9102_WAV_WAVE_SEL_SHIFT 0
#define AD9102_WAV_PRESTORE_SAW 1u
#define AD9102_WAV_WAVE_SEL_PRESTORE 1u
#define AD9102_SAW_STEP_SHIFT 2
#define AD9102_SAW_TYPE_SHIFT 0
#define AD9102_SAW_TYPE_UP 0u
#define AD9102_SAW_TYPE_DOWN 1u
#define AD9102_SAW_TYPE_TRI 2u
#define AD9102_SAW_TYPE_ZERO 3u
#define AD9102_REG_COUNT 66u
#define AD9102_EX4_WAV_CONFIG 0x3212u
#define AD9102_EX4_PAT_TIMEBASE 0x0121u
#define AD9102_EX4_PAT_PERIOD 0xFFFFu
#define AD9102_EX4_SAW_CONFIG 0x0606u
#define AD9102_SAW_STEP_DEFAULT 1u
#define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u
#define AD9102_START_DELAY_BASE_DEFAULT 0x1u
#define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u
#define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu
#define AD9102_FLAG_ENABLE 0x0001u
#define AD9102_FLAG_TRIANGLE 0x0002u
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
@ -70,6 +112,31 @@ LD_Blinker_StateTypeDef LD_blinker;
task_t task;
static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = {
0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u,
0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu,
0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u,
0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u,
0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu,
0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u,
0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u,
0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu,
0x001eu, 0x001du
};
static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = {
0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u,
0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u,
0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u,
0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu,
0x0001u, 0x0001u
};
/* USER CODE END PV */
@ -103,6 +170,12 @@ void Set_LTEC(uint8_t num, uint16_t DATA);
static uint16_t MPhD_T(uint8_t num);
static uint16_t Get_ADC(uint8_t num);
static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uint8_t num);
static void AD9102_Init(void);
static void AD9102_WriteReg(uint16_t addr, uint16_t value);
static uint16_t AD9102_ReadReg(uint16_t addr);
static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count);
static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period);
static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period);
uint8_t CheckChecksum(uint16_t *pbuff);
uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len);
//int SD_Init(void);
@ -359,7 +432,56 @@ int main(void)
State_Data[0]|=temp16&0xff;
}
CPU_state_old = WORK_ENABLE;//Save main current cycle
}
break;
case AD9102_CMD://10 - Configure AD9102 sawtooth output
if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1])
{
uint16_t flags = COMMAND[0];
uint16_t param0 = COMMAND[1];
uint16_t param1 = COMMAND[2];
uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP;
uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
uint16_t pat_period = param1;
if (param0 == 0u && param1 == 0u)
{
saw_step = AD9102_SAW_STEP_DEFAULT;
pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT;
pat_period = AD9102_PAT_PERIOD_DEFAULT;
}
else
{
if (saw_step == 0u)
{
saw_step = AD9102_SAW_STEP_DEFAULT;
}
else if (saw_step > 63u)
{
saw_step = 63u;
}
if (pat_period == 0u)
{
pat_period = AD9102_PAT_PERIOD_DEFAULT;
}
}
uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period);
State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
{
State_Data[0] |= AD9102_ERR;
}
}
else
{
State_Data[0] |= UART_DECODE_ERR;
}
UART_transmission_request = MESS_01;
CPU_state = CPU_state_old;
break;
case DECODE_TASK:
if (CheckChecksum(COMMAND))
@ -998,6 +1120,7 @@ static void MX_SPI2_Init(void)
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
/**SPI2 GPIO Configuration
PB13 ------> SPI2_SCK
PB14 ------> SPI2_MISO
PB15 ------> SPI2_MOSI
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
@ -1008,6 +1131,14 @@ static void MX_SPI2_Init(void)
GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_14;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_15;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
@ -1023,8 +1154,8 @@ static void MX_SPI2_Init(void)
SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
@ -1735,6 +1866,7 @@ static void MX_GPIO_Init(void)
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET);
@ -1749,7 +1881,7 @@ static void MX_GPIO_Init(void)
HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|DAC_LD1_CS_Pin|OUT_6_Pin
HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin
|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
@ -1757,6 +1889,7 @@ static void MX_GPIO_Init(void)
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET);
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
@ -1775,8 +1908,8 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
/*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin */
GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin;
/*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */
GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
@ -1818,17 +1951,17 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin DAC_LD1_CS_Pin
/*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin
OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */
GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin|DAC_LD1_CS_Pin
GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin
|OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 */
GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7;
/*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin */
GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
@ -2007,6 +2140,8 @@ static void Init_params(void)
// {
// test = 12;
// }
AD9102_Init();
}
static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup)
{
@ -2263,10 +2398,221 @@ void OUT_trigger(uint8_t out_n)
}
}
static void AD9102_Init(void)
{
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
for (volatile uint32_t d = 0; d < 1000; d++) {}
HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT);
AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
}
static void AD9102_WriteReg(uint16_t addr, uint16_t value)
{
uint32_t tmp32 = 0;
uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
if (!LL_SPI_IsEnabled(SPI2))
{
LL_SPI_Enable(SPI2);
}
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
LL_SPI_TransmitData16(SPI2, cmd);
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
(void) SPI2->DR;
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
LL_SPI_TransmitData16(SPI2, value);
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
(void) SPI2->DR;
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
}
static uint16_t AD9102_ReadReg(uint16_t addr)
{
uint32_t tmp32 = 0;
uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
uint16_t value;
if (!LL_SPI_IsEnabled(SPI2))
{
LL_SPI_Enable(SPI2);
}
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
LL_SPI_TransmitData16(SPI2, cmd);
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
(void) SPI2->DR;
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
LL_SPI_TransmitData16(SPI2, 0x0000u);
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
value = LL_SPI_ReceiveData16(SPI2);
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
return value;
}
static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count)
{
for (uint16_t i = 0; i < count; i++)
{
AD9102_WriteReg(ad9102_reg_addr[i], values[i]);
}
}
static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period)
{
if (enable)
{
uint16_t saw_cfg;
uint16_t pat_timebase;
if (saw_step == 0u)
{
saw_step = AD9102_SAW_STEP_DEFAULT;
}
if (saw_step > 63u)
{
saw_step = 63u;
}
saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
((uint16_t)(saw_type & 0x3u)));
pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
((pat_base & 0x0Fu) << 4) |
(AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG);
AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period);
AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
// Update RUN then RAMUPDATE at the end of the write sequence.
// AD9102 output is started by a falling edge of TRIGGER pin when RUN=1.
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
for (volatile uint32_t d = 0; d < 1000; d++) {}
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
}
else
{
AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
}
return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
}
static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period)
{
uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
((pat_base & 0x0Fu) << 4) |
(AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
if (saw_step == 0u)
{
saw_step = AD9102_SAW_STEP_DEFAULT;
}
if (saw_step > 63u)
{
saw_step = 63u;
}
if (pat_period == 0u)
{
pat_period = AD9102_PAT_PERIOD_DEFAULT;
}
uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
((uint16_t)(saw_type & 0x3u)));
uint8_t ok = 1u;
// Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset.
if (spiconfig != 0x0000u)
{
ok = 0u;
}
// Power blocks should not be powered down.
if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
{
ok = 0u;
}
// Clock receiver must be enabled (cannot directly detect external clock presence).
if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
{
ok = 0u;
}
// Any configuration error flags indicate a bad setup.
if (cfg_err & 0x003Fu)
{
ok = 0u;
}
if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
{
ok = 0u;
}
if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG)
{
ok = 0u;
}
if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
{
ok = 0u;
}
if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period)
{
ok = 0u;
}
if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u)
{
ok = 0u;
}
if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw)
{
ok = 0u;
}
return (ok ? 0u : 1u);
}
void Set_LTEC(uint8_t num, uint16_t DATA)
{
uint32_t tmp32;
#if AD9102_ON_SPI2
// AD9102 occupies SPI2; skip LD1/TEC1 writes to avoid CS conflicts.
if (num == 1 || num == 3)
{
return;
}
#endif
switch (num)
{
case 1: