fixed relative phases in Mach-Zander and ADC clocks. ADC clock delayed to move ADC sampling time far from the start of modulated period. Now there is 400 ns time reserve.
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@ -247,8 +247,8 @@ void TIM1_UP_TIM10_IRQHandler(void)
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void TIM1_TRG_COM_TIM11_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 0 */
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TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent
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TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent
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TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent (Mach-Zander)
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TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent (ADC clock)
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TIM11 -> DIER &= ~(1); //disable interrupt
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/* USER CODE END TIM1_TRG_COM_TIM11_IRQn 0 */
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HAL_TIM_IRQHandler(&htim11);
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