fixed relative phases in Mach-Zander and ADC clocks. ADC clock delayed to move ADC sampling time far from the start of modulated period. Now there is 400 ns time reserve.

This commit is contained in:
2025-04-18 17:05:26 +03:00
parent 9974606734
commit f20ad2301b
2 changed files with 11 additions and 5 deletions

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@ -247,8 +247,8 @@ void TIM1_UP_TIM10_IRQHandler(void)
void TIM1_TRG_COM_TIM11_IRQHandler(void)
{
/* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 0 */
TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent
TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent
TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent (Mach-Zander)
TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent (ADC clock)
TIM11 -> DIER &= ~(1); //disable interrupt
/* USER CODE END TIM1_TRG_COM_TIM11_IRQn 0 */
HAL_TIM_IRQHandler(&htim11);