From f20ad2301b91b86eddc709a79106fe1518cce531 Mon Sep 17 00:00:00 2001 From: Theodor Chikin Date: Fri, 18 Apr 2025 17:05:26 +0300 Subject: [PATCH] fixed relative phases in Mach-Zander and ADC clocks. ADC clock delayed to move ADC sampling time far from the start of modulated period. Now there is 400 ns time reserve. --- Src/main.c | 12 +++++++++--- Src/stm32f7xx_it.c | 4 ++-- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/Src/main.c b/Src/main.c index 50dd2e2..0eadeca 100644 --- a/Src/main.c +++ b/Src/main.c @@ -425,7 +425,7 @@ int main(void) HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start modulating by Mach-Zander modulator + HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode @@ -435,7 +435,13 @@ int main(void) TIM4 -> CNT = 0; HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start modulating by Mach-Zander modulator + HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + //TIM4 -> CNT = 0; + + TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big delay in RF subsystem (up to ~400 ns) + TIM11 -> CNT = 0; + + while (task.current_param < task.max_param) { if (TIM10_coflag) @@ -485,7 +491,7 @@ int main(void) //but one-pulse mode should be disabled //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start modulating by Mach-Zander modulator + //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock diff --git a/Src/stm32f7xx_it.c b/Src/stm32f7xx_it.c index 87e5988..7460297 100644 --- a/Src/stm32f7xx_it.c +++ b/Src/stm32f7xx_it.c @@ -247,8 +247,8 @@ void TIM1_UP_TIM10_IRQHandler(void) void TIM1_TRG_COM_TIM11_IRQHandler(void) { /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 0 */ - TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent - TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent + TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent (Mach-Zander) + TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent (ADC clock) TIM11 -> DIER &= ~(1); //disable interrupt /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 0 */ HAL_TIM_IRQHandler(&htim11);