ChTheo/RadioPhotonic_PCB_software
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This commit is contained in:
Ayzen
2026-03-13 17:49:58 +03:00
parent db80907a0b
commit eafc328caa
89 changed files with 36315 additions and 34500 deletions
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46
build/system_stm32f7xx.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccZPj2qA.s page 1
ARM GAS /tmp/ccndRLUa.s page 1
1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1
29:Src/system_stm32f7xx.c **** * in the root directory of this software component.
30:Src/system_stm32f7xx.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
31:Src/system_stm32f7xx.c **** *
ARM GAS /tmp/ccZPj2qA.s page 2
ARM GAS /tmp/ccndRLUa.s page 2
32:Src/system_stm32f7xx.c **** ******************************************************************************
@ -118,7 +118,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1
86:Src/system_stm32f7xx.c **** #if defined(VECT_TAB_SRAM)
87:Src/system_stm32f7xx.c **** #define VECT_TAB_BASE_ADDRESS RAMDTCM_BASE /*!< Vector Table base address field.
88:Src/system_stm32f7xx.c **** This value must be a multiple of 0x200. */
ARM GAS /tmp/ccZPj2qA.s page 3
ARM GAS /tmp/ccndRLUa.s page 3
89:Src/system_stm32f7xx.c **** #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
@ -178,7 +178,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1
143:Src/system_stm32f7xx.c ****
144:Src/system_stm32f7xx.c **** /**
145:Src/system_stm32f7xx.c **** * @brief Setup the microcontroller system
ARM GAS /tmp/ccZPj2qA.s page 4
ARM GAS /tmp/ccndRLUa.s page 4
146:Src/system_stm32f7xx.c **** * Initialize the Embedded Flash Interface, the PLL and update the
@ -238,7 +238,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1
172:Src/system_stm32f7xx.c **** * based on this variable will be incorrect.
173:Src/system_stm32f7xx.c **** *
174:Src/system_stm32f7xx.c **** * @note - The system frequency computed by this function is not the real
ARM GAS /tmp/ccZPj2qA.s page 5
ARM GAS /tmp/ccndRLUa.s page 5
175:Src/system_stm32f7xx.c **** * frequency in the chip. It is calculated based on the predefined
@ -298,7 +298,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1
208:Src/system_stm32f7xx.c **** {
209:Src/system_stm32f7xx.c **** case 0x00: /* HSI used as system clock source */
210:Src/system_stm32f7xx.c **** SystemCoreClock = HSI_VALUE;
ARM GAS /tmp/ccZPj2qA.s page 6
ARM GAS /tmp/ccndRLUa.s page 6
79 .loc 1 210 7 view .LVU11
@ -358,7 +358,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1
245:Src/system_stm32f7xx.c **** SystemCoreClock >>= tmp;
99 .loc 1 245 3 is_stmt 1 view .LVU19
100 .loc 1 245 19 is_stmt 0 view .LVU20
ARM GAS /tmp/ccZPj2qA.s page 7
ARM GAS /tmp/ccndRLUa.s page 7
101 0026 1A4A ldr r2, .L11+4
@ -418,7 +418,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1
140 004a B3FBF2F3 udiv r3, r3, r2
226:Src/system_stm32f7xx.c **** }
141 .loc 1 226 44 view .LVU36
ARM GAS /tmp/ccZPj2qA.s page 8
ARM GAS /tmp/ccndRLUa.s page 8
142 004e 0F4A ldr r2, .L11
@ -478,7 +478,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1
180 .loc 1 231 44 view .LVU52
181 0076 054A ldr r2, .L11
182 .LVL17:
ARM GAS /tmp/ccZPj2qA.s page 9
ARM GAS /tmp/ccndRLUa.s page 9
231:Src/system_stm32f7xx.c **** }
@ -538,7 +538,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1
230 .section .data.SystemCoreClock,"aw"
231 .align 2
234 SystemCoreClock:
ARM GAS /tmp/ccZPj2qA.s page 10
ARM GAS /tmp/ccndRLUa.s page 10
235 0000 0024F400 .word 16000000
@ -548,22 +548,22 @@ ARM GAS /tmp/ccZPj2qA.s page 1
239 .file 3 "Drivers/CMSIS/Include/core_cm7.h"
240 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h"
241 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
ARM GAS /tmp/ccZPj2qA.s page 11
ARM GAS /tmp/ccndRLUa.s page 11
DEFINED SYMBOLS
*ABS*:00000000 system_stm32f7xx.c
/tmp/ccZPj2qA.s:20 .text.SystemInit:00000000 $t
/tmp/ccZPj2qA.s:26 .text.SystemInit:00000000 SystemInit
/tmp/ccZPj2qA.s:45 .text.SystemInit:00000010 $d
/tmp/ccZPj2qA.s:50 .text.SystemCoreClockUpdate:00000000 $t
/tmp/ccZPj2qA.s:56 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate
/tmp/ccZPj2qA.s:206 .text.SystemCoreClockUpdate:0000008c $d
/tmp/ccZPj2qA.s:234 .data.SystemCoreClock:00000000 SystemCoreClock
/tmp/ccZPj2qA.s:226 .rodata.AHBPrescTable:00000000 AHBPrescTable
/tmp/ccZPj2qA.s:219 .rodata.APBPrescTable:00000000 APBPrescTable
/tmp/ccZPj2qA.s:216 .rodata.APBPrescTable:00000000 $d
/tmp/ccZPj2qA.s:223 .rodata.AHBPrescTable:00000000 $d
/tmp/ccZPj2qA.s:231 .data.SystemCoreClock:00000000 $d
/tmp/ccndRLUa.s:20 .text.SystemInit:00000000 $t
/tmp/ccndRLUa.s:26 .text.SystemInit:00000000 SystemInit
/tmp/ccndRLUa.s:45 .text.SystemInit:00000010 $d
/tmp/ccndRLUa.s:50 .text.SystemCoreClockUpdate:00000000 $t
/tmp/ccndRLUa.s:56 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate
/tmp/ccndRLUa.s:206 .text.SystemCoreClockUpdate:0000008c $d
/tmp/ccndRLUa.s:234 .data.SystemCoreClock:00000000 SystemCoreClock
/tmp/ccndRLUa.s:226 .rodata.AHBPrescTable:00000000 AHBPrescTable
/tmp/ccndRLUa.s:219 .rodata.APBPrescTable:00000000 APBPrescTable
/tmp/ccndRLUa.s:216 .rodata.APBPrescTable:00000000 $d
/tmp/ccndRLUa.s:223 .rodata.AHBPrescTable:00000000 $d
/tmp/ccndRLUa.s:231 .data.SystemCoreClock:00000000 $d
NO UNDEFINED SYMBOLS