From eafc328caab40c83944eb1f28f0bb85d45951550 Mon Sep 17 00:00:00 2001 From: Ayzen Date: Fri, 13 Mar 2026 17:49:58 +0300 Subject: [PATCH] Save current local changes --- Inc/main.h | 8 + Src/main.c | 339 +- Src/stm32f7xx_it.c | 50 +- build/File_Handling.lst | 262 +- build/For_stm32.bin | Bin 48676 -> 49532 bytes build/For_stm32.elf | Bin 758568 -> 767036 bytes build/For_stm32.hex | 5502 ++-- build/For_stm32.map | 2462 +- build/bsp_driver_sd.lst | 116 +- build/bsp_driver_sd.o | Bin 19808 -> 19768 bytes build/diskio.lst | 52 +- build/fatfs.lst | 34 +- build/fatfs_platform.lst | 12 +- build/fatfs_platform.o | Bin 4024 -> 3984 bytes build/ff.lst | 1070 +- build/ff_gen_drv.lst | 48 +- build/main.lst | 45291 +++++++++++++++-------------- build/main.o | Bin 178364 -> 187412 bytes build/sd_diskio.lst | 66 +- build/stm32f7xx_hal.lst | 248 +- build/stm32f7xx_hal.o | Bin 22260 -> 22220 bytes build/stm32f7xx_hal_adc.lst | 338 +- build/stm32f7xx_hal_adc.o | Bin 32704 -> 32664 bytes build/stm32f7xx_hal_adc_ex.lst | 218 +- build/stm32f7xx_hal_adc_ex.o | Bin 25984 -> 25944 bytes build/stm32f7xx_hal_cortex.lst | 334 +- build/stm32f7xx_hal_cortex.o | Bin 28472 -> 28432 bytes build/stm32f7xx_hal_dma.lst | 240 +- build/stm32f7xx_hal_dma.o | Bin 26424 -> 26384 bytes build/stm32f7xx_hal_dma_ex.lst | 166 +- build/stm32f7xx_hal_dma_ex.o | Bin 17248 -> 17208 bytes build/stm32f7xx_hal_exti.lst | 104 +- build/stm32f7xx_hal_exti.o | Bin 12992 -> 12952 bytes build/stm32f7xx_hal_flash.lst | 228 +- build/stm32f7xx_hal_flash.o | Bin 17536 -> 17496 bytes build/stm32f7xx_hal_flash_ex.lst | 226 +- build/stm32f7xx_hal_flash_ex.o | Bin 20680 -> 20640 bytes build/stm32f7xx_hal_gpio.lst | 100 +- build/stm32f7xx_hal_gpio.o | Bin 14484 -> 14444 bytes build/stm32f7xx_hal_i2c.lst | 1362 +- build/stm32f7xx_hal_i2c.o | Bin 148608 -> 148568 bytes build/stm32f7xx_hal_i2c_ex.lst | 44 +- build/stm32f7xx_hal_i2c_ex.o | Bin 11256 -> 11216 bytes build/stm32f7xx_hal_msp.lst | 142 +- build/stm32f7xx_hal_pwr.lst | 180 +- build/stm32f7xx_hal_pwr.o | Bin 13612 -> 13572 bytes build/stm32f7xx_hal_pwr_ex.lst | 134 +- build/stm32f7xx_hal_pwr_ex.o | Bin 16236 -> 16196 bytes build/stm32f7xx_hal_rcc.lst | 262 +- build/stm32f7xx_hal_rcc.o | Bin 24432 -> 24392 bytes build/stm32f7xx_hal_rcc_ex.lst | 204 +- build/stm32f7xx_hal_rcc_ex.o | Bin 20860 -> 20820 bytes build/stm32f7xx_hal_sd.lst | 632 +- build/stm32f7xx_hal_sd.o | Bin 75156 -> 75116 bytes build/stm32f7xx_hal_tim.lst | 1846 +- build/stm32f7xx_hal_tim.o | Bin 160408 -> 160368 bytes build/stm32f7xx_hal_tim_ex.lst | 566 +- build/stm32f7xx_hal_tim_ex.o | Bin 67256 -> 67216 bytes build/stm32f7xx_hal_uart.lst | 988 +- build/stm32f7xx_hal_uart.o | Bin 129304 -> 129264 bytes build/stm32f7xx_hal_uart_ex.lst | 182 +- build/stm32f7xx_hal_uart_ex.o | Bin 26092 -> 26052 bytes build/stm32f7xx_it.lst | 3981 +-- build/stm32f7xx_it.o | Bin 28972 -> 29312 bytes build/stm32f7xx_ll_dma.lst | 144 +- build/stm32f7xx_ll_dma.o | Bin 14784 -> 14744 bytes build/stm32f7xx_ll_exti.lst | 70 +- build/stm32f7xx_ll_exti.o | Bin 8940 -> 8900 bytes build/stm32f7xx_ll_gpio.lst | 168 +- build/stm32f7xx_ll_gpio.o | Bin 19376 -> 19336 bytes build/stm32f7xx_ll_rcc.lst | 554 +- build/stm32f7xx_ll_rcc.o | Bin 48784 -> 48744 bytes build/stm32f7xx_ll_sdmmc.lst | 406 +- build/stm32f7xx_ll_sdmmc.o | Bin 47424 -> 47384 bytes build/stm32f7xx_ll_spi.lst | 210 +- build/stm32f7xx_ll_spi.o | Bin 15748 -> 15708 bytes build/stm32f7xx_ll_tim.lst | 510 +- build/stm32f7xx_ll_tim.o | Bin 41128 -> 41088 bytes build/stm32f7xx_ll_usart.lst | 206 +- build/stm32f7xx_ll_usart.o | Bin 17516 -> 17476 bytes build/stm32f7xx_ll_utils.lst | 330 +- build/stm32f7xx_ll_utils.o | Bin 20452 -> 20412 bytes build/syscall.lst | 4 +- build/syscalls.lst | 110 +- build/syscalls.o | Bin 14908 -> 14868 bytes build/sysmem.lst | 20 +- build/sysmem.o | Bin 4132 -> 4092 bytes build/system_stm32f7xx.lst | 46 +- build/system_stm32f7xx.o | Bin 8312 -> 8272 bytes 89 files changed, 36315 insertions(+), 34500 deletions(-) diff --git a/Inc/main.h b/Inc/main.h index c8fe526..ee03496 100644 --- a/Inc/main.h +++ b/Inc/main.h @@ -191,6 +191,8 @@ void Set_LTEC(uint8_t, uint16_t); #define AD9833_CMD 11 #define DS1809_CMD 12 #define STM32_DAC_CMD 13 + #define AD9102_WAVE_CTRL_CMD 14 + #define AD9102_WAVE_DATA_CMD 15 #define SD_ERR 0x01 #define UART_ERR 0x02 @@ -219,6 +221,12 @@ void Set_LTEC(uint8_t, uint16_t); #define STM32_DAC_CMD_HEADER 0xBBBB #define STM32_DAC_CMD_8 10 // total bytes including header #define STM32_DAC_CMD_WORDS 4 // data words (flags, dac_code, reserved, checksum) + #define AD9102_WAVE_CTRL_HEADER 0xCCCC + #define AD9102_WAVE_CTRL_8 10 // total bytes including header + #define AD9102_WAVE_CTRL_WORDS 4 // data words (opcode, param0, param1, checksum) + #define AD9102_WAVE_DATA_HEADER 0xDDDD + #define AD9102_WAVE_DATA_8 30 // total bytes including header + #define AD9102_WAVE_DATA_WORDS 14 // data words (count, 12 samples, checksum) #define AD9102_ON_SPI2 1 diff --git a/Src/main.c b/Src/main.c index 8e238d2..74ffb9f 100644 --- a/Src/main.c +++ b/Src/main.c @@ -97,6 +97,10 @@ #define AD9102_FLAG_TRIANGLE 0x0002u #define AD9102_FLAG_SRAM 0x0004u #define AD9102_FLAG_SRAM_FMT 0x0008u +#define AD9102_WAVE_OPCODE_BEGIN 0x0001u +#define AD9102_WAVE_OPCODE_COMMIT 0x0002u +#define AD9102_WAVE_OPCODE_CANCEL 0x0003u +#define AD9102_WAVE_MAX_CHUNK_SAMPLES 12u #define AD9833_FLAG_ENABLE 0x0001u #define AD9833_FLAG_TRIANGLE 0x0002u @@ -177,6 +181,10 @@ static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = { 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u, 0x0001u, 0x0001u }; + +static uint8_t ad9102_wave_upload_active = 0u; +static uint16_t ad9102_wave_expected_samples = 0u; +static uint16_t ad9102_wave_written_samples = 0u; @@ -220,6 +228,14 @@ static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period); static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, uint16_t amplitude); static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude); +static void AD9102_ResetWaveUploadState(void); +static void AD9102_StopOutput(void); +static void AD9102_StartOutput(void); +static void AD9102_ConfigureSramPlayback(uint16_t samples, uint8_t hold); +static uint8_t AD9102_BeginWaveUpload(uint16_t samples); +static uint8_t AD9102_WriteWaveUploadChunk(const uint16_t *samples, uint16_t chunk_count); +static uint16_t AD9102_CommitWaveUpload(uint8_t *ok); +static void AD9102_CancelWaveUpload(void); static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period); static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uint8_t hold); static void SPI2_SetMode(uint32_t polarity, uint32_t phase); @@ -377,14 +393,15 @@ int main(void) } UART_transmission_request = MESS_01; break; - case DEFAULT_ENABLE://2 - Go to HALT - //Set current setup to default - task.current_param = task.min_param; - Stop_TIM10(); - Init_params(); - LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - CPU_state = HALT; + case DEFAULT_ENABLE://2 - Go to HALT + //Set current setup to default + task.current_param = task.min_param; + Stop_TIM10(); + Init_params(); + AD9102_CancelWaveUpload(); + LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + CPU_state = HALT; CPU_state_old = HALT;//Save main current cycle UART_transmission_request = MESS_01; break; @@ -649,9 +666,86 @@ int main(void) UART_transmission_request = MESS_01; CPU_state = CPU_state_old; break; + case AD9102_WAVE_CTRL_CMD://14 - Control custom AD9102 SRAM upload + State_Data[1] = 0u; + if (CalculateChecksum(COMMAND, AD9102_WAVE_CTRL_WORDS - 1) == COMMAND[AD9102_WAVE_CTRL_WORDS - 1]) + { + uint16_t opcode = COMMAND[0]; + uint16_t param0 = COMMAND[1]; + uint16_t param1 = COMMAND[2]; + + switch (opcode) + { + case AD9102_WAVE_OPCODE_BEGIN: + if ((param1 != 0u) || !AD9102_BeginWaveUpload(param0)) + { + AD9102_CancelWaveUpload(); + State_Data[0] |= AD9102_ERR; + } + break; + case AD9102_WAVE_OPCODE_COMMIT: + { + uint16_t samples = ad9102_wave_expected_samples; + uint8_t ok = 0u; + uint16_t pat_status; + + if ((param0 != 0u) || (param1 != 0u)) + { + AD9102_CancelWaveUpload(); + State_Data[0] |= AD9102_ERR; + break; + } + + pat_status = AD9102_CommitWaveUpload(&ok); + State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + if ((!ok) || AD9102_CheckFlagsSram(pat_status, 1u, samples, AD9102_SRAM_HOLD_DEFAULT)) + { + State_Data[0] |= AD9102_ERR; + } + } + break; + case AD9102_WAVE_OPCODE_CANCEL: + if ((param0 != 0u) || (param1 != 0u)) + { + State_Data[0] |= AD9102_ERR; + } + AD9102_CancelWaveUpload(); + break; + default: + AD9102_CancelWaveUpload(); + State_Data[0] |= AD9102_ERR; + break; + } + } + else + { + State_Data[0] |= UART_DECODE_ERR; + } + UART_transmission_request = MESS_01; + CPU_state = CPU_state_old; + break; + case AD9102_WAVE_DATA_CMD://15 - Write custom AD9102 SRAM samples + State_Data[1] = 0u; + if (CalculateChecksum(COMMAND, AD9102_WAVE_DATA_WORDS - 1) == COMMAND[AD9102_WAVE_DATA_WORDS - 1]) + { + uint16_t chunk_count = COMMAND[0]; + if (!AD9102_WriteWaveUploadChunk(&COMMAND[1], chunk_count)) + { + AD9102_CancelWaveUpload(); + State_Data[0] |= AD9102_ERR; + } + } + else + { + AD9102_CancelWaveUpload(); + State_Data[0] |= UART_DECODE_ERR; + } + UART_transmission_request = MESS_01; + CPU_state = CPU_state_old; + break; case DECODE_TASK: - if (CheckChecksum(COMMAND)) - { + if (CheckChecksum(COMMAND)) + { Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); TO6_before = TO6; CPU_state = RUN_TASK; @@ -2852,8 +2946,176 @@ static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count) } } +static void AD9102_ResetWaveUploadState(void) +{ + ad9102_wave_upload_active = 0u; + ad9102_wave_expected_samples = 0u; + ad9102_wave_written_samples = 0u; +} + +static void AD9102_StopOutput(void) +{ + AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +} + +static void AD9102_StartOutput(void) +{ + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); + AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + for (volatile uint32_t d = 0; d < 1000; d++) {} + HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); +} + +static void AD9102_ConfigureSramPlayback(uint16_t samples, uint8_t hold) +{ + uint16_t pat_timebase; + uint32_t pat_period; + + if (samples < 2u) + { + samples = 2u; + } + if (samples > AD9102_SRAM_MAX_SAMPLES) + { + samples = AD9102_SRAM_MAX_SAMPLES; + } + if (hold == 0u) + { + hold = AD9102_SRAM_HOLD_DEFAULT; + } + if (hold > 0x0Fu) + { + hold = 0x0Fu; + } + + pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | + ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); + pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); + if (pat_period == 0u) + { + pat_period = samples; + } + if (pat_period > 0xFFFFu) + { + pat_period = 0xFFFFu; + } + + AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT); + AD9102_StopOutput(); + AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); + AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); + AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); + AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); + AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); + AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat + AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); + AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); + AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); + AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +} + +static uint8_t AD9102_BeginWaveUpload(uint16_t samples) +{ + if ((samples < 2u) || (samples > AD9102_SRAM_MAX_SAMPLES)) + { + return 0u; + } + + AD9102_StopOutput(); + AD9102_ResetWaveUploadState(); + AD9102_ConfigureSramPlayback(samples, AD9102_SRAM_HOLD_DEFAULT); + AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); // enable SRAM access + + ad9102_wave_expected_samples = samples; + ad9102_wave_written_samples = 0u; + ad9102_wave_upload_active = 1u; + return 1u; +} + +static uint8_t AD9102_WriteWaveUploadChunk(const uint16_t *samples, uint16_t chunk_count) +{ + if (ad9102_wave_upload_active == 0u) + { + return 0u; + } + if ((chunk_count == 0u) || (chunk_count > AD9102_WAVE_MAX_CHUNK_SAMPLES)) + { + return 0u; + } + if (((uint32_t)ad9102_wave_written_samples + (uint32_t)chunk_count) > (uint32_t)ad9102_wave_expected_samples) + { + return 0u; + } + + for (uint16_t i = 0; i < chunk_count; i++) + { + int16_t sample = (int16_t)samples[i]; + uint16_t sample_u14; + uint16_t word; + + if ((sample < AD9102_SRAM_RAMP_MIN) || (sample > AD9102_SRAM_RAMP_MAX)) + { + return 0u; + } + + sample_u14 = ((uint16_t)sample) & 0x3FFFu; + word = (uint16_t)(sample_u14 << 2); + AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + ad9102_wave_written_samples + i), word); + } + + ad9102_wave_written_samples = (uint16_t)(ad9102_wave_written_samples + chunk_count); + return 1u; +} + +static uint16_t AD9102_CommitWaveUpload(uint8_t *ok) +{ + uint16_t pat_status; + + if (ok != NULL) + { + *ok = 0u; + } + + if ((ad9102_wave_upload_active == 0u) || + (ad9102_wave_expected_samples < 2u) || + (ad9102_wave_written_samples != ad9102_wave_expected_samples)) + { + AD9102_CancelWaveUpload(); + return AD9102_ReadReg(AD9102_REG_PAT_STATUS); + } + + AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); // disable SRAM access + AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); + AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((ad9102_wave_expected_samples - 1u) << 4)); + AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + AD9102_StartOutput(); + pat_status = AD9102_ReadReg(AD9102_REG_PAT_STATUS); + + AD9102_ResetWaveUploadState(); + if (ok != NULL) + { + *ok = 1u; + } + + return pat_status; +} + +static void AD9102_CancelWaveUpload(void) +{ + if (ad9102_wave_upload_active != 0u) + { + AD9102_StopOutput(); + } + AD9102_ResetWaveUploadState(); +} + static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period) { + AD9102_ResetWaveUploadState(); + if (enable) { uint16_t saw_cfg; @@ -2879,18 +3141,11 @@ static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat - // Update RUN then RAMUPDATE at the end of the write sequence. - // AD9102 output is started by a falling edge of TRIGGER pin when RUN=1. - HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); - AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - for (volatile uint32_t d = 0; d < 1000; d++) {} - HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + AD9102_StartOutput(); } else { - AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); - HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + AD9102_StopOutput(); } return AD9102_ReadReg(AD9102_REG_PAT_STATUS); @@ -2966,13 +3221,13 @@ static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amp } } - if (value < -8192) + if (value < AD9102_SRAM_RAMP_MIN) { - value = -8192; + value = AD9102_SRAM_RAMP_MIN; } - else if (value > 8191) + else if (value > AD9102_SRAM_RAMP_MAX) { - value = 8191; + value = AD9102_SRAM_RAMP_MAX; } uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu; @@ -2986,6 +3241,8 @@ static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amp static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, uint16_t amplitude) { + AD9102_ResetWaveUploadState(); + if (samples == 0u) { samples = AD9102_SRAM_SAMPLES_DEFAULT; @@ -3012,46 +3269,16 @@ static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, amplitude = AD9102_SRAM_AMP_DEFAULT; } - uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | - ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); - uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); - if (pat_period == 0u) - { - pat_period = samples; - } - if (pat_period > 0xFFFFu) - { - pat_period = 0xFFFFu; - } - - AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT); - AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); - AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); - AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); - AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); - AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); - AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); - AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat - AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); - AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); - AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); - AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - + AD9102_ConfigureSramPlayback(samples, hold); AD9102_LoadSramRamp(samples, triangle, amplitude); if (enable) { - HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); - AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - for (volatile uint32_t d = 0; d < 1000; d++) {} - HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + AD9102_StartOutput(); } else { - AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); - HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + AD9102_StopOutput(); } return AD9102_ReadReg(AD9102_REG_PAT_STATUS); diff --git a/Src/stm32f7xx_it.c b/Src/stm32f7xx_it.c index 6c91121..06a1ae7 100644 --- a/Src/stm32f7xx_it.c +++ b/Src/stm32f7xx_it.c @@ -490,6 +490,12 @@ void UART_RxCpltCallback(void) case STM32_DAC_CMD_HEADER: // STM32 internal DAC command UART_rec_incr = 2;//timeout flag is still setting! break; + case AD9102_WAVE_CTRL_HEADER: // AD9102 custom waveform control command + UART_rec_incr = 2;//timeout flag is still setting! + break; + case AD9102_WAVE_DATA_HEADER: // AD9102 custom waveform data packet + UART_rec_incr = 2;//timeout flag is still setting! + break; default: //error decoding header UART_rec_incr = 0; flg_tmt = 0;//Reset the timeout flag @@ -542,6 +548,16 @@ void UART_RxCpltCallback(void) UART_rec_incr = 0; flg_tmt = 0;//Reset the timeout flag } + else if (UART_header == AD9102_WAVE_CTRL_HEADER) + { + if ((UART_rec_incr & 0x0001) > 0) + COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + else + COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + CPU_state = AD9102_WAVE_CTRL_CMD; + UART_rec_incr = 0; + flg_tmt = 0;//Reset the timeout flag + } else { if ((UART_rec_incr&0x0001)>0) @@ -556,19 +572,29 @@ void UART_RxCpltCallback(void) case (CL_8 - 1): if (UART_header == 0x1111) { - if ((UART_rec_incr & 0x0001) > 0) - COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - else + if ((UART_rec_incr & 0x0001) > 0) + COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + else COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - CPU_state = DECODE_ENABLE; - UART_rec_incr = 0; - flg_tmt = 0;//Reset the timeout flag - } - else - { - if ((UART_rec_incr&0x0001)>0) - COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - else + CPU_state = DECODE_ENABLE; + UART_rec_incr = 0; + flg_tmt = 0;//Reset the timeout flag + } + else if (UART_header == AD9102_WAVE_DATA_HEADER) + { + if ((UART_rec_incr & 0x0001) > 0) + COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + else + COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + CPU_state = AD9102_WAVE_DATA_CMD; + UART_rec_incr = 0; + flg_tmt = 0;//Reset the timeout flag + } + else + { + if ((UART_rec_incr&0x0001)>0) + COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + else COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); UART_rec_incr++; UART_transmission_request = NO_MESS; diff --git a/build/File_Handling.lst b/build/File_Handling.lst index 4d089ec..e6807a4 100644 --- a/build/File_Handling.lst +++ b/build/File_Handling.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccwVm8tx.s page 1 +ARM GAS /tmp/ccnfjbri.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 28:Src/File_Handling.c **** 29:Src/File_Handling.c **** 30:Src/File_Handling.c **** void Send_Uart (char *string) - ARM GAS /tmp/ccwVm8tx.s page 2 + ARM GAS /tmp/ccnfjbri.s page 2 31:Src/File_Handling.c **** { @@ -118,7 +118,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 75 0012 0120 movs r0, #1 76 .L2: 41:Src/File_Handling.c **** else return 0; - ARM GAS /tmp/ccwVm8tx.s page 3 + ARM GAS /tmp/ccnfjbri.s page 3 42:Src/File_Handling.c **** } @@ -178,7 +178,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 48:Src/File_Handling.c **** return 1;//else Send_Uart("ERROR!!! in UNMOUNTING SD CARD\n\n\n"); 126 .loc 1 48 9 view .LVU21 127 0012 0120 movs r0, #1 - ARM GAS /tmp/ccwVm8tx.s page 4 + ARM GAS /tmp/ccnfjbri.s page 4 128 .L8: @@ -238,7 +238,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 171 .LCFI2: 172 .cfi_def_cfa_offset 16 173 .cfi_offset 4, -16 - ARM GAS /tmp/ccwVm8tx.s page 5 + ARM GAS /tmp/ccnfjbri.s page 5 174 .cfi_offset 5, -12 @@ -298,7 +298,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 69:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char)); 70:Src/File_Handling.c **** sprintf (buf, "Dir: %s\r\n", fno.fname); 71:Src/File_Handling.c **** Send_Uart(buf); - ARM GAS /tmp/ccwVm8tx.s page 6 + ARM GAS /tmp/ccnfjbri.s page 6 72:Src/File_Handling.c **** free(buf); @@ -358,7 +358,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 247 .loc 1 65 46 discriminator 1 view .LVU49 248 004c 1D4B ldr r3, .L21+12 249 004e 5B7A ldrb r3, [r3, #9] @ zero_extendqisi2 - ARM GAS /tmp/ccwVm8tx.s page 7 + ARM GAS /tmp/ccnfjbri.s page 7 65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */ @@ -418,7 +418,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 290 0082 FFF7FEFF bl strlen 291 .LVL24: 292 0086 0546 mov r5, r0 - ARM GAS /tmp/ccwVm8tx.s page 8 + ARM GAS /tmp/ccnfjbri.s page 8 293 .LVL25: @@ -478,7 +478,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 331 .loc 1 91 1 is_stmt 0 view .LVU76 332 00b0 014B ldr r3, .L21 333 00b2 1878 ldrb r0, [r3] @ zero_extendqisi2 - ARM GAS /tmp/ccwVm8tx.s page 9 + ARM GAS /tmp/ccnfjbri.s page 9 334 00b4 0CB0 add sp, sp, #48 @@ -538,7 +538,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 384 .LVL33: 385 000a 0446 mov r4, r0 386 .LVL34: - ARM GAS /tmp/ccwVm8tx.s page 10 + ARM GAS /tmp/ccnfjbri.s page 10 98:Src/File_Handling.c **** sprintf (path, "%s","/"); @@ -598,7 +598,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 420 002e 6846 mov r0, sp 421 0030 FFF7FEFF bl f_readdir 422 .LVL38: - ARM GAS /tmp/ccwVm8tx.s page 11 + ARM GAS /tmp/ccnfjbri.s page 11 105:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */ @@ -658,7 +658,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 461 .L26: 116:Src/File_Handling.c **** } 117:Src/File_Handling.c **** } - ARM GAS /tmp/ccwVm8tx.s page 12 + ARM GAS /tmp/ccnfjbri.s page 12 118:Src/File_Handling.c **** f_closedir(&dir); @@ -718,7 +718,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 507 .loc 1 128 1 is_stmt 0 view .LVU117 508 0000 70B5 push {r4, r5, r6, lr} 509 .LCFI8: - ARM GAS /tmp/ccwVm8tx.s page 13 + ARM GAS /tmp/ccnfjbri.s page 13 510 .cfi_def_cfa_offset 16 @@ -778,7 +778,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 153:Src/File_Handling.c **** 154:Src/File_Handling.c **** else 155:Src/File_Handling.c **** { - ARM GAS /tmp/ccwVm8tx.s page 14 + ARM GAS /tmp/ccnfjbri.s page 14 156:Src/File_Handling.c **** fresult = f_write(&fil, data, strlen(data), &bw); @@ -838,7 +838,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 150:Src/File_Handling.c **** return fresult; 559 .loc 1 150 10 view .LVU136 151:Src/File_Handling.c **** } - ARM GAS /tmp/ccwVm8tx.s page 15 + ARM GAS /tmp/ccnfjbri.s page 15 560 .loc 1 151 10 view .LVU137 @@ -898,7 +898,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 182:Src/File_Handling.c **** } 598 .loc 1 182 13 is_stmt 0 view .LVU154 599 004a C0B2 uxtb r0, r0 - ARM GAS /tmp/ccwVm8tx.s page 16 + ARM GAS /tmp/ccnfjbri.s page 16 600 004c E2E7 b .L34 @@ -958,7 +958,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 649 .loc 1 191 5 is_stmt 0 view .LVU162 650 0012 08B1 cbz r0, .L40 651 .LBB6: - ARM GAS /tmp/ccwVm8tx.s page 17 + ARM GAS /tmp/ccnfjbri.s page 17 192:Src/File_Handling.c **** { @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 237:Src/File_Handling.c **** //Send_Uart(buf); 238:Src/File_Handling.c **** free(buf); 239:Src/File_Handling.c **** } - ARM GAS /tmp/ccwVm8tx.s page 18 + ARM GAS /tmp/ccnfjbri.s page 18 240:Src/File_Handling.c **** } @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 215:Src/File_Handling.c **** if (fresult != FR_OK) 699 .loc 1 215 15 discriminator 1 view .LVU181 700 003c 2070 strb r0, [r4] - ARM GAS /tmp/ccwVm8tx.s page 19 + ARM GAS /tmp/ccnfjbri.s page 19 216:Src/File_Handling.c **** { @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 737 004c 4552524F .ascii "ERROR!!! No. %d in reading file *%s*\012\012\000" 737 52212121 737 204E6F2E - ARM GAS /tmp/ccwVm8tx.s page 20 + ARM GAS /tmp/ccnfjbri.s page 20 737 20256420 @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 777 000e B8B9 cbnz r0, .L54 778 .LBB8: 250:Src/File_Handling.c **** { - ARM GAS /tmp/ccwVm8tx.s page 21 + ARM GAS /tmp/ccnfjbri.s page 21 251:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 814 003a 2B4B ldr r3, .L55+4 815 003c 1878 ldrb r0, [r3] @ zero_extendqisi2 816 003e 0CE0 b .L48 - ARM GAS /tmp/ccwVm8tx.s page 22 + ARM GAS /tmp/ccnfjbri.s page 22 817 .LVL70: @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 285:Src/File_Handling.c **** 286:Src/File_Handling.c **** else 287:Src/File_Handling.c **** { - ARM GAS /tmp/ccwVm8tx.s page 23 + ARM GAS /tmp/ccnfjbri.s page 23 288:Src/File_Handling.c **** Send_Uart(buffer); @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 277:Src/File_Handling.c **** { 873 .loc 1 277 3 is_stmt 1 view .LVU228 277:Src/File_Handling.c **** { - ARM GAS /tmp/ccwVm8tx.s page 24 + ARM GAS /tmp/ccnfjbri.s page 24 874 .loc 1 277 6 is_stmt 0 view .LVU229 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 916 00a0 FFF7FEFF bl free 917 .LVL88: 292:Src/File_Handling.c **** if (fresult != FR_OK) - ARM GAS /tmp/ccwVm8tx.s page 25 + ARM GAS /tmp/ccnfjbri.s page 25 918 .loc 1 292 4 view .LVU242 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 961 .LVL97: 303:Src/File_Handling.c **** Send_Uart(buf); 962 .loc 1 303 5 is_stmt 1 view .LVU254 - ARM GAS /tmp/ccwVm8tx.s page 26 + ARM GAS /tmp/ccnfjbri.s page 26 963 00d4 2246 mov r2, r4 @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1010 .LCFI11: 1011 .cfi_def_cfa_offset 24 1012 .cfi_offset 4, -24 - ARM GAS /tmp/ccwVm8tx.s page 27 + ARM GAS /tmp/ccnfjbri.s page 27 1013 .cfi_offset 5, -20 @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 332:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); 333:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name); 334:Src/File_Handling.c **** //Send_Uart(buf); - ARM GAS /tmp/ccwVm8tx.s page 28 + ARM GAS /tmp/ccnfjbri.s page 28 335:Src/File_Handling.c **** free(buf); @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1086 .LBE15: 1087 .LBB16: 318:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name); - ARM GAS /tmp/ccwVm8tx.s page 29 + ARM GAS /tmp/ccnfjbri.s page 29 1088 .loc 1 318 3 is_stmt 1 view .LVU282 @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 376:Src/File_Handling.c **** 377:Src/File_Handling.c **** /* Close file */ 378:Src/File_Handling.c **** fresult = f_close(&fil); - ARM GAS /tmp/ccwVm8tx.s page 30 + ARM GAS /tmp/ccnfjbri.s page 30 379:Src/File_Handling.c **** if (fresult != FR_OK) @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1141 .loc 1 336 14 view .LVU296 1142 .LBE17: 353:Src/File_Handling.c **** if (fresult != FR_OK) - ARM GAS /tmp/ccwVm8tx.s page 31 + ARM GAS /tmp/ccnfjbri.s page 31 1143 .loc 1 353 3 is_stmt 1 view .LVU297 @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1180 00b6 BA70 strb r2, [r7, #2] 374:Src/File_Handling.c **** } 1181 .loc 1 374 5 is_stmt 1 view .LVU315 - ARM GAS /tmp/ccwVm8tx.s page 32 + ARM GAS /tmp/ccnfjbri.s page 32 374:Src/File_Handling.c **** } @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1222 .loc 1 394 13 is_stmt 0 view .LVU329 1223 00e2 0F4B ldr r3, .L70+4 1224 00e4 1878 ldrb r0, [r3] @ zero_extendqisi2 - ARM GAS /tmp/ccwVm8tx.s page 33 + ARM GAS /tmp/ccnfjbri.s page 33 1225 00e6 C2E7 b .L59 @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1271 011c 00000000 .word fno 1272 0120 00000000 .word fresult 1273 0124 00000000 .word fil - ARM GAS /tmp/ccwVm8tx.s page 34 + ARM GAS /tmp/ccnfjbri.s page 34 1274 0128 00000000 .word .LC10 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1320 .loc 1 406 3 view .LVU346 407:Src/File_Handling.c **** return fresult; 1321 .loc 1 407 6 view .LVU347 - ARM GAS /tmp/ccwVm8tx.s page 35 + ARM GAS /tmp/ccnfjbri.s page 35 1322 .loc 1 407 13 is_stmt 0 view .LVU348 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1336 .LVL141: 411:Src/File_Handling.c **** if (fresult != FR_OK) 1337 .loc 1 411 11 discriminator 1 view .LVU352 - ARM GAS /tmp/ccwVm8tx.s page 36 + ARM GAS /tmp/ccnfjbri.s page 36 1338 001e 074B ldr r3, .L77+4 @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1376 .LFE1195: 1378 .section .text.Update_File,"ax",%progbits 1379 .align 1 - ARM GAS /tmp/ccwVm8tx.s page 37 + ARM GAS /tmp/ccnfjbri.s page 37 1380 .global Update_File @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1423 .loc 1 457 13 view .LVU381 1424 .LBE23: 458:Src/File_Handling.c **** } - ARM GAS /tmp/ccwVm8tx.s page 38 + ARM GAS /tmp/ccnfjbri.s page 38 459:Src/File_Handling.c **** @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1428 .L80: 463:Src/File_Handling.c **** if (fresult != FR_OK) 1429 .loc 1 463 6 is_stmt 1 view .LVU383 - ARM GAS /tmp/ccwVm8tx.s page 39 + ARM GAS /tmp/ccnfjbri.s page 39 463:Src/File_Handling.c **** if (fresult != FR_OK) @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 485:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name); 1470 .loc 1 485 7 view .LVU398 488:Src/File_Handling.c **** } - ARM GAS /tmp/ccwVm8tx.s page 40 + ARM GAS /tmp/ccnfjbri.s page 40 1471 .loc 1 488 7 view .LVU399 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1506 .section .text.Remove_File,"ax",%progbits 1507 .align 1 1508 .global Remove_File - ARM GAS /tmp/ccwVm8tx.s page 41 + ARM GAS /tmp/ccnfjbri.s page 41 1509 .syntax unified @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1547 0018 164B ldr r3, .L93+4 1548 001a 1870 strb r0, [r3] 527:Src/File_Handling.c **** if (fresult == FR_OK) - ARM GAS /tmp/ccwVm8tx.s page 42 + ARM GAS /tmp/ccnfjbri.s page 42 1549 .loc 1 527 3 is_stmt 1 view .LVU418 @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1584 .loc 1 517 15 is_stmt 0 view .LVU430 1585 003a 6420 movs r0, #100 1586 003c FFF7FEFF bl malloc - ARM GAS /tmp/ccwVm8tx.s page 43 + ARM GAS /tmp/ccnfjbri.s page 43 1587 .LVL161: @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1630 .align 2 1631 .L93: 1632 0070 00000000 .word fno - ARM GAS /tmp/ccwVm8tx.s page 44 + ARM GAS /tmp/ccnfjbri.s page 44 1633 0074 00000000 .word fresult @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1677 000a 1870 strb r0, [r3] 549:Src/File_Handling.c **** if (fresult == FR_OK) 1678 .loc 1 549 5 is_stmt 1 view .LVU447 - ARM GAS /tmp/ccwVm8tx.s page 45 + ARM GAS /tmp/ccnfjbri.s page 45 1679 .loc 1 549 8 is_stmt 0 view .LVU448 @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1716 .LVL177: 1717 0032 0646 mov r6, r0 1718 .LVL178: - ARM GAS /tmp/ccwVm8tx.s page 46 + ARM GAS /tmp/ccnfjbri.s page 46 559:Src/File_Handling.c **** Send_Uart(buf); @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1761 .cfi_startproc 1762 @ args = 0, pretend = 0, frame = 0 1763 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccwVm8tx.s page 47 + ARM GAS /tmp/ccnfjbri.s page 47 1764 0000 F8B5 push {r3, r4, r5, r6, r7, lr} @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1813 .LVL183: 573:Src/File_Handling.c **** sprintf (buf, "SD CARD Total Size: \t%lu\n",total); 1814 .loc 1 573 5 is_stmt 1 view .LVU475 - ARM GAS /tmp/ccwVm8tx.s page 48 + ARM GAS /tmp/ccnfjbri.s page 48 1815 0046 2246 mov r2, r4 @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1861 .cfi_restore 80 1862 .cfi_restore 81 1863 .cfi_def_cfa_offset 24 - ARM GAS /tmp/ccwVm8tx.s page 49 + ARM GAS /tmp/ccnfjbri.s page 49 1864 0092 F8BD pop {r3, r4, r5, r6, r7, pc} @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1915 000e 104B ldr r3, .L110+4 1916 0010 1870 strb r0, [r3] 587:Src/File_Handling.c **** if (fresult != FR_OK) - ARM GAS /tmp/ccwVm8tx.s page 50 + ARM GAS /tmp/ccnfjbri.s page 50 1917 .loc 1 587 2 is_stmt 1 view .LVU497 @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 629:Src/File_Handling.c **** if (fresult != FR_OK) 630:Src/File_Handling.c **** { 631:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); - ARM GAS /tmp/ccwVm8tx.s page 51 + ARM GAS /tmp/ccnfjbri.s page 51 632:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name); @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 1959 002e 0A4B ldr r3, .L110+12 1960 0030 3246 mov r2, r6 1961 0032 2946 mov r1, r5 - ARM GAS /tmp/ccwVm8tx.s page 52 + ARM GAS /tmp/ccnfjbri.s page 52 1962 0034 3846 mov r0, r7 @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 2005 .LVL200: 2006 .LFB1201: 646:Src/File_Handling.c **** - ARM GAS /tmp/ccwVm8tx.s page 53 + ARM GAS /tmp/ccnfjbri.s page 53 647:Src/File_Handling.c **** FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize) @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 661:Src/File_Handling.c **** { 662:Src/File_Handling.c **** /* Create a file with read write access and open it */ 663:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE); - ARM GAS /tmp/ccwVm8tx.s page 54 + ARM GAS /tmp/ccnfjbri.s page 54 664:Src/File_Handling.c **** if (fresult != FR_OK) @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 2053 0018 3222 movs r2, #50 2054 001a 2146 mov r1, r4 2055 001c 0D48 ldr r0, .L117+8 - ARM GAS /tmp/ccwVm8tx.s page 55 + ARM GAS /tmp/ccnfjbri.s page 55 2056 001e FFF7FEFF bl f_open @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 2094 .LVL208: 692:Src/File_Handling.c **** if (fresult != FR_OK) 2095 .loc 1 692 14 discriminator 1 view .LVU561 - ARM GAS /tmp/ccwVm8tx.s page 56 + ARM GAS /tmp/ccnfjbri.s page 56 2096 0044 2070 strb r0, [r4] @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccwVm8tx.s page 1 2158 .align 2 2161 fno: 2162 0000 00000000 .space 24 - ARM GAS /tmp/ccwVm8tx.s page 57 + ARM GAS /tmp/ccnfjbri.s page 57 2162 00000000 @@ -3396,86 +3396,86 @@ ARM GAS /tmp/ccwVm8tx.s page 1 2187 .file 10 "/usr/include/newlib/stdio.h" 2188 .file 11 "/usr/include/newlib/stdlib.h" 2189 .file 12 "" - ARM GAS /tmp/ccwVm8tx.s page 58 + ARM GAS /tmp/ccnfjbri.s page 58 DEFINED SYMBOLS *ABS*:00000000 File_Handling.c - /tmp/ccwVm8tx.s:20 .text.Send_Uart:00000000 $t - /tmp/ccwVm8tx.s:26 .text.Send_Uart:00000000 Send_Uart - /tmp/ccwVm8tx.s:40 .text.Mount_SD:00000000 $t - /tmp/ccwVm8tx.s:46 .text.Mount_SD:00000000 Mount_SD - /tmp/ccwVm8tx.s:86 .text.Mount_SD:0000001c $d - /tmp/ccwVm8tx.s:2175 .bss.fs:00000000 fs - /tmp/ccwVm8tx.s:92 .text.Unmount_SD:00000000 $t - /tmp/ccwVm8tx.s:98 .text.Unmount_SD:00000000 Unmount_SD - /tmp/ccwVm8tx.s:138 .text.Unmount_SD:0000001c $d - /tmp/ccwVm8tx.s:143 .rodata.Scan_SD.str1.4:00000000 $d - /tmp/ccwVm8tx.s:156 .text.Scan_SD:00000000 $t - /tmp/ccwVm8tx.s:162 .text.Scan_SD:00000000 Scan_SD - /tmp/ccwVm8tx.s:344 .text.Scan_SD:000000b8 $d - /tmp/ccwVm8tx.s:2161 .bss.fno:00000000 fno - /tmp/ccwVm8tx.s:355 .rodata.Format_SD.str1.4:00000000 $d - /tmp/ccwVm8tx.s:359 .text.Format_SD:00000000 $t - /tmp/ccwVm8tx.s:365 .text.Format_SD:00000000 Format_SD - /tmp/ccwVm8tx.s:485 .text.Format_SD:00000078 $d - /tmp/ccwVm8tx.s:494 .text.Write_File:00000000 $t - /tmp/ccwVm8tx.s:500 .text.Write_File:00000000 Write_File - /tmp/ccwVm8tx.s:604 .text.Write_File:00000050 $d - /tmp/ccwVm8tx.s:2168 .bss.fil:00000000 fil - /tmp/ccwVm8tx.s:2147 .bss.bw:00000000 bw - /tmp/ccwVm8tx.s:612 .text.Write_File_byte:00000000 $t - /tmp/ccwVm8tx.s:618 .text.Write_File_byte:00000000 Write_File_byte - /tmp/ccwVm8tx.s:721 .text.Write_File_byte:0000004c $d - /tmp/ccwVm8tx.s:729 .rodata.Read_File.str1.4:00000000 $d - /tmp/ccwVm8tx.s:745 .text.Read_File:00000000 $t - /tmp/ccwVm8tx.s:751 .text.Read_File:00000000 Read_File - /tmp/ccwVm8tx.s:976 .text.Read_File:000000e4 $d - /tmp/ccwVm8tx.s:2154 .bss.br:00000000 br - /tmp/ccwVm8tx.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d - /tmp/ccwVm8tx.s:995 .text.Seek_Read_File:00000000 $t - /tmp/ccwVm8tx.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File - /tmp/ccwVm8tx.s:1271 .text.Seek_Read_File:0000011c $d - /tmp/ccwVm8tx.s:1287 .text.Create_File:00000000 $t - /tmp/ccwVm8tx.s:1293 .text.Create_File:00000000 Create_File - /tmp/ccwVm8tx.s:1372 .text.Create_File:00000038 $d - /tmp/ccwVm8tx.s:1379 .text.Update_File:00000000 $t - /tmp/ccwVm8tx.s:1385 .text.Update_File:00000000 Update_File - /tmp/ccwVm8tx.s:1489 .text.Update_File:00000050 $d - /tmp/ccwVm8tx.s:1497 .rodata.Remove_File.str1.4:00000000 $d - /tmp/ccwVm8tx.s:1507 .text.Remove_File:00000000 $t - /tmp/ccwVm8tx.s:1513 .text.Remove_File:00000000 Remove_File - /tmp/ccwVm8tx.s:1632 .text.Remove_File:00000070 $d - /tmp/ccwVm8tx.s:1642 .rodata.Create_Dir.str1.4:00000000 $d - /tmp/ccwVm8tx.s:1649 .text.Create_Dir:00000000 $t - /tmp/ccwVm8tx.s:1655 .text.Create_Dir:00000000 Create_Dir - /tmp/ccwVm8tx.s:1734 .text.Create_Dir:00000048 $d - /tmp/ccwVm8tx.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d - /tmp/ccwVm8tx.s:1752 .text.Check_SD_Space:00000000 $t - /tmp/ccwVm8tx.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space - /tmp/ccwVm8tx.s:1870 .text.Check_SD_Space:00000094 $d - /tmp/ccwVm8tx.s:2140 .bss.pfs:00000000 pfs - /tmp/ccwVm8tx.s:2133 .bss.fre_clust:00000000 fre_clust - ARM GAS /tmp/ccwVm8tx.s page 59 + /tmp/ccnfjbri.s:20 .text.Send_Uart:00000000 $t + /tmp/ccnfjbri.s:26 .text.Send_Uart:00000000 Send_Uart + /tmp/ccnfjbri.s:40 .text.Mount_SD:00000000 $t + /tmp/ccnfjbri.s:46 .text.Mount_SD:00000000 Mount_SD + /tmp/ccnfjbri.s:86 .text.Mount_SD:0000001c $d + /tmp/ccnfjbri.s:2175 .bss.fs:00000000 fs + /tmp/ccnfjbri.s:92 .text.Unmount_SD:00000000 $t + /tmp/ccnfjbri.s:98 .text.Unmount_SD:00000000 Unmount_SD + /tmp/ccnfjbri.s:138 .text.Unmount_SD:0000001c $d + /tmp/ccnfjbri.s:143 .rodata.Scan_SD.str1.4:00000000 $d + /tmp/ccnfjbri.s:156 .text.Scan_SD:00000000 $t + /tmp/ccnfjbri.s:162 .text.Scan_SD:00000000 Scan_SD + /tmp/ccnfjbri.s:344 .text.Scan_SD:000000b8 $d + /tmp/ccnfjbri.s:2161 .bss.fno:00000000 fno + /tmp/ccnfjbri.s:355 .rodata.Format_SD.str1.4:00000000 $d + /tmp/ccnfjbri.s:359 .text.Format_SD:00000000 $t + /tmp/ccnfjbri.s:365 .text.Format_SD:00000000 Format_SD + /tmp/ccnfjbri.s:485 .text.Format_SD:00000078 $d + /tmp/ccnfjbri.s:494 .text.Write_File:00000000 $t + /tmp/ccnfjbri.s:500 .text.Write_File:00000000 Write_File + /tmp/ccnfjbri.s:604 .text.Write_File:00000050 $d + /tmp/ccnfjbri.s:2168 .bss.fil:00000000 fil + /tmp/ccnfjbri.s:2147 .bss.bw:00000000 bw + /tmp/ccnfjbri.s:612 .text.Write_File_byte:00000000 $t + /tmp/ccnfjbri.s:618 .text.Write_File_byte:00000000 Write_File_byte + /tmp/ccnfjbri.s:721 .text.Write_File_byte:0000004c $d + /tmp/ccnfjbri.s:729 .rodata.Read_File.str1.4:00000000 $d + /tmp/ccnfjbri.s:745 .text.Read_File:00000000 $t + /tmp/ccnfjbri.s:751 .text.Read_File:00000000 Read_File + /tmp/ccnfjbri.s:976 .text.Read_File:000000e4 $d + /tmp/ccnfjbri.s:2154 .bss.br:00000000 br + /tmp/ccnfjbri.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d + /tmp/ccnfjbri.s:995 .text.Seek_Read_File:00000000 $t + /tmp/ccnfjbri.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File + /tmp/ccnfjbri.s:1271 .text.Seek_Read_File:0000011c $d + /tmp/ccnfjbri.s:1287 .text.Create_File:00000000 $t + /tmp/ccnfjbri.s:1293 .text.Create_File:00000000 Create_File + /tmp/ccnfjbri.s:1372 .text.Create_File:00000038 $d + /tmp/ccnfjbri.s:1379 .text.Update_File:00000000 $t + /tmp/ccnfjbri.s:1385 .text.Update_File:00000000 Update_File + /tmp/ccnfjbri.s:1489 .text.Update_File:00000050 $d + /tmp/ccnfjbri.s:1497 .rodata.Remove_File.str1.4:00000000 $d + /tmp/ccnfjbri.s:1507 .text.Remove_File:00000000 $t + /tmp/ccnfjbri.s:1513 .text.Remove_File:00000000 Remove_File + /tmp/ccnfjbri.s:1632 .text.Remove_File:00000070 $d + /tmp/ccnfjbri.s:1642 .rodata.Create_Dir.str1.4:00000000 $d + /tmp/ccnfjbri.s:1649 .text.Create_Dir:00000000 $t + /tmp/ccnfjbri.s:1655 .text.Create_Dir:00000000 Create_Dir + /tmp/ccnfjbri.s:1734 .text.Create_Dir:00000048 $d + /tmp/ccnfjbri.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d + /tmp/ccnfjbri.s:1752 .text.Check_SD_Space:00000000 $t + /tmp/ccnfjbri.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space + /tmp/ccnfjbri.s:1870 .text.Check_SD_Space:00000094 $d + /tmp/ccnfjbri.s:2140 .bss.pfs:00000000 pfs + /tmp/ccnfjbri.s:2133 .bss.fre_clust:00000000 fre_clust + ARM GAS /tmp/ccnfjbri.s page 59 - /tmp/ccwVm8tx.s:2126 .bss.total:00000000 total - /tmp/ccwVm8tx.s:2119 .bss.free_space:00000000 free_space - /tmp/ccwVm8tx.s:1881 .text.Update_File_float:00000000 $t - /tmp/ccwVm8tx.s:1887 .text.Update_File_float:00000000 Update_File_float - /tmp/ccwVm8tx.s:1990 .text.Update_File_float:0000004c $d - /tmp/ccwVm8tx.s:1998 .text.Update_File_byte:00000000 $t - /tmp/ccwVm8tx.s:2004 .text.Update_File_byte:00000000 Update_File_byte - /tmp/ccwVm8tx.s:2107 .text.Update_File_byte:0000004c $d - /tmp/ccwVm8tx.s:2116 .bss.free_space:00000000 $d - /tmp/ccwVm8tx.s:2123 .bss.total:00000000 $d - /tmp/ccwVm8tx.s:2130 .bss.fre_clust:00000000 $d - /tmp/ccwVm8tx.s:2137 .bss.pfs:00000000 $d - /tmp/ccwVm8tx.s:2144 .bss.bw:00000000 $d - /tmp/ccwVm8tx.s:2151 .bss.br:00000000 $d - /tmp/ccwVm8tx.s:2158 .bss.fno:00000000 $d - /tmp/ccwVm8tx.s:2165 .bss.fil:00000000 $d - /tmp/ccwVm8tx.s:2172 .bss.fs:00000000 $d + /tmp/ccnfjbri.s:2126 .bss.total:00000000 total + /tmp/ccnfjbri.s:2119 .bss.free_space:00000000 free_space + /tmp/ccnfjbri.s:1881 .text.Update_File_float:00000000 $t + /tmp/ccnfjbri.s:1887 .text.Update_File_float:00000000 Update_File_float + /tmp/ccnfjbri.s:1990 .text.Update_File_float:0000004c $d + /tmp/ccnfjbri.s:1998 .text.Update_File_byte:00000000 $t + /tmp/ccnfjbri.s:2004 .text.Update_File_byte:00000000 Update_File_byte + /tmp/ccnfjbri.s:2107 .text.Update_File_byte:0000004c $d + /tmp/ccnfjbri.s:2116 .bss.free_space:00000000 $d + /tmp/ccnfjbri.s:2123 .bss.total:00000000 $d + /tmp/ccnfjbri.s:2130 .bss.fre_clust:00000000 $d + /tmp/ccnfjbri.s:2137 .bss.pfs:00000000 $d + /tmp/ccnfjbri.s:2144 .bss.bw:00000000 $d + /tmp/ccnfjbri.s:2151 .bss.br:00000000 $d + /tmp/ccnfjbri.s:2158 .bss.fno:00000000 $d + /tmp/ccnfjbri.s:2165 .bss.fil:00000000 $d + /tmp/ccnfjbri.s:2172 .bss.fs:00000000 $d UNDEFINED SYMBOLS f_mount diff --git a/build/For_stm32.bin b/build/For_stm32.bin index 674ab3aa1c9ce622cfd8d07e1bd2e0ccc906dc91..5a4c5d72eaf3e569cad3fa2c8393d7dcd0c3d0c7 100755 GIT binary patch delta 10388 zcmbt)33yahmj8XPDoJG{2?_}I|L@+afY9^r@0)MnJ9W=J z+dcQ(bJv%*f?{x^#zBZq-~BPs?W`lZ*8pz-b^-nsKyLZ>HfVby^xvU;50KdXe*(vK z1D*fG*irC=Y2k*(M9P2G@XlHPf2YRZr0=*PxaB4W(LICup<8JGtkGL}kIlYe`&M3G zogn_CukwE_*=YT5Y%qBm6dJ|kZn|8|LDBJ~_<%O$#h!! zxOn_{W)X3_^6*YW{wtn571XLzj4?*qosk?%%*uAiIO$v<@WfJ{Nw4??3VbN zbW8shTBScu^4_f)aBQqMtyFWB%zClC{i?G*<5;34xkX>&Y~Mk)w3Dj`&Cd3a=YlGX zeyd%Uqpevj18N341wH8{dV4p~2W6u7%glA=HglhJZrTeE9ao$))8XO=K4LT*(ty3= zBPM~0y~4{vnLve?JFc#Gc)t?BO$7I4UzH)DHsr|*5krnXYSDll_9P1}l8M4vKb~WVrGE{x3R49O(l`49;W*o4Is`-+T zQUYw8S|k;sEK}Rsi%^bGi6Iwd3Ce{i3s5dXX;K?M?q~s=yzxkTFmR1QTFm6+lJGD~C^K>ZW*{lc#J@D3$mWMs4Xsv^sS}QSTIR(AO znrTn&CI|Y`l8v*jQ)|s`O6>}HmMgmMkY`26$Hzap(|m>05Q7fZ42qC`Jz@8HZzSwH zG$m`WHp=~y7a5yLEm?~Tquh6S^%7cPL&}D-oS29G6uBdSOCc1B4_Qks+l z>HWcbI|j8)8Y-Tcl!u|pi*jqC-Xf>l^Q+4QjoYn3?9&ESS6}LHV54GEiX=8Bxr%|0 zM7Gjx^kycr!AMuagVA3JdF;H&VIePK@x1D#J=qyqgF_o70dfOF&60?6K*%ZCP^N^a zILPMcRndlNdlhk!JT}J1)x8{NrjM!fCNnx4>n~N(M)H^sU#Ppe#AdfZG<(sz=Sbcc zG9l&YovsZli9HL0QqeXL6I>|KoXF%;JjNCByvp5sTh$^;<=s579Uf;eoID$XiPnKF z!uT5rv@RH)cB_LS&ryX1^C_r?JaT{x`_?6xO6({3X!m6VMyh_(-c3BjgCzp_wQ9KU z52)e3uT;Z*U#<>n6NZY%#XNc?%kC&b3`#XT2Kg)ohHwn>Sq!q(Zm+g9%wus#WpT)7 z+1`(1EYoAv*I7jJ*<8`ES(6%;f8u(CkpAlg`hiUHJ9(tE5;3sBNDJgl6UMUioLMMo z-EZ<)?yO|^D{9nLvMijgtlp~fHG<1Mi!~&LUdR|g#oS_Xl}d-_KJFOG1)L3f2oF({ zyC>9zS1VS}2`h76rs|f}%y+xj*Q7PCp8I7(1f8E+>F)=JZ3L zhp~^9Ryi7UC#QFU9>(@6Ei%cJFkLZi%dwn<{c5h&x_3c{t!ED4I~8KWOe^cS>URXN z)-&ImKz~8uaa!{b@PARLTR)`V!(1&K$~6kjGgw5cLhXk1gh|)EnV`@Y4Yhd#lnU$L z8{ca`B9Db@u-U*m85eGs<64EP28;3AU@jMYK^}CyZ(j$wt6c0qgLI|QBJK{-4~_ba ziGk}|vQ5{WtR?zyMWRom=Zu|>k-<}5*9%5zpP?2_6$e?Q7?uzE$8Q)Vt6>IeIl+6U zbBETHqLvXfO7&OF4Gd3#MuLH13BXtw7#BG@iT?aD;O#kh3Jz7r9wLWL&41Kl}u=z zNHtrJdXt?|tGNO7AEv72j8BOW`b0Q0U(ZGleVkYT*cR zzDkD_%@Kbaq#KF~#kL^*ZINA^7o?fR#p2>1ttnn9B+w6v3&hMIJzl(6{9}MlEEysk zqkkIVYT)JVJV*m8n-2KKxM3& z2wn^P_6W|5l>;~PCd$H8Op|ffT4izFunf;vcl^8mGg(ITnVHvwq`kYr*e$%2_I70stn zF9co)V|f5}B;{uqBAN?v4}2bc9q8Lp4(+Dz3^!U{QPX;fQD;c0)ws8*$-RP6Yv>33 zc{Qn*4G9ggqjt^Y!6m5KZ)l z=`$np2en3S8ue(-q@I(*OS~1eK`Q;v5x18Gv5K1w6(D%{dhVP#9{9yDzGfWovkJ}} zkQoL12dvL!v}Z&romE;a9#-h%rDk!LLJyWUiuWqCc;wFxPjFWgDIx9`oovTh1Eur9 z?>Xf;P*`rS0PS?p^azuB8nk3XBPb_>OE_gqSgK(uXg$GQoc1JWI)e?ABf%x>v)jH0 z)$DF|5~Ed6C4|+o{0z%67D=pD>HB5P&UvF@ zC!f;;XIOHSpsB^d6^OXgPzZcsa8)?^YmBJPogG|_YO;Y<>Vs>;tcG0FYJ(4=rZWr% zUKMPTr(6rI(csJ@sC^h4Gd8``ATbhKQHs7;qE93rZn#l4Txg9A1zuKS z(*U0_+xy?}xz7-r)XZ3Nr(lSODM!SOScn!yOvTjcF(TzY_M7TsMuvNl=htnNchlix zmJ7Xf>zL}LqWfDfDID1oYa&#@O*Y0P(iKuRrq6!A`6C^uBB(2*bWqy-x{pLqG@Q~O zl-+(;R~#r>PGOVtHUIXmcu=A^B^H!zemZfi9!vhBv6UsF`%!OWR}utnG!_M+d47FY z6u$>=EbNNg*`E#pY_#tMb!%K&y_wKTIh=aq8_F@$KQ7E5MSv>%!4=@ zw}(A1*!<)p_PAj2x#39+jioVrl2JbsIEWSqO-CyPt!SyvxI&5rXQ!{RD+X;mtRzMJ z{1CUe-vinKdjan&S7_ygk})4C`L+30jjhJE*`_mnX45v*G;D5&a`zw&M)fc+`qTb< z2Ek^WpA?q#3-qA*4h}j+V zEK_J!#lkqzeb&3TOXHs9rOpbyI4wZmtT1N%dauSE;|qCS3#p#x0*dE%0o4<$5cif4 z{kFm=ZVFIwVxjO1Ety#0*o?;a`|5f(;T}jz>U%a?X8lMeRpWG0^&=TcimvrM7N)rM znm)=S7V)A^Gn>h|1&wZ0n0~qESGfLf^5&cL#s#+3e3vcgwX-Jy`)ccg#;gX_6BBp< z?TA=}4?dy6?`6jmLP>1T$~qDIP{>mlBqo!6iG3M1-{lY#AaeQ%L~P9xWbk7lq40OE z#h@pZoIEbPIm>Hu7u-&Cp94lrBDxiT9e_Q6&jG{CMAuzIbehRT*IY?-i>mO_3RqH& z7h1r5;5q8+5_!{i2Bupxoy>{51NJV-lG;@5)@oAil2wHNlXx#C@jksO*H}^;tKDWz zs!hE5?5IB6Y&Badr!otjKC?Be5nzikjYU^R0D9#Skr+JbS3PG`#WP18Wl5!<-DZke zE)U1s&Rlx#HiIyWCf%OlkmQhOVIT!wXsT1~{dl|a)~u#vYnHuSj^p(h)DuuImGPEk zW=X=%ApD5&9qEn1@qxV^Mx)dM*qMbbzkSCFw%)QQ6P!`_@uUeQJL|AB&OQe!e*v`j z4V%Bsn%&rD>EB4J9M^pBzi&yk33}CY*85(4c{9V#c*~nbl>g=3Grg2!fA^L)Yd|^S zWxs#%mOHg5k9pbepS-2cQ{Hzs3dZr0SyDWvfFQjxtd61C@4Qut@rbPW3vw*$%dCs`0{>c12*C6I?pb& z9`zDug;dO?+vtCobA=Xq7QbK9_{zbFnvg8#)@gV`FQH>9bA=D++)C4AmI!@^*ffl* zE;7FRP_jWUWdjeKCCzb^EMc~zWXZ!4rU`f>?XEO9ma1*?hDZxK-}f!ss}fv~T%Rlt z^Td1@i3zaJ`N7s=XcF9laPV?GL0^66<43u ztz}n>Se)$A6pwZZj^c?u*pJ(CoOm$6SMG8q-PL08H{IYb;j3HK)k|mJV8c<>EQP@`UBZr^u`SX#x3VzOlEE1jw>?5&jVa z_<{)lL&sE? z80Nf4_+yMgJ>{+2s57wFj%@Xb`ie%ATc@e8ZKBQ91B&ie!kh)l*_CM(_buMAIA5}( z1KRcUoVfnV`7hRAJfG|z_vZ)cf$9O{4a%|zPqY5v^S@sI8RSU8eb!vt3Tv+Yl=nz8 zKS!@I<02&mCa^0r$IUdcW?;s(pfKjW_N(%pmankG2%4{KisxC?N^h&lDETh7SwP&cLqoDBqYX{)@C)=Us;deVU`6pr*VOE zsI}@+^4f0}m!NHfujwOp0UM0X`V)sAjCDeV(!&N|AV{75T$p)jZ3Y_#-|?<~{}9B9 ze@^AedC?VPrRP`x3&H_3^+Wd(klLqZ75`a&^{r!UZDM;BzhmPv!19dL3T6k}75PIP z5{@Sz${-Z^2Lr8O-VMRSpj}}KnWA|W+U!qf?eEK+`Tl#s3wZBk(|xhx`A}I_ z_w_kp{b7vl%}E>^8Ke0Ym!omfKMWEUE8A?Cde-azVIFV+L*WeGfgO`!j|SP!sdyd^ z&c?3Fu(iSR=CUm_u<5<-WZT=Df$416fb9(QZE)Lxg*P|~EWE)z3v5Yvhugvg`3|=k z7@ILplx&u4KpEcP9tJiZYs7fC^u04X!PH#VvZT49Wmoh2KaAmv8@6#}G|or1O~e%6 zJJd4Do2s8rN@>!Ri~;wnC46zhx2FAu2q&L$9Cxbv2xs7aV!AA6MAo5~vzC@PuBE+$ zlc6=snKd;YOQooZx2IVJ!$3RMB74XawVxc|Lx~|}BSkP`Y}orolD)_DrNF*O3iNGd z`%ynG5{I6>v#>pED1bfKXi@Tm5I*}6nkvOff~3J6@2HR9dKvymXpTZ-xA4F7-^|x_ zGOaXKTb_A9(CfOHj;>RX1W>o(>sHtXU0ypnd!Z5~k-}>@_LBytv=RHu1y{awPBzod z+K}OLkbNxEbu&0jNcA?Ps%MJmr6FC`Z3k5CnHFa_{;xa+*1D~@0a*Cp-8+S{CcXc5n%iE zR0P}pQ+v!AC%naM+Omz!M#QmOgzD^ilTsPXALdaRs znCDH=3uU=zW#kY(&&y>dnBuxiCsY_}OTDSd0>t!KE3&O|XqcGNAe;`DO!S^<8IIJO zWcpd-xl9aXVj-iGnVq<)2I#wGcCU#=ma%Ef<~f_vY$~(2BX$&FQ=6Sp*mS?)h2y3c zHdqsQ3y-1&fW!XRGpvb+B2C;-TXU1zYHK1_djM(x`^Q|X@gKC7-lWxF?Z>rj&;r=s z;97S@v{)n^^J?`7;aqtEh6AaFVMu3rGou-)$DEn$Vq(*82{_LY9`B|zH(Z{4Q{z>9 zH6W%+G!C#Y;f+tc*<~a8KJF&9G1esRGfuBgfW4O9KRsj7$MUeLx)#i=H7!;BxnsrL zvAkOxGeRqmJ7)TYV_7$~kZINN7BV0Uu=k_iO*buyyTuZFfRE#rF8shkAo4(6!s5n; zm<=~egTCQsL(W$0QtQbTSZtDFT*I-^FigaU>}~X(`l~{3$J`lr31Wedw$FS@?Dlrt zKFcL&{T@$<_Mfv5UvGAWI@Zpy$Ac6TqG#^81IRaOhuPL7h|Ys_f5RxT=^#Ddkb|P5 z-{O98DGRYs&%|S$Jlc4yi%+w}F)cS)vf~(c|FK|vdZ!QsZ6Q`H^zsE@Y(q)3b6{*3SX(M1My3m5I z>;wKhpclX%brWdA*0R{^T6E{ueA{Us>tre{|0&2idD_SPv3E0n{=#{z)kB>37oQG1 zH}~j>FWi$DaNC2dCtvu!llyGf!ka?Cs!ynK+w@yv``ES&Jd|$TR)F8`Z5aa-3b3AZ zYU{LTol*BUo@>-v^9MVkU;eE&S_gC5f{ymrmg@u^9k}~ZVQR19Nc;4cS>nUGBA>N}=&Oo<+xsCYdFFLH*lkYo!1`a?v=%0V4%U3Y2vZ?)oe X3-CGMCqQBy&FOwgBo?~Ad*%NFCsJTK delta 9537 zcmbta4_s7LzCZWg0fs;704j(I^9N)AH55t|l>zh$42se}Gi?VoBeNWAE0?uq@L%Y* zt#&LeZ8PodW@XEtwT+agyY+T^ZEZtVYh_8fIhJWRROSvdcjkT1nbEZE?fbm<^z*yt zcYgoRIluFF2(Fc$3yLm6^v2t}i2loJqW1#60-OPy1&|;7`xdnCqV)49F9Hrg_x}N| z%gWlnFgC1)=&J$D(SyQo7)1X8>hbpP`Txq{kMVNm{?EDu z{ZD>O`Ts&=qxHYhWAZd8G>Wfw(Pd&Liq4JVJ-UP$2Z_EGF!vx0#pa8%{4_rh~pO+83z)w%7WyXy36N`zqj2cFb>5Iir zRk}XCSZqB+UrYZugB)1b7Eu@uh1n`G+e|}&RjG7$#!#1l>L64ns}-iCs<6)yCZH_32(TO&q7j3#jNc$wwW;kHGKxPn=UJm;TxJD$_ z!Rq(1>eYPv$i`H~HbmExTa(&Yso11c8c2(e(Kx zabGEQ>)O`IL*$|IXqh0gN5X4m0cC5rMHW%654&XtN_Uu^9+ge!XWcNTGF;hLDD9{q z9+G1Pt2Erk@jT$yhPzc=VT6~3`nWJ@Cpn9NSvhtaFiUthmoET5I!p($jP&Kv!!v}a zXDt-*><>jeUkuUDMmvh$2vzo_Sh(eE=JimBd(CEEUkS~hiDkWW={h4B5le{ zbD@cq>)K-FEV)~?x=rm#vXCbp6SJjWL-y}4x__cOHnDw3e#}Qh%u+9s;Rc^qFu!_{ z{6sif-XC5)OpLkUynUvU9P_L!DnmqFK#mVnBxlmJ3VE_@L@sR6uIr5CPkNP3sXafw37$+0!g~LIUJgF4O!C<82e+YJ~=?2#F zj$owaFGn2?gF`RkXCXZojI?)m5K}2*MLbyVYK+mYNo|GQkw_noDhl8p(Z2Pv7)uW5 zWMX1T`?o;m?8p?c$~vV@<9Ip4U(jMMlH0%M?a_FT%wxP=8okX}AvSAtkMSYb6wYxs z7{Mvl4Bb;|BYnf_VDJ=p3c>1HetSdMs~@3o=mf0@gF9xa2Jbdso zk%4HsAEYOPbg6mF;0;_V(sQmL-C?fDz9o30{nN(%9ag!dyB~@c{kIQX{?+p!wOxw3-28 zk!n(%0EfO?uOr3}MPf{%4cP}=Wq}i_XRBF$)l`KLN&>8F7*+)Op=Zsq-82`qv4K10 z@IadiQOgOK<+=;D28L%rBgw?D3}9>nVfavJuWx5kbq(`TPYTShA7DbHf#K&PI9E8!WgaT8Lce+k(k<~cVVjVX_;~z28zevQ*IjsX322We zZcEx0q5ajbFsUeoHRw-%eUu_ul4$%sMtjv?YrjHlE=a$FF{P3@NQ|2L4JdP$d~b}k zZJkNK%%%+T8&_Lui_15w{-r1GG@vVU#r_a<2T?uA+Ry_Xy@*USC! zk4M}x{u1yXVu3{M#GviB`00CNmWviYot`^h7xKNVQfF@cs2kY|d%Z}d$KO#6?wD<{ z+v2v1`&dj>8vQJ{P<$yw4c0;^%uwkJYyEX+g794_(s$G(w{AOEctYG~g~DgxkRRpr z1nJw>vEn3VDvc)RjSxJvAa9=?0k0JU+QG2?C#TsuQ%*^R`LlqW*V>R1lBkwcR5E6@#`zBzP4-POW54K{Gr zh8E2>%X*U)_!>wF9D4wm$gx$xSoSg56~K+$${nHDi)0y3-UjCFC$L(zRanaBiKNVr z9z__dK8jZXuZ`l&m<-&;U6e-x3+4>xNpGelL(Z+v1xE^4YK;yPmoYksMPHNZj>U}s z3cFSzj(F^tHxw`ykPY|<^Z$LodVm{n4DfeA8z3Dp7hnU76-lMh3B&;)24W)y!A6#f zw&SQ%42S}`7}W~7&yr( zzXF9N^_`&g1uQ>fQjdUUFg1emRbUCHY>G%VECuaEU@xa_1Wj*pfbwBrN%P3|lc3s^ z7B?{qrdvV%E8i(d!_8HaMfs1wUWizlnaDT&m*Dj}?9^)oEfoF}tdoqA>MAY_vd~SgD z7aM1lVfd2e6cDBa?)A><4>##>4mzV zawKD>dI9VhA>c+NDIHw5q&pE(3!}R6vkMxTKC`zc47{koApyVb`ta9?kWDgXh|OGP z%y2+3CBoD%qhZ8DbW+q*T&)qkFRScpQkjvdVI=cq8@*k0&vna$V>EtJrA|=33Ddcg zhS$95w;j}52o-T~zEd8KNpje)KPZACaY_m(ulPM(383gWg-y8q{vBP3pu})WJSflk zY1<^DprbvL$_oT#Q@F8f2m}NO#96Qvpoc_dncvtI!*6_H-->Y9w>*4^PAi!(So4ij zZ5D}2&x^`>jjkz~D|&+TZzbvC>p^T3;C=hl}a8Qzn!?ukPr=Y`R`Yb^BO%f8lTJVpjv~npD`wuAX-V3cKQ?p-choRf68p4DKbtaqv|p|2im4KmqrpomI*5w^5;{baOQ+QqtAz)d z!vvbJk6nxJ@soq>QaoQ(;5d%P)3|*G)GrJi>2jc7h9ek)e$i3A`A(S)jb6 z7W9k&Ca6^h9hO9lRuU!VL5~f2EOB2d=!;Z3eyTO${Q(E}V-8Zs)b!yu;Cx63miYsZ zw-uX-Den28FDpbJow_hVQ2gPxE>UrW>4m9A@zw!4e4069Lz|=wQ^USz!Xe+U0-Epk zV8|D*5ycy#_0!Dav>?5InpN0LpP82HYJuA~)!JUSeIypSx*k_e{b^EGiIY&pX)=N2 z_4hPKD2h?KM7h64{7x@j&*T(A(oc-g&-XOhiFuuxV=1 z!%=20tFcux3tj#)dqyL`5ofs;O&Aa8^^T9Wee*!b_jPC@Y*^SUNW=!MD@%)8;T?~Q z`mOZtGLtZ${;Dj^RqJK(BqJKBGSxYl`%koItTxyYlQ)6a<4{jR{W>o$!8Vp8?7+a! z1D})LFmU$56havUumc9cS>VzcfUTSCjRgk^ewJ{eWCs&=AZc@<@;5+7H1t6O?Rds% zuSsd76|Vm9%P-^JA{axy@6`QuB`pm5MlER(QJz-!%_-#ANwu&=0_B9tzQ@%Pw+`ho zm3==@3*9Hwm(~jA$+At>d>;e^dDm>KTf(j|Nj;&uc04AUCt$16d~bqfg(}{d)Y47c zYL~c+Htlu4swNrOJCI530>&=Yqg1rj_j%arX5oB_vX=*T4482(qa6k2;Mm`Q?dI5j zGP$)Z@Hc?5K#!o*4F+-uh;dyEus_fV<+&s7JtY=LawcU!l2_Ik+`BW^t;4EBo66IK zFx^z1b))^1rM02;xmHOLVqZURi%C^6u=R0 z`DIP&eCIDPr_Ok{@WsL6VJk^l%cDrnM|pCRzEdrafJX`fo{-P1ZnS^0St>~Us1-(9 z?H@bV+DAV4aLt~8WcftD5lQ@jJsz_>_RBT&*_o+#F9}IT&8P71+0dF=Bl1r3oer_@ zm!Y2_K?R%x?m}3n{DOQx_$*_pLL!b;OF{hvRHhU1O%JV%zFmk)3r=osekNWMSc*I2 zhu8-0>sd%ma)E38R>Cj$XS5UQnijo@-JZYH=GT>CjnGS_j+=1yU|4~JWUpDgVzCKx zLZ?`@h-9{QX8F+4yB4omoFkXnkDk>v)3ajpg>!#t{_dP%VA2QEcu#!i37+#dr=8m} z<;e~{H?-oYtmJBb;M~K_uS1dKPP1n@CfKu_CsY;9#I>u*h6B7IFoj*gIGzyreW3q* zY#_CAXUE8Pb~kv#8}gp+(0m=5aP9t%i{AX2qj=&Kq@xbaR};>tegCY`{06LF9l+Dt zNeoKTM`<-KPvfv^y`!RUNK=nPC|zn61Je1S7?))9Q=#8~iX3KX$kLIeB1=z}jz6|$ zU76zSF+~SC_OQZV*MVP|_WWK{g)PB_g)<4vLx6ACE}Jgeev8hD`$5DrHI^9f@$b9Z z?r37XrLn~Li}rLhF?JyZ-c$v7XEZVLHI^7VKt0|`(zy1M3;yWMP6uM5s%T@0)ycxhdq2`sX%+ki#Z^-^Gwb^SUf z$Jg}fbdOB3v=p^2X(?^p+w$ixOZoXA*%M|X~QzYg?!Bl`;Nb6jdBVY$E6GBL^*$cjabfmN5h91 z%hS$`r3J43KfXZBS@sNfR&^qd8lsfw%&-fl5zbLqG4b^L8cXC$$;#GUwhuc17eMDf zj_3s2ZkDUKcU*osME>%GM>*7mPa702E$kh@JplGXz-Cc4`0T0S@~MD5p3_u0K^9~Q z7ncY91b3#$uRbL)aP$NI)`6?}`U6bs4NX^)epoQ-yOWuc{(vA0Aj_J*yM&IgPac`1 z#mL0kj}tLzUU-nr#toCwYc;r;fJ)jD6#X*f+drLl+U8S zthLOJ_v5`34vCTz7V$NQ_1*lLfcwNNOQTSf>WJf;f#ivWpTi-2cMRWGe7I?`*{)}R z9{iAMwK+qc0UtLowj5wJI7BDR9y$5JfuveuZfJEh3d)hNXxY0eu{W;Pw29^VN<4!` zIGte$91%WNg$&(ne0I|fv-1*nA|_Zg5L+Sbnw{(7Kk5DcY5RiZ?{)0LDDSe5Y|Sbl zeaBl)oK97Yd;dY09pAH%yV>tuz{`DJV!0VAw?JiqUBZ^U z8^e}kgE9w{xuDFm$Aa>xw}xwP_Ezz7qgUqTT1d`-qzuWbnp78`W~t5@ zjOqNTx4b&O6|E&L6_DC=`u@>0&;?=XjZ1vgcO4P-nDfBmh3cyxd!+_+i%oxk&m8$E(9;M?n`%WqzYxBkb~ z&bMxMCW6$d(&X=%Iygv=&qUF=?DoM4$v0pLoJWXJu%|aV zXOY7<&6XPTF>=RkS zBXrRAx*;izT&V|_W7!V#rE{oNxe&rK3^&46@fQ~ z^Gbu`z{78`EsQ%BT#GzW9t-|(&Myek{_QhdBp3@uzB~equS10}8V(GB;-9=s?Ylrk zEd|_9Ld>NS_?C120ghQ71p2$2{*S;(EY??s{QPS~{|$RyL%9%5aHA;>;3a@o0DJ#S zqFp}K(-z3laF&RZMMBUXh+^wU73C2`Qajko09 zz~|mewiS5v0EQl<%}>tBxkToDi{SJJbav^CTdZ%aZhJ+L(PO)7?GG0Pdov!oqR7XlE9_5AJ*h z-_g6u7-d(faJ=)$U5AC(V*D6h(%pI6uYZFL5pIHGIurIT(+h+)z4&wC$Z{fbkjTk?Uh-vqq{y0QHoM^xvPclLRnWRgP?rZ~fm->X zmJMJHJ_3nWL0c7T#YYlMD=G!Ss`XPp-34t4XkDtZntY%)5Xfee?Ec&7ifbB@aU&8YhgkgLB?}XNWgX<%t30JB0T$X(PyLz9R_pfQX@?VtS z_$~NDcz@?xuzy$Qx6|&K|F3Bn$V>7ai2t8H|G(lIXj`dL<5}+#gOW#T&Y9_-315ws z0;Ov!b)Gy+TZYiFU6^IMa2`{uZnk5!dv~JyNJ8T=H)|?iJIw-u!{ImW8Ng#gA2GCQ zJbBHUS!(*8uMN(>M5qog>Y{Yx>!#KxcaC~V+^pNYTw&#!&HBxTS@WZs676O-M%*DZ z<~1?J)FW=o_vi22^R>w-?)1-OdktbDk^Xuq%2KJ(FHyNvUQXP^#^^Q~t}^(9MsbJs zQ7W%Q2g;W^C0-sRSP94YZ^Gs7K8eLoVZkC^rEpmQW zV0l2!3}&MAir6}t?XoSNf_Prv_Kl9NO?7T1AZ@SLh9}5>jxgoTzIF0-&8Z!FX-9`% z|6A|7QPb1!Mzc3Lyc6WNBeum(l>DFA_KilnTX9MsM47c(NtAA{e=`F5s~de6`PT2; zBD0d82CEg8_JA+dS1%jo8|4|{*L#emW^gku`0+OyVT48KC>M#|6`;4MVl(L7Bsa*Z z@xWTIsf2!@Jc7Oo$iN%PAzyxA z<4E08I~(MBxlxurNn6ZHn9>M+s}L9vDp(drSCRanan6v^CSGnaGNy zEq5Q)Z{8XeOqUcb3|==|vRi>=cWiRAW*f_M+SfVF?zB!JP1Bf%8m_KGem)GR$f+^dkR-`l%x2)uW&>K->=|bI_k5e8W z$z?};b_E^s0=XRWPjufM7fSyZWr%YJ%B_t&(^)E}6gTWWBsU+{Z)0I$l5Mrrv0f58 z+>)AhrtOj`(HET`G&_#m2HDn^VB^q^82E9)X`?~{LEhUXAoK*0ECDH1dI zTQfWvSH0xg-l5g$gTFJeG1o>lQ-w*7&wSq1b2v>o9ZR_?#q*QAmt58D&+Bx-^V9u% za^S}v2>FPw*O#`=3|=#e75^~!VT&XSVPV>phoq=b@|3qtt0iKVDJYo|SKr_kY8#-T#evt!d)Q8PSljQxLNiV}{frW@(Vq9DKP` zBRLdF(v+DiTv5%!Mptjhs7RV|&3|giuRvXS+W{%vvq(0}Y+P5UCnCw&^1g^geohWU z4uU7gM>>>rpug2Lr_85?w%FBdlc^8?yw9C)48EH`1{j}qX@fQkL09z&r9#ju`}aVa zljxZXsIRZo`$c3m@QnW^>i#IdK#{bD%Z%eE?==>%@j5x@=nmJ2!=Fb#4KQU+-{Gjn z`fPJH#$27xF5lIhFFSk-^P(T8m5e^z-&qG$Up`Fry$+vif=n%pK=fj4{a)!q-H8dKfXbv}>xcmy^2 zNAH>@ul2DBy&;G1N?_D#LtJ0+16HwU)aQLTP%?;UgMLDjeSVzV*%9T~g2@ zFZ4YLX)?!7^rkXSLr3qc5!6!pJNotS;{3CsxxvY;S4TC|jH6k}8+*UZ(Sq8Kd&gFp zeI>wTY_s{iIqO~Hf_2_PIU6&`WG7SJduzKZ<1p31pnWoZb8|MhE((r2ROh`0xzs$b zzeVt;UD-kFVHL+eLpi>MK10R3-!SPKZ+pbyORF%0TNP^ceiX6#go?SSEz^56bm$wV z5h~E9vOkIVXBr(PgP8Aoi|xG|ZP(yRZ+if_)7n^vXk^8=2Ww?>RQO0lc*4~a^3TjD z&NwW|VrOC+E50d+9%&S&K3I{7UX9*1p=Ji-dBg7?KDaLR-w~sbSN2G0sWeF znlvw0rCw0~BO~z3b`J*3}QEnm1-Sj$W1Wg)IkwmFugCulp5Qx^Q<_l7~$3K%&C3$Pa zF1KSmkS-9E1e93GQIn$2Fa%9eVX83Y0oV8-y}Ndu4Jogew+l9ea=W6}tW~h-*XQom2K4ES;G7|4N5x%87%$LOuYYe5AO`?3^WMy5P6 zbj+s%8Ip;H2cLq&oZkjgym5*|su*{fY{7i5xkV&(BFjFWsbP5I~L^B?=;v+U+ z6KY{obM^|3`*o?G9LrgdUuvz7x|zMADLTWnF6uUkWtvX6I8go=bRaO#wJnwuoun!G z_#4rh7rftP<#o@qY^tzKVg*8Y#*B-O2oC#Tz1mJe+ZEa$A)1E;)fx{*oOvkO9$x*A zPgx-XY4t~ramrPW9{coFj6br$FOoOxO#Qj>DU!(Jve4;<9=a^}Z0B`STZ^@5@nLJp zt%pDV+N>OBw_M==%gjFrJr}dF_3S+k{~dnU^Vt8g5?H7;i*rU6dQG}KpZM`S9qSAS za=pxPOm@_K6lH;_vhVQ7zegZW7=oxD9XWO?0JIpdAJm9iS&5OrAvtESVH!W`C`4QQ#okz$|2 zmpL*=SL78xz8;i48Zh|;*v7TKeWw}&*Hl(3sp-SRR$qzFqy#dsPRbKQPF>~RjV;TI zXIGYB2BaL-iXojjYJG&06+i2}`l!R_P+&E9S&=8iith>?lmF0Z$oNt4Wzg)XSsy9! zS$vwZ5-(As()BuEwZ7buMczYEwu#xuPF&W{3hRR4lX<<*Vcu~oR^VK1pHR6WI>TD* zGlQmiph*gu6=y~cs4Dgz(O2wM^X2X)DyT%YVoHBCa-9REN=H{Ze8+(6Xygw0nB3fZ z=CrogY)O@0beW>5rj)2KGFLu*kf?nD^Yv%?-+WT*b1dHKdgjwo2U4e{bSAFc7Re2a zinR1FlR@@H#>0Al)(hU5cvR&&wLn`r%k`@KKM`p)xGNZ#=-9uq= ztNtox*T@FB*qf?68FS~e;N(3en4f!t4)5eWZwt&yvwRL_`M39`UAHgCKXd->s@<%} zu$L9)leK#(jXtI<+5JkV!Fby@n*U*nF8Wzi6aMTQ(V@ZWllr^isdQN*XJE}%6>5?n zoY4|ncgox5YTn;zm44~8Vs&ARiG8EpP0s4}{5hjz51##fZ@klCOz+LS)7`Fj3%xq! zaaU?veupFporx;~%JBNfUCvWk_2QLv6?vBDT6XoumGoXySw*{4!FqLPpXa$X8rGR8 z3n;AqdF1X7EUFMEW9D`~m&a@)n?H6k#~;68ZtAHIxU_AqS`AeHBE`ng58eVyDs=c&5WBf$o{0J1*FE^>&}t_l_ua z7~Sp6oz5vYaLRR^iOJ%@$AK*vkY$zXZbhG@I=z?0pPxZFRjS2<&(C0|eiz7*pX*51 zINNp3-$dT&wCW#l+GF~@+3k{17Zc*vn7-@cnErG{d%A|jged5M46|qL>Q&+-N7g&4 zY*xEObo4wiLyQTh(l{;Yorx&{<=(&(Gn}W^1zznG)9Wg>cci2|*Rs1;In8>_PgJz0 zR7hNsDos*nqSSZrdDks%;?zYI?)G#@@#$Xi`0K7!aa*gHfx^mW=e)eIPCMI@K z&4Pe7oIL*E!>*DxadJ(?#=LDU$WJoPbhis`U2l5l6RvX-&OZ2rE2~ZXVO_;Si`>r2 zFOOU)pE#Z)ixFkUD+mA3AxgJ&7w90P-uQN>CZiC2USpI->Pj-&4va$I|6zK}sMy+>@PsoxCdKXT>0)`i z$Zm{kdYR)SygxdRzRKcd_66Rp-Xq@XE>@FUv!Ev1zO@Ecq!w%Mae|YzuHQM#V_E9z z3W%1vyroiCKoS~-Z7H6^K4#C9_nj84iS9QOOxV|=^{kJ|lGDD`EA8a9OctH&1Pilc zEWB=~*dQu`Xz_~;`%gQ?1^gKhxANyc@d$siEXxX>p0$8K16f=7b6?gG{$zH`N}g_C zz@Gv8R{q>)Kf<4EqGc6NpSWPvy490C7XP{i{mD(m(UZ5XIdDQ)vwz5&xJKM~E=^kF z!kel1jgvF)`t^yzh4-D*F6}${-d!J|)KgfCSnjB&+!hs+Zp}MG-t=pP`_H8r)|B7h zwyu5<^6L{hYi>PxAL>tC^Ufetg`}(z9vCR8LX2z5zXeHKWAJS66(=4v=sgxMdELmn z!1%xGogY9CG8S-u^yfeS*(5P*h9?i&-c|Ssc zf`8__pl3hAK7`WO(;74ld3hnoP&)hjY2~MG|LJoxat?1gA+FJ#+%zS6^7xXmCof)8 zID3q*@T&2?MR|Z$MNi(sp}#&+u;l%dx+Qm>e11*vgs|k-C+uswPQJgU^Q0-3^69Tn zj2?W`eDe8;{53-O^Aovi-a%bx$0=_hC*l75#E2zV;MspNvL=dfCt8By7oFUcy7SDM zwYsBMoej@_+@<*p&$&X_b;@fMi^X7|rSxsGTrEBXZ+FBB+2$a?v*BVaCL_FuCYU+7 z)rc{Wt|i@^=yoOqdv#Z!d|ahg`Adw)uP#RXPqCtbb_vl+RFyZQyjRUXhHriP$nES%UzK?&r|ixVc}`Qx6-mbM}5p;zF@gwo+nYxc)@Zylv8OFQTJW3 z$z+#nL?<&Mp#A-=+zuaO2wxt}HfcR&(QKCJzCR&MdamVVSJxpw@`v{_L$oymo?4+$ z*QS-J&q!_H=UNsP3x0Qop$CSdc{*)dOJ_8x1@yy+nI+r|UPaytYz#6=M@V4=ynX<3DI?a(#GED1NU^n6jmXl^hG6!*w_! z*n<(R=STz;uKHVqaT+a&D9It5ND%+Io}AU!?HVR~Mr~_JD=9cU!jspKRxzR~tD(_l zJ>7R$(kYeBuz6crTFwNjFFH7^%G6-32(&x_>R6Jxf5u5_k%-P?X&7EHG9Xx? z53P`(wJ*Y~u?US98Y?trNY|?EG6L=LS`V{3ZP|#u*uxy~p@)TSLK*2^>K)NT0#b(| zbz6_iW~@wfk4dO}{0=kyNXWb;PPkZ&4tX~ABsH?y&IZwW1KN+bcd|}alYxA9^axxQ zO-US^;uor!`Yo%GkpISWc+qzZtttg~Bx@FsV|I^W57h%t1p0~QTtB%6{bWpTb4HQa zmSKZm(>6@hcKL6fp=4?=mIWn4(DVwOxy{XI0@E)$m@d0)dEl`np6LE_!hNb#7z+-| z@gqy*Sas+uqdb>|zzF_OSKy*5}$| zXH@M8q&;4Y7XMrA0dMiY&>s0*3tU)x4F5OUgE@v(HP&BPd+0r%`krf1sU!WdFlv>- z?GXJz>v~%% z{O0N7#J1^U(4WR=;RAh+ec4jrE)yh0kj$MK z>MSeNqh9?5D z7thSZQ_<4Wyn)(BjB*d9@2yUjA%xJ|?m9>5n}A&&62|0qb**Laap!cUFQ=zTnVvz< zvCYCZGyGF5gg9yl$H9*Sc01CDi^K7qJWhNZj9)i{;MDv79B0jJ4DtJZ`~{w4gCelx z{>_;8VGB-%Bn{1&&HWZn-s-8%xzKm;Dz@ctji(PLx_`xG@!PltErJxn?0I-2h8 z8|KMvAbmbCqTr|IT4;G+qWhzMYPb7QGSMCBW#j)I6dWb~qrCqQj1lyi>h(L<^VS?G zlT=s6RjJ+{SEafnu1fWm_nlX_=Jx((o+&?EVG*b-ods&Z&)QXz7}Bxt-MV%GP6;S%I+O?l{(@I zWsUMI*RO$cia#0Go?$niOKXaA?R+(*Jq+!gc|q&I$n`?%1+4>Z(mG&QV{ckn7Drpt z*oIv|dYs0#R_@si&HLk-U4hm6PY=_{T>*Lj>4zp_jZoo48*fk0e!`dgwS*ci6IK@=&w`i%k7WI4jul0Q9d!?liT4NrsPpxD6pbVy* zSDR-@ZIu_O&3(bzoVKZ`Yk2=uUe^ba%ZJpIs!EJ=sX4E%2}9}{cY(UbUa&5b*eKNY z_rB4*w#|`z)TXxQ$9=q|cwPU~H?(zz52-8b0(A}h7j*?{G^p!^J}s|nA^fz=gnp5Y zFiCK-xdQAiO{GqmhE;uXE#@`sF=?3f?;^8iW6eUk^^u)yOiEK~Q(BX;X;{hhPoQ^9Z75i-tqQBt#UoTeKWvNwptugDH#AeO>YD5D z9`C)bnx|ep8E@UaYMfF!dnwmDD+u1f;jD(@U#W4P|8t(_=jD}XownW_oNY*L5(?5D zP1!*lydMKEb$~re5?5h+VhZI-LWrN&V}>L|au^#^aB@JSycqKg$u$>{XMjs_6aKU$ zrpE!9TXzl@arbb{h;o^Z)JC;Nf^9&)0F^|YY7GSauUPq6jxR|GalAa{KD*9*4kK}U zGnHO7P%lw(LoDS{l?qC~7U@4vVkaK8kc20e!A~|Y^8HXhr8On#G3u{acQA$kon~rn zK#!D~G)>wjU6Z~k(_>lYQrJApBFi!n&w(CEy^VT_Ac>9QHj_hYlpLByX@?GV4Ug$O zxjtQ0s?*|q(regBHaD-A>VR(|_D_DUsC>)LLOU$%7y7%qunrZQ&edA%S+LC2#pW$o zv|yQt=RmF0f2me@R2tbfNMSx|FOVLsRwTnmQBy!WR{zWVIpPkI=1f|JAYFQtrw}*4 zR8yuPB~WK*tnOL|DOPv+>(Dlj8k>-R)v(4KM|xvMlc`DX$ZSlVZP;OzwaTv&b@17k zq&hD>4R~geH0zUmkvuWxX%0Te)BWG#X#z>IE8yai#B+cr8l}XOnB<9Qu2w|wV+=@R zHNVtetbfdQmAIo2Jbl(r{YGr0G^7wukEtm^q_7L79OyTIvmuaOOhH#paXj*=ZJ6dS;X5ekfpX=AZvh6(rUyfJT_>%faAL@mzQk0CB)^b3$@&hl=2_7 z+yFoC#Q#Oh5kJ)Tp{LL1=hgW6eNp9yCHY~4{G1yB#EFWDd>pUtz<9xR#4)AmRzvG92pKAn+;a^}33rzzfY9t@Spm$N;G8(Z&Z!Y}A zcG<@L#PROu`^Zl`9Dd?_sagrlv%u@TX4NaOoJD8=sZrA;>;T-UQ=0qmbd$FdbCUN7 zUn)lVR__A5`$hPxIee>EcW%rl{mjmgkwy2$6W^vSpVNj}h|^}^wB?*f+jX3_Y|u7Q zLhHjT?mA^k(pKGNTt(ES&lWIFbxLg??VtrDhxb`us>kfy&c~}?s`GB=@a-yP)b>fb zn2|XzM3;rrg+9yaQv2+P^XM{iy0Spm6`+fOd*`WNmZ>tUgFYOVq$y{RChCcP$<6i1 zzoaLdeW(3YTA=$lEvoK2pO*J}sr`tS%SlF{#dGSlBrWD4v>famkk5Zai-}=uV4Kjf zy~^ypK=1<=7y_qvzc&1A6|>o+W|L61ttGvryX{w=@>7{vmcUc+!yKtU;2^2D;M~;`YrxPuPP2aI@=y#_9fn0?~C4Ny^V98l;8e3gJrz; zDR%VB0-NSMinm`NJbYCXe(yzi$aBQ!g8%#o{OI(wc%?Iey6?iW%ML}~u#%_!0G`zf ztHu6`!d4#f-cu!Z8l?GOv*~p5)G*QYHM^7*oer(`Pzje};w99$<~ybRRY)n7lzoyD zCn`4tmU<3E_gR-#9f-bbWn-3j^1VFFvC9TnKa%oL!Y&7RtRZnrHQ6))*fbK{CwAGy z;dduKk3PvQuK+ABN%?8w#;d4wA>y|qm%w9-5fgcA5n||tJnv5sw{k4kCv<1nE!=*p zp?a?d*2>KSx7sA7D(Mxcl!|1$5^;ELxot-EPDb3xYbaBpu(2d%yc&mnCn;kSHh3Q5 z-8*{)8>QtW<~GN>Z|>(O)F6jx#R>2=JudTl(96=x3&=xI9iu5VyxPloMGe*b)gNeJT*j=`q>6yZUH z281xe=Ll~gSP`y6s6?2Auo}UKfN$<$3&B=jBs#yudm-Y5z%>Se+eBm|G0|DLhZ!~@ z9ootIIG*G1&gVkRA2fI9<#c(I4DZO85n=3&!#6Bp{hy7v!Ip{mV{sGw>l#}+;+x_b zVUj^3_l{T0FdbwQz6`NTz77$zA;BhmgSQhw0cAzxUmcG`xTOIb!_>;gXbZ>jRk>uy zx+wqR;gzCtL!T9XzO31cuu{cYuzvcztv}Gx6&Z%q2vYwUF(OupSbHQTnXeabqH;a* zg(DiI9>V+4h*fTbe2qG0eHZ(Tw7wlCONBTcQ>Y6H)1+~ipl*#aY{t#M5Nx6~-rbbk zOQ{B>j`)d)x*GQ2Egx(7D$h3Td5IaCPz%<xkTV3WXO2j+W_=+nK@92jI1bHSR{uNe|Wf!RJ5?d$k=H z-UWtH7r>CqG2~nTgBci}S23(G0|Tx9vo3&P7{`!y0SvU?b1$tMlXexi!Ku%YJ&Ado zbT9c)N5H4~8u_rjg6&n*bSqAoFy&yNq=9C0hrguZz-gyc$DcSg&!79GFZh$09V>Xc zxsE>r=I#8s&-?{{GKXU&Pj}SuXTY(YKleGl;7?ZOSjE%J>Q*gnm>PJgp)9a;;}`WW z(LO773U6KW>k|*~ebo1{!`CqgrCrnav7cB%JF7e&LEb~2rQd>xYhJwnF3*DX9rwRg zU-H1N`nuJ0D*e#_jewtl+wQ*Y9I^$FfNcdJC;PtOkVgO^ow69PFZ&$-Mdcm@%w+Qc zaf6p?zW~f&^8)fgU)`F#<}UzsD)pFk1lvMD_i%3ktNAhFzwg_Q z9F8@V;}^&w+U5cJGICgLa}fJ&pX08)-E%y5dFOcE^41~l@vQQCJiBm)HM*YYlacG8 zKA~`J*Tt{N&}dimOoP^AcpvrJ=TYP4N?0!L7@Y#96Wa7i3L-wLJB2j%lQ4Nw;p0S%cuvgr`N#*11lhEU)DO zSM(_D^Q6Q3O}0cM&Rx$ubtiU!GD7LtRTwtL1`p;J3B4yLpr?INczm<>GOIw}(9n+F z-Xo~rU-&3*_lWpi75!&~=qB2rZw#ap zu_uPI&+)R8_oN}$oMhRQt4e%Sp71qA5yy!!3Gum6evUSYhvq24Woi{{X~48LNks~B z79}z1XOlfUxrctuJ%r;zp|m^*@1rqXwp;Hxx)>+Rq#pS1yCd~CNS-HZg^62Q zYG-sF;%5giuMNZQ0nTWJjNG0Xuz(Il-?lD4oq-bw2cmB?)w)q_BZ1Gz{+Tq7()_sc zcku{oy>}-(XN}nNY?K;HDod(FtP`9QUEcLxw06zt2SsmLzEIgeKv2k$v#`PG%dw z`I5~OHkWR`bo0c`Wt+!tF5FzSxp;HQ=5d=h*`*iyx>qHf8QpY`}rnL4?PWA_79=trYWEE2{uq*pS7d*!U?=H0RKpfvXtvnZJgK_va&Xw=l zH}71YeJ(ZrXW%8<`Ont;AuFl=Zp>#`z2so^QXpCF3(%*Im5pz_q-jD^X_L`$Y2(DE zvL;Puph9z|VbXZ+k4cYX{nE9`t*+~erR`oiYl*qgJBj;c65YRz5Aivn{|>D846TMr zgGciI-rsw`rAW$V>F7xep+((e6V212s~u zyVjuOBugzvebdNpyc;%U>qd+dO{2C^hi{_P(PHMk%#D$96L6F`I<(} zjx_AqejM}d<~#csUjlq-*vaoJ-JO!`*+0N8`&5K0QP&GZqXxDsuS>0CpvLUV;powV zoyMhFTfjja*7dxwn@%P?f?B;8I}0%mnO)kV-6HJJ1K!b7xm#N)D1Yo9s8NI3LrqN(uET?9r>s^72lGTgmMu(9j$!J>qvtpGD2>{wq$Hc+hGR0x+e-Q z&Pf4da-MbzwS6_#mWD0x)Iz%v7w`3YITzXeBj6!PbYBCy=ON5Rn1e98{|4fLk(?jh zISJlTJ#@p(*c%~@tIBr__e{V?!@U84`P}=2^H3P0E(=bNNnK7iX$Apu1s`PwXxCvB z6Vtck+B3FPcfGOFv?UXg&Dvsa)I;NRM0f6%lzGt?pxxk=gC3&ZTix~ad@YrmuWQuV zMC7}ww{-XLr1ZP7e|!evbYF6u`N>zHxbNGE^<7V*``3wh_anXi-7odVyHom^vJvmQ z;_>bTdec#q`$2yk<38TqhAydXV@~wpyEdh++*CRZHZ~(!KwAcFL-K~j- zsxEUJsy(zsC|hU{rXH$0v}7BT%EU8IPdo>mU&m}4AoDkSW{21F*{?dZu4*2w@Znul z*Y{^b_oxtfB?ln?HN+Dj4Dkf~6c#u%l!G+Xay~nb4g1L|_b>M>@L6i&-TL0!QI7~K zbl<%aeox;kl%#}~%oedSOLP}v*U90p^JCY}e+%*n$noX9knf5*%p&(Bgu<7CwSZ@o z96c;NJ1^=`#{Q5Q{)jMPIx{RrcmiPu!XFXFJDFim1v5x9n4!L$8E$mpyK{s(H@;U# zScU-pQgemdu2I_KzDk&40HF!9X869-Pj zIX%v*@>ztTwa1CRhTzpZE(a&rsq=>;6Ot16MJ(QZJl@}ZO?)EosHYrNJZhXdijd!q z;NbP$61fDYhpz2i*D~H?35=eFFI3!Ve%J1Nj|9q?BL_K0BFu|i#Pgqt4Cgdwc`U0h z!YNWYlIXsnHxnF5ZnHm~=Sf4F32Bofsr((MGglk&UK%0YK;w)20({+%^RIg7H9D)Q z!&8Gmegwuu=fGN@Y)0B+C%*yt3|1qM|AG7tZy^3xgqDH!k2T{wP;*t5uhF&kY|pE& z!fPgAmD~}1rFwEb#g0cO*VDTBAJH9iN_p(FXlcC!NL!SC{~Dbf(BOFxCtKs)e~Fd` zK99bY*>!=k zjoSnGs?|j2U-F{65u@`8Bk&zfy!&XPFhJD&4bL#A>mXv*bp-neF)xpOfY{SKc7XD& zBf9^97}5DAog1IuQmuErO={;wlTW=p*9_Vj$w@VLtu#HdO3 z+M9W+-h@`IL#xg>?r5lKc&-5}VI5Y%TC<|b7#%b#h73yxUxVt6GR_jNV4F+iDe!ie zLRNS8&+}a8pDNq&?RtOrBe1qU3C;obI%O@!#9t!9*hoa%EEfEw<(<<~q0OBV9Nj#9 z0!}ZD#V-2TX}fV2Br-aQsV<4hGKk5-F=Yc&4lup;l|vrWu%KaE!@DStT?uA%6$dj0b4Regps_IE zTgyh@HYEEv^>ym^rPTKkr*U%_PZ~3i<4NO(#>{HOX`EP^oyB6C(+-*0OPc8%1f4>S zt-|R-N4$Gcyg71rl4?Ve>i-&~<4#WXouC@Qf6Z6k2HR>u5rloG)4=iFJtrf#a|td@ zVu(c5KH?k1a4W}f3osz~%f7NVcpJ7ih{dL$R6Hpt6i*A~?e6bB+RF;R3H5jP_bxz5 zwf&Dp7FK09Fno!Aku}Gy5B7JT?4385dN4Aq^CHkNssAdp^Hb4_N=tU*Ttu?$fe3x^ zm5Y9`2yOm$urre5)&$*y>HXaw^fpKOyZ_kx!$H`N$W+eD%;PaegL(9|Zq@e`%FVqhelv_s?LPDB$49Ug*^%6<t|{kz8umM`F1)6O-$ zmE+p+rQKt%a?G++_I39s?9k~5-V~f@Hv38Ic0@+=IjSm1^V#_Ne2ndUuG!eBczqty z=!>8J?uQaMuXw*ylGX-&?7PTw#GC2KyJtkzv%Qkzr~zjyyjo8R#{G&f*#M&u>CeBeC&E1p9q^lSRm6XR2!Xd&(N+kVN4wu#g4rSa!y zTcM-+yT`@pwbUd|-!8NH`OJ@tT&C8tw}tx;{D~;R^+$ z_w(pATNpnjVT*qroxRRrqjLy(@q4SMVumzGQ@!iqHK16DmyNl*c3G_rI$fjuq+iXs zpub~D_SB`dch?rkesHZ>Lp2YaxWD3)J9t}k2G7ZY^ti46=44)ppRGTDa%}8U&uH&r z&uIVW(GTjmS7(J2USPR*3hf>6xU={5-m|B5y=M2emb_*#@ zXCgnYI>gsnhrIpW563;TKZZ~5U0^@I{$qV#pjQ~%s;Yv%IkODdv&&c!@(NQI*+rZk z$C&X}K$f@k96UbtTP;b{@9(2Ftmf@GyT2^ik~90MB`f+%lPx&`efNokAYYPf$=~)- zOO6BdVL;WEe5&tK-uD^4NU_voR};VEs}^_z_631)9_%EpJW^W%N^Cu=-=Y>D30v$B zG1_4iruK)Z<#PdPjg1DDtt&60_U}2oJN-NDFzpj_vK{p386@+u__72tccgsDS95^Gy`#t)8AIfn*u|{yx+V5S!_SD;b``rCF)2Yt%i;&bCp&d|SMPYe<|RwepGXLWVo)rg(}fyYkJ2~v~D*ZDdcbf$5vpj0pO>MzF+2}K* zN7Vm*+)PFJu#<=HIjHTJaz{eM?@I7Lu#X2Gu^JP~%w9d8!KI)M^3OmHEth#W=*dR^ zF;ReSA>CtWO(CCxf|D6uJx)MUEY*7i=R0VZU4!!fj8nUCpAhsF=_B}>nW;6?vu%x7 zk{*;wazb=U8taW7<7{THY4G|)#S|5>!;}`*&$ex(w2yj(WQr7(kRk%}ew-&JeMe)1 za1t$f@Nf$mX+fQ5IqmP)Xp36^TRtzyGcGp=m?oj|oNMKZW~d8GH!d z`(~lt{J)r$8jvdLv4f4#;qlL0Hw*VUbchao!4yz;F_s3i+dOCAn%L-C8NBT9tg}yG zhvVj8)!7&A^sGGFAU3*g3;Ag#3w#=>I91_lbWIOt9Cn?uBS&G-eX0y)#|PEDk?TUY z@SN{QW}LcqUZbllD4)8ew$U{kx3t^@Drztr)p~TW%6=D_efH15H8ptE+0T%3YUszj zgzmk`_WC+D2oZ`15<7XKfFz!|~xUx8<#hlVH-=Y*=s=ydd zsbdJGmh-pzbBr%bfI0c%7?d(??rq zzE|h^^zXn=MN+;4`#Pfe4h&zJU`()V!6|yG`AICkSGh=Z8d_653&9gxo)Xflv9(fA zOSy1Ti}q-aCqyo>XoU7A!;sIqo%os>`(@-8r<2Nod29>YiXAkZv|X@h;WB(5&%NUO zc0`>2D{XxU`xxr}1?^@?zR6XME=}+X{K~;$n5QpS&#|sdo?~4(aE|rd$@`%@a&$Uh z7(9!A?o2OscD6}l^i75){SG^3s{491RBIC}NO@GhV>BQ?@1<0F%g5WDy~VgmC(9}* z#(w(E#rG^`m6F;dCA9;m`OlrGg@=Bd6?i3w0Xr#az%w7KR_xRR!`FTEd#0}m-?c*C z*q7vIv4@=brgN}L>nl6ytEO{1le90{+da0&4$r_=mk=DkQ`uA9WtC``QcxV&C%G&% zl2gW#l(AZpxn-#fyL{@m2%5n!80b3#I{j;q=)8D!S9Jc^MsaN6FWJRKk4Xi^j~d66 zG>zSn3d+yMG>);2g}*F%toTua=>YrR*xpFIdr$Pe2*3LP?Z?j#V4i2K*m3ZcqSZzP zC*Ze`|CRRz*xgMUo50Iu7_Q>7(DNeSeRns}h>1*3HVOKTzGdNYCq|-@?BC z##pB{AK&-UpnWP3XdOs=^8LMmy&tr&Z!9=71TV&~h5t?ns=IZdACf=U^JrfPy9+oU zi(6H&7bWrjH8U28?gx@nU1hd+LEQwj-d1>D; zH@2Jm*f}2q^lQKa&NG=>U%o*9igkAI;7Wdb zFnD7A9OXobgx(_B3%4+P(U#&ygQKKzEWUUUl!HB=z}L1taWumBWJ#8wqYA!yJ9e`d z;LLKlFV(%kEBfYRFFCMkK932DaYKkhjY9(_q4mBrH^CZ_lhrly*gJqVde<$v0@VLF z$kP;mGOd0IrKvFI{AB(iFi}!r^{A~J@l7~4!AhnB%Y2_3HO%Lw9MV?SY}pCu)+l^!`(#FN@)*s0d^3 zBlcw}ICV`cUdJL@msKX1)w{^CjBaD(`}2$b5fR9y-`jsOkyr-}EHrLHNulKDIJ*)+ zO!95TZ3{w%Ikc6ZOV0|a<1Q8RB+XBz4BYAIvv3Hr=7ouJ=S|9BxsHem88HaK zd>)1zaROXg4l%<|NVD3;o=KfYq4wOyoMOW7q#Z&mE5@64VX@x?7djMM-I? zttd#1Udgu&6wyr-;xa970|9j~F4G*k>kU$mL*{<8B+hh_lp!A}h*G#uFE=D86)~Oc zz%5sF*M&9I+L@T%9c;yoRC&NFW^{%epcgk}0VlP!WG&;IU_MCJB3O&Vf?|sW@?LNq zY5PZHxsnCBq7+W3I2Jj0yE<>WDD>>&H+LUdlGWwUNY=hQ6S!#vBG)odb5k0xOQ5=} zEQ~ea;H?Y{=d&c=;brQ&7r)dmeWQFg`u=#@nU&T4BXJyBJPR!&K@P4ihMu6dLGF3= zs@!LUpbPMo-2zZKw0>!@e(J*?CLBJMmp`7~XEwJ#CS4X(#{tg=jg{oC%Q@N>+PX9g zPbsL@kc%2f&co3IsBdI~iZ#2bRyw24Yo*e}_1dAeGG%lR)oO$U|9CoJ9tF!pZ3${& zKyDu1{-fc>kbe)!H&CXIwx4lIu{!pih}5CAM5zvPU#?iSBfZ4Qtw zt6YasFw*z6@4>-5O-`%(Yj1uy$G0C)SG%Tmzjt_8Rcsju;o${sl(yBJQejOSHU(K*t&-98}TZ}}>JSJ>`=G!VvAxo4M z_kPYmb{@|(~pVcj}^>pIN564wqz!AEfpSyGI+xzG~al8hTl zGJf5c&1IV zzJBaB%7;E}_SX4Ib}=QI(8|7Koqr19uJVL4ZxPS?t7E&)JUt;L==~18*u^976{np) z!3*w_Q4RvvwMkstgG~8w5ZCHs)kzMY56wsH`b`Kmm2#kX*L8d1+k2*Agbdr?wd z$%z?%0cH0LmMl3|h#DNp8df0Rm}Ct)od& zz8*W6xk30H(1HQZ$6s*cMI~=zwzd*j-jB0nE8P)xRheO}1m>F;wMC{6DbpI)%2ShN zNbax12U>Pv_>0B%C1!W+670;IpItJ~z-==3KkzQr*_YyX)%dFUUh4g7{g0sj!U0^6 z$$f+MUxwMP4B^tSwQ3&PWN{GCOy5)Q=t$ z61$w2ZeK#4pym##dKB{c>y9ni)gdgmARcx(mbP?AYe(QlU0s-LFTn~e!sk`k9eV`W z9RlnQ0d|J~yF;*^M(9Mqxo6nShSrM*HAZ>RP*M&L!U9Nkx~S@dEO-yD_q}tvA#-FU zb3B9Z&|=;CL@vhCfzyH;=d;+(-qVU_=N0J z(C1uzkHE%2aYENU9q_jf!>y6?AY1sir3YMT2djA-W=LsnGg?4}I+ce4s?NFy{vQqQ zWSd#l2%Qs#4XloAP0+<5UU#F{iI@ZT)I7uOeM%QHE`{zBO04Kv1;NSC(_}L(3SKtr ze$4EWXm&q<(eh-!PQElLyIS9_j&&I$&~G;P5A;|C{eMQdkV-?FhC_n&hv5Q_i>+NWRQ=ST;p-yC(*A9UPLs4{$qnQ8sHhqoo`i_oLH0 z?X`5{FI*7Tb-3q%uyS8K+GaJ%PocH-;v9FiA$UJ6vpWup|w^x@1bJbZkfpL&^=w zlzo!zw!wN}p&EieQd7E|t7?X%Fr-uuq|`k#BqeZ@AvkLwW&W`tDGVvDffToG2&Y8# zG&MyD)ID>K(=Il87|uv>i7Kq_STf~{<-0oBa;AL3$EyK%EeQo^*$IYVaWXHc9f~C* zB{*gP|NM`m0n;FlN?>_PaO6M@NZT+Z4W7o}2&AE3DQwlp(FUG|H|ifZrQnQ|nii=0 zIQn2R?P9Er%nDlz8>=2Zf0|wDXqJ4sS0_uVc3-|GD27!%#gwLAnk_pq>Xoo?@h^`H z7ytISP_P5f-N)As`Y!1U?ZAARr{UozJBZI%Kf~X9pwo5WeXR~N#_hfPk~8mzID?AW z6|FWrXkUuCVC7bqDY%qoRK#m7Xipr&^`P}^dKzMHDI*iz8*4$aS z&Q$k0?`OC#tS~~7!5ThTxAcMCm5|+rQUsHi&L)?++XH4n@zhXresIo6r~0sLa!v-G>_qAIEZJ3%yq^EQ4JYvrtD z8&i8ck5#W~lVWZiFJkQ>!CQ)5AnFzKsaHH2)5==4#7#!b0}sWV$rAXY6}pnac1rXm zGE_+jkc7RNq%aavIJ%ogMgw?kFnJdb$na^{qUR()so)uY)n_09@?j-qfRP0|mXD)L zv4$kOH8*G@d?vzq4xid4$AFdEWB{MD>=^u3gbTZ2#6Rcel9)y|CArB3{};ztlACp~ z7=ah^ZZO@v*s+Apr_d^<9*>)M5xd)>}k!uR^B+ui9B)@SKm1??K` zpM4Y?=icD0@QrB~HC4X-r&-okr`_%H-WdMWV3;&FI>w3<=h|0TwUUvZ9@El&y6LHl zUv#=~udWlRH-=Mi3K8G!#nMj|yTwV~t7ZUtQ&p31dAm^@({9wx@r{6_h2U(|c>V0( zc)#?Ch!K<}q1Vj*%DdEJr@`M05vB>_?r*~?5|)BgoDzK3cO#SRFFJ|8`+YBhxBXrYV(9A95nIKl!vIpE=3rh~zUn`JCQ0=e1P(oQPnb z9TDwS5y@T|(b(mP)?N|O*Q#ADJUM#drqODyLa6@uAK}_f;c^A-@*nLZ`8kzEWR3n?!)!cLgdgtGwERXJ# z?Sk$V;bq2YEaYWnG%o*yyat|^P1hsuJ45n*jb3^@X=l>-WQCfeDZ-yxG@jgRz=x8- z=uK4LzGUHSx>Mr+^zP?b|4o)$U7jY-$VAo^hMp3uEbb4zsFCoqn3lY;T6{sJ-tqh% zoppnEXJ>-nvqO0b^+(}B5}hf6qtPi=x!_&qazBRCxRZBw2G+tZR>F?!aEd~)t&2L~ zJ$SqZr?Vkn-U`4$b)@6GDcu9I3pc$Qt4uz!4?= z;+6yQ*9r8^<=(4d8xGiuIG2L6=UdA&UuPluZos)0 zDmP$X(mQ=`ndm-?RqyNYNQyYkk+(X(g3cE?^PYCa4&ggWUYC@#YejB>0vmKH*{mvj zont7R>{1o(D*HBk82W;QHP^P?#>&*>N@r*9DP;jPPeYd2%arq1HvXAXW&1!M!8(N2 zBZgLe((c!kXs~9|gotm$9@$w?H<9hM=+VlHkrW&gJuirG;xSdl>dy z4f}IbspO;^;j8(M&#q2sv@s}5X>?@*-$#l6ja0&NHz^{E1S>1Q!k6_q%jqo~#4d{S zGkh8G7QUldg|IR4SDd#vhwleTd`95YB=P+w@ooesXLDQkB*5_<_h}NsNDh^xqzo z{_nZ0UI$+v1KWcLkHue!6c52zlEhf5V#FyP>K}XJTL-28XwX{O7#W$Q@nMef0bqOy z*y<2&i*NXj^r=1fO-QHq#Q7kSe^Y$L5cw~I{1*?A{~|7bFR%uHaWaA{etmLW1lT?< zf9Nwhy->;s(7N8YIrdE7+p!1xs@rE9af26TZ)2aM-6#Rx*&M6yoW<_P-*;Q@r89-B z^}v6a|3EUowB#KA2Z5iggY)rk<&HqYF^mY2~@;TZ?Nx+@kX7^p*5#g1K)zp^6%49xh`pYKyCdIU; z@`3^^hHU5A;3^+>!b;lOCMI()O|0^XC0~V_V$Yq%U!*v#FFA5}0Mi|bHq2C~c54u{2s(svpM>2vv)heXfc}aH);;x!L@*j){+VgMebGQEVU!#a(vb?E zgTzzTdp*AUeP;KE2&s$B?)|>yeEo4i&9``8i+^Tzsq;F*;;!}h*4IAZ8^~Kl`Ip$0 zZmd@h)Dm90Ukc|Ku&=0oF^L`UIxW7XrF|TlCF>J9SO5(7>e4>gTu5RreC(2WVJh8r zZkB~9tmHhD^_yXcN#*!=vLjplLn zcLGnH&LRAlRr5IiWj7%XtNwBt*Gvdgn@z@Fp=18uh!dW@06cq;g1-yD%->0I?@5Y# zJ19Q)Yl_ePisH_HP~7=B{g!@85NjL7t$(Gs=@7+DL5j1F=(qGkzE4Sg!w^pNm*Ol2 zZb#T`Di9x~ui4eFNC)JfnxMX>-XQHv=yAekAb;is^Ph^J%U^h2{;Uh;KQbi0>Ad_o z7tH_vu=nQSQB>LA_`S6x-KkE}Np+wJA#~CS1j5oJK@bo+-AS_rK>`jUNo)l~tMdEf8v_x|-h zkI7SA^*Q(4?c8(Ey>;s@Z(qV6Zo4!+U9QOg!X^Cmm++IWS;z-gQq!tgBfpQeiDM$U z{ZQjZeK>Mf*7N*W^cCZ%x+IPlFNuS%8FWSdl1uoXxQsvQiu|K4;lJ+^e#%4c74qP^ zgn#xW{CrL96~nh*!hfyC&wV!3G20ca&EIRrz}ghT+F<;1{@LJIy_SudgL&2rUpbu* zl~sVUI4U>*>N{dw(JS1K0@(?XOnfBb2bc! zJ}0E+yh17-+%5LcW8F0Gc471tcWJs zlvdGaJyYT~(KyR^g)Gl_1=gc_f>httGPF8kL&7v0XF{`9&%+({yi&8TI1LUOBlZxU z_@&l&ZlzU^B>9cV6-JbOIHAEGSr2x3YxC_deZl(m>=?|9C42EB8 z!sT)vf97AvIq%2rR_#r-5jnHS7g5Rq^J6Yyi|n)3Wcldr)B#-AKDd@Ux6a%; zmuD-1epuIuoxFg_EzrWUP6cFN2xn6ec477C&p1=Kdh)+R`Y8|_$DeCkxY485Jy9Fs zNo}jIO&m?!P564XSEoMFvM>JoK&tO(i0eM$>TqJ2R|s&-rg<&I(r3)<=GzsLeKjEp z|3&(}eR~Kx@>T=pgwfep=s%y2LP^lh112p!!?DJK@?ys5Q`$VUM6v!`TX%7W&REM8 zARlq93-iGQ%z|V3OfTVi;+xQ-r4igyYUu4Dy=7cDlktH#yW#w@uDkH|H6q~fd!c8& zaSkKy7#%qgxljLz?r4KDwYw0X5iFdOgn0+fp!?L2;$>xgqbi7J7K=2dmJq|wEXJsv z_jqF2&=U4vT<$K}6f$MrU$#CZ;P>&61HX?!2CVSW5RC!QTt&8quVF}eL$ej*uxhYe z)4R&{>RRl^k5S^dfFXlvt*%-@lhFKDXgAtE8V7(xOD_B>v=1)}ZL|^Eh>M{OL}-z+ z9rdfwDqmSrgEwa%hx93Jw?LjIlnCaqXz_1sc9oz#ZeX*{Xr~rDu!GK)?d03!`#S92 zjQ&ZO^|>mr#P@hOud;n7@9%Dqa9+&zvZxb^czoVkPro|Rd4D+1g%j7(56_qb9c6(# z1S(s$cKq?N(CO8v0mdE<9Hm_D%R)Lzn|C+zc-tYtnO%mp%AibX*o906J%O%a1tgZq}HMW!vY7UhrutU~vC?J%tq8?5Ny(I@(!A zzuv8tEUvy%%6qO+GV!aT`~7@~)}7OtcoPca575s3mOz%@H>cB?$L~mr=+F3{1FwUA zJP<-WW3_mYqRV0udoHghovU6f2Ph}Pp*eHK?7_io|5UUhruc#&-G%rf?e2)56wD%B zg^u2+g*^qcqiZkxw{*5Oz1tp1p`fL(9^v-7Vmk8caYlf48uwd)-hRjEHDxc%Q7=oW zt3FxxX%a7$RYtu{rwfACgo)5~Uzsazet#X+OQ58`RI<0Jgea>U%WIy}=c z=C-A`CdPhLy(3%!j(8zv!BY6yn=?kcSLZya-Q77KX?KRa9C zS{4Y$tA)B-J;zrsh$%e`-*3-|xqWSTKEjI@#@tR6&%_6{`%=$G+WqaEm^)(1dCt^X zru*=vnF+3??y0lZgiU)bIIo*K7|z36Kg%7%@CJ5x7OeAvA^fgSZO~ zi-nKwNS=QnKIYEk`EQ@jUob|yFP-tAc3(E}Bkk^9uJ zpS?Lt!cOg}8c!M8lN(Q&+7rW55AA75`jT)@?TOFfb zP6$Gll5pmp#2w*Vnc$5nr93_+Oq~_U!^T<3vo~Qztqe_AikaEf6PK28%t_0`TQAe< zZRIPg>3zxhw{W71+KSsTr+#jr40f$BNWV8}zuf|Fh7+x6vm&keMtnzNSvO*39ktdA z!zHsN?djI==Gl=xKzX=+wnd}O3_EU#xK0nV*!r0=_ReZ=`T>2G;lcEIi4t>C7_Xj} zed~8SeZ^txoV7nhvp?XH^48%kpH2&r!ko>3kIwpJS>eq8MG#b7d zt!`P3h}o}sE(&dP`;^+vWe(I%qFCP)?`&zB*8ZOmjiA%q3GZB`WZB%YCHv++R3gs% zxWqe8DP1;iZ0Wvv50#3yeq5@Jg0P4TFe4W;b@N(62b$JROfYMlPguv3wI82RiMc7dL7NiHL)kI1&n zFRk6`m)9QkWACcR%gRk_x0YY2Jeu2B=D#quN3zlTV(53!7)y1twMLiU`n{*U+Se8a z`y|lpSBz^|Ul#n`Mp@l4{vv<6cRwymdAhd<*TcB>l6Ga5AKO1|?z8ac(AS zZ*OkE{O6aY3bBG_(}^=Y{`<=l$7Z`@{oTA7Sk3#8-|3AnvR=ExW8bscW7)$qu-|Tw zc4qk0pX%*_+0T7y=&O2Bxy}0^(&{O>A9GecW#WuV%rRwq9>(TY#u|>wm&FR9BAw=< zBc6B5ZAE?DasD1&CuT!GjIYX)GodJ9+;f-26cvP9*(Y$5ozU;HVHDTIqH@fnO?+7U z^_0Aa_}>2C$2U=!QGobj$MioxkxnaQEmdS-b+$BPd3i=dgQe)WkmziP!K|;P zrP}x|R^1w0)(F>`$|7*(I2$(Ot%R!=`Ih0EeIqq6{*Xs@$}_Ro;@TeXjH7#&}O_IETL5byBe!8vwE$k8^+Y{ z!I*j%?d$1UPm+F5z`Y9eSllZyif;zrx*Xc+6f;=0xG0tleltc{qcD3IGbKhuU*<-Z zCz2BGj%J)u{G{m=|Nkrx9rNmGT{&!?=>NCBTX_=t)z&~K{Kf|6(>kD1?iBCDiUX`J z6fy6O*5fg!^UfrUk|u&rijRjaolmn!O9jxK#CgWOcyfU3WVct^H*U&CyUr`##Ke ziL6Pd6i<)fGs48=QiqQn`w9344yF<^*J^$vo^9j=F&WaPG^tNd2%T= zq{~IHYpi!}Fk1@~Gyl_jBZTb0#N9$;wMRI+G>76Mx^$M!+>DiU$7^YZfI-_x;RZI= zrd~oLzL>z6+T;$}pU*x4J{Cx?!JN2zK8D4yh)(QEOJnpRY&ZIe{-rbGHU5Q^6H%#A z%0;xF-ck`|&aoauEY~b^sS6|Y+>LK_ZYJTP^>B9F9fY~NL|czUwN2e6p!L1RmFB~l z<4SwejCN|zM!A-UhvOQ7%Z)1^mj{;@R{^dOnSZn9J6i=BRx0gV3O?Sh1ozt~^|$ zaNUIKHpb8|^0%b>*Oq(H0J%L^r_|Sgod}zN6KAMX} zoD((9g$VJW7UDsKcu)&5@5DJde^?Jd2(v zjgcn`v3M49Bx!taNB9t;&W8{UJ_?aIY4$>7ebeAK1?(GbeR;V*_Neg{bT&AG~U0G^wHAXiFII@J)zYIV}0I5t_=~cGu4>W%p4~|MobG^O0<}kA*T8c z>f{!;My&!BeLcrP)Qlk3n@~SzC2MQv4c$2`6V~VO7WAi3*TorP1%0nYt3MK>l#q+H z*D!6L6!XxbL%ZYZfvYdBJhmG36D{RX>@nk{ebrZ0TYD|ic>63|xUdY@Ex6|3nh)L) z9lSq;R-;B6K92z9cc8;So(^;n$lHPThsaJ0cky(R=`&ad)q6C3H@EM32yOXPS}Eq4 zinUUi9j){Ly_N2(x6Zxvd#2t>r|GRUwdT}Hce$h`POqofM!4SBVs*RrY4?2B9_{XN z?bhyI*K483`8ii=&GmUS+TP_xKZn}%$ahPY&XA95kdKVfnR-5A(L4EdKV>S`KSuI) zC0C;tW9{1=(w7^|si~=PxDs)7!j;TOn})kE4+p#DP@b?-0C%_Rtai_LVWj}D$Mv&z z_qynO4kNvh^<{+t*gJiFnSfPh*Ej_K1phjJ>b0rkUO)-#LjoPX8n3j4v2R5I*$Gy~}2H06_6y=H6?+Wf!pyLhTY~_Td9ua)&TuZ5U+fXg7 z@~3&%lyL0XdW|Ep7L0o7ng&zbf_5ZQhld4RFAI7drny({g)99c`nc6)qqI9KGevN* zshsGnc$9Xp_O7fTTXRX_Nbif`olx`-)!NA`xBmk>+W)-&Pwjutj<&kT|FQkQw5>PV z|BG#Xq@O_Tf2WQxf7$*Q9T!Et-CwzMM(nTJeJ@%8tbc_aM{6I^ng7z><1KGI&L25Z z%xjuYH?G?GR!QZ^sV3n>zOb|T^y%^E8WtqG_nr2Lm;(S8`nE4>^N(i)BWqm;j7fHn z^?&GBywoB*k1N?Llx+8FYxO45jDh52fM%QY9J?Mnne@PKSM4_?kcsDR+HYzg z1J4faH$C9Qa|SGT|9aZ3F1fX2SGHf-%^f}KEx?Jb=Rz*r<62LJ_Tv5?jQCjw}IcA1uM?^7fP3o*4z` z2aUp2glhsW?4iM`aKDGSMQx_A7urX2cp(kU<N~bmPsTZ(kRwbQtfcbZtZQ0R@ zIo4tSj0g`}5A1KK?M8J854ne7&tvhO!a5qeF|=8=Q1*T(+*tMZ$}g*$E4zTJ1z!+5fvc{D!kt9xsC~VCT@dc@ zRu|G#d?6m;z8xahLOs?*xc1j#Ex2$}a~Z6qHWqZJMjw3P=r3f&{=rNII5)zNYbNBj z5;A-p&#Q6OzfK>Xhs^ZJCCz5^ztE1*rM$@ws$9;DRF6e z&|6ef73NO?_E4mEll)J^os@dyH=0HK50Ek|4n1NPAjgBqP>SEMK}^WI3jh0_|X0q zNhhl1dH%oor2@xY&y5_c`M*g2`7%1ngyNHC`ZLNYzRe>s{}|zTs#ul#IJHLms+Lw! z|I({{_aLeWDz7xh@M+`@Btc2Zq3 zw-;@h!g`;@%=0atGeL~Poe&cz`Iq|Fd43KiXlR|^Q@+k~EGXdnculQ^XzHd_=$|f* z4KPQfe=PK}?J4sWX>WNn7MJKa6|!RYEUV)`q3?RYs*zoD@hquMlvQ&@IWP|)@q ztQ<-1l`rGFHd4#8Riw#T^yeu8QgANlxFkI%gWWDk&ksnCDR92VuF)P_HHJSs*6S0GCl8Nz+1zIZraHZV>H5GiEEeS)`}c!LB<3o=sgdV zEZd{y-znBdBt>~lK>Ez1ADpt((}Xe7WUOd>cmmOX23^$Yr$dHc;p%1O!qA62(jo7v zy%oHf=F!o(kKo@|A?2=KRny$iI1#_68hO1r*_3Pd+iRA1&L5cKHxroV_fP#`$7fI5hYb<{Z0V zU-`ma^c9<>tG=lEHyX_tr+LOcb^*^R^TlMx)rru>UKJltb7Y?j$l3o1e((G#^o+fq zV-z@!htdm}vv@&v#g}(E7i3kWU@rL`ZH|(xicWaCt*ySASvFS>eiLV5jbGw>(1-IG zs##-(qTrmNDHuOlhOy{upQ&fBdVZBX9OdeteIYO{I~?#8d=zFStZzYJLpa0refGeB zqtBo^$+;@rAHCUu^)`$O^$e!r6dHU*X{*}(=f+a;%bi`ad7Wd}cRQ7^?B)Y=eK)7r z!=l^K=Zizr`q=mM@AFBZAMP)CzNzas4DT)(N`KRy0*pJ(tTkmSJ&%Q|hndEv+;lJ` zBc2S`yV%w4y-<_`=RiFg1>K3lY`lkI-&XHsChlW?Q;pygQTN(isJ}UCl_Q%U8iE~7 zhGe70qC7>P8s>^?usLh}o{i`wXVvnYm=c-?MLr_GgS8c}>uWF?SCd?|rDn;>!zmW~}c`@tIK*iQ{MO_c+Z&$bYvgsW!_;tt0m9 zoWmOPOx!udm+x~Ugw>eEuo?S&9<3~^XiomNe68ol1J72Ou=2TkL4>OWT=%x};k@6O zx-YQ?><~0aob!-J2(lh7%zmKW1KxSD8l3h3<<8zdsWFd}uj^Z_HM|FMGcdF4M`#p% z5!zP?oGX^KH+|La+AaH}Q#p=yoP#mu++^o^Pxs(Dd@K1eJ33G{M{H4qxBuXjtqvqj#nRq{bDXjBAYolE5R>OPQ=*)b=Gk!B#V0{v^6`=^Oe3JE(_) zonlL{18jSA>fTegEcwUS;&4wl>%$smFX>Yf)zB8@tXfz@=|0>7smfSi(vLMvT7tP? zSXDYRZXmdfH(8l7gR5|%_a3#ZxIb>aNge-6j2 zrZ42I!MeoU*q+=zW~ilVGU0q&B+B@KojBz2Fxc$3ud%o;)#i(w}21b z)f_&(+rv&hTuu5}R_ZLRb~;1jb#Ob(5c%Z zwcy+4NG*5|A>@Jgo952Y?L9&1Y!o!Et~m+lb)aaVU~@^Sbk>BY{mqWjzl9X&ePrf{ zCG&hp%xnt9WS&KB#hU+2yvb*t48>;tjOzrhA44YeQzTpyCzj?fSdd>DoB0jsU*q}` z*CAYA;QAM?gSdjYuvb{-CuB`V@?P#!k7%Qfoqfx&e}VhdL)9YAMj4HLVM_wEtH%A+ z{KR#p{EB6(UdLNp7p&%byckv0!ix~EsX1e8jbvJD6Dz^bhH{1Hf!7k_02nvgpz^YKP{%yih9-C z5TaDvXnI9Y#}=O&vZ~!N=>hJsU7fu`y5l z8`}b3ry7Okgvs3sXvSqM)(utWU+tx5oYjF4SiJzd2y6R*(Bnc#=n)QK=BJ0rhmULce+n|3=fx9X?ZAOLohU!c4Y( z6{zI9zyTRNbHT3hZn}im)cQd!@&5T2ysIx@OvjC$9M&DsJ1loxKrL){(HyvT7v`kn zw^3_<0%+Os&Aa>P1GG*ep`m;H$Y6fya(~M1^*HxeK-*Xs&T@ZO`#Q>f*NN-94>(8MyoVtQN%$mcc7(YZS-mrvr=@RtaG6d|FA)qxC zuv-STpE7nai1%Gr`#H{`r`c?YfnDX^!h|~1e^Xq2ds94C1n{h)LloDwft}?`J!9)$ z_tC5fZYuCu>eDdOw7sdNP4rdO5D%TYIwVj~I4HpLc9n1S{HN}9%)RP&NXWqGK|^~E zoo0f08Et}Z$A#(!x0#_Yf?h-ImfF111?9WYL&UCnb$rNz(%j$ENK5W*PG4d@-jy|f zec|uN5bupv#u-h0kX)&rI|cMzssC!%`T^lrEI!i7eutv4kM?$?A^Xr6(zzT;siiF% zb4{J~TRdrpdTM8@v^PD4olWX%cveb)a?mxvaB>ato@O-FI5AfVM zrP*4lvTyr$Na%^$fH`g9H(5`}wn2#IpbL71Y-KjiK15Ir_#hVj7Luz^MzS1S-&(!9w+I3=5cgvxwW`VOH8+t*fbfU*mDxq98w^IvO@u7*wMbj~?ddh2Cf>QHorB;X%U557R(VFMA zR7veiV6TQjZ-#049U7n#xuH1=VX@}?(_I9lA6n*yH^z>T$x^RDo=nK~-qW9A!xb^q6yGHi_ECnwse_<6? zmNp2@*4!?dmE3uLGxiUt#&~jnSAsT|_cUgz+kGPKnvOl&DU7C|>^zJ9^=a5knr9oW z<@TFa0rr<=Mq$q)uJxGy1O2Y7JyJdxsrdT^!RLnl(3vInJ>O^l6yyV6@f;6I(0(hl zE;_wgmmG)W4nk6q8M_f#ZNj(=NzQ@O*c=t@O=H3l`Ox!_FqPmBdRk<^)Kk{i|6uio z?+3(x2xZXT^!p3Zz8y$Ga@AusU+U8S9^df$^$rE%v%e3}cRy1$zPCELbC>7qAgh;p z#@C>~T}rirN)_6Jbd0LS3`xA@(hi~}Rc-VwU7Hz&ec*o2vrkjY8MOua=E8a0=i1Rv zNTWVO8|JjfjV4-Md+ccHC$u4#rRCH|XlwekJq=GLJbl=nUcqzH@kMrk7W(7#Mg6u9 zLPq;v`O5Mgd^KCs$tSK6pF?dwFQq!ZOh6AgV?w5u&vjwU3a;dvlp02LbyE!19%r}~ zq{5b^vux8IPXiYcYtXB}95DX8AGz{g2!|BRmZH7}tf+U*4$SFB-_g3n=8MAFBqO4S z_{8TqV(W+eXF(>pC0V`%n)|p++$62#8zi{xfVP*^K6QQscF~;prLAFjyloFpV`2X7jq#Hoq2mGI+OKXd}hH*lpl`VxueBRUFR&E zVcE262JgRa4@={kBqq1JN=>yw=CqLbByv=pk2=N?UPW5VQC}C-hGxAD~ zuH02U==R%gA26c^Hq&LoNXkSvc=xw;Zg9k39XR8sS?VvBikqgd+O$e+j&7=fT@W(A z>-vTV@j;7ksx7V|OS29qlX2{NLhZrHAV=@Av6NEV^(FC7uZ1nEUv55s+Kkg??yeb( z@E?OTgiK2a)Kfx1&J6C%_fF+7gqPZmNtrF!H|4@HGcI~-yB~Hb9wQa& z@#cnel3gO^p)CqSPw{3|TU~Z9R(YVe`Es@MUXmDV__X?%e{1=<xJTTTAPZ=j;N?`5j$Z zzY&3F%EgV3WAx|jX}MWdS$16z&u5F#rgd}UZMD~m;ATJ1dPFOc#{%`G(C-~b%BLXA zgJ|nm)}w*v3wEQIgr4SwU7ly_P=Vy{yel#tF{IS%j~$747%EIO$k)-o6~Ymy6O2U54sI(U?j2HT9>iP_AuFE8D4D z#{?s#>I+ht3MkW`s<)P(!29K^)n9vep+s5sFw6;R!$=a@lDcZ1b+y()UxWN^^^3Ke zOClvO?8}R}pQPn}RG>!7J$n5YwtJ@6MO~KrsLOIMx9;6_XJQJU0xE({*a+v(m`?4)6lr6bJ_KzXV9_R5FSe9WQ!r| zpTRx0Pz-D-KkDD;@f?ik*3+79ojVl;-8z^23UsR<=@!dDx!MbG?jZcrX=u*d2SLYj zp=00TM8m;*RNv7O(zaYp+y2(|rd_0KPe9kS6QiJO0qEMfbEIpj?!{-uy~KJgJ~Q~G z&3-!T{F;}jZdF_uh@3~XKB61fz(}#&@ooU4nf4;5h zfwoF$l8U)oF|dHu@#f(9rgGR=?EAAGt2o-KYG@soAzQB1s{t+U-G)R$p=T>j-{nPn zdwRhZKgJC(hj>-%5r33s0Y|m;@Ep-*=0OS)oQgG-~;dXGzLB{ln;7+-mvNJ4`9XC`}n3!c(XJgdeHX` z-Z*F9{%MHg_hZs8^U;cZVYd2EAv@Jv9kHW(LieW9`c>EkjOUP@kgDB4ds`U2ZMjfG z&f<;A!G|Qdz7h*l-?I}u@m>1{Ff*fBcQbrOL5aL^3jY_;AR9fXY`?!fY9rZKh4KiaFF&dVw5Dqc9@Ap{_867!H`?!4$GZ6* z(B({R%yyhsZbpE^GXtzOiZtk20nnoj`l`R3!HsLUTi4X-?fFobmKwY4=Bw~CvrYbAu@ z@O8tgM83g_Q0mU37llxSG%I*^V>c<5^&f;eA7Kvr@~NPY`Di1&MzwFfIEsE^f~ zcCM)5qn^WN#S zR|RHdieXDVVe!Pnmi=MLJ?*ZPg7gJb@0yhI-OgzXTsbk7L!4tP`#T@1ToM-RVHGfz zPv87Zudwv?rUP_V5#~pUKFgTc(XpeL-(6$DuUIfKd95d^4!eexSl^5uWh#D<4vM$( z?5KdlsqMtz6lX7+O<#;O-`J1bIOzl9soLDFWqtwkHa)bz0xs@1`PX1RezG^FB(na( zt?e~gT(Sjwd?kC+{10K~jH`@xzI6H@pczR4`W+Hjf#31k@6Cbx@jOraT^v}BXY7Vq zy-d4rskY*Lwk45WO&Tz7B)co-BZ&<{r|ov`tS{ez86eolsoI3m>%mLD`9W>4@t!=9 zUxfjTtF-^VTyh={nVdg_tj=Sh`Fcne(Sq+!6jF3-Y^)jAN?ZzK&VPm^=K=5s!2fBe zOy_rrj_id2xsGKo2w1Zh1SRL*kSn_~XmY+0nyT~c6|1w$H6DM!o$UwDi=n;Qv%&L1 zNZ+*wbBHicZ}H86D1>wq=Im83o(8^+pFPMw;{*q;B%92VLi=|a;1^ewN!j(o)? z@q}BXJ*c)eTKV{MCl{>oMD+wSzgg&OSQZO7oSlpOCkL#!I3Cg0>=wdGqJcDG@~F7pb{)7DR+9bWp2v z-|C>!{;iP^s-3(e1gl0}ODmmuf3)j&>WyNoGP^mAZhoExo_gP#b($0z9l>nus zx+8q%T%x&By{9!)d&PVWpFr;KLWqm8??g$;yhSX_vPQ<9Ih|#&o7!-pATkdLZ z`ibV6_-XH5tRV0#O|j57rX0lYN^pfd_CmX zX0Pv?FYd}fOzD1ATce?tlvNzXY#Z!f)ylIH5I&XAYLq3-?R7Tv7T4lQ)z*`!+HU?; z*zc_xsXX6wUF#ujMZ#-s*o6RX%{SpZoXmTn#WD)*%NT}H-G5GbXM&Xbj{RZJ`GYZI zVv6vFUayu&Ia@r<2hTLcwuYP1!k9xqZ3|^Y557^B0k6d2?J8fW}2BCeO%xdhhH$Lxv8!X84F3 zZ@OnO8n3>tYzJiLpIgLc&Az43hmvy*$jQwcc-5f6SLb`Y1%*D6?L}JYjIx=tW)ls6 zagm$$>+X2&9(lUd(dA0uIDLe1E_SeWJh<^BbfEv^!{&I#8b%-}#(&A{?jT$t4T(8v z|JyV~MQ!N9Hg<%dJy2Z#{ja@KBn?;}#Y84CnMJW^EHyE+7^Yx{xL63NJIsALK80kk zOxA<-#2`X1)*CNseOO<7?(ffBYyit)xh#(jWLL34Y&aW%PFX(lFfS`$g={3IWnRZ7 zvSK!gO=j1#-?1s|1~!%5$fmKI*v)J@OJ&{I<71iWOG%p zd-0_mH9L2`3=gl@{(biwZ~kM?-nZV~_s+Zd`5%1v(Z~Bg`Si13FcQ+}Lx;co>g&

GNW|MQ1| z4`wBg7&p%Ei+ky;(i!DgUX4e2P+{M3EGjm7oLPu5B}z7)#5;?2p3GBtIv?rv4sm1+ z7&v4=Zoiy<3uet7&^M=-LjwaGIj)@C0WR0oEbm!kI7Z?JlCb{kSWm`Mdm-iY)_%#K zV2W;plfX?evA9Xm&4h&Lp><(!| zG-G#51qk>a>FVB$-6tK)WNfkgM;aB7dn0#TUW0)oL0*(dftIL@N%GGSsVq+hJxcxz zQAf-FrtSFUFg^>I<(2r2kv~XaOp&J`G>g0}gRxlo0SG8g?q+5zUam*HR(TG76Xe%1 z_LL|OM^07wal~SizlGl<`5L6TlRN;F&hk*C+%6A8{<_F%NN2L_L<+mg!;#Ds`BXo~ zy2;n#H&y=F!B}@0J7O@0+<@maxe(9k@^dIMr@SBINf~l0=$Y~;{PvLdV5F+2+_x)Z zS@H#$v0ie&&W!bzvmldfxl13$`p93WFxFQdj+FP4cPBH}UrvK$T=M;hae(|JWRfFi zK%Tks+lVDk9)+9^l&697D)}a)e~|ncWHMO33cpv&H=taG$TuL@L*-Wy%P{#PNa-56 zl`%G4o(VaOkdxupEmxr+^W`;&#Uqb`t5?1Yt_AYfHjJXmci`72e}T|O%8oR~M#)o< z)6p_VO2){`Q7&WUer zmR(VdT`xZh{@=;NL75`o3CZ6e??k?)%I8q}H_Anbcbc4qGP+652K{DvFhZCvFGm_m zfOnWwNf*=orbfS8Z%4OMy6G@WaL=ps({5oz? zYoJOo{p>DyjHV=;=qG9jeqsi6A?=BtK~(yQ%A!#6x;%pC=qjQv#}BI2Ib_}}$>p~$ zVlh&ju#KCSLIlbHunT|TiH`vYPNuAZEQIHH;vY5aQ1;UO`G~vdtmcZBf_ovtAUZd5 zWe@@uws&v{$~Fq(uN@qM@^Bmof9v27m6wR)#SRWpxhD&RmpV8krIt8$@Wj6$dc-1G zMo(Zu4NrVu!_`sBK4RF(6ZdO`hG=C!3Psq(6Dhk$XbOv^C(2gbAd(P^ru@c|NGMQ^ z*g1ki5I|c3(iRONiMU$K6>1#a1Q%K7MW-UT(5nkrfli-f|t0273%{eG`#nKD( z4|(D$&`Fy2qb3O-MG}Qm@0Fuq5tHE_ ze;IhN@~#v3a{~`k?t`8RU+_fIalz?UYEb`$IwQZMl&dp<4;i>fS(*)em?z$$@lR0p zl3c#ziK{hS64AD=c;e$4UZgB^!2N5(f0e~M3HkrGf$veOsF1&jU`-pZhhY-xBMHP- zh+Nr1+IYkutmF}0`<5qeLlmO(VIEPGqXtK{u4~`%#8)(q<&ttYN%?ytmc5d)gb2qB z!aI`k01-k4;R7k6jz2^)B0Bd=%Cn>)KN_(FB;^xQ*y9GrKPAOSvOHmM)Je*Ds_{P= zgs&v!dXnDH2BBV3mT?gNV-UWRlwm|TX%K#plonFB27~aEq-=xD5gH9bgQQfFN}MtX zXC&ndO4w5lD7R+~!a7;0MMEi^GYIQtAOVd^1*bvksb z|0Z}yhXv|Uf`@fDDzN~m_)kZsT8AEk6Dky)S7SL;z%fq z&2D~%oBv|udaJ?4l!;m3`m=#0%Y=Lcv(3OJWj{I`=4TCTQSL+-=D!%&YVna2pEIzH zSsx>Y=ec+d?l!A=J2$uENqHDO4)fm(KBi0~HG0v&k`f0)Z+^+ZCZ#XxyLpF!EzJ56 zDN79(Uq)zJOPm6mq16n|qAhr~Wtl4l^BZ_lW>L{C5ITzXM#{uO14~LYY^iyXflbQN zOyJuMY_W_c{kg-yR?B$8cN*BHd_`%gGO%5VMxV$0djqFf@_pdHOGuz33Qh;JE=M&t z-z|t~luoO;UNGCBJf09I*xgosyf#n8XJUY=Fma17YU-6hTPefo2x|g1{hpr6NP;ppvgieXM+JP$^lq$^F{+(m1R^XHyPNb{GN39Ndw!J zKU1+jW#AO0h;;sG1H&X$65&sx_$pFv^PB%Jnq^qUNGjhj`1Dl1X<+nR$=g2+Y*H)~ z?;Zo=g#*dnYe1`|a3t_s2DT~pQR%&HV7s!M@IC{lDAknBcMR;Xc(0wr%QeGrW|Dl2NlwE{BGVoyKb;2JTc$o4g;r#}7D*{ZK z`4a;dSPCfoPYpaud4k0JnSpW2ADjaQoS-~N*$WzYlJYhMf55;~l=lfAH1ISu9B2^! zY2Xsz9Q2S3Jd;_EkSY8^6sJL>Y<i{?)dM5NSC8hm=GH5iy0l3ZAP1Dh-!65A;Q zTa@F}j+{2IRk6ncpE0n_GVwa_pEa=EGMb9{oPkp!m8{9Y4$DN+-mrl)ERzVIH*glS z+R21o5XD5K-b7i@deSHHpw%LgiP7AJcVlG>k3s7pcZ0e!`A0N!oJIW|_Egy>61Tzj zJRd-8e}#53`F->y!1fj>%3sA!xCtg{AKGZ0+tQQIA?_G0&?tn)<>%363G%b3{344g zfl^!ghy`FWyyWo5$V(aIj@0zmBA5yPmVx4(a7ajr?Q2e;!Mg6KPqFQsWmb!bzk6U^74okh(@!ea}Crzv`C>=<(y z+|>s$C>L9#Gch$G8*qXSCDlxDk`7HOCpcAy78cdDAMnjWHw1(b%gnD(h%X|?v9mft z{0G7Eju77?IKLyrR|zh<7~(zDTf0-3Pa&?3y~n%;Z;$FfDVqB_Li}t5;F2zsd<RHdR5H$3CDlXQ=To5U~&GFiTA)_^1y1sL!VZKBhyL`d)9q$90&e&O%ca zyIzNbRToM*c9RZ=sXb-Dr*-I7ms3#B=&(SYL>c?D4o9hjplGpw(P5GLE(!7l9ZpbZ zKmlX_ro&0#$O7F#*1-!$s=1Fix=_=&(xtl;FoYyhlAoY5r7$)Q+heDbWXYyqv2) z;e8~wPRA>`YNo)y)bYcpUqjK7$NpP*i^?`HF2`&|45}RG)uAnMLQxTm^L3(1hLI{3b)JmHDB&q+ zRDvyTocT72ew+m2c-;?EqtWw?o2WxcJxB3P)}cw=3o92lMTZu36ih(ejXJclsM}#N z;%*jF5N?7kzMuI39ug;%-^$`$IulbrM(pvqI+WB8ivh3Fp-D}J*2G_}LyMXKg^M4i zLqxC*(uf}}-ivT`GZSCH&jZOnpp(Mn=a5y%`CiC5ex&$sN{7qpGVgyNH6pgCDs;*^!bpeuF}ZqlXw$M}E!3f1U0eXyF*;09 z0}!xvoDLo8?CF4pfHTw&(cW1N0cWXo&{nG<(LNYTCeI~;j11@*w$8>G1IQ|NKgVw# zii^viWRNM2gSLutEuJNLl*STO1BI~86F!6YX!4cR3k6tWU1dEDpl(1LW__qTJ(K2b z9Rc`*Hy$NP^%T zrk2BAS^ua*w^{(Qb%PEI)H_Ign{+rz?L*0UN{2oy%uW1S>=WA7~4c{HNzLO-CXNMt9e8NX54$iMY30#OoN34_gF zgF`)uFcXYA#?<|&CJ9Czlhk{Vyac1{O==^=l3(C574A5vj z?CQUU0{%{=_8D(|Y9|YzQP>VOh!#HKX5DXwItxZGVTKN~R5M!1gju>@Xht0@bwY*E z9T`ZlCM-1fM^S4!o^ZSFhp8pk!0}EUO6qos{w^Jw)IU<M4@21nUp(6?Jr;*r5N0K1^gb&jqg_Ea#g@R4^IQ?afd9bEI37@1zG-#Nn zK?$Gf%xP z+<*jfS%sJcxe5eP{vGl!$?w5~EN8+sN*;|ejb~BcK@HWR!Z3J_rVtVw>W$_&*cf#n z-rm%kI*RBB(WZA4(YTucOFN1v6ZTInGm1!Eg}kdq$HJ;^n+$l1?rKw4kgL(pu&cKr zo$4IjHHAfOM7>hy2@g|hmaDg$WfYcHylPb%JsZWV-sK=c8zw-##}O&O6m=tYMea+Z z>|%^YeU~Drc0{UThB|{>m+G!rY7u$^>T=z+kGdBvmAb+a(G-`a3+hV816o9Rnl7jh z>aK&;`=IOU!)Xyc8m4BV%Bhd&(5)^Yp{#b0GzDitqPMt!sgF6nLGA_T%tY^Kz;!xY z1ofd8&8Rw*y!t008GaJ%wtnWjDf9Og;g#TG%k({>v0ZGL7C{kh7h9$#m<*d?BrNLL zg@A@;S=Ie0cH1bUC|J}XL~0u&cBTrEVjFM1K=FMD3E2$ez|_}}CYxa#B=r!)Y5ScX zgh~AX_SQC4hZc1!S|FQY9IR?JWMDHC!=^F{+0X>E^d*acE5rv7tBImcu-e`;U*|v? zLgV3L^l+HE6V=D|ksgbrSwh?Xjx;2~1lb}T9>EC?SL*y%=#H+09zT}3EpV(VEDh9bNa3>S86X%SEJH#`C6z9zJ0z(%5V)A zUn4)nWccxN9*cS>_dzOQ&Crr_xfERl_}K=FWE;uF6Xb`O3_s&Izk&SR30ubH)%X?U zG?-jT-ic?E{4sv5@^|=k$O7UA+JwZ|CUdbn{Mm|ZH*qsZBnq_^wi2wur5G_VMjZ-U zDepm*4dz6l9++(g??KVgsOPNSz&N^+`kXK*3iUW_vv?1^!BD8nVVli+>_n0U=QYa8 zQs7&7kDeO;aK$qp*w1?m({O>(>IW|8J(9KXN1^W108K2Jk@fsKL1Sqpssy+eRpLEe|TxS9_x{8uI5ek}gvAgia zbij+<1?v4Kjn=i>s;(9QjdxF*dJ-LjqzSq!EI3+}B*Q?!g6~FoCfy)ji$o-3CEaYk zCj+VZKm@VGs4wbwP^ToLiICI^N}OMJHK~~tpV1~*)H4uIlJP2PRsTxN3v_0ix(csK zNk(VFu6nZpt8~{CwTfKt)}ce~f-+88tiuczh0U8-(h~72q&4bG%JlX`YAB*tBF#}| zlt9wH2w?*e-lueZ8X>#@LehFfwle9UwF$LLYowC?)s3EwMk?ux6eehke<+oN zAviO%Mk?vcZmk+K-ZLe*ew{+|G6d%YH32G?^i9gG8l0%LSxHB_MOw5;TAP)0RA-)| zZbr>Z`d(+As(!T`Fr>RqQy)ejCF#fR+q8H~)NAd4Co*2u;7qkG3-ITdq#hKnUwshm zLDESb&ea;Yq{eQM2ChP%d z<(^Wxa`Wp6S<*oB*I-pYMM+A=3u)y2O}eP=yWv;L*UR0cwI|qdKGG+!sO`{3X{-*d ziPshvGs)0zn^ut|{G4>71vc&uA9bsY}7ERVdL%DTSn0Ckd1 z6{ILrjKyl}x*Liwm+DknizmY&!6tufehZS)Iu-IKmWaYJl{yu2WQ>56bqB;HALdK-FDDB3U_ zCY5YZ^u?|O6=<{}SgY14j-IXijo6^*xjIBw;u8ojdVzR=(m+vb!k&!>-BOya$8*=Q zkaDMforo?8lF6E2?>xd>52U^RcQzCxqCTAqI#NpS`<;z^nAAs#0gZfEw84SS#X7T9 z8x81ej6T>{)E1~f=V>C%TuMl^pNKhzUWfV#L~8$8p_c|S7OSD?_W$URtM#ZF_LDjk z)c4@k-k?KKwV}e>8+9nDcfh_jM~xF4EoZ)U_*0X4Y?N%;c2j3~z zpi>s0QEP%r9^b&aYiCcsK5491Dljr(7f8a8`z@6pw+QE3~aT`T*T~YJT9U-Hp`;Y z+nGI`$3?1gC#5tR>`sH-t}IZ1GYp)f%#8ugG_XTCN(Q)xfisk5QpKJI&QiLPwq+T( zk0Qa&+j|+<#jN?rt-Uvw4_0s(| zLc9SksXGxduTuXGHRG~qiNfZ-uM_F_2I(Ccq;lkq-<_zyaDdBABoj)3->c?3HPRUg zq&OnoXOJ-U$B`-!X|X|?MkE=@<<$nsN~CRQ8u$`}^o|HpPt;|;%+?ioMvTKi>ON`w zRgABQp*9kv!Nk=YqT(y!by6OYZbrr9E4u0=7m;dUMEHtKoz#a&1u!#wMSq=?MWov( zT`LCbqzocWh34`V9-V~JVo1awkjCgF2XXak{=>!cJS-9_?RaidPM6Uhk+%2&+P zNj4(cQIGhF3Y~;JRNY{hLU|6#U8k*Y2XM~kU zB#wH`AL*`>97K{RkB=r&;{q-lk)o-n9_^-+OhlSN!dla%UnGw$Sb&iV!_W9y6Ez6% zh*1+q>_TMDG(a!8s7%DxJtv%`{ajyz)qiu(zp+zO_(R>{2_9uAGnjzOXK??=Y+f9 zu2s6|9K$`0S3sxeTPLhn#r1|dD#ymy>L8$hthNix^8?+N0gA0&4Y*faQf=s>bZ4`$D= zg8|D;U`%%EEZ<&{=nl4A#7?P%Ls)@BqMoe2_9Zd8DrkgaT?GSI$ zIay~)%0q7G2kz7qrSYB=NQIGxf#goPg-Z~1EP8KTtTsP@Pa+q3^X@`V@O~YVn8vq2 zn6b}U^xzi}6aB!QzE?w;Nf}ofI<u>WN?qs)-amoiPUAyRA*4!KXKE!T?MED_G0_yFP7=Msrtx~@w)1XLXUzgb7wR2# zp(ilWi;9y!1k)J*O*H4DI^5|A?(`iqjk}Os+d@NReqz!^_BH(5Dh-#Vm$<+?vpr?F zJY%>RRc}55wk^6+IWNNFae z=Sd^j&R6Lvjl}xDIC~TLDvGRaysG=|TW%nP009ybAb}(#xdB-&5Fp4FSt1}J`z9cu z!@h%v2#5%RxPXWV$}o%rh>8v>BI5=kDk|=Z=->{HgAO|SJx^8jO@h4d_x=C*{Z6IM zInSv&wO4mn_iZe*Q8NviBJDKLgB&kin ze_{9^P~n6rV}$IVq%PO8Bqjk+-qOuN>{3oJdA&xi%#v^Ka9Ts1_gYm+I4v;d?Xuc;j$3_)K| zEE{%oya|vOJ6;GK9dB=R#_=+Ux$F&h#H~>tlocgtCM#rbk=qxDi(F21vHKRu!}a0W z4-s9tAG8!cI=>N~$h@|W<3B`{IQ}Dabo{*I zp{{Wkvf2d4(~y&@%|AFE_@m=3<&_+mMp|?ncO^VN8fn6+&I15f8luId zu~TT$iWah8AzocQ7V-0Sx(ZNF5Ps7_$k!r40&WHI#4Bp&J8ny#i1;P9Rm_Gpv>9>v zLn5yyBALwV1xTL(6%WL8EuW020TOZHLJ^evIP6%Vx>@j+)ja;+%@&Yb%W))u}@ zK;`}IQ192KD0LB;p^#n;x-6%z687H?q3qXu%8bcOVgh|z1^rS`aRs-f>vY?^2f-T@ zcIRe(eZdp=1! zxf+616e`arYvB$Ewo<4(pQ6n_fZzm3w7QnlM7v0`>MQFDh0j$ae964BxT-y7a#e-x zBAImL3P_7Ug?$F}7qY$X3niGT3P7=4u;qUANt99bRbIG@*i#U51N){Ht0C9V@{JL( zgV217UGF~=8WDR1vR5Jdt$HFSOxm^Jl1iI*07UGRNxOv>S4sPfNxMrzBXWN*X;&s7 zTJ>aCd?~C;pWO&Qz>0-#D2gN7baqPrQaFR9zZud6pu)aFz7kgB;3(L`pkgok)RAzI zTf-dm8s4SO%XmPDZAen8@Daw|58EHWqx=?7r3KJqKq9Zn79n;kAj78^`!F2hd(8Q5 zpehEakigb9%nmEy8nE)Cu-%NH8W5KQ&{L&$`hFo!D-c8MPkr)K*n1^`KS4DPpfL(a z|7v8>KZfayeI2&v6G;Df7n4F@TOLApKjYfDD&2_Dk4K?`Zrx1JD-=NdHzUAj9>H z{Wl!yN+9dc!c_u3{b&5!tbhl>%HP8FM1oj<=>XIvD3AUj-51wF0O_ z0qNgY3drzB#)1+10D-K(z5w-BK>BxH0U2UPihUl3^Q}@$uXaG-Uxh3b zu~Gw>lYpc+5X(RY8OWvtqsQ|LdKt9$GJyPKaR^bZnIPNz3-!IbR zH++<%?8+=l!%nI!345i7{jWyf@qf^JQ1P@MR#k8LoO)nSq5={$M*nM7z3~p}kBmAUQxY1odf^L2F8cwK|AP(_X&d<( zI)hvh_DD|bON)i?aSDnrcc!-$;o6+uc*^N*P|4?63g4Iuecup1CjinD+^u?o+YiCr zpgi{$A{0x~?n*h68w8DX6I z37~%~Af0+a0U5r+*u!DhosLuLxGHWVD5shrk_}Q$l_Jssq@6mdl3@5YV}A~Zo^hNS z4A3A2q*FgCAj97n+Y=7`({XA#Ks*VhYs!Z#!vy&|7H5Dv{Jkj-}vpzjrs zHPurA8TMxE>9FhXj#EKgcltrfsSHFKfZDP7Lj7f_cBrp1XE>O#XTzb>jzevMZVeK# z9MntKq1fy|g}y9{&E-f5()o`NAk`GI#6ZUW4-gEr zRR(fP0wPpKl|vDC{*)^_6Nu2ou52@qR}+xLgo)4DtJ!Y1fqb8URLci5#t#Nj1H)9$ z-PQBKs4qc9no(bMYFBv_qGea2N@dea8|Ui1(JlyfQuv4q z!e(0d90bo&cyk(r&9(4t2u@IVJu}MF!fzq?lEMSH2PL~`VK|wO%pfc(fbep&-+~~6 z!aHh0*jFP*K`;zdc>Q&_Tn`6Wpk?3}gJS8ZjP+OIa8ZK=w>6r z2Z2kB=pHSyd?Q5c5hMGnBWsHJ-pHPFWI5Q`8rfTpELX(dGqN*UCi{rkX(Rg8fejV0 z?~E*pcHKGqt;VcMdPI2)s-w%qtfEr>S7>&x|T!TJv%!pWYyJx4HZBw_hURxj{|zdZY=mpIuq+i&P;p1jPUE$3J_Iu< ztXUtz30n9B1luY6wgH3>gw#!swyEs;{B89v zCMen5^k4Q}&QG@@ZP}tX8cNML%|lJtdV3)K3rKhB=AqUUehI;66sl>cd8j*ujWJKv z1L$)RRCl3Q;y|8z9D(74tLJm!sU zGP>WjPWFKcb5opNbJ&P@Ibv!IK7Hds!b`CU6avp<+H2EQ2r(DpuPETTire zA(&0YE|{`KV|&dE_FTfZ*g=R`iSIfhU9#9qM*f4ATfU)2@t#q5;DVY7hv9~gku}gV zc?GdWBK`&BYF7CM5mriD1Hi2E14JyZXw?{VnEWWHmq^Ykp}N9%8yuJa23*gW9|hxN z_CWeqP|3<9WuqpM4{dh z|7=i={)ZsgMxh%0=d|!S2%ZJSPniLPq*7hekVdQCY`UYy?M-Mjw&_V=C8uER_R(M= zr!lm&_?fBfGi@8+kBI6n2N5BDFeou)qwaEFg2Ie$XB3N^CLFOFgXlk~BIbEHQkJY@ zo!`b_jQLH3bR0-8EE|Jm9GI&iSPs&I>As*^^$$UCkU}*uHwV?NviBi)3lu9v4zH0j+UHXl$yHKjl~qfd#h}bB*FnN8xnv<-D_CbK zn!;K;UBuQv&I^TM&>_9Vlb))#UjShrn5iMUA7KB(WGP>5AEIx zY!y7Em+V4(c}l8&__j&%)2dnFa^}?kl4KD+c8F<9$eWSmK|BiJ;{ZO-$cg1cx&YGk zSdX|_7{ZJ=1C)fDDOE9tGp1=VA5=1(EBk_A7k1vKAlL^gy%%=-KpfJG^pO4$@^3)7 zyC65CBQ#wUWvk;RjWAVXVBUo#Ne&L`Z5bz7Zq1r=ou@^~{@au~mwEMpv=>Ojy8tH;c>|>H0<;$9F2EQVS%TpdnqMCbd`0s%$OqRr;v0~@ ztF%}F8RCt8pPUv9)ErGoT@Z|+!v>;LsIJBs%IV%1J+ckQ z5FVv*#4Ls1^5sEJXKfQyPqKGFx(!sK_Q7p}E!l(Lg5Wif?!oPJ4{n%=^CckNgX6lh zJ_^C#K&rEzK~7RI{DHA9LGOp~Uv<_~zKjd9 zWC@0aG`}JkxQpiO8^eJf3eugmvjQ?KC$L{IaL{pR4nVUMkfUc1)hZmqSVhqK-En9g zKx;wDp&f`k1iHwfVKA};!|^ol9}MK6<&;B*fIbKkF`U#=eXta&s(tVS$l1Y0Yx$-6 zARCF0WeG^gLjSCKo6U!e3HfsZQoWO*4=y#3|EUk|=8TGy5sX-vh-uL(Z~HL)O~as4A{3F*gi*8^HRD0j&*SumL=FF+in&<#QAOJcIYL z2B-_<*+%wZr7U-)NvN6|Di@4e(dE@BiWcS~$EV1#I_g?>4pG>us3`nce$1G-Gz z4hRQJSZA`I$f?7<+^>PK#5etXBbs890F*oc`!ZGczXfXYP?WWHOnbcP<-8ttA0>v!AOAs8Q@Eexqvp`oqVzn@jU4XFo@9aCD2h3Q3!bcI`%evp&JuGaGN(MVjmdU0wbFV*(oDiYh=?Q z`^v~3(lR?J4vO3#jgX1WLeu3;@x#GmD0(_HEdC3~S8|akQM>5F=n~sSs<8PrerjG#-M%&slFaFf&1V)|*MSU^tht_XE}#0y*p5 z0ni$dnq(eEgr63^Xp)%^BTFz`M)MB?f!k=#S?@WZp9SG24^%9}cBoKPeWM;*-Byru zNc}_0(ci02ADxY!ueq^`9DS)-1+nHTdpFXqs&|&aVMgEhB7KG)khxop9=26?xk`UJO{>XtfinT>$N%)qP;zLgYZO4923m3d_&q@15?H{8+f-XBTt(n30b4D{eq7*sLFnGc5XeVSp}dk_49eui?*qee zMbZRZThOaWn^z=H1S+pcaBD%e^I7P0Te+;#>RpBA>`FC|mWKEgr1F_9Zbc|W$)ypP ze#?R2Rb@Yeuz4^X+3>0|)*ni4(w=-^qi$sbvd6s0O=f1tPx-=;5nU7^@qA}zQE{{N2m&@uE$vG zVDv>7>5W6No<`sAQhL}AHu^tZq<6;JIHO;CDLw3G8vUM&^k%TdmKgo(m(s)j4x>MJ zkskd(JtNy}^vNTumtW~&|A^5SRnrH>Vq^c5(f7NQ9`-L8{qRjuXAFj;?P)JHC%hV{=z{Z)0fleJ}zGWgMT(AjjuS9bfTQRh@wFV=bI)-~!X zmP%EKF8WI&^uqxdt!Gk%kF(duxez>$gf4shDy7QeIX&68M7=XIAkcwF)RJ%=9R!uA zw?+m8Mo`!mf>so&H$nykZel89As7iN?!b($3WS*2P6&7`4tKNojz~@i-ge#R4@(|J z;Mv4!95~t6A}!^_KEHC}E=bpbv@84k%9SS}c#J~j%09nx<$Va=p-{Q9&#zqhF9iPq zX;+@`D_7be>w2KrW@OEim=i{;Do(5w7|5|zG2ON+6FNQdNV6Y{Z8m^i7Xd7vX@l5a zgLo~02wA0idUKutA2yJ)35dxBIMw}68bHl4j*E#Y(m8eVm4TEbAVOu6@KluOq71kg zP{d5o6GH|tI{`>!qNWi*8X3qv35dxA59d`Hc?R(J1VER>3f%{Lm z2R95_o_sxPwC2d}RET-j*fmy_-J3|9xO!dRx7oqWuX3`%tY0$9v zwlv?qynzIUkIu#6&@t;8o#xdzA)&P0k-TY}*U0*Cr7*LaiS9)SL)fP903YDlC~yoeN0C`$gDx zF$MQSxXlR65K!A1U}hsS6C?`u!0I=;r9u}{rB(jx5Z?yCt)TqFU>-(fJE-kPU=ASi z6o`(uM=|J(t-@3~KHhK7W42dA^*Ug$f%412{1cJSX_q${9I=)P8_{Zl-`+#36;R0* zct}jE`Cw{;sRa^wtaf5873R=tqThaxR;>0SfLbUZtDR~~g#`p&hwpDs1d!F<3!okf z=t3J8LaoEr1WxkXZ3xVUYAisbLHV`8%tK@jty;g1G!#~x1xt%NXpyoN&ocp7M++~Q zClPs!%mo;Hj>xBEz6Fzvy+at3{|T6uh!lZDYy=$OEU^d4aknuOp`IbJWx;b2qkg@r zTF;M4k7iZoKNvla2=G=DS4ag|VgSk4RZYLtQQu+I#YR2b*mHGM_L~i$p8=?gO*Mln z^$w%Hp_-c0ms0OF>f5WSx#%hNGe*7pqTIP`D!@wyaNGb??dUa8=}#K{*{XUJ-&x$h zF#4oPy7Y5cyvlQE_;o8)do7GwB@c5}4|g%Y8GWCs=2i587TW%Lqjzf0u}?Aj)kd!> zuQK}#qkhDwoyK!69`cO-n9)1#Iolt6Jiy0WerJqcpC4hji9^H9f}E_&tx`sb;+>)3 zrFv|bK{Pf9=OzO7662xbULvkl&T_s4V!r+}&JpK5t*!&z_T6|9nKg#f3s+*hkh==V zi(UiDdD07SZuEsE--zQaw4vz!^4mW-x6f|!rRdvdW$kAIu@ZC`8R^?+%Y8O)pV@1- zEfVdi+64M6pn)p3{4E+ zLjy3KdB3ACH2Pnw>z&Tn!Kl-(*XhqiE*J~F9P@Icj~o5Py$wG&r~Dgwkv`-kFv!wlzWxnW z#)KVMl9(!Y8$kQ&fW+zg14cjeB7KG_;Y&t;qt@ekD9u9U_rp!i-<&#n4;bFw-DuKK zjclzg!|_C;dF&4wfzd*n*NjHDJ8e>o=F2~5ni!3Z0mjax8=E$*ji$cQRC-WuG?y8T zo@{9|!f5*aL4!M{%D3zOpjl}&Hye#=PgT;*MsvT>sD@OU-A41I(NucVXXKb3!ZUa?*Z>Wv~ zcnoy;HDLJkzv))&fe6EX72yFI%<|cJ*FgLd7#+T0#LJk@EU57Ql=uRaKM~A-5%~oq z@@@u4tfj)YX*Jtt|BY7bp-L&j4LcAHl|c10_95s*d<@DfMUm4#1Er{eVs&qg11xQX zFBe!@G7Hn)=z56N@ul&rRMy&Z{a~V=uQuQ2w%6`kR8|lKAl;YF8?~5C7v_Dv2{$N_ zj#S|W#&UdimuYb20#tuO($|A7_o5=~wObbIsw2)440q6?na`d<3s&7NK;KLYR-L_e z6D-QHFFHe<3NJ9$*=O&k#SEzK19~GUe>|AS5P6i$HDHb)@-j%|6{8YpXsIxOLd!Cr z{R@-02CB~i`ixe+!TgHI1u~t$;B*;2am^&2LV`5JLr;XMOyY8%-2tm*{%26-0n`kX z|2CL1L^_js84Qlvi$Nff_v(Y#!m1<~HewRpefEt^;yhH-0h&syFTt!tWI34+z-&PT zcT14O25>aQeimT?lj!NQ4>O5pp?V6S{j}N(<~Sn9$ZQAm1tOlp=IDxUL=+4b>VfGiOFn4h@I>X%Ztr4;L&<_UkV5J_1 zt0DBa#7jC_XdeAwWaB8QQJw#ziZ#M%B#Jo#d0^-4EJrL7zjV<|X`H*HYs*Fa5Hv-t z;AqbJ6wDdld&APz7AKHEb6_BEfJLksxL?pJ-9wg=kb$wnOC zwx#VZJRvN*!$xe6w{E`-&Q;^fGVovS^``QBIh?!3M8QAmZ8SDh%{+@@r;r3I>;vQL zf+}V4<%!q@=<6Z*e>u+Zn^d?#gIwQ+k5OdGHNvKtwXk-)h^0b#7nDt_DskHdVt&Y^ zXH~JXDR*ja5Fq?k%C#3m7NA~6KsgA?g;kXzJ|1G$OMH?OxxtA{cOtV*MC5F(j|!NN zy4!*3Ohe&5X59_OEj(RUH#v1RB=$BCEc$m&eur%q{UeB3IyY=o(Y5$I#4KIYs$x|- z9JW(;BYy*e{&%Q~5OE)zQ2vLUNYq3`&VT6bP0G}Augq|I-WiP&t2 z+30Shp-N7%)95Rq#fV_->(}FVBOY z9u^_$O?|E@d+(UMT3G!A5K@IHjMeno_aevqY^a`t;j^I2i@;cGN9bvdFbki4Msw33 z)vGrc*;X^mJc5eQ3YRoiPv;i#I{@I3@! zact*J#=W+3s#VyZu?(->hQRqy)dQ%G0@eXXwWY!l1ZH~e>j`WLRZDBOFhwMqc}FS_J_d3(#l+V=NqJsJ&3JnG!QpF1>pa4UAS)QjFU%n3U#b zp}tRh!jjFv8DMUU2>82po5)2R0>IaX#kycz`{sYiY3dp87 zNwo?;VeA)=eV9Nt1wIU;Kirnbrl8tV;Wq^S>ai~n$fjrpU=Bz%MJXa3Kq8M#L9C_1 zA8GYpkDY}IQ%x}#pg{!2SU5ICd#I{61--jOQ{ZwPFO{Gv24PfiWK2amveqJ}DGpa} zit#{5!EiofFM90Vbb?K>3x+#E)tiDaoTWgxmbaHJ^OTWA`DDP2p~h6$vEr zx`3k^H>VN4MBv*V`(^@%L)8$V`k?#@Ff9>@DJwQ0v6c#t)9M|M{dZci0s8=S1+6%i z#v(FWS+N0$wN!YLRwq67X}x-8R1-iS-a-PRHx3ik<0r zJadHdFIAP8!Xf4?{Zdu2vKfNM-cWK0`|4sPHw6{4wTRsd1eY+0VyG2Bc@p0Sv6|j@ zIFVgWWVaL9XCfl!+8RjU8q~~zW=IXS_aSTM+>K7x9#y?-9|cMZhMzDt)??p_+*Q}E z-3E8GLDjo9VHm~;Pt#z$>Dp((;Lbk63r2jB>9A|(BaP-D)wMe#QVP;tn^;^Q(UzTK zg2$F{RCVn^01Z??cI~=Us}S!e;KJ8qHzSZ;8#_fYNdeilsm9q&gargn_t+x{WY=B> z&{B}<+M5u$S6Q)Z6N`lhVJlkA@Yow@#jd>%puMzW*M0?&my{K|HnElpJJ4#T$9|Sp z?AoUQ`h>t3tAt(qU8t&eZI;P&ZM(E*w(2KiFcEgEjRs3c3x1P}z76xAk&qmB6I!qV zQj}SqR322q4LE(V+}L9-mUk>t*Tw;uNWriHV>ups_!79qYvWj3+`|W%Yh&D+RJRp~ zvjoFJS~T<6YiYr2<6c1bpoP9R-U5sLTTpexsc7ev^W9PNT7#<@?Qiq3y~Qh zk=G3zv6c#PHozzQc(icL_O26Nz^?la0xOW}9+o+!UgDRJvUZSeUxKOj3QPn(=T9PAt*T4lCU*=Tx z_KT|e;ftzzAtR(RTF0khTCYd%WeOO7VO`T0FCMN z;;N3qE&O&Y!ZgN?yX}W*!KywC^dXR{>h};i3DQ+ftc9;ZFx0H-0P2J4DpmcFQ8oU9Dwm#KqN)dSnH-3!W;L^CKm)9d5fFtytCD z0eXZb=0W-@&{Ee3-QNR=v*%imEIPu zFdz3ud1F_-z;voUq#j5=xC|fU#+{I-;j`?y9BqR~#X^SNb@_o!T=U0Lp}ik-R$VAj z4t&GbEiy1@A)X8IWmUyoMi$_Dy)~3-*AO=mk#mT5QXg@JCBF&DTxEL*`mbxhiopt1}6M4yr9CaecO$49DS;#eZw#y@VgQuiD4t}yKI;})iTxTOT*Okie_2Q;{ z*^`;z=ebh(xnFzj?nUkIg~=nJ-K;ouRDO}mJnQ4bJgN?XUQ4JKJ8C@4i>-!=eeye9 z9OO{Byp`aQ3e3$YQB*bPghowUXY@xRr=Ef=1Ot6DQKlMDSI* z5AQ(JacI<#o2rBMQp<4@YfnXkm>ZHHNO5!2dk0JPwLiOnZuNM9c z!4DMX)P%WD3p;eg1`E{w8MyKr=*e4wI2!^YWT{U%-wW+}P;rKYFl?!BH=l&y1cmA| zB@vDM8G`c^st*GsX=HLKPB((|3(fd8Jdfj-LeK#e`v5ue^BJ3vE89UoSkl+{eE4%E z?qiDFuYltBl-O5^;0XZgW(g!kr&))^>Mi%C+LZxF{7O*qJ1lFC7EXa+JcV;IAk5Xm zZ4hjxP`x+XO#Ama1n*O*-ooyzg$123DS~3HksCjiFbJ(ir}eXY?U;5NPtGtqz)O7C z6<~f3rqXx9>AQj`q>D(j!75;Pg6iCctW|dypc}a>vh4)YuU-t)!U+&uOQCx8;wmj% z48eSm?hb==BR>kk-zZew;c6{B1;IxYe#4PC*oyKLeyz^f;DF+EgKw~i_HQFLstYc} z5>AcRS;c{C3o2Icd`{59t0Cw^p?Y0tq81`Cu?1Af7m%*g+5ZdtIm-9~(j+a5bislQ zijP2kd}|I>g4ia|w~5@>>NHD$D<-K|bnei?J`nVxPz{E4I@Ki*ECj`w4i80$_Qw#L zScYe0tAYK88|8mMC$Jy5olHQDyRBN-v<&yUKziIgsDA>3QSM&FHnkK`XKThB1|AY$fOh>W+I~fX2cGF(r$-~>Sg=)bph&iMX5ls9nkVK z1Q8&ZEBa!5cfx*4S9~0#hw$CF4)#~MP*qvBnxf*cEhh0jKbftC%OF@tVYvliV=a6Z zg1=K3Y5-vqE&LRM4?#RExY1Uf&yOK4L9xe?C(l&guRW6Z4#WY7_`S@%Mij#tQ6u_C zrRb;;oirlM^luo^*Oj7AAmYbU!)sK5^*8%DKGnR#6A9k{K?gE4LL#^G#;CJnG+rHT zagM^mMRB<{8eoi&c?cpN+?cLKDgzv>Sj;;S$R^dO*Ih!5qowIk^DEdpoh;Se@z_9! z`PuB}jg@-n&(p@EjN${MP|xpq$73lJKf~gDRSULrY?aX@t<`OxFgXMTYoL)<(A)1I zVqrR0#p0NT`j8>?7mR-NCG?!CV=3KGp5eG!HGmoDXgQFL!ClT+XGECcy2=d46ORmc zYLWRac5JahK3$1i1`&J5aU()|tums|Dn%QN=)4i3fi@YD{|;4t3DHi7*gKkQ(ItAv z<3P~W4#o(%9W+KG9HT$O>owq*@*;&w5z&I)Na@FKa+7lB(XOL(wu$@W= zJ#PS4Yrri~-bg^Vyv=yzfqmB*kQ^gjQ`X~wbvp>VcCVso+XKu#80-b9gR-=7DNB4i z*5{QWJ0F(npzO=Qya-YUWj{mYQ;!qsc(>hvm_wll!QX%AAa(#EYUzhkDK1nrZKtNnoKLoCnq zUWdp8kaqP4<{}uLH&*IQF9woW2vV-zi^$y|EM2hlmWJ$`V5w^LU0~h;DOdl6$T^U9)yG`${VjaD+*m1B zeb_;HK+4rdh-842tCu0t5`;f>=7w(Cf?-{dyjHp{Fk9XsEeEV8NZlbFg~$lnsWUgk zT7qE%T8)>ktPKG2=KmakW+`CC1882VRcLiYY@YO%6Uevd*8sFS0i+sN&Ils}&X?X9 z4sa(xI~34{St->j?8(?2(zBUBzQTAIphF2D)s|p5kid1)^P&U%2%rxLjCVk-H)@4Q zXGD0-8NVD69?_5YM1-d*jJpYuDTwfncYG=$JUkVji3o3d#OETyr?l~fi10CJd0d3v$DSZghdAD<)D){XB3$O4&_FKAgN*2vO3?@-`p}3_?1@Hnwo)|Ji0pe*O>m1d z+lW#tMT?Cn*NCt_E;FKdrDy|0Tr#iGB7HuUS2%i`vlVJC08=W{-EAyxGZy;bqPm1) zGd*Q2wp8YE%!nQ}B9#545xrnUF#HH2egpnpBf|3Zg%N#IX?WI%eygqu9 zE?ihLt;Ut2h!M4}6r~waFC&5z8AdeBh)}gTM)W5mLOm86(NZI7iSIl^#Qt}m7FG7Y zsZh*mgJnxAOb>~zH27Dm;gQ`WT(dEuFD_O*ZWO;?teAvL2wJ3VROL5WBdJG>qUd79 zTwEg1qGvTldl6r1t{q~B5aFnqs1f=!IQEec^R?YgRmK17*lC8nw;I>k*dK5J?AN9o z00l;Lq*Bz%h(0nRG)buuovRe}g^11T+N4_?U1hKl)ixp|KgNifRf?toIjh?^T;H{sLyAL z@}6OE%_4Qxk966`66j`;Zi;!ksnQSPjf-CGFqM1rBI@@~@ha?lHR1k}49HH0krg*F zI;+#+4$SI`-ZMu|5`4Xh*1+zn2W*EBu-ry!Y==<$Dp>4b3^peU?C(KfxsTJ>--B(d zV6lfZSUh{p-x))3oScS$p^n$**VmX%ATEZs~bA?%ZQ@K^mK43MDkg(My7M1Fa@&m3FxG*Qg>bTQyjK?i<3a9JI(||`9MDa>uu8jO%j0h zc1H~er2w$P0dz|MR@kKq&?8(MfQdHz8r7St zI|Ag3MD9-@UzDvC@^`K4rmJ!*J=#g+sRVMTY^9L9v`&4}MU?-wIgksaDIB++y80IA zbVU!B3xKIiiaTAcoGOd8@Azc};TlIJU-Hw+ak5A&?`weVc~Jn$YpEQ776jW$F~yqE zPNceiN0;fboA~;~^W{8^uU{2kUw?;2^f=}NvORk|-}lqV_WssPS@fudHuik(gOV@d zY31iWqkK6J%C+n%JWZ^XYu#-teOl}8!7A)IIaL7%E9S4w6mz{|IKd!^rMjk5Py?Qt zOpwRcb%HgkCRkG^h-nj(kH^PplfSN|kv><4%B+2^D^v!2G7R7_oxvjXKF<;M9iB+n zW=CvQoSv!{kJzfwd)|W~380$zL=V{n+$NfxOPFo4J5}bk$?mIiTU4fiqjYWyP{BZtuB?wfjZru zsv8Zo)X%_*9%ry1c-%DO@1|)pw^gN;-If{JjX848amevxi$|sp z#H#Jnj>qxnb1vw7cic|pYbYi6VvU7bt;V>QD^fuv$I6sYb&YNibfR#+7OJ18T?D}# zP%&mrVb$@erS%C2_E1<-7s9$)_$>rqQ@9rkqg77}t)4I=^=MD&886ClGrZ~96SWLB zR?`O4)}xrtx=PR205_gUzEz`<hiau5gD2I4W>y($E+xv#Q8tUD_H^k3hp+rSY ztS7$?34JeWdTqdj;~VJ;t87wT+})IK!%+9-ISKGL`?O7-t6il{fh(eH`aT!{dR0CA zD7Ta)n0K0i(92q4GR7MlZcL8y4ODaJw?ceWDi=px=(G77(+eP<_Z$oE^8Uhq(i6hc zWm)cc0fp|T;f&>T@5euTErz#MkTwR^t}7AXr=}`kD&(1+vtdcs*sm4XOaASNj z-SbG-<8n`!GF^BnM}ctC2!Ry-H2VSRk4ipXsSx&qGFjQ+XTWjjK-k+H-WBNE3Ht30 z?+YG9$?S(5J`|jV0ck(%@X^5KOmBz7r-;xU1pHar%-z2fI~)H53r_$yVtZxJwG;V1 zg(|Y=IlL>-siK>(=R3SF(B+CUVJ~p_Q1CX?wY|_zz6r@%STFDKX?o!-9L;q!tW(E03Tj(uU^ z%Kn{%eT&1F1bVO@mOJ>?!Ou`=dxgWtgKN=S?Ui=&2IYTg@EPWRt7G3ixRLr*b}}o= z$|?^|90>k4ZEt5SmbyvjK&zS*_k{bPx$V`qT_3Hg+Ixeew9%7X&!d-wy;60ert&a! zkw6kMk9ZoRM@0VYK|Ya(=!LLHa7U46-v^LmQY^ow$!K&%5vh;DOJR?Jy{n~t9Ezku zccK3=bnz&cFn4i?9S*-P9OYc+ZfRIo^g4LqZev(qv<6zy9XD(!S`)+F-O;eo=n-l= z8#X1%x!K*-uxU}QUhbZTO^+UTfxW`88PRdW!B!YHJIc>AxCaeTbre4jF5Gu!{;t?~bOPoI_g#i9jq;P&?t2Vd7M;oJ+i2MC(LB0wpJB_R zg~-r-zhV1E`Gq+50}b>v&_B8l(}4TI2D%joMg8a*IO((ZADVD*_LN9amz?exM@XZLtsa) zLg`$Q7ublA#?X2qJ#g`uBy9dflee998;o6Q;yZ+n@9k29)smFqy~ckXETb(km3W65 z2SoH!baC%+!@8nZ3QCO4 zM%y~N5KF#yRc5l%#-okV>AkBBTN>q0F?rWyur{r%veYj4?IiCV8Ozj=7?awi2iWz7 zosO==Smi(W+~Go--z|q^YiQ1c*j-ZyQ9e4s-q@7xf`Hb zDtH_*q(-Y6F6LcFUdi@d4(Nw)RKD#%q3Mq_y`%7R%bYpo1xHhhb)^DeMiMjL!DRWI zj99(ZfE$?2wGOcSe+IUo>mwcD-2VaS6HNVs_*WE1hAt8}kRLD+DLsiqu3*+1k#)oI)9~FxDGS)Ve}Z%} z2%{QKK`S!k8k+u8X?Zs-Pe7NcEPqml2Oz{rEp1q=4IiT6x0QyU(J&lv48P51j^1AA zmLQd54{i7-mf>T3t`U{Msw#k9_J?7ktFED@H9KK{2z!IFQh`_tLALDY|Cjx5k^58O zPjI}koXr|~OV{|%xO>OsmNBUXNGe@`I{-5P)eGKFYaj&b?;!&J%RH~8H%~WV3m=8> z1yG~qEZWm;DRY(MRS?LUyh+)!L5`ockhKD3F)0p+YQAO53OXtijt-#Z!`1V@8s?I} zlGtbs^MAOA@kJ2M0X3SWEIKj&C&2HaY^lNxpzM3_UxKtxe^x#KbAx({V_`eM%k z(nT0Oma=}}dx3Nj#;PJL2fq}Q^$K$2ocaH=2ufMA>R*u9^+X`8zHE|5T z8$b^uPpKU#R*t*|!Hb~u&d_oOO~*+0ai-0}6`+q3G+e`@MnrIS9@C|G9-+B#>|3la z9Cu^S=lofyl8Y}K)wQ6luk&0DU}V)yg?GYr41LH-t$i8d?tTc&#igqkF?G{sD3Q8^ zG}oIh{Mw+f8rHs@8h!of>I{)xGeUb0uT{KW$pr1x$O-)O{TF%Qr(yw;J{PTh_#r)E z`yN2tC0vVXoo+u2kaLBruW4PprgashDd)a}+Qq9_S4kb_?Z1Ga9_IG|%i$I7AmZi{ zCg=)fxUcd51(Gl~Uhbix-vPo_C(MnPd$?g;VQ#$KBMs{dbK~V6ZP-wF1-4f1v4)L? zx$$yeYuJ=9H(u@uhD{4|B8AeHX=qB*65Zdkr$zbe27 zkf;Lqg!?Fw@3AoXsg!eZ5H6Q19*;bo1Zi7G%AVlkS%>y5kEHolq|lu0f& zb122%#QzZx;RssKpA-HLan^4Z*<8cA!Y#-)3-ex#mE{XhB%2rRpx97&2H6(jVTz54 zsAT71O3BOvSuuyGWG7+@N}7BV^*2G3+*N~qOn_P^Kq^)hgmy-HbpX)mF;ATyvr2A? z`i8y?Qr9keRcx(5vhFbu)EEIlFe~#0#HFmsFNnz2b+*F5ZDZhOq|Bh=^15z&%t7pN zB$x9*PrsD=Ax~z2l-UX+=y@(Zd}z|NVR2!LihRdR9+lo@miy4NMqwbjBO z=wWcR)wC1nY}hpU47``e{i+s2<#;9v;!u}gBE>qBX5bg*kJn};T!EkmsE+#KljE6` zEkiIJRQEPq`pM&Ytf!_GSQS9^rjEsr&%Y65^ZW(;Mo>+)V|lYCi)*dzn_i5}9z;10 zBd_{6Cb|IgTL&XMSt)DK)5r`)q{%kL$Z)TA`wS*Rx?U5T4Y>znNxQvQxqTUgF_3m~ zZw{M&4ESM`eOkm+N^XLSo4{|NOr1R5+ljsB1o&ehU6g&QD53rstDy9sk?S)^>|taG zzbf}I_4Uq6?-%Op-Hl$->dPxF|L>w9Hb_1;7|QV+Jy@s9aTsEjv{0|^qjyqL33Nc$X1Errp zj^Cgh*CWIKkL7r;vK(hvjwOCIL=QmBvRs4Y<>5p*mZY&9iy)i_YH$dMWGq!CPi#~# z`w99q`6iRPPA9bL`RSfEsQEA`A7|V0UGjczTV&cL%%4U_Eni zePw#TF)f|W;B2PT2=~PrfEvz+R<(;52(K-%4RfqnNk2wHyajs(HRb&M2xBaJyg6!{ zMKcbaOW%&Q&Dx227w#^U>sziaeSg+AOXw78EVYEX^etQ4ETPMFTD%48(l>ft`VOzF z$~|4XAWdbk4Pei11pfee=?2!k$MDakZ`=7?ey%dEf>Z($tBf-F*)hQ?a|UrgR~dJH zD&>`{jGwEFyR9QNtBjwkjJsQPsqpX1fV97nI;)JItBiZ3kvgl4a$z1O1m!hWnd=bu zbCto8NV!^Nu+VXp3Ai>>qSqSxsu-+#C(VbS!IG$Vfd3>0Md%$gm3N?*Rn8@6%+#5} zdzE2j=tXJ=8P*ErFo~-TYljNR4mPYSJYkIRUgI65Qu2h-s2pNgUnoR&s9^)4wPc4I zHWb1ar*WgjN8fO7Idp;9PBLst=os0VhD{4)-2!%&VbengXgk}m8KFL8=NL9Sw3O^z z!{&s}F{ycm%?sfp)xta9u!Z4S6Q&670xv5Dw+3;O3;uiwCc-ZAJMK>{Bz~d22i2OC z;$7+=hYlVdH%)kNR#Da>8Bbi7PBLV`0?0(O(B+Ieh)7iNd?dHwpg0iBK^?_nCZB z!eggS72eH;trhxV9<=wHe9}UTv5)YHF|lEa^c;jPFmR9}tj!9o?WFiu& zq4u{m)c&@H+TYet``a3Ne`|Ap>r1!W1DeEb(-A~MX4~|>azcd6wn?+Dkl8lzE+w{2 zA+v32uGmn>Y@2#1HY#e$BBVmo6gmgrnL|xU-aCuj{0WAhpf5X(p0&_k$pSQx(`KaPt(%%4A&1T3>?;Hi~Y89q!I> zsIP~@OboRyL(2rS!b>%FAGz!Zdk`$|BG)+77|BbSI+KuEez!fyBQjE%hD`Oi?f&Gp zlB?}?+jK5%=SOii=0g!SxJi*Ge16rBym8^or*l;Wb@mj8q z%ua@;fk$%pL`@GYC$jDo#LmOM9uILcbJ%^up&%OLn$@fi$DsVX2l1& z?HeqAcev~yiwW7DY9$kf@#wz><+7(ayvy&c34Xf6`}|89gP-B>p+Ju^Jj|Nu@XNXabwHhPpeM8m8iQ2v&es|*rhnXVv~ZmJBxsb;~}6Wy5OFWY45aFy1nuC zMB;A-=8OMpdwUAfaKBHun6H~b)t2`Z)!|N}YRh{{>MSFE2IbXS-aOGYE$@Z@VlT+I z5dpRhTk+4|*ZYG1YZNGOWrgs*lzby(Xm&j6EfU_B4eJ71EWEE6))(B0GI@^}HWb85 z8^U|ku+d-_Tt0hWHEc?-2iaqWO$+uR`mN#2j3-o(y*n$kI24j*s|bf zWZyGv_W=5^_kF{a<5VNs+WUe11nMf3=Ec+Tk?4WpE&$=_xT(PipN@O+bX@bUFrSWl z@pN4Cz6c)@dGT~y^Pvczj(hQRT=UT|pN@O+bX@Z(B8gAOy?8qQlSH;r?_Z?BA;_TqX?C?JQ9PfR~_UFMRv<15F z0o&M-FBaaX9o`kWk&W|=!}}s3cFJcRJ{0C)IOwp^aMy0&pL6(>$ijTU4>^2VWGVUQ z9X>s>793W-#W6N{1J!8jUw_#9lkVTq3yh{I(%8UjOib9`0kMn^`L*v;mgB)pg!)f zeIqMbyw@GRf8-F8f5YJiMP4NTro#_GE1~vJIQ$6k#Tb|lKSm^d%4UAY#vuw!acrS7&a%!!xh163~LTo1V>o6R2DcmPA)}plGWjgWOcYASskuOR);H+)!~ZdDu*kA zldXO*aM7xUI$RN45uM>fK0I6zytN_YSmJ^_ToJsj0V@lSyMsJj5xl(t8v$2PK_0FM zu5GYJX^Hn!8%; zxFUF;VatO&ToJtAuziC(ToHVrfu8XC2YI+6_+SIwii3hYToK%E*daJp!IdY)RZFgb zC#eh|yAwXwbS(g*4p#&pwkYuzhFbfF`(gh*(hRjVl`euuF?vJo4eJWx(}yDDw7oBQ z4%HHJ+CCKgx(QgPv7^E73GQcXQ-U%Mw!dN1f^VSC>=YXJMeuV}TR3J|S8zIdM7Whyl6mw(Ca+;fNY2FAaV76X+?RX= zVKn(P!i;48AP{!w8{tfNfV3m93zdh5O8;5JB5dmL2-%bj+B(9~8y+c}u=3H^5l(mE zQL+iMLuZTd_s+tjWz+MD&xmk%hsVk$roAH^-{Enx$pgy1ePsDa@Yl*F?4(v!he+q^ z!H<_snk&96^55~`C&(s#m0oxB1+H6O_9hP?YQN;cDu?8lgyP-8MV%5d9VN7ds~+M> zLlA^lNP7Shtm)#qk;XfB?t)acM|YkNsa^Yc#~63+1|gotJ9k!oD&=qh^~vW$X}oi1 zwRNQEs(e0_#yfXbx9U=nwl4$H{zmHDxl7}nJ8PtoI(P1r3tu}f;LhFqbb)v7A_b|G zSA9NIr#;tOwE!m7kVz%rl1Cws$Mu zHR&YUCaINlcY;~n{(V{rnOB1otCZj_16Nyf_4YJ|FfZM3S(qPXUK7KmVZxPpd4{_Z z{a@zSpkq?jTa!;NQ*-J@S|$ddYW0Yy_k0Gm1<4QrTLWc~1?u4yxa*set4D{yz0Fh$ zvNh-BzX?t{Qq+5~7PT#|*6BQi!pMRS#xfi8j4Zg?a2(vSV6@?QheH-+Zl!^&w-=WI zvb643=sw`~lk4Pg5g5wObqmq7(7Bmk7l+%99wN&OmoA63#HHic9x0R1_fpv)sVu%o zmtP|cd<9KGHBBnFFHpaRZlBa0>h4t2MQvDL)@oprfQib0z_Lz)j{u$!PRqzhP z6i%1GU<*=U_Paq%ppbt<3R#aLvxUrAg-aNFP@85;%1Ub}+tb0@;NU?NfyGpJ zxX|)h5tvYj@6RH91;iJ||HafYq1u3y)-$z?mf)ziRQLvgcS?6=8N|B*c!VHSMH+LO zgPc|Y!6aXTLT+)gT1`8_@NUKyNzX8-R90UBc!sHDF)OMq6>cH$M(MtVKxXF}gqZ*& z8t;aRZ$LG1ZqPKr4Vq#+u9TBnA=gQ8V>uuznHD-lBY6eA>ke^ih^R_OIAqLA42>dlhgc%$}lJg@+kyAboEUcpp@c1GG;8kAkDxQsFTIvt;-; z0zZc8I6%h~@Gsz~wp4hMz#JKFim5a68K}Mj=!^n>3yx|_g{KJ2m*Ktya*OY}8f6BF ztnL6(ZK?1Z0!w6I4uRJ|)c~M$1$-JsQ)(5S*T90U1RjT~H9)NtusO`Awp92lfvu$f z2!U;(ssO030{#v&sx1{pIh@)^|I!oyBLGeUXdI zl(FVA^1B1<3{YtT*jE7=_Ghe6Msm=fRn|iQ8cbmJepDEzVvNYutcBah;SEP?9@T1U`nNDSyHX7IL0?t_TH zeFQy6&;f9KCn5WgiHJP;R0*{nxr<2938KFsdM~)e^f_N{V!r!4awkLt(&c=aN7IKr zat9>TXz3zK@Ab%sAfZM}UuFuodgL}psL|5qbalQ*ZiR#zE&UU*lRa_^B-Ci>d}4=r z&h9B z*_=l-tSH<~!3thMQS2rTfCEGWnuL2OK;bq5ZsQBQ9A;X1Tc}-oEZarJd|#RafT`mP zJ--q=hVM0VkZbIipu&oRaa3M|7nzkSoclE3nm~8$N@M!k*8y-U(}2E#o*Gcm3V^l_ zfHRW@v<+xq3qB>Fg#+LmrvWXTEN-O_*$#kHmIh=yfZt;P)Nue@Fg2i#1Gs=Jtb6hP zxhh2q0{GrEMBT}t-rHb1RwxL&oiDU=3D=O@Bkg#RBMSNcs$0FkdOekVGZt)XGO*{( z-$K5{>Q-;Da<8Bvc#Bm*3SLIy?wj$_oAQCX4h^{3+ff5H6Oiu!IQwWoz60QUaxT6n zr&375Y}118$w5>^NsIlrDW(@SF}^3~!h3Smz&~Dgm+(C~7vGap31~dtk*mbx9XW*; z?XZWp#6k=*^ZaDRW%~KaLEKMr{tgTWsM^bLwp;#&im-~*Ki2{{Jk|9vN;2KmwFSN# z>$<0r5Hnr(pq}R8c@g$Pt~T&#q3g}YIHTgeix)}mX89O7?zPx8Snlaq+idp;EDA0+ z-%oM72SDy|zlN=?*ZtA|VedPjtE#qk_uB33ea=27=cGUqLP$t}AjQx@BZi_znxTk@ zh^UB&s9Z!vMQn(uSWqliv5R8w4eM0|Y^c}~6+8A`uU_Bxt#VEh;{E@Byf@w(Z;YEU z*2((joNKPR%3gc*jp`hDzaXWdw*@4-T8MvJ{ z7-p7v_^_na-W!A8a_`v+bmF{1$W(aWz+dU@0)Izu6}o9v9vj$d?+?&Bc@6mO>^+9r zk1k#hj1OwO-%$0sdOcCCxASU{C*8b~?v~ZvdmA;Zhc_6O_w*hrMfrM_$eCL2G{o4; zTY)_3?NuW``*=?vmcCvCQrgd(0?Gc~zOa9Q_X6@{pw}P2gS@>RYzg=FMyhx8?n5kf z-ZRLhoxDFRTz}?GM?UQAl_G4tHy_n!h_?)}4D}ko9p)Ve?r`tzLfjPP9gW{zz1N{_ zH?N`+{bO$uQo6e*V95w?5z1wx_X_ln@|HkywD&PmH^$opdZTv^@^h^BCPIz#-atN# z_m;vx!Mh3mJ-u2qeG|QNA-|V57?ergG06G7y}OXE$=**W{e8SqhjwH% zZy+@6=PiN_xFP_d_V@P3<9eWXS{yshyoZr{2YI70=APj_g4{dU`xchW^bUcwhj`B- z>@05z%JfjrgZyl7C1O9!EDHLEp-k*m4ywM{g4_Ijr_a5x*b6iOR>eBwN3RX~TorbD zmF$6kf!tTAmWF+9m38`-aCb#85kE0raG+NSL$xp*C;d#gL@lDlwe-E=ztrFu_I1D? zHQH;#mysh}8nM^Qn^-Y4mkTZS(;9MezPDvRqhXNZI-&inhEa;^g!Xe9rc+!ew4c|o zFvWF3dxM6>DXtURFKAen;yR)IqJ|Yot`piXX;_`)I-$K$!+OKNZH^p^A`!x**rnpXMzpi0jitB{-8yeQ9xK3!lsp0Sx*9q-S8a5=cG+@7_ z(J0I3I-$MUxf1!8S8QXQaCa1T8tV%-)(K@nR9P9W6WUlORM<^(ozTWQp~69i>x4Ge z2^EeqTqm@#PN;A?&2>T>>x2pyTKQZjw6RY3E^<3g>I`VmWgAR{Kd;8ddLG~V8LsEq zSkF^|tqj-mY^>)g>}I&0XJb82;UL5HJR9qI3P)+K=h;}#Q#hUGdY+B-JcSE0T+g$y zo~LkehUDo$bDWf~$@D?9WB+FOwVCG_|33}xo4K6X^1HzU zGb_67me;Jb}7`SBsr- zoB|(pWs!~J;%6bBGCVGB-68^^^JuE-R!GT^wl(qEn7 zadCT*!8I8k7q@X-T=BbS2BY6%FE-(8(>yM27gxAW zRbCtySCyka!{g#Mj*F}C4XU!@xHvNl$Hg-|E^gzvIK#7WEcrshJi`zIZ zzB3-hyqPu@*~g-d!9&^0va!gnA|~!_*;r&(*v)W}-Nquj!a;_M>^2tJ6^_!ZG>;pY zPIHkR=b|;cFvCT58;k5pyg0)}b{mWA3YTTL$ZlhiUEzu}7ujtrvMXGj<|4bj*5DeH zJM?3bUGcl8xyWu~kzL{1%x!Gzu*j}(-wYSoZ7i}YJTSvWb{mWA3fE=0$ZlhiUE%tS z&H92xc7=zhxyWu~kzL`23>VpLEV3&+Dvd>U8;k4;HfFfUZex*M;RzWovfEf>S9nr} zi|jTQ*%h9GrW3i3MRtX!0r$pR&EV-)J{Q?-EV8dcN#=F8vA$k{-m5A#tgowZy40|~ zuCNP!AGD|knQd@ zVl0TBTx$2!QoGNkc6X&iX}#30rM)iVEK18e4Lo_LfhX@Y@YJ0K{xnonue&oHLMBLW zaTkNg)p<{?&ikA{@cKCygAt|u5uuBmNS%p3v_C3RZw@SFbOUVE&`pJe6EqA`f^f2i zk>$6;d%~Y;KdLky7*3?d+t4fX56WtMl<<(O#~be_K; z>L9eN{v{d?Ow}Tr{mV40OLf63-@ih``qUz-x?02GsR>Nj zbs9FL2B2;6Z_sd5>M3UAO&T_)4yXpaRl^CX6{rdR9U4wbUEdY(ZVjiT^6+5!_h~pS zbr70o|3M9>r%u7R#(!ADnW=Wn&&M>Jo%#~bnE!-^b5g&ff%Ko!a9-+tJn{Z|4dIMXZm8ZtCgrfc-TLQsv0i*dPs~6qlxAbsDBEeq zy-{sY8}5sqvRr5ldTSvo#eF3~KMma!_mu=jW02y$lE7$;QU%D&U}qCSiu+1}p&AxS zTZ3IREKYG>NiaggvK04~1fw;qNO50DFiykj)YClx_tdZ^#eF5gJ{oqnd|uiSOtY^< zO7s&Q%n&P(98c~m@#MY|Pwp%6dNpME`Y;@G* z(sXcE2l~y*bZ~Y#GmDQC7oLN2%h`NjUx{3I4wjX3m~L0~OL1RGa6yL)WY~cz?kfo{ zth_ZCPabHPrb-8L) zC#1NqB)GO*HB*yP+*cB;)Nl%RlyIa{gj>k2h9zzJ1KO>yxzN23!0(1S7u;Zz64izS z!(&jeDefx?chH$`rMRyo+(|<>#eF5ADf=MBeI=nO`zXbIC7~(obn0sgkJVudQ`}b) znr5>&#eF5=UIlFOxzyhV|3g#Q6)Em338(6?)hX^P2@lY)CdGXv;XyhqY6ka}gtP1i zk*cU6d?NgbDdA>=@TrdUn-UGzRWgw*QSK`VpRQC{**C>~CE>Fjf0x{Wvb@9RD^+>d z$?^_g(8Bey7{Zq{9FFYdm>OBjOy$0k@GYAQJB2O>_fc`YHk^-aOijd3JonI5;h~G? z9y;EE63;z!yaOd}GCoT24wQJk&VY1^cc8?FnXI*Zo(+iaY8N5~{b(e5izk6Rc?XIo z??Cb79Vp&>)C0$pcc6Ik4iv8w+ka2pf#QFNr!KLhy$FE=YKSTl`-BrQR!Z^sZDL;? zsg>gK+r)kvx+xyNP3*5>kmB*%#DN+{DIUK~nD<{g#pAb$gEhA>wU}J2wouvci!qQp_*Xymah-o*S$`c3gBj;mlsn+GmcW5~pZxO^WxPBo=9I_tfJk*2LlpRa0tZT}UjcctNV_E9*kyOwApb z;=Lz{rIo54)ulS&0ZE*rVSS4Co+QqzU~b~xlO*pwNt|ENSv~^Olf3sNv0TG>s6Onz z`@Hugaix6#!bHVU&+thmo*R{-+zWymm7?4Wf*X~h+zWymm9SMzr8Y|acqE{yS?Lrv zDn$*ZC@h~Fm7)>Oeu$=6b<84cRQdzZlN*&hxlzfJ8KZTP8n`gim*}XL@7Tw!;MN2HYzQbczA{zl_G3Znk(fSP!~8@i?doC z0TJ18_O19}u&F{~&kD$sMC#GK>tGT5`P`@!VWZNc2oY6azgrCkl&Oo*7GS@d>F16` z=Ok%f^loY#8kJtwF6XQw2&yAGR9orh;MX}ZjXsjpF8lZ~2-CmJnG(zN|} zq8~#4EV;LHJ#<7h$*CciEmG^zS|+Dut@#kuDQTJvH#LjK&D319FO1K$5mD*~JdR1z zgHESzq3~QST$nlosZJi1wPqOJ*U9-BmZj#Cd%T7fsS>;jk|%0djq5qlPA5-x`ocv2 zEhhTrd}dg%g@h3OyX2FK@GS}JXx9csu#w7wOAy(TIaIdzf-!xju*UMNI zY_vY8K-f3SnHhFfwQRJKZ?)f33Zr|BMl1PtnVcA|YD{HN#ggxqjese3)i~LPCEshW zTDS?a4NHEYg(s!BPb2w}7M`5iya@0U&7G23idvogw8I}V-f5{Z_@Df|I>jlDs_ChJ z)c}4OKTMi2Gj%4~hve59&Xx^c^4s>R!J8u+yyW*9&Qlxqer&HEgZZh$@K_~(uKYqq zv>?@^!r3ll+%_uR2wW1Zq78yM-?2vfGG*VL)5{fKmY43f+AG@-Jm!77B-? z5^lar^=!k5@9eQzITgMVqVjm$$#Bn$368gc`KU`k9Os!(YP9cj=yONN>9Nu28P# zmWmDo&=7H9UF;8uw(`_lJ8>0k%HIXVGI0%Z(_a-8$bqm}Od}ZHWnS zJz2Z(hZPq$I`yGypQ;}wRjMu(carLny4g@=02QjeI162p*t^j8Q&t~+h>wGoa#21I zD-RQ~VGA_*_rqimc0~)@f!_}Ys|P{ZJ_rI=L7AmcP$_r$r0x1j?9AyyeMh2H%Ejvp z)EW93_rh&5a0eii7>L49`a0X)sP7g~SHX4M)Di3&yO7r4Q}7*oqRGTp-pZI8&azh) zRxN^#OW+Dk#!T?<}AC;uwPtgRnG#eS2ebTfDMzWkp|aR zig9*uo>hGc__L9m3=GtKt9lLff!I?Ky~tAOtO$Arg3)ikkHZ#Af;|NCP@mXdrGb{RQ zX3J1W?w3r{Xe4*lp4c6R7$)uu!slq`RpyQsJ(=8_K)n>M>N|+}5c@D|;-1FD=|})L z6>v7ftHe(;+?iGt?k5QPQzFYf)Np5GKNL7q;09;8#~SV&s|t4{1Y6*yWVxps?mVmd zGjJY8>W>ANBG*cDs`cr?qks%PjBZ)qjF zHwjQNTL)m&s7mExEpxSNlPcSDDhT5%uuv^;SL-Ue5=;bj44ka8eB5^cQ58}kix&4G zb!gcbM3RHAaiPkN$J?ok;MZIP_Naa{0o!np*cFWIgi5T0%g8?O!nnQy@qM_ivMKmd z*VhSMWlQjtZV1*atm+H}JHV|)7*&MWI-nYY2hb3ZH45&dEZa8hhruRmDx8bhRcObs zA4fY82aD}QHP}d}vusWCcA_KrY$pcg_*V4-5LvY+Dk9nml{xmZ30C!ant5cFsq%-+ zP8WeG8<8$zSLV@mxi)0Pe!!(@6}Ky4^KxA``i};27F@PG)@QYkw%_~fR%bZw(gULg?vgC?K+SBhs>s*@?%phOx@L|-af2}m zZex~tkY+YoRZGFR3hwJH^9;?LU{#TE7hHq{D1*+@%t==DWH4ByUBPTx-|b~ntm@gC zxoehbsmvntIL$mT%TzfmLoNc7kM${vDTcCjJPI+4!>?6+CfIzgFEniIj??P6BSIOX z3x;t$r`5e+>}@&EXc&atMd3WFVH9!~h4Y+->5#i9oaZ$x47rQK*`Q%@$Xyi93mTS% z+(qHMs9{CGT@=ns8djqw18&r?Cgd&(=VcAMha9jvuV`2sauiRy zuQOLTh`14h*O@CEMdmtlh0_Uhow>q=R+1Yrc%6AyM3#yP)+2X?cnBzuI|i{wcb5s+ zZ(~^32%c)rlWSOcO^%CV4U1v)8kUyE8W!h@^W+*Zpsaaln(|scWPOv{i)I(#QoZ`=uQ~Y^yia$?I@#o1Y{=6nfNAdlJBm%e$ zrS9eS&q(uDlaP}-{#hO9$MYI;PRBpHoSB8ecgQIl|J-t}L}H3Rz*`2D|YI6UMOzkivA4I!ua{mV5R6>^H- zzf!}-kYix~>hjZMqcS1n6u*CMxhkhgA*cBLl^XJ1ZaxFNmwOjjQp6w7#=_=&xiwWD z9rbUpNr~0Q28QhrKI9aCYzLj`R>&#-*iIU{A*c9brtE`|Q~WVg_EE?w{+KE3bjT_G z*jOF5Fys_}Y=VZxA*c9bdljg2{$(Mj_+zH9D?(23$EIrG>X1|Xu>&-$2|2|dJ4lDs zM@M6`Y~DQ+OUI534`WJL$74t7FjhEiC%|Jgbigsv?RbC`#yMaX&GVJ2 z#@5Li8+$iMt<>A-ZTlS|=-$on(v;BoQj>SqX&VlkG#sJP` zu-HGraPBvpBG$&-kJVPJhhX>%CJvsX41W+4@7czch0q>WK+OtE7AfgehpEt{i-EVpd&2 z(3k3lf;t#ZsVh?I4g=v3IH_)tRCfhz6&qqX>z0BqzRIfG5UZuS)u7%2r_{X^lh*Y< z0DV|EsqS{DL+!>P4}>jO_YLaHopaWApq=6bM8~;}Xm7RIzc|Fqh)nhgv93(EXhf%N zKJ)Fsn94>f<{!@njD~or6hAQ5lj4WMhJ)b{XeTCTuT}z`k`1(%3Um-R+<;4aws^oz*3g)I%n5mS&r9SyCAEl0BWeMP7U#Z$W1;@swV*QqZ zYLGw5>cxH?RXq;s9dM!`I3qB80Dp(smKiPrf$ zWkvUjP``pJJ#Tv%rhyVOXJC{HS9&%}dp~c|u}~WxjPpw%s-oK8(?vDA z6L=Pz6rAkLUAoEEfuTCfqoCqJ7pH5G8>}LiK#_O?FA9|<54zoH$itvM0N3tt8vl?h z8`Z5KY$EYUMQlTr(`RA_I9$8GGwU8vlFx$hG>Jvbn@1J#eGuM(>k=Va7VjB|70)W~ zqU>@CXl(B;Z$i5dG*+%VbF@ycfySmthr>g68>3k6HZL-k^Uv8tEq7(T3|QCcI*RrT zRMH~Q81MuSVymnuab-DQ59(q#mDBB9ozn}TWpC!g>rV5iub&0tnyi-BogJB>&w#oX zuC%dOh8e-U`vQcmB+4tpUw5XGm^u{gH(a~k%+NO-nf1Lv=ng0A)kf&cdSJ$^?I5^N zoAJhE9A!n>PJy)Ok8zAj%tEK0W-J1A0i23)p|b~Ld>n)a;8ct!sTi%s#1 z6MF)J2&HJKkXdstC^y2X24uKWlsW>#G`OfqHy)zbe`Ah@(Eo!$d-$J0J4)g|gLYKT{|wsyGib+f=0Ah>|3`y%4tXy{x7`eR z>HlvJd9RYf{|AP=an8(kH2!)wXS&4ip=2iTyw zQTQvlqclv1&l8T-ga5*CH>#SXVNp1T+-X|4IP5|0Obzj2uLr35Fq^xSVo@+RTukFQ z%@)klLYSGLila4j!$;5^3+8Kx+0h5cKF;0)AzKdVZvm}{If#)uM=Y@gb|l0Tr1A%y z@$12CD>(3poj~3@SzcQ?$iio%K>Z<0Z8r+Dsct>hwco%l?rToYy4V~LNPv8?BblVzodYRR_BRwJ97>2aqFf|V zZ$v>0g<~Kg?#(JJaCW7_D?mLTu5=$7QQ*v=#6Lm!77hwo|2xQu8*EZZ3J%SmfMc)u zV@Rq#sqGA-E;$A92{Y$=d)q09c5#!I@9jYpZ^X*VD6X!Qiwq-QqdVE4$iHL26Gvo2 zt+9tP)a{^N3#a;@Yi-$)jgG{V2`6*)d`Lm(RWxK|3!P&iB>v3m9BE6#uK@LYI5mJB zX^*EwfC1ibB+3EoNc%uO?~6g457$x7HH=O<_s(-J0sitT|+XfUf_ zXm)|vn?{}p!trowXm+8H&Cj(UTn;D8h%G_Z1KST`68CKpBW<6Njc{MF6C->ZDxRnA zo`Vo%KV|za$KbFz9Ht8P{( z4oBAER5TaKXr2LH4Tq*y4xG3JQV*Pt9gH&SYFTs8#+biTPW~ScoN%(7vq$cD{4~9F z8YjzgbQl%gO3SwIn*5_Kb4E+(EUJs z-Ei|PcOCp;gtWLjwk2JQ{ANUAmirk+?ngv!U0c$Hh?jZ2>~JyW+!8~ur04aqGiQQ< zw{o-@a$aA9-RMo?eg+2#EFyaS4UD)T=nXJ19X&t{z$cQJcJ)E>Qrtze;hm+O{yAe-XdpK#Wa1imNwTF||3P%Z^ zwDxe)TH$npC#^l4v{tw<;z?@{C#@AOj(F1A!%1s}%Mv_k?ct;~P2@@IBu`p~0Ay!TBwE85Z>Vjmdng5TTnJ~TLpJ|h1kgCi@MB;jM*X@s`;at|lC z*STu3)x!yHWsVi`1hKiBc9;)aDrRKR~PXFw}%tlieDe`1hW1J?01L_ERm2}koABc9;)aDrROPl$Me+rtTNg(pQk!R_G$w~B8{#1q{3x`F0T zi+F|qx?MychoSQKbdf_hK2b&`Vb7!u-I~r zKsE=v*!>uN->`ScF+~0nyy(KdTFA=pR{=OcLpT3E%t+!Cl`<~KzaMk)I7Ovklz$8A zRamcKI{$pUFvDRQ78W#)8fAsMwqYXeDn$P)8kMlYzK78lhNHtJjD9q7G2BCkvGQYh z62oyCy7@mbzCASz@*hXN3nyt9e(w1{nIq+1w56GFqc+Zf_f(1N+7_Zer zRz3$K@je>5`81ALn+Cq^yngi)kQ*l*<%5!n0UO&cz`{P zQZaRBkZ;E-0|W7I#PJ|-SpxMRt0auDO#FsO#Dz_y7?=Zt_77G{PHzIy*uE##UFhzy zfp9F0WQnwKX+xRVoy=h^wDdw{X@4jR1)N#}(OAxIOY=W*hC8;yhak^}d9&auz6DqW z&na+>f;F#F>`g=ayDHTU2Vo=$cQHi7{!ra+4A5EdK=LRWvz?Z#0iDwKQ<4JhdK$@& zB16dzTCxmuN;3m0#Z!##Q%6M?9EgiB;a;bb9%v7%9whs7N0#=Vp#BV3^{67YSqL+B zT7V0N;Hs`;>3r^VB=I;9=8;%R$uCs!TR~U}*KROk_!DVwcZv4k`@~%+xYo%PBCRVC zzftKUEy$%}2TGsbguE4c#h^Gk@|~E})16A1(f0%_WWZH_q2&9LxEO@vNc?&yDLIP7 zFF<%7uG6NDAfDkAvSwmKUT5&+--pPIPI6P?1&+tok-IaqTpKYf?n=X*WOZRc2eqgJ zxHWPYyk*zdaJTamtE*uuMv!HoT(887Ol-sui0vkegC$1W#Uo6itgjpGI@Z@kpw5P? z-k!bzph!rKpoJ>l97pN<2)2-qPhWP-wWl zqJwOX9X`N47MvkT+q2g7%tD%KZ7;;Yoh^&bIvCH6ZQX*-haL)j1uBO^Tk(*Y zzl+a-(ErXFQj5)=G|4>-KP@(UlC%O&e)&w`9Fc==^(P>Na)&3n)yFarzOTb>wS#W8 z!Y=r|EeG9dg@ZV|)egGV3P)Cg-D(HjYN`*GJLpyy@J-Dt9s}&v?XSdox zw_3$l7iYKHLAP4*>*MTJJLpy`JUq^BHEspb@ioNRt#;6@R{X{|yVVZ5)e29Dvs>+; zTdnY z=vFH{FV1eYgKo8wpC4zp+CjIPdge4-*ZncAMwIVDP zadxX6bgLBs-RcCp)egGVKR_$Km9-!KVGV0X)R&~(c$!ihPjy#XOJGOoA(W6iN|SO& zY4S!NwKds%N9j-qrPaD;VS=b=%_bF3c6{1-HC!hT97+gbFqz1Uw6U} z=R)IwAva&9Z-ceC?!;((l<<(O#gfgsanecq!t#69sG1`nnSZyQlSaCkoc4^>rr-_D$>S zP81xN*4LdVSeMqgfU}IWeccS2gw7%{{ z!AWU--HC!z()zj+1*fI;btei=PwVSW6r7pX*PSRhJFTxfQE*OLUw5M5y!891yZ(A@ z^Zc~F?nH4Hr1f|e*w=_^`LFS$KgOao3sd~~v>dx$4XWBbKW0#|U_7)Tzf zh;M@M7>OS-MTaTkg{R~E8eG9^Bp#uNW0zo%0EhA1Vn+4%CPzqV#BMO6LOduKy z?jyX+meD_tuun5QhKr~QrSf2`I7HQ>ndlkMJQQC|hJa`%wH(qwB}31^t*CHivR)l3 zHGKxWp0qP*-fT%*cP8d~;mWRMl!r;$*=J!c9Iotq${j9g1$Z6A;L2{MoNC<;1>O&? z{oymM;1sw&5OKN8y44<=dLC;mtOG;V;R(ibp7C5|Jn=)c40cE=;fh(>Q)@iqj0YcM z)iOx9)Lg4QmUSR3u&pc0vR$pChN!Mq4QiD6n{z3Ins>F-L7D%~QJWb|m->9NIchTi zB=dnwWTn;G85?HDDmc^aDt4;uFkhg1wEJlEcRJ}65iHa0LfqM4H$Dd`aJm>A#QPA} z7#ziC5qC8>9X2BPb_Nz&i9hSX?}kZK#O|YRqidQq1GgTdt0up!`2u`#&H(evniOLf zkTbyivZlgroHM}uvZlg8oHM}uvZlgOXuhnea5^+!)>ODK&KY2SSySQSIA?(QWle?4 zLi1%!n#dX8?3XqB(#~qE9~sX8X4a2ig9u!cn$=t8lJ=t8lJ=t8lJ=D<7~X{aeM)^=}o<^=~hcWt!{XDt@ki zt8lJ=t8lJ=tK!S`Zxuh+zg0Nbzg6+&`nQUo>)$Gz>)$Gz>))#Qa{XJy&-HH=&h>9q ze7XLu;^+Fe3g`N_NRR2=kP*=nGFdk5;v zU-WM&f&T3~l=!duxA#LRuh8!q?(CuO$hl0vRxZimna#-aOMNtSGn~ux`)e3vIG33{ z85LzXmzg~orROsJ!OmxhKwIq(7rgm)+b`JqyE!Al$QNaJEX0p3c79$CR>5=ilG8)> zfEw{Z+JO}PSmb88?#JsxyaCxFDf_Xgq3pY$z7B`h0(Yf@i)`RjBx zh&_A+znPlXh~5MTfx0i8ihqq5N}XbCv0Qszt53%*TVR#AZ1nQw2ZF@SuxjyP*e46e z*D_~43#8VYMHgxnjmpNG#Q^HN9TD6NS9-+sxt6$9Ef&84!fS9)`Z?oV4yDIIAr({U z>sh7CMdzkUmy7;~A;8xN`#D^}DR^BW^cZHn7>BPm{}946SLDgUm<@GQOO>^dRH>gU zdQxTiImkFTmHN42FcpijW%+!FXO81Qjvl6cCV-h{rOLxTZ=OQ+}?Lt0PB@?I3NrPFC_+2rvV#gEVEOq+Jet z25Hig>m{xKGECXPb&#L3xk1vd0G2sQ6!sD8tLr<=h(g*zEPEv9vrkdA#M%~rL|O7<o~#d=yp3V8h&+fPbKh62G<0`P&1v426qpxKn^-D8(bS~>;e3W z!F_|V-GN^3Wu1GENqRef+L+F9oflir44P&M$I29F9(=?1(> z!8;Q7o*yy6DC zGA}1j%V{IQaG;hs-Vsk~6??T)f}OAtBC3m=!^4)0o9B@f5{pK1iHW z_+*1Ud}fq$ZvPa{MbIOaU16A5vrfC1)BO|#%)R!qT+HdJ#~!yD;IVQsr>mO*@OxV> z=5!Sf0?z5WnA24_vLepux|q|Y`s8vKbGrPV3&L40=5&o(_IX{*>1wqB=X71n>1wsI z&+B4NSE~&;r|V))SK)NPIb9cXx(XKtoYQqNr>k(Wd^%ms=`z=_RU+V=u8TQc#jglB zr|V))SK;b_bGk0(bkBj+c2!NlIb9cXx{6;La8B37oUX!s1J3EXnA25wV8A(D7jwEQ zzPf;Ox-RB)6~8{%8%;~E5rUabRbup)__|pQ;>AINHRd~95$X(3os`SkaIH&7kPFL|&pV!5luEO)= zBky8PSIN&0IH&7kPM3VydT~zI#hk7pp!MRMu8TQcML_GtIb9cXx{83-i*vdz=5!SS zecp(3x-RB)`Bf5ZmEbGPTOoEreQCB;BDXz)5`GtPC?)>wEdhRaXE=m%b85^e%&9$s z*RI%%P9as8zbDQIaTwlj1sfE*PG;)`*e3{1p_~wTM?@s<0piYZ*b<@szJi`M@}>WQ zaF{ZC*~}a_f>Oo(S*TrQ=o6q>v#etf?tkRLY|xRzVCTakE@+AQW0x*pbRg@v7U{YZ zh6)EYub@b=2Q%QWp#BI~aEKy~oeX08A(Pna%4DI6kY`m_DcRi?>s#sy8~`RHeSC;ypMt-OK^knd}chq zX%Cj@hcJV`%Z*)FR3%~}>)6(o)E=b1(~^22sjsx8zRG-jrX}@9QXg+lEfs~-aBcG} z5AY6Png8JwdF2+qP0-7smT^)W_O|37~a%U$IRM!mOf zuMS-cziT;OeKp11P|I8SIF^TxV?j7Ji0mdG!Sec+@B=8ZvG@u0m0@E)bwO`Se+0`- z;iF68K6tw(dLaUQVJZJm*}<_A9KPTSOZjsou1Gx2|2HZ=U+{@xRCkjSaH_5ni2+b- z-<*}O6YTTYw`3*k#8Pxx>|3)EPC|at=eDeblURUmj(vMp!cEAJ_S_-zPeSyF#f^4v zwCp=Y{#6p6^fvF{T3D<$EZSb}39`)-lXf`erngJp$l5*#es7%VH?J;A}Ujlr_QwFwTEZ48zb?wjCX*~Va5 z;eiPbmTe4{6|PHguxw+n+)u_|pWtBG#$Z{cw;{p7vW>yA!lM!#EZZ0??;+(I6C5nt z7%U$m@ibN2FjziZ;(3W9E5OHKS%se;ajyAB5ZLJrwR}-SXP7&-2?~AHU`Uzu+>d)uxw+ntO#GY2@aNR43-t) z8#lqhvW>yABK+VcI9RqZSiVA<{)?OVnt6)BvXVH@OK`AkW3a3U%e@2#%Qgnfig1aS z;9%LtU|A7XcnJ=cZ48zb;VLh|!Lp6PvP%ASUV?*V8-ryffx)tT^jNXwqnEH^e4>)f zVcvTqiP&XS0e_4H$r)id4(=@^hXl!)Za6MJ&`S;p@=Apc5(s}skNf0e;C z7Cz7i!quKr0PFSWEI;jUA1*^-7yMC$7h11U`Le3A3I+`X?4zM5SX~3yuaxaGcB&Mt zT?p7;bAy6+kP?5OhGD@H!W}e>7j%VPew~Jif)#{=HH-@GC9KylSulWMhiaHAIG5bv z8s=I4*JST%zmF6YiXV|4@mq@(i6U`7$=^1a>R!b@FE6w~du~~m!-Iu}I7&mj+eC`} zd@q6Z`#5p}oNi1k4h@!w)reGVzzB{M^G9)h2dZ=g+B9&xL|{ILnAXF!+lZ%>f7t-y z6`T(G2-Kg!{vM7tY@nr&w6NjstkOqBS1RpzF*@CF?Y`ee>65}KJ$9#Fx*oV9nu+Imp01^Y^=xUD!4Wg#wWVeS4|rI)EJ z*Z}Egs5HHe(yL)@2T*?n`$ws?NOWZ0E^VT;;t~)-Oq?iFmx@j_bvUT?aHW@G7y|je zEQ%vQIF!Wam6Fj6whV-`NjzQ=4I7hwc?ah^i|~5OK_FN=)&+1Z!+~KDuq*7wGFkSaA2~}G>R6=dHrK$QisUp z3g*plf6cQD@u7OM-oW_YIzlaXeS$z$cQB(r>`a5~zhgB9230?US11K-{`>|fK2DUq z4PqT6`opzbh2s5KGVt>ioE^oTvNfR21$z!$+5G@Z;8_fZzfNKg#`Jn_6n;4vI7g&g zjL)GSLcGep=>Yx_3XO+Qm23i@sb)oe55%|OWOW*Yy3o9qS)Jvz^)^yK z1?_La|JU%~j7E%jcyc#n>FcuWu0PlE0lNosEF5#`PG|8wOaB~S%m;_Yv)ZzNtK?ID zPItz=8{!=XSN$5|rl7;0^WnsDr|csT=Yo4UT-Waau7v0B1b+fN2hVyq9ETl^)YvXQ zlTMuuOSIcfNHj>jNwK=Ofi3odK}V6T>a>OpLiQoZR$lv{z{yf`^0NZR>d~2R`QAaB zEcsU$AecX;ykitBne`o3peccq4H}5M(TY7m7z|}9l-89h;s6l) z!71z7DdH#)M!;FM-wlJ(f8kT`)N1}%7OXq+r2y^#J|zc2em{okwG-31HHMGZ^TpeZ z&m&+T3U%ATmtd$=x7`jb=8amr!#Apu-WcmgX{*wOqngjY61WoIwWI3ZhfrWCLN`qnpKz6`rLo?WI|nH`6RwpCwk+mt z+xFV$$2_aoPe_S9la}!rRT0mO^^y_yv9||vim|NMrA*@Plx4HrjSm~(4$Ppw|6mG7 z#$?^qL>Mf*Qfi{38Vp@-=GXKL~P_o+p@ z+0

BOe9hqUrUPh#ZOR=AARu0%pRs)jC-#IU5{yo8YoIzX7js5b>xJzX7jsl;E;B zzX7jsI$^#6uW(_4%i{b7yu!t59uCXmDlKIRE{pRU@QPoN;IcTs0k3d%g3IFk2K*f| z?KKH5i}M@sieH=HvN*p1uW;Xl`3Ahg1Jx8Umc>2`-EC8}JHGQq##;7FY32NpM-5-+)*AX$dZi z^BeFAPgm1L`rsjnd(-hNyp8;|{H^%s4{(Yhl-`&AwQXpM5b4_n z1Fe&p2{ewp^<`8hL}n!ajmYzyDZW*a*_&u&+;b*igqt~-XjGBsj0MVH`;}K=E~!S|n!f2C=5!)nX5!NDLhT@@_58 zN)(BEnaTm%kULX)yKTs)q0JEOw;_K`a{e~t->Eyc4f%c=_^%d&*CKH+mHfC3`4}qs zVjFUjwr?N9!klPC0pDN~nyadDeJK%a=3Br&#Ml>%eRt009 z0O}aH61hWRu82rH6NJSizD{e7RK%M=SOr&l9+Yi?p3-Zy2lvBWO(UkE4zY5ZKc=Xi zxPUr##@+!wcjoUAC=yT6nA3Ka>;Vk;38-(wm2BP{#37=HL55$22?e;4I~m7N(Uy`6 zKsXK#Z3BkHn5Baan|A}he=AwnMxF~3Jw!%k_yU;COi`77Tt9^Bh^$0x_2+3A| z!QE_CW8ZecKR5PI{u6%07l~SnZQfyWmf@Av$`w*gciEyNbt-gwbMd45P-cTINl1#h zKuKN>b*I6&9Ev=1ITY#oa;R5~2rh?OLlJ#B6zS+A$s34#6kh^;BHlo>5Ogd^WN#o+ zICle)!nqrW6wcj1q;T#AB877|5GkCyfk>vb$qht`pSyub;oJ>G%cOm|8;BG?cLR~a zxf_TS&fP$y;>+DYr1-fTh!oDo&)q&gYEvbKt!!!4~n<48bNAL2&FC1eU0)Ltx=CpgZA)VWB zk{y8N!3ufgz@XFbS^cPua8}JB<#J@$-tF z)KrnBmizG{e(ki`pCI-0)~K-Xep>h`PKCC#@LyRAKlh}Cm%@yAUp-v ziiO{Jtyw5qwUE^L+gJ!HEPP`uEPT2Z3-9wx9zLrq{3i_gF>B$o%EIo~;8GE|RxEt6 zRSUOxt>q!97j0u9sfV;ih28Isf!#N@V)x^>3Z9hAl%ft-F;iN zdpK!bfgzi+7N(Vjnd|WOhLbtV z;0}K*=nzHPLYII)5j~x>g=qkbKWz;4Jy=*uDu2o}6&4=Kr^?k9Zh>~jz!r5cSlEV5 zHMm{bnC%QhcBC=SlwnqtQvAVfz=4R#;%KC*UvV84rPqTlg`n!1tg2sKscII~%%G|_ zp^B0=f1abN-(8mMiL8-dX;tjmOChNGlB)PV0k?+nTnIJGsA?-zQPSqmJyi8ARJ9c^ zkAv_At%}({6YgPz5JTfAgVSjAi>_>uKLm9%b^Q!ogCS<~XID7!vYRL#2M=o&l=kDB z<~FSq6#3U-C5X2`X`5$h{%vkg8aNEpo#6^krqy?-nC5^m3$ExMU2z<(!xHzpG0dM> z7T;)y=|aYIQHz)^Lr~EMz1cSB()^3uZj9+MP#=OTOyCtNE>SUk0m8>{MU%IQ>2e(t z+kIvfLyc<@Q`_r7yqz%}&4+EA+lw*n4C(;5!fzR7f{N*E5KeP%nZjJekFnugv-igb(3LI32{lTz(b1i3e!bJ>c|S zg+(ejtBBw3pX2^-m{(?0lG2Xv(!Bf|F+T-Ym>3V@)5^R9K$rwq z@`N@omz^&-i5PU0z6#Fu5V;Pnwd~vo^R~^-O-^gsi96o;KpfS=;0K{vu>Q6g#-cvT zk=61&P~U_rT*Lf4Mj5>GP3WP*mAGha_?OG4E1lE>G`KA|FGJ)dIIH9Xov@tTHBSB( z%JGZxTOso?VQ{p&AcImOBBN;$?-1i1pZ)?zu$$+VJv zXSYhd)yZ#ON1IjF>|>U#zF7)tO8-5OSAXEv@TT>+8;lZ@GsyT?n8$zEvZm|>>PWc4 z3t4^sv}Hwp1%!v;N;++m@i8aaD~+TM1n2NuaBLSY*GT6wKI0^_y`3Dj1WDazo9bQW zQq>C@?TgrtW~Q|k-trLzizjdvG0JoZF}^Qoy=A&>B%+EDt zEasOU2hP=ZU~dbY)k-BDW+z(-JNwi+yU|#|l`KK#{f_X0KfzphZpWlAwp)~5 z2F`+eFrN&kinM}k{#4U*pHPnndaQxqPj7l25lN|Y6ajxG(es>0@+xSla~brVo7Fj& zZ2lZg&&yipNd){^M9(Iz^9lm~+(gf(B6*|Hc|G)9m({t3Z2qjL=NqkaBLRP2qvvO> z^BXCGpWo>T?7TmW&WE7y!K}_U$X~&qQhM_2JlQmKCg9I@^t3@$DTf+a4Tc)euJFh< zVgx+0KFl$!<;HV~ky&A6o-nMBjps8X^Ocb)M5HpVI^(H_N5(ZA9^D>YGX}+8s;deI zGOR8ekTCHPYG#{NV)K2?J9$9=F z;E`j8?+go{r%}SC@JN|*cw}`NZdfyoXSR`<1CP|R+^`-tp2v;M8hB(?DHmV!)zx%! z?2Sm2*s%oF#2O`80|=f6^=Y_bly)nF9%&R=jM?hoaz3|0^kM6BO;XMllgYo&sh)FS z>F?QKU8j~CmMy4k)URk;$$@u+Q)#+BxlZ~`VaMuiUgoQv$6;e>A23QD#On{vsx;%E z-1y^>u+j{qbFus*tTdhZ9Pz2ps%nFW$S%$=mF=xlWf2BhxBxFp`|XV3UPJhN7M@G^ zP!^6SyfzC@M84SL(3;WiRpo`szV&&|RaC?5N?EbQ0_I5yH@tNRg-OlZiVe5ZDbG?=d^tNNb| zzLODPzeWk{lo+N2MpK}t5#V64Q>h}!6Z2N}YUWZ0Bf!ybr$ZSrNVG;6idFp3&(G6H-zcbdU4HyI7LvRuwI z0&G1yO{Q6A#&@FGR&_f@IMWDl+O1QBHyTJP6;(?pUL2ZopFvU6o)0)nC_VAoM?5YQ<64{Sa7RnAmic6^C89#P#2}qS`+e za<{R&0&7-9_;W7yqEmkJ=h^n6Z_a4rs8V|xj77% zGH81mLv9Z9bN66}+#KfT?!gXu*4WS8gB@~nn4h}`JLKjtKX(sy$fL(THixPBW`^7x z=I8Fgj&pOEpSuS; zXt*M&Xx(t?ITH8?xHct>_GxL;g}}>5`<%3AB<*3~d*Iq0hYB(oG02~(@Q7EUpP{Ju z3^0C!#7}S~7Xh?e4G)~vc1dJea~Xy|r!dTC;XoKvd?y&S5a|h5d>z1U@C+lk7+@wm zGvHLDk0YGTpEXqQQ*t&HFwzqsay*=j^n7^EW0=yzA@)4l)y0r&hkZH6;Fm|stkR|6 ztiW?})i#`qz@{%qinoXZg~L{}y|{&0c(5uQSS9~#%rPH; z_*K~)ydBHtRoJ`|u8rIWbx0oT=3Wn@%;4Id2x0!^rq=%EP4$udbHG>xiBsULa_Z!t zeHF|RbG?%(@;4AK1^W_;WHse_fJb|)jHWvva$9pv4^Y!F-m^y2TCmsrg{I@Z?~JC+ z5ZTmR(~H!!z~jAE(x&gg{^l<%_+LC#aJ@_+DsWqr=h(DrLj<4Me_zlMR>m7<%S#R%ZrEA%6Lj z4-W&$0A=78!^r@(?1jgnwtKh*o{_Bh0tWUYWZUQQ0z(K86cbn zCrw`tRTh6Pfy4C_&Sg+3Ex8LKcfd*0*TM4?oHG3u2I9{hI*<(T4)~kkWPsQ|u%8PK zrt{Mb_T?~r8l-7{Dd>XlI%WFhVqjC#FBc88axjE;fUA~0hRcP_^+P~72u_+l9jYw; z%!ISA6wXAbl$M+ik@MiBB{#sc5>A=EfPwgPk`5#TJPQ756W|kgK4Ji?;w0w!L_P?7 z+f~Z?JyGmLb1OekywNnaQubpeiv0+zj)#$zK`=fZ>}vc5b%OO(r8v{PurjK!%AdeH z7p_`%nKG)db_Zb>IGN(ktnK{S4h~g48@1mC=)MAhp#9_4_eEpZZV{LUik-6M{Fch21?azf@UT*K52A|#=D?h1f zH~*ySv0$UKW%kL+PpbNZWY-@1T^Hf7U|3*d$INBuLOaJf`u=w-u^NeSjyKqihK$?I zauyhj12dzCTh0jvM~SmLKz^b6T%%o;PGrz{Iwu-jm}pCUlEKA^33v-SCmURr*q(f> znx4tzR8=GjG3IejHTtU)zn1_nGPowu&;uB&r!x6f-4lbi2VQK#*GA(f46&Tk4elH5 zjxnFJ#K;d!e1JqdXBb>35AZl=non5PCmv<|XPNK~^1zO>)X6Zj?5a_TSrfs>IxXYp z22(4>oUQ^_?(oDZsXe-YbB^PzV~W&a6MYq<+eJ);;J?3U(e3UGfKa;Fs|`26lbKk6 zR;9PR9T{WmOcm67{WNql-(slYnJ>%-nVXTl-cFhuWmX`!ym}4OnG^90d&4xu*uo;- z)t<%p3cXR`_UKq<+D-y-j25yo7ZHxv(9Il!3hzzSFvv{X6L4=0ql~{7;JzB-GV@}x zr`elSf@XwQGJ>P1(R`fV%AA23;LXZLa5aO>&PGs9jYni7=tp>@i6CE1Gu(hzVat z()~%a0dP1^@Gf+VXR-T>ni`I`f?MFIX>X3Sq^4)RZqzgx0Y<tnUH!IyhApH@LDaO7ZL$ z(p65CibhdSBM775R9W2U%35&(2*;2p&AUkvSAlRni8A%KDdJ-wJOo$V`)E}b7sC|h z{XCS#P|!?S%mY=HMO)F6={P~B118A7x1mI^8CJz`g4=_2wq!lxgDd3Yk1&I2@=hQO zfNM8|)#pUFgbf6~9a(fc@kz?Cxe%BGhpK>wuLM_pK({gshVV<1cxj?{fs)BlkAi=k z6JLV1t*v+g54AY3g_);8rTAyo%mdx7H1i*zJ_4uAJkZ^NW_|?1yZ?*5_kfb3_}a$1 zChW}Y%_;10tfRAc~nFA_^)- zL{!Xt&r`R$cXmME_xGOv`TplS=iPHI%zf(Ct$S~UuCDH`0*RTI#F#ls%&fQzCX#3j z&HVU3HFFLl(#=xFj>FjM&m;HR{#G{&+IphZ;)*p`)g>d>;tZmes8#E5#f5vEG( zixG7oPz&T35rCQ~BmV0ueU1$z%UG0w&e@4$08}dO&m}D{OIqG+px1yTR$0>W)&sZ~ zBxdHsn3*eP9)Q3;P(~vtXO(U|%glC2`InY=kY-||5#7<*F!=W^RH~`*wwW$ZEe5XS z4bD=rn$W9lYvyUi8R7W=I)KDXPmGyfG4l!tTn=)g$@|9tD4Icb5T20BX2k0PFF!Xx zrQ*?R63wsN)oJDqpxZ!l8TiWGLSF^|907@$-?+>7V;qi4y`DYj+n|glP|j%neU_Q+ zkix57neo%`o4YZw8*ihPZyPJ$Lf|>>r$eK9I%r$@w!0dw>7>GvHL6|;@C-786%F*zy%&6HK9fAag10c zMvMbG3M59Xv5hdDbgdY%00Q$t8Gd8LW95xNCrv@hzqJ0btg!jUqGwV@UZI zGn-(_sV*~Savs6iQG2LV35m9um$~)mb{)`}AZb^Zx!cgpX8}A75;G^;W}0?&g_!vn z1df0*#y~mE{Ik57Xjc=FQhwa6!FJWhST-MCFo-`xi+U>2wycj^UtjC&#bLD|v8<0< zUtcc-&>bX}^|dWC^?Z@3X9&y(WjtsCcn5SxH8uqBsecdPUbejY#!Svy4}$K2O4T@Q zn_1t~Gtdt}Vo^ieA``1dV$p99I1S2p+l&+?;c^xsRv#jTGwiZHc#?CGT)VMhPIVX* zdK=(2y@Bv6H^V^o03JZv3ZruMXP{s^XVI7m~ zK-d$adH-HvE7{_|!;6b-zD1CwscBUE8&pZGzH{lzQXin*Kw{AeSNWm+2bUh&=R@EI zP)0jr(Sfrp>UM66ydmq;pD~uEt5Ix39~hfpmj1gNO4ZE~+olg(B^=%N0euf7HtmbC zX}{QX8UjCqoU7uck=Q7)h;xn$8Nbk?Cm5v{Vl0Y(7hq|!ZP5!Z-J&`GZ39XfLN8u$ z>G{|=03$(S=8G|AZWl9GLEs*cV`fV7f7?u%-9E!2?~5_>38+*Dph_z9K38o9?t7qL zgHj%sJgr&($?xI0BuLDBAjV9*JWHXD5NHo_%zPfY%MTL&7)>#=JBwTxW99&;RI@AC zW-b&n?*O_OB+*>x(q=vf;3<%pd0UK`w~Lu4An+Z?F>`o@|Io};G;?Zb!D8kYKtBVew2?g8%=iy5Ap?n-Lt@MvDrUBXKyy$=is{xHp}Tyg=bgJ- z+jm}hjAnad<|{ChruKqLH8s^Xv%RY>+vcr67l6df_AbnAUX_F>uqP|Qq^F*8HVYzU$Hpp1FO%=@6be5K$1?`HO5Wd6d7v8=&* zkfo{TL!}y*Zkzd+(&Oe0K<9!|?xSmeDLrmJ1YkW#%sivYUvexl^AiYs49e(Z%TDr4~6r=WF5fu69mPhDRrd^D6S#Shf*r1Vs=zf ze5KMos|PZ4l}wM&nt{gIG04D-%yhAnX`rgds<|2&rh{@eOO{@gu$>(&);x&xwIDdl z^`$g5pEh+f&JKlY7D4qZkXdZ%ru3}(b7cFJS<_ULe#q4P9L?n|CsT9PkTxY9#03?E zOcmK+cz_PuSU;4)(pZukt1MDdZPkF8N|B+aWV(@=l1!#<$iR%u)X~Y5r1TYNFf#N9 z5hDo;94}LKsT~?bR!6TgtsR^m|<2!qE%GWd8+l=V0o&= z4;Agdqn|=3=Bd_yvC9jdV~s?1PjCDab71o|#K#kt(>LtrTPuiPhkv}cG0~$>-#FLv zEy}zM(obEK707U}QGpstUh;FVQxTmXTkG{I!Q+_qHt&h=(Hakg?z4G+a1Um;?)z;% z6r7Ir1os0rpA_GL50D6(`@cwxF zL7MPo57L&>@2Cf9!k0Zr6Ta+0n($>0(u6O2kS6-e9;69h_8?98vIl9BzjnO+AWiss z@%Do>kuQ6YCVbh0v?sOwWe?IMf7ydH1}pkO8uQD8G*;;yNHq`ALiU5SCa6^(6Q8sb z-ByB6>87<(v1KPFVidH(z1#P}Yf$Eyn~}hQzJF3eZ}65FSB&0}xB)BYuEhJ1$8EWX z;%?eo-TeWC>@20K(2Xo3a6@7x=F~zK%RMp-vHEUoBWxwrj;kH`4nHDoo1zPqhG-if z&3#w}Y<>lPyu8KioXxvRnIp|1{ z71fb?b0z*}L^%4yEzD)Ga5h0?2!a@QTP~yPDy$coiHeO|l-meeT!r-`+s*^Kq*9^I z+bEI*skmkN4K>>=G8V&A+;YRVinN1eaVrelE;5bbyW6mxBGqZeJ%;TXsg25wTV>cD zkuYXUd4TI{ zWmtKD>uYOR^8nY^!F3^uL3yJBRbjh+zUmuegyi|EZ=7L0ku{j8_$C+@r%~f-;+tgH zP^3QDD-4^YpRf9+8P+^s^vbJaRvZ);zdaG zB)*D9<4xqtO>v2xu}m4Z+{e%?{Y_o0i|F6AF$SWn~vT&MiQ4C{{+qbvJI7&a8S3HO%%OAMP7;S|2d&e@5cz@U*)QVJW1944+eUo;v(JfEYtr`1Y-?yT9ILl{lkV;ku_u= zF{~@Hv_IHK4eO2+(c;Gp>xsmXecZ6#NE@;nBh$6!xJdB;u$xS(KXP~=*e47dh*YKU zlZK6tG^ABe88#T1LiTCHh9dQ7)n>ycL{`wMEoN$v6e*zQXH05JWC+WB*08CO098F_ z*tE#4Onu(4>5)5_y4A25k;_=n3x>^%%%bo%!&Zzu%W_{dY*yqQy0G1_*^z6g>LtVG zMAB&04#Va~Mp5`>!&Zt6W$G)2&5NvN>Q2MvN7hr-tA;IzET-^lhAoV&p;fONwkR@% zsk;nY9I48@yA4}8at%Ft!?0D-+qZ3tU1tni5~)p9ZyL60qy>fFGHf-=eSo_5y0Xzx zl5jG0;4e0yM$B`-2w9P5D09%%x+~I)o_u8L#uFJt_K*?wN4nA0j}04$Y$bcx2#2Kc zePU9RBI_CMBSv#_I%U{E_=ZjApELVDx074j$;fyeoQ%8Hwq+nwj4fO@_U*It zOpVIJ6-VEPcFIya#V(91eZKeYWgVN?p2k$ijYJdfBZc3ij^=Hp{l?f4t9$=#WIyY1B1PBMSNDb5fw^#-Vc z_l$}ReedksV&}=k6~nfY4@`Uq?7|w^DQT;r48h?eU*D&8@| z1zW~z9egIcs25j4^^Nou0N>oEyqOV-mEs#KdOt8Rj@de^b4O{f~J+5~h1NUUlnR{a3rdxF}k zc4C$HW6VTAVp_Y9Hmv|a21rb6FQ#1%U^EDGC@ih9ofketYd#G|bSGJP4Zi7_iHQJY z)Gf&LCE+A~P!Y0mDScNkKj+{rBf9t~!)-?$d_$ax%XM;#05V4e?w z7N8uxS@P!s-U(nS!3s3t3juck*bK_u#Jc-37}9sii#k=hV#H)i9S z!rmWXMDa8D!B+M#Y(}_MBdcH!AU5dYpYVg7|8+@&ZC1hWOvGqk;DNUcL_s2cP?c5q z0nOQHBJwrhMzgSuF^W^y;Z9T{vN70z5m^fKc2H$)-4nL8mx=RFic8Ny;0aLipU}m= z*#l~5WNoWB9;#XM<21xq)Yw>N!k%2D(EPj-{NR;Ga#)4mFfeoM3WG|T_&xNi0!-A! zyg9-8G_S!CEXRSwyz64jna zSBmKUF&LJNGUhRIBSE)Azgpp#H!4_%<~;{=BdBQ1#X3(b)@|rhG#`+JaE#bE06-s5 z!TC_e>v!G&{9r8YsNBe6|BRPrY?;67kVU1N9x^kO({6i1Xe~1lK7_XxI9PON?ypkq2rrA*1I2QnOF+3g zB+KJv!nbHbPKY}0lwiIHfu}(^@6e<>UC%sWQaG(M9zfv!dE#D`|$!*U4R z1j_Bmw%$BG#7nwsQJaEk(9KJE!Cm;lX+!aY_(4;qr#X${2?H%KP(7=7tAY4wGn-B$ ztN2v|Z8T6btN3jL@v$1Ekns?phjQ@fLqqnEv#1@yixf_2isRucud=@zk!dh58Q3*U z%*79ymxef)Hd|t#ss=(Sr3PwdAeh(8K-~@0%*yKuh;t$6K`d}>T+Ay=a#ZvD7BN$Q zB1h3B)pSx#&X$wDz(4`2q%Y$s@u{qb#sC_Eat7CeWNLiY^>LQf3qV&;F~V(KoMl;W z>C*Mfz#40pi-*c(m~QZ#oaQmZBqYkX2itmci1{W^)^)ChUUg@NZQC~iZQDAat3YDg zcL8nN9ss*RV%zrtZQJJnJ^?wlje{;zoMYRpGVEV$>&R=?i&3^Ee+gi0rfu7cf$EG~ z1E8fKvF#!T_lNbVrz^QGNcT19JI22;-IiB%Av1NggWUsv@B3cha$&uaRP}$ z%f+Go04@Sa2fR~kp9o+ANSAvTY}t2?a?h&tDnt9D*!fX*@S#)fist@mmKv$4sOdIHmHimDxYO9~V-zZ}!}S{!GQL zTXG{Fwu7#QDs{{;=b*nO&DjF?` zB>#n!z_Zp09xi=WRj*tOwr)(DIDialDJ~n*ChGc|P*ve~=z5@{ltDUAe@b)#&>EB* zqJEs_co#tTqK(&z|2WB!L0Suml_2rIq4@tEfHy$8<#4_@7ggrDi{oXtBpQd!9VJ2fgUCLR*Sy%$hI0(k|SAqQ$h!rt9$3E`&m_Q#+6-2 zsD;C0b$vN|Gp-)3!rm0;sqM6ATZ|}2FA?1qC3=WjACD2;>4-iarw19W^>&J`juHLA z5nb(wR#Us!uJ6Fv2#l}&M|+Da*9ENC_Q=@Y6q*G!BI=G5>Av!X^bIs!wQqr!P3jHvz634N1~Q;Mr%$ZwJt7N zj3^U#?3iALmCwo95Yl3Y@;-GCu2J6dLwN)EuV&`kF&yR9L;1x(`+|ykv35s!Td{IC z0JxjrL+s0=y!{BCcM{_}NTNMP0{bk0O$1+H`yMOcDFELQ{Fc3boPd>oM9CoS6eo>c zU^dkCjq#Gpmuhar$7CA7r=Ic z+Sys22?WRdf>(M#;_PhO*-ldFbHuMB5I6`DXXgr7;WPpYa$Ktk)9BQdbV{SVU2UUL zJ$`G9E46(MHqA6*F*t*0TUfPM!OHxt|)=w_|IP&`Q7OmO$5UAF?5 zO;9)51ov2ip1-jmNl; z8S3W&JW5bkN)y)@f_0R_qy?a^lqRk@1V;lH0g_5-<}wY^R7!J~ZhH$Ma3e@6rGcx?)3_?VuIfGjx)IcOK6fa6=Q9VuOpx3&Emz6ro~htg6u?`Y zf`{;f4~2@K!w)_;T8`3Sl`6$9IDoi@`LIBGec?l3T$y~a49oig7;mCbd-?{-s;L@q zPSM?XLr-|`vkbR)yA|x|{Y1N#V1 zp%_JwYd_{d_FsXYui*VhrvZBY;XP4Loy_S_8~uu?r(Wi5fV{Ja%iE#$$$*3&1=(+e z>NEZJpqX&nN1o}ofO+sn=nI8VfNdXzmotIA*!EF)zuxxIi)|l;motIA*!EF)ITP56 zZ6Ae~Gl9L>_EC5_6WEJwAGM8zawf1B+dfLVoC)m3wvWQgnZRCb`*@GGPtFAPV%tYa zmotIA*!EF)ITP56Z6Ae~Gl9L>_EE}{Gl9L>_EFO1OkgjzeH32K1jdVeraU#kP;a%bCDlZ2Ktkawf1B+deX#Z;A%F?V}glJ_=yY1omRvM*+;4z+PJChH>$XzI^4=kWXe?+urIvTO&3odpMWy#n zoAt+Iqf+k*n+*lujfc{^Y(6P?9eSnrZktaDUWtz4U1{?f!S(dy9-Ge&c13sd-fQ!D zR_HPUtK9Abu-1NCbA!4ImL}@WDHEeMr^LyF*CN5Z{~9iF*AHCa!K(6G80_5*LsDIq z-kj3i%&?xM=W!`?w>GRl=?MyVFl;F43=DR6F>F$#TkqbMyN6*@lJ1y+)C&!pk+cP+ zxd$3HJE;fe@b008%}Z*L4E7Sk7Fq5uD}f*9eiSC-?d?V0z$?fe~-@yc6~bIr}&}A z44lsR4t^)|bVgszG~ynY$DdR|A8p}FNJ&tPp^6}4Dg0%ns#Pdn6~-J`JQMA0{&KvphgxUDFTt97?(Tf_*2S;&%@2y}+D`of98 z5>>(oTncn7NUQk;YlBb|wW^Q!Up5rVs>kfI8i8aQ^B|=<86AIiusqeI64)aW{;pWO z+z(pH!l^!AhyRF<{t^P zm*d4%xGyAnfvoI35L?Mq{wQ78YL>782QT|lvHB%}ltPIso*$g{Mq^lqZq z6-cNKk!o73<5}8PdG}MSFA~~8q|HBQd(eBv);0(t1O7qV!`{jPqiqUACTp>?J$=f1 z0mbO)Ef86t#m@G0i+2je=;?Zhto;XV+r4+&+O|UExqs01vUi8A?R|*6`w!aoc)zl> zeG8GVDOTld+xB|3U7iqTcOWbSA4ZpR<#Q`@I$V{zX@b=QoK>=!iO1uR$SRP;<8cjV zv1&_d3`OEaUL>*_CGjG!$$2AlhMCCWKoY}V$yu!PZP-%uI5^DoTPQtlIJ~o9wcYt zC=s%5k({ZdKx_-1?CIaO0*v`$3in9(b|V+1 z$>G>~qb={HKx5{?`b(%kfcyF76264Gk}}wp-To3vc#q%y5=wY~!2S|S_)x(95=!_a zzx^eY@F`Zj{Uy{Q6yO`ys>saos_BP_=OD*>cHtz|{DS;>3Y~CLTagOn# z&4>J$V!5~5Y?8lyNANG%d`e(e4T$fs`Ha9k@-N$bc3?KD)BTFg=lR=q>tnfh+I*3} zNAI?l`&FAS@we^;{jb@4b$>60?RA^49eAt)^zE|wdVwd&@3#3yfoI6SVe`!bFOc73 z^Q{6dT;kks+I%~IJL-SS<~s%Mz#P!M*XFzWyCeB+o9z);K=y30$*4az{QaM!YZV{unKL!Mb{N7|Ao~bP-AB)Rh^kd ze_<6W|AiG#)lTFWR{V-2Y`(D4&AiYGn=h<{^@PnAR>Jzj<_jxfLt*oUm9R-+^M#eL zDPc}Dfl2v<`e>CF~$8;^AnOjAikQU`Y!90X70Q zM?77?*k4!)G6G0qhOcJe0DgpLb;ZzA+ti{J{v55;SJ$wf@Dy|{UjxJX!>22PZDQC^ z_~$FYHaBcin7c6fIvEzZhl2E%5AkB$XIz#AQfzhiaSjn)XFGix!bUQ(Ri<6aftmo zR?BJ}Lkgd%4L;u&I7PK>rX%G6BMG$=z&_-ttveCyqmJ5UBfxI7)rL3F&L<6<6i%TV zn+=;1K0}k9HEc#WcnR38hRqIJ%=@BY;qxF$zvLcH3uzb}e>HGE=8NGkyCdawBWZ!zLVDe<<#093Z5~n zClDG9Rw={#0}~lRx6OwFeORp5=98@W?abg;?w42+3rLlVjjx7M{lSKIqbpdUjXAia zgl@yXSjk2gbcZg&wZ&t_^L<8NUFALxvL0rz^EXy%A@g4rVgAP1%-;=t&}GFx#@^Lj zxyLgPh3q_Sm3oPJs_V;`mB~EA3U!|Qa6jeisNAcVheCFq3*as05~1m6+bVQB{&j`& z-4F^rf#3en8~8UVbPWIIgAhbvJC6Z0vy(Tqg3TlD8^OT zJTRXPbhN6>yF6E6i$I%6;K!)S{2UV>{RRFS1AeTk%)J*~g`F_2a-x9b+(0Dbx-0 zLbMWpAEI@m&`IcD{zgPQ6Xid!N%RaKkF=&tyTnP$P+wy#@i!rQwS#7seRaeMh+4)J zU2djwz5&uH+w7DS4oPMISQXU^qmXlLZk)j;AN zs38}3KovpR3_QRN1Umz056aQ2AnS8=mzxaWGLV(4j-nFOT$B`dyXDUVT@PHXbc&jr zYl_NRMy+$DDAhB2@dU8f<>s@Hr;%q9DC;4F5MT>}s&}Ofve!$QpCSDa$jY0HR5da; zLH&M{<&R$=&VB8aI5M|}IG6P{Z5x@}Ol#{Y+D3`CFz#J~e2SCbfn_v?HWaDyxn>?4!%*mAwHiLp8}QAv+)G^FWn$U?@|~q~NCk zJWg;8C7T=H02~Hc`HL{Ts6do8RwAs4!=NEG7btH{AXi&c8$#7VVoe~ooHg-c%|N7I z1QKgPQt*5La|vo|5{!ueHi4}CA++XjPJ((Dk!G~t1FWuftT~)h*MwTf=5S6M9fqC~ zhQm1n$-2XM2FNl7usV+9=oVBPU^S2w{HcHg0rUr96MlwzGYZxC$)FkFs2mr|t;!$K+JUI2Fz)CJ!v;4T2KfzZ3|V<#EJ zMNIQ|2)N3^98TgeD97%|x&j8}=#CtUD9aDZ){S#e&IPQ7h5+gk)J=47j_!E<0bB?Y zqlQTN3joX}sEryb;9dZ`KvuyCw)hXTE9(0r+pb@cq~3>J*~c5|jc~h;AMhrcWS+W2LbE{q4=@5rsfw@%UBfeLD4kf zJ0z-io#MxqFMeG4;wOmG{4`}{f~5FM1?&&tB7(a3i2_apFac!cUp*cLS4Y7c=UaXj zJ_oSsf~kf0UA=t4)w8=s`(0DiJ&in%f~4SD0{#TxM}oTG+5!gBmE{9j`K>0R;7_v> zR4WwB!m|OZSDb=B%_2_R%gc7kz;Yy32vu%qtVigl@OI?yXXqVD^OTHR^@_ky&#ep+1`FDr+l)IEuG^}D0) zP{rm{w-4xhAW?T%)VZ<{PFtNmD>na64)(7_smq6q>Wr5Y#M##>Hm17vKwE=E-7Zl# z5x@kHw(fe|mvabbU{_Zx8^Y&6K&^K4t*%&``W^tf1|<5{ioTBk8~_zD@CV>+vFwZw zwXHeE42x3xJ>=ABNA0kR)u}cmTj3VpRy#t}b^_1=q}6(0W|`VCw6;l<+JTT$-LSYO z-ZzoDnFI7{kXYMH)IJU1Nsv~1U6i%?by-DcGRtcGb%?3;j@C1o4QTB5K#zk&s}ijR zIm*fdX|0b%Y0XtHG6wHwmW8%H4sjaMj zrnS#!=IVPZMxKA1K-b1PhFssC&%A)l{ZOzLgpT4uTd%BUvS~k*nWJyzB%@@#&B^*u zW;bU29NFFkW$79CLzx%z8jXH9j~)1t%u2k?+mNfQ2S89<%4^Y`nd$o8En4v_j^aBr zJ5%v?WY{X1+VWC&D=rkg&$R#O$Zt-jTQfT`(>KWQrDQru7v`NKQ_T$9`*~7QS|vQU z0>Qj4H1Dc&WE$aQx+=3ROKOb_%_UP2r^T0@BNIQg` z)5$bSN?MK#OC-~D*65&fWMaijNrN)mv!or!u#K52sz+#E&GfQH%gAvA%hKap&GZHw z-|)P&q8h}DdZidqj!q(4DZP~=YO&2GQS@fqxR9Wgokc{G(i=IV$7q0x(aIhmqALA- zNA%i}5dASNLH&)}A*~r&IbewBk7;cj(S4Ud^e9B58w3Xd5j~pL))5^-1Kx+|pU_Ip zw6&Ha`hHqdNA!BSwG*PhLyY1S<$x+$cczs^U?D4GbBqBTEJbv4nw~o9xbC6W2O#<@ zG*UCQZgfN+NNZsXsI0cI-}Fw4*QZ@YyB5G|sZ??AwC1ehzfiqjfu!g4PU~uVp58?8 z!ZbbIcp?vz2#{4p?PVt_Nvlw9x?7Nsf#z~Yb4gk|8qybNH;_zstEP45baw@SB_KV} zaON(9ZL#Xf$MZ@)x+zoHIaAgQOfQ?Gl#Lra)QEK>uD& zWwn@X^+;-Ye;C(Ntnx^pj-)ncF*BfT3Mea%t?Njt9Vk8Z_$*ZiY7Np?f#5(Vl&m@! z#as#C+QU;wQ>j=66U`k`bvrl?^av<>v0LXENr{$)cw-MF_XV9&^?gBd5ngHn$$dd* zDReM^=AgonD1}Q6g>&(Pv;C3<2H68=5Mr0VhgJ9(Fnv$(zWw7{{NO!7$xlZ74_kaF z4!wfe)KwIZAJne(wBjJ&*H1^EO8E$OD2Age97i8aX~_`Y0CX}adkL?r8&bMc zqC#cNlR&cg@=!{BHo$2B#(>28M^d!+djY%wDrAGE3$S4;Y^bcRVJ*&yv4ORC)G=XB zN;8^p8u?Fvvfg4X&PnMa%^iMh9txmFjE?42;Ky97RZ4}`NYNEG2k2l>b~=5pkCzDk}k`P3EfB|Lh0M+roirYK8J)t^?I-XC>RbsTK5KaUsy2pzISI z1*TTeha=7ea0Nka^Rxr-5Y#6LI<=KI3T0xI2TY)|Ul0Y`C(1RMj1aOp~4rH?m z4GAV!$HWpOfoxWxHv`!mKx0sr4rH?m<0y&#B;jfy;Ti>jksxg_TN(z$vNx5=jf=&q z7gJn%kc3}k+`^!(<3qz@*GvyzAcmJeuzBxIF5g_PL^-NQzU}4SWbNe(Kv#gop}oo4 z%Li)Uk_-}C-$~Y0dqGWQbq4*<8nKfL<|XqkI6cO^OQBjVDX`5;PwvPby9nq)kW@l? za$iPq3xLN7>PpB+)@}4}06!7btvMt4V(J=M3$uHWwC2oYy_njkwz7JFq%~)X&KUrv zfW+l2ad{U5i=uaRC1a%+}Mfx+4R|1#{lGglj zq;a{{{7FQ&khKt44blepKui1orZu1DNYpCE%coI}>Wz}b%T|&0Y%ay6c!Lm>jY|Ua zjH1L70M--i#dg;^qSr@L>tam?lzk6}*47a{q%8z+JxCfsTk+~O055^6Hs|c8T_lZ< zX*At5(ondZ)2a;9EuRad`Ue+`F&gm+ZxuBFms<4*UO(ls9~Wi# z;NVA;r98#9XOAT5t4_UoxWNF4XOAXz>& zjm$`ZVJw|bIS|RgKAQK&aF};2T)rnf1TCstWjm6`!rHuFfPM%P^F9xEU?e|if|nsd zV%`^FJrDV$DQX@h<{b~~NWRky^AM1>K}V9t=t%O1jwFBRNb-k{B!B2g=BniSF!lGu zIK?|2E=~OjZR$i7+sxk+tFtK=HHS5zO0SK9{GW+>ia7v4KY}&K1N=+CNdPVdmDGkp z-o3m4m(4Op$smKh6NSw;*ymB$QwIC33@iK{7;kY(ELh2#tuz>EEA|6pVznqN(a5!k z!qSXfuP7|r$c>7^ij3S5(P&qBEV`J`n-%ck0$E2^cc{!AZa#_CU#@1_OwveudEMN zIv-5-#4ijGsy43S_=4EM#~Qqz;JQVXnSvOK0%n!+#j2l7iJTb`ir=|=+{2$EV^o}eFLy#Qbn$Y}wa zql=AdWN#VVvr3@L1>g~ay7n6g_yd6B1a<8<6tJ{C+6hQ%zmb580Ne<2T-gLuXts&C zgYPo9cHPt+YvR-L@@KnVhpu-V3)fGF%J-XhQLehDy6yVukY4ur8|aT9as71Yd=3MB zI^Z!4$T6oMvN>i()zD=IkFBBk<>k*dQ`b{(BuDY{^ZRU!QzWv<+bQ?&_ zToKZ@zuyBm0+JfKJEZ$(myY;;1tc}JQotJlTuV^b&^-d~0`NRR-9PUYu%r_{z5qF{ z_l7Bs>rpi^-r%t{bX|G*vt36GRaAv^{rad4DS6ZXGP26*+4Z3&ypZbEvmPVxV_J;p z_m1eakiFDcMGd?ZqMc&`Iu_ojdNu8Ub`I%Pp@l$i0%`jg?y`%>lNkHdhr#l#=V5C3 z%+c~;P`93=K=*-ULh@m7C?(o-#y7wqS?t*#)R+Gi0G1Kd4}lK|xD&t@g8C8lK>@3t zudIBKt^q!5dj~pE1Fk6^v6f-7t;KZI#};46Al(>a^KfWULu%Qc-x$=LeLm2+AemF& z7}TA88-V9PPPLzpY)-Y;KF3g~Tkw4hI6hJ=x2pI#^r&h`m!YszP+y<|U9emPl43gr z^#$rY098QJg3k}?7Tga&FM@iE=_25b0OkfQ2B(m5X4?e-*)s>izL>uM;v1XpkLA6Q5M3G*plz^D`Ah8pEsfV#+s}X=2I)S{@Y%hjirPloy2og-xf$edJdu zb#0@+2h zF`rGYV~la#pjZv4XB*cspet)G(1{>1u46!79sNBpNhYZGx#<`f%n9TSfMY;1f$SK# z6v49&1K1BTH;Lj#Mo(oWfn<0*KcI)l-T=B2)DI5326Qu?1K>)6(;3j}--z|$Zn z3O^&Fx+ZiKqUL#Fc!R)TX33f1^r-n|)qhNB8=IorlB`EYX+ji(oMW89mSxdZ{5K3! zdz~nr@#}V6trxDTAc^7`e&-^>P4aZ*l*Uw6nX?1 z)J)u(%4o69uiI5pZ;SyTDRiA*x2xFzE(1xS_xW|Z!YiPb2P748zh75KO#meXb%i|W z*A;RpfFT5Rg=`S;RRB9cQ8xEd=nYjA+km=0#@b^LRUbRnUhmh>AMtXk$;QavBf}+gRj#pGIIodSyC!hx8k0aq4*d!xiGk<+& zc2g6Msv0q(dmPak{<_Xc_#LlMt{8V;fdMMHq3y2AuV+KYfgZC>V=&5wrVVVjuVPQR z=yn@-5wuKjw7lxmmC^!eDaaZ020|iw(4$Lbns-z4kQmL2s5#Kcwr_|}k1MYM-2{^A z7~<38%IJQ0`~i~2In1XU=P3XuLC%oo^!x9OG5?Lx4{ha(aWHOcTzR*B{bAhaj&WP# z^aY?L&?+D?Zfl&r0PF?u20=aOZH*hrrPbg7Wqn6b-!;DwSIR*zeIOodB0=1EF;2UY zH3(mIgQTf#kJEjuHGrld?Hk7!$G2UuDSAwEB+mW;-$t+>Op5VsG8C%;jqSisiqoUQ zYM_fj;@hM+Jt~9- zZV9#%9s(O$G_f5&;nf2`bD)huV#5iq9sq^_7zir5A9?NJ)^1M-Y%wZCZ87>=;W;YH zn28MPQAht4ukLXhfZhWV{ad^pIe?u3a0(>uJnPl9K5i%;9D#}sL!lIEhK++GQQT^8 z`C(%}N|Iq?wYTh5jXYk%7eVwFyiUN^3OK^J@fN&@F7noMhK;VAi*S>^=nj833{agR zFV~DwUVWi@5$N+Yje(_$Wu5zLGD zF(m9^qc1SJRHnIz7x$O(fmyVDV~}69YG&K_vPZYxdx6deNswRm=+@g}IEn&EL)z)l z{cSgZ*Fn0!aAD5rT18MwW9({nB+mYU7H|j0+)6RV9fo3+-P|^=l1I1lv=QhI zd2}nkAK+S$3>%d^BRFh)2H+Kfdf3SG)Zwu4{YYiK1rj$3#El;>!6s24X+VV@-GDMi z;duf`8(ePKuwc`Ff7qzW%k#U~I4wHxouODQa(sK&tsBO4pkqPe+q-T(gEMru6*mnoe#kOg5v8;2uCPK@?7%fjx%RxuWLYEHpw?L18bWi25u?rIRu)zU|E|qD{ z;KZqKjOLc(p*gdaZC_uPzMzi)It1kOaMaO3HvULV_BqV{gp)nu()ZmD16>1>J{)oN zW*`0oz$t>d4@X=h*oV7JK;s8V#Z_?WcDNS6N|3HNxs!-`X9~9_W$y;?m6+Oo81^eR z2V>k{!N|@Lo}>Ghj$OYhJ>cwv()U2fGzo7Fs<%w0ddR?x%v7hf9gDY=jz!|77^RR& zOnh5u6Ym7L7z9lpBmC+)qlsT7l^RW>98J$DUF&Zm!!F76JFiCEo-Mkqu=tHmrX@-b zB%X=5+eIcR9=o&gGI=Y&`5>$dx-juk*I}y|!1|9`K7tmxu3e{euhHv*od2mQF`{v8 zY|$yoZuV8wRh;~Fjs!p07G%&t{>yzRj<}p{8N8*6+fAHvABqY{(ECvQ ziXZ<^??cf94wUUf(a-~j|C4+C}ztg{b=u+Bad!v2r$aYL$M7%{x9r9F#yGQS(e_1qD>qM{lC5s#a`OLq7y^DuL28bLn*F4 zzHiK~09N=aTvmMF8P*eCTm|e2!}=|E6DaWg;_i){US{`I_k~rUuMeL@y@^?YFCtfK zek0!xkEF2Bqp#i^l7C>@B}rp+e>jwXQ5viX!i37$6ja%?^$ zFdf%_UnQH*4&0pwKHui^0&#df*jH%tMS%`s@WnP?V#QZ222e%0@1`?!!QM9j`y1Q= z_P@Ko!5GMTn8D7E{S9_A|G(^S@F4S0$j*cP4gO}Hf7##Q5c5#T&V&68xXr}>WPgJs zb0HPbCP;ScL8$|SNqHI>>N_c%3()%#|8z-H=;BhzfMihp4`Fc|z z4GS|d3bZN+@e5F2FACLhg!l_ub|V-SpScVX@WwnrTnz#FK-3#wgNE5#LwMu$YxB2b zT7C;Cn|p8|w|?~fJb*1A*&4zZuPgExfX_fyZqv&lxx|*NVGmE zTDJk%3esASMrke3`+TUyh#Cvz-#d`g+gOOPivta)_Gh3cL85l4sLj0`fdQd$Th@md zpsfPELx{RIN?#oasBaxJuMLz^--SSXf<)gO(KidgH6X1|;euclsrroj@Ia0pLs<_0 zc#GE_<;h*t@IX&8YmjphDC-u+e|TUR+M@Ge;mANGj;~cF<5L?D+C)o)p-6S5Z0|st z9^$obqkgudzIWgPs&9d8O_;SNTMB}NI$eA>~m#ovrN zzC`{{sN)IN+ZMlm5&|8S)jjNfHDh$txB`YO!KGLXsp;1~4hGsEl>I34)bi`^F0Kb~ zHNlevYx{dM+YtaCf@E#4)SpT(8%|MH9Z;pODOpz@(oF*}oZzJd>j~(eif4$RN_%N7 z4uQH95vm5DGQk{rjf0>Fb_LLh;AfOL8hO&Ei@pM2eGp0+fhJs8-B5zW z^`;a)zhFtet5M1n=#ogT_jP3{O@Y=0Wmn8ap8I_LC@~Ab43K`GIPFVnDbK@!G(I0d425c5m$6?8;dkmkZjxkM4Z-t8_=6T@@~!(arzsLZ2+DDRhmUbPs!7)9|8OTs=|Ob z#APG|UHST{S{@-@YI)KFj~~;I+A6ElY^7Jn*x|hvb_6lOmwLK7t}Xqn0kjw-c3d5& z{k#;wFp$_WQ|x#Xz%GLN<=$CwdPF@5;2VPa)vId-%$toDhC%Y;&};#_1L#apzc@5U zz*zuhfE?d`*1kn8chaYN);S!l!+`(7KH4Y7(G5_jmN<^~iEBwm_X6Do5=Z;Q=}YSu29khRmWb5>a2`P&@G1fh1u%f1ep9PNz}o=aL{JC3s({-7JOgrk z8wLB&dbp%4-{k&#z+Ym+d>v2qqFeY^P^gkpZAV}C>g!47bub?!Pbyyb>g&mk0Imed zh`rmZN9-d24uJ~UoH>1Utouu>bK15e;ru`&Na3i_BE}|b9&AcYvu$eO)s3Jw&^(aX z)WWM9!Fm9<6Vy-YTX;t^TeIuYhC#Ai-_l!u7;I~G1K#ukiS@0;`Y!<-C8&qaHuB6i z;YNIN1k#>x-n|RqF>#j9`pTUAOp=U~^~&=6bygnT52&uZDh$xGU|wbQ3_Cs#AB(P@ z7O+Fz=Y-;vr#ai(7c$Njw>6LP>uO9tkd*uvRS>|L^ zuUsMtQ4isC?VO`mR#v-sUC53JLVZ}F>Q}UbknPq}=V3rE1W6FG-FoW$G=PUe;##h_ z_A7v&2i|pwi6yVObQ8%~gm1+`66DwA@ns7DjX=?soTJV5V4J-!#-K^arz&UJp}EhcZ>5$1 zy$vJ=-RIIT6Fd!I6DYcvXor`vzfX?Q{~j`^wT}MDF5TZx13d*2{gYk#y@BGz%1Q-^ zZ&Sp#`vI&5MHhMw-*zzA^)Bz)Q_N#t4oGi*n<+lqag9~ zYgrQg1;CF4^<3{8rRREiOOX{Mvy5*A>;Rwz$g%%%6y(@nM6jk@ zdI%&g-!3kDmSJols9jzp-ZceSA0)G_#R854Fp{92Z7mUS1%M?4^=xaYfUg7C0Xo}c zJ$t=|&QFdp`4r?;1>CQR^OKdHHKyO8tO}sBHPvPqE3z{+i_ugc^6FJbQ!}OSuKNSM z5G2mG5a(wCm`+eT-%_l93czCo^;EN!fJXs*Oi(-DTEOJx*sTO4&bJY;HGrm|vrUHc z#p(^#SB;pb@h4%etasEBReIQhXo(t1(UawS$OIUnhC;lm z-oWUjzW=%%;4QXw43fRlR-$^-vYX56c#Jw+a7A?7tScq{PBa-LR2^$E#~7xM1~wQ} zO>eEYFpbYw@U^(^9$dZL4Lf*Q!M8aYJBcp;vBr9-x&m>P^rR8Pcjh{N42*3d?#4NZ z_!ie8mo=v`o&%_NF;fhUnI$wFAg7>izl@>uMOw7;qZ|KXwP^QCFi%{@DbrXLB84H z#o;5u`-41u#EZj6gb(TS-L~6oQaleI@xEm9DZyDaAdbUFL_8xnk30?^5k5OOJ03g^ z9}zw;o`;WkciMbWJP#l7;_wkkFNx>jBVHUnB7F6D9zNp5;UmJ=4)X93FAg6OzFv@r zk9cwTi13YqJbc89!$*W~7Ubb0UK~Cme5;_#4IYP&2;VNAhmUx1_=xbGf;@c0i^E5R z?;4N8N4z+EMA#m|1#}OGj|kr<$iqjxIDAC-enB2S;>F=3!Vik);UiugJ|g^3@THa) zhmQz9(hBkL5ibrO;c+7#R#@4gc8`NQ=b?5>kzgNcr}OxRpmO&E)yKB^Ezj%topg{j zUL%b-2RqB-@ic3e^gp5m=4q63Mf=BKge_R`}W8l6eA!>pgRPohNxCL|g|9>rdth6t2$< z8%pL06t3fj#oqjjs)7I6%|kCdR36E5{T^t7>p?Of^}GHwl2&jf25y&2&Q!w#*5Crn zkX(M7_XitI0iS5|p&-wsaHZIMQt)*JzM{>i1bGaF3lG0%X)iK@Jcq(n#pbiE&|oU8 zuH2hw8Z8PWxk^=FIerCsV1%o_Eo=q5O$Xo9<~>24_uy)6^Zp=@kZ^Uh`H&S_%`kLT z?yk`0p~^s!tCtG2^FcY!d~o%#g{|OGJhXESuz64LB^ox==KVoFk9Cc*`A~4fFz^#> zJ}Jn9A6%1dJ|)p@&yT($7R|~UXU+HxDsr>$O^S*)ug)IPtqB>P~i$7s;M_c zv9H^I_has(UO{q--f_RF_q-iQ{SfH8pi~PnLY{7vz;mInXFUR6VLO7MD#mE~i<%PA z`9)Jj(Ntpv=35}qRMF8?VKz1Y<|%JYA4p;^EnCNL9&OD$ptBtvzjez$45Z-IXd>2>F7W^R>tUX-31-><82))MMo*nnxNDrjO0pBH%h3UY0GKG zy&hc`Ly+Ddl%{X?R|$AKfCZrRE3pz&?oYk$ac3+8`aF`K1!c?!^EQ6G1;U#No{kK7 zghmdDG4d!R)Dg$XA!1~OyOk9NrD!9Eh>Mbz!MWC-Cc_%322{4E7;~)q|HlvZ*F-D$1np%p9wA4nn7+Gm0o;iXflG#oq^$7&I zVo5iocL0fbl?1#Ez)b}ET#CZ-1l$VX8BjX+RxS6Zy2IwLXeN>mf-(+)If)-9K(KiN ztL{yA`Bvz;2R3)YGjOr_O}B1^^?=p}iOp}i?b_Ei?{(|iABOaSAhG#v0apOHji9#q z9RUvm*bhoSeU{B3*jxcO3xRvFCJoAn1Cxs%*&x_l$~e!8vAGV?)Sr&cv&80MKnH`w z=2?!-dXIwHV#%#YpAQn7=Lq;3fENgAo97A`TBWQwPS^C&Mx<=d4lIQK}AmuEua$QTaHGycKiOY*SVfi_*$U%f>QU>iECYhC;@|XZ03kTdy&2i zl%|`*TmilJ$y-3WIlP4*dq51p zW4J0+RO=alVKD({21CW_VXii0bO3lc&Qx)@>Z*d60DKCa>bMht0#{82Ao2h<_yncQ zWFZBvzLaPNpbD|xjpWWfyc%VCx{1PbRVldy~$2TB4 z$8)nPs$7;EjBzeA3C?MYg05y{v~!%uWUBe>Bi~}#B)Yj-55l>95R}^eR#l~QjezEX zQuMCe->OEOI)*mj7*~SRMA5~(Xg>__Zcy4CSdmcQt1y+fd1m9GF#L-RS=+;NE zy&yEcve-<=jF0$4h|z!Rwd)!K8R$e%Y8+Yz@^qjCdaynL!OXc=A$oC?k;fMn2G=NV5V!7`&DN8 z6e&MJ=0|3FA57qJT#G5XWlO<@+QD%k-UW>1*!0gf0*#gpZda^2BPu*u}B_Gk=(Q6q?ETIpuH)1dP~Hb@T|1DzUF))2LRtNVm3J@Y z*c1*xW}nvOGzE-vc%4FdPf><#;RMpZ`v+ZV%A1vDba|gtmK$UhIl3~aD_wb8Qii&6 zke)@E+_UYdIB#n{8beAic{!=qgg)Cv9DqKxRaFU7e__Sb6u^ zx@IE%YOU++dOS~g&rpu_xC}B&v@WL}hf-H{DJy2U?&^oRaISE=%Lp&WI+44Ie8 z>zYAbb(MFLt?MAt_y2>g#>%_g)^!pxCn#6!*mXN~HBnw|Q{X8Kcp#2Tw_!A{%mcUo z4}0$!W<{}u|90;%yJz;EuqQA>8kiXdMkJ{ysEDX2m=Q4{DheVhAd)>Q7*H`D#+)N6 zhT}1dsF)Qwh!~Cmv!cfwKrx}--@B@N&j!c;eeRcgzg(VY4ZYsAs%q7$RiUeEcgO96 z+iHkz`rtOK`)qbseQ-N&AKX@MP8fY~yKB$U23sOVf4Z6 zuB)dpjQo`4E7@9wbkkS{yS-)yuWSFAaE%#+x~p`;#?00dcC&q(#>`MH3%stqXQ25u zr)J~2sdJid7jA2swpaCbq5CX%*J^3LC{5i;In5XIHD8Q0|D2BIa(jMIEPU-R)u z^MBI3OPacEaGH1JYu*)Uz9h|Sq^ZTa)4V2M^O{KWA!(i`O-)Bm^Spe`^CHbJr=mGW zpF-CZ=``mQm26y_}bhRi0y{sd>?9jw$GGUYhP?Lrk-2rJ7}^G@aJaf_|oD zn~_5cb}=n4&Qu@s`tUY_@Oe+qS@hyfJZ}&o68*b=4$pfMso%Px8>GJ1fB!E(@4+A@ zy~2x=U&jiUGv={p?u+cHIny9FIV}$MSS1%HH<{b^%37ceY4X49+fvBy@~}|@{dS9DE$?y zzvQ10KREqw>3i|8JYI#@1n)ci6QxkXFHB7Q{rYVK!~@rXY#{jky};$i(prN34E zlaYLM`ga;2SrGAK(@#r36_qzWeM}>K5XmPO?ZgM#lZ6rg|H<>79?7rcg%|T|!#(f$ zHZmrB-t%3=Cy;MJuta=Nw4)xltcmzc`imY^Zf(SurEBE8A0oc8X!t(p{}}N#MZ2o< z>mt5G(XI;CpCZ0<(eT0WKSz9*q7mYMiTEZjQzP&H8a@G06i zO<9N7E`@tC&So#AOUHH%H(|Z(BiaPsD`XSd;bKRGY><6}p*}V;WHZ?n>g=OKwk&&f zPuOuGTbccqu#Zg$S-wU6B4HVu5?@8}2^C#d7MoePKsLOldEkUl)63qgY)=W+U2HBgWd_lzlb`<1PBk8)46=u$5@nk@ZSQcM(9yLY;)a`yqA z4b@sk@9ZV{0}pc2407kY-m|Ku9%Ac8*f{y~eQV{(V7oz`Rox|&lGdMPx&`|>^#BH0 zZTDZq8#y7b-HoWNMrwb)ks7P=FQlh88O=gx8r1$Cm@Bxr%o5Fl`%a1U=T{|S`P~UC z+w0ExZglQcqO)LL=HewKs_RR26*!xtSMLwwG)3Lu5ZXC}26%OQgwR0_it*5~ZUord zq?{OGPk42QhS+Hiix&~Rb>qXtm*v2WS2rcpyfX)qLynFsHkf(}LtKQjtx6AYT7BIo+0=80FOF5q5zfuQ6AIU z)^dxY%$zW~Md{XabaacNsyShFi_)#-7Db)G38Pz-P0rB_IG(kzHnJ8&>IfPS+Gqen zvW-SCe^|{)gN)r>)5I#QehsRzS#Es6VFJq@3(ya0+ePIZTVP|_ zIDjJrE@zyJO>p470Cz!Nw+Do-O0qoHVAf=ItV#}$9ZfdNu1fByyuEJgq`6rFO%3u+ zbF;)C)3nKZv&245^WQ4IQkoh^oo1!e^tz9ca95t_OE>O>yT*1r7H@gpr;I2uFTQ>5 zHsDLNbsI2?ri}i*bOyHp|91=jSg)FcNs!o?KS}+G`9Tp2rdTYsEq5&OrdqE1ww)uL zqou=5i*7E~b>lyGb5W2;9zAJVbjOjpGZuf|FZ>wC1Q{%fzu=euLunfLi~~Eu@nwFw z<)>CG_@-bdrkwaI5#J-Y7H7s^jrcynD=e4duSI;{U>{bJ@&87A|KQmM z_}3$TKrp)({2P9GF(Y`aVNh@nqd@%4sJ=skt-HX#74drnr)>(q$}jI``on@Jusi;? zU%rF!qXXTx#NYADcQJliFts!MyHWaCg*%O){_jQnNx>`@p7Hk`A8$Ct5B6uvH2#4z zFy1iN4{oHH;vYu9JU`H#NBkqde1D3FH=O4O%azB+k;W;BK=&5$)qeRn)0mqGPL!8F ziAs4Q5u7UE(+GGb5u7F9e-W@W5$Jv+{+X*tykU7FxP>jv_~%h6D-*$s()c3Mcr6j^ zB42(PX}p;Te(4VIRRp|~2=x2N442UENFWEy90Y&Q23Ixk7D#Q1S_UFGRBWbCZyoc-J%s^DO ztri}ttd3Mt96FQAL)*#NYT^74+BOv0F!&XQ8wzeD@q%bWAsSht4F$&sh0%tB<1<0D zq2TzkAlguHd}R=AC^){xdZsoMR2w!Ff@nj*$vX$phJxd}1kr}VMc5r{XbPeY1t;$l zL>mf@?;AuL3Xbm|L>mgOya7S9q2T0$f@nj*@q?{fYeT`6H#CSg6r6lm5N#+penb#$ zC^-H=>-5@CaOI5(q74NnA00#+3XUIZ9b6j`0CI#n_g0gPOw(kPAqMy^8`%914!z{sVK2_;J-fS;vg<}&^!v+?*( z@_LYXnz^e~A?cr#NyZOkwO0C^xRbNV_$g0#LFwn>X2Z>bEA#)$BmDgq;n4s<1DH3)@uKQurr?J#1;W z5mvf{UJQ8^{xTJRS%I%xw&jo(J>DAX5c7Htq8GRW-Y1^mX8MJBGkx<}8z1oINTcTD zMD6AzuV~YUk`gO6Jc(Bw(A2>!MYt6!dH(ypT(GGPFo1LkqTvP!<>5JqATO z8Co!8L)0s}zcc8F5RFcT7U^VY!QmkqoeVV-E{;rKY~^>NUQxJzA>8&aVu{2nmtjtV z8)G@Rf>l&f*M$kSZ(-sk{-zV{SXBiBOC(6HxCF5X-02_f61c&^xggltps_sZ(TknK_YjHD-pY@d>uM^EAn$|*U9SC4rG@=7C2 zsp9I-QZF%E`mj+R-ASz56TN?h80T`pQi+8g)S;69!;kT=7nsk zc$}nXhs6iQ39;uCeMs&c=`21>>_w@8&M7pkOi7dry(GRF*O@+L!BvI(F}Rc*cf>J# zM>kjqiV?+|OX-@hoXV0Tr%dsJYeTlGc+H7OuM5kmDL&<7*y}?pIu!3G=?x*q5WPsyUVV7c)^|V`!TVs zPjGMH%ADQz%wUQ#zN7qwN-@lxwV^i)*_N zV5~c*z3gDN`h&;g6M@QVf@ceNU<`1f^jzo(ulNxa|9r0TCW>7evIWIM{sH?!=*6J; z7D-nG$|uI|K!G~hJ}_2b#!DP2`O5fL6j+|}HE;#5m#jvi;sYiWuc9OU*01=H6_^dl!yrOp%F;LN+ zRbg?3jwY23jf+ih@jfJWf(0HJ#W9qoBEK@~zDbybr#V_B_p+df2dBhZc zN>`wOMSH9=IASJ9QHYEdGFb(;4b*c`Le*=t9gg+erPTW)=z5&zw=cRo587W^?X!7M zwf|4~IK{JYGw00$HdgJA;<4sESc2~zDqWaRd2Rjsr2j{#uCKm*H^>h&0nPl}-w_=a^P-W#u)z{9dtG=!LfdW;1wC|L5mjb_^v`0nS zE=gP8S5d!(Mg2okE6?m~>o-aIODMfOCsj?!xq_UFeoeZZACgoDM=a;|h%<=O6H>nH z@K;JKgK^F)2!c%HoF61n5I7H+13UP?&|mzsVy@_uuHfbG&^}C~d|8KG?m9+B#C0n0 zM9|}*j{O)P0sDMPDJub%3w(jX0C&Cj0-qkn#^Pt+x@!?C z{;H@dLf7Syvt3-zhiUkLQQd>6D0T-r6+TlV`E--d;P1Z4xH`4h@C1r`qo_h=Qo#;> zdwFC?=vol_SN1rry`AC7xpqjbUUl9Ev=8K5J0#Xy8vg`1SD?9eNNh*B_8x$LLA7Ci z-U}G!T)SuF+DNoICmI=f=%*ZXWCRsal*?dZ1a-_oGb5-^4w@Z8bt*=#-4oGYTq~hm zJJ|_abFEb5+AG5Jf9qN)=DW5q!I45X^7od5x5_)B`4W!tFCn5EE!GCa(sFL;6PyKs z%;5X!QVBGyxs|b+Qzh$rlTJlFtlFvgdpSs5avKNnt7?lNmv*?GELg@GANI7k*rg0U?XZ3r=Sf;{suX9M%7cuPqOawYY0CEYmIDg8>--=Mr1lxM(dny|$`pH<+WKf^)p=gV2l(h*;vWPcPhv-8iNeh1b5 zYtYZ3+Rahf3mU-^!}%xa`cCPSzL$pT`XiNpI-?Q!XGbsv!cHL;Heb^cFHrd4kA|VB zc)Y{dl ztt)9?O4(Z_jX5eBNvh($RS6%u{kw-L!)Vb8 z$!jP<_$ESSsW|E2Z>zrgc-TxJ_V0Mi^6xH-n(1-ZOjm(6LvAp9+;5V(WiL!ksCwj#Xr<8AV(7O>7qgd*w9k3^b>7#K+W8rlnX6<0pOm2cvvC$}~7UE@ulpxS3pc@FZ>aJ9cEa^IW4??CNyqHBGNRj+fe9CS+r?T~~1 z9YG^<(1RgVw}kxUtK$*<#aFK&l&>yw!i{|8Z|gODghp6rCsnnlsoMR+YEQU~+a||%D}dLb z+9xPw6?8^<)VT&auU*TE@JgueIi%`b`=FtUYCv5Hrp`4j#KHk%@MA3l#_Om=-HJHy zYTpA`59!Tpt{d;+eE9^WJgSmbBUMR{?o^wx>P5qL)#)u8XpnhbKw)(x z-)v){TO-XP1tXH~Y`unF=x)?IyZR@ncZN527;FE=QG0(Z_xauIe&WY=>YL{Po(bhf z^baYr$rf(E*?@j0!i7+s@{r&DE+V9X13*#l~c`fmhZ;i!^0R8(qS6;O%uhX*} zwt;f>*30Db%TuKu4zcOs@>4dv6Jntau8+8WuYw|9%-}lb^h5B8>-T&zQ_ZpiC2yBs zy3Tp$m#&ib2(iEI9e-Qi^SSbRx$?$P)?xYOUDQf>4~AGPy(7OQoZ-Bt4)D24(@F2>uF=|Si%c2jm4 z9Z~bwsZ`&;v2D~n7I#)V+yQt4)Xna;7x&i8d&v z06F2t?&p?zH#D@?(GQN4{BQ63MxYq2cxGZ;SHGh=?wk$pg$7Z1e^tB4dvoko=orA! zkn`T0ZmQhl@Q*;b*pHLQ)&9(lR*)TYl8Zu5_0A#Jg?`x~hujt-`{t0lLr z{^BVK<*5suuoX{9Lo3Bw!sJnBm-k)>G3$c==aphtf5JcT+o2o!?Oj~qzs1AA9@<9s zM;B_-E7m-;=U3X^Iot+=_RsSJHpn7hU8XnsRKy?bAZ=vr>L8w>u?*H~-;}lbAMGT` z`0)i^X9sIv?Bx6e(N>JAs@=3}qBH_*UEPvcdEOt%TVU?jphkT+ zto~rChSc`dP6s?0axU2_bjhHmqdmW$?cqL*@BzpSu}X--4iN(8gGZF-{2OX+-&SpRJd@>n7b3R)|kjD!YaMNJ$`NgSAJK8`Gv9e8UB4B%+Cf@4Zl{nqVT0qvSAb|+`h_} zA@tYm`ld$^6)?|4qE0ed^D?2jW^H|r-oYPCr_2JjH5VLe*f zf+bJC55Cpg3cXE!>hlwbeGagzuj9#nqsvqepOx_?%JlJEri~qx=_7y-DAPAvGIb9s zTFbb%A5)aq7SJ^ApPp*VX?=Q{pjwT_`Q^=g|3`o?A@-rxvO^y8`tHQ8n0xAdCPRhJ zxAkGNi2kK6-1wD0g0z>;5y+YPEo=R@k>#PPT}P}Gv@_svL$$zKS}*5{Dwbq zoKd73KOUB^<-hO&d72l&;t?K=OCk4Y+>&e+CE?L{SFSUwNXMgb;p{GBie8$O2_KDz zD6ybNI_X zZi^C+0sVzr@c&sQzN!`dQ-7@Tkm0mC!`dZyT#`N3fS!FXLW%cBFSTR&R zX5v`SpJ~_t`2J9v^GBgKE08OWf*%9bOgWP0iYKO@ro8#^7eH-Ck~?#9yWA_s`~3tn zJnwC~{PaOB?H}e$>O%sVbrY%m2XiKkw&I@$d>V4aA6}xCTLb@%un#vQmm>nzxZ^U4 zhT2R!8*EHUjXxBAFyzb}XJ#G`e;m|yN0~W2&rAl)4a{ukKEoNep;SNDP_X*DI-6@q zExYHEm46J~*ST>wvw0!l0?66Cd!Uef75*h*X7e6q^B?fP3NxGcG@Cd14?nGjoXx|` z=Hc+eptjxrAKKjBSNHR`D72pQ9Xq75`$)3#@6FlV*K9r?@C>MfPD}Xx(&}n&!M_Ue z%M6LCmC*Mo;N!CbcH1Ur?XF% z?_FpWEauNkP)cPpgg?%IEoYoGgeQ8nkwR_=wLpDUcLJi@`5g{54;e{H)lZS_BG=!T8XGA72gilwo8o~>DwGo~_ zgco(CMG{3GC*ZvF87J|H49sIB(@Ar8;z^QBf-O4!zQ*5TJMoknSRz64zx=TiPpQ31 z&nIa~-?G$xg>4z1N_FBXwSUSQsKG1K(3ma6HlpGA=|lBC!SI#glw16xnlnjvQ4Er@sv6-WP6l8 zBk4&Y+owz?o>C{LBLj&>fm3Xn$30MDRoU)PGy-+Jf*G;*{V{VcuHLtmQz!z z6Hlq@Ln}Iz>cms(hLG)CsuNGCn?klrsZKnl76dAk6Hlc&@szr?aI~>K%Cyyxx;=DY zA54}9GYPe8g-$%B?uJK`op?$;9-jhKUXyyZa2Lh}7fR2Cp72T^QSr~` z8c!#lQcFX&pj0QGQZIyF3`%w4DYYU{K6c_soos&?D=<9qlv)}8o&qb~5;paE$>%6k z*@>qrJMmOyC!VV8#8cJy&a`ipop`FU6Hirk;;G6`JXP6=rz$(~RAncgs_ev5m7RF1 zx`on9s_ev5m7RF1vJ+2LcH*fj@5EE;%lHu(VJqyQqC{>A%?sL;^x{^d%2wD_w!*Hm z6?T=au&eS`*g=Q5k7}DTf4yHgm#bM_&U zW?=2^MhiZpdJChP&)}$c>lCP4-N1#pl2b1aNLUpsZ3aumgKl2uw*M5=CRVHrlJNvk zf$VrAO2wqSjZ`|u%AU7WtGl9d1lqqwDsw#hHDue1rMFM4LV{#`{u4}~_tFOno7&%q zQxi>ekHVvB%DF>qvxi?*T{w-a>T#S+Zd0AoH65<{=&`eS*+;dV_F_%hu8KtP>46j& zYY3`s53Z&<^$*kM1(gY%_%D$6&jGTEZtvBs(UPxib-X)Rds{dLO(|d9$M0ZEGgj}u z8p&UQMn@&@Xjf9{xHEsqS(WTyi=v=0)Lx&{R>$qwqTRvPph34#uM_i|%hj^hG(%Q) ztI$yB|47{U{Ua3wcGJM(!vy=}1hxLAa_ObjNniDk{*7g|;p^vYo#edBob#Rsd=lz3 zZX!D`msgicq3T68NdP<79Xpb=5YIPJtaO=ompo^4Mpv%LH*a@4D(@L05BV_)@5T zhUZ^jZ9%*Y_BlagJpYF3K%M;u*v|y9B)_3LEocJ{QH~Pnn`mKZ=7g zm6JA5iIKWdCilkVsCeS{LmXKkZ^~QNGdh6^sP&&zzdCKB!0LrJ{XOtxCv*GhE{Ki= zJqogDo9m+OeE72=i=(rmIJ$FAt}PnL#Z0+#PS_UyMs2Z8i^fLQ-^r4;)<07gPTI)A z`zg~`TX!OSj&tGjJ=oWf**DqQSMdt3d4kNosjb-eY)k2XW8ViGXlM_1Lm$h^uFDzU z{4v!9_|*N={pcn%LpOD>vDIl^`@_1aqaNu@xco>lKC(+8BR_)$8)|9Wn-5mn z;5-F%64dFq$&Afhbse3Cv9HmmpG8~(c(%o zx<5c)Xj9#9_>WZbcZ`cB}Ybfae8nsbZd~Y@_6T z**NI~wY^JLKI@V*J@>pqO3zl7NogDk!=awg{)_vPW5hvAQPbn{b5JFvRopJxtj@Bi(}CA7Lfx&1|dninMddUXD~MT9SPkVKqt? zY~LbDmWPG3Gs&M$@*W0uiX`QjlFEQcrCUpe2Sr#Lk|moTopW)_303J6 zBjKhJ#$~%Iy;Do_OG6DCuHxzaZg-+vC{|~i7DJi8nNyO#--${2}yMdnyHuBT@r~v0D zSAcA7Tj~5`0h`PWAAa}_Ey8|I7@x5^uF^A8rtENdi*$G-{Y=u>^f@h}36bb4iSk`= zR#;vu4Sr`R+Mpt-yo#u{FSn-T=P9XDpM**?!Uj{qbk*MlLbRAwJaq}RHt4^~a$vq7 zR`_#ET@Q>T33;I~uS-pjB!PMF&p+8pvd*NEE{KHrEuvVsEfj3zAsO+E6UApdXC9}M z=KAJak!V@mfvWSLVOIGbolbfCYA9(`chrEG>txn{7___sT*3*daGg-#CAAo+^=D|* zpIE-(V&QehV1HM3jJuzpp?y-hEfzX|z^*gYy-I10bKs5ugP?kQN-?FpNQ;gW0rrFH z#va43tfrP1X!9o4JP4k7YifB~e7t%7oH}hKOe?pohIsRNbLwm!pI)9);qm4lX4l&p zhUw+qHHVMlZsI_wek@DF8RfPxnGOFB$egArqqy4Do_Wu(-5B$FIV|4%mF~(^kcOf!v1sJG&&3TpCH{>yCp8BiE~u%n+4x zM~i|3uiMh|9?uoz2C7YW2u)9H#Ye3+PN8ys4^vDpw(6`iJHiq8)&A^g;JsV~=yAFk z@bMsy#pEOo+j~b|JKciW{4kUp+_Lf@BzDtQO{C}-W`1U)NVyu<``@*TmX*aWC_V-K z2y#JD=7OT`BYvk15d<92a4`{QV7C}3k78iK9M|L(<+d5PoCME6^~6nOxh*gY^iUA0 zA3K$$a+M2%egM4<9K#x;s=Qchk(mI;3Y_e~a)HkSJSlM6L@8Da`x$->lna={+L{C7 z%~z`-;DmL})qX+v|q{fbAp=1^ z@Oi#~TYbe`xWv%-k-+&jn=Dg8-G^J2YQ$O-?Gsa$!*hixfCjom;T?sON1F~xIXp}` zGh8yfLzv_&ofamJEVZD?Y3LXH*EkKeu53C%rRJWS2+_ys%mUm@s06P}+D9DB7Jy{#876P0D zSyc=t1jU|n1kf`Cp+|&S?E$ut#wf@KxsrZSZ zi*dUBdxYBin{{N7shi=GvUW546X06Nd3cWVa03rPsvz^#Db821<_Yza)GJSQ{yYWw zKOhUTk9)H6cQ%GA#pVf4A{*D{Npex8nK6SgvV0mVvD|`k+4i2-*#!2B6`LT#nrc6V z0MajQ{Vp5T?lx@k@8OV*yIpQ{0kjtMTd4a~d8BLBo|UxuA9uk}_lW|#Ws8(-AV6Qp zIikCB#AN{ggv=3}MvfTK^O2KC*uy#EW#s>Xdj82=252{K>Cb%cH-UD4*dtq|L2Cx! zB*@)C^~kmtcrU>1kZ!+vW^KIu0`^luG*hpvjjF|;^J-bBPLG=W-dXp|rg@NgU(tIg zRj^oi)H-nUh`bIgkIr&(o8jziprzDga-K_3hVCo0(Ipc*yvC06tzOkwZaV0DNrZ-4R<`7mc|tTmq5ScF%fHLq^O)udxi0d1 zXq{ULMqNZ5yba|z2ZueM$na!*pL{`XVbFdXPJ8A{7%Z%zG>qiuLv=M8*4huO{dpTz z_h)SNKO`Tk?%A%ogTC~=0g$WNd9G$h02~Tg&CZW%HZ51PH}Z|qexeQd&+g=@Z2hL% z-*Ka|Pa!vdMO|3-POj_~fX_g#4-YQ0Nuc&C&VoSBpdrqn@c<(rGiYdJ(1d#HAG?+n zD(C+p{}3`O6+Nc`$~)SSW3e|Oua78rE)B&jzs!7%;+9rkU6d2L7BY8tVg^u#TFz_0 z#@%`dTx-AK_ire5(KYN|e$P(_DdSxo{)8^!0DNPq4ZsHij(|GZL%N$v?Q!Vk05c$0 zz2siF5EVWtg;BS3z2dMstF|5-UmX>IU`2}Dt#E&_v}wI<-(q?&Uy{^BGI@vc>{?S)+P7xrU4rCoWDpqAo+L@@9_*J zv(O$1_8L=_Ubdy6(Nv`$D2Ef)G{l<8Ue6QTOjb{OE8UNIg1mH_Bh~`6glNbat{Hy> z0@>Y^FR*?;FHExIUnF-Tk=^^7M8Apm8drhIu*hZ^MO^Al5dJ46E-t&`BgN)TxYA!w zVp|w|T4HheCE))c7lNOcSO}J`Wg3Dk1ivT=LvUI{A97I!Z{}?C8U})?ZPw&4*`lFg zD3Wk!=yNjmTpZeS!9DzL0$G1b@byfVL%|G`e+JVU`HL{)86CWa7()tdt_6Y6vXj|TnP z5?g6J0r04SV4X?=<@6E!dysQoQsk7NOvqZ=Yehht9{=jp4FUkJH1PnQxKdp-qt zM_^hl-RO$lWF4pZp!zY~4>p$AQ{O$|hd@1tsrNUQWOt_4rvS_l*iC~}S89U)mjXNk zHC&Dp)Oh;HbYA1p`Dn_hBKh>>GM*SlSlUTv86cGbIe_p`6v&kRPc zZhCiKK2yRpFNA4wi`OLx4yDQ8jg;xme}vdi8x)`b8AohKR#(Rwuz%*z?oi;Q@ zT{mNIE3LH`zxWRoyAFKIzjy-_)%p}~_`SM^QLw1kI&iO_hyam2Bzw5n9srF1*aIR8 zctpOq*rMPnfMx^19x1jccn^LRUp$6<0)s$<^a7Q3yr6WEi?{O*EV`tD)Uw+(xn2I1G6!Be-70 zB* zgxXq2TPo}X zznw5!lB~=d3j*3ZvgE<%dcE$n7-MhcGu95 zxYJ<|=V9%@v_yQ>=!k^WJLvHQ_DA1oTyv;`He zMf6f6|Isj#D{;D_IsQ8lq@LSJ8_kcoFxwq)2;?GpiHqb30LMV?N%-R~lFtB`1J#dF z@~2$#M*toYXpb|W&e-G34*}j1Xxre=xR|g0gN+ZUP6wZ!b>*-cXy}S%+NxfJVe*@9 z-TH&g+lgJU5Ywvb7%;`7bWWDHxYb}S_nU^O`C&~LUh4(lK;0?FmvSe&XKBvZJTX+xm$_bX55T{mhI2@!$_*iv^B0vjz)XESv)6eud0eHVc|G>06Fglv?L}Qc=rD^7LF+lPuT-Di2#W>b0jKN@3x>DF?V4FhfEQh$xG8T4}AR8YJb>qW>0Cz!N z(6*K$c&f;Fd1@VWGrn2U?`GDnRs8y zNtlemG{t@#Vwx7_f&FD?uBn~8zD-!;`Pc9RG`v2K5`As_S&g@KHNF#YA>?X2pvZ>s z6#&bidKOC$7TH)GD~fqv0rlZb?1M#i3b%eLC-Y%SG(=yF{6eUH63y~Zk&R*hhQC$V zRKwD`?OFrBT9`qlf`+GK-cU$;(u;~pmJ&9X!d?tD+>Y&9Cwv%gw(5L{j>KxYv#rtY{)Wyrz#73O@wl%uTfPy4?#Vqv|WXtdJiAbH>Gh^C1`KKL=LG5`cRJ zDtvzltgxbz7_XqBb=H&Jh^_e`H#z0PSGOw}%Get#&JP7M7(+XNsVQ$Uj4e&Aql3;~ zV-o`1+*;dl+D0wwH7%2KZVc^ya3Ncq6xNYaeQj!+-8VVAcL3ZDa(3V1>^>UcFoClB zR%iF^@C${}WD5fe>nC9!gBqTq1oflAWZqI0X2n+!Xixl*jRhYdP#upC1=O*z02@bI zJQ9YvsvM#f#=c=yUWT<-yQI`2|L{LN4okw1G_{JRUR2ww_OYSE!40hR;XtEFe1Oojl&SAW>E}na=kj! zl!5}^BX-rHvSrw*p~z;LsRb4mTLNwdb+YZSX$5xMd;q|{0<~{Dy}jKp+rP$OY+vch>ZKONU>xaw+Fn`mA}X1)T^%sJed^9bNW zkTd6q0^8tu7vL?(?jnzL=ESqCF2Nc;BRkD=JCT#sy`9(iYlsS&O_eqP%j{)9*+`aP;No&^~D`MVOkh}B#A!+9>?g40q ztRg=qEmDrHjCn^xs_#!p^UGY=*-)<{?9hfuLsu@ei}i9?7s8@p0GJLJd=g?BSM~?f zxbjDY^;Mm5#-RvwzgR(oQroY}#%IxctuAAIX46CbX*(HzK zhVBhX+sV0<>@S3z)i)+>6XZ#N#~|w^H#?)hfd5RGJ*mGrX&W%{>X`StKzoF8bFzFi zOMxu`dqP%|TUMnF)gLGDN;MDclX~(4;M$9tV90>TZv}cXf9B z2Cx>wqx?3+VcXVlcL_P$_Hedc1aOAHsTz9rNZNCxH2_}-w25@jq;Otg6XM|g1*X3E?4U{2m{xE;wg13mAoP~rm39Z=!8VB<%jyd|{Uh8$^G zoc;rU{FHDVQNGYZU=}6&%F_Ac=Y;v=M$pS4=Z{|!*6G#*d?9d-di1XjoZ2qt9R;~+ z{+_UEz5(!(z)7=MP5My{5E6bnCF<+D@3VfOP=H`pU~j@@ijNBzKC0tY|$y^wTGOyzKmOx6nCb^ zfb}zR%r|j!%oAYuL*}e+;d5E2thZSJ3s(yVQRtu&H_hE;nrhB@(=Vp2HQ2E6c<;LB>L&S z-QzMk0`O4C1<(C)>s#{xPJtROCaGqqvnW0ao`qoAin-1(xAN5l^$fUXu0^4)^&1IR zB2W~)<^;OoCW74Q`8Sa%G``PI6rJn-C=`}r0j0;MU9N=Dx$dt*X_rXKZbQSm5ZpQf z*>Py(6D_$11hUGuRhxcM5Y7*Mv?I6r+H`o7TKlT8`Ka0XXf@zFQ1=hnukbH)&hFO0 z&KTqzcZqY{D1c#5!-3?bY@Tp-*yJ_=EZW_jMki`{%I!6Mt9fKL>9_(^;-VbP+GIVc`U4;C2B0poTK?*F%#DWUv10 z4oYeymv?xdtxRSCRe)sy~7seFbs5Vb3&i*9v*PUsp+Q#hh)gQIblNZMt=HKQ(NaLPJGyVh8kphuNx9d1J2lGkFpI?`S2oH*{khXv{h)1mteqZ???duE zp-xlvW4`6FO$D9=FiYSVzA6Q{rCQ)NfSVxw?D)l)-L9;HeN7Ni@?xy39#I!=67!Of zeh$4NW(~0^>?V-c^+|dCDPER;H|EGJnWTGbXVO!#s<$a<5V`{)H+4Q0t5vNI1sEmJ zOnNHTB$G}6I3AKoPseQTd>Zyi$m=>pZhU~kuBIRrsKPWfxxyZBg?)_f`;e>u15|?g zmvoPLMUX4(fmk0EwjIEhkP3Uy6*d!gsvzqBkaNjZu$Mtz*GX!FODKOHWy=PYuVJ&( zWIchtB-Tb7Q_rIN2;?ezNz8tD*Jjh0mw~*lziRn)0hyda2Fgg8Xqs`ETo9{LCP$%r zIOH<9Al7LT_FfKfu`=nMk=u`px!L&`GErvA$hMr#n&V>jd;Vw9e-f(abu9kzF`Jv$ z!GEQEHmg-WM`Db!A59+0OZhlsj*PWe1PtmC^9Dec$5HN83lrgwf_Peyl@z&(&W(_-}d5K?}%w&N1ivnIX3skx2Y!0z47f@V{>nOTVibV#y2I6-uR{x z+#BDNgL^|8zmC}Ojc+4zN|)!9>`HqLS#@q+Ty%*2Jt3#6GXMIm{E7 zus6Q7k5kw1jc>Z9uF)IcHZ?Z)#y2Nz{f%!@jo$dSE!U#l8{bx{@bHaq|K-}f@vSDi z14?|eDbtNFJNaYiQ2w++|6Nrp{HIP@<->s>3ZH$z-ORp zC6}prBMBLUD zvcva_KNq)6`9iqjg}UChT)CE9sp|n5S$GXOUImq&N4d`eu)}ki{#!UgK3~3D&gZAi zbv|E|=ktA5ZS3>Nd!bAHf=n^_#GGdn$;Zt3)&}wLO4Hz_hc}Vq zf{0HP4ch_v%@H4@mopP5Zi)CzdS)8_)`%}F+C}*-jQC0~bDg=1r`P__DOV&71fk;w#fi z;%n0SYIcHe^O|cKI;8a#fy7UdymMOL=1u$@@m$@`@B zZQjIh5#KkhZ}TSBM|}VE%}W1!RNjEJzRjEXBa#nF>)X7EKO=r{TA$obc=52jp=o`a zH{r)a{|rm(+q{Wb#E(ep+q{W*#2=V`Sm_h-uzsV``ZjMO8OcYd^=;lnLBx+u>*L!A zzRm0EH$JUz^Cp5wKDkKW=1mkv{Is+_#hu{WyiR{sTHoeP@NHg&jlRvB)~~@5e4Ez+ zd_O|p=1uTzUI)zc(}#2e;M=?oIL}Xy6Tr859WdYb?AyEvzRlZKK`aec| zP0_BZ{JMzmP_(OJ`lpERTr_+z{Lc~JrD%lsUn0KA%hbsGzsBPuiS*)>ufChS+TV`4 zl#~!iUg^F&kDwRE=WmDLy12f;9gel3c0o6PrnHL)YpyTD?qE{7ShMP_-Nvx zphtWdN>P%{{cDwE43XxQbnLBe9v@5kf-U2xBPi>W>QgwL-ka64kksZG*A=|%>oh}Z z%aBcEkFAB>I%I=vc_-KbA)Cool*4WxvSr!-NV;RlR%ZWG4ZCy5)@0`lhTSb>J7o2F z&(xkF+c`V#FxcTC+a>!#PuTrJwki82!$#`hknO?vro^LTnuEg%r^flWQk@b{9xdt1 z0OFUt*hM}nAr|8$4|AO;8A=%P(d&CUkbGin8VQn0RlW%^FgkU1+2wdOdj$cKI=7Rq ziLdNU+ryq;D`)X`wCrIxG4;<{d6)MrW=|$KQ_Z#anRLtSl1*VR>U6E8?Vl~9$y1lq z-D~WC?9q%9smnrkPeiS; z7J*dQ>{8Y_=v6p8g-rP(5E0G6}?Y!nBH>~L}lqBsb$Z_t)O6bBiLgJ9P%ZCQ3c z6$$nT*~;vrE4HnD^*)E=5?#D+k;)h~l{B43ixT9PRlGGP66Z#XzYH$ya%8Al1<|6Ft+Te9F3s_ezjng>_s%?J_+~!1Jox3I|LED8C$o z=LN5pJ;sb;fgJp|qpqVs4&LaX_EaE$+?lj*)yko~bTWIT41T-g)26&f_F3XPc(;RA z6S0P2*(^~Xyx)N}5bW^m5mNrJ<1$)B(YHrE?8l+-$Y1TD^A3M6PIV(Gn4ix-U*T!-_Dceyw|7NV_DCL8|>{8PE$)P89j`Q1+|+gT$ZG!cX5Geon;K z_@^I4Uz-!Furb}=j(BgQ`fxL`UVZw4SR0qq0eO<+cnY4H9i>qpiPBuvAIZs);*hf@BoH{sQk+IL|6A7I-$mSrC(m`*(Mm-)Y-(morOk6?!ew ztD#P(j)-)k|9w>S)y>ZH5#5K*Jy6{>FiW|34)W>;g{gAY@RX|aXyA8IcpK`xFU%S) zzJux}!lX85dl6!39+fpT6WMjPv#SI0c2H|}p%S2Pc5R7HZ^-N#%f%5;t9Fsf>^c#J znUL9a4Hs8IX4k!3+zsW~^+C?A%S#K@q|YON7HZ8dRIZQgdIz0VklFP;7vDmy+C?g} zt6&QrHbQ1sdoJ2SW>+6BdO>-1%_0n3JKp5%+8OyyP-}Lf(jR^E*GO~@gv_qvxR?mF zY8R=@uDK|j2AN$~aB&%AcHPCroe)psAa89CzQ9L0JQQl#XYd*&N-*!zgVkRv>;|db znTpa5dGY@w8Sx9>DE>Q?Zl?JE8uUZRg?g61T>J)^i^{i*d1X*u z(`~_+>Fnz5?COTR5o*mYRMtjz4MJxd$Tb}o6QNe^B9+;7CJLuPX4gV4Zh_3M$GCU| z%CqY~IlBhBka`9AN~krvP&pTU^Vk2-`2;e%)^qVI)T&*iGP|-{aqkY9U0u280-0Ug zaF8}t2U9!Y?_9`6v%8kn~Sp`v*}tcu7>#6?mHI!{>^z_y$69m8@IMUvb%`} zXleLg(3hc(7TmX%RIBg)0k9sj39e^PW%q{~>Fm7hvfGf|i@EI1F0t&k1l>6EmwcD}=h4QkSE8k`EvfB)~zc`m&resT5w;$*}kjt*b zWj7n(B*?P6%dFdhF!xs%w~Q#w$o(U@;d7N;UEE9AJq&seNc*7ZF z@>y}G_5sUzz)Gm2r&aRj4(t!G6=Vw*6}%k_X++ z$gcmO^DJa`{mRA9P^)&4%IwPWP_Y;?ySCtBGsx^3%Ec~Fo?Xx9?3(ZFIt2N_P-}Lf zau)jLuNmk}hRm*;xwr{x)h<$*U5}!$2r|3g{`pk_fVc)dM%vu*X6}FK?d8$ zyaK2-yHM$bzS-3go%WE~wK*4kpjPc7mDx1}g`FX@YZMnFA+zgvE{=o3aMfBqFK&mN zM%*5k7q@d!^`Fee?QyO@ECgKuxwt*v#qFyAFF}@FZ}RopEjyL$_RPy}4RT*S&~<}7 zi)~bCHz?+nLoU0$U3OyuMnk!7a4oxy&V2{EW}S=lG^jQAp>int=DustxePM*E$3nx z)T;YPW$ybJh4&$IUvh_-7l+J!?YO9c@|txks^jcB*xA(^c~7V{yHHsd*)0F!&nO&E2aVZqGrdD}gw{{wZx4`{+qW3GLb)CjUw`|>_ zxUZ(Zf067Cs8(8wp%nYMu0mTC+p_g3q)$Lrq1(~$JpH{3@=pB#!g3PWbxp*8hyI$wwHHbyf zr=*Zqov#MC#{Ux8=aAX-8B#tg!QZbS9~HfR&TR5_;zL{LnN3wN6_B&(JL!7*`$L$@ zZ0e3e6J$1R&&76-*))QS;gH%qeI{+*C9lh=&413dc^B8_N27fdw9z8DoAc{zBqu?w z1u!ZPk(<@wB6OM|tHVMrZh=}2U{YBf9z)>~$m;M47b_vF!~eMW1ma(J|K-!D#FrVj zsV7MPensl{>l{VzmzjZz-rB)zEkW()_qH^9X%}@zfB^!Zn{D8sQ%FA>U5L zwO!V=-Q!3fgIcRMD*r~`>irrzuRvDs&$;*?)M~v+W%d38h4qltyJBa49u8T(o4Du- z_TM-`exVu=nR9*t~0ne9ctAsQkh*>qi{K7b}ixJQON9i zm5Z05Ji9vKd*`pV&aTgpe+so`7b@>ZcKN%oiGrTl)d!{*)T&*iGP{PLuoGl<9nHm2 zkl8hxi<6-6c2=9WoTs&)7=&K|+|=Le6k2`pM&YA=FtR?1p2eB%6g`)bQ#0hEXK`jv zMbE1MF9@{gS)4gU(bIhh)#Jjuo5 zP^;b`m3iY$6kdbO8^3b#Gi2T<9m={0%4?-(b9TLvvDIQ1T%cA;_x`exVG==6ik zuD!U}18UVSQkh+2P&gbiyJm4Q12VhL=i*%GFSm+sJDYAqc0JUZO{lc34{dq~od+PZ zX*n0mpjK@nmD%(m3hzT^(>gAGfXt@!uH4H){Oj)TtlNkgVTgRQm>-Tk;sv!x{VaDA zZhoAR*-0_7Bj`Y={mmmS&A#)>(hfWwkBPG^hU^9<_k1A?Go8F!r4`iyfb8W)vMN?{&t0YRCY(-?COWkmXO)C2N%0R&aUp#_4Kz_n9A%r z9EHOmvug$y(;&0!TrSRruuC@W1~uSj=db;oUDqSO7Bai~qQPA!e+NK5Dj!F7J&ewM zklFPa7oS4Tu0hiE^mmsqmD%+t3co>SSKS^I0hwJ}anToIv9|yZTl}o%Lc`lA40N}* z{H`EAXb1aEv0iDbpPw-XCNsQr-uJq8peX6*>F)S9x?T^z_grG=6W$!rg|4FRqS5qz zigG)IpQQUJbTuFl2kj>8~0|@1L`=C7W8WzxD7ymi0qfD4L&Q{aQ&q0C+4#MtY~XB!G0vz z(ht z7(MG1RWKEh>lN~fAGyZ!NoBpFI|@yZ^@{De*bcH@F@lTX&|l`9x13E!BRdLe%_daN zrw(S*Y;;b7%%+RDXogy~iBx9OLKJR+%%;b6Fyw&+bp z{`QQzlXv*kX3vw7vDox@nB!}j-YTItW^s`dETR1hT{fsI(expjN;Sb8yaeUDb)$#vg?>oS)Dz3Ko>~i|;m)kE~ zdJzy16cwb10=9@PMv16^ErlHo zYs%jH+=HSq-2jN|UtP?h6&Tvdp-!^t0aignB? zCzwOk5RSs1<P&e3nC-i&jFj7pnsilO<}o3iKwejrk#Z|cldedldN>7OaT)0nN4nUhI!x`# zRJYB=qspHk4(hYfwg+vS8_sf7?TFFI{ykXhs2~tL_cQTtLOHidfQBzYBsR0n$}h!Ep&dy6Ww4+zLpnM7JM>M}+TZ zaa6vRV)`_~9|t(j4;o=PFXe^vcM$p(pc3aG83}sfJlGjc01(bw;AjF=&B!t%8QG{*vjuiN0b1yGSM#1g)q z0>NVd;p=TU-UJ9={dg z0TuZ|Ea6M-f*oTJ313Y>8Ue!BI&cgIKy3$jH28!5tSy=JDks75Ht4>c=dxFg(6TuZ zF*gA?*{oX6mT630jKy|D==Ok0Wdg}Fr~|3%{Xnx1K+1G19LE4EmI<+>OlO1OOn{W> zS~#u-NSW?~;~qeQ^D7-+V>MqtNBB+;M*}MH1(N?~`8o?UD*(dRHE>)7sK^&$ z319bu;BJ8M^)oo01qfe%fa487g{H^Yjyua>(#V3~^J5$el;?2=W^wE%g2b;MOCV>x zOXEQ2cWVW|$IASuCcG5;N#<|HxCkok<*cBts}5ca;ruY0Uc-HgvZ?zwuv5>6*@>Kb z2F-*L3~;jh#2DKaA7y1db`nBQ1XOAZkSqhe$jHT@xd zUvojQ2SE5*3da(F@U;?-3jqnf{^t1lEGv7aHzWK;KqbCFa;N3%QP4aL5WZf5<5z%+ zd?A+b^&SY`0SI5wZa7*52w!b*v;Y!(tw2lbJ{9DIuXPbV3{Z(LkjwzR)Yml7Oa=&F zhrw|Opdw$0C48L*f|CKl*G+KT01&<&f#V^78CP9*pi+7RGBhG9B22$ngkRC;)yl(mWf1vpo zAbbto9rH1uB43Cld~FJX2>{`1E*!G~!q<^-91bXN5^DRCz+kdT=x3W`h*E5lVp)@% zilo#X<7|@@v!YVp0pA}0I`23hajLSS(B}8R^b1edPNT8Atm~szx6{_3*b-2wK0xvp zuqW-bCunvDXc2|u5J1KHKrE?`9G3#5K7I(tZGc2OJ?;3a(|kRJ@FxJ3 z_yWmt&vj;_3J|`YgyV65@bzmrUI8Td`poe) zPV@B=rE6E(o^@2h_7Z%u$}C&j4W}Ff$t#z*Pl)pZ_E2+MyBpt z5qdMAQh7l#1@uzh$3gQbK+5|H94`SXmKU+4ydQwzJ%E%qI~TiZ04Z+=9BqI^J9KPf z`Fcw8H4@?L0xIzZl9w%CTYzQ?K=?WWj>7;I`9dt=>kJSq2MAxcz;P2m_<9VEM*s=F zZgYG+n~^Et>wVC?3lP3CdqEEYROAb>gs*lGv;u^$5pWC#2w$7Q zu_++I*H&n0Ew?XdzIH+Q&VWjMfusa_;cEeC_6G=G--BZnpdw$0C4Aipg4+SY*Gq8x z3Lt#F2gf^r#F9wlme-`PKlm%|Y@Aspr@`Kk(-$UMIXyEYW)=hC+ZW*EbSNlv`OeYu zFcqPj0V>OZ04d)=a2x=rSU$v(@|_5R697`ai{Q8bAmzIWjvD}pdVkpQ zb&;<3M-cuHpb}poIRW%i@2`U9mjL0bY9E|P0xI%_Si)C75OfiECu(yzrT~PmUE%l^ zU=8*DEl$EC%j$hT=+)pUw%$i(3_wM`5KH*F76exUgs-RIcmg1Ny#~jtfCOL9Ilea1^6*!Le+a0= z7f8+qz0_A>KfL}05WafB(Fv%?7h(xtqd_nVAbd@SV=6%S+6|7GfCOKB6i)Y_Nt&+( z2tNo=i7${01-WT0UKqbCF^04J=1JH~F2w!`_F$YkQFT@hQjsd|D0O9LWI4%YVU$?<=3!uFJ za8Jh#V9tS&EKe2n_fdMreGDn6Xmi`6ejmyH^Ski<13;UXzZ;2pdH;DB-T>OX{5|ct z5j@5MT;J>3%+}3Ek<2yUKw;DxB5axrEwO zS=;ge<=knuX&;N^=;c~ue>uQ4*iX^;T9}{K4fYB`UjkIB7?7+0y;RIcpm`4<71Mt{ zgac5qVh~FzW*i8{0;FPggJUK@DrNy32LTcdw(nHS*YlBB-JFE*69JX@0?A;|3ttz5 z<|2UbbqgFf0V?u^Si;w1Ab12Ie7y|EivZ#4eK_6)B=}OOQC(lZ)b*7)0D2Li5?>(s zk>#rwXj%cn*EVo$1*pguVhLY!L9hov_*x3b5`gfv5{?T2-Hw@G(mdUaup0rDcmm0e zD1+41lc0GRAUypIj*kHqc|t7VsrEp;Z3GaWM!_)xAUsWlV>1B$4N-gWfalsWf!qb5 zYP&71L|z-o8v1Kt;X~OZYkk1WN(J*AL*h4j_Cz2*(3}ZnAri z=II55{Q^*lCy>-ZeuSs@K=WsS@YHJoWCc)>C&Ut-)(62Tfbg_496JGor~Tph4gmj# zsDZ~pc26pk-9-ph+izuM_oPV9n6HQLDuA|)Jt^9Xwz2ICu^|G`wy`HgGkLCeC_Lr? zoa|0VT6!G0K#y-vAoMXnrE-HL4|*y0tDt!qAm#oLj`sl-%Z*r4?%W};g8)dmJK<;t zNV!MBF#=$w8rs040yaJo6)?H10yYDg+H-4L0h1$Hn=ga!F#ufwlcVkVn#b$#c$uDZ z{ysUH%?cQNC}s$NtAH(#mac$0`r z#}RNG2B=sah$Yo=8VHsHq&hB#<1&C$$7(o!2r%-nK^I)>s0+9TeltvKj?^x;`-Uz5 zo1yfF7ZCR;fG+==;dT^pr(0E}4GX3L$^V(?@5J`Jc;ZjjU= zPbv5BK=T`bl=~AnJ_1xMH)2V-tB%Bq6(HsALkB?0y#X9!0QfgVwJk<*&nqkL76?^a zZEMSWUMPz4Y4BYP(B(ZZoW}Nk8y>%*r?mHZ;m$1Y_D5lo0caEF^TNGpgm4W!t^jmC z$}BGks~G)hcsxqab=eIs4CMus{|Aqc=_xOuToj7M=g^~J=LgW{%PT|KeclEhTL46N zq}l5LmTH$iR=ea=+WJ#ZV)2Tnw$YOKj0a2p4wnd%%1S;DiK%bTuqB@q%B+18e6IlL zl1~c1!Io|~24^(@UGhocESCIyc$`L0G47re&S%NrhR2@(y5yUN4HEskXdi$s`IJ!Z z(9eL!bb5-7_GY?}r^90@z!g#yWEOHX7}aXD6m${4d{kD@N)&8hWvX7#ZiBA)x4L# z0ndCshVQ!o;hBxVvcc{hsr-5oQfVtoW%RK~<;v}BW3~Acn94l(?ha@_uu0-Xff&l(D!JNuxYZOuyt?+{Nz?f!tVz7k%M((zX3mlU$SXNjs{cytgx57 z02Les(osh*6R(l1_))7*6=X|>tamPED}Rr$iXpJmJ{!NIuNVTqp*8_cKQ!DprXL&yf0ul_bo=f-HsFYx#xZA?u%3w7->lTCH>e2!_KU|98 zyn()69Rg zb6%Z7?JPMO-=Ssw^ykojY>`oO{;y9V(nzG_zb+x|L~1j$4)-=J;#o|u(F?}lPoC_o0!X=# z)jPvYJ5-Cgd5>^H(yJiGqaw?hKhENY3BtWFV6TDfw5U1mUKF)cWTUnIcG| z|0gD}nIJ8`BC@$49ex`Vm?}t@S1ckZw{R*M;Cr;;A$4?n{*O-sa%hI!;89aHN3kDB z_qkw6z?wMFyRcpeGnk+*(v^~#b(ptOoH_ryWclL!HxaMo?|v4LO9ZLT%-VA=@6tM! zxYq9?)hdb7;;(-ckjv{&4$*x60Svjiz((ux9~ued+Rld%($C*`6p-sW-vctpU(ABt zP}LB@aMoXV1dto^LxGIQ%sOOG?-t2sG~5Szw+g%C;6B*9O>&&*@4`&(s2hn0Q~X9& z%j&vGK&ED9&D+zvTVhZ1my_x~iL$MK)e0c@7Z!o99sJo8u}4dT(Vjc|L&?hH)fCd1 z{^@LrC!~(&c%^$0wAJB?B~ved7hhRWlA5QMAnD^&aW~`{s!s)JB$88)2-1^CNo|ez z$E%!(lv;*fyhP=HfW#Wrb_h8|HC>m1!1kK8|AAh3s;a*USclpLL8q(2131!Fj6T5yTmx`U5#%)l#1ttqwt)3pCkSRY1r}ReBL2 zFAfM-2%3^NUw zbGzsfoQ@xf_;M@&b-lrPat|+r8AeXbN>5-23X5z^n*lKP7@1s!fsPcQjH`8zRYh8fjD> zko{GT@jKMhh%?{H&kcxkfF>KHMguueBO}zsKn~K#SmgmZSR)fv4Uh#Indar$u2&&p zspPEJdoV%+dIYS82Fk27j2GNa&)M({R-sT06gkt3zh=l!`12`(`GJ;RYn*2g>iD3Eg!waD zCHrYak$D)i<`n!@E1yM3%>sPSW0v2J&kkdNXVv5HUi&ZfcK6?em%n0Rk0!oozo*Z* zV*xPe@~ZbZ(3|ZSnL)7Pv+q{#<<0SP%qUo~=-B4>kV6}g9In-^_~UnT`0)ISnVB3e z)~(nbOUhq?>+Bm!nBf!-GXyYG!%ulk_B&YkP2qz>P|e(?ek+-q1)M{%FgL|8cerM5 zb75{VLKgwZ+*Hfl3CDuDX_mQ@j%~ilF}H30^59Buz%|40bwYCbiRN@4&FMU(ltm$^ zdTfavR4=N>Y)BMUk99h50m~>ETIKkvx`t6)s;$b=ANl5u%CQsOM&+Qpkt)YcaMWm( z<2!U}m4m)sb`pLb0OXiT;Ps%&@j9GVpaVpNVZ;10dKQ8^v}))eNAZt-nkd81n} zQr_qm|A4!ob&GirW~*D!ZFCD#JKcha(=CWN-GYeGEe=9t=oU@*ll=hR$H5^5Kvr6} z@G($X-GULFZb8K97DSwGLB#16M4WCx#OW49oNhtH=@vw~yn@y(29W`yThQ%v3sOP1 zn1nwCty}EnbPFNWx`mKw-GWZ1TTBDubPFO@w_u5#Zow!{xA+eFg3~SDLx|HYE=7pb zEgl2nbc;U&ak@o-k;Cd1%*N^#WY_8z%+cu2!1vmPPgD#=X47qPPdTB%jy=4Q)_jL(~y|cE%+*SOS9E2 zE(hjxi(7#>-GV7N-GYeIEts6sE%;8g(=F}=;&cm=Io;wJggD)ToI2g&1%x==f^nc* zP;N@hlX%Fw2-&)!p!D~Gv*2meiWa(q1Mwqq9wd1jM^GK-LegD9x)YED1tCF4uTaxH zO%ggO9x;g*yo&%CSJ?8>EpZS|c^_nPNUhZ4u%6(Ki0b1dX;KBa+oNST3h+FvMvai~?9oMKV`HHk~wXIh|@NRIBkQ7(>91q z!^`d=bXO!SCC+-SqHWM4U_I1Qilx!K;2L`F1kZruXf1`%H1W?E@*scSMsO9i4JaFw znyQ^Jtu+Qsl)<_`f+7mw+g10nIKe@ecUrBU3eUz)LT{N0pEgrrF2Euk$#HJbF-c+>Fee8#m{d5S-m{( zmkYm_k5FZb%k$7I&lTs&@Y?8R5QbiXb7lDbfYJJgEnEl>kTrU(w=UcRxkjfaIN>}R zHMcIIoAW3>twIH=z&_?KLSYkkef`U5nn>WB}j5%*6E7t^vJB!71!yJ zS*I(m(<8G^S6rt@W}U9MPLIqwU2&ZrnRUA2Iz2M$bj5XgWY_5>nMshBV=5_IRz_rayl_EEB3_*nG%>4JL63ABFc|+JmNmcB?}S^00@z!C?YY57i|PwMj$r5^iV8I zDEJF3j*8~28eyGIV~mIa4QA$i6z;&R)9LmCvrZ?H3CueEFa(r>)H*#!zvn?@vTQIj zXESF7Gjqxi6eQQ_fmx?BBo~-Q}m~}cU*bB@$o#Gh=X67VP3d}m4 zNMm5u>5ShIB-iPInK?-|C@|}EA|nE`PA4)pFza+869cnOCo&D+^93W1BVj3V)*Hf^ zbDqlHo}>7x$1yEr?PG)_9L>cASLy4A|nK; zRaY^Ak%Ba;>liXhkQUWWWIaJT)Wt+b3(}=tKs6M{2+~j8PGo&)oJ@pC6CJQoJH8JT;1sS8osS`CQ;*^o!Ub>5K3}4;FWpJ4aS@G%T zML$GSM2sXu!9I>oTr#R`91}AhCR4OBC6_`YnJA5)Y4KiO=}@qoE4ADSFBO5~QfoCE z-BW{zwB?y-=#{o3R_b`0WYu(c*3s>$A_`XOskg_~j!3N3OXB3bh}l3bdmQR(CJcXe z9>PX~VE3vA9x5Q_u}e{w2h9fXT%=j`kRYL&L*!vWa_T}vsd_|^lKKhe_^L+*sm*go zsp>I78r3sMvg&auZi{-82|OW4t7;ft2(IoW$<~$-vjK$uP0U-8ZF>vZ4v^?W7%T}($T03o`p+pT8$Py`8%up}WzTA~ z+XhGB!|SS(#4Ex3*?^9{4)lJZYFJ4>0(vK){dlDPylP~f{TcYHB*UiO3#yiNC#p8M zspU51uT(v|+fv})px=D&MODidgMlD6CE>F_d>ZI;Ik1c9Gy6dAB^~Wmpicst6moo7 z)i6hX7jqb(^GMXdE2@cY%gw>g-vNJB70E)d;xFGFehlLHzfpP0LC@8w_ZqLjPZ(>n1H=az(NFXr`Gd|514@CbwCtcb00qPh_Lm& z;)@9T22#7-L^=YIWZx3u_+)yhwvU25R%0PdImn?`tj*wHtOoa~lQD#JJA4ux5%~Uh zaTTa2_f=>ja`}bn);)(9lnUhU=O&^_u4P^PRhs;9aDYeJ(Buao=W1^2{#9E1TvX~A zfNHe(N7ZcbyMf(KpF{RN!27t1^sfSa5inxj-1(mWw+0cZ`op|WrBOdb$lHMWeGfR) z`+Gabu@YLp0H{CE`>ciS*8-#wFmmp}2Ydduir=Hl^%?{L*cs{9a=*JlHE=bt9;gNb znzjM=jrwqECh(oJ>_Zm= zRsdL|H%W~?59~?$aJ0NxdQb*+@+rMoqqo$sLPx=C2mtkZo7C$pAl#u^PwMO~bsKW) zg@SrVV%cBMD!Z$RHO8HpQvhA8vAfx+9szbgeOO-)(dRW_kW{ZYABnKGHb)vPE;a>= zN5YS_wY%{<5+U39&`L)`GNiKVn76GV?jzQXfQPN2LxrA}FJ2Zh#?ASMc0hlW9f>_o zg(zTR$Yt?iH&E==9|jb9S3&7r1*LZtl-^ZPdRIZ|T?M6gBb4642=(3t!e~zraSOwL zzIiTE#m8VD!n}wSxn#&-Y331-r+kYw?{5h<8cu|le+pcU;u-)~4{==zR})=@XE7M6 z)~e!$@KHUHujX2AaXTe3Mik0U5lE_hXD&@YNRll17zc>hTCjtBg-jMupApQ`@EA-gc z8&*p`CnJM#fT-z6&l_GxA(;boCcSP#!Pl*4ZkGT(5#Z19Mo6@Gf&2;J1&ranjU*{Q zo8n}pRx0gHQ)!=}(kT2JVN1O3>pbMCvWGk@g|#c$jc#+uLwCKkE2-8SSF|gsPS};? zro-cLK%S`tUPHNE$pCn}L!R^DPTQ3bmd&on#IpiU= zJLDna4ta>ULmndLkmm?Q#vxBn{K@f5a~T{`0AwXQQ{xL5U+f_dBf3K#BJPlfh&$vV z;tqL;xI-Qy?vRIwJLDna4ta=l*+ZTYWWXHq(CrR+NQFZl*1I|6!O&(5NQ6)y@(7te zJ)0T6e{Q^b&A z4|$l4J>(&~_K=4;xz2QNahZC?nHu2SE%WpBMF@pkC?;@ zK1P6yD{Oh`mRJr^-bYv*Gmt&x83Tz37+?=_j)&VGv2RY>39po^?9po?y4sz&c4{{F4AQiJ6#R_%@ITX*eFdJcf zcaX!J-9Zi$a0fX=+(8ZzcaTHG9pn(fb`+a*2@;kPXT4@Q$e~BTdZ?kKO2a^Qh#$Pg$)#L4)9-3@CXhlQp)M{gGzy`__Yy zVVjvducFr<+c;f`A{FYhpy+1s8m?#~X;v#$?O`3K$k3eaL_FJxhF5dYj5tL`3&q_L zMpp)ZhG)H=BCn)VPm%QX3RH4A%M|q#*_n&Jm*>kt`J0a5^v%M_UzpW6g|PbSICggm3_ zNis805Isp|CJCY^$;@Oy^dy*Jfu1-Yv*;N`^9Qb==RX(@y`v9zR9Pn4O9^OG4< zCd$kuf>h_Ur6o(PC(6t!X*)epW-hP44l=JN%FNY;%Mo8sl$mQge~l15QD&~|%%Y#@ zi86CT6<0obqRiZw-xSD*oVK)NHlyLDr6t)N2RAJ($)uhrGk4TYLj*lhW>(i>eeX@p zX-iAS))QssK8d0y%FO+RTM%DQl$l3MlhLYrqRc#AO_|gaW#$Q~=Q&=LIk#cS>_kZh z+(dZ@@^lj=5jRm1aT6uuxQX(|NX$)?JOXa%$%!(9bDPJ2xrvg732vff3T~n#;wDNa z=O#)X61$1=H$dD(NisK4zK;+$QIbJUD)!{ zIem@qV{t54IZm!c7+pj6c0ITfjGE#0kF7lc?$QPH z_m8XH3JXP_d)EH>1x`QM_C%}t7qv40qg+4yiB>UurB8R`%Wz*+%X7wvBvJj!_@7jX^R)wB#mCw~t>R@zvx1|yr0K52mJox{78KmsOu5JbgBV5ZIe#_O%TF#Ope}wTfn&g zQ>oD$@|XtJ)Jmz%pSH6$>kDWc0BZB6!&$zOKn4O(n?EnIT4n;-0Z@A!lKQzc{$W55 z0pvT7Bw0MqFmebop26+c{3sK0oeS{>qLGB!^NvE1xJ~iqw;)NPwG~bWA16thfVB;y$(9A|X{eFOmId~v z7)7=$U{Ay4r{1!N#^e?Q5seH6HFTRz3({+i4E8icv_=Md8X{UFi^jGSF`E`VRe(lD zWlSEmJ`WBl05TJeEE=D~-6O4$!JdXuwMGVe8X{UFgFOuqt&zc=hKSb4U{6CtYh#-MZj`hSkXEb{ZLx z&(p|ccZ9Z=CQG|@@kb_Twk~Asu^QQ2mc`z9VTjYn7zG*`{p{97(gu|k>@+fpr_;!Y zIE{>m)5uabsLa`EWF&JM84;(E5pfzB5vP$6ndar#q%=8|5@)>*(a7kLutB9U*k+c};}J`hbQ5J;C>bdpF_-dG!px1n$!ST}*ur@=`3Of3>Rn1fjk6hVRc2%mczc z4C%W7J}&|L6#y*;>yR7^QG$1soE^jP6@H`OH&FY<7g)T;>rK$)ZbAJs1sw~iBw~02 zHbD9OJDR292J)QNzhfkeJ7~7&-z{b0Frd|s(KAtJqJAti>PHEw{sYwCz@BpYXep<) ziTuBEv=ne1VNT`>p??Z7z1R!r_Rr+cW%wzU#=|4%%AWwl@}yRd2j5kDf>kv}6nmUF zeFxb3)wDbK8*2D%K$x55c^k;7)6ONF_W+_f3l@4a@+X4o6`)ViYr(;@z3pnwgV#n_ zY<2-MTOh6N^UUN*pqJ5WCwT2pGZ|iw1HBF4`78v_J<;9(s&OBq9@WHA_{dh#%Uz-_ zMfxA0Xdru{MYmB7N$pOw zh`19iBJM4HyXc2KIT14E577=%%MZ}$G z5pgG4MBIrM5qF|Rq|2UYjUxl*M2l{%7`iLbA?w|oXyIVqsD(oK`B$Q6Bc40aB4X7- zme`$WX(r8;=wm~x7UD{Dh^lfYTDKy^ooKxT#GPpU1Bg4(YQ`*S)k0=t)k3ms)k5Z| z)k0i}?mz^0qQ!f%RxM;~ccR58?nDb6D?ZVR)k0i}rZl<}Eyjt}LYB;`g$!|O;dJEb z)IuUoEhOU9LdJ1wAy0CgT6ivIx0V)rqID54w^7I2(r%-UDLA!|h*JxhoKp*LLL9eI z$4jYhqmE=wEqnwaPAw#-PA%k3Ri_p*&NMHi+?1Fn@ql#^uyq4L>F)PPB-RvpD7l zd!jW75)m@Ms)eV+ZPh}$omxo5sfGI?plqWqN54x!WU{ns;cHCLsD(1>ShbM6JGGD@ zPAz1Vk{8m?s)fg)0qjN{E7+-p6i=rX5^-uF5vLY1zT2o{&Q2{PnNtgiIJJ<7QwxbW zwU7wZLN@6NBrGM)dToQ3f){#(tcMy(sx*uj!p_VKX$c>4tgNA+nP%h#{qQdSyn*0$ zd!i+S2DP=!sH#s$?PSI4N^B>UCGQ+C=f(ft|xLUab2x@CF zFJ4nc`T^CR*9EBi2Pn8>U9V;&6{B7y-0R5nm$W&H>O^WcMFQWeWfq$u@&qRE4noOT zSpwML)3dS<{X%cr?2gEsmBT78HwQ`ladi2t{8cw?#Dd3MuX39;Sz2=E<|%lZv$PZG)H^ry^+Y>*2@dm&iR|3`6L`g)o9hq&gEn(diqUdBOEWt+ zIdcaMU!1SMU!8*b2Atb+|JF0KaZ@zoxG9>;U^hi`ucpQA+*||9 zP0`$iaZ@x?a8oo9H$^i!H%0S&!%fjVr*l&@$=nppRkWL;$*G&7c^K!WXvV=5O}UZH zQsS~F6L55p?V5nRc;Rgbu{$?(hqNk{INYa8#1T}-;dWm52Lj) z?|Pd>{8q`^OwdfxGWOUhdM@bQ6wMGfMKcPfX!_Z=N=`!q*eROz?WSmor<5 zo1z)tP0`HRP0=KCQ#27bMH6vTG!ZvN6Tw?0Y*OwqN~M~en~)wM>!E>?Dh-2|Z0NZw zJVTC{4YFNBF1%0<+;~_Vet_UyV&|r4cW$`(QgP>o0ihSZjo3M}b3=E?M?z}2oXz$U zbI~n<2gf0|U|YK8NyaTHs_mK%^A_UY>vIZS?s3{qZGgI7HT zaad>9rBcIrTECr5NdJ9IhDeOskS{Nzpfo?nRtC2is`v1`HrZmh3nig4!x-0Kba`$4 z@~hwN-M1JTc=g-=7q5Od@Gz?UWj2@*x%~#ZJGkHQQ#jUe^*g^W!hQqDaqA=SI=SD# zD{^x6+rG>uSHH2}a5HG){RT$s8TOJ}-&MHV2LXw1eOtrYB_OJ_4MDr1D$#YqF;_D` znhoJ;HoCn6%!b0`t#A7_o80=gZ?nm*?{KWX^<9A7P`F|7dPIk^L&KpwIl2cRMMG|~ z6A_N5af;mfwy(3vt#A7}o80=gud~Um?=X4m+rG{wx4!M`Y;x<{zRo7MzU}L5a_if@ z&Q?`K8FS%6d_P9t`o{BYbn9E+@m>Vmq^cii_X#h!9x_#c)lhh0y^t1QHWZp$-v!tW zg~?mrc%tn<#MQUH@kASu>H-ai!b|JKa!7S8MKvdHedCR`o6*Pht#52d@D`N5^^G^$ zc)3^K`oHOraZ{OVdJ_?zJzPa^HB_m_6v^|H!8vX6iHh8CP3I>su-gZ-h zmuNfuT@ZwK+P(#(%l`!`+rHE0`{=Iroi_g*gy5YvCO6bKx4wA?c7$(kee(+VXy4rW zCfQiu-1=UCka51b^-WGE`sUU*@5fH@&8=_7fyP7mkyo*Z2ds;LEgT5Sb*~rl(wMpR z-G}aw2T}ShM5LaGlOw9*yhge|lkQ3+L19SH(aX^Br2t8aA`+8$;TYgD_{al!9DMlM z82p)!0Mla|?54zi)OZ+BV>F&0!R^mORpWIwx;@|A`X-X`lefP8)UEG43?aOqf=IIP zy&7XZRF8?sHyV!&LH_GYJ@-1BKNaIOUT0%S&NsKd83h^-{c4Q$5Z@m0jr9;K*z=RO zzWwB_Z$EkK8(*lC*V!1q!+#p(vahrGH-HVi&PMqjc9K}~|eP`|{_Q-=w zAo|vKCVA^Sb8nF))VIDf_tig(#NKO^Ti=TiV~}c;Ti<8EJw!E@pnE(>_ZG?v$xO&L zXkjlAp}>d@XSfKSA&2Z13b_%X!x=&Yov;}ZE*WUJ{4vCg7j6$45oXGfWTG^_%HqAe^hIrXTChrPYnL84w16h& zZS7L>wst9bTf3CJtzAmq)-IXb+6CU$E+ubkmmbft7W8fH(i4K{+uEfk1!*hr{$c5< z92wBJwM$RuP6VQFYnOi9!~*Es+NGc5&P9m6tzELWwWZXIA*CLuOHDe#F>aEBt1O=J z`X}y5KML>QDpa=gCb3BN2JkjFUU}wFzP#GYoj`qL)+plj2+*4WP4B_$52w|5xu(1DGQ=%^rt9zUyY9De4cce!;htKhcEGiZR^C?r zxNa4=;6=Au+=s5BtPZb7PXi1d3nJESgcZpV_?@9fU_0^0pq~u->Z_3GUxdL)pdJsX z-wRog`cP8C@-D))&Li==y&8!$2O;!c#5@2HQ{jPTP_38=D#qXg^oOH&uMc84Vmh4~ z_GF=4L2AMa(X!HmSoON6v0dBY8NFLwj-d>-h}0F;8!dFJ+eV8101rC>~+tb7FY0|1&& z>+x+3-~u4^y-yvNhKsS7lKPt=?_VB<&;tPV&x5z}5+7yjukIYgyvN4eOQiZd#9G0a z+d!DhW3pzY=IfifhXxBDVjaXQOFlS+_Zg%Vk|{9n9T8!Bs=OUdWkuwZG~y zu`y4S)8e4alyEoXWK9X_ZlEdQYB<*N{$nFe3Eu*}-H;vtw>~X~DdG8W$EJjj1M8tr zi?Jm=7nn6BWF%`$n1PIx-+zQD;X-(u4QW!l4QV3Il#qxsB_v`_i@(JEM{GwkqBA5U z68gI@MRQG(5NAlJGcyl!NoMkZHVg@gI731r&XACZGbAL^WlxKFH_)09%C$y$KpUIU zq=Mnibo}|!_a9+IxGmy2BSIqfv^c*17_G``Ce4#v3(zs$Ry5CwpnqeE$(fgp@|N z70o#DX)#M?x1t&1wxYkD`;Sf5i17cy{l{irmiy1T|H!TA|K5M3e7mh^B5o_1h}()L z;2py(7*^pY<`8PzvXI!9t>AA5VrU?BuzydQjwt%=FQaocq`T1>@ z*BSj4Z4(h{Uk&(oT2;wA0S_aywX~{|cLF$;TB|BD`Z-or@jC&BgU)VeGSb>xRgv0R zRS|JkRYaUs6%jK}F2N+5G`atLt13oxR#imwJc+GLBF?Ich_k99;;gEOIIAim&Z>%t zv#KKE=E*f$Rgntw1h=GLt&;(5z z{vB3T%yFXq&_suuC$WRMMyo1D`Lb43j1$k3ESa4r8RF(i?y0#WTO#hrmWVsDWgK^8 zOIsOtWGhxx?wx=&TU9XycVtV%9oaHDcVzqTu&N5gs)~6stB`dOvUNj2=?|N0c$y>I zCb|Q$s$v+;s1k7mrN0-@swzlXRVC=o2SupqUISf;PFhvPBwp~Pt*U}?Na26ps*1e3 zBilu&Id^3H8im9Q==X22s$$OW$d;q6n@26W8qi^PV><58~ye-Y5heIm7PoaM`UM z-?YN|w|s@lHH%%L(k(00N8vCt?{Rc~&Sf`Qq4E-iU7^l}+pSQqf;(QJ{`a!me=ob? z`GNoIm)&Ik<+IT=pmHWtJPKM1lPTVaa`P{ZSDeWd?Wdf{6v>>))H4WiCR1PYWw$10 zSoNQ9*-fmPxlX0o-G48;x%rm^u$zC0xcQfen}3OPzwD;xUw7H9hLRdCg@Acwm)&Y8 zXy(qMSWmeRE_^MQ-Q3+vQ=or{0?Xn>!rE=dfaTNs2<-{zxD+$2zmG4MU8llhQvjYCsMa&_+56xOLuTTipNV8KJMv#Y zh}H!dqjLJOpqzdzXpr73mhU~7dqp|D0?z5@eRBFWp`3nAD5qZ&%IVjHaA}OM2_dPE z27^VS*n+<_CgmymE zuY!Y@;m3U9AvltVy;mfkc)%AJ8Eu_VKI4E-EglX`KI33MwJ4u)z^4|u>sM_Idic4G zz!>zE=K`bz$jg}Xw6JT> zSc){wM;wCW#})(b6wCj_h#esobN`6Y+Mha8MWPr&auz@kUi!h!kdqO67G zI}VrD^+YbUK^LivK~G?A7%hX?cLWD8#N03n_!$Qn^xTV(eu4SuBCUG{1?HoRJTV#? zn2#>@2BJUXaEoN4zv6JKu&Y1fV61t9U6{!obpsG#O2BV8U@g2p5d95@yCwFtU^%JG zCmaHP!U4uS%TXaa1m>fQa>FPX%8EBPjDpkA!MYjquw)gDd9Fd8&X|XYGv*;u*_h{g zB<75HR2J)kVb+)@1I!uoGyz!)V;&~wjCtA-#~Jf<0ddAWBy+|*BM{<@dB~|V=Gh1# z&X|XB@CgUXjjS_>E7pbLsznJp8ujT#JjcVJ!l!_S(;c0LABn@2Y$A@JIu4h?(SxKr zA4%lEMS_lAa%AX5wD*yuC>}A17tu0IMi{od^iO=YngYMM#W9RoW1cM_wnYZawt@J5 z9L<^VVWjQhRdc~vNTg9+4!2x@Xi{}_d;U@cG@B15`ZIvEsG>Br7aahCh>12_3jcQ1 zgC5pe=u^0@wGiFTT8N0V7TOO1rL?tBk$weCEv8J?T4+mnS!*E~-zr)QF~nI5F$%sB zK|gCP#0^(#EyNb|thErw<U zD6rsErrkv_8_t(_e~^F@S3GcOtQT715ql_x#*PV5* zl7suY--4CwZ8hwpXSyH~dUcN?$?UDtUGGQ*sq+!6o1tz;-obN50B1bbwvL?$)DxuFh$a)mZ3_SpzD{1vWm)8dlJf*Eh;NkTMqD5>w?LgrB zsJnF%(f+(v(MH|D#_6LQr=frYa_WqIR8J1Iw0G#E){|1NS74jAXhJpKQnsiLOWC4E z3T5AZNU~1#y#jxVYV<$Bm-?$P)&-W;%F_|Ib%FQSRz{qSlFb5)sVT8Q2%iX2<*Q(Q zVg(H9n7+S*q<&A=M1WfP5mO+azwgB~mLmR9fHqRFNuNYG-yC0<@Ow4(1F5D1P4ed7 z23gj{4N6J@k}F8Il8m*^@os2lRu3TVYCt<`=B7Lee*^3l`poxk7NeMd0C|rdd*k!X z6orj?;N=0p*a=MjVX27@Tigtr?DpW;BFu=$mK1oSiKa5>l+G z1Y~Cb*%^+V02|K+G6#;`0a6jWq655$IIIXhoIWEcz*M}RDN-V(eo7Faps)%oB>jVh zFOwd33J|QuV!Ey(=a(wgZv`AQN%mR*Y9;wZQLSh?VI031BP^2%P0a^U)f{h`2ujs_ zZ&}~bh_T7uo;szCVP3>n$~q@PzK&i-TDI)b4blpoSHpMSrPgP}cbmjf#S>+Oz%Pbr`B|0bnAZ_fj*w z0k)x@6}qFbFzO&X{HNZ)&*jlsjC(EoPDQ*^08QkK{{j;16J%cieh~sL0A!y5awQy> z6L}EGjd1(`@VQOkb+BsqFZ>ukS44Sml06H4_af@u0GDfq1c&KdpGLrw0Lk?QIDSEd zx&9W8*8u5UAI4~uXm~t4XL8LoK}fEQvc~{_AJN_gxEu=%T%>dKns8$qfs$hpNFE?L zHo?&dNauLHpU%;nG{v+GCQP)9cM*hxyTU8yVL+0#=o@H7yB2*8MCV|yBmM0`^P<^T z{ls8>a{XyP$2%7}+0XIP-E3cKZ_w+{1@LRo>(AA2dIfG4KMp8TuL!&ru0P*`)1JVJ z9NN$EauSO_$IED~?sL2-xceM0BiYaKa(Sp9q8&r)B>S#~SSn@Z8Cp`i6Ided1eS<9 zfhAI#m1k%ZmP!R~hVb=aDFDdzyB0Kw`QLfhLO(*g&{-us zJ1eVBAehMN!2lHGA|^8s4sIMJTK#+FK0b&91@RzEsXneSmh2FSWB6?gWX8m zygA_>2k)9!kkq;@Y>y)ldDFT(VuF!@V%{YRz0E>)w&sA?-Sv>=zZ2EXf6Rw^(*H< z*}dvq9ey;3@4?8u8zP2!JH1BlqlbD|J=9z1q259d_1<}?chZ4z)2sHENGz+SgAu ze?N6Se*3Gp@H;>~hR}g(3MdDuhmgWxbr;-2)ameFM}2})4^_3G9Hx5Vceomk-*we^ z{EkqsBXp$N3hq&ASNyK0_QUUJbp(FLsJrmHzIp()w}E;Vzhl*F_}x&QidY+|_u$57 zoRQ-=Rg2&8Y9;dBM0LSEK|KMQiRxPTOj3*SJJ~D#5`TPuxt|-32FiU10)K_y$br?% zeIJqhGc|@AK5W7|lJTp>^`k*i=jHK^8}^k*c#c1S0sS_aRGL&bY2c*wCk2x-lX^_5 znN&S#z@&yrgD3fuS|=4I6(^yw_3=um4_l)1P^LvS)JLOp;XJO1iAQ-jPmoW8ML9T^ zG!1}nsK5Le=7J}|IpmL@gA8kf@nE6&3A}Q_`>ODFFw!{hfWtf>Z6^Woa*I&&zPxzJn!$Sa0$tqo+tTdDqu=N*E|P4>UV*<7CyFrsFm-a z4;AKn&Gdb$39BYRVUE{__;JmicMza(@PXcN68;XzuK}6)^Sw8Mx=*`c}_d z3<&0rf>#^8Hfe)g0D^-?cz@E#ZwGX9@fry)N&Zxz$I@$0@6Vd(6<|+^&;IbLVp0>@ zA*6uJVTXCQhEkO5OpL5N$?#{OF$RPo=?($SK>&ZN*zXkJ$J6iR^BvvYz;CAClGyLJ zz+a@_AJF_Jy<7*@arFCb>^Ba6qX5CIS^HbMeSz-*@Ur)VD_+hOuC@$w-%USqW&GX;{wMm8E92MLi9rY;Tp7Pnz=r^YE8{m4_znOs`+aa# z2ayo2w$*iYEJBU|2v^4MYT%dAk6anQmw^9-e&ovd)uJ0@0K%2=8wY$e{a9DVZy(^h z0fZ~#cLDGf0IzBv5i=Mj=eBBG5Y%e-DpDw z_=h@Y;Hf&*zq+9qRJT{}n5n}iR4pr@pI0ny0#EQ1s!fW;;`D}%iW?U-yE zJ1`wa;=smNrU^cpU^)o0V?6%J4Uj*1lNe_ALW3$spo?@u#VQ>Q==6rM*o!E^Bd5c) zN0n03@exT#VsE6iF0!f-2V}q2N8ZGE+^yBGZ}3{$w$Oq z@M1*>``W83Nky98!_|b6L$)b=DGl=n$UO|r;6#j9gr4y@lPsYglg(GBo@C)_e7wN$- z6Ayk_JC^0_Se8!@L51?sulx9z9`o?Xq8nUL0ybo|9g=I(<6&+2@Q3j-J>J#Z@vcFS zca3(u>!HUxJfIX0NgP0%O*0_p=?$zjjFIV~gCh#Y%e2VaVWzFzTZG7t5_Txny$`u{ z#B$u}a!HRySk$D`Or?nT?Blt`3?5yMUIZXT4>N?gyoSDy5kx7n@#|~H1gsMh<5~Z7 z(q+AUK(g*kLIYi~gc%b<_cjct=|SDGx;6qD%V3z6RV$=gWV7AHDQCqgZ-uvDg}121 zq?DGks&YBQ=9=zFloHN~HCE1QDPVebuhSxi1z1e0B?=!DkG(kSHIDYC8eN2Fk95W8 ziLEK^X(g_?yn?mJuBm3(oiNvT6N0u1LO^kK^R;PDN~}zDOsF#<8a-_Q=J{BvA&a)8 ztd_NIV5n6=x>dtid$SE}TQ6%{FQ;2CpR8WCPQkWL5$#G<4YEl7shK$qkG-D_?Mh4! zt)W3ND<65loFjyu)?LWzt&lau649t7qDPWHEfH8qCk3Fna$9#BiKIStXNm`;bg#!| zN!&8+i3a>J@)5K{mOX9>g+xlq{n`oCzp@?Rkj|hE7wVluG3oE#C7Fl z37JcEMI+D+aqTpI4Yl(nCP*WMwoZU*rQS}E&clvIs76Yy6;fBL)#cS(ldjd;?zLKH zYqh?7#*~SYD}+YfnR?h6vq@KUb0RUrP)kyt+22|#tq|IhqluP!J0D6(wO2>F`Sj4& z={%9+KupT4hMwtxkHcQCG@a`mB=2&XC%vskkNMCk-F+&=wljC%3bC1Lzj&zY9}Cie zgdoKepz!W^!fL`sU_ygU9ZI8e4j2;am+K@{;GvF5R9e|0WLUaJ5?Kweq)l=;VOBG2 z?-5BFt#6K`zR4v6hdSX5o195Tv0g~V((30I4=f20LMd4MFJ67?j+N7sdUEw`2ce>! z1#EXQN!#usLMCH+`KWKlc9f93P^)wWW`w%({#BpuUk&AbNV*Q|w1@6PO|}o=MkKvk z5*1)FZ8g;@T(S?9X_8vz+tV#fnU6aRQi>PMahE}gahI`bfzXP8SP7>l>7>Doja^nk zu`W-Dbf2UMP*(fKYcO^QrysCOm}S}kqjMl*x2_!cIkG&+&`W(7c5ENfe(WQL=OocO zcF{MKb@jC@dJ;2UvX%6Jl})RPIU_v65{1XkfzE^5McmUd4bRa&C2dwIk(y!(RcUF% z{mSw=vc`_)wQ%G*u;Tmj3nAAQA{w!FX(a~yTQTaUhL{DBm7lU<$*Pvgrne)1(l5Cf z(o)3U*fSw`7~jkCu*>tVl=Py~y6q#m(U6Ij4fP4dl%cRMv)MpakyyN^B$bm&Dmm<@ z>oC>51}6K(pkxMYuEFV;34YdQC1m77Bn(5TS*rh6YVA&)9y|XBq_&%QX3o{yiDgUp zMEg?SK38q|l7gL-EE$@u+?6flLFYyt(#4yh($UK}99UtXwL&an$0X9jv)=3+;sm=q z*{>kjS_O!-e1HBPl&J>cO^?(6Q^Rg@x1Ia-sr4oI>sjr>7svL-bp2>awR=-`Nwc=A zK|KuHjq>zR)lH#DjZW?HL|vv&q{h0=a$)RQK`n+nCzNVz@H+*&@|bKDka&wo^?$gat)(fDA$IWSU66oWW3o2h)Z^l-> z^`yEtJjoTd@e_*4SLg-Zhj*(1$NL~@6@w~>>+F;|E;*g9M-SN9#va%g>8@hL%W$h= zSgjed%t5UCUTj)d)!U}^u7Z<|Y(>ECiy_P@iH)&nqF=;Zn);6qv?``-^@EmlXiBQN z9p-9-16izkcOSIc4YBlK!$U^}x#)}qFLe^e^uKt4^o29}e@v67Ml-uma>H9$bEm4k zp}gATu`nLGtYlPd`dBjJ5wen4aeuO$z72&TA#q5}Wr~w|jsV@q2rFXox;i~bRHX-* zwOf{ag)t!|CVH61c6rRbsly&|hr?!SA{d2hjwL150+W(rw@~feDgE9_>*tLKlnJ|- zNsS3kiX^SXOtLopzx(+6#Tz7gUie=zPe4_&9*sk9c zH(psccL^}_mXw^J(c=yA@|Grf#YL&rW{OPNZV}?mGN-|Gf)}^Dky@GB0Bkhc!KJsg zAxI?`FFlijVdts7so}yXI^}E?X^T*H6eo3ItE^0!Pu0`F)DWX{7*x)wKpt8O!fjKh7(8H6tx?3)~&^wA48Ds4r? z!*u^-?Z{3~Oryt0oKYpczJg4CwMA)a^s?um(xJcXqBN~})Rb?tR9KwaeeHO(u~QX3 zz+-DeZ~w+eqE24R`!w6bu2GW1hE+wAe$8uWPmFR-;4r#5w>!UQCdm_gXNv(#jEbDu z61i=fqFCJ-`RV2Ou)a`Uk^-cKgC;|+p=9gaqGkL1)Lr6bmeF03kDYrY1A}L>8Si7&0?EDzpvL#2fHSQz2+F7efxVvs2AK#?KxchS24kH*i z<3=bSHY-%QwKz#mma#pNbb+!|zIga_<6&!JJan=euZnb@8111*casl0)jA?>mXr%o zygy#v?I5tGw8;);C06?(XM13oB>K|Rt{LLiMrzV4INN^BiBq)TWj3{PjLdBXB4X*Qp#Y#4te!xB2jR~S3Lg!1|C>;-Az?>@bk%W}%{ zi{=&GR8K9k)UCfRNjTK!pHr`SYUKiYjv3v@s0{p zBP9sKr&ANwxI(e5Up{y;f%H(R8A#g$qk#7GB{_WdE9b~474hV54gA-1wrG`;ffZ6J zyK12ok-^D&mfmCQF4lF?Y0{owLB!WM(5D63T6#!3apt#{9?qkX9@dN9Xa15k+~Dzw z7;aRjC7YTo1w^WznPAvYTe#O*NfT3d2(}&8ttcmQ1!rvZCadQ(Ta&4>p56xSMSfE9pOnptqGCtVcuP1=#D-NCU(0FwY}{p1X~wXl zaB?yjVx}?ehi?C+mFxcywZe|2seMtZ3v02H6$?S42Xkz}Ky1U@?v&jtKtt(02D?$9 zJ@g>gZKFUoyHeW(uBoKO%QF7lk=n{3IV|7NG9zKUZ9sX97wVPQV^-2CuE#v9p76a{O|41MEqiQD%E5J4v6!aGks!=gOZP zEp2Bg6Ht?Gywhbxylhpe72ecxQWlf3V5jD;Zl`l!L8L!V>;0My2a?jLH`T1xiw??e zjR#zlx1nm&Rh%k1j;mxPoNUh2V$W&q4nW4dsF1jg*8P@Y`6@PkCZMdtW1+z<3aJE~!zZ*Rc(Fzs>_UTwDvng&!MB@( z5?i;2osEnaHTiBEf_gQ84$h;%c&&gaT#l8m6~tS6wzr_{@d;d|nJc|5s5@@Y*uW#T z3xqwuqFn#}a=lfu6)~`*1&s&ejUJt8tTvf)rDE85MXJdN8aJn11slJ?_C~r@lw=|@ zfwU@g5pas0L|O5};Ng~lCeCoE6fTbO!&Vqb-eMdLK1#L;t2o%P9TS6H_l=G6R;!cE30%D`H!DgHc8%Sou7{Pn zCNoT$X{Fg@A-#{ADJ|&@nzTs)+sFu;i%@p|O7DHgLz!tkJ@wxU4x9E8 zmgZD5W-X<~j~84xs=0k2YznziEg5S#xHe0VN(Mkyr%Jtg!l5j|S*jy{@hbHH%8kHFJ4Q+!MaIsAdq8%Ea}r z|B$T|yP^H{pHsSq!PucyO}^1$l^^HHF>y_2m3AyD+aXTx0qO?i>>H1g+K)TfZZtDZ zmQ+veVm9%36uH69h+E8Je0OeV;FF-&Thi`~y?k&t!{mUtmwuU3No#Ii`2f-m>}3a# ziJ_H+i7%o{ji<(eil>q0DjWxS6pKm38mnnENyMr>BlK%dWy8B(8ILkO4e{7l*X~Yw zZDz*|UxdTUaF~F6+B`8sjwUkC_YU=JI~MbmZ)Se!RP+ciZ1fJ9S*Yjr$jlvhO)evP z1)@9ZY`Rb8rh9(NcQLJ3cyPujP!hX$j@5!?q3Be?kM^p9lG|$Dj1zh6t&C=XMDYR! zB-Hsd-!U1lP?kR=r%M>PCE^A${PD1;m3eZH(xlP57j`6(Y!9j-TnJkKEc|ui&C}E| z>R3c;iQm~nRc30DacexMwl$~h!Q0b|)($-o#}CJee&3UfLW3-hZpB>*saT@~u@$=X z;MThVMB_kU4Ld{*CbZIvkHWRuA(xdlP725?yeV(;JF(?R3FOAP4x}I=jt%^`$c9}5 z#a2dXX|XzWLL~5RO}R*vVv*1jiiiukgRX|^v}&u>?cT2a`Am@%UCe#i-1Tu&vKbrV zW^7D1BiFjM!^tO1D z#a5)fyW+Z^J$N-!Vo{50vTu=%?p;fF0$+C$BkMIzHjr8@Pdp(&$M8)z)cvB)_6zPn zNvLpOQnJrP^kz|Y=J=dNJdvQw>8i+*Ike=fgfPU#5Qe6)LMWL3Z?CiWUi;jA-+THp(2=T^{_Cu@_S$Q&{c-mB zxaTbmmD1vsTEI0swLt$ONwtqS%GSbeo4Ya(sJJ#9n+Mfb%0acN98|~I+VIu#>hfze zJFX3@b&$@>tPRK8fIA_SaaWqZ#MLKfD>uV!P2e=;gn8Q2sN!b{cCIqpb{NDZ0^4{+ z5_+4<9sTi_7#x|>ZxGswI)!!WYAvO}^3)BDt*lKipI?SFn$(#+^82|s!58(XH+~|E zFOHW>ivLoRK4D6B!yfkw&DXSKF4d08wT)Hu@G@d+>~&HU``NaqS%31j-=@M5gBlXf zCLvL6>Eg`Ftf8F>uT>wC8=r;xrfdAZYaCmL=CQS;Y<##2YkPOs%CfiFy5}Zv<~!hf zg0y>)c@PkIFT{e8b8_x+b_ojtl70@{-KA;6ZbSZTj( zeLoiap5OHs9c@AKPD3H~OQt>hqQNEOP53H@8EtulxsIyo?my(EH-I!-uB7&_4=}%A+8D3%VQyUo1xf z_d<(N@Fg1sN5@eRFN(t$x1r3vPd5U5|HsF$zT5L-*qL9&*-paZK@Ce%9uz}q-?_*dscXJ?2F@oT&P;u$tHm~> z%X8SF{pnwl)2}~p76&;?YWP@Xd_q_zusmn!PsrwSEEc*|)QtY3vi!Mxnak~?t}I;o ze*KHTtx=(u2Af5{rlJcv-`R$JIAv##u7L;6qlI7Rl&k9C^IfgC!rr_c97o0}sSCaC zK4Mw!m@kwQB0f#f_z7#Ut)0ue^Wuv(WLCs^5pRIHGb2w7+`O>ml1DmD7%yDsnnT?Z zaf0RUbXQgVw>0MOPQNV1oOO3sv0w8ez3y2x-O$MEqrah%C-9(aExWv_pH$QOS=`Ie z89@u>9}T;O^5?P!a;?$nG3#C4nJRiW_Z2TprIoc^)yl^|?cx`fmh>UU_*S-GL084o zqF)LtSKfBcboaX!^^Jwt-TunET&VK>i!=n#4(+Cb!uhU!41y7J=yI;E^GFHeuRxvH1%^Q8SH*uUMAalXiIYs_Ojo?hl$kJ5Q% z;4N0a9(4v|9D{w^w6N{Az5F~IwQ{tyr$WIGxq2EyZy-A?Y~f-MdDxR zXwM??3!&Yv{YC5AMpG}9U#Vv+-kEh)n(|f!|;JVgsmFrv+K3NcMcE(?fgw2A@ z2Db?GpCRV&kvVR95AG2Pb$Wy_OysxD)gDRHF!xA*2OO{q+|U8Gz2#x36b zOy0EF?<4YU23ywSPb7llcKMG#k?^w4X(jFtz8t6ISX{9`!MV23OQLGOR%Y7V{c0=b zJoBqNvHEUYq)t?_%ZtqN!(i51@e#M3bv2L5pKG;U>d(||mo_~+#o8o`H|tr&?FM*A zon64z?tjNuS`H1*5UrYc4WSz!b_+b-5yorx9(bIMBk?kp%ZGgG3oqz|lWaa0*G{|n zgdQ(b+XX0&$8hT9*^s?;6&q?ZCSR56W_PSVq*Av!;#1SZb@jKh_f5Sks~a8M4B^^_ z2fUTJW`D|{vt3w`Pfpf59ld*zIM&4SsSS9%$XluN``F4wNRKJUDvzYJxlC)&SlkM% z)O$!P4?TRP{D-UHg3-`w3O%R2^eek1HozF$bm**ngEB7~ge#s`(iFQ}`&vj?cNp?#5<#u!d9X*T2ZxlCRCedEEBNe5u7PIJpD)$!zNSc5#m{=LM&_KSf7qpwip5 zTQYGmPY-tNY+?g&Q5afbNyzt_;-eic_4a5dCzLx*VI6PR(L>`!Q2C8NW#=%Pz)R!8 zyYk;1>aLID<~V(s+&(9zidx5i#%{jprHSr6lh5T9Mt^I<{c$+ugZZe}J?!O$Bjd>@ zzLFbU^S&?FW<^)Vn=i7!#Zl#`;%#)-JLU9GKfWG#^Q*k|b@r-e$vL8-W_tr}HC~U= z?4Op9=7rOmCGUuO%{VZ6db4C{^T&(+q&fa)>webEX499XeM2HtoURsKGZxY;o~Bz9_{6ZH_a20?h>iuXr6^#^Q|(xSVR|rL@mDP zBJ+aw%Aj2{dzJ9omItpFsRMTiZZvkM0AG^EAeQTJg@~#^sumyqXtlQ)lU&6BOnS|9 z)G}V|-_cU67Lm3Sglk$JJXNIfrwP^@J1#I+DVSIOe6!>yB7y-4&bOOtuz6i1X8Oi%0=TbGs>^Fn0f&NX-DA75O>E@pGmI@Z!~N{ep+3 zc_tX94t?b)^@1q$g7B_iv=G3%jc>qRtvowZ@5uf-$rToWNxfbxg!vu8d=kKGFdsVp zXKS=FaQuB!1Ib&f_7%gwE^jvl^C{rFqT%Mcf4OZIZl@^#{FowpI6<>PTFj@6UU*b7}C!o!GHE*J#R# z$S*j2vW@rXY%Zki{UW&o9u~#CGk`gM)YQP!9W}>4G&S&iN6qmIrUqW>s5$wU;d=1xAzlakE_>EA{)K|q5OS-wLxn5FI z)E@!K+F8}yE$RJL&6AQcuKK++tv*2nIpDH-56@!~h42-v8kkq*oY_B2uO(Obs zZIiDKdd(I|tvzm;io&k>q8=LBDa}afhzx8qO{WTy@IH`a?K@~pI33TAurDH+920X&}Rp5$NZu2$%kEi7#)dgVK zYkoJ{$9d>4!L20az7)z$09NiBMLEqjb|kSTkGb?DrOynGrh#>$P^)&_)XMR+sW%I* zF_wCc3ZbTJi0D4Mp2GE}P+$fa7X{agEHI9@nK~BM?Pv+eRIfQN3%{C#-^{|3l5k5F z>Yl5_4~Ue|m<_Sn;-XY+a~2wRsZ>{oqB8)+hnnwA=f=*^X6wiA6%D_>HP>}%H0irU z#pWgv*Nh-;wLnID#4(_U{;ZZV5yK07#Q0U<^~c!o0&g&W6?juCk3K;BJS9>B05d5g zH=}AAs&8%$mjGUOzjkFh%(2ca0lCT(QKau#%;B`C(QH->= zQ!zKvj!2=n1&E+f93^5LfVfmvqGvxmetfhp4MYqNaGfd=uRFc|A6Ea5NHGCxWz=gn z1K5Ww>*ijqf0`zjouKSH!Ob-At|*QP)(4K41lQ9`Ti0&n$9S^8N&F3k0yDs{$d46{ ziO+4{%}I7Km7DX8qB-rl5-SBMb(GvOIzV%sy77tS&5|cYWD?x@#r{lU^P)(31a6f{ zUvSvG7HlQ}v-t*q$C$5ft||3uC^ZRKsWevD5%KR$sooN?3j)sx0ZaoMMB2A~dltru z7xTm%93kbXNY~`61t%G+-=8h{O=GVTTy5;N0{sjETPqy@r{;B13^$iIU!H}d&f(^2 z9c>bKW75SEV6Tbgl)YF;qcD~z=8G=~Pf=o5EC5Y7M75v1Y8Lib(*QVbHL;FE6qpRh zrMb)u0UFsF!qQkd2ME8__%KeBc&+Hr=89(N$6sGD%K=$CwE30^qBYl)(fSZspRy|1 z9wJ*EM#~aup1eJ~B9&0H{2wvNH-1T5+@cXbBi`u6pL* z`Y<22Hy|r{|I&rk?}#)!fC~aU17JUR>B{9MD0hD-_YEMGtDeeeM=m=_+0CKsG_XbF zmne=eGx@SZ3xy_~8zem|%ufZZK6#~+#+uu5HW ztxoEAJy=ZxZ-~MQ3_}Gv`Q_57(UjdK?f)Gtrm{s^Wpypp>id?Kp`_}pBzLJlA8Pv+ zq_2J7#w=m?fJo^C9u&nnL|!=l$EF7G;?>d1o9cz1T4yyNUb`a&n~y}Q3BaUpH-OFJ zpqK!bh+;2sg5-FGsbkH0dMbfA>vYI5Qmi&>;I_bS2FyG?dfTB|ZxAu;z#EMp2A?v1 z6nw6g$GSOw-ee6(^ghQswRGMt!Y{}u+8tN%ixwe~{RR<{fzu+Lg@FqKJ9&{{s|XA5@*ti9t_|$u^@1HDEWlfW zcnY{Zu#s%m8n^nKPLS%W)5Jk zWT4?+ulcG3Yee0<845ml1^4My@sri5;v2wu)hj2c3H*IP(!A^Q_=Jqk`}XN zji4D(+O6Y|2HX3po=7g~>6YQS*;C=6*!BiwWOwHYHqVKaO8}GFz_I`_el{3S05{24 z2?A2N&eW(3$l&T}6<->{(XDymQNh&|Fc#R!Rf4aI7);s=yWl@|o16nb@S!JRlGIlU0ZP$#H2&_L?_k{;sH-^`Qpo zhgA(tT_)<5={2;PCc9I47Iw{t8Zxq`;%KNL6B{cU-Tsu6j1*%!3j3=dVcRN>R_j^R zi6T~CkcV^PJ6FP3trclp0pAVmHvsJ85bIu@>Bj-mTDgf_ZgWwtx}D7BCUdzhMY;Cw zTAXW!x!hDPH&c|;UeT|yakW3Sjg-Mf(XAq-7PwdxR(lwHxs+4wPCe|tTcqRwyNr#2 z?fz=Bp59{XEBjNtp_6GdO_)f=Q^&^q$26hK_2Ebm@ z7=|I{|3^?v0N91jYdayAOK1J?Y(a%7xhs^M1fCNeri+`Ak3atSb1P;!q;QyF>KQHh zttPunv(r`)0(w+Mo)8V|1Ti)XXH|Rycw3}l4&X$0)S@plw-)jLGs(p5a9>EmbZS0Y zqGLpK1xTC3cXsMntr97Dz`cQ;2C$D~-H#z_kd34<*<2`M9D$dLbZ!Q&4(#N$g6l+B zfHw#66mVN$Q=*0%JX|8`&gWi(Gd#Jmn1x;Qp@xcXsyHHj;~KD+*`Ng&&asu<{S>Cx z1k(v1nQHua)1lz=JX!Qdf^=(D(=^CkB$w;37RgXBMBDFPmvEB17_W^^`eMWoZNC$w zH&iu9Z>eaw);XfxW*(I%W(FUPBTeFcYy4)e0Ris)EUy98SK`~g6D{I z{sT6M!h4-Cn@k>iqSrhm!DAv;<5BmZf2cvatExfzT&r1DltKFAss`!nqVoOcD5duD z?Q3j*+IlKANZ+YxdPtX?)V9UFH_-GxYBfqpZ2F{J&Y=5Ck&?k~}6FZq}dWpQ}70*|Q=osId}luO;}ANaN$2v>psKh+gc9H>}m}LPSX5 zCgYcbkN;|D%bPuzCq*(^4!#r>vCdv|gY0h)W%DaPLk*JqgET+s*QL88ABfbL-^z{2 za^Ejm+UF#W=St`jfB02mG-w0%Df_2VWueno_?+0maT9(r9{w>_02HOWjUCq%7Y|Mgez+;VH z4!$A^0mIO;GT<{L*(6fH>wUn;E)*3@XRmoyq92L;n9ow;@;_A2c2Tx3i@F-_dvCRS z-wk-N@yo$uSGN(voGL0KzFsD`iOT!ILk+TfMSczHHKQuOJoxY_j#9!p)m^F$HQ0`c zx*FnG8~kih(U@cHCgwkOsWb_+fCxuZP6F)W94gQo&*H)ToH76@s;9(12$ce>C{mxuM|N zXdCh9bF^U;X+;|OE#0UUiG5e_fw4z#(DQv!v1D242Y*B3T%-$2;Qtiq*YS7g0`UW} zC!G~E!0Dn^6YGumkSw1U=@J}hecajlSQ>mx0Id%+v8>03RruN9XBuez+|~LyCis~K z#zcw*4eTn@0BsFuvgb$S?EGL;-1yRCdMSp2Vg{g@yj*k2s$V&7Hnw@xvaxe$>Bk?h z2%6|v+ph2rFXWD*CsQ;ga-=QV3(}a+WEN{E%}Vc2w!V3>$9dN0J?NsHJ<0I7DB`{&SXK0N=K|#&rkH0(%_o7Js3(zl2w*2oEN&Z7HaM#sj)Uw`r zC1+TQWgIc)c;S%g-2OAIb{ zQlrQ3ntCE-VD2%5mv(ezhv|l>ZhT1pJHe4_ZPVN;(S0Tc{ufc-eA(G5I=6A|l=yCu z?xF(}J<^7^4ZFkMUv=2~`2vhKQG{y3JE<#XV~ufO44s_sZF282njfn7W5Xbh1=8Rv zhBmL^#GsbwIq14o-)dIQ#@O8JnoaYvg1G26Lt10bGrl6_TOuA02-eF^IiagzH-uu7 zz`0oi`^F(bY!kWW$Q?l3Kh_DZ7u4-JasOL4Q z%zgsE>QGq~3DU)f#Q#%p5T;@b5WH35J3^_;HGlN{m;-E;Y#Zi5>Wh3=+MOca3|2U> z6rkRny-s|&+zT@K_adeD1Hp&J0*9X+ntz89vs~<#^WiySH;PmS_(s;8C-yIyCRgFP zAIY&*H%@hngY7ubR!8GpbsSRN1~UZO>d@rsifI%p{Bf#mipr=#vnF~Mi|0)y1zOJx zh3q+Xc+-3&Clo0bz@{0K=!761KTYs;V`C6abB_f7P}G^qd083LiT8F98%1zQIOR?Q zOGV+$3K-7Js+*JZ3C6}s;SZBc(5NFnFA*TcvA74xid=1mV%$j8xJvQ8%r zk+VFcM_|JeDvsh=iXNLt3OVy$@Nq=NJZqeJ)58>UaV%FgLHGH%$d5ozfQzn2E5kz^c;a8mwOv!yNX`uFJHQQwG24>)H0Fu2zEQSi)GZZYNm{T5Mtx?7no zc!e|t7Sr1QmL2a1=iTNf?`lL1KEfK^fF!CvDy)tasfoZB0y_aY!eINrUs{cA$c<7(WcYWBe${fL3o83u@C)`VEnK8~6`_odB>O z+}o6U-HZV%H(8YH3{dN3%DooKO#)VKswmg#?Og8FP;LsK0K>Q_*!g7^GlC?%9c=ZH zF(Hj|1N$)@J|5KD8}JF^hrt(&9|eiJKX;V=p-2vae;L>b0Q6dW~v1l(f$8t}YU4sLDbF#-@j%S5UL zz$A7||CXU!@Z?Z%0$3Xhw%Z4ef8Er;*&Q{OG zkou8>DiL{Y9f1u6GlC^rRIxyhnjWd`c;mW+o(V^5w1mxy$B1S|*nxz5uv z{h^2)fmGSe5jM|=lp_F>!8yYC*qq`tLBJGUKKH5z}H2}5kR1R96h1qCxc8+AB9xe%@H>LT%;TUnACE#Q}WwIq#LAI z*Oh**A?e>2$rYkn`6{7MmiK|FN*V)Hje@(N&5bG22YL^!q3gm)cw1hh<;?3)*Ig2n9TEQ{ace z^Nnx7yCzK@m%CoDeoG~~7w^}pmg_}$1Rpj&HLe$=H%QuzrPtgn=`B^wZIa$u(F`@a z6vMM^9ObJQNPkq(+#=bnA|eFwAl^lY^bS#ITXAKL^qz`ltz>72@Cn{*eDX>D?zS8@ z;5}_V!BuLP%8i1njUNW-GvqPnLk-psh`Kp%8l;a@G`;3=NuRE0h8m>LS2ajqs%ntF zR@ESVtJN%X&rtON3Q6CuXoec3AGR8QBWkEYI;!^fw{)?jXxz2Pp*_rpYUVwpkTdV~ z@UgUFo;A+A>0t`F)BaFH49jXh8v5?Us^&~d*H<;;l1^7N4dbXCSKz6garK;L`|~2k z9T@E0SbjvZM_WCJy=>FCd{D;^wR#YHug_y|A(y7b^>keM$}7Zl(OXlGe?waj5v>8I zjSqO0cs*5rtOs*-s{mh$iWn=1r;9~e5CLpDx3saMp7^iU>Zpq-Z;`Eqe?ZkYZ`Lm~ zM8pid{Cso0gCu`ar~mGfmb?eju%^wff11}&G9Lw z28hM0V=VX2XiXE*F7QF)hruPPLGm$h#Q0&5xRFO60onex|M2;SNbLgN75S<;UMv?< z19A@T&lF>4dGzCSB!6P0Q%YY;ajtuNHKvCafj;}N|a9c;sF*WVu{M)zu%v1VRExoUa zNFVsR@grcPL?}zU8kixd***f2AyfFgwLBg_5~*SUd!I9oH;beOZt18we$vzcHTlx9 zzK7-c2Y6T5;LFAbBmm^ye_kfOIv(fAR(9zOqi{d?&l8y?`ttN9&tBFRBP-5M?gU@U z?7pdUjmEja9Xr%~Yp$kI)LGY}^z|&zw9`H5uH!=FzPiY}YF*CemDXDG%K3UlO++Z* ztHuX>_AdqbDEOT50iQR%0e4+sHZimohvHLL{4bWBf&(@Lb_&>NQs5br0{HZCa(tia zP&t;g6W{KqL7XTC2gT3Kl``K=2-2<|HIQUyL3oer}A3{83#VqW1+QU;<%);K) z9_sZY*!x9`WxQl;#Vq`;tcIoHsE(=Z9dgJ}_$NWFZax!;yI6TR-jQn$$Lp>7d*uI6 z*{?rmRjxl8#0vGXS~bgZkY0d6No(<-d(bgY_a=eks=3H$xQPYI5n{20EOM`_H|g6s z#Q|6xo1-r*aCS@ZyZP4Sx0r3jb%zQ+Z+?ImME-oi@sCUm(0Z?qE!+A{-R%&OJ@7Kw zi4S!>-t)YJg+dFLEoX=>oA zj+*1EO$}VrQFDB)se$V{YL2frHE>5q-OUSmjsJZ9ygceX7V|5e@#mHLG(>kJ>Wa~} zi^21Z4@fr+3WahI|cBKlncYm!2-rT8rjU$F>=|eUxMUHFC7?NN3 zLFe%p;6itzvC>YUX>D4FJo@lhG$OrhI8}lI8tp-VFvfUG{BU)Jo?XJ?E-) zOF<~VUoXC5ot=J~cb>*_hV$k+tuelw%kZLxZ>rDp&(-2`vLB@G*#aT>;q6~za5Z_8 z7uc5DHET7 zx(t;gKcbfChmLEGU-Gg4`C8s@@msXPTJOhicYKZBW^Qjw^i!;b)z$B(zif=5GgA(B zb56{E3Eiw!u>CjOY;<3L$Z~h~+wfQQlNJ$U2Ha+R8Z)bPd_t=Sv6pSqFZnCF%n?x@ zeAxJ;kFlUTHt5#Og1;_O7~_IJGWJe^mCl{yORtljnFVeNMaC(8M=KssTppQ6K2)yQdX{6z3hARqr)@XV=aoOs6Z!*Tnu2UzJCF#C=<9qZf~E zZ{SXpwf)n=Exmu^-8ge6+xjjmzm1#knUdefLcX^*;QL#{KpO==Funngwn3S4*&m5X z@b{atS3ZGlft?1fGAVGiNr4+o3Q(mo1?)B{K;{1Q#_@-y20jYxG|(tSx=}#1F6l8? zf?E~}OaNBl3}9|104tkrurXe3j!^m>88Bi&Nc92M%+0`!A}sJa6q1(b+S7VO_MC`; z3qEiBDEQ(=i{HTRzw#0vaIZwYQ==OSRtVYLTZmj%#r7?g`8`8Nut}WQrBOBnM zx)2v0(h8RH)VeCHQn%No18V=w#UI--7Zw>vH|G4(6HC`EKMm4)v@z~F`Z?$MVq22- z4tr{m3Km!EHEI9NyKcN?-D!637je;h$#q?-4e9!8w&&YDd}n38e?Cah_nP$k?E@fo zcVgyY(+&7aLwsPKcjtr!uxUyaBcUesBcZG>HG+$%OTzYQdjno-{4(&YOTyM@3_RQT zW#G2|#^jY2wj#Xl7OC5T3%0>d1Ah?MabUe%NebZAPdSc{RV`8jXNbI-;|om<5RX^K zxU}8ml$JItjx%|4SsN$GS*MU7#S9Rvo`eIpiLd}6SpXydHS9M4W5!%QsBkF&d^$G_;_r%azJ~}5$Vb#wpY^FOyA2<2KvU)jE6)t1N?y~ z{NcQ2(TZ6Pc8N5eekgb~u#<}w{b8X6ljDN(M3h*6+^?*dy-f#qdBF=hcr6GnZ#EpK zKm55BTe!(+?hZ!8%teIhk*zn2wlh*IRJ(8;z zRwFM;;_NxS_rRLloMhXLi0lO>=Xr zb?YYOua)=)k;((OtCz>PX)cxis$f12Tpi8ZKMu|DHKqn|9<%G))ihD-5?~ed?bMgm zn{t_sM-_D2bwA9gfcYemi>I}V=n+l6{1N(|5 z-`rjjg6K-Vy~<1GDP9`;dTrj>J&0OVX+d>stJe3}5bugJ&XpntIe3-vqu^%sxa7;h zEyj<6jGJ;&G!1?(31v0Uh1kr~ffTvAEdt&lQttrkF6I5j(2cNXw}ABI@bB$VkYe>Kh za8F>TfqMfx`JmuQV}TzA_5$EJlL9XVb_RIOq`>PU`_SF*HOF%BR?tlY9|d*>7z)jt z29^bO23T%V-~^KbCz=#EGq97F3a&FLaJ@;tBe>V3!2Ko#9uw&;kmfldeWM*gEvqqu z<#?+b1(s@^Jp98yUU9WPJUN$4 zo56N(i&a@oExFNGCw1w@L?>NUx$E%O-Td_yDNZZz9U9Viiiifh%lLpV8$SxZ(#pYQ zmj(OOsW}=-?+TV{WKu&wLnK_XlDi@xzb`MAG2a z{Wss(GSkZF@$GVI=i2WZLN+R0G92}f4t~V z%+J{AD?GpccUB!cqV4^T6IS<{qkbXP>~6JYx31!~>V`8!q!GN@_;{fZ%3!ljq$~lL z)CPz7$N0ivJONx8joaLDi~|=!E_X>#OaiG~JH~Ulw5(b=B04{m8wao}2TU&MM*K#Z zSr{p~`YCx^-d)vM9rnK)B(eE^S=mEV_Ag%*$tytG=JJa9ieNqg92?Esv~s-K)Ijpq zs$*<7>wNGX5xosQY<%Zzh}9p66dG`MV5b4>W0ZdW;QzK{I*#cBB6s5J1-%LT&X)_D z!&EX)A2_wXdab!QMj`&isC|!VPgwjLuoE62&ZYe}RIMI@lwfe9@tqR}r{!fLg$t|; z>@0UHbfRckuStg$}Q-G2+QyQ=?gsQK23%41cCN0;j1c`1k z==AZ&mRG>jV$W;EAjKE>+F+^z_wk>boV954dPjkB`sO=~&Pnt;Xw8ax&=vc+*S(p1hxXbo)QOWfKNub%1!zWXGhteyDf%oTH&UI}Hw2 zf2rcg9qBCU; z?32S^POPtHE~He_pYUVD_as@)=l)MpS`}hs3)$`XTrh}s{F5fF?fb3SF`xt5{C#yE zgIoyuta;wW@R<^Kmyc@C@1yY5EA;GJ#C!oS{8r$rd-{d+LCuCbJ`kxNfDc7}o^kwV zuMBEnOyt!ZuQD}oQb*14DW(S2b<`aHhN*##9W}>)-PFL99W}>Sn;O{BQFDBwse$iy z)Exhzse!vYYL5T8sez|EYL1^VHSnX3n&THu4ZPM-bNug34ZPD)bNmbHYIO;4l*s3t z;}xa`zS>c9e1fTgwH-Cbzh-KHA?2ONA(BUKl+=(x$*5uGGE$CFSsHQFHv)ObuMwQFHuSRaIRgT%nutr#Tz5(AgFVvxj14D4*hAPJKgc(fIRWWuI4+|#WF zBq=HoTi$DE+btGh7Se=Qxoyl$nNl!_Ry=`53YSp$bU0b!SOV?LzYtltpnk&YG#RHrS5bvn_u8CQ} z^Uu(7?&gvYRor7gNIpEkKFiJc8Gc|sm+vd!&d9>p=k|c`{J^+)dfBD4p++aEhB-6h3eO1~M zf}v|40uvVPTPLxrAGTV54^3+r+ZU0|)381^t_zCP?97pYCalYyN9c9|4-+N8h_ zO$vNuQeY^=GY(K;vA>M9QPaN+MJ50%y*Zbjp!9Gky&1q!92))|CH&#*rr>K5usYK= z)M|WHir0h9IPgJWr=sUhH{T_#MKql)@)kCD+$oy}%nLvx7ByFXdp0*A^@2svG`s(X zW@IQb4xAR)3E&Kq0%w~vmT8)!BrwyWIC(RePOCoeJC>*a_e} zCIxny6u85rz`Z8T!CWkXnHIrZAn{efb_%T(OToOViS(L?Q3#&;`+*V;*lA#uNrBZS1x_+4@VH5VCrt`ap??W2R7WjuiL~|syMp-)fcc=YMydBhsYxK2 zc9+3W#o2OpPVhSpSa4IZigM6Ne?%}%X~P9|oE*fHxlKjtu_CeYpZN3>DDkUn@+bq9 zX&Z|aj-&818fUt_sQAZRTarA=z&|bdbnRHKDZN5O_kl+n zKLVa({A!SeMmA~qkq*k9E|NO{lfGew&8a~#0bs{4i}v+lcDAg{TN=OA$G-zR%(Pxu zHSJ5Yx>{K`-vr>4v_cdzC_LKuQScn&SA*;+WK*n+l>JqaG6-PO$siV|1@Q!67U^zM z)0~}zDOJxadoP4MZ*RaK86WU{Y?p8kt1r0w*|C&gV z0#^oh8o)jT(eBlWIsT*6)?hjTB-6f|1DCa0xsPRURujGx8mrg%g|`?#0zPW|YLNVN z^Gex&D3Ut>lfJxSb8k>g0N9b&XkX9kBeF7YDNc6$4~fVt_^|N-Uow6Se7Tj!_JNfB zS0cp;U{b{SViKn69@A#xaS_#lPZ%HY730UipR{sc9cBNuNYw$D6xF?)gsHkMYVdg> zHQO8TeB(#Jn~Yx#lFe=}Q1ivuJ`TAumN`)KLQ@B z*~4@InSFkmkR!_eg5(-T049C;#AY-oCIIXhpV7WPKF4Hb-qN&vT7G^gVjh9d7(W8O zYy4`E`nqva_TPyVCxA&`oY=e?6cYe;#2M}DalRuf^OoY=Dbekr@b(70!}t;KDdSgz z)YpxZvj145H~~!h;>70RpqK!#BhF}Fk8_u-%v*|ct3(%v!umTYYheLc?a%F4W@I8T-6v`~0^1FkiG1iZ-j)gbkCwIcu-6L*b!&6ug7_ztjt@AGcKvNb|i5qU)g6xbA=Y!{b0IN+kr>J9$_3{ z_fYd{Pp2?`K*Uo+@CPE@9048?jW$>4y_J#0E3X(8EnA#F8e#$8Dx2?yBICeqBK^Ss z(peZ>*D9uDG+x|Xt~?)`>_4X??IA2z$9`p*+e+xWTXOgvknLOL0u?|i$Z~M0AID5V*i4!yUY7f%@&ouz?=d2 z9^`D3beqi-pyVLa4bp8iQ-G2+(`Aw$CDH_H!1czDg1A8L|6#vQq~-va)ZE(Z9>+*~ ziijM8XNc5zfP%}L>zc*i+p>7&_s$nxDB3F8);Hezc5KUHM2c?A@l|=$M|2%gk38MT zc9yX){g^NG(;wuFYWLZUMa|XUPGd#~*ZYI*>A;oHw|Dp#eF@!?rC;yoXUsat4~liL z$hqs>HSf#az(*0TwfmZv)CA|V`BW$CuIu!$N5pUk?=gNExXbvp;8U#}ylZ=~Uz=Jh z20#B$q=o~SxK6|}TTEn&G~~Rm$K>D%^F?*f7z;cX*csp*lL8-@6i_P&!Fzi^;zxqT zIAD<#FG)pfEUA}SOT{>Y2hR$QXKobSWbAhYw-|f7;7((sFOB9fq91O3>dh@&ZVOi5 z0C2Ua`TgNp7>g=pr}YJ5?<*Ac+2dJ3IRTi*&4tJI?o#%+IeSc(wdU>I33R9At@=eQ~D4&zmAu z2VmkRSU%~#A>}(F7Cd~N5`1a@|!Oa++u8Yl@{fg zgA(6rBUDQWaJNV-@L^zQfRW&I{0PA^W0wn78M|6QdsJ+rVA9ylf(wiVwgq-G4J9<$ z#xS@@1eiS_azhgDu{z3zDfk;N9;MS;!UOeLQN|7o78rjl0f{{>6A1;E~ zVsZeNez?RcT%Y<1n&wXVz1OM$o(b&CTY?Wv3Q&n=_>qDYfgK0VGU-Oav`I_XeOs)( z8RyyMz$UmZ(B;-4Y0p<2L_c&+{3rfkNYyNnA@|KM$Hv^5gn5lcc~UPN?qi8DfM*_bgHH3wBn#FGN>0_hdMTv zU1-l??}GZI8d+>F(%#5PSN|PtRYkN5Jkj`o8;lP zi@(1wQWd}hft?2aSCaydniP1_qyTPRv!ch0+4n^DJ(GP;WZyH{_XNJ54b{v5v>;64 zcH77CSg3jiu*Q9FYpxdV`!b>;HR~aPHDLTDvG15PnlDOs2`-o7c@dix@Qq+N1H2i; zC(nXZuhUx2YyJrVKF^YRYcLrHE*8zT0(E9hdL$oC`!Plt)fLeIbYo=U`|5Om!zVa; zb$we?M>E5s`ZR={REbuM`CqsQZVz2ej`bF~9NdF9=sw%u4!sMEhE2y5FedW(=6Fp| zj{_S5I|XbpDZq}&E$*>~jX^vCU@>0~Tw8qvW#o3W|4lpNXtY-AAeoECW&hJ4^${2G zqyd&KDuce0l;RR57wk-(G$mYx^Yv$T=1w5)cXhR)Gp{gx3VW=-86P3kI_&pMlb?1PtjCY>~Y>nT=RZ{)nvSiCb_=Doua%avHPtu~nE zons-db3E(H^|@@g;Z&CfuYGq;_IQxFY}WdJ-_*HfCFd4rH$0s*gtF-PpRIAPGCIq; zI_>6bY9Bz+rD;5u|AvFaY?hLrDe%gGSpl(7NZZ{FnB1sQgzFe;+i^E;?d8Kk*Ja*%GuhvahK19`b(yu(3q3)tz)AV=Ja;#dB zG^t%K>bZ0V5AM*LWg=4$Eh3#HO* zllS!Y$Ei}8({EyVZLs_%aD!-3^EbXd3-cX2xPBJq4m;RB3uASEGe*oM7%}5aLpq0) zY7h6z!dnQ~S%uTNLcLd$E7W^6RJb!#sP}4M=nJ<9^R#=Lh^_%IF@6>JeN~{zva5li zKl>*O#s7v#$p`L}ktPd({oIo!mz|*O>Tid@fSs{yI~zE@Tco&wbD&jh372wP{Y0Xk8GGzbJUa zSZ5JuNW|u+sroJWToX!c0ZtPwYOeYAEX!8LxWTzMl~dcd|2K#=jQg$t?=p^H%qa%P^WXKnqxUs%`rkfD^#pG24kU4 z=TKE5hpG~U`qNkfhE8|0GKXA$?%6*!Vu{X)wst*Qo0UA!zF34~aGUWX;O)k*1@CC( z;D~Om%RXH+69RsAh&0{+O!}I&ONt+v&5MG!jD1I7=5F*g&8-sOW){?WpRuvE6d1KI z8t@F`1Fmc3AP)r;>XKNlM7%5)DQMu7z)l0Fn-svcngX0@QUK>ZpRuyOMq7<;qZvvK zSipSuieFxaTRT$dQS7Srk!5wwvR>XvYp$ZpjIMp|c5tn!PF)nrz9Ki&!{OqKqfYz5V+2 z`OlYodoM5Se`A2XlarmX@98Z(kydbEov60fN7J>zbP`CWeVgbLTdn)cdW*lS4*`pq z@Zd4V4})W^Ja!g{{gEOq=>R4ntiHN1UMlSo!FU>29@z5%%DJ-w#vlG&Me!ZPQ;P*l zjYZ@C4O-*8+}pbo;GpzH^X??ATuVe#R%f^UJ3q>uizou?C*)}1Ll>WxZ7+|u<}KYp z{uqkF!dD z_^f`$v;Cl2_>hPufiD<843b&jRI-l!QzE4bz+`Z?AD8yYU_1?2x$|SWBHIs3kF)u+ zo!<26h873K9!*zw2Q$sU=m>Q2gm%t3p{;bdqqXRnwoMlqr zY*8nsB@*GYi0McPsLaLm@XdOFBcg8bed9+!;w@roFKu^82Prwg)1t$g-)lbq@$5&x zzhaidcY<~jcvqxnh3R#Vrg=mXTo<7|DIs;b(AMklED<4q_ZU9{5_T=LamgWt226|i zX6Wbt;N!o!VwR&VK{*ZJ$1T+Q5|RWs_JJ+p_QNI#Zw!h_;AYXG`nvn!AOFV{vmD%M zx;P}xzg3S_L<9&vY5WNITq}>Z_JhZ!xm0q90VlXzNA;7EqaM{}VBc%;Uqc+7Os6IbFdhil#K4Y)=PQ!7S5x}%ozH)RJYAmA-gPB};K z1mzTfpCWLp_!X&k2din|$Y3=E92MBj0QL8^kMeJ*$nv0^1dbM28$Vhx%fXoGfK`E= z22L<(Z25J!=uaMqXd!sle{U_1`iMKETQ8j=0nQ2R`M|j*-6Ys*Y%CMeXHR@u2BRLF z_cWA^{cki}v1qU#YKyLlu%d83_%F{om!~`3pVHP8X_#jZ5wk>@v~`Tag{1CaWieZZ zpL80D!i~#X_m=_pAI($zQ>@NyaY1I`9%aUPm@kQcN=<#@;OA-PC#lYNGrK|iD+3qd zeiz4j2d$Z29&IDKxZLvLr1K3x`ex1>ZB894^#O@bXL&D=wh>)OKfge!+*LexF5J$G z`?e>DXb^am?kLkxkUQ43hEnECk?I35RYQU0fgJ}ZJa-f^UlDP8L2x?(Y!d|s?Nv0# z*O?l)wWH?vep3U_bkrO_Z))JRj+)~)ObzVrs5$=7)W8w3ZEa{A(_S}#Y_8Fy$3;ve zkSLTjz>=FU&f~R1%tjZ_R2isE`g*ZT^f9f^-^|4jM`s7+6!2F>x{eMhytd`R>qS=R zZ(XxumWQd()OM8zGN`W?%KOMOcHS-|t% zFkHfGiJ3B3r?&S=GO{xnE){C?DUK3XiK&x=0oy9kS( zigUcXALLIY(YBaqQ5m8NNy)rMDTn(nFBMowv(?ylEH zLN;}gM&Ux{QM4U|&aE5JpEc>A)_Hj`|I>={>5%3){Q&oTv{*==7rmES8a+fTTAtR! z+R%0jYb>16tyOLS)rNiDGJBefE7s0(9`>!BpH;PQzh5ss-?2HkcD4!GZ)>OK*P57Q z@%}Qz%cF@-VA(ziD@=V(?xi%ecJQkKZfjVHM51Eqr%ldYN(WUj=PA&w1@kNw^QgPE z7YjvN)#_4R^|%WkzuLNf@nRm+JuhMr1{a4b-8@LT!MNl05)lu>e-JL~ffE8d4V-9F zVA`a>W|IQfnH0F*q`-Y91@1Q~@VrTZ7fcH5HYxCdNr6UK z++1`E+kujX^bB5FYibvIWQ!)af#h~b2TB?u9Q-CyjIfUTZCUoCELOGOoZBFbZvAL; zqr!``X)y@XJxD(|qwRd?s`@z$%e|~^fy1@ZRyRE78Bw2Ib*0%A(S94Y2Xs#Cn{&4f zQU?6gaRbkbhyI>+1|nt-$SXLtWgWX;7Re3peqg78|722t!fp=fcLzzBc5qEIl7wl; z8hgvn-&z#W4s;E2b?%AOdyBlAE_=DgM^Bx$q&rwq57wjg7G1uGFMWmLKuNo`=i^Vw zWXb{UD_2}uq=6Y`W8aO5gKFO0{!^0{KXm*(8qa$h0xh)*Pif$HgF=M_O}~ zetqG7ST--)b<}Gvh@yGfXxLfo(%qJ*_gEw@-PPO^srMH7VhKzWbWfzw(?Z%(k2ZQJ zaZh5H*S2)c8DySe;tcxBE_}Rn%i3{~hIt15yte&SxRZ=y7d2PrzpLcrj*YGs(v{J+ zi0|OAWN0mX8pR|=bfa!wHkOGv?}FtFVwn<)uKe^5%XInbTT!$j4aaEF8Q5ua>E+SZ zW8Le#(y$Hc+)VLqBVS*>Lg~SGGV0?jx&+|M-tr zxF4O>%=D#!l-2G#UhX;C;^yk+uz%~Fr7Im5b!?399`V(VrwMM%rmml_4_xkR3Ez_t z>H$O#-~ubNBF?zZde5ESc3qR$uDQ!rjqRGJk+7)wmOqgsc`R_SxAJ?puH#~Q4BaTN zvt9FA7r6n~HBY^=KYGj6T9Zea$GX>frSnZ_tHLF|zEIYsF}^`xo>BTqA%aXo#T@QJ&=Y3(;ychO(1Lpm)Su=|J}2CWN4+g+5d z?ej=;4JGH=U)#YPV0Dhg=g#xl0&ec1?X+dFc;pQBosCYxxu;8K45V{h>7mw_rG=YG zX+@3}ojT?mX9s399nhf?n`!7eud>29ZCR`sKhCPo`m%e}zt!B=a~|s$)O%hYZ9Ue# z&MTd37v!rHUmdJI1mowe(rx|r-FB|{`(s1m24`{ds7lU2fS( zi^9)W8r#*E=X6T)7K8a>8m5j3x$OJ(z-LuGxb>yREjS?oeY?f9Q~T4V&Ux_j#Pit# z&W)OdoeTDCs_pw!3LUh7`*@v2DovhZIhscr>gv1e7ZX-XVkaBbb5|@MvB-&w$Spah5qgT(}37U}%3UOy#0OGF(Y*5a$3kL}AM)dj2zPN#v313M1fU{c^llLENy#6@iU z!|T5dUMB$D`A*F4C!%|=&h<>hdc4}Ii2q+I-`9jlCIQO2h2kb1TAb;AKrFbBsZpN_ zAL=tWjb8H%9)w$r56Cx?yysXONVz4_%PX)cu+zYdNdcTGtH60C1#la3Fkq$eRf<2j zt!wk{R*`u(hP5%4e`{Bp`+Jx5gWEd$P~m51*XJkkT>QapUHO7!ZO&N!7JR;p>E5%c zR;=6UytpUQxfa_PQ*27wYPhpuvGBONZue#)$hiNTQdF?v&9z&uS-8K5R>y{Sb3U zon68?w}EHPK)u=`f&ey;p6?|!26PJbqvrTg zQv;86)EqxLJ&OkM< z`&PP)#pNq9>MC=A*V^S9 zlZJj2E~GL0;y>0CaUNd>R2^d|MnV=A;<*yp$(j4`Lw;SxyM^Dkh8-AhopvmXwRm}y zfvyeijOZj)X;%_m;9-8zR^M@en;+F>BZp%QhQaE|BIJa-Jec7 zR9{IS`+fI;a zMqY!3tmO4*!7-w*%vFF-`_obk$3&~sPIu#mOe~35<)*-AA8t|Ie;jaaD7++~aRj^gH{-=M}3K;}nORMal!f zl%C#?{uTenzpwaL&f@tz(Ldk^k+xWT#inRJ*0f~SWr1cG6DJ8c{EzwYD;mWN#-#s> z1{mWb3)I)4i?Ss2mE|=HLo#x(1bVSZSpjT0&7b5uTZ_*o5od7lMdL?6)~ni?oiZ1S zwDbZm1$GK}*`xr42QR(2csdwQ0F?DhFUL4=OK;Oq*Ns6~>`5<@=!Zc(4LlRrbbBW* z$-W)pt2?kk^5_F}=Xzz-YclVm_Kk`LP8~&t3*U>xatB*QCVUoRX24H%Uk$j=Rm7Yw zB%RbZkS3;)zTlx&+1~jKiXRYLC!@9K-1CJpP&;zrx?dU36Zt%9Uyo~=W4%SE4QVBr zBg5_rpvHE+*EYD78xS!eX${%KpSld_Bi9bs7f#v@_u%+(8F7QgvCcrO%VnMIn%4%6 zTk5;!pX~U_(G-oFXRhywZLYy{#meCB?Wf`C`eOmM*|onS_k6Ti=+YPM_oS(NVjKO} zZ~+b8_mm|MwFv4mH;UZ~7uM^!?xVO7?&iik(z@4FsIIQLuUpRPsNQ;$x?N!K{Hc0T zHV5v9zUQ+Aoa@lNdi*fpq-2%s$!w_Gmcd%U2Yi7bE2)wgL1)#dK0a7z8=}vmqM~rB zK8&!w7fIbFCRw`j^AxJ9b5MS?cs^Ue9gvaZ8sRoGzGBxk?gSAn_J1!G_0{rT&t|gR z3w3Oa;Q`6BucDsweV6(=GGF8~oq_gRnjQO*>iKBV85(mgT$I`O1k^pmcxt%UY1peo z)*`6O+!#D~+Sm6E+wY>4FLKStWp0ap~{z?yqowU9$N|v!z5#6wJ{qLl~-yCn%In&CD z7pno?8P2iZ!mQF3ugFPF8q0PPycdhfzI(7(=FW!G#?WIiceznxyXNk4yvBCTYsquj z?V6`E?jGJrJ(&1zCOI=mIE)}i`-g~VkD(SZ&7pkkG)IByZecCHrrMg zX4mu4(l{%oKds5fjXPbo!$%6 zxiAX-ND+U)l2sW$2eZ|Ei#E-+KaE3cU(fQrrAyy)Y<$P&gQZ1C>CDn=-UQ+Ede@Z_!i$MM zj$hp?4|;F2nvb*g+FN)(GQ65wX(lh5&e@}>lSnhkqL~Dl+}gXAzU3SDm(wf8>dBbd zpB30^p+5f2``^7@A+C07?2@0?36xX9k{v#jbhe10M0AtUZ3F7kSSDg|IhS4|aAmdG z8;i!mV#iq2mQL@Bo2!~7>wV-&l^wYnyl}q#$|tt_XSL+yo10ve7U??r zu>4ZCw=mxA=A*JR8dG|reh@lWwF`q!v3gL8NOVf0>!8|&-2qh(3eb&|5L4efMk)FO zp{_?Y)SR65JFd_7i#XP}w?j0RcX55jhU&gW9@{?{KP3Zx-)7U`=9%V`oi_V6C+BY4 zewk(a#mRO0Y0dQ_rYd;L{}A|ebAWbWbE)JS)Bq;6>1a*fA>-#n8X7MM&I;wG&Jmn% zY|hNN5^M}YcW%r=w;|XhtMRU77COrdWpz=oOqY220ZtMo%b^CVOM+z*=Fs+@+qap2 zu(Z9E(s?ZLNv5Uz>8!u8;G!zUarF2Zn%(RV=_%>l?furJr&ew2(zR9Fx^#WjwkBPq zU&L072Z)E7dOK>;;b#4rt17PNkpKDs`$6(`1MI7EHEBQs28ef5f|rw;cvw@TS1~W; zdFR5@P+r$K4y>3`yah@6M`POUe&Rhg7~8Uqfg|~sq!9u)fe9!Xg^0q zr?$?)GevSpKb_r*LF=e-U}Gx=H;H5oOt)gtx@sJ_pcRAGSL498Rt#EajRRM;21Aiy56FDbqW=X_tW)a(ZxENabtVsT%wb*C@zAo)s!D0${TQt=Cp1bXU z0n$#ncO=>!#8bcrB9&W~U1NZ>Q!X3K&ADQJIL1Q%rK-y%bHK`2iet)#n%c>#F4c*4 z(1~-9yn5o4pF#4k4>$o2lCK|NUzHEogA5QW%5w*JugVW;*8k3`FIUdl9ff6{3#;41 zM3?~X5&82X$B&yj_7q5|?+5WDfJG=ZRGv+v=>x%Z3P`4l`c2V4BI55)^89C(0}33c zKa6$qDt)!V3Y~o1u|GRL9sTV1Fa6BSeS{CI*rOs{&jZ$mba_?|R4Z4G%Vg>{4DQZD zogFGadldY7x1M(%79j3=F88Z>m+Ed`6egX(e2tzzREa+4xRdi!ORwz4z{^0nX3x7Q z9P2Hv`yX{C6@^;>!k3J%{0TfP|E@@DDsWq1r-7X!TYZoJ8K1J__%Txhxb$j2I&gYZ zFr5G}b#Go^nX8?oTC+$mokd@SAODH3gder;l;AciwfN>yM~7fBHq(Bkv`Du(+@qIh zF(`b=$DGZ;W)+P}$tk3LQFZF9?ri7wKxBnQ<#|uXBE`1*4xRT!L;=#x;)^J->4gz7 z4q)Q?gxb%L=r_y)*c8~JrN>BgoLK-T_FHV0=r5ZEV6~(;sfB+F$(C8xGjc!%*dt2N zqiqsF5~e`iwybHe`KKa<1%#aD7qBk=K29>SxO=I2=D?YTzdwHOFt58u+lI=6FqL z)C@2!^3FLv-_!t&^J*VGmH#V|G6lRG*kU+R|9>#`r}9usR0?J-3en+VEJc7iWc~4V5foABEKGRywTJEF1}?akrMv@v-dS{R#n%%=iW2tGQf!742Ved z&M+b|dS^hi#0(=EVhNy`fdK}!f;jRe5(0xFk03!}h@sXGk`hCOSV{vend1na{9lD*!HH}t<#r_3>u|`0@N@CD6Ud)czWs=M8jf;_lu$00T+hHkF5w@< z+fE>VmfQ*V;ro4XluMkg{zSc#rxOlR31qRN{5M-^9J0<7)^>tp#g_>xvrb8{rq1qz z;7TLNtCD7rM!`{QBC~}*(Td134i3o(WT~VzSuYXRc7kI~eNTY}j9I57Sj)8bS*Ipg z&4fy6`gf_x(<|U$kcPmqfJA1SE+BbEz#$odER_mK)(;A6JHfGL6fkC;l3>j!V9Yu- z!CF?pb4;FI0gqrA_$nL=NTe+I6YY-HAzvTSyp7Ng&Mzdx{WY3EDSosuFnTlpm`@Ej z_?$;%VyHyW?BkCg@)77D9MvOIjkJ2?ISdC81ksdNjBvD;Z0j$XSg-h2G0L}p@VirC z_|LU;jFns6Bds5iN?`d@=;i8732LSCZHaVZWbAf?8J7?4?zTMM;2H+Yo zREQf6JbPqq`KOe2y(}@MIBFPl`xCl%d)={EHBvThv~=|R7p$K{LUx4XfXA~cuEzT@ zo+%wDt}S{)v_I*4Iw!obl&avS?}TnrNQPpr*yr{6Ft~g7tu`hR@R&Srip8cR`c1!* z-{)7qS2>Wq!`CGaRANet^OhtKw#NypL{Fzb{;=2XJ#P)B?Vo;d1su-&T!nbrS7K!@!O+#g&@54o)02ud!D^RVk6C#7o=9$49j?c`P9y_YvJ*+N64W_!D$L18+F+ysU9`KCk+{ue~Skgn0C1zwmx)$hFf% zd-SftdO|#wawV)PUcL0-g$4F{Jtm7g!NM6W>(5(#`O}<7_Pkh4jI%;2aQiIQ=-D|_ zP*R8+GmnFe!forh{FyA3k|yZ3m_)B7d0wBR5>EzuYPITi+^|~Ri3qa<&nptc%lR)r;dR~AP?n#bUI zJ>z6i)4FEQhY6|^lT4d>xk3gFqEv%(bH)nh;P~mKQl_Y3=U-`d>k&j z5&DU&e=uX_ZUBM6C4r}RH5nn;C)i51kG={&BX6c)-;A8Z;!!BN|mnKqx&Vwq+4F1C%Qs4B{-aRRz^w>H&}yS^msDq zHa^BgUe1!)$0aV>OB72|pEnNTnXAi2`)$@^vC&!RWs>l^25}DOF>u%@m<^b#-VK2L;+;nLzETMX zl}dPCspp_XlciMC2z$gk;}O8q>U|Z!V*6TUmo-hD4Ta~5?rj7u@N^dV$3mU{BH*xk zSG8Wxy-yWtonu zH?4Ge_-W*c~54x*I0oAf?gz0b?%?S&|+eTQgRKi_K zB|NB9)&k3d#>aB(S87tj-B3xZvXgpj7M{*HrQ427b|4D5-z4QUNfAsB4GFv8NG3ik zxqLs7_PDRUcv{S;P-yK5U8JezmQR`)(^PI2+dh zha+|b9EW7$IqDZ2t^WSR3k{vf;TQaF3TK%qrwI-fPasR#kUR=RrUy?eV7z)K0F>R$ z+jss6IvyOABHp9^{=~iNA58p?p%bY9_}!|BN>R?2;gBJLEM-bPf`~_z=OExE^$rGW zgRncLC@=_iBYuza5H#g9rc`#J<#SJN($^2_Oc-^ z2w2ss&U6}ehoqj)j8vWJ8#B@Yzg?s+sxQ(ZYHCsA0sQZ@pJ<1+$-p=Dd0|ld$1tiMUd1Y zLZ{sccv!uR@&95it}LLSqu?;xGwa#vrCAoM*H5Q@W`3axW>#99Y0tp>EF8b+$*w@Z zmT6jCCRhIjh}r`=UQ0|hweD}A{lKwT5Lc>yC~+$swk=)==-Fl>h-^|4QLZ)R-35nA zAZ!-zbOIAfyASjdHp34<5LzyQGLa}Pk@D_@!=ojEGUeEeo_pc=_!%d6dk3)?3b+Ff z+jE3X;+?_F&ygHw+y}T{y|Ey-Z5|7%DzwIV7o?G zr;&A$dVP)P9}ey@ZV5 z1_$F19v5#1;Ym1uY+(2)iEbl2E8Y&m0XUzN;e!(0MtDxV9fTK@O87CHpNQc@8cldn zyd8wYa6Tu)FKaY`<@KY}<=lbzM}@teK;_WY2^54nCs2s@xQ50lPfxo*rY-WphqpWl ze8%{Rl)z_6qT2k!ZazA)1)Ua-bwYei{f)%u9*}{0UqH_baA0aAw)~-q@Jm2Rxvf;L zjX<7b6;_kRiQ1WHgruKFcoz9cdUJK1;RA5A2!Lw%(G34sqX{ne3K!pF#bXVoP=igP z!F0m*uLjj8@eL(CfT@0S$QF`zz@cvus8fo=swujeE=S!C!TB_XkHSF`f%>K-#VXq8 zgZ zIq=L+-QEyy+qqDYYI-{Xu|mvq6&&&+tcUB1<@V^t?x11VtKpVSAZ*om!XLunr+Zdx zp@&9IFvntJUmj&GYIzA-O*5G7E;wvLTEjyFYj1dCGp8ntMhIz9c@qG0)Jyi4wYWBG z-I~zQdT=pkb|xaTM+Fidgd>^wxRRd+s2N=qgW1Y0$9<6a1RT^R>=*A0!Xc#+UKj6F z0<&eeWsNc)`U6x@om5gAVX%0o5?FP@QJ!&d4kR?gA!mXLzI%Ku`0nvVBySWEcaJBI zfWxAQppx$%pCMRCZAK)vbtv&A$!IF!6lgsVHx+r;_JXtI;_jz{hEE5DhAp-|A`zS8 zjLMu#5w)UnG?iu3g`m-ZF>n>KtfarvuW_YlV=1UQ%tfH8VQ|Z8(YZtE1S%$Ut0DNQ zDCy?W}aI=(bqb_E^2dg1H}>q&D{sc0e5}yafUEVasB7M?csJU}u4sKwZ2$hbu6d ztkkI}AaayO>rE{c$n|+R6pL_3yd4Dc%W!KR7kp#HsoI&!v1UvavoT|K!65?zCunc! zr9;Cy5N}r=!X0oJ+Hzay(FAd|xbiDLabAN4e?I(4<_Da=)?yM-O8{?Sr@_~FTzUkb`aJnmB7Rqdn9q%cAM5; z5KzckN!d=I5I@>#5MwJi#!G@W!f%Ur>IA?-rQQKxVbITPnV@$pfWFCypDR352+QGc zAk!4{yQ<|zKmP`U<-|=e1gX?6?rHt5KfwMK9P5S1whR9V%|`zv&vrQIO(08Zla3tQ zgrl9H92vWAzSM`n_=cqEAiN2OXSU)Nda5Lgjv7FNdI`hfz*5>m&xLRiZmcg08t5GZ zhw3J@z*Pm^YjRuYo2U_l$#5n~8@#HeH`Z)L&PsH*zU{HhPDD{*UhO2Rf-?#bGa3$K z5S7rxZq48?0)ikG(JUe!gBT2BF90Y8UP85arxIF~YBdJ~weC==wIuS8o>?xRcEqyR znp0loW)7o7z_eIj*A{|cGty`w+_Uy@kVe3nK7Mh;~_HH!!KU_FQ%;JguG?bk4j!O`Bt z`_-SYH+eR|AsK-ziJ@-2Bf7dhg0BCnj4SvQ1hBNTyc)^#b2x}4kR>5DF8LdX4kWsb zP$k}JgleS{YLrSCtW<(Zb$a1WlFQ1iav$D-qgy!IfY=`_={856@4`V@0$DPZeGHLL zDBn|nABcAv;W?$g0645(LO&7Y>9-d|mG1PTAzlLcC>%EfYmi2DT;goRayG-U48#rU zAM6<5A)8ZOT{~baG6pGZAvAqRVqQX zaD!M7Tu zX+e&E6^?d-a=1LKzK0R@ig2|Z0lcPO!kgmlAZS{*Uf}G#4UYN|kElPt(AIOs

k>3%%Ho|wsJLNIJQ%Zdra7ev`SHv4vY4C`P_e#GLM9tDQ zGLB#mz_D0Fc5e8K)>PTZRL{VnpoEviJB{!PoImL>d{m;_2(O8E8lg9GLVCiN#5;|! zNvVYU;CxXGZ`No6HT5>ud_}3=qmolQLDid)P|wV5R8MoCLAYOJwi8smvy(4=I}$wv zCyOR}4#AyHW`|luFpCRKhN$5*}14VYgBVS}yO1Z5xcCMAyW1;G7Qb z*>K!}A>Iy$>(&nel;16a7XJ}OH#oLWVrjeh6Wz|P!>rwyW+xmBMtDZNGYBszmCzr8 zuy`b#BHlK_AUMCxF+5nK2}8s?gD_O71nT5H3yT_NX&3~tGVQT4(_>}YV`Zkt%Cs}% zGemAXL9=jHWEOF{Y2-LZn7z)PoTAh=cc9>Ejt(Y&Ma%pl{A&W1G{Rz~5|}t+Y>d;k z$7yH8Y1`wpnFHT+h}I0-R>HeMGrS+LUA=^_i+Ac#!0SqV1MsGLZD~;ru7{wHAabcN zbP_g-w}U|0+~Ov_tmIb!6pjIx@+q7gaVB14)9hNoa)qSmB(zD2oBFdPDyWl!RKrB0 zWb&Pe+6@PL6ZVOB$^pPZ^&SGK7;pN$5Jas6*Jl|lXr%^3K1!gnlOvfZOwJ-4vLq}L z?{vaar4nv}^Lq%x6q#BOB}V~DK1Gzf8GTSpGdJ18fc-slgL`q>^nu#-=5@*`ZyjeD%)8=3cSdI8bI8G_V z5*!TJ2B1)Q36w+*o7y5xpeZ`Wz&jZZDF~Wa%B|*gE5ab?gLoynahKbuNEVqTR&nq*5#j4EA zJpI2r!ObiRIK^2JG;FciF?-|tH$DOOyf=HpA5aKkpz}0j$|HlBo8+~ z$KCWUux^x;?Su!#JDqS)yfX-t*9SjWJ@PCbndi2|65Y}%mbezoXCON{n4yPuLu(>j zVd?bHN}#h=X@bN-P7vG#F=`n%-&hN6#;S6sEHc{&yW#wH!0q?84 zzpBT>u>%u%G?>nvnvicY95f)b!TH5yc!ow3D5XrnSVViw-X60%o#I*!L?>p*C5Fuy zV-W>(8ZvP{98@DL5%2VFfU4ozBX9n^3dgb%sSx~S>qYXt1_yzJH{krTGF&5>v=JyJ zSyo4M?KTJ+L2MOHr;d*JRD`*(fHpTgXfPAiuh|W@v(a$6;HW=wzWS?(s|=mE(a?!( zd*ru&%rutMyoGYeQ}O7$h{y(EXd_HkFJTH?jeNgYC)J@_Na;`p!t^o*QaY7^Kt+-g zteO@};20wbrV=iKlXsTrnV@vaq@Y9ztaMbN6}9FoSX#o-8pKnO2L2jio%#bJ3rxCA z=Obl20tc~#r{MgS!SJgZO`tSCn&ClkNKIfyezc!a5HPE1VQwclS!Q&%ntB5X&-Ylc z+u_)nh|I$?j5fL1i0Cp*#GBxt6JaGB&hGQB%^kwGu3vQpJhtr9evYtjomdgv#Q+hRJ-MfxH87Fav>B@q`4pA@L|kdzFL01X;=^ zS=$q=rkU7s>D~b4J|%Le5cb32r0~`)^e_|br`QBJxu`*ro+6J6&(#F7<15nscMI?$ z3W!e%Pdh<*J{9u>0khSdT))f(yFsLCS!Il4y_U}R2dZIZP;!J4iSvtJWSo??Un6<*7pzA#9a<&f4miEU1J7L=$Zw(NOBx8b z&_nrPt8(K78k(sbD+O6o7?VbL%o}r-lfvM*vqa7&6FcFoE%Z{XSKnypXpU<@q=SZp zwQ!;#J)z-CLF4RRM8vL;ZI%304b%+R>4r>dc2BN`XK> zANo0t+duf-HyJFA=p|D<^aq`MmbAZzByTS|nVHuvM7z{4g?Q0<-JAB3`x{l>nA;nV zIAP7%K{0+ysRC!{?Xgm>|D{1ciBIw@f!6fYJogg!66xeER|{@W^GTf zrhlaaBC6q-D{->=1u4RB6P~ex0CD}`pb4QQ-VQ=5Ts~M;MWi%eL58n@Ln;C@@S_tM z*Z_D&OOh#s3*q<@Kd}Xlzj(P6kAxCnmh4d=RF4>%PyoL;!uLC<0CV*Q_`Iz)kSD^i zdWd9&o>pa&t=a`reTc-G2PBQ|DM zw4Y6dok*`TG0s2dQh0PnL$~+tC0VjhbWfOma*ybe+jc_(#A~B0&UmcxMj)FvlRKG0 zbRy7ds@+87aV6-!a3=>MDoJ_ARCO76#gB9K)O}YB^{dYPJ=h_%1$l-}wSLzc5_G@a zWppS{oL`x))%Zl0!Mjq!RMgdSqRD$YCg?G{#{m(Qq_{%)`ny8K$$IRyE`$HpUBOvF zD$Y$QJ&o#_26t8C*Mj5p>&tQaM91kT&uHz5!57_Rf80Bq&udG*G?%YWbou(qI8LAF zIQ`@q8or;qR)lL@zoIU7JmY;2D;w8>P{pn{SmOKgttEiJe*5(Iv`Kh9)v^Y%9-?DW z$zuRV_gb^(b-%pK5C~ODs7& z9TRjE&ir{CpgD4a+pGGwJ4gHmsp@Ru6+bqRZ?`PY6F1a5&~cn1Ff-nW7!z0WTN>cC zvRu-v4&(KVtZ1u%N^J=4C2d4nL&;OB|6Srj>(TEIentz407aBPM3S!FTMWqYiUkSC7b&Rjye_A z3G8Q1G#*r*vEl<671F!9E>=BWjUw#<7wfeK5o2~qUA*&njDFwo8oy=rIQ_2YIDMj5 zr*U#uN=stVV@^_CZ6_MJ$CaSR>>dXjzs(@Q?V0NTb5+%nZurZZT{1h9HCv?y+1LDT zb@NYyVeU>@C1xuuMy~=AZPgdsY1u0=+xXwuw&NP7SHif(`VBdY^X<0WESc{{?yo$G zOEGX9BZ(WoE&igbJ`{vJZ^EH163F5|6eT#?V-9zfO0PG>Ql^k+gGiY{pg=qLwR*pe z$aHb4sj+15m8(EFCNoL=tZK%6Ye zV@}pxZZwEv;AC>3r$xC4bcsnL$XT-AGa-fIFSXqCTn6WL>6~yVF;*Z)f)bsoZ(z~$ zCLFs8u@S8p{?x%7xlZ{rX(og-q~CN9$e%UDv#|ZhDygQP185a*YrcO#@G=5M~VL528eq|r4t^8C1GZ zLtK_$Z|?7Gz5II1^6Sj~cpe&Q>mHhT57F<9R`cJftg*%4ZrvSs)y7%&kmT(}+iX&` z+27KA^m58r#QL1Hk{kKnzBeg44tYlkxjrXX4{=wC zel-MN2XAKgyfKGYwL)}LWMY}^aV6;fl<2jVn4IAD6nHBWY@$ixDn zuTP8>c7^sh--?EQ?o`RiO_{;voS?_-o*am%B;_4jt^5Y5>TKcFRBRyMZdsgftxkWv zYdtqexi*gSx&|afSJXsv^0*T8Y;(O6&8!Diotp1X-Ie8@nh;YD?6Eo3mzV>*-BTyl zn=rF^vz~K7uy^L{i<2Te`Sy$3h4#t5-{0zY z%6Z*C?)>lfO=lnH`Slu#BeRBk=u5cW zVQ#duiI2zBhTbb{EQ~`etyd`9!x! z_KB`zy|)ea8`WQFO0SNxA86c8%x`>cxc>3}kQCRY^?5^ykesm+LyyOmpvPm6$MGu} zlH6C8QbU!a+X5=SwdS5NOtI&9`<2ccXXjbsy=~FtnB^+|{azB+rS<*B)M=_WRGhe3 zu;cF&Jho$U@hW)_wVD*;)rr@+vT83* z=P?S=RY77-^0*Ro-{h_yekF6&`@N9W<<)prHG9$7HSTKLYtPwrn#FnIy)f3|S3Fc! z>Rg`h80dd^v77@R%JVtm`_8Z|Qhh+1@+9@qSCOhY>L=+RBd6s~P;7jivX{g|eb; zQleM0_>{006IT>?+{}bu8;n1y=+P<3wE-k>?~EjVs@9`>If31k#`7jQy!PpRNmzMO z)1iBh1oWbn0>7hMnvXrU1#htNc*VRy&))=OR@tp2tL{C+dIrhnbp0hO+ApE{e{GG3 zc`P(o+@hG;HIgt`vD)43^XQ&8U2w0;yx&sFrrNZrX5}VtpKf_ACM3Gzdembz z7+)~_$CV*7_QYqm(roInRI%luaM!}T0is80EWr8_EzdJeJT=7a!{fEdkHw<%L!gld?5dK)H1PVjjB|NHB0>x&jqN3|?`$8{Z=nhaz9bWK4)GA;ja4T>E@Gx*b z2AH-%_~<{v8-eEn_W`+%%u!0I#cIui67TEr`x2=4}7 z0SxL<4$vDL@I`YJbbKQa-%+LZ}nqj%j#l7`T4AwnIkU z1=ltM?-(+GKek)@cL<(*unub!D22ZR;2Uk^vph93iOXdR z*lG9)>)`Ui(ldO0Iw9wAq#JJvu*vY-eoCyq4qpZa?glOb|Iq9CF?@_~z#?#hL3o1~ z_z(WrF8F8dTa=LgGg;`L{*cvUKGFxQ82qg_IPTOuQo=e70>U=mE z$bQrXWd5swtXKY76n+z4k9b=?wgdiIw0hWdwp=!xMjQWbA$2`_cgpM%(7AXYQKI2Td&EN!s8x7ii zXVJC?+YW5Hp+>%K4_1!lqn`Y;a_H}X%Lm2VZMkPJ)A{EvgZm5~0geK1L$}5=?JDFq z1>rjwz@Hsw>0gJqeDK%zTDi}GZw%;l%XR*n0AxS70?2W>6KLB7akdH12Nn@t4XlO1IDjFcq?%5|4_LTfL#dh z0^0Ev!Jtd(;VTc?dLWJc@Hz19V*r1&KmS-i{Il(*fV7)eVb~(#_Xn;(+)D<>td85e z9WN}hUb+xJ0fb#^klsY>r*Ql|t`OMuhn-hnH*{N%wqC8=G+I3^y%Xtot;ISC`gW~T zy}LfE^JvZOSXUVNyMUJ>Og-lV_W?(I4!@NJjmo5bQ8WU>)Uy zzdGRC`5Dq7cLN#lcZPzS2dD@C?7Y}tgYxflc$Ucr|M1UN-T}y=UgOs5bHr{S`)<|e z6*~>?0|9W7bJ2d@h;9Uqm4rF`g-*XCXezxf? zQqF7Ow_%G`z71QfL}$C>pXIY?>3dAQ*zsqbvImvu>_7ao=bz={I^az&eu=~;tp`e{_(g8+w?=td(?wLABS}0-*gYYfTPKRWAT#(lf3-hrx5Hi z;g?K!l{LJf+xE1^#BVZa%l)JYzi9BNLHqnR*~lAV<_-71GHu#1?+YYQ9Z!+{TMz6rS#rz z!Zu%vwBz`Dbv`=;Z3;o7LH4iijq!M5`>(YR!#A1u6&|1MH|H2R1h&w13&k;SYWFK^%XZ zi}M423#=Nr9#{wD&z=!?1IhO&koCl0%wzo?0tMx;A|l4pFikH zefI!|0}mPu{y@XSfeS&u3;2ED?E7{95?)!y?Lhc4`1wPqv=@Jf^g_GnP?Rp@8vvxMH8#oF!-TueeH-? z%z2T2w%vDX5d8XQahwTv8Qf^_4udNV?lNe{^Z6$Hpg}8-?T3F23NAleKFgOzYfttA z{@HlDz8@#lcpYlv*BE*_-F`zKVbJok-Sh8hg`jBgE`yfuu<`UW^f4*4^!wq8bS&^?boW5VMM z?ns3hWZTaNUuX%k*u|Bj9CMEnCb5~%5GXW95S5O3>&Y#LuR*T!Rzm3hI6 z(D+9`Y2({^5WaIk}(0z|&eA5;iKN#_LJS2~% z|JrsN--7u5HnEEz`JjzwRHN-MF8(j}`ti11l2_$l{ns{rGUPWi!u)Cc8W+C`@q5eU zFW+y|kEu(x+m{DpJU-ggfAF^5{oEKMHqEica1UhPKk9&|h#rrU2E&xYxEHcZE}VLCJhaXcHQD4+`7qCh>3B9w$FpHNo(!*o0wrsLT#9nXg8wi(B>VLF}-)A4MWj%UMk zJR7Ft*)Sc?hUs`VOvkffI-U*F@oboGO^Z674b$=L*R}(zCus+admU)$X=EJFg6Vj+ zn~v`(%rra;rsJ8f)q{SX{nG63Eh)x8Jzna>$3{SuWj$a6HfDSuWija6HfDSuP#V za_M-MOUJWZI-cdy@yyohOFz$U>3C*q?Mgq-Y;Bl+p54;%%+}KB=h>_cTe+n1jMmcW z=h>_cTO^HVwRAkIrQ;c_jqeG`%d=WKp3SEDN#j{99nWg%cs85nBaLUHX}S&Da@p{^ zh1B7(3_a5M^E{Sku9fs)9M59ucos{?vsk(b#?1#-N^j{lU-I(I)Y6X^U3#SD8LLf4 zKhIj}c-BhCvrikJMk^;xKhZGr;Mr(T>C*Wz4bM<*I{I(&!j{hSRGy{M@hp{&XQwva zB56FUwBcVBrpuMiSI$qN7tc@U!14T)XQy;LBTe($FynaUXv6PStW3Akg$FpFYj((mA)2%m-XTo$m6Q<+YujNl83Akg z$1`C%o(a<(HI8S!X*rd`5xW^X%7#)5tiU3DfaRn2u+{ zbUYKL<5{pxM?cSm>3Akg$1`ENgK*aFmY?UqJma=l#X$` z))=?8GGC?iZ z;Vj+C;dwC6a&5RLwCS0KXTNkj`=zV;ygHu!((&wGB&wOn@^z)3@hSSJ6p7~lj{XFBf;WRRiXTFwBKhJn=IE{>JJw|+*--dbq z%d=lPo*`QLdlhYeey{5HtI~^g#j{>Ip6OP~mvKDPtrX8Vp7qkL%;2kJ@Av7t&-G5( zp;G<4RXWehd4~N~(^pFOPL=n)Du*_E)UzAU{dtDplRe18vwO>TyyasWp7qo5Oy8zY zBjb3+Z|U^&te=i&{FY8X&-86Ljf~@&zSWQZBgVDCy>vwS+9<o{oR3VcR}_i9h-&n`iZO{ori;>`6fo2E1XA&;7jLNqCuD zUMEMkxv5L93&t;9aMSfmmoQJ4MJiWRdaTrzo< z@{-9hXtMFw-?ZSm>zk%_;D3|AiE3KDY-!V?1#_C_U3Xp6wM%b2Z}BG=Uw_{9*Unkc zH1hn?sM5%$1twF&6=}(8K@|9g1T(Uf(&Z+f*Uia zT{m8vL0!HK>L~rX8<#CuHVdUfFwXu$C;$TPI4tY#TCkYB_~}2Vg^jYR&cAlitgh?l zf}GHmod?bh0n&N^_H%VLOtS zJ1e=8vsO@~v=C5Zy`^gB^BVG8nxt0{T()4*^|K~iySQu7g2nSdLR2i#D3EQXbVg)e za`RHhJonn}xojhl*fMANf<@iuEm+(tou(=u<$@^B1M%?p`{xR|C@j=RHG)mGbI-@?yO^$9vL_SuRqQUHi09 z?Lx6CR|xm^%b`$1!hiWR8KNPDTopW2JN$CKgs4G<@IP12Wn5GjjV$DfQB$#nJcV#W zj%f#lM>H+sKUBz-5SI(@%;)mGtunkP5dM7~&6O|I*VRUi@HH2sK_!Nd85#!8reZWu zIg_E|my+a6N?{1Pm>e23zq&ZTIL_y6sEt?!wZ&pIqEL+Twb2I<9M}@omZISWq&@+{ zS)~X~qg3cNsYIC*l~Y?pzP=(>s;>)aCFFDhv^r^eCr^xWP5J(|LV4jM+&2)_SzA?w z#`EnPrSY&Ie5_;|$6ue4L)@V7L5VALqFLk%;SUV;{>4mD=tLVN`JV0qlCXZh+0MwRI6!4RwJX6;msGCg~X0oK)5ga z=oQwRYt4sN2=B6lpFLHCu=C{$W2Kkp3r*qVk%4qE;*Ks}g5x`i0uud`Ji}@LbHnt`MGF zj6O&oxrc;LEpd`Al{Pa<2Aw@8=Y$L6j1XF&L6bD3d%BTeU@eWnF$MyE(l=KdRTl8#W2v5qfw}=2V<|Z^|N*yl4?1xI6 zzy?WotuBm{b{ZBgv6EzNq1e(AokdZF@Dj?%dsYZh+ng;i18NKB49+p23S$C0XcfZD zt*S7}`2fkGH0vG!{BFL!j!Pa-eUTHyUgY zYKBxctq&1%Q3D_ck&~{RG-(psX}-ov;GMqk9*&<)^AOjw2uWVB$@eq)1}3jp!ERvY z<-qVO#)|bY28Z}OS_9E2r|`J0Rc<<1vAF{x?h z%$X<<)NYYtV^xQmjQWM2D#j}jc3i0jjIdWEixj2sVfv-PAN`a$?Hh6k?|m zjKs0EdA~7yU@!|Cw~9vO*@P9ut_PGcxC<8=STIK3ktqx>Q8*@{Epk!9&|`gdz8kJI%sS@JYI5^XjkTq` zYuLQI8tyzz2Z7skHDX(8Uu~&60NW;QBhie}Nmmq0QFSBqK3iI?jM5_~T`2)h0Qn1~ zbLYmQ<(v}_`n)L{e!~poHMlI(dKb=)ZBG~^Uh#7}& zF>^APk%iOZe1^vP@Fs5f52kc?^C<@Ua>U`tn@1nA$R5M~@L`DVI|E+rzqYV7z9sr` zDr$~~f%UglseEDBKq+#c4jn0dP zHAm;12a}I%lGR@>9KZ!$xD<={Ler$Eo#`ePW=?7{>)OdWj2W5nGZ^nehhH0_?QMCF zHPR}EvSvK726-`b>Z{}HV0h0(`^g+%`Lrl)3$?12=yMUurp;bzt|6|^GOw*fR`v;0 z;<-9i+4?T8-SWCDr^uP=Y1-Vy1QcW{;2i?h%a9qqZwo2=|(Qzq7VPslxD0x zTJ=2>wQ#<)P*i3u_X%vJf7p8Q98qW*J9e_vX`gU8Cr3UL5hKoz_=)wE>;m_@U zK@{Fw=)@G5=MWk;ahM7_ik1`(J8s`Z3Yi%p#W8%jLR~!3@&$qL$T*#ld?D6}9~I=fFl7ErHz?ew zlJR_w2dcq*HiPF&^KzWJRH^VKEJ@1snkU&lFHh{r>F)3VE_rKNQQy9`w0!3A74heD zy&|qVEu)B=vy1rSo{G56E8@>>5pPcv@n@MuoGC?oI$cDRYtMk<^5d+!pZMk4m{qO~ z+2wk*r*a)t$x?M+IL%buYjgdoyW_OVRrj5Yay>qvc)U&WAN_J|%PQ9!3t6LOO>!-s zCyv=94|(PKiY?cRiE`a{jB-7gC|ACZeU{*BKH-aJV8W~)Yi3J4Hy4t7ID7{v{0tg! zI99f4!om%?T<64MZ7w(Q`2HRE+2vQ=eDl1k7Tmsk!Mu437P>uLPKJEgRBXE3M2s~A z8&PkcV=Y6|TV-%r^eCZB2b*_UL?z|oEX-DQPZFB0Fy(LUsdzo=P{v^Mj!kN8-(#K_ zx30+7+7`nX!NND>@i(eP?d1#ey~a>yR z2c;B+iJWi#sG5V;pzzE80}OSf;lcT(s$AS>`RZNxEKfzUjrO;4^pJ6`@l8Cx@!;cs zS2Ef+%ZxV37_F(Y(X3tTW#1>mXp<{cM8yQw%JnWGw+7y}mA|~gTC@K+_-lD1W9 zR?GaOZl(RLM|;T7{+I=|quR5}a(UjckZo1IFdY5`wzyMvI4qXSu)`N4wF6Xu$b=nU zwsyEbpKXU9eOm4C2N`xaRM8G@lvg`^LG2);HY!8x@Es1zQocg?-Q`OAiAURLXy0?T zK^Jj+k2^o+Qc6j7g(;j}1%eKQeFpcuG`hRQMM0?nM zYsL1U<=-dsjMn*IVrpSK_^Osw+Q##yte^4Aif8h8CgV%t;i2+6|8AwS?loooNqJfC zwPpQjg|gmm%KBPHS-;RzS@kM_mi0bU)+fBO{<$gZcE7AYM7_F|HeY-Xx1E9oQn1H5EV8F@&{ElZ21q{5b-mSgEjY>-th3&d%Vs7C-6^=b$6Q~EGt zsN3W!NFGNIdKmmWIs~yDxh?!3E!773gqy#RLHOsG!PrdiS6(zzQvb>DKJIwYdBIs= zgO**P!deb?&*NSQX=~70kdy2?{4!A5jF>bcSJew#zrbQjE{$-<0GG(zKULMync)*S zj6ip*s+)=1CB4k;l5fdTS*}nLmj41vRbAa!k72Ezr4@L9h?=HSYj0Ks{zitfLN{p- zqp4HTJxY___&r1WxsF<*JU&A%d{biO&m(0>_?e~H4XNWP;zZ0!;RC3jaG>t^7RGba zilwLRo@dn+?U~%;YC=}n z7X0U%OCpg=U2G%#5)%0YTA;-`apX8s1ovjJ1wlRc#Bpd1&Pl-s2{%vF^*>qWg3uHP zTM*Rt96>{LwERRn@IfoEBFV8W-LWg^T3KI3M2FBG!%%jd9+{o*UwH z(x7%_OTejVVQ!QgREqbw`I(FG+e7WHSrpxjeJqv*$D=d_w+zF@MQlj*29eh>WbcgS zt&gGx!yIA1P*TB@$=Ta-qGoO=c^j1cyhiwWvuiij9t^f|Gp#U(ml>L(s+9|Pkzj!C zcA6cupWVQwA?DOQSGi6QuERFWM_?81pz(Ytlw)b^pg~=EdU@=VY%uO(0&45q{jqyR z@%{$g%dvQWgYF)Pr_m|?l9c!;q|q94XjQP=JmeT&RlKTP^H*ZgzUFuJr1`^Tn*Yx% z&0mPc`RkxO@ z`ok<$pNhr%s_r?qs`-AlOY`e7;htLUX7f*F_r#?P&L9|3;4?=Y=p84w{C{%gj#J|h zDPyfnlg5wdb#6MHYGTfZzt|Fe1a~bt{^BB&N0F1Lo|}jbdv_+nHzq=}WU`0cvoRoG`7%TS6GrcrnNfbhv7@hwWi`mf1MIz+3kV}C zMddKehd)_eimqT*Gf<$5WvZ)YkT*VvGJ8Ra3`e!V zEMcFyVc%~4+q?S)nMmj2+C}~Ywwd$ZZFs=UCgCZ?-@I#e{H#;B-(3q7n{e66+c#m+ zcyO4`lccb4hWuNM`qT25v+|=jW#)6%9{e~|_-7&w`%iUP7VN`(+Q=n~H zDV3XqE5%ES#rU2Hzbh5KY7|2Ez{pXu!$qHP0OsfhR?jDKC5S4T#d}|zuXEB1SK`pN zV3sGW?kZgl<=s6DlJ)E#UC&jEu7wW{(KYT%^M%$4(S`7frz-LH zl+io~92tTWT9`IBHa_m;cf`W~i;Tj7Sd^b0esK=P;3oJ>A1KyEz5BlEb91}NZk^1F zvlqzY8@VBx#Njy;bFOXyy1|4sciRs zVHJ{QZH@kCX!b^z3PbsJ@=-j?CQmxtroC%7wjG)My!5$8k6ZYkkZxt3rSD=7del50 z%MIi@eLjArulA~Ebpuo$J9naQ^HKCW-Be#U4IeXnKk;Z^G_)`A&W7Q8sgI_8%%fq0 zP2~NDN4wk5zI#iYb|0RO`3}eDy({(-p6R(Oc8{jjT`>+x z7@q$Fqm1p%yz9>1s$tu!>+#Y7=}mYGLgP&@zfA_YKjt&};7Pib^tX5@=g7BTF36FF zc>p)#*iXKFYfHR4%Fh*sKjf|;Z**~cg~N&-D>k{|gg3~Tu~oEmHwmQ zMG*ZTC#OVfiy3Q1vUnuYEOZBmS(%ef)5hZ?9kqe1yY)%l%i2wf{ODr%pzd|*kU7(o z9J3pfV?m=iUvF|_v>kt}84~3<8>5X`qUbWQ6T`X;iI!ZJ}A2bbG zO&d>ac1@s7b*wwH(h09#F1&Lv&?b#bl17fJ3!T+XOPN_Zf7FHH$=o+Iy-LvY*=TTl}~d@x?TC$ z(&NPol+r9|a*gZ)3tBD+`<3FZ$`7@MznjOJ@M4U&7hKSk^%v!vakpQ#5%cItoJR2y zMtw1AEJnD7moJ2Ap*1GAv z-*4dlwCw$k^|p4uf3mQdz2E1-g1z4+kKqrLK_nK!S)Nc?`^uK_{w&GgOi2D^xnvAz zqPUjh1-vWF#dQ3Sh<+J6IAt5wzlWdF0IyMci;DJ3^_=9Lk2kFGY!QBKq0XGRwQ<{F%Pz~tkDO%yihyQI}@ap8a6(o!b}D{j9Ty(22*&mJNv<&hJYSCNnp zer6ZC7hc9G%8moxk?aK}co0G4-R%Ne5(f}&IQPO+rfi7H#+JNafV6dbD7+ATPL?`I z8VgWYbWY%s9nZM#`V3 z?+R;O>S0*#iBP50*hLo`r&4MQ$f=;7_E(A>CViYW#C*A*ATsKYMV1}-wajU(u(@!3 ztJFtbQM6#Y5^uxItHqA}V(GM*7i2y3!p-crMW%%_gebW_DZ4DIRL;jp)C={g`fAsa zA`XiS?s>J=`>-cmAPu0p@G(hy3N0}gy-Syh zH~d~uvfa#fE59A}3jg$0jKg9PEqX5qwPCh#wiAPOx_eh>mF+S<==Uy+$K`bKP_zC~ zZ3C1Y$*Bx)j#i_!aJfsh`5JFuqa3!8xMIOO?ft@K6Ui6iSQnWx9`Cgp4PtDPgR~;D z8zF-FVbY)-YWXHdZ(Q!D^nnefs4m2@+bQRrN0G2M)qq#0{7D^~9hhE)0DyyntJ!El}%|iDlyo#zd zHPkG-FK9>AC>&Y_&a7$9{09d~L^aIDT05C$tA^Pau*6eZOF}H*?MW!vS5GB*_MK=? zy?an{d9gM+4`Qhu<}qTSgtnmN_Dwt~E&BW(L{GBij~l3(9J`(iqzUkqL=<``0dLF| znwz9j2bWOWpHPGJhF+}5-US@uq1mu58XQ|6wAkLmq|x?9_vLbi$BAs=H5Axj4@X-+D6ah0FVwl%88ynuX6yGPH!F07jQm^SHK(jH&2-J!kPcE?W8 zhiXh@{p-9vsAOAra`MG9uxZZ6o_xEDc2b=r3F0X_#M?L=d{BsA=DKBBfyqW+SO`bs z9jD3ihHHcd(+jPUk5L>EiD#grQmv6!&HW<6q#pLDqts2)2C?C|nql^%46{WL>3;J#LZLGE4Yl|v8(4t$h z8OdU)Q&!$=bzEa(gPa{0XQ2gzxK1C?5)EWXZ*t+#cQ~w%k6FmSW=26RMcA^|2PU2# z;rhx6rS0vd#e-94NoT6?oKiH9mCds$U8_?%hl5jil%&0bh~AJNi8H(V@D-&n;IENo zeq-zSKY^9}8rQKtt7SRe2e;B+=;GJ3f;r2U%<7UaeDV8D^3g2!S*o&cR-q8dZ!77C zsjAAz@@1?9+52!*g3gaF$%msroy!j{&04Yu@X4k8;ugM(7069lIsN@#yu~YL#by@&ayrymf#{es)4hB>TH^CYOQCB|8)M zSprG%wG&S97dC~IB(oguyEd=09DmQPb^Y`dj_};enf$4p@JB`%Z&2a;G)dhyc_eW{%Nr^jI5TF(BNyqYg1oj>jq?!ulGw&J)f;uQ+F(S_q^^mfiD z_9B8`4*nic*v#^awQQZ&G~+#5?@f`$dC9;-oiMs)R z6)Ifo+Ntu#Et@|S72eBeJVD`LrH)zHD-hV2m4}o5`Vfq)B*==C$iC z)(&q+G|1DqY>(pT?EH8iehoR!14kViN}b$@JxT2S_ZVm2JM({fzLlZI*}Lb--+Yx3 zLqveZSCn7JV&mFkgpS1C-iu8h5141LhoZZ()AYx+A?fBH?aK!Ee5D51{} z;^T17pC^@NQap?<=(ejQ`-M(7gvKV*PmJ16fr9RT3N$fRyOu18&G$fIQj?+iSZL}4 zp?+`{S5UeROXN?osi88u&I4s+{oZF8S?7lY8CvW70BZb6&e%xETsxXB-}p;Pg;Y-7Y1xExA};?MJi_vLb@#nSmp zeIZt79*IBP$Cn2@5`Vuh{4OQ(<4dFB7yb)k^7;uKe&dE) zcKDVHzTHAzAaBlLsT1FH2rfq|ET^J8_hRwVM+88MWs(b@)=XQ+*#r{w}^67M?01KbIl$ zzl_MA;Wd988}YmhB0oD=TXZaQr4iID0QdsCUal5*` zydG%jq!D518d#cpQ#CN+a4}*yFUj=oTe@8PHmiN6&Ka%aQ=&754HZZ9{xxnpH}QOALSVBx6Ednsq*bB9GYit#sD!;Ksmn`<%f3<)2>xtJLl zFUPIxA$VO3hx3NgCZ8b15ccZ4+&E$19J5c7$UcSeUvK2~N4$_0$9>$!tzE2fpUa4Q z!=!tepDodc22F>Z$}gLAUrVG*sRxBI!eYF;ZN6T>d=RTSjJt;VcQ+{YnL(g(ZCCb| zUlrc+`vZGvf_EZ9^OoQ9?$QKVz7H02)59`+Lm8M8w7q8mlb#lSUFQVU4X+}~VPyFC zm{4+ILpS-ZYZ10>8Egl^)~oP2iQkeD|06H{zKr-o*LyE0^A~r+UqFShR^Fw2QEqCO zyNh4OE8XtFmA}awZsn}j0L~%d9oQm9U0@9$_q%De@F?zpRu?Xjc=_6biQ7IbS%R%pDU89t33lFbt}>!UH(kQh_>yV(v66_Y zEBh$Y5E;<9(&FhM_aXRE(lpUTHcd7W`iU5D+fvKW+-&_uB#`8n20c}UuN_gX$>G4x8?e2C*HKFGdv*NP?C>W>jQt3dTx{oBUhfP+ zZVs<6(G=79L3I{&EKVwUpGdYC88zA~fPOxTD{fB0{6wYN$J$9RjnHnmVk0{`);5;I z*+$ktv=uMo5Oako922i9#@`weQ+(ZRyizSu8K+)Qc~KE>E8~2Q&n4~g%QXCX@bGU< zBE3nX_QUZpTLPLv?Ca-f#upVX)$+>0A1a19eXJ-nR86Xi&~&?5nTLA=xpR ztw?Z1xeL4}JJdkt%lNeww&aidMPSsfy@U!R)pbgs>E6&|<1Cffq%7voO~Neg_|C{(Y{!py%` z@?TcGMh(X6@qcwPr?T#>9U(i7WllN#jhYjmy?WmFIcBD*O(71&oIp-s3k`FeKjnGb zIAw!;#fJ7VTjTWprl2iNo>WXhd|n(!LV(&rT8B6hKe z2T^Pk5_2HA&_-(q=CIPnXD{$i%c(Nz;I07M)fLeNU}>1kZ@qKqV!3(qmq+)tg^Qx_ zqehRyC5yz?*xliE+-PAOx)_HrSeCR5x>$C$dX-S`yl;s*>dmIhXHqnoKH)I@9sp+K ziA64#$bn7pUWM_ZPj9B8y11f(*HpoIp*$R1ho?+>_*&}4GV4W2O99H8mo|ZOU39J1bG7sx~OAWfp79Q^pEMgtN zJZR{m*o_>v>%8ADI6xt9;)ISSA3FpklS8Ur_=-0ZoC#`pl9Zd3IxNDXhtm&km+=@D z+%PNJI$~)2zOcvTIowOHeld{tTuiO`H}XZ~N)7t*@)o_2E&9}AyooHv|4|>)qS-sy$cCBGWbV6beVvI$ zus7@Uh7YD&?+59<@basqA=_E;;^?>7Rf;X>O>*2;aU8;f4~C&{-C7EpylVSs<~U@A zA*>853`6Y|h9NfSTliHYelfxuh&~tB+v`EGRLT#;S}&d^{*4Ruck{(z7lb-{c*Tc zxsGp+2VWkf$IpFy*OXt zqOY_O+zS{hUtPv9*}EZX#lNl5MHnm#AH96Cq{Zb^-hPgzpejd2;pMn~kSVg=G`gtw zSot0j1-3>Xk$*Az!jFGzTch(RyfG=f*OVw4myq3TrOBY~@ z72Ifm1;XiTLC{sL}c};*gFq6JF7DP&z*PPJ1LU_ zGn0f+a%U!mI+IC3lu4n;$|ONVSCfE(0)c2Kk`T(e1X0A*6;Z%0Dp4S{XFM6D!+wCE8+uGz`fZf z&h)GM)>x)-^KN$C$7njUFXQ8cWBe>mMSwmkza+%DaMPQqcDNCaa*#wW#}uh{S-4qO zRJ)oxve36?UnuOevNE+09SzS}BCDtN;<)_9u+1kgvTuS~QTWEiVEs1&uOwb)4e_mQ z5(jS3=|PGh*Qh6=Ln?f&S30EnQcd2qP5Ni0mgl)NG`(Er)vWGroIu9&&WSuP*+Uu| zhf3PYA}5%8pSc)%%5$181E|6Wd`UW!1#zY0V5Fz=z?c# zFwxgnTOAz9=G&06*qb~RQE5DIK0I(_WutMfN*|oOKExB;e z^G$lHFS9YQ0dqqZ3wk-@k|FE5*>dS=6YP4=<>?|BwR2k-wHr#j`&3?+yN#8Ec^P&g!!r2)H&h4TR=%PNJ#mn8Rp8=M0wKcMfdl zL5WY?7235uK9ZfN#Ev3vIs2Z8@KOSXJLI>@dw+pupofVa`q*)%us?uZPKEj z1)k18m7uimD8i{@Sy$m%q0DgD}WmGo&xT}u~qZZ_CB3uXlO5HTS~WA}7m z7vKAVz3hw5bp1@FUm~s<^>|$iNn8S;%o}r0Ua^f>?c{&kYWaev;oti@g_zM3gX#|;W!cAk+Vq2NFrq0mb1qcEq%Rir*!7HO!epoLdTYx zuEI505L1M(snNyY=W@tLqgvZh4t~xbTzH}DxY2pgQEI2Ve$fejp;^^`)<2@4gv31vxaH@7B{i@B_z$>@mtCAr}$>H>1 zFL`jwlB@Y{ar}NTmT2kX{wuS|98pTzTi%nE@u|T2l36}*S)x~H!mDmhz3um1xQx7{NJ37{;Pg4Wc zWb4}WiMo<-@cqWD7}^uIm+OU1)qx7%i`CP%CKdrc72a<3qvLC@jXBJ~0uK;gfhl30 zfF&Hl9$YfEFhD`Cxrbvuy&IfW!NsJty|&rf>KRZqV$uWStp|?1S=CHXdeI3|bUOV{ zIx*>4yF=9(bd(Ax1I`K)DGk6Oi3kE`@UjAYdM#eU%&CDBZBlja{33+|SJFiqky{fX z(}U$nWuv`J(d21^*X|hj5K@CX)JRhGL}`vHY&Gzyq>C2)(QT8L0`%|#pzb+h*dwS$ z>>;xG!L&h9TH8~A)%Zch-Y-hivn@8= z_NO@Aok{oF9jXnONV_8iS-0)xFX&Vggy0Kph|JG2fW0HwT}`lLLBFXRq|f!>#@~U` z6RS&-X%jGwcc9FqWC)hUygb`Yh}ie8q4c=HXiTv$boF4meone(Vfy4bY1f(Q@q_8p zYUwj-=~>(^PuC2lm&6O6Xl<1x=Ntc#^}^)qBq^Al-2RWXTC!BS`BiMIz-pO(z~FTy z6CIO{A~85mA2s*1Y1f`N*|}hP3|~EFFopSD z3KQ+Do@~=do)|!n7Nn*2n2-ZL%z_>0MM9Kfu?d%LA@tx}Sa8BA8OeOW&1RWw95<_1 zUv`_u#lc~qFka^Fz06t!ZrCVcxn6SOsGLi!bZ-EZnx1Gp*Z388Cv{h~OtdKfbh*nG zK466w-Cfp<)LU_Nc)kSWk(Pj6SN-XMu6(Z;O%K#4U8q>Tb{K_7AM{zR3Qo={n7&+J zE{OH%mT_Q*$WzcTilv3Fair>n^|voFFdwak2Gf)LN5{BxH{?H-nM^GVuQsvJ^%&C!pchB!=>rrygV3Bi!bAA(u}|5 zrF#T z0gWDM!19W&_>3zlT6LeTEPdt$7+Pu7`&wH&$I2B%hwY??Hn6r>4M^+U5TBS>DTF4u&80^BAp+)x5=S$fy%mhQ+*s;YZ6RUt zP8mgi4e@}%{&;j25;EhaXdKBJDlP(?DSG=+2IOJ1gA;?f*-B~Q1H;BeVTSC>E9QyDkrg%48PmCAZc@C*11?j6cv*NnV$ zWs8^-OO1tRX>v{e!C&)DHuQwRYX?X=UE`gn@dDsd=Wi$u>-v^AZ&hh`5aWRoe9Vh+ zq6u92ycT;L6*9H6y44t#4&{c^+fH;?#c;Z3a??K!qR7|g5z?;WI2xh~kva4%{7fum zAf3yeQyPW9CA!2bOI0r9v&E)dYV`Hm#0Zh z>&i4&tgDKr=|JpGOtxI6LT>diI(3E7$$HY|zFxIu3nM7e)!@ov2KoBRRaWCy+iI>` zfvjig>k*fMlCJ~qFO<(rUbfEaqUwk=glC&FMuBs@z%%qyORpEACL`%N%cK{g+vCXe zac|#mA-%>{gIEq`qU*m{RIP2$0*`r2wP3uWyL)DuezW-$Hih>vXryH^G>znb z@cE3_c8VpkbJR$%c7@$JEr)a~)16JDfnN z=_3&W%TW*OK>(0Os~gkwiXG}N>d{jM{W#@(z7`uaCnfujmK5#RnhrQ4B!f=amn!*- zue?u^sn73B6pwv3Fzzqw>m0BRA1DI*dV7Pk-u!OB`Z!NXsp~Ga0h2)d($fVzZTzs8>TTA`VOJEH= z(CVN6;sr|fyG$C9)|()hVP2!qU{YaopeqSu!C~$A)^M@@m_3pPDsD^*y(A|^l~MLd znfLk(q<42i@d3LKr7g`Ag@f8Vq#l=`r=YyMZ7j8Yncvz#cKpEdc�|3O*>4-8Fv-3v{ ziEint05I^d*If~a6sK1*M@{6-Lf5KwX_=Jar_SQ0qKXn(sEW_7eREB4!Y)h4QEuX* zlJfg=1@!gxM$hlElPjIji=c z`Dn&bu3hP9>jaOETA%M(_4S4`pMwT}z1AB{dzS}X z@?X}W4h6%7vPB#$nN8G~95muqiVDW+CB{TNOMA3P`-DZNcj7bhEyr*D*OPcIuBCrR zG0}0KF+l3=9_+P45bUX+x3CJ4N_~nRbjC?Jd+o;}NL%a1d73H_Hcm3F$?eY<`td$U zl4+YgZF^f9k@YX+oF-F<>{z9H7Ax0pxxZTIoV*j?IVT@3)#t;7dqju5n$)NAXt46k z^16c@-nYW~CM{SZivtsMIe|;%niY#@J(di$xWmw9SRs&MfKLa95pu=7Xo9bp_`EPJ zey|I&F~Htcskw!sRK`5)AXe*c|(VtX*I`wCw{!G@NDf%-_fA-Ly9=V_0Ij+Uns{TxnUwV@M zbm`Aj{h6*mB*v^H3yA-&XU{i;r5%~3CDh(JVmm*&6aIk5Tel%Ll8w1N> zO3I)V#q!3hn!`4v>=jzV!4~>#jeTS(R((Zd2I&E1l?bFH+z#`+mO}@q8MI8}E~kaY z_VYPjVbhL_rIQ@xnnbi3>S9BzKrfuJ#U8C1j2nsqr9sh-j2H`mQcZ9~T5>l_+(LUq z%}!*{@=r3r_|z^}bc>ETK2oma?zOet6SwIs_{uMRXIPJwg`1FMobv;5X4V}vc(Fdc z#x`^14sC<6vZ+dQBEYm5viBktxJd;xr`U?r>7jER#fe?V`cgv}>8E3ul2yzSVJzq- zpn|w%3aWGd>ns8DO?7MR^dA>~g~aj)7q*9)%=}Hc?hZ$bSsgi8M9acHwJYRImjVNWYN5-p$c}P`a+KwPwTZsrQLX(G zsy&z?pzyNN3d-lletpl_ufIL^>mQE&`j;(VzedD(nFxJ|-P{~%l~X?x1248Tu6pBXNbd_-U$#rb*$MM}fH4 z=KR4tn!$kaQR9sUPgX~=oW1t$zQB@(*vDqmW$mQw@iI?}D55_da@Wt0q)=1$k-6(C zl?_aHI3$?w##btEb~AG{RLr9mjWEVT;kImLG0<=A6t6sFr+8&OuiJ4Bxa02r@y0NP z{3;&Cl=DZTm>PnbEFENEm&QLEk~xNyHCfIUq)QuXK^1am+T{PUlKt2Lwo)tm(Il{d-U(|5%$2%69$bjg?f9=hW>w8s&`mQ0ilC( zylCxcc+hTHElydoDfZ}Ll{B8`J<`rtFygWPA*DftFpEY zex02PdX}_BGsXLfKIk4zPvD^LzO=I1T)6GY#lAnc*qd8+tX2(eDW_>@)f(k&DYtB( zhbZMEZdZgxyQ>PtHXfL+IWVxk*v|B1LGHJ($QsE@Q91WGMEVQ#Z(qD1e(@(UQH_Vq z^!w!`eW74+r7`DT8kv!NP?oa-17y(1H-_q>>SQ~ivMoO(ovMA)W}wtq5UeDhIr@!Z67bk_NPWd$hj4*9w&@6YA(y=w7$JnZPUzFz0~$25F2Htooh<)KsxGm`uM zfh!Uc%(Ao5G>|va1>Wn!zVM;%?d)RfoWtk-vnnM)OrmiSh-l^4f`?8ne%U|hJR37J z#jvF?BEaj%^%^T@2D7Oq9^Q$;LfxdHwphONbu`L0`P{qKM? z%-xirUMk$MD|s#ymQ1e|O!?KS?Imgv|Mv=Fiq%$T7oDcJ*NdRLJ?!UHVw<>XkBx17?uk;r(>v4)U7|#;)lxy|+#{9M1h-K6J z!(+d`!(TTBJ(8EK*xP+)%7U4>OMJ8?ciV9jW&4hwm?Yk_&1c&!^4$?x-pCT?Y{CI^ z4%*V=Q{aQPB+=(m{R7$pE+y;k=W-kpp~RxZJxqQ0w7rrE4W#XPayuLhw~y;!wm>|v zW|)s>BzN1#)eWp{Bp-OL(NUqQYi6pIx~d*LQ>o35@Dnb)!GGnXvFt00Nl89&TEkaY z&T07Sp;NqDE3_#=naaCM`L%x1Nf{iPHm;j|T=@2-B>R4zuh3;eUhMs^JYKp?9MW$sj&-{oaq)>!5jmFf0`?hnb5 z@?-{+27_gC)j4>n5eP_%$qs{%te7F-)<=CaSiSP>L5;7PJcxfk*5NPPlWWciFMpf8 z45Lqy7o7vMXLE0I!AL%TBj?hyy9EKm*xAW<9PYG<^vEXgI`-wVqQC|>x$(8MQmM{P z_h16T43phPPAM%hD_>!*6<~2tLe3)e@HDe)2gZAggz3w)<}=mX*F^!_>kdbvJBc!p zD=NQ2#?Ij+Bc637*Rw)ZN&eI(D=vBIHV5se-PW>Uj%u7{p(eMVCHLypX6UenH(;3b zZ*B+%jJ4ev$w$s(BdQ#Oi|v!!GGbO;{>f)Sdi&%^Rj0X=*~vnUg-gu0av|k(xf@?^ z){VC}>BhbF-FSVIZagrKZoH&9G=6Q}cuPGr{;5efepBC#hnswIY5b%aG&=V;X#9AO zoGNTmEZQKs`fU01uC@(DljEd3==M^Wl&MA<*KB5?PMLaqQtq$ohJW%Vy1^%+G2f*! zxw^M1E=&(i zVsNu_jC)Vr;QW*SU~u-yk*cmRqyonMYx8b=!n*O6`fj|wNjDy-@5WV4y79AdbmJ|} zyYa1N-3Uf$9sONO9`FJ*e$}L>FO5BI291DmmzBHW823lRxVP9ghz#TIciXrQ9Z4<`* z$a&nG0+0Kd3mGk$Pb%;@$r-{IrfpD^XFZaLpKDunhKM(1W6s#xSGJJ7&#dw(CTo&= zn>X|J9cbp-#%6w0Zst?XoB8MtH1mi_ZGkZx%_H87t(F@PdRMs_$B3`e3?XI!t)7=N zbpo0qNiszFez6%xg4dAw5Lo~cux2D7Ikiqme%``0!(4YghN)aoQyMm=c%sXz?@!BF z<47*AUURN-59|5AWI)Vi&}YC;lR-z=Cs$=X%Rl+q`E`=)@+P(X&TGk0cp^-*9uDF# zmFmobArBrWx5i|RK{tH))WRs_k8<_!=g*Z+adZhErDgb$mQp>4_7i6Eur zljq8dhDev+$IR8MRbMO+Js+9qcz@KY?#dLWsB*O@ABbAjFSD1_E!8zi{#jZT!8mAD zwR|I%5%GhCo?X+VXFqA^*;P$?_OsZt>y<_~>WtRy_T;`Zg1&cq_A=|)r{lXTl%UrN zhIbvw|Kd|=&;_m2|D^d3TIz2KNEfx#mx6Ki;QU24w1SrUvIw#lWF0eo5}36oe~3N% zSoSjO^(S#xHt*SQSV`232A)_Y^@kz#9R;K^HfPSFX_-PX@w9I`{b9|Cu)ULQC=Qe`9iUk z>DJ0Ev@(rW`qavls%wLv^@EwbH~!siOjPz=XLbKb1nfiW^^U#0SjdNPFNLxpOrVgI z3mui6%rxt*-iv%k*p%59h}3OXMOftq++7Sa8gP&JeA7!&m>Y19oE;1}1Pfahp;Xxm zKC0i%V%AEQ+~sEoY|Cvl!JI3(cCRY2j^DbXQP-;%p=iWjeW*#V?u5Y1tZdS&o166N z?(O#KT?Oj+Y7^?XsewA`SW;j%?}^0mfY$snm`14+NEkvM)43FqGOyN=}TBAheb zyqjDnU0xLuV?sEFryt7P1)4yomOIY`R7c`m-N%+rw9FZ3?5mlvwmSrj;ZQKPSBVV)icbl#b;6&tdq^hjZ)JING1U z`2yb%O>-=T>rKZ>ZF54fd_46y%!zJSOwJ*+h$dK&JW`$Dli{B zz0fM0ZI*L|&o@?jt5=FF?KU_juPqPMRh|E?8|X(H2l}bvK)p=eKyNP%^o}sl-@B)z z$ZTJTr-XreC53^$x^bXCXg<)_G!FFpK2T&o#{z0;U?zubaAMM;k&@c=DGd~#|YxRC4TVv?ug4dKe%;M#t$Ssn)8E~$lM9K!ml&or%HhRKO-`FSWix> zZruN>2!p^1UV3hz=o_01?w&ZfuVgQSyh)OqHaWFFrmSEyQQ}qvIft>x1>HhL676 zyco?NR{-&whe&)J=fyyuJTB6G?$0`ZGi!=P?|OqDodv|qAs^x);d6@lIb}0`mp4Yg z3n2z`k`Hy@Y>a!t2jQaarc8e5A1ZoX<^6Sy?>iFS^IZqQEembwFEntK8u(sa13xF5 zSd#|+6dU+?(zF5IhX#g<4SYfkygSp+ydhkwu}7D6nv zB2YN^O=7U{dt|uxeC!jdJNDZ}CLSE>VbS%2$oCG`Qhuz})E=#+NENsS*y!nNwQT2y z$xTb{V@5il__vYr&p-R2J(-bwzpn6WLtzgAw=?gW75-@`{N1|3*M-6_AG_sWg~I8smLd%~BPk%ag;a7#vZmTPNM|c`0uvNF;7(RP{UE#aK)BDG6IZn!rb%nng z3g6qJaQm#Nt)C!*yCWW}MsRL-_Y4KXIDdP-g2IaY&yBD4_jAm18R}BD zcnD)-><%*7SElb1YF#0Ht=BTNGam_i#5mw+Drhx9dh$HO3Z|EsKGLZ6OSNI&73X2Y z2?>N#9IG+zp7W{eO94$e5hjG+Y3~|2%NEQ@$#YTqi>6c^rAlz1u>AT2RrEr~0&Pqp zEF=pxIZp4c@^^}&u@k<@6{rfbkJjoVi=Xcan`6pf7@~bF$gqBWr16!u@tmS+?p9mf zRt;E|8NO%go$+3y$6nhe$ksLq7BG_CYID*#{rO)~dgLR`I{ISOVrPVR8xhe$7KU`C z-dW6z;#Qz*^wpchu&p0#cGP}F+kr6P+o!!xtSt1U2hU0O>CgY>ed3Iw ztWO4-Pg#v|)b;PaPgZecld2^u=9TK3Yo_G{-pRzAP+j>K{bhgG z)Z}Vg1^N|yzbpCBw%W=?i&hr@9i2NymRtZx{}i;}Wgt`i{KWYx|9Y}_0ODH!lj@mu z6Lp$uy*6m1yRFu1RO@?ocdegRt)JQ5wfsd3gq*!)^m`=X4q?hwTqBXrJM-`5wb z(tEN>BfE|RjRPSNxlVwYkU%fA_BH3z^G1lIS)%r`AGSq^|`q6cWNwKQGy011AgE0O(V zx=DP~3^(WGiU3tCw9lq0*Jg$E`gvsdTh)gT?=l|Nt2lS7(tmHLbcexJU+ZsG>o<1_ zTyn>-uZvS%Wp$$KO3498TWb+8EXcDDwO|$;eKD;)RA43}6k&^=Y`1zfaJ#ea!^o9z z!=}43Y}#pZst3=7>hNWgT>!2^ujJ^epjQ?xqvrVJ0NN3~vWZ&hN4H9^WScB0(b?Wm zR3=gC1o9C>XT#Y3fR*b6{H4Um`Mw?Jm)O0;8m^6yhfxLASex5Q`qWLTD~bwqzO zpm|2mbTc83sJ6;4H}`-xA8Xl-#86W?*Lf*)K6NB_z!*FHc>q(t{C?0#*+T!+tg!5j z74C^f;t^r}=4{vTuDlR^X~(IO3Q91Ns-@e{tn-vPO>b1N&sddy<+9LbB4&ixkG*|t zX-x2=Bi6M3UqP*!#;G~E*F#<;hkL6>(=b9E`{oIEmU#H(yJeNz{kmjwhtR|#K_<#&2b9~(M@hl)ig zeI)0OoTC0awB28DKs83SN#~`LsHI%9;uk!JwnZ0t7Oed>b<;e<5j|Zhd@7}TqulvU z0-WxU?Nt-jCeua@n?PZ?K;*Teg~BCnXVTl@au$-=YN`=SPm@-rE~mmHJUv8La+BrX z{u-1%H8}~feB`1A?{wHg4t zYXAoqG+114X-IFb7)JLqEod@ez)FfTN&JZd%5s}7^7c%kKL##?F!_@jm5n-o782Eu zQ+q1>ZX_KXN>4gGT>^pXn796Ja}PGY3ai(Al02(U_05EDK@HwiD;&o9hJOV5&kxXd zwgIjh{enQE{{~V3#`9^ZLb|C{jCW7)KeE`g$TGWNu`cjQpHXP?K{a{vpS8)uE}_Zq z&j?(Uz4!E61YV+FP>b11ss}mWH^S1r`Ojh8>`}^`$;R<6V=;zB6Gh9``&(bp>cux~ zoz6N?*^jCZjX4rlAg@-aT^(@04~=6Bzd?_7Ox4+Gs-VbhhEQ+lv);qTT=5J zsG(j}Id571*^mKIpG%mDYDItWE<}vLJDE2UVv|ieDg!EsGg{p!SDxoP)2}%Afk8TE zsq#7#_G*eT6mvT7l5 z>Vk44MRh@kkhB~=@wD3=9Wb~Z0TBlb2C0yG23``0Z*Mef0>ADxi(=0;$DM#2{CS0@4gfgeHmjBLH`wyXimD@AyFOt<0MKtLc7{! z5>=J51GhUDPNh=&StE3s)KanCNI7hAWBrT-Dh$yIWF*wlnCx&j6RNn&qd};ocHAzU zAQ{{Se<_NA8m88I$3+g=%BYFU&tzV)Oin!m7=mphFcAPMZr1OD3P#gXP>Fp@81?b1 zV@|96Mg>{oK|%=w(n4&mX84;o}3t>T!#7vdP-?hlXUC$N}IJ z6AzMVHG%o_z}ie8%>|4jIX^Z8d^ms*yDutA$B%`8U_nX!pkL=Vj7pu=HVt7A9`Z$L{LSs%naJ&{!JL@Sd`BK5|9J*%$N zoL2Wrn363k8P6;*BK|HB?nYHollWOY<$iFPpvm~nFNSp*zsGQ>s z6U&&2&3DmgX*<=gvIv02c`$|5hLmhV^7BbaepIQ$PjyH$@`cF3=kxnsj76$ zwNPUt0j(V^Y}SV^PahBTH0w1KS<@Ny2cKzkSbJ@*(;`$$$k5jU3G(NT469AO>RN0h zQlE*19glPfN54oU@aFY_`0Yp(aCM2DqgUe3V#+!M1Xk?+q>^6ds%CPQ^wN?>Z=u&k zB_Dz!E{E1p^&Kd*swEyNB*vs9;iZAQ)LFI8vu};kB2p&n%vwuK<}FA30%s|~ z94ufB$X=0xDQiegHJ1W`5S~lrO{mHFg9heTrbm+e-qQ-^Zq=7+>q567e}gCRRfTtb zC7bijzU86O7=2%>7ysJo#kJi535@$_pPs|PoEU7JloJCv1-l?F$B{`ME{#iDz~uX6 zzD_roiImL&%foEuIXkArn!nhpFK^an0}r**PAT+*gJ=ear{z2BXXT-i{#`9yUrP_i zrt~j_i{UcZGb$&&65q*V>;MWq*q;Z~623f`J6a$Mx8BY7Dlmm~r&@wNUNFPoeHl9b zC#OYNS#_4QT15__2nI~(^Wog(O$kt>g4bt-OF2cgi;Sm3Tyiouh^V^}?&y}bN^v(B z-fjQR#!!?WYD3W)0 zcrp5g5JDPe$)>G*SM0??Q&!2cXt{J3I(mhv$=j8?hpYe`FCt2j))3~16UjI?g~1n~ z%K@DR&ptzJ>BDlQi$e*39AssjSZaqkq>Vfs{xGL}i{@!B1d0Ep$B|e@mRMH^x8rjY zN!%}SR%;x9u{#p+oa2YX4ZW2LA{EG4Y-tI0E7#3fw{mOB=s!kf zNpNbCkv0cZaa#4K>YDHeew2``-d%f3#IMM6pHxo_piKT1AA|SHS@_bO?^ntOcdu%l z^`tA=pw#o9!!1qfx`NVq+U3CZ>MS;oB?duA4nF^NxvW+7=J&&z42|M^8&?;>uE`-a zJxHF$`Pz(8gC0IH23z`Cfio2$LN@vCy4I2f{6=Mby<&S`swMw&xUMoWE!8hX$~>Z7 zFJiD?@-Sb`g8Mf;q&TP&q8YX|n)V?S%cfBc*=ifV13`}X@f{(8l;&je%JIb29yL}Q zyOLAn7lnhFXSUwd{6NT|Ynp!Dm=WCtu-Gf{q$DAy7I*oO`B2)H2rK_e$zVy2L?1YJ zVVKuqI?gOLh2|ygPmknMTwyIAI>UYzhrf=bSoRwaPmk$KYjWrN$y(xJPS=uTfz^ua z`@GttxO^JfKaJXFIlq)7t8cXzU=&2^k(!I2YkOR`v2^2$eY^8A1b}C5?=#ini}!Fg z0@R6rmO7;A3j)Wr$4M+LiNj0^(L2(d3o2o9&S^W916Y3=ykQ6-R^${ zaQbF|Q_gM|hWYde+N@PyD<-{GDG{v<^J`q z7VSFcalDA?;*jYFsa`FPlQ)n4XR(t%$YpjSphw`)v=vo6$jeVM{3GPwBsjaKu_=@g%8Zj~BdblkM2H77 zgc{Ohou)3i8MtF{f0xtXm|a;)b~-gx2)5KYne!iQ!}?4XC66M>ZLryFf70GKD{15Z#$)D>)RPDGo%AB2-a- zbSjR9$jT$OqClY|WAui@badE}E+<=$=|`FzF$$1iKpdthah}6_5$DO_8EI8=qL#{~ zmd~f^;?M!aRt-ODA!~ zY{={{b5SfZ!sBwP4!}8369?HCNCYHH9(RPz))|&zde_c&Xt{6f(b%k3+KYDX#uz?U z*x_B+yIpv?nQ!ZNbmyUDEiwae3HDM*bN??P=j0OHf_K0QfDV4dku5(`uo%6(ovCON;9#?GVopoit z5z2hqpK4Pp1G>Ic<_-R~7GD2%DD>sJLhtoL?bD;muv$9Dck;P$og4=rJ3nV9FI7_Q z9_!lUwY#*E{MRKWdiO)iX2vGeZm>i$>?}lvP-I4Og+(#Mfj#^@>}vqX2VF-n$#YkU z|B1FP7|{_EGm;1Wdu3_pN?yfA=7d&$%tAg7rX}Cdfe6*)6KypsSX%aYw_6nR41b2~ zTrwFKwP>Qb7&B0#=vrkWPucOI~8>|j&0^7lCD%;X0C{lOT-)yArmW^jcUi;{W z>MDX)4K~K)>ah+vvp3F&?-j9s?$F?r)KQwkp6E2e10^F#!c~uixBNz}b)jiBgpTN) z7h7nUh5K9BWcIqu(hGWna!IUyg`>|VL?*WK#fIh6y6Civy)qlG0Fgdp{>2^c#%({mb8R>)7&7Pad<26iK5to(H#|jI zR{wlPvi39A+m|)QZ|_|D&Tiruhs$kbZblp9OGb7Ij>R#~+sQFn`?v3U`^{mzV7oB> zy8D+fc2E< zRNQnl!ShjrCzaS5NwP8lGum~8Wbg2X=G9_oy zO91EXHvZo7*kb>6s8umn#S)dVvyz&3|HMb9|7TkNvES)`8bSGK_2swT{}abM0E0g< z$~I>*)e-7lZ26r!s{Ez1K6`sMlu{UpS^&*CEEZn`lF@$-Kr`v1n%|~0kxGb!~JQ}_E zWN(WJ`S(^Yt_iz-#@(Btp`j>;nzOL~@yxT05V_nl`8K}zT-YPE`}*+OxsHFFlgK|$ z&YQyZCR9&~w2W~*6%O3_MRS%xv+^j*Z+5sYedp?7et8h~;^aA=3RtUG$sgOyS*+7J zS!$R5Ua3A^FCM`8j8;HH8>nQ7Ej}kFaG89u?cG*893eIoYFC>qTdU3bhNdsVZ~9J7 z_nH2QRN_SS5{uxUpfI@vlti%zn^kL~K(G*QaxRQt7M+1gWfK}iV@Yv?1l54gN zw)aGCZ*=&r0iSWU>5MR4T{=qh=@L=(tn5qk!e{XJ&M$~Zs|Bre&ckKE0m)K(lj?CQ z$-`AO_&VU9bye|Gyw=H6{RL}5g*s}md2LK7JYoU0lNF`nBQnl*Dye?qD_m8bN<@`E z+N-pP^S|@Qhtas0#(~kJj1qHb5^6)GDMl-+U~7zil3+3}jQ+d2hISOA8%jrP8Iuln zTd8qj^b_kxI8KaSRVvj4qdyvE9E?6ZV)RLk82z68|3)$T`3Fc=aX>dnXsT@cNUmGT z{v$jox2qObcx#Iyex?FDaVvxkmZ;=A2T><37C(Lv*P<$LzmDg@(7kKr<+Xa_B40UJ z<&g^S@3qBJ{4OL4oabk+`px{7H#7!Ys3ya7jis(E3gEZWTHbMpM$3z`nQ_NbpFdxd zmP1MG@<0{`+%u#*ZObE0Ij_<>`=M4<-WRK!Ngbqx&3f{C_2e^6iv3Y9?rHME8v5>% zau>xVO`IyyNz45(6P7?*+yIv;gY+dx)rz8L63i1Vs>eNc=15=2O8*hN{x}c6vF<<6 zYFuxQa5CSqK%b3kQ9i0>m$BE<$vpsygE+!A(GQ z4(=8=bfv4ID<{ORcwn7_J58V11ll|DG>_phP(OdL1(x658iks{S83m)=9h|2ut}DaB z&?@61+6^cRk{AS7643+*dy;KyQCE&p_x6R|(SN2g;0X4tx9n@{#V6jE@jR($A)Xy- z_g%uq!->g$qsx+g{XfPydGxqs68}xi|AURK%=wYw%ugDqP%Q7DaWKF)HJMgN!|3TR zGeCR$-d4r#X-#;GBRWoC*(#&J?2=_tW83h9O@4-;htKV$tS_$0I@dcRlHt&Cf%5W; z5-r`g2=wq&6%C7T-yh@MLu0)A{TT0FxVUwDSB~-SHU6&N8)SgK(cWYe(l zeYPFhpH5xbpGms1KT~vNf2QgxgoM{gRIB|Xs+}{4wb)k#(DVKo!hU7M06+RzVqYpn z^-g!6DZNSiRS2KEf(P3(P=rMukwv!cr2Q(sP1N^}>-a+g@U;4ttdxSft<)lxh2x^g zfW>;_rBSnT>)T~mDcV5!0o%mIrUwP{qVw}>o5Nk^%d@t+eOfec-taQU^DxQ7X*1 z`mjKQ+P!`Fqu_9(pYS!VKFr_!eK5rPte^Do7wyBB{0x$;4@cYj`}Pn*BtX=oDb^ln z9PfrBvJ~7qMHKn_GKyg3R+7h-QRHhnT!OB6q)R2a*l@FJ#CjM1)b&!wKMDV{?#vQZ z6p&cLz*g?Eg;{gVinJs^>s}4nDCQ%YLdZ}zuF2XxSw<-NPX?jE#MYbF5{Y1 z-9o1^yg%;(Znm&zgz|lzwXAf`I3IDDT)+YM;=9@ws9(~gb^fRq0Xf7>CTGb7(p{_0 z&z_vBC;JwktkaVP#V1eHli}i%$Lq=A#U~$8TKMEMZA@SCc%mo4!9zBcuiwU8 z{Yht((2o!XNZ{g z4$(z1AI+hmurCse$vB&cEX9Wjj#>fP0=8K{K-Khp)j>kiZ39orP78J} zXh)GkTe+i69`q(0iHi$bjx|5QYF;+>$FXK*pfWng9Z(h7 zH4qyxt&}I|ll>++dU3v(P)jbfHYcyGRE=5qUtl45puuZj7a^1i=2uh-f=riMl1CNN zrNX+9bfwEap2EHH*|RliG}N}-yEqGoChyB_WdXxn z085rRk`AZZPeU3c6Q;w>BPec^yH2h(l+ zfs4|K7w@)PXyLuvw%C{|$y2qC`jR4w)&#%L9_T1406abnU#W-k;jid5gfcMpv1Y`m zv{%fP2;Xa)*m}Z)ZMTC_APYSGGUI6v!_%fJQ2ymC_)JZHp=@q;4b&bp2w8xW2pl;S z=&AVlmsJ8SJ^ya*x=3@}ijDH|&lXe#wi%SYlW_Gs7^=mlhT$qE>}kJOAU2QEHAXb$w@R)fkH z1g_%ax7*`y+VoDXsfP+dkL-ja?M+8Dx!B)zfFgX-Ici^a z`W=xrDu)wH@22=2TZwcx)$j21*^+6jrvK`tomp~(Y&h!J^~h;0sz$T|6G8HPPy4j@?$1A$kBe$h*5 zL>0v~h2W+%nPHFA+wjOXAy@B26h@^wIgqyv{VO&3n>Y)K7%~WqISpSkQ1ALQKms$@ zK~?*L;XYU?Qsxogn5M^>TE(4h5E^4j;1|rkrWQ{6_zlFDcP3pGRc!F7R+AGIbdFJD z52p!e=ojJPY&}#KO=Pzo*_Dzjc1iD?;w6VCe9tr*Jx6bz$2CGbl`Dh!aHf@|*2C)849~GD9)^v#jq%*ldm$O~vP-+soZRk)H zu1wUQF8!H;rjQ&*=s(f@<|E9aw5+FZ&aw~XI6x^>ZKFrLz})qWg2*ckMLMdV=0S(Q z?tlw(*Qs`(f0bZMlO9ddBbK9#IQ`KS>y1BxI`q|4J;K4LuV52h{8Ua#hxLP3n;#m^ zw&_)$VIRN{E}XE|J^~e0q|@)<2)di(cW?yVF?v-8N6_6=zk?$fwx0r*IT~a%W;^DR z_F51WQ8$S?(5pC0UbAp#n-JI{x>{hbS*seOO-zTbQvD%H(6Co;&;qvUuq-;F-QME+ zJJgj!)fL>z8WA{;RTe56-igYVsxs(Ol|d_cWuIlNJKQzZHrwig$f%1-%{V(WKD$r^ zz;+TJ{g2xwe61C^UAk>;GEJ=Wk0zG?K%5VI8cCYMxpB!1`+x7?VCnqbe~THN0u|=b z9SM;l^;0)aQhXYuSg3|jt4=ap*FBTbLfZV|vvE@CC{+5mGL^2BsQqx<%9|6Z)93$} z^71vW1SCHXAo(-O%U5;ypZJ%ESRqT|hSxufZXjM+E&avOF@H-{^CRO2y?K?SPOw02OsZR=lnN!LFae2rBVUl#% z6rm=z<@UyynV!`H#?{}Fx9Nr~6-Ccq!<0$BRjcpX-bjMc8GNb)7Mnq9M&(rxC^@0nCxaGbl8 zq=g{ZM0@teUo39th*d%Ep}n8#svBQOS`eYAM!vgV=={jZFp!D1tbT1;-+CM zTF5^untq{V(em?0(eRsJ#FSm7kQ1PgMQ$e6QONgtgLxv>AX4zd^W)FLIEwixHpYX_6eQp?4*x0@_JB^&{J=Xtepp8Q${3*;*>9 ztHJ=8xj<5cW}}OX=7%Ld3Wu;+wReVU?acNa9#EHJ|JJN;=usFHsq!ibfhJvqUujVN zz4d*aCrmF&u}Ub|Oeo(j{ls`)f20M{AVlNgY;$_%h2DVaWEom%H%;6!sf zvy+!ZUmwKe5}({zJyL~+w3>Q`r=;two~%d7Y_EX&_NaKSwMrk~<6^XmS%pm2Ktxmc zZ<-c8N~;e48%D8khB`Cqo#B8kFPtQMRvKwY8dpkEe0(N%`ggWqYPl1)FG8GdTI)e0 z;;^ID<3Oi0A%}5!@6iWl?;_mi3hsM`p{@&%Kei?0k8cI}y~ET2`rbOwZ*u6Z6YNLF zfc>lY4)iv|l-LPXKmL%_hlvCbGPx(>c{`~k{FBoR`oquGx8`lFCVOre2aDR(8Tdx% z_qsBNG75(jA_)Wz6;Xdu^*Mn-izO)t{2751KFK<5XEL&Oykd{cbFL^%UkOS>DaoZQ ze+JSad!>^O`R8E?)eEiBg(r?`4Xd-d)!No_9(%SX8rS4Wa)AX(KyE7As;8aFAtO85 zM>T{bQy%f*6Hi%Yxm#Fm>6^?sFStsRHdX->wh0PCF=6uxR~>>sYG< zG4H+v%p}~SlDtFROTKi;pq57Ww5NKo6~InqEth{ZDKJk@w&=ICNb;T#{0|2aW0-&o zJWK?ED~`qM!V?eXN~$YcLH>RT)vV9AM8x-Qk%|bAf#=Tj)ur261k6v%w{AOv^g27Zd z5C+VWY6uf<5hXmI2~c49MpzFHvycwnqZ+tFp|UVt_jd50KGxadb}iMlirQU$;Bon# zN0AJLZNYt(*is=q3OSR4>)VCx;oFc2^^wD* zO0FdLwv|IZ-qQ-OzX*x#cHfrzkA|!#xU}lE`R!@<$DpT@LHg0}WZC*P?z!tIkVyED_2WX7~xw3MbxLX>CeI_pR~| zsW$@3B40Ge3)>*im$@ZahYY_AWrtXD8MKT6>i(cPWJAP|Z6q+&42z!QUeIfIY-DI| z$61B#$*FSnkR@4E!nsGfo8S=x9iw)ahrpOqD1_S{&v(J&%a!E?@@znp$Bqa(UHC+# z8h+V&tNLx2FalW%zib2OXjQ($JP4@$z-C=4$*j+WRyYQGZ0K56WuP0wci3t|!iE6q z5YsX~ho_*%E`-O61ML!=tIMkju}JnS1piDITyV5Kvl#qCLQJ-NT5b>z%B&COSuLOG z3JAG=0^Shfqn34RS@JoGjR-DYx$`BVEy}CUH2+TQ+VnV&mabUjRSeE*F;UFyaWYaN z;$&^pupVI4E$4m#t1Nm%Zqg^MEgR%N%zJAS>0Dk$aU>O|`z{aWSxom86Jt99`N9tI z#Fpg|U*u6YoAixk!YYKyw6;O&*Zy?K;!%Pd3vM8boeq&X##=_ms8m86Pr#F_x78sE z{fSiRlFZ_2h)B}srHCY>&zg;`{Ulz4Z5p$=b*V&S#!atBu@XI^5hxn0rgMBssJ*wJq?d8=Vd%MWIRT+Uw%t;D5Er zQoEM+rYHLZXX#*jR~_^HMKP2O8bFw6Z1O|l0%cMg(7WLQFoH1^@%`y_;V~BH-!x%-Q$u!BS^XcZ3PEUkonK!XyVQ1zNLgzH7{XqNS)T z0KxNz2$@QIw>%>3cv(^4RpGsQ2WTNK3UXb|0(Vc zvW;uiWw8)&nH%>z#(kgODO>MuSmeGr1j=!;F8|ay2&gAbSlrbhHo`U3EfQeL5EXf8 z6C;}_XKSO=KK<$JL(*CMVGC>?;jrZmynQB*=A^Uc$c7`dUnddS>KWM}v`y?_EDoG0 z^wJmdhP&+;2b@;ZW%kXreZ^suK)t4V zH+cPB%=a2wOIfJ*-k&RKnqFvc%Qaxyi}qCC@hy~d-8~XwsN!NsOqzZK-xku;nIyTU zRVA-1EpoJ|WUG2|Lz7A_)Qel1ys&1!q8BZ)F8!CiL(9hX0`MwANpoMci+0>F&=r=w zrbxb(Zf-mF)gM#x{Ex}Z{;68Co4HeKc1NGLaqH>lZ65jyo~u+i>!Wajk{`&?u2sCk z)52*>VQp_5=PI@3Cn&uyc$Q!i;t;)S%nvON>|8a=4AYBmm)+vkVg6ef*z%bw!M!_W z{Uy`0a$rD5RqAk~YI2>JH9M?v6C@98W*{m5jdQOX;F**~s+G{S>9DNn;glB;3(uQ)#& zetom|XU)1OD_}#&;t`ObH0<6qxu`JZpA2o;oPQ!VR+{oR1fN5n;awf(gwH`dn|XDa-VKlQ@Tw}+MF z(uuL~E5m0u)SZxaUwHc9*o9vkK7*DD-F_fEePHauZw{YbTUYqO@btd13%?_Lc4b}R zUxcS$9lP**!)I6275;5_diU6cKNvpyhNbI|Q}y;O4((TrJypL9Q}yM#!tV)%Uov*# z--W_=)fK)q6n??jg)a@CeY&pjN5a!T`qNezc18H?d!5C3e*J|$=9|U_*u4Q@->NHo zeJK3au?ycH3V*Gx@Vi3cH?}C;zF(aW{w@zQXnx*V{c&@}^HrWFP3zlX`MnQzZMrIC z8_b`EWQ-;f{HQFmi=-|!&A({tL5l`-(!5LX2ML&qqT|(D2|tZ5zEF5^D=)-YtDb{# zY5eBl!Z(+1wHlLOu;Yjdnb2zT@{^TOgTqd;!vl>6zcSG$W>v`klyxCr$Bz6Kp=EWx zFRa3o^ttNPmXn*)T))+>pQ3fxvn=KR)s!%vmI9yeRn&zS?XI%j(9^ z(8r$?`uO75BtuUw3VmZSJSIlr>1OL&o+~9urW!akimjMkfQ_D(`t?#+HLyLvU^-O# zT^8>BglWOtzia;6(Esb1Q=6(F)yon$%LXR#B^l$gekfhZy_xlWWMt1Sm&eQe!=d~#SpT~{IsVf5kbGEkRp)Ll$Dz{RR%)x^7@21-*uR&an`I+Z!iE*6;i_o8+*|u9O#X4IvKYnGY5(2JpCHZZ|neZSffgEAWB}exoZK^TTc|CMEh7gbU zx66*P&b8Q&1ugb|S4Dyr%Xzn^h+aE|CQT%v#eVxdJ**@*us_0;-JjZ%8Og&g(?j7G z1o=-cioEbU5ppX0jZBOExILMX{7+rsmxjV08N2Wuq43Y@3SS)xe_-swUkZi4Usw3` zq3}&(7yf!E{NXx)eLeu}r$vpf5n$Jb&%RdI@=c-T*N@%u4?@d9*$vSCKq!25i^7>l z;iJOJ`{L=tnIM`0(#}rqb9GB>@z{8N?oIz_=jTq|k{%Y>;LVC@aH${^{^~^p+{Jfa zc9ljFL+{>?=HuG~RvLOwBAbrTe7wKYk`Hdfw~oXnjt}pb2qozooMn~n+o$ac(~@^+ z;~Sr_2Vb8Mz=k`u#noW;w&fKo;oazYQxBo)w-FFa&HvTLh-aG3H!XP$&9!&e>8W3G zz_~UMwS=fWl(mEU=M7B#N2-g7@hSOQejfC(wGjvEO_x+Gq}nn^&66IQyw;?SodG>9 z`Rc_|B`e9h$puOL|5q-SqGLJpx)aRzEsX2wgi=+LA-uLa;pH%H%%UwRLpQjRb}$nr z!S28Pb-$HDvP4%vA2a#>XcSMq+9o}9S8AT*jM-K`yrfZYzp-C4R%c|HdN6of%Xm|DnM@Q}(K zJXX1heOe>2();DhaOz582ce)|ba(3<5nCZ%ZmT&{)RrP2J!{|eYSKGm7&^VWYMnSC z39+7yM&cPNE#=-QOnk`n6j{nt)~}yIp88G&aB?cqMOp*f!)u?)_u9KKRduF&D50lf z{8r&J^)pcR(s$Y_Hsr;qNqZbC9v_)fvSE;01}4zZ%@S-4ug%(pm2QE?Vy@ihX79){hz` z(GX4AFdOpNbWd+%KL1L9nBi$?1ng!J|Jso@`H;~S4 z)ZBrx>$;DNm#ezlXGDD2q{+C=99ZquGh0kXi}5ltdaGuw$E>rLddx=T)oF+AEHpUa zWD0OtT>!)9p)JO+(l-Pd@Yd(BV_`P~HQ9@^78FGohbZ{L2m~5^D|1He(7EQ99cXQ1 zLu)uv9CGp{+K%cX)>{00dIPf{Ih1x7X{8pBQOY^`adTd^!xdYQR_p~_A6~6- za&(pucMR&Ul2e#Zgz)Uusooq#6I7hN+ zZ$vDRWR>IvQ4@Hj#i=-Z2yha)kP+H4sW2m&JCa5OvRv0);_KI&b4Z9|2&3US9?6ub zLOnvQYG@6E0HX)#V7PIy(=9KlH5;6#nz@<&tQu$AX&W~`XX80#wUT~?7iYHEB7EV6QXpNe%!3R3sRt#L zpSoJf(+wL=KI8PWPd@Fut>})lfAXtBp%9xYJ)ZF6{TY0#%8JH>Yi4Sf1bi1y6$WNAPi z%}k0@1mFLLpS6djt#)uj)2&}{WH7fio~=)R-sID?X1bF~6)qbqxKtHfiGQKJ+j#m6 z)EzFx4Dr4c-4`#`m)AD`5@WYeuKq5sWhs8sH>j3dtro@P(Tqvf(4y~Ss#HA_mPtO8 zHg`g#hfw@x75}7)BcQv@PhCLM-2KekQDegP=@Qy|D&sb3Z;MLtUzZi7Mk)dx31DV7ymV?KPVQ5q2eNE#FgpFS4*7 zn(j5Nh;8(I+Bx4$EhH=_T$w3`!s22Q!7Bw5_j1anttmq(3Xz#*bJ8gbMb&fX(9#lv zXggNJ5hcoU_R^s0DJR`0iYnjgk@LVCa#SEg4$qS$)&2~rW^>N9>uh^Q;$-XQ%@ND zz6gJ!vN0t`4dj(MY1hJZ#%MaAK`#n}R{8-UQ~;b=5W#A~qDr=6_NrEDTA*&xJ>Ap2 zL-?Wd{?{0>{Q1I5S8UEO=F340;?bh0a47{xRaK5~>t|Fo4C;?&eYp`4kk*(g7^V7g zTe^Kg&ZKK^01%(2rgjDB(0?`KZUUJn-jika8?nr+J=Y6;-h9Y9o7|0|SkONVv*HEt z4Xvo{NB8C$JIlZdLIc&_02cV;+u8In9_;RVA+j zYnsS6{ijn91-_}gmFR1)?!&Bl!O2|kuo); zs?y`iV$Ie*8pELPKG$nYl$g_d+Z(Cme?ldzsx`JmWaWn`z8^EOKL32aK7YAIqcW!M z?!62`YE(2rqZ5)5n1LGhgJHF+1Allr4R_#V4w8as6b=q|6Cy=a)~``Uz(dE4;7#J4 zQLb&P6)bIC9lyJ-tZrSpkB6O?=7SMg_n8I*LjpQxJM0Cl=TqCM^eZ=JUoJtE5U8k@`!lm<`MypL4|`UWczhSg?o;`>+*yB<-z;GM~+$ zrT-MuB@QxOn(RF-m5SnG9TJfHxJ z@75_or@Na(e^jB)ssa5v-&hfTIXs@{a(HJ#%LC0~5hL?H$)SwibJDPBz)D*s=%S!V z$V9*pzbouF)hBCqjWuVQie4MLKvj(}bB%y~UFk@=l85c1=|TFbrN{A;h|4WA7Tt}<(Zf@0G%aDqy5UYqPO(OXO#^jnkH$vu}KW0HS^Ol>BTPhKL8o!d$50~=0{(ao^a5h|4KP(AcBlpbz( zEb5xPU7D`oKDl0ha5d^3r{?NsiSyk>E=m`gDOCYN{+MV^eY7aGsb8FP&5;}6OCPf> z2rviRt;S%D2@sH}GMei^Z36JtlxzZ2%?MlkonX3v?DKE@I_()u_Zm!L80O>` zxJ_pQWmT<)*Rj@W(ZrT(Q+4^=iLlW}LPgdq759%~aa9XaAY6?vElvevp|k&VRG(=5 z#XrjiOL|?`WfvGEtn5R+)6yv98Y-SYX0g;yb%fY)`L3v?%Mi(GGiK8r&S%Y-KDF;6h70Zi-g`g}Zv8`;s>B(G;3@V3Y_+zc z8i@FS`_N?G9`9U9?;A`R?K}W(E&5*1Rt2Q;_YbD~qs&`@3Dzui2^o@&Kust5bSB5Z z)e`FL+z*q4SwGZthFt$S`)$DSleURocpXIDu!*9lsLr*N@&k?~30)BP+3R4%8}d8v z6a9+^;`-4vh&@@-L%sE|I!;ca6X-!wJECYsJnK?+JB9?L7{%|t_$S!ODfcVS`h&KU zoHuAp3RA-3JIo}3*NfkYKS$cquY^0`Hz$%)0euuou&~c-Gg7FYvkm|lnWiU^gsT>G zlu5yKH;%ACu&5a)Nu+HS9WPF=^K;}Jd^yzQkyr79t(0Hm%(=_X`_=L?MJ2$J=Q zXdbqupdjPYQLM%yf~LBUgoO=Tk>nzMpUeX$yy&PdHDCos5YQqA4_}f!7MbQByLRe2 ztE(mx52v<6RfjJ#3AR1hJR}xl!+SQnV*Kiy6eJu1;2B*q4G=-~7)BvmMZFd}AOf*A zE?R4Pn6!ul8Gld^rZ##Nfadg*JYmGeeKOw|{9@*3kJ?D|&~>~62>-$MLK!=@9<*2Y zw}uR&!LKC5acmC#WO{QjCIbMzJ8f6?1eA)2^gftWx^P`4|9V-_0-V$Vog638fA5sR7A^Qx*GD*i?I&M)_^qJ6j-5M4_XF z$RyI4e&PJ;tQ0=^+~m)T@VZVl{jyBvth`DgE6|}~p-4XHnCPUg)d>OOc6Oj7o+W+; z&Op!eI5aQRBf5q#L56y=#mk1txz^R|Zm@&Ws>XM+vnCCp4}i{6g6&vtc?#XCmmww2 zq8DO&Shm&RGpIr#3|F23*Y&D=qxs11mz&}i9KVAm@@NM*BjFz+nOvObK`*r*FU$7jw>-3Qwg&#xKMgDhqPP^r3fx z25+^aI0^{WH`BT%>rZG@Ne&k;InV$(4f)=lJQLw-vOzDR$I2lM^Uf(ns40#QEtop& z>M0!O{WpR^y2{BvAlx^ew$-geZMs#RI%g)4Axwb- zJ*1xePZ?p7&$Jl}qK+d%9fFu@0T2XtG4LEy(4G`!_H2o)e0gE;Mr!_=Wr2{4w5f&> z2_^{v%@Y==szv5@$*UrCY>j74H}lX1k09-qW9ER37>T^WDWoMCcq5KH?zs?90*OCX zs5F=^^dCbkvJ^_$WY*AtMGqy*nl}cp!N^N+#H+#_F$VWvg0&0>^IL73 zGh}UKCvxBlaz@$7*@GTEDBifxHS0lucgCu9>(-lwgehx+v~Qi5P@c}D=O%jbiQtZt z<0R0)+&J6OYvSZ94)3y~AH{pIF(OGy0Wy%Zc$5~ZT%N2po~KyAQ3oC>=3L$%9L9^c z6dY_otF zoGxNfGQ~WlgusWuFk{s~soK!w#y9IG`xOp8IRZ!z@tXtK2QHhfrKu}`-}<6<^rrgaa9wj$vhs9AUn|!`40Np(#_gzxU z<;L6J1Eqb`&bnwP8dCoVKyzkq#F3MjTxmG?>v7tPeix!gtxO|%dL|{zkT0PJwp{4H1ry|t`4bweP#|#S6Cw1&w|C| zy09`wWx!zj5Ur3;*Zvx&14Y<1L3S{^O&Gz{Y3RAdbyh?cQc3-TwpUoOV~d3;F6qho za_OmIe)0rE(?TH3CGP_{-@K0qEgtq5w&NjRQuZ<*^ z6iL#kQ6Vb`#WNySAb6%Y;&j$N|EY zB_x>TkmuG?R*o){JQE$dN2q}g4`Oktjt*ThkZmYB6faiYI&}@;qQ|Gn;jG#{pEnB` z9{&T=bkdC0zad%aN{$%G^>#RFrGVD9TKeWeM{5q}wL!@IR^h-tRUN)8H4d&uhlD;7 z(di?7jOO6+x=-Z*u|ceAmQH!hp%-UZ(Y=KvmT}7dgovQre6pT=-PUdW3=PPna!@*J zB~BTbo2Zn<0fZw;KwO#`47?Tv3t%3i4oobhgTM0q(Cn-1xEyn2b^Ee=v=oC&MNXd% zU?gOd?^M8r+3jau0b!@ZUkStXe6=rI1|BWq3s?#tn(OEkr--gHYo=_ii|Uqn2lO~% z;c|^EdGcs32j|~Hw||gzyIv*tsSUQubG^@LFoVI7#4Lu77bBn$0m%Oe$*Beguz7^1U`QSf0Oa)a3$# zSB{g+Yv(RrPSk5jv1LMzrHVa*Mua30g57xtlG$A0rti5k9qDeK5sz?VeyRXTBSqh@ zqHWlvx*fFyzUYx$wV{MqutK+$WJC08zJ@L7Q~69R7Vrt%LF|=Q&?TgEbM>w$A@ip) z1wES}Rhae}R3=SnZuC%K~MW zJZIAG0w;?K*%YSAm4EMxyMzogg*~(YvM6kblM@%bEP4};w z{ZklqPx55U1UkaXj|OQRcEi}}K%sbZT%DMZVyoa0GAZ+!nlnJwHfGSExZ4U-tr$r? zBTP_=%|PQLx8a{+VxeThyHi3qZTR9sL(m4(nM@MPfB-n$1Q&5dc&bNmVLs;!!aQ3{ zl$+mXsMtnys(5T&1!9MqH)ByUjES{k-z97>gcd0DMdPw*d0beHesVb@@Jsq47@~-Y zu^Ya;#1v}{$9cV{t5gKAWDgt=KN)=(DGBg*hdNgQSzwXFGqQnhYHW1zMRC=)Dlkir z_nLf&T4HU8mc+QVfR9;84@Pov`9HTJ(_YvgRT%RI7bX(GV3&C*qyrgO3%-{)aW0La zc?l!U;Z#jkrqND(T;7~v&^tqOXPA}hLj`#w^2n#B35x!+Y;j2_B0db4amj_~l(Pmt zk1LfIHv7mGF2S8i$+JWe_!`_bF^S09UL2o_g2eDns|Sb(C3o4eWJFV5K`_4sTp&c= zX;d=ebf7sjEuW4 zjtdPGv}ZN>DArBxz8vynD80$B>gkgwmqc`K))AOtxA@>nxINo3g?K5U4FWWfm}P-u zJc*76S1o5?1|W`7;E~KRiYEldCOs`+~F0?Wz z9WG==DT4qu0L$Z{!9v)E(f*ZlBdZbd8@p)=v`^OoO}20WXoeQB33DPaXcNQ&iEqKc zTQeVhSr3SKl~~pr{hFKFEN$^d4-}04VSOXX8SeuGam|2uu0##V8i8r7Grd4uL;3++ z0|P}W5$5AMgWJ9^jXrzjYMd#a*a*wb*RYq7Dk_J2M`2Z_bB6^pS`Y&%@FLtynx}Rc z)=W)|71wG(5U#p61Rrs9Hk>AWN6+P)HMb>EH>yJq@i2oZL1O`lX4jH4{vUa70v~yH z)%X6@HB#?AGwz4Py^dN$S>&wy9DtV<)dtEtM8p8&y)b#v#uM zHo=aQ009D@K)_%YRdnNNw`bBu)%I zZy1N1wQD@}kDqj&a<8vVs_aXk6X~4l7iyEhR97H<8<2nK%z-cB9ua!_6{F=rs``s0 zh809o15QaNdOyc$X`DZIoakK>o}cZ#qCY2kTm0Dz7rfj4YT$G6#7o@zdVcR!Uw>n> z5CtJjO+=FaW&paUf*nz6iBZ!WN8K4%BytyLMi+MUO(<%qB-tpQ4=ZlcDzJ~K0iu;Y zC2FIxsBOeWG5Z$5q?t$WT!Hi1#C_a6M)dM}FEN~gy0j)~ch|E^s2so61Fal~ znQIUp;_`7DP?4BOg=M^lpO>?X2dvd8sC*w&(V@>hMYYf98~*xw2$l>;ly7` zB6(!NxDgkxjZk>(#Kt>9O(0sfN_18wi&Is}=vP$=oun!g5maTY#^ZFQ18-4Z->9eg zU||PaNSf7gbq@(4GJONJ5$mYlD5!@f)w;`4o7a4M8&40j4n?6OZlOe_t5}BjUrHco zsr0?XH@FeE3;1(I}X~;vE3) zVXUR+C5Uy|^E~S-;OG{(=Cko#F@$FIl>RnME|Jnx`mHZ~);H-4T1eC0 z8J~-wVY{$Piiy=bt%2;HL=uoF17R zCI5rHe(FT;=f!dk1vZGu;er%y^Lwpraf zqfTUV)}WM>BfWP#!n2dPa^6`OS`dJzIP4>N+_Kk`eOOd^L#k?fS zlbo?Y<0ygfx$+qL66>g1)g`6iupaka_1Apm_n~;W^%ZHUBO+IYlG$+3cl+3dq%XQ@ zapq8{()1Ck^!rplkrhVJn}Alqz-4k&B7D>ZOf){ygf4XG<}F;=qO;`Y3uX|In>yO! z@vl%PvZaD;<}$B6s zjQ^b>K7uaJXfr)Sdy4seNJ8A~n5)d_Y&hiqI3s%hL(H2o21%F=wR=m5HL}^0fp5rzIB3OO62L;bQq*cF9mx1k8&GiFeItcIecCkOL z`2dDH3bkhLj}^2$g9oIL$&UkZ$+(qwN{`zA zlDkQ6(1WE-6V@!CaGS-9%?pwrjR{N)7Dg^j&|p&aXOjY?nDRkxsXeXd?|q(UaHb_N zwXFzpCik0M!6e31qtHRtqW~Megarh{9Wk!Y8u{Hq~gmHFB^`N$S3^DG{V`Lc-vHl!7f{aISJ68k}th_dfTW`u#=SIO-MiQRfp@ zdwS8BO7!(6Eq$f*q^}4H4GW7gUG++Rt+tb4QT-Mf;j89k3$*kSu+794i#~r&eH3-@rZ6wqTn6j4?kVGW+|l*yw*= z@6zZOzaih~w|6%Ba}Jg3;a1k>3Ga;HRm$DtrT-Kwm!BlpDNZKKb?PHtzZAAynV--4 zCCidIM#{9bgwnmimU_GG=+l%Z`GQVp>bA0o8wlBt0rRN{jJINCOCKyi^5J|>y}-xs z&P7SvApY1xjLk7KcL9ohFlGP~3nTq%AHH7enkm%n`1m)UUqH5%EdA|!^2qq|>$ws3 z0>5jg&v`hiPu!-dwO9Vj-75c3q4K}pS^4jI<pb^|6l>&KluC(Y<$2AMfMh!e?PFoCXC*5!U z-wS->@_aos@KjeOVJeu_PQ?Fzi@TkD&>8BlOKkyd<(o*5-X!$3wD8&Qbe(x_B-csS} zW&S!@)yW9e^H}d8vgxoqUYb3TJB-!v^X=g*XV0B2B03I4QbEkaH(+jw;DMIE1M=i^cRp#Ne=6J5pGr*6^22MbMnxN8$1-_t&Y{Wx9) z{1hV1bY5jgN0`)npzxaER|;bnhi<*=(Ea)?fcx44a9`0CxZepw*LUA@#+y!DKzte{4jcfKPceX`_fed`-ND2+dzI>p@lE$+L2Ee8WG8M9mtQ} zqKS_dns{H=CO*?KkiQjp^jzT0$fF+gfluch0z?)>Nzv#U@AMf-98#8?7m0UBnD4&@ ztpBV4>%aTLZW4x5xv0|A(o{ftAbk*dXbDWK`%9ehENj%fIEqCYvbe^BEGcRZ3nJrC zSNOjE7V!OQ0ltrQh0pQ*s_-2^AhXSlMUGbh^1wNi&vbLI3D57g?SiK3_h~y@2X6n% zpD#>#ROL2>R#Yyy=Si`kUkSDPwCh{e_x^gkG3Jk%X};wxPp8zz1uv7 zk!s8}+|Hq&>}c9&oG&Xh{q=24dl?_M;+Q-_`WGo;r=^gw&Lv#R@09M|dqrqIb_-}e zT7c$#U7`6*hKQ7c3(z<)##}fnT*LAO5KNNKdsnK16?L(bL01cwy!z8u`hE{&Z%5`I zMDX*I(gzB#e@mW79F4!^L}Diua8&Xu5H6I>BKfTgwE6n~#$h?mjZC@|^;Z|+b%Odt z0p6eb^Eo}v3w*Z~uwjS3+|g}l=}KT<9@|K1+k5@Hg=T)#n`u*f{z2AK_aQA1SRB*O zi>kQ!UcecKsAs7^ml+i#!({1D@sC>g+3B z>Z-f^N(3{{V&71J@k{gQcL4vrqyN=etc`=d=qUVi3_5B*lKr1QV626bE%jevsZrT>fJm7lo+yoJPmXpJDQ$TYdJOw|eozw|emj+b1e3%L%~qmS z{8nB0;1Q?gL6K}%a{9U=)A@+~T7l{Q1;=!y_P!VRyI$bcl%KDSm8b0BpZ|KH{-5#s z(+R@Me20}Ws%e*b_owC(3(^*;!y+qkVA<=cf(*O~28vZN_(~HI4gk|2*#zQ0<|_T0 z5ruhn|IGsaelkBk4#W3&0Y$s&I1AU?l%_*hhe|J*ru3tUd?99syaFmdehXB5xPXce zrl`on`Kd0b$n6%Avn54^0{bj1jq^X;jpb8^+*f9Pz>ofyHC~|RIf|Xu-{tsVpLYxOwp**eaw|#k^>=2nzpIt>!AJ)_z|N$fDiFaBlb)na zQ2dY;c&!TM7soc**zP|Un)!#`Oe!y&(@wf?)^j)D0bUf|Uv`1i%i(-HB3|FJ^-zvK0%BjRO9 z)Efn1WFxzOjppmOcQow-{d0w;f2FNyFY^sq)3-$oE(c3%T}APCMS$`m?xzdT{6-$p z4$9Yf0Taa!kSN7S>p88yi_{Pq5@rgHR-%NxeNVIzom3D4kbGG|A(TPFQ7olC9ZZ6x z4O-l{+=BW#b@FZk;*X3Db&ycIUi@{g9U_J`ng};rAeR>l-R8#=Z4U1-J?9@0l&J1W zE}!BrQD+aJ`bdHHy)7`F-YJgaK1B{r71!&Ay3K=sv8Z~wH}Ss~RL{SkS3SMJPk4bG zm3LKw{@ZH%bnl=4zlHk0%j-|6+{^rQrrk1w!#??kaLB%{3detl5IAjl z;N)MsH_yc1nD3q!_}7K*DQ}ka>I29%rY^-sdemH3g#Jdi7Qd#@;@|9S@i${{ZKtZO zP#%dw^7YcKsD&{Q_w)^ALgh=I-Q6`ghp>7-H=D&w&~_u zi{11w`^7>x|J7JmQgdk5h zzg=kl$MfBDy7}Hh_im4FKG3bjKPa^LgPkq@NbK!vq?;dZv%ww-I@fTfk!gLq2Res# zh`@PDBs0*yXY?DdqU* zzg(#Q=e_=va=gq(yiBeMi+OaT!DOdd4qtbRCVs8Z#J}j;#NV|tMx4kpv7P7g4@*K8 z`f>lQhs3y`uT<~q=K0D9my@h>%x@Qf`tdwoy}p zm;P;{T~HyvzZq5}_|${FR+yZ{x_MFqL)6BcI`C=Mi{&49t3RYMhL}SMcx3T|pI3Z) z(sPd5tC?4O1@I>CrEol)`_SvOjj($44m)noo15|ZS4OmN1fiSzL4eFHFm@2oIGRzr zq@|&F1PWp3qYnN4zR~C02^+(NyRy@Ny3szzTCiN{FYnJ!av!;A9Fhra4txUWF0$y!%A{q1a8QZioMu3w``~j-F4=Brot0FOXyD zu2SP0V&$pS@XvpxQ2)<){cSk>_KqgHN{z3*MH9bXXyRwOHt`)+#-s*Xst9M$Fy`p$ zYE^z!Y%Y(k-zv2A6P@V#`&mQgQQS}75~MX69aQ6X8E;Z?gG)$awyF25HZ;$1LWSS?Hbd zqK9Y5OYNHRS&=w5Lf+a#sD9^vM5W)!0S3fu^z^;d)`fp$FLH2uDh@M;`?_l3zlZA5 zvE=mE59bN(L#>>+aLf9a4_Sd%BedV`R{56~D*xM^mH!*794@xFH%*u)g>0-fuEjE? zmQa199o0X3+nxWVZt#6e0lp7(!uJQSt@A(Mt@4i)D*wx!mH(&L+4%V@( zW+onS)U*EVv)@DebWI3{{%{X-UsaIy?XE_ z{g8iv-~K*9@sKVb7VwYQ(6h^H5`*nL#x7P4+-9D*XYw*-Z|i7mi?bEgmS)&OTUM*SDy?>{^(3`kR9=z8#JcwOp0%rf(ca@>LD09S zi1rkwnC*Ib-@FfUC##&TS!jYGgMDfDf6(nwKaSfR{$qtUdN{#`WtE*1NB8WD zj<^3H_&#&Lv)uc7KNqJL7#bev{aoz~@&!Yg6tWs@W2om^h`T_gd5_x6$EYnb;8+Up z(jOGpaJHBNw6J{K@GzzPxsi96(u4m+l10k;L5}bnI1?Wa#m5IqY)&W6_^#5WfwtAg ze_{vsu+`4DjD~e?4|KkBN=S~YEiua0^lg!%%Lh4Re7Po#GCn#MPOsre=a|d;sPb@* z6#{Da<2+YH_YwB!ljh3_bMG4s4aBz}C%EHz6P?FJXt{v3ZEihFwe&sh7^DiLW{I|= zrR5W(=tVu@H{Hj)&4VX`?%>(V7(&2vPrpYFA5wmso|9=78(S0qYCB595ENtU)%ori z3bwK*G7##R0=l9qRS|6S;a)L%j~Lw!IJran75C}ZM5%2}Km4pa&>}G%9W%8DlGv8$ zIj9;AJ@4Vy2#NFDGF=~i;u%ANc5rEsWYoz+$Y+>yk`ipyKhKUrcAUD5*z19(j{l8Y z`$|2w*1hqs4~=(?x&L^##y?zW{DYm1 zf65xq??vfqGycn1d1`Gq?B86d|F3xcsmHM- zJahXny=x_pk?F2L%?YTVWHtX#Y4pU2N86$MTe%G_g06D=sClRPuu6U90yNKeKtt*a z4bcl<1VGQV!|^5e`25(PN=USf?8Q(M~nq>53Qw zwZ+y}{b`5rYhMq9f2A9Qzh8jxhdLqr;nxS@50JPonU?DuG}FdrfYm%aT}C02jAhNt;N3XYv*$- z3%LpC?j!Wy<8CBJf{XG$a;U@bd{2H0mlya+FW^{W=C+do$X3T;>)MpGexjXOK4}M+ zC_#agC{d&TwGCfV>f;RUPG}qKhkGB@JSo*ktG`d`(p}DvbzHuU0{hvQ6((=|?uR}9 zo@%mj>PjPD+ifs@y)YO*(-|N69bO>z-pIA9fAp(k^=;(;i9!oM)fVCDhgg%Ohdt?RL*Ln| zg?;6=(VRp8`lol#4@xt6wr61A&HQsB{>K&no_eZu^`W7so+{n>)~8IDq5PpAqWteC zJ?2R{VR@ypj+MfE@4ffw-owXx?_?S9&As~{QxnR)qQg~a z^HrMKBO?3_I#f!2mEVqx7HtH=ZJtI9mw&P}lB}+8?KB&&V~mrzed^|a`BT9PuZ(x& zO))PQVpy(>I2)fe3vJXlHcz!~Eaf@Lo)sU_Zkmb>lU1THIV%sW&OX zWm=l+r5iV!tJ@7{y88Q$zB_w+ zb@rH8??^A}vG=hS1Dm1O4SNEskeSN%h@F-zi!Vv5#LPd)86|wkRli>mZl)RQg@L1F z&3mBtQTb*beuA}IxR#(eQ{GRK%;-3G{kEcaKvSF_Bc|ka4^p{OW67SpqwkCzbSS4! z3CBFol&eV@b-b7*#xeu_7%5!tC$<3x$eSpqW4?~|9y!G&$#DfR7X~&vs!Q9%H}##C z=6a;WZmtJ(vf+_ZKjCd;lcPf=MArfTKJ*UMfVZCz-VV4-GRz_F+&{3FWPg4ALT2eE zFai=&_LDeq!Jj)&|V~_xQ7^GA|{{Yfu}tX-d(AKd_0)+ zv?<_li&h=`%s}d~SZv7XgtZ@KdBZ1r z%#NNs@S@!x1kcCbN~viB@eX!eNb}b?-$T#$VhB)2zc(VvByPsqyO(eLfDy2N6jqn* ze?YIU_8vW{Grmt)W@^5@qwiE8RocJT{Kkip^M~;+QyqChu_zXSjpLoi2P<$vf)mM5ixt94}6m0ed>E|>+7_CYGCx{Q8 z?7jP`(52EdW)b#%5e}06@a*p12gp_886QEtKc%DO?JzuO5FZV|lX}qBZ?q%)G}<~X zn6p+#d7E)yp4Ef>Z{|Ieh3S8P-(9_T;|+gX@7+2#r^KNrrF;7B63bhL*;3h~Z}00r z#cRj_h~cfzv0V^L;q3R)|AzW=%98uh>w7_~4xgd61B{Agvx8#ExM{<7w@B|XP9Zil zgs(to>1*G!B`!$N{{QI`}V@>Z#KCs5qzZg_#>Xib+GrirX_+!ga8elY;ix>Sv+6jD4Bla{t_uR zL!r{J@0Yh*!nxaOkbUc;amyOm6>!4Vl)lHX^UrP{J3gP^27W$U(}8?ztwt9Fr-}vU zf+PE?ko|;^t;J~0*EXRF)g4gYM=kKkU(4lPI%!~A&krJJSs(7*?_&BuAHw~dht~BC z-7A4xTJQ0k{^y-rSd}E5I^6vs+F-K3lgk;_z240#@c<6_z9pUbb&xeRDFTX5y6aAp zw6w*8yGrjw0wLQGMaY0YMX$4XaaW0yQdkHF`tV-h)Gy5lI;QGliZ8nh_|1eQNDZ3) z?b{zU%SrbqHfWwJ&-36}X2si5N;~rB{gKA?PK_)01YP|W@H2`PSW3PVjNGPaV`+?l zRMp?dsD2F5*BexQ)Iiq4$=AM55!ZeWS1%fXW-s~h&_%>Ko)=3?yR6#TdZ5^v4J0Li@QI((&G66O7HjC+zS~zA=>r+e?RMqJmDJeAI+ zMMi-^-YMoVtrGe1B)m9_{5aN2aQJC1RC18D52h}TxII7uWm`|WN~{Ws>B-WgJrWtE zcj8i@W&`^$JyjDNO+t1CO=eH1k$Y$aWu^3-igFB;&PdXwhcEP$zQS-(`bJ*t_anUy zP4^yth!PK*lp`?p*_bqv7~MAl<9=nlvZS02r8-32Xvj};^*Crz?)K6jk^a3OTj|(? zK=X*ws)4}tHwH(XxDq}+b2^qN?wL_WdkCD~( z@L5MZuXP3nkUyb6evScuOvhCRhfQYQ1uCUhnFdKFU~Uz8dG8~=Z+Z)N!+uO2jrOyZ zX`uH}U7*7Zo3(O`0g>Q6)<^nfUC^T+LP^&pprRAsU&4qaU~|A?KYqlVaG&$~rO2Nq z_FsYxZ^`_(C8JZ`hR-8I&+UhyKEygD9Oc=;dfoyLd;{s;4nNtu?@`aXY!vg`_~Py> zeHlvxz4zW1=T&LreWl;&;T%jEz;+I*>6_dr4B##NCDs7ugK7^wiz0gze;Sm?S5H#} z)82!$6=c!dM_z68apfgf9^NPi^tHcmYQa@pFO;7aqK7_ZC zQu|8}`U>ZLYy{>i&%la)!G1o~uf!7;zNBibyTH4jErd?Ozh_FpkKMjf@IOP9Ti?9V z#Y5Ps%N;rZF+IbaUwUJY1hna7miIp7z?R;|@gq_QWDQsr0v&{^5k+M>()X0T(V=Uy z)r2k{mIgg)qO3?Q7f=|OTXZN7x;>OoMK zm^<_raPd*8$o|rc1GMyr=i~p240SKl?SKtA%N2*SfnI9bxBo{)S+%A7J<{!SIQs=Mh@%e|+%NEB=d4-Jg~6yGI8Hd3F+zPM_>& z>gg}tr9!|ucyiDlKRh^C`kCYe4+r%?J#fI6ja#1lUqj#rF@5_wctO6KXZ90^7_)CO zrN6&YHEsfRa#r^_8;3}?51&e z?#TUkkZFy{Yg0-YPU_>7WRk^6X$~Xu%uvYu-lk`lu4{F*=Y%PB2%wkt$};=->l*hz z>4nYzsjE40<)*gU=|4(sE$psnJ#iUqEv|5i*fNV2U?2_Xt7DxMYb&>QlUr#`KcvJh zS8j?cG$~2Sgfoe-A|gB|vpl%3HzBHLSWmzf(?W)2~OQw(dboxfD_OBs13du4I*tlX-E z94YtHI!;{ypgct!&c(VyDeTEqi?*2(K9CYe7~vaFyj{NHHxAe`4JG+V2b+k6r=7TImJ){f;hd66iD+7My>|WVgL*|p*EARbDfpUlaV5{m{EW>yFz9RI*B(gW8KcDP*T&hs%yIAnJtMs$UiQdNrMn7Tw zp!|5RiGzM!9YQS0Hq_B>$5n=FdE-PB`%B-1b#}D$Z}{F9!XObM(6lht+xK1xF44xr zzU70o+kes_3 z0C~}>es@8Vm(vm0I3QuV~^np|;HewJRyKUsHYvToCzsjsO%j$-ViAm{SOlXHi(CdQa<#LuN_kX`T!9q1_Y1kFK&}jRt#a)rr1LGk_dTkk%@n5~ z9<>mB?1dpuQ~i+7S`zLtb%tCUY{^otp{5PV=idI10Hjg*pC-2)r`x>yf1qFPS&hzb zy0H-ERfS(l!+-dwPBCCm9=3?Y|H6otlILF+*8ijx_s^CQmR2_wm$qJy-mU0M*SSrN z<`RTC-9=SAggm7Tf)q+hU!(ma1QfEyE-pFBO!`OoMtP)}!89-{_kSi<&Qwy{qttVp zKX@bgpA~bhGDs~Z5~<|DNa4;smZ&mRe0Cds&T9K_av%N>Ac%UtB_uF4)x;6Yj`nc>vHQaJKVjcr(N}!^!)T&$pI znHv-eq=N{}d|~8OkMGbd;U#yu&Y{=@wc3unBZ5M!?{CCx;2W!Q043>UvWjD_vM-rC)<$b*%-mUsH4qW&{VQYQXIi`6VLd zf71C#QM*GNPp*M1Hf0_w8n;N>o3KkMdHnWe-=9Jyz-Rc|_X_5PoU2tPVvZa3<%x$Q z_V$gK_Sz#8n*cmTdg&FUwy*DuQ>KE3SkLcejqtDuFK*96V&{T+rxO_7;8cBwj=9$P z5Q@?W^~fYRXn~mNqa!R$Vh}1pNPq7e&SL>^HgK*uiISvJ2g`_q!}E8=cZItF2@XEBn&Fi4up6 zH0949;;P4fAoVHD?*FZ)=Le?-Jy*yU4w_Q3!WXY0E&^SNxP_$M3#MQOv_E?}>~o|- z8&+F&W;hrnzR5-0f1%*`jlE)C`$tn8k-B107V*rRa03F7c$5^=?8X}wZ*`@8Ba#A~ zm3!bVSV52Yx#RnoAO;XT_>tZW$`oxzfG*`kK>EvRtgLqo4D<|e+ADgCB&>dd+|{-1 zcQzXw>f|0e(y#sKgK%$O5E5xm@Ay|n{&19H`s(mzRhi1V`k zGO6=dbmB(+-MDL5emi(-5I6T}*5nRu@&(CCj(I2e6|4@hDtD^M(~F*lZrJ7Ppchqd z=h+nKMff=qNJN)?JxAe`gFw9R&3IUdc=R!{u~SDMyC;m0(o`29oG2eT2C&BIwODaPTQ%Ast}h437y6)pv~0&4ZV@JpIZDQkP6c`D0ET*=rLk~*g2r3bW_>*wZ#FlZwTtzQ#kEE=nVXubj!e#kzjNX5i{Wo2 z)*+CS*@=nj_%0#Ol{T|g@FnH zP)%+61<*S(I$N0^A4|rjM}`?LDp@}p@L!&p+gz(_bZjgxR&zZo&s`!?j<#x>Ym3R$ zRP9oAqylQ1^^Mm0>b9CapDgS&o9u_HZPkVM`B|faosDhKt^$)AHyX|D)?O)UT~Ij7E}5 zxm=rPTi#e>DY9W_lxwBo{u)>$rr^@d5 z4SJ!{@r&t^>I;bt{M_VBjR6^-clkp$8q43}!O2cw?eb-)29Y5x))aImgf{ z+}v2I4JCwQeL?N!W^*waxj0&$dSPt!#_A%&3m5`>40Ve!iHLXBgxtqxFU_kvCJ7=^ zp~%UZ%Og{?KQ~etnI4}XuOtS!O5mPoY|*Tf&-7K*521=Jr#6>It%K_8)L5;2sZy!U zk5A9pkd{~K8yk%^^)j|pot}fh^gEnvZQg7&;h|)7b$hlc*eA=hJHIQkH0(`GPRvek zE;f?ca>@_TWqo6ro(YG>p9qmKDAlp)X&wSuY)_{!*RJg>C9T!v4UUE0g4mO4eYIVn zftlKLosKqrOyc*FqJYPZFS>1z*grg<0I3xOfosf7>8uLvA#8QE&;G1 z2N9%2oF~&`le0m#j_e?08fyp#K z%PEBNRO3ctEvd|xYa>XE^?(wSCX*YBjooDCT61=(?DBxl!T2pic%{B^T{A);EA|E2 zWRP5(s6u~pqr*9pDv0;F%IpP5WO{Puf`r{<^@`D$5ZK05L$`V{Y%gq{xCKL=z162r z-|EFV0X+^IYJ|@>-+b)KpZPFF%viAPTksuWrW*0}5Rzt!_9gt7G=WMy`5U64u9NX?b&dGa21!G2HOh*6Lz2 zfj+Xrz>m1z0+`K3z2W}6vsyW;y*4?Y%(;XS4JTKSFH?<;WyrETGIOR@Esy(`m0hM>BfT({s45fVHe0tAR@c_* z5Vy&XD_6!Y_-By|nXYFc#OBUMlv6=r0C~;r*`4jJ9fXSu)ZD<0Ka*UZpRFV_mnX|i zI^vV4#UxW(+pFtCZN1gt4JG;=me7kM7N%J}KbvSyGB6F#5jBk(GeTpzSzn71b+R>r z@^ho%G<0=bbNl%-XIudhq9VY|0GeY1-q4GX6Ju>JZMH_tjjc9=N;Nit^ct#7Ow9*j zR^a_8kJh1BpVP&o<1-cG2cw-zqrNCT==r(vfNfW>5J*v{;?h4zm9_cG$V_!Yf-UM1 zK9?tX{b^@QBC1xm?kAHu`k38lARVhxtJtTTlqJ8jjs)R1KVBZLjnC*s1;$(SnW?tg z{DNd;RL>}Y4l$D$s-|Zzk0*=u1zLeU%9Zk*N!?MGx=<;aPsE0ZF71l2{8A3h&drk> z3pRsH4lkT(BaXoCYuCl1K`EYJU1#ojd1GOvi3<4cx@o&ik5jYd7o@7CgLK*nT6$J8 zJ%p&%bmR!nOAkqXSM4&T2%yEbyc*qUwrDxmBiJ1-0&!v^2&py&auSEsO51p=&xNlv zH-ib3*QFYvJv&=cq9=!|Hug3Fz-J4Y^p_4gGh3UOoEopbRAs^jw z>_`V_d~CA%LXGY~g&LS*cWT@9)^%ITL=8;YLFLf*D~;t5A!dHwl*S9_j#71o+8+!@ zeSI9Y7zNc8l)1@WX=!Js=ESkq?QK`rTbhf(`xopqTH7{-<>p;=IPg$qCh)Y`8mTg5 zLV5nGH#2sza$efI{vhrq;l+_PG@1=iqvnUbd5|iRM|Y$MwM)$BXD6sbzr*%>CJ_{Y z+KntAyq#90f$E~_O6IS^s1?+-Nh~`fO>{XJcYb7gPG%v$h6%nQ<~7->v!l zWxX3ikckiD+aj&cx6eEbl@wl>#rS(}g~`l5oqZwbl4Y?62&o#;tSqkAn{GgAa7Qnp zGz8O?2?29LTG=|BzYyjj_1Z{M>Xy~4ixdNm#`T(HuTfu8aZD_%>}*_jojECE*#+XX zVK5~nhl$zI=f}(QN%i97gj=|?<=tKBW^p1I8?H&t1kSeJG@2&WstffEakbrOA$W6X z2_Dc~$79r+oz0zA#i^@hhPA{-M%^y#C+BN(E+uCMJd+c9R1T}U-kRRZTpxs~jI;qka!4cK$X25ya;8d5<5vgX}z55((J zhgu(5Ln5wYP8%JVMQXhLwp!37HP>z;%EQ#3P6p*_b$rSufM=YG9cfUf5F*PXbGtCj zwwqP~*b@1u%`K<0>F7*)j=Y%pg*8vu=EGxsgmvjZ`l>4#2mh zhonvbKUJ}#QOvxH>5NisQ!1kq@H|1Txq^cMzm}%EqPFv^w2LIaaz zbHivT3ORGOX8tRiZg74TH4)>4nn{ccGnY=3hn_j%yMa$ws;$$f-*)2E`oh-E+ZXU= zGO3T`~pIJN#( zf>;)}PMliizr~yN=F+L*6Q^dmTSA|zpTgW#4_e$W?QGa}`Yfq77o-w3S}mI~N9#L_ z6($!W7RD+Vc6b_gZB$JGk_fZ$fw*3jBj`n_pPw`N*>AGCD}1I3^T?!hi_t22n?zhB za74}7Hs+o!&twWnAhiI;Otm^Ex8U^hcCsR`(D~@)&V<)`eYbW4gU2|U3|j^T z*U?sGcXVfIX>J>56&@G^1~2%qyx`TBktOQ}Qc!1baRo2#)_nS%oF?XJ#x!X*B#;ed zl50#}jcZb0X3O^M(#Cq!?8ObHI2v(89Jt0KKU$U9)mcVT$sF-M4~>B{G(q)A-Z4yI zoQ&47$qCSkUT6~wrG}zQ{B6#;Iqz$SS!M3ID5Qh?0Q|^*upoz^+em1d?mC?L+t z^0ftBEn;Z8wKccd+Aa{3t4?9|aHBx)BS8980AhT&auDd*JO{zgkB^bL-)xp-Yzhln z?g3G7wOYPVv3Y)EvOK|MfG|wL65uc{oApr&iRW0~N_9Td!Xh4>j%=Mmtar}zF&olq zdDLk?jI9}gw#H+=h}a3n=1OIfMIpR~7_wUJ;L-f-Y;AgE=B3&!_K+K)d6g$jB3EWv zprKEh$t5Bvm|XUN=~EPkskJwz60xT>7CGQiL=NRaY#%qch1=T-u17;6AiS^(mp{y%~C#^XinxCojv{ zOe^PW^OXy=@+^}8;wsn)BIY^iEs^MaIS%DWt6i3ykbGLqt?dk*H8Um*667e|A!@Bm8BDXu zbaixM6<=FyQLk;0F1iPUa7{9JHE z2`;stI{G8^OjXC7T}>W@egIz4Xj89TO;jbQ<~G)89ayC5Wj5S#$knt2)0EgVr@RT{`_&aP`NH$hwdBEj74m=d56(;O6nM$F)glW-h z!_{j`JZ+OfFude^M7wh2%~#Da>kQixT!F+`NwpRJg|M=#6(6*5Rvr7im|Jc(~k{uqcd#$l+++ z5uemZBF9*y>L3oB0FAnw_oqz37p8KvsVvTjywszXu<$=Z97b?~rv<`HpPSd^QhB;< z=zRFWmxe#r_aH#F>#HcFi|gwho}npZy_>m$NO<)@@ENA~%&<&PQ$mmwbW!6_jCXB=aXU(O&lN_fYFz?>bNbuICD)^OBKQh(PR1>O#%xi ziC>PDUl4!NieC&T#DvwhS$(pJbG(v{k*F)soU2{cHLPiVb-=bm$q?*bz3Dd|7p8UZk}Q9X~B;? z+%}gD$GJ>0^qDq6z(4$FZrF0s}RTs zOS((V%}#UILciv*kL71bHDvWc;i+hPtsvjsqE@h`eE!;DJhtSm9hLGEFe zTWKv0CDO2h4uwAbObw~8iFBHY6v=WPk0AbfBjuVaqeU-o5CW4eZ)P#Uh?TV^@@RK# z29SNJ-R9DE4NC!f78e*Uh7;7%lsOsq^HI13l|)vHIc61^Eg7A_ zb+NF9^0S!OY?xbOUv_aK2b8>hskIVC#Q4nYr3)9a)+^(vGcDZx3+|z0W-s>iv9{hqAe7yJT*R2k@HF6fu?L- z4q8{+RPR&VSb4rO73El)QzR-Pl6~^=qwA~dxZ)I;tOcEEThW<@SxtFd!R?83x`^p2 zv0@RiLD?Ov4xK;!wwgJnQM_@_4m)^Qe;(~IJ*^Qye=E{XIm{yR-gYXLTJm%iFb!!) zb(P_2o{?m?ZMg%>9iYa4#!Q4TPfiC5CW_)ooQ#HM5l@G~tLRZ^Ke(9<&E|GYbqY-k zZs{Pm!>~ttu0vl^z=DQ5zSqNWM zigiW2NN7key4KpNEz17J1HXuZr1!}7Z9E<8ldZAFwrvE6AdfduJL345;EDBRMMJxV zqV2c{UloWXJhP&O9;u6YyyYqrqc?etQdHkgMqeWMfG4YTZk130g_8sRW>XJ^6c$NQ zjkShZ!D!Vb+M)hjsmxX8lf_lynQ|XrnuNOTVffgty}hy8P3@yd#$DBlr-pu9#QT|Nqwn0KLxCO=+<~UP_0=RQXV%BQLtWpN+Mx=3d z)vDR3E!A0>us@m+ms-BWA#ixJ)B=LwYB7??T1-vt+K5{8)L@i>O{Em9{(9TV|1~_3LkA*M_>K<*ad}gY(0o`=!8|0i2Pv7Z-S|Y(O!v8j znWd>h=35yR;G1BRs~Y zeiu-{B-8OlE?&5t&f(n(7QnZNUv@b`d{RV4A zGcwjR=PGu*wQ~8@j6$K-DPjE}e1&kQd;v%6cf z0|(MsuA|PJQbY7q*RhsLM?>Z!i{DGX@p&^op@gY3@t(S5wG_~xraCtWf&Q5ec27@UUn*<{NMopUg$9lx_ zh<$H31_uZn9=_-a6(pOKY$?KYeC+Ld5qx7>ZsOL>M^ zJXuv2eKhpt{LRf6%;jNUswOQ*iFU;0s{wBwC2{*0V|yq_O9^eo_N*oA0&ra+f}x8! zVsw}pvAiqDDiDZ<=RDj6gvWMbSLdYz6nYwIEtW)BEp!^X;A3QAf#55nlUUaGdI3am z#$>Rk0JV=)d%udn(2TQWSUQXib-_v(S5RPH%*Pf%ycsaDmPq;Pzds{@101%?o%~4a zHH+b4m^$lBDWUUK@zbt@XU;tNfFg)|b0Z}V+cei%uexEqGvk)no5=CnDkNEg=Br5H zb7xT^x7OCSlC7J~g|+JobYi)|2F|(BoPT|GZXQ>lhnhxO;Moh~FDcZuG78;U5%x8) zYB*hStAHM zRxXL8U0YinZtb)fWqgw?rlhI@U_jPBUj8b!ntzP<68HP6ja|z_YrxU!hW5wZKGI#( z1%PQL5I|_&ou_R8YQ*EVNb6a*uLWiF)3~1Oy~}?bkm!gR5@P6=Ax7)YASzB5)sM%5PG;2z{&~A^-CMwnCO#-utdd~_vwesq< z6zgoqKY#URAQdg0hW6RxVw($Z6VHfPC-)TALPvlS_0 z2jc+wa;{E@JwVJf0orI65)GPl=jNK!FR6{?$uzODq1#BKvFXw1$uwI|wj(agXq>39 z<1&^Kqoq5zp%=4qau3tS)WPUbzO$)n9U1?|*uZ%$Rp*sOd zf@>?clPA%%#q>I{+CU%Axn#3$nBJL4{a-Ld>KhZl5y;Sbne-5&$@T_a?Jg^l=eOZ}nikOO;m%fcvGAX;35PD*Ddc06~rpbm?qizjAmZHCSOgg zCsg7(nnCWD?d`r0+Ue5u`u)TF=muI%I(X!Q+a%0WY z;80D3Jwflek>1?i1Q+vBy_J!n+oX5AtZVVZ0L*@ zVuOLZ%&g6Zga{ujmz*~sd$rTLmLCo1JyzxQ=332$!C6fqiLr1-3l^!E)ql&O5^Lou z&pr!d42$GxfG%W}X03s>ZjYn1D{=>8D0-1OlOrUaXh5@SF#mHXF+R!_&j>+S2(k?@ z2-7xM)QJ(~s8t>+xxvx`QJ1;CxA93R=R!Ib6YOn-3*c5JUwMWZV%jODh@1cq zPeaSbEuro63c60CJ7+LQ^Gwg&);W65eXxUMM#T>>uz{1bqQ(zYa zK`EM8BOpGN**K*sIx@6J@(!ixMamOF-4kmU>!P=jS#qC+ONEMcg@E!!1iOJ)-D=>5%r)e-p05o(O%#GM=attN2{BZFkk-90K(gl+AC#uF zQej3Vl%laMc8Sa7VWBPID+-vGN*-{N_3PVi% z(DZt)Usb*;W0@%2hAn5g(rW}dlONEZWW!OLoynKlSj6*LCZNX4sk3=h0i%MK!&`Mq zd$p6Xx$1Q8Svp8wiN!TpIlp%-iB@8FvM0l#n(PS~0Sx=u6Y?pxJ$WWP0r?j;vyK1d z3@qNH2umW-jS&a5WzgB6#>Ylq_89DjnvGM_W^IGI541Hbtz?UR zWmlSW%}vE7Uhu@H=Bu!{(jZl;M9Z5{fXizn>M?jdo->+g;Ts!T1G}Z>2|*wS=)C9P zC~G~t;!&u`azd%SvIrBw@J*K@>AJ6tNLav~uJ2YBmE8bZx;!?ag`nb?t_72peAT_iHl)?w754Xn_W zz}reJq&gU^5VU0^NgokQ=vF8~3pnPTa28lpX^>lLrV2e?X<9|oxT%yC%E??}&+xgq zzF20BsYS%Spqi<#H-^$HGH7XB?R(Ksz`S6}s7_0IWZhkg(CvDN405Z{ywO-Z;|-4c zbRTN4rYFZD_P0bEDPk`)-7Cc=AE%BOnL+on@EZ^zwZwTQRBLZVTw9tT!$Zv~462?) zm~dkU=*}iaFNT89f%(t@bXMLiL_ct#cpL9*r1g!7-m!>!niBg;L2?8bIz1M7q}ixj z1(ZOW){x$YlCz@tB?UUiHhr+$Sr0NdSS6=7k<;3dnBq1G5+S7qSf{yAmvqSOwxt2E zrXDq%BSPoKs+CFNPoatpvQMs|y(A#h_|^86pM2^!IdgaISb-0>)P+ zc&|2WA};9p(|8=*+DHIrQzXQs>~e?XOzdzon<#W5vp6y+3)NB1x}WY$3Lm0Mg&c7t zVw3EP&ois$Hb@r-FS$;F8(T4paIbB8vFRXR-C#+6)_OWZo{Vqx++$Y&ir~zD&hjLk}V#c1>;)3SeeEw6vtUo^%|%sO;RtieqVWUIlHAOq9^(sb|4d8U z3frVy*6Ci&!#XY_ zD6NO^kcEZyrmu-P8UnxMBfj)P@Y@ihN31H(NgUU-t_V}Q(KV_V1&qa^XGpT~5f~w4 z)L;yQ6XS37j2>E;qQMZ`X1^)o#1I+Amw7lo2}2n^4jAn6rIU?S5=ho4xV@q{QD)DB zFGWdXv%S&qL^`Io!JR8iEUcTrp1`Y6A;n*=ukRrL6{9Eq3BYAo%OkunH0hAo@S?8^ z2PCHQ6g}~?$g^bqGcjsW#-UHKjK(tK_xLoG9B$Vr98cYjLS7-jt@V(;K~0BRtQFnQ zDlJ;dYkH#mHQAHcP70xMV3a{%$5E4ZGnO~e5P8)GG*Yn(gf;}E-7qsz8daekNt!mQ z>1Z*N4-q=d17*et5}@O0hD_;fz8Wh8#II5jk$)(}Me-xhZ;I#G?;M^&WTay`NFn-Z z6fj#pmqW6OkOC%P2%|BD)wa(&_k>;Kc}@l^fnXT(jP4_K#teKmwFCzilSZ3drJEl3 z5eF!Ch1v@!Pzq}Q*2a?o3K3G)!zhOHf?}S0D;X)Za-Bs}20sE*wGh~gY9MiA<~ zb;rX?vT9=U4q)txY6ayODjX;8KW0?np@TTINuVPaOTnnG?#CBZ0tn||B#p@28EEl?oX80BG3`p$ z={OC=kAloGOvGnd=^|rOHZRe9l1ZtpyPnrFHWXTd@*Anq$s#}D#^yESg$ZuacXPxy z0FcV~p(0%i7(5ruL7p<$s&`F49h_K=1CDx7=(P`bstiCHQM;9vBdL(nM8?`KP`wZULj#ZPiJ_QO(MLCV042F+}^Is2F*GK zC$E#fJHs9FKI`wb>pJZv@Qp9?7atMbu4T>a^EN!@)Fk>4>W+c{!oIf19_8%o+@Pj3 z+4ZgQih2U+%RgOA`9fltCMhy%_3=J;H4lJM=;mKD>7%Q)dFOuV$S5}<*cto#I!e| zZf0;*@S$soNpaEH)8dflUgSt0Ih%b@Xe9PNC#Vo^NsCHLGF?UbavG08uuEm4drUgy~+2KBp{=#6>Ay7 zd}LWA4F1I{eqd^IExFd@YzOj2TFKzt&sAAOg1?{w30$gg1xH6GfQf~hX~p992GKsl z8<^IZ3z&n5`kR zg_gmzEUFA@$vPV9<^uV@o9w(@Dx45zXJRC+ZQd*=OP+BjcY;__(@ycljy(=)ppa;@aPP)mQu&?+5%3NYMfosxX%5~2C?PW*$fm9 zuvA4`FDHwZvBo;1`gF)-ZLNNd*dHy#;&U~n-_ML$s%>f;1jWMHR0@d!Q2Me%W}7AD zu35cCV=AT>4VG#g1=d@A>8ndZ6Qg%MpT}oQ7}ADwnzzNDR`C$5U>jt%oU>1dbgeA>UYw!Sk*-1vUO%M>)2Vi z3oF-aw!$Y>jDF}NLEC!wHQn8`)H*l)6Y|B@mRiZR8mO%uJ);k1^%df;|5Y4Nx>&HyHDPVRqX=S(K^O zmN#}5*z;9eBa($r)?*QaXH|2Q`owvJ>WccXM9Rg@nI3-(TUN7(5pYt@T%+(^>^ zytc$WkBy|a>}xhtZzUw1-$*7}WJ?;~E#IIy#m>7>>`X0qVE#YU$Z zTTHiV$Q@+!uH7V1F9G8)S5lkC)vijrL=XcHCB?gRoR{0 zSbN#tb#{i4)85k1;ii1Wn}mR<%8oWwFm2QTW=L?#hmWHXXm6kaUIs6TJuv`6QHRZx z7x(r=&B#jTk#=c@ZGDq7@b%XhYA6n4+}# zAgmCh%Xttn^xPhqikF2B$GS4EZKJoqOhq2aQ!_?w!aV5POLIh1Bvh+ErN{a;&YoI` zAt?q!=uG6+;Pyde81rV%aVs2=nKXBiCpnJ9w<1*S5WyI7{Av_XU)`%VWYtIM&_TS`Om1vFG%*gDqr^$yxL#r{ z2(x7$ACqZzzV*(E3AvOxz-z^}?fQW!p0G3+b7`Rh2c@0VrztNx5E5r?1n<(wS<)D7 z=$vs{T6rWU^E(1=lXH%uiFJ+)WCN{4hZ2rdPYe&7^`Ob^G%;Zf=2|>^o@t*2N%RSF z>)iST!;Yf~(<2OD>zReKoL0EBv3V+(LP_oBLX)$5uZ5LNZd-QWiVxPVk@VBF3)DFF zJ4*3bzebsx3$e&eGOT7bkl$Z9L6h1JIvz?1w=3*Bl6u1J!sh1nRdf~Quc3_3QdGqD zkwiMPx3zFXHi{Y&G{6*_qGia=Ra`?=Umqat( z*c{|o$Wt4e8;w)ShBRoyG3e(+E^ZC35XBm*pgEv{f308j7AHflbMUrd2ym3cl*0@I zLWUh}FDuTnM!pRYB{Y&&FR5*s?l&+n*!G{pJqYY1paq?qgTanRSZG^U!>lDs=Ul6d zlk&ex7I^ZNTg@*o;_S^rH5+^%DMK+4LMPWXiudGph0ntDE9EOj%Ji>1CJfe7&^jJ4M-KhWxK(%1Pzl^ zzR}Qm+3DeJI&3xbIo0aTW}Rxy0IOk3Ueg&*SZ4MdXy|8lAIiNlQA)TC>KiDr{d+VS zp5-dk1KWJjuzeiOS0#9PD+d{Th?)9d84?%@ac;kq4V0pxHbDeJ7+@}6xe|B`tZ>wf z=&WgdiZ#hJkC+S3G<$i6Y8uP%6mO-Thr0zkWV%*UGDL^KjQoHG{5=Rj6PiwJK7Cpd z=si|x?nsmW_MMgAs^RT450bszdTl*ZS@jD^i_qZwYpU2>4*)JW&`)X3M7GELSZAANCoDBunOUBEo;>$2g4U19% zOxmZjopuhOtJK_cR@*?jARN_r>)pvt&5pBhQ<6I!Fq4YN1>zE3PoED(!9s^IAif>69?eLvtsQ-&k1t;to4f$f%HxUMH9LQi1cWuT z3-d_U;26D>fYINjtz>y^^BOa(&6Fm15_0?N6JGi^P2Vf7N8k-dE=vti_R>0QEz8no zs+{$ux4tM*Te?|agYWHCP=~zwP-#0N`BJ(YkuHc;!v9$n5Fe-Q*B8EEXO*}+>qU?h z(<7X-qvKGME9?ck`07Z4Fyvh3AoGRfo#PdDCC`!%JVi`G7dVtefNVGxKqD4iu1&+; z<&nyqN+C177!R(X$ZcM0fytc)epX!k^0L#w)c;rA`@mOKUHRhY-g}Z3q3Y%r#bB=P6@x!N5N-RC$MDPs}Jl@B2yTu3@-1o=K3hO}J-a}a6_MRL*n@(rO zpeb<96S@{B^sOxz4;GrmvgmCBZMMyq%X;{ro52rreLsQRH?VhNh6uZ3rsq}Ps4fJoqp#MG#>HqM$c~R5MaB4!xZ+NQDVY7FsBi?8jpuj+Ml*~Av! zfXw1L+t-xE-_}A+0C@QJf|gdir*=y-?*CzODYZk-Tk3;0Ot1$!u;+~SXB_-i^3r7E z7aO<`H*olnu8>-mwYA|ERU`Jv{j~NDtcZnS!9vv-*2Gra-9C#koR6BinsC!evfI`Q zWMewWhfD*yt`-~KtXh~GBNDwjU~TPe4CJ(DG4@Cy7|rZlT@q}q#`(@@S4{Le>w@+r zcRxR}XP|S%Y)r86n2(=sDrW1_-hs?MA=A-==EPDa1kS zkK0sToW$aNLjIBDOiR$=n!1*E_H;PS`1AN+Si+98Bdppb*^Flw`^aszY?+`Fo@q9?&_*a)sNCAwvFM zb_+a#>e#=Y%|D(!#wm0h=lA%;ocM~O!V8@t!2C=Y;v_$g-?AciV+_CK<7WlZN8op; zL5{NnxC+;XudJx}jw08WaT>H{WG*X8#&;D3GHNbyk`>4!GB*Q{QurY7FkpW9ISKq4 zej#Udd`&E#9{kdwBB$&E(c$2SoaAvsFaC_XIIEC)pRtD{>1jbCNxV2K%7iZK$`<`a!E!w6wCx5ztsZ>hc*~ z)@h_a6DdpDV%vwUyeX_d^q2J0NN1TMOVUw6&mNXv>U$jNcY%LW(a_cTYx35*_a)Y8 zdwl$IC)sJ_h3&z%;pa)vPvCb_(TLT9)+E;!+?T&D?|yfE;x8bjtY}O;JGf}XqzimI zth>TV_Jbeh@!LgYCI8e(UJTzjudJ0}S;JCJa&ttM)N3DT(~Mr>dinPF2z=K1p|PK| z(}>|tG8GT&CwVGHfM&|G?Ie0kLBk3q~`n0AK(-H4_xCUw?Uri zd(=M_pU4Ubz2VQCK1GKLh%P5dEGIeZ{EU^c3>&le`w~kYK%2pGmGRSd+gt z?>={3;(qP7BgZ(&R`5n_m4 z#Wy-h7j$W#A;5=?923We#-|M~a?yu{eiHOnMQ^rbXC%`2sVa4nn@m3r^}Vv9)3Nxo zgNuejlwZ#iH(A}H@yfl~NtQyEq)XWokgm!exyUP9=zBo7?P_!%c~^u!^v|8-E+f~_ zC&njQh7{8HIRN@0{QAB&cc63;EbKlrc>*v`cJZ@*Deq)a*1PSwgz6F@65w4kp=aF+dlAiL)Ev$Bu4Mu*Uouy#R%nU9nq{HRXb=@Gx$siB? zUD}3xOz%fJeJEGHgP^YlUHe9qkN7nBwt8LV0D`D75lL+lzFBe^)Tr}f|+nx(cxIl z;G!XLP@R8*%Fnto|DKsn@{~z8eKXZ=t7_sX>FZ{N#+i`_v>awaayKctDO@vO&1@&R z&ZgV>(|&4XW3<+3l*${m8}V`ca{{tTU?0IqcIX>yOVSJH*#0@m&a<;c&Y`2{<7M8P z@%4D;kXPhnAcy6^#_`pIxl#$r+;WEq zDTlObd{g*}EIZfnePd{Rr*#f3uMhl{w*K9^{#);KlKG&CJ$3*~+z|QF&jb$!zxbKt z+ZoBX%fq6>Zs75zPJunx&LZ;?B~zz&sdV}@`A^Qpy3yK)>qeM3-b>%Ht4BM=i(Ff8 z^x?&}4^KwrMQ4aJ<8>|^?Vl4qKyJs0>M7~kCe&Zj7vNfKMO#SvIh!6|?6t3^xnA3M zsbjR6g|Sz=wo~WqUrfNPI|WELX}t zIM4bJ+e_$ls>$9uf0MV)k1v3fm%{aFFlC^<79iw$GId+9?uR*f!KcCK9Lx(!kVe`e zlwaYZ4+VX%tY~P$jkCCykFwi&TLzN{7ZsOXkn-~3$Jv6f>a!Th7Z@JaP0D5QQOq_c zJ=x?W_ZS($`jYAUklqS?l}_>PqEFC#zT9D1C&@BI?nvO2k}K&|k#w!sDe!B|_^z?^ zYpGWXbn#X4X}hy6Cti#(2IV;j7-dDF@g$X495(|B^O29Ab*Qh#?6Yh?q4(ih?;)^G zLMt(}U|lEae{7zp{v#pJ`4i~B81pMsyfWk)@i*ZIwl%=Ux{{ZlYUo_4>l)u`_`ZA8 z){T5PG%rbKWtqfx1M^z&T40)lbr-p#aS2=3NnaFRvPioKFUR8ZwF_-_!qb)Q3qCXd zIbS-<5q|OG|4vL@DQ^qvyduyC&73yFyU;;$a?w*r7k#$iI@A}3uJHS!@URYA=0TH3 z#j%E>Le^RPGI8Mt@ee+1Yr#X>?Ho`r=_!0^OY)b3uJ=wQ9c0I*TifgWT7I7=U-E4O zP9d+fndCcwbk<4uaEVSA_<&C5*sXnodY(Xj`n$-(rLmF5sR*6Esp(PN5TVoVhR3rb zuT@)xWU($r&85$U>|2JmaS><=PW^HCqoH|#w1W^BooKdS%v%F*oy zQKmj(N9q&xr=AbvUO>03>#>Fg5A|gFrt_p9JWu)=q>n>hxpyaWhWCW!QxD4LX9Wsm z{3Wgh-+EkQG90=uruiAuqV*u203j!lzZBOjmv~68>}wRylz7ARDx}Mrl6V?0*GD3! z0a)S@>HKIsKSFN?PJu`AuLIWdH%9PgU>QS1zN_-%l2ce;9x?T&D&*gf{8!={eq#3~ zQZ?q@27Q9`Q=r!y{|eR~lDA};w1qzh89B44(3hS01N6;*fPUx?(BJw4bX37%3@a6D?`iMU9sX)JaWxoc{-%tN_e}KOK571Bl0Xpqt`(U8oET!Mj5?Q zb5V%+<1XN9fCFEy_3zWsmye!@F7nQTUajO++%4@ReWN}kkM(=M^7@c}2Y8|}D1|iY zGxQ#@pT8)^z15jT#h{B$Rp7}0OC9$Dj|L9vXmujLj>p9ANAM3m?C&XjiBBT`L0qf( zE7ZHqtTh(midbz@Gznb-j@a3DB5?WV}i7&H^B5&IY zgvx<@rQUX~u?gjEyVu@3_ia+#=&!#>|Mhw3jB%uwu9Ufn-www9qN~iMHI}>(Vd~}W zp-#hs`RFK5ZU%Czkoi3K*(WB3+57AxJ^sD@sPFmtYvS(|jS$D~_i(AFhOx)7;Y7XdTjwAM}_#@J_?;nm)mtbz7%XsiSvi7KS zwrMnO9rzd$@i~q!>qK0QI&Hx9WZt7%V)wVPUNQUI!hZ$mEMIUE*E)tty0!Vhd7;p` ze?`3nOFY(kQm+gqPA8z3wWaZewXwx7b8Ft{P5Q)ja(~~WcZBKtK(9A?dh`Whx_f_w z-WaAgMCo3Bwh_zU3p##a2iR?f-DegWk{$Y}iJNO;bEvq`UO~Q*lCSoU&zDOkZAo3; zg-o#}F+b8jHD((MUWjWiuA4TI^mRxVxr5gSdqAX@0B=(CL%^KJNZoMhoWwWkw<3Fj zp#`x-(*HBMzKyc~Gx@0F|E_$~{*(37`Lr#cu`xhyH2A*HI&h7pV%5+p%pY~$)rKC# z4^8{;lq!16``N?+E4qWty8dXp#4Mh={c0hdpF__=W@vJNBOyYp8lZa zNB3c=$9p;Cb^aIRIe%gOSK1{Ge0QY1wNC#P+dxg@^IG2A^XQ(Bbg?P({dZ$GBLB7s zW_en{9`LY?`bRF&nzjv>6sjlA<`ZJ%|k@DlgXs<@&xBpF+a@&3FwoFgHHO`0+?&=5KP6ml>HD z3vah$T1v^}a|n|Incm&6qrNRt$j@@Uy2edqkzf1k0VCgz9a1imoLYRne7qAJ@_{H# z{5ti3lax7)*v#Gs9w>jWDL1f{*6EOGgMoQi7d-}QeTU(B)$`GYM)FBn6QOS|{kA;l zB>!*FkL}<+%Wv)*>iTYdAN%b+kNtif$)kOH1%h>S{iDl^+Foo(9qpKC+e@eSoAL&x zZ#hr;W|gkXK5WthU(vMJ--q_r`_Sw&TY*e%i|RjMi;)q3qW|l;Hu15s_y-^94}zoX z6-jRZuO34sont8HwSrIJIvhv1f<_>zv~fh2E#t4`)$<{?lcZbw2JIy2lfWZ7Y5wEq zNv~GvY$K6#&ZPTmR1<%M#&IfF8P?x|7$E#htt|iD2CY|V#P21~p-3LB+bGl4fgfnv zi;;Y~tp6MJ)4Fqvi^fB-N7wt%xDGjAzO@k=`;5qByO_0Zhh6KI!yW%4^v#mLZ(#n4 z&)a>;O1m$PvA4n>ds+T#pi^%%Uag7U!vTMU(ruTKt@eN7x0%i&&xuGKm`B@?^VLeO zLucEuSNc}ZW;@5!{!k2F__4WXCwxfq=Z8{8F21FnJjvG=!IUHOMUit2(#Wsl4((kv z9{=Fehp#_Z>9%tqP4CzAWdrFeG=1qn`g~1qwshJ~%C~g%-!-vjS*QOov{EA%HoqfS z!%M!Kg?8tEjYhkP%+rV&8ea^W)MEwOA@po7XquPp&#%a;$F=qWNoSjDz6s~yWBW+i zxHNNZ6C2mWT4_UFHm`Mi&Ik6}yT!JL=I1<8%kDJ%u=A3@x3w=Z?`AZ{hKKC_y9r)(r zulDFN{t+KRe)ex^AGQb6&mcXe(s?cUkDGLV+$t-Y7@xzN9kjdfY%n}#oWk2Deg3^j zq0bM?@beab!QKnXHRqDNNjuN**9B5;EAm!>7JWup>h#PO`z(X;9q+wNkr~y8ZA02w zLavKz#?;>p@sG*@#o9B)46n z?aaEC{5keB!B0JPyE6R@(m8LEbn-BL=vLtmkNKpH$w8BHs(hNAlTaV#;m5@{svq%j z(B~uHV2@6G7clo6gx(LFRCpaQ%M|*y2;K**D z20Cp65A_il&j4QuEIR(!!-yfiuM5q2RQ7`h(yj#UF38cbhkcy&-UQk)Tu&+*`I*53 z-<BfP&?!sXF$GN8W1w-3p6h*6vE{RS zoa7xgzwaZGzxZoT@#3mJuT7AKq!D|QImt0qHfByQsjc!@dj#%QdSkb6S zN5B8Q!{6nwR#^7eFMg*8G79n4b56#DP38FKSsULyKR5fJ9Ggk22aV%|%r7XzId(7iej;A6fL8UP>aD|ip`aer1Y=^UdpZirx*E<`6z z;Vbed;#%#`&z1doEi(h26uy#YGp@b;<9iqx4uVehy&dYRqv&l0s{YjOs>%e;J{C3@zUA?Ke@$(6Yy?^r(KCuix_d@3x2z@28v2f8;#*Io_PFZaP2b zdBUgDkDezzb)NK1Dm_|XZOhYWXf>XP`i{gCu|X+hYFSZCnx?bQzaJhQq0`4SKf<%` z!{-nSMq(bRV+i#c@tl+VKKN4j62Aew8`rt!Un4vo{5UTgp2**vNCkg0Me2MB`eTl{ z%*goKBK%1iTju6(J4wn@XG2%!|$HA}looMp=I)!BK zv9kU9JW`Kn9?I8a73)0VHoSup_y3*=M?mAA8xv(k{jvI@;z>sjVQ%x+FTy#gEBOzB zA5BmD+c6WfJpO?qj+E7^@vrdSJnxySQKHf^MdglytX9Y^9PA|D!}VRknmf*iLE-c2 z^~-_vq`bYz|5{=2Y!vZZ3Tr=M{5T1^d!cXC-Mz9Hp{(^ zr;m|uLlO3`jK2)IjFI{ohFOD;dRtCYya+tdX0*$g>FDRM zDcirMsCZ-I)}#J&=(?;F=ySol0=x%u`-i!IooB2MX7A%pm>a8c=gv<&aC)UXe^Gpi z<1Xrt4gPZCE6$aBuHEBo2cO&AAB)wP46bt(*sq!pX0Wncr#LplElwpKIJ?qKT}4rr zF&0P~IRSze8?Qg( zzMl7P9)HP?Uq(25VsTg-MVc@FCH6jsgEak#L910R%3bBIbz^tnpY?9y?oVyU4=-Z8 z*h0eN?m_+>bYFB6JxG4hU7ZKKI&WQ`VOy8CI}c)Z=k3W$+=KjkZ~?q0Z!a+T_vXD$ z{C3_s@Poc3e@{O0@5z5W-^hC=|3!Q8V*a80SiO6QKX>Bi)qIox)%-W|(FSkipJVd5 z{B;G$y{=#zZMLo8@dCs2c)`=ePZvA~{Hg7pQEYwPGl}DQvDxnNyc2m4bRzEz(c5`j z3-Gg*f@&ZL?LFIMqn+H1?t^ar-OfGEu1fh4@iq@cpo1qvQQn#D? zjJqK(Kd}wjx8v${TvHT{`bNH_(^8U7b4faFCh4rNmu}T|+=H=G=w9xr*mDVZ{&R`L ziGjV#GR?3|^*&S3vrzwou@kXat$QMNI1$4ZqS4=dF@7o@Yj97+UysMfY_1eb*_NKD{fYGcW=%j zDcc`I&i>eaG}3*sgFqtP{4(PVWQ3>O{Bc};9Q^g*UmXKjP5$};{I%qt<=#92s!aet z^d^6; zT#p{d*;b#+n>hbe%%+MZ=Z9~iP0R$U)!~NE|7zVuf613ta zm*IW_D$wQgr8|LHNTJu7f+il`N3^NnN|jgW72*=}0mLX3d6C7>Sb zuv5rR8tR8y5L&rai($IO53+YW$QmG+#tx&88{yQO95cwlJ}Yf(SZ5ekm2C6)RqWwp4eX2W3QF{YU~$8zld##L-v;Vj(A>Th2x~$9r0a^a=YSt7`yhy z_mjRq{sPN>0g=qInR4Czu@~tyFUAhT9bGeBI)H1AAXMW(?1fl9PLkz#_5#zfX=xO7 zYir>Xwe^W!G z#(dVpu^%(-$EYi(VpLyfegUpi2m=(}%#ig7Tz#S{qz1_|+``LH?aNGHmPSV4oZ(KW zQjygiawYO#d3B;2!Qz@xxE?h+(TNEGY;eUmFwTcLLN4Yj5nQ;=hmi3@B~Yj2MqJ%k zsz-y;2BbIKiS#??>h!t0*}Ha2tbCg2>DV{ewBLvwh|FbeVJv8d`=Q+-&ovTez(;Hz zude2aBrn&H5?G?-#(09kM>oHhmltkm|(p-62B|Q1i@hy>nf( z8+#?VPARHeI$3o{cQSOJ;XW2S6SBdX*t<-AH};-Rme3kj*hj8YglZKHNpzv@hYTaCp$Lu% zzeRP?VH241naCuOM1Ca3~2OW(Gpc z>oLRiI_wSn+w+(im4RvYQ#m#P#~u5zwe<9Hn>!OLd$zlseTkKQ+ugqYSYqW08{=d1 z5CnDucW$?WW*|U8-aPyqKr&*@ff#Hs&&r?SOorrew{(jyfr&1;6lz|YQvJ*`wCiwD zkUt3ILB*QPU6!yUo5OW3LWYZ`VHlZKhpW0fR4(_9CL}dwRFYRtka-3(&t&EqUS>Cg4oAlS?u5CBvcJ@M{qLubFsB zk8|^vDsPjc9Ml1X-Ii6l(lF~~8=&c2cK zcq0CQ1FiQI;5Yga3%*SKXSiqFt$Fxal@G0EK!GRuvoHT3e-7rqoR9Ke&Ob`@R{mS| zXG4Lz#Q9UqQwlb5mA?s#D9k=lj-5Q9r@ZU#$b%xee2PLbXND}2`DQ`197vGmaG})KAy<%oiZ@=p?<%zxeD*Yi&kpU%hP z7y`LCo?|BpYKlm`T&k6y*k@Ls+h7B^HrBvmA@4U>oLcg4=meO;qS+p{>ODjqftjMMUPy%lD%L0^h!jhdc@5$7#J3Ahp-Ktb!~`07}s1zs^_nW z&9&}elwy}ioU~xg2JAVnvyy(gawitBYK-p9XA%iIxMjSgGsUoONUMegJ)6kpd~8+hL;Ru?}G=r#=yn#B`cgGs6t5a@x-s# z(|(nBE5|N|$?mwr{tO&{hS{TAbvv$ZuU1uYt4+Ap6Fi%X1@Ge&yarS7{n%r0_b0y1 zqQ0FtZgw1?3BuT_1jMdQAg;nYyf(Jo97Ke=I{dsGH$(W#@$VCVKYk1tBlxlS3E~s+ zS1n$f_yTt~;`k5eP;5-ZdmZmjZ>QLO zj!Pj#+1L>>9pOB~TLld>F8eXF_IEFv0K>3N+-aOd*Uq-d)8-@j)S&Z~A85iW*Qv^{ z`Mf*h^R8R9JC=|5;b2E&ckG#%BtL_xrKCR_JLab!i=Fh-Pol#K|C!j4xbPo||28h^ zzm2bRC4HT{$CdOw?$dda{xkx=q%-<^>0y!DWbxY7D(Op=d!S}^@c zd{aWwHzjOoOn*A>**r;q)+-I^rZm^t9b>fH9XpVhV^j`l)9T#_XaFZs zJkXK&TM3|b?s|@3>$!!By@foCwsSG$?jqX7A#W~5o4rJP^PVQ6WrhCKt$*&ws zIQ7OikVLmYB0U1=6*vPB{Q&4pY#Ya#@5f<;dg%9C_S;Q}WC+=BC04tr8a)7sd)&2o zU@_V@Sj*H~%QRTaV5@DivJ0g`*J7M@_`kb9W5u%NbbG zLi1VB{5hiMVy_UH3d}|YVA2`x>s(gQvhQ)^-IT!m1(i$ma~FM`yMYt24enOXC%0lg z1JT>u> z42+5JeHI(q?paJt@{_40+!oou8wfM-&#F8mbuq~_87dBEmL%iR*h+;*OOmO(Y^zEc z?iNO%z%|K2by68&ajP-%>x<@ZN-jYwRFdA;c{zL9{Q46Tc* z3TN=|xgEDE4=yzeeziVN(xhPW-&_x|_484|`H+X1G}&hxc4ZFtu2pP~Roo)2!xrgg zB8oISm^3>-?)ZuM%kbCVFW>G~)qt<2e(*Bbx5t_IF<7|19Z5z!cRl?)nRaY8nLJBZ z!Yx)|s|i1wV$cQyE{h1<+pW3_<)U_|kdfpmF$;0qC~yGDbU%g^Yk5r8a90o?*U;u! z+C1xw^BkO3;(b7WnNIbxd(=h$I!Z~rzXM4abs3e^%ky&5g%3oGt@0CT9X`WSko*hQ?%E5gd z%MVnGkpXL^^?47oIUml$8f*^MU>K!>J2zU z5yY^mIfK*W<<^zJFxJb&Kj z-C3C8(Bk=+>+qV5#Pm6zcg?GDvSx4x7rHn1$8fu9XAFz0y)pO6*uEG>>HSz2{W|ty z+~^p%~`J$71de zF{#Ha{TCn~!nD~v7W*MF5`TfIJ6AmW;_lPvrdamB5XX||g@oh&IB}9C{vrVve=Fhi z>taVg97B9skNWS!n2bSc9UEd>o@p-ASRUn#_=W^p6p~hBZlK90(Z23460f7A*JE$Q zOgJ)q()38~`0RI0lr~Y$giJXpxIMcJheKX_ed(+*x0PS#p_0)hqsNRMH)h=RWAVQ| zQ#j2Ny#I*Pfvt!fr&3zNbttU~$I|;pr91vn>AcVfp#T4PmhpK{wGGbDbmWL-eU>KL zG1tcoF$o!o@jN4$65gzF#s9p+7;(TY)c+ z@Ruk$`6nv;Dd4gQ|6E0X2z2_3wPVthFaE_h`M(6Z;21FFH>>=Ifmm5<2d zbHSRQPY79@F#5ceFBt8gD?gsI)%mLwz9I)dpWzk$t8&o!+^*1R50}s4nor!hE(brK z;}!Z%pbrABLW1~HwW8BL=Gk6P9_3f#xm^R1gSZdvWpUD(oTEHG=d1bga*>ax<>2S@ zyTad)gI;_=Kxg?9|Jb9ObMWtr@QeSDzb^+rpZ}HeDgTVZv^VwCQe=i4}&#MZZ<>~hLK@R@XAp!r-a?p9Uw8(oM^jm;Gjs*HM?Zq>u zh5jz+_X3ab=q!JWqLY7z!iCtL`4VuI;ycsRzD&_4~#d4SmCu%fd( zp7D(zeB#cX;Qw1--JY*0I{A6_w_yi=8~A?({EW$M_1p5{fW98|6Noq3emoys@_z~R zM}f6|Cl%e4r|^E32h8zX>T^!f$&UyBefh`09|P9@a9GjF&vV9^jS_zb{(k`GJc#m1 z=Q-n~GUW{Dp8)PO$kKVvxFLi7@1TDjSp0$cd9Jw7Kj1pf{lNW5@by=8^7E{5;lB#} zgMfMVxah;P#f5$g=$8X;R`PZ!I_2$CcpCVh0_H0OBG36qAn#7lW56R+d>O3hls80S z#gv8+LGD$?d!Y+-!1N`88Jsbn^2Ibm7O| zgVPAC{cGgNfKGm%g)aO%z<&eqX(Wg~#a9P(^7Bk|;eP`BmjfSD{HGM1{5%_7_@4v+ z|BCSMyC$HMpJ${C|98RvJn%Loh&~m67SPGhGt-6tIQZuPZ&Caw6`lM%LtXfP4*oZR zHz@wrQ30L&JX2lx-vIx;z?%Q8qSHTQeaaOV^YhGg$^Sd#9|W92Ka~1xyDp%UpXaX& ze*u=TR|B^qLHIW*I{A4XyYLSI|3kpi|EbRoMJNAmg-JiBFzN2tKpyGC6ec~TFzK!1 z0)EnY);oUii95rf&l+H!{Vw{~+z`;o&vV@kJ2;4WuDf8$KNi8I&kNn!m*>4}{=)GA zraYeeuIcp(lg_i>HGPZ1r1K1TO+TVA={yr&(~~y_m~@^IFLYv_5ifWo?DIk3!$=VO z98+}i^UQeRzXAL|1=jvBp){bApJ&Jm|0M8F0p6tI<)NDbI{A5yyztKg|Brx2Awl#x zr|9J8`SQY_0e>EFsp2nDbn^4udExH@|1H2;{~d}>ex5@w{GS5<*MPM@7yo%cCqK`n z7yi$J|5D&xND%#>QFQY2oO2?3q_JhNW->5rps2{7qAvtH9ze>}jX zA5xh4kAEUeA2l(+q@SG>VCJ7#9$?bzD+5gW4uwf?s0!2fDopzP+X6Z<=ePL5$L=?9 z{%fFzIX~8z^CgSz`i%2CjX59H_;4iuxd=|i!}5nja4Leaf0MHEt-e(e+z`Roe+lvT zMKJb9Li7z0j5R=rjxLNpNQZeNASrAel>!B7Qv??_~#M)S_Hd^u>ScG zToA$7?+MixYlILkjNsx39umPrBN%_*IV2BbV+fCk;E@qLDuTyEa7hH0M(~6PJ`};l zZdjkW5xggY--_UgdExwrBDgR=pnnzdNItUPwm;Hek1Ndne?npQ=eHCl{j9>ICvTVj zX~)|_g-IW(F!K+K;0X$ozg6LH=Fq=W(f=CsCBP$)PvY|?MSlhK8cZ=_pvQ2plI3q! zbe6YYVbTvoFy7Vo<1y){Be<|Spi|xmg~>lsVbbSEaOR-oPdNW0M}0F9{vL%Xzh7a> zuUG9)+@SE!a>!pD$-hP6GdcLTDLTu4EP{7L@XiR{6~VhBcuxdB9>Mq<0-^SJMq$?X zkiyjOh{B|wQJ8dRY9NpFkqVPu62YYklOON@hxAz&!5b7N|1%0x{y~LF$KL=5$$L#< z(%(~<`9D4_;3vJNCcvbxP?+@9wPE@;g-Or&k7U^X+^R6?eF_`-3X{G^;os-*pM8o> z{*ww*-YJDiKVBc!_l&}%Z~m1jKc0hrNYN>8Ok*IA^(j@Dbhjx?Pby6ME`^zYpTeXk zv*G;16efLy!puKXVbUimOnQ~Vq|aBlHb;G%6`lOm&0&3N6ehj(t}wk%VbU{;1A0rY z@)Vu?bK3%b>d$lU@q>@;?>zTjW1f32cx4XxJR@G{lwa5$;D>VX^L%#U-wXN&f%W)3 zM$xGs&ubTc-jBEmSl^G}dF(=G`I{AHexA>+>H8HXo#(V``f-IxKcO(?pHuj+a@5bk z`OsS4M1?7jXO0VjNMCb<<{c_O16QT3GXURVf^f!UW z8EIDj@ScEz63WZ7M zxz9o;=DE)r^W0~R=SMKldDe8E^Q9YAF!dd|EKKKF&6=NQGi%JV zm^J3v%Np~nWsP}uv0#>0uQ2Vwvx|jJ%(IF$=Gnv=^DJVGdA6{|JnL65%iE?f<@4-c zp%WjCV4m$ObmpIMcYw*yvwk(bM`6-=manE4-xFZcd6uuxiFt0XV3xN_VbXbyuh3WJ z@>fNFi2e$E5E*2?v}Hw*pYqIExkg~z*#Z7XN%!VghJJ6r|Cgi#>-#-CBiCd{3D1N6 zPZ2uL$QAlA&~E~k{YuK`S+_!GefRVS*wj~HLtho4D@^+Q)nR%@Vcbh}vc#%>nKc1F z^C#B^nC0_4R{Y>&;|b4I)tKk13TFNh_XU{wd8Vq+Uq$`pBk`qL(V734!f)o_=eeO) zM%>B6)sKLiks$3`vM!*re4ZmJ{2#(q8L-};-KFVZJY20>&8U%Rj5=l<(dj z@c%jZ^MEyfwW5=s=Z=c}skoXG;oqU?Sueq@wfe zP@zA7tKR_^D>}~r6*|k~8K8pM9tRXA{ZIt+oKE2`(J(&4VD$M*mLy1(Ow{8wF={)nukddF5XBKJ9 zGm8X&+q)u`c*C=FgwFCi9}4i%9Q-_YM)>~`SDytQjRfg`Jammc1%s?4{www4`7&DmX@zMoo-?EAg;>nfB&cHTc0N?zDp52%Iv=#0=*Hq${<@`o~vWX zpuZ0K*MKK0I?vV-`agsI&%iRjqdj@Hj?jMxdO7fTm7nM92)zJ~yd1dCqff!_Yl=>J zJab3*i^2aUFwfwT`nq2Z=)*uy;{6X78R(zGfn8uczT*4q5XDdVJflbCUj_bKfXA!# z0MF+U`gNdp1D`{J^sn}>1oRt0?*Kli=scfC@_z#K>wtf#=scfC=+&U-0k2eap3fun zIiPAFXS0LLVpDG>wxDe`8=aX=sQ9GEbuyyPJbx;%Ye@I;<-J-PkN`q zr1Q)kp%e359*ueKj>bF(N8>A>4r88iqv@a`z7dK1Lim@{>8Hngid*DzZqcazg}U|cPLEy(+ZP*EP|`Q704sKL1E_aSD5tF za{)i;JaYj*_}KWzGZ!@Gc?cTw>;u7+_fw@0<-Mvf=`&UNq|Z|LYz}+M`%|LNu;+vF zexHMXh@w+|O5uFl8R2$U*P-=}Bj34*CK0{EwAm|E2sC_*35zee<2M z!16v7-><3&;XG$1aPa;_p3@S+D(ASa*>_?TnzktgnktG=XIdR9EbE*fw}&mz>A!O^Bdq4p2xY^;H2|*B>$j7Jipm% z@2@cbWx#x%2jY+);}P)RV*PxxCw~Iz*q`TogZ#C?U&H-!>Py@Ne1F`|Ux+(^b$$AQ zFIaE)H%NalLf;9@=Mkj*J;2{n<-GuWHSUk4yz+h!$^Sa=qwN9xcfeB=e=%N>OqzW5ZwzcvCt0eNf>*7vbU{-=TOX|v}* zkbWpa{{it}d%gncKZ(%a1Wx>glf2t&AGZkele_Kwl>CR;l~KLz|bl$Y<}2Y~r}oA}c<;QP>?>~FNsE6|VeN9y}^ z(B*mUV$h!jo{J^|JNzZ-901O)#QYWlng1y8FQ+=m{SZL>3*ei85mOBQ9q=P4Z-s|H z2*Yqa%>GIHUJ9)3F^U-VY4G^Jiula+aS77Ne?x@78u%;A?U{Nk|C7MC+-~hb|7Zbj z!TmPA*GKv);>AwV_4MBaJf|~%R2%5qdT1Bi(Y+x3oQ1$C|=;a2b@KH#a|2Yiu2#Q_B~-FJ zB#2j2f$^ogITzz^8O{TqqWqyPl7CGEKN7)vfbU0q8wq)|=hMI$#BZ**8NUwzqpiI9 z7dS^E`TsG3{|)$;g+c##4|oRh+jv^w41#0+9QxLK?e$^czkN7}|096;{G{0XYT&QH zerQh9z7v4?eBo-NU(zW9*7mE9;AY?tqCDw8-4Xg<0RIT~mGR^Yz*FzD?>n%4z6>nw z$^P*aa2xy`-OA|mA}~HF{!@(k!S{f*K0g9}q8}MOfBX&by=cD!#Av^Ffcg9@>&Ip- zz$@d!DuF+X{wVdE0}Nt{@s;wLfd3uyNyI#( zZx`^lU=OaRDgQoTJ`Zc#C+U0%c*@qm9(#dxeO`*-e*m6~{x0ox68O^-?E7bw|IZQr z1RRU|XTqNk%;$Bl@boPP{t@Ck{gL@U3j7fIyWp|Fe4bVE-vE5!oFJY|0+#oKIUdxI zuI4k%z|TKq*Q1ob6gclfd!7&Rr-26{-q(2Le;)WN1^q^N{NDg> zguSag{Ot(;E5LvL4g35(<^3c=|6jltdGk@y|0O~%z@Ip{5al7PnD)O6n9nCm`+byj zRo@$cQ_5a90T1)mC-mn}06&lUd8sFFD)7AR$=0=f^d`+8^cu&lqIS>0wh2KMKtE2c&=Q z1a?v^o$>L_-#-O>(HHEw=#-ClgPk|)F~0!a_yh1&*gv?&!zY0G_cR#qIA1vp{0{8P z@tgeb0{3IQVt?Rx#X#N$`Bk3(ehByxjL#E2{t>`W;C?seWG4T3;D@kYec7Ym2K)`& zFR1YFEMPt#&+^#*p9KCMib;C;TY$BF`XczVz*)p6K5t2VzX<%*C+xY$rvC8XZ(w{w zvZ3$91>cvD@nA3TJGa^KnDPD~FrS|m`+gVrDa>D6J^4QYUXJ)V!jpFvcna)=G0eyx ze5vE`{S1+R5wO<(>Il9G_&XS1MBbDL{muw(2fiQtl+XID1a852lk)JNg24A%&XC7IL2GN z%N@%9r@&dn_laKlS4Zf#MDSGLb;`dRfIp4)V|mm!1I+hzFsz&Ubwu)ihIFOhM&Nr9 zj~Fl6zFQ;wPXb>ALy0{P0DlGXlbHOk0N;Z7?fR^zvU1{3SKtsswIEeQf_qI`zOe+=BPVvF>Ai=K$;WSVD~FImUbP?gf4x;}ruC z`R@b%+*9^_RpO1ne7{8c*Jj}CnqWP)3s}qlCh)&2|2Pc%Ri*E7;CEop3a`93fM+Cw z`krNevucwzpC*h1AGeh zgSm}Av;j{?e;DlPcQ0_CvhN1qZ#``LJMHrYU@d<)@a1ZLuosx`m(hRNpS}rvDg2rC zWd6Sbo-y0*4-+3FMttQNFMC;UCIUVr^8!vD_^{CnUQ`13(1L47XAMD^!OoMgY(e{KN2 zLACd7z`Fc9Be)&--<}EV+Z&oQ`DSa>cQ}`3wD~0;eejf$a`ri!v$&L1TC)U3jIEL~iUf&hrUjcmo zEc<>h`8P%AUjoJog~ee!k2zn9(4Pa|kNQAOO)B>%g> zbv;gUy+GfNIQw01D#`o18{cq3_Q~rE-kaHR6eE(4Fc@^-zj|AgqDe$Mhj`@by ze1AH~sm%}~$2(Y&I0k{SGdDyBpxC>z>n72`^%KS1DMZ)jKKhU5zMp;_)=x>CxLbO2Z29Z1pka%{k{*( z_d8)zlm7=1{(l7K`>QdJ{$_+e=%cuw@@z2PTn5~S_7Qobf&Wd#|4G1iVm-LPvri4M z)~_joyMXz=s>r(sc!iR`5qO!3zq=#(_XG3&S;_wr@JlK_{Vc-&Tj0vOgZ?mh1m>sk z_c-)r{JIuc>stx@5aLIbSD!lIzsLAE(Zlm2{GAcJ4)~|YKf&YQ1pMa1!F=|Mz`s)c zZ!hq_7TWa)+y5!xFRAhK`@mlW7XSPS@I^NU^T%HSCslho-93$6J-waj?w+>m$1S{Z z{EdBmqdOe@A?NCjj?VIq&gB)2J&jY^TWrGQme$rgvRxeuy1Shz?F(Cwo=ua}8If_C zx_Y{MdKWGn-Q=Xxl~w7iv24AKl zy{NTgL1Sw=)6>z_oo?*ybDBEZI$N_n+05v%xjE7-Io;UR)wn#JZSUz??kwzTY|ExI zy=`sFosI=}Wt)0Nk3n9QoTjp&Jl&mLE$uy2mw!q0+U}(b{RHwN9e)6{JIjk~S66!n z6B=7vJDR$1)xDr=ak{a!Wl?)JgVM8ECW61MV`&yw{G+1j#%sMlCEB5J=W-a>3IbzS z))#5C5GB$rl!w9=E6~%%hI-v3yAvxV^($kGiJuOSalx$xonkt(~cQ>-hyF=NQLC>CSyHBf`Qjsq2Ky!Drw!(|* zvu&NC!fdc+YqN`@xV~{gt6w7gFWs2QbO}>6m4)BbqHIYsf`Yn~H}|$L7Md}VSFdcJ zQMe=xp-UTEg#~r*>Y3i#)7k4=r>>`?Gn|4tENofS+m&VEHLZ=y7c@34mYREl$3+BB zLf>f*^pf(*8{3<*tpn3*vyB;LjC!(Z|JBH47Yt5AD z*4xCX#0}wbCB9D@_fwP`G-bRGAa&^)|J)Pk4?|SzkZsjrH@D|^$}NUfjZ%gzjrvko~T=8#Zq2aTYfAEbIo&{H8lw0Xw?d zn9+v$zP_{xZ~<&a1a9l@46!h+G1HVQEuHNfklfWYkQHgUSQm8~)x*ViF6+w0+tkt3 zV@gY>O&mky@q<`MKuDq1)^t=KBzfglS6k2{t&0||=~$NSnm&z7bN2sj)Xx%i*beIc6elGV8&dr^&(GCY!EmY|pf|v@Zf~&7_wxsNpwb zF1mYc0)A}*M)x%SKsbl}bT`IBgE5vgH7`y#HFud`j^IXgx07vOk~XlVy~$o=vff2g zYqqh=rZu(pcK3|y#<1u#wYK$OrUXnS>;($97mE<37DDBg_JtjodSy{7{6+M(tW()n zzO=_7xi!%F9c0)?3vu{ zOzv*UIB2&tVu_K;-%JYwQHzw@)ZEz8j;V|hX#qKGf?;mY_Ssx4z*&e9yki-HZ%?zK znkkUE!fLN|wd zB!MNET9T);3+)m~QwfqU%w|(->&w$+t&Lr6=_$1{j5|Wzw4E=~r!k>Pa~hcLaw;3x zg%n#=Sv7~L^wjRoDV))j)l91C%62!|X;4LWA>FjMlfADrU0$xU+Q4MHBd7e%!q!EY zsP{OO$pBF^d#cx4%bOe9+q11sEhHe4)s$D?KCYaOJ-I8p1f%AH-bGV8+HF^&?%geR zUJZ@CaWJTuNT1Z$olSFkz}Y57z<{GG+f!Ge%NiS$#oS7Zu|@$iYKALEz5!!LB=b0v z*|-Y439A(clVQwzd(gGoFqsH6s%q@YOm6IL?eVL4TTSJyngclzO$X*o`|a3n0zrBz z1{DNE^u0PXsZ+PSyS@cLn!UVi+V$z$2227}>8OjDIhkn}1{{#8^lxJuGv66W%quCnrWtrN@@_(C&=fKrO( zQcbtrjcMui(9o7dd*Y50EzD-ef8 zmKcSk!&OX%F~_DSS7SP;bT=+Jv&K$+HNiJM?cULj$)`~!ZF(S0Yg)R#W6`44ESoxw zRWSl7f*uy&q{Awl>rbLPb=yE!+gIM%8nlC{msfVkpv+z~yA~~HrxVjLyR6_G(^&`u zP8o*@Ze?v)*>p=sQ%|cC)G`!(yb#is;S8jFN`*724i4xoE-?ywo@55&pxyjhnuw)j zv{qnU*=mf8^+I*U*mTAZV3sXty)>pu3m0|ZFGs-pIV4jmBVi3jn#mnqh-;`_cS{FM zn696S#qhKW>`7o&Ke?=aa-E%Ir~MrOFSd@+wTD5*r7LIYBu>Fi>~F#Nitd|^EXzGV zV*^c|GI=_kQo=&WaPa@J@c&S8lWS(`qFA4bEY^yg2AWptVzj^T=|RsZ5acdPh3lYqv`>EhVL)5FP0TT3_H6mzE~y;)5B ztdE&)XQIfY+S{qiO}aHJ$`NZ-*|u55KNuRkk=yYiZOGFW*kKtJs4ufIWlmlFl=9mp z53IQnvsK0t?B<+f;zPQ=!Ko_? z&u*Z|GVb%()>2U@RMNt9Z#!o2i>(~2^@AbA)PpwQpc=A)7pb@|!{Cmc%?^ii$Mk~U zg;q|ei2CU_A`&wMqo-h=EyFc^#7<=Vg%k>7*ABTR8#_Fq@chf01hL>L^(Nw(?Fntv zkk<4|202wl+w@!?n^p=m;?4_%GK<%2-KZKgNzZO<>6zZn{hyibJuR*EEp6EjY+s?p znAERcV@7{_=ix1-RCT)>5v_AAC7~n$v`emd)<0$C?fVS0GK&q71uXr zif95F_5`pBSg;&@!HaV;0a?hMbxb2L*ALB5qv8E}r>sh^4eGMl#bzd9MEgD5n8Pc= z>m2165scrMO{XA)m7`B%2};fEn9aR=*qD3lFhY4{sM4I?jlCf~Hm5%$CSqB&5HS$z zzw$c#c4M|J(+N)x8#wDKYPg7`iZrWnMbD3z7M=9p+SSq93BL?xfZlL7&cRUHId;7E z7i<~^4hDY<^;xu9m~QvdRSpwt>l?HXWC{tftzxE2m^@=vsk?eeJS&6THoTZVDJeBs zboNYiNV3zn&};=!D~&C54Cgnd7i6&?7))4r8)1xDPTrJ`D44FToH~70rNd=ubY@}3 zepO>GOFI^FQ$jWhFhR~b<-J|lEienu%KEASQZS;3KCBa(my;5#11qLXM(EV`^Vd&i z^+axlKeLbK560ds)0-TT(avvp6GQ3hO_nNa(8H%`g4orY0#HC*M{ieCmQzdA!kL8%O%{$u9I(b>Jj|se zLzWdatK3(I7N|k^h9z0`iViB2uA5WmZzI@=4*d!Dg~}T{P4tz8+ro4kXMWP%^bCqk zWwyf?EHmB`3Wk30H#w%F$F|tu-<$5~OJh61>vV=}=EI!RE4$eyGu5e`7Fti6O&AOe z=>;6wvGRiDYAeesjHyg83gRDj@Ux2zf%T(-%&z|AmiCtJW;JQ^Vz%L=7gcAMW?ONi zX8OX}W`E3gD2PFr>NMTVX=e3HS-uHQz3DDnHF^y-H?B)BSFVQLAl_$8o`#rnFpyF49LZS3Jv2|ncYCfYd1FmKwoI@`VoA$V%Vl<9R^MTDS|$dC*- zhrinySZ;@|w>OOZ>R{fSuCA{v=O7yDzZhH1pb!{hY9nth+p5%|H#K*4w71-CYvS7( zyXUAT)b&$pF~}%ql{IU31(w>pHEEVrSRzJ)AH8cjmW0sI8*u0-X}yCGnml-IIj{}6 zTUXQ3-D4adVPjlqHz$ob0B;YP0aKf|x}$xO-6w#tntE}ICu>IJ?%p;UD_vP%t8_Ef z4H=LD!oLBR&YDG3t=+*jV>oLw20ptG6GLZaC+K!?x6_V=-c;N(zc+W{upKmrHH-1j z3K*FaOQG6vOggRSg`t6+9v2z`xey9kjS~~u*0D46Q04sA#jQy0OL1srDRk%Q-A!JD zElhWGW)Z6WO`A}pHY=}XX2Ib(1zp8kOD;-xE^MC#2f;H7MlyPlr@vV}c!i;Va(wP= z<}}&fT9NK=3~o0SYIVC>)hWv^#BX%4AvLvZT7@I~sDTyORUtMsZ3sD?ZwE8Sz|1X> zZmq(lzS(z@y^9tz6`%u^m-l%KU}$0op~#|sa&=i;`gZx?PT)6o#E_x}()tO7>tv zxan7n#>?q+KM0s`MQ-mab33_+&<+I2{%K_?@^D~;hOb=6ZUDuV*dGNBc>J*0O? zRQID`b&ZKFN(%R6&^a+qo6*o4MaM$L3bXo0GXEf#zvP&^KxG&_4wk+Hb7>!#rxJhsBN7=y5oTD3i@Fc{7UM%RG(VPb0 z<`Q!8P6_rTu-V{UH!fJvm0czrkR_mRu1fO*Yl(!iX=gOSe2Zxh%LpZ(|O zT6{$w-yt6Pw>WDcVMyj5*SoyI@^!AlFW<#0{(JiXsi%h{d^dw$gfB(#9qysv6B?4t zHSuJ8@tU#W*5SCx<0`BO;X^%#$^{*>dWVhxS-b@)mivhF*D zcYKa`wNkXr>Kd0$;}fnk+SekGu`|N=xy$pMdsazn1bk0K_=LVWJDa8p z3Vi2{2w&BZ3!M8>0iWppUWD)ON-l7Y3sKREkj7-u@5|#aa4I8wg!~4zL*KaZ0%r`I u60cx6Ja>_PRgCW-e1p~mef$>-)UF z=Xw7To;_!uz1Lp1eP4T>owd_v$$}uT{(mCNXY_VQ3o}f_Gvm=D#xzVjky)99JPRAn z^O=d4FyPnl!9K<)=qU;599w|rTaj+~0ix-n8Pg5QPX{p4thv8sgo9~37xL--yMNzl z;5!X`r-AP@@SO&})4+Ec_)Y`gY2Z5ze5Zl$H1M4UzSF?}O$`{VwAcS?CNqQ)zCmb1 zIE8R2m46|vJ)V9R&vOXPDEogS^!*21L(7?ACIZp9H~#!jG^bbmd!B0kP5Iy@>7U>| z!Ts;?{3rU9mpAwST$c3vf5P+M=KsIN)nB(#nZ~`|DF!6B)R-~DHv_gBD+S8emg(G? zmZK>`+b&_I>GCk9X5B3NYFA6F^H@ydHaBX@UOmhFg5B;j?d!+$2J~TQ*0?hpH8a)x zeP0_Ke+d%}4`@-o@ikNPQ+r0fC~nbhS+1}W%@+L@!_4^+O`&!R%N2JE^_dM!F?EUC zvwT^5_I+(~hK!4!>P+$)a8c0Ry z72WG(wl`<-WW+OjcWtzHY_4`GerZ>YHZ)%TQOS{|j`d@qAiH{P{MW?m2Ln?zdN3JC$*_^s=Md7e#^Fq zV7hY5!oV%FB%2jjTDm7SYPPdXhi#q1>`H1Ek~H<1pm1Z^!;yTG&c>AIyIKAnfjMqg zcymB{fz{1+J7vx8GMW0IUS5->3nXlxQkqat(z3!$!8antqJ_FOA16F9g6odt>AQ(_SPd6x8lNEH@s}Z)YK4V$N!*ZM`J6xg<63+|et? z=<9dMyMo)nf5Dj1L23K;h-k8SwRM_eR*=*#GO7NJ{m^0Ydijn0+WJSr(sq5ZUC~R1 zVyXV+@Jy#m5heW=P5r%Lk|HxM1yj!V=;iI42h?4Gww`n_?fmjrp@r;AxzN^Eg&jFe z`E3OKf_)G%v5ZEC{ewt)kr+1G(SnMoudEBR{iSa)!z_fk25-tZT@ce1V~W%!rfC3a4!qQ^k?e{jX^PFI z&WL7Vy|X81R3y#V#y>P=m4a60E~FIgTO^xhHnt};r7@Jo zKwqu(PD37j!bR%7rm}5W8l54TwvVc)CO`al)9={C=voz*|!hcoJh~%NcHv> zdAL|h+b-6i}%jIWd<_0D;-x$$MHDW zM^qgD3TAj0dJU!TeZ!=iJgs57H>uPNY1LG#=cBOIE0oR!wN%gX;NfqWMkqy_O8+G6 zn_;vU4q$%ZEw=w2)LpGJ`RFD`_!jsOfpl?P>LCO(H7TaS} zS;6fAv`C{c<)PA4v}&}r@s-mF#?dOEd*2w`*=~}2%|g4?Xjf9S0@^ieH)&of%}n@V z#PowwgdawXcpC9E;Ay~9gQw;P$eB8gJl21#h!AP}$RjhE$gpKk``O7ga_O>RYhps_$u zVi?2=YQ4x!1+g7P6w5@39qQ=#R-in&h^lexiJz%&zm7kLN6Sr z+kdqzP0~*qst76ipinfl!@pMCPtOC>gd$)dsQnw{l2#^}(d&N{bWAQejFvXVf$;y= z(=mD9p`r^L1T;`S2$F z!_d1VJs3EMk?xS?_#jyS;j1Fz6f45rVa?>DhlR=gSh@}+t(JW5)h^$r)$4tPO>_%# zhBwyPxKADH`rpU=R(;2sp(I@{*_*gmCl5hyHFs}t>SgiBYi)B=%tvzg=u_Y4m*+OV z?X<~bOc=wYMz(X=MLoc_Nj5Cm!#tTC;KoiR@BMaa^m7m-p?ZW zo3}aN*l&?P#5}tt;wm!AI@#PPOrUq0cZ=@!PmW=}5{vO(Wb>vex|CFTMDT?7N#~LM zsdC0=Slt;k?ZcC_p|89IdCD?Fe*Np<81&HHYH=f zV1H1T_{oWk1zAPbnuv?pN*f~6P3s~qlUS^2cZvPwPhboL=D9hGB}FG`3P1ivv}Oh# zbXqy>d6vzkmWeD+2u+`U#WBHd8=$Lg7qlJ0cf-W{M^ZzC08%Vtn%VF!;`#k-1{I2J*f3iZXP%9T_jL7$xbeUf9<9RyP9`XyKIRR;lU~|+eQ0Rq^+4J5H};pwYJ5Y)X%(!Rc4q>!TPru9ruK&mymoKuhz#8r zkNEMe;B2ek8gI({tl-yVtH@)!<=c+(A}wckqP#+jc|B_X010XM5%PaG}@Y)f5+c zh#Qr!*N|4_9X?`==Wv8=W;wJ@T-L|(s{@dec|6Zz-f<~b;9PARU$!AK-CE!^gQt1m zNeY@3M@j~`D)1cBm+n{LhPMzGRH8yLCBG8B#g0-%*=2U`3E(;&{;7OIZtOXCR@-B? zB+4&1O_4-XLPQubTt0h5%zeU;ajj4T!uhn4~0q1`q|8; zkqvTzClUKbR~8FQ+Ez!QPG+;C%gNh^S|kdw%d)#J*hu;wd!3$k4|~QnRqm- zO_GH6*tLFTXw4H&$CU26Sm0FPVw+M zCp&Y_zrk{6nE3m8kDgekCUxZnKL#g*a(`J;w_YCkI6>|3Wbe`Au3@fr5U9HTO z%sDr3&UNjvN#da=fGyycWtHnrMIYxnxrarcn@*4_*W#h)rn57z`!nQc+mbboR-NNl z;dk1t`b`d7x4w5)t7O!53sGygzGGCk{%mP$vW9gF5%2*WrqA5lqeMxMtY>8L%vOo` z=z4Ox*e#q%;=Clc$0qxg`}|K%cbr-0f2Cbat}flxmXPplQ%jF>mi3sQENx9FmAEEV zo}~6zk@wJZ&O48aQx=uFT9cv09X;a7*PN^5MtR=hiok7+Z$Lwf+7dLHZhfb%TR5BT z`jZ2i`U%UK6-HePR-{o)kLniMA9EDD`nA^B!}Tz1xUr;FSHgOd&p+bSbc-EC8E!k! z+qgrII17)8lPXI$W^Qi+Jn1;q)hf7jJ<07)IxlEA{m_%nw4>q;)ujt9aw{vjCVZWI z>STs2hL!0rANp;ZDBam+)CrRs<>$h({7>u_o(MbS!{NWmzX((Nm=QL}L&8*k99EE+ zJDV9+-v`?D#<$xwDfwvg8lyBqSD142;7GLn8io^&L4OHo^EvRKk8vfCn> z9%erc>yOT@FSmG@ZGmT-=a{FWgH;Z%Tu_;A+g9nDF-eQP_gKNfn%D0c;>p3!!HT-!uACB5ihf)$_LJh)>!A8F(w>n(z@42WXWOM=8^VrDw9M9JHIM{CObl7=JRGWhKwIE#ObT zZ5w|cupQ%1Ho>xr=TBI$YTfEdZi{bSt^V}pg2?H+)*L(~ta*3Po47{Ycp*<(!UyY=}!iUSySAZ82ue7n!ph3crc$=EU9DC0BZx;?b&c}Ru_YJgo z5PFi%|7L2*nIHe;+36WaHlGsL=uU5*965b*$>`Ig*5uF1_2$nW=UtSE)bhybJ9+9a zPvtH7{b}8jpPzniP2iNU&xYdTK=&c zv5Ey^z~5B#Hmy!AUIb5PI0O1KA;5a!WUO08cpqw>F{#;zcAl)I@i*2vCnne`I{YPL z%e2Z>T|9nc0pf*SWBPR;q}`^fQ%0~i<{&?_i`jF^>#&*>Q?$VaS$n~maL6oogfrbw z*D$+<=LwhOrMr)NncaNZazortp`7uu<#Z^g@+N}zXOT&?_ST3FW<)?8`*zRe7g<`h_Cg?!yntxWAgItqDiW+5@}^>YlZ zq~v_;XPTUm7z38YSnjxxV4H|ADYV}Zn>6PRIQ&hq&Ko#izj9_C zEs|F;HvaR#5`!@AgQE@34-W|i?;jN=*EO-i6M+l3j)VnUAgpyC3xmT|e+x6tqa_w0 zJ%nO08rM|)41<1VN0`l#la5$fgxO)Q4hh?ZVjAbDmLi7*-uq)}R8R@t;~a62M<@A^IKv4TpM zN5~Aicqq0`7VxZ%)yOnAY>4?~51#&5R--UhJR;^wAye*aXiJ(SS2w1N(;iL9lR{`! zH+6=Eyemarhwn~VN!1ArTG%Z#J=$|48k^7gr_DMfY!#+H+mtIj+w^8TODPKqdBZz8 z*0KQ0%jig6PEV6EErp)hjhWcRvmnbG4a%;V>r9b^)eUm;@jfNChsVbtesydgEJ$iz zHr~g@SR>234Y7P4`ypcX*bWX~i1>(@-Xrei{2N>_vbVkWns+4 z^*Nz2r2zG58>mm)8~vli>Y<{x!*|DYB~|;33|o?@!H8gKY(mY>IkZJ~=3I+@^;)0W zujD?|m_Xc@^r2s^Ag-qNK|iTf2iNw&27qUAUv~G#c9P>tlp`4m@caRuqwu6UwDnbv z+}M;LY;2->%lJ-Y>Z7qh8-o7-=aulq zBLa=NTEfr~F4S8N>0p0vj!YVOt5=o#H@*8J877jusaKWzl{mejpce-B z#L=_8s!q#wH%LU^nDQ?tCr*Mrnrs>F0t?9aGqMO zgx*E99FO<*z8@Z`mgDaoyBIaDf)95wbu?@Qq{q+5CVaipuUzxM73 z83>1G8vC%fA*@5XpQj&0x*Gd!Z*7=mK=05!ZwGw+Q-d051Pt}hwTQonc81nm zy!Tx9+8)f9v_@Ku^k1s2X~oYFfAS)j>XB06b{anLqY3i0)DfZhT==$`iCEz}#6-^}yj0!{`nUGp?EcLAa#OxMY2Q3fPo*(? zKnGx1w$gD7RF8sk!?T|{gAAX;NDLu>S9X_3Z8 zg4#cOvN^Ra;Ve*7>+_2qsvT9rPqF8_ppl`2Xr*0-){uWg%U`Jht=D_BoYq2&Ys`dp zk&ZA?aIm?81AYc&I;Fgu*|D$iA$Sb?3>s$rtH`WItgUIi@aP_vo6wNhkknvo7}D?r z?JgB7c9)i=BA!B>u#Hk^zey>6QLGbriYA_-5v4kbr(i$HVFXcAr{O7LJVg|>by}Wc zil>-FU7e1n7~&}gQD3L$DGsDyZ;M@!q290^=VUcDxuWBPN(b8Fw4To+fh{)q4OreZ z%A_9BF2#zG{`NCA*_|^NZ)1Dzn#0@t3Y=^yc|BC#QAzP^lrZK{%z_y83W}$r^oB-) zs;ImL@5Y{6DtPXVlklchA#bFdST{kvvx3sQy45~H@v~~2!=K_XzbGj~?S#8CaL%6C zAmk-&P1sEme9{G3s*$#pG_I!ou}dMScnZn$ZkHjRBH4}g2{^^pC~tJR2SLq6%B#So zxCnnz9Mf}1nOl7U7fJV2ml5Ss?TPg&MM|p!oS#a9rb>ZQALuGM&+)}MA&Kwpa-Cmi zzJQUWT}7o=_0uIzmUJa-Rk@)2YUKYSj-6!GLKC-krSMaBMs^5lrvF~r zFs7NBYtbU522F#uLD!&fNOfD5ITbd~vdFSb#IwIeQfs4DB1mGrxZPxz>Lt6TUfQh# zEqj;FJ>07+Pjpy3Pk9V`uu9&~=@Jd>le_=LeOyZF_T<~J19(2#`AP(SH4PW27PuEI zb9S(K3l=R{CgRyomD(>+#m=;zZHE@-gLE;(|FQkhu_IHiD$n|)JsVwF)kDFT%m}N z$LNL?o~-mgCtFe zOM30Ula$&`e7!MP&c4n7_PT@XZVazGf0|l%{!7Z^rN4&Ilwh9<=zTFc0<+w0? zlIKZpB6|5Y&jP&rMA%Mw`Zka5LZ6S@JRLzJi|miaF6AwY^M+Z7^9HLOc+0qmw=~XM zI(VBPq4r^+b)GTBd8_C!t|IP|X9?)1I>pyRr#XI{=Irz)y3LMVyubRSYR@j7zDwnd z>ORgFGcw2J__A=m&}KPbYMUK)5nu23lFrh=*R|k_L3+oT$BR{+RbxCH66a~u08i8s zeUgihBmb74boQ=#p?G^!a$)Du|8an z%c=#d7OdE|;@HY#D=aG)tlYM8fp447;@djAz`u2t&ChI0JXM|-JUc!0bDoml{yK%F zy#Faqmy7+I=WNB>{RofDZouz-2oJlDd7ZH39)nGno)(XE&R_lQwDjV`kvFVl^*xAZ zg~F;}>sQ#yW1f4<#dd=<|7$jlydVt|oL{r6*qF1y)ov=`R7|{t8rOWQw67dFMUrwr za=^Q9gMX>}VB~;xY5Bp(dsdda#GU2gVUA5UVD%#@+oLww&ts28@2sFTjUQ_oNqH3M zCZ7Ia^z+D5eC6fG%1ct#MQ@u;rSlQL2T%f!{Twlo$5tYSR>)zOA#UYZ?uzQpu{-%% zs*>p54yxySb(+hf$lNx3{OVm7`I@v z_`VE}v|HrSGe;vw>aowVdU80773bgvv@{)B*Ed*a7h&y8_UUwlu?V>cN3o{<7-0i~ zAK?hX-w^g7WFX8%a3G9D@F92*@O?PeLRhOW5*?r7Js)xObZZs@UlY+9iHVK?e1dBU z9_gF${21?iF2wvnbBA6|mN%2dFLzi7=d`e$O4$FWBW}n^Mf}-56D%8=oMgoRw=X3` zI(Q~Z*5%UarbBG}KZ5MauY;8OSd@+b25+YV0?LYjzrQaW<|_@XF-*-YSDQbU@5&`Z z+7(%&hL(xSk{&DUkZH3PVW%o8BYNrg?p}XWM|cQw&ms3;VIyMSL##EN5Qj_PaCZSN z6xJa31agmut@2UmSEFOrw{hl0``aP1ln+mhd|g18DviAov^C0*>37^O8>%wO^+v)fnle0w#2`t7^;^ML(J{$$1WRXo4Adezd}DgGC0i~UPC zep&M(o%!KJ>#jAwJhh3R>HQujQEdaMbb|MLoO>10DIbTUl=lI%^pX^D%?l6S?Ow3H z?ZLNd3ODVosa{PU(p&x11AYc+wY|G|N*z-CIV+IT+w&z)c@!x$rYuI8wSZNA zAMxMy>;i;+4ME%w2r*|KQr`rGHD?ZD%{}(JGh61k@Ak}bzvZb$-0fcFal7}zpE9zZ z_>%#(y+_Dj+cD}@86(>C$W)Aa4DTaf{XAmaQihewja}rCO5VcsmfuCOk+w1Lgw`n) z+>5yX?H4?6BJdRR^q!M6&J==%uV*pZqdzAf@g+UW;%$>!cXiKlyqR(+ep}BluR zQ;hWe%qm#1_q6tc{vpr|Akg@2!nh{nB!bI8x1o_>3^=P=6Qg(}JkpjU<7*S;!w8)g z*2GksFYy*apfORv`In?L@v@WlB?0OO@v;fC3%yjH@a>Et4(}xi@gK&xPbcIjJTylU zE>p9RlLSl;$GJ!VAnELGvihk1Jn~hFSA{dzhWo<4mw#sxK@nEElm)a7=J|)_YLfmFp}05o^)G zs!=m*st$UzIq%@TsK{9x&1q;44uP?hi{(f!OCKbMG$4hkd>y0^Z0`<8u`%XtNdespGH5~j&MxZ!?PZ{~ zBt~;5MiNeo)(5ZcVL9WrT)AcZmZB|JZJDs8c+2Q5`CGq--UfAoylU&w`z3UUa$l9f-#S?+=7O}2K}h9 zk2z+KhSdPAobQ@P!)ma@Kjv}D9s8J?bFg<(ygexMVCAWzRWY>!n{q&O!gAdI?nEv3 z$MN0G$_sHe5QlB!LivsZ^De*~aH{b?0WYnc|76V?w3F)V%!$%YDg!&IJjrTXfHrla zcwGIJ4dWY%8jSX<>L)Z5H)z`ZrJ8fK6UT9TOcw2eJ2t!2eO-aH%R_#Dm~BG4odDLQh%9 zDY`h#=Oa(FV1}5lsn_hLapa3GZwo)6LjMwAOVcV#dx}~T;w}67D9&pUt^=(d#G?jl zS58Z%(N8hGY$#f^V55GiQuEtM!WEI{Tj=EeX;Af`?<_<=WHzZzTPN(+BfTq9)}k#F zl*7IK6g8kGBCzP&BwHELgT2;l62gFZYM^H-Xb{@ z>l1gAkHL?-*jwaba7#piyn5i!?>6DRqx%3jWA($p9RqiodV_7TOylB<5pRngyxrHE z64%D-eRM{Ob3cSV2(R@0lXPOB{qtk6f21{-8`2ww#x3i~4P?_xZ5WHu*(>*U{xq6b zmWR46^=$AM><2xX%F@aWl^W%9j8qeX#A{l8+U_h+&gf$Kg~8#736Zk5JoY4vL`LXs zNL@-@(rz=-Z;M1A#RV;(PtMcUQQcQyZ)vE5r52+bN%3*Fhf87W9R>?Ytn()DJr7|n z!W@KIeK(N|jP$&9&qP>9_0RWqW=BaEuygPhmCG#?u+ea9fPX%>KEZDXebi}zCzI6S zaM8#hK(COa*nrV>2*t$Yy5Y8zx{8iBR+{Qkq1m)LbG`m~LFtO^X%Q7q?0JlCu*zW^ zqSjl{v17iL%FWl+>vBYlObfe+-M0t(yGX3_m$7K) zqdk3{cl1U(6Z)7Ejz&B8BE-;|j-%Z5ebLUl5RM{DL)y~5zRv3bI|b#|ViYYz8l~Tg z@G!zb1T*qp1x$17!Sbu^hpP@R5sDWYgeixs4=>ryq+;>hjtLi1=U20w8tD9k$gGf` z&wdrbwdM0@hY#zby1zdkT%)GID%qd%vq6>sVUQ(Y1y7(D%5u8c_*JtzJc?81D9lH*fnqpCZ2m_ zLchn>H21V}$4tV|(lrfj48fzfUkwSaLjc|%_=cme^OGJyerk5UpVs8pMm~=`Q7782!mgmN^8@7Mqa^xDWXi^dS=IjHjl2B# zs?tOrM>&xe#K=b>3*T`>J5R*&{lv{@c!oG%M-a2FqqM__d3fy4i0$C9KM>qH;`=?s zh|dFf5{GZ&X^F%09Mb#X)K=FN*Y2wMiTn5(e1{cS<<_H4SDh3m zsx30DTauTToBTUQu3wM23~%}VWiu03Ed;WP$tz8!C|cko)h z9kp7GT6Lea*H+d(TZ`SV4m)41S<$3q2h55A{(`Wz>y0w}+*aU(cQo5lC{Ko!y9oLk z6}{1Yi*Jf-!}rsDonx@dIvkh{3f0P5^oftc+D0+&FHP^9mGX0334!d!Y2)FOGMcbV zZGqRzPc-EF@)J6l0p11|@Lq*)6Z<-!icSGup+Wshqkv;y5A4qd&`;vn|2I4Vy={SS zLR`W};u4M%Qa5N+=goMYwves5(S3gAB2@l~RqN{b?gac=>poAAvUuQxr9L|no zS{%n@8Ng)Wn9_kM1DKk>vdg)(3u?F5zK8M}ls7sH0x1K~VeBcWFZA2fjA+{|-o~k| zQ@hWnwvRaV8|oX>XEq~H|DitP!;|`nrO^RD9tZd1DQqO)2l9~YUIh zTqno5es+M5ot*2P;2OcV;44pU&T2ssgac=jAo0}h)8QvDYD6Qxmd6LmJkH03t$ZA- z5xd$$s2$Kid1x-3e&fy07kWA3mjD z)2n*ePJXh9dQ5dxvi5Z<{P$G!o>^A(o4(GkqxAb#^ncKs1*}4rg2$6xg8Vb&Q~xT9 zirDWjLh5m(QkiJy4bkQBVDNLxUJWb`YV4k#ML1>sE7m1H4gSDg4=c;zQ<^o`!WMJ* zlms8*QEQq`Yq(8@`1-#)%PmLjm&cnazyQN|ZMs0&M#q&Mv zUMW`SVY&BIEvw4GIHOVW`&7u>zP2UlQ=K-AbyFYKd&1Q(H=PR?lpp46{==TW&hnUL*2l0dy$9?U(|@|}OVp$B=oRGw z@6eeBoE@dC2zrDmi)Onjt!VeM#FPeNFG9wsVO8{-tk6yzPA0M{Vc#eNV^R z&QoY5A4CLsd%W!w^ikV+0;&6usv7BCFq`HueZsAr;+pwkAyJ3sPI#h!nYd1F&pc`2ZlFjvQ%O^R1ds`=lmb^Q+Jn zsg_5>zaO=1zX#e~gI@O!)LbkLTz>zvj7Gsv2f?4wYucq*oTD0^2=yh1BdDb&~QmD9m0_M9jV`vs+0jYAI`p$jb?GH!v_!{ozhza{Pia#CEvpAjRSm&vj zkS_+rJo1dw$a<7E_TkI<{PWlsvPz;c0rUI60(tVOuu4PEXP;Q-Z)4UL4dy2agTL8_ zI}KJF;QKO{sW!)csE=Z%Mh)^z`)FkyiUH1d9`i8489@JUG5Co!8{|~n*@ADEiesHC zV@0^t=Fyl0F1mvmvSFWK?+ITFI#WZ?`)P()3l$tasc zUU2ZEm~MNaX9$nq71M7o^y_)N67hwJm<>Wwu2oKePpl@ldw@@ArUWbLu3ib;8}`kD zea*O!8Rl|3n{Nj6o+DxW$c`9Vs4h^;+;^5n0`ZIHkJ z3<@%0S0NOeJ$gP*O9379zdvf&r{y~D1V1#c8Yo~4rt#R&oIv|w1zrUnJ-qiQmgqSK z-vl}#)}Z_^Q6Br&__$1CGVG+x)ST+xzD6ue4oHO=LGtj8cHY}q!KGGUz+Qj!8X_i{R$uGGdQ5_2@L zXl#eH;KhXRhrkET7r5z&m(T|^@e)$J1TexsfPb6w+SBd@OAa+Xg}(X}tm4^)?98V% z^fj`Tjc3P%!T*1A$@}2E!SOp$YKQRPOoJD}^WaR>n{VUHM88zJ0jIC{ip}ktaoKsEr{!rL;rg%cV zb3(v$M77_K2{_N#Z1v8$xW!@_u>TnI#Bx4geHbo1Q|hdD<^`soxp`i_a~dEP0pd%ty-2Nco;y z100VdWe!s2BIQQ64k?d>%X#Ss!)5$=e^};E+|pt%1*8nfGQRc{(YH$}&-asX$;^aW z$jWM**#T(5RO7rR0Pd_c&e_CWQH}F%>`d_e1-?MN)gW9qY1YI@D#M)?w%kanRVc;| zz(0|X(R0ECml`08#`v-#@}B^d6?4ECcOqypJND52TySw+m|#ZD%t4+qs8r5HrLx>f zycGOf{a2vWNM0)ATcy%3DwXUu@=|(~N#)%=xnYyRKRl#DS1Jhe`AahQ^p4KcubRWRnW#`0=}rp z;W0;wB`}g>aHI?kWV#(TOVx00FC)uNzrD;5N_Q_@f*I60uY3L3<4rW5s&i@bx6;pq z6TX%9by)MQG<<=8cE-{Lhv=^0UON07Ymw+MG$*0te#p<8O>ex1%uD}a(!J>uB@EtF=nDSfP;2T!d{4i|X zs%@Jr-I8}wdA(B;xE8;1U>cE z&Pi3jr}qVKOIUBWTY*=y8(?Km0-pKUN#Yb27{2bM-*foZfzHP0%!>Qz4)O;kA4#S8 zyRiYCtL9s_z{?)+|oHG{Zj8&1&ElZs^ z0aE?cH3Q!5|i?y&vY^XrulHe0Q23*duw1P-`OtHT{+S=G=4l{PD;_CU0UBR{j3e)D_(i1iKa9r>96*4uP0#n&w) zCqMh?KNmm^dq+buLtqqsE&O+UKt0I;|Iqw}mPcm>usp+e61P9#oI>L5YesiCJe)&b z@U!keV^kp}yAG$H1fL4ckMI6Vn12sH2(wy)ERI>?uym$0yt{?lV!0f&?jrs*2=H|= zHNSM(_O+|a=DmWqudz5S!PzHj! zT|vFUURXaG-tdBQsOuB7nXQrIVSZjmynv5#*mP|;>0AJR))H@`Yk^1f&c`{Uf7N^* z6Bgqp1G^f>2pCVT@g}(_tsao9x}L}0L0Y|M-I8m;{r3YrPw~a`YL-x*n&y}vhaZ$C zN@`jSsFfhT8E5LOa2l}8_qsq~KIg^W;Q>{_>-IXA2$Nl{&SE#x4==HI_@u*Cg7=S0 z-d#-T;`~2W#d%w$;@uo6G6Az)eS>t>YODnGYLJSrz)6+?ejzEi+!I!HLG(YQHfdMS zxAXUsH-)s!)o5R4R!mss3RZ?YRHhcu`PKq_=~lgn-u@M~ElYq$F6}ezi)i0d7Q=3G zk$oB68pqFW7kv>HXwAI8?{qA-4kNHozZoTk!e79z!H<~a-G(p5g%ope8~5_u=7G)0 zdp)a*ca}jJ4k*U_@iVb^+QGA}sP8kx%=eYe^&Vk>#&4aIaLd@n|bTTY? zN1)#&VxFY=$&`Y-2fY@a!mODg;@ok&GElB9tfmYbNWs1(1Uul z8~!k6_o}k|?(6}xx%DyW>VVo0I2=Z-xO5$k?401XrD=Fd0hPjVP#`@IMGK&|kqR!> zv=CMD-{w@QG)cX7Fjb~xcM(-1H2Ax-e)CAIOw^j78b-<;LtDQ$)EM;bBmMe|)!z0q z&M9`Eo>Sp!)Rrh!L+{HKt9FEkB)JRuBRu~I7rlm_XA|nsmaIYnZcz2(zDV8|61`3B ztRiE7LV@k52KPJi&ZRxao8%eke*me*dO+4fmw9fD$BjPf-y(3yq=|E+d5GT zs@VfntEwrz+^gm^M%V%3M|4$HXLuduo1NDOGQ2n7>B4g=p0fhzKar_S+(UO>7z>6S z8R5<6c$;Mhr7hMI_ABQ2^5~5Wy2)eb3QdQ`Z0qEAMePLB^ z`-0hJPMTdrr{_0FODlLIXepoTwRSKz*E84a=>tN5-%Oj(JsM;CEqiuvb`O4ip-{D|Ptrp@@Sqi`?74G>z{ z8>jh)AnsI-IWiY<*#AAT_uP*02?5Wy_&pI`NY)|FJAXnJ+=-za0?*cqRy*022V781%Iha4+!M!jfu^~kcR4-n?x1@ajavI6!-^Jh$ zsFkmGFI-L|=C$B;8}O@gm7Tcu5*(j~)w6T~_?U7ZN~$|KG377d?B0Qrg(vbs!5*iu z0&ux;3Oc|o9)P>z1aYNFxi^sI&crD@eL!D0v zrnoK3$#!PBi=J2o-!(GC^1cZts~ip)l%nIp0TsA1CMQ zuc*H>QJuUXj?Dn+Tcd-qJr?R~*~RZ(-U6FLoma&8X(+fA=YYclv$*#CT#mm)HF6oR zW45*oSbiU6@ml(6$XRa2YQ;a_yy$2c)_l~uTBbRwm8ZnZkltU8_Sfvf(3gvCOU$mS zB{;z~?_4s^z}IB1FYqo_+m_;Y)wuHc9%}t6u17&XzaJNL^1uN7t1;UZBU}}-md``o zj1Pz%e(A*GP0q1FQJE&?EZO876Rcb^G`2|GOd6M8!LMuwv=9Xuy4}az)}I@YG=}uB5uQOeaKqU`qYg*o%ctAVX5qI2%pgU6#O|>-z%_O44fG2cKChG zLvXv@Jm^+ZQlw4Jq(c?F4pXEgml-vnraF{|{py%?1uRY)+#NNeydGmt2y0-qXKMmZ zp5k%UdmM<_aa+kVe7#TkLdsPb`-DOqbfEW4!Z=N9rbU6PXFiCTT@uZ%P3SF8_37lR z;<~Hy?rmF_G7RlzOJ9GBRnY#Yhw`a3M$=GGu-*{Le zH&&FP{BS(qS^VvM1-2}Wtn&_opU03uvwIt6942nVSB51^6J6UpuB9}`+*QLy<#~s8 zu)Ng3OXY_m4;9%v9Oe^ClU(m2{^e54UD-_eUJb$CT*LC9mkxh+O5mA(SSe?j3Ts~m zSXgRHYor!|;1oY@)DcFJ15RKga&epd9}+L*U;29P^1mISe^J>(7yLmJeXVy=I1hPtCy& zs*=mV>EOOgLtt?{$0$8>AqOi-L!dgIQzV@jl*5qogLuvXDd$H6bg)7-1iq){bU0R3 z4$5K3sp!wCer8aP|8_%QW`EB76N7RXa-97+uAD)V64z7J9K~P#%mqn1SoRS3(r}F` ztolSe=gZ}L+u3rae8T&y0e2kW?E2#q&mCZ)8^3TCA~ZV8NxC zqMByO9X&c(Qb+gYYXV|O9jBPm&_lCjJ9@nm5=K3KQW*8?lS1BZJX=n#9k5-}*Sr4t zG*90RoLC3(8S7`bm!7<^Ap2S!W{e;A9Ei`nABKE1AEMTV25d_)7p&aoGzFH@jEea1 zpY*~POE&}s!CMMf$F83 zTFRii4Mhkh5BaSYyITEbLGe{4xt{UD*0Snd~UJ87%6!#-#>jKn!M`D*nebo}Y z_A(ekD9fq^B~(H+O!%qpvZcx;!gZ7que-IWfqW{>i2j|pzco|iYQ5jg6rV?OT_~;A z0rg0&Q9 zE7U6HQ>)n8t(CQEiQA2s2OjQr#7p37M~syWYo}OmEJf9X08Q8$Ned&Oh2t&MGio7Y zt;w^vUxz!e7QLVW%7x6Zt3Cq_kPR!Y1N1DcV|hQi3VTRew+;{F5Iz&(yns)wlM}#7 zb<&T|QG5b+E5Zdo8j_z&b7i+iHpQhG4*5rQv$!X9&hZX|riH*PP`q{4uRQKZ+>nqQq3#rpo z*g3QA@Z@@Jj@g)*{A!vwbC%5`6q8J~@Os+jFnTquqH#j2Msqee%d5fPHV~!?V;?+< zT_jctQb9uCJ@0Kyvc2FS`5yGX0NLL4sJUXn!vT$|5zf7;0V+qb*jysuU~QQ8eqdbr zP0LDg1Jq56=HV_4_1=l648O|CE1wt1n=2_2t+kRmiRLx{u~y6rpKStI_A8ZXq$r@2xo;wTX|Trm4!7nIjpsnhIKY) zSZ{NL4YnJ?wBF=rJd?0jof@|fGtnU}9**+`ZWqM*G_kP;_pv5u=-0JaXqCjAR!P83 zt|gRWLOaR4%xH0ZnZjJ+bP%tj8&im6}z0k8%R z%cki8`_3TPuhB|R#@CtDKUu!!c!KbUCXIXeO^`!LVe}@dZ~tJSbh>Zg|LYyKGyg~{ zx#~L2{`dWMePxd;2zQ@~tBi4rf>qYo| zz(=_bw%{22kl{Dgjddgbez#Pf>cvdCn*NFe@plvaN~m1_`jX!1TfA83dF*;$gGEw= zw?yXZtWxsdab)grb|1#~!JL*9U)PF!1qy5!Q)$hrrmwRPPN#LLn(i#VG<^u#f`mQS z_7-DVVtl8wr{|2a03%Orn%KjXi+47@8B$qme;dI*g!UtbW_^6!uPM}E&!h>G+=hK( zS#MY@gB26J_3vAtn|wpSn15wp&pF5P`GKPRHJCjN`)y2PT&73ttt-_Xfw;41D##1lVi{lVbPb3xEp}V?Tp4uD$I=SQVPU zp&1h26k8QG#_>(-`0=YrWlO_`IL2umcfLweR{^I3_#*g{M2zwKx}a)M%?a%+1uD_Z#7CtZ*T0b!Jqzn5Pyeiy@%he-F)!Bgg+REmzG?>{}Axg>fmDh z8##WdO2zM5l92e{m2kyNNdF~A66Yw=Om|2O@ow$@)w$;G`_2syHFk2#Jf$u6Mo5 z`Tpae3b*(`lW#_Pk>eJ^;;M3c*H>-w_QRGF{1TheiT%pKD#A;555bQC=ZfmrbT|R8 z*5W%$I>(_|vL>d(3V<>7-ix`=#9Y|eCG)~Wy0O_T3zJ#lZP>S%mFX#+*oUy?9YK22 zr0Dn)=Py{P?5Lg{(%`o|^gH{mYQpDRCRu0_0q?zzR9pZ~IK9#?%cGbwNu=4n&O@|iqHL;;&Z>ExZ?|oJ3go1qE9Ks zdX(bUzf#F8tWmlNypR<;y=%nYZT_D$8k85(>fMXOT!t>B{(+uuJP4eIMQvF^Yn`ajf1{c=C=?<%CQ zCBZJ%ANW?w+{Ynb;E)2}*P1TF@48F)B|bGwyogVg!;AS#bSJrl`Z1vV?LOh>lz*p= zN&9h(=Z`dNF-u$_+o3i4Ww>~7@3N)oTx;oEYfIx=qo+DHJzt%JvFZ8hk+_2>)_Hs1 z9zHHzfsyJ(d@W09xAaM}sl($ike#I>iAJ7^B#a*ZxtdU>af)9ZLn7pjGq;EL^TqL03gBh7DvRIn(^!yw79%SiIYCHhqBKZ&;kK}rmgejO|+ z;IKVdO&$#2ZV4CbxuW9}+(~Y@te*dbn~?B*tEy+Fo`{kJ%nM(_Uaf3u%$I3*YQ_7J z*rXQ0zH8C0WkO+6;7WY|hg+WTPI&>`%5x^5mBYASpWch;mMi@2Q~%9>@4qj5TgCb4 zs%=j5k;ht8n32&?OWI6=?!@WUfq3d;y$4gi3XGJ$3=8oR$w%;)m0V&#fH%!=a9>N+ zq7m}muvTsi6aH7|_opw0(MH};;1foF!w2i5>ofOa z_cbkG^}7Ba_TD@`sv`RvuDVOoo!gysayy|3A#~CS1QMW0f~-oXJ85=776%bEA%LAA z5C~{o35yEqI4C%SFggh1xZpxSMah!T5c`SvtGC_4!@WkIT`)E?I-$08=DAkrNGcyv%KnSby`}5JrtAmH*Mfg5{`LNEBc2WDpF~*RHNhqRry_+_?OSXk#L@jQju)=NI~wA3yz?r&r9rPd(cJDK zMayO)mD50fZ1kkxo$a!R;Y@~ck6xii<2ST5-_p+V2He#@}}w(zAU$t-Gee0_m5D}1o6`Ny^m zCr$sMS-;gas}`D7-=SHBzZ$F9W6G~+mZL+nvUJVL(|&CUg~3d{ylhvMSAS^6dF*y) zIY*%xoqt6$E^ENmnsHeJuGS1q11799>f66*fTC#tmA~ls&V4c=uF5<2{WHs^kE&V~ zx!p;##E-x=%lRqZGo5ksS4CzxN6lY4H_7^G?UqO-C=!IY1xpcTSNJL~?bnn4 zsrJkAt%_xJ9cY^T01w7`2En z-U*Lrze~NJYQOL2$K4rM!SkoiG(CVX%}j7F^-P`lM8veqf_sIzli}X3wKF|&3?r~Z zGhv+K5BxLEk~&eVDP65{Sko%jBkq6MS0-=)(Z(SDar_*DD# zOjr_eIvH-8%wXFh3m_L4mP9h06lPccl88%l)xwpfxjb-XYc2*?cg?jVb4jF!=HhVW zIJ?Z-ea0^?!9CvGwItFDv#GpSVhDLD31{z1+7g+|1YcYkrSVB&>da^w*3C?vwH_;K zWoW`utjw;Ru(X_GO{K zsU3UNSHO_);^Jj+oQ4ejC_DG|FdChQxd0;$2Ezc4pOhOc4m&>hJF@YlP`qb zZ$3)xIC>+|Qh*-7R)dY?{5h&K2kcI~7fbk@ScGnr7_O*qw-=A4BGWep&trJ@;;~d_`sm)a zDHt;fo)v+*NXjnH3498{O8rLyTahQ?zNxgbZ^G2lxJtmc#Ri%4Pz6?vOg~f>-M{$A zW2wm9vnUAzk6WTydwWYG)<3@?Rf?6gnogYV4Ln$pG&gbXvmafplMYtbWd`qp#{?D(t>TAgj0ZL9AKzmW$J?u*Q__d<+L4 z8GAUY-ViH=%1l~|j(9$-u#d^}#0R?jTv!eL7``e?uEa5kV_&=?rkD`?%0Gjj?1Fxm z52d&!jH$p%+N8&{x3}~o#P|OHKE4UU^kT$k9n}lz@}7`0!FA$qiEDxR`Zz7dEnX>< zg|CHUD~eA%XfG~(A6$hQ(Nwe}5&w~feB$YyV;!4}lIuljD9||i;;!acNF3#?;!^L- zQGum1jePmtujNY;@hq8hm7J=^b>hFtnWf38bA4au+770MoHpdORGEd{&(iee6sn*#8QrWd#yWKmsi1ccq`8x91=7v_G)M=UiX*ME`e=L zwOCob+S?U#>i1zzy|ec9bhS5G|4qbi4e(a{R$&(347xSg`6>sof>n!)VtG1X#w=?L zRu9unQn6S0k>!a>!acE!Gm4)yo#OwWrJ-Y8J?-0u%@YIv40NqXM!(t?Ou^e4oJaeB z%D79s3p)<5yHLcsH`F^7JLV2w13uVF*bklJ>A+y@h)!vz1CvftwA;I&uh>E4VvHn zh6c^npvv~$SnU$s^GzXdi^6Ax38`gH-0hum={@p?9f-mSmv(CO9;AWjN4M|LVC?17 z=v!O1qg@nnlEf;UZi;at?o{US_+~rKzH@>9dg#H+^@GN2pp#Ftc-BDFXKQdqee~qS zrG*Bb?xmtT&C=>fm&d@av0eqCT#YAI{%7_Ahuq+V?Lt$nS2(vcpW-6CbdJr~fSq(F z>S=|5fm=s>gX`+kufP#qTyRu<1AmG|OD(#tc38;9H%CNqA^KoCCj3g1M(u+mA%G zP2DD-^}W`e;m6&`3eF5`r}k`wdwJwKJj3vK@D$`d7oMvL~VmL0Lz)}!Wng1>!8}kBwp1Hp>;rB zevVv?QL$S~)LMt>)H*B|sC8H_L|db!dh2kd9Uu5+bk`7_xJ;*glg%3Hw)dhnDo1`0 z8kL70dZ-(oLOdhz+=6F5W9SzJE@cK*SNPBZt}Y`N-D(|m^{l`SH?*?1HxS+L(F+3| z+Ap0B?UzAEYmta@f<{>lj{7x^`@wO)#xd$5j{8A(oksVEC>=QJbl_;v5l5ozsZqWH z%87GG#)&h@MKVTR#Bt(G=1kV;-jC9OqfQ5o1|4xEN?N@T-QP5Dhk(;8Y;P)mB zTHFDp&Xy~OI{T^5x#tp2-9mib8{E0)@J%VRVSH{}=+nT+0Qo+3X?zC#z748mP^k@A z3wPV#Al(*f4_4(42<-`s3ar#bFRwszjwjl(iwe-6Kd{uJuEI9;ry z@3m<4hhvr!`C{uiR6B>nJY>j_Zg{%m>5Zq5twQ}oOF0B*xVY%d?Ul8*o(nbFyz1)e zay+-=nT=;2Xoq#s{t#Y;8f}C;3aF?9It0ku0qqCm>wxx#$xdA7=9!eI&tV@_uaWfK z+_CdfwB=K2r8#Q zR*!qP_FLrMsr`E0+qGYx`>k;FZk1na&GmIO+PT(7KZn}%=yyw&$&ij~k&dj9*?Kyx z=$-s$KV>TRKStB`YraM=#@4$Va$jyVr>CdK<4MAkf+v-cHeKh&IvkuvLutZJ0sMO0 z=d|AeV(OWHOS84cqVUx{;S}(26&7B&Q*J>q^#=Vq!w~e*Z%0PziiBgX9Jg;>|_kvL`UDIG{ThNX~>+sN^`wc;_!?gCwQ@tV} zqK{i!K0^Ct<)$b+(NsZrHgSaZTkBgy%jE>3oDDwSWD@{uEwR2&LVwEI4^0@(iwJC4>q zsx$wky~ikT9PXw#Ig!`3oM~FQ^}W)n;Zse*$s%EE%b7Fd&NnVd_3S?56|n{YKJ;y0 z)YczQ4{3K>1p19i^^6XD5>R~9BD{nr)hCp04rqJzCeVt7*%h>k*|UIFoAemH)|(RS zj&~RBofgc7yQ}t24`#vb)ZUpv7u;E}+uI?i`r>VSJ04u1oqsD?-aI?IE|srrg7P|HL^p% z3P3A3XI#WS5^&yyJ4wvr;zsA=6pMj=-k5qx9^EpQ8EaUdo35&*7ZW zUfh@KLQG#^oj2C7RhhO=uJ4BXhg>*ma&XnuntQ6&)x1-6xTdA5GpH_sQwpdK)Dd5H z3Hzx1z5JcQ_e7f;GPSoPfbaWZ@@;B~#+n4*!)+vSW6Lj^&v)?2^jm@dLc@R8a_ryo z>cw}M=_k5V0Ke0aZ?(w7Qn&}=S%HVzTnq9qtqtqss!a8}w%T?m$U`$^yx{`wP0-7S zG-0E5rq`~mbl8qy{tkUFEA?LlCoU63dRqY_Z zr5$OQqxmgu!3w>aMlF2{u`h!1B^DuX)$*mf69Qtf@15&Z`o)?GX{J5*|r>?@IOej8SMj)$#;@dFXrqO$ASPkw! zhW+1Nv$Tf#mp<*g2Vq5Ed6hY?sEU5y!id~gd~%l&_hFlGT>0nM&d>=zEQoU=j9WcXoA3UFRs-3sqTP}<%=`(i2g3z(VZ z7To`yn|vUZJH~9B!g`&<%JYrhvmwmFofMNM1(pWZcu$2AHE2!1Td~G_JS5=zcwN1P zaO(P%=$|gO2AMP3KNfo0cb5CdXrnxui%W8z4%={&mCgBc_?zyqYGl{kJV!bpa&grD zDJ-`+Bxq;)RShTqsyFam8`APz6*9TT{CSE13C@R{SIF~AsOuH-`~Z1O!3%W`4fo{A zQFI#pg02nt&YvrTM-tK%SH}yQ!?YhXery_-k+PUTpBt73CY5?BR+Zw!+a>=DoAmH> zyM{cHpA-`xSu!O}o8i;XXdwCcK%SF)z>2bEdfLUHuZ|B{zm*}zSnyy;tCtkiiyV7F zMg_;~Jr9&D+o`4BB{oEJiqe<}`OG69nX=T|j5*R&>}Y&!JmF6PFY5R+VI!U2 zP39WCV0T6JHu{RqGF5*}!@Esp%+oyQ7`=e!m;2*#;}3|?#h#UWra5!Z2j$$KL*Ki8 z3P0!Q;~W8s6XDEaoZGe_xAO2kt_3-jX;@2sXPdJ$r!obu`E3og%(9_&;11lAG;WFi z5q~Ix)uT;Wih?_6reOYL8RnvM{iYs08~8PjNQ}F0?#1A=+(^)0{Aq-hvfjnPrz2VJ z?{oVHop}QeNUoKUzUa;NZ?I!ls7ELRHXN?+5?V$3_vs5fORJ&uQKhnhyG z-LgL{Bc3exhd5R4qi~E9cLe<|2D%f2)p&)lZ&v8sUn2pgCvl&UNS|=hXB3xKdgNMIoZ^f!dDOwRM<{tHZgC{-z_?r-JS z@jhn{9L657gU}#x_M=`Q#Jan&`hj{681rH`IGwS{UA_ELQz55NH@4d9cz2|xe|Gtg z&?x#Mw7Uv$fmn|7PutzwWxsSf-`UeRxy9kBzg+y8~Vdr zsE32|SxeiS`?klX?>c?^lE00f80q0*d8~2PlDyKG#BEPWJ+*VMyDd zOK;$&SWk(k(FM#XU_zH-{WznvX$ssyxWi>@BE`;)RTI-`cAA||ToT(NoMEfiM2c4Z zITE*uzL2v<+Y)nAdqL+DBBZo{Qwc)9a%rjGxn$glDP6X-w46~|R1x+Kb2JBPcES`Kw^hInIevQ~C{s1(E6>#y~k!nY=h+Di) z1x>IG<(IJUqWjNb)+4SVy5j6;8}8paKlgP$Ka5Z~O!a)Ke~ z)cj~I_*YA`7JLK_g`hps(h0h~GbEjhfyNzZNe1*bpjbemmeMlmoC&VIEzYu6!wU31 zx^l#leIYDnH;3c0&!M(r&wn;X^4Y(Ht=XsWoWz5XJo+`4(AG_uP*${HK~b4C`v~yg z;yH}xAfB)Be1&H}o)8|K6_))OS(D+sr|0zJ+H7Md|1z9k;5q$ht%!RwM&jJn(jc9x z@n9`Kd4s8_a@oqaF^cPqJw3;s@W$V#!Dxklg5i@B= zz3OWWlN2|b-qhvT2p+ZDDR<|vO)G&VK9lRW=0L`R7K$^YfkLeB2(c0&-mdS_h*gSB zh2pDhBSM{S5?T@`cP*wBmsac>swx`fBX^3%0q5nzF2dSAEOfsZ7P?2mSos;?Ju44d z{F{+qfrGiot^UZZk;tv`5b`RfqH^=fziKiPpK-98)CNpwxGPP=la#ai6#qU_SXxo} zRtMdXR+du|+Po4NqPVMX@gHD4{pe-dVVls>nEN%*3H*H;i2u!|H#$P5x0Y^~kqa}} z=9R!w=wc`G;JJ$qjduMNw5HaN>xuTy|3 zZqnMHAX;{O^X@isAMKM!Z0wdWJXBP+Jdn11E$)OB&^8{3@M31y(eR0d^A@sR1vncnbrByK$LZm~r^_nJ3he{_F^ zuU+zQ!RkhPkmuOJ)8Ss`O*(jIms8;k+|GeB%vvI4m_I}--nfKL=@RtQG6bBKA)qxC za9RenpE6D{NbuiK{}0?zPOI6Hg4-&5C5Z=6|4s1??ac|;5x{fC9Hh9e4{ohk>K%RH zZ9lDw;HF}~r6B_=P1~Cy2MGZud1J2@p8oz>5qE9-^UAP zm*r|w<<9?SSm=S;fHiHA9jpiPw+H4Jdo*i30Xgtq1%*G@;;eU7evgw@x$9(=)*JN2 z1d1zmQHqrB;FxU557RcXcmm zQc3MgV6TQkZ-#2=9TKDxxv3=wb0_=J_d5xmUw|jeK)kTjy)TT^^1j7wI#|v z?mAONVTQFt>S6Ir1+#fUL3v}iVD_eyCb6LWL$p)TF!IG8%AO5N&KK}J51reDn)F;a z*7+y6pMiTlo~P00qO&wu2Kqo4vwMtnr-)$|c2H8!>u3eV*AL@#oNgX+R*E(E*6qFr zw?2xS=I_3T*6C>CLw7s&cZz<;c5=Pdz9!PwDf%PzN$CA_4sE)dPR;8Ugr(r+6)&&E z&eBGq#a7T+vyxjcY{2;ewU|%t>rT|x@}9v;b%$T1Q^|2AI`L=@$*yzgU!Q@!q;*Zznl}2DuC0v1IdFIL+%wd2#%zSXxp7zX`F8XZ zGN{jhdxzTNM-uKpyLBY>6X-smvI^=Wv^9U;o&lE$u20%CD|vn*KKZILo~t z9kwi!<(hVS8@Z5F$DG(7wu8SEK&pHfBVmP3nn7O!R@C>z7Od$;-_f?j?vKHJA;V$^ z`^A?yV(WwS=O9lCN^|^)wDxhCxL#V#pO)aa1=?O(|ICG9I7M^9VSD3s3HF^lgJnoB zwlzP7^0YUmB}@yl-s6K3Mufu~O|h)^!B8h?ds*;e^V8S^&i$6P@$NRP5zBxp1uk#9 zWxX@=(1LH#yZ$!fMm?m~pcJ$$GwPlbVHuXSX`sz(7uWO5LscwqP*7aIANM;k%vF(O zw_xPNayEsE{Nh@y@WWa=+_Ahqtt`7CCVLysC%w1bRG*anW|(MqAQfA}&qPw(YGWc! zz_df(Uk;kGmxo#JrJ*R^mhb@Z0(PO%7jq#Po4qI;o6UMJKD*#`N)JcsJh9^XF0-qr zTh?!z&ik&}$uhW>6O-HBWu|%|dsB%jnrlvI3*8EOeV=2pMnqF9X zY{jNmX(Hq&jwOv(fgX!o{tYIG(H3Z4znD)l$Y#PzqWT)$FmiEXZfT@bRr z>+-G_@j;7ksh?O!mSzoZu;MuNgxZ5&LL9xzrZSSY%j@Ew-ilaOz0q>vj2Sn;+*>yg z{GUW_2-%h}u&0IM{OR0PJ3~ zOC9AyX?u0U(F(F!gIngJMHJ$eN0K*u7LhhQ1&DV*k6-2YaKoAlc4(b+SX}?i$~g2a z@*7;0n@*a=i6!UuiR+$RDK)t{c37f*x!QgTXI73Xu?C}I<{aj(Q5XlixwzJYREE$~ zyDRiT#JP%iZK~MTa_+R;l2mXCva)^sHA>7Y7gJ8Pw)QRFRFPY}sq6sKoLfvOzq1SL zGc5RAg}Cl1%>JA^Be$q3%RLZ+``kpdXNht?Cb-t zUztCAt*os~#_hgHS(L7-747%^B5vVwEn1G=%jMh*Uj;RUW3iI(Tk22!O1ZW*uV|-o z9Tkd}sy{?!Dxge%s@+s^664Fi)_&{Th7x7DL$M~P4Kqn(OAgfXoIzR(eJ#?vDInHw zD2UoIJW zeG1g0OT^&DierIwUhn>>Zau5%*7?&h(5>^SZ$h{FkZ!Sjl&hn-t@#UtryJ8;iv~c) z3ZP^E!p(OBcdGtlrKD{Inzp^#<(6%vYrluCX}35**MiWs^XEy|(mjjMj(wf=Tzq!m z>l*@e5B9aMQ{Ae(*dHm6YJF5UZp4^)EA~)b)`_WM*Zn@Mad9o0tm(r9w9d5ShriU; z{BTAc;zU^wu)m+kNCf1!-^9Tsw<=Yw|ccWeDqBGUFRBc=^BbI=2MC78{a z#kj%Gdhh{Ot*6w0JE3@vs?};W$ooI&Z3^xwk@x%jzKH4Gk732u`uY0x7+IPRKH@)u z5$CK$pNBc#dq}^`$0~P6*s6mi>~u?Q)Q;{9-=9wVS78@0pF?&+s`UWcb&1hv%Z(ax z4kIcjADrxwi;dAG>$@qKS^2VegKp!juyHik=jPF}xUFSFefIPxwD=!~CXmls&6eCs zeSFblDGtu2w$ z+8j;OBi@+(A2%^U^=vBpCH4CXsbNE4{I-U&zJ9dEy-PxyDoCTHgU3oU@25MEGZ*o- zOQ|L|-12YfXt~I8riZep=h03;=yh8J-!e2CBLz2 zU6a2{IJyfs0cW04DfbTY-hB>IS#0+9I{1Cr@Dkg>7fzaDH&ysh)1nsb`(QN8euQB; z$3n44^APy*wOh~|c?+{prWUpO(Yl@}j|lqmBkF)_zP9*DEyjNxr_w#5y}vo$)&H=b z&(y|jzIZv8pVFxJ-~_T+i#|S{*!`p9ZruFKSJ6zqfIe4S^Fq`t+E18(9yotmKp&+A zJs6gAF7(WW0ciDN4zs*pf*F1Rv=>@Vgk!RQ2sgg@40s5c)N5;Np4cj`x2=}I#p&;g zU5Wf@8@L>}fL;{12pKleY{zL*EazwNoClsm4?h#}kH?G;R%eQTay(6~-ShZ%n2eEw z8e(~eLd2mF{V;vp+lR)z!FrbWS%~^r0dV^`Ed3#7RkZ&X!uX!$?8J@<>SOhyldI~a zoI|0*;n*yk35%OHiQh`_`!*btwHa94EyHkr&^_vQe7(cn+U?9XdUeFS>oz*80xL4b zh^2vG@#JHcy%EVX?Vhya%mq{LnUwb3)@cje`EgZ)U8Ae|x*n}s5)m6<6)=}i-v~`_ zvds48eRLNP)<=nc%P8we>j)O`)LHNrizlS6_Qo8*sbQtI9kC-!W2Dm4;d9M1E?Qi; zpBnQdXYj3-F_RNt`k4*<9C(BP-FAz6vO8|O6#_yN*1{1MqkdC<^bU_RA#pCxjR`tk z+DQy9an`a~^uM)zNMw6i8B zmTtruU#Y%~z@u0><1VL@FI|C$X+=_y-h+b=;XO`!-x_=n?m60fad0`@I1RIQnfAM} z)`nZrmPAiAX~epb+%8y;BsK~un;qQMP_YFoKyZ#ztqHT&1GO8F?7Rn0;@4mT;~MS1 zHNBI!_-c#|?mt+qZ!Zr$k7uX+$@!0Cc~> z>a)psCgQmPvlQcy17q=w20Rk*aJWnG_y89H9tQWdc!mHT1WPgi?*4cR0QZA`U$}eY z$pzdKa1Xe%@wmdK+?%z$Pc0lgb->iAQ_~sS`9E31Lgyo0Y~F{y<+V7GZ=y*&=@ID+ zs!dHcKJNT43!d;699XwC6Z_YqtA4PK6yI*$4Hug~#(J8I&Cg#t8tydWXgFnr0NiV> zY+HGNot&thM7yEMCV&TaXm>i`3e;{rfRHMvHn*Nc$Q75g(=a^8(Yl-HO9bXEF)!xC zycm72b~4wdS;uDCXuT576Y^Ekd`V1D&~_v-U(sy3C4#X0GPZ#3f{0>;4s30~dmUJu zETVI$b@2`kHVwO)b~;U50_5yw8cHBAuMrO$m}LwH^GK zYl-Gd^`7=n?GlSL_#}EK5nuG&fv2$#*;$(#_@?3-oLLv$1M{wTaOiEcTxWtU&HXOY zK3PvmA!Z|4LP0QByD>n*UiQB>c?25g*Y-IQWWBx(9;%>yxrrhC;-rGF=ya0lsncmT zqDHV$gs1u235||V9H9^c6g?eZO6VSPx{lqB9ccK<>zq|OYk8!G(frZ8#s_?CHC8~-O{9s`Vn2vm z;Ex3}bqiSAVF4*Tt)3;xj^Y*r3YV*etK}4~0^#-=;jXZ|ng7M^I$fGHI>)!e0d4jA z?s?+2EX0%G5ov6r|SE>+u4qH3r4*WkRj zT1a`J`G(em+Kz;`+HeX1+L|Mg!eDFj#Y>hEXkSL*UipSEr+hG8D)_+hnD@f|xKVLq zFhXxoOQrmc-j@Amo9o*m&FTfLA)vN}G3PWqALAP}{o2vSw1pXqyvcS(-Zj1ZEKXv$ z(%lyUeB;KBExNwA&!j2%mO64wNk7fSSjmJ56UI%*$jET^%C7F^oH1`^wR7&gh0d8Z z71ax?zr3Lb8f}l+nuv2?wF~CB+6f*TQIY1#{Yz_{Em6m z|3T+Bm^*!A#!W0Kc2+McFP~XmJ!{b&cieqte7>@|Jr+8vXU?4MTo{qnX_&$@uTG2{qhS6`(HC);GiO}ueiidd3zaGHobht%vprPUwrgO zdwV+E-J-55J>Bj^j@w5V=VAw0hrz&sn8+k1vlteOttMs`#}u3pXGI2egSpSdr;sd`&AMZ1 zGKckKy)aPAW4-aYzb|vMek`9AutL_KUBd>j>)0@K%8Hnm`B*V4VZ*U3^9DA7O=OeU zWOgI_4V%JlVpG}8Y#O_T-O6rb>8vaJb_6rYBbmvHryrilct~z8h>{^cxnp8YX5ZwJ zBK-MEN=inK99dLU^5m1_#*Ldi`KED`$Nh2KvwtcYId1av&;R9x7higL^DD2u_WG8( zt=rx}fVb=4+5Ya1zwO-h-ut^h_^_zx<4-=_v-h*lzX*k*oJJlzboiTZM;;k>6zs+w z|KW$p;Ca)}zce5 zLaAFH#uiC0WiWQ9v?!Lbd!-&o(S4G;Cu0vt$Fdk(ELT%)lchXZ2H67xEy(SO#Pnnm zW0D+1mddgOe2n~nm9bd)w-CT2o6y}h%WJzb7AH>xy&?y|%_6Tx)>!2~WTGLEkAri9 z{4V0P$;0tZl-I+iC&^FPF#?vI;BS}bAZ)Tc7BZ*E@50?le!LT74tX%r*I9Nz&Q!S_ zVY|rJLCiFHFG``SoP&3|d>9tJo2-DwDN{LT$V1`IlnYQ~E_oj8be3!dK3kpw%I@+P zkhzCkk;+(({12J2p7N3u#(K#L@+4P2(~Ge@xwQ*pz2#UlV}0c2&W!byTXNCX$+scK zesT|$v3$7@`B@;3MJ$E#6r{AjycU$#$Ui{-0rC;#$w1kU_aJ#F%4M)T6saB}KaE(1 z%7>6k*UGI(%XRWw$cJI_jR@~1o;Q#!$kRy za8HuofqSxSiDB$Uc>(BuBVP~96nPPH{wDc-q-&~t5T$>!+!ygqlLw-VZjpxof2%wK z9Bz~Eg$$)~CPJ0THVk{qK(}MIL$zXdp-jv#iX{y0bi^E&?a0NCAjm1motQz$*ti_Wb%c`S zHz0ywl3&M9Od7I3u8+fwfU#rXZK799SG?l-btdhJolaPK#SA1ag`FRVJGO?f%ke_B zI*Y`cCAnhmLKY{*3(s@&Qe=Tr1ajd8p7bOD!Nru{Auog%dD0&=*r{xy-D%CxJc)f!{Qr;qp zEj;N3M2}b`%gFIesN+e0*WlV1f!V%B4Hw?v(jP$`_lh9= zotyJf?24EJ{3kqVCGeD+IjBj(r%|DBo22pzh=e@`Y*KncBZR#MY_UxAO<=-j25htV z2>#rF?aFG@aN!G{Wzq5|TG5w2_?Z9HlqR`95<{fj3(k0?afV?3%T#|(;EUDv+jNpETt%YmR= z{@#dXm!#|<#Bl@hfu!svMA$%lEJfAvhiF1X*Ir5K2Wut#Xv7kfls%-dCk%=&CB;d3 zdD5UbASsPh<9{*`-$;s^a_^LZXpodyFoeR-2I4zO=|+fO48#wT@-Qh}qk;HIQX-^b zO$MS-Qg9hP6HXh5vy$=^33i4jeW)cL+rjT4V9kW{24bzO z>?S>GHV}W5mCi8wLc~C9kd-48%LOC(f0mU}QpJk~#fx&Z>XBk=RZn5DRHLj^lYV0$ zIWrB1JC+cd&wRs2WTrCmA%y1hsNo|q)4k+F2(2QMB4|;`FaDkD6dk!j5A=H(nj>-4cM-{M)Wrr zutRx+=qDI(n$jDF#XQk~oyu9FpJc#UN;xX4d9nfLDA_QL<{J$-Pw7SQZw%ONA$^!) zfQ8I<5vJCB6Bma=S?mt;bKLxbk?Ktb8B@lip)~*5fF;ZLBCvVhfK3YO5i|eAfGtXQ z@G!q%z&4AYa`8n2wliB15xm63Yw>HhnKyHDJ6uX9*j4kZ1|3uOkQ%*az><;)$9Km-PuwCg(veX!`L+OM*kNIu`PO}vG zL4S{sNFoX@C$sHBH830;%4ehrjRq_!H;^<<25hqUMnc@v25eDw z_lEx&1GXt8;AuWHD@{3w7Qx(X_&b%^=v0^^2Aril zO~rFTNc@+H=yQ~ZsH`s<{%++j6n~2W7b=ZpMJ^feK&?M$ZZ+Z?s>~$aYBT&j%A2U? z=5_-v)>>>c6ZQB;D2b%=T-4QLyz(j4Ou>LBDWeG%4S0&ycQi|)p1x^HJEdPX{7aRy zWPD-_c!t(?n`4dm0?Iw4UM9o8%HpG{YBu17T1#$@Gw5rS5-J}h>aTT5z9rLSF%amK zj3x@Jfk3C^W-=!61_GUu8H7kM5UV(|-A?u*Q4}+fI{R{Sjc9%v23Pr-c;6Exq#kA+ zCFWiOmMldRhBNbh1`K5xTg=S&8?Z%rhDNs!h>6i2s!chBLNzZoV7t;laIFD56n8A( zB?g?PM96=s0Xvo3Ng0+I{IisSl+@)0oTFss0e;Yc^Arch?dFG!@GyguikSIf11_|T zBm=d=pdYAwMA@*?fQLqv_YouWJxU_A6^|O>M?{tNF)@)cOK^=*{x})_zm0~c!il!& zFTqzcMyQlyDeE5>#j&V1_AK)n(L4?c8m;WVHzFn&mHQ6{ENS+8tpS=WWOAN1K#Q^j zR@}VKfNe@X)yee+Y*%tHBr^ZefE`K$73(twoTiK-oqyJVVUlhq#Ggd*uaMjxFux<3 zWtilslz*xwA;q->|UveSSu;DFe>4A5pN84mb81GXzusPx`9V25%m z!MhDOP3cR?{J?;n7T@)gnE68k&a#Z3=ws%O3^)hc3I2aK;5^F&D(#OA*sTnrX66$E zE>x}~_)`NOh|4Ge?=j$^$_Rq@8n8$Cp0wpN11`1{6aUW*c!aW#viS=G#_bvK4jSNi zWdvP>fQf&u3++dwj*7ez4%(wis=T2J~HIJ8+<+SK&7^} zzjzls64R``&53BI)c1k3_O(RYLZ)s-L0R*4P*R@-t+l@nn$%4M4%9)5`XYftbkL^0 zO5k-mXjiuqSfqmv7PAv$cMRD3&O)=4^O zQX?23TBquug~gnMx>|1)x`GinmYd%sj;|rb)|nj~|3+X%2gi>HoY%qeuLLf<%rTdG zYj+9rh~p~jedZ^S!Rl+sKI;P=9QiPSOFEPIn9@*BVE)Ovyfeiuxa{gX#NlC`I7>Z% zw%z)u4(6!G2>hK6=Bf3VHnTpdgKl*PrSB;nEL0bvsj{xs!GY=#m@eyj9UQ90p_6ER zRtG)m8e;XF4i>AEC}Drr!4YbID4O*J9UPxVkHP)#RY_*e&P)Hnk7=-_?oE|U3k4WxEVeVK&bufxl^ddUg+fDW(V>i4mL59{z_ zs9&83@lWABD%-;Ne6tObt1}=%e4$2#-h^6$`Iq!3+phYn->wK`}~ z2cWLRdvwsIZiT$@J{`0tjUO|H#rspJl3}Kb#VjXdF+z9-8kJ~|A8VdZ(Yqxe$LV31 z+6g`1_z5~FsRt>($vS9K=RpDDr|6(X&4LMtzgY)uEapL2jQCrHH1JKdC-gDzgCl8t z#ax!))`^&!j@T0lbWl=TCIGxf2Tkhui2w)bphew<_!5TdAR>4Zxsh<4ct7~+W+tJS zUjQWUL9@f;7SwFy^G(R-gyG^pNe;KoZQhL@k-BIwJ{1^tg{fbn&tWs{ilp8P(QQV= zCN&cg*^G!S>a)ma+b}~8^)UH*b!WV#IDOBn>6pM>j3^XoidB8N<7T6 z?RV*9#06KOT8eot+Y{;W8gYMhE$V`8b+-!|I8Z%Qg_2tcgZpJJq9T;S+Dw!)B?|VDu8F>tK%h3dK894-3us0+u?lQs{;RB-#?I&3zGC z)A7VbdKjiYITW6E>7b;3I~d?SI%rZqA!(NBAlkCI(6z+n!jHspMB@AA*N7wONaBZ? z8%BJRXG7NGSDixFe1Od5x9^wdc z4G^MS00St=$04#T|BQw;MvkCN6Ije@{HQ~Op$HsH91@-C&E|MykJ<)vuiny8L`{^Y z+d7J9@ic&C9Yypd?4Me06p?C&W~xTV!lr(WCRV*&_qD5uj& zQLofF!eb=Oa&?heMnj_&uUeBqZlieBdz_Tfh6zybb4Cj=O+AISQ+*)gBdvIy>WdUX ztutB`v(z`qcd721qfSF_KwYl;=BcA$LDh$xQB84cx}dIbKCDGlsOf_Gi0(U3%|M?~ zeJmrYM?=*w(YaI~*Fle(LEtJU<)+{&PV!AGhNe4@AoYT4Mv`wNz%@F!5b8q%&6uqy zdG$|1Dk-SL-p70|CH`-tF(kO$GOa)jvtMqRw!lW%FSkqu1R6%dqV}i;XlRyAy%%=H zKEfyp7Bd5p+DD0<5KUs5eVq9s#g_)V2OsZT&AyI~w8^<8AA{Wm%ble!u9);?7S zEovXAz1=VlHnlJEz-}mpU7d)$w;P&(mi|eSu2Os$v6?9AM4SC1^9@eO&|@5Yj2;eC zx1jpiKh_JfhBNK5;wAg<%KTT|Rka#DxAqnZx zd*nHY2y}83ycB zxNUlivm(F8_h5j+_r= z5#`&V`x3J~Kn!t2$X%d~r2t0wL7X3?@GVd!Cf@`b!{r>P48DC1qTIfgi*HdFA~M4G zIJahk`Y@QHi-7(Qm*)e4Fq2@B?8CWulEM&?5oRpsH&K|0uw`7n18+f=VB;kDakx$L z3wYb)U3fd?Z*swx*|tL%`(!S5Lpb{w`z_qeVIUQ1E9|9M-3|a+piqaxUdFpqWrI0U zs0U`B&bw1|H0wDHO_&{5!o+IyPKA0L_L;o9-e4%y<*?7<-M2zy!F8?jPATBqdG{U~ z{dLO1xqt(_`%n!oR{912SMcts8vhZf`!qpgB{R|qB-%JRhFOn;9kI}0nZ=Tyh9o}v zU^+GrZks~2dLvaHw5- z0j$w|)6_lWd#?^U)t<1d$%}O`i^arr2fRf52C~NVp+s*^qJ|=N1!Rut>;z(W6!A16 zUM9Idk0M?MB6$HKTamoq)|`zbl3pc$)s@^vBbEGh8kGe#QfHuD$p_OZGXz(b)<`8E z?%JvmkI@>bJcieAGS1V~xi7KD7&RZqYz(6iOZBe-BE8&AT6=<%9HV^#i~1U}TN?4nME{I8DeqE3bU zgOOb{)Q=meO=1++A+YhHCXmA-p6= zCR?JT(=c-bAZ_^H$xx7}`gAJpkd(&zos4vt)Ljz*8tJfTlLMV5>clo}HlUL+`(Q_> z4l2-Tns^_gNlbDai#v|&Qq9Ox$M*^i8pv2wLeU+^b&#vGQ8gT49Te0ZNR{IU9Te3+ zp_V#+)Imw@1@rGXp@XtI*$MEZ4#udn;sE}ngRyD}fv0rPq-LX$ar~@4f z!%7r$a828nnru+dmVje}rxOf`b zYPUE99``W9D`lvr4v8DQ6+0BfA#=0NT>Cuch%x+4%$7`iOk5m;&}ly*Poo_qM;uR} z88tZ(T{N7Lg|{FlqVz;L6K`~lPEr2bxV#2bUB|nyBGQq>leWVgDkt;cW#@^+fVvu+ zNr+?~ZwTQ))pev8ut~{+v37JaV2g4JT?>c9fNho;3z?%ckB@4N-LkN35p$&S_-HLo zQLc>zc^8A+p=2n4(+oIG=@JLHs{uQekI43>8*rBL6~uIOGvFNMFQjNr1I|}IwbkXlD3mp_9C@;;j@E~Ge`?C#uVB>R3U*B;y&l~YjKsBCh$O2pLTauA!IhQCQU zPzJacw?xw!ht`0;{@WfV@%wQ3V`OcLG?W5!)BEs=nFBrQd|f=DOg_ByadGE=#2*GE z{}ZMJpBg~P41ySdd;v@)>E+b;T zP<;n##${|dzvs-G`jycO@y13{(RNwHl?s?^cVDNkIK10Y%>|`8@_| z1EGFPsCx|*M%B*rg%FqDXP``kil95h?>A8Iia_0iYRnhgyC9Fiz7VKxlg3@c_|iCP z9)WTb)nF26X@ZW*Bh)NP$L@3nJ|MZ44%AU;gt`Wr z%a?j}6iSOhhyg&2(oqhgx)wHsFCC|&>>7K@ucbHZC>x<(!?1%douQ*Fgla)K@THYH z%0#G*T8uS13L^<;`Z*LDUuGt)L$a|Y$C-W{U248e)lrO49}}--={l-i0BSOshGo5V zR2xuMa(@qH(wZO6(o-qpmyP%eDDb{ykeK@FBwbm0qZZe1B2kiWi18dMlw|>(@j*hB z!szg2^L5k#LJiU+x>rYiO(^t2K=q)G`Uj!PiT(08s)LZ=OF~sbFZuG$I%*%GHetBO zmv`4uK|;+&tIe19(@~!TrB&qJhUoDueW!~^25kchyth!O{iHC21X`91s^x@w4mFWKoT8&@2~|y1XJyhbDt=k4BGlbP zwK7vjl@jW&6ywT#9W|a%aU|EuA|2%+)ceHi5tZ6y@X9097Sw3|NH-njAe5cb_-GO} zE}*gy>L{h;(XKiQ!&hf|31!xAJNJyH@htXUq$g3v|IS1W0s`&=%36)YiT(7VFJh)M zZVX#PC^Y^=C&J6(ig&S9a6i?ZXLO82n1^7i_)9vb7AM_i@Vn7S$Iq8k?b9c}1))1@ zFVbw7N&0${$(JG{x_+S3WbhU6i?1@mJVs&Y1#y@nlu^w1sI#eI}C3*-(c+GLtzxs_Qi0XN=S`7 zi@Q*ysXfhHQyDLLT!W15Oar0L10avKcpcX?xjKO^S>~D^-Ar`!g1F;Ap2c6Zz}u^{ zS^l4FKr#TOlj_n*Uiej#K_pCXon)6mg0R)-t)=$UJq}*sL9_g+NxE34$wLz>gO|pm zGunge`HS-~SZD3k2`)%YranblfYNvI&rl!^FY+bdphEuNLo*u}O?vnn4WG`MOE35s zCzaGiFtPu^puE$dgwOpwAVanx!&8P&XL2F-=e6KdAck+-vK}0SP-J%gqMfN72 zmvy2;L_{z6Q=^i>2N07=Lxzh66ZpJ}+7i1f-l~1%=bZ}?l7`Qn$%WuIK-)9;eJC31 zix!>zAR?j{{OO}}20w}%N?c*+)UD*NX)L)wL|+^-I4uNDoN5p~U=YD)9;BCVOVVX{ zhI}{#?o2KO{|wob!AH?Bu1eO4-X|jM^>LJl)&ZqRG!D(+jR@RnyQq_%B2wz-bS4*w zXtd$tx5LOK9Ers|SbxKxT=1ulk(k(nxb|uz%X$+LDF}SNggo{t!)N#vKJaGtXAGZN zhL2J8-bZHH7Z~2PhBt&ciGT?wpkjX_q$VsG`_A;m66(DJoz{dO6SNPQe8*KJkjF*x z{Lx_hjlnh=Yc_u!20pz9c%zqy`jb|#7h`w60nGWT_!$1j{>-!ik8nTZJ+Hx}SKp0{ z5mM0J&%(vm#EUE^22t^4(3W5(GoiIa9sw~0L3$nlq$2KKe7r1DPX~LQ`12?zqQ^qiEU#t*_U%wy+Is=H?vEFCfP3#X@EQx6(Rg}444@p2 zGCVBr$!D?C477swMy{Ip1CSMw^xh7y`$2Orp5CtkSP#e31Uv_z4vyFHus$0%Fh&6d z?fn?BSR60*{u|JH;QtAp-gN+u!f^x-C9Q~h0rQYFH^?b@lzB%HYhMfz;GvmFK3+@c zym+lSZ$-chc-$3pXD~iLUK<&?IE(!bS0N?=?W*34(=qdOr-{Q8=iNj4fk)ZXBeY93M4=jfKoaQg4DMe{di+ zlWCoR-^9m|_5KXl-FONvf{gSr9~4xo7G@DVz4#5hA1jDKaI&)_bw3ej)0kL+9cZ%4 zw?xsxLa<2%j?DS|%ebCS;HWXtltl{)8E=7>^FF$ae@5gaXS@L9z(E+&{q1JWyAuKV z!1lot72F*ad@2y=V6cKMy5J{&MeujwM}iCBayj;bAkft8Wf|xOqz7q53VQJg{Cd{& z8&Le4$SD%3Z$JJe>>E$e1rLCZgr`l0ys1O*gm_KxoxpC#6BRr$DtH)(Z}Ai?L^#Uv zKkHIlnd7zaBf+;D5=L`;70_ise`}!sL-5~&;@<@C&&$&x-H+BdPAM>f!ik48c-mki ztADh1r>xEc0Y(I}zjbfl-fnlN8$t*WARz$~NJ26L?|IzquinV}ObYU6G5u^`*EyiHpF!0IuVNMv^&n3YcP0+Zl7FGm6Qy zZ6)N(;EMZT1tp#e%igdbjQ7bL!Dac=VLvwx(lBYJ!WDB%Lu^&dA~4#J`A%anpHb=) zz!(LGX@%?EG!Iv*?Zr)4F^W0ba`sUE-2t3vR_a{DWf6`DXVH-U;I@Y=8aQmIAx5gUP=b-F5H8*cdR&h#LLOz` z<0H5c?*%p&u6_q%L9%Ny|-I_{In z7}$Ck_iP=vA9;W=NY%(&q~n&x$q0-NIc$nwhE(pK%ET}DV4}MS*%7~Yb94V?D3iHg z4lXxZimD9p-;nGFyFl)MEB-wf8eie(YJkf{t1;m6+uaRt7RGPscVXys$hr>}6_i1g zjzK#O&d5J!1K!$|K>EEHIui=*B(MUaVt|SW>{JhGRT4N4r1&LdeMe9h*!=*gl(GGA zmtoA5Ao_C|`Xl5^F9Xnv*d_urK>}&tJrYQN3q$^})r~;fw-}&B5=i?VkwE&-G87Dl zrVvQ`?gVH(fzrNLC2$q(bHdgw1kt`{0oW>IqkRV?i2fH0rG$OkT>Ewdv`YeMUl7$H zq@T)Adf58hweKr{4oe{IOOrtQ_{yBsO9TGR}&2n@QD`?=~U|bW9@6wR6BqY^^m>P0OL&hc{wPV3@;d>2PmW0%f1(0-9 zGi}+dAZiqVA(({+bH$OPvxuR6LW{@M6vKKq_TRO9X&t%D9g3L^iP3L5n;h|v*7DbC%C&V6PtoGf zYl_|Ei;O(B14e(Aj2oTBA~Xi^V8|;tut(b){^!X!)zcl`9t<_)@OB8?y>KNzwvhOi zoan3Y?A8lT4RBl30JjYcUMSB`MZ4aENQLzGGxS0zw6r@qKx>HRhYe#MoRR-Ln(QG7 zr2iE|+d`hd6Zk$vYXRZ~je@^}co>0);JW-9#2W~_2B*fzBQgs5CmDJ%6gtKzI0k(R z&?gc|qwsT|Fp7Q!LvMsa4SQ&#P670z1k$L%5=ehILpwsAkp$AH7`702on0E$3V|Fr zX%s(TQ3j`s8X=>gKaQa{L!oOJ1&taB&ueDCloy=)F)VJ)w>I7@&_NkVd^O zf%JDV^si8;8-c98;{bgpfi!Bb1k&Hn(EgBTF@Y>82hW`WIB8TS0?pvMvid?pMY%HQ zfK;b{n4trq(8I1lU4ZTcXT+aHt?n3!8ixpNSrnrWb8y%WKHK*p#mA$H#~r1jdi>a} zAwD!~&hIrKZXb^zVcARm2M7{M*N}cmh#?cI?ut1Yaaj@(s%uJ-hO9|Kk^?5b^(aTX zQVn@F38|G1MvO%o@o^GSJ00};?HZ!8TRV*+%u_d@NJSzPl`He@jSc_%O$`5F6tp

)=W*%aqI>91uPPV>g+*G9+^Zk@ccD#epliZ?t5}rS)_$E`cjH znt<6$t&JW7;}J4fd%*0in6H8HH!}A%1hYah_k!^unS%wGeH8OsFuo=;g~&0A8IGZ~ z!4*3NV2;=8Eif|4Y|1Bs=?XaxjL~pKmrcdvdML;YtpL3kF8(13qy8ZDXp{rn8Or;B zW_8poG=@W(RjFC{TGmm`8m(BSe~b~Ih*D)_vs_+lBaY9QOWq2XmutkAYTlhLFAuYl z<~^=>VxSSGBN>MOX=GQt z-p8%(lTKS!;?Lmz2&bz1q;noiry1HqI$TLRK0}>!hLAZNj4Cq6v20H|myo#%jO)m} zzPV&xLFRj4{DVwcH7A`Ln9z@49EVd4<0nThn$r*!Z?LL{aY`}Uf{{n2Y#65%vm6Y* zccvP~&x(0I7(>XE4daYrUIE4&G8ZtzLDdFUf^h?!Yy(&i(#!`y-wPK%qRTHAg`?ZR z3C-%NS!e@iG;4rnp$(WQR@V18#gc7cg67S2d1wQ(HSY$Ohc7}sH2`z9)tAzrdatQ8{&a}DDsMs6t`gpo28<3;Z(1E)alB4 zmw(b~y zA>1(pxkl18qECi%z+sj#7l9qId@_s@GR0g_}o^! zOpEeeQ7%O095jmxE$QV-@+i3yk}543tt4U~1T+pi2h!*(T#Zp$Fh&bjxq^$dV1^bv z<_bnb;F*1ONe)I1E!&|}=}#Rr#KqvVt`BJ)Zd?sAuYf<;#Is=hX2?0Y`G8@$x_e7C zme}ib)Xfz{l`f*bNAo*szMJF@9p%XXAxh+ZCm`$#)7>bI_&y!ma+jqtop(sbc6Q^8 z+&LWkhd5!eG2QUbYh?IuMKcn!2e>VHh|`8m@da?7fm4lkh|`sg_7gBZB2zZnAk&5!$n9=J2$iqB=Yo1~bp zfbjyEYv75=iuohL-;o*T6gfpPi!fpFerNG-O~Ksc$Zf7?z<83(Aq&8~Uok%i<5Rd& z^fenO7znMu9!eaPQwxZ(%0AzrM+ zw?MQUPU$RB%mZNTr;brt0WZ!JWt=yw6pusp9p!nsC@=Oz)Rt%V;_av#JS!p%@-BuN z_^SPs7PsgHsbvYe$Y)tHHPluIx0DUWTN5BGuvnZIOOk zT_KP@4X4Jme8qelj5nz^0V?z01`bq1SZ{X-n`XpYfzNW70vXD|9gXT?ZYb2EWv+;$ z5%-?r9kk>gSCSlY%C+Q0SHcm;v)aH1o#GW*_P&xO$DEsxBR?(KOjBt{ABpQ0;525x|yU44WbpAlcDqnhcmbXVW>zeLp@`(xpJR6}!g z^?7Jf?CzhS$VC{Dmw57|sF;MnVv;Xwl|0D4+1%;DUfUVWI9&N6=&grikIqs(`f~86 z!sV?3U$@@SY@>aSJnV15FJxhhmRAEh96_%WzXsKWdK3+q>tntFET~sXrI42+85Ze#r75K5*&Kb7j=1%qkBpuxua8PEsdRAX%=f%J@Tk3br98layf zkOpCfhC%ep89Es>7ZFH<>Sf|?BAhg+H3BW+>KN1=N~S@-AJu;f1|M<_>IU?AaM=Ao znXnE14WgQDa69;HU|%Ty+1em0i4Ys@q0RvAw!xzslADCoZe(bKlVBTTQ8CmOvkl(B zarjjff&^ zPol`y;{1|lm^_4i5&9+bf>P3gncjd*t%vI?x&_Xn@Fg3?)(=MYyb_^nO=5#>m?V$qyxN zQ5mu<5htp=X$TQ5hXJL{v26*5op3{RxBwZDwk}t7p56le08XvSmj{cPf!<(rBlDlk z&GKMR9*!*m<4U;VcNx*OYS`He#xA&`X_sGtn|zAdG#e)ua7EL}T%`vnGT`FlU<=Lo z3K>G#%V(fTn)j>b%>{0T=0$-eZZ>#xHLs=O;rFz+8+nU0lb|b5b-5h_FmNWa&Xp^( z-xKKycF+>JhMyU1&AOWk?j>+)aGj+F*N4Hl8&2+!<85eke)>PbiG{)7W+W^JnNz_0 z2&ZO56N%uH?(n?~T@^I{Lm&s4SPnL$;p8CG3V|HBI)jWKN~S@-9@Vc72177bj(X)l zm%(9>feFk*4ji(owph_)UI(9DDxvsj@3p6}-C91Oj=WsYf}d&mvO02i_&K8Go9oCk zRfo*OtW#s`NzR~BjGol()%qy>aj1pcBBTQP#K5Pqy)bzik^u)a;7ZdZWQ1h z$h;PeYvAOhMs=)X;E#k86N29M7ow0jsXYbE6L3a8k69@;r9Xkdi9u^5fjr9G3DDaT zcsV8ticRUyBydvDTt(n55FG~S3%G)%AW~Z5c@)mbzZ(>>ru1<=+%F~v%{Qs_SBTmI z)EchfF%Ux$7%a88ek9hE{!(g93HrWst)BtVGy)5GEJ?8`{gnhx3tDnIz7BvD1R1%z z;fY}=P(EvO1-ub_k$Djs${JAkyr#e3DE07jL9me;NM_@l4Scqf%OFGhsW}xr<{QWa z+qU~?^Px^o*_&)zh>x4`Ms5X1*``6SScyjX6wWgDu_)fS80~1YDMgJro@KVessNJs z6S}R=ROuwoGTqZaeDqotz^b#!xoe{3Pt}oYgW`L&e9zhB&_Ar@-`A156>vh!qoZXx zB<+)O=$rbuwy2IgQ}^YFmRFrk4*h0YKC_M-l`Ky;+GzQzv&o^~Ma!S6C3lR)TECZ; z?>UtEbKv;a0iYp1|(xbUi)O`%r3}0ap z1W`6`Sc$3ZP~1NOaY-YFDJOvv~^=#CI`HRPEj z#E_7rr7Jby!@7X>Y%FL?>owq15|B(p4kLg(p&{wx+~UxQ;8<10u}uTIBmpWXx;r3> z&wyZQk4Pd^6vzs8(T_mNJBycTslFxpJJ`G>dW~Ys&GS%P-4eaM2Cp%Ad{^N4B##3; z7aqKk8PA27S06t*yBN3i{k->hREce!cz3Wl`Gm*2nXcIekfi|{(5?<3+1cWwG-7ZP zQM(Nwl1UnJc@k2y4FG`m0Hhh~l7M9O$Tk4TQVn?_38~oz0Js?dUP60M0YqH3p+Bxh z&`AuXh^#xM5im87W%-8I`%#az=tZdU8cK3OUD06vRg;G zJQ-=Nrqmu6$TdP)RkI~>3f|uWBgvb7JSVlq1v5N*E#aK}^AxN`-UMeK+`kbu9|k}2 z%ZI^-0k{v&$Uk-`u0Z5tl_UKGL%;e>|0P&K{RYt&03DRTJMO~z7GhKS{RsTcZ?-3J z3q-#HbS4=i#il_YU*7bK-~HxDH^wxKgQ;*vK4YZVl>Qh3|L~jFxH0mcYoP?r+h`aR zo6?_2pf_OsmB6(SRRUB2C-1)VHOJ9X>y5jyP?TEq@zo-183wE`sP#TX^8uPCfe(VB z*p&W40{sEYnF!!>5TQ_wH4^xrJMhaa5=eh7f%u;84gya=^aMbU!S(n<(Th}m#RERzW<`cLsSs+d!@FSd2xcxrNL`+TktF%_ZL9j#l z*wch7_y9yJ1ajcId<&v00-fRTm*0=sfSM)!O^hlSu+A{qNf1>5HUO^RLJ$)Xm_WV! zg`kKvrT+xAoPbqyDS+!CS`5%4YTXE89Rf%JS}b;AP3b>Ntx&+afLbi}rvQQ&Ko&d2 zru1JVFdVR!63AlT3DDaTSbw8oybQ7OcMuo}SlbAULv#qBFW?GVfjEP}X=-&kh&UwH z*awmtu}J`B--8($_aExP6{Laagg^<20Eh_)j3MzWv{xaplEink6oIGUaE$>5aF8rQ zbX;xBg+EBnJ@WbZCoQh3DOTg7lzR%4`d_r1r;wc8I73Q6L<3gUj6g2Iq_~+DKdr^{ zv_3~h3237Mdo(~kj8@x+yh`)Gt0m^}CAG`6I5Jt~PHA(}lj2G(Zl}d=>Kq>>V5kNR z)BssJYEG1Ll(0e84@%@t=MhW=d~xGTm;K>i<#V8I@r75G z814uR;R_u2nzg^qdl0#|`Os~$F{^x!3zFPIJAmddrd{T4pSAR-s_nBx89pB1PlM|* z)!ja8o!>qNQ-ZCB;Rq_+^MGS_{`?nwzoqN^Gt!H{zQi;Yd&l zDMtd`n999wXV|I%qclJ_=54P0Wi4M&TkbZ-omzaC7SBg2=nH*a^?h3Yl9tzPZHKh{ zKplC=jo_FDoT&*Ar4X~Rp3&0A(`yWLHTqI8M`gdOmM@@rR`B~|^ywOKp$63LE!c*W z<+q@A1j&=1A}!xgTYqVCs4Ufhmumx(_o6Gb{6HOfrq1C|EjMP!9NHlx-9+IJ!lvf$ zZW&DkhTFT16-HIExjJFQ@qK+MDfyFRrIrlP5>@Zi*{CIx{v_F|B}=tLRW@~YXvu~@ zrL#{NB$&9(-IH5IGeMqPnpv;TGC8QWJO9zsg`uol4`3f zwPbKzoxIUnq878N#2J~9yU@l66UC6T5fAEoSZ`1WMvs|TEeyb#YBM-O`r8<4;J3CR z@`8&X8VF#2xSmr$n5$Dfq ze`dXWF&_mH>1g;{z=@qc>vftEK;FMc)Hr@IdZvM}R&QLSijFwbpkG3bT|Vn1HCS}s zb~rMGlSOB(-T;jYu@st3ob*>PbjW9Q{0lUeL6iY>W4MAVK$IX*OkxU%N(3t4jQnmW z1S*=+U&km8`>gqlVhThP02&8Za1n?F2wX{`3dCvzZhGcB63>FT1cC8zM*a*? zR5YdkCZjm!vsN&Q+abCdpsT2L1BlxZxQ)bBARb5HQ8**NBPc4G(tn>(eDAZ~VH9H^ zdJCYxQ)>u_PZ9WpL@y9OAaESc$TvVy5p5X$XN=;6&k9`*U>-!__Smn2E64zmjX)NO z6cC*e=m=-zw@2Yp(UkrXMsd<-b!Qa)AsPbEAZnF^n2f-s)RH}sSks_?j9RCBswbWS zfkiuf54r`}w=gpH#A~3tgpsi)u18=UBa=OmSks{Ir`BnowT)WriBAIbxCB0n=dOH; zrC-XB?YBNB@C}IG1Zal@z6Xk8Q~C)4y?!f*-dS)EqJsc^MqvDR^xn>RFlz%5#xC|o zx0{>(RYu&8Y&6GAabC6Dh>rwwH<%+8(^RWA^laR5)uK6n7O_M)jNBqc`b}H8erA^V zje>`@l3GEo?q?(hK=Kn-BX}b<6=TL~j5n*mdK>OE>=)lbBmO+7?NI+xsjDyQ7>QSt zy6f5k+7G%FT?~JyD~^$i!Du@dW7Qli=)@3T<3X7mt0r|XY7Tm+FOAdOd9IGnKol&n3+Jc_W%fO9h+5L-UC(Ej(TUMju;~-_$r$fkj(Bj9A z@U9Zr%-you?4@8ccMsNN%iQ6*tlW*f0SMavN=<~3SPQl^a=jbapaXc(vMG%F!y6V8 zQ2A^rn`mtV9N)$lgQ9f~2x*=CWlSiH|~wH(mjZTmAEf4`~D;xWh7eY93@)0fi^l|7CntUUz++Xe7n)a;3jhr`9M+~GFa=HxYs6xT zfWMtufAw0oP>aLbH2^JI(+*V;zljS$@l5H>gwV=gF)P3a#c@C~nZ zjKBm$&jPd+uAn1`od~=wwH#2y;>aETNowuzS`ATP1&tv(1ke`*#+f;eQ0*aNHK|^W zQ6-Po@e3wsIFgHgi_OQ}8(N^eSD-3b4cw^w74e7<=DSsKQ|+q2aS8HBKcAshUTZUr zU{!QL#7{RJ&i?J~eu69)rhPxE-LsXci zt0El)-jadeLbDe#9#%y+#Bm;+tcu|X424rwK`d6T@N=m(-D^ESE%u7(08N!ZRz-qh z>Gxyk3a_=BKvu;vfR;+&U{Dlea~l3o0_S-x53*h`10sCQg~fPN(~&LUw2UIkI@ z3S^$nQh~2myD%1CZ?w$0s4=EY+r_5I4MF2uJDOHQ7=JudXzMkW<*?x}@q7e-CAA!{wU}CL+8+b-kp!}7KS;6kw=&egYduULoA$Q=eItQv+7z48 zf04j6uk~*N*|hDBSe3!arriXAMsRAHAQlr3{MV_~&}%h7fyt)L?-8}97Mpe-1bRy? zHf>@}>F=agy4NbB7Mu21fG#F5&LUyc9syD9rp-L*rfrp1=E!!!dE(AARM@Mi!Fjo8 z+W=jGh{TtRQG?A8qxid>#xGf615Q0Gzh&!(PDV{A>zZ3W^?gZ|6Z*kxN$q$Zz@cLM!3HMp&Sr)g-swE+h$%&_ze8T#I~dQsy) z5FG>>k4Q$rUJySaa1zeQ9}bFGQ~DjKb=p?7G5lD!&* zzNIxTNF$D17$d5dx`n=?PN82{r_kSonlR|^XXr-T8nOggW1){nOk?5d6gqLHLH{T< zZnCZA)Zm810-&#?M(si$4zq+oe>6i++ty3eV4<%88Y@^;=vxqY5Ka|3v8F*EpH=pY zt+sWDS}gR}0oqPrd>c$)pw9Xjs0)B@OO4t^y@5D`{$_?|*;XsqCyTlV(B0r<`@R5y^Wjuc6KfjuAEVag zwl$DiEb7Yv`U`>aUy*AT^$dv4Qq)z@WKmzQ#Wjk0iWY7DlPHgto~5Wi=QMfR6BaCH zw(J{Wg6Ou~E$Tl!wTBW>qp0~ffDiMc80ep1$YWc1%a9??4sRl+9dL4Xkf$7SC?U=? z=zG|zy|#5BHCWW20gcJFZc(ow&Y+L`Mt%{ut<}_EtHv~IoPd)>9qeN8Fj*Hhu_kXQ z`PWga#I|0f7K=IupcVwi_rMGm^}irGOHt=QlSO?}i}lU~TXmThrJ$&&Swl2Ji`x82 zl*df`xfXiOXox~TfLd6Hy-{xL^73i!i41VJfIA7hD%=;vWNwIeST~blym->nn4d<( zGk<&&cTHjF9V$sYE6dLpZ3Fu}u%EBV<}`x!Lt+Pna@Fv*4j8$AaS&}4Qrw6StTENa zO!0#iZi?qur+5GerszP3{HyOFrkGokty7G9wK+Y{CQR4Dac2{@(ZZ|GCM?y$ z4QCN1Dj<}(?B@om+`v#bfDaHV3|2xifRCEI$2qpK2j3UR-or2Pf7wfd>6%US{61+E>@@~V86N1yfaFpr`EbV+dwSB%5Fcw>mz zCZ|Iz+hn48dMm+^3dFOpS+yi7HWG`$8xLN569Q!jY*s>AL*))e;t5D(Ic#+U&+CBE zTcq599Q>xf?#H|u6^1|96+G^w7hR4I5(<&ZALc9rvjbdNn{pg>!kIT)MDCX;6AUUJ>1u{=6W=<(?xxf|6i~c`~6yAYd2gX`5-|_(YlVUyz z#=~SjQxD8jiuofL-@=uZ!Hh+49j^!C-VhMKh$!P4crHHp2v^M4v81 zX9z|FBX0&!{16U%01>&JVqZ=TB`f$baz0`(^SqMfhnex5V zbj6$i#%MC-`|*vGeGh=?}ww-X=E+G=>Arf^E>V{`oxZ9J>Az{kqV4sHqg;Q@{^i<3|Fj|u--@NFhnB`!U z!l~xa+my}Waxg9T3lwt-7^rEZi0>bbRLMUB`f2j`{?Ubsw;S|M zxWqxES25gRk#slw8E{jRsV`P>o&@d$T(NvZXNh8_bi+^zr*gkk#o8T=GPnfe;hhMh z>{*2R^}=*;3$R_-NB*uNm<`+%Mo^Xo=9`N7Dj3g`+0F#>EyX+q#t&p>GzIf*#cb3a zUjT;V1-Nr9S)$!Qc7}`ZM4G=t;RJGmrY`Uv@*c4G^*(#0V#SU4Ud>9cW*yY5wwi^} z>#$~(RkKcl#ZNhoQ7rW>a5g&GnRv=>^iT#|ULAE1EGpgRDvgoXHQei+FfmmtZK+Nv z6RgG9PIybPWCFM>u$WKRNT!VzA3lp1*CmS}<~MnNbCZ-izVRtw^CP}#H_4*FZB&l9 zz|Yl!c3L2>KJY1iJp}v;Z=aeP>`3vAS~9M#%3cUq1#^^u)|v^GncHe&arHocRt@rq zmOpnyFK6bPESx;pA!TIm^A=})br zN-Motozgt8n7>b5CAI6m3~V-G8(g^i|C?FS`1Bj`BU^jJpd;!e>MTp z2u@x8oW@iP`ZKkby!?qyYZSuC%b%49RKUs0pBE!=5gbju6gJSz6^vw<@Jw3`Q|Hpu zYidZkEF%GxS#Z)+>ey0qJ`+9YSZ$#xO}!qNYvH7+_aks0oH7;PFNLY}muf9(>NWtL zhm)qhkH8){Y3hFw_!5q$roaZ8c@HBQE<6p_z|>|mwQUVamwXVvLgfscG?hBG)Lg|x z%R|;)*VI@7GasBZwJid9aLQCH#b7G^JGGWHwH$ylIBDug1V+F~Q!hhcIvoDwJrbH} z8T2276Xy$0e;6!x{gwf?6i)8?-HE_@>dDh&Mq(!x)Bi=!O6*2}&ryl@5#Y7+#9jn=Q!ud~ z0d6BDK0^SHRYu|q1h`Y3IE(;~e-cL!;DcY{7y{=rZ~_7Dh$MbO;LF7boI!xQxQX8p z;Dw-siNfQfe8P(WPaYFN1bDQUh# z@6)W*YSux`YOPtw?GerDQq4M{S^YH&Gv#T`8dJ?O&QmE~u34BVy_&V6nw16?XUYc@ zOW(rdvR$W-P8Y3lq&kfOn)RDzA@BHZt&BIiP8A0f zM}vjNV`OU_ zqTQldFKHIaajRzS)~s{zSw67X?Eb4*y0xO&oq(VWg5Q-u{Y;J#58^qA_=dO30?>FQ zcT@|C>IypGA%Plw>I#l(!MM7D9ITPq;;&Q!bvqfK3nzPOur;8c29|=w`mV28sPC1U)k?Dv{W{I+T+Q03 zS^cV6k7(A#)vRYVYgRSuRn1ziS+MI(&04QnsDRy?^{8f{zV~U?tD1%S{uM0N#>a|P zUEjG_-SD?5j%X|{fe+OzW_$pS#vg8hEuXkIO<3Fv?VFz^N%_NA{kZXCo#T!1lDAPg zzy#IK10=6$Dr7rP4P<+dM)Hjg>l^_jf2lzs&k;3{9fd~j6}XN!HUi`(A{V4evXno- z(wDcjA(J2CGy4CGk=55G(pdi7kM(I1-6qmo5+Amb@)3NJ?svoikspyihlp1*_hZkd za!qsa4uz2v7a%IBL*X(eHDKV}vC|B`q(g0BziJF@SqNAz0Ts3^bZ!kSRv#MsZVIq} zIKXlZrm%lFU20&l{?k}q0QG%FEPv}lVLx+ZcC`&yfGKSM?{k2i7}Oc&MK^_?80^Cg z8Q9SpaNrBM03&OuvNwSMT zghu636r_DW^UectCA>e>O$qsZP`f*YJcv}n?xC&}_C1ayA(OwBW>l_i0xFeAo^2{* zYN)eBwjL;D6*8xlnaHSp&<2w4iYeqlyHq7u#Avc8xA;JevFj0r_Ampy{yor0J>_;|`B8t1-`-IXl-s3@!06vR z0Ki&HR{%dyt^jMT^AzBAG%L^bE`W!B3UIwuE&-Ke(g2uZ!M@9rLi`S^5_8ej- z;l~b?<{{CQ!oE)_nJ&uB5g^|p@~tHDEzwCL<r(jG_N{9wG9068VVeAdyX! zOnzd-=znb+Ag>ZSb6hqm3$9Y}8kPS=8F^+gDy~wMaF!@mwtG?Eo{1Flr86a*DB3IG z<4tkhxP1`9xfISp4T9_-iNT6cMx=TEKtHYAPJC11`LdY8H?4_ps=kY2RNn3f@?5rf zzJI2W=LR}4W~1`B7s4<75b~ukCH&H_h4;6Ga5Y;BZ?`JpYP(CdO{?ubEW*Cq8%W?t zNo>xO#ATA;0D~x&sglmYu<5PO2ziZKMOeRPg!NT~M&(cSfb?_NT$4olJ!REN`#t?- z0{qQy07t6?D$x48@3QUihO|oHT}x)CuPnuPEm`S(bI>ILlmnkp8AAv6ZlD@(0xPu* zR=4WZHds|MwWoVX;5e1q806i19@RP~)y}J#+Ic#)(^pC01xoGlhM=NUT{9l;zrxlG#{x*X5IjZr-w@U4~nrhG0 zRC~@89=>-IA))&ED0j)6LneJjE0-?ry-5Xe`7-M+Em+=RI|+*wQQTZYxiW&InFM( zD~UWVI#wreT=bHrba)!Q#BAtShL_?fZa!RLPb~NOT13gW7zZGhv+-bX2f&pW3CWaA z<7zOjB=ZS05g_GHR=xnn({RNF2AGZfa%%k!jIYU@iGkQ`te7o(Vc850n`4gN*J=PMJ&TvjszSN~NolDX2t!v!) zbDU0S&N%JV_TkGSSSnb{T{_>viYV!%E?5 zBj36kAXlYWd_$FE=+H*w6xygTtorE3o^z}{5Tq2@MS6+Ok(J`n!dv!BIg3pPr#~RJPwfQ%a>=gY0DEqdoKO|Wi z?SXo*Z`WjbbTKTm@6co-%I{X%cWJUB>ZKWXYqDRoKBKx}+Cq0vV% z4A}QKQ?)oE`Xze3{eUJ%8TC9II_i5;#m}&$0X^_+{Hy2r7QVF~`L`c36~~5hJvnft zql@b)sBf~^~`uNZgzP>VUJGb3^@25u4giNzn82Zj}iqwRYlhgpe{V*zMKPNRLK z7}l-$=j&?T1Z59nur{FA`+C%4v7}`BE(}bCX7qOqCBBQa0Y>yVnz-*`O?skNqhNhw zHR+Fj7zR0Blc6ZT@b9}slhNqMLqT4u$<%0!(#e`kk78HS@J-cZ28Kgap>MkRH7rY6 z=9?23hjNmw%{MQLVYjvU=4Z0d-PYz?n5kM@M)X@eo%j}IHI&lK=oTihI8)VnPV_lS zmuhKlbW|3|Wm=ja?TgOpTal?+Op$E3zUwmg$*4+Xd-C0&rJbT#7&m+?vtm+O8vPIh zjPGVmmPfNluF7O-n%Rl89zzm_Z%yV3*(D~V_2>g~ttMxqDRI=ZwxSjI?lrG~PQxDP zC8BksNyxJh>EbA+Tz`{*;9Myh3BJYXTWL0ugPwQ_pa#-=9wEd=t$H4&-AEL$ey;=c zQy41tx==_~VB++R!wLINduOZ^nkgQm`N@s8_hx`#Nw?5oXKP^b%Fir^Y3?Awaw=_gk@hT%s`xARF z3>2X{>}KM5Mk0ha8Od@ceHW5$KIw9NW?G0sR`0{$J^+`&lxUcdDW*{MRJGBL635={OEO7>_VR)div1_gewel+q<6`g|NEyW`&p^sFFmjlG;UWEp} zeu?xdK)nn#04)MvQ9v-{-)98=#x%Rpnpaw}hCLP70*0UkU(OY;bRmzQyYB$k>T&Y^ z=CJ>u_KX>D96Aklh+4Mgh`}^eBn@px&4+5IzZ&X-zqi(63e$h6J;N`6`7~S${O}=o z-I)G&puZ+>w8RY~uXP_3GMuvMVQJGvpf7-vHnA)I&o`0j|ZzEZ9}$G-*HR56P2et{OsKy-F_fe(OrFPtjJ`RCG@PeFf7o-}a&Ao3dY z#UugOV#q~|`BL)wgYFHdj9w^>UIuzGTy`;1Y2| zA2Ew}lUW#_&n$cn<|lBfjK`PKv_}1~zJOC%7(bA_L7@ARC$ljA67sGGeGQz-!X+{b z+d;n!mt7Aja?JeynT6K;g0mq8)@~*ovU0^PX0Av{IQ(sc`!~`Q%8+7dh_62m`oYY& z0aA{j85O#VygS#D4zu_ z^_=Iaf|6N34Xp<&NQToIc0|}71W!L)dafeBarzv|l8=!3dDF9ylI9I>p+r4DdS-)V z)sIl$%V!mzPcT9&E%G7$`P)H^(^UAv-vPeq&w+3GKY;HsJpA2KE5mvSAomGZJ=1#l zOzSC3m&P4~*u$q-Pe~)D9XJDzKL;ITK75AlAgmu@98W0IzA*48IAJcl?2AHw0EDGZ zm`OJ78s@^wo~+6AFc)6-R83}J z(-dm}toQR^M5GFnySFfn=K7<#_rfIN>s^~`M0Q|Wv6gd-QWMD&Gey@HDcg421hG9bh@@MH84GuvXC9I=Bv z1A>iN9Hv-$Y@D&A2Q2RGPh2nOy`aP47DpyrdRP4u7Qakg5FKu zgV!NQMLwenKyg{EqCqo%Z`xHKI2 z!)V?Ms;n^NgP+_Gx2k-Ez-C@9L-crO)Xm4OX)Nkn!Mp`d<>S^Yw)5?vUnEcF zD(l4<4y*CLBF0!flg5hGOgaxG<^ElS7L93-o1>PVG)p1#sO?xw&z+bR47&&UYRlE5 z_Gc|Uh0dVFlvAijZP{9S3Pn3)T-<{7sEuBa+Tr!o*weKN(`5pi0roxx@9%Ivnt?g* zIsEgeZ9Bgwz*)vqm_|TymXRu_T@}nSUm+aeEMpg>kzYN_1USpsU0kl7WdfXK?B2Dx zMu4-7JydhuSth_)#vZG=?kposSbzaRT8&v|D#8KIGMEy{m$M8e8O}06&pqU*xyHI4 zmEs$avJiGUB~jn7z&><}P=MUwJ{CEroC&k$8ou*2DMCM^MfgT&(hQ9x_ySE@p)n*! zYSI&)Ji+i?=o=?v@`frY9HmKrsEp)Anhb{CAbGJSL!mt+r}}9d_Lf8WB&TUIHDr*S ztI71xuoWP$&}2sF7^U+xnHgF_@=8tSgq|lkUz53^Y?2E!nIHOzKV=23dkEg%vtup3tjQ zxK}R58c5Y}W$%g{XC7B-{H)o>Zdqfvt5lm(Y z20g6TXsTWc#7 zGpus~P2sZXT?9gU+4PAt!U*YQlOjDKy==m^F)a3n^s=d~Bts#+Z0ak?s8L_EM=Vsu zivaiwdYD3eLE9LE^3xJA`X{z{`RO)*ws`lVo zdf7A=(b|K+2;x=+hEy(|g4tON3(=q{%HC-a-3&eK&akVmg+LDs4JK2X9bTrehe_o` z*n*(>4yl%*mWW=6w7G;d2w(x`H8Rr}2VQTtt$w67k!t9(EgF~h6sdGuQ4Phth$he@ zAfyGUm;_R}HJrL0mSASu52+~d2^PWIn3ZC;2+6##63^R0%5pM+YEfBsx+rWvS!$$>d7QHit67-8s- zfimRFy4hl=O~VNPlFIB@7x1aL zw>1iahEf z`gWU_X-YYckjQqXEDlXfogNpe^}6)MSwpAo-Cd zOPmb!Ro`Asc5>d$1^KZiOPxI=_i3`+`H1AdG?{SrliaV#iXhss?-Nb+!&z`Tqz9}Q zP*$OIA5O=|q6LO=itEGaxGup+RcnB7I<9C>n5W}DoQ^BnAK~e^52xdb4n=r6?!)Q0 zqN8D+j{9&ruIN-Fg{R{_oQ|IoNH*$wR0RHtWFrk@U_b8SjL5qz&?j8l6KR$W`bn4e zM;12({gg|GjFhG+Fk@?8^P$nv*=K+52M3ewBraz2OmZUWt0)&=-|WX zplDBoqk|8lgQEQrjt)MI4vG$iIXd_-Iw(3C=IG$V=%DD-2uBAWMh8WwM>sn8FghqY zBh1mkhtYv1a&$=H=-|WX@CoglV#g zlz(&SP?()zyGusHJ$r+G&81T#Bk}=%-KEnbqe;Kv(ixF|(|26DB*LHY_U&}(PLUp@-*xHINCoL# zE?pk^5~bt&hf62I3C6$Mr7I%uH-`M5F5NFY5aK;9SrwVU?7ipGLnHke{rfIGA~Klt z2QEDdwS?0D(51(KE=I?6=?O+k39I>I3zsM`#IeFc`Mz(hz|YC5`_2XHs{7uhJ*djK z;XCfq{&07e-3gZtMRv4B+&{Q+o`gbB-oG4lh?Yoi*uqc)7wU)nv%wW(_fRB4lh?YgEg7s@N$JSOq00|FIPAhYEoaWaK@O|R%h6mD3&2R zF?qQnCNEdS}3y%|TG`P^+H2T;W_Fo#RJ3yjDoObvrq{T;bf7b&DiR9bT?* zZr5bF!^;)U9hyuyyjcqQ(9IDB5$4Bz~ z`s@W}c82qJ2c%osna=0vH=)rQoa2nj1vyTWxz1xu_Y$p(mhsO#&{NF&kgGsN==H#7 z%n55W^!FAFyEPhmD~p+AjUGo~h2F_hMOotD_X3U3yDbh$X(w6Vp?_ql`Yx6A9r~vR zm&uTLU4d_2nSl8i+azFjRyqG#Iy3CSV~GuC#tadJWak5-t#8EmDmQ!+eX) zWt60d-45T36+_vIU5f7QF;W&`=n2P#H4#`36gKMI!J$LJ?MVc#LRG0(Bi> z?+uR?tyuV|>C6bbclZ*~O4oOU{X0BSw7O5~pBs5` z4CqTmt2C6KnOzo{jb(Otl4#Xd(uqjBNuVc-Rsk7b1=<4VEgxHx7ZAB#@?w@lbc{mM zw&9^nG8vC#T85_y!YK~C@b$tPh6w9>IB%qL=guxnlWTPMd`Pa^C%MYlxf_9S`hJv@ zS&&9P3_yAEd?=kecV-uti>Au+p>*!tnZ0XsjdbqZnL{<#-MLHW&Yd|{bKRXgX~H+I z3D~*&geGw3E>f6Ae$DftMn}O=tu!SlQcAF}ipAiGSPS@OEQY3U#ah5e`}`KzlqkNz z3{fbQ(o#4Z5Q==04|XdNr84W9Ls?2|5gx}}XPc4VF~y|hiuwez?$fhD=ecr!WZziO zZ3N!Rr#y(_<>EEvTGUNSp|HC_t?|%-9So6Qj{~a^pgMwTsHi5dVUia48JcA8TwE51F*m_F zKkR1~Sv>X7TC#t{(vD30pa_2S7EatMyx%f1{A{?f8xiedWSJSDC^qReChj(2XSD_Q zE65KMgHouBBb_Ue&WDxwPApKyP%v(H6WR-|pm&ggtA%$sBr>5Ez-7W2*-VIHlipXv zEfMx2;+R+|FkOgic^aZ0(IZ;9`!cPtFH?*=L4u!e#p~~0u?LX%;h5PL;%eGf0rq0B zC>n}*L`(Gb+;yPXXum)*h))zVt|B9M6ZmZAKT1A7v7NhBL;cW`P$TzcjcOuUd=ok6 zO|aO^Q6#fUkV-0&WvgNvoXun#p;P5G!SEy+iqt^>;xb%z73!h_D3jh`I9ylsUWr(< z#zXQV^tQnn*?&jdlVW zQEbwiOI)@HA1CfjNc_Vv;lUZ%Yd}$K(pyYit_U}(58MNgv;Zbk;ywgLu}SX+;tE8# z8*%@Iq!gGg64wqC#U{PA#FdEPWa7F*G8~wp61N$-l45%IC|u!c;$DDcCNMK3t{$`~ zHtB69t^>AAh|6M1z+5MBhoMEWNpBl*okifXRN#K31ei^5ZA>V+h_)7pSHXQ5F8f!s zL`r=09)YuN30dtJfrH(N4*+=&u5CJqZxQ$g&d7WTN>4B`dRw(p)+gYa!y$*u+6^KD zfyQuczXH)7fp&2C%jP&lV@-N5!-*^rxt)p1u?VOHkrKCuVtP3I#<(LQe{*qTfEk^{ z9io`tR}8cjk^j25`M}Ie;!aac?^gzjL?oqwPIoOZYlzDk0})4D^uX=spke#a<`<$L zEP`VX%om@QfQ=iLxcla($#Yn+ZXe- zXtsUEj>)SKxw0nk^<{Q#g`MC?tWn4h(pwkeePwA1$2tYLFj%2XIiK29E`WoV0#pSn z6<`@N)5QgFG*W;rL1k-U{SE-Ma{(OI6ri1(#4EHR#|3blQh*#6(4K%sE`XDx0yJ^~ z`AEXN6R(-eT%@6ow&Uy3U{#Pnxp&5@tEd>Jnz!)1bgV*6GfqhHhm+*Bs4_}9q5hy%f zg{#KnRXB+^x?*W<8XM5b^fAdxC_!FbtipQO{k#4`fYen8eRg5l;&&8;*@;%SFpdM{cn^>C%YH?&UPstt-9Ey z$aPoy4wQVUy&t7?uKgSGQf9w^ayZW(4&8G5S=3iIdn!`tZdX9s!~O@P3A-Qsp7xhW zx0n4QV(V=eAx9PVK;*QK9fKv6c07y=z4i-;zn^^y$o}^0$lU<@dho04&rzO(?609U z*!~LTFvQ+~@K77S8*dD=L+Cxj?ODK|Zw~-xggpl(e}Vlv@-@=_7i#}PyB*RUWp_dy zU1WC!f3#hJ7%sLKz=kn)3uukCqv)>V?Gh~0CfLhSdY9P4@Mt~Jz8&rAQhOsTnPguH zYbV>EKzEAW32kGly&K4B_H{^ox_kEL-HtjjxA4pB?oHd;uW@=aP|UdU(-BtrTEWvt zfLaLf#$oK3`KYxXztQv zG{WOR^B9tWB@4pg)!%Hu#2 z$AOCW$9NoQ;y6&zp%{+?O&kX*IvVA1po!x^MW-6|cpPZrIPl*n?I5`m5reK<|8Rs; za!nlDao&&d*v`bUol-VpJgP8pY^P{XjK_8+j_nlfkMY>f#Ic>CLs1^vnK-snbTrCi zI}^uticXF3*v`bUouboYJhn4&Y^UgqD39$-9NW=E9^2L9v7L!yyQ#Eut@*7PDE8|z z`_5G}V*fx#G{1LgPizpij=Qu!+M^GmJ>k-!*c%0q|KQTmSWgU(=1G@Mjor+hupeDI zJ;oPn&7aH|dj|FlWB)=~;l)mEc4mwp05(s%bWV&f+L}L`vH2388(V>4$2{Z8i((Hl z{a;+VB=$Yq=dUi^DRw{ge{<6-ja`CXZvO7d%VW=Bs4)L<=|t>t;;~z%(yNHY*oK6q z?W>CIWZyAedT6XKY0ITY#9pAj$I|&575jtvw_W*|*hw~PuS-vey+*vxO>a_cKAVBx zmCua!;GlrtOjgx8JN7Q|K^H$S)|2()C^=s|j(v)G$PBrRWg^y>h_K7JPQ)(6NNh%2 z#!3;JKt_toSS5^lmzvQK@n|5MZ|d?TH6_I6huYEc}B$<6=&Pl_I=;k=T>FX{(HT*-dk_2&RV;2_i*;v zXSnC?Ghei!xZo8T?h3cDD_rzfXSgfeUJ&6m8SVK`V=i6rk!j4O+n7ribaaMu z={Dxl1s|8;T)K_9bipTNIG1i?E?w}6XgZPmm`fLYGVtE`szvw|tAKOqHs;cAL`mj% zw=s=gl8j0X)94b;lp3bd1$R-3+oLUwa6ipybQ{y?!cS&6jc#KaUGQ{<)95y)(FHF` za~j>oG`ir$X-=ctm_`@8OsX%Y(FLzaa~j>oG`ir`X-=ctm_`@8#wy@6x{Yb{gHY#m z)!YFw>Z*xT2C$O|)z)35#(?PQ8Ff!))MK1ccdv6OZD!PswAWdkM`?X@fv1ly@bu9I zo*Z2eOkHAI!PTdS2IyN#XUk)pU zd#$Y4XoI3BL3Er!{nXE0fbMV5q!s(2JMe?-M@8eI!FX!C9bQ@Nu&l;Mi5{8N_!QA& zvl{OsIy0xS8!|0+lAVU4OI5| zyTYJ#se}jgDudRimQmF;1|60f$Aqmm=W6+7I%i-h1?lb7*)HP@>V-FZ~N-B@shYdP4wE>Mz>@kB*Pu1fc zi#=h`<5Ewefs8$A(3z=n)`j&3ot;V$ea4`3Qfp}QMvb!BP2EhRUo!XtmHM>;`0EB= zq*5Q@I}>}$;ER%wka0;ye0zhsseg_Ix`RRe z)abo|4lrmkwFa8vbp}o2j3ks-e2_B;dXu$&ZEzqwWj&wj_clUSipxj*z6NzuTt4DQ z8vPWPkNA4$ww$ zTs{&+WuHuO`A85Ib~?r7Bf%IGwkXBrBSF+`7N@v;B-po*O+IJzxqKvu3cDi3B;TPm0S&f@eDXs=57jc?Zu`N_p4m@(!Li!u7fsf)@=s4B5#(HL{kO%H<=$ zTlSeyROGUApDa$)2D6cksrNxke)w~*EZ}oRzUNssd9Pfe_PkBGW9NU`>g5&9%d}=eI4c;1Jl4e< z&aUKhRJ`FS70l@9g$?IaNCB3mc)UqCw=$)<6)7HX63(lT7pFSK<4wZ(hFg>3@h0H{ z!|k5p@h0KI3aKfzx-Nu^DxTM>`slh4o@==MQ#{@zTwE#js4m6hO~MNdTA$*AfpAF$ za}&p#O=QE#^X)GtL;M&CRv>98T_4z=X#`M?gOz1 z??W>8f#7&?qV3d9?8?|kvzQ~ z$+}N@<%4I9%(yeged{~C-k&;-CG(*b|M_piNEx~GaEJU>99J3OGz@`d~d)RY|XHBFY<6Zll z|1Ahv%2Y6v&aEntFXn*pewjXcwPl!ElKj(VrNY>;X6ueApZb9>uH`#=- zQWv8-C_?$&oIJ8skc#Vd9$+Cw8Qs0 zZ?-|pQqPckszEDKUGOQ$JKdnwRxE~gI`0gp4@`{pWTI~=;Jf2*CZVJPgue^n8xn4& zT^og9W00V51|nOO_fmQf-uvyOg&U{au)GhA@Pt%1v|)K48R7j? zsRckkG2Dr%_gGk;wf{}W3+I`M{GvL=A&#mksUP4Go!YG%!v0jbRYx=@)s~w7sZs4b)4j?2m;SCgRSOhq zJv+NaF2}N4t0Q1Q8~%V&2-}L>1Ar9FWMLNJJWr5HxW+Ekvo#04v%6#UQ22Ea)h~o^ z#V^5g$(zuV-=j6@Xl2pKBCfG3;TpUA-5OJ^60Wh!A7`l18oQDd zUaS$%v$eC)K8tI_@7WQ@nUEYS2{_kBTN=CwZ; zs=?|(WE`j?0Tq;437pl$|q_#EGDRbv;?8r(qM;T<$Os*7F5+;En@Jh!SlbkqYLL8uP;BD;aM$M3qc z^x3&q6<#GBD8avDkt7 zKs!csW(xo82_URwT6bgKy`^f2^aiy90A^su3_<6J zUbRP#v_wd@-(9kpVz5W;&Yb;A8^-n=UO;sbVyi{YGI#G|Y?q+nYhOx3E>b-hTVg-l z5W*OB&Ms3?&Q|S@AjbeagpiE9T2bXjNg&n!g?}ILlod zaVJ~V^TA<$9R#k_3)ikkHZ#AfvD8g7Pt7uOnOX6!VKxngK4@=dmF9VaW z`QnIaRex&aZx#~jL&E@HnE;PwxmI-wmN5oSOY0ibAV5VCn2bR)Sc!gSz3kGU${xNy z2zysxqFNuK)(aC+-HD?L;-$NT;)OZR2)g1Ndww z2ITlwbv5*{-j5d|+6l=Vd+9i*)v!q~(sbJgxyZHQ zp>lSYUZB=2^H9SaZdH--0pPD$<`lymiQ)$1d%&hF^Dx64ZB_Mwk;4IBXPM_1<~Xa0 zjQs&gBtQ&0&oC!g)ixL`(k@^&tnc>HiB>h%fokTiS*9hKMP>)XJT%Lc9M&PbgUOe4 zzA)7gyh8RY#4r}WR&{T%`I=r5v90Q9M%~?6b*5k#*G!}C`AELuJAaB%2J_Vr7T+B# zzQHlYMb9k44Jl`*T5ZPbOV< zTAR)Fv3~vG2oA`Qqf~sf^HlJr0tJ&I&ic$*l&``aRhUV0o;Iipv^O>c8q^QCio$uu zpvi!%D4b^vnhv;%!gtd^SnXJ05DhlUigVqLIMd7?+&^|#~8tAJA?H_Ozh4Y$0>jJK#a9%fPeZW-| z&Km|D7H}1X^QJ+E`v9SiN4miXg+sB|a0f+cw z2N=}s5RFZ?hax2=k79?bdT7koL;U%Ah(BKs@#pIy{(L>epWk4ID6VP9Ljaed*6I!j%^A^zB<2CWY`#2@>ML5Bq#;*VWn(BT1x_+wWZbYxISRaYBy zbih7v?3!|^f8zoU@yD($mvWjAaEL#4ok4m0Hs1jrzs>DGt@s1l7}#8(m!|3+qOlun zQsTAo{z2Oq@_|GA@qs4OIR+1OCxf~Hhxp@B+4}*9_~TL8Cj$=g$D_hd2OQ#$k1=73 z0uJ%V#~HLZh!fqnP`2}z1svj!M}=JxaEL#CkP)s9IK&@6#Go|+hxp@%nXqPuXndN@ zBWB|1_zA($ObP3Fe3l7g1sBx;J;|VM@D91B7}O7*rZs08G-)}Mm z{COi>uPajgMS~7Qh2SR(l>;jE9@qF=_GgF&vqLaDHW$0D*cPb^pu81h0OvVajKO!q zxj*8xVr|U*SZ&lV5Db3Cz`?VW;SXZsaoRYU5ZV(jB^1M`k}n~ss{P!#&p)ENt6Cp! zJBLug>cO~64@C5Uw%Tv)I(fnRCfxf zCjvxWD^YhH2-g6#x&>O@3$RsfjOVOd3%>d)t8Qbwmg>F*bqhe$y%^WlO+!0(2tcd5 z1M1q*%q<9ufe{`nXwGoXS>OHuFx6>@j$<45?jwu+i!mBip_6@DybF`9M#HzenfZ2T zT(Xgh`NzEhqaa?Y#Se}5r1-V4;c5T^9n0kG+d`oE*+BbBpp6Kyfq^=x{>)M@E@jSG z`1b>NYF##z7azo^cEQJR0HC5?!W={ioZVC4@>S}f-Y*8aFea)N>}UB?4}g1)0ICN0 zBUUer)lt>YpneJ{Jrc1Y%>I;^IT`D00ab7cEwv~nAL*q$_?>TmwfZaLogB+kBPZbU zUI24sKZKMFoE+Q1WMH+rgLyFmqI*D$;uK}6i|B~h;H>B|)LI8on4K>r&WTx~BuNB|sb3izi3}~}vLJB$`VpW>dMCS(( zQlDpaPV)LwXYWJMmj{&UpR^ zHYw$e&j-iR{a|#`J3iF|ZcMTCSVdld67>W|eI-jCaJ$ox??K%LXuFceKji90wPFfd z89>|XgxH!YSAejD#AldwkBFpm7@h%bcVpf>D#TI{S_3-Yi>O(==O9+Rt2}bDb61$c z_U_6Cw1Yrn<+>|J>o^xQHbo{JUb@YUVwu~x$XL!lWfQf`)%CI-k@p9nO!i`+k|u!` zf~R(Z>n~YR;_7mK7t}`qlGANnlhbpcwgDu@c@ks)spu>M%2q(3j`0KY zfIJ^x4&{5B80$f2tjzPHvJvj>Y|jW6L&X9B%)9|zAN8jBxFyG9WS9!UQ+H)Uy=nJh zsIF+05&+5bx9x16SIdygr%kRVcpD0&1^86;rUJC#)iU()MibFE+#C^oL)9A54(eT& z*e; z{!Al;kqOG2Xizu!8t#}s+n^X7{hTqJV(*2JO}q5Bg4T*Th@LuoEb%#ZQmH3M4Ow-eyA##@0O~gY zQI{v`DyBmf0g9~kRM*a;x>uc?bvuKvO3=>{>t1yRP~8!rP6CL!H=NeA?j8_s188;3 zad=1$ido&!#36qNLTUTdfT&Tb5zIhxfG#M5ZQ9nPVY7ze_h0F)4GM7i3T3JaSk zTnGup&1Isn(Akv=Uj=mop!9rZd7*PSCAL2X4j}*vS^wMXfg3DR$y4l_PXo|v{uq+t zliJQu>e53HB{b|iyZI0VPd1ULzq1EWd=X+;z*x%FP)5GiIN6}+zdOKF$7VyVwTCd& zC!oFs5dZTjTRXDDj>UX2KMY99sRPCy6vvKUo~T>R-(w3rpY8mB)e{VG-8$(E~X7EN)J z?CE(th?B!8e~Rt?OzCt`4+oU8y+N4WXuv8Et^#zNdGvAc%p(KlpnLNIGx5zPy#W@~ z%~{QFs(NbP1O-n3BoE&fAATTw@7|p3Dpyxh)5T3R9S@!=OGZXstoER)OF&%;kgnOq zYCjrzKM3~#q-%DG(#_9XAiM(5WyF>s`vBW7WfBi;5+iLtJR9MGY9~h6>IAIZ1c>dE z#P-ubm<7O4!P%^T-#6|O-3yj_5t=&dcj^1VRAiw8zZHxcU6emYowY7{?BFMD@*NPl z7SKfx9sHz64%%Y&Gz3^()g+xwjib5(EG5xgJc!YJ0>VoGiRO~V(Ja@|EI-k*&IL#` z%XKvNNfdS;+^xLF~f_cfs#%d0QgfPd-NeM-iUH+R&~bd~7?Tp)Ik@ z!w&9su1vOi*ugF4SV`{S_OOFna5u>v+#Yst3+{*9!R=uOx8TVncW`^y!7X??$sODt zc5n+`l;jR>4?DO8FHUj?w}&0vx_VZXCAov!!wzoYS0uTE+rtiS!K;(p!R=uO_f5Ly z)Fios+rtiS;nya)gWJOnZo&H`xr5uo4sOBwC%J>$!wznVuP(_Q+#Yst3%@?ePpF3- z+=35FatAjq{Wb9oPjUyhryRo{o#YN~4?DO;eq53}xIOIP7JNdIJGikx-NZLB$sOFd z#K7<;C%J>$!wzndpOSo>^4P&G>6@D54sH)SxP^aQ$oX^+JGcd(ndA;`4?DO;es+>O zxIOIPCf~tswIp|Nd)UD(gas*t5>}uy_Fmlu2l#X{+UA%uc4Ic0A*bvH;`8@(o z;uk!D%HwaBl(Mo4?nYT*N1LE-!Bwal*wH4aUvMqa{sv7J+(>jsgQg2^BRa^SMFn>g z9c<8I%Q?Lo_%3!|M&Bps9k35kFa;mFppOy4irn@<`x(?Nc&Z%eK!f@PT#t-hRANoC zpdV}v>J6GMxVtUTp$07~96fTR73|uYiL|Q_J$K>+!|i(+eNiwfSj6aSk&D4zCX7|k z25(|8)}U^|8;oxsgZc%>qTU4)44N#ch5~H05^K_ya~4{e;2@hjf-*&ko&l!?3%La` zQEP;(0(M3c+Z)s^;13u20N}FT_lPNJZ?u7Q)?RZ z2k2>(swIO!z5}xi48*_rCxO6e3FN$G@jz*uS=pUZmo$)KV0H}JJzb$Wy@{yN?Iw%h zUK@#yfsrhc)-G)*Q>T(Sw278ps4VUFM4^CFOGJ$>r`yu_Po3kAX}<;J)i7@rpyC@K z598rM0Ha{dt5oM9H`ETUqqPuevy0w#WQsQh7d!Rk6`hx5)99`P|K-~^d zwM~evnJ2SAIGV&)Svp@h9Z0+zgj-1*Ny)7e{38(F0kr)XvHXs-x2;E1e84rt`%&;I zCs&BHu0(Yw`H?2%QZ=3Avm1~rP6lB>0*?H?OzPQACC!))>J&hAxe)u1_$UZ>lUONA zMv_>43VdNeN4>Q49H)pi6ASV>fv5krATv7ZMTr+X9$QDQ&dhRc#4OzFBJKpMGXpxP zMeV_@(W~GsyS|32ohMpdBBn6>ECc0wat|b76S_cbH(4AkvFWf*J;D?|U7^`^tgjD) zx*AY@FjKh6p1{QHcPeT=+Qviu>g3{3)dK%870#vPJF7GGA z`LJ#-pz1BwmHkzUpOM=^SPAHK%z?N-8n74oJ(8JuwszUzVkgv?kgIn7$Zzxe5(u?^{_%kU|kr#pk#8PJvzTFd{X2VEz+ z7osF_dPRHP96Nk(d+?+=khVkdSv`5U91gS4rdr!6H4W(^SV!R9v8@fI=n%*pQpL{F z6`GBgEc%;*m+F6O4ynmvPnzT&jh`lqJxN*t&=;I3w5|@^>Q6uj^a@Y7)o2^=X|@t{ zs~x!2g1g}N#tOv<_Y-uh9k|uPPg)_}Y6osL)%(jFxYdRHQgaO>-0Daz-D(GJwNaa( zTkXKD7Tgc$Ry%O31y3gERy%O31y3jFRy%O31usg_t;W4<1}{#~t#;s6>$F#uCFoW= zaH~bWB0;y>fm;!3PZ_=h>H9Z_HM4n_f3DOq@GTxlbL6{SZ~La!*z(<@5z^or8F z#w$vPKq#Nbojinx^v!55aNLRHmz6fhoe1it&2cA!`e}3AiJ(|UXO27J{kYJ0Xu!pn z>Dyr-jys7oK1%dRgSzRbh#qTDKYbt3nFfVMbKJ=~YUFVzpLx{S1446+5bpOy1A*gC zXg(IorOk0Cj2p+Dq|I?B5`A^r9CspUP1+oHB53!tIqpQz+O#?DM9@CzS>=f6G81qA zv^nlXxOHiB+=-y|X>;6(pu^JRn6T9*?C^A7)MFfXBHWQ_bKHrbqti30z`f0I$ED42 zC&HbOHpiU^Ix%gII}vnp`kG>deZYjBk~YVk2zP4Q9Csq<^t3tdM9|~X=C~6vZklaaVLT=Q0ZSQApW`*cd8btv^nlX_&DywX#?j0$DQz^ z!i-)U7>D;xwkl8)P^M}<){C(UM}N(fv=xO!5u!j)o1!@m~C|@kf_XS}uKvw6UJisYur7KX&Y5cKGB0UdU zRDdLl{^Lde9iZOQqJHT4hSv3NqUSm4nGHRyj$<^vV?&611L~ImQQk+Cw>blE4d72~ z&az-UU!XSXRBAoKlajE^AN}h%yth`j3%4hW=~$>90Vvd-?vb7@jU(nG!vKX(j)I<} zgvjf=eNNL1wFrs9ea0U@kqYFPJ zdWEf{_s+sI0LfufQK~n_sw1Tyv2T=~ihBYm)K+UbayXTo0>V^4nXXqyX-yp#LJOem zVV1&lP5T}AC#1c?D38{(C(p)MIG}7T<&M#`5sNHqXF%CIl#|x&THu!g+O<9mw*dft z^Dzvsv+hBUO+B|Y7Hyeg`MM7O8a-fHm{5jC4|hioPec#v4>vNeM-RV54~ZiTYklQJo&EZheaNHSNZTf)}-D3$a zuEjkz%#IrYk=s@5RM|m+f_t?4DEK=a&5Q`9X?G#sDZ<^vs(NVe9N~WAFyb{4o=mJD z-X+4*0k#i1T_d!}3VV^?4TGo_+9uQpxTaY%aOyE!HGP5R^LR>d1eh0SQj9JjM}T>O zrr>UZBfz{sQ*b}Q5nx`RDR?r7F3=P_9Yhys3SN}p2rw_u6udaW5nx`RDR@~BU7$%5 zIRc!$K(i0+tai?@gWYV{S;aJ+8HK||kfVlTBq_q(L|5|9vNQWa7`M+RJ|w;{^1+IO zp+k^KXGij7i9zHqitq}_CkEEVg8KTR^rR~x5Cf)w}R*VTZu2{-wHqH-wK}d zZ$&=m-;&?RzZF6Q|5gYM{97S3@Nb3C(7!zr6$jocTMhWPccQ-hfqzR0__yy;;@|nV z_d_VZDAqIB*@N%MvCLSlo|3~mo6-B1wl}Do;aFyD2ZQ<IH0JIi3D;->X#N+jlT#Er2=1}x^AcU|&9l_rbc5fnA zf_e!+;$N$V==jGJ>$&Hr%x<`)bF31Vjb4Gi2T0ult9nkuI#~ce%N+GA)LL&*ovBrg z78`F-{iyE~MDQV?^w=pgEOnbq7N^ntr}zmd&{qhlWl-7y3aOY%U&|_8raCoLx=igr zrJWJB3Q%|u93X_=lUc9E;&SFk0zAx6`MNNQppI&(l1IBr>Sw5)R5>2u_oNP;qchYX zNqyNc=Fm)~&oRCV{1pHc36IfGRSk;dF3{Cu&?>2~QXR!m(O0GV^2JnR%1WuPqon(N zgn0*0R!m|iA*RlQAfW6_5<3g=Oc0I-l7Yn)&Q+$|)RbRZP*TVKVmzSxxrg zSLm`>RVBuhAH@t>RY#5*(_Y)MT37N_2yhjky*A}KO?w6Sh`&Qdor-FCk^!iQ>TC=BB0lZOu$^Du% z@C~Y9uEt&eR%D#>OoaP>7k-(ajqqf!H%D!ri|}-ycdu@Y@FM?W4gx%{3cf;Qn8)#V zh1>1C5b>-1wH3f$jPM%2J!+=2DZ;z^qmYBnOA%h{-`XAc%Msqk@74|YD-qt`f29NP zS0lX6pU?yNYpTFUYhYK^`^(VII$9eGdC<76W;_kH4}L z2=7OPMatI$KOd+9ZdY`w7At)ci}PV5G0*k&(9RZBaIltG00MLQqbQa&uKx%LA4i0> zuK#xuK8XnHU0)CPd@2cXs-AWIUWJhOEQ;j?*Vh9)pGOieyM6`p@{35~b=Tk41%#~; z;ceHiW$t|$5jMLxnG%GrBElBerz7cn9T7ft{j*u&wnc=kuKzP@*f$Yjo9naN>wFs# zzIXjsI)d<>DmY#z|7X`fh3@9}k;D?uzl^E{+|o>6GIe4`R)g6P09O;nia2hk-# zbJ|55TrtQlvrB^J^ouwyzVGCakl-uKilDU_oW-v3iNa?-XgnqO84>PT$?HpC%|Dg1 z9D1~}t0E@mtkW*WbUyiH&+B4L*QoV5rt4x%*QnKFx-Q0ajar{$x-Q0a z1yB1N({(YXD|nI5FwS*t zx){?He3*Ww>tak-_@jM}>AD!x6?~k}F~l=l#h9+(Q}j#jVoX=kH`V8uu8T2U;fv4fVoX=?nfjG?F{Uf>vwe=~x){?X zU$)BO>-j-?X( zgn28}PN*-9mP+K7M^GZxS@B!`=cfe3x;w)llp9lHMqy0t>%sW<{8TAnXMw(gR6zB(WERa5jlL2Tl{>FCcsm$mYPdY#J9tInYuX;o)wrhds4T zjI3S?;;ArFV(Bfh%m8&NAR7yJS4vLyiDH@gKgvMFJHG-^*d|`O>kk9&X1w2J<8>uo z>mtkgk?{_L$OHf{w2^pY4dOi<99@DZMh_Q7539@rrsz*#27jCDyRfKA)FM{FPn%LF zk@{{^>N-+iZc2@lx}hnxGpTDDQ%lvZq+Z*&zSkp>dS+bKtzM^V_TeB-1~jjfSjBM% zwJdC`WeK&2hDBP#eIVS~vIc8kw6_>$LqV8fw!3x_|M$2C?_uF82({$@;zBH*$>;Wx zfB(G@>%SLbJ>j9#`v38TSniF^Ahf%-?X`w$5gUMUO|Pc78)|tAmt%Rj91Ftn0c1D0 z1k3AF!V6I1WANi2sKds;$5%GG1j|j~(xu=4d|kuATx)QHDmY3zI9AB+3vO5{I8Ngg z;kEpKlkoY05A{V{H;aH%wNizBq1e79D`AK9dF)%W5_Y&_3WVFT5>ChtjD34n!U<34 z48k2*2{+W2_S~ro<{^5-;wE<=ZP|CJf|VMd7Yo@tvF}y|*J;AGc*xTz?R!)KlM6%3 ztUNw3S*cp)5sp;Ba~`vVN;R>K;7cOBpOv=@_>4sJzqaD!=|K14A)lJgw5{}O1&Hik z<#IMRajR{kvmD}c7qYW#qqD3}^s2H#c9v~)mUS6axgk5t_A?RghwLod=qw9AnPg|# zMrT>@bdsHA8=Ymri$ZpmZFH8~QcqQJ$j-8j&a&{U!?hK_(ODL}CS+&XMrT>@?jbwN zHag3K*M{sY+vqF{-X~;d*+yqs@ctn?%Qia8g4c!YEZgWT_to*&hwLod=qyWmhllJe z+vqF{J~Cuy*+yr1FD*YhWM|n%XZc8tPnOz-&hjxDpBb{VY@@R*;b$k=S+>zx7JN>~ z&a#cpGI3oS*;%&HS*C&PEQjnY+vqF{VUd!$hR*U_M8VFoR1|cUMPi<*Yv?Rrpd}W7 zz+6UWSz=k^hU_fc=qw9itsAnlY@@R*g!QgeM|75%5O$VBc9v~)mL--K+>o7R8=Ym5 zc-alvS+>83Bwlwzc9v~)mLlZphBE zjn1+Vwz?rZ%Qia8LfGbp>@3^pEDPa#H)LnoMrZjdZTin{$j-8j&ay}>@j`Z%ZFH7} zu*?hDS+>zx7Q$s-$j-8j&ax0zcp*E>Hag2fSm}lAEZgWTOY&EHAv?=9I?Ez~&a!^> zSh4l17g}+?QF+W^o_nK-SY=d!=Qs(Pvq!{nEPo(5BxnxT9qTYIF103y1pOkjB501m zS?n60D17FF##4gd9^syqW@p((XZi1F3^Hl^aVLnu4-BiA{J%RoEf^yUm+b<4ZG^kY z@qv36x`{9|pLjErio(z`{1%7#ir^C}2%@q+|6#j*FtcdX9@GSDLjPSDX8uG7- z@QUz!@~@8Y>hLD=S4Mb^l^#OEHJ(!l>rL;hARXH-Sc<|f%&Wo&tyii3SXEhtN8!^I z+uoq6@Gg7;Vtq^5K4Yay;m@Z5-NA7E!Zc!z^*3lx_#hG%8)(o(;Q{2<88j^1NOX`v zlZBrUtv6_1;gJkG#Gt9d$H^UL(0nUaNqkrP1Eioxbw-A&Uz*HFv{IiTnd+McL*1L< z-s%Hw@U~&v0I9`9LmdOZ*FcJXz87Nto`-jW(~XJ6roj@m6*j4j=)sW^{ZX9vK$Q;f zq`94wV7eEB4QRUwZz=z>0o2Rb9rO{X+kxGUVz9xY4UaUj;hwD0M^qOo-5=89sr0*M zO8>5$G9F2K7T9M1FmkP?Q|WCjSerz50+2yrW*ZI40*ZD{R1u(lr5x4?c4 zKx;2S-m5E`SbK0*=@m+6L2MbS2%v4cnbK=uZF^9Af!zau4x1V`6iOF2P&xq&6=2{* zOkJ!x($qPi&IXizS)}FruqbW-;aU=Z7bT+@>}e35B=I&O9!cUCAbbLVJB6Kf$i}TO zJ9ng2zn?HcK-Tv7V3lL#@=W~lB+_!Vw|ye$6)xlRsj5WvqvGRR$lyJ|u3Tr5jc>2~ zVKOFx+`E;zH=;p8S%GFDMDdBNuOrm@8rL$b zlRmayJs49{V46+|l6zfN%Y#+aG7K8(0o6A{0|g!a%m%16PT2z>9t-YK02;<4?|EYK zFz_k29CURMj26RI>o@3O5bpz2SA_ke20kG8nN0>gd7VeI&`O# z>d1O~K}=PEL*rTUEZ{2rmS51Fai5NOPX$!JinuB0@Mj=EEpy6vBlFGRUJvNJ;+k~obXcO@-X5w+y-BgU4@b7xhx#29oHqHRHEa;FFG05Q z+K2g0mYS2F<~vr83CK3Px8FKT?gaxB^QZJKM%dfeS-&r+V*t8A193N6aXtv=0E*e5 zfp~a6n}o5&Y|4Nx(&*kjd%!-skFSg7QHb9Q=y@ESpT0sY_zULs0X=s@I_({Vco+zW z0<7)sf*)hI@g*-dW8|wGxj7pw#img#YUB5(MJqtP3{c8igD|5>d>VwmlgMfV;xrP~ z<(BnN5XHI@iE{vm+XKY9QXw7-!qFsZ>)Hx&0SNN}R&6zv{tH*ZQ)~3cvS8iO9|dsx z@h!Om@|QA9ug!RW>`&vkyq+K4ZhRksZcm|Ztz#M)qSbYs&U9=t+8usTMS4@bFQu(s z|3WipKTcKrfC=+)iO=elW-Yp#Onx$jdAAAKb=^=fuZ~pn-4}tYajzX!_r8JxixIkE zs`!RWsust4Q|>9G=m|gz6>MqTYu@(S7sWlR*BMBOJ(ZU69hHcu#(U|Aw|^To#-12i z*6Ud&ad*nHS?ZKNPp-=7i8neDVyPTyHbiF34mJe7}! z@Nowg5C>^lrC4CPo&5$$`4XU8;EF3yxdHI_@d382v#Ya1i`#~yM%1EtLFJ78&c6vl ze=@Xa|95E7tLuXE9=!h!E&l&Lv}iXPT5LR=*l_d^rycONqDJTc|!m4_Zu@p2?%cY<;mVyfIhF!_WQc#W#Vkv0&A#p4PrF|HSOL8fw zjisO>UltA`A4@?6udq^lU|^j-#|$l=Pbn+~?FdFf-vR$3z9u?Nm=>3?R>)~_-T^PT z8**BlcfbqoC!;&y1y6>Y7Uv!Cf~P}Hi}Mb6!HdG^4tT+fWgHIE;*yrKkkjJ4177$Q zA*aQ82fX0bA*aQ82mGBn?KL5%#d!z3@M}X(i}Mb6!TW@q7Uv!Cg7=ppVoZxme03qG z#d!z3@ascPi}Mb6!H3Bp9;U@5zTqLK#d!z3@JEN77Pm1iF8H{R)8f1XUhoMroQ!F4 ziEm;U-2pHB$swo3c?Z1UQ)D;~)8Z1})R5ESyaQhN$0fPdiFd#YK2rwwFfA_fvqMgc z^A33O^*AM`#d!z35HL;|-2pEIj8k%2oOi$r0ppaM7Uv!CLcp}RK0$zYz~9Xp=({hW zugP01Eld$$QCuAV{@pFlAE8`LkXUcEGlP`l^_b!vhTnv@9KXtQ@qXaO-BSFE^>d0L zl)ey**i)@(3T~pIx~SSAa8vcl_}h9&wqR5d(OC+Rgu|`*oXu$c-EOCh>dLJ zIb(no=uU;N@6pnW1nEc=vVimt24C27^8@sPNmOqjuy6{rSMR&%1*)&J)K=>9T_M)+ zUM+eEt<=ojLEf#&UWr!flifh>*Ni-Y(p{U8?`NL0Yeuf5bU`z6PfEv|kw2q>|7y~C zZKeJ~=^vVrZ=!))n~`@W`NL-9NmTM?6LM?yHluveVDn1=@( z4qs0V#&AY)y|5}6`(jWR0!s7>g&8VI;u9b|N@Bp|ogl;yK-df@?GI&}p{H~Y^MLc= zUZN3`QHNN$qd%sot$LCv+8JvH_})c-KR}UslE&PRNj$LoF<|=@=&%DyQu~28ShZr1 zIUvj=@k7QjM75#hy&&8TKx2WGzZj*14XNG0-=T%9YpwT%sU9k$GrSsRGgG9}FX)3% z9gt5+kjNsrOdk-TJ}K2kb0FkzrXjL+e`A_HsbyY$2_l!Bmac^aU(fP4@o+UB z+T-Zw;P>`=2&=sstKd*qs9rSk1s)9~e~hg{Zozr7F||ycOxYV7XI%R$L3@nDk_=B{ zuyfwSM@yY6f;2RNWb91A4!;6pd+;R$VGnL%>R^MZa|~WTNwrpK45WEfW%1%w+j^!` zwkz-wDxK~M1Z2zKE4Q;%jeiX(I6VL0KNWk3od}tWZR{{PW%y*ZaD-IDRkm=X&V+7n z27ZhW6)mtO=^B7JKuI4CbytMra47Pk!=XqwheN#_iQsUkwG=UjLy-<2NuNLzL-B?1 ziFg8$URs2+q3A#G1R}w6ClCpqJAp{>+zCX2=T0CJJa+<-;JFisbV?hXKqUO!2}FYD zP9RzeyRob;djgU0b0-i9o;!g^@Z1SR5?}5FBH`ywAQC)x0+Ga*JAp{}xf6&4&z(Rd zcYa(CT;Hv>-bp9V!#cZ^emR{$*P(RUS*U;%%pm{xtRMmZ-4sC!`g(4>Y&%Us(&k z@U(@SV92vs3%~HRh0ax$^;^ppZu45QP_<|wsk56|2r4WrMuw`VTd?pxFUrGb#KP@i zOb>wM;WJ|46c7#qw2+4{v}oaGucbUBb$K%jNj5Cg$vkTrHq9u;eu=du)Rvc*N~h|i-pB2(NF>;XVYTg z?jQ^W=(1;Uhd(z0R4ZfQtwi{9FCRJ@3;zbh;?JWI^?g|Q1gZR4YpAgBmQk?KH5M)c zoiWhDePLm1Hr3#EVdHrc3^{?uY$&rVO4|Hc3{Y`hjh0Z=KX4otrH=z$3qjSYtg3&w zTGcA3xr(aZfGSGb{FzBrzq+iEkFiF6WmHW7T?;|gmsG{?3AiH8e&?MkKex7;0-0jAgeggG7K+y<%Le*swQ}rsi>ws4K zH;d^?6BFBg#8k+#9@`|Qy%1F0!I*B`U9)>JrjtND7EsiSVa7>JPlE6Wpkz>6h~O`m zrv2S;5p!MkxD?xHO#ZO7fy7JIX)Ge&iZkhGQuN1H{gOOnV;w8n zR!7@=7UDY%P}H0De&y)5<0TND0hG)$cDRua^}Q2Lg^tpT!O6c4^Z5X)RjYO)khAP3 zCu}vi8TEH3M0WnlO1rL!bseBc?V5slmohuoiFtc~Is{O(6I1lGn0Gk{O8_NL81tO0 zdCxmx96Cy00q0$aybWk6J2%0+=rze1{if4WcH)e8z7VsT82k-XE7srEXEN(%Il5Yw zTn~2`P~?($k{Emv2$KLME?OJ@<)XaWN&Srmw*e=-0X;ha1_w;Sa&oJjg3XlUjq(+c zDW_Zu_2fFIpoLgYck;?%sg9*TLhkSfvCMZeyHbv^jDpOFKZxZlC(}aqo!=t$Hm9I* z9c@%uv#(jU`erGpDJSlUy!s8NhBvIohr%eee+C&}#614Z))o0eP|pMutz-51-PRR3 zc_TKbfLPM8S;ohmyk2P}wLdu5Lu@r5*GT6wKI7zN{jnUi1W7%hS@kY+3R=jP1T-{% z6{=BC&8-^XLV4@ym3* zRJG1G*s7ch` zyNN~LBCNU)9re~Hu%7o8i#pu`ml9Cap4r|E{t6+t{z2&dS`0na&eJOs7`Jm9%muU*_pvR8KEuxcG>W?z zAzS}J=tXw^pOklFR&xh{b>jcH42pEs9!T$X7}RBZhI=4<|2WI<#!PsyHPZ3{OZ+;e zUAzlH9RVm>#d5wuwxd0J2O29t$s%OlYJ^w(xswlfV9*z{ZKYR$bMKuPPXJJQXDQkIDd)pWMrREX{&eTV zn?~oZMEEn751*;LnLf_k2ozuzY&vAU%W^|rHgg=h=7VqN{}$=| z4*I^y>U@-J{yf2ld^=w^4I7E@XA>Vsf!-! z@t|dJ4~NK1i&zMu;%OjbGBi5Ga;nPTFtC2xf`Ct@^z0_0{c4SyxVt0Y~5o%`Z zPe*IEZeOQ?+6hqf1Bqo)Rc^QkU3EaoO{fq!6a@u?pFVu3R(ahqaa;N@I2YcF#bE%c zDkI6}&uBh$GexjJ5&j&+hu$ax>YPo4KMVLUSmn)&bgqWJRau=Y$mY*VJ`6WHZzjT@ z+xf7U(Yc-oe_rOpK`QU%Naq94cYjvrS7h_&TRt3SbpA?&KNhk|O*cAAiSVZrA5K&G zHON1m_Knc@Y*yzWviUQF4-1r3l|6~@XDlDiQ~AYvAOc+tj)@*-;6Yb|6Y-$?4wpx) zN27-)BAKV~psUl?h?RzBt*{6WT2C<^w4S<%H6?nO8p%w@gZ^}tt4g*i4Hw70k3^{* zF&EvseuQTABjWuP&w$1an~o6WZ)Mv&#%#5BIi6dgdQ-uwJUv=WDgISa5y!yN+w-fq zTBaA4&Z!)2KGC+wfp>#b8M!_=C;jH2Lv^!{`GXEGYbf0wj4{x^7r?5F`a!w=$0I>y z)RE4`@_0}gIrBN(Jt8DL`j=~;;H_z^oMU%)iTV+v?!r$aa!tKf3oJIeE;8VI~0ySr{ z=tUI1FE8TGCwgTT-IwTvS@e2*Pwca@=piUAdrZ=Vt)4}6L}*ZU< zPLTlp8WGqj9Ln#PRee77_lyMCS?svKko1mut9mOF-aZmw@3-SERN6i?0;R;#kpTO1 z9XG-e1IY+n#pK(O0Q*H9kD*dK5?DeF-(&eLO>)@5>Nt)$__dHpQFV z=i~Z_V_lO6)SA>KJJmXNtW34`4_Q^@@5d)0^q)<&Vyo*U1U3gIHk@U}X4kpkxJQ#M zm-Be8cjPfMtr$rw0OqX3*vWXlHHW+8`86?ITQd?}x?omE%zNR`LW*J5D&V1oF&tVb zxEowl033%F3hoCyv@nK43k6RmcxYkl#0XC(cxYklqzEqxcxYh^hZc%_alk_hV>q-> z@UjFCEsULFXJ}&f(83t5t+|VKE{lC>2eZ+7CNQ}h%bkNAaB?@6I|n=9;;>lm9P9)a zhsAQ|U`I4p+6VT*M#Y630}i{;M24!AfhmOBSK;Nq}Y?i}oZ`-fw>bFc$04vXc^!49}M zES5V5JK%2O7#4>~e8U4S4#S}g#-7mu7l*}i=U@jTi09714!GAimOBSK;Nq}Y?i}oZ zi^F2MbFhQQDW5wBJK*B5SneF`1Q&`jV$7ck>!d?#6F*&H^Jk zKc(2-IcS4VYd#MEvE!%^ zuF`_zE&nijA76OzSl_89w}#K>fOr<5l~%NF81>u&{02bl5sda}ZPRnWpC+vx5~Vh1 z+V{Y>0@|EH+Yy8QiQz%Locsxjiq8R~_kC#3042+T?2U&p0ISWSB%Bt8;ZIkF`8?TdD%{YU=c?>Z>*o<=sI9x*Wa#K#(TyXYH zG>HR+!&bAMdY9RHgcJ^}(tkF_m=8hxQZ`3)W!dE2k0B4(-CD1MIx?Si^TNNO%m8gp zhcN$gLu>4^Z=?Wpn*-3scDYKbFH*ZUBRxQNDDTd;nh)$ zsjG*`pvIbJQ`3BJQlx1-*yH{{(;|aBF4WSro!F-6!qgeZF9j~CKdpxb>aU%){8S!4of({}*BcNAa}9u8yxtHYNl5_=1Zq(7u-{tVC++ifv@i|W_V z^et*PTDcrT7XhmEhjokEhs4K0cm$wLuY)R!KlK0{PvKkvmD-ZeA@V6eoBlf5>fg}xE7fpXc_M^n z0IIdeaHZ0@ehmm$0<`H#sIvHz2H00CXFODDOEy4cJwRLX9vr+6b&S^U`qz>QSSaH!M?xEUfh z0(6QW!^0y0N%6-F#GlViARXXU@Ha&Pe#gUa3}AKUwL%WB6=F)9%G(!dbUR`-yi&-) zl|n=ix)h1DlHJi%sE)1RFBXlHPMR#2)iTzh&q1h3C(VBVd1*Rd|8{k(EvFOdOI2~W z{UE4~4!6G$&+f_i;hh9guT5X6YB#=8l`?Gd^}0ias{{MP?;W6Bd#ra|fX#wIAwKls zYefS(%SZgTM0-7IHLgk!_Zs9~0KT7)OVE6X82SFUTctJ2|{XyBdG zBfKcwOnhF17l*a@3OZ**cv;8~f`eJpbD5l~itq@y&d!;U{_3!Q3Gf9GUK4ge-opns z_I3}8djek=g|AKSJ#Mh&oE_nPlDnhN=PZik`-e{<(at#$UZ*$kIOj%JSk{M`V(`z4 z!VlLQcAUjdhM8qojSN@p13uq;Rp9EJ#xAK*oxr)kan>CP(O1K>c6+2L6e#Olh5oZiZe#pl+WmW|*g z2AQ6XU^F!zn~mTIq9;TVWUfJJc+s8pNYG5;C)>QlsK8~R6kZE;Djv%y7883v4+H3A z{{opJj$?t_`xYRjk0B7C)%A-&3}ZTyDIiP+SglnCQLAUL`iq*jorKeIW{al%*wfOQ zp7FX-(?tj{pPJ5vIqEr2Yx)s{Z%NeZUl3yP8UzJky5e`r&Nu2SpneTt2k=xSN=@|7 z7yXBWIv!B8y@c8EU<-~02v3ptSEhKrH;Tc^9!FaVXk}4yfkavl!ax$Wd1ndnXb_Gh zQJZ&;5SM~*9-w#zY1+_rB2lZ~UWiwLa5(^F@if)nfaOXo>P0gw|Lqe{allizp%)|O z-{9)9-U{m504a+bTwNAp|87|$0Y!Tss1=RWdO%nJkg~YR)wSZUAlyNsPW{b7+zi6I zBx>_+7vfJKdmj9@fOn!^O<85Eu=}n)%LuYUVvOb3_v}4}(f|2|i+yn>b(HTtF}_}-Ui`SfSB2?iJ9eMW@a5erhwwjP|linXEQUmg7YUe zFUc1KXOHL?owbyI)ljKsp*JID+U|DDxXGYS1eA>(I+$VV=@HHcVJ<+-beovziJ7-R z;3hyeH`#Cek8*P-etLLAE~^p03;g^%3YDrYdM;w-XHIvT`3tB&0^~FBnKMX#2G%2X zfSCD()A&8c<+#*a2Z4bU`~b?CoBwKN=2md{waXcQBA$5~6Kml%TKR&p@H)OY{ZOaM)YU%akVjG3F;+Zi^HKsJ)1S+YB6FJs8<2Rh-)Gv%uBjTjCcY9YXHS} zn%aMRVigWr#jAbr@=}qR$2q!n zdkECO0;FCY=M15l-+=HXK+K#GnQ7|P31VjHGcb{mHnsoP#%7{kwFakgyE}=k+&E)d zEmFZu>;Wz6-mGQg9Q}Pg64b*0V%a!He_ziB;cS3dHa@b$uS&cs*-4Qd0I}$6yK&RL&DKr(8VEcJDBcQP%&Rw=S@a_~Eqo}wr1ky}XiM9u z%h-IqVr+t0`tKzuRp()vQ7X|Zb`4wi{Eg@-0K}%(n%MNZ*t8u4dH}Lt#iOC7aV{~6 z7Ho17#Xr)bEzG4ynpiXhDphZEnZ=?{TW z`5FXX0c6cAg6{vJnd04k&M2>IV&>;isouz%d7WL$jO+9~2GRgU?@O4$EdM<~7zPkC zZ)jpB7SB@XbO@XV$eQ`ke`@9#jPm>@W?lr9Y95?)$<6b{%#EOK07!10Z)-EZ1z{^d z%)GFPnM=gX&M#n850EwU5a|Aoa`Q!+Ijf181EErNE{e>YW$O<8iJ;B^NN&!uhccrs z2VogN%si=ynX|>r=OOSMAZum--T#r9x3RT5(3rUb?-t+U51>+Q%$j+im|6ZJI&grZ znG!~uIRu0{fS5U{iJ6nd%#$E63sC&9d9CkkX6E{qU+bvnHI})#i!pOLWNGTTP^o6M zigI%odwbT+r$BuIAZG4j4`XhA4#F0In7LaMGlz?r?Kh!|1}I)^%-k2c8|UU_e{SYe z%$Xj>%>TvSdq7E5Y;D7*`t+IZp6&@f%nXy6%#d>)GLj{WASfV6#t0}X2#5(0FG;{F zf{2I-F=19zP%vRYCFwO^42TF~*8h2GpE}di;Qik3UH|&N|6l8!wKnvAYS*s4cZE}@ z&N)?;kfo_jp;F~#8Z#UC^bFv9pp!xA4|8;A;L|gJr2rOz#LPxubK-wC^Qj>yGQ%}90$G~6A1c*Lo|zd^>6!0htpp@yW=Pv?3!phj%&Zw_W|o+F z0R*Ojvg*5L-UZ#&quKgDo4H^xEcyd4#X*SNaz8c-;hL%W z;}X(l&&vI(J)34jlv5X!zmb>s{i+`gPy?|}bUho+>#nP@IzIDsysq?p({SWJ1B6T^ zXCl*!r^u9r@jwQ`7bQFkkYTQ5nl}WQ*1Fc>wYT7C5Ust)%d}SMj`Sch+y}}pMEgRP zL6lGfGoHp}R^1`T@f}3^`yi~Ramf^mkF;r_Yg0?8W)W1+l_0Tcq0%$;-1iW8P(D{` zkwwqc)xZLM+8=f|U~C2>y*~(wS5s=13aK$*8$&6TQ!(pI6wgw+XI+mB3nbG=4C@Hj z*;Hg;MrJz4%QQkYXVpA{3=e|x4@s6mlrYYoE!KRD^!-$v=I8oSrh1At^>dvKLN$w^ z`qiHLeoD`(^WR6K0wL2>MyUNMn#-GBruM28ZR&{(-6T`rGmwb~=;$_vQdk;Gva!k{ z-Zxe)nQ1aIjF(JLGE=IX=>(ROEjLpSFH@@0SD+QhumqGpa;VPIjS^^>Y5EaPrdmo( ze%I0Op^4g9{CrQ7U+F2;HfVVUge_WTQ`c@WnTy%X_irSrLcIpPTL-4*2Uz|L+1t7ibVG6n5EeY@BGKy7(0i)&%Sd^u^>c*D^0(zfKF;{x+T{h$ zvBn{@AJu8zKQzy@t|UH%xSYOWo^P!tel`AaZf2sqm3XS>Ta|W=10^r{ z*>|d_&X2A22Gqvmm<@*aCl2V02SRrlJ{ZOZ`j)-X@R4wN82sIaPfhI32S}R?pKe7u zQ{WzKWslNB`a#;Y2(I@a&6H~%qzUg&G!N2*4=6Ta#}n&_{3kS2W9gEZl*9;8YB#);-Zn()mN&4VOseAR=rN3{J_57H!m z)q^w!EA~Me^UH%YR_QHBbswZf%!9PHsMP=yA2Erxl@w6AY2BvSvXjTuL~_dD(}q~e zJacm;u)*8!lz1{363LmR=ncu&B*28^Uy#SP>=Yz8_3if{WU@3>B{qb=OJ$ay8X${h z*GPd_3me-ATd9o`8ix+!M|4J8JXCEOp>2FLx2GIz3zzjrufU^Y9P}%x!Dum_l;WUY zVI$GoqhLF_Y-;oXQ@glqx*Q>Vn#*QIAL@$K-Y%OLeFST838%YkVRY3wUzx~Mz zFpfHw{dO+0PxJkP?0)7-+lxVBbixg(`RGW|OX?x@##;Q%h;Z~txT%1_!r27TWCStc z<^o37SJFH>8Wo$cq@Xpl_)1ztS78`RSXQe<=WQK5h8js&QPfJamC>%KhlG_b+bKF1 zmL;rq*>2Hm8NPqIY|m%{%~<2Ief7iJgtaa^AX*c{Tf!X$(sGAH@52a@aA(2Qx)z5; zdB>S>m&=aC%X%DD()}5#2@*2-53u&IxrV|{wSZX2Bx|!PNT-vByfStMxuPa8o0z|Q}y%Jz)Y8QpRWdH`F5Z@ zx9tR*s_7^+xwM3BXKf8d!EatMmdEIPH@@uXq2gwTsA8@1Qi;b;<9;`JsYhrIL)^NmZdHT&Il#K5Z$_i zmlg51Y2Crg3t7pgbqB93l-8XWJ)8**bBg-w)WYZ{7BII^>bW%f7*prFsTI+YMPL`W zsr93MFgOISEtD48Sa+1*^@Vd`4Eqh+Z*ZZT+B#Z6a2VnbQj3B|azFNqWT0gicG!WGq zor`Cg!F!{lP(O5j8I8ElWmWWDviG~JFZ%K@un)Mb9UVFX>}HqsM_ZG9&}E(Ibh2Bb zmuk%k(KCmGeaKA>MpK#ku*-&`Bgj7DvWd}2wCYip4M#VUeavMe(eboutIH-uU!zrz zyHkVI=#aC(KH;XON0+eNCtWrp+K#H8a@ox2Hl{x9vNfYSnfi>&W<}Stpl4k+JGzC! z&$(<)^c$A@yvycBZ3=I5*}Ujxs(Qg?^P@d!)r&4$5M4!oUvk-6(WOk??y`l^cbK}v zWs9QkQ`O5ZTO8d^;a6O?B>FC`+Uc^T(Tz;q<+5eb5zPCl%a%ts)5zCcwsy_ax^~4P zhRaq&&!wt2T((a1LJGg>vUPEd!4)aE+n0xqlA0C#AoK?t&}8P>=L%WTuUX!Hx7K~p z1@z>ATQ~mbVzLKa;b3$wZT-+?L(%WZe&h;Ar1AaBO-+ry&v1Y2YEFx0u-s4F)O2YR zpSo;@WglWmpZm^+iK(f`B=?_n)iPAoTP@>e^X2fmyrUyO`iKriirys z!vcKFsvUnVKA8&WF!Wa|x3L+`pOvh=-k;Bk{D8&?ctB_Egs_L;(3 zo0QCTP=?^}k#FD=lYFL^>;|VjlRq`dGreT~f-O_D4nCX>d~AgHaLW|Vb%4MVCPZ6e zQn(xvc-ExsHYp}Vd}0{*(5U<_KADg00tZcU5+ zb4&`?)By?aZIX5=53(6K>7MDqA3wQw@KZLSsJKd(&flAB~pX7 z_?C>z--D3_yxw=U0R&1wwe*_N)JTMLm@5HX3@T)q>{La3xn~^fF%@G=?!PfqsV*^A zy#QhLj%QVuNL^a>70^#WVpTV>s$w6WeSq?{Ro%p@_5j)u)TVV4)6N1g03@cJCZ^p3 zU@fSarm>G%B?pJ2@K3@~-AS-i9qe{F#&gK1&oQ-2F&*9o3R6TTGiR{-CE z3O*YK@ZaIcBQVmpq-U*5#$IfxL*XQr+3$d5bq5s>fW6-XC>xC*Y-RVsW`tX{wu+|% zVuLQb4L{iVcS;&;vx?U<5u<(a{rJH^6mP{3smE<#8^Gt;yktUWO1Xx_dm^Uxng65qMbTUZHyE@Li1!CTE2rL4X z4TT<>ccjX^ae!!E2%3xZ8+69J%aEeYn~xvHyrzg=16-HYc-K5eE^-B?QqZqfd*+P~ zH=%hy06hdMy;bsbV%>K85HHt&B!m;i#-#ujfr@{CLSDZMeb7o{O;ny7i4uNKlxB=t z)PGMSi+Um5MCJFyW-QkJ2;Y_oEqvbXSqA=(UE5J`K<)C8;SxC_1@ zAUoWjfOr+$Cs0Ck?%ZwHUuhL4!kO6ibPp|U<9ZvJhh{wA3g&zQaCA-MZJWeKY)?~x zjs}(Uj#0Hs%;rs?Z%H@tp;CO<4S^Rx1+&hEj`oQWUebL_x)c{cH!tPIUGRg`hOz

#t&X)e|1G>!n~(|UCG3k@q^}NA`WhweanUFxDZO&??RO>1oJ+3q5dvZ zX%!v^#JLdkAQrebZf9Fai)o&vp91(DIZ8*?(Mb(CTkZ+88>p7PjHf4NupTY~Z~-X4 zRYOQ-B<6DUav^{PAl+x(xQwn1XscOh+CK7g7a&$h|X;}c@A2+-*)Ne5gdwr>Qm0ip81O90c@kvRQ5_k+CLy_VVw2+EL8PhOP$JW- zCLw*bj(mZyf{`Ni&`j##Vt`XY`TZD>=HkoU0M>$Zym)iz{V1b)M)fghcO&gZwUCKy z?`{IjE24QvgVoJD0M&|0#Jr=yrtDsUFY!4hQpCJtLEVJU1UL{R<{b~}X0i~#0+44+ z7wC#LhHtrQtGplVaWJO=d+z>Vwqn

uM|xfF6M=^|@!x{$NL%a|Gx&p!{8Q;h>Zp z{Wq3dK~nP{3fKxj3sAvxy!L%0ARh4*ehlTDGl^+>44O_WzM&P@yFp2X5H0Bq4Qh3s z3Ci`suC(G-po>AJLv%X{4!jzEoB;4Ss6anbTo}yI>z+%7iB&g>0T&&ztSO*;{i*t* zU9Scv$!@9{R-f6TsEXl zGz+$+su4iX1eJClq4Nx<#MJ<1feJcMKTdPJ6`;Lj%T?k(PI6?B_CsP1Nc?Xl{)fMY zBuKX$&KKt+E30P)edfHl5Lxy7$ix6@R@EB`RTmO!;qX{rU(Vi0XilrJH$^@511)+kPL!jUh&~r1 zx|LcVj1%4Ai9VR12N|t(GDX+LiGJ^iuJc6es^8eIZ^79JjIa5ly=AqG*S93pr@eu1 zPf6R22m+8g?9r~uo(2$uLsQRq0*PR4qG7JZFCDP?ps`TKr#&N7H|ZB;UL|Z7_(g{J$4xC2CKcnQA@EBj#No$j3KmP zg`3mEYF1$FNQ)oJuWgKQjd!XK<>$kH zHM_{faJ-|3@>_r|29+*g?T&Xkv2s5F@GilF?91bwVFbq>#`q4BXit>D9tH3f!6R(n zlLV~y9sB|17cl!|0nY(2gb6g4lg2(U1wEHDaY9_m93>ET77>gKpO?58C!Un!GATx; zWpweFzq*TSpkGafnDoJ8{z|sS&w#!MD%Ce&$NasyGSmMEIy$Iy3T-^*KZ`ED2w*G0 zC)sL``KJ+V^*z3J2FdN?P?c|>hW7+T&W%EVyNOm*kEy8m(GKS^Nl#}6~#Hf5GASB zrN;RpasG9nFM`DRB5}U_IG#j<#Q7p|{z(825Y)~WiStc=gyST=epO7bmkIa>fS*7o*R*zsj#t&@Mz**e?m{K~*kQz`1BVS-fy8(Jz8$uOtSSfq~0$m z2_$YN+1=^p1OR6f)NUr(nEv2}S^!TF)b*BRPa;_PD;6X{rTWX!Bzr!=ivgSu65msd z@13M2r;3}mLtrULR&k;N{tVzdf_lj!O~5w4VI%;_8gQDe*MRLM&s-%dt!cKt0U8F0 zz95NZ4as^xfK8zMr$@l~bX%_s?*Z^CsCY6WqZfd-;RhQEH``)Vmvpkq-T}se<1!bU z$r_ns1v!Q+iotpUUQri1;+uH$w=Rr~_9R&Otz;^_7rF0aq&7Y_gkSu|B^yx|&0H7~Hy#(IT zrz>VYfb&68F`XoP@GrbZ0g{U8?9&y~8bCRyxERsV6>~X$uwwqGUDX8^0prjWMbz9b zP_`8qhpw_JtoVIkdQJIf{Lqy#=Smm36+blcGJfdlsi%H!iJFM|s!s>!K%dOx$JOx)=YG~YE0N|w2rxh(c5sL)b41=7>JOzGL?M4-4dy3>ahN>}wF0M`=K zcRsf$edqHefX6^`&$Lpdx%W)PEuoyZIK_kTgAawu&czQtH(H6(V3lfWl}!Z1HO%`2 z!ZNy5HU}72CZDgu3ReN+O%!TR-#}RnRcd2+)8F-mp77r316ZPDQ0}kvT6MlsRtl)> zbtE%_nRUIG6n+eh6=q^&rG_yMTRoegsVTkt$)lq%&qYZSlTB4%qG|ILy#KBDME!sB zo~XY`Hl|P2UJ>;-&%POuGl#gm9coSnB=i8tyb-F;^m`r6gxfyyOuvQ9gEvCWnSR2{ znZORVeH1>Zw|#W5?W6E=Ca{BTABC4QfgNo7D7>5r>|onR;pI$V2irbs8%yL&U|onR;Y;-vBM!EGT%+xiGl3m!`zYyhCa{BTABC4QfgNo7D7>5r>|onRDNoJ> zcChWEq|2GW4z_(1Ud{x@i+pZ*awf2&%$6r|Ca{BTA4Oiy1a`3PqwsPju!C(Mr93$k z*ul1sk}hWgJJ|M7csUc;!M2a$pPUKoVB1GYzff=c=wRDN;pI$V2irc1yqpQ_VB1Hg z^G(q(w|#W5?V|whnZORVeH6ew6WGDFj{>-70z26DQ2?Cj7ny*T!885XWJ0CRayxXf zt=mcy%eh4a(OA%Snp)0E!}}AlMWwUKu)#!ZRO+lYY$QA{5lU}0d}_EUdZqJE!>5NU z&{3S*44)PLn4YXLd|tRW#%1Sr!xzFz0&8u1AFMTRYu=-7g{8@NBFRdQ*_;w54_<`? zch8xW3cE$5OmVcN$M;3^dFn?)UkFsWtS`7J;PnB*hr2C?b~5 zUsi^C8`@M!+=0cTA&}V}mrtbBC8Gw^93g^jnC~i#xL1HOEtC(L!35PHE6dL&n4zXn zHYrZ&5-Oc7DfP+VdYI*B%(B%3gxBNz0yYfuw-F_%)d^UP*QTsjh}e3(!w0r@HBwO zDA}Kqn*{t8z#)SAB6*KWp}}c>WhH|0*n9ZrT}{-ZDsUY<$X||>{t)Q}vI;1}ZAEch zt=);|US+G!EM!?+1m;0ned$GDnW|s}?gDxTNUJ#!&}w2<^%4K|bhv)pE~`;UW-<>_ z>XXs&X9p`(y@9KbCH%*+Ksk2--j!qFR9~dS|FMpKmZPjx5Z?tyj!s(7z!DvePjxVc zAhj>3^aNZ!0bLRP^Cw9C5LgCv`3|naiy^TPWaYgMv2G|%@t?l@k){GXASnM3QZ_^8 zeo+1aFfZfBc4jJD4{jV}eFG3`oOck&e-6k2r0t{dLtu{L#}Nu!{~K-FoPQc^$072= z-)MWudC_Q#1kuAlr>ce5ov)0xQiv2&toF&a?RKo1{jJC2v>@#PY}gqlSe?8-i%HZZLWp6WVYVfok;9oF&dT3aEh`(s~tk5~+Uow1N zs1d5u-fsB9VAp;_EPIFHOM?RjceU)74PO!LjE(l~R}5c2IEZ1}Y52yWHZ`Dcm*Ja- zI*@s4Zf*`%`M$pA7>>t&qRg~Y@59}98kES zw*0p#PB0_-GpZ!{jLIafSI3$3I-7H36&7aLl>P6bA-WRy!m1co@reGyDx$xzis&z_ zBGtdJ`VDGKmZqu~v*<6ZBGtdJ;;Gun{KBdRF0Co<7goBNmslz87goahQ?7s&_`*uq zU<$9Q_`*uqNQ(P~m9VKP?iW_Vrl)YCnQ)pboR#8!VI`?~Def0m!WO2i!hnD;tb{F1 zalfzxW-fH7ZK2{IN)a#o;WXdiy0Jl6+9 zPh+=Ytd#3<%Mobivi_7U2yURI%LY@Lk!|a;k(An(fNk%xsVP^WZ3lX~EWULbher^B z-u4U>iZ*_chHtWiO?PlkKl*1B*^B4O|fV%d_DkSJJg%y34vY zTeDc$MDR+mjrX)+${lP;T; z(taG+XIwTfr7811@3QcDF&%ipK9?5KFgX5ls5j<|DYg3}Wv44?rSRr6AZH}7bADMH z?CWl7FeOw0_Dz?C<8MM0UhMZnkwb0C>4En`Td4Ls`tpINwlwJ%}ZG5w;>c+jNie?-S{^( zvJL+hMh@14Emq>wFeY$@vfqW8K;OXGD)bmMgg9mgMyuLnI1}Tb9T=m^Ijo>zgm{$; zoU6)NoUbG=#FwxFV^!^^HD4Iws2(^^mCLYR8RD=W7_Z95qZnUF`_NOP!B0@-yvy^I zbO=p9AN)jB&b|5Z(O;<1MDUYTIrm=lmGs28%86R$1t|VCh}6Uqu9aYA-il$ znWjPN(IA#cxXpWF7!?(`0lOrCael-K3*d%(EQ%^glo#&-xsXTP?I`_3# z;<$na;#{tewv8*O)Y=A$w(+8^2Q+o1wxY{eMjL2Dk^1jE!0NIj6RS1__1##tounn( zQQZm%Edk|51stNw7?gJaEkm^}s35xy>Cb>_9UlX*QVKo{;NJw_rDS{8w?r(PfvlpJ z#sdw-SkoG?N1rWXK19p;;`B-Uk|FBwXsa#wl zBn~6e;0c1- zsL=ujl2I_oDlTF)-p|X?_eaLA#!TJ=yYg~yOONF49R3yn9RSLEj}7UAyn&Qxk_y!% zy*{`vFN1^Gb^zN5>Mp-OPdAbi06r(ETh0LiCr6bv9wgQs6!1m>H-JiL563zEgY8BC zVE@5T%vG(T4>>fh&4YiaNLJ|W$fpKl8DB!WHqUKZxo6Snb$M-=rUur!kfX_ZDeo=h zc@-o^+$rE60DdEQEeEI#0;Z*5Z4`v!CnccxGpS_~iogFFY_Wsl%aEwv@rs{Rz4*!1 zi=Qe=ha=BGkQ6^nz$E}~Ca8-)U%-t3Hh`?62XF;a^-=IJ6wJb(1g!dCY9W5tuU>Hd zyuPu1HxzY;k>?AL6x>L_`ZbhQ7bFEY7O*pbjv%WD$DrZ^wA>_h2y3$}d;B)3|@pXKVNa6R(O1xdl53%CQoO9ZvYUkLaSfW08}o?l0!J_=C#k#yw^mRs_HXtc^m4H_Pm`zZZyjs9j0G5KRqVc?@^n%M= zGN;?G09KEC1^24%a(94jIa736g?O7w}2|7lYvP3Jw@)aJlpb zeDt#rU*H2*0X%LJm(y~~-4S~N+e2DzPo|-DUx9hCN*8@!AhxK$MGYC3S7Ou+N4n~TmlMRso1L$3<#awb>&;%)d$ap7YkrQh98j*F zf!~{rGqjO)V6Cm}!1rg@;%(k1NdFfIipTLe#p>UGR>xWm!Bfj zSTED%*3rVYrjPBQt~J;$FS(;Hr<@lw)mWOz+7 z-NW`b@)Vg^@lw*r?9*7%ugGwMnR3)eG_PUJsz%Euz!5B0k8cfYw&eJR=cPGnFaf)(46|Flmt0M3`D`RV%0URtvbZe%bI_kLoNv(H7bR9HOGqrO0Q$+91 z?BE(uuD)Ww8H}4K_9OF0@emd-q>2Y;wr3T$$WvAkNP6Dj%)V~V)0+sMk*TK}Un6}l z$f~Urn|4KJjcU`~v+^;}T;yr4$m~W#76ZK&B-7nGnf*E4eH*}QAU)7<<}QP6nHtE) z^GZItLpeosz=|u!EhYqqYBGfbfLoafUF9jJXs{{RFBhT*EGy1R7Zg8Q4&+HnSGz#o54G{LC|9UV0@>XoUQ=LAiLj zlUe#mbB7;?@Kjkfh|@6xqFALd71khKSJ;z4SAg<*(f0=F{i)>6Qe|BS5|bN=$-T;y zbs9*U%vG)b-Vd1f744l-qk5PpLABaZ%a}K#h8`?#0(t`|uZRQ2j2dUqyvG3CM^M{5 zvxZ&{Z0PcWaO(99acsB1L9E}*=A?CY1-XwU2eYU7m^P##b60;m@grUSSTBreaY zp=)UsfaRbHSxt@R1l$_j{IZN=93uAGMWl zG#qFb7sw}IuzIM_1hQQXJ+d4J`aMVj*{;R_YN%C#)&r72R@P`mus4A21a%-QYYb)} zX8^bel&b?-Sz|IKeM{VMb&zn~4uRW1+F-Uc42V^4Dpea7%hVvI`1BwNzsT6apsnLW z!!qA&KVKk*m&I%@yVI&SmxoY}8c<}s+?}Sq{1NEeAaQ7Sn)dQvb#OBYlB#_>O;_zT zb(J*_^xtd5UM`r|4WUpqJg~v3z%Hi(&pZ`4^;F=z81PiBd5*5I#3h|c9%z>z$?=)_J z@PH(c2ciQR$Poa}B&Y*=ZqX&E@Qdc!Lm>hrlq;cuIT?;2^;TFj{qv z>h;mn8(~cbl(&1F2KA7(1HiK&X#`!xtG@vJ0;+QXXN%pUnS4y^TQWq~KNnEyqYPdb zmkg1H!sVP!RhVx1Tp-myxL}OYh);NHtIIK)QTOBZQ!e{)QHBo=>NbXF{xaj){i*t@ zGZkoWka+e$Y7Z{YjA^2*&LFvZZcc5bpcEQivKK#S zX^9VIa_Ot2E`D(Ftz-y(4Cjw4@nb*cQ!w=%HnkqEsX+AK+0dxgc&7G9)ff7eKxc!* z)E=p$C^4)#)?q5XsX>pS%(3NslCM1#{oVBIyr6{xhx5Wv2;G=KqSu&(7Zp! zz`V~>s`rFXp+)s8H;*`9nvNKXfGdLr0Q7bR-K@x8^YQ*W?7nJ031gHHS8Jq_#2h z*W~(a$|Hde0oD42&HwjgJ;huK;2#7>^VaVV0q+KI7pP({6!PxnS-9*jV^sLB7wqjA ztg(xI5rd6%v0tjNlJ&rNi&L=)KX|j12_uc-EpB4n7;LL6*C7Ub&XpS!gKc-^#>Zf< zyKNb2+;i*ACA|L3xu1?n`P#utg2PjpJFvV*c( zgKE9WE_xtIujY&gFp}T|4l4%*d=S801h-N0LjivV@EyV7l>A7*jvetB4W!-YJnz9e zjPPK7gzI51#bK<80~&K{qDhtPj~eGOcd=TSBMC8L-RU}t$x&P5r^?aM&7o_%iChe+ zDMkxwW%3lbvofw$E`d+#H?LM!Ch2?nwLq7Fq*hiY=|@;U0{9A~-KF}ivBkzTvNv7a zZDgMOm(}HQy}~V8teK5DuC`}YG>bE{V<(t-qMm6y&60Fq7z=b1NX%@Or2E3n0OoU$aCc(nBw&>w~pw_E*Foj zJK~>Imp|F{CUkw)M7aJ_q;l)<)HkmG6w%8*ErHeriR(W_dUF_91Yj=6Gn22i zdS=Gd(1k7@Uqjbdmp|D|T|*r?D_I?9=KCmDt!iM*TpiK3zrO-K0TMG;NA&G)c~`7I zfTV{08PWaoY5-Rd)HQUQfX@SXoZvP#iZueNZs_v_bq(Dv;AntDL7wY_VT$K^ObtzO z@%S3Ly1M+yuA_!>)ERXBnwSkKdDH(AvdWU!HIcTwkm}X5`RC%t%sA2SJkgmEv(#8y z-82=Vz2X9T2fR_u8=8Rjis)6L9Y9|IY5N%Ns*A`MqoL*faP`*n8MS=sX?Z`aTTkw3 z_(T&V6O#ACqbYGYfb&7J*t0jRFaK`?c!QvR2)s|gKL8vds2@@97jR5>Weo@E8sNjW zx1kd?;G6CjYZ)eEEvBOZw)is`r0e2rz7<;3s7A)~>%zLTZv*-iNaobng>`2?0pJIa zSM9x#&8zmtrx*%#3;uus?-^HYeh(B|7wK}n?HSe=sLnv!gQVD=VSRxb3t$vTT5#{M zZo&Tmu#li`!F>dL9>9|Xbqnq*;CBEH5!5aCbOG~w;sYv>=Sl`l@m%@aQT<`I$ox20 zdP0x7!*eA+tUKfRKqrF4mHe>oj2i%~19`a}7dhF9HkyZNiTZvWc?Dvj`=nHY8FM6UcB(`z8 zKbH5#LUegtfKI?V6>Mq(v^-H?ZF72K=G{a|lNp1E0WN7Ihr=>My)uo=6{)xJF zF9bRclvl}dpnsyS-8TTd1kxd4ryP%Lv7M5BRuy+YhuJT&1sm@U&0nMsic4>1jQ%pD z$GFBo>w{!u|1#8zwK@nuKahL-64JLX7X!Eu;NWKf>o=cY&KY)&Az09Z#*Pau1QrXd1W z=IMBA1mxZ%iW>s}^dzX?k?9@M!{dzrt|O=)9QFIxYTU^GEpA)A7_ zLhb^vlAx}Tdj$Lwz^|Yfn+GZMhT3ZFXjpqqoV9raVeN;Wwbumo^T$p=D?wuIHNn#u zqH_V91B%f+P|x$(*rERlMq^-{{<+AYX0|lZ7#M8Dq2zv`>p-G^U{Jpl>KlYf6+m%( zusA*q-~^C3K16)n2;g>t+VL|4{0P8)P>gxn@f>v#N1MuEl7bWZk0aq7ut`S3%3up` zb~Bn+&<1g$uX~~mg3Y{e*1?V7Lm>rZE^*L(>7a+n2GY zTx`4T09iHF)ADjaSISJFlR>(xanKt9iP%ApE>&s%otj6*Y2HQ6q1MK}Q2{-!`~~zY zkW|O0fF4)Y4#DFOkTlLQ0o^$3oq^>$kT;}hW7stgyT<$%MnANbELO=g3Dw>12*v6P z&$wq2^abEjprb%y+%pOK0uUIAwIh%Wde0<`*La{oljS2h( z33^o63-ncx_;x{p9u>L`$Lm8NvG^jfcmsg-pqSQ;DJZORJ6|WxIMd<^eF7QOM_!?6 z3A(nw1-cg`g{CFw+P?TKygCb#Ler(tUjdvTsILtf5~jit_$D0`V~IP!uy3g&*nf^~ zxzo*fP74|cQPrWXar}s*2Y?wsF9L}TM;tu>tOT$ORN4>u%y4Vk69QXO8~Pu2^&i4> zRF?4=GN=bU{f|4k$9)3yJ&@>s-08sqtkpRC?`VQ>Z&^M8=`G zbx!qRV=qdQVPl~=OJN&yaK=p#W zT<*s^`a<;+&|@@>fu)O8o%`1!XsPRJ*?>3l_%dR~+0b&Qr=_lh`gEY3K^5B|#$jVA zB+Rh!CosBHrFkeX?l0j3vsnAqQFEtCW8X`D-Fn{#x(y^je#x&}@62;>r2G3tgP7Y0pD$auqGdvpx*}Aj!1=tJ)J9%{ROd=EUh=gbeC)Pk)ZBhovWg-VYM}Ikp~_lE-5f2oiVl#GP3HE&;_9 z>JA(EtVi3fK5V3PG-H8nSIsu&v#%YG+sv!2CwkmhHQTT`G1-M3++thDy)Zz{g}hYM zE}tIz-URxpF^w)(b#A`MkAusrYx$O1_Ip}x^65~QPQYpwNcU6@8@nK3h7EKOi!N1Z z?oIoK#%aD3`Bio&W8YApzM%gT=t_{+!%;^Oj*8K^>`yZL!(R5NPv3Wc26P`t`f$`Y zn0>g}L=5d9>BCXqSoYzo0n7qP#ntfXcDNtF9+0j$c31dR_0AM-O{(4v;43kaAPoB% zn}ad#Q!%o0gy-n~Z_loul^$?XCgD|J5Hh`36Pez0Gabb1_{_*mO*)%cys307x+6nN zkeK+E(k8wI;8oGIhnKvkTuuBcX+MaX#(SEcQo7ci$p{t*#nC^|h(G@*+T zovuu?udVK%1kqk`_WgtsRbR+UTkfUwpp!cVt4APRTQuLaxVowp+7F5oFZohBFN19$ zt3*SR#N{F&=Yc9lyO%$nGGN;A?ZD`c(P}w`cp_~b!bIBLw(b7&Ws8c-(o6{O>Mw3m z;V6f$|RzX7+I`0wm* zkcxb=zrhdqE@|TDgoQwQ=5f5kzh}w*0LL71{dsOb00W|*|QYCYYCKwutCBv;M4gJhAo<&rN7S! zR4^?g(WGT5e!vzOMzkJL1`8jXc?Y@jTB=TqN%6K+&?)Delyr9es((-%KQ;>tr{V=h z2q?eq3ydIoYYfVd^8#lP-4cUxQ-;7uqHhspv#M6YucMJZgz4XS>HGzc`=K|YFx-R& z22&stcSCUsv?>Vk3(&wI3N`VB_zPNIMKE%{z5o$$;+`O`gMfS>>LfOxVPT@|Bm5(Lz@p1!L>O{woDpf`X--#pQ`6~Ln)txsWqwo26m#{Jw-z8*ta z4*z(IcN)r*yQp(R1Ig?|&Rw9~=NSKULu1&I&4-2KLbW))jyfNo+JMj|IwB0EY7S)w zhcfjLuXVfX=X&Y~hfb&ZnaFlAvz96DX`-5THg~*@C+zd z2k77)JOW}jH-Bs3hq?&z62Lvd4pjX%&|RS1dTeTYg8J1noCs8^(lG9+$K#Z+%*Q+( zj|VHMqt*qu83yHke!kA4pM*e1x!TR{*Dy}Uc@S00Qj8%DgWAUxK$n2>{>40vg8I9Q zX8}Ayu!J5p4i09vtPAmaFG$w*ng%oI0O5GJ0Mv1Kewt(bQ`n#o+uK^q) zs24;x38*f^M?(Nn^eq^O%T<^mxx_8nw5D2+QheW8ioPV!okdRoIu?}2ji-=Df6Q?s zfNKcuW@Dco&>wTW1mIZ^^lzcxZR7O+h&0tUYV@}aoJRfaXJJ_vB>LM1^ruf_0E{50 z^|uS?F?=!r;`G0UG=w1?USPc{k_b1pST12>{=NYHgvSN9Ac& z-7By(1VXjL0$fHS&{d?LsudFArM5^vpAZms)L|U2h_j8-*>putl6Sn7)I6G!Thq^M|1iU1n6YaPQ=o*mNQIgP~ z4eJX4`#@qxnb>jK96S~SNx;h`Vv_)jC8z^lTfkKSmJ-wfuMqGR051^K0k0$A2>{=N zJm1E{KD3^y_2vH@@MCP4JMmO6wuKj61xHi41%v)Ve5a$YCj)_Y2Fa6(osPbqJP+U@ zkc`-`I(o#;nu{&2K>EVZ>8oemA7UMzy-EB%3GW9QL3g(H4skZMhCY>%X>97?=teLR z=rEAj)WOk>;2?mV1ob1g4$cH-n?4V17$nQ}9i0|v%GPD`@un9@tnVz=*SZ?lJCF>W zUF4bVX#hHcv?rW*??QOoILl{!RZe~?Nv@O4tMdGDQXbt8sIIyy4A666Ub*_3mt7t{ z7F#_tVTZcQ3&k;id$z;%KyLv_D31C2vK^iP@GVFj{L!zgr_BOfmO%2-Db5w6vTTCrsKHQ3o6 zB%xj>mRtp37AV$|_~wkz+{TtWJI7qL_;$MZ_HO{6fMN?hg>NfZ z?MLzaFt*yWu0z=yy|Rzmy4rgJZ4HvLkJ`H0w*uG%l3*XRb+xBlkEcZ-ud8{zav7Ay zR<|eN{XjgLHlrU|xg0Pg~Lo}liP6YTNql~ZoO zH-8}Ml@smeV=PSg7UHT866+_6^_e#+D-9&!oFb1zD*?0wdA(B3_0^+ae6PF=R#rI~ z(<_%rLd-)rT|1}fmF4O;UKjG>f-nshs1{g+mmuWXdg{Cy=uIFALY}Rs&W8bf1`^i_ z#I?qY@JI|K{jrv~HVD7~P;5(yZJw92I(FdkWo#2U4;j?Uo+Uecx{2HX^cs*@vcspF z$kPDs28kuF_;eE)a1*{22T723%HzwK04@Z@T5^guJD+X#t~i74Mm|-ZYeI9EPv1(t z2J{t>7<89Uzf5o#z*nHyVqzVBh5h~FIQ`+p(7)c(f3Z*Z_eMbLfkgksKKkR`igy1&hQ{M_W2f$2_Xa9pJ$g{tRL`wPwUx&rHi>M^t zQSc&Cu9h%Tuf)0ZF!ZTR+_H#EuP8lJeIMvMART*m(rcmwO%pf^SRAM6I5q9^G%Z#- z=2=TH-vEir{}7ie0kkCeCcRrC-dzG<8bLkVS}Ndr0Jjm;aabnc+W=l8sApTt1+;?o7{xXZ>IAX$C+FYc~p%8v!?E^YlQ)6oC%g$68r)e5Bz3geKRQm3E z3DBEB;(P~j{xJX#64cIj6zjhQ@FhX*d?x{Omnka)B+hphus48i1hw;B1e^un641#e z!}&7x2kWar+|&4@uvXSP8Yn$s)2k>^dRGu9nuisB5iL-9*n((e9n%YUe`L8_TRTqQl~is3tR9X|%fSctoE zOd_mraUJqmYun&CfYRr;-HMLI^V?cu+GzfIOgrgC0G04Gmg9UrC$j;P4UQ^TIrQ z#KGYs!WSm;@DXQ+;Y$;F_=tnUMk%x~sIDAC-`iVSz#KGYs!Z!}{@DT@xj|ks9 z%q;~R96lm^>o5-=ad7yE@Rea6KH}i;5#c+9dH9Hf!$*YgmdL|L92`C(e9tfsA93(z zhwyz9arlUX!$*W25FSVOaQKMuL&7|K#KGYs!Ve4c@DT@xj|e|9k%x~sIDAC-(cqg} z4h|m?ew-EI;Uf+XAK`H$epXo3p>_{~JLREv%aLFXwbOY5qfohff$C%1f|h?Ley8qd zjW@_7&cV*|`~8)bsXS8C*VdqTUW2`4gQ?vy1T;MPOj`yK-#(WOrtt&{ z-={7cN#h9=zC$jHz4@=_!1|-jLofVP9xe3!8fuH{K^hdX zeSMYP7ux((87jqhGofw)DCe0Ez9B}~3iHqh-&uzDhmX;)(S{F(`8?J)-tdv|fzjZn z8a_45gCBes8$LaJBO`g4;j_X#`oTBH@Oj~;%)h|!g;r!fL%mSh_t03Hh)CS5LU+(u zZQN2LY>6?e4DT0X))_t+-a%dNd3nAPM4~Uf-K=cBPT;4?P=)Ui6*?d7HoTBgddy_D z!iy>UoZY`^xa? z;j`FAelUDim@i29elvVtm@i29{64ph6o&bNgfGePrB>upR!xS_euU1@g&KDOQSF>` z#lCL-KEm8bZAWst-f_R3Q}0EjCa=JeWuT0vh!OJiqXeD{rT8}>@HKwmjZIFRrWTM_ z$>{u|DMvJ&2Xu_5DaX@P<6&z4#b4c;Mbt6K)A5U6Tk{OiCp;a$_>DC+4$+RiaXLPu z4$ip5j=iFz#w~b001}V(R_VBmcH9=Hqb(#=i$tU2HqkK|=y>Yb!ARcb??(wWFmo5p zxZSVoVkOd-fHL(L-)jZj3E)Lg%~@E9srILK`t7V0K#w8$C@AZCFu|4hQ~-oG6Z}0G z@UAp+RGg8ykWe3cMvf9A`vC0$O4mk?5+i2~)SEjN3V0mA_n?~GTeaGs>JOX0qM55^;XYnyl5y7pHieHln>eoMf&0lY#`+x)hG znYZH0Sy0WNPO=%toMhF&%|d4+cLZf6fEkJ(LqM>39OFDE&gMx-Q@?vQ&k>tf16=_U zo9B2o>pcqQiX|^2eH%z@o+sd60DdH>ZJsY+w|^?D1E^*Z46630p0(|)_CPN{@-$FZ zV=xQwV?GErFK3(^#o4?PX=)1wLTMX~#O7Ckz627R8&$WtiCA(R>ED6G=B5JHzYUvf zfyCx!0$v1Q3aDnElWaa8HctS08VU6~JcDDVoEJK4}g|k$eQCn?u5#IG_~7 z0BpupDM!7}0E~$XKqU+ntH=1dkkJ9) zNU?7yC8h(o5F{R#iXV3Z_$NW_ahZSz0DJ(d+5e>e*&ohL0s04$e*tBk1Ey>PR^CB$ zj^}3Or~xcD9OqniDxA|6g?*J|v~!%uWUHsxN4~|fNo;d#4V~%(2ukgKtLo6X3xN&; zrRy!xzE!O`RqS>bj&TL0ZxTi4@S^=0fOkQe8~IAXcPfR-FWrbwpg~x=#I+um%BN94 zUhMXkdGd(SU1UdA%bE*q`UkJi`p2t4Sc~i?@2LbjumAX}i4Q9ia;<$&H6^1R<@7RJ z{Z9KHjC1q=?9t~-h@%gRqq%qEtO}%vqYsLsEjGb)Pu}CJSUCZSqYsIr z#{nD!X-7FaZh$5KD@QqZ(EjlfpnvfCrGM~htADh^54c{!_P8|8^*`vkHf^bDN=CcR zX?wQ104mivuIr_E-K6wzTuuDQAW*Oi+zDplKR+|mmCAmZ znLa^EeaO^hrafRf<3~rGX$H6;jMo1o;)j~2oZpyf2~vhaW(YI!G{q_SF^QRKHboDi ztdIYsG1Ilm&gu+wF4E^v2L0xK%%OACEH@8NIpW5;tY7jKTP=LPkremr$ek134zVnP9J2I{A@H?NK^lI znouMFk$fcQQsfkxzIBEfP0b+Eq`IaoYC7y(VKntZa*w~!bj(?AG>wAD+0`{Qrl#Z0 z4x?!Xk}vriO}{$d8cjDs9G z2XP+(vP!+C@DJ)rRn9TWur1U^dKqO3PS%yFoZL)TS9{2`tFCJkb=6c(N6Jvw8Au=e zH@fnbGr{PZ2AL_%`Zv0oDyI+SsOvY#{8C+45HVNH zlyia6m9_=*YS5|LR~zN5G`i|QrZ(luJi7|1tF3ahO`Va}k?9zhZpLU_&I7mYA|ANS zO08YLNV9Tmb~z8+w)KJA)Fz4M!0mD#xNYkLw;3u)GzV^%^T2IeAGpmiQWDL9+vSvv^5Nf9-^;*?|kQ~ch-iwlNP?EP&BKbzFJWByV6u^7&ZF=Z$1GB{x%& zw+$k>IaYGBkyMmiLrG57MRHB7wf1;DEk`bm`5Q0G`m^13LJV-s5IDBUe-J+x#6ck=f2q@+moOlYO0^kQVsgzj3( zvT>>RS^X-p{36eLMqMh;d)`9dFn`moz^ug|;Lfh*`_KQw&wJ{?6lH~$JBNLt*D>Z{ z&E9g3_}oQfEBr<=){MV5ygxh;!EufnKA70G7vz61d?d`x>zreTPYs`jX}5FS@af^j zSh#Y2G<;V0<}&and{G7sU#EokVYcJ^WYP=6Q_{izZ1~dfYRdoOi>}e~72#{q;hbMh zdgJg$mj9dKn}@&80ROw;TZivt{y$84mErR+L392z>7BxlVfN?zW%zF42PkjZZh1Y! z(c0jZSyUeoeiiqxj?eHz!hOiwh94GwocaB>>)*)mU-aKG>7&EPE5Iiheq8tk$_Gq& z6T_F6f)ASX3lqBzM!Z9Y|G)CQr@nL84lTFM^PVHd825S4_lEbQEj2@9F?=ww3m>@r zVE9OQdp$UJ%zOu@{{`VfehnUTmyC8NM)aP&e>D8@@Dg z2>D+OUtvXBGy1=}PeABG)f12xz@735$VMc1Pe7O_HP6>QbUMb_=uUKLUoUqN){5Tl zfbHk9{%8xbLtHi(4dFWAJIiGw(bw7MN4solbY^|9<6SmAdJdYsZ>r1UENb4A_%62h zqj*1yPEGY)8rnb`5@^FLSJH~|)MMXVm-Rs zlahiENJ@r!24$%`<0kfPA&{8{7m(7HjGoxjl$xq5;YqkzV%3_W+Q^NL$2o%n!D}+6=Xc*7lEcFB_v-=2|>=LP}#Y+C5fa zzIp&-@4FgE>vk19e1JO0{QUJvFLYT2at1`!M0gN2?!ps`GVPr zXuL(K09nLJ4~$qvIj-dW9tf4CF8G26ZnH`n1N;Iv`mm0deAM)CC@WQOv!<`A-Yj{; zIR&y(Z&x+t?@sVD4O8&&eCYhDzIOVO)&FMUdBcTqqX% ziR+kue%=uhnFn|)?3*Q0_k1LhscB)}KP2`a7>^_JsMT~wBvz(4zBKQCiL3y81NLiw zQPY)qZ$&kIg~%6M*3_h$uF2aR)s+7*JA6DP!FN)%0jyCyB_qr(v)Bi<+Lw+dHc1 z9YoeitaGNO>r~Uzc~;90ur`WKU@m2v=+bC$|QBGVi* zx<%>Ie2b#N;F!@ZO4mmj3$Y_u3u_~55~P8k`Jh@87@Qq6gZaZ--MzDA_ts^ie7Vo3 z=b5eTDtAQwAp-XV*iE2aRFBN>D{uzDu~6&%)z07ZZBAPZaFxK{X9G@k;Aa3ILtdBv z30;@R@?4Wylj*T8Z-De@va9U6ynXCq)ul<5Zk0e%lf0AMDly0;?c%*vVuX|YK$4Y` z)I91WE1jg*?J_Zk@yR{}A< zI?5LnjAA7ge>uvR73`|~nkZixT*5Ul{)%6|k;Y;Tt%BW&j`-S$-zj*yj{Lu(d{fYY zOHTaXQNBm856+Cg8s+;0cd}fHzZT{D2Hm@pe?7|g4_@cCCH_W~9}tY;wjll=zr2_k zJk~HMxRhBS{$^zFp25%t@^3}?VZpd=a07bB-}cJ~TYf^I+m`q{e);Z} zpBbFqf&9Bs`8fri7?qWsChJQkku_gy~TFwYM@;Jzci-YFPwIKvOFqkrNbM8E<+ z(49y8zkd1tG!bt&-w)nV9Un##^AdsXE#e#e@+l^927tW$QPj$liQq8-A4kB`iC~q0 z|3$#_i9q)o@lTu~@rKojU@NvXQr-Uq-2!u=zvQ6y9oF` z5xg$NHu~kW&HSGd!HH}`$G?vxF3JlQ$=V+x;L^O{2*ykN#|T)I7pzhoZHjmgOy#YbAq2Ty~f@nj*<#)4Ttqld&-kw3Uq2Tz#gJ?s+(yj~rhm*wQn3orC{kk(^Wch|kyK zIrs4mvFpEBCG79y4-xhT!Ro)*QP@-D9}(7Wq_FP7ycIkS5cav1-9gwMU^_uxg}<3A zzJEo&uUod6kQP1OceR+}?LCN5;5Pj3LdhzwtNpXC^y5$GO7AYl;Z>L;jk+c$hHpjj zit0YJl<<_UuF*)$T;%Qicj6Rr+O(P`PWXyAcO*PGVee)M`zS~hBviI=cpkO%s#cMp ztZC4gX$!7fZk42QkW~_}O-8zK9U}QXtA!VkbSFa#buu)6hX`eHp(l!kIvJY3$Cjv9 zsFR`jqeC=08Cs~5q4^U-G&&h-DqI?=z}$L974o!_ zE=W9Xe_!EmDsglxv>I3sO-sMwol3NM;_w^rzGVVUOndJ%PWm!N)=aslzNGK zC4VZ51NN{ggEI=QhgmXZ1|JTyq&z4uoD~|DD1KZ8&JJCaUwkoxDp(L^lf{d~Jtu5F zDDJ21xrHB4J4ZT;7b<&6a-eex-78fRy9vE4z7^@BK4rnx1^Y3%lpH(hD8AAg+zN^k z#gip;ZP-p_$zju{^QO))TUFfYB)Ch$c3KtRe=^zYLM_@ApUt&DSQ=*Qil?cn8^Ua- z;uDm;F;JsiZ;D4NdrQGVmhDk8Y1R}zxE(sM4=T%p1@?R4^zK84dBL6W2T`%CPjG+1 z+Kk>0Wc2QJ0@XbjHdg60dnnAda+)m*v+YVIABj~DhpN<-Orh_VCsix&+;V-lo{SCW zl$YL(t^VMN_|ZURt%7F?1~Uh^Pgjf8fy63q}=Pgn8`7oPbe1epFA@pKU{HC~T z0@V{^cOYMbYy=r=u*geXA^zI<7c^L&^fhq>ZC#;sqmXDflq*GAwGMB5uiub!R#4F}=8&Xv97WZ_; z73a`;NyXo&v$P@~q^x2BHx=oM^~jf3v_**uFR=?k!RPUVQKFKl_0vg(l%E&Bwc4wz zoO0w;&o9rLh%C^Yd_l(?i;e{{3uppR)robaE6Zev?^i8FDSr8`S=je0Cr#(4bomNc zq{pd(Nymc}hR7Hp)6{V5KqChsM7`=`ajf4asnH)n|HgTK+roRZpaqg@o6dr2{HNsO zB+tT4oj3E@ShYWj$5!u=CHUUK=z@gWYwdp|`QJnF-y(4sMN}UA7&6*&EpBChG!!W; zm$de$sPOlp%+QR?21HuP!dAkNR=Tx+lcYC>(t1&w)d*vw7(axJiy}s=7icQ0n%4el zQt7);P6wf#N@kyi6?@DVsVYA*UpuSLe5FuC-PYQ#R6T!$^?V!2z_>(=UqVJ9SFu+5 zLpcqb*8WRWUeL9`{}-6wRqR#rMjOA+g#_Pt-hDMtpv*`5JxO=U_qUVuxJcR+Y3*;L zrhW~ZI#FC}&-85Vj}`alkh>_um8H}?gqjO~$#XS7EH1mrPMNl_2f|KGP5RQqUn{m0 z#yJVqS`<0wdvO#5&O_$FcK)pzgJ;KF)15B&f_cz6ER*=M4!hi=m>FSrRD%zI-UhWl zlKBy^&&RY9{F6OHsQs^K0l2F!6x{$iL$&>>YzOEVmJS^>HToCC3RIU@I}CWZ+RCu5 ziWM8H?wSmAQv}_Uf$oZ+l^N*a2zosOJsv_Gx26e&&UdifMsU49!VP4vpT)RiCUN%n$JpyvB-6Pgp63+pw5@@d7BesiN`zgRjP;FSB_X3JJ z*X|R!Hezkau*OCn+LVC~i=aZ9aupmMLG3fp@e$M~1DzT|9o39nyAP~CxmHZMcA8`6 za;-$<+AG8If9YBYX1lf^!I?QW@=ue4`(+)`Og@TpFC(HGE!GCaQgZGdpgTjR@PiDg z1QOQWs#x8rmi4_!C!!Hn<3#*@9i$<-gM;{0wMCFCJ5o;;tYXa%`({L%Ynu4yn$8Ht z6h*{hR!t2`t0wtVcWmwa$qZu7zq$b`w*H+YLmw)RqNqOBR)#JCy&B5IMqebHE4svr zB=Hp7#~{;Kc6vyttzdGqp$#FXL6D^$>TIDNhBvo#W2U8EuB8uY<^AlIj>^%}B_Z}F zmolzo{ub@crac2T(1p$ZnW2+>e}t3Vb(eX8CNcjp{4HBkG<<_dcK6jj4)7ZE zc&4RvtWdffNh^n`rKjPlrE{}dS_7t*?%J}YZ?alarCYQldt`bqtadiFb}gMpD`%^v z&0$O5XSEbiLM^qYl#6zCMWZz>|kKpqm#u1g~K%>zCIYMWs#_AOSux?UOR<_H>`f$oW*(HUr2 z2z8u7ee%_Du>Rz$6Jg3%mpEn%U->(F4d)^e+U&S8yFq6656!N;lzVKX7Rc-&Rgu~K z{SJznJ3()STqyPTduhqC2H-`3c3ti75AFl_4Zs%ychY>@-#_qNz)nx_!b7O`2wIsB zomn0Yu7S>LZ@~RG)bSX&8pb1#kfEAT=YVN&%?z<{!uaBm<_Y6eM519u9C)>70o(}b z&1`NM4|Bf!iB`T>OXtH?OaIJjX%U!O+OTCyW#NROXmZ1NF@jsPHw-}59l|u~+8gWI zYx5+B@u7|*;i|pvNJN&615=fVD1LJ9HtlHZESMB8?5n1*PnA+#61wxtW3*s)vjmlQyccFiif`4D z>DEYd6iM#R)@yhJ*%qUdcLZv5hBtR8YyTEwy+64X4|nZ;;)gaGn=1hyhcYwz2Q=Aa z3%6fwLf-&$J!EsL{C1bqX^X|m+7Qbzw$yaC-@4YZk-HaKblX#7yuyv(;3;-=p^O^G zR!8wt;No*zxLZLPJ+?(6iWfDa{u>`+VZ1~muQ^__wXt{+pnqRx+N*Kx9Y9;7vfIpJJ1-MU&D z7Gi%nI{vb~=Q8c}a_wDBTUTVacS(-+mW5c3(UIK}&hV_4GypzzWtzj=ZtD2*Wu_lD zI|;w9gB14lghz`p(H!trP+sikq%up?7K6Z6sT!biTlV1eI{VvoC-hdhOZIXeJ?Q%N z2;aKwfL$#}^Z4LAm%5}G4 z^i;SmS`WGb+L+<23718AH0os6m8em#t|o(Q2$8NCTOZ^=ZTI=WsM=Ji8_kEiYj8;6yqg-eIZztfrxm(@~&B1to9S^nK3bqVn0qHXZ=|%R*>y8oJ&Ga_0AwmLca{oAh(6cs0?y%=qZ%8rQ$R= zfAW-=^3=tSnZr|(&`R;VqdBWtLGc!tI@SgU;#*6M$PW3#-ltBYrci9lhr>b#8gnh&qJL33ITh@0RAD zEc4UELa%8PXTr5TwSNLW1UZ-V3tcj(=}6Dt&h~J>h504qoYdc(RPi*wDS|R_Rl|ch zcOe^6sleM7=2nn-Kt|5zIT>DzZvDB*Znj2VzRdBncORBJ$T~XfrkuIlYSpZ?IwRsR zMb7#Vi@HUVcRuQ=^_d>i=@z&6)Mj&+qQZr1)|FyG#;Ot3vg!aV8WmY3t@n2IW@~-C zgIa2>IgwR_8NJ0ler5t!eOHI|g|YSt{(UH{&n8t(zh=Cm@Rg9WWfUshzR2cehnwO? zohD092`!JVkuGj@>GONIjn_p?Mw+l^VX{AkVqI*U^r+P)?bU#nK@B$|p)FYI^!wmj zy{*vex~b155c?cpXa5$qyZlC1sUAM7;+IwF6PZdI+o{rxfM2T8dCir&2Nk(0?(O$g zl-K6dHSV9DYRhST4lzcJI*s$oTlsz$ri1nn`%oL%A&+?@cV$=1J@sA=uBYBlVte%O zwF_E4^$s6v{~sQHZ%5(05&Vf>eU|fa_vsRFkGm5yx6&h^5|znM+GcmWx?~l(WN$cL zas_|=WIz7KlAZV)Prl0EgqOHqnRfBZRo9=Nne&1*=@PulpFI63_=-PqoKdJ7KOUBE zyMn4Xwth$)2ivz*8e7ZlvHlM2^t4Z}mYOQ#SruB{p@fgrww>AHt zUE<5E=%2=8l`lW~vkJ^n->|6`T;TO%cALnI%zB$HKYdV7 z`-eD{-b5v-^){vbWf_$wSo41X{tCI~Czhz^x;@LY9;muPwM+_R@qXk-2)lU!*r7>v z{yg$0Lr%>prsi$rZ-H8WMvF}6&1y1XZlPuy_ZiN(O{My|hJw`}>U4gR($f1;s`8Iw zLUV51%XD53_zvWB-aAl8rk>+h43N`#nCaY){MN!u=Y34)iR2H4oX*2d=X1#~fLj0i z|E11teGNZ4Mj zqsMisYXB_Y+1+S$OaK@MxjLGxj&sPL4e@*TJ&1I#9UT)+`%j$grv2#Ww8(g$|AT42 z#jhLf$a0HmzbmqKqB%PFw4H$c`4i6l(Xpqw!jCaLd0{KqTb_NoQk?(O*(a;_Zlv;8 z@aGjMskWKIpWwgdGftYq6TPY>keR}*NDSMp2vhiXa0@hr=k=@>-aLgDXbR8UAwt6` zyg*ZU-X2?`UV*0YywM>VP2mNa!t*AEXf%bJ3TH+tFon-jvzo&5dsPe1p27>q&?AXL zk7p=e>fw`ki-AmR@aU58#FIEh2^ORLeT~1xcH${Hutbc!*ZE^7o|5~PUO>^3zGcb% z3R*KimFmP(a{r`tP=i;dsWEv#nDt9_;wd>M%*IM};wgDxn2nd}#8Yx?m`#*%)+c#T z(z>)Ezf>ollHcmrWPMEDL)rqI%31PNVsZKm4PYkn7r8@DHJSoifDAkFlrvwL&MJl6S@*LB;Yu$@>dl&*=R?MsJ;XN2143Y~aLJ`tY|RNgB2Ou_EV3oewN4L#wN>cms>xlHHj z#8dM5Fq>bh6Hmz(LN5lTI`NcT6Q~|L@uWevKN)KIDE8P+{`9{g72vpgL zrz$(~RAncgs_ev5m7RF1vJ+2LcH*hZPCQlFiKi+%@l<6eo~rD`Q`P)RoLgllo~rD` zQY-z^o-B&01 zYmjKK;_WRZk@iFQL(MX>oh^!j#!z~5Mp^^6eY12sTZ0B&Lb(oH-(0O$_1mhjovl@Z zh64Ww;>PbEiNLU%1{NR27?EMr`UlIUm)GR^vOoHF4XX`bKWFP8=Uw5P_Xpt5P=_f; zv-7g3rc?s^aQtg4sIKG0>4;uaQ&@`uv4z7rPMgH1O==3|v-rY!bL%-pw7ABGWa35N z`;jvB1lHmj`{lzFpz%;WTQ*B-Y$Cm#>@|Xp5>zOU)xAU@LiHTZTT)Xj=ryuy1kLvR z>uOvOulBv)1s&@7OKSoR_8vfWP(4fXr8Ox*my(?gb)2F2URqOfDb~anu0ORNGnUr0 zx{>Utmst=)4f4x(Yye!zYNL}sJihRgQ#*yb1bsGj-4yOZEa1lc?q&&BOyCR6AjM(< zkJ?qESo$VfSYtD&&!03mvxR&KYW+#RAs48lPg#`^u9-$BZow*CIFr5H;LdiO)Xs>U zyoE@N(v4ENH!4TX6Tcte$b5NI-m;O=0aQS(zft3Aev81Gf;atPc(Q}J{d5;ZH-IjI zEZWX+(e@1aryz@?v!gh=b8eabVC;nu*o$krTyVuG*Az7s`1L$qJ+j>(=jT%UkeMTqqVQt>!2F;cQvdA zTq$#oVQd}fMqq5=OjD>!XL*`U;-XGGk6wtLU6&^cXIB@)!sy0t~i(Ho-ax0naVN=Ek@v6sAriIY9+AiI!Zx3hd9YPf!6|D0BO8F>ms7< z+r$o3Kl@mY;XhYt3#+F99)o(?R><>}g<5xf1n@p&Bl~pB*7q=(!ea|}bC}jNUxgU6 zjLB&|RGfBlGc`i|Z5SZ_ZDnM7Nv(d_P0YkZ*s`iOu`3+9Ao_M zo_AI@!$q-%Cg+=Qgx9c#=jnTx(tmcU8GA6oN;I0;R_hf>XNvtR5~*k|_IZT0Qn6s? zW=>vt*hm}W{NXt7p@d%42VR!G*@_FgjG{4Z{eeJ`Bk)`I-~PSgSn{7vnN zg}2VlZ>}ZAnW2`osIlg=rLwF#l$u?a!|c9}8K1o>%NN6=5}jx`f!$%7s_n>#*F#Ee z-E8grh=HObA~V$YS4RxuZG_*?m5>K@u&D@a@_Y-krv*tFlrbetU#L9NT z*RdBi}9-}2WB&3 z1wS?0Iws;I{$l#kd1y^B-YV*&dxmd!sa!G-^0%Ld*;g8$Sexmyb(4U2bg^p6}&pF;MH@stNt* z@+}t&CGRj}4{e3~9h%yYDYwPK7|_vBw>?zmSO=a6FbAr)rxer63$^HY0N?_sO8NN0i{^IJR>I73+iHj}Jb!LSyN=H)Ppa|w!tYP5w=)d0 z%Dd?rekptW7eV!tSsKnRw}r_v^7ljLG+i=^Yn=70jSSn1Ij@();tRjfU6~rvlobx* z(AXn(F-MA=cu&i(&Pq)m9YWtqrM*2fs5pnbhOpRqq&+MgW_yqAdpJx(_T zJ{-icm<-2Zf7`|Lc5cS(`miT8xMk&ma4cMEh!p+8%r9yYDX-yr|C=_^va;9(MeTdM z$P02oQRaf;K!BYff`9`WE+*nk>=py%Q4HKT*L8VCxorj}-uJ!Ds)@L%EVl*bK%o9m z{p1-em8)DB91C!`frqljs46ekTI3#p8w5^sV7b6Q0DcxY^Jody2wu26VK;rP*}gG!DJ zOCBFC8QvjGtXe5FGb|iwYC)5cxN#>IflflbE1gbI`_TnTL4AKS-&HF^R)^Kj)T(0( zJ3cm!&LD+$Sc@7agr$B2=--ug6WD+6^Maf2=a<}cra!7(6qa|VZ34RibP43b^1igq zRqFv(LKc?yr){c=FI+yi;|#^={pmtCS1p*^b2}}iA4uD@b2S?q7eE%g52nKj?2Ne$ z-=Tq~oTY8U2-@tXoHL>b3Q$i|!LmqTIT2J1s5xhCGpHzFhUyPTLwbYbXp(Q(3rrJ- zzJh5{N)^2(1KP|nlf&x) zoIjVtzaMfFRZmv_PRDSixNxfDNXLy?oJ>^d%2vCM+<#hpE`&KUNKl}70v zTB`jNtkW-T{Z1{c`v6`1`#5CdZkHQf0Cnd)LKmppP4YlB_!+=|A>DrUOxt`}{}G!4khUIrrEOLnLUu6JQIDGZ-f8#DX5paB z{5KvGEEXQM0laW@)&Q1A=QzGy;p}XnmDI)LeB(5a-+Nj8To+2?Z}a~VVAO8@FG}bE zL9PAZ*Z0F-Sj-^OP@asA{ z)JUHG`G?doL?+|=+sl$lUj=wMuQZt)n!JWY>eanhk612iE?A z7UuT(ALf2QJ!bAX&fGbGGa+Z$`OdPd04|5jvI`>1W@aq=Pqs4JPqYdDnO!}#t>0Ap zyR>L~Ikov~I)-iU>e|l#gvA34H->jBvx~s~fcrvDp*@^J*8!XlnL>L;3QeuI@iDZl zz-s=K?GDJa)D%CT=Hwl1$g$X)nl(lgJeP-TmS3j6W^pSkuP)CpT@RVNJ8%V1g<8&Q z!p7Zt2wZEw;rEx8y6F1pZr*r7Fz$&i{?tz41bls|O~4lco)2}fhjcfT+T+l*0Cz*q zkP%2${*Zl!nnY+RZz+mfBVBlF#`jJXAmFP}b?UmX>IW+3E}Cc*yNb-C9~9 za4Nu9feo6=ZgcIv5AZfruZjK+S7pJM>_G{$HQ61dMJhcUa8Jlx67DFq?X+_N&JsA& z6}R20y8vzzXp6r)N^R1672qYP=XPh)_#LIT5taIivp`VKN2SpnrJdE#HUM3r`k9kV zrJj1&Js)5u)DYa`1t0e0$uHfM346Xe>otspqj_)I791_Cm%;gk4n6lzoTpXWAok8e z4wspR*uDI0luOlPhPg|XexMv)u-d`amF$fywq40y49oqH#mFkR4z?DcB}79;ab58@ z!;s!h*$f-^eTX0x+2v21(Qu^q{>IU7;=RWCU{Xwh9$j9EOT7ug|ER>pA1V1gY5ZnV`Fk~V4SxFdzGaKHd7FFaOpIS7JNMuFnum_`YZ>05OVq~a{9aj@CIc1Tp8&z)$SCo zDslVZ-|)&f$lat|U1FEhegJ);hFwA>uV6T5`hl6j>$N`|?Ys4wKtk8ahS?FL z?AC_MVQ3BhM#z|r@O5BXBYzfFJiDFOaC?X)Finlkwso^&@q!{h z2QvL%APpEU~A)XOf>Q!TB2fjV0+JSiKzJZh;5d@(oMyzqgT# z1YpA;oS+EPN2aqnkI_F3j>h;A8IIR*jiebRCx;l#G^_zrmtJF-_I9}>*xk=4yPx?2 zzQ)|WS@pEJ%awT{EEA2chAA*~tM+ar%y7Or#5QfwfC3~&@2Tn(E_cd%jg?@UY@$IM zs=^*67Z&-W)?WPLKV0kv@V>Wufg+(6kNCa1g;B7)*aq+vz)6scf=7z&0nqsXXFx;& zkH}XPTNJzs@PdJ0|17pBsQ#X36p)L8$BS+F?+MTsvM6|>c*`r$lf^dPR>OZ5a#8SP zu|>fj06z%y6$MWf+eL1dANUF$)bnbAE1fP!0Zf4`G*%W{Xk0{ofdnlyRu)@mtO0mh z;B6|ss@TSL^^a%`H5`Fw6dK2Njl64<520}l9EHZ|84kS!rb+jTEbMnM_2wOhX|#I{ zwRgDwc`<`!!bSVYd%;$b4PiAdnl!!_!%^)06mk@MYs1P~(Qi_&MeH^H1V6_Nu2=E+ zUlh3jXm=~GQA5$b*zEt*BMg8qi!1=n06Y

  • a@QY%%p3z-ocZ*|Yb*F0$u`Rhu}` z3c1eyuE;ujHo$1emf{k#+vypL}n7$kq=(7THqa zB=WO_*^=bPB6~b_E5OZ=TfF>OWcNqU0Q^&u+9vw3$W{vZKl4@_sNR-Gn~E%Q+5@zP z8U|p$7Ix#iTQ|FHA9jCqeqf~Cd5=LtYr7ed#J$|S&ji%X`+_X6*X4lrpyhfJ@6nAn z8JC`?v+fMBN3yV$U|J%+>T0n~8@EHW297QW-?iX`>&-XA%JS$iH_tbG2c(3mx5Afs4d21nuvruGHLcYVjf(XDh8Vjajs3x* zX-!*DS|Bl%>7_{iqhTaJdW#n*ns=mIeU01>+Gu{vh1uzVb0HVWkGn{|5#V~rJqdrp zMe<_+4@32bs`yG*d?Ucu0_}0;sv>)w+4>jXOG7T^pLQ|-H-LShjym}CjBAJ0K*Jie z(^mCz6w_p_TetOK3wC7}EX1_xD#rrFqhwBzx46|{E!XoDEWIeSbokX?a5*%Ic6%)hwEwkGEP%0Pyks+T!c9|u?l^_opxIu_)+{jwmcx`<>e{!@?wCCA-Co6NXi}>e+BS~z`2^bSEOv}X!wI4 zSU^1&$%+*z+eSGJ;8=lE9B6yLzXE(Muvl(gk*d7_;}7Hz{ZOcHYuK-#Ez zEM*tY$z;bv4Y%WL#mD=-t?%u(X71!tuhp>BJq_QG(9`hEPR3@Zl51HvbHT6T)=@Ko zJ?NfU#3mvP{i3FqF~Y~Mng~Y2&<>4$acs+moxO%BA$EYn;xk{Qx#@r!&{HGuO~89Y z$%AYv>&Z@|o1Wo%mH?!!JAn8xK!r z{OEY$e4}~d8#o$0g>b{=PlHFe%C-&;i_d%y!E!*^(KiCu12%<{LnCklU|&Ej)DO*6 zsR1~f%fxP>_?$@m{sf*3D?UFG@9Q;83bCb;;35R4h2XLXye8o_o*07Y9-ny~;a`-{ z*~xrGm@Kx3FmbQxZAIQ?seF6sVjUr%ad`nT<11cllwa=R>jA*Kpl-Hhc!e7kp8|XY zHEc~W8Mg%VQNlK;elN8BxS4=cA*a|M zg{H*40JlPJj*O*j3FGC(ydMP~!!VA!scQ(>&XC(FN~CPoJs#j#fg105u0QS~e+Sg? zG0I4Xe?l48+a=%|IFEASeI>);VvO3l#C{lJx-9eo`_s-`(=d5`htT5wSMdWhy#6FD z`r7z2i+6MuZvb2mIg1Ar+7zCjAM;{RJ&UDfg*I33K(-UqhcmIu3hfkb{R~d#lPS>@ zy&B$&Dsl|n@^GQeVgDolzOWgFrF5IoEy*vEAobqEg{6YdB|A?L{l2`gB#GDu zROjnKiCKR^f%SJX0EFEB>xBij|GG24_K;LuSYVc%K=wF6?2s=ku+zm4lf6q2KDxNT z&h^C#V%{%;^fd930=xDM1RDVL>WmH=FTMJN39l(n19)74i_2~|@>(Zo1j4?ST&Cy2 zPS06@$3cDU!TN*(3qgyhi3N5AxeVqdP-B0p&|sFch!3x+QrDjEgYe2tw7db`im0#f zvPOOg%o(czpNCwW{}fmwKLUIvP~rP?V2$lk81n`}4L4HN=qq^`YM584Vh^`_ZbeO>NWr z2B-H4fU_W{_svf4r2tn5l-{>Ez5h#oy)e4$*1*F0XR<#)4M$PC#?fw6-fRk2#S>v@ zPyFDPj0G@c<8dJa8yoKi8*A}M7-mfQhhlM5Xo}q5m-Sui6sBk;Z>EfPrtAc`J=DP_ zvi$;E=o|uY5ajF|1W$hWXK8t_P{gB{bDnQynv z{{T2op!RKN<=dFJkNjOw!wRa>-qean13R>)X>E1LF}*5@jKnN&P$OY+k7l+B{B&Gb z!}&-_rB|rTS0I`?6P-F60l$WvI+OBkgQu!E=A|LKi#*J!vm^O!poWX6O4qqvsYwmb zYU4FtA7YlTM1epGY@6@KlP)BSpkpcS%a_)f{qk)*T>|(IsM{Fz|91H{lRN})ALKf7 zhkP4k?*hCkkoj~+Cs$j-JPBF<4saH2Lw+l$VGK_!fD}nO$#STr?2yz8Jc%A#CE50Ulp4f-{hGYCj(A_y5(sm`8LmDvTbS1D}~&> z^Y?kyuO|W=1Gziz@AK^3#isx-NK%3NL!L#-4P`NJDI|M0<(Xd|CA$pjbw9f3&aYt& z3GHJ2E3}2MXxIRz!v!COnC6w=!8EV@9$|e67dayzi*&!(3WMYfJMv{GA6mgtH9ayM zuW^S^dJ9Rf>53CE`ti_D)z>q9LLZ~3ubm$A(-Y25ZPGC>A97Dyo^&p`1>j1k{?HjG zvX$gOuRP{$26TQ}<^0qauof~uJ?;GTF!_g|hD&KwPWdoY*p80rLf7~p92qIK?F@!p z{(5he+Slc|VKR;w)=<&1OCGfi-KBZ9le32EUxb|2*XP+L$j<;jKsHKla!S`%#JoDl zJ(jsC&o*Fo1lU%fJwmxDuUwB%js`ePpnCjfXUT2kZ-Tt0Gc|tp2sL{H?eDxnuZzQ> z+N5wdtb69!(rFXu*HAZm{5{m^u}x*n>ki>j&mZQn8RQQaW~T^-Io)0Ycue37O+CZ% z>^V}mDgcpPNcYLJ;deN|Ap)iFzE0t5$zKii+8nyRp&mWe2Zy7kyloHWj!yB>tyow=9cE9Ydj~kMP3xGKfa)i4z1unAW?b^O z31fLVC}9_+ZQC&TAm^UJ&OKKEoB}n}Ugze@y--6|tBWUv*!V2$<`A2ng{=hB6>Xuz zlJ@$Y2F*xzQ~qXH-G``I)loy`sJ~w2Rq5-YP zXD(8~=v?=uA-7Y+Ww)VWaR_c7f$TUm-VGQ%AdptJt=iOGQ};!ok3Qp$QkxFnW3?}f z%|{EJkJ@#Jd6iH%dtb=K&e?|m90)nbUFIBjDZm1#!J{r!^Q6f_^`GJ60Ff$ERpm!@;vfEY)9 ztT3B3PjCv(0yq|GSWf-&$yBP>cy-MO>lbp!*$1bsMF;WBsM@^?~CR2JwrpEU&Ot97~$H2??8#6u0&Nwrgun-s$p^4 zYrKT)d4k;4&KdL)zzdMqRIZwvP>UG!ny6W|zX!|L-oLGFy2fn{SYIFWs-X@O^;orA z+}3~>0Gtg;>z+=BRb-!lyx#SyyEY!~`%tgy*SOTf5tXP5?L_*&D$&$ePKt+ip3f_7 z0!maippEYEO`C+%W&+?asEcWn=d|%hsMf&Mn(7qu;!yo0e)JW@?S_3f@`E6+cc97i zt(ep8WLi>d(oMH+?x&`2#oA~e;&9{-g}NMi1UtHK#TvN6@so0|_pvf>by&qDimMt` zq4C^dvVPFEI@U%H$IqeonNWur`Z3??Sa*RB0^BR`P`)Y!xUG8N1Aw<7{p|SVnBA_F zH^#gosGcZ!Io4T^s0WkXNe~LHiCIS+N_HaTb>1k;R`Rm^F{mT8q>}Efok}ZXRd3VK z9Asxh?$Wt3Rx7J62e?$AskAcIB$e(1xDAp@t73NT{FUs_kk|PHb=X5Rwi^wpK{ckS z$u;(nYpiYOm{$Wi`yavx?B5+=7lGE;L$N+;Y!<-LkQ!U&8oP(=9fGj`Vds)p$-V-4 zov%|LTt@qSXj?j{eNCGkrs)avWwB~)O#O!JM#vd^S?5o zP(`Xlml;>dg|RACvIN;HAy>(Tu@1+e?^=M>s-*Wox&7FfyE>Osi7Hb?w&iTv92>LW z^Z$nY&rm(DWATrR*|oV>6I*MLx7Bdfa~R5~dc8ABb*Ubw%we&%ihw!D&V;Ov!`-VE zZX&-#b$A`~c;?_W?#W?rzp;wVV_y!3~4 znzzOKentTN|L=MW{y%@$Td{rL=g)6^8%UQ&Z+zRAwB8XDzVXdvGjDvGVcg6c-xgao z^TxNwEgQY@O+}+OzNrQG#y8dA-q6OeNH@Zno(klNxagN%O^A4lZ=Qmqk zwf)xmsQNcB%InGw0E`+H7qgW=+@9>&tIt}w1D~z^eyVTymi4Kn?U|BXb;CQUx^1Yg z3)Dt$yz_@|EzK5_Uj((iK$VP430p^gE!1xMVO(}b8P>fUYa58ytu5hEj=!60ZZkgu z$bW!~2rU10+H0dXNcp>MBY&L*I3IF4>^4w3+(-T{s3t)v6=-RaJy8nnv)>Z5_fM2+ zyrM+9-AaRM^iAsUU1MFgRbyq{xu=6_&3|16sWE?qGquaUDtZFkqakNjS2OFsEes`fT5W-0~Zc;k(cB65(KuKKXbEmF1tupXig1TnoJXYxtA=O>U}9KS4S# zUPcTC2?-YX#b}+VDE40?=LZStQ|MO#`r9V``Q!rnVmLGgtNo)fIyJRk+!|f+=L61x ziu9>Df4g$k>H9@btF``7?n~viuaF+TU))xbJ8%?%@w`r)9m`c~$!ets6iLI^sqs~) zv@h*G1Hb{2EA-#3qvi9@_R9GD!PA}3_ssHnExp^~!W6zzG<50z?E~C=JX5wMCh{lV zp74op)mnbZn=Vv;>>J#CQu9io3-}ZENci3Dq@af(eyWF2UO}tGQoo=hRu=9$(o5Xn zr!Q5R1}`X=oln)B^ZQjIpQNAd(swe!7QNApt zZ}TR;kMfl%eVaG&LzHio(pR$+e4E!?)6g!ZZ}TQLMf|#yzRjEXDavD#=CpJVA; z%q>l+vueoy67l<_^lje6uTj2l>Khg%iOo^Ie@frxP5c(MHz0Lbn*8q(e^5%_=1u$& z<#$WzliLX|9=5kj1tVv9~1nHm?H~_$hsxH^H}g9dN#%(zkgNe4Ez+7y0hnya~R| z+l#;~=#ls`UQorHORQ|=CBAlo#3=c#36?0IAioX466J%!T}CQcqI^;6>FzYNG0K;v zo+~2%eUz^(9618{AEJD#!l5$$$0*;faHwK>Q->9OXBq~!nrn-&hO$MFX=~0kS?k2 z#F#BPlaP&-{7m_{7cYg8-y=R8p{U5#{$dr;%Okv!O~fY+R4^>^w~e0;qpVM|Pr(s+ ztWIX_!1TLyksAtL`Zc;CxowzDq)%#3cKa|Jr0Z+R4hXYF>BYoxa_2BxmVR5@UBYZ- zx)$Yb~4Ngw+Z^4|BQSxZXZn^}NyxSlj?L{ocOI{$IC^>^LV>2m` zr&8r_5(5*G=aenNt7#o}OrF<4Y2qvWI+Jbkf?7F?x1*&?aANWwwel|SSxiqLIFk!& zA29B==|$bhUeaN)mF=J27$bXG$NMciAiXR7kh~(y4oc5Mv*eXwcDM9da^KZqcF%Oa z)VMax4og?4swH7|c)DgB*`>7_EwP5t={uMqk~h@4UL2GD2z8P-h1qdlMM9H%WunTz z6HTi12W&Y)6^ZM}#Mfbe@|KuGmV;E-)upU1=v6Q>iBFzCURR5-1H5$4fNT^8iS)MA z6hv_lqzkyv2T>dpSsd^<)#+B2)*3q)7G^8c<15Jy53{Y(bsT>QMu*vUUVKw4@(0G( zqElH@Fuve-X>$i7DVPundFe|C|KPANn@I02<&FrmK{`--e-E=o>A4kTj}5bB=>-y= z9%d`k?=W)*v%+kvbbGopm=k8(rC$>Fq%d2T?n;LRbHi*WFP`6-{Auy=s2JBz@Pj+b zWptjtkeSe*Fjj;6cvMc5wmUv+|raLP8ZTqLK-D&C9q}9eSJJW_{@I!kyH0PxEU;qW1I#yfFC#T!0=3gzV zYm|+k;P;O1dUJ+P$m{Y_kvJL~t9*Tevs!;ZPNRm3gx*Bj{nJ^-olH|@mb z>6ApFzW`ys#y?N_dCmD-29lo}oa;SDlJf#{sI3tD3@M{ zTo>t8**oTyL#9_(5?!F2dQr;s8i>FE$n+XTVgzJ*9YJCWl%>}k!od0K2B+64@K1tr z>4ivt{+e zYTjq?8pTTV;!lN**9yBqYO`EX+Ab^pf2JaS;Ty$&yV9)`|BZcOUTesOdaVofivi9R zXrbQ0h5BlM7oki@UCrF&T-3vb)CX|ihjO_Hk%N#o7yXFL_mH_LwH0Tup`0$Fl)0!5 zfm+C1v@MBkAal`PB=&@|x^5fRFHW!CPOn4Y9}MNv3z3bHUUQI{4!N!)aTAnNFG`tS zk0Y=GGQHN5cn>nYeju?C%F^qlj9vp>NEL3)+ymv(3z74XH-B|NrafeO^(C=2lv6KC znO;K?*aI@X#*-KanO-wU90z6Tbtp06{590+wE+HEP%ga?;ceGWuWOOH8Zy1^Cvh*7 zQ!h%HUe6)$3}kw}Lt-6ddVNdcYbYz!Poc`7hVVXu>$02P_rG%2$``r zk+=aeV^@$^4)N#$^2RcFw=~r2GW<;J`>>?>@}(`qSIe=;u3jIO*wxD)?yg%Ol~joL zFY0_5%2+!P&{_LsiCv90!u=M?Wi2AVN7e>?dC(4-we3l?g>qU;DYJHK1o}W`?H(kC zKxXYY5@R7YOl7V9Ii0?7Ivoe^SSXiHh+K>f)&plDa|UEOT}|RjD5p-8GM(;4;BLrt zdWOU*$aGpq;!TKu6^YaN+hyfE9R6$zhxe|G9R6&HO_%=gjBl@EneFUYRH?SH)VPCQyBiK zxV7y#q5;+bEe(tNaS?#pTX5e}Qlqik51=n(7r351Rb8LcD05C$bwlC%FK4Pd$5nSU z=#h}C?mSoBD)13c2b&F1D`N zzJH7p#(=MCRq;u2hqeLlcmNnCaBBvT|EU9~0UQI_f<+DQL<3B2b^uEu(U<*}5zSa< zVT0JM2xYuB-Oi-8$FuZ2o$CA*89g5_-bQ-f0(t}F^nB9k`EP(VkeU4!ty@CtCa+Bw z*?(GAz26|{PiMcx*?(GbU)5W^J-=XqT)n5edWQk*31tTV72MOg!GB({?LSY2dlZyw zpdoSq@;3NSLuM{y1MPAWmqIxQ8l`NY-GRVukPWmaNjwhOKzp6Ut5DXpymzZeuk)Q= zpTYkG%B2?~Uq^bycVO9#oawbSnLbcXy(ndR4MkuGWP1Ib#F3EcHIKxpP?lcLW%Rnp z>2(?WOQ2kOA#yhI=C8YvxfL?K-X-xilv6KCnO@%`@C{^oRqx0dCdl;aPNFN6rI%g{ z=lXF`v0Wes!5;|a(hHFe$eUjKAu|dxy^bPr1e8-RN||1B5jX`hy)GqjF=Tq(M&cGI z3|Fn?v*PxI(}>$+v*PwqME$2SaeJ&A59>kSfn3}k=i)Xsfa64vRo9z(y*8WYQQbaS z)pdjKYXrJsuurkgDkDMnf?RcfbJbk~un5WwgT?IcIroim-TElp6;LksAu=9$bKmR8 zyaJi~5<780gmSu%Qs%z42-HC4zMV+y2$}mvk{AwUb!$J&ae5u(^g0~=VNfo;5cx6E z>ttk3giNo6B>n;A)QeK4*Ubpr2$^30B=HDjdaWg~1`2yqt30pEu=%)u8{Drade=i* z*J)04%hqj*`|8s75yd`)Y9%!ZO0vW54C+^G%hq4u{sfspBaz@0fBfAa@)3Cs2biNv zdGuclnL(XM)I-jov6A)lcYIjN4B8%n?I1H~UlPM0Gw4tf6CoTeolb<7Wc1q3=`{!b zY{>MQj0A66=I>OoCld+Pm*{Xa(YdZtf#-T!&0W#e-L;TGQEB#u?aH0 zN_OV?C&VJ?LQ2T1&Q}9m=QqIX2$@b7!R2eN{Jj+N5z*`COsD?H^pmW%VD=%gH{^6$ zBw0^?uL(<;PLmLr0GUq5lb8jWPUn+27gC?^bS8b?DQn27&wtAFc_-KBOOajzwOAx~ zaeiF}=Rqh}03-4+wV4esA@c%cHmoP{9+WeHDP=bNfWSt`Y$zPWEh%I+bRf|l;$JsE zJ|81KFLIlDg7j}|xc+u^QS^RZG*HpIKj=uP?NNk0W%kuB>WKg|1^#r3f#auBei^{s zP-a5;nw0CiwClS~aDRYu*^S6O$eZ0ogJWJHWOjEX(E-Y7H>J$(ehBo1%fMKcSp@QOfjs4S}_g>GdOt z?;+DGwF|3cC`+#n_}=N&+UZpXzZS}+7b5RRdTo!)HjwFc1c@n7PQ55)dd)@PB*^qy zN@59QdMzXIAQaxtYV(%!wDuE&@GF4b{du|(SkWSUG!DkrN71vQXeUL_E7bG?oG$^KJ9B^q?;Mtp3EY^>q0EdqxK>5siSwOwp5Ni!jF}y$Ulc= zms7iU(T-Ak9_YzX`^no=W~(B5uy!-RVyN~a%3cp`q&YXH2Nl_x^c}eCAnTcnk>INl z{Jk9V5qSW4i>iTRMz>)(>~^!JUh zl<9RP0#`t$*WD!UgiNnhB%XrMOFDfAHQ;9Ful<}}Z^C~AGQHkGf-ey8cLU@j@?oUc zx5#`BnO=2!(gl#y>l4X(`ukN_%JkX}fo&ku>p&6*K&IC*B&I?v_J&cy;^%x4n%>5t zpu4^0cLni5gY7rPdZn#?e#RV_SHw%_eXsM=p?sF?E`K5G_3$U2P7Hm-n@1?_}AS(XC4+klEcBhyG0Iu zq;O9;xRE05p^SsCVxjIF{Dd>+Xt;leav6ijSme!^`N+(J%$O@kTn6PdhEitCoe10x znK4h1cmgtG-XQTB^d|?ebUJ+w?^7t3PKbOJ>E!Lp183w+rz$cPP)?mFWjb|3pb0Xa zb|$eCWIBx|F%sfm5C1b=cJC?7&xDOaek{&)v(!C>c44$x>a_WYUfrTE4yPi2XU;je z5qNdsUh0g0fSwIyI-?5`t~0K8hW`id>rgJk5&0h)SZ92J%x91p?*EPR#AI?BPAN0I z8lg(a4DU{&D`bWbA~6sO*TGt~FqLOLs%0u3uUY2o7DkSukl%@2N@wKRg+pcJNuV>J zjFCl1I3q7~My`VU6qL(IL{{SzGxAMj-hj-=FG+k3-Ti?w@`x5js^bsL*my+Y9f!Gopt!JkJ6!r{r`VM&&ID!; zf1GCF%>`SE>Vbq4-CQsrY{YJDHx~@k&51SgH%0&FElTRygDd%YfvskV{vQ4sng31; zQ9W01qVE*!<{Ck?uWEg{g{b!0o#@MvK8XHX{&~EGs5Zu(=;H^f$m$4S?PEkv~y=0q1})q1;Xo!>(A%#7&#Oszfr z3smdypm|p5ID!$hxo2)Lg>!DnFA@V|`*JH>$44GbEkoXMBsTZY8ulRmk1`sm6 z8p$+3rq>Q6`a@ZI=~ZxUQcgR){sw;^D3@M{Ohn%Nbp$e#Ak*s#5|=?a^`eyNbvFXH zL#EeS5^EsS>mw2$LRorkPft6&YMfrb!2b!#r57UlxTEP+x<5O{km=QlL_L&KFG`tS z+as_YWP0sOVi;t49ZF&%#PSL9bl{KmvpdP;?sBp;-k0Iq{&|h6J}x%rP;xeuiOu3| zBAd1?u)|^(z&#JjWfLMV;{&tldStGH%%+D)JOt&miBe|MY6M<{%%%@Wybqa8Ka%(! z%F_I%j9&enUa14vse^Lqg~(yZn_iuesfA3hQ6xq{IrXBH>2(wWQy|mpd=lqErq@yu zOQ0;hcEY1B1_nF5mcf4z%B2?~zeRezgv<+&>9wB3dr(fjC}n#6fWSt`^eP;~5*sqT zI*@1&<>-3mcHYg4l3^@Z{+Q-G3n(+JLu$t~~Uw#GL9iS43G&&K2+U3w;fj)XF?`@*(SU;LP~ z`>`kCJ`UyT3q;OA-eTl+WL|}=FFqsj36!%hC}n-|2LiuA))$ora!wMmzUWG#3zQWj z6Z=JaZE|`Igg*evr57R{kvF{#KxPDFdYwh$3@E2wlrp`pMc_)v^m>BCW02|f8i{{H zS$h4P(Q9+k_Dny8|34^~UWhyr>GeA@n<3MyVl1x;gL3LcDbuS7fzFWWwG)XQA=7Il ziQ!O|UJL1IH>To&>2)~#!=PMxAu1LZOukzvT2=?@@tA7rLKPvTi9r|Fb3)89qlZOBajj>I>RnVuZS zz73SsC7saRb;&I*RNBFB1Le{Skqwbv+al8&GQB2~m;~k2i&Cc7NeCPdnO@hDxEeCO z?k90C)Ur#o+8>O9*XL5$HoD}cT6D=XROLTBAnKA-(w5X;gMI|H|8zcOij%gW z9egmCUntX0eg7Z!z5`sZqFQ^;E?+;r=bV$AlX_A~LINQqqymXVgiw`85JEK+Nhm5M zlu!hf&`T&vXo5(+ARR9 zH=NLQDm*8{30;@Ka}ivEu4P->_G;Jsb2H*^f~!RrP=*6v==vIP9)=UTo`>f-xSDh! zmC*GoAiM!5boonx4JUMUz|+QnxF7%O=$fJFnt=E*aJA?H%6*ou#lTqvCv=?z&xvp~ z=|U=@>tZ0B4<~fp1JB)XLf2F9d>bx77oVTg<84<>*DHwsDO@eOfU+y_rM>pEL>u|In_YsJ+7VOL3TaYJm1KrMfYcs zUM-zv2iZ4rvc$a;ph9 z;EaM3y0(F523$?LkV@#<1qeIC30()la{!#sbv!(uhD*@32tBR&_WPQya}j?ITrIkQ zQUSiubt7=DffKr3gy(s0QokGE zxel&o{g6uP_W%&?gOmDw7oKO}q<*i#^D11T-5+&yU8dXp{~`VzxLR}p6MIk&X)9%*-UyYt`+kH|_ zj>x`)(8u6hyRVyL+kJ{|_i%rlio?~aA5fM7U+UKdoDMjt-voHZ!PTrEQc3;h0bvfD z)NfCCc88Pt9SYCK;S%jWW3HuZs;28?#IJ&@MHf*1YU#QRI2XVPT~EOCI9yG-kV@$K z2@rk=Cv*h|pxNMru1*$)U`C&Zb$HLX33n=FUU)pOfaAv~^U3Mj~rY zN9=02T5SWAm(iBeXIBB|QaEXwr{MWET+OyYDruWnf$&o}X`8~q=s-AWn_hUj;Szmz zx1+0G_t|8`PlT&Q7f_A`zRU! z2AAlwVF1Ji|9dFVs7E6hM)@NicBo)++iSU9VBgR|u~GJVSflnWQwuKh+NM=w7? z@h`!-4toZjubKH=z0*I`{9JHXW{v8xT<63mo!bkMBFdnYS9Fg-B1TB;6sJ+Fj^LSn<|$>t^<*o}Y=ILEu6U18)mLMowa1Q3S730>3SnFc3xeF&Zp!X@as-_i9|P1iES?+aIp zE}$F_d}*)afpZL;&~+0$UxKSi7g7mbUjxE}a6;G5;rSVy(DfI1-iE8<-TO364Ts~r z1FjZLKxqR12u%aP844#f?E%kja5ZT{Dxv8xARGcGG@S#_=ir2uN)h-{?{?s|!b!cy!ZRAKX1$S0>OC6>+rUY^cY|jaIH~s` z@EinZL=A1=(Ex|8Mgz>vG{EsdQ~Q3}VYk&_RFWmq~>W;qvvFE|nY5<^=fG-VjGjOhllLq)9JTJl3YyhN^2KYS? z-hz_`XkP*9;G_Y@!ZRAq9EQ{|m4+QGg=hrbd&BAG=!te9 zKfHi|rx+;a2tCnWY>p`_p<}|i=J+u3(#OIe^jyd})rgz_}Don&Vb@ zz5-XXIgm=4<1rvS3Mb9+51L%>P~>YE1PzO4VF2)GY!;zV5a(e*B9Hpm?fLs__5^#)24 z%9MI{1E&j4>OB#j32-&*jZ{+aZGkWkPU`&;c=m*odLItYp>X&&MlCuC)x9WF-IEck z7VTu~dr>Hg@?!|S2Ts@bqHqEGd&Dsy3{KbgqHs^v_bddQ#6U4|z9>A9MhGt>;0JKM zZ?nit!a61okHsbx13$)LcxfmvpiD*JW^nphh|5B;_*{m7eHbX_%WFf~eLf8VC&P*E zNVC_Gtkp+`TJ4fgY3oltiN!0P+D1>}GajsYAEox3OwHFJGxgD(ZO!L|BDG&b=nvp@ z&F6$4Vo&ezNu1Td>6*_8m$K$hBj7OxO3mklhq2}(K82Qt(>0$Lwn%aW%wwR`e10f* z=+8vJNeq-qZmTQ#4Fo(0=PD@*GAlU+glaWfD!PhaKFUFdEUV%7n2&&X2={R@&N|bf9%t*7z=!oGgyPS6KQu9gH-p6Bs4d=)TkSt49M<$G9jg7-t_qF17kM77W#qzv9OLYu+u&tzf&$7jj(Yx1C2i}+&ade5Y`L6 zHxB5S@FBNC^|3Z69zFP~^J=`CG~juc;ICTcUxPpUgT%|>ykiP@$;?yX2a%%lF~s!# z@^sIe0e1$>8CD^;XOT;!U)+wu{GZXjU14-EUVo4D1F}&e{4Pk2^!uife(f~!sYemBv!6`<4KoVjf$K##wOG208!=apw7s<3i<60ifz4Z@?E=m(R14#3elQiDfL z*&XHGfqKv-s{^*g5#FWEf|!GVx=c4pZs{@JTJaYATS)Td#XXR&;-7mifGY&3&n?~e z0Po5s*0|AMOsuOUNvD6%rvO~t{FxBl=YN4Q*Ol05ef}RN0=S{~Yls={A36!ZjlFLH z81V04#cr-^iC{SEUwbTouN21tn3!97)V|(rQp^IMD-#CkxI?BqXx4uA(st3cPT{sm;Q$10=IpL_ay zla$Bn$)rpChuIb1lr~=GRepo0MaL@EOw~gXJWfe&n3|FGNvgaz$_&*wq&Z2o5-6xY zNz7mZ6?G!gpP~xFQtIB-p0`>Rzl_XU)v1U%OSRva1H%qkdgu{e_*vC_3!ol#HljYS zN)G|(Q+edQMwdEVO#yJe1_snOP|yWByK(9Ow82HH)rMF#719cHWV0__^r@d{$*tIGgftJ5s-0`iRvHBuh3EkgEgD4;NX za2Eob31gahqyoAb5PTj#lJHe{5(x#=2_HaAGvVNIBA<;91JjuwD&X1O^TmQMr9J8h^4{2fw-kv74)A`f<7iV2TEE zs(&xfo2r`kMnpwXbDgG!j|9-@6&ZF1QkWtuH=soum*AUp$m1H!y-Ssze^fgfbRXSu zq532`;bS_cpgNG@zN(c;Dqg_Zs`5I5b~->^h^|mSg#TdO6L=m3z#&Q)HB?8TtdDD; zqCSo+musL^O$KnNDlmPIdKYO9v;6Zi(j2bQ2Gjunj?lnF^%Q_lXkeO}4B$u&%vN&% ztkA#$ugHGAHfL&__xkrjY`}nk?a)G=m5%X(I~lki0)wkisTQ)F>Bb*3<|+RC1<^zA z0fl&)xPy$9e+5%XZlL=wXxRKmFi7(gI{ygF{0T$wGq;i5Hf#jySG-ha@L73NUMN0c zEFWQbffm2Rx5d1Y|4T%cc@$D}KK`n;Pa~#b1-|F8)bGY;hcUsk>GAh~LsxqH_-`P{ zU$e5UoiEz&>oe^%ILxqkKlli5KflZZf;E3Vq5c4GnO|T*!J1VkcD#iW1_3DGTHTu0 zPAK5R^J|vm3bFN$J~~ z(t|Xm%aKzam7wZzFh)?bs2&%9cB&q4cVKtiC>dJic)z-aQC#Y+$}s}v7LCfWJN-uG zpud$W$1U(QXqDsR^lFuZp_Wk=HO3B>lOz%-9iwxZXsw|x1iVQ77GA4-GYGCEm&ixTQG^!Ek2I1 z;B=fR3#N9u z1(P`40<%r5Ta?hBPPcdkF;2H&nq^+u=oYM*)h!s~bPLXPPPZW7bPEw)R<~f9Myp$V z4w*UKg0EtCc39owYCul6xE+AgEtrGTEeJT>g4sFUg6~v2-Qs=#PPZVM(=EP@7^hp1 zQm0#dA2Ck1U>fKaeKzM~EJ$5m2YOlz8ii zcPg?VBP8$`6l%P05rtl|M~vbHzd?k|E9`k0mUz2}{61h|aIMuS#)BjBjM&yjViTX* zRkLcCilBgTWut9e1i#fb=y%!%0jF(XpD)%nmH}w=@(kni>4u!L(KcRVhDO_v8OdrJ zte4X^7~`}JCV{rWu(HuM&P3-}ZG(;Pw2fCJ7o%+uaM}g|r)@C3(>7T0aAmX&qB(7Y zfYUYzIBkP~(>4e!z{~C-bXR07HO_loqHQoBU^_IDi>1@N;Ccq`j=+HPXd{`>bn$;P z<`Mq<3ek1cHlS>fYwFH`SZfX1$%9R=0Rx}o!LVrhfp|edpZB>&EedbLPC~zk!gq}* zECgNwbD;O*P8_}KRd`N|#GzV1mUj9q%6v{1)2)vnRj^QXa!s7m%k!LGp6B%PJg1lE zIlVm3>E$`TAHwB1^5ycpm9jE0%kvUtWjKLr60byA8LkxnurRzPcm{zTT2@kf?$EN5 zpY`V%F&!&qn9X0qv73K1FIr(G@5!7{ECb8Xv-G*y&@Lrky)jy z3mIWn>58lL$gI*8SLu;ir5CYEkG3k`isY?cv-5O1(-qh0ky)oJuG1sCPOpe8 zjd=X;DGJl*s3!V7#f5rg7wXZ$2&#xMjV`$r99hIlJ-W16P>WcqM`o>F#9BQvi*?1t zdUSd52&PqBtVdS}P+#O?J-V`q^=?#)iDp*oimUbL>gN9f^Y$pN)}!l6?7lw5)p~S8 zFQ?1limUbL#@=QOngPYtdUSIgC$n*itM%wB#T@}mEONCT-6rKs0RWnB7n)}P0MTZ_ zuDD>2?rPcvY33^~*rU6fxH#Cp$OU_JuVk=5am5~)6}#e!J$kTo2`aa%;)*?btg<}_ z-BWSJ9z9-9zFnfYVvp>Ky~RjX)-Fh{*aNd-Uxh-$z^vE_6auqiCr}BJEB3&w*k3?q zt-+}%6f5?Hc}Ud(O4SG}_8kHB1ZKs)HvoKu67<*=dyrhQ2WG|2?8XIV#l9cXObpD5 z{U88S0<&T#+O)u|*pEfbjKHkeN$Kpstk_RR%>2Nt*qLU57mX3UPjet7M&xuFLSa%JwATuQJ7$gf4OaO?HtjHoUiWf}> zEHe&6C~H^fsvd<8wkugoxsGvtkVfh3(Pv5!0f=R(+MoV zH&;Q(e=ad$AiG2A~Ox4_YF;f#-%~SDvC3e*J+4kiW|bk5 zrr<>^25Q;!*tyGvA-^$K*$)W&)IIdI5>noZF;w@6*#N!>dDeYRfKXjX;86hz>RU)s z_jLg(Ncx9fvII9+&ENs$LLP_e}x1)B@)AgaCtz`yO?GSNCLr z1azw}oQ{}p6}}5#o;rr*e5d_)AbNp%oN1ma{0uQWsR05{OF4V$24o6p&`}yDp1_!Y z+2H?U;hfhno~eJRIO==LwsXZdl;9}-d;mXQh5=r{{{das{(f?K|#$-DT9Z^3-vTdv&+ZG`Dx3Fxb#Ej>z zr2njvx;-7@(KYIOYX{e(-wwv?^{nb8@>#C_RUe^4^#t7T8vanVvv0XM*xQB{`H?Dp zz4AjQ;uIYb1v}k~k31r73$Oel;y#4j?lg%$iA1t*iFp550J}s%5v#EfrW~ZuD>vqF zFxG(k)X5Zry4e3T6Y%}-@>Reh-`AmwNaY6eZF&|d$Q3BxFU&@lyu`NngLL`hpa74w zq00|P$@SdU{e$%Qg=o}s;Of!if2?PR-wWtYh8%V9;ohJ6i2oyiFTzb+zW-sK|K}EA zspez6zeuP44`O}=*L?8dM|}?LL(QxgnKz*w|oLT~SPloM_UhL6fD*$tuT<$?mtac|d(hcR6 z#~_RYh@Uq>Sg>Z-9J}Lapr3;%j=Jq*^d=I+VQP|lO}iq1R^Ul_y|y{&-_IvGJ@ z;LxsjNV_ftz#Xd1rOn<{cc8Q(sHpcTEc=_;WcReQ#kezb7F-`&>|PG4uLF9JA#AU& zG2~@H;8d@C7&2jNZHGKqT`ZQ$pF$X0YabK#DXB5E(kb8!X{;ueZCi-@h)oj_U|Z;D z!KdYmmj{n=bN(m0Vm!)@#Cd09X>dA(VjdrM1IFe!p;dZULFruurFRvS-c?X~S3&7r z1*LZ*l-|M!_1*>I{yY-pa0|nKu48}XijTq4ngBU+$&g!vAUc#O-(oHL$AgR(NJ!7W zAHG)c?FnC-_@05UoxT#f+f!Y2<&Pso4Mw?|YPGgTg%cnBz9b<-4I+6@FrQ~U;bvMKfi&KH5P^H4N}u9>M)URSVSYBnB7t_4g5 zbN5ydxZ##7h5;*NTBOv-39`RqWTjCWtrwllM*Axo4K?@j!*N0IA9=`A$BnD3 zUCG`oi5pk2E1|#H+LhGnjVs!f)F=8$J4y!McXesjn}Ya5O9Y)1l%DH0e8qlz#Z}saECku+#wGEcgRDa&mQtjBmw4- zhknl*kPr)pJZyJ!$b+fP7?22}KI9QJeaJ(vJLKV1#Bql_ zZzIMX@?3`)cgXV;0C&jqI{@yGr;I7X9`djld&om_?I90KbcZ~RNZ<~6`T*EN9;SAO zJWS#ac~${%1|-esPj|@kCSu$n57WelJgk{Ld8g znlBRXCgNfC^T-GZJO+gt?^&YIOZJFSyx>oWka>kYFT)bcA@ch~3qt~NJBnr_Q^64d zBkV!WDe&8a9Qxfs4gq(Nvj-xa*~oGLjb4Fa=K;wSX%BLqWrk)uN@g8;nY>n?qCJpj@M_m5P~adVJD+FJYlA4RM3D;hSy1$|<58tG zgNT~fN>z8*L=hR9vz>@%JJE!CPMQ%#WVBNJJz;cB@HzsUwTQfiUM(US>XoSEQp%KB zX5jS}qAwOHdVHSkMC@o)J%P@|8L!iFkUG z8{WMIveKtFxv7O~nJ{Xg=B8709r`q<_VyM zWNy9yT1e)$6+jEg+;#$JA(`7=fId&3-sDymc!yfVWbUXY`n8zM9i1aR5R+_seSDL< zq;M@Jyn}W$xxWu6(qh%zdRe55UBNwzOn1Q{bni zCCQxuKP@duq!yI9yP6gtffkgxyPL4S_qH!+OG~EKf-?7jB+-I0_h9KZq}PHn_gG~v zdQ}U`+~f7+Ni8UI-;{P<=GB>V8`jJUN)q4%0D6O@#@PEd{n(CC#I_M|NWHWfFVhTtWtf~K>AQsy2jC|M0BC>i4fC6ho< zGOW&=+kBb17(vMfc7l@Z=>#PKXYoM5Sv)Yk6O=632}+_lK}o;~N&-$$5^#c&zyf?R z8idfcMjAQq^@*TlK)`lrA*V{mc)_$g$e368(}bVs!;nLT54P?P z3Zob4U);u(V6+f^|HQ^q;jcW&aQ~#nMR|mA&)UDZMDc@b$mmu7vTjCTmK%;g(SI}H zTA%*bdf;B$$aBkJXToa`cU=RUv+bjRA1g)yj%)hbc$D+aLc}#_U;Dj4`pg#*qN~!M zLnft5>&fc(+tBbF7TsIprgaYN2Q-V);91n{(AVAJQf71F;eGTjNTu^-g^ zwuM0l0^FZLFMzn;$;`C^;Nc8<2gU!sg{6HK;OTI~c0>g(MyA7$-2YI|FDMbFR7b9Y z^NK4$KdXBaP;%HP!roaC{sL?BmBz@astnZWu@0x${= zt@+(Dn`H@rUEvyUM^@jJ&OZj=QE?;5G&Nq;MaI{P5`P^_Pvm>0+!_+qI^aPgv@hOEVpzSf&Qa%P_FE z;gFC`3s~FG-$`qm$KWxRsVC8^H8O^J18X1)_dDQwMc%%X-Of<4+W?>K}dC|yVPs5~IBZEB+0j-h2 zo`!(d$Y4)HKx<^Mry-y9(z010S~4E8hxv_=Md8UlT0+ag+7m`f6jK@I&{ zBZEN=@r*{MH!h+}3MWId>boz3s<$o#QEy$)t2Hv1)64~+H8Pmf5U^VpthLt2qN}9u zv_=MNn$s~3v_=MN8t(OJjSSW_w5!k>8LVl320&|Mu%_V_wbsaBO)~_5-MU~gcI$%V z+N}!`sWmc~(hNret&zc$W(okib-~nHBZDOklW2_$mNXbaMk9kI4F!(Y$Y4oBp41u{ zENPe~-nwATtVYHdr;%~z+-YP4oJK~#X=F^}G_o%tGpCV>ed-`qaB6Q$Wr#HL~|P1w}Iv~GE(X^G749xkueQ4GV)D@WfBhA79o2#6p-Ow@D&7_ zt&48@gR}7?X?U`lNF$(5^Iyb!hMbZY94eT^BvZvF?2sn+5fYZoQHmEGwX=Frm8W{nnkr8kj83Ct} z5m?|A*rhZ%l^W;09?{4ckg!1|Uw8={RL+>%29;EJLD~j2Z#1vvh$>mli^m5wH7`bB zHhT>v=8fh>e=jvJ|Jug!hz{ED(#Y1#Yd-=R+f22o ziS&N~;`&Uu=BdcImrP#5iIopGWGsvNqN-zAvk|ZbT+0!jz=y!UH{nls&5XYS{?Ebn zG52MV)r!^huTxELBewrQgnk#%JRls(m|-gr@)DpI;Lu~R4k@q_6$InEq||*{&p_B@ zgpJZ+@dXyI^(GTFw<>BxuB1~TmqZG0=3wTa^2bF>t29br!9N}+!iA-&iO==Wja>G@y4 zPq{(^h@h`{DgaB9T00YT*PRbi)l^aJapH72pe^cYckpMl@UP&)>3e(LmU8N}Czg@Z z;i6?LR(d-ZPXpEu0Y1r~6-VypEpE67LDTEdpK!V3kk>9n7IF>1FEHo~1nt@|7eS8$ zyaUejSqYwdqQBv&#;YxI@9!_0_4zed&^c&@n*zQD&fIHD5;7+s%80By^61RGxQw}cxEETZI z;mmeO8+)R~gjzNH-?$QOt}V?V0p>)De$Sq0k($s8+3w~<3kUN?EfmD}z7oA3(zz2Y z0#+?#jopbB3vnk}Cx%un#Fgj}P32CsZbyte(RvAhJJEUHuA+AJ|8{LT()5K~aYi89##yGWb zAS$|Cpk_nyb#i@v(uhvT?WW))bX~o+o)p>PAw$h)Iw(G)I#2= zc530B0Nh3$(VSZNb;LNekd!*LkT+GGTF5jDypViTVVQ&jwnf0+4FqJk7hZ=zqZW42 zAD)UIN%I`h<1_;5G&d9PZsJ{xEXW86JO%|C?`5LUOZJFSU~SCyCV#W%Wmw`wi|`B! zLq1R~iEZk}1-vg)cKhqZZ1nW7R^^ z?$koYIJJ;TDqhGis}`Pw4zL?_Y+$Drl0BVTNWiIu1e{vP^lqb$B|Ei{XihC8;M76_ zPAw$h)ItJK3)!V>kg?P_?+v0_7&0JaJ2a3}rDMDhc4l5kOZbp;Wdj+_bmJ3@xraYL zM|8J6(UM7n+FEXM-P^==yyEq8|0_49p3K$)8K|SU%is;32%(xAU-x?mz(&Ao?XEy* zoC~>leI4;f)_YzbT+_S2;Er{(+BvBh4cX>cWH3VVrWDngG#-TvzSzhjwngGu%;49E zC1IHiu)(LLa^F(BX>+cT%3&QIcR?0+;v_!(X36{Av=Iv)bG^!K+B8ze%2}G-xha@? zQrxX6JVwS(?A$zwKy#LM8ohewhM}HlM=!x+o-vV~o4*0BxpQ+PB4E&F?nyCOfoExE z=cZt8Lha9Rie~KGbdbNzO{fAlTi;!6H~PgA?A*9FOK=q`ezU~w+=OH{{bmVvZccY1I`L|WG|i^$+_2WQcW$^^uf22g z5MtcU4OilB=Z33qw{ydd7%QS#j1|!&*NSM;>vnENBZ1qw*$RLa(M(-?=jJ@5*Jo+i zxfzCDbvrlY$;{4;eYJ!&vm%-VI1$Zzl1@Yua3Y$36VXiLL^PMdPDFFBrqk`*To1^J zXzs!|5zQQ&h$i4fG_!LenwvFFMDv`^iD;rZ5zSS!6Vas9iD(|iIT6h?5Yglt*(@b2 zdolrM2idL(NQ)QVff&1ULw`uCQc1&ox3r(wzm_}WKSoe2{;i= zz=>$4cOsf4I}uGZC!z^B5lz5}XaY_|6Tn*~>{9MAN{!9VO~`SB+;qMS#NbKB{?amE1Uuy2$FapbsUm`!RvL|~wg~@eiq=Or%B^1Wg zpNO2Uc2P|44dMNV!gPtULRqbC2)GWel_!H!n9o~) zUV-aBlt)`#euZc~4Pa5Yp{qf#Kgh2eiL!?sN1)qpVX{ex9R*k44t-#E#Lk1pke9Qs zyguiuAA=ZH=cB2Zl}IxKF=G+4#>5TXM$y?v{bvC*6ZC_`TTi^C|Ho5g}UuTnB-|ls`I=S^7 zuEbX;^sR3^&qlu|x4zx;Y$5xkPHugNm)r!ND#2&8_be?1sYRt#3Th zb_CMuTifBICQ$K{x4!**S9^S??O9~j>YoZ;#jWr8m_$1J?WP1T z(f0UfBMR@deHcKWpS<<$PeDQUoi^Xx`et_H`~xr>;GMR;k!GTAZhi9#_!QsV`X<^m z-`x6MftVTo+SBBnHc~pJgyoyCQU|R(2;XpvHd%cjC#>}nn zq4bA5h|+H%BKJg^0zsYTW#YX~ylapJnIVD4AcM!30wgQ4NQ~lzQvu85BM;|TpJ#;&BG1fzDV9!t9 z`u2}PS$LgIZXo-~Ti?F9_09A>{=2A`eVxsJ8ENo38`BK<$y?uk^47OM8EAN&jcBv| zIRNlF8v$rM>{1$FOO5m1Fm6gLSGhY2WM8@Uox7{tRs^+j>pORMc}D>H)_3ln@}~jl zTi?0lt?%6ZW!6yN`p!Mj{4_Fqt5t4&uR@9e)hf5X&w+o8YL#2x^nXBkA&Cju2b~-x z!W5XX;SEdT2MGFC%;3?s7I(C^{im9J(@gNh%n4c z>`*3>+2Lr1Cq9{Ixco85Oc(9~9AReikrbjdOv@=#X!@eIJS|u!x3wz|9gSm5xvgDE z-qx-pZ);bQx3w$D+u9X#Tf4;D+Lh#O?aJc?wt~K`UHPT}`nGoE2>}L`c>l2SWPt?e z+uD_H6;1=7Z);b+)6NR$+uD_<3Kt?q-`1|!+uBlVrjS~W(zPa@z?e5l!L=67c_R|{ zq#r|Ya4i~JMw3`1dn0+98?QWbDnGm4E1XJwWbIiMFf?x^FYl(9I0q{Ea=6Mo4436o z8Qao`sSd6UcPy9BJqIBp0S$$#@B;9m<=YXo6~L)P!Y$>)>hDI#B0vk^Mol>f<$OY} zp!;i<)c+i+^N|$}!xf1AC|v!bEdU6@QvkmXhg-}mCE(8h{=k6!j_{5WIXs~W;~1{~ z$H?et3Hmy~TjAP=p5uAH_*{cmXn*rKnESs@-*|-G_*3`>4%+`%PhF*U#kGqr-d6ro z(^a5?7u_0hAG(gbI-waO4Q})_AhB&DtVlkI-<{P&Y$tvP_;Z0@|2)e6y%0DD*fZgp z4?q#bKAPCDyo+#=^;7uWMNLAU1BksJDG!H>vG71Mu+}UA7E|y6dThLo-2%w)#CSS4 z-1UQU1+ED%MbF9zV$-GEV=j&C68g`9a; z`~4mho1JbsEebMds|{1ai{Xz= z2_Fa4rcaBpCA~i&YfQ*Q)|fB{9?9N+gehUo`;RasWKw5JNWhsA5-_L5n{fXThJ;M$ z3<(K1LqY=1kdS~gBqZPr2?;nuLITc^kbpBJB+yrN{}G$f@%=|^MiUE$Hw*D+lkY#m zh;S#Qb4G*&>}hd)|1r8MuZc8Ia;?C?bX(DHBZ)I25j7w$iH@Uq;$*ZoIsMgQmiBl+8H zMH6sa(FEL9Gy%62O#r9G?9$cXRC8L~DMo}0c;ELQyOu(1so{zv!y81~KmRjzZz9J= z?%Yo1fb+U(0_dMn2ZJ&bK3c+i1P|g)Hl)_}{u#;e85d|@S~kwzALt?*uR$S{jh#Rq zjvPO_b@u!=&+Cl-nnAM>YhMlcXIfRsI{}ZPu#L2;l6L|)ms+bT5~}4Sb~)FF0cTZ3z*$uhFmiG=WN*^s{=KcLn9x~O5peGW5OD7V5YTcG zTbTshI{^gTI{^gTI{^gTI{^fooLsL}6|o>EH)K^MX!^*OUiVG_^e`hQv5QH-%E^>f z6_fn$T2-;cO|+_Fl1;U$VwzY^($d4qNya!i$vrhECkZ$?Nx;cTrg3tTwlYpmidB_+ zCt&?nRm{O1*%EL^w#?2Q+5R)Essgd9Vwo%|WLtzZTnPnaIBc#FXx|B-KM<=b#?g!_ zkw!pDR6{_;ZmelB@m%4E;fhLA-yMzf=sLte{hCyD3N2xGu8c z!&q_N3)i!JC^8!_k4OCo@QZN0+$U0-70IN(2mCv@!7NBklya6rsOoZt3_yy$jAHw= zMY^&_ji(v8+jAgBugKk(joh7q6pg6VTbOlmm{^znA4-h%$I{8b$$zK9a z{t|HVmq7JpH!XkNWw!=$YIr*MFnigp;oFRn3I3mP*-b9Eb#{_*AFo}9I=DpdY*xV^$+spvg`H;m(LBA$c(60&M(imS8LRNfDXmHZbM?Ud@FED-rCCeus@KPTAqwT$-A$Oe4FEFx> zL$n-z6ke~)mDsazmGSrqyfOA(QINFr32wr8aVuc?!~;Hu#AIVb`HTZTwRkKb`HX}4 z)S`UG!Q3mVHwHcY+(uvwdgzzWI2e1L;6jvP?RkRaw-$r;GZ~}5waBkHY*juDiSZE! zTJn^+6@4L`)BswBG3UXjHoV}J(~#19#34w2Y%w^OG3Fx_R{*1$IQjGqJ!|g(@{)mII<_XSb zA$K*6M1uLjc5I%zo3;R;zu|DNq+Ss46AspxCwLyC48}ZXqd|5J%tsgHhEcFLNijE! zg49PBtuYU4R@0d0dX(vmc?dXT9s;$Ed2T{x&X`AGBIq1%jd^l_oH0*3fQ>NbVRp`# zryFUUF;5==XUs!1XUsDZG0vEWlsaRc>4-PcPy* z9wrq&1vG*F=yUjyG+fCh(g>*2a2XsuLcEKSMFCVK@E9aVhF(N_AIXaB5u^fkPlg)xm;W1bIyZOe?<&qm_=aWrSbhmm$cP{Wg8^-8O{8h*I|(XN{4_x!IS zqQjcxoC2Uzm8Gk_=x`uJ%(Uehgm@JZq^*U@3@hba zovgLc4hXW=LNdSAv=(BFvle0!d?SKk)>?=guGU(JJ?N~3xb6+DwGe@dwH6}KYORHs zzP7ax(VVpqfr-{yh`=;!Ekt0pwH6|P5Mokxef57((*7Uib^SH{dVoe709n0nzIa z;^n@MUzKYBj-UG*euLb}_ziPcB0S2SfZts1Q2gd|58=0vt4C}x_jCA5xh?Tq&iw%) z6|Z9l)+e}Id3_yZ+$dOuN_Tu&yeP=4KNHw1)hQoD*}=EqSEn|T39*|`V0B>+WKi)Y z-H7Z|K|cwPx5sFCJreIIqY3$SXFaOq;J&F9nE5*zI7ZKPQAG5b-bR-B+hw@km5Ndq zBU*Pu)9FlqOCQt!AdM7{{icJ7bfX}tqAfo&sdRn`#pS-BKU2w%H)ty9^CDKO^Bm+7 zo)yUT!+8!td@^*S1qhU>V~LC9$n}~Uk-XS1n& zfj)02Ja|f5O@w(?1lA(7SbGpT3 zgI)Rr;`!$I%0$?Y;xM3UJm4g6{%yGxNxfM~Er7C)XlqGW*D~+s4i@zg(%uc%jh4Bk zNW`B2`XNIO^KKQDfB9bK) zo<7?&21C5zaO(cX-vK4hPsM)_dF=p~-xxSmDIuT*OI*WjT^veyZx){;(C z)v~5z#+k=3!I>h^)L}rXTjrf9j8b=)cjmAuNU_aE#Jhve{|`Z<2Cj?QD+8xZzc zq&o|)os{ukK!k&W{PzK0hKNhx^4|t<4Lny9pwjXcc)kqR%p|63s=C1IVbkzm_$U0V zi;AEme;&f_N78%YT&X!C9HUG979yU2lTyDA&-Vzh)StrhGF-aUM=={EI^JtvVM;Bu zgGsK5^2Y=IEt35P&XrhVJ@?4nSH5U_)sjBu>PbFi$BN9WL@rayr?(?#u;b^ z{TV^~IbJRg^+U8%X`N)>wGd0CygWn8BHRfq0e1pRz@5MnXw1vY^j7*=i5l4EtPPMgokqOU5nUK39HW7QVG{c#8N4*AE0G1 zQ{d+Vv?O;1{Ct3xM7k5$*is3rPO((V>j!9=y7s#ktB`&pUTSAC@dLC;OC`p*6WEQk zRAL%;0$XjVB$sAG>;SLdQi(aZ9bf`(2bkHp9pH7)x7`l#Kk}vadX~we;-}I>0U54e zYByI%x}Bwxqt_F5Z)u+GSp0&&#mH1GMCK zUPm#*wArpYou!g}fc6w1*-NwZyGyeK+@)DsVP-DPmKeqt%1x2>0owJx)Xr+S6Ijki z?gTdRQoDVC_9*nAy)?@Pc9&+~lw8ae5(4hhECF|Emg(K4S(fZhV2S2-fC;!AU;=Ij zn1I^>CV&TMt)-IG*gkjWER|ZXM42^TYH$52V{|vBUuy5Q?^sh|JqGTQ)d*enTec=}?gLJJ!v#=w zpT`g5j|1|3n7PMp=X;^vPH)ir=%L}k!opeCdgg+ZE7CE+tpb7cBqvI z=~P<+r%RoN-$80egmK^>|sgD4&Uo8R7P_+d3!_?CV zAFh6c-w|psLPn}TBX*QJ8khs>56EG(dK3OJ>S2VBRb${Er{)5GyxJMR6VyKV-Ao;h z--)Unv6IvZ@K08s#qZ{7EqoM29FPTQP@ zIrVc!&S{x5dX7J*YffoSc@8>TAFqV^uqFB?>a?nX`e^hxyeG9Y^Jr^$PnA!DMbqJ3 z-98eb`0yjYXcZQMzk*iqA3p~fHU@`-gz^}~6oTKX(mNoeb@}1PcmM{S0l+KVhB!b& z2!&o-A$VIAyP=0wR(O9=El(q~vV6Jsjw)S2^!5Tu4F0MD<|KF>7a{}ovq0T|5Ia89 z+FxS~l@9Yd82V&8R!wlFW!_N2Cw1US0JzeTM|cy6_%i@MhRYpxnD_IbX#mCNmM!yM zHC}ug?iWFsLkHr|10-(ge#UA*h}~Cn4x?xZp5iH8bc9fDcL#vDz7Q zQO?W89{>>v<+6^GvI4$)xl#oLa zRL87lb%ROaa>pFw-5yF+@=GwY@+8AQ1)VW642gFXa6SR&pAd(g1^5((-FK10yBF}S z47)21`zhcT8P>%yrSmKFU>(P>);Mei!Y0E7OP3yM@eT(3F*q;(AgJQyT%l@*ut2KL zM9e90LX`=-2Jn>(BUL8s>wxcN7^yO0zXkkDhLI{0)(R%9hZCwy*kr(C;Djm@wgm95 za9;jPpsEQhAyn<8>vkeyJ_#pOnXu~se}Q47%7ncH_$h{wDihW?7<~aJRGF|DfTu8w zZDqm^0=zezP-Vg{0lWszt2+Qx@l0w>*uZ9b2!a1avcfgAn#tN9Q3jv?aFjl~XJp%Y1hOt>q*e?M8m|?7d39IkJ_=S@S zn6O!Zw}iv1FQCf*K3MJYu)ra>FG80v1`~bA0B;%`h2F>`Fr2U4!S|-MV)=Op3Wx=x ze<{G}TQS1F-gyI0HK`HxE#;uTyMDJ^6E>k5*#N`6a(NpBf~HVyQ!bYmwoET?UEZp! zT0rUmK6KuLt(ZtW*!aq|BSa%C1VVnQ$3KOU@~3DrgLE&osB#3nNM}^8)5!oXY?+3= zhzbGM>UAZVfWgUR zvnoCk4nYtbLa5b2*hP;sCr<(Jrf5 z)1aV#p-nm|U8{vHDLN;c_D-hQ+|o`e@D8@EqRVn>%`9zGZINu0OmSPLas$QFT*Y?F z=~iW-Tcry~Q9ON0+$>wu--9-sQC7Rm85_<%X#1mD%eaA~S03s`rC#1)6pIWzu1 zlCnOTj&?}4946)@h1kMRCRo^_lkCW+>OPcg5D1ebr9{MaRTCs6GGH->#*E78v+MOx z#Jsz~`7=E=hI(p@^wgM(r^dXU=?ZqHE2bx?Qg&{vo;}kuBA#G$Qx9suey+C@c0+o$ zY|KuMm`&5OVY8hLTl8$$YG=bXJsaYArFg>PRNi5_0VOYNVWVLNO;0SGZ!nuWMo7(K zgR;RX{;(6R9-AnwCuY4~SBhjP=`_y`PUo4*aY$;y(9=(!!xsif;loHFuCJMjh8jkc zDx0ujcE-ReA~D;INN1gy3q~f}&SW&oRZEC5DRjj!*`}v_N9x8fXv~9QnpZ88YL?Ac zvs1ycQ_(VS$ue(Qvq>e*XLVUV!`7P~N#qhr%m&M6jbtz_`E%w^efmZBwWE)ts?D|@k!wH%|6%!1q!31PiC(TWNl4C^-GNaxE zYYes#&;nwv1~1y0vRO8|gQ0W<>0S+E-OhHf?Y+G1y@Kw&VzPPJJ0;sYW%Mf*Iq)Ls zr{3oDKaPHOw5u@#wEhOQEj#moIEM%=uA0f3Et9px9MP&dqAf|E<_IjalMK*NyRWNe zB56-OnBoa3J?gQQ68B7ZqQl;=2#CjBuDS!#bAQpaugrIB&T3(hp8IjyoSpmYY&+K1 zZj%Pxrj53Xo3dyLo=Xiy!_X~p>$Ls@T4xgkq+vqaCIGd{Zv~_au(J`Gkz8w;)U|4T zwwW8!t=d@Ks!g_4o3j#A1SQuGt$HxES&7-M8@eNrnIWh%$g#oZC~*{oGMiy=dg9}>HzbYcMhDURtX^7Xu+{e=51mRrv_@*H{ST{= znz;^-r@9d_BaKWjQY-+4c1IJ|8a4ql8g1H8I+ZeDOst@eO(@9Y9Fb_W%o1gMxNgS3GN>$9TwCwLox%K`e(; zlXTo*=EgqDp;)yiSbAuZ1<0$z;w2degwqc=B+SZcq|rH0uv>MGdJkS6F!<6Qh8#Oa zbQs5op*e{()-DFev910gi=KqUOZJkUu<~hDv0#`-NFwuC8R!DInZz9*)A5|`Q`}~i z5@{*sP?zR5+`i1p$Ob!`H^Nis!HRFw7ecNtgf(LA(sB&ww`^3UhL{DB<)6&7WL3*# z*V~yt8J1iOX)fYu9GqZ0%uaBUTP z<}TFinOVXo`j`Cno@&b`GIo-)WNNm2ms!XI&&@i-i?>Q;pl2u?Rb!&HOe}22EYj1n z-isLH7(1Ko`(SLX0z{g>-+K?rG=tEl=js2gX*anS&)xjg`jWf(Y<8iGb9-yLeKe=q zy(zn-+1S;fo`&r!tXT`63rNh;I&4Ii{YS={NqPoONR{Nye!4p{qX2q%+?_@zfj(}j zpz@{lW^DA^K&pEal2l=nKcSesk5N!Py;}`9-Umsm7*s*rU?x*8wPx@#C$Z|i*tD*yw@sT}11CG#vVh$eL!46*TVvM5xQMAV?H?a^)y&!I z2c7BI6jyUQ%(Vt5vRL)5p0v6RvW#FuLr)F9=#3dKbxy|oH@raFphW+->GITUW*16s zddqZos@Yqz%^uH%@ziBGqh{B~oDt8Ewb+XL6ORAc0bO=xwR;jthU-qVN@5-&o7=ul zrpTFFq1`|PRO-244tWv!Vg()F%gw17&<9W^i)pLYpv3Omb zo+Rqhlg!2~OWwzvkYW=(&11Vfrrxw+TRh;fnVN`3%$oWrZlkkT`Dy`9pvF%s&7 z+o#fAGIQy5Qd9aQDkH)50tKR*dTmBv+dZSU^$zp)bWEc2Fh{!yvw8|hk8RDfcEc3d zPFLhfm)UQuEye8si5EG^L1<&`GDlj)aAfj$GqHB)b2XBT9DgM@pt40^`^nB0jxR&8a?Q*p_skC-{L4Q&Y-kXDYGU!qJo+_Kp`a{FIqQI%7`h%1*Dy z(ntt5{c(Nl=KY>T|2u)e^C-JjTFt;itW3z*W@M5y{q(ot_v+&yhHzN(Q|To_v3c($wr_&p~BCZ|b5nt$8$Lw^?c|POCf1iYk1b z$F_#v{*8}BT^DD^H2cG@QIgY!RYj9w9qZ{&%yN$5FuOUwJHKZk$rF5MivdfFnv~fZ zxow)V*yI`h8RF=$p-^6u45XQZCPS{HWb535nSFlhF7YzU=q|~`W-1-w%H?z!o63!> z5ss@HNs2U=+nq<@l=si9)oUaxA7fj#XmV?Dk`$J)J(0{;nOrtJeY*LuD={BBUX52px=hUWP^7E)!-`sm#Lbc{6UF=E z*X?4fi# zi;;^kUD-ovYuJ&UG&6fX zeW%p1h=&<@)o`)OUd?Ufq`0S5W6Y7@rqqn&G(JwwJhXO`0TrP2pX(7lJ{&=HD6dnQ zjdfGH#HQl#(fTw^SY9QK>Qjvkma z&9c@)FWqFRwofaY$O=XsiC))o4_|lHw=in&LRjYG{$tEAI;pj~OtN@S4beyr!u09X zg!QgaZ0~0$PiBywDm4LVdtg-1p1vff&*52$j8YK`cWeH?zOzNEoQ$fGQ|2OuRzyZ8 z+gV1BZM#_4#h^(Cz7G~(??j(wXlv;q{Y1%cEj?U7DLt*1t0jNM8gB4-MGQCU)0|CB zmJA|I&q6Tmr!Cx@ET@U7I~dze>z0)hrGhecdb`zgI;_c5W~$d?p^9~Na6Hu`yTs)P z=4?+#qzO0ya-z>NcyDS#)jao}i>DfcB&DaOh9?dgZHXEE6gzKmOkx%!;k0)*I|t5! z343e_%_iPclWJ!s>)4bj8Ec361}y#3lTCuM|1j@Afq7#dNb$|z!@8L)ZMWN_9z7Z~ zqpwd{N%KHTekXY|jh11;cuQEAFjc+U>}x4apN+dhYDo+`3nzua7&Ah37>4~OE7$)f zYK5IkQ~RP+7dB!iD`tYk2-03MVODkuZma}b7FgfD zmz~zqhwqy0?4+Dz&#JotMw#tT4w9h>WgvMy&eb0|RxRQ(3~KU?ce*T#XI7P3;Y}?k zWic5uc4~63I-PqTEd5?u??2dZAjyq-Q_X6<7@!>1c-}R68>%tg#Hp&|xJp*S$?i-o z_ROYZOM2JB<*_j>6RX1{Rc!o- zKxV*Wp}{Q*X#||ZC$uI6u|-?#LW74Y4praKx0{2KTK9*QMka`weAR}aUJYP?^C&Q0 zD!nMhg{x&$~yPl9at@d$8BK$B(yR0@~I zgyGCQd7IX8IJ+N@za{cOrjs}vHt}-A28Tg4+vP3W*?T*7q*PtFO;(Zvq|OcQ+l6YNOo}4!q z6&#chC-Gr5u$>IC#^cuHESXd7^B$)7=T2zZZh}>{-Hu@I$kj#OVw?gxDz*#jIN7lu z6O&!_#zwZ+nq+eVS8uasMd`_|wVLbNEZ4Q0Y0`+54pW4TK5nLTrZ;HPCI##x!)z`= z=Khu5`>rx3(9;~|FwTsbosA4P)x5vY`H>nkSxV0opoM1`ae$tkoEpNmPu;G|> zmOXXJAWV!&(8%(JcqDANs%8?CD&YFpzsXjL-O&EWpHsSy!Q7!$O}^1$l^++#IdOew zm3A)5>=38-0Cfja`o^=Q4&x5Co6Ss@4Nj=1b}^f{6+>#UGvXGrnBSe>8Tcgd^_H|d zW6w_RW||xskJ3#!m9*yOwGSZe#GW~TOiZn;OnebtT0Aum)I5zeSK&Cxqgu=&)>uua zNhVh9nW!Ik%1rNiWjxu8G^FEL-MBmHjk(=&d@l~~#z6r2w0UBIoJ~Z|_lH{APJ_Ji zjpUa>#ee|QMt{h{LM_)LBRlZcTu$@~BzM^P^q4Fx^!&~fAl7R5qp+T`ZG( zlqQe;I3Gv4(dqRgLkJFtvz}o zj-Qni{eCbT9vWnMN*C@*NW&T>h`rFKC%66RnAOD~J{i|#r(8DL45=Wm z@TP)E@9fS`NhCMUbtD-PX>8;_g*WUPD7G?6bBoof6D)yuYqBg+iCIDm6k!((2i*+y z>HgR1cHIAbrbwzT=DzIi=C~`_jV*CEwx+ugFAgTH{N(}`wg<9Z)v3Fx%XXC+WcDbN zV@waEfIU9FKZ*xmXopMW2A#d_iP08sve<^ScURo-vj?w6B$hS1CdU@Zs2*B+5cqnK z7+!C1yn)zt z#{`bii3z%cjjEq`1g<9ARJT87C_6U{jhSj#nyH4TnQDZd8%CyAm!nv1J2wmfaB`V* z!)VQLVwM>RN)9RT|f@ft@0VYgZ)F+g$G8(=e7e zwiNCln1V8iA-W7EB8WLNfe2+Xmr6gZ!O6s_6 z-Y86&C1_NMx^WgQrzzHzJq{5meb)3e=bu>Z*F&LxeH9UDA`N9yrz9&!4eLppew`5> zz_*o;1M%Xkef`z)RzBvfLb~#@3#)baL@m?3P1QZF0wv!+T_uJ^m#u$d+2AN z;yJ#-P6v(Et<@B_R&#nJVwOry@Aeg_>}bOa;8cb>?DTHmfJ#VWD&I95JZ{}wJn3(Q z#+B~YoRt!`=OG)kO-_GKa}Z~RVm$YkY>US?8sqsz?=Ip_qn5KIOi$7Ev7E)R1o<;9 zAM{aiCa@{pGx{9>%=^OF+D1pKU7EQ~j#_eKJAV5XVp1y8NSAHcUqncM-6*IyoN%N-)Lp>C_@g7%mT>`T#UF6c^g0rx^vT+pq#pvQ87T@(wCYgXpoXMzKg{cn$9lieO4 z!|v7*TN~&n+O#kjO0E%uL@b_l(C~PG3)@JY<84n+L(bvlJ-gp&24U);hEr0^6u#3t z16@h1`KpBwB~z8S%IOiEmSOqo<}bv}kI$c3Cg+qYk5$?e!gK?sWfnd#8>i!BfvqC1 zu>-B#5HEANeUuH8rSGh+h2RPp4SK=WNV-w-PAlx8Yn@G61Fv@+ZTvbXJ*%!?-qq?Y z(ajBWG}|GGg;D^=ZwMm#?zH#Fh_yuP)T zUf$Fes&4*F?PWkBV4}PzOiYyjD{~;%8kru`y-S;^RPV-pMT03fvzl2gef(o4KbczG zLyXocJ2`_6w_-6l71mgJYnhqY?+U7T!FG3Y<(;0W;{6N90%k183`<#Bj+LiMtwCw^ zt#~=Ecf&Jl06aC5-TpA^@AN#|WR;3$@)Y!}^n}r>t4;0DF0W~aS2c&X>y@sow`8Sj z*4u9PjNeocJ*+E7+ZJPBx%r>FH!hJa{@S=Gi30`5!Ovt2^MIw!oDR(CRG@Lv?#&M8=zJnVyN2Hhn)L-e%C#y1gPH z8Jp?fUXe(KWyFfr4~Ezw*=J|$f8ki$*d@`%jiqInmdXbra z7)u3<7vm^>UCVT7Qc{~P^^_K|dXU-8dX5{t0WM9)nI0!hwkH$&-`1ohFK39l z7`ukR#)sYlw>!ejB)bQ0=f{d&#&Y=(i#{>X5g{AP;#y)i7U+CvJu%x@eiYHmvmtGD zWh<&jOuQ<^X16V0ni5+b_SCeD)nC8*Fl=S9(ZS6Su5Eb0TVt&0PZ?y?g+Z}!(!G<3 zPZ$#0k~n=r0k@01e#rN}{(zx_)4a+fDJYjt73j07KtJq|`t#*}eE4a4f1VowvNvuw zK|lic%|~HBCO&t<3l35#7unYjtwlfLAT(za=%*ZXR1-xHq;IEvVg^CES+jr12!nd|}&VSH|2_-^yym(_N-43R?`u9(!v!jMsx|hItD^ zW&>^;%uMe=X{ovms_Z6me254*1_a~C@^H2cRB-N`2{`GuRf|_J1Q(1<%NR2nOt6N*%&S*bLQP|g2_`aT zu%KyLW{{9&ObC`SU=1duLn)ZWA}khzdyx){A#E+vW)VVq5zNAb5QZ>>#V{;}Fd9MH z1oHo#eb2f3+;?8R(pNW(skL_f_uXG-pM5^=$Gi3F$aoW!f5)GybCfOMC2`~Z+V3Cf z?vLZear$O*`#LE#R0sYu_V7(FO|+kxe6`tO^uH$Dzm8KqSdV($!(LuECZ2raE4d*w z@B4CZmJMZm_#z8J9GlN7-bQz$lP~}D$JYZNe&vt8UO2uQdr>q}ZLPo$jMv9#_MgOARTuc4Xi4?Qi~giK>7%ngs^%Kg%cZ$iG*W$|AYELISC@~hOPY}i+wCse zH(azv>!UT&{%Azn*=l{Hiqf_{Sx?IPbWx|80_bO_y140&ai`T*Bh};_W)}pr9?%sn zs;<3h4#wPj(Ov)2QNnXYG(FL2I<9}AE$R6pH5|_l3`&E&;0c;S(70R08c%!KSqIh-PzTix0 zW`bcF&^^aiV^5111#tVHw-mq~##i72wY&+Yf7~kjOC?uY04C*j%?a}xgLw}iYA_!; z>7z;Yg5z6E4Wwwb+BXdUtfE~R%%_3tM5EP>|MR9fxGkmth+~Q-!qJkg7mZYR{EbEm z_q?K>Vw&HW6n1MKv=UsSe?6T4(D!RaDg!|K3j7=3HWSAJ$|85wn?kC4{P9CSNFHrL z7jC|~N0&~OHZNcI1*)T2M9ulg=H(rzh~{*L4ZR&wygB zENZ?k>6)VEJV}{X{n4(Ml;ZYhK$&+IHFrz8yQukrq)gg&G}h-`A{G`nacbcE7M6`C z*7u3Dynx+-odF&ZEvl~T%)vYsN8vjnoxgy0YjMEPQtwQ`St6{#4JHOQ)?)Bl z6K@l2uf^a!CI;@U#o*&6-XnOr7K5*v7I%J7W z1B-*zEHEYtp%+DCH-#rRd={VQyGfe#wL3VgVhTLk+}oVP_P0AMD0=GNFB1fwZ{Se@#^ z7%~i4aV8Pm{CdF2!EY9zoj8X|GqCZT#&db_oB>uu&w7e*e2S^t{j$E_S;a&(Qr;xg zaJ5_|9|cKDE32`2PfeT9&9uEq=w{j{Ntn&F5kFYSqoO(~{6_KqQ6Y z3=#7HB&6n0jO?e!BT_vUOt)6x_l;ixKK~zw>9HDo!T1&62erKEf8>ZZF0FD09ti9P z;9-*jgy>WoVx%y-dNkNSx6G^utk(@GX`0s*)DM}gPF`sN3lCq)_<;98lun;Nsj=9yqK1(?l+01*c*Uc7!3 zyn29nrAf-A7(dTT^@1o|ehI%G5|{x_7U`Pura2gM&-OzL@S&XcigXV(F1uqyVwVZ@ zR~fJy1s556iQrOW%{l%igX5(btu|M`Fb7AQqt*2~I!)ZBq>CP)F1>0$RWCYe0!NQ* zp?XJnT*+M-#x5M8)=ynEM{gFZL1_R2*P7VI5lT#k`s=>2o*4pkvNnXJvkC!_ey#Co zESGqN=*a4tYRPB6vV4vMs&-`cZ4*RmZf2wP5wbpQRkA%owmOWKInv1&LnnK{OQIvH z?^LIrFbDgxX{Ulx6>xtbQZ0!+Y$+Lc3Y5^^YizFBsYt) z6UK@pOndMa4gC!wh81LI6W_W?#%hO10|wk1*bM;oad3Ewo)1prH`VyfW_}t5e{ml7 zPW>@-Xpy}W*SkdO3$RNR_D&c}CGDN>Y0|zgqB|fL)8exSli2JNsWSj3u?IdA_62*) zWe>c>FIprCVb_GPlXKuYk@h0syukJ@5OhW44qhC@)4&yh?OiFjN`wWtC5Wei9f9rL zDuA#6cLnh@a9?24Q)sgMP&wTn#4`Y0I=cSwQG>Fi+Wxg{U>=bEaWe-ncl&v#I!1yO zqV~Wr4~@6xcanE&mdm;$g1gI5ni<2M!4 z2#aW@y|Z{?5oS?IK(-uFpZ41{94n5Osms&5gIsKF6%|3Izg?s1a1)N@gzVH&9@lK%u|NdOfpF~KzbV{3Dc>WYm|pYloX^-;#*f5SUo0E@qo$D z_6&f1oa=rL`EBtLxx6Q09)TZ=v=ss)AyRL#U`&JsxHO2Tf#U+33N=y@VV|hIo;wx6 zh~(yCBW#Nkj(TA;p% z0DcsF+4u>ND?j9M^6u1_+%Ccod@OuOnO`kN+xd_<4~sNufu}^Va_q_+KVxd(m6n?0 zH%$%fZK*l_)YQO)a`eGDULHPB?E)va)Eu8~YG8d!&2iV%z@;rU$D2$IY-y=E-fn8( zj+UC^drS>H)>6lczOz)1jzo+Cc$!97e88^p(KI0TkNi2RJq2JA3euWl*kbygNcXWo zGPO-ITU?l45~5B6$y8^oY;kqw`3dP?6oPbtOGS&S%_DO#SKGnp9L$Y&uy_vUHai%b zgL&8vmdwFCVF%-LFwfY*(Q_~_*}=pd%qwop4`AZ1xG=(ERj`->%;Lg!jFrKn z2bhIBk64W3g2gmo7U`r?55|aY&D!IlW+vsZJNV854~Q03-x-;MdB_e%=V0oC#r|L{ z96VxXOXgsnwuA9Gn3wF}=sB3T?OWq`Cv2#T1#uM&y){zS7`9%%VjkRWJ=7aRoq6X<^QU1DWl+t?s@+-F2*O77!(i=;f z4$@teZJziT>k=^|wUxh~6 zUj=L*ZP|}hQQB{h?c<_;4bmqInyPwA(jSR@PK~r3iSl9nyod?*pJ;-KeAjD>mt`UE z)sz;qH$?F`4nmA(wu@dH(e-F!YsV#9a*cL*-j-e6c9>JquHBOl^ybK35lai)XZ$Mg zQr#6Ss{zEd z`Wt#QFB-{KHIg+!+I-O3sjidc7Lhvh*PG5Xaz8GOv^@$V6*2A>sh{gyKcm=(X^i{B z5aRxj&icRFq%%@Qc^)T9`{NMfQ4#kEu`pV4N!q---$?tT5aG$bD2>!diPHWkM0iHT zo!6+#Cd%_ZMQMK=V!YUwO(XT$L}`B%BD~%grIGq5QQ9Ac2=9g{-abm(_Eq&0*?uC* z)&|1SFn!0Gr%59fqOrEPQ=Kf)nIeMwjeev;dQL%ehh%q&SWn=y#;2#r>(9_q5}^mr zH$LF|;=|qn^Fgfu$Nx&Lh|_A#U)CkMh$!G%<43`r#;*qNsO8`TwLHdP5noYf3X-|v zrA*2ExmpiCZ~Q2@yp9DPXZ$EgUW&0gwsGUv^(wZAJi+b82i#};N^ndU7ryOIwNujF zBCYL}Y5wYsR*AkZ%ElDolVJ+^xbk?745 z>rn-c*S!OG7{3za5-sobGD%Jj(q==`qZ~=j5@nr6c&sKIxP4|qi=>eiJYQzGy5URjO>>Dts0{c)}& z%SBnI5gsp6r%y|^BNd|6ZE>eMN22pZbYeW~G}0MSzEwwQzdg1W_t{5jzdg2>i`p92 z;DfeCD)1rWN5R#$`u9{YC)?^D1=%vRE$oSls#>ptooD5(!1Ij{_`LBeL53tR^+rjq z3ex6$TvazpvQ3ng8sRO$^n6!oBs*KuPW7N9-xukGex5&rB6~7e`!iycwym*zy3aaF z+tyedqjE0OC&i? zls^w1sgO+u>t@^QRNs^2fgtq>M=5Eo$r8r)5m8%19zP0k^x~-S8RM6M_k=p>avg@T z$P<2DCLfAOxJhlK3bJ6`Y(t&u7D;XoQlD^?l9qofccjAhZc$saN!Q+2+I4sZUS<3! z_>}R>z&*7bD7db+1jl9lAl>CiYR&0RKayiM}3Bk@|vQJq2_FI|KAg3e?f> zs-xd#8laAj#z*!1q|D9>9y0);mFX^dG_B0IR?yIg`^*Q}-T1&hU>cxqAD^bpHB!75 zY_bPt`gQ{ecLc>O@TiElo=#i!%O}inK(q;~;;xY;pMADGXky?_%@Bo}<9aHtaRA0^ z*G`beaY$ydh1|?XKdX++>s2nUzLSB0-PMuIn^)C2a=1XGhbRCA)h90$lh)mbFu1Kx z78f=a>7k?bF4|}-`0N+vFuN!OngW;xtdi#EQb~R@7<3!q4hgLMvyBk$W+`?B>kEOq zMPt<>=FYB>IgZRLrDWc>O7W0LAG!e#i@qAY7^9;;UNwi%oHxcM<7ibC0hmQ92QYXt z5v87*O~9ELu&SPr{(lL9TyORDFTbkCy&^4G;3QGK6dTv2wW9SLXt~74iS!sA!1Wkg z8#e!r+PCVcefgl{LNnpjzU6bV#W+VsPHi5Jj;Q@;exzPA46`{pq*<8Fao*#JNsZ}) z)U#H7yZYK(%+0;^R#g`%i8n>9S!R8{ScNg z!4=`OF#{YY3a%n98WWfiPfhzJg@ z5Xl`lP88f>{({M)yWwdPt~Uj6o+voLOq;xMxav&(@wLb;;nB`z5^NH2apNDIR2`&{ zGw*bWvAJO0XqI8U>H6u z%EX=O#=okXirUwxdY~%lUA4yF>vXC;l0H}TLHcsR=S)48K1;+o6uiOs^Z=Z>hRxX` zolF2s;)mM)(^i|77+)TYr-19Das7cW#{_WYYW%JaiXM>s>Q8?gznq{M~07)EIgp1NhTOIp!0)niiCs_o1s= zdS7;R(5SA|#5}&9sNgE&N5QqmPk>BljeNGDRu$f-h_o<(Qv*8%U_W?*;&-wc1LoJu z{8|&#Mj5}a2frR*e$$y>YqT4`)xmEXz=3I;Ikx`fffYd!^!6F{%DpZg{ zfuqKcg3FAb0Li+)c6jR_(hv~%xxh{V*blB9e&c2gm|rjRE7lIbCBd%;nBR2fSF9a= zW5I74z<~~Dj)mG$gkyv43te8{Q}9y{Z9f1jH1^vn|M#RT;tRg+gQ z<|S#9PA{e-X_G}S%c7n{O%~0@%$G()QW}iLHW3fTL0V_2fw$FikoJ*-_tbKb43Ni6 zh!dOj58EeYcUrLBT7mRkGb6i-!Dfv}BMo3Oc%(5tJs3{`zY^Fkko<~E5Wls-xCfZu zROVM)g7}>o{H6i(>t%k06{v@DGCp5KF~F`!XGefUeT~L-d~}fMQLT_B+cm;wLZli2 zm<+BF#`>2QGM)l{KCoRN`4ww~-_l^*1I%wK^DEW}zh%L18Zf_J=2xr{jjR??4De); zY6Os|uaUk2c})M{iMmuEO}1-<%~2xN2*9LNqt~=wy)GgYh+8{URbll9A_W6J4D1Ym zeJL*6=#wJif<$P?#pZt!DJp?h7eT{&ihui0Bn~zwx8s1GOAH=Qn~)x=85+>owA} zZ{Am_l@moo1UDL=I;T(KB>B3iolB>hlypr|bB3g67c?W)m~uF#&SPozNf6TI1KNhU)K|S-uMadg<1|W zW{Q_i+#?m%JyE;nRfY88f~HelCh1iLjs5^n((8*Fq}z)cq_-6{NO#qmrS8K&{Y{Ug z_Z2iF719T4jeig|QXze!psA`yYmK`XIkJQK!zJ?$QplNiI>h*X!MxEp^Qwa>SXXVqSvS zd;MO?_SJe2d#{g|H~7b&l0NFR0Yx_MeEA*Xyy}mq_4kem25xStIeygCz~e17$FG_iAQvAz=F;tHPZKc~;EeI3;A6(G z1Rt;EAbHDvWsDJ!%isEkn7516FW_F0Z<^yrO$`vyt2utl)W8QVbvU+uEfJ85_l`M4 zT<9D-xY=>fl)5RRHSl}JF9n|xY2`fIf%##r04Y;Y#9TcR@llcT0-g-)41lZeF~`e8 zy=H(jTJ_?XmJV|L9bA2ec;Bj1?QM3tt-zhekAn}1RHZ!?%)_+;q(VXA%NBVeJ}6Sd z0QSCS9DizRU`?x}9A6=lH$Y3?J2t|#)kPvk9o%7jKoanCFZy_y_;iI5_27_dHKxum z3J*d2W+C&)bo1I6`T$#t?peRw3BFX>gHtyx8s`#s>`3+P`MQRyvo2-n+gYG#Yk1NH z{X*ovxyZX_UCo9{OTD@In|g31A{Fpf;{#rMQIJo7*BKx1dgCi_)3?kfrdDJ4$QGXX zkBXEW@IhdwfxRXLHY<=i0ua;Z$?*khLu#NK*e*cJ-m;ZJ-S(9s^c0Xn*Ei}MuL|*| z0K$iOwVGqva2KF7arQ>tREX3eV7+L*ELuaHR=$__XP!+$w})p#oZdHa(o!n%1Ms{V zo-{>?3vl4#7|i!f{J4`Zb9_-A^&VYvt`en=I?J*;Rm{iFc{kcaKVzDTuA#No;~y93 z0Ms#ZKf0{k+7C^%9wZ%B^#z*uT@j-Vvd+b)`(_fy<}s1R1;E6OU}tpH{@yh7u_uF# zBIY0Xl!)&!J8k(K>}m4laLw{L*mLSbz4ijz6)l!_Y~}Jf_)U!(mWHD`7PNE35hLM8 zf>PUj%NOBd zZaFt}j?a6q7h|>7XmMAPO_E2yVR&%aeQ~{GU0QWb`(4z7u9pMG*=-$qP2KxOKHCJ+ zTafj~5w+2Pom?+R#wgn_)YYqqtU*p~;Ve0~PJF;+##bP%A&-8;khnh(sh7YLBHuj6ubLWot)=F; zQj5$o8WwqPj+dGmAV06>c)6*86)iQ#$C(;f*-~?Sys3dzEj7m{ni^QwQn%|uUE`0h zpO;6yM|xiWxcN9#>dO%QAD>nIMKl>u#U+&yA;UB%75siEQlr2Nft>;Vtw{lbC_!K} zuw8(#rBv)9j=<02tGNzZS$Ovr*n11QpaLI~f~4DytRN+6sUZEgZv)Qk3lPUKYjvx5FD9F!JjU=? z?pUce&a$jdW%2PF-c1I#T!sw%0jQf6J?ENqTR{kaNN>Jko2_vgx=y2?;m}&ACE)#B zg~L}OdtHflt+<*T0;&6Kfp-1$_OCIxmb^(!wN=82DEH_>xJ!oIBHiq}i*|pZnkSe= z?7INNAzg>Rq3%Y9f%xSz8y@2u-;dHtt3`7==GsdD6J)R_L(Zt|qD&-|ZFHP>7G z4b)(*kK-?Qe2d;@{%B+R6QG5))gPzdH|Ee@8+31 z*_N-enzwPAXQtHm(opZM6?mUbz6tPt<16q-wY)!rTtd7*6sexTgxu68U`1fNz;Px8 zzHU;0CS?okHYq^k{`AK21EvNZ4D1Z>kVyfub)}3clH5}vxhcRJoCPe*6kxvT0UPtx z)(GD3iq;3M%%?-fGA}omdaLvc|uhK_k*NK?8;Pu8&fZM`a*t!hdVSEMNUdzEd zjGqA66%?oV*fh51k+xqFDP!RHi$jHgUk+>+xWJ^qO(q3yy(HKIyG4F9I380bDmJiM z;9thbDv_v6b5ErgQQ5_JnwH2|x|?CD}5Ndc?I z><+Pzq`OHIm%*x+>I;HWB$$s=a)lmL<&U?VjP7~2I_i+nLPYfhHv+92*x?uU$x(`ht) zVvU4}wL_UQ>A{-=f9f3gh)7id9t+~hIndIdZ4#YjcHAZ+NNgtJplyEOh}VwlbPVCT z_tTZe1X_Ja=k~a_U{}s;K!kKsi~7C@X$MPns!hx7l%+BH7d`*jkNGgGK)SQ^TTk>Z zTYes-PynL( zCCBk||9MaYZ;HH{<1r;6Z-9KfI_6bh%%qDI$^FHR4v($#q&RP1t}jm%DQCcP-T<5- z!UBY30X!bq3jt%hz?&w0Td*y3aKm$SCa_)LO_P2ifD{ba7J55NZ>{6q*l~4|{=RPp zvA^z2>_<6v9rT@}8yiG)1H4ES{-s{EX!#rmn?#yVR|{?pZ0}LQzcTh?!HAN?W8DeA zynOBq9h~C@TXb++5Nxj2pP>KScc#)kSCm|K>fpX0xW+8r(ZNrGpmvG5=eq#C_=NVA zIk+UWQpY$;2fbQw{t5buhZ}WphZn3<3o~`I!Qu`b+#LjUU*6L}r5VJ(91IpQ55JPh z;tWxk211)CVRkI3lLN;^dVS((!BS(76)+dvOBF}N2I?`oqK*qPPP)(ojuFuu_?C$Y zWUFSD6=Kt;xjw1m4!p*2?ZRs2MM+#e{x5QesH5wk)&|L=U&KN)`|*b)L^iT|FRn)oySOYu(&R#=UT9O|bg+iuDJanDQ7g99HjngUSi0agDSF2JO4sU7>-5IK- z@!|Z6iOm^$E4LID>jCyPRr7FrEF{sE+_cI|hPda(zFk{)_6(wwRr(ar?XCI;O0gq8 z6la{}A_fXvVf+O6>E8|VWniVzm(2voyvYYv->)V6V}h^Nxe%Kn1BlCUwF|gTq|pK1 z7S+QD`(AyhVf;YsnDUV!@VclrgndKANHG5JpEPP%l8=L)`q50dIOy%fXkHg(`vgSb z`mEsXH^W%z`O&wtQo&CT?aTt}13LqpAK2cE;0j}bs{?xpaGgnk?SY*IZZj#cQ)FMT z_MPf@4t53I4DeuJXMu-J3Or>}V2??G7flMhWK!U*!1k7^zNGX8e|GVnc6XrOw zR?`^H``!#HCnQ3A6_vqiau=J#A%^xrN6N|I*8_PYv?$=ixKd#IB?O$KrsgC`#sb%-5wF&DQenY3xH${{Y zJWj(RKHewW_*AMZ}NTyv( zdm?w@)BitA!oKt6!qza23>gEb)|YB)Ew03gpP02DFM4=Z1>O$q41j%1wOwFx9aJg&_KDDgOH^#}song!bKawL72?H%9l}%M zv-OvZv37le!M<*M7S@N|0HVzNf8t_q(qDBYT0DiYhdv~zt0<<=0`E8bNo0$T54l-q%yuwTYJWHl@;B66$ z7M%Fae9>~xN|NY)66_}DKu9(C1W|CAoC9%R;A?|vUm$$^af`E*ZL{CukT2in38M=V z;||)hq8@Z^KlQd3)PA~l7@l5U9M>~nGbe8D=bbPX=a3igr=H!RFK^z30aYC!p10Vs z=x!X!!#(e8$j?rLlhuE!IA(h~i~4+bsi%48+Yg z>+)!X`sa1o{{W7&Vgbg{bfFbL6q9J)h0^pYrk10xzUN(E54pH~0?iwU`MC_5PB>w- z+n-WL9~b5THlM@lT`!l^WnUcaW>tANb15ZHf5ML)-=AW+n1{YdX;+AuE#zv)*Mdp3 z{db!`-Z*64jtL#s?jLOMnB+pxSIzS-hcA@4y?qo%{vd_7Uail*MXVQaY;%6wu#mbB zv!RXqMH&a-0g+#49RC|r1JAb996xVr;N_N@<5x`$yxmfB{0F86_O{d<|M|ZkQUjKY zd}I=)Exg^Qv+AE)EsX%HE=^q&G9x<1Glx*9RE{O z1NXGl9RIGVfgiTi96xPp;KwaB$1j>1c%!A}`1ef>Fr|D^<8*0eZj_XeNy)5XiZXW@_O4mYU<96xGm;K`PnnY9?C zU=jnD)MAiI*wTi(s@8xMMGj3Z=-V1=vk}sTo7+M%eW@)Zp%e3%G0Z})aGXk`&S7+(GK>BT`g4L&DVtOCB1J&j@XP#t{ebN+>4dD#Z+UFzQZE4ET<(Rh6%JF z>7BH6eJvFcFay_#^jXUJf(t~v=6Ic6IECMCs#ru}X9SZVo&}&0y?B*=I#KFAh0?#I zmD%dxl|HG(1F_y*Rr5UnixGWcWb@PbH7}WVHp%R&;MELL2Z0IGWAG--{&8*|l$UIp zv0tkF-PXaBB~8vSR7}k{W^OccaWwGXI@5$1Bt0z!_O@l|nxbu4y0&OrmaZ$>mZbVO zrz;D_gT(`a3=nTG$1aK4!J9urYic*2e54Q_`$6*20rrjj9&MBN)>|p~obk<*TTKdV z?i1-<2LO|>PFo+!Gkq|9I+*r=WZHVer|J;s{$SYbUmXM{Os|S4X6FYIKWVlA?+J`N+-$7FwQf_|MN_2*Z{(+l}&-#bWMv?jlU{Z`)(vTu6@{I`yDj3Vd$KGjbSXJf8bimN4niqt;3=O$wZ6QeeiUzKx?L zS`)-Q0-Im&?)wMUxHC;%fU>Q`^?(4N8 zMXE0FdSIu3H%$t>XVU0XRX>!#OtXRify6Hb+v!&X=GNCFVLteduHA!W7nls}6mXhJ zfiq1CtTQQazDb*8j+Veovt$-aydv06qcyjb%&phzVV;Ot2)_31z)v(`a}N7wM5+_; zTwrH_=S>Q{U{c^^lLD71v~H1rD+1dEXwbccX06f6uHZQZYzj8B0Oo_{8eaDWuO5(0 z+uLAh<2_ltAB?+zB{vJ<-qs%L<$FB(l^bpc`YcW0PL7%(Y`#*-jkI@OY@iZ_&L1OOxH@* zO#RZV?pDtFs7g0PQJ2jGPDxLTLIs6CGJXPl-}u!a*A%kJc1C>vFOez;VA84}7Ow~K z6krzVX;M|amxQTQ*K3#FA|fI12IB+XXZ%W#Q!o41j$|qP|vd){c3N2h%Aanf5&#IJVX*eDt4G7fuVE)oc91HO7yFml(eq zq(1Gs;`a{3GfBu$H9+{Uk!#XwAOi5;r)jqB?tT@urmPm416`myGkFSIH z)g^h9fi7ITKEcfCqub$Z&QeO}M;1l=DKCns{W8zu@coBW&+lo4+$Umwg1e0$2cI*3 zHOT7o%Y+)?`@14dBLI`WdSdfLP)q^XF+Zbyd44`CD~pzv?Nt(89h|pT;AZ2;!F!Eg z4bomaPkjH0NO=O7^yP`otwAvbU`L+OzMSVhva)C?&od=DD>!ehz;(utgI5~A8l=5; zp7?%Cq&xvk`trnPV^B;1*pX+nFXy>QRu(PgIWE!B!CC(YN;qNsICzHft3ldp=ZWtx ziIgXRNnf7WtPYAP06X%G_T@a+%F3dpJh|0>U8Ec;@D1a~!6hN+*3}^Gwe!UH-;0zd zfJtAT*nAvprU2~7GuoH)9IG2t;JB4~bmHJ&xXy~^ht~8=T@G9lt`WKbR}ZBG?9(ZX zdm=tH1TPZl;RtZCXrj7CpI(nI{@OJYqNR(QFAcHWPnXTw;L-)o5a|#6ubP7)bg5xH zqw(Tuv+8_&vj3`%bPZv(I{p`zx=RUt@0J3dCQ`Wo+8z{tLb_AT6u`4&YBj+4co8)K zzb;Y@fRjb4!RTU@;cKxDSyE%NSP~q%0I^Cf#i0h>aA(h}ey3kHPPO+B)9_vs1w zr{O7i7r=8+yB|ou*GvICOQt+?|DlLQ2EJqb1V{+v{s;TFMd}WKNhz$o?(vMYuZpNK z_@+pm2XI_g-B>NYbK~N#-FdO-Qqkq2O?~sN?}}|{%t+a-bbL`B^%31blrv8cvYlmg zW*nOv{qzqxquPCK#-i%_o6^|nV4FYKnhu_jFCq++$MUev<+Znbb$?Np!J^0n03Z zNvbx-l6G0OG)ypf@LiEsz{%>@DWPw(rwP^=dzRpAV`Iyj&0$7wl%MtGLPAais|x`_ zEvmjdItOD}rE1(I(Jm3A0^V(Wz*mf)0AH=;;2X6(W&jdrw@9M`VA2{DtiCVt(`NOI z;CW+T5WHwC;a@ivdwxjxTv3=e!u7@nyv_ItaAz$C$wu}Q7QucKrzcW|049YDFPHc_ zv)UrqX6z2Z&BhY`4r60Tlg_v3y^o9Dsd+odJF#@_Pcuixo#H0)&)P zY_UNizANI>Zh=MIkVUMYE;SK1G!fHntwsDWh3I1bX$af}ESF|qt}~#^@khKrJ4_Cf zM?L8J=68Q@5_tEZ+HLEhaIJ@EL)7iaSpwyGyoecinGXxeY)qi23s^Guj7{MB2n^0*}jy1?} zm$D#3WkQ0xjRhVE>@4uONq-=C%Gf=E=Z$?qKz|fruiz)fekxcTa_IsSmKGf)HQB~A z#{Z%2A4LoaIAQz*IJ$$~eCrDp%wmy@CcyEih*3Neak)s101pLr26$Yg3!EG0U@FC6 z&;*3^(MQjKko>AMszNRICyea^Lyo*jPKWaC>fIqs2lhZBfz+@-sJv zaid#OM>F#6yTs3S`oLbbI{4`@*-UuIq3`kNSCT2`USpZe83Nkp8!9s<*^PRzP~3@KLJd#!K|uxBzj+T zWOe6ti;wzf)f@+Amu5v(y&>VdB3G{o9UdbhEpVyv&rfl zpEWgLoxAh$rdhc2q@f{oYlFZ#(A_Tf9+O7%Md>NQGAXVXaj^p49t>xJJA(MsIgsXc zT5Ias{0RXu-_^NvJeYKWqeb)WK&@4iK9Uco{g|VS%8F*}=m`2xqNZfr~H zXl9r-pQf;rs?f@@`Jv45$hG8HZxJmGXKvDSHj%;uPi%*s2A&o9dUO0rP~!~2mWIf!cR$@7 zX<3~v4NB_%Y|>DweQKveor!2&C>WEoVw{*&bcdZH$9y+q_XIwkNms5&a$jd z8-7Xc6Uc@%&F6gnxsI3F7_c?VRycXOK$A^T9&J5l$sN#q^U;jYW>CJ~4}J#4CQ@8C zP+95H=2f0(2cz!qa?C1Cifln8X=$n)kY%1hHi&74IcYxGa4wf>kTex5w%eM9X;YJY zft#Jn?htNi*0r=Pxkg5+>sH3>!!Qhohx7}Y*iS8>PYv)0wH%*KHGJ2(BDjWImBjE2tCvaOHS=F6LZMkeYZ=iMx@z~Ah1KKy8f5@uuq+j@ChPJbDP0Qa&^SNp+ zX;Hgclxyh>X140hG7+;FyvX=f;Q6|(47c_$++)gURVkf;xziC9(8V!Z(0*eDX z4LmFgCa;NkBObtfDsoe)Y2->peM%%HKqH-MV^f`Otd68jQPT9RD#q@D5IwCnMNe;k zyq1D~6U*a+&*o)?{798?#2#l4mSOC^Pfich5%^>lGMu*y&c5eZEE}WzV_n^iCEnw zYioWZF<%MJ8-dqFi>fU*&B4572ixXg-nWCTb1>UO8ykUJM8N}QryXpYgSp!dw$8!O zA+76JMAjDdu)1w%x|@2I)>e3RjfbV!TdFfns#;@Bs#;^D`mQLvy9Q&a&NQjYqe)dB zqM&gJ&7P7F<`$ z!N+TP({xo4XSGO^5x}IcTbm@j!ECk(b{Tt*z|7t3tE$r_KEo_%^8#aIlQ=vfB5m+Z z;{(23%RxRA@b!!ShD6yTQqsVyft>+<&!hmM)fM0^lL7?y^^A@6b=q2T7n;Fqzy{`r zSNy=|rcF28;&)B^%%W}Ca;UTvDu!&(_0K&HE_KzZGp8n2YC5-VWn`hJA|KkY9!-!J4e-X$B; zw5S$`Ylp_pH|V?NyuHcMji)$g2;O?wf%p)~Ix962Mf|1ghRbm8xTZrAVa$Fd1C!%cQ*`7|#IacX9N~s=ZNqf(@^B zdef(!TAUR7wOrj3%(MbyAkgI#`Z@1{HV3z;UG%avefr?rq}6oK>#F2B7R`MP#HV#1 z^#_9Pd>^{pdYbyBTGtQh4@lE_{;-y1@G!bL5wdFCvHrBw&D9AvSIrfm=jZE$TPSHs zWHUcW^;uDx<@?L~4BWyVsje;D!n?C`rHyF>(k2O>Yy3FKhUizJwJ{;-QjyNuz`DTp zfU`w~3 zH7W3(sFl-W5)m`Y=}8G`%;mIEhZl*+3B1qvagcno($u%MnkLw^s$PF1i>qe9|y0i<3oL&$6oc1Ow!;ou;SS5VYrDGH>q;y|4 z7OQ3Wvo0f9xOrI`{ygFSqap5}V|CLPmt-T{ugbUx!;1K))YKOaen>Zemg?qdW;L{=$uw4M>`Ll@iib&YSA;1(c5d+kB z(HyTbHE?=M&2iV%z~+{k#WIEqF(!rE>SzTJXV4OW|zBU7MCx z?6{wK;wMV-Amfv>!jD@GN`h}otDyw$-0Q3tXU06@k87-U6p9g7^zn?Xpj}{9V^K4A}Zo*=u z>>Tf&2Zaea_;IYWY$6$#EvxjDCd6xfMCvA0J4pH1orYa2A$04LjW4d+_na3tYbNoXWz7=d_JU2o_>ORK3Xhf%(Kx;J&h3}W<5`r z3Z=UsScPfZs1Y-?I5~@2m@Q$o5XHugO?s z@%}c%%cF@-V2yne7MSvyJV0sa?ci4f+@)b56N$2=pVsUFN(VKO7JJCH@8anYsoSk* z8%5gH%2M6+xEmk8+q!Y_Vm<)8Uc@F0@-m&DB<*C}aea$Oghxbb0C+L5Gr&tG1wJt; z@Tp0GRpEwz1~@UWUEl(f0$q~=*P9gBVp3qYNrC%K3Or;|;9-%UTO2kNkn03KTBzN6&xTGP&!MDCH$pYKH@jP6+wx5JCjfJ;ulQ8=E+2&@2 z7dNKaBuvjB{p5_c!_YPLQ<#Yt^zy9`nV z{L*m~&x;@aFLY%fV&#Cmf>YYovHN!-g#qrn6?O*rZv)!}aCU1*e|Jzv%x*j%Pr`J? z8b`~o-%=LQ4s;!IZSIfMM~l2$E(f^B$4ITdq$gNW50XQIV7cthB2CP&mirz|e5vN$?LReT@l(e?qw&1AF+N+n?h~pZY$;HBa-2=VA<|Ny z^w$^e56gzK?LeLCk|-L=M#I)-m!7sny~nI@>8a-aNPV=(XIo%ep!*|@krvXIa<(x- zj{B3tP}@8-XOJPNJaE_}YUeeF0a!;pzT)V99~cam}JqUze_|0+4TV`Hd=3}v*< z^80dHGPM@IjA9WZx>+}rjXn{FZdlGB`sA1m<>!A|rrTHFi>wc6I!24u#7-BNULI{d zmZJ`phRdMV!xSGj^5yL-cn^M(QJ!ZpBK5}ccQwiN1Xq&rgmDsjEIw;4+W03*jVyac+ia%MpnzE>?&`zMnL{WoBoIVd$f@E&D+ba!_t$ZFbQ=h|Ba6-cS6iP{ph+8@?y_>XP53#`j^4uM{2S)CrfV$pQV@< zep%Y~&CW^LSh=ZNVq>6%tdwZ$s*tURh0oI%$zzuF0nWP^uQVX79uBzrh!Fru^G|K3&E4XWGdOrQ1_kF|F0DC`&T)B!(pcse zZY8B1Ia;*Zn0KBXp4oI*r%LRmp&Puy4(GJFTQ+~3Rhjj^`!&AB+Lvn{+ZZ%@ULI{d zmZJ`p&UY2$n-pK1tUd+fhc@Xh{SMxCzWn=hL*gc9cJe4Kse`vI@1!xa()M;>Ri|HW z+en+jPgffI)mP_qO7a$i`D_`cfeE$jdzIpgsvg|?T;n#JP=LOx#dM|ir%m0|!LJj~ zHx_Vi)-3E?uzySK;FnSupand~Yi&|#@nqZ45NT+u@2OubSgDAuY8201(LZ8V6PJ1%aF3=H_5@!5G8oAX2(2mljz zex*4q{zec_0cMfT5AWztN#7OG28gxz;^1Su^N zC@+Nv^ffpS+4tyFV5L_+Lw$vON0N^mTLbZXOr)s5zQE1^|DQ<#f>BlC1hxwhHq>Ci zPUD*tpG_y9Le7`FceteU<)7yjkK7*cs{oc4BaF_?Edp9>Sl z`pe6@_CvrgFYD@wY|n+9=w;4esEV$HF%&H|yQmaDSwst-cGGrsvI{_%^ca zgMi|hJ=#XhYLXWD;gZHy+vw_2?)Jf5w+-=bvhkO4o^LGR+(bNd)3jW2->@r^+w-GE zYbne-_~o|tM;cr8=<+-CgXkMN_z@^pr`-S8@Sys7d9?LdjyhC2-%jJ36o2rYndibV zOSE)JQA)HhJ!44@Zj!_(4Z5}1ete<}jr_y5bg>_DZmFA)a4zgo`Vyhm$7xQB@l|@y z{(BHstTt5=QVv{?OEmqtZTV(e37Yvi(6`rFEKT6X-m!VWu^v5ad1xOO4|#@ zJ%G?|V^M^@XamDiMY zhaiNnmb*@JY;IBd6Or7)y_}TT+@kc?2RrZ3c|^qY0>|$Re83gP`yheG=RuLC7;v=A zG?u_bV7ma$gEu%r=v%JjHwEAujO!a+jtSt#BmYawzMO^#Xm7WOyE*Uyk(LGUP!L}; z4nAUH;8D?6s%ypWKfS-y~2Y@9#a|q)r|Ifaw{J%CwH; zsBMnZaYOS@llWk6pNOp&+@{Kj9|w0D-?yvbGbWw3USNA*r-2$hHx3E;NgN?%s1^%;ceqMX#0NOW}&&j6bPo1U`8-%HdwBWgH zXK>H<)AV%Xu>jj9w7=N#e6(2T))(#fr>py88{?O70UbX0lBEcx49YS$i`@`}`eTF=x`s06vLxuuTRh)bz`3p9(9Imz33oB$8_p`$w}Tz}QOepY)xBKJWO)E;-`&GhXWvA*<_9nJ zZ8UsV&oq7qENue&ndruZa@#+<{g_T&-?w6#z+kw@XBaH_-c5*v2cw3H`%vCKBM#TD$b zikw&lKID~L+d}qm$IB5?M{ezJ)y-T;NGxnL^(9$J0 zFR2FQwY(o!|L~G(5Qdjjqtq>CUQ$g4ye{Xxc}X=>hL=c=IC7`OFsK-c~cx$hRFqc^M;^r_tgFJ3~$O7y1I71qwr#) z&*Lv2Pz1fVS**v|2OKTD9~oZFEp(HYP3IlaG)R=0V$n^KOkwR^OW*VJ4^_}>R+ft~ zdng;Q*Ft^%8xDPVy+T|Z);J_TtrIAxgt6^Dm2|d=BfFRreu#@6}Fld1{iTJXYQ*DF7>tA8$6(*>|gzASCJ)Vj<~A##g! zAAMBwQnt4+-d)W{WotI3@1V&T6DOHC^wxF+U{Y*y4ds(dh5;`hrc>gUdYje=vSdCj7yzror7a&Chn(9Ne0m zzi)?Rl^v2GtMpekC-P@O`ZF4E&0Y3qG(LZ9mP)Qk4Pa7Qj^?sj#@C57HMR)eHTHeM zXb6$+ysGL$3HJuQJ2y5$cR{dERv))58=@t5cl-)%!W;_eY3bbUqutpZw^g?7wZK-SPm`u@OUe5ffr{+D)ZXa5KrxGhc2gqXFV0 zT(how85>QU@N%6Tt`Ko*1TX#PfuD$`3r8ZoBvNqT<-pDWub32g+oZrdCI#L%De!?w zfqfOijDZnDmHW8vbstFlxl z+CeAILGt2>Q*j2#e`UZ4c#wSE0Q;hRz%|GKv9dgGK=h*gh-%%hulj|;IlHB>%CFHP zI4dlKDPX@esHki|?CmjFLN$KdLlYagqGxr&8l-ngD-OmHohjbs9PgL{E=VdZ=7Yy#n zLzx}PzxF7^^onN$=W0SLDnU-%bzSe`13SpamcWkD8yCM47a zjty+q%G+}KBZ~p-3v4!}kCW3076Y&m%VN+kW<~rFpDoTPFHiTV1v87jHq5eY)9QE( zni*%^I&2mx?I(2i^rVQ=fK1Z%g0U>H{5K+H3;Z~+Gr$WXzaMbC*VF(Zy*hRZBrbsQY2wuvcjbKF}&y97^XFFjo4YFf=4Y_Zh5%HJ(>^qis(4V zROzoHR=Y)N1^AbNodU2g_3t{#uNM&)Btm~&tZo!3E^t#|rvU6raX--M_(KtK!LfhQ z9~YZSa%v*LB!=>T*-CLR?F7>)Aerjz@4=?M%(V5{y>`etkQL8~7TQHphl4+rXjcG44Ep)Ikoz6`AI{0GUrt9E665T7JgCMcQ_w6^> zeP1M3;0Ge#NsgZ|H9!=vjy1MBLfUy;#C;x!v*H5QeDlvrwoA4{M0y};w9~`p4v|6t zn3USCs=I2f>wZj(`0+=)e`WmSDA!)OJKfUCC@ESF(Y}SQRd-6TO#2^8w4K#(dLoQ& zq`LFEXyZ25Mb&qjPfpx-~|oBBztUAbFi|mNaQMW1I8MOFFr{x!HI3k{QcM zqWKxA&Pb1;T*>`IJtt0{S)M)v_a~+9`<%I&MWNg8m-1TatIGi(>YUjUpy~8n`HI?PO^q*Y5R7wBbrGDUwi3 zwldOa<`(HPGi+V0k20g_=Q|5!mo8C!DOy=4o7k%c%Y|~%(!O3;6@yxod|7Nwe9FYj zqduZ*-L+JfMxTh;I!JqaSsHyJx>=s>%Wlg^Z1idM+xK;)vnk4>9?W{T(Q6`~^`S2h zi{Tzu7WeFYmrLb|O<0h$9k_aw9{IPDPOB_Cr6lR1>Npw$x;xe1sB7U5xwx!mFHsSK!pVmsNY-n5i(?IIk{y3$q z>H^ww4Zjz~nr4_SvgBQs=8HO=Gu-Ag+@c(L|D;(5>I2R1C*1r_yXqjhyCE24Qtx$r zJ02~%gcs}j^gETmICYgtELJxRwQ^z0Y^m#QncJQ+)}3b48PKho%+}2WcOC7dE|`KkNs|q~jR!qq{GvSO@`f*oZ{xs*rj@8w~x)@}DwKs`HFSksf zJV@Fz7a&&W9vI&LqRAlFOdh)lx|!ryZ!yTGVBWe~O;6l(wR%swI+IaZ;Tv_qmHKFe23jxZ$Oc< zc!VEO7QS!B_ifn(D^XSPY& z&b53#%%mxJ?wj2ur2AMW&CRodW~1yj>vYa*`*NIB)jbqUeRJobvTYvKJ@Ip_R%~;t z(spo7xf5|>-~3m4Nm;}s1m8A(Dfp>KTgj~*nCkn%Xes!hC@6emM0#JOegOZEs5}Y1 zQ{+FC^-s(hpb;j6U^K8@V9cbzF(w6$H7Rh4Nr7`rdY+(bQs6q10^3Xq>@X>Che?6^ zObXCnH$3_E^E-9wVJXP)3=urI&KvdmCaSemTX`w6=$|mrK6P*(7H!F zle>O8w!eF6pUIy0xU2nS(C_PZuAyw>ofjr;^8UIpH%Z;TPYZdsh$#r(Z~Qp;gh)Hy zvlYyfwE|?<3yLO#sv^=OA`LI_JEHa!#N^>%G6fK3U?Crq^6_BM1!z`70sPRUz|$rL zUNI@~x=8_RB2_Zx+gflFPVTptqCDDy*;Gz7%`M!*PaBN4hNA<#{i17eFHGUO1`8z>A z39d1I6?mT(kL)LXe~ELXbZQX5WWc=eUJZ}`Xz-r`P7LfUaB^TTq~Y}@1$K$z#{&F? zCCB%e8hE6o=J<`E{{Pu~7r-j3D_{Ja^W{5v5HOPP5UHMofE4j0AW~`rL`xmYt4RnD zkP$`Xp+G4Fd|V$Ct@T>l;-e0AtU-rbY8`7^$2zUI*S7v0>sZG+);f;0Uh6p8aazag zzom|&_xD?CzrK_25b)93dp)qT_FjAKwbx$zz1RM}Z%Nhd_%bFO&J3mi^on;8!8wX0 z*r8a0OBMSFz$=O+SS|%zaw@Ma7as&@*&uhjc%fS1%ukynbGi&q1zRquL$jq2SDuv5L)09>nHmg#!+ z?ymqEw+(ry3KyLRud1-at8fuj_!u182*E$WVz$Rkuims+I| zZHEr5Jw2;nn+jHVhE`k16tI{IhjU^Aaz_DgA z2|&r+yge1DX>b&Z@Obst5w24INW#?yPe=hk?^aC|ihNFhLxuz-=_k~wK(17p9ROFU z_a1-;)JsPG*8}8ojUdpJiRroF> zP#&&vg(6#jJILlpiVlJf@h&8I5)KQXc`Wp+#{U{%)n6;V25_?RPXTN<{u2S4MM+oA z8wWVW_z6{cy~Awo9&Q5XZE#TGivYh??{C5DbvR%J2&+w1Ilu}ypgjlcyB@xTV|x(pQW`a>RtZ%n!Byg2LQp`0uu(ItOcIS+ zwdphKVrDyq%_6dS2I65`Ln+AtUe74e_Q~QDNw<(dv)XUlUkkEcNzp-YzIYcB+yTe7 ze<$D%jQ?K1hmHRcKng}0N>&HS=pPDrgz;0%X5%MR9hbKK>%r*;IB5B10A>R3rQmrL z9K6X^#}H{K03r#-3Ek2g0B+VK1gf^BUTtnBBa6$CPIbJPfO@XX^w#Ear@(D2NcRjP zo`u7#I~7b%5&j9Slgdl6>^4w5Aymtlbrs5uiJxj2u3pk7f6V+T&4XEKaTcAA)EC0> zjh^fZ^lO_~uudYb^IsCOzrmwLMaE>Z8L02wLHq8vc8ddC6G zQZLIoTfL=4+66(bSD6TI6mKWNz2fbD9zZ2689*5SfY5XhRER9y1SC(~t;2I7K-G!_ zDI?w!hp7Z!0={??jX2Oyxj!b;X+D=cSv*x z!6oADCb&$o1ee2wi5R{@qX|AI-fn`Oa3Lkb*Jv~W%Ns_Qma_x#D}}t1fWl#lARr^u zIRTjj+ch*!**$dwO4?gjS}bWwu#FENY71PgA!L(O~%vKnBjULVy*R0kX=2q;qtg%wj| zGhL3dT>%&37``43oCqjy2`4Y2-5+~QCNm8Jc8IJUwUDF%E|)pBkFZJnlSSAr_)#IJ z0IX8)g#bI?NKN>%pid^)C+Nw2ge(X4{FH5vcsm{ipqRl)fES2)Hp3w=f>yXeSZ+^g z?#(ofc{%E92V%Cy6U>Ffr+d!nqlZdO5PP=XcMIy~erX*Y1X@i?m~A&4CSt32NMQ91 zuUB))Wbq)FJgfX(0;o|{lKdJiuFX0;ylMp%b7p5EWcH{)g2iw|6RubEHUL$lt6~sa zzWw1^aNGz7u?c#`yM*8h#S-im??M7*%WlgWWj^%p1-x4eKyZ(E7ZR}QNRjq?1l%4M z#vKI8_{v$H@s+dgNAd@S#g(%NABMxCh(I}CIV+7bar+EQ9P5zdRdDbUdu6^Nr0!zQzovKs3MP0fA?PV6>q_uco{A=&i{c61$_aXkOZ^Hy6p$I;EqN^* ziFjs#5{49^|2b3v3jmJ39G$)#oh$=&j7i2z+sR7Titg~Tc6#xGbyFsDC%Ta~_ilDT z9V*-sNu{9z+1=3(x&YW&;3c3e!JWebm^Hz%#S(IqhQDN~K&nY_C>FsL;_W6NeYx4k zr|M)XN18HKRAI)fg+m4e9pZJR)}dh{kVT~-m<)%ZE!#(rCh*mgE_16;4F?h?vLh^bF z4tWtYfeedCf{EhoAYkIe(o$3Vw4F9>xF8^t36iptfK0+@D}jg4L4X%k7J}c1ci~F_ zLxoMpWB?Wh{mhmLa(f2!y#n$fLeoX?J~$X;T0Fh0T6@Fi9;7&U75o6HR4;C~KJ7Z3 zU%|0n2-$YwA0G-xngwu>n}8%GhjgTvCls9oN|AEv7IIw%!ab6vo8V?R?AZ!^^xUfW zI{+R~FTq1_ASw3I^Auc+8|zy#P4qquhw3JH7Oo=GyFJ@S-^&_7@CuwsvJYOBG8k)S zJEXe@V$CvLh@!x}+DWJaF1ZcfC*d##Q3&Pe)(qhyAd~SdT7|`#l5X*30Azy^jo^0i zE+lwPu~u>rQ0mtdYc*+C^8NW!k67|sb;_gM%;5>edwE@3$Yf?AP7C4o+7EpZqd6QK z2qCK){*p13RL{Vni4aWHJP1f%ZcN24(WUG3>ADl?QU+KSp5!k{j>`%5iFYBvP|18b z!Eo{Vk(7g&3}j6Gyd>!&_%)o2ru0-vqAr3uIKk7?pm?i!3%wuVgF2ZS87OWPc2*1924yu*-$_flBS$KhB8!YMcefq$e|VkSeHXW&o<0+N)J!Bcd43MWT$ zfO*nz%VnnYk@z{~Ozc5v?|gpfrESmBq?cCr05oOCxKEV^r$lS zAab?Pbr7r*Z`YXsn-#ka;0pB;Tq|BzrJ2mBEQ!w*mn}BcuNxEnYoSPY3@r1P7;84*7%!IF} z_Kds9n6e8wJ<2-KH$wKM{yV_(0m-3*;34rYC3sq~1iw-&!ApuIVAfbLvOKfJ+d(i# zu>|uJORzw(1RaVc=u#{}w_*tvE0&-~u>@MKz{EBWA}G=|aUD2cM?@7;@C1giC`@{m zIVNrqH2fxvZg6a$gpa8|(d~3$;nl`8U2tff1m}x)3BhHGCAdqm1m96C!S~?8HplQi z8cpy6@h%~_SFr??DcB2(AhOn>&kNJ(g<0%{>GZ-Z_QG^BC>hTe6PC< zJDQNg6wUA?fCcI$=oIh5>j8Evb`QYK>b0dsHMkyvK7zXl$C@a}fKtqOu->eQ>$VwmOzu8TF8nN|FqAs8jz4uT`# z!XCmfS(Yq_lA{1Qe@8fX54Y5Cg%-VSaL!f{F=d<+f>+y_9W z@Dh*{DQs#BsRB*W{WQFx&cA0csmG&!i6n^VTu72^v^wsp)5m%e<#85 z;$1{Qd4#E5I3c`CqB{w07w;kh${12I{D4Gv5C53xbd%EC zkk@FJ*XRH&npk@|%SaHtDH1*l+7(N$a%iPA>9BjPh6Io9`$VPtza^RRucnTa^9>GfSE+(MV zz!KaHM`FU;6iuM@vzXv;`WBXM6;L`QjSgnmIH$HlNX59pu9rzSxj(^csmHLg{#8iZCdj-^iPJa(?|lA$wxAe z8p*@W&%T>Z18JM2>?Bw$-o*qv#Jhxm{A%#I>Pcg1GSBvTj!Uf6p5p`%-v=j#8G5KU zR2jiqH0hiEWwBzwuE)+ zuOMtTc)~V=CuG|rz5Ov$&!@GId`MH)bbkLXj7M-#2Ei-pC3qFCmXoRu+LK225%Zc7 z5WL=xfS8Qr)X1kb?9GfVWmq{gY?pD%ZAfbJa1uMd_H4!q8Kr!0ns(`FDM1)5OQ3pX29BlXg<-k|qUFx5Mqt*zY zQ-1~F^9D~yo}j5n79trUuV>((Jpv{R%g^v{HJV^wNi@T+YBa%XCD9DOuF(V;$P+SW zI0uKk2`FwN+DK|`q%7*SaMUB=<8aU;MSNMkWJoT7cA2;|p^~__VKSTZ!C<>E=^&t1 z0wx*UkXQ-SDy1M`f;3^1q@4*;(@adU%-I0>ZWg{>1if&u2wv1j4>O@P!~C*xQG+Z4 zLDmb+asra$Ez;q83-BNckeh_2lR#-c;b}4%W~({5eu2!muQhknp0Bq{X|kmRjJCo>D$g-C}_QhXrs zx>I+SkwZz6KMv;>6O6gl*y2PLM`a45U2GZ3C^%y!qwr0GVUiFZ6#g~5jp%ha)&gPv zTjEdD0%;=Pk&J*OzWrShr%Iqg3;n#NH88QR3pQ!8cjf!VYC%Jn{7hOI3aZ9 zv5{fD!=ECLr5tcf2(* zCL7})w}#*A3bumZWz|%!E4bzYxd#~Z!$#M0-vNGeC&;ZPcHzh4IexVUcfZ%S<%lpfCrM zSqTr<6ZgNIFGWH58N<~0dQg;>|)Gq6e>^EC# zdbYs@-7zZ^iu3|xiBM!9>MkHvdjaK6Ag@XC%w&mBq@&Dcnf&@BWr%c?nJlT4(&g?N zVOmdQ8x4}%4iOa7H{yUY9En{mhsac(P9&SnK~C3Y)(I?wV~vfB6K@zSWkS#`B%X{n~HiQVbl&NW!+e#9wgL zhk}siW;nD(0+NIeTO=qtJ%zhUrH?*%E?uOVB3zabkf9y?W(3AUrt_&5dd|TkR~exo z7rcoqW4Y09f8;(x;xEV$wyVFEaGUx^5}sr50{>RDkhptBK6Bxq1%ez%Qf7(;i0V-) z0y2ZH2rg4Bfu;?%mDd5eN8(*4$Yieq;#xtvp*xc$LXnO#n`QDFl9VCRQD(BFQp#YE ze+0-UBzZvj01yueGRU0>MLNoCmdPJWQie!JnaPq$DTCaf2l5q3?kQP!*(ZT~8cv1- zdY)A(0=kl6!lFxt39|o{rKacCa6y;OW=Ww)FF=+EMLJRUV9|3k9J>nPgLjI*#4tyy z@4%s%5ZnhMG!p{Srw#Ee?42Z)R0|&gcuu@t@t|0M)ZN0Yi(t8Uy}%e7{6BIGe^c(j zZCE&{hTs%9KDte~QvB2U2v>{0z3+0s&xwCZAK_KvpVmist@zvfUi_O()zK;gMOmTV zl>ld`cP+pc^Zry zY|tj^`fi7ZEK%IM0lp_*H_P%}y87D-Ew>_))?hN-X8dGC9>kLmnb1#0ti=7y$rBMx zmLNG5fck)UH30PiZ!ZAzf%iIq>(#p(fcgNID!EO)RLOVLYefzrh;6W3v$F9AOd50y zo0b!{%g7_u7euAWFhKM>#Vr^D!a39Tr(kw*bGI zmOp0h2eN6Tt_Nu114O?&TFw7UW%U|=t95t4RqL}HAjw;cw%L@_W}U@{Fvuxo5gSrc zOK#+Q>)s@59}0G-Z>!hmkn|-K;HI~?jaN(@?yM<=KQ0p836n`n}F%g7VH6wVh2>V*jM4Ut}8SLlH9%}5yL zPLUkn5;eG-6L?P^@Bxc*T;8_T%Ab&^P8UHqb^6C$>$yS7wQ-c!H6TH{ zq9&SCK$XC!tLyD(W&?=o#C&J!u3zpY6Jp7R-K$f5i8&xRJ#}n@2{WBGZ71Y&392Kk z0oRE`q^sVr!8*zi=_teG12kC5si^O+=P^q9aoMFs zdVfvFrmMl#)_c9oE6Do7rv09xR4c(TidEBrwAT09q}5i?(FPpD+-PSLABd_+o38G3 ztmT~;)%^e*$QvU4V4c=84!&f`+_elwvcz5?=#vS2x@_c{&c#g+Z&g&6!F!6bs`fCb zEkQbECF(AqO5lCv1r%UWj>}u9(~^!=cIBMjh0?L18k}e$(k+rhr0ZDkZiW3x^;fDg zsH5}^jXR0?ldlceKi(UXd|g^!Fq8<&DJwDb1XKyUAA16dKgf{e-m+9OR5`pYpu#uT z+*5`r_MG6n(s_M$fhOMF8cmK_uHxV8CB81L?@y*qOL{}uiJJvG@IEoX43QRXHRoZl zRgwfHcli%I+OxF2pvemBlKcG!9&H(x?Hazn2mQsZQNqQuqYRObG8{Pjt$Ru;(Vcgc z!+WW{FR0wafaRw3v`R})@w93VqSI^K)ppRH)9W;i^5A=+m*NjRRF>;s;gccrtaJgfMOheV z6#evJi_V06+;9*OJ3?sJb(B!kepwV~+EIp@c9bE~QHDGRI@=j-rNSUMKJYud#f30^ zJR1<3HZ+E8tv}FxV802zr8vNdm=96f8**w9nv8!b(#z9lGa8fG=1s@H@Q4g>b;O z5DYc}t*AFM@H+vSReCE)tNTE)fkM(LU4Kc74oj&1KUyPV`3G!90SOi6TNG2fMiOPt z!Ka1IFTe+08*5=uWx=Nlf&pSctY=_-iIx|r#!n5teFU^N`GF`WRGLkf2H!@79Sp1fq9oK9=p;~i z8rCu@(Mjt5z|w~BV1y26(;5sPuFLE5dl|x0)h}?B!G~E}KhxF1fjz+j@pcm|QY-

    a3bJ6 zfX@Q%8G%o+1D-PyFPjA14fr_2hv7xhfG+|v{+>~IMJ4z=a=6CdIvV^Ce(8O9!V2+w zkHB;PfNe*jgn(B7HY5J_0^X4eK_6}c1pXz!YY@IKWiU z;}y<+Kb~bm_*uYRfag!ZtFr;Cj#hXLU;%fd?55lvL#~1GaYd?fX$pG&GY_EmK{HViR=Fe`*WSE=Y^@ zS1^zu2JAuD{ur0bJn(JH=T^jXJ$pZ3g(U(cE|+Qko~3&b@wS{KyIbNL z?y>RDBA(@X&cNpl{FQ+(8u)7iUo!Az17888{I3BrpN2VF{@Dhe4@myo0XqO6HsME2 zeAQen_e8*vD9EgjY5Q&H(0XVF4E4DRJaU;2{gaiy2l1`IT}FDeC;ryL?dsJ2#W34x zM;D%51#DfY?GWC~PPlytU&a7_6BWqcXYn_eIq$!0KHIw?hvCoi+_A{lk8Kyn17EvX z>DrfQ``-@u1L2s-TxcNsKY#2u{IS3BcMjZ%J^VHj+B=}-YhexWa}0i-feQeqn)JgF z&);UaOO|4s3iuLl+lht5T>+QNv<%L=SbPnS5%@7b{#Gi;yk=m9;mf+<@0$uT>kVu- zu(gD)7WlO%`*PU=hVA?k(Bv{}M}_kAfX{lQn`H#wW%$U@pQvr(*m7{k^C0 zMfPZKfCa#p41_oHH2>hocEO+3Z$U!(XP)4<9A)LGTZv)7eADiR?Q z2=ljILB{H*-Gn;~oNeGW2HJjSp=}Sg9oTfE4S(AnEFVipIr+1E=t~GEM;AGG~V8Tp$KJt4N;maAo&yKV7UxK(?=DVM_d@uQgu7~ahWd1J!vLE~w zP{!rWI`1+q+eeiN*8vs~ZUrR$R0G=pZ8ck zYoM)H%eNF-IW4{i>AEk%ItlXDep2PG-J$d79e`5}-&+BHg)rr;yIA$`Fkq93Uu)p3 z5_muO@^_Vj%w7WtSVy_c-(ovvrN-V2xL3gU3KHOVgaT>b^imG~?7Uc~LHYY6_A

    Qe;c;29DYF={uY0SsTVu`Tw>_U z;n{!qv*l<1+#Sei`B=HwKW;Mddjh)c!1HJ6xDL2Eh-W?V7sl^3@wWh;S0cBiv;EPA zIWF**S8%}4w!}F>y5|3m@f7*ax*TT>22Z%BB+MwA@9pqcd`8}ZOR4Xg)RRqlb+)le^#8wHR!^&{oDLcH1UrbIM2Y>47BaQ>T#RF zPcw4eYr+#vhCeXjgQaKt;BT`6*_YCLsR`SBEu)jx!$+9-LO^Hx%>=`TfNeFGIrqd+|L2(a?FOE2;HhQcG=o3B41C_`mE(Ie za+?Hp`Rel}N06A76Y}>&|laAvR zf0jS})HT}WTFd9utMwd-al84){8(qX%(6|Ej%e0HFX+i*7hnO9zeg3w-kjc3;qF5G zat83Lf_x3vV7&mi{0q9CCjL~o-3VX80De|qw`)+wr{-%tAEH$c9iO*yZAU!Iy9 z;5{b%xPdPj$g~ywV}9Jr;{5FkmJdJDRf9NwSBvulzvEQ}$S;pI0P>S%g#1t&=~e== zp7^yp*6$U7=L7PCfCa$ufV%p=J<`1ui2>Wd!{oeIcrp`HV{3veFBPkz#y=PaXc)ONwI;NFAy#{eG# z+=L0pWdsHygUoArmy;zuP@Satj%S9`b!&69P6L&DdxP$AM@j{M*-;dXJNYuuQKo&11~r5 zJOghv(2nP8P53qgEkCv&{+blH{A~FwT`9EsY$!=**Z1uP&-TclO}|}27y}Hn_yq{OxDi_>OA4KF>zF^ew$MzP1LR z-0K&A_EsBTHwf>m>=%E%i@zQ5Q_Q$QGR^-VT>P`OexCF3XIxSZnzq=p*v+lR)r!^$o?ZYF{&kh4mxV3PW zFY)`}rUADsz&{Gy<8UXI;7MC+aHj&|v-Gsro(D&JEp4@QwAIqlR!c`)EgfyO zbhOpd(N;^h+c?^4>1eB^qpg;XwpzMdV5_CQmbO|t+G^=&tEIafj`mvGYUyaJrK7Eu zj<#Al+G^?U8K;i6S~}Wl>1eB^qpg;Xwpu#cYUyaJrK7Euj<#Al+G^=&tEIz%7ng=I zUC~clE!|q1eB^qpg;Xwpu#cYUyaJrK7Euj<#Al+G^>0G2mX5Yqx?ACFI{ImQrF$^I(@&eKrK6v=RXW;M>1bP}d(k-BR_SP4rK4??j$V{Pg^P-ZKxJc|MqSlwtR`B&D7G-Pg|)CTS%PPPM3g>akPor_<Xgj5&t+bSmINB;p@iuJBWy9|jqzq@K$WfX?F1bhL4nOKp$-3`U}?EZ^QBC*WzyBGN1uhG zEt8Hm%Tjt9W*lvRHvDdd<;qXlX}hGO?UIhROFG&v>1eaG<)WXqOFG&FE&kmC%a!y0 zRXpp6Hd{K{Z0TsTrK8Q3j<#A`fArHPYr|G=#L-4eM;k32ZM1Ya&=p79tW8HhZM1Z> z(bCaIOGg_m9c{6ez7#U1d;+dl0UaPq{E@Gh5Y(jTU~| zXz6I9rK4@url+5_SQ{>djH8W~jy764+Gy!$qot#5)~2JMHd;E`Xz6I9rP~2#^=|2D zm!-|shRZ?H&?ZYqn=Bn|vUIe)mP^Mt+GNFDRGzL}`ZtTGUAFd<#_a%vqfM5Mwph!T z{voiL(k@GzEZxg+HvT}N)$1zSP2tXjTMuXPmJjW-w5{6kK+vXV8rov%Xp5zzEtZb9 zSh2?f(jH42tmR8TZLc|+Hg5YnkV3BkEJb^jyBeE^rd*x($-muf47AxBWKa@Yq@yF(e_H$ltNcd-|yk|oa^nC2^iyUP1+4P-1rCYiKEg#d+_D)9|yG>sT8AqGD#nVsQI~{HA7EeEI>^58q8Altt zm5+Yf+UaO(r=zW%j<$9>+R`l_n~pfz*6C1bQ0d(1f6*6C1a#0a$86oZR>Qjt<%wlZsSWK<7i7S#S?e)H~ZsD>B@y|z0;mfTRL6-Tjlv#dfLxv z8@J(7{-t=*>KAKud@ZGaFZ_qq3+?E%q0`ZZPDh)0X+01}8#*0r+@{;`u!`oKBoteAbmycJ4IB1fRfW}UHZ-RWnvEbPXAlfbcR*}7$O z%ldUITh^R@ddq2>HypF^;~UR7=8V%;u4|ceY;kgNQp-A%Df!M{w`$e;GtNG3^BG%O zy4SATylO?qX`6e`Z8_<*-jlYpY=OX;4X3T!SUjD!w9`Mn`HU5(Z}>oQEpJq8>D_Sb zn_Lma!=v4s;ccj2CbHJFQS5x7BAbt%8k|L;MnylokOc9le6|7}iXDA7TSV0G zeDtx^jEWoLN%?FcZYi{pBp(%-a(MKRrbP77d8B|G(d~Fyezg^aR{rRB^;A|a-`G$e zH^bLjh=&&$-fw6OC|e5gFr`d}4xCGpGRcJ@$YOG6()=2Hem*XwY^sl00riDKJU(BD zbM^825FFMP*B9e)d89rF#MokthEdG-np7gp!SbmuAm30B%QcjRxFT{o2wa0SyhG;1 z*_K?Ltx#Uqh@NRcb=Fr@py_;Zqck1%f{zqU+xXW*vxplWT_JJ#9yE(wK6=GqUo%*= zK%y@;=%*At$DnT%^r-0SfWK{f|8A1Jx`BBM|7>*W&}^>4O3BM4(btDj$~cB-wKI^_ zr1%hcbNN<5v0LU59>gBHz+R9?Q-rk!-N_t5H?O zcw#Xg#FX>m3Lq=vbeTIl1!0euvpnVnn094Iv#}R+#yze-k^#8d6>%IQqNfC zkS`SSt!vgw?d=i`%DCWa@A;uxdvC0F+C??(sL!qihv*a8cqWIhd~`@5em{Mr9u@6H z1jY%rgA=74OqOBfu_0NZ!q6dzHb~GSjpL3j1flo>X8j2w~r_Z{{EmcU= z+L}VH(pDC)IYoWLwX&wimD#wC)x~;kipQXc(PsWZKR=A+1nx!v+OOx0FAi?jhS4>$4H^| zne8;npJ1oG`h20SEgnl&`RD}l$OT%6P}`jUFsEq?=bX%bU4eei4qAaQbF0WtHo3Nz zEz1;4)LC@9wn99Z`9$@ST`{gf0Se7*U7Vk@`MH7Sc_A(ODM!SXHA|^gPS?3&+zJk? zucHaGaT7om9Of>YJ9jQCKUZt(o>$qT*Gxw>#XvV{$QNBl{jGGyWJkTcUOVc~6CHJr z>8P7rN3BbA)JuIM4g0{pvVGv8etqEU`{@JwkgpjB!ai{6AqUk_-|$>QA>Sw~A;HF(!^~hI*A6*!KkcE-0tdAgMgyr`)OOokUL&ip3>g%i19nx-AUZ0Z z2@ZqU7AM6c;hl(RX4R5lnah8SOESc9u4=^!4x}~5!>_qO0#0GXrh5-%do5_>81^W1 zdZLOk<|8I$ClgFtjIL%e6SbLJQXgSSn;dC*O#f8Oatu`-4~b6d!N^n{te$!GGkRr& z>i)_Bbw54+AovVg0+u>JT20r6)i8t#YK_N$^v{klY8*36)%Za~Mb#VyjrO#rM3I4a zj1X8wY7q`tkybnXb9hQ=xatXTSXd-{sITJPC%jqY;i27%p8*r zxbb1^YMHxq>C(ANIo!2@L9UozI&Ya|jyY`&uvJ-E^+cRCqIKDL650;779-kXwjzv~ zocAzhMswrbMy`G0>~swDADHWhPTum3zG9|5?Ez7~6)QEi&Imn-a4_pNLSYX>WwvQ$ zf(knttefhNK~y`$oj!N&(gg{zj6j8c;^bFDccZ*S@8_DT#qWA}=Qw()!K}Pw9N)U; z5?McObHj2?Vp!fKd$fM*r{^$na+QVNSF(P3dMgT;SU-KKru_Qpa?d^-_Fe(|{_7{s zP6a=-@#b{&DKkAy*9G;UBcXv~Wd(~~QqRqy9fdwe3TQLbPgjXt<3RpZkdZ3Jo}#9&;lf<>t|mcV5(AcuZ3*u48iloQTpVU8yU;?T0d zlz+xR#T!tDegrmeuTrD?0rSMTwIEk-TMQrmiEiMzQA=Ep+RNqF292S?EaF?FAXstN z&)2z)%WrLA*~Z);%ZyJDMfcR84V-AUsLPB7&X!}@f5qW%>apw>F3c*y*+MW+2Eg## zc2^Znnx%1BO|+P5np>}@k5RtGW@brjGi#Aeu5Xu(vI$4HLylu3l*IDZ1Lx^+!8BwZ zbTXlCxTnX5OSr|r#<-Q`z#;1 ziuUm&JY8vDlLP0Jv+SQ_RcT+B?CSd~?I+lp+k$E9m}`{QQeJ6RuZ`uDHm`)|fC;RY z8(qS;Ma#bnw0xP-@}1`gTK;hq9Lw`zw&;!WO>=L#runF8ntRJN&7ZlZX$J_ak#}L! z{JoSyo93le+BEM9o95r6X*yd5pZtryH>hmWd?7=1r!>v0FVd#@0v7)u=-)K2MSIt# zxgVviEg>1OKc8ay^FS@F<>31BcLJsTe@1D)KQCx$m&bw9_?Tq$UsT!@lg&CA+xAM^ zOi|WPBeh9Ak|WE6P3qPQj7{pPDBUR4cfMMsey(ZNDrJlkdoIWt1KM2ImvuaAvE$p) ziWuY7Tq(+G4p&pMf_a_dn-T1jy^8x;r23m__5K$*HiTHNLf8#)?!(22+IGzO!;NNY{*N~*uGVD@(Wjflyy&UFq82? z;ONr+W$i0h=TDhB|55+4{*5i`Ps@~buPN)JDP{fZfy%1pU#;uAO@$d-cWLJk{v$)G&s>Yqkw3x}43ExweG z#V28tta4c(E;b0+?>tmL)jA%}2ikWge7oh%F$$gJa$HA&NUi#xOZ{XjIH`9y2FfQHgZ_ z%=H;H&hr9X8*+ats^TM~`_|)NxFN1+Sc>}umF7Od--szCn=cB9ttdx?7-4V|K2r8sGy|88(gy`bZis?}pYM$D+_7n^Ys(!jio(xq#nnx2cdu358Y>6$fa zIhMm(nrfpXdA`+xtZ+vC{d0=K5lde*+vrBLVD3Ki)K?D-Qj>&nHG^#ks#OfevRa&n zf({(co}+7jlB@=z#RuCE)V3T$LUfwk96Q_al>^Za%z@n+b{u0%tjIT?c~%^)mxI+@ zw4qIO?M;eNt2sBFY@v4J2#3b(&akQB=rcRK=#QBBT7&5EQTD_vj?cy!7Rv(T8CAjK z!f0awhf&o)(f}{#W-M=G95)%_7-xl&3Z7KTYD)11H^6W!V z?|U<%e%JE~Mg8GGqF&rj)K}9){cF!Y6!jeY$ZsJbT+-jE2bkcl3AkHUa}rOPMuy8Nb@jZl$py~eeh*K(WAl* z=WY#H7TkmRw3$nmU@E08lSg#8N0Xh4E2NtWg&f{Rt6NXLODOvMXg5KlW{Y;XsEH26 z9Nom~`FKH^08jr|_k&>G=A;*$2h(@nEKgY76}lYq=jVJsQFL25{zJh(Lcc-|rWJ&iUw@!xZ`QYC)PEz-JFbeL}I>>E6)Ew?;)fVH$~sVL^U)wC{ALz`fs3 zk1jOC)pfoJ^1V{g!#LH$mR-+vPmMWPvZd(x$#iQXaOc7H9GG_*IUe!)EYFR3Lz-c8 zIB(8jTFg0>KSy?}WL~N~PBv~##^KB-*X6P-rsn{CR6jDu2)grn$r%L#{FBNDJit zAF73BaU1(q46k9(>A{^Fj1%ZbPr|f+~Dse9OMT{=X6&Ntq~n?8QA3~-;}ZhYiiJwo~ow&NW2 zZjqaF#9tGYNH%gF=MVgseEg2voI(tFEup@ncA}50N5OlHC1HA?58PQ<(IK)W81OE z`5ByV0*r3J)k=3L`{^>3VJ&~9l@W|19I=~|BSEvVtE)*h9Kfv_T=8_I&SG{(TiMVy zd8)sK#CH`&dw2p_s@CbouyF1{tJmeLQkPMyqvEjUwVa||M)MSqW#lR0e#_c}=%XtLcQ_8KT_W%5#OPku5CZ{(hy(=wkOG|yg#bOmU*B-RHr*jl}>k!@lld)x@pplhF{S05-nwE@z}{zqeFu0xO|IcbRAbM zb^x*ZJJTBUamQnXTY2cHH{Hl-S1i-rOk?Bi=%~<}(i3guDBu3su#Ph8p4JlXcHLu3 zk1P2owdv2P4r}o-c#a5L5mGeAi)2R<4e5zLsta0kkeiQgA13SE(o^5B z;S!FV`c4lHbss)N$jqtlQy{^qZ%aV%B_$A!`DjJJR93!nSo~lb=dUL?^S*cq=hub^ zGsF35JQvEPwErWlU;MZcIy|cWJU(LpS|fCyvJOl2q~skORbyWf{l%F&zh23aUmlo4 zIXU+s?nRuz^J%%AVnCsqj@G>Z;{JULjzn4S`KV@&j2?NcthrJ?3|Fl&7sM@?#P)IH zaN{!R^E?LT3Y_P^q~oS0j+*qj!78@6=Bqv?lJY&^zLMZpwWc zp<0P*)vBHYQDzvm=qh6bxl;8dK{f7|iyb4Kn^nVnd59o98uy2mWA`1*X}XZPaN`WA zj)sCr!3HJXrlre8k3&3n>MRJd9x8F~{4JrW;S?r{ZcOs-msLs5`$<%Z`c!$f&qxu+ z_<{#st@Rpqf#akBROLS+X@^o1tI@4=ZA!=IZ3cZoN5`Bm5jQ#2(jOo$tMeRm^ zpDEh@W&2aujw+*XU4#KxG@?bX1XCMk8)rK)utAUP@-yU&jQjiQ{46{kAs$Lr7uPpo z7T^g^l{~G0ISUUJR-x5!y-V@=wB8^iB+ihyWEoMMgQyYAl@UyUqt+8rST}b{O(*h+u3RddxB45kcY1A6}h^6WQ-TGM_zqJH|=v<`kbTq3HVHdfmqR9h9)#(+f*olz8I9?wQVNNk=cB(2?v230+PkXsA&@i9n9=`e#4 z=8I?qzTAH7#}B3>b)9mv=XLXKG+PJw*1BEBbz*x2p%QlprR$;)rbuTJcb)* zuF*%~nUHF&%uj+<0n>Hd-WDHUjJu2R$BOZ3#rQ}L*lUK%QvgyNJRHtMY~Yw*D)Ib~ z4l26b$2>E4z7z+GEm%LPbw5Z(YqOYYqLJtlNPbjX+{l)pl3=-p9`Gs2V@z8-n!&lI zFKc&2^u=pqE~jfTqU4)l+C=JTAr2AIHlhiI>BL}+Ih@CerW&J~HaQuFQGwF7Tr4dU zEuJlsyB$=vAI_%BOo$~Qo@HnKuo7~|4}WLsV212~ zM)dNWueq`LHqac7J`OTkP_QhMXDxApDHjR&SE^#E$zg_6pXJbqS-wnt94qIRqiK&$ z)&=x_RvYzRg$HK|EAdzhE&Xek*+tU~U7n1Rsr?|;9<{dNj2TslUQf|jcrkgg_aF3H zK}|nqcGuR}EXr~-xej117`EBBFyFu1CU)$m(5>8r-Gh~^9sqHjhnujR{9r4~o3-Mh zZSgRM^!gC2jpLwwJYz3^3-M^y1!^hAX{oN(X|}*M39d5_IBj*17OVE2qVkO<6yssc zfD3nBFOoZ__Mx<4Xx|{jK$L5PrRO@lt|iLwGeoH`^EvQ$?Id6Ov%mNESW5S1pVC(W z@wGjfm0LEgSS7C#;)`PB?L6-NH~n6YlX&M0-^-$Jz^N#Gw~M~GCV>v#P?Nxui@c!* z*wuWq%Zg3w0Y1K&ulB(UcrtQ5Q_PP4!0Wri#Qx^q%aWOm{q`?2S!f<-ISuHF*(EzdQeFu`<+>n%P{7Wo{4)kg{1h(L8tg1HieWVwH)ph8tp8{ zPjS=`={s&~NyRO==XWBmHU%G@InBFh-RZxju>0bH7Ub%Y3nlms&2Ps<|HibK16Xr-0$6KM zQnG5X8fNM&pDD(}_tHvg7~AH%0Y5zx?Qrc>>3z$tW%SjI#v&f4`tne+wY}q1kgv$d z*69WeSxJ!1>O_t~u)uE)uG#UcHqkfB^J+};l3+Pr{4!4Tuo0Utu3`_sswu*Q{c%*i zL+!d)zv6(YzInPV)L>yZAuh*`mgOxGvE-DGR?*In1H|fSG7_#wTaPjm-#sl}#{QJn zp5DUWd|U3{hf3RbNn=*Qf_8l?Yv%|w$tKwl%Ki*?n`8YUFu!0F9RrF6G?WIpiaA*H z{Zovy@1FU;biS3L#_4d&%7-i9s*xM`FLGq;=10Ave@}_vSH7axQX=^2 zujn&e4wbOtcfg|Svf0BtcYYEq!s;wQ@#|pG9SIaa6c&A-9GlU0C;R05a#-}3L`+9a zyI))KTVm0_ASS0Tw%~hZcxn`L@aB8K+5vgsht04zv-8Vi5tdVNu1PwMvHH;1G(-(R z>`rn?Ylh_KZbR`~WznZ|VL`SNbw3tVxv_G#ffpUYxG-eS+%?XKU4i*>=~5fi7bXRT z;0Mp57ZXhR?X&3jT&0bLon%z>m!sefFK45N|H~O_L;0M<$*lrl|KkjvnQ`eg527#d z7gzWhwdk{Whe$L+SbjQ%PX+=IWKT$+NAa zc{VydU?k=!ypyfq-)PAXEJoLG@M*0_=N=XD@dPva%*U15QTgc6 z*kL;4?SmL5US5-J7xL>p`CN&t$w&XXfw$X6MW6I>AGL8iHfr3bQ{rAT>0Uh4WvJJH1WF z_N0(K0kX>crzO5GCH@yd{Bjho zHly8~IhsH@D!N>rgycLcw|A+v=oMUTtID4s@jp+*%N{Yh5%G9+n&fmfOxG?azJ3mk zXKO)h6f#}?U7kzT!?Dy!UAre&qWe3MJNVV<0H*}*#o1i!ZP>CYu`)GFM_JC9b!E8n z)b&|n$yV+-&%MyvuS>DO4HlUF@F@okB-aIIf*R{z`{wEdp5*<{Fo;b#t{~dHxjMnb zEv`$kDLg={OWFi2Ipb~Rz4AV9#F)h{7T_iCo|a=ue(E*)J{PCs>?J0=q6Q0z!+h)I zXJDhp?eU`wiV+?r`;=UWiA&kuh&Wdf}U_@P~`=A1&aS z5{fl18rE|bjxg}7LD4@n#ZTZy|7O_OxBJMwWv-X?ZU~f;#j`0?#bUl6nMIurYas89 z$T1$HrUV7h_X2TM%gL1QM^yb-J?Z5D>J3*ZiX7 z5*bm&SKZ+z#S)QWS%S#x3wRV27BH^;JN=Uq{MK*uW0Od43~1%UKucw!8F=3ihcmu7 zf1;LGOlznZ=Jb(*;E+%BAqpLJv0cKJF8V1pTRGp=W9W#4YS@tH|^BL zPGhN44nH_?@Uz#zXDj>7wB+E0Lop|igE*$b92ZV`!BI)SL4Lp)>)b89XKYyE=F2qJ zkWRl+P|6*|KxJf(;Agv||Ki1AeX1Q>D*H^=D4b&RAR4byK;y!bU$AO2&V+DrKoB!6 zA{jl_M3+g8+oVE&oNQ)rFHK%n&RY6z^S(dZM?*&~;8D+YUVY00Ia(Xcr_ zwxo~!6W5$P(;e>5g80?-=m*@K)a$!vv!hvxnj&s}nV;M>MQxi|60x}L%R0rl(-2{7 z#eM8-n;14JUQc1Nc`!6T>#UiRupNy4=S98f&;O9oqf>7YeLh7X84YB0Tq4l01Oqf5i;t) z9?y2QAU+PHO{-&E0^_8~a`T2K&Exg?qXZ%PvN!8_)H&~2}1{#C2hlJ z%IQ&M5%tb{b*Q6iHeH?+pvlxkWAG|)%*b;JTrQCU2hElFSt3t0Q?XFE1cGM}K{-`6 z2d873Ne`bnoGBwOUJ5adm@avZc`~8~Pi(V?;Fam~QI-X9w$bdkuD__LY-(VFhCvuV zKP|N{f!6*JnMVzwriPzv3y%xp>sbd-4;s1%wt>TTL-6YI?PT>YB3A^ie387=kMC zhGZre zA9+7?QD0)u4hX%??6M8#(CPAa1Y}&<6u05;jCk6SVAVd)SKSPh2)DDKrJ5sycR)+K z{8^7@h zdVB5x-*>b20F-zMtNy^G}wBZ0ClV@dwyd3T^03V$v!* z4q@YiVd!rzDn>0qwS72s95TZYR)%GUq0TbH5F7Nld}R$^2M`QIpZ4{(FHxJI|R*Id$@ z1POSKH3a4Cz)4v#c_LrcdO+lgSyKTm4wY4 z8gEab;{+6ANYDJZvV)1U`9Pae345%r&9iQeGOzIU2ArADYxr4^{>dIXL{-{ql8q5^ zR2OC`s9=^A?11&ghK#GeXqH&IuqnwBf)B1xk63?J;_g(I*+gd-@!8csL#dM)gyC$;_>|5jQG9jFrx)9UzYIRW7*;LPdYrdvT382n=&eI~*f?SXE*N zJX8_6bBF6hA$MkXVjx=@1+P|S+he%~BULBW1`DM`EbtMNYy>l5ml$G}6#i7^gP3?ZwSVQs>@i49-DN8>3>P1|CW()oWhSE$w#qHI|`g$A! z$(Z+XJLW})a>a%(#ECf%i`A*nJiji*=4&@xGi?Y{f^21UM}=uaLfUwfp?*n)a;6;* z(G*VOm0^*3Av#=h!5;{U#6P3Ne0>Py4TeOC`z7P_!4VVJI*8l&v;UO0@!Tl?k#_Ql zQ}e{0ec(NQxRaO4!JD2@XWZt{*h$DH$`7t^Zs3jxTkHP!DL-SAHK1AG=9`-Yh3R8v zncS2zUUnVqVEHlTa2(_~!ifY#Q%RO`4Gvww?(bT{P0L6-vK{31PQM8vqa`NDDdBc* zhO~7)UBWic%l^<;0UH&!vm2>9JM4*+B1wr2-JxdWi9T+&Vbx)BoRy;6oh!@#V5xMQ zUn>2COI*KU6V1Qk&a`!Ec&F6hb^(7ZJ$%jU;Zf0p``DG}0Wau9wV*j*)yNT3xA~)F zmci*Ns!KMY$3Vv?%r`9(gFV)QYgWtD*I1Zm4wB_;gNwys(PB)MG6s&r7&x|c48$8p zB+uywvo)L{U1U(cHH+7(abGJJ|D$t?`Z7U%kCW^%um|)TS?r)^pj_O@>e_4u*J)Ma zA37tR%uQ``nN98LlCk>R^gVo7}Em;n$a;{;x~t(D}rZf5bMJ7;}#?j1M@8gTD+ z-27$oj0hgE=JTp7bDb;^tJ`2#m?>KtSs6+@&Bi!R#aH8G<$F>Q=SV?{x;g##SjoL{ zZfIhMbuaH9479^S2iU^HzNp|fN*JN=>M2?08X%xp zoO|)|mIxlwM%ZGMjo>B^?+<0y;pPEN7YkxeNG61vJA&X-{^(0->+cT-3%$R%h|dPf zW{4_FthBl4=W|U_BcE9-dj##b4N}fv8-Xx7F>YAxU(zveFv;OvNOT6kVqOOK=*o+5A3FM7rr-^p(*C|)$%e_z7F%7(K}0`m2+kteRCxPey!zg| zbSxU4L`5(7{|YU-zcg%+^fx&R;gRIi*_RQVe3evLMUo@Pcva zm5=_*+KSQ(#vb9nf^P3O)9|JbdiA?^>~4mn#bB-64{dHFm*SN)m&us_$3lH%;oHQRlhvP6UPsZV`)ieCccRgo~$Haz(&M7@E z8=WUpRV@q@ygs3GfqA9DoOlTCX7JH#*ty*Du!3_(MNhnh6_Ss(^~4|38lr87qb4kd zg25x)T4xxsC-C~7WskgBv6#SzU~CuuSmX0~7CA6OE6_{0GqIJBZPpZgf7u+#h+zN; zm2(3Qq*RQ%WSv{nGfbY65k6zchJ*B&1LcDedkaff#dk+maiLSGf8y$>q3593iFWv| z7pI(=>B_;&A~4|;cLe$wCif*|J2mEHsZ<_3PUcPAY&@AI(%pnCfpJnq4d7vRZbhRd z#V;J3`Y=fq4=R%=ukZcRrh@DIT9pt{Zhz=U*<&c(L_n!S+obhStG4yvQt`Jh>|xXT z4(iA(;#f?!YqlgDhEy+;689@+%mU}v<8Mt*L!hezR~4SGLTX6XE7dK3!s@P!>U$1~ z8+5|e9o{ijFVD*dYpNSsEXeK4&%A7Lkp<~L+D*K-Xx#y^PE)%hvWAywEK zA4Hm(s0Bk7>g7z`LRi^rTjB*pyP3kXm-CA8vLoa9t?|Mm-P$8l}G6OS%n*HZWX;teI6pHG|fk+}`# zL!#K}43kzi%v_{#H<8>GBYO$V-b=y9DIkpINBJ_qmiZR!7p7^jIrP}p006jH6S;kx$uMk>ZpQo8n8T!b(yh^WYokwI zgwwX@4XjLtMAu$~J$)ToHv^-Cv!{DcgTnjxHas?*djACL!;H9v5&E>DTwrjM2fxRQ z?6CuMFSmS&3GO_I1kz@I$OH}MWq$hA3tSrGN~;lyg363#C4oFH{tzN3;-p2*_^dP; z-+U^qh(xNXQW*xNFT|V@PeIag#kiS_8s$YVjfMC~4YeZ9hbAM0gFy@{jd=YFmEDL> zQh16c2_0X+Get+{qX+R0b(E`O1RDC_Ik+qjLg*|P?Z*0&AE?P;hroxfq7&trEPf)_ zmO6%6fThQ50P_lcAcKz!tpr(n37IB9(Mqh|Ul7|lcDdB(BzX<~SeSrSd7=Tl0Z>E7 zfd)@OAey&2rkW6Y+89ZXgAMGqU=4^9#}M~aXM?Lry60l1P3Q!u8>EC0WOZN@dWSYfGc{0i`S}RRG zk_1GVNdjVF0*L6-1W-^QAsC8D2<7;(ixpQ56osQ6H^P%O{R z|NC2O?{m&Q_uk1Q1fPEXFUs6|&)IeD)%V(Kmzo@;*iut2wR;3I1g)x;9;LoX5b8r9 z8I~qysY3ZqLMwTI*RmrU$W~ZSrJ6TWqy1O@R8Mz2b zbTzoLlu5q1a;dfWtqC>Ptw7dOReIQEpyX?x`wQhWlb5Zdx}-WR4dE11#;9<*S9qpA zYU!0i)MPk4eMEX8x;>6euNUhttqyNy71Gz*ZV=nSEOdQ|CDqzmZSa`KR2#-Cy1Qqm z>Gzs1VN-YyfkxUEL(@p^BJZEai(Pd-instOG+5+lu&Cvl4N>gk3@**4$>hT{`x>SR zm~5I?c}z_$J;UL2oWlu}nm!yMupITU9s~esw7Nb`FW#o{q8>f9-|xxI*K4Ukb5gSB zXi3q2qv?RNLbl(8BcYPN_{tH!lDziIMDf_a`o>+dzRf;6@PQ(*yZ6^m@6CVp*%%in z>u}vy9i$`>zw~qwPaDe?p6*3~Mc!ERuX|Epp%*B8EtD-hEqpB$u#vTHVTt9EvoQ=6 zzX}BVs@f7mQ?_{&$Z`-*pGfdFI+PwbFDNKkqLc-csVvWROVba27DDlQX7JCQt-p z$Lf)oPjO?~=p_dws?0<%N#?zZf%H#eTbA$1fu?KOPS(s7Fd=j_JzvQDRg z%NzQeoNTEXa>AHraF}$mB>)s&hX>u{5<(a!Q~Ar_2xVdJ`sxQ|^tq#fASD_oG{V3h zvCJ(1{zwA=#M0GwG8MCnB@KzL>2m#NV5Ykw5GhWtWM`TPCq4z3qN%hHx*Ts z$U-%ITJ3v>2Pf=EI*xi1mz0#>`xMaEGc$UAM^ZAdsK>=)bUumee0mBIiZ+{<#_+K6 zY!-NfXyvjITFj=`W^-!o`}u6fQLkY(H|zLoaW>;xz&GeJe;IGtvgK6*bfJ^?%I#dEdTqv8x!IHT|jmbeHZl$PTtX^VF#Itlpi_}V3 zWO^q)Bj0i?>z|$`b7?Jo0@XyvJ;nfOx4VC)Wx2Pfo=|@kB9-=&B(?Vatf1;Lw2mP`ihn7vpin8>?dzWIp^d< zrS^QfaF6J)SC=X(j|Mx>Y_B`W;e9J?Y|?@yvdD<9ubq5VK3B1L_G8Hci#rT$h8+SK z2KaQ?UqG(77ftXL6JHRP#c%FFHU`+cDmA}Qm8LkaqDd>>aF9;~8Ey|{IF;{^1?lI3 zRKb{l)2q8z&d*p{rV8s~m09iJ2x26l$d$2TnW8__^k*mi znIZSHJIA#dTh*UV`K2f6PnZ5o)t~A5L-NT=vWWQadiH!(*xHe4T0-qD!*=qcTal%5 zUx7`E3kRDf=|i){yfLsGpsWl^0xWO5nmJ%?%2}ah7$z!qxD~QAroN*wixhmaN(55! zDu;DmO>TKw1})Qg%4yKpe!j*lY}s+KbdZW#i-=Z3TO5cL=!G-3*`r;9aYIp{G$`8j zwPOKLstJxrOQ2@iQRt7T*@;YA{z)bnpW4?I-J)ae29ztgdvz`M#LYMbzVe`-44Ywf z;U?sg=5jcknRU0w^{VJ=?J!sF&^8z=W2rPJ0!)h`d;O|#wJK;$u@z0{lSaioi`aGS zFExabej$b_S;K4*#)@tNDu`RApa$ok&Jr-+q)%$@j2{<%h5X_B7LJFR%=~>ki8i|w zFLY1nHFrTRg`9VnYkJU(jXl{5P9}`}LnRd(=^M^G@uUfHw|&PSR6XOYjZGt5$t7^o zaVMPmC|pSS$<&akp*`D_-?mg_M|rMQR@yQmX=DD8Y5g-AdoV*l;gQk~$}MBRzJ2W1KOFn@&&PiKV9VDlMT{4U z&<8lp&8;<=4vLb9cL6ZlfxM5u``kT9;IB z^$cU9=Z*C}w<ZZp%>?1O1i` z@yf;9#VhN1-L`YUZFl#NH-;(XSMe~WoIeu9)DYBUAxVK<8vkram>3e%WI0=qE)&=b zlA>>m|8gb!vD-wI(zdibTe1tvl;m&?z zOrhNyMgKo9wL2uGfY3oXUbJ^K)Neo8El%08DURsxs%bpWN2CqvgEW>Uep7P4ej)q| z^?sxtU!R@Da&l3kSk<*-@N4YS$5W*(nkn8(^g;J%dK9-X_oS7>%!S*Qoa^Uvi=(+_ z+gjDs_Txqp?OLOp?Z;0J&_k5+5w|Hqqs>)?Vjp);*BTgDUu@SYvLW|JSY(X^p{SfY zEtdWQ{ac9_#1elK6V-f(Tiqik>DqIE#U;j^XVS^6hpkZ=0{v8hXMTMn_fJXZW|=D^ z1sB4Js((XaJn!+U@UljXQ!cJb@~vWaE5lL*oejQMSpmwYL%yTNdvm#bfqMKY58JzK zte1QKF-;$hO(*hXc_@{_tmMvr=NkzL=4g{uUc}_B41xD5*b@r++0HJG&N+PUI<-;~ z#3b{k8C##<2_Cwb_7(rGYfH?`6vLLnhyX7|ty?`am`yeD@J@NZ00qfM3>*t=H4Af$(mE`rC3%BGs%L?-9Fv|s}UEDRb zh^g>{Z3x#IPr?j zbDxjUm9Au%UTK7PZND5-bf;x3IQmVU(kP- zR^!h}!@l_gYNscozC+APdHN2JygN2QTzy1xl=0(~yzu~DQL2_=hYR*f(L5<+(rF&b zyQwke*jg^e6xYeJ2isz?0aD~KspUzuIhwSl)+ zilDna>}Opro#yM^2MX^Bhc%3LKj!c1f`079r{f8%ZuVuwz#;sZdx>KcKtOTf^BL^P z%8jS}W!SxxhUh3`gSr^eWljF5Nne8+;Qd)9GMtwt$=$${X(&F9XH8q~3kAJAAAZ=s zwxh=5b*K#A4P4AD7{rV<<-5B&pUb5n7cb_c_X7wZpDZkdQI;ev~)8=)x&kNtalw?28^G$|K z$cw%It%oc!Z)xQ6R#%djVWh#j?M&a<3IUv(+^05ePI<9co{g2HD59mtoMtDR3g_!q ziy{8TLiMbHmv}#nBkSh(XF(vV3U$sJuUeQ?RfpVP}tIi9#*NS!3Kws5Z=hx*r zSE$YkuzIcqpyzn^Mkw+RA5(nq<($i9 zM}Y%wa^q`jrBa=n?!*Fw6(+lloKo6i&O%y^vtw~kL(U@f@HDe)`^Nhd3Dc8l&C^e1 zv~P+6cBVTViS8uIM6Rg(8!~ntw*~R6E4h*#s!H;=39{mnm!0pR{es(CHqBAZ(=62F zhEwHUeT^A9?BVs<3V+@W!GN)LIwSeSMh>FNF}T!!xC$p1{ z8Vi?LX!SzM>GCkX(`*>;YBG#F>WA^>Cd0UU9K(2Nb7=g|hVk}#XuPD!Fn(V@jK4Q2 zazQN83>qDK8Z>^nQ%)7OC>Cvyyyi6d^j>2JiYCWJx!3KbuqacFG+w)jjXGuO@kP0- zZWvzVZ484VqA@?EGP$~|8ZImkUF1naUwj%E_s+Nj(-h-kqLw1Yfwg6f`+j+Hj&WBp zIboc(Dl?3`zHV{>otWI*9OFJvH#slzUrf%59IWOFQz~HGr*((S@_-kh@!KXNeOVl7GiU^iyRbYA$GE>5#=YH+ zL1Y+rm)pj5822`Yv0ILDx7Q8BG46c~gCg}9w_Dxv)M1=)&1(o@5ZCOSz|Z9D0lO@=H1-54c$CsQd?lmX7iADW4qYiyiYaGty)f>(*?qMVU&kTsU4EiGYX)@>_D{^Tzvb@M|&a9JU7d2_+ zPu@z7!V_Vd^>7e}sZ?j@hPAnsKg7z_t5shu5Iu!VbbKUgRkvn}Q&hRyl53+@^sUXsN$1AYIf_Uk1k2gY$uGY6UIz6%k}F z$OdNmBrt1B{t`#_$?Rn|>d)e?Y(BEzvy-S54Lq?*>JLNen+ix}Y|flT$;UyeNqDEF zqkkhSBAbMxsvml;*L}YO+&RKdh6&#|jaXCsC#b9P%Rq+K#Lu!O>X_;4>4gvzEAn7g zM7?k=$}2-JUn%x7-Fmr(UZ&AYk9wI>b#3rVe)*A)#>-vLLS^MTxEDSU0q4+W`oP{* ztmIR;gG$*HI;kY(Lf26zv(0)->X^?>;ZP26yS#lSx6WEs9Y=Svga_wGPVjX{UMWb$1FGA6Xqxx8r zQQZuInOWInR3C0Ks@t|Ys`nPC<6BLrDH5@SL*w!k0D+yz=drN&*ks!hSD0maz(& zCAQ6)__ANdQ&eC+dQzcRINKcO3b!;idYw0lEbTTpCT}cH)K#7TuAAtMjT8M`aiU(Q zZlX7oCVEqt=%3wFQe?I-#8bjVy^+F1U*9;Xb8i~b|_qx01vI3-|ApK=dEM2~4muAFL z5Tw6})N)f3YWeus)Z&74OTpb^1o6QVKe(kk;&RRpuG^6D0|}4j{NSZBcY?0)yG;10 z5n%svM8*vElas0&_rEQ|Ah3d$oe?PdeN85Jdz{=ivzI~MB+1nqoZ25%*16u*ph@pi zOV$=O>Az=C)< z;~nh1 z`RP0Zzsp;r--Qr^dCAAxaW=*?;r(#YHd7`)_U{$FuJZo!#`o)<}Ji8blqZ?S{>lBON-K6Efp?BHZ|@cwAW+YH{_yn`=3FU;WG%{$f;!24z$+@cO%6}_!CgU_W+LG-?JLkFKrn|8qaIuPZX zB|n=W7D6nvB2c*aO=7U{d2smc`Pe(F+xFQ-CLSE>Vbk@a$oF>kQhur3)EU}Kkt*<7 zV56sR)V7^pRXQ!XlND));@?TiKQH!kdonAzr>^oFLuC&Ew|h>TRsMCT{NuXHmxs!) z9J}Y=hRWZstNe~o`6Xjl{&T2&dtK$LL*)y{uKfH^jQg$%0J|nU{fj?UR7kTqzc>{8 zQeEZ$3{QVIcI8)wV(g_Cdj3p!`s=YPzb+KJzOM33;b~aFR>OX4DE5)M%D085ca7b1 zT$K0KRsL3}d`FAQZF8cw{$~-~P4QYaf^)mOXDJZI`P=gq6jtPaZhW;RzdQ#hp|G<< zjDAWKv+q6rinGyRG?{J&gv5xhtIo$>IyNOvSX8#Sn*5u4t_Y&ksp$iF7y=P=LdP$f zeT;MwesP-QXtN{j*v!yOV+VIh+SU(AN737oSDfp+An+qnyej-+t;n!H&eZgfOAH_u z`=}r{#Xu_Bum02Ta8rz%o`=H`hfddSbl-Lf+ebobM)}-whr50^+AmJrhEsBdu$^3n zx|A(m!q^zQgG~0F=@&j1)Vf&u+DyyP&Uz%A5hIuARM4tZdh!Cp3YM3cKGLZ6O10tK z6?aa<2?>PDA}w!JTVD%k%8f7~{7z@r$XT{%UP_*e(qA;C>L^Wu1BLC^`_<439Sd|Y ziLj6?)Z`C(cd5Tq6ph`YO|C#SkQJJ+kwO+fKO-EDX(#~zl1~O1)~iCAU+EZ6r<%D< zeRW$iU|DAPPS-o*y+)5S?U*1(+ay@PNKUKGOXv0Ge@W?)&omq8pjxqexVw#r=phS3 z+F$Q1=0$ZxrKPj#ss!jw zaFn69A_`Fe&aP#@<&q^Ui~kPE9V2&c0;GQn+V2R+RKGrPy~>}S>>Ysk5x}H+ za@|68ZKl=Bf=0T-S{+uaAK1~YZcwXV+|jMRMXml|N4IJe_xner)mN~9qPQKlS~k{q zJ|eAt@)2qETMez2u|EEe+^fv3>WSbhLV;gD>_&~V7Q^Pxq}dl`oOPQh))=94*7~sy zs?poCMkBk96O9uue`ai8S>V_8tsbvdUmSK7av?D8R+}@IOV#SzvQ{Gi%43VaV{c;iBVdL>s^1--Ip88ycz2hg_Yl}*%2zq(a=CC6k*iO%tc zqB4n6Cy);tIvd9J2CQ5o;O{3rZ%gfvJmT^*n$a%;8gaUJD{znN(m-`Ce4?>_zgoRD zz=kcL$vMEK1is#`#}#IMm(9#W+f(ODQ*vieIeFCeJAjTj6X>@c_vSwX~Pb3@T|b z=?B1Llozofr5V#s%&l^5Rg+I(?-bvV35GjAC?NwyP6G@zyZ0iQ*YDOGi1rjOB1acR zBnAd>ZxI!ugW<|y%u@w^6rb+um(1)5ntC4DJuQ$~xf1Ofp1gbt2^Sks`EKjyZsE9lJLGIR8Kk7!P zk;**~M>@K#BmHXt_$oS#$E`q31|7Ehg_8#djd+!GvtaG1rJLp%ju`2F!lzQY zH|m|~B*5(s*;zGVZ8B}tun82F3q)QkdMJFw?M!+*T+Tu=+f6lMnbD+|smp2bAWsj` zm0WH4x4#XgPfdBFVGsRNqYa7S!MkwZdhrhnx%a zpC6#_Yy(_1`UQbR{|%%7j2F^Vg>+M^nD5Tue`K*~k!5zlVqM^qKBLg(tJUR)|Dj#} zNL}7DD{xWH-ZO3yc!_>NEmkk7?&Eyl2ur`se-7j3j8f)IHjZ~8n=x#fC|b7O-}9yGmw%#pAHd9_0Q@^HXVMlMl&r}TTGz_?q%-`n-?%;$#SMS7JpG1VjW zV>UODJ_%Kp8&4OZi(`_A5u{8xlnqJo>374<)gw;@M;c$x1tTR;a!Z*;_u+G{R=FoU z@^oxkbuW^C!ZlRTu4@f_6V?~TpzE0>7(i20U>!eF6TuugM7$<2&nUmN9C|%VQfed! zx1{DdP(!d!OG7>n>!Y*;9;jX9$}Tkg+NRx?3Gp9=L? zB(|^9(#TJis#zVbTW*t>sFjm=7U((zEO9NZG_$SyaRB_?-yC2Hl(*sPf?vYy>Vo>G zy;eV5T~Lmss4nOdl9tmao_4FV0|qxBAmW6$ zKdoPNFk^?50mk!de($t+yNiJ(Wqhslj^_N~ss90qzJj@kp#KR-G$-Aykf<*HaS|mR zp?!PUB&sH52X1vOoJytkvq$JOsjXuBA?2{e4;yDBP+^F6AS0oU#$<;(m{7%C9tlDv zwc}Rd1j*nw_}`)!s9|bt=D5fq+Zi=+`NhmDmdUAS0z5D9N%e z1-fz_N*5WxOIG6BGpAVwJ-;sg;X<>!6oGK|H^&UWAVi42O+dq?1k7mOpeP z%R~+UUzm82RI3Hdp9j`v0%<;A9M1W%A>iKw2(kO3qIBd~2nZIG)DOmWX2YyBSRK<4 z_7pWLzhRoxJyM7yq34&r_Sw@OJ?**3Zs6gfu1=({r2Ja6q~W83m}exC>K$lhvPq=g z_@`&pm73G)x7Ryd^Q0AL8bkIeA*uw&6)mTPn&}{(RK3jFDEs8vnga5VWO|lFH5`eX zfC`OsyB`fU~g(6|n!uo_WsjS&oiw|?#E7$EL#WD6N$Z!dX2z5xRS z$!4l519L6Z*hoNYM+;l^fs4||0X?mH4Mo;;M*YEO+8oy2n(MR()e@M#KMV3285$uBocV@(Si8wN)&K)ncbsT;?H8rx&#DP?Ea*ZUgoN1a;o&w zl16W#*F_~Cf+8-5-cj`(DD(R_k%B2}NL@9T0)Y^oOXE$b$@zmO=HE<@B>BCk70lykU#6oA-G=-P zp1{`?-u0Ah&MW-LL!&YJp;j+G)#}A%-2n-V`{m29Y~{H-ro@`R+G;FU=&*r@TIr+|`oTVQgTvGE9rm*GP)VOq zOOLLl2Vzrt3E^V+8tfU>lU|AM(-yehu@B zVd7k?P2&`LXd#|UvtfhPSug6mY_fGh= zRKK!!^}q5#sTJ)J4&XmF!Dj2l+8oj^cnBHx<~6Iph9cg0l|M=kaOS&@VGn-cj+{Ac z1@o2Oi{~(v00zNVAo9r#@(U$`2byYqNp+XEBJ2Ti!!j@77lO;~ws8-LLe|8S;~h7H zbpR(Ql6QD`G5UoNLK;@dmaY7&IEq12R>`txxpW5|y~5Ju{mR`#RsgOS5v53L2y4WR zWZav=^zX$kgIuA8xb z%B?A*|M99zf>V=>^x3C|)2ct!(1btmql9Gj?%G=>enp=9q zxKa+ddsAy{Bwfi`rJnyXZfR226_n1d3xVxxve-Pf7z80X`25r5vUb&*{~pp}XclMM zyt)W>O%~VmAbC3XYcoepdgz!KZ0UOi&Qyd5+2XtFT3Z(I8`bgsimjDYPhN7Ut}!t! zwJ$`^62K$ICAY2Q$xXy{UO^$f0YRe%+iA-374NEAgZxA*U9<@+nhL+Lj0_FQsI# zBu8Ql+`BNuYcU;XmRdsdlJ=$t^Hp47H3gkvKby;6hf^&3^#`Vp?@4QN=ljiC;$cqL zl4OC^itKy5*~jwr>16*jYMsLAX4wuTHL4Oaoxt!jW71>$gd#)JachGM=^W$A zc~F%Z+P^H1Z{}g5UFSTG7g1dtF#RCatEF-A7BD_7D`Ul8u**F(5>lvcP#E7a~mA1D@)04r=|(PmNqAI|DzpPpUtM^5k_#@ zG6)?^(Z)k15F)D%hAV@ExZT9+LCGnjW44NdLb4*G;aYldlj*q&1T!sD`11|X?RmD6 zO97hVK;$Sw6^%!?;%JKOJYp*f6uL4-Z@5fHmmTTrWE(N#NRxv`0TK*|%M>Nfb9gV| zJ~=!it!hrxR=E@t!QG)2H*C0BMi(_hvUw<%QN#m*1K{f^w0m+ib9b~Ju&N56tyt^G*o*R24 z4y%>UqMflmhL06aco)uY7oKjSZ2gJu{LFXD%&5&Xu1?6s(naAU8Tn@nwWo!9EJ1Ba zCzL;EW4zy>Az?pzgYC+jdWR)si)Ve`yQyMNFEO`)9oMDogJgJsXeA#O*=x^G8Y^9L zmRGvo5>3QPH*>pzC_Sz2XLWvNxh-OyH-$Q$+9TGvy;SGAy1{)l49*i9#yYPfdt9-f z_te$-Zm9D^f2u>ROz6r|owxYgT6q26q0%?%Dt*u^wM~yI!|$YX{3u@=*U544aq@F+ z@-ijWo?%0KoKBZklAoMsqIVCpY*wtZc9kWP;bb8)getR=i!F*FPVDc`!@dT96zDpL zMV`M({72AqdEA?VD{xHo^>>tah0`!O<*UOO=a8fiHg)+^)DN#yLtVo zk=H)*p}LCTRfml+xq7Ti&g_jd;tO5~v4460;FQ!=n!=vwG{FNUBT2$lkA$~;My++w zv>HN3^vOJd|ujnw0Zf?TZ?&x zKvqpLeAN-tZJF2Vin&S_*uYYGZagIafJ~B6>&GDtf+Xcts92aco9IgKw9)ADL zVZ3OoFuqbS{^>9zk+F79F`(@TfT(rzYeO64u%~K4Cn$%jzQChW8((}mrhK0f)?c}FdFhp8HO}&2{|_H#3l4~nSXscUpv^M zu-zFs(+}BpXdsA_&Hc8m)pRjg%VRlhlt99h7ME_Fb}T;RR~7S*Z7yK@RJ1$CAk9TGv;32It1nT+!-94Br^sv7<4B`GBX}YaGputzKLh zc3~cg(R_Ahiv{_5s~4{gr+&sgnt_3VD2JM}us?X_*+z(57k=k)%c;kG> zKkiB7pC{){;d-6bVquF`ylL{vR1``Us~4F2Bn74c~GpqK97k zs_IZ8s{GL|rA?gwSvWq7#>F%aj2>l{m_w6L8!AmPT3H2KWAu{+lW}466Y4tJR*Y__ z9kFFhI@n>g#)Z*Os-NLFF?v<0RuhcAF|0TkePG1sV;eF01AG39V)XO(lC0u_ZjjJa z*|y>dK-3u8`L9?!}rdFUn@d zP5b%!`JS{KN@ACLvpL|NA^p;^JmQq|CT*}EYt`hPvB}xAL0Z^sBv)!AUu;tC9eQzl zlNZ*}kC&B)C@yK@RFO{F?uVJM1=`{VaGBE2Sb|ioD0(KrJkh3lJY#2$^g(v|4|@2I z^Y9xR{@tzSbwz}e`HltpY+g(9SvC6_M=hP)18|w+P7QP9sHe|yr9Sgvy-VPJu+^|0 zTG|@i1XSnXZt;VmbTtg+s5lf4taEUu>64m3dt097F&qZ!=l8e3@*7&CP&4={?Od4W z!vytv1nNth4C{S*@#ozg)C2K|y==JP{|z2nKecRU_QW_yqiwsXyP2nCa`hl~#o2Xm zp0c#A4jV(OjEm?rpe#sY5MW6}6CmtKwyjNFIY!;v7fwh2gX(}I*t6cV@2wY~_*lmC zq@s;@PN>~^9tRI6CVPyIB)j{6%yIJQ5y>R}o0$Ix8(W$4Bg2_rHBg~g-ag}CfNyKE ztd54!(_dzQ_V$CVs@>k2@Rmk&>}1<2qrmJd+oZ;};RhT14nYr}+eKMlT$OdMw=R<5 zz!8D+@-HP?x^oHW;i)PbHs9_U6z7=^;hR?+p|9%`euJ7>6`tTqHp$Rs=kGg@H&ZVt$#wTa|f|D`-%XX{}KrM)e!^y z>SKw0sT9?l-F>F?CT*7@d~OXMY|lUuHhDxA*|C$hODUUZ?CqEHhXmkh_3c?L1$A4k zC2R}FO_4r}^~Ou1ZspduuVJTXE%p2C5Eq9Y6wHgx&!-&@cbPBG+F@Y-_RFZQIH@k*ybn#E!D0Tgl z@IM>Q98pC9i6snd=PuirHOH(-O9Hg+)qu@nA);AM)@%pYPs?j>LyvpxOd+lbbnI9z z?z5;xoI0FP3!6Hk-pD+NNRD4^kkOJ@(E?`I5nS&9Sdp%d70`Y%p>TtH`^!M;%eHR= zx3F^=_oV7JI*sA|V>fWKjXfijdvw>b(mCUN#AR|87u<{Q>R6yYNt4#`i0ah|O zRW6Y3T6JOeCT zJV`^@HH>bXsw+W9@>EsdcYCT^?~hgWk?pB&y2HT_VvpOADr zz>{*)f|Cn6QKZmTe$ginW+q&TjxgW7f5upaVUAXqb3hbcJa*yO@)ND)k+BQMmX(3Z z=p1)IRbB?R3Uv;SQnD6^tFelaBqC}98DSxtu6N<&Hkr*x7{tK*}& z>EwkoPBEEJop1vf1+u`?FEpO^cX--V1-}>uag2`ofn9E|P;ijqbtAsSUOdQ%lZ5M=;{?SBn7_dN zBEX%Yt1-my3}-t%jh zvpEl-XVhRnssJu(`>p^(eGM>BpeY9{6=*8;PTNP~D)wl|Hs}Rp4aq7PybsojEe9^X zKxht(;W~rLR|Kx&<9FHP@7eNBt!ab`LFLO-t-1Y6rzcOS6^^zUz%G#UdIpm;3OzS! zTg&QD)Q;77AcBO_o*YytVF09X28VDNJ|_o6g(e(rso0^au;?WR&U^py{oecv=<&)C z(W4}WP6m?bEAccn9xdqx#a=*-L6?(3NwQW#v8u42iTcx}KlIMp(W_2E;&PA+N@r;DfFEK+o-JaVha+-cep`lN&o=@{ zmcu~c6=7VAQW{Z3aZMq(DNSbCBaJpZvO~z#n-PUksZRFhZNvCVUH(3$nGEyUHY{!0xU@{*=$n03d_AM4uQ)(DlC$)6 zuB#kMO~SAZ9jd~WiTcx}KU2^Yk|PNHC%WH!gjtl9jr58v`%sPp)I!xZdc+INuNk8t z@=8OI_UadS(C)9>;lljtP(RSWYH*}Uk0$96+fhcG{%DGg#vef)Dm7J)a4@PAY@&;g z%CYH?KJaSuLC4uKz3MZq01V;m&ec{3R8*A?{{=_TuSxz3j-X%6Ud_P~^lPgBf+HBV z9}kx~1Y|U3JLZ=5Y7i7rH;FdTtGG*Et8nuKA+SYswZLApRy9Xkn09?j^@k`y!(P2X z3pihwWib$)_7>mYrlIVwq2N~5jKF!Uve4Mjb~Lu18iOv?7_^c%_9f=J%|labbFD3i zjJ9ahjI;gYv$I7294GPF|8hd-w_B0h1?R6$ripd_)x`2&i1Xo0BS}-ZH!hiF|DW04 zU%G$y^D(1Spu#-5BOy|xe(AGS_fdAahHfaJaal7FDQe05jQTK-R7?qGR&Ux4h$KfS#CbpJZ?(zM$D3NhX!1Q-x?V%NycJmS}5 zNJGL^BtK_TJ{IeNqU_ zyiyj3i$WF%lcYnY2sN=Sw>HPj^sMeRuJM+RkBQi@td${?yKB{B}t8YXwAs8n-k=(l~Rt$=kHLe_iUvpuaaTPv32U;qAF~4 z8eu#Xz#K_Dv%*2phLxwsPe-CxpwG`BH&_ z7U$iB@EHx~lgx39Lq`)NT=9nS0AiH;uzho6Ok3~?1+!EK9v-`9;nuCRa;5$Lft3W2 z4`|=;P7rik_+i3^M^m?2SMuWXM{AbV7pJ{^v=`y5#V)MXSRns@=`_|oArI6Dnd%avTv_rSOb+icw}IJlrx5?14qYok%N>|jQA{1l;mI!y(>8Z&`#2=AK6hw zqs_O@@}39hYOAQO2?J#20!a~?jV>;_ACmYeT*79}-W-~>JKMK;LS2geJN)Q|5rs*S zDzB0dXwpUal_u3&p47$RHkiSg#~jzt$itb|8+R$JQ(;+FHD4wL;5q|)G858KnLdsr zCDVs(P-{F4oM>)mcJh*_^gb*u@yQ+4gH>rjyQ%9uC0$4LI6X?{dIPk#Q^j+wReC6o zi_scp7cw~agV|Cc5F-dCnp;8hfYyh^R`x# zo!5?oMLpaV_-+{Ynlgtn3WpRT2?P!mQGZhPIe|foB`FB}nSm5O%RX&KGQ4`cVvo#o zt|&}j2}(mL$pvhG2GSvWrIQZ%=V1xev#ry?V@9=y)luDIeQP_9Gg}jlYw{#H%K{}J zH`Q%5(vD>D@V1Uo9U;k-M||j*V~&oZT|?=ywhqwOg55osx@_n4xlOXvfKHij)rVWB z9TXZ^a`Z84*sBCFZ#xgnB;2Etyj#OdzII-}#O}`aR1dZQ*s1L0@{cYB=IP01eU>&! zJ`jTc;UHoRow&fmLJ+v(SiB}Y@nEi`y0SG+AMZFFYaC&?9e!yZ$&5NXt%VTYJ`Dfx zu1Xwq#J_UlASLWMVFEMQwE3SbcaW(97b)Hr&3`_K(tM|xXi})OVW;_ypzP(xyRtJz z+3A78nF209D<71~j||u;B5mttX9r3~?7LcbrmGmTa|?wZD8!A2gBR}sqxX;={cO{tcQ5PF55{yYvq_EF=w!&0|2kXdl91hQ zyJo99Se|73|B;yR@tSatCVZSt7`av-c70PA`=Cv@G5<;P8UMUIW7CDqqv7USXZ4&Q z4c(zJ^)QM5`7&99?dCa86p;pn$Wq05pu9W!I;5{2Xvh}5HuWpobzZh@iBQHc!;gwq zIPum>Yg011uakdBqY+S+_@+5t*amq%;+9|?GCUaS4zT6YZy5tL{C;!DhKM0MNMNcN z7CqO!px18O%+TD9um;-U<$}kTZL;S-T+_+{&@>UUzo2xKk%vJIf4SNRU}AfUFrn+>TXv%VO5;Tr6*p=(){ zfo=@n;iw4-8v>|9Ow0Hjo`M>u5FRHE^swMuU0zj)MY2aB_-DG{f}`zO#o!+jVshlu za)WqKW_>WvVe*--fRO7K;4L9OYNT7+lFw0WL~!xSoi7P(QC>Z!`FCK~rbl?Rbj2dC zVsKWAg<@rokdX=zC##!=^#G%8Irj@#Wzi#YlRkNM*&zRUK3ZEy=khX&BdIvucX=?+ zQiiXX7&{S23A@A-Tb4(Z$fIsHsElR8Dul|kwn6Im{&dOWV+A)h+&~t)9U^m#w~UTa zt%Nw9fG4jxzYb9tPozqhWENLLM3Rb^B9e?gYc{vGV|fj>Y0l=>r4h{;H@zOkM)ZhA z^eBck=}`!4YCB%9tyOVmAi{67rn4{gU&-9KiMTBgDn{Laxz}V{k^|e*+9Hp-(d|%D z6q>}Yy(w-E{$zqIwae&lda_$^miD)G)iK`(ilJ=K0K!CblOGBfD2v*F-VG0c5sayb z@6V_UkFhxarXe#>fW_lAqkw;FpnzLLEZhHQa^i1c+K;T9cxwoz+GaUnEc4;WiO1KG z|Mtk^W^%&fL7_Hw*s>r|_SMFa5{FAlEN_q!`MrVv3R2?J;VM03+W$!jNmIND|0g9L zwv@OzMB~}M@;|qfxGF~RrH9*&HM&pOD$Bm`AX?SYBOT&J_BtHlr*g8Yu`>zm7(lI& zQ~Gd_sV%`e?D9xe4##y78(LP=Zg19opEe=~#vw|h?HGDn-`|$yxivr8U&^iPB!%q* zZpY-Rha20jpWxBi1aaSVacO0Fg4cuyxq%{l`%wP2Z;B_Br}%;prPRwo8?q%-_Odvf zw(0`GUxzhMu?Ty-Km@z!@{Mpzb1v4p@_Prrl{tbkzg5{uq@sPt9376%g%c#&L91{P zXK5$w6aQ=j`rSWjK%Oj}ZHVY_7}i&JI6PWkhZ;b5yg&%fWG<6mDVX=21iO&8AUmqQ z#e=I*|12d*F*BL`avTrKPfzyQ?g6{iF{8L2w6jR_`9_%xG_i*!{Xe%lUK=Aw_LZ;H$EsqF0QWibwJF=4&FTa#I{zh}0p`+~f&(Cq5kxg{E zq)^-NoE}-!WB)0h4zh!5)sa{UxXh2|9pkxAAC&EPH*9i$I0VXZvo8NMI0$G)ny|U6 zNvwx!Xjmk`lp!ke(ji6;QO?ytr`>wfxr@^|dteJ}8s@U)wY+^6kLIOw=E;U5v|l$7 z+3p$HAaqP@Un~xsDU8xL@`k$Y8V8(K(`EL}w{ykekmR)-#KX9{H$TEmn>yl!^M|J889GF%dO{gJK<=ZdRr;UwE?O&Co<*YiFskN#(X~ z_qKe+vvYw913L9w25}yFwi$Fdo7WCE8YBT-(7!9$@4!ZGkd3M&u;d1?b#i&as8H)Hf|dDU%XeT zaMwrS1|`3cqfNVbg{OtvmcriNIPO)Nklq2O79Nr*$tJly=y;=s;Tv&=9v@$GV2 zygI~xgMlrdtQ!1wr>wtZc~8eUyZd6S!7qjMsHEx3B?oFJdXX%g;^$8mOzAdBB z2&~7J!_ZsCv7|VTAL%%A7{}W;w;0D)gF|H8(Af5ITv-^$UHLdNnQ4^rmSFaeYaEU6 zU`@))aKGegnEtEI%%)%8?Oj>7F3Jkn5VCj#Bq&XLW}2K+Sn|(?zHH4u6FVy{`CEd| zp~vv94)gN98mGpFW^#6+uh$gj^_v!5-4VL#1zo8xPLGIThvFkIGHlF~M;h?|)Ux<% zn-zaku(}&tZ(95l+gAJzU6v&uwTDq0WaQb&0cwR)#NeRq|9o<2r~b3+D4?S>#daau zH&%U{ zOU_jJet+tfpKlK<$psT*Yqlg<;Zq7SNV_O>1|_I{%9!nT}#&=m+D=c9onxNd#N4_ zOZAPq${z@oUpjW>KZVM-)>XbPRDQwOl`jazzED^B6XEG!{b?%u z`RcI&c1Hl%59%sk87jYH?8!Tf1R#%LnJugWsJNa|A4{EN09w4_fr&ASA@mw>q_I$pnp@YDF> zD}@)=@j{HX>Nyzqi)H>^D09&kYcY9%6Gt@2f>x7P9;b{NTy~OO9%wxH)rpFjRU!LR z)`ff>+wxh2mbLkzunSMp?~V^;=|z&na(XBu{W`_7VTSCyHh-%Nf%R}QrNOpLt(QNV7r&WbfEM(5`Oy)(}KB|YyR0V{wrBiTdE+{%Mv%s1}5<(8RN2kAYI9CGwXZE z$ew*&9>3-V2jZgvyD-}76ux@iH{lG?1gUf_rjUKjZ+lu65%k*%DFPWyS-E;cr7t8e zuTPlsV~3eKSKI#CQ}@{bi-$5;pmmfqkFs{1Y25)XmXDpTvgyQ(M?)FJBIGg{^`r+y z*yP~yQdu*0g}gx}14SSI(nm*de4lOaNbK+2=(JhhJHO47l`aav@XsE*OH$B&IKLZ! zcpu!s5Xv>u?(R9=3J;Dxk*401-rPJf-)k%kJm-himHDwxRaPQVOB32Ef0;UkCl$Uc zPO>tl5%`piCrlW#z@ev|FyWEEefP{w&)T>-#&s4fLVtepgdJij*4dgHPdLHv@ST8Q zsBks>vR5O7ej(W|`Qs-5bZZmAkla^-|AMS(1W}U~Pi~Zy5O9Sn$!{ypga=6pd$RU~M!+;?k==w(yr(nJzk><>5UVI{eW z^AWD>{@R|*O8)LLJyd={kpJYO$Sc1GA*agU&9vB0+ml(zAL=TPwPRQQTBv+aUFA22%2$tF`8%QV$Lj!gO90rfiyB=cz%C2LzFpVz)uHD%kKOan zLeD|j4bZ+eRDMm1%9%&uL}BHf@%G_N5X}N<=O%Z$x+S)FXuLo7>i@9&b0=?34~T5= z!-{EesUQ^o);R>+#dqIul|~Xn?>>U&VWCGXb3H;QluUquLD!=2jVTYvVps5)ezvKbgRc zXPeD8EqMdowRP9&sb6!zxi%2Bgs44~wS)TS4NUzPYKw*OCHZ!KAM~NMVF&8f=T$7E z+A>EikRF=6(WH*u0X;4G*11w8E6MxG1xft>H_w%#V>$D>6U_I`%2`6Okha89{Cu}-r)8>;-Juc(TQ3&M0{U@Bh@ucHUIQ3DmYq(Ji0zoNYq4I*{e+{69zwy_Uc$2e zbe23(elJF4mDcDu;>JV4h4GsS0jYn=r09DGD{Mz*UkGCqJysaHzwI|H>DOh|R@9F` z&c@ZJJ%x$8*4I##MX`f{w#gv##z|VirguPV1rJ|;;)xqhI_p^*Pueu_)RWh5Jn^_A zk+A0sJpNgmAHQi}({`=#*k0uIzV-vBopjcQ_0OI#;qmJ?oOIk1pLN=a8`ht;&R2E) zX`4@4chW|eyV>~-^YNZ|;z?`60vA2PC!YE&p0=0##7(Yq-mu{~m*|vTtCmb-*r={g zo{;)!k<+uU4A8$1Kl{w}8#XUqf7)_cRRve_9+eq6acveFEs*Zk21dYc`{U^>{Z4s4 z4+9j0K}VQc$Xf6Q)!TQhdJ}uJM`E@2$hYA%l*BGVLA~hi);%J&L%iH}bEc>-MLv4g zzUkFu=CEPt^y;cL;)Eo`It7iyGgMm2y-}F>faxi+lxeJ2AN@S_lM3MERHBQt2ey;9 zK9%x1yD(L4raLL2r(*n8;WPC+Pys%G0U6O?Do`G2D~UAt>`M>O+a&_MjLU; ztTsi zbcVsd52G72-fHk0HVP8OAkJWX(k&FpYcc-51=0?*q*1q{VRx+Q9svab1jSFoDQgv1 zt?HKAO}3Gb&(s7~ z>vUJdn_h^)=#Ir-h@MwXo>@Sox)q0aPOq4gf`?v+_m+Jv|rwhe2j6 z>Iy;Xp)kl+6ozvoTlPl80!da$UJx~bS6ZBkyN3WLkqa52jYx$V*4mLYB9P^p?h;?W z(wsv=977mQ&+$m6L>1~0YE?sT7z7wSNC(4>bDeH^Nvql9jD37e+Vk=)CfXMD>tN8n zwe-`M<6TDCgfc{C*@iC)Y71kJ)ND%FwU(wJ|uF}HCTV#lwq zqd;Jt+rG5(U&qp3%%CNG{<+52jarpVNSe8s{-GM@gcH|qdd~XO%W5U#3NKD>aYXp+ zvyVenbhR=MF7T(WR+gW-TFKM3YmZxZ(rL$?xN!@*BR#pcc!3scq1Fm_;S9s{Ihha5#B7GCOL%j8?ev52RqEGV62Mwr^X;XRx$L!;AB6ghTDZ;h66;L_ zFk49gn)G&u%KmhGW$#znKaH=f(dNZwG}-hN*ZG5kg%&&g@1q5(za0+GEe*z$SsG>& z6ugVui3Yy>B}9AHMp+v4(9ERhd_C~}Z}?eT*xG6XH?-XP1V{RFTVrPxy{}2pv}U@K zY8AdVHn67}xCH+~TetD_S*SaF6*I*9QgmMos^n$OOJeL6>ec_sTiFl4=^<+6I%`ES zd30lvHT3A`m?~Azgk_QsrOllX>0+v{R`t)SIs&@e{6r?8i#75NA4832tH!N?J@(Ki z)uh7^=f|-r*)IUa{;In+3%;U-A&2pvwD3H&a7S#x`rLz}WT;D3F;QcD>MW2Q6pX*s zR9nrKL4;k2TFcAT-is{khpuOuR>U!SigqkCQws^p4OeE0p|H4^MDR+%#J!wyXlu$q zib7;&*}Qbhps0HOJbGGY5N*S1SVln^T{fXM{9QhnWqfeX6Du;QKFWITQd#Kq869mTY@(T-A<(@vQD?g)RPvN0t`4dj)1Y1d#nYc%cCq?d$AEB$~FDge$bh+s8g zQ6*b2d(|o}Ez+mzl`En71c(f=ge3gQurYZ-y^)sp# z`t?VvzTAiiNNY|Nj8c8LE#0;#XVNzd5Vz1$n*wwgzq)ZZfy@&h$%uVMEHi7*^+I1a zpR(>IcVj44^nzhkyaK+V6}3GW-h5-n*;ZfY8yUurZ5Y|2R{Cu0ZPiDY)&pcDt%B0b zS7=9zEs5r9cVI)=;e4`(sF&|`XtG9x;zxqwu2>CDDboEoc2A7ELH59m`nBnDtg2sy z_6e*U^Kfj+X~vqWDR~{((?q`MKiz^T@J;2dL|Qo2*@N^pPz{y-B1<@!R9PTDW zim0qlql|!ujvK+7#5<#0J60=L+P*q|cYU+A_0@emoV+w2jL5pjG#D5X&@tO#7ht`R z*5=p4@qjlmr%!UQL93AbaRS*mX2Q>8>A{2TsqJfW`<0s(Op{C+dxKe&-`P{?lYG&g zJoKT1tZL1iJ~kr(p3|P@Jiv9X(TW+g;Z`-c`MR;js;L@Ar2Y~sW-aSSalWyM*X}zI z7AzveJ{*M}PG?xR$T#m^e{1$$cGE=Q&lpZ%W!!tiB+4tG!_n$T7B?5ZFiQw>R2H+Y zWN8OuMGoLd=t9YjjDPS{#GaHWJ2!umJoW{a{2K zl=CIYez8U>F(3#|=Cc{JjGt=yii1pFP4=FcN=0$84vBT{mhUs)Yml{QUtmAenguC< z6@!AfrCa%ThA*r>5TEpMI=HgF+Ylvgx# zoo=rT;%vdT%8B9)8r?_3=+-Dgr@Na(e>9=NssnvG-&heoxjdfda(HJ#%LC0~6(jQ= z$)SwibJDP7z)D*s=%S!V$V9*pzbouF)hFxraO=)A6}>igfvOr|<{AO#y3*lvB@f$1 z(|z<&OON0q5tm!ydT|>pMkDWh49|pZJ}sXP5M3sJF?cW4Etg*8<*-Ey+EbL1&iFE3 z9t~;4qsHReRPZp9F}9Z=hnzDNb~07f zED`l5j}(lHmUQ|-YMhCzsMe^gcNdkW!;LEThGF=)R8=fZbcAh_v*r;T#60un=*EBU zuR*d!yxDw;u#VY!P<@*3dBEFTAor303ySm=*XnX1jd5&~N~WJNf;|+&wzI~)XS!!~ zl}#WB+XVHh-S3lbudWdisvpEc^34ev_)nI|yt&7N( zG(F1=hizXfIYeCl5KV(A(1meU_l%3f3izhnyIiG}AnF##qlxHM74DJ2+iKrn65?&* zeRxHVTF%bf2naZx&Grc?z8`D3Cv zRcJ|SOTRSdnm>ITeCd;R1Oet?r`4FOF#!THRYz+bs7(Ogl5*@yD=)xkzZqeRzY|Os zkbV7)U#Bzr(_Q*g7=}6d1#Z)sKv^}b>9w!6R!Mvr7G-Z#c7>zZSazk*!N%@5XUw5HoX=V@6}55^!v*&M@0}nA zxBekaHR6mz@DzIiw%S`!3q*Xtedsdpk9V%5_w=XCb^!pl9{sFms|r&2d;8NpQRb~e zr*%tPLWX2LP}7Y*9m(V2Y6)$2?14$bs_$<)L$3eKx)L~k)(+7NuY;%?GEwwYwYi#F ze!;OMp$p<3dmXHJLw@IdqJQx~Tt8X{u_sGN7Eo`ovoxqwCFB%< zG_)w)gskvb!?qL@WL!Fm)mTN))bNq8uwko`oTKu|0${?6_Ue8HtiT8Y zTIArNB-vw;Xz7Rf3dSr#*S?SZPh)kBZFx0D+zHNo5MI+-W-fcAAs*p+mt;4rD7tZ4P{JM?*$kg#gSae<$_6*K#A1?A+BBaQkW4sLu|I`F zwR^vVS^m(@&K8IhQRrwPGKqAiPdL8@D}_%!H~I4-ydJNX9xRhNJFim63Up{#D3T94 zCOWBWbwYr6oE<2MXNjMIGtlz_F3k(=h^`?_kfEMz@v>oZu6Fgh8|qD>`6oD zeW0_HV7r!Eoy5I<)*j=$8W!hJUWI) za?iAMCmlybJgZIcah=^BZ6?8}8`(_OxH(0G(XA*lEwMf|?MYg?;q-}owBag}k|IaQ zVfyS(|4koieWgu;ul^!PH?_PXVFKePCo`TkT%1!VY%AU{la1+u3BsjZ5Gp&22wf*bKOxvApP&L^?NI>H*Uc^szI z*0A=sd)9O_4_)vG(r!6s4%mp1$QztO z+LD1c;>hDSUj&pu;*S<8^{0dWVTeVRLMfZ98XB2PQK#sE<1Wryq6jylB5(M14)ZVX`{;J$zjIx z6bm@&z(d8H&-;DDeDRh7L=MfJ?3^lJ>D}JL$nFm#gREzC&kjiAnNkHSV1{6hP;-bU z?*oaKY;R8UtDtK#Dm@8b~KYRn=FGvIAvQ6y8Z~ zUdcZ;VrfRODkdhMINt(haJq;^$rSUH5&|Cr!;Dn}rGj7fwACcPL=|OR-5Itx0~J;; zbF9|Lfcv-;^fS%$Lud4xJ8 z{yp8rP#I(u!K!Us4O%cOiAUKz6s(2;*0sESv=&0p=h=u&qJ^uiy&WxFn}(j7U1vpP zA(b>fXnTcKJG5At>XM%9FPEMg<|j`yG%WLX!9`INjxj36<;F=@&(G=iXC=n-yg{cKW#nec(-=_u)*d|nXv_qH0 zVQ9dr7M4ZssA}?`=Mz>c`f`bwQILVyf?_HnD9MLxr7ujM%7REwX12ngslMq}soL`8 z^k~Ysema>zk8=(0z-uGPWkr%SYE;MyLUCQh3Ixv-N1Tot&afb~=0OZY8mUC9w6xza92trXDOc1y45ceLhmUYmr> zZ&eQLQ_bPaQs>}mbV#U>h)#u67|p@sb)UusV*OavY@PC$OE1=0)m?=omT}7dgovQr ze6o>z$M$Xg4h_hpvQIi^B~BTbo2Zn{0fZw;K-`+?54;uy3t%qR045gF!SDY;X!dn> zU5+`jx_#R{T8hD?BBxI~FcPxKcPik*?DjCPfUwiyuY_TGewc4t1|BWq3s?#tn(yco zmx!UVYNl+hiRzYl2lO~%;d0F^dCF)m2XE7`f0hlqUM2UX4Yta2eJpVwT{<^QqUl7= zTG~DRqndulJYR09*&L#PL1b z2p*N>rxVOzdH(sME*B8Ia-3vdJ0Ibk$Iv`_`;3%;Zq7c~@n(Y?a3#tC2}Wy@*j?3{ zA3zb(MUF@j{fr`L=Wes#A*rbEM7@?2TPEb#s@N%Lgcwv^_#JWeXa$@dS&$Z6f3#U( zQiZ2;l=}h3p|A=HK@T~sgA!6b%4`kO8kDi4$Iw6Zt+yZ!jk~EA?9RnVW^;v`zUR(# zq`P@WJi?9jsRAU;6n(#nwqaj2?5HJBVus|ZO(n#F6^5-O8=_zHHEd3wMlrEiz$a`6 zu~%9}mypiQHM*jN%%92>^lXAOVcKU*9RbG|j?OL?<>D%$))Il^=zs1PoO`?-kT$FNQ-{Z1C&)InhiViRP=)i zD4%1dW{k|T);my^1B7zjH*nxt{qwPULTh3d_5bz(w_t%66$q|6s< z&H&llm_>);ZYxZ+VkY&BFhMCc1C2s%!#~x;Ldk@8r-X3Y@Wq9Opbe(8m?V|~0dTkp zF5-&tRFB}oe9jq!dA3+6H^0qLv4iL|@#wk+#16G?#-d~x6Kln}OW0lrEl}u-=4H$B zn6MlDlyXMkm-a+3L=h8XH+*}ECDtB}^LkHLsR&@n9ylO=GR81m65#I-ZLR{cz#@ld zWCPu_*y!Sm;;Ls=V3r>5HF>dmVsD6^#JIJAk6FnGhI4Uw`A3jxFYJvfjCq3#3khJb z%e)rSfsCsK-%DILm&VY%gpt;8s+KC#XeT}<@6IsjJ)ygGW~KU6LEeZw^66=TqW>)0 zToQ_i55r|#av?h9tbxztO67&EK5~Vx;LfDv*`f%14epwlL}cwu9G{AU#PCk5dx;1o zcR8_SL{r{DFuw&{AVl72Rx;vrp*b`ypN>PklYxoI(c<(~xI1-szPc7YS@nj4NDRky zHNt?0(-{u@R8>7(HauV&y?V?HH=3{!Ogd;&BW6)LQ6cp;G%seMD^n~4!Wkx}s~#rD zn9$uv@uvcwFB|wCnL65TTXm(OrbXE#PclbHS<(GlST+d19_7uS5NtMIMhz8ZN6NGC zfz5PNeImj*0m_(?Ohe`{9c`y8;}K8^rho*E$j3AcjW*z!=5!&2`Xa{#%b)AIBYU24 zUo*y8IB^(j4PlthV1UIih;H76-Q87#{;QGrsvCn9QW+aa)}l{y<5;!{`4iF2hx#H9 z=mQLB0@8J%fr56fCO2Z;zlPGg47;AbcydWZ=Vl#&8Fq^gu7ulj z98-vw651d@1Bp2nIL4FccyQHn7G?nAC`I0@VB9`&J*^^;630NGt>Gfy6q6)$TjWAo znxGc7;Lh~+h3`TugVKRQR+KUbU@fpb5*jRoZ5ZueGC#5!5x=pUra=2b9nfS87l3AH z0h=%<0+TjDERgsS47@c9(U(=> zINHvKMIv`mW^`dk--M!;67fdSeAsc5R)Kv?3m~oZDPbFpMQtN)idkJ4lO&JcxdP|X z#C_a6hV}BggBVVYI@us@H+^_5D#u+FaAk6zWDGZ%YY}$m>mplFp_ovGZM?owIlFkk zUY&x z(4~5JUTSj9kGJu33j0tLn(7uxRJ!WR@cxwqf+opzoJwuy2%DCWhm&nG+T!L13X6Ic zJbi|%q~U91DLz|~;4B@zRRQBthr;jN10W_Zox?WI`>ZJYdOa4;$ULMGd54xLgx`L# z0qbcdt*1`GLLOw1UErvAjOvXp=QuUv)aZ)9*nr~OcX1o9e&SOGYFP1eK6xpv89>+S z=!p#KWG)xX53E^dDiWCM(uXfJ+g4qx1r%cl_$=|29Bbl8Wsyvd!D#;)2F!ewt6eH6 zrfwBZHqn)li*`?)v%;FE43mjQ!3-Afz~K6@mPW;h^|dmJJ_Fb=OS~iJz8&gptu-zR zokrO%d9Wabw(9ONhf_OFed#l{lXJLeS#y&1iDhnH%j84nYgv{Y7YEOb*4S!m+|p6_ zOr~r;Q@iAA)|~m0uzm-r4cqZ(H<72fErR!59ZAQ0jQAj_F7*c*3V?Xh>zSaKX235J5nL(elFfumc)HJ^>2 ziXk+slDrin7fY!m_dIXd59th8NK?lVJOv9)Tih=dqp#?G4dW67rtA05LNFUDj_DoC zLNxYuV7!r%0sbw36!W!$KNmueH9NB`WpQ9W%cG;X{qn5n#P6V zk6V#%Z3mWJArA!C|Hw=!IF3`5kt{gGg!4rMK4dRr%O=?-7f_FVx~xO=87hHiZLV&X z8+ub{=mjR=)#G5Vlwy+H7q7*Ra+nk3W6Z^^MBVdZ+|SC$ zZ_>F3{TmjumO^{Y3b`cA6Q8j__EO(iB5sG_BT?czhx`{MqR&6XycuDj zWGD@=CN`Dk<$Ewb!EbZbd1@k*FhsT9Yq}!Eol+8|35;#?Yzc(0s@R5tXBFwye`njk z_EX*UFv4sRUf}&=e_Hop815+4p1D6((DINUny!pkTDGUPDZxd@KSP3xED1?tqKi^W z3X))WN{TGG;ttMz@}6sOXeH-rf6#(EuT3ToeKzIt>Bkp|gU)3J=-rcS?`SpX6?m8+3AVx-n}uQ23e0jQv$3`9e%!Vq;qY@VS^4<)n=pPg8otgmGAU zxz1|=XvkHA!GX!K6e@(nSgtJN^$A{etsG>NNZl7S#e%d>a2OnrQm};#PF3zhgR<@7 z-W4k}?+cqz)R_6GiwUbey=Y7&y1hwD$4XB+=1}NZP>cy>PJY&g|Sf6m}ruCbS zTNkrTXTS!+p-P^tG;4zuXwTl0lt@kbdRYp~Vo#pCrs1&-;AGEuSuE~ZjLOC7k4L`Z zd`?K-!M)I?Lz@HDc(DIzZ%gMT7o7%?&R{=ofb_wkprU<^m-btc>&epBKBKO{=dD0n zwST6xEr_NkC(I*-X4j6{=^svQ(&l(kWvGJFC0YO9RuEf(md;*dsKt=vU6eWRTY^W&fQ`4LG-qGsC zJtBC|i(la$#p?bu%yxp|A8iH-%OG7%CZ>Ju$-m+@9x{_a1!QnZDU;5q-#YTD-!jXw zIV%0GNkA)I$uoq#ePs*kmzFa3v<8N{pNqF^#kp4YWqL~tu&t*Xrx~23up=XT;X|LUv+ys%5q9@FWUuiR zsw#b5&C|(vvgHcLY??@A`5`CbQ5PHH~dEc+W#Z(UEnLfuKM1; z=2)_3JRaN3_z^paHGaiTJfp{q$766}OGna-Y`uJrX2wq1o*qd@4@R$?BhAQZZbKXA zMJS{t6h4IufdmLClt%*vJ}ss91_*u71Ohj0L*bTC(n5PvNN>2e>Fxdg*4q33I6AUD z4y7MHoy14~|NigC+H0@9_F8MNy>`l69WDQeDN6Q$xBu|J7~WFm>UqAIsOm(7>UyC2 zFwu0_9xu)GaZ4|i`Gzm;?S*k9J=4$2e|Jn0QapOf%`%jx}MvgusMqn$QMwvcefAYZ^V{-lze^s z{z5bF%MYVx_`?E@y)PXlu+PNm+XnIn3oX2-V@JMJXhbC2aUegvPZJ+2H1R^mCceC9 zApdQcqi4e0jC0hTKCtP$Nq|U$D9IaLQNZcj7SI z%0-nXmZl8S9q9whLrP#-Jy_z7XKABm#gQ-4p!qf4z?P!cu)s17cZBb|_kr&>3-Eoq zBYckUmxS*S44GqYY;wE^kcZA7e5Qwcjd}jK9TzlNzemT}_Tcu9|59Pevz(=OUYF-} zf7=0fQuhp>@}9jEL;7;8Jf&kV{z9StkF_Dj^L#oRxB`DLx!Wv;k!s8|+&)8pe^1lC z;(Vac^mn&4?Rk9Mieqvg;a?<(4M-qkpG&xu-6=i2_oC2zdLL*$R)FS(j?jELLqtl! z1!x=?n_L(xT*C4V5LA*U-;&B;MOo~gAgcvUUj6AQ{ggYhw3s#*zduhT zj>g|`BC(qaxGMQY2p7s`lYIXSZMOcuaia|9Mkbw!`rC`}IzfHD0PjEkOF22tGyJ$^ zuwjS3+|X@k=}2IIJ+_h3w)gtq7n=EmH`6Be{JpHD&O=%tusEhqMp4{sFW?MC@@3=f zmtG2I|Auo_d$fKourUm{?E7tdafZHNGl3rr=6dWXnf#xz@)TK)^1oH6|ATGF@;twn zA?uYef?wa$w2#vd6qpoH&tnJ63$o%O~EpH=%@&M zCK@)0^cZU)XCq`EsZn?Tb6px_e$Ddr1fs z+?8}=B*iB7&evv4rK8OE14T{ViSySBn*6`WYx17q`z(Vo6*G$orP8QM#A4Zd%l%*9 zZ(RPbI4*Kg?HWMF%im%0q5X>e=zbr5Zodzow{xP>vYY@sZh5A4?Um@xw8?YonIt>{ zSe1I7p_4jNUb<|a3p~A1rbSCfkr-gM5~P6p9DTnt_@K~#I0c;j z60Am^hj81r6kr8TIp%4zVWk!ZcY=RC2ENjGgag1dNVb6ZkC{sUW<+6ry8mtgf4`g` zABW*5JcGPlb)ALFZ3@$&r^BV^Oj7zpB3p>*Auoc8&+dbY4;N7J{uC8?IKS8d6}i(w zGPb0skYk^@rE&j>)U&c`h>&MBq>!*IbZNmB4AG|SS%}z<_9&6P6B3{=nUIH$1~jaqypvm8T=(1OJPK`oG}yrz7HdzSZ({`gAb~oHj^t-@gy_?Ul(p zF^I1i9qJ;XcDeYwTsnjeiz&j~Y=c}@EM%KsN_059%jBG&!6{MQ6JI{TU%bxlMD&pW z?Ppt&DTtnbH!pg6hEIBi9F=zzg8u7j`*QEa z|Gz^0Kj!tPRPK5HNhaMglD@m(d}J^T_PxIN2Y1MxjsnMjj1V|&x#Q$tyDdM7zc=4K z&+sn`-Ba8w$<>G8Yb;&zjdZWMjtKpoPAz^%p~b(sx5eL$y|t67wnKS?>~d%D!e#fX zr~O#emm<-)iMx$zJ_*$z%TGcBrJv4Gjbu6ziwKS0M7kl4!Zp*)4-~uUWA^KXZvKna z9C!2#-{%=#if%p}D^Izj7yoRb{@?KW+vw)|Est@>uYztq7$L~h&F>YO|D}BQoNhi| z=-#!_&HFmF_=klS|Nh<<|6%Oy%cPs1YtzB*3o_SGCXs1>y9+vpcJRP?SR`|@{mkfJ z3Dvmg)xNrX$0_-}ofPeVSx~e;v!0_IXZJzV&rwcCYtV;cfY_YE%FJ+Od7CIiIpXdJ@I8B(cpQvCJ2+`1c;} zv^Eu?yXP&Ywjb1i7C((J=(J819-`^A~0(>gr zddp1AV!b@1MGdcwS#{t`>=(;E@CHw$F@~5+2}m;k!6%Df@9~(U_G$X1J^{S(dkGx( z<_db9b`Vyd-elM9d2`dg{z{4VgCKPCAPA7U1;%awG_GdUDQQV4?ty|E`iMh+uxI26 zH^N3Y;f~YkKVNBIW6fEv^zMWCMed_lZAPUO?|FW$S9u~i$|d(kbo-Nlb0ZK7Ec1CL zur;q*d|%DQj>@Fd1~(`a&q03P6lA9-=)~)Ec59Mm?#&DcBi%!)N!W2YAN35mDczB4d{3-A?m!1DOR42q8EQpq5dCiL$T-iOxAOZBog%eRIi9riiG#6 zqw)6lW3%}_eW1|hckk`fZ^j016Nc5`>$rvs&IcPK$~4iK4)uZM0iAA3RV~;V-|u-q zB-mzc;U*<{QL}O{x3TbFwlCTGK4^3PDNX#xkD1RctI(U{Ll%!02haB7;EA0Fi)cIrP!09LSz?jx0Y>00T4+CvjWIA$4 zt{sctcAL!)Ke{VfMY>RMHgC_13L!eYi5&RYr~4rvk*hH(jukYQb_5(nmpyt^H)$Ow z{cDL8-Pb+S*FDnLJ&$3`#3Cm14FCN_Q_K}>NoH98^!3biO+@=WDCe%5^>e#^UaOz` z_4BYM>!}|7dj7|L*6)dRcJT)6v3%+-RewW&h=s+U>;2bXILt&6S3T=bul*kG)iW*} z`ond2`t_GX_JZf2(l|oN@6n#0)w4joRX?{GymwmaZAy5xeuzK7@9`c%@ftneE8y?5 z)CVo~KBc~1sc*2i(P-l*4O`Y|wW(bHYRh_!!*UhmPX zHGH>TAJVI}_<&vq^lD9=(CedmwKh)6&@$b9u=k&smM_i^$>HbBD9I^9C#AWPLju|Z z8aPQV;dUZlCnOl*A$<^{5~t>%H5=&5eo;BK`TcFG_6XMk5(!UP-JjdrIvU&JZbh}F z6}Hfp)v8jZ)sD5^L#^i(SL8-~UAwza+tYE;-s{4KpdU{W?a56sJN5EUe+rWR-P<8| zqRQExg%%hh*q3(yJG~zD>$uI}KU!#`iyLg%R@v!0dZ0HN-u~v_1HLcc;ZyE~?ytk> z1%`%Bc7L5t2Kk1eR0?Sgb}-aqEyPoxlDtQ31Q`Oz6S>BF-XV{RXb^J9#Q5560v}B@U8g8%QO6M5M`>5h@jusqh4`Mu*NB0rV=o9A4 z3G@0_85;0!zZ>U{r;K&pEkesVtZnn^QK}{H>BJya7&VKv9W5>Q5uz9Igx~ZW^EL?& z2HC-*l`({X=azo=96qf0HeL6mQEY5a{M+p+4MR}$tykweV<_m#9>_qbV+rVps#HX< z!-v;vqIYSc+XW}r>AYgEUX7L7(exW1cLQ1^rlX@K_CONbVm&vghQm*}`!!7BEUzrr zM<0CDkf0M>8YC%ovJg@XbxvG@qxxq#QOJo?=MmStP0~15e1+1+mT8ao-%4D|etp&{eJ-HE%W>R;j04faa+^&=C59E|#ADs{r&wI~?!1)z`=4 zDfg3NXGF38#QbiQjoid^1>`qf1qi#FpWZ9Re{8Q9?{tNaf!g9|tNye@_?@o=!f)&Z z;eRSX_z(6%_;are!k;COEh4{EeJKb2H?qF?H`AP7{_=7x@L|8^(2&&G!1ei!Fd!*E zag2VudzghW`S#7C9nbT8-gu4~h;)XQ>7grsG*h&f8D@;B^F19+7{4Cdb`ypx{y$J? z_`Tk6KEoe5r_&O7fYW5=^mo*CSr)=YQ9@il$3zuy?x#G)hTt18xEv@vXq3TL1^+Q0 zolkcH>thA5Uf2uPmv7EpQev{kcNLF8NpkQLJ~~?L`@VKRx1x|6gYG;+|1F+IawIq_ z|B6E$hUX{pN4Px0FM9^Z5-Yde3_!FxE?d{3r1ie`$@2Slaft#HNQe?O`d>TnC80j9 z&~Ajb!M?Zqeyx)djkNpwkRILS{J@^a$H;Jyb6H{W#_oQj$KO*;HclOB!z`G3C9!ar{F@O1M3@j@f&LdPb)b)P1_P-x;8J2vr? zgtb0|Kl^bOR$X=|sZX9QViZz9P|*$?j9QBk-Fw5i72kfa-TYTVbl=*E=)#GjKy<&j z_c+i`VzmGb5$*dC-6oJ8NFLH}*MB*32>2n^BFxOCGS9yVEq{2y2T|CDr@C8f{eU`%y7wSV$tf7|~z z8duj==ll6@pW!r>g>gVr^@l|^vTmF2Tl$R44oR}{~^_z ziSZ8<_~5Inf@AnwO(JM4?G2nz+kSql(eh{s%|^qbY;df9ZFAwWC(_w^bD8H5WkHb@ zu1k`~)u-(fs~d09NRYk0#s>|Vxv9MO0EqsCq!Kerq3f64hWvLM(YA5)KTZ%DM48ug zciq)}m`j$9cOSgJyL5N=jjtAyp+vNe5xz`8U@$z3`5^N5Fo>T}-8UAi?!Ijld1RM( zPuv!Sp2M|LsPEmkJ<@&S-Q72_4fxvbgAb?)#a_|nDzy0$O&t&s{tg`~CBMnr;xkgNjs|zdjCOLRabMw4(Vfv;JKC^%g`H+6UG?lDchBi-!B-p*bO(+s(8 z$OBk~$W(SlY(S}@6PV~Wt+M8LH2H$wK&C@ z@O}@$jPB;`xb5g2(h}#_h$(p8T~w~nSkfo2>p5i?9m?oa!Z1&oVl^qEj%TyLSf-#K zBZSKx_%>hwc{TZT&DYWHBPVzyIIaNZ!NBH3b!i*_rk(*wu189o=DJfi8y+bg$Gwec za&)K!>pJA+L+?Nhc>ARAcF1{>VGefZ_JQjO_SbV<$Shq2MnGc8eh4FOxRYBEE$n!# z!g&$byARy-3Mbcr6KzH#3EoXCg1brZ1E)uh^XRvL^&(p7oOl+9d-!QHfq{yfwo$ye zJOJM`?hJnI!&Y84OX`WS3f1xJdyct5MgjfrWHa>$G1HIJ+!CS#$4G4~xa zITh0}Z4ArFK>^)84%ydWRX*5rNB1%Ak`ntp^oW@8^*wicxN;6TV~ir=oJ!eke+K%b z4Sjdd6B+97!W_gABHHI%KTn4GHwg8ZCf;C#B~{|~(vQCbfwA<@QH&8rk79fzULsp1 zrC-G*9Af)B@4%=goAvE?TjJx7Yp_0b9fS2wBXX@ZM{hkQ4|)cup)tD)7miZnq=t$| zGv%uG(qXP5@iQ$n^feYhXc|lPv7?HF-gcuyN&xdZpDWfkI9Ef@UREMy9;%Yk2{kNm;laf(XQihnarS`(^P(- zM{XaA=61xI!Y~+`8KcZ>8tgqXUD z`U{9ZCoH%hy}k{!>hc+CJH)71G&?Akh?_QSw}|u};1*&-LnsA8OW*m9C1Eez(Gj8+ zYHGP}uX^c(an7I!kqZwTL3FwkX`+-|xpvWMeYLf44U$u`y0N;wSLks$wD)?Z`fH6Z ziv=I)zWY88VhNtSt0vDAzPc#+^=m+ z6{EFBdQL~tIe`K{F6|_*XwJD=1u2TCbAb&6d$j? zv$mb;4X$&$KEX6g(?NYy)_J5#DeF98C0X=HnY?(_F73zMC;_Rc-^-|e8rIhxM190S z_QHwR-Ybu5zlWlyq$x< zJmn{_ykF3tPaId^33FdkHP&6=J;)J4C*l8KLcuRyyHM~yLX=zIywbr!xL1}td*QBcnT_l$J-D~8? z$&(V&oY8Q~$FrL@R%$%%0rs_&RG)&Yl^*$FJL+~51_~W{%l(BH$9-$tAMfW9$f@qnm*4RX6cxU2boFc;LuMn6nN&h|i_Xm*8DpFzOO(hyDUCHY#N~ zSbF9pE#2qw_`iXn?q<0?X+zF-#f{l^g`Vz)r?D2>*Singbl`nFb=eQbhnsHzv47`4 z*TC_6`tR#Me*Ad<@%tX==ij~k$N3%T=fea2LwY-Y-|_p8vp$gNIPWAJAGr4ck2w32 z)Ojs1{0+fiKfv%~g5mQ?*L}2l{B`{&Ui5#+)W@@2{&s(VKWX;>(!f2(S$d9_ZdN8> z?Z2nrlJD*BFa1i=M`FJc)B^{6*=EZ_|8p?>z^1QV1~2e;v&??}Fk|+8X0);ig%Rh_ zaWoy1rM|>RoN?r^j!sIlt*u`&R8RcRf$C=C#bxVjT3%Crm=~jSOYL-oUcP z;NNENm;>?iA?A|74mo95}wX4sBIvCJ%*Gn_|>?<1gKkbdp|Dn4% zap$JCy4QY`>RRYsQG4Ps=vq8s6tQg(ljbX`)%?6wS1q*<)pcM~riNrlI4 z?JjXbQfoMJ8$`{o95J-@a2QWqd)BqrN|O(3x81)~@<%CoCHrK4^6cCyhYTrq&^kt4 z0iZZVT+YS5LMfcdREu_)l6fE@4mZMA^}SKH;#ZxtZ5nb?NEe%E3du|hr_(MDR?WNE zhL>$ENQ2(_R$E1HaQ0z|Gkto-ohdjsy4Prh2MBd;E&Y{VzCnPvH#jxeAyR_Yvw zc)3IyY)|t2!-{rrmYVx-?ZGDxL-4O92VN&psPtoOc-&n2RMOY|I)QN zuMxmu&-NzNndADwi-(N?J?Wx8{gr!jcaKQpMKO#+w z!eg#DtlQMCCvc1O`>$`8iUss#SPeF6kT=3Bs z20cvmYkbubbC01jWZK|JmSPPxZAiZE+J^)njmrNlndP|M=57BS?Q)N6bbi;Bg|M#5 z{ZbPCy+?J60fTa{c_jWZBU(zHdPP|O(-z#n+KI5Vy0N&l^-AP!d0)EBZDKT!Ak675 zisHfLDV-p2p``R3IzNI#A$#naB}Z9Fzk+R)B&`f4fmyzPnpi#)N$reM*WLWV8p(g` zm}{3oVlkdbC3i*&Z*H+fl%e9&+sJcP+kcgjRd+Jn)O{yjNTt8cLUj|T(FjRb`e!WU zntolSGED+h=^}sqHk6z0?Jhll7;^Zj(gq8Zt|^hX_3hm^JftZdeNm1x<7F}>N$Y5d zJ(SYv?jw^V=*Zh0_Lr4z4LcVhDj({;8P|p(>eY1v?B2W4_m}8$SLr-uOI%jaRXQgy zB!t?(v|_Z{Zd~{ zbPb+CSlAIfS)Ek#kGX!VmkTX`0Yh?^#4Q`R(h&^3TD8GDht#FhG-U`;I-(WQmsWU_ znM@ExNH8fvKYp_&0$t&=i8W{Ve&80yAU7)UzaEAhAnQm)WC7M!_1x8s%^t-^HgDY-&mnVzLXLD0 zp{Xy7yz222nkB5{&eypV8>dz~k#|H;X!re9s11~{Do-K=9hG02eU*3Zy}sK6bn%ii z^(asNr}Zsdj-$=*5>8#O?qR13&8+lWP^_M{LH1knu0f690#yyT6_H&cQvUDzJd)S$ zAlH*?Ad5|z#frww)AlOUrIftx+IiofK_S3b_-nTc=9!#}RmNiOHtfq1&y2XfXV|3I zE~(f!;K|cVpCGl~o>NYlavEYkzneY68;yDKdKMBp6VyB1!0)@BW&zXaL*|oXbw2B#G2PGvea#{9Ex`;qAI`(Y$L^#kcFt zj+WLbf!3)(VhUwf=^m+)a*gu5kK0-4r@-Qi+tR;}95)(i%AP;S zQXTaC|7%y*-=FOFSRq>&XiCWnC0>SK1hNu-3rV{bOwJ5QfA(?6*GRcGthVZ` za7>i=CFgPfcERyG*K6|HKP_>1>S~IziD%Y?D-ej-qqvw>H@>iWt0$cs5f|XD+(WNN z3%bwm9q(mE|HcZ%Yntz?A3d(rTXt7B^;JUf7t2?;UX+Y3?0EosLOvbaqz&p z_z*MWcJCuBOU|RRX^9H;S4LZ~@h=m6Zx{LcRSb?!uQ9vz~L%de!ogYTfeNLfLHa_F4zsoRaZ*?DCxq_%lgZr&R@}q zEA_Wvu3`J_h7h_o#0onI>4&jsU}Y^N)6qx$5%ivs^0FiDbS1X zb0m<69(%fuGE;5<;@;O{VZr0k$H>M`9ev=|FlP7o&E&`%ce=x%EGv=>HIPmhn}Riv zL{I6Xtc?*tucd(-9u^kT0T#}%m@uJwj^Vm_!$lqkUK~N{l8GpPA`_}Jf|Qy^kh+A4 z#4dR*y+xSwsfnu!&j;|d6&40GbtZ%kS(F_cKlF|)H)gN&rAwaLly!y?zAy-C0+*eS z+eaU?!vdQ%WcA_?cyJ>a1xwEjH%r;jyIfC*0x#s51*4(;f9;!`Lp4mud=FZi| ztNwhU#SyllvXuF1W392Uy}G%Pw91S(PxH#|318@W(@E*Tzu zY;a(xR$gf=Tpp+KR<&7QPsWyqXKi-0o<7yB@)u+^jFEla)HC9Iw=-o(6-%BQuq`vC(97YIukdp_28}0mbF% z+0C`O2EfpLzM2ERJbM9WINGXht}P~$leG)g;R?NP);C(~tJ`Y!Y_hP^Y;xqSwpABu z=Vol6cQ&@ctTIe&Txm47lV_J2&EfgY=60DK#`*ff`+$WUEyh+f$A8&F1q}OfSp@n;V-u&4oso7J?y^jw#g% zhaPlHFqp~k;+646eVZe1M&CBTXBaDe_o6W^!`20wD^6AmlE31nP zFJK7lQ6wtHBqH8tALKqZb74;1vB@5h3Pny#UmTvK{n_El@YLAcSS2yYl>-YzV~b{; ze5RgN{Sc~V-sI-;h;>kXogA%|FH|bExv{BP8`APhePg4sre4ODs#CKNn0|+nt<9^A zCUYnmS>2v#3igRI?au9rEDd|(6XP>en~RNPrku_P=(4`COwWWvo1gHBFeug0sVNeH zEVieMmTU7nOG#^Wd4p@3w;=YUT3>DFSzx9%Ri~p(ACp*Kj1ur#OvC490ggV-udQxe z2H5IcWo&q=mN6g47~_y^H`ccX&m;gg=pcf$i1TD>bYdp3&*2@IOk)k^V6*bl>f-iF zGBp4Nq|@5ayuH5FY%IfDreM;d$4MCOWaCO>Evd|vYs0XL^?(awBNH2ojooB=zB#j0 zc1A$2nDH&xbEUpI*6KDR6(I@A}s}SDo$WV@!3aop!GII{vn3|YACoVTpy=25C z%(YFY!TmlA*#}z#_L+&N_bd9yejm;V=)nr3p#?3!hJ^`PUTf5wT4ri<RhS(Bc2)vYW91Pq#pwPL|>W0r@b<9$1rwHaEZ*U_cc z;`-q54u(YMJn5>e%2^)0bj1Eh9Y!e{uT9J)v(8#XyvZdP%Vc9?8G0-aPoJt)%VS=$ zvdeO6q!-o@Rb~9!R^rye>e^Zzsy4=P>C)&qFBYdCOYsbZ*xcEO3~KKvjXj!NoSUg6 z(-$YoEG-K#fGCb6lUv)X>w|4w(?|^_`W+H$i^CHZQ>C9ywDK5ChSZ3MMh(8-SZ>zW zBHx^74I{-|X*j_=JEj%YA$z zPglpqzM{0?D|RxG8}gZr2Ar;ngaU(GPRioN8MuLw&5f0ZYGc#-P+=}D`YKafZN4=b z9#I+@kO!s{L&((3#j#|uzCbHbe7RDdH4ZxB92CMsiiv#|9i;#Zm(S&p=@WEfW5HH~ ziJ^s4Z6pw8@Y-d~x*)^Ot**0@WG8Vg3Pz6gscAa<-$ zVP*+r7qlbx1C#>C;)L>Ni4!p7{xt|YEgle3za*6nQ z3cJ!gj9-hiKG(jOFjNv=nJhNHXIEICtmw?sK`tz7dVr9s5zWftdcEoTo(6a10&+mm zG-3Ow29mJWnfVJdJKI}3+g6v6q$DVN(?g1ZM&oi#9M-5WsW>LeXl8*R4fQ5#vg>W3PYI?r?w071d zIwCo)Xc@QP)AoB7$=Vi{px+Eh{uv*hlc7QE)1{%PbvV;aJAYwz6x)LGIMP+Xc+zxW z^^uW9ea{)1Q^=$`D)sLytYUgzYkE>K6~syHe02gGuFf|NhZpN>JFH}kO=A}_%!G|F zt0aqxFEE)gemonn*Vx@+{jas^S2c8Eiy&*x73@HmzAUKq;WfD3I%=CTzOCXl9g@(U+^$u}Nd@kNOOCq(Oy3h!lm)0>Tp7t^x&+Lq}%HHjG#{u{jXAnmT;HMICR9;zAQE`!hZMkH0 z0-h(z6T_2}7m$SDqWlc$=ahaBC(D&b^m8VuG+LW$J8t-@Uv+cIg-0$LF;_4IT=AtW zsa~ybnP3sD261)-mRFEFE6+}kfk0No0sn)_EOtUKd_+XE;_IiGHoJM|LSLgTDG-6o zb=Z%LWkV2}xIwANm@PxPfsgNEve;Ndba2tr>~R|GotDj}(Z*W+dAOX|L#~;i1WBq- zWk*S^#wBf<4Gv(<_NC@N<;FzvfXJv+)THa1pWQ92!4aXT1TCeZcuAq83#zqf!(`=uJ5sB6%{0C0=}9D!Zl?*7|=1^u~?e|k&I5F&PpQ}saC7y za}`^dhbPM8JO&8Eswr;F4CSCZ(i*-H>szTXW@1xBm=la`0BDY#F#*cPu38>(A`gRT z8ky~nnED?(!600!Ot7JXRSvCE+Xy7h&CJxMhNqva&7hpPMwpjT!isQdhMf=kl<7Yj z?SlSe39NS_E%eS+X*SNqVa4gNdoLns?bNn?o5WO|M{1a|yhoSjDidHzR^6$=f;ql= z9=&4Jr2|_dY^KC5s9*=XI9?e@ruZGS-=So;#x{Y3c}S13n7PDsa~0V}gyHnMQu)x8 zUJPyvzA;r^yL`G`-Y7Q~thd=V7WL4zxVI6k-z19Qy=vdHiSsMnO^Dn;^MK5*o~SDA zycLNvv?1w4sII!S=bf2OCgZ+9q;@w=MaoWzNjgC!3?=5wDCMzY*C+WM=RRjD26zi zjgBwZjCoWx8>zO(z`+Mw*{pIdaK65_RNw?M(w3)2Qy!yPruI|gc%-7q>X?aZo-_0V z@QRufrGt#8N+Pgn9jKZ_9tlf{q!5>QtFxmM<19DMx575|OquP|Gqw4~5?eLN`PlsA z97~AtH)A$I)rYj~buecSgD(g3TvA4MWqT6I!=w&C%X2D#M%5RC^+}johJZf^x!LS1 zmv?6qCNu1Ql$BFP*NXujm+-Ys#6DtuW1+#8D}+ual#-Z9d&Yr)MX_ebs_Y6w5liGh zmFAzDc{HMc^wViNrb5$nu#8_WPWPbmV(HgbrItjS8nc%wScsgir8A5+F}6#)2~z-z z*Wl2kS-$u?WFka1R%Mx(Wt|OkC@d8$!lyDZL465Jo!5pf)wV_27<|x-WZgqFa^%fb z&GP9J7XC6j5lD<}N81jM+o0MdL6nC7jEy}V3^e~ZtxA1%ClisI`;uSjfweB zvYXMn@5T-@hERnX@4~rnwC!fNtB=wGP!4JdGa3bqer0T#9oB)lweC|)0 zbS_NgR!^ym5qYUuD`A&>7^j6`V@@-Kl|8qP%dYWA+tB&&gD(w#uJ3_?Y}Z#2G8fm^ z_n2oU;q|Vg3L@dv2fTFD|2k=%~g$Ok-^Z|(1sDtH_>L`8|$#`v1cc$ zbIIf^2nao?f%MAQvzOd80&W)z`edUFGj;<8dE*xd11 zjeT04CIf7@M4yxRG?b>DN}o=rPmiQeSf4`KN7JXX$=FOeTW^g6B0BruA)ggR|B^Ty zhVGH)x9V6JJUc5(RhEDCAKxkcjY7S7TEvp0<)<|pX~iFg65OR~+id38GC5XBM?|y~ zD9nYd>Kcl)Gnv_8$b>=Bavde&bPWuHh0>;#eoi|sg^g8)i#-BtB!o{}-N3QfWFz}2 zD4Dj|Z5=UHJZz)vIw8fm?k;j7H6z6K%|qMs(Re zL(MFGdD*gkbFzAYUDs+gae5TTi54Ge(x_}ROG^f6WoILuy+UcQ2uK7I|1korOO&mc z9bfxfV`%y?M?`PS5+wZomCf}=e`BY)xmE8UZL}^Uy7yP=xDU*(;H|K+x=@=%BW-Oi zZDX$LwDVxL%68G)tgznGg3WfQZOIynOO{yWqiyq@WeLn7-dBdtja41X_$SSsPo5fu z*7#vtYZO}+Kc_`Fn$3Z@9E0Z1;zNuJ&8eY;)sfA)ATI@~6fqQ3qbS!mHWsTvTyohd z6lm0N-B2BfMWwh>>^Wf7UUUWtu{GoY-O~y9Y;K)U$>0} zPqNf{t(Nk2FahFr+-L>oHs+$6yYKt;NAavQm(Skc=O#!N0X6PO&7yHO^v~!~AX3T63|oXlxA=e4^#eEGDR*(wjs9 z?e@jI4a8T)c3DY&Y32?W9)=PG%yj-Sv}YsZ3c`i-53`TTFUMUTT^O>JWomW>+gCC& zj$vV84KZdhv2`uC8@=qTLgpbE-BP_Ha)GhwnG5I6qi0vf5KLNF))(AR$Qr@)cga$u z?Y0P)2Ov4g1A&Ia8tukj$Q6q_8xU2<{oEXkM~kKJ42r}Ge4xz{t2{Y2T#;!=UU4Qi zT@3P5+oJ7@)o6LHG8tJ_n>izj6k=~OwIj8w>ln)9a;yE3Dcc~KVm_J}xPtW&26P@J zRGh;cL4(*jS{*z)@L0|4!-&vWNrxOf^f-5nn3~cEAc+-eryN!Y8BzC&huT4OVJ_YM zPo<8bYJRRr1KV=*lG`C|irIX@b9Z7Y=pvEZPGABwG>drlsIGFFg!Y5A*U)T6!BjdB z?{}RA)*OaCYG!*RAMNeSY9Hvtq{(c~({D4H0ArwMaKyS0w$@l3qYz^oAM)c->tP$z zgt)-?VHcxg(-RQKXnE!WYXg31Ih{kLsG168MR1bmw`uH&y#YJ{(ywypO{RC&XO_$t zw3Td$GOS@T$qMc1;?J>YTWV-7Z7VLIp&>R9eYS*rS?O3`(Th1&XNBZ#N9Sf3aNhyOQ1eWEqm*k)s?u^2%fYa&_1@iE2|>&vpb zV6fC!toKh%%+9sR1h@mV8qKBpLZjBKvvb&guCXEX;xdo8(3ZI%Km;rlKxoHtfTlov zA*ga z>P^@x^i8qg7PZe)NkZLWg z?a+`rdrab69dKd^Dr|-7+th%E6`)i{;bDzr4gUm(aT(t_D%WnFKGwI#tI3s3R(GiU z>gt98k#@GW73KxKh9N~`?xTKy0tR2+l&LiDWm8Zf@w9>araLyiKsD22BVomADw7$Z zVg}xevPk^EqVKACp&1Om_ztJFbNwUC6=}$fXtBKHCSQ+Z3OP(nitp4Vg{OdadAJM5rW_Oob8lAMtUH5)?+G8& z^FrOB^KvI}^R*f>@0&<^xb&oHj!5Vvg@>)$Q9sXO{s8%OTZ2>-o<+9wH9i*+j?T^D z9tGG?5hI~caoRfOgD41DCa*V_%S6;zy}D%C)aMbnMgfR?V(b9>=T;zA6Vfl$w-;6x zHPIyE$|$!l$z;MBjD$Qb27WNNE0k{oXg z?VCOj(3#+9dYS%XIEvjDczaZa{KvvD#1GboIL>OQsIm&xEjO_9QAQ=US60#CBd#4|wZ<+;O9^eoj({cW0&rcPe4&duVsx0H;k*^e zDiDZ<=RDj6gvWMbSLY-H6nYwIE#`z-E$mgG!N>5z0=`v7Co!*|paO_s$H`z%0cszq z_I?$Cp&6f&VRJDy)B!6UtVm(?qpadesfba@ah|S>R`8=ddEWM`)x4(w-iBP9CY15$MjcaDa$?#i{ZP{w`_j zzKY>kD`Ro4Qf|yxkoc-Ym}%y)3@W!e6{>SAS&G)RRP@njkUNVhXlPv3&=ZVVc5?a} zXI*nad}`;a>ejNSs&K$vTf4HbnSw%FuyVKk7NGVuIY1ls0VDhrvJ$yY1h~%ww}BlB z?j~E~ld$=Xh37$QUAL6fcGebGuQ2KJFyQ^#R+%KRoIIIpTDTdsMqqgCZQ=~OwzfLd z+G#P$m^ImMNks*~fUJGI{8MZ-pN!!XSBO;`yOulKfTPt7^Cq%o;AJlkAl+GA0GMV1 z0fgq=?%D>RMm!!iw4QY;EhwY?$K_=2UA}NYq9bNdh@oGG80}1htgHqD!NerV*lN&T zCbdyO!s_PMW($=V53i}QsS0Oz<&nai(VujwE>G!D&pbzAv*q2Yv0T{{ox`%6Heug# zV~ai-ykxZNJbo^%y?RL}Tq-JjjkLeKWvaA5*_E$y^NtT;UU3rL{6E zpU%_hQEhc7mph*TFh@vX)=JoufK8Gi&Q;*42Qlefp{bV*vSl zu1<(OK+G}$+GrON4U+ZVvo5K1I8 ziek2id-J~bPPpg<%i@AN+wjVO46Rp2hAXvU)>!+?{sV^E$dHg)47}j1zzO} zj+xQi-Q3(Uw%fpt7OWkDm|WEr_8TlylQWRE|&<`gBg(dbi z$9x5zb*+64Yz0zZR;-sIrlRDfvaw1QWtS2{PpnS&DC#_EvSHPzTLX|KV*JINSRGL5 zj)pobv&9S@QLKU})mStX1H_d&TRtb)z2G>AlBtv3?W?XnkB*$1D#vNf3u5EO;{5Z* zm9EyYnuijxa(g%GAjr!z_%5G+vn637$XN|StpQe5yVhuIS*3C>9rrT%YGOU15|_~o za(`@Z_vz5?UidfDc7{Sbp~C~QFY3MPSH>=4PF77FnhG7ZuRhsjnQd&eY!|28So5edR1;xO zkbADAFW0ufg?Zz1w_`)Fx}Eh#+E>~gO~LnKo$>A8iUVPUjgd{lGZi85WrDf6RPSaE zc_EMOFJ`$eR7dc>e)%FR%7v>5st(aq&1$?yIUdW|hSO)KWb}(|WhZM|MyxmhMu^rF zfuXiU(H#@^L#a?DPU~4Ma;N1CtrR7zrI>X#W(`H3iSIxryINLGQolrWHJZyL-=Zv2 z)^1w3h(njh)$bI@EGZ8RqoG_WJYnt%H`ZJ$S=(M**oy*ugRz)uKkE4$l-aly!QotK zlsW|PZep5XO^7NW7D&WfSiM_FZdetwj>=1NPrB-5@j@bBoyQY?os%oexiTC+?}RfW zx-4vn4cDTaX7_dz5A3v?<)-CXr%^0x*;Zv(lZs_jp43`6+dJ~D0S%rfT3E0j&g zE6c@V!)leoDIHqRj~qoKU9S$ce@GS@`J{|`LxZ^bb!bx#fH{OjyMYaz(L!u6%r#ST zvmwD%2t6ie8^}KGwC3}p0rkhKyxv@^*)aITlM7?aoY9YYHfHtjJ5-uzxyrL*VT_qD zc^aS#S*2NPV69Vf! z5xA;V9xA!QMgxAExxTl}laS9@cFZQ&+XxrHElQzh%i*FxQq)iVS9@k_B9T4xt5E%jbeSbe3xVHDl(F6cWLNl~JXa(11*9xi$gPR!;=w zv~6KNiu7qBU5?%L<#u5mYl|F}9AwkJ%|lFJKmoYKH;4$f6>|s^>x;fmvQ;S$$Aase zW+sd#^2}Pp@Mq4K_GBk-sAQ94Yenp!o(N%V86ZFzT5D`xroe&~h8X{$sr6jHs+20D znaJISLut9(YxqbLb;i%0_=W}f=V)-oNP~-X3**vO%QGUVk|HdLL^p~b z(3U}GgBp{KzAPE+hMH}rrp?;+HtZSx^dKL~Am(rw_{=b9y^ zgP}fLU1gs>>wh}oQqa_s5T_>tMfK>Q{BUy_MG!}-6cz(APniBCPaossS@!Da-suTg z?h~h`wTlV6%Sy~JrLb9=k)E6$-!W}I)CZlLe`Z$9YTTRb94XI^e2U0qr4X2ennGtY zHTwb+*Ctn-JwE3wh9Scw-%1;3Y=81Kl(X{`Ax{9oBjzbU0ndgB=7>+$3{LI$8^Lhy zUK`+qv z98t4Xn7?Y^DpefqjVUn8YsAwrc->DlDrKRJ4XuIQQuDYV5Lt81Lu{0_pIve9R(Lrs z+Fn_NiTJHe=OXF8uZ>99z@4h^Ru&c009v{@I?8KOZLknE77eAA^;{DgPqxHM_23Ni*1J6**d2H&&~D4GJ8xdJoyFH zbbY-sm_8BcO5n<|ztw!@oWAT(XIOfZJsKJ_^7>(H9 z5^bc2J=b)r6z7ASI-+L=-Ot=_K!n5+pEIFa`zqqv(gGP0wT3XLN{KLG#tzV(PK;g* z1)&3Tp##XQd|QZi;6U*<-q}d2jIrL)h&#+`+az#=lp2^i&4s$SL+(5-4S+TEsNpjrbZ)d- znZW-Ps@Na^CSeQ@jFEeSxsif2+6CbJtGtv$&*Mm zB@skfDM5KjWs8{LTn6ibV8iz?mt0?1ka16;PTV+!`!2qc5{gxmch?sESaHAr8Nw;Q z%C5wK%n1yQ9;bm=gOw$-EMPSYHD1&hRIP7Aq#&65o*p00WlwW3@fBFzs}0AD3v&Jx zHU`%=62RFM39%?U-y!xAhvQ5q3Z2L_jtt5|b>y?|rzf65K}4w#%8htw;(aka(`v4P zbTRM};Ut)`<+I4_wZk;F9Hc%q9lkJ6Y$EH^3@$L~md8YSD4Z4{HmpZ;5}ycFD9i={ z;>{f^F5RJu=!j&mp=g1widCd5zmkdhTL4zP#l4e!vM3Lmq4@fy14_uk!2qZz+j3ag z;HGcADPe{)Mnbsn{l#qN>`A>juS&}tVNR!LEa2gYo0->R{GcPFX>QwLn~=#mJ-?dI z7bqqs(c^M`OVQrbMLPG%aLHIE3+9(D!L#0cz9wfUVyo8%bLT{?<5GgsdT$RYgLH=LctWj`#MRB3b(t|BUaa*(V)Xa%= zOs`>fuCTDMZ^HBhUbza%|8jkO2mUV~JHUlFM0y~bHw3{)%v4%KTZ9pRxJ40wgK-vvc6D3g<+7YK|qnbS}X8a*ShkBsc z8G!@rNzITcnay`&g@9NpWfA#AAuf_1p>|U|$A0JV6g(px%Yh5gPosdD@|hfxm4zTN z0YfN_DXezn-e*rZfS#YpU?mU?W1i7{q|O*%&z6>8z+%y8oeUB*4!D0lV-dlIvy(Ft9Htzt& zuBcW}j-o=C{;{?C7T$;{+X){tRHyD3Iya!n-B_`y?W2w=Tr z%UX&D5VM!CSPOhUMC95oXfH054;UVZ4j18kX-NuhQXH zXJ?2rl?_6+E@upqTzl5ibSg$9q};Pe8gX)Gpv3|?mJ#@4+Lf%+aT$t*0?#o_#I!7T zablA<&(VC5NvW-~oY%5xD6|COH&UaMMSj7J&1=OA3*4fg=7?VaAm#CcMY zj=Kk#beNrn;d=s|)-&^k5{d+!_iy8Cq{F?Hd#sHV7^-#M%0!DGCW)~l_7)k+3{gTd zB6h8^ZJN?5M7xHKqs95@fQf)(zPT_I$vOosCq5R1I*LSGO#6h6VCzd+X$5jDHlHI* zKG>{uNy`{a+Y(wVT3}s#g2RNKPV*^SMEDfJ=mZ(Ky;hSAl67=WUMI?ShCBFu*5CQd zx>hC38{gP3CgI(#ZOyEB8y<6F5`74DM@9f)&o6RDIV+tT)RZPWezmz`pfv1m4Tmku z8koE33$_jx0rAh-P#NJP`b`Jy=VZU)fMu)?;5WHPp_NrqoP8Ryz%Vm>z6gMYxhGIM zqosWf%CL%@yDI%T>bXgzq+CT#M4ELOBxV*4dDAPS^3~>973q6XEAk5!w5%JsVbnmy zDUctpy@X@aERseBUJ7z?1anQi=;TbLT7b+%%<25Pob|PcnD!>r%?z#zHgs(<$uBxf zEe?6^Lyq*}vsr;cBeC~6Mg? z^f)lE;84>|(cyi?a>S|uTQY+4@3g)j7Y ztKMw*nwu}3r=KE78StlbXb7ug4i)MzH?!=)4P$^`-gI@Q00^jXHO$52&?KGAM5vHf z5VHxHWEW~Ua&wK%lphJug<`p8l`X-_7BV2brB7#yg(AjOBKA82O{WDhpXyFL6wtJe zu!Q7@$!SS2YGiUyhPoJFTX=0O%I60oxwNGZ?USC8S6hCIH0HxlsQ;0D>NykBbEHGZ z^5b$1b|kF4Zbl-;pRK8(vrL#={UOmP*2X0yZQzI2|iuWk7E4rU-=+s~XR z=lcu~2$x=N*?Bn5ZwgTt>@HLDSW-i|8gpOrJtYXp2z$lahAg@VBdsyn4MDDt6rqzMw$lT{1WdZ8%b|jX%16wC4{Bl zNXA=4OB&lPU!gh1vW6oAen^@?9DAKoe@IEjMHb11%@bk1#UaCm);7T}-BH3C_Q_0? zX2++^tQI~HZ}oS(wTQ?`gxg3K4T`G^bdv5~W`w{U7pX9IH3PGjqMI2F5kLWg!$zGM z38@&J5iksgkxUZ9s7YRW8Z0frBs5-YiyIz*g;Cid z@)d6LjNpco43Vzz{c1gL;P@Z}uO|Ut3%xc^5s{~drMj@e&UOe)HMaY*V1Zd}Xc_}k zduS_a&?IMHKYTiexqN$Dhej8}GNL=F_BNf=8t_au+_yOBRO5*0Rt>%bZ{D?+1nR{_ zoXM5crqFef5X5lB_-eJ*JQ3Q{A~juHzOk8DGN@O^wN<>Z;!42q0l7qbdDXj9i1duq z{!sjsbC}tiV{R8|qZsc$EuC{QvWCivRal+5P~pN^yv!3zL|HMvlbMaom}4L2i;e_!&ypyet=3pc+E!(EW@GJn`?j|;jGWGvh7LDn zE8Ywj3+`!C8Pi4$V1@*vd?*~1K>Gp>@G)3PEX4o_SsgYLUfkLfB_qq3N7{vHj`dAU zj}fMA9!?T`qjZJ6@nwd6vnfNZ+d0}mHVGlcPFv7HYl@)=-aC6y6T2nd(lX31 z%mK_!Bbt_ZF=~jzlY(5?OY2!haT??(Z67MjkG)W5byzUx+Ta=WJ#El(M(h=4=tA?9 z(5>rK>t``hw7ixg32Lk^)h{)JT;@#Cai;gyfjBNMMAauQ+lk=bG6h$bV)H7LTBP^4Q3x$hE3kg zIBuCEGLz;m{3JIcv8@PIJ9sdL*ufeF#8>0ZD!C>1Ms80Y{=o@?i9$%0bSyjl2?ofSLvu-Xc&z<|i(-A<*o5m`!y z?HS#@M0J3naEn<1MOJ;}4tt2#n#ql=yC%jVbCfvg+pHH`3(RcU$H#b@T`|40VoWZb z9N@KL$9DZn6%T|Ol({rhVFsn0RMB)UI}l=LZ3OS!$fu-Dw81kr)6&W#F`3;FaGTtS z6jiJ(;=oho_;&i_>5~H|?WV|~Q-hup$#`S4pIaYKY;0~cPAD2u zzYRyfUjwN{i?UP_;H=PuMI#RTvO5pKilZa~mB5{diJ38kdXZ4hpPy^h_hi)e1>;|gwK z_v`Q%0i26=mCDGhu5YoSY(ZpeOKj0tyXv$EV_jDZG0G4FGA#BWM+*Zh#f%vAx;cem zZ*0RG8j^d-?b=$6M{8UdylVYyU0KS$t(`et_i-v0t4s1Ol%~bGO6QMW8soDmL*Zf#n7y3OvLj^6M0n=oF&#WWH=^Z=;lKB0n13x z$rjZUd7k!}5sRqn3tz7R*WlJ#KB9D2wJtU53)m@^CG&VI`NA8GWxVdVmsd>-PHD8z z;Tps#d`T&fC|)Hz))fzTD!>KU+ZxTyL`b)IDYAJfi?{?sXDkYSM`uOZ0Zp6N3YB1oFB*1^qxq5q zFKcB#gAXxN|BFMygo2&hFL?u{XsC@5fe;3m#}}`JIR;j^o#N;5|q|F?3Mf2)SI z(=15#b?fEzOnKEWI4w*A(5PZ_Jpcf?FfwA8ag?xJCcI-TQV{SaRy#es6b|FCiMPDu zxUFMS;Y5NKVhuI({ABedT4*n__52CDym_6HIBCB$UF8ND_%_V+oDfJCZiA#`m<_Z4 zB_Ij(5;7aXL@F=~gjLAw*0x4%HQ9yVvCQnebqDtKQdpD-VB9`k?R0VgS*7Ndv)TsS z1?H&6TW?EtYIaSAtCGCwZkm)uF5s6S;Uf|hJbH&~Z{SS0H*;9-C1J5yA-aCa@$~gj z6fAVu1jM$3)T0&Y<+Y;>1R$&-U6@6(#*EQNF&O<_+Dew! zHs@JkZKX8ElMvfqMfm7tntoPXN#G4bE?W&y_R>0gEz6Q-s@w*quf8c!Te@0bW8T}R zAP#x;q0)9lQc|)To-VLe-2d4X&^%7tuP?lHXBEFY>qX!cQ^VZf!yN=;$tBK$oquU0 zK^QVFb5Hp~^5(G$r;=xg2c9A(p$lAgB0x4A3!o8=F4v~v?&5G|R=MDro{fY{2y&bA zEik#$z|M+^UsiS+n4GlBUS>Ed3QDPL$uXYkdR^uYp2=Ziv69WDNbtE<$5Y6tDA`_FZD~nRZ=C=^~VH!bo;Hwx(rVpH$+nIaw^g#dK4}+&p4xNOUf-dng)Cg}q!7^Dx z`-F%G&n&I4rSD>3ge7QuA8LC))%Je6?fsFq_cQ6c$nG*MLw0{8EA&9N_h1V$@5SqB zYqiAzhJyQ}m|7C(*H&2%mP}cWa2um-tf%#=AL&a=%nw;VO;GMfG&_+H!8?*(=)Qw< zWo>OSU)7Zi{sk8O7g40IS#MtMJHh{@J;(o+OkYI8IN?L%dNoV@!sQcNepGL>>4~e_ zfNb#G*j;E4TZ^9XqAR!OSJybF_QnT za-L8@k{4IA3AfOEertO(Ss^?=8Q!Xi^VV$o2IMzdwZTVE4-GtaHm#dY<@s$?mH^GJ z9m-5!)jMu$8NIXvLoFcfN;XcQ@JhxB^maPAFghV^FRf?+b#n`~EHq=U8F==ZRcNnS zjrN-BsjAA&Ouc4v-ZDR$He~chNS-1zO3hH9x5v^F%n!^+o9zBYU@doT5M5mR-L+a% z$mMKW{Jwg2J)?Pi@(aJe{U!KKK|ZeZ%OhY z-p})F`G$|&{N^LqrFDFPZz~iYKGJ*OBS*42W^YS+M=2BQ{2=cS^Zx2k=g;&0d8@Pc zg#+*EI#4_G3!gZW4Brsj{K)M|?`Q1$&F{SKh0?nY0Ac*Ldq>jypnrSex_6b{t#7g3 z5Ap4@_U(>$_Po&juIt`idQYM3tCHSr`%a(f%X+Raf510y6PTz|@ao^s->)+G!-tPBZ_l>3ZlWX|Mz=6Mf=*WE|H>CN0^)82D-~0{FuRiGC55F2* zS^ckm;re&=yu157*S)v&KCAn|1Apz%kylf9pXE%FFTN(}{b`7C}=$dNl<=y_N7yRUms>AmXfu~7dv@%=s@Ps2gP z`H%G_y?qDNZdPY3^Qn9IX6^O9Gmp0~lKw%;?1P8DSbC)Ei0CZB_QL(plGmfQhmSnC za-^4c< z7vVquP}2Kd)W=+K`1=k#sSd>NpXd8`6u!U1`WL^y{q;%jHx<7BrNZ~#H+25qM;ZP5 zAm95+!cX5jdyABm!tn8vN$(nY+i;kUe_wynyT$j=hm@v1K>9ZrU1a0mM?U?#c`)hy zV;krF+f}|!^Zl?s@UQoD(kohvG}XuZdEO%&F@1&f$8+hCK0iYGq@`!@#WG*y+mpF6 zvCV-;oF~QiKgYZB#rN;x{W{*`_Pg*_3JMK6zedx$_%+2_H<&5Jt@X0$?{B!ak zW%TbeeE)#W^TOO4KJtaG13z`>$Q@Lb_J8rL!$$vYPQ|`_fb_G}71LwepCof5&fq z9li-~u^#1%czdPkPtu0Uw%3DV+HWtJy`#g|GJ5!H{ZXQ|1jyD>KSND?+fkDk^ZdJ zpRRKQi@wa+{LIse+V~WW{xD@k?{RF@C#8RqbkR_!KK33=l7GtgJZ-e+)B6DVK2JW4 zWqkj)ZSP-bd;j-s?|;zt{vX@kzu5Nvhv8lQQ~O`yy&bno{|f1O_+$QKPsMT0c!=_! zZ%dE;c{}NmR+aA?c%P;1IL0yGr`qy;W}o_cpU&h+)%P&(cQ6p}#}~TZcF5#CjhDWS z&iEP|Wy}L3&O2h8$7X$g#lGFg`)P;G_@nZ*)5PZwCCRho8}NK{h^Hn;DgC{w&(^b) zzMh1gON=sFRv!IZ;lD^vqF<$d$1_m|JC;e9!$&^ZHGAmDF)9#@vHat?^6IP7xq!L% zw=LaxSl@|(}Ku(bRMRMb7kA{ zruSF#^9^(07yQI`k`vK}=uF=~e!=JGh|4;SBgrRzWxu>C`?dTR@;;}$v7W;hy&Z6T z;Dtld0J1ipyyWX~%=-c zQZAqOC#;?fr|L`0yVjQXNz2R7W{!sbN=8F5kJ=72v>a(Dep9=#?UlDU z4QagMcM;Y2|6kqP07y|?`QlaGH6I|7(V!tNF)cxZh7bl3N0ww6=0nf{=A(f@3C+MX z%;pJNLkwp&YeD(t9{Nzw_ptJedodRG{9$%Ge<@x$aBxxSISD@> zzMReYQ+*aI<^_g_dPun}K8o4qr0-5Sg?&awu)bt^{d~-Mp|8>@woUX2nlCH&K!a1r zGDPkX;DnMZ>8B#;TCbPEuQB7h#?r5)UJ1~}SIMXC&bC~89_qNjDRdApN(YC=lSKUH zm>E!*k9_>BMSV49pJn?Ay$9FPHM-E)me3`;u9x(`G*49jk&rj#eCXeV`4uW&5%P`L zTkr$h8sKAH$;(d_bgs~KjcqY}KRj&fM!q38IfZmqmPtGunAd_w15+I9E^d;a%t; zIl1Twq>DbAaUJT5Lsw+`qVTW|TIPO}N5!%F!Gl<5?aRbT8VDb@wcvfwS!2=@_#-R% zUj|+8K}tHvj!n1zD)N}F8z9R;S!xL@By99v0M8F_3TA{ z`n$-(rLmF5i3pv(sp(N%AEDFkxcOUl-^VL8#Z zp2R^LALb)nW7<;iC|pZhNO~V^S(PLGG}854K;#Z;vFjVbBY=4=7?UgPnCH_cVqL?<){Jhp!Vu9q3(mx1C^Z&nswXd*ET4->5HscR%5-W!x zS$9bvgKNR{s;x=K@0gmkt}gC zOZwV2$KUS^*3MZuIrt&kX~7@nWBtmtK4#OU9^{{dKaHy+cnYxSgG*-<{-Sy^ecWG= zuFI(hzn0795xJU=`e?pkXQ?-1ORoG;{m)j8Za;`J^$|N#pQu0Wy9lwnL)P_JLxYEU zGQH$1=}l)z-;DIJ$ZPf;l$;kL{M3W;`B{Mi8Gni21>ZVcV=^4N-=z5&)1vhtUj0}2 zTVnTfsXy^P;BiJ?(M*XqOh1KmSyK|f4b1hC$Z{GGKNqdKOX*cc{)Go)Sq@D|9s@X4A<}z|K3Qoxwk=|Abl<9N#kF^+C%al?~=C8 z&Ot`b96Ts1dr;>6=@UPIj)%YfJ)+$5w|)Q}Rd5)?)IGV7e*dTGhoHapsi1yIWk09; z{p&yG1L*TVfWGkq=(LaRgMogtlz#jFg8ctG>@U833gyp*j^dA1OP#_ifCFEy&EBV@ zFE2d{UF2;Cy-LY@1K75Y^o?Xl9$20CD=)FkDcla8Xbegqjr!~d-P$L+D8{|jnS+Z! z7oARlrx94{h|}Z>M*|0Sv^tSr$7ABE1pdK?{XKy{;?>B%AJ=OB3iYltYYoOa$-@{X zV+YHY^b(UEj;V}4Lg&~LT`!m0?N_rt5Waj9Q$p+NF|lQqQRI~`N2u)2SK@Ey8kGz(6&KO7f%b<_KwX%t^zvwD+X^kZ>vYC4Md#KZ~U_MM)Qy<(+i<@C^%k2Bx?TKD^~dViEv9oIUjl!WJ7|^cdu8Kd$!z}~h4AbF&v@|r zet|i|0c^%u{e%Z(XBYm|_*9MNGxs{AuCGH5^-JK7Wfy%>`fpHntjuN-`yT<%aPSBH zVY-Q1+Fnfo-OSO%Ugdv5y7v8pu%BM1=`!v;i>yAC&U!}UmUk%<@i~e=)`|Eu>a-r$ zmApr_#O`lny<+yah5usES-#*xTDK1`eN*V%zoK4(B_3-%sn;&()w^1rjWO-9 z#=ZG@Zp|CLNq-IW4x@)pZx7S!@4);@(-(y4yQ1`lFx^>`J3rfqL&y*{^L7g~f(>Usrobw8OyWf7= zCvBaAeFNjelN<;<@59hEkC*sOFeexkZ0phZh!tDd40Y-X_v== zZ;7^+4BI8$w9e;EkZUMi4uXL%dUj}(6MCJ#>z$-dz!nGe8*0{0BMzEH9$k2n> zFiz#=x}Z$o*Wy!1xW5^zh6d)w=a_6f5}8k|cM7>xWS(=m-i~PrC6mt~R0cBryI+U1 zwm69VEZ47V%v2WnwZHB&@@-#}a*^cJ;?K{=JHa6zh|eyCVj~%{J%jzwuApneD+?e*mcYM z*l*Wa?Du*kkM`{q2-eYczqW7G_F_ZoXvaj`UOK(kl-ECf^I6h2sdQcTL6aW%il&`> zAKK~nq1k7)0-4$tRUcrBkr98Q|LeIn@z7%YgOBtF!O``Kq}PL2kD-#zF_iOK!N+hN zjw4(_Bal?sIHJpz@mKQd`4HPl(ye`ic9QhT;1QiP|IxFgSE+Qik;pk?(z9z+6Muxp zaVl3C*585{ApA?Mtn9lSTCb9b-%FkYkvv+rQKqc}KhU)2BKdS#|2OKVb>|otjfY~7 z&iA2l9dfpOYa%rE8Ij3$F>Bp+yVfm(JO0nmH%b1U{`ucPJl+m^g?(2AV{dtO>}C1u zH`?`+8L#eezrc0j2=I$;JB)0#{}a2;bQXC|MEFb|m5=k)3a;O0+p$;r*06i*8cF*D z=j8C?>@%byGuj7p@m=i86Zwe$zdqLB@Y=8cVtR$|r4@f%OT=Pvl3!mvPO5S|SM;o@#hPrHC>-M(1 z{+>;}lnD_YA*k`@h?%xY$-XX9VWs%+p`Wam7n4x*e zC%m{c&*DsDpPCVrOF8^7AOE6y;2joc{(bg+3DSxA*^a+l{F{8b^gZGX^0R+S`>;Kj zz8UEWmCkF)f7GOB$F0)AlVWptvx9aQp7n;uj8mn9OM0^RB85IbEF+tDFUp;3XyJXm zp-7Xwg?65iT^C5XLpEWb9<=B)%2KDf_uFR~WL(uUqxuMKJMyfK=qfZMJIM%b6tL*I z+t5Pwz^h|<)rEOA1+mKf>in9)Lq&J6I=SjC^brr_wo9~~S=SW^2)*E^p1NI`z8UG9 zH%U5qn7%*DA0G2bJC=hc<($gW?3{%9Fb_W-{-XL35BqD}FaL6If1UVzVD32xeI#(9 z!efA0rqIhHxE^?*qAvixNZ}R0j5n+=%Uch;0@tRmx7e{&WEXC>zMt@UM*?p*ynY;s zO&Mq+2_B}GJO{xu2|Nk>nfg6w-=mw%K0O(I8ZT03E3p;N3q|CP^5t#@t;)QAne#p2N%1b%y!e~&`A=-K z&+ntttuDNyU`_s=d27A9;_LVht>}8u!xE=M{WMFz@DY2TCR!KC|03uwqP(-wcRlJ9 zt^_^T8j`lUVu!p_74$pNzY;XA(R00TDz=>WRj2R)S`uC+o z|LbX!}_q_ zkHIR({ml7z2$`>Ko97V8JNF?DKMLLYTZL>)f+%N$k(c#{#EghPkcY7%C=)N4;uWU^(r7n+`rE<2 zZ;$|uJP&8BFJABL0Mr_-uU46D^zhl4Y1Td^7ysdX$fN z1^D=(zJjZfkNdNNN#_`)aeV~CbRjx%0)HZZ60X(${9M_e*D@Qylfa+k*@SC<|M&}x z4Du`ibrqg2 zXxW;t*XGYY4=sG}r<=}y=q&j;-khy&I{y*Hr_&FgB|UML^o=V0{o3O-G_;;4XkLjY zVuKRM)buDOP1C1*03IEo)5mmvgy*ae??5aVY3_@tH49?Kp{Ja}7r>XmAN73T+ZbPQ zoooKZST1#W-ta_zb0QJ^W{U7#i2j&kE;BN=X7I3tFK^;rr;zg0cr)}yf9w>$jeW-{ zTwuyH`nNKU2o1?j8~)1d9Hf)9QNW@D=YyDy$UZTCK*iitRADTrKUf{cBDJqhe%_YL z+LAou@F)JL{Y z_uLRK9o*|C2Nz8~d;oKs?>`6Uq^{&Y0Dg|2*)bEdJpPamN6NMCEc}SbVLe0|AJgR~ zkQcuf;1tGX-OzvSF~;XP2p;ZbaZ&RN)^#2Qo|5VK z2Oq{r{S3pbfrtGqr>TAfw(@j-+6CwMI#sYK+rN5n(T4c7hqKS2Yu*ItJHWdFy!&$d zhq-^9XRHrq|Km-Z>sEVn=g04PZKXGVacqg>E$(#(J{te3b6MY~`=s$2TJ!K5h)wMv>-^{}THj!$F$< zxX@~qhjLeWYdrS`{IkxB-*VeFeDT8N#by#7_xAH^zxSLM&mj3ZZ*?B<>b$jihHY)$ z&OC_Onb(&W{{r&&;R3iXZx=B5cjcWVemn0B_(9*C-;z#q`+1}B-V|fsCEbkQ2+j(0G@U?}4sv!vNJ=!fLIp)@TFUL;CVq>;>XJWl^cP6cMkZiNj58>$4fYg(*H)646zFy|b+Z1~^2IU@( z?T*FnNqW0u2V&?FYvcE_v)&uOA05Opo^qdxxwE|9IBLO#oc(xb+_f<%wKnz~)p!os zW0@hAOLbW=d(Op>c<}^PcW*)(N$Fk}IeXnZX{0;d{Xin!d^2MWGQv|Pd=6Ki1Ah|y zt6hNALoBXwwU#ag5LTv|K?9TKxi~A8|0>sjc+TXqWi{aN7 zj|cOFa$J?CW0^v46$Q_R;5%KyN8BBNVTBegLCuyx4RkMeJ*&B%TsL?-+&-c{R)U+t z{CMSHq`Xc1+Ch?t^Q!7mg?iBE*ow??8jvF#YP~^4c}tzKmu>TkE=IjaPeN-MPlvzA zw>Ri~y2JTHVaTBu#WM&V7hR0&(PNoBwgi_Y6HGEJo^+l;zDOYsl&FDG*PEflcT-gB z5hR;x@E=ngzW9x4Fm%Vyh9(<( zsB@jKt2cT@yfA?Xz`}V!Dlb^P`FO)e4_x9D{`sPTu6yw|@WUI(jV~ikThQ;pOG=PH&s}LUbV-gsTfuW7n?OUefo*o?+R~Ad*=&Q?9qyeU47^oO=-N=$Yx#K3sDIp&I+# zXWV=o$;$EU8Kz^?(kSZH*1{)hlksjecM|n6;l#)c{_&RfKz7fHf{c^jO%W?r7IgZT zz3wVEABX!ec@@J39e9JAWj*Nrl4-w0T{#t_`a;VV;5ma}fI$-&vi=5Fe={Yd2FW$v zpo>uLi%ejaMn>SQ@g`1Dk<}Y=8S-CtdAtk3;)+qY9yL1Nfe8U@aPe3$&WAZdE|ygy zxbU2hAmc~IL7j0|?P9p*@KK#=hh{@=TA(`s*1v$;ky7&|bvXh9{ap#*q_3_rKS$tr>A-tdtijT{5Z zl^ms89OaCw4wESq!7<_Ys4hBe9CJPsnIw|PH%6y{u*$$8$TVcAaq*$UaXs9abz*!8 zWK8t!c~lz?B_YJrAjF(>4cAH78~FEUF*7Oy)9j^kYyyru_G4@5>*F2TB9;~y~dxR^NN4(ucyS=?cd%YKlUi6L;9mDDls4wqnE?=I`+efr7?-0?U zyyHa2^Iju*EpKZ+(ANANY_1(#`XOKbE}~ueeFgq74iyf>V8jD4B-wc~lAhqO_XLyd z)DlUUzGIMMlAV1c>G62%9tT?Y72rGi5eq&~{cF5a-j+Okt;&a1HBjIQe(lcR&#(RY z&*!7O=kpH}oz6dPzt$IcOPr5mo>H)ptNe{vL}B)ca_r;*J>^|*dmcQQLSvJ#-lf!e z-h25Q3t|(tnGEhcqnEco{u~YcT>Mbn4oX%%ktE8?Qr>2II<`BGXtF#0ORmeddOJO! zo&1`EwK*DT4*o&4=HeeT%N#Vz9-=*LmN{sagG9&kcIV@3cRs$50c-5|azw!c`NxTm z=byCrWd3W!ujONL41ru6&#@B)HASRe9@WZ^*PGSnR@gwUjWw`X$a@2eQ%in>PJk&a znq88Nk>DOMk|fcx7oVO}+Qrd$}OIH}(h?kS4qS$8$!bQAaODk6gNvy@XK-wjJ)*Nq^owY}kL!a9)qG>5PGAOw9Jy#GrGqNcGC=DY||s zI9K+Pe=}@CU#9|Y7GHwFq;N2n4jm2#&%s3lmaG66K5iI$A3V@A1}=&% zS>YT)6+(iK#(%?}_M7^MLZgt1j|h+Pv$T!nY|ZEU+ahzNCc_F zI|7Um{7CE=@v+!T7O#nanY$Y?{D-qEHpFAyj<+YiHy+DSvbQ1rWIQ$wCb5?`pt|1X z_zr5d15^p94wa61s+L#+dQ11a`SD)I!QwG)5Iw@bf>?Vc99}*)X?}?eubB+_7RHLV zIdXYT_EMM%^D+5f7t4=VyDVg&g|V^0<>c(8Fk$%G9BVP!(RmrGcJ3nS^IkzO@v|CCf;;TqHAZ{!JCz_jz^DdZ^VpX0$%+ zO7dY}3#K26ZH!C$#<(qw=}+c8l_%*>`K2M>}Eg_aqTD1ENyy zT+_s%0v#_ufeyA4lVN-viv673?U%4Gvaa0*6ZgC#9Ap9RgICVJZaIgzQrY*YXyt?^EBSwYLb$B}nq9P<}cF5b&s^tIl4PQ=!G zTR5NGg82+YZ}pDS>Sw%Fd1CyetpL`VtU%JXDffJ^8UF+%pjqukq3OX7U=s<|<2sHb z*g&?SYbxazu)VX9E zuAyqMg%}tU;rktIXnXHqYLZ`=Si)_Q^}K;lgMU`#A*qu|rpZuoII|=fkH%IiJX(@W z-DO)<%J4R`vb8WhoTdg=#vG`|3aqh>kIe%b4Q<7aV72tdZsu}pRUZ11osCkSH-0Hv zVd-YKV1+aA&)kk%l?Rua1;1LCCuveJ`6nbHHaQ;^oDX@JNt1oHVOQqxZd%3WSj8>U zI&6_{BBDsMgGsaVdqO5^k{yTTS@d=t3I|xGW-YZ*R&?C>OOug^VO$iCKu-MuB}uru#9ZSj%IwhP#6J zc!oC5(&kxboaYo6noob8PW8NZ*hBw1Oi8@I14$Tl8I{z`>zH?n-hRq^hrI8Q7i%K& z);kz!@Ii67T~q^cxLs6Z1y~<9)Sn|6bDw3j)d}wnc9v6=QfH;q;Xw!cfgG&RW`U`f z4q(dg#m$nMafr!V0W0&~+>?3!C8MRi^tYN2hYrQW2MlKxkXL|TuwVRXcLV$Uh8XrT zIl)8-n`Of?LPp+RhN8X5EW5WR7xp=^vxzmPtnM%$!s;+@H|w{XA-x)gw;lkc-sN_q zvBav_I)?5IcAM0M`;f0}0YP|o#r80o?zKU6SKbp0Dn_{SmsQw%Wzl4sXVso(hY`JU z@J?d+fod@_V6C(+?*TUF19@13&A}QBqf~I`1}%Gn-1ESFhIerdcb(;)XSwUNTW!SJ z5GovkY`P9Fn1Q1{IkrnvVPNTuh~dUpL3sQUX7DAgEw%HH=)zwm)LX4YHc-b3+6;?70TC@W!U4>$KQ^c;8LWq9`CLz)NGcKm`2VBgLkGS58 znABsI{tCzkFm3jZxGxeT@fA$nx#HO!^PWUE#j^jI7?wQG#2xRK@#8G+Hsuj6rHG8)9poX)e=PKIP5W`Z!t?l2&7GpvlM4zTPYGlPKw=`=)Ec zk?E7BM{>t!uV18-&@zYn9%o=lD*=Kw-ZuGd(V@8i1Gxo}2{BIBE zP4Ot~zu=f%D!y&IJL$RUE&7C371RJm;-He+1u+zCAfFXP8-`@WsGO75)_P28BNZyiQ@h zUb9DG%GVf=e>z(gy$V=9)Q1z$y*}NAKFp6V+c3De3DEU1R}qwlcc8L#@()wE1^8nT z{&9*<{z(eo23#89pR4HigHC_3b}TgIi+}M={)a&q>;hAMlgfV(xH%$!g`yt?eLmz5 z#W$WfHS)!u8EJooRKYGV>o5LG{xi(xf24i+{IE^3_S&y7_2cuxnhr~hL#~l16LjwMP$wB8C%_8q4=${4t91`fyv=`56 z7W%uO-wHg!r?dRcicbFR3J=2e%)`J_6#sEWCqK`3#uq*@XDIl8157`Z{#0^dKqo)X zeKzdi7y^)^KV!5 zHK0EXd`#ufd^C`6%2Rj?%LC3R{^N?ycWJ#yc|5Zk>?X(eK>r=EuHT-E0y@j%S=NRf z^*aRqXMuUPwfGayt`_<$p#LMV=+FE-t6J!%LH{~1f6q?r`P#<1j)YxXIBfI69;U9zZs)bH|o^LI90{A}*%tzLxemvh= z=+}aNH}D9h{{xCndD|6cf9gvF`AOfca2@1*12_S@h<^E(g!u<5Y~sW4F#U+aH$dLc zfDM7@?|?)8by-+G z&)!Bhd}7Xe@IMRunn8a5`D8$+e4fEgZt_0}{>Oli7-acdMh0~9^DJ(1lYb}pmji45 ziI)d-^7Bk?!w&v$f`2OTR+HPxKceX5=Na9?zaRXs0&iCQO;-eT^7G7Y;r|KvZv|ej z_}@`<^79OD;r}K02LNmS)rwC4ko6E}_{`5Uz9s*!k^g?+1iq!cM~)8YG zeG8cLX5k-(bG?O5exCm=7*h!665tNSKT6TbKUQJtyH;V+d2Tqq@UiypQ<(H!3N!yZ zV*-BCdA2yd@QFD*#P>X4o;5D|AHOo7lOG2uWci5`3RC{v2!8oH!f)-{6rpccnDThe zIKJ?)^?6xg(s|anA^Y?ZR|S~#F$zFlO_ao^7CAD;m4MlGZpxN;`jbKpp&0xqzgaWf3L!%^Ne&&FZyhN zO?e74fAVu-`Ywe@?%pbj(RZ7<0}L#_v9c@T3T?j^Ozb+!4XO5sY^cL-Mh{4&n6?yfK1zNATeY zJ`%w{kKm&b{9*+EB7%=a@PCcq;}Lu&g5QhaKSwZ{HB^5$g1rdF{y~U;Py`o6@Q?@| z8o`(&hU8(a3*iwFJTihuMevvi9v8v;A{b*%sJvtZZ;#+NBDf?koPS>gd-(w!_Y$%n z*^hCiNPn{9%`k--4-yKqe@;}G^hpYnUac_cNrg$DuQ2J25xiPq^6ydj(H#2kRrJ3H z{X4)TkWb?2F-3m{^lDVe1>MEHES7&<(ODigWwP;+bT5JjMevviPAW`!Eeca!hr*=y zMev~SN%?W-`#I{nE5g4|Vah+KFy&XN_9w1Z_{TZqAByCES>fY3_)jQ0%Rd>xuSM|d z5&T93zZt=&BKY?ad^&>h8v)t&V|@o*7hvi)L}AiP6efL&!lZX7O!|rl?p2ul2Nfp& zkqADjF!|3YO#Z^_1AR#!p)l#A6ehh=Vba$qO!|&#fjpy+!laLy5vG?bO!}bgty{Yv zG(=(26ADxQ2!%g$-i1*%3G^2=__i&`fgU3^hvd0dbPr&56wP;VCyqR zVbWh#nB~8tFzK0OApg%f>eH*}m*N)7?ZD#@a3mh>ni=G${5=X&e&MVzeUQSWkDMK* zPg0ol6$(>+Zv;=S59gl}!PiA_RRm9u;MH>ic`QG9V}L(wZ=oTTyT$f?5zm=739!f& zIp{nGUg(r}?DGL;eO^|W^j)biooBi0{8jS<%>4BVGym>}F#UkSq#sh4`Hv_}`fCc4 zeoA4|@k2FPeLk0?zUFLp@X9#>4TaA`pjJADLVPRn*x58 z$8*u~g^%qY!y}mIq6__|9P)XFxX>wokHWX-;OF_>!oL~x?*WfMg7lYTicbA_p11IG zzxrQ+^?o(a>lQl8pQteN^Zag2pRX|KJjYwpS13$6&*|3m9SZ+lj{5N|YR&(e!j#7| zsfA9=v#14A|6vM~&aW%jJYdOxG3XBhk41vWe?ig5f&Sx2 zex3&``LE4Bk`TmKp7$&CxuD+xtoJ+iC_3xI^MHk)_IX2L(s?eh(2032u*Obj81o!p zP3Jkl8uJ`rjd>2R#ykgD|Tv|Rz@#S>CVj8Mr0h2E8qpzbg9e^jF~h zMw*p3X?c*J^2}MPMj-b8!CyhTKff~cTLS(slMbx!&+rUYlO6gz2Ks#wI?qrQ`aaPA z6ErVmnhH6Exrmsr(r(5ir+`FAVK^7lkA z&)q~aJ~n<8eKEkye@J2GKcespsK0z<{>JkwZJKSLp49>VRSy1MMSlzQ+ku-PK*smu ziq7(1Q#g)CtbPNm_fxCx2+AWr&z%%~E&%@=;G~kjUD3(Ub0~%Xli>e)g#Wanlb`2O z3ja0WcY(G1DT+>ho>M9O*Mom1@MTDl_|Eevh29AI7l219I?t9A`mLZp3S6YMf87MVV0k#%A@>zg-I_~nDnsRi7&kWJ|$J`%a(s^cxrf-ViBN2H#FGTYf zJrH2Z<2fFh-Vwp|YCXdC!5lVW`R)Ck`4QX`!F?A7{5x~)&qT`Gq%ig4`5?AD>+ky% zCY|SmX!=owN#|K1n*N5uq@Pll_4B?Q@ax|=k^aYXLPTBxt_A=PM1uG;&kYg!hj8^_ z;0qO<=ZFY>D6TFCW`gABxgtVO;HnsSh@zJ(`sJWkMCd$sMDiEoY7Vg0kLQpG{Tf^? z1m<(XQa;Zm5qc@EZUxrk9nUEd`cz!q4ZOn7Z|t`@px1(a{4ytz0Nq70?Tv>kvia+A zH2|1&me2en6rKDd6>b3k<-pq&{{clO|3QUs0{@SICni`uwEx%oKd#6Lapu)#rire1m7G2z?W-z8InN92KE|1y_$n=sZhB=sR)s zQ(!(vE%qDtU7_3O8+g8o@P89m*8m?;{LbG7^nU=o1o5&Lba}pw=dMWpAK+>L@Dx8k z>&tUjg#L3})c{v2I?rAa`ak39%fK>UV}72!BJ^M5>bJn-RsO`*fc^*2F9GiH>GYTN zicWbvlLcS+#GEs@dJvdrw1|CnZ42my1Hgv&0~nU*pM!zVz+dsWN!DNYDSpc587}z3 zC+2(@{I3F!SL*?u-y-zC0{yRm`5d?OFP`5b^iP2P5#arb&huM@{wdIZ0sNw(^ZXW} zmw^6t;FXHb^IL>o0s5zahbcPGa1lD5Wp=Iw9;)=``7J`919}Sh29=*@xCng#=-&ap zSJ8QXi_qIZzaChx_jrDb(0f3C5LoXQ@(dTD-vRnBfafXsJi|rk8$iDbc&$&Litjy& z&i3NDF2Yax(7phZ&NE$vPRw&#H0HT18uOeKjd>=D#ykT>W1c;tG0z1NOnunjEVlCj z#!HLs_)34&nEopG0n}eUGCuJv44Y=-={pLuemoCD(>*2c(H!!4zJ=zWr0_2A7peZk z`Vd?GLT6tNc|7+*Qrdm{Msw*q;j zJ5L3e`9~^D`ay+B=Wp`k3m?0F=Wp_B%-_q`n7@rLnDXvW`cU2)g-QRD(vS4_6h1Kk z3I0dgTi&k`eGaJdew%}TpQ2O#L4|)G;io?MB+S1~f%ES<=)GBbq2qC);eV(f^Y2s7 z{|JrWq~qNP=U~?V^PP_Y%lkHb|7J`G=Q*Xo!SnTb&ddmIieQ#soz>6ouj8fm1j~0& zAHRNn`?$_ZXc1lILw0siJ1yT3vD$_RY}FrP<|@;3o5QRO`j{Ido-Ut|7%h~)n{ zaK+65{nx;6DgHCSeEy00vVQ!5eyv{u_}8jFVzLepSa1M6F~az2>l;`&mCxgf1mUpM(Do+{<}M!!dv|I!MioiCClvm zl>9NgGARB{eFg&m0QLZz(dS~|KdAbC8u(-P1pZeE{HmhY0;geLj^~u02A2L%gdVj7 zSljcC2z~&V&r@-}L;F7j{Ed`T*yqc83V1u7XR7k)`+)yc5a@dV_yYR7&;JVW0Qj%i z_ibQZ{*b{~52OD}d6xt8c`1?q8Q?jPH^!Iu*T6b|E${``@eyBJ-_aUBgeLM~Z zCI2N6{u1D6OYNC!EPpES9aF457@uYWpVx}{u8DS z^xLZduLO7B7sP+O+vf23NwGI#oAW!>|3?Dz`NGvkze4BJz}kM3A~*^BJ=jP3PbxxR z27Ej0E91!*f&Ym63F~QJ*yBsU(w^)eUje=V{tmY{^e2GvN${T{jHllM*82Pac;>Ch z==qF96Ov*Pi!6+zLDZ@xIzG|2E*_ ztL*(Y($@lOd7DXxe@c5j%>1zT6hHshBK*$)|F>`0=jAEyhY|XJ1^$jdA0_=?BJ@81 z&xAeDjZFLJqoeZqWNE(-0c-s(0p|0?Vy{bq<@W&S&z}NLqr4Jd-Zj9N-i7&#?{8JW zTHgE!UIP3p%%?W`^}Q3A&$EmF-4o$|40uMp-7jGM_5ml+f2@85&JTfG;ooC@d3ZO| z`6K*+`-kLz6}T7tCD0Gu#CaX~%UFNx^y&HdiGWM*3Ff2c13&hp-EU$3OM&O8`P>BH zb2GvCPzS8*yAYVqE3-XWUNi7dp0a0>QQmF9lTcr_2kCbMKdZ)@hk>=cJrVpvU_Ku$ z@_!PczY07cZudu6-YMWx-2d3+*Vlz%wET}o@D;%4VY~vnv0pK;o*z#H*8VUBxMqMo z$BE_P-PVx&`4QY6!FK_#g+0XIHUK*bmTu>xUjhCO;yq%j(dX;H57yZCAz2>YeRY0{ z{evrf`T=16-U8zt=PO5nA6|<6ET4W7nD;lV{o~GQ;0rdP|M~tK#{#bu+P|gpWTC!hXz0#{tuxD?q;#^Iu}}Zvw7ZXU`!f-UGy? zyD^f#ophz&Ex?x|9x+~WJYN&x-vWFd3?=sL1D=NXNlgA{fL}%aQGWUV6v_W;1iuIT zqxCSn?=M4f<6{oSyGQ)|9|!&o>LcY91J6f&B)&}oeiq~VBq+@KRsd^zeV%xg-M=Qi z88{E}7=VbofUidX-t6OBfcbuj^sipvbCJK#r*8z-@*f5Ms`3xK>+Sq^r7zy~b{>X3 z%KiMm1gU)Cul|TI%_cUIfhdZN#5G0nGb>f-eKs`dtnD z6*Znz1M__)nA`Zn9N>RjV(&*8`v7++`}P1gAU?9clm10uE&pENAE^1kW?;TwM*m@d zdKCDp@MqeS`Tq|1f7IFiVd8znus`3cCq4lDHD!;Jz(2tLiP-N=;OmvYeFzH~zW*fk z9|p|#iPrk%e**Yiw8sd){7(V%{Vl2gIN-++pQs=0TMDe}R}I{Z`PgvZKU2W?_~jKi zHv>P5{e>||r2Z>`&qaHqTN`=nfVI3Gz?a+;^q21e>-E=5+rAOlw;@8$06(VMV?FRap9#vlANW=kU%v{> z_w&TQUkCmj<_Ft-eg6@-LCr^A1^%q^&p!dDmA`)o6LGEoWx#p=#Xj#udzS!DMfno1 zXGQp%fQ#X82mSI_MCf+|V+EezzeSGg+#jLu1m2DMkd6Ml8y5rM&um|o{~Yk&BYvUV z8hjL3>w6OT-#eVbbw2$Mz;oe0fGDrPc^CL$jPI*``nR$FFx20#FLDMr`5$*2zJDn8 z{4nsPSPwylDQ^VuCwF1K;rE|Wz`w!sH}$?hd=B{Tjlq0)E^tk)Q~0uQPet+< zB(UF#`iXtd2X>V|i~z=m;T!GYI>iaxpG16?{#_1y-U86`ZF%#6QM4b=(O-de{Z<0M zh5p;X`cf5m=A^ z@k=oNp}pV+hJFFCmUnpsPXPW2;+fc|CPHrp{;e8+ZUL^CVecx=EL!N z&^{vXBH(Q*-i!v0V|-cQ^G^iU`pt;odBA*MRpc!OUZLdQ0{n3mfA5Xt-vL~x@_z%k zRmG@nec#pT7bA{8hnxuPVYnH-a<3 z&B#B|&%XlrL5$A{AKwXlkLrJ$f&Vzju1DDZUjd$~#?PmK%Yel{e+c{)=tKLF|DS-d z?Urp%rz_LYnd$CGb!A$w9J}c1@mKfsjBa=EL%&t+?Hy(99m~rbG7VGPnr%X5b4$w& z>CW~AU0u%9wnfcIPp8P~jA(Qgc4oRV-HR5DUg)G!6;o1`wWZT4Qj;sLojN_0avIZ} z>BY@mnRI6=)0$e?(%zQt0$*c$YH>^Zf`*n8_=VvI*oxI({IsE6s~^XJ=bG6B=4t+81`>s%t^#&8dc#=EZI4MwFgTGZFl)?Mu_R z;*U0D+r98>8wbjg(#6~raTmOGrn1vk>AyPizz78kZxGeoa%0A zY+l;h-UxvxaPh*0W5JwiT-w^0%CvNuVw&5KG=0|8vQ$Oe!uG~=b!T&XXLDvbX8EbQ z@@dn`it&}2$_7SC`Lt4dU7jX$D$~$)vr|_+b!@6GotcIdr@C}ps=Ty}*r}dco+@jH z{o7kw(5%UHYll->eogV1v8mZ8BVC(b9L33o1ubc(q0unGAyN&Ejh(_&)!xuphlZ?e z2m~3;eExI~2rcPxDP&yQ&?4Dt(+!QPsIsQ?!ka5w8Wwj^mM{gWl2Y2y(X!mIgvF1I zh&O!9RC48&wqCQ_I~ygzQfJIerZSz)ix;OmooUrg<*B4omuc@vC8tg+9z(-kTRnA# zwX7IWOb+Xg%i7rv12s|*g&~jQ~W#>nd)eOJ-VFoy5f>C*QBbuTe{ND zwdqW%w7ksm+q)aVfa)TtI4cI=$}E^!S6Z7aPR+!>*)&tjEF!5Si$Dv3;y^A)LCq<{ zW?InIk!tL0UJ8%uYNYcwrW%{OZf<7(gR7c`tjjcHy1QWGhK#eQA+x9pH1nP6XaQ{R zY-L6p(t3JQrZWey3DKstt0Tn1w1&ooxzbYUo_@)l3;VMoEf?$J4x@Uw_>N_rxp)`0 zcVI<#-y(9 zpIDN@W_38Xi3)*kD7dS!wUyQ};UxtRD{F16=l<=#`NUwE`%);GE_==bC)F5rNM7~A*@0N!)K7h;xf&23iw%S27?~dYR3q+ z*iX5#U&^?CDOdGN86QbWPAz6cgxINV9o-qIwm5AHNFs#hBuq`#_9!9!RE~NH>}x9$ za3ZO@3mq4=L(`ZJN{N#jx*Ka7GHIu4IY!-98R0R$FLW@Dr&CiJ+8SG$+ZF@2G^Um@ zsNuWOTy$k@0={hmMzR!sESW=Gstd8-V1(&~O*f|&Hg%eBj#fr=my>Q=k}|NlZK1tr zO#2rLTha}kHf>=`cUNX?7e;GmVM}WUvjSi$VJ}d)y;zJWwFoLVw=HVNG$V~#;n$&C z(@sTC+0u+da!X@dck2R#UknV*jkek-dKnz5eVM~iS*{myd`K4u=n zhD>FbQ`yzr=%C$Fh$TiUzZ;twh?=F`g-s33Z5XzVNDIhe6AW`(y2s{X0nQ=}j_u13 zd^1gkYKD7rg;C7RhkVe`h?auN)ND~|ak>pra4Fgb%?D%SB9$_ej;3@&2WCCs&c-*o zH$yj=Okl2PYpm@_b~dziErLZbFKfnJ0AFqRYHsc5?&K7O+AU%b#N?%oSutH|R@17+ za6%U+ibw)WFpVNlM_UodN@*2`snoQtj;WlzlvYo!?o4+rv@?wI^dh=xcL#f4Nvf<&XSIRJc1KQc zokcB+F)7VBl*s^5J$stpTg#dn+S<}BPAw!Ll2w;gT|c&rj$PTAUV>3`LHFWm?QOOz zQTMK9JBNhE{x}#^Or%e4=t`$JJ>bj=BVfSMna#~Z2vY1$57mQ1#a*Hu?st2vMp(X@ZgRJI-4 zOdv>2!=QqIh`v{cCUxqTcO{zvq}j_#r(c<>t;Zxlm5#cYnUk4LVpMXfXJN7$FrZ_w zA3Dj>Y1OGZ^RJ?c!BvtTlWNml9pl+#2p0{e?S1=BK`R>zRdaZml~vJ~SJ4CKXl?Dz zl%X##K!u#?)24=){P{Nh7iFW5qs>$OfWSKtdx z7y?Qtmdg^|c2}pQ*F!_Ih6+YuGt8m^Fd~>fk*vKoRW@UqnWKih5OF5c*xXK~Gb#9g zBPRC_iyUVZk`7m131b$gDyuLZRJt3NoLOzBzM7CVJ?-A!hRLT0^@*}iyj zOPWoc!U_<96hRM*P10c%PW30#ow{tGtL-W4XbIZE)XOhBWKd?Wo?VNUv(t$gm|d20 zj_E9d0jG||1h=9#tZb^eePO1>32GUNK7I&kZR8B3Y-+hPxegBKFQhOE`<`S5keJC$AS`muG4u00GgHdQf8CvggHVt+HnS9IT0 zWC`l~85^i_YUK<%rG$l$;o$$p@c&S8mDMwKQM6Kdx}{+`r-7!GIvFi6hbe3COdD%D zGm_V)rqrcoUys&S&S!#1U0H=rv%`tgy^P_;bnC1qVq!{XEOw@~ceiEGeok@*>_4*$ z)3$KbYwBt&cB+!Fa@bEyca9Wj#hWHpVKrn0V@-^KT*SazFb??5l7h3N`(da>lV#n7 zRyAFs%Y-Vhhq@g3U@8+N{oavEb=$3hM(i$`K;Mb^7basIqqud^nROdG4$44BS?ETX zBilBpXldx^N;hUh9cbgt27t19Rry%ExU?k&Q|qjUU)w$vQN#uxqfLgBlh)=gx+&&P zOS;pT_*ow_-Ofaj$+g#0muqxumX{&cs3F2mrCUA%UO zbH~(z?nPEksEFi@s}YGAg3(hj&z9kuK4K>_*@YAeW7iJ3CL23Eq4537p9HbssYw&@ z%=UyfYDjDPC4-!*qHTJvk4-BD8gb_ZLYc*Hwk}i+nxtkoG-qbCadT*9Tc)`s+1#3L z@5a`q^?Ac=gJcz~YC}&&k4(roEeK+H*0#&S!Nt?dM!8J6THep+#*cM;fxU>?B z7tFtHr$fER_KWlgN@`hKGqbeZgomJM5uJ-8(V1mjsbg-~7gAkaSk-j-ot}o`4A)FS zRh;hEaG`2&u)#Vn5v_AAC7~n$v`ei`Q5rW6cIBF0A`Lj zh3gwLMKl2odjePmELe`d;KwxX8j(eQpHo^a7?gSvG3W;2s8qO(2R zn8Po^?;K?q5scrMO{XA)m7z~#2};fEn9Y4^*qHmtFhW^HsM4I?6!MJN5&cD8qSz%PRtpg-J=bug56 z6pz>bf=$D~!QgM9K8sch)9t>o%3)${vR(^8rjQWZDrUNb$unk^x~qr8vogqS!;9&Y zl2V;UXK#!SNp|`cnynyerLa4V;r!~HS0<-X}NKWY|1tW^+!#bgPIVr(9uzYGILZ`N0 zcKu{lPvmC!Gy7=S!PuW=`jaCv+W8GP?3J$mWT~PWJ$$+*h+X|D00q>wcXuvKb83lN zIMdRt(;C_^8_LFgMy!QFC0n@}qGCutAICsunh@U@H96nG!W`Qiw%9D$A-v3sfU~!;-9ec{>$K)y=8PZX?)<4*d!DK*}0AO!Sq7+oDt}XMWP% z^bCqkWwyf?EHmB`3WnL>Z*ojSk8QTWzdM!bNnty|?{tQ2=EI!RE4$eyGu5e`9$HVE zO&AOesRbO_vGRiDYAZ_1jj2p93gRDj@bR*Wv?2{;cJ(Wp+nT$Y)TGUi*@lx|RFz(u zZkf@YnXzcL*&oX~6wHJ$)nU4s)5PkRuzVAox>KFDYAlbM8`q_mD_6sA5bvp_a0{=M z3lO{8l95l zYm&7ycF$2wsGCix#UP`cRo1Ls0R?DV+M2*`y{&}y8R$hMB1p@%A$ZC%`o=M|7TlOLD)&$csiLK3;){IAVu^Y&t>2?`*QW$p9srD9Q zDcOSw=@MPyVDjqkxtpy42nc-Jc)NC9GX$CbYu6#62CYPdR~o}n>Z+!eR|Ex^WkL&X zdr0q)sGg02Rn;c8C@I{NLFdFcZAL?X6fr}qUU%6T98xFi66hM%e}e9TaS&xsZR4{d z7%H)87TQWw?HC$GOx(!^A6dWi!3nP6L+yz)F@LC$Xq8e-GiSD$$p^QcvWl9OA8vrs zPR2wWuKOv+9!COt&a8%(Zrlgs?bYn0DC-4yx4&z7Yo=iVzB8TnyGgE^yE;=#O|N!F zo1NCto$aQhjxMd8=8VQ1LUt)e2ls`X(Uyf90;6$@1~=)={U{r_nR9eQ22VmP=*EK1 z8O><`ZZ07g@04Iq0-Fu~b;E)Mo#~~5F!hv6Jf+aKn3-*!Fv6TDEfiElF3od30w9YX z7D&L_Tw}^WFX_aSP=E0Uk10ER29D2x;Zul*J)L)$;D6-ulfb;@^H*Rl#6wrkk#7^& z53-rhr}3}I29nG*aV7rnim2h^?*JS)3tugGsGqM=!Z~7|b47~%i0pbmKDmM_Pd$i4|HHEQ_pko9pX^kB zZJ={(x}c!l-i+{#e0!jCXCmMe-QSDw{r!dKI7fx3XoHc)WYO=7L(g$4B7B7W3u=dV z{6BgQe^=k(bFwXHKKfM={_uFU_$aPGzv&$3Up`?j%|9X9E}VzwrrRg z|6m-|j7^MqqCsS$iGP@haicM!gb#~+kcb~J#4Ir?d@=Kri7|_W7(BN;e98OW`#a}% zf9Kru-pw;`@eI5fhU8qN6TBB)jQJ)E#uo7ita;>D+G)Dc545&w9$<{= z1p*D+my}8~lbq6xcnxyk#gJyh)0ol1@sG)p&j9~~#GW#Lj(Y|)#;jL$3O~;S$CO8u zSzGXw_HyKXB|d&X`k+;#ROS0TZheaho^RPh1^FZoyi+}!v^FZ$6b~G)^0ZY{`PX?s z71E+PtIY8N-`bodbH54I)?;vml46N~i8e}rIHXRC(-h&1U%>`FWIo|m=@M?yS3?E+ z^rn52BsDhqMyi#3@)??jvDKkcR%ir9heMak2zeRX9U7D$Dsk4Kb<$Q=Jq``a$MBY3 z5A%3ew-Za`17cClRZP(-E>6?zbup~`8NW&iV^EtXrvFV4ScXNT9R~4TqaJ4QE2C-c zStWTda+fBfMbmPQR%6A(+PFK1tP<2XXxoCLJo}0sP+eaLaNEGBH36fEcE|CY~ZsE;^~GF7Bwt#7$L2{7dtxVH~m1 zTrcY=VHW={9K%CqJ+$D2c{cYMHDQiNR+2)C#$_uVHp}6A-=Il$&>YRz!uNipb#hSA ziSR;Iyk4GA;z=jlCV#_W_pZ7wRqLEKM$(nd)FQ+}2dM@?5JvGAcR~Bv#1_v35X3#6 zYpXA-@&&E7`pdvAy2grG3b9pi6*qYspp5&xtAclwPZ<34p{PyuzQmv&2Job}8RB@! zyMg3O-ZuChZR=5Z0mrQ-u<;8k4ySOzO00NN8C>3=uJtFG{6TMHEjIWL!%sNri$N`3 z@EwD3O!(D)uRjIT_<=t`*&qEIDI&yf*n#~bL7KOPid+{*;6+T8Bk66qVxgWq delta 1252 zcmX|AZERCz6u#$v^me`NySEB%12%i9ZUwe}3@{8fRv_!v(XC~}2qW5+wWMRAT?$$> z%Gc@w6OHpk-4MfKq6x+z(nLv&8k6};elVkE_>nmM#V;k%B_vCWRxl+KneGI!}vX}t;NDan=zB({+fzz&PkY=$C=q8QUlihAi>~48g;k$LJ$w%? zsr7Ih@2Y{&9r6M8o0uz`q*Dr;q1mf!T=+}MJSDUv@|VQaKMC9}OlobA#aXQ$7V#6U z+5e`Hyk*{{$;jRw{sFDp+ZK)SGTlqNWYGjKq1)C6lbEyxI^H2a+h(gPmG@J1Tbo7g zd^`ErIxOnsGlGUK%6SsMwykTerl7>q)BvzC+RN-I@>JLu6;;`?XpH?Rs<3})KGl-) z3O4GScnu}=XV*(A5xHK z1wHFotcW-9k`PZ>*)9AB9JlXT(z7P!H4ivZDpO z_^D$n$(J2lUN;TMp=!qi2s!nRF`97ftL945ZSd`9wBzVRUs{DC_naajuDYmt7L2k}>0JV9*j z?uQ_r?vB$q7YGw*_7q_lX9=_Djuv4Y&qd>K9B&bx!galIn8Rm#i?qK(`YH)Ke(T85l<67kCzFr;sW7K{JRo2`)d9JgVhE( diff --git a/build/diskio.lst b/build/diskio.lst index f205e47..dd26628 100644 --- a/build/diskio.lst +++ b/build/diskio.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccVyLLz5.s page 1 +ARM GAS /tmp/ccUBbJH7.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccVyLLz5.s page 1 28:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private function prototypes -----------------------------------------------*/ 29:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private functions ---------------------------------------------------------*/ 30:Middlewares/Third_Party/FatFs/src/diskio.c **** - ARM GAS /tmp/ccVyLLz5.s page 2 + ARM GAS /tmp/ccUBbJH7.s page 2 31:Middlewares/Third_Party/FatFs/src/diskio.c **** /** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccVyLLz5.s page 1 71 disk_initialize: 72 .LVL3: 73 .LFB1184: - ARM GAS /tmp/ccVyLLz5.s page 3 + ARM GAS /tmp/ccUBbJH7.s page 3 45:Middlewares/Third_Party/FatFs/src/diskio.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/ccVyLLz5.s page 1 62:Middlewares/Third_Party/FatFs/src/diskio.c **** return stat; 111 .loc 1 62 3 is_stmt 1 view .LVU23 63:Middlewares/Third_Party/FatFs/src/diskio.c **** } - ARM GAS /tmp/ccVyLLz5.s page 4 + ARM GAS /tmp/ccUBbJH7.s page 4 112 .loc 1 63 1 is_stmt 0 view .LVU24 @@ -238,7 +238,7 @@ ARM GAS /tmp/ccVyLLz5.s page 1 80:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT res; 150 .loc 1 80 3 is_stmt 1 view .LVU29 81:Middlewares/Third_Party/FatFs/src/diskio.c **** - ARM GAS /tmp/ccVyLLz5.s page 5 + ARM GAS /tmp/ccUBbJH7.s page 5 82:Middlewares/Third_Party/FatFs/src/diskio.c **** res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count); @@ -298,7 +298,7 @@ ARM GAS /tmp/ccVyLLz5.s page 1 187 @ args = 0, pretend = 0, frame = 0 188 @ frame_needed = 0, uses_anonymous_args = 0 189 .loc 1 101 1 is_stmt 0 view .LVU38 - ARM GAS /tmp/ccVyLLz5.s page 6 + ARM GAS /tmp/ccUBbJH7.s page 6 190 0000 38B5 push {r3, r4, r5, lr} @@ -358,7 +358,7 @@ ARM GAS /tmp/ccVyLLz5.s page 1 116:Middlewares/Third_Party/FatFs/src/diskio.c **** #if _USE_IOCTL == 1 117:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT disk_ioctl ( 118:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE pdrv, /* Physical drive nmuber (0..) */ - ARM GAS /tmp/ccVyLLz5.s page 7 + ARM GAS /tmp/ccUBbJH7.s page 7 119:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE cmd, /* Control code */ @@ -418,7 +418,7 @@ ARM GAS /tmp/ccVyLLz5.s page 1 131:Middlewares/Third_Party/FatFs/src/diskio.c **** * @brief Gets Time from RTC 132:Middlewares/Third_Party/FatFs/src/diskio.c **** * @param None 133:Middlewares/Third_Party/FatFs/src/diskio.c **** * @retval Time in DWORD - ARM GAS /tmp/ccVyLLz5.s page 8 + ARM GAS /tmp/ccUBbJH7.s page 8 134:Middlewares/Third_Party/FatFs/src/diskio.c **** */ @@ -446,28 +446,28 @@ ARM GAS /tmp/ccVyLLz5.s page 1 294 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 295 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 296 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" - ARM GAS /tmp/ccVyLLz5.s page 9 + ARM GAS /tmp/ccUBbJH7.s page 9 DEFINED SYMBOLS *ABS*:00000000 diskio.c - /tmp/ccVyLLz5.s:20 .text.disk_status:00000000 $t - /tmp/ccVyLLz5.s:26 .text.disk_status:00000000 disk_status - /tmp/ccVyLLz5.s:60 .text.disk_status:00000014 $d - /tmp/ccVyLLz5.s:65 .text.disk_initialize:00000000 $t - /tmp/ccVyLLz5.s:71 .text.disk_initialize:00000000 disk_initialize - /tmp/ccVyLLz5.s:124 .text.disk_initialize:00000024 $d - /tmp/ccVyLLz5.s:129 .text.disk_read:00000000 $t - /tmp/ccVyLLz5.s:135 .text.disk_read:00000000 disk_read - /tmp/ccVyLLz5.s:171 .text.disk_read:00000014 $d - /tmp/ccVyLLz5.s:176 .text.disk_write:00000000 $t - /tmp/ccVyLLz5.s:182 .text.disk_write:00000000 disk_write - /tmp/ccVyLLz5.s:218 .text.disk_write:00000014 $d - /tmp/ccVyLLz5.s:223 .text.disk_ioctl:00000000 $t - /tmp/ccVyLLz5.s:229 .text.disk_ioctl:00000000 disk_ioctl - /tmp/ccVyLLz5.s:263 .text.disk_ioctl:00000014 $d - /tmp/ccVyLLz5.s:268 .text.get_fattime:00000000 $t - /tmp/ccVyLLz5.s:274 .text.get_fattime:00000000 get_fattime + /tmp/ccUBbJH7.s:20 .text.disk_status:00000000 $t + /tmp/ccUBbJH7.s:26 .text.disk_status:00000000 disk_status + /tmp/ccUBbJH7.s:60 .text.disk_status:00000014 $d + /tmp/ccUBbJH7.s:65 .text.disk_initialize:00000000 $t + /tmp/ccUBbJH7.s:71 .text.disk_initialize:00000000 disk_initialize + /tmp/ccUBbJH7.s:124 .text.disk_initialize:00000024 $d + /tmp/ccUBbJH7.s:129 .text.disk_read:00000000 $t + /tmp/ccUBbJH7.s:135 .text.disk_read:00000000 disk_read + /tmp/ccUBbJH7.s:171 .text.disk_read:00000014 $d + /tmp/ccUBbJH7.s:176 .text.disk_write:00000000 $t + /tmp/ccUBbJH7.s:182 .text.disk_write:00000000 disk_write + /tmp/ccUBbJH7.s:218 .text.disk_write:00000014 $d + /tmp/ccUBbJH7.s:223 .text.disk_ioctl:00000000 $t + /tmp/ccUBbJH7.s:229 .text.disk_ioctl:00000000 disk_ioctl + /tmp/ccUBbJH7.s:263 .text.disk_ioctl:00000014 $d + /tmp/ccUBbJH7.s:268 .text.get_fattime:00000000 $t + /tmp/ccUBbJH7.s:274 .text.get_fattime:00000000 get_fattime UNDEFINED SYMBOLS disk diff --git a/build/fatfs.lst b/build/fatfs.lst index 6e2c9d4..311fe45 100644 --- a/build/fatfs.lst +++ b/build/fatfs.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccQUezj8.s page 1 +ARM GAS /tmp/ccYQrN39.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccQUezj8.s page 1 29:Src/fatfs.c **** 30:Src/fatfs.c **** void MX_FATFS_Init(void) 31:Src/fatfs.c **** { - ARM GAS /tmp/ccQUezj8.s page 2 + ARM GAS /tmp/ccYQrN39.s page 2 28 .loc 1 31 1 view -0 @@ -118,7 +118,7 @@ ARM GAS /tmp/ccQUezj8.s page 1 69 @ frame_needed = 0, uses_anonymous_args = 0 70 @ link register save eliminated. 47:Src/fatfs.c **** /* USER CODE BEGIN get_fattime */ - ARM GAS /tmp/ccQUezj8.s page 3 + ARM GAS /tmp/ccYQrN39.s page 3 48:Src/fatfs.c **** return 0; @@ -169,24 +169,24 @@ ARM GAS /tmp/ccQUezj8.s page 1 114 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 115 .file 10 "Inc/sd_diskio.h" 116 .file 11 "Inc/fatfs.h" - ARM GAS /tmp/ccQUezj8.s page 4 + ARM GAS /tmp/ccYQrN39.s page 4 DEFINED SYMBOLS *ABS*:00000000 fatfs.c - /tmp/ccQUezj8.s:20 .text.MX_FATFS_Init:00000000 $t - /tmp/ccQUezj8.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init - /tmp/ccQUezj8.s:51 .text.MX_FATFS_Init:00000010 $d - /tmp/ccQUezj8.s:97 .bss.SDPath:00000000 SDPath - /tmp/ccQUezj8.s:103 .bss.retSD:00000000 retSD - /tmp/ccQUezj8.s:58 .text.get_fattime:00000000 $t - /tmp/ccQUezj8.s:64 .text.get_fattime:00000000 get_fattime - /tmp/ccQUezj8.s:83 .bss.SDFile:00000000 SDFile - /tmp/ccQUezj8.s:80 .bss.SDFile:00000000 $d - /tmp/ccQUezj8.s:90 .bss.SDFatFS:00000000 SDFatFS - /tmp/ccQUezj8.s:87 .bss.SDFatFS:00000000 $d - /tmp/ccQUezj8.s:94 .bss.SDPath:00000000 $d - /tmp/ccQUezj8.s:104 .bss.retSD:00000000 $d + /tmp/ccYQrN39.s:20 .text.MX_FATFS_Init:00000000 $t + /tmp/ccYQrN39.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init + /tmp/ccYQrN39.s:51 .text.MX_FATFS_Init:00000010 $d + /tmp/ccYQrN39.s:97 .bss.SDPath:00000000 SDPath + /tmp/ccYQrN39.s:103 .bss.retSD:00000000 retSD + /tmp/ccYQrN39.s:58 .text.get_fattime:00000000 $t + /tmp/ccYQrN39.s:64 .text.get_fattime:00000000 get_fattime + /tmp/ccYQrN39.s:83 .bss.SDFile:00000000 SDFile + /tmp/ccYQrN39.s:80 .bss.SDFile:00000000 $d + /tmp/ccYQrN39.s:90 .bss.SDFatFS:00000000 SDFatFS + /tmp/ccYQrN39.s:87 .bss.SDFatFS:00000000 $d + /tmp/ccYQrN39.s:94 .bss.SDPath:00000000 $d + /tmp/ccYQrN39.s:104 .bss.retSD:00000000 $d UNDEFINED SYMBOLS FATFS_LinkDriver diff --git a/build/fatfs_platform.lst b/build/fatfs_platform.lst index fd52e70..013af23 100644 --- a/build/fatfs_platform.lst +++ b/build/fatfs_platform.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cc7kvM6l.s page 1 +ARM GAS /tmp/ccKjaXMq.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cc7kvM6l.s page 1 35 .cfi_offset 3, -8 36 .cfi_offset 14, -4 22:Src/fatfs_platform.c **** uint8_t status = SD_PRESENT; - ARM GAS /tmp/cc7kvM6l.s page 2 + ARM GAS /tmp/ccKjaXMq.s page 2 37 .loc 1 22 5 view .LVU1 @@ -106,14 +106,14 @@ ARM GAS /tmp/cc7kvM6l.s page 1 68 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 69 .file 3 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 70 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" - ARM GAS /tmp/cc7kvM6l.s page 3 + ARM GAS /tmp/ccKjaXMq.s page 3 DEFINED SYMBOLS *ABS*:00000000 fatfs_platform.c - /tmp/cc7kvM6l.s:20 .text.BSP_PlatformIsDetected:00000000 $t - /tmp/cc7kvM6l.s:26 .text.BSP_PlatformIsDetected:00000000 BSP_PlatformIsDetected - /tmp/cc7kvM6l.s:62 .text.BSP_PlatformIsDetected:00000014 $d + /tmp/ccKjaXMq.s:20 .text.BSP_PlatformIsDetected:00000000 $t + /tmp/ccKjaXMq.s:26 .text.BSP_PlatformIsDetected:00000000 BSP_PlatformIsDetected + /tmp/ccKjaXMq.s:62 .text.BSP_PlatformIsDetected:00000014 $d UNDEFINED SYMBOLS HAL_GPIO_ReadPin diff --git a/build/fatfs_platform.o b/build/fatfs_platform.o index 01b6242b3f8179d9a18a52bd91de642e0462b6b5..72373f18d10f95994d067c6d0507116939fcb831 100644 GIT binary patch delta 338 zcmdlXKS6$i0^^E_iZ-4lj0_A{c z)lAH5L82Ti+kjjic1DnSEG~@YKpw9mkYM2L1d@yl%=3X1i#u}+km6%Zo_vW>nbBwS zH^$e@lP%dki0EhJ=cekXmKNm~BlT8^D zY;!=O)lAH5L82Tid_a9X?2I7uSX>y(fs(wHK!SnyA&_KbVEzuISlpRofD|9&?#Y)J zl^K_8{>J#4Ib1&@KQ~oBEj1-k-`6uBL_a7oB{M%DBflg+FEcqlxHPFawJ0qyIW@j0 zF(t7`-#s-iwJ5P9zbHPy*$GWCP$a%MKdq!Zu_$%&1J;k58QJSu8FeN%^7u2FOuood z&X_XUlh=Rp4L+X9OL$!vk4%2a>(6*)vL&B3qwVBWK4nJD$(?-ai~*B30?9j*Zvx4R h$&CE!jB6%q0?9X%1Nqe@-f%H6JOO$Q20-2f0RZ`{Uj_gG diff --git a/build/ff.lst b/build/ff.lst index 9f7a5b6..5072641 100644 --- a/build/ff.lst +++ b/build/ff.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccQCFK4e.s page 1 +ARM GAS /tmp/ccOwl4Y6.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 29:Middlewares/Third_Party/FatFs/src/ff.c **** ---------------------------------------------------------------------------*/ 30:Middlewares/Third_Party/FatFs/src/ff.c **** 31:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FATFS != 68300 /* Revision ID */ - ARM GAS /tmp/ccQCFK4e.s page 2 + ARM GAS /tmp/ccOwl4Y6.s page 2 32:Middlewares/Third_Party/FatFs/src/ff.c **** #error Wrong include file (ff.h). @@ -118,7 +118,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 86:Middlewares/Third_Party/FatFs/src/ff.c **** #define _DF1S 0 87:Middlewares/Third_Party/FatFs/src/ff.c **** #define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ 88:Middlewares/Third_Party/FatFs/src/ff.c **** 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - ARM GAS /tmp/ccQCFK4e.s page 3 + ARM GAS /tmp/ccOwl4Y6.s page 3 89:Middlewares/Third_Party/FatFs/src/ff.c **** 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ @@ -178,7 +178,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 143:Middlewares/Third_Party/FatFs/src/ff.c **** 0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0xAC, \ 144:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF, \ 145:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \ - ARM GAS /tmp/ccQCFK4e.s page 4 + ARM GAS /tmp/ccOwl4Y6.s page 4 146:Middlewares/Third_Party/FatFs/src/ff.c **** 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ @@ -238,7 +238,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 200:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ 201:Middlewares/Third_Party/FatFs/src/ff.c **** 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ 202:Middlewares/Third_Party/FatFs/src/ff.c **** 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - ARM GAS /tmp/ccQCFK4e.s page 5 + ARM GAS /tmp/ccOwl4Y6.s page 5 203:Middlewares/Third_Party/FatFs/src/ff.c **** 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ @@ -298,7 +298,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 257:Middlewares/Third_Party/FatFs/src/ff.c **** 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xA4,0xA5,0xA6,0xD9,0xDA,0xDB,0xDC,0xA7,0xA8,0xDF, \ 258:Middlewares/Third_Party/FatFs/src/ff.c **** 0xA9,0xAA,0xAC,0xAD,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xCF,0xCF,0xD0,0xEF, \ 259:Middlewares/Third_Party/FatFs/src/ff.c **** 0xF0,0xF1,0xD1,0xD2,0xD3,0xF5,0xD4,0xF7,0xF8,0xF9,0xD5,0x96,0x95,0x98,0xFE,0xFF} - ARM GAS /tmp/ccQCFK4e.s page 6 + ARM GAS /tmp/ccOwl4Y6.s page 6 260:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 314:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LOSS 0x01 /* Out of 8.3 format */ 315:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LFN 0x02 /* Force to create LFN entry */ 316:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LAST 0x04 /* Last segment */ - ARM GAS /tmp/ccQCFK4e.s page 7 + ARM GAS /tmp/ccOwl4Y6.s page 7 317:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_BODY 0x08 /* Lower case flag (body) */ @@ -418,7 +418,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 371:Middlewares/Third_Party/FatFs/src/ff.c **** #define BS_BootCode32 90 /* FAT32: Boot code (420-byte) */ 372:Middlewares/Third_Party/FatFs/src/ff.c **** 373:Middlewares/Third_Party/FatFs/src/ff.c **** #define BPB_ZeroedEx 11 /* exFAT: MBZ field (53-byte) */ - ARM GAS /tmp/ccQCFK4e.s page 8 + ARM GAS /tmp/ccOwl4Y6.s page 8 374:Middlewares/Third_Party/FatFs/src/ff.c **** #define BPB_VolOfsEx 64 /* exFAT: Volume offset from top of the drive [sector] (QWORD) */ @@ -478,7 +478,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 428:Middlewares/Third_Party/FatFs/src/ff.c **** #define XDIR_FileSize 56 /* exFAT: File/Directory size (QWORD) */ 429:Middlewares/Third_Party/FatFs/src/ff.c **** 430:Middlewares/Third_Party/FatFs/src/ff.c **** #define SZDIRE 32 /* Size of a directory entry */ - ARM GAS /tmp/ccQCFK4e.s page 9 + ARM GAS /tmp/ccOwl4Y6.s page 9 431:Middlewares/Third_Party/FatFs/src/ff.c **** #define DDEM 0xE5 /* Deleted directory entry mark set to DIR_Name[0] */ @@ -538,7 +538,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 485:Middlewares/Third_Party/FatFs/src/ff.c **** #if _MAX_SS == _MIN_SS 486:Middlewares/Third_Party/FatFs/src/ff.c **** #define SS(fs) ((UINT)_MAX_SS) /* Fixed sector size */ 487:Middlewares/Third_Party/FatFs/src/ff.c **** #else - ARM GAS /tmp/ccQCFK4e.s page 10 + ARM GAS /tmp/ccOwl4Y6.s page 10 488:Middlewares/Third_Party/FatFs/src/ff.c **** #define SS(fs) ((fs)->ssize) /* Variable sector size */ @@ -598,7 +598,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 542:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 543:Middlewares/Third_Party/FatFs/src/ff.c **** 544:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN == 0 /* Non-LFN configuration */ - ARM GAS /tmp/ccQCFK4e.s page 11 + ARM GAS /tmp/ccOwl4Y6.s page 11 545:Middlewares/Third_Party/FatFs/src/ff.c **** #define DEF_NAMBUF @@ -658,7 +658,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 599:Middlewares/Third_Party/FatFs/src/ff.c **** 600:Middlewares/Third_Party/FatFs/src/ff.c **** 601:Middlewares/Third_Party/FatFs/src/ff.c **** /*-------------------------------------------------------------------------- - ARM GAS /tmp/ccQCFK4e.s page 12 + ARM GAS /tmp/ccOwl4Y6.s page 12 602:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 61 .cfi_startproc 62 @ args = 0, pretend = 0, frame = 0 63 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccQCFK4e.s page 13 + ARM GAS /tmp/ccOwl4Y6.s page 13 64 @ link register save eliminated. @@ -778,7 +778,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 641:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[6]; 642:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[5]; 643:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[4]; - ARM GAS /tmp/ccQCFK4e.s page 14 + ARM GAS /tmp/ccOwl4Y6.s page 14 644:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[3]; @@ -838,7 +838,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 140 0000 0170 strb r1, [r0] 141 .loc 1 663 22 is_stmt 1 view .LVU35 142 .LVL13: - ARM GAS /tmp/ccQCFK4e.s page 15 + ARM GAS /tmp/ccOwl4Y6.s page 15 664:Middlewares/Third_Party/FatFs/src/ff.c **** *ptr++ = (BYTE)val; val >>= 8; @@ -898,7 +898,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 686:Middlewares/Third_Party/FatFs/src/ff.c **** 687:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 688:Middlewares/Third_Party/FatFs/src/ff.c **** /* String functions */ - ARM GAS /tmp/ccQCFK4e.s page 16 + ARM GAS /tmp/ccOwl4Y6.s page 16 689:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 219 mem_set: 220 .LFB1188: 703:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 17 + ARM GAS /tmp/ccOwl4Y6.s page 17 704:Middlewares/Third_Party/FatFs/src/ff.c **** /* Fill memory block */ @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 718:Middlewares/Third_Party/FatFs/src/ff.c **** int r = 0; 263 .loc 1 718 2 view .LVU72 264 .L12: - ARM GAS /tmp/ccQCFK4e.s page 18 + ARM GAS /tmp/ccOwl4Y6.s page 18 719:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 309 .loc 1 730 2 is_stmt 1 view .LVU85 310 .loc 1 730 8 is_stmt 0 view .LVU86 311 0002 00E0 b .L14 - ARM GAS /tmp/ccQCFK4e.s page 19 + ARM GAS /tmp/ccOwl4Y6.s page 19 312 .LVL33: @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 756:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs && res != FR_NOT_ENABLED && res != FR_INVALID_DRIVE && res != FR_TIMEOUT) { 757:Middlewares/Third_Party/FatFs/src/ff.c **** ff_rel_grant(fs->sobj); 758:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 20 + ARM GAS /tmp/ccOwl4Y6.s page 20 759:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 369 000e 0133 adds r3, r3, #1 370 .LVL39: 371 .L18: - ARM GAS /tmp/ccQCFK4e.s page 21 + ARM GAS /tmp/ccOwl4Y6.s page 21 779:Middlewares/Third_Party/FatFs/src/ff.c **** if (Files[i].fs) { /* Existing entry */ @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 410 0040 022B cmp r3, #2 411 0042 0BD0 beq .L30 789:Middlewares/Third_Party/FatFs/src/ff.c **** return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new objec - ARM GAS /tmp/ccQCFK4e.s page 22 + ARM GAS /tmp/ccOwl4Y6.s page 22 790:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 455 .loc 1 789 35 discriminator 2 view .LVU131 456 006c 1220 movs r0, #18 457 .LVL46: - ARM GAS /tmp/ccQCFK4e.s page 23 + ARM GAS /tmp/ccOwl4Y6.s page 23 789:Middlewares/Third_Party/FatFs/src/ff.c **** return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new objec @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 501 .LVL52: 502 .L37: 503 .loc 1 802 44 is_stmt 1 discriminator 4 view .LVU142 - ARM GAS /tmp/ccQCFK4e.s page 24 + ARM GAS /tmp/ccOwl4Y6.s page 24 504 0004 0130 adds r0, r0, #1 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 550 0000 70B4 push {r4, r5, r6} 551 .LCFI3: 552 .cfi_def_cfa_offset 12 - ARM GAS /tmp/ccQCFK4e.s page 25 + ARM GAS /tmp/ccOwl4Y6.s page 25 553 .cfi_offset 4, -12 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 598 0030 9442 cmp r4, r2 599 0032 E8D1 bne .L42 600 .L43: - ARM GAS /tmp/ccQCFK4e.s page 26 + ARM GAS /tmp/ccOwl4Y6.s page 26 820:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 636 .LVL63: 823:Middlewares/Third_Party/FatFs/src/ff.c **** for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ; 637 .loc 1 823 45 is_stmt 0 discriminator 4 view .LVU180 - ARM GAS /tmp/ccQCFK4e.s page 27 + ARM GAS /tmp/ccOwl4Y6.s page 27 638 005a F7E7 b .L45 @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 680 0088 01EB0311 add r1, r1, r3, lsl #4 681 008c 8A81 strh r2, [r1, #12] @ movhi 834:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 28 + ARM GAS /tmp/ccOwl4Y6.s page 28 835:Middlewares/Third_Party/FatFs/src/ff.c **** return i + 1; @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 726 @ args = 0, pretend = 0, frame = 0 727 @ frame_needed = 0, uses_anonymous_args = 0 728 @ link register save eliminated. - ARM GAS /tmp/ccQCFK4e.s page 29 + ARM GAS /tmp/ccOwl4Y6.s page 29 844:Middlewares/Third_Party/FatFs/src/ff.c **** WORD n; @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 772 0026 33B9 cbnz r3, .L65 773 .L62: 774 .LVL74: - ARM GAS /tmp/ccQCFK4e.s page 30 + ARM GAS /tmp/ccOwl4Y6.s page 30 775 .loc 1 853 15 is_stmt 1 discriminator 1 view .LVU224 @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 817 @ args = 0, pretend = 0, frame = 0 818 @ frame_needed = 0, uses_anonymous_args = 0 819 @ link register save eliminated. - ARM GAS /tmp/ccQCFK4e.s page 31 + ARM GAS /tmp/ccOwl4Y6.s page 31 867:Middlewares/Third_Party/FatFs/src/ff.c **** UINT i; @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 860 .loc 1 870 38 is_stmt 0 discriminator 1 view .LVU245 861 001c 1A01 lsls r2, r3, #4 862 001e 0024 movs r4, #0 - ARM GAS /tmp/ccQCFK4e.s page 32 + ARM GAS /tmp/ccOwl4Y6.s page 32 863 0020 8C50 str r4, [r1, r2] @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 884:Middlewares/Third_Party/FatFs/src/ff.c **** FATFS* fs /* File system object */ 885:Middlewares/Third_Party/FatFs/src/ff.c **** ) 886:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/ccQCFK4e.s page 33 + ARM GAS /tmp/ccOwl4Y6.s page 33 887:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD wsect; @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 941:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 942:Middlewares/Third_Party/FatFs/src/ff.c **** 943:Middlewares/Third_Party/FatFs/src/ff.c **** static - ARM GAS /tmp/ccQCFK4e.s page 34 + ARM GAS /tmp/ccOwl4Y6.s page 34 944:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT sync_fs ( /* FR_OK:succeeded, !=0:error */ @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 989:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst >= fs->n_fatent - 2) return 0; /* Invalid cluster# */ 911 .loc 1 989 2 is_stmt 1 view .LVU255 912 .loc 1 989 16 is_stmt 0 view .LVU256 - ARM GAS /tmp/ccQCFK4e.s page 35 + ARM GAS /tmp/ccOwl4Y6.s page 35 913 0002 8369 ldr r3, [r0, #24] @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1011:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst < 2 || clst >= fs->n_fatent) { /* Check if in valid range */ 1012:Middlewares/Third_Party/FatFs/src/ff.c **** val = 1; /* Internal error */ 1013:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 36 + ARM GAS /tmp/ccOwl4Y6.s page 36 1014:Middlewares/Third_Party/FatFs/src/ff.c **** } else { @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1068:Middlewares/Third_Party/FatFs/src/ff.c **** 1069:Middlewares/Third_Party/FatFs/src/ff.c **** return val; 1070:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 37 + ARM GAS /tmp/ccOwl4Y6.s page 37 1071:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1125:Middlewares/Third_Party/FatFs/src/ff.c **** break; 1126:Middlewares/Third_Party/FatFs/src/ff.c **** } 1127:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 38 + ARM GAS /tmp/ccOwl4Y6.s page 38 1128:Middlewares/Third_Party/FatFs/src/ff.c **** return res; @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1182:Middlewares/Third_Party/FatFs/src/ff.c **** /*----------------------------------------*/ 1183:Middlewares/Third_Party/FatFs/src/ff.c **** /* Set/Clear a block of allocation bitmap */ 1184:Middlewares/Third_Party/FatFs/src/ff.c **** /*----------------------------------------*/ - ARM GAS /tmp/ccQCFK4e.s page 39 + ARM GAS /tmp/ccOwl4Y6.s page 39 1185:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1239:Middlewares/Third_Party/FatFs/src/ff.c **** 1240:Middlewares/Third_Party/FatFs/src/ff.c **** 1241:Middlewares/Third_Party/FatFs/src/ff.c **** /*---------------------------------------------*/ - ARM GAS /tmp/ccQCFK4e.s page 40 + ARM GAS /tmp/ccOwl4Y6.s page 40 1242:Middlewares/Third_Party/FatFs/src/ff.c **** /* Fill the last fragment of the FAT chain */ @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1296:Middlewares/Third_Party/FatFs/src/ff.c **** do { 1297:Middlewares/Third_Party/FatFs/src/ff.c **** nxt = get_fat(obj, clst); /* Get cluster status */ 1298:Middlewares/Third_Party/FatFs/src/ff.c **** if (nxt == 0) break; /* Empty cluster? */ - ARM GAS /tmp/ccQCFK4e.s page 41 + ARM GAS /tmp/ccOwl4Y6.s page 41 1299:Middlewares/Third_Party/FatFs/src/ff.c **** if (nxt == 1) return FR_INT_ERR; /* Internal error? */ @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1353:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD clst /* Cluster# to stretch, 0:Create a new chain */ 1354:Middlewares/Third_Party/FatFs/src/ff.c **** ) 1355:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/ccQCFK4e.s page 42 + ARM GAS /tmp/ccOwl4Y6.s page 42 1356:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD cs, ncl, scl; @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1410:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */ 1411:Middlewares/Third_Party/FatFs/src/ff.c **** } 1412:Middlewares/Third_Party/FatFs/src/ff.c **** res = put_fat(fs, ncl, 0xFFFFFFFF); /* Mark the new cluster 'EOC' */ - ARM GAS /tmp/ccQCFK4e.s page 43 + ARM GAS /tmp/ccOwl4Y6.s page 43 1413:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && clst != 0) { @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 963 .loc 1 1450 2 is_stmt 1 view .LVU272 964 .loc 1 1450 21 is_stmt 0 view .LVU273 965 0006 9089 ldrh r0, [r2, #12] - ARM GAS /tmp/ccQCFK4e.s page 44 + ARM GAS /tmp/ccOwl4Y6.s page 44 966 .LVL92: @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1005 .LVL100: 1006 .loc 1 1457 12 view .LVU292 1007 0022 0844 add r0, r0, r1 - ARM GAS /tmp/ccQCFK4e.s page 45 + ARM GAS /tmp/ccOwl4Y6.s page 45 1008 .L86: @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1499:Middlewares/Third_Party/FatFs/src/ff.c **** ofs -= csz; 1500:Middlewares/Third_Party/FatFs/src/ff.c **** } 1501:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = clust2sect(fs, clst); - ARM GAS /tmp/ccQCFK4e.s page 46 + ARM GAS /tmp/ccOwl4Y6.s page 46 1502:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1556:Middlewares/Third_Party/FatFs/src/ff.c **** if (_FS_EXFAT) dp->obj.stat |= 4; /* The directory needs to be updated */ 1557:Middlewares/Third_Party/FatFs/src/ff.c **** if (sync_window(fs) != FR_OK) return FR_DISK_ERR; /* Flush disk access window */ 1558:Middlewares/Third_Party/FatFs/src/ff.c **** mem_set(fs->win, 0, SS(fs)); /* Clear window buffer */ - ARM GAS /tmp/ccQCFK4e.s page 47 + ARM GAS /tmp/ccOwl4Y6.s page 47 1559:Middlewares/Third_Party/FatFs/src/ff.c **** for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) { /* Fill t @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1613:Middlewares/Third_Party/FatFs/src/ff.c **** } 1614:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_next(dp, 1); 1615:Middlewares/Third_Party/FatFs/src/ff.c **** } while (res == FR_OK); /* Next entry with table stretch enabled */ - ARM GAS /tmp/ccQCFK4e.s page 48 + ARM GAS /tmp/ccOwl4Y6.s page 48 1616:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1052 .L91: 1641:Middlewares/Third_Party/FatFs/src/ff.c **** cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16; 1642:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 49 + ARM GAS /tmp/ccOwl4Y6.s page 49 1643:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1090 .LCFI11: 1091 .cfi_def_cfa_offset 16 1092 .cfi_offset 4, -16 - ARM GAS /tmp/ccQCFK4e.s page 50 + ARM GAS /tmp/ccOwl4Y6.s page 50 1093 .cfi_offset 5, -12 @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1666:Middlewares/Third_Party/FatFs/src/ff.c **** /*------------------------------------------------------------------------*/ 1667:Middlewares/Third_Party/FatFs/src/ff.c **** /* FAT-LFN: LFN handling */ 1668:Middlewares/Third_Party/FatFs/src/ff.c **** /*------------------------------------------------------------------------*/ - ARM GAS /tmp/ccQCFK4e.s page 51 + ARM GAS /tmp/ccOwl4Y6.s page 51 1669:Middlewares/Third_Party/FatFs/src/ff.c **** static @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1723:Middlewares/Third_Party/FatFs/src/ff.c **** 1724:Middlewares/Third_Party/FatFs/src/ff.c **** i = ((dir[LDIR_Ord] & ~LLEF) - 1) * 13; /* Offset in the LFN buffer */ 1725:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 52 + ARM GAS /tmp/ccOwl4Y6.s page 52 1726:Middlewares/Third_Party/FatFs/src/ff.c **** for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */ @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1780:Middlewares/Third_Party/FatFs/src/ff.c **** 1781:Middlewares/Third_Party/FatFs/src/ff.c **** 1782:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 53 + ARM GAS /tmp/ccOwl4Y6.s page 53 1783:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 && !_FS_READONLY @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1837:Middlewares/Third_Party/FatFs/src/ff.c **** } 1838:Middlewares/Third_Party/FatFs/src/ff.c **** #endif /* _USE_LFN != 0 && !_FS_READONLY */ 1839:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 54 + ARM GAS /tmp/ccOwl4Y6.s page 54 1840:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1894:Middlewares/Third_Party/FatFs/src/ff.c **** const WCHAR* name /* File name to be calculated */ 1895:Middlewares/Third_Party/FatFs/src/ff.c **** ) 1896:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/ccQCFK4e.s page 55 + ARM GAS /tmp/ccOwl4Y6.s page 55 1897:Middlewares/Third_Party/FatFs/src/ff.c **** WCHAR chr; @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1951:Middlewares/Third_Party/FatFs/src/ff.c **** if ((si % SZDIRE) == 0) si += 2; /* Skip entry type field */ 1952:Middlewares/Third_Party/FatFs/src/ff.c **** w = ff_convert(ld_word(dirb + si), 0); /* Get a character and Unicode -> OEM */ 1953:Middlewares/Third_Party/FatFs/src/ff.c **** if (_DF1S && w >= 0x100) { /* Is it a double byte char? (always false at SBCS cfg) */ - ARM GAS /tmp/ccQCFK4e.s page 56 + ARM GAS /tmp/ccOwl4Y6.s page 56 1954:Middlewares/Third_Party/FatFs/src/ff.c **** fno->fname[di++] = (char)(w >> 8); /* Put 1st byte of the DBC */ @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2008:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) return res; 2009:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(dp->obj.fs, dp->sect); 2010:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) return res; - ARM GAS /tmp/ccQCFK4e.s page 57 + ARM GAS /tmp/ccOwl4Y6.s page 57 2011:Middlewares/Third_Party/FatFs/src/ff.c **** if (dp->dir[XDIR_Type] != 0xC1) return FR_INT_ERR; @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2065:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(dirb + XDIR_SetSum, xdir_sum(dirb)); 2066:Middlewares/Third_Party/FatFs/src/ff.c **** nent = dirb[XDIR_NumSec] + 1; 2067:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 58 + ARM GAS /tmp/ccOwl4Y6.s page 58 2068:Middlewares/Third_Party/FatFs/src/ff.c **** /* Store the set of directory to the volume */ @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2122:Middlewares/Third_Party/FatFs/src/ff.c **** 2123:Middlewares/Third_Party/FatFs/src/ff.c **** 2124:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 59 + ARM GAS /tmp/ccOwl4Y6.s page 59 2125:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_MINIMIZE <= 1 || _FS_RPATH >= 2 || _USE_LABEL || _FS_EXFAT @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2179:Middlewares/Third_Party/FatFs/src/ff.c **** ord = (c == ord && sum == dp->dir[LDIR_Chksum] && pick_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0 2180:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* An SFN entry is found */ 2181:Middlewares/Third_Party/FatFs/src/ff.c **** if (ord || sum != sum_sfn(dp->dir)) { /* Is there a valid LFN? */ - ARM GAS /tmp/ccQCFK4e.s page 60 + ARM GAS /tmp/ccOwl4Y6.s page 60 2182:Middlewares/Third_Party/FatFs/src/ff.c **** dp->blk_ofs = 0xFFFFFFFF; /* It has no LFN. */ @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2236:Middlewares/Third_Party/FatFs/src/ff.c **** if (ff_wtoupper(ld_word(fs->dirbuf + di)) != ff_wtoupper(fs->lfnbuf[ni])) break; 2237:Middlewares/Third_Party/FatFs/src/ff.c **** } 2238:Middlewares/Third_Party/FatFs/src/ff.c **** if (nc == 0 && !fs->lfnbuf[ni]) break; /* Name matched? */ - ARM GAS /tmp/ccQCFK4e.s page 61 + ARM GAS /tmp/ccOwl4Y6.s page 61 2239:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2293:Middlewares/Third_Party/FatFs/src/ff.c **** DIR* dp /* Target directory with object name to be created */ 2294:Middlewares/Third_Party/FatFs/src/ff.c **** ) 2295:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/ccQCFK4e.s page 62 + ARM GAS /tmp/ccOwl4Y6.s page 62 2296:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT res; @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2350:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_alloc(dp, nent); /* Allocate entries */ 2351:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && --nent) { /* Set LFN entry if needed */ 2352:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_sdi(dp, dp->dptr - nent * SZDIRE); - ARM GAS /tmp/ccQCFK4e.s page 63 + ARM GAS /tmp/ccOwl4Y6.s page 63 2353:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2407:Middlewares/Third_Party/FatFs/src/ff.c **** do { 2408:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(fs, dp->sect); 2409:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; - ARM GAS /tmp/ccQCFK4e.s page 64 + ARM GAS /tmp/ccOwl4Y6.s page 64 2410:Middlewares/Third_Party/FatFs/src/ff.c **** /* Mark an entry 'deleted' */ @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1151 .loc 1 2450 2 view .LVU325 2451:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD tm; 1152 .loc 1 2451 2 view .LVU326 - ARM GAS /tmp/ccQCFK4e.s page 65 + ARM GAS /tmp/ccOwl4Y6.s page 65 2452:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2495:Middlewares/Third_Party/FatFs/src/ff.c **** } 2496:Middlewares/Third_Party/FatFs/src/ff.c **** #if _LFN_UNICODE 2497:Middlewares/Third_Party/FatFs/src/ff.c **** if (IsDBCS1(c) && i != 8 && i != 11 && IsDBCS2(dp->dir[i])) { - ARM GAS /tmp/ccQCFK4e.s page 66 + ARM GAS /tmp/ccOwl4Y6.s page 66 2498:Middlewares/Third_Party/FatFs/src/ff.c **** c = c << 8 | dp->dir[i++]; @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1189 .loc 1 2520 11 is_stmt 1 view .LVU340 1190 0022 0A2B cmp r3, #10 1191 0024 0ED8 bhi .L109 - ARM GAS /tmp/ccQCFK4e.s page 67 + ARM GAS /tmp/ccOwl4Y6.s page 67 2521:Middlewares/Third_Party/FatFs/src/ff.c **** if (c == ' ') continue; /* Skip padding spaces */ @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1231 .loc 1 2527 16 view .LVU356 1232 0046 0023 movs r3, #0 1233 .LVL127: - ARM GAS /tmp/ccQCFK4e.s page 68 + ARM GAS /tmp/ccOwl4Y6.s page 68 1234 .loc 1 2527 16 view .LVU357 @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1279 .align 1 1280 .syntax unified 1281 .thumb - ARM GAS /tmp/ccQCFK4e.s page 69 + ARM GAS /tmp/ccOwl4Y6.s page 69 1282 .thumb_func @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2585:Middlewares/Third_Party/FatFs/src/ff.c **** if (!*pat && inf) return 1; /* (short circuit) */ 2586:Middlewares/Third_Party/FatFs/src/ff.c **** 2587:Middlewares/Third_Party/FatFs/src/ff.c **** do { - ARM GAS /tmp/ccQCFK4e.s page 70 + ARM GAS /tmp/ccOwl4Y6.s page 70 2588:Middlewares/Third_Party/FatFs/src/ff.c **** pp = pat; np = nam; /* Top of pattern and name to match */ @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1306 0006 8A46 mov r10, r1 2623:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 /* LFN configuration */ 2624:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE b, cf; - ARM GAS /tmp/ccQCFK4e.s page 71 + ARM GAS /tmp/ccOwl4Y6.s page 71 2625:Middlewares/Third_Party/FatFs/src/ff.c **** WCHAR w, *lfn; @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2679:Middlewares/Third_Party/FatFs/src/ff.c **** for (;;) { 2680:Middlewares/Third_Party/FatFs/src/ff.c **** w = lfn[si++]; /* Get an LFN character */ 2681:Middlewares/Third_Party/FatFs/src/ff.c **** if (!w) break; /* Break on end of the LFN */ - ARM GAS /tmp/ccQCFK4e.s page 72 + ARM GAS /tmp/ccOwl4Y6.s page 72 2682:Middlewares/Third_Party/FatFs/src/ff.c **** if (w == ' ' || (w == '.' && si != di)) { /* Remove spaces and dots */ @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2736:Middlewares/Third_Party/FatFs/src/ff.c **** dp->fn[NSFLAG] = cf; /* SFN is created */ 2737:Middlewares/Third_Party/FatFs/src/ff.c **** 2738:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_OK; - ARM GAS /tmp/ccQCFK4e.s page 73 + ARM GAS /tmp/ccOwl4Y6.s page 73 2739:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2761:Middlewares/Third_Party/FatFs/src/ff.c **** } 2762:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 2763:Middlewares/Third_Party/FatFs/src/ff.c **** for (;;) { - ARM GAS /tmp/ccQCFK4e.s page 74 + ARM GAS /tmp/ccOwl4Y6.s page 74 2764:Middlewares/Third_Party/FatFs/src/ff.c **** c = (BYTE)p[si++]; @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1360 .loc 1 2796 2 is_stmt 1 view .LVU400 1361 .loc 1 2796 5 is_stmt 0 view .LVU401 1362 0036 002D cmp r5, #0 - ARM GAS /tmp/ccQCFK4e.s page 75 + ARM GAS /tmp/ccOwl4Y6.s page 75 1363 0038 44D0 beq .L125 @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2791:Middlewares/Third_Party/FatFs/src/ff.c **** sfn[i++] = c; 1404 .loc 1 2791 7 view .LVU419 1405 0066 192B cmp r3, #25 - ARM GAS /tmp/ccQCFK4e.s page 76 + ARM GAS /tmp/ccOwl4Y6.s page 76 1406 0068 01D8 bhi .L120 @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1444 .loc 1 2770 3 is_stmt 1 view .LVU435 2770:Middlewares/Third_Party/FatFs/src/ff.c **** if (ni == 11 || c != '.') return FR_INVALID_NAME; /* Over size or invalid dot */ 1445 .loc 1 2770 6 is_stmt 0 view .LVU436 - ARM GAS /tmp/ccQCFK4e.s page 77 + ARM GAS /tmp/ccOwl4Y6.s page 77 1446 0088 2E2C cmp r4, #46 @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2798:Middlewares/Third_Party/FatFs/src/ff.c **** sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */ 1487 .loc 1 2798 29 is_stmt 0 discriminator 1 view .LVU450 1488 00ae 0523 movs r3, #5 - ARM GAS /tmp/ccQCFK4e.s page 78 + ARM GAS /tmp/ccOwl4Y6.s page 78 1489 00b0 89F82430 strb r3, [r9, #36] @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2813:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */ 2814:Middlewares/Third_Party/FatFs/src/ff.c **** DIR* dp, /* Directory object to return last directory and found object */ 2815:Middlewares/Third_Party/FatFs/src/ff.c **** const TCHAR* path /* Full-path string to find a file or directory */ - ARM GAS /tmp/ccQCFK4e.s page 79 + ARM GAS /tmp/ccOwl4Y6.s page 79 2816:Middlewares/Third_Party/FatFs/src/ff.c **** ) @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2870:Middlewares/Third_Party/FatFs/src/ff.c **** break; 2871:Middlewares/Third_Party/FatFs/src/ff.c **** } 2872:Middlewares/Third_Party/FatFs/src/ff.c **** if (ns & NS_LAST) break; /* Last segment matched. Function completed. */ - ARM GAS /tmp/ccQCFK4e.s page 80 + ARM GAS /tmp/ccOwl4Y6.s page 80 2873:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get into the sub-directory */ @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2916:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 2917:Middlewares/Third_Party/FatFs/src/ff.c **** 2918:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 81 + ARM GAS /tmp/ccOwl4Y6.s page 81 2919:Middlewares/Third_Party/FatFs/src/ff.c **** if (*path) { /* If the pointer is not a null */ @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2940:Middlewares/Third_Party/FatFs/src/ff.c **** if (i < _VOLUMES) { /* If a drive id is found, get the value and strip it */ 2941:Middlewares/Third_Party/FatFs/src/ff.c **** vol = (int)i; 2942:Middlewares/Third_Party/FatFs/src/ff.c **** *path = tt; - ARM GAS /tmp/ccQCFK4e.s page 82 + ARM GAS /tmp/ccOwl4Y6.s page 82 2943:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2927:Middlewares/Third_Party/FatFs/src/ff.c **** } 1603 .loc 1 2927 12 is_stmt 0 view .LVU485 1604 0036 0132 adds r2, r2, #1 - ARM GAS /tmp/ccQCFK4e.s page 83 + ARM GAS /tmp/ccOwl4Y6.s page 83 1605 .LVL172: @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2975:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->win[BS_JmpBoot] == 0xE9 || (fs->win[BS_JmpBoot] == 0xEB && fs->win[BS_JmpBoot + 2] == 0x90 2976:Middlewares/Third_Party/FatFs/src/ff.c **** if ((ld_dword(fs->win + BS_FilSysType) & 0xFFFFFF) == 0x544146) return 0; /* Check "FAT" string * 2977:Middlewares/Third_Party/FatFs/src/ff.c **** if (ld_dword(fs->win + BS_FilSysType32) == 0x33544146) return 0; /* Check "FAT3" string */ - ARM GAS /tmp/ccQCFK4e.s page 84 + ARM GAS /tmp/ccOwl4Y6.s page 84 2978:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3032:Middlewares/Third_Party/FatFs/src/ff.c **** /* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */ 3033:Middlewares/Third_Party/FatFs/src/ff.c **** 3034:Middlewares/Third_Party/FatFs/src/ff.c **** fs->fs_type = 0; /* Clear the file system object */ - ARM GAS /tmp/ccQCFK4e.s page 85 + ARM GAS /tmp/ccOwl4Y6.s page 85 3035:Middlewares/Third_Party/FatFs/src/ff.c **** fs->drv = LD2PD(vol); /* Bind the logical drive and a physical drive */ @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3089:Middlewares/Third_Party/FatFs/src/ff.c **** fs->csize = 1 << fs->win[BPB_SecPerClusEx]; /* Cluster size */ 3090:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->csize == 0) return FR_NO_FILESYSTEM; /* (Must be 1..32768) */ 3091:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 86 + ARM GAS /tmp/ccOwl4Y6.s page 86 3092:Middlewares/Third_Party/FatFs/src/ff.c **** nclst = ld_dword(fs->win + BPB_NumClusEx); /* Number of clusters */ @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3146:Middlewares/Third_Party/FatFs/src/ff.c **** 3147:Middlewares/Third_Party/FatFs/src/ff.c **** /* Boundaries and Limits */ 3148:Middlewares/Third_Party/FatFs/src/ff.c **** fs->n_fatent = nclst + 2; /* Number of FAT entries */ - ARM GAS /tmp/ccQCFK4e.s page 87 + ARM GAS /tmp/ccOwl4Y6.s page 87 3149:Middlewares/Third_Party/FatFs/src/ff.c **** fs->volbase = bsect; /* Volume start sector */ @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3203:Middlewares/Third_Party/FatFs/src/ff.c **** clear_lock(fs); 3204:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3205:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_OK; - ARM GAS /tmp/ccQCFK4e.s page 88 + ARM GAS /tmp/ccOwl4Y6.s page 88 3206:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3260:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_mount ( 3261:Middlewares/Third_Party/FatFs/src/ff.c **** FATFS* fs, /* Pointer to the file system object (NULL:unmount)*/ 3262:Middlewares/Third_Party/FatFs/src/ff.c **** const TCHAR* path, /* Logical drive number to be mounted/unmounted */ - ARM GAS /tmp/ccQCFK4e.s page 89 + ARM GAS /tmp/ccOwl4Y6.s page 89 3263:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE opt /* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */ @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3317:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY 3318:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD dw, cl, bcs, clst, sc; 3319:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t ofs; - ARM GAS /tmp/ccQCFK4e.s page 90 + ARM GAS /tmp/ccOwl4Y6.s page 90 3320:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3374:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_CrtTime, dw); /* Set created time */ 3375:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_CrtTime10] = 0; 3376:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_ModTime, dw); /* Set modified time */ - ARM GAS /tmp/ccQCFK4e.s page 91 + ARM GAS /tmp/ccOwl4Y6.s page 91 3377:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_ModTime10] = 0; @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3431:Middlewares/Third_Party/FatFs/src/ff.c **** } 3432:Middlewares/Third_Party/FatFs/src/ff.c **** #else /* R/O configuration */ 3433:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { - ARM GAS /tmp/ccQCFK4e.s page 92 + ARM GAS /tmp/ccOwl4Y6.s page 92 3434:Middlewares/Third_Party/FatFs/src/ff.c **** if (dj.fn[NSFLAG] & NS_NONAME) { /* Origin directory itself? */ @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3488:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_read(fs->drv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR; 3489:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3490:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 93 + ARM GAS /tmp/ccOwl4Y6.s page 93 3491:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3545:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3546:Middlewares/Third_Party/FatFs/src/ff.c **** { 3547:Middlewares/Third_Party/FatFs/src/ff.c **** clst = get_fat(&fp->obj, fp->clust); /* Follow cluster chain on the FAT */ - ARM GAS /tmp/ccQCFK4e.s page 94 + ARM GAS /tmp/ccOwl4Y6.s page 94 3548:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3602:Middlewares/Third_Party/FatFs/src/ff.c **** 3603:Middlewares/Third_Party/FatFs/src/ff.c **** 3604:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 95 + ARM GAS /tmp/ccOwl4Y6.s page 95 3605:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3659:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->obj.sclust == 0) fp->obj.sclust = clst; /* Set start cluster if the first write */ 3660:Middlewares/Third_Party/FatFs/src/ff.c **** } 3661:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_TINY - ARM GAS /tmp/ccQCFK4e.s page 96 + ARM GAS /tmp/ccOwl4Y6.s page 96 3662:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Write-back s @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3716:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_DIRTY; 3717:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3718:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 97 + ARM GAS /tmp/ccOwl4Y6.s page 97 3719:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3773:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_AccTime, 0); 3774:Middlewares/Third_Party/FatFs/src/ff.c **** res = store_xdir(&dj); /* Restore it to the directory */ 3775:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { - ARM GAS /tmp/ccQCFK4e.s page 98 + ARM GAS /tmp/ccOwl4Y6.s page 98 3776:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs); @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3830:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 3831:Middlewares/Third_Party/FatFs/src/ff.c **** { 3832:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.fs = 0; /* Invalidate file object */ - ARM GAS /tmp/ccQCFK4e.s page 99 + ARM GAS /tmp/ccOwl4Y6.s page 99 3833:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3887:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_EXFAT 3888:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type == FS_EXFAT) { 3889:Middlewares/Third_Party/FatFs/src/ff.c **** fs->cdc_scl = dj.obj.c_scl; - ARM GAS /tmp/ccQCFK4e.s page 100 + ARM GAS /tmp/ccOwl4Y6.s page 100 3890:Middlewares/Third_Party/FatFs/src/ff.c **** fs->cdc_size = dj.obj.c_size; @@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3944:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.sclust = fs->cdir; /* Start to follow upper directory from current directory */ 3945:Middlewares/Third_Party/FatFs/src/ff.c **** while ((ccl = dj.obj.sclust) != 0) { /* Repeat while current directory is a sub-directory */ 3946:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_sdi(&dj, 1 * SZDIRE); /* Get parent directory */ - ARM GAS /tmp/ccQCFK4e.s page 101 + ARM GAS /tmp/ccOwl4Y6.s page 101 3947:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4001:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_lseek ( 4002:Middlewares/Third_Party/FatFs/src/ff.c **** FIL* fp, /* Pointer to the file object */ 4003:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t ofs /* File pointer from top of file */ - ARM GAS /tmp/ccQCFK4e.s page 102 + ARM GAS /tmp/ccOwl4Y6.s page 102 4004:Middlewares/Third_Party/FatFs/src/ff.c **** ) @@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4058:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ 4059:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY 4060:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY - ARM GAS /tmp/ccQCFK4e.s page 103 + ARM GAS /tmp/ccOwl4Y6.s page 103 4061:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ @@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4115:Middlewares/Third_Party/FatFs/src/ff.c **** ofs = 0; break; 4116:Middlewares/Third_Party/FatFs/src/ff.c **** } 4117:Middlewares/Third_Party/FatFs/src/ff.c **** } else - ARM GAS /tmp/ccQCFK4e.s page 104 + ARM GAS /tmp/ccOwl4Y6.s page 104 4118:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4172:Middlewares/Third_Party/FatFs/src/ff.c **** 4173:Middlewares/Third_Party/FatFs/src/ff.c **** if (!dp) return FR_INVALID_OBJECT; 4174:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 105 + ARM GAS /tmp/ccOwl4Y6.s page 105 4175:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get logical drive */ @@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4229:Middlewares/Third_Party/FatFs/src/ff.c **** /* Close Directory */ 4230:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 4231:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 106 + ARM GAS /tmp/ccOwl4Y6.s page 106 4232:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_closedir ( @@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4286:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_NO_FILE) res = FR_OK; /* Ignore end of directory now */ 4287:Middlewares/Third_Party/FatFs/src/ff.c **** } 4288:Middlewares/Third_Party/FatFs/src/ff.c **** FREE_NAMBUF(); - ARM GAS /tmp/ccQCFK4e.s page 107 + ARM GAS /tmp/ccOwl4Y6.s page 107 4289:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4343:Middlewares/Third_Party/FatFs/src/ff.c **** 4344:Middlewares/Third_Party/FatFs/src/ff.c **** #endif /* _USE_FIND */ 4345:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 108 + ARM GAS /tmp/ccOwl4Y6.s page 108 4346:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4400:Middlewares/Third_Party/FatFs/src/ff.c **** 4401:Middlewares/Third_Party/FatFs/src/ff.c **** 4402:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get logical drive */ - ARM GAS /tmp/ccQCFK4e.s page 109 + ARM GAS /tmp/ccOwl4Y6.s page 109 4403:Middlewares/Third_Party/FatFs/src/ff.c **** res = find_volume(&path, &fs, 0); @@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4457:Middlewares/Third_Party/FatFs/src/ff.c **** } 4458:Middlewares/Third_Party/FatFs/src/ff.c **** } 4459:Middlewares/Third_Party/FatFs/src/ff.c **** *nclst = nfree; /* Return the free clusters */ - ARM GAS /tmp/ccQCFK4e.s page 110 + ARM GAS /tmp/ccOwl4Y6.s page 110 4460:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst = nfree; /* Now free_clst is valid */ @@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4514:Middlewares/Third_Party/FatFs/src/ff.c **** 4515:Middlewares/Third_Party/FatFs/src/ff.c **** LEAVE_FF(fs, res); 4516:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 111 + ARM GAS /tmp/ccOwl4Y6.s page 111 4517:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4571:Middlewares/Third_Party/FatFs/src/ff.c **** if (dj.obj.attr & AM_DIR) { /* Is it a sub-directory? */ 4572:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_RPATH != 0 4573:Middlewares/Third_Party/FatFs/src/ff.c **** if (dclst == fs->cdir) { /* Is it the current directory? */ - ARM GAS /tmp/ccQCFK4e.s page 112 + ARM GAS /tmp/ccOwl4Y6.s page 112 4574:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DENIED; @@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4628:Middlewares/Third_Party/FatFs/src/ff.c **** UINT n; 4629:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD dsc, dcl, pcl, tm; 4630:Middlewares/Third_Party/FatFs/src/ff.c **** DEF_NAMBUF - ARM GAS /tmp/ccQCFK4e.s page 113 + ARM GAS /tmp/ccOwl4Y6.s page 113 4631:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4685:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_GenFlags] = 3; /* Initialize the object flag (contiguous) */ 4686:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_Attr] = AM_DIR; /* Attribute */ 4687:Middlewares/Third_Party/FatFs/src/ff.c **** res = store_xdir(&dj); - ARM GAS /tmp/ccQCFK4e.s page 114 + ARM GAS /tmp/ccOwl4Y6.s page 114 4688:Middlewares/Third_Party/FatFs/src/ff.c **** } else @@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4742:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { /* Object to be renamed is found */ 4743:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_EXFAT 4744:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type == FS_EXFAT) { /* At exFAT */ - ARM GAS /tmp/ccQCFK4e.s page 115 + ARM GAS /tmp/ccOwl4Y6.s page 115 4745:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE nf, nn; @@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4799:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { 4800:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_remove(&djo); /* Remove old entry */ 4801:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { - ARM GAS /tmp/ccQCFK4e.s page 116 + ARM GAS /tmp/ccOwl4Y6.s page 116 4802:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs); @@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4856:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs); 4857:Middlewares/Third_Party/FatFs/src/ff.c **** } 4858:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 117 + ARM GAS /tmp/ccOwl4Y6.s page 117 4859:Middlewares/Third_Party/FatFs/src/ff.c **** FREE_NAMBUF(); @@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4913:Middlewares/Third_Party/FatFs/src/ff.c **** 4914:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LABEL 4915:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ - ARM GAS /tmp/ccQCFK4e.s page 118 + ARM GAS /tmp/ccOwl4Y6.s page 118 4916:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get Volume Label */ @@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4970:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 4971:Middlewares/Third_Party/FatFs/src/ff.c **** } while (di < 11); 4972:Middlewares/Third_Party/FatFs/src/ff.c **** do { /* Truncate trailing spaces */ - ARM GAS /tmp/ccQCFK4e.s page 119 + ARM GAS /tmp/ccOwl4Y6.s page 119 4973:Middlewares/Third_Party/FatFs/src/ff.c **** label[di] = 0; @@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5027:Middlewares/Third_Party/FatFs/src/ff.c **** res = find_volume(&label, &fs, FA_WRITE); 5028:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) LEAVE_FF(fs, res); 5029:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.fs = fs; - ARM GAS /tmp/ccQCFK4e.s page 120 + ARM GAS /tmp/ccOwl4Y6.s page 120 5030:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5084:Middlewares/Third_Party/FatFs/src/ff.c **** } 5085:Middlewares/Third_Party/FatFs/src/ff.c **** 5086:Middlewares/Third_Party/FatFs/src/ff.c **** /* Set volume label */ - ARM GAS /tmp/ccQCFK4e.s page 121 + ARM GAS /tmp/ccOwl4Y6.s page 121 5087:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.sclust = 0; /* Open root directory */ @@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5141:Middlewares/Third_Party/FatFs/src/ff.c **** FIL* fp, /* Pointer to the file object */ 5142:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t fsz, /* File size to be expanded to */ 5143:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE opt /* Operation mode 0:Find and prepare or 1:Find and allocate */ - ARM GAS /tmp/ccQCFK4e.s page 122 + ARM GAS /tmp/ccOwl4Y6.s page 122 5144:Middlewares/Third_Party/FatFs/src/ff.c **** ) @@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5198:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* Set it as suggested point for next allocation */ 5199:Middlewares/Third_Party/FatFs/src/ff.c **** lclst = scl - 1; 5200:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 123 + ARM GAS /tmp/ccOwl4Y6.s page 123 5201:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5255:Middlewares/Third_Party/FatFs/src/ff.c **** csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */ 5256:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ 5257:Middlewares/Third_Party/FatFs/src/ff.c **** if (csect == 0) { /* On the cluster boundary? */ - ARM GAS /tmp/ccQCFK4e.s page 124 + ARM GAS /tmp/ccOwl4Y6.s page 124 5258:Middlewares/Third_Party/FatFs/src/ff.c **** clst = (fp->fptr == 0) ? /* On the top of the file? */ @@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5312:Middlewares/Third_Party/FatFs/src/ff.c **** static const WORD cst32[] = {1, 2, 4, 8, 16, 32, 0}; /* Cluster size boundary for FAT32 volume (12 5313:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE fmt, sys, *buf, *pte, pdrv, part; 5314:Middlewares/Third_Party/FatFs/src/ff.c **** WORD ss; - ARM GAS /tmp/ccQCFK4e.s page 125 + ARM GAS /tmp/ccOwl4Y6.s page 125 5315:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD szb_buf, sz_buf, sz_blk, n_clst, pau, sect, nsect, n; @@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5369:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol < 128) return FR_MKFS_ABORTED; /* Check if volume size is >=128s */ 5370:Middlewares/Third_Party/FatFs/src/ff.c **** 5371:Middlewares/Third_Party/FatFs/src/ff.c **** /* Pre-determine the FAT type */ - ARM GAS /tmp/ccQCFK4e.s page 126 + ARM GAS /tmp/ccOwl4Y6.s page 126 5372:Middlewares/Third_Party/FatFs/src/ff.c **** do { @@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5426:Middlewares/Third_Party/FatFs/src/ff.c **** si++; break; /* Store the up-case char if exist */ 5427:Middlewares/Third_Party/FatFs/src/ff.c **** } 5428:Middlewares/Third_Party/FatFs/src/ff.c **** for (j = 1; (WCHAR)(si + j) && (WCHAR)(si + j) == ff_wtoupper((WCHAR)(si + j)); j++) ; /* Get r - ARM GAS /tmp/ccQCFK4e.s page 127 + ARM GAS /tmp/ccOwl4Y6.s page 127 5429:Middlewares/Third_Party/FatFs/src/ff.c **** if (j >= 128) { @@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5483:Middlewares/Third_Party/FatFs/src/ff.c **** n = (nsect > sz_buf) ? sz_buf : nsect; /* Write the buffered data */ 5484:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_write(pdrv, buf, sect, n) != RES_OK) return FR_DISK_ERR; 5485:Middlewares/Third_Party/FatFs/src/ff.c **** sect += n; nsect -= n; - ARM GAS /tmp/ccQCFK4e.s page 128 + ARM GAS /tmp/ccOwl4Y6.s page 128 5486:Middlewares/Third_Party/FatFs/src/ff.c **** } while (nsect); @@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5540:Middlewares/Third_Party/FatFs/src/ff.c **** for ( ; j < 11; j++) { 5541:Middlewares/Third_Party/FatFs/src/ff.c **** for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ; /* VBR checksum */ 5542:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_write(pdrv, buf, sect++, 1) != RES_OK) return FR_DISK_ERR; - ARM GAS /tmp/ccQCFK4e.s page 129 + ARM GAS /tmp/ccOwl4Y6.s page 129 5543:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5597:Middlewares/Third_Party/FatFs/src/ff.c **** if (!au && (au = pau / 2) != 0) continue; /* Adjust cluster size and retry */ 5598:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; 5599:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 130 + ARM GAS /tmp/ccOwl4Y6.s page 130 5600:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5654:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(buf + BS_VolID, GET_FATTIME()); /* VSN */ 5655:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */ 5656:Middlewares/Third_Party/FatFs/src/ff.c **** buf[BS_DrvNum] = 0x80; /* Drive number (for int13) */ - ARM GAS /tmp/ccQCFK4e.s page 131 + ARM GAS /tmp/ccOwl4Y6.s page 131 5657:Middlewares/Third_Party/FatFs/src/ff.c **** buf[BS_BootSig] = 0x29; /* Extended boot signature */ @@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5711:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 5712:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol >= 0x10000) { 5713:Middlewares/Third_Party/FatFs/src/ff.c **** sys = 0x06; /* FAT12/16 (>=64KS) */ - ARM GAS /tmp/ccQCFK4e.s page 132 + ARM GAS /tmp/ccOwl4Y6.s page 132 5714:Middlewares/Third_Party/FatFs/src/ff.c **** } else { @@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5768:Middlewares/Third_Party/FatFs/src/ff.c **** 5769:Middlewares/Third_Party/FatFs/src/ff.c **** 5770:Middlewares/Third_Party/FatFs/src/ff.c **** stat = disk_initialize(pdrv); - ARM GAS /tmp/ccQCFK4e.s page 133 + ARM GAS /tmp/ccOwl4Y6.s page 133 5771:Middlewares/Third_Party/FatFs/src/ff.c **** if (stat & STA_NOINIT) return FR_NOT_READY; @@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5825:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_STRFUNC 5826:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 5827:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get a string from the file */ - ARM GAS /tmp/ccQCFK4e.s page 134 + ARM GAS /tmp/ccOwl4Y6.s page 134 5828:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ @@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5882:Middlewares/Third_Party/FatFs/src/ff.c **** } 5883:Middlewares/Third_Party/FatFs/src/ff.c **** c = ff_convert(c, 1); /* OEM -> Unicode */ 5884:Middlewares/Third_Party/FatFs/src/ff.c **** if (!c) c = '?'; - ARM GAS /tmp/ccQCFK4e.s page 135 + ARM GAS /tmp/ccOwl4Y6.s page 135 5885:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5939:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0xC0 | c >> 6); 5940:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* 16-bit */ 5941:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0xE0 | c >> 12); - ARM GAS /tmp/ccQCFK4e.s page 136 + ARM GAS /tmp/ccOwl4Y6.s page 136 5942:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0x80 | (c >> 6 & 0x3F)); @@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1640 @ link register save eliminated. 5992:Middlewares/Third_Party/FatFs/src/ff.c **** pb->fp = fp; 1641 .loc 1 5992 2 view .LVU493 - ARM GAS /tmp/ccQCFK4e.s page 137 + ARM GAS /tmp/ccOwl4Y6.s page 137 1642 .loc 1 5992 9 is_stmt 0 view .LVU494 @@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1688 000c 1A78 ldrb r2, [r3] @ zero_extendqisi2 3224:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_REENTRANT 1689 .loc 1 3224 21 discriminator 2 view .LVU507 - ARM GAS /tmp/ccQCFK4e.s page 138 + ARM GAS /tmp/ccOwl4Y6.s page 138 1690 000e A2B1 cbz r2, .L151 @@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3241:Middlewares/Third_Party/FatFs/src/ff.c **** return res; 1729 .loc 1 3241 33 discriminator 1 view .LVU523 1730 002e F5E7 b .L148 - ARM GAS /tmp/ccQCFK4e.s page 139 + ARM GAS /tmp/ccOwl4Y6.s page 139 1731 .LVL188: @@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1776 .LVL197: 1777 .LFB1196: 886:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD wsect; - ARM GAS /tmp/ccQCFK4e.s page 140 + ARM GAS /tmp/ccOwl4Y6.s page 140 1778 .loc 1 886 1 is_stmt 1 view -0 @@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 894:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DISK_ERR; 1818 .loc 1 894 7 view .LVU550 1819 0016 0123 movs r3, #1 - ARM GAS /tmp/ccQCFK4e.s page 141 + ARM GAS /tmp/ccOwl4Y6.s page 141 1820 0018 3A46 mov r2, r7 @@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1858 003c 0123 movs r3, #1 1859 003e 3A46 mov r2, r7 1860 0040 4146 mov r1, r8 - ARM GAS /tmp/ccQCFK4e.s page 142 + ARM GAS /tmp/ccOwl4Y6.s page 142 1861 0042 6078 ldrb r0, [r4, #1] @ zero_extendqisi2 @@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1907 .loc 1 920 5 view .LVU576 1908 0004 8B42 cmp r3, r1 1909 0006 02D1 bne .L169 - ARM GAS /tmp/ccQCFK4e.s page 143 + ARM GAS /tmp/ccOwl4Y6.s page 143 917:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1950 .L165: 929:Middlewares/Third_Party/FatFs/src/ff.c **** } 1951 .loc 1 929 4 is_stmt 1 view .LVU591 - ARM GAS /tmp/ccQCFK4e.s page 144 + ARM GAS /tmp/ccOwl4Y6.s page 144 929:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1996 .loc 1 2973 6 is_stmt 0 view .LVU603 1997 0016 04F23220 addw r0, r4, #562 1998 001a FFF7FEFF bl ld_word - ARM GAS /tmp/ccQCFK4e.s page 145 + ARM GAS /tmp/ccOwl4Y6.s page 145 1999 .LVL220: @@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2039 005a 9842 cmp r0, r3 2040 005c 04D0 beq .L171 2982:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 146 + ARM GAS /tmp/ccOwl4Y6.s page 146 2041 .loc 1 2982 9 view .LVU618 @@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2091 .cfi_offset 14, -4 2092 0004 87B0 sub sp, sp, #28 2093 .LCFI19: - ARM GAS /tmp/ccQCFK4e.s page 147 + ARM GAS /tmp/ccOwl4Y6.s page 147 2094 .cfi_def_cfa_offset 64 @@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2128 0024 2C60 str r4, [r5] 3020:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type) { /* If the volume has been mounted */ 2129 .loc 1 3020 2 is_stmt 1 view .LVU645 - ARM GAS /tmp/ccQCFK4e.s page 148 + ARM GAS /tmp/ccOwl4Y6.s page 148 3020:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type) { /* If the volume has been mounted */ @@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2167 .loc 1 3035 2 is_stmt 1 view .LVU662 3035:Middlewares/Third_Party/FatFs/src/ff.c **** stat = disk_initialize(fs->drv); /* Initialize the physical drive */ 2168 .loc 1 3035 12 is_stmt 0 view .LVU663 - ARM GAS /tmp/ccQCFK4e.s page 149 + ARM GAS /tmp/ccOwl4Y6.s page 149 2169 0050 F8B2 uxtb r0, r7 @@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2207 0086 B3F5606F cmp r3, #3584 2208 008a 00F23981 bhi .L202 3045:Middlewares/Third_Party/FatFs/src/ff.c **** #endif - ARM GAS /tmp/ccQCFK4e.s page 150 + ARM GAS /tmp/ccOwl4Y6.s page 150 2209 .loc 1 3045 64 discriminator 2 view .LVU680 @@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2248 .LVL239: 3116:Middlewares/Third_Party/FatFs/src/ff.c **** 2249 .loc 1 3116 44 discriminator 1 view .LVU696 - ARM GAS /tmp/ccQCFK4e.s page 151 + ARM GAS /tmp/ccOwl4Y6.s page 151 2250 00bc B4F80C80 ldrh r8, [r4, #12] @@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2287 .loc 1 3123 6 view .LVU713 2288 00e8 012B cmp r3, #1 2289 00ea 00F21181 bhi .L210 - ARM GAS /tmp/ccQCFK4e.s page 152 + ARM GAS /tmp/ccOwl4Y6.s page 152 3124:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3132:Middlewares/Third_Party/FatFs/src/ff.c **** if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32); 2328 .loc 1 3132 11 is_stmt 0 view .LVU730 2329 0130 04F14700 add r0, r4, #71 - ARM GAS /tmp/ccQCFK4e.s page 153 + ARM GAS /tmp/ccOwl4Y6.s page 153 2330 0134 FFF7FEFF bl ld_word @@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2368 .loc 1 3140 6 is_stmt 0 view .LVU746 2369 0160 019A ldr r2, [sp, #4] 2370 0162 9A42 cmp r2, r3 - ARM GAS /tmp/ccQCFK4e.s page 154 + ARM GAS /tmp/ccOwl4Y6.s page 154 2371 0164 C0F0E680 bcc .L215 @@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2411 .L183: 3052:Middlewares/Third_Party/FatFs/src/ff.c **** pt = fs->win + (MBR_Table + i * SZ_PTE); 2412 .loc 1 3052 17 discriminator 1 view .LVU761 - ARM GAS /tmp/ccQCFK4e.s page 155 + ARM GAS /tmp/ccOwl4Y6.s page 155 2413 0198 032E cmp r6, #3 @@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2452 01bc 0AE0 b .L188 2453 .LVL268: 2454 .L226: - ARM GAS /tmp/ccQCFK4e.s page 156 + ARM GAS /tmp/ccOwl4Y6.s page 156 3060:Middlewares/Third_Party/FatFs/src/ff.c **** } while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4); @@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3148:Middlewares/Third_Party/FatFs/src/ff.c **** fs->volbase = bsect; /* Volume start sector */ 2496 .loc 1 3148 16 view .LVU790 2497 01ee C4F81890 str r9, [r4, #24] - ARM GAS /tmp/ccQCFK4e.s page 157 + ARM GAS /tmp/ccOwl4Y6.s page 157 3149:Middlewares/Third_Party/FatFs/src/ff.c **** fs->fatbase = bsect + nrsv; /* FAT start sector */ @@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2533 021a 09F00103 and r3, r9, #1 3161:Middlewares/Third_Party/FatFs/src/ff.c **** } 2534 .loc 1 3161 22 discriminator 2 view .LVU810 - ARM GAS /tmp/ccQCFK4e.s page 158 + ARM GAS /tmp/ccOwl4Y6.s page 158 2535 021e 03EB5203 add r3, r3, r2, lsr #1 @@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3192:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN == 1 2573 .loc 1 3192 9 view .LVU827 2574 024e 1380 strh r3, [r2] @ movhi - ARM GAS /tmp/ccQCFK4e.s page 159 + ARM GAS /tmp/ccOwl4Y6.s page 159 2575 0250 E380 strh r3, [r4, #6] @ movhi @@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2614 .LVL285: 3156:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 2615 .loc 1 3156 11 view .LVU843 - ARM GAS /tmp/ccQCFK4e.s page 160 + ARM GAS /tmp/ccOwl4Y6.s page 160 2616 0280 CFE7 b .L193 @@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2658 02be 9842 cmp r0, r3 2659 02c0 BFD1 bne .L195 3177:Middlewares/Third_Party/FatFs/src/ff.c **** { - ARM GAS /tmp/ccQCFK4e.s page 161 + ARM GAS /tmp/ccOwl4Y6.s page 161 2660 .loc 1 3177 8 view .LVU856 @@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3015:Middlewares/Third_Party/FatFs/src/ff.c **** 2704 .loc 1 3015 18 discriminator 1 view .LVU867 2705 02f2 F9E7 b .L180 - ARM GAS /tmp/ccQCFK4e.s page 162 + ARM GAS /tmp/ccOwl4Y6.s page 162 2706 .LVL299: @@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3127:Middlewares/Third_Party/FatFs/src/ff.c **** 2752 .loc 1 3127 63 discriminator 3 view .LVU876 2753 0324 0D25 movs r5, #13 - ARM GAS /tmp/ccQCFK4e.s page 163 + ARM GAS /tmp/ccOwl4Y6.s page 163 2754 0326 DFE7 b .L180 @@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2799 .LFE1219: 2801 .section .text.put_fat,"ax",%progbits 2802 .align 1 - ARM GAS /tmp/ccQCFK4e.s page 164 + ARM GAS /tmp/ccOwl4Y6.s page 164 2803 .syntax unified @@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2846 001a 022B cmp r3, #2 2847 001c 49D0 beq .L234 2848 001e 032B cmp r3, #3 - ARM GAS /tmp/ccQCFK4e.s page 165 + ARM GAS /tmp/ccOwl4Y6.s page 165 2849 0020 60D0 beq .L235 @@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2887 .loc 1 1098 4 is_stmt 1 view .LVU913 1098:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 2888 .loc 1 1098 7 is_stmt 0 view .LVU914 - ARM GAS /tmp/ccQCFK4e.s page 166 + ARM GAS /tmp/ccOwl4Y6.s page 166 2889 0052 15F00105 ands r5, r5, #1 @@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2927 0084 A389 ldrh r3, [r4, #12] 1102:Middlewares/Third_Party/FatFs/src/ff.c **** *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F)); 2928 .loc 1 1102 21 view .LVU931 - ARM GAS /tmp/ccQCFK4e.s page 167 + ARM GAS /tmp/ccOwl4Y6.s page 167 2929 0086 B9FBF3F2 udiv r2, r9, r3 @@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1108:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; 2969 .loc 1 1108 56 view .LVU946 2970 00b6 5B08 lsrs r3, r3, #1 - ARM GAS /tmp/ccQCFK4e.s page 168 + ARM GAS /tmp/ccOwl4Y6.s page 168 1108:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1118:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; 3010 .loc 1 1118 49 view .LVU962 3011 00e6 8389 ldrh r3, [r0, #12] - ARM GAS /tmp/ccQCFK4e.s page 169 + ARM GAS /tmp/ccOwl4Y6.s page 169 1118:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3050 0118 3943 orrs r1, r1, r7 3051 .LVL340: 1123:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; - ARM GAS /tmp/ccQCFK4e.s page 170 + ARM GAS /tmp/ccOwl4Y6.s page 170 3052 .loc 1 1123 4 is_stmt 0 view .LVU979 @@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3098 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 3099 .LCFI23: 3100 .cfi_def_cfa_offset 24 - ARM GAS /tmp/ccQCFK4e.s page 171 + ARM GAS /tmp/ccOwl4Y6.s page 171 3101 .cfi_offset 3, -24 @@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3140 .LVL349: 1020:Middlewares/Third_Party/FatFs/src/ff.c **** wc = fs->win[bc++ % SS(fs)]; 3141 .loc 1 1020 4 is_stmt 1 view .LVU1005 - ARM GAS /tmp/ccQCFK4e.s page 172 + ARM GAS /tmp/ccOwl4Y6.s page 172 1020:Middlewares/Third_Party/FatFs/src/ff.c **** wc = fs->win[bc++ % SS(fs)]; @@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3180 .loc 1 1022 8 view .LVU1021 3181 0052 1944 add r1, r1, r3 3182 0054 2846 mov r0, r5 - ARM GAS /tmp/ccQCFK4e.s page 173 + ARM GAS /tmp/ccOwl4Y6.s page 173 3183 0056 FFF7FEFF bl move_window @@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1028:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_word(fs->win + clst * 2 % SS(fs)); 3223 .loc 1 1028 47 view .LVU1036 3224 0084 AB89 ldrh r3, [r5, #12] - ARM GAS /tmp/ccQCFK4e.s page 174 + ARM GAS /tmp/ccOwl4Y6.s page 174 1028:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_word(fs->win + clst * 2 % SS(fs)); @@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3263 .loc 1 1033 54 view .LVU1052 3264 00b2 9B08 lsrs r3, r3, #2 1033:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF; - ARM GAS /tmp/ccQCFK4e.s page 175 + ARM GAS /tmp/ccOwl4Y6.s page 175 3265 .loc 1 1033 44 view .LVU1053 @@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1012:Middlewares/Third_Party/FatFs/src/ff.c **** 3306 .loc 1 1012 7 view .LVU1067 3307 00e2 0120 movs r0, #1 - ARM GAS /tmp/ccQCFK4e.s page 176 + ARM GAS /tmp/ccOwl4Y6.s page 176 3308 .LVL377: @@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3354 .cfi_offset 4, -24 3355 .cfi_offset 5, -20 3356 .cfi_offset 6, -16 - ARM GAS /tmp/ccQCFK4e.s page 177 + ARM GAS /tmp/ccOwl4Y6.s page 177 3357 .cfi_offset 7, -12 @@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3394 .L261: 1489:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */ 3395 .loc 1 1489 2 view .LVU1095 - ARM GAS /tmp/ccQCFK4e.s page 178 + ARM GAS /tmp/ccOwl4Y6.s page 178 1489:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */ @@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3431 0052 B8F80C20 ldrh r2, [r8, #12] 1506:Middlewares/Third_Party/FatFs/src/ff.c **** 3432 .loc 1 1506 27 view .LVU1115 - ARM GAS /tmp/ccQCFK4e.s page 179 + ARM GAS /tmp/ccOwl4Y6.s page 179 3433 0056 B6FBF2F1 udiv r1, r6, r2 @@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3471 .loc 1 1498 7 is_stmt 0 view .LVU1131 3472 0086 0128 cmp r0, #1 3473 0088 14D9 bls .L269 - ARM GAS /tmp/ccQCFK4e.s page 180 + ARM GAS /tmp/ccOwl4Y6.s page 180 1498:Middlewares/Third_Party/FatFs/src/ff.c **** ofs -= csz; @@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3515 .LVL399: 1490:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = fs->dirbase; 3516 .loc 1 1490 45 discriminator 1 view .LVU1145 - ARM GAS /tmp/ccQCFK4e.s page 181 + ARM GAS /tmp/ccOwl4Y6.s page 181 3517 00ae F9E7 b .L259 @@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3564 .cfi_offset 4, -24 3565 .cfi_offset 5, -20 3566 .cfi_offset 6, -16 - ARM GAS /tmp/ccQCFK4e.s page 182 + ARM GAS /tmp/ccOwl4Y6.s page 182 3567 .cfi_offset 7, -12 @@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1366:Middlewares/Third_Party/FatFs/src/ff.c **** if (cs < 2) return 1; /* Invalid FAT value */ 3605 .loc 1 1366 8 view .LVU1171 3606 0026 0346 mov r3, r0 - ARM GAS /tmp/ccQCFK4e.s page 183 + ARM GAS /tmp/ccOwl4Y6.s page 183 3607 .LVL413: @@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3646 004e 78B1 cbz r0, .L279 1409:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */ 3647 .loc 1 1409 4 is_stmt 1 view .LVU1187 - ARM GAS /tmp/ccQCFK4e.s page 184 + ARM GAS /tmp/ccOwl4Y6.s page 184 1409:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */ @@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1412:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && clst != 0) { 3687 .loc 1 1412 9 view .LVU1203 3688 0078 FFF7FEFF bl put_fat - ARM GAS /tmp/ccQCFK4e.s page 185 + ARM GAS /tmp/ccOwl4Y6.s page 185 3689 .LVL423: @@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1421:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 3727 .loc 1 1421 3 is_stmt 1 view .LVU1220 1421:Middlewares/Third_Party/FatFs/src/ff.c **** } else { - ARM GAS /tmp/ccQCFK4e.s page 186 + ARM GAS /tmp/ccOwl4Y6.s page 186 3728 .loc 1 1421 5 is_stmt 0 view .LVU1221 @@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3771 .L287: 1405:Middlewares/Third_Party/FatFs/src/ff.c **** } 3772 .loc 1 1405 27 discriminator 1 view .LVU1233 - ARM GAS /tmp/ccQCFK4e.s page 187 + ARM GAS /tmp/ccOwl4Y6.s page 187 3773 00ca 0023 movs r3, #0 @@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3819 .loc 1 1287 2 is_stmt 1 view .LVU1243 1287:Middlewares/Third_Party/FatFs/src/ff.c **** 3820 .loc 1 1287 5 is_stmt 0 view .LVU1244 - ARM GAS /tmp/ccQCFK4e.s page 188 + ARM GAS /tmp/ccOwl4Y6.s page 188 3821 0006 0129 cmp r1, #1 @@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3860 .loc 1 1297 9 is_stmt 0 view .LVU1259 3861 002c 2146 mov r1, r4 3862 002e 3046 mov r0, r6 - ARM GAS /tmp/ccQCFK4e.s page 189 + ARM GAS /tmp/ccOwl4Y6.s page 189 3863 0030 FFF7FEFF bl get_fat @@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1305:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst++; 3900 .loc 1 1305 36 view .LVU1277 3901 0054 911E subs r1, r2, #2 - ARM GAS /tmp/ccQCFK4e.s page 190 + ARM GAS /tmp/ccOwl4Y6.s page 190 1305:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst++; @@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3943 0078 F9E7 b .L295 3944 .LVL458: 3945 .L303: - ARM GAS /tmp/ccQCFK4e.s page 191 + ARM GAS /tmp/ccOwl4Y6.s page 191 1300:Middlewares/Third_Party/FatFs/src/ff.c **** if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) { @@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3990 .loc 1 2425 5 is_stmt 0 view .LVU1302 3991 000e 20B9 cbnz r0, .L306 2426:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; - ARM GAS /tmp/ccQCFK4e.s page 192 + ARM GAS /tmp/ccOwl4Y6.s page 192 3992 .loc 1 2426 3 is_stmt 1 view .LVU1303 @@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1525:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY 4037 .loc 1 1525 9 is_stmt 0 view .LVU1315 4038 0004 0668 ldr r6, [r0] - ARM GAS /tmp/ccQCFK4e.s page 193 + ARM GAS /tmp/ccOwl4Y6.s page 193 4039 .LVL465: @@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4076 .loc 1 1537 4 is_stmt 1 view .LVU1332 1537:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = 0; return FR_NO_FILE; 4077 .loc 1 1537 26 is_stmt 0 view .LVU1333 - ARM GAS /tmp/ccQCFK4e.s page 194 + ARM GAS /tmp/ccOwl4Y6.s page 194 4078 002e 3389 ldrh r3, [r6, #8] @@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4116 .LVL473: 1538:Middlewares/Third_Party/FatFs/src/ff.c **** } 4117 .loc 1 1538 26 view .LVU1350 - ARM GAS /tmp/ccQCFK4e.s page 195 + ARM GAS /tmp/ccOwl4Y6.s page 195 4118 0056 F9E7 b .L309 @@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1548:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = 0; return FR_NO_FILE; 4155 .loc 1 1548 9 is_stmt 0 view .LVU1368 4156 007e 8FB1 cbz r7, .L327 - ARM GAS /tmp/ccQCFK4e.s page 196 + ARM GAS /tmp/ccOwl4Y6.s page 196 1551:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 0) return FR_DENIED; /* No free cluster */ @@ -11758,7 +11758,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4194 .loc 1 1549 16 is_stmt 0 view .LVU1385 4195 00a4 0023 movs r3, #0 4196 00a6 EB61 str r3, [r5, #28] - ARM GAS /tmp/ccQCFK4e.s page 197 + ARM GAS /tmp/ccOwl4Y6.s page 197 1549:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -11818,7 +11818,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4236 00d2 F8B9 cbnz r0, .L324 1559:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 4237 .loc 1 1559 72 is_stmt 1 discriminator 2 view .LVU1401 - ARM GAS /tmp/ccQCFK4e.s page 198 + ARM GAS /tmp/ccOwl4Y6.s page 198 1559:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; @@ -11878,7 +11878,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4278 00fc 0420 movs r0, #4 4279 .LVL493: 1531:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 199 + ARM GAS /tmp/ccOwl4Y6.s page 199 4280 .loc 1 1531 105 discriminator 3 view .LVU1416 @@ -11938,7 +11938,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4323 .LFE1206: 4325 .section .text.dir_find,"ax",%progbits 4326 .align 1 - ARM GAS /tmp/ccQCFK4e.s page 200 + ARM GAS /tmp/ccOwl4Y6.s page 200 4327 .syntax unified @@ -11998,7 +11998,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2277:Middlewares/Third_Party/FatFs/src/ff.c **** } while (res == FR_OK); 4370 .loc 1 2277 9 is_stmt 0 view .LVU1440 4371 0014 0021 movs r1, #0 - ARM GAS /tmp/ccQCFK4e.s page 201 + ARM GAS /tmp/ccOwl4Y6.s page 201 4372 0016 2046 mov r0, r4 @@ -12058,7 +12058,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4410 .loc 1 2274 16 view .LVU1456 4411 003c A371 strb r3, [r4, #6] 4412 .LVL516: - ARM GAS /tmp/ccQCFK4e.s page 202 + ARM GAS /tmp/ccOwl4Y6.s page 202 2275:Middlewares/Third_Party/FatFs/src/ff.c **** #endif @@ -12118,7 +12118,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4460 .cfi_def_cfa_offset 24 4461 0004 0446 mov r4, r0 4462 0006 0191 str r1, [sp, #4] - ARM GAS /tmp/ccQCFK4e.s page 203 + ARM GAS /tmp/ccOwl4Y6.s page 203 2818:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE ns; @@ -12178,7 +12178,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4500 .L339: 2855:Middlewares/Third_Party/FatFs/src/ff.c **** res = create_name(dp, &path); /* Get a segment name of the path */ 4501 .loc 1 2855 3 is_stmt 1 view .LVU1483 - ARM GAS /tmp/ccQCFK4e.s page 204 + ARM GAS /tmp/ccOwl4Y6.s page 204 2856:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break; @@ -12238,7 +12238,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4538 .loc 1 2888 32 is_stmt 0 view .LVU1501 4539 004e 05F13401 add r1, r5, #52 2888:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 205 + ARM GAS /tmp/ccOwl4Y6.s page 205 4540 .loc 1 2888 44 view .LVU1502 @@ -12298,7 +12298,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2894:Middlewares/Third_Party/FatFs/src/ff.c **** 4580 .loc 1 2894 1 is_stmt 0 view .LVU1517 4581 007a 1846 mov r0, r3 - ARM GAS /tmp/ccQCFK4e.s page 206 + ARM GAS /tmp/ccOwl4Y6.s page 206 4582 007c 03B0 add sp, sp, #12 @@ -12358,7 +12358,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4629 .cfi_offset 4, -20 4630 .cfi_offset 5, -16 4631 .cfi_offset 6, -12 - ARM GAS /tmp/ccQCFK4e.s page 207 + ARM GAS /tmp/ccOwl4Y6.s page 207 4632 .cfi_offset 7, -8 @@ -12418,7 +12418,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4671 0020 0246 mov r2, r0 4672 0022 70B9 cbnz r0, .L348 4673 .LVL545: - ARM GAS /tmp/ccQCFK4e.s page 208 + ARM GAS /tmp/ccOwl4Y6.s page 208 4674 .L350: @@ -12478,7 +12478,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 1619:Middlewares/Third_Party/FatFs/src/ff.c **** } 4713 .loc 1 1619 2 is_stmt 1 view .LVU1557 1620:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 209 + ARM GAS /tmp/ccOwl4Y6.s page 209 4714 .loc 1 1620 1 is_stmt 0 view .LVU1558 @@ -12538,7 +12538,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2371:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(fs, dp->sect); 4760 .loc 1 2371 5 is_stmt 0 view .LVU1569 4761 000c 0546 mov r5, r0 - ARM GAS /tmp/ccQCFK4e.s page 210 + ARM GAS /tmp/ccOwl4Y6.s page 210 4762 000e 08B1 cbz r0, .L359 @@ -12598,7 +12598,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4804 .LFE1212: 4806 .section .text.dir_read,"ax",%progbits 4807 .align 1 - ARM GAS /tmp/ccQCFK4e.s page 211 + ARM GAS /tmp/ccOwl4Y6.s page 211 4808 .syntax unified @@ -12658,7 +12658,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4851 0010 FFF7FEFF bl dir_next 4852 .LVL568: 2194:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 212 + ARM GAS /tmp/ccOwl4Y6.s page 212 4853 .loc 1 2194 3 is_stmt 1 view .LVU1594 @@ -12718,7 +12718,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 2188:Middlewares/Third_Party/FatFs/src/ff.c **** break; 4890 .loc 1 2188 4 is_stmt 1 view .LVU1612 2188:Middlewares/Third_Party/FatFs/src/ff.c **** break; - ARM GAS /tmp/ccQCFK4e.s page 213 + ARM GAS /tmp/ccOwl4Y6.s page 213 4891 .loc 1 2188 7 is_stmt 0 view .LVU1613 @@ -12778,7 +12778,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4934 .align 1 4935 .syntax unified 4936 .thumb - ARM GAS /tmp/ccQCFK4e.s page 214 + ARM GAS /tmp/ccOwl4Y6.s page 214 4937 .thumb_func @@ -12838,7 +12838,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4979 .loc 1 968 6 discriminator 1 view .LVU1638 4980 001c 00B1 cbz r0, .L369 968:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 215 + ARM GAS /tmp/ccOwl4Y6.s page 215 4981 .loc 1 968 56 discriminator 1 view .LVU1639 @@ -12898,7 +12898,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5023 0056 6169 ldr r1, [r4, #20] 5024 0058 04F50770 add r0, r4, #540 5025 005c FFF7FEFF bl st_dword - ARM GAS /tmp/ccQCFK4e.s page 216 + ARM GAS /tmp/ccOwl4Y6.s page 216 5026 .LVL587: @@ -12958,7 +12958,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5072 .loc 1 3265 1 is_stmt 0 view .LVU1661 5073 0000 70B5 push {r4, r5, r6, lr} 5074 .LCFI38: - ARM GAS /tmp/ccQCFK4e.s page 217 + ARM GAS /tmp/ccOwl4Y6.s page 217 5075 .cfi_def_cfa_offset 16 @@ -13018,7 +13018,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3279:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 5114 .loc 1 3279 3 is_stmt 0 view .LVU1677 5115 0020 FFF7FEFF bl clear_lock - ARM GAS /tmp/ccQCFK4e.s page 218 + ARM GAS /tmp/ccOwl4Y6.s page 218 5116 .LVL595: @@ -13078,7 +13078,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5155 .cfi_remember_state 5156 .cfi_def_cfa_offset 16 5157 @ sp needed - ARM GAS /tmp/ccQCFK4e.s page 219 + ARM GAS /tmp/ccOwl4Y6.s page 219 5158 004c 70BD pop {r4, r5, r6, pc} @@ -13138,7 +13138,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5207 .cfi_offset 8, -12 5208 .cfi_offset 9, -8 5209 .cfi_offset 14, -4 - ARM GAS /tmp/ccQCFK4e.s page 220 + ARM GAS /tmp/ccOwl4Y6.s page 220 5210 0004 91B0 sub sp, sp, #68 @@ -13198,7 +13198,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5247 .loc 1 3499 31 is_stmt 0 discriminator 1 view .LVU1716 5248 0024 0023 movs r3, #0 5249 0026 3360 str r3, [r6] - ARM GAS /tmp/ccQCFK4e.s page 221 + ARM GAS /tmp/ccOwl4Y6.s page 221 5250 .LVL607: @@ -13258,7 +13258,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5290 004c 14BF ite ne 5291 004e 0121 movne r1, #1 5292 0050 0021 moveq r1, #0 - ARM GAS /tmp/ccQCFK4e.s page 222 + ARM GAS /tmp/ccOwl4Y6.s page 222 5293 0052 04A8 add r0, sp, #16 @@ -13318,7 +13318,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3392:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(dj.dir + DIR_ModTime, dw); /* Set modified time */ 5333 .loc 1 3392 6 is_stmt 1 view .LVU1745 5334 007c 0146 mov r1, r0 - ARM GAS /tmp/ccQCFK4e.s page 223 + ARM GAS /tmp/ccOwl4Y6.s page 223 5335 007e 0C98 ldr r0, [sp, #48] @@ -13378,7 +13378,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3398:Middlewares/Third_Party/FatFs/src/ff.c **** 5378 .loc 1 3398 6 view .LVU1757 3398:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 224 + ARM GAS /tmp/ccOwl4Y6.s page 224 5379 .loc 1 3398 16 is_stmt 0 view .LVU1758 @@ -13438,7 +13438,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3405:Middlewares/Third_Party/FatFs/src/ff.c **** } 5419 .loc 1 3405 22 view .LVU1773 5420 00e8 039B ldr r3, [sp, #12] - ARM GAS /tmp/ccQCFK4e.s page 225 + ARM GAS /tmp/ccOwl4Y6.s page 225 5421 00ea 1C61 str r4, [r3, #16] @@ -13498,7 +13498,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5462 0114 AAD0 beq .L393 3360:Middlewares/Third_Party/FatFs/src/ff.c **** } 5463 .loc 1 3360 36 discriminator 1 view .LVU1787 - ARM GAS /tmp/ccQCFK4e.s page 226 + ARM GAS /tmp/ccOwl4Y6.s page 226 5464 0116 0825 movs r5, #8 @@ -13558,7 +13558,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3423:Middlewares/Third_Party/FatFs/src/ff.c **** mode |= FA_MODIFIED; 5503 .loc 1 3423 7 is_stmt 0 view .LVU1803 5504 0140 17F0080F tst r7, #8 - ARM GAS /tmp/ccQCFK4e.s page 227 + ARM GAS /tmp/ccOwl4Y6.s page 227 5505 0144 01D0 beq .L395 @@ -13618,7 +13618,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5543 .loc 1 3444 3 is_stmt 1 view .LVU1819 3456:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize); 5544 .loc 1 3456 5 view .LVU1820 - ARM GAS /tmp/ccQCFK4e.s page 228 + ARM GAS /tmp/ccOwl4Y6.s page 228 3456:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize); @@ -13678,7 +13678,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3466:Middlewares/Third_Party/FatFs/src/ff.c **** fp->fptr = 0; /* Set file pointer top of the file */ 5581 .loc 1 3466 4 is_stmt 1 view .LVU1839 3466:Middlewares/Third_Party/FatFs/src/ff.c **** fp->fptr = 0; /* Set file pointer top of the file */ - ARM GAS /tmp/ccQCFK4e.s page 229 + ARM GAS /tmp/ccOwl4Y6.s page 229 5582 .loc 1 3466 13 is_stmt 0 view .LVU1840 @@ -13738,7 +13738,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5619 01bc B168 ldr r1, [r6, #8] 5620 .LVL654: 3476:Middlewares/Third_Party/FatFs/src/ff.c **** clst = get_fat(&fp->obj, clst); - ARM GAS /tmp/ccQCFK4e.s page 230 + ARM GAS /tmp/ccOwl4Y6.s page 230 5621 .loc 1 3476 5 is_stmt 1 view .LVU1858 @@ -13798,7 +13798,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5660 .loc 1 3479 34 discriminator 1 view .LVU1873 5661 01e2 0125 movs r5, #1 5662 .LVL660: - ARM GAS /tmp/ccQCFK4e.s page 231 + ARM GAS /tmp/ccOwl4Y6.s page 231 3479:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -13858,7 +13858,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3486:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY 5701 .loc 1 3486 21 view .LVU1890 5702 020e 0244 add r2, r2, r0 - ARM GAS /tmp/ccQCFK4e.s page 232 + ARM GAS /tmp/ccOwl4Y6.s page 232 3486:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY @@ -13918,7 +13918,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5743 0230 FAE6 b .L387 5744 .cfi_endproc 5745 .LFE1222: - ARM GAS /tmp/ccQCFK4e.s page 233 + ARM GAS /tmp/ccOwl4Y6.s page 233 5747 .section .text.f_read,"ax",%progbits @@ -13978,7 +13978,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3526:Middlewares/Third_Party/FatFs/src/ff.c **** res = validate(&fp->obj, &fs); /* Check validity of the file object */ 5792 .loc 1 3526 6 view .LVU1915 5793 0010 C8F80030 str r3, [r8] - ARM GAS /tmp/ccQCFK4e.s page 234 + ARM GAS /tmp/ccOwl4Y6.s page 234 3527:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */ @@ -14038,7 +14038,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5832 0040 2E46 mov r6, r5 5833 .LVL682: 3531:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 235 + ARM GAS /tmp/ccOwl4Y6.s page 235 5834 .loc 1 3531 5 view .LVU1932 @@ -14098,7 +14098,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5874 .loc 1 3551 29 discriminator 1 view .LVU1946 5875 0070 CDF804A0 str r10, [sp, #4] 5876 .LVL689: - ARM GAS /tmp/ccQCFK4e.s page 236 + ARM GAS /tmp/ccOwl4Y6.s page 236 3551:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; /* Update current cluster */ @@ -14158,7 +14158,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5916 009c 5345 cmp r3, r10 5917 009e F5D2 bcs .L437 3570:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 237 + ARM GAS /tmp/ccOwl4Y6.s page 237 5918 .loc 1 3570 6 is_stmt 1 view .LVU1962 @@ -14218,7 +14218,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5958 00d4 C4F82090 str r9, [r4, #32] 5959 .LVL698: 5960 .L426: - ARM GAS /tmp/ccQCFK4e.s page 238 + ARM GAS /tmp/ccOwl4Y6.s page 238 3590:Middlewares/Third_Party/FatFs/src/ff.c **** if (rcnt > btr) rcnt = btr; /* Clip it by btr if needed */ @@ -14278,7 +14278,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3534:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ 6000 .loc 1 3534 36 view .LVU1992 6001 0104 D8F80030 ldr r3, [r8] - ARM GAS /tmp/ccQCFK4e.s page 239 + ARM GAS /tmp/ccOwl4Y6.s page 239 3534:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ @@ -14338,7 +14338,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6039 .loc 1 3538 8 is_stmt 0 view .LVU2009 6040 0132 0029 cmp r1, #0 6041 0134 86D1 bne .L428 - ARM GAS /tmp/ccQCFK4e.s page 240 + ARM GAS /tmp/ccOwl4Y6.s page 240 3539:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* Middle or end of the file */ @@ -14398,7 +14398,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3557:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Read maximum contiguous sectors directly */ 6079 .loc 1 3557 4 is_stmt 1 view .LVU2027 3557:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Read maximum contiguous sectors directly */ - ARM GAS /tmp/ccQCFK4e.s page 241 + ARM GAS /tmp/ccOwl4Y6.s page 241 6080 .loc 1 3557 15 is_stmt 0 view .LVU2028 @@ -14458,7 +14458,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6119 0190 CDF804A0 str r10, [sp, #4] 6120 .LVL714: 6121 .L423: - ARM GAS /tmp/ccQCFK4e.s page 242 + ARM GAS /tmp/ccOwl4Y6.s page 242 3601:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -14518,7 +14518,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3585:Middlewares/Third_Party/FatFs/src/ff.c **** } 6164 .loc 1 3585 57 is_stmt 1 discriminator 1 view .LVU2056 6165 01c4 4FF0010A mov r10, #1 - ARM GAS /tmp/ccQCFK4e.s page 243 + ARM GAS /tmp/ccOwl4Y6.s page 243 6166 .LVL720: @@ -14578,7 +14578,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6215 0006 0446 mov r4, r0 6216 0008 0F46 mov r7, r1 6217 000a 1546 mov r5, r2 - ARM GAS /tmp/ccQCFK4e.s page 244 + ARM GAS /tmp/ccOwl4Y6.s page 244 6218 000c 9846 mov r8, r3 @@ -14638,7 +14638,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6254 .loc 1 3628 5 view .LVU2081 6255 002a 13F0020F tst r3, #2 6256 002e 00F0EC80 beq .L482 - ARM GAS /tmp/ccQCFK4e.s page 245 + ARM GAS /tmp/ccOwl4Y6.s page 245 3631:Middlewares/Third_Party/FatFs/src/ff.c **** btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr); @@ -14698,7 +14698,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6294 .loc 1 3657 5 view .LVU2098 3657:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; /* Update current cluster */ 6295 .loc 1 3657 8 is_stmt 0 view .LVU2099 - ARM GAS /tmp/ccQCFK4e.s page 246 + ARM GAS /tmp/ccOwl4Y6.s page 246 6296 0054 B0F1FF3F cmp r0, #-1 @@ -14758,7 +14758,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6332 .loc 1 3671 9 is_stmt 0 view .LVU2117 6333 007c B144 add r9, r9, r6 6334 .LVL736: - ARM GAS /tmp/ccQCFK4e.s page 247 + ARM GAS /tmp/ccOwl4Y6.s page 247 3672:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Write maximum contiguous sectors directly */ @@ -14818,7 +14818,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3677:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_MINIMIZE <= 2 6373 .loc 1 3677 57 is_stmt 1 discriminator 1 view .LVU2134 6374 00b2 CDF804A0 str r10, [sp, #4] - ARM GAS /tmp/ccQCFK4e.s page 248 + ARM GAS /tmp/ccOwl4Y6.s page 248 6375 .LVL741: @@ -14878,7 +14878,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3665:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY; 6419 .loc 1 3665 5 is_stmt 1 view .LVU2145 3665:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY; - ARM GAS /tmp/ccQCFK4e.s page 249 + ARM GAS /tmp/ccOwl4Y6.s page 249 6420 .loc 1 3665 9 is_stmt 0 view .LVU2146 @@ -14938,7 +14938,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3685:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs)); 6461 .loc 1 3685 11 is_stmt 0 view .LVU2160 6462 011c 236A ldr r3, [r4, #32] - ARM GAS /tmp/ccQCFK4e.s page 250 + ARM GAS /tmp/ccOwl4Y6.s page 250 3685:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs)); @@ -14998,7 +14998,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6502 014c 4B45 cmp r3, r9 6503 014e 03D0 beq .L478 3701:Middlewares/Third_Party/FatFs/src/ff.c **** disk_read(fs->drv, fp->buf, sect, 1) != RES_OK) { - ARM GAS /tmp/ccQCFK4e.s page 251 + ARM GAS /tmp/ccOwl4Y6.s page 251 6504 .loc 1 3701 7 view .LVU2176 @@ -15058,7 +15058,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6542 0176 3246 mov r2, r6 6543 0178 3946 mov r1, r7 6544 017a 1844 add r0, r0, r3 - ARM GAS /tmp/ccQCFK4e.s page 252 + ARM GAS /tmp/ccOwl4Y6.s page 252 6545 017c FFF7FEFF bl mem_cpy @@ -15118,7 +15118,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6583 .loc 1 3637 9 is_stmt 0 view .LVU2208 6584 01a8 A169 ldr r1, [r4, #24] 3637:Middlewares/Third_Party/FatFs/src/ff.c **** csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1); /* Sector offset in the cluster */ - ARM GAS /tmp/ccQCFK4e.s page 253 + ARM GAS /tmp/ccOwl4Y6.s page 253 6585 .loc 1 3637 18 view .LVU2209 @@ -15178,7 +15178,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6622 01d6 2046 mov r0, r4 6623 .LVL767: 3643:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 254 + ARM GAS /tmp/ccOwl4Y6.s page 254 6624 .loc 1 3643 14 view .LVU2227 @@ -15238,7 +15238,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6666 .LVL775: 3628:Middlewares/Third_Party/FatFs/src/ff.c **** 6667 .loc 1 3628 30 discriminator 1 view .LVU2240 - ARM GAS /tmp/ccQCFK4e.s page 255 + ARM GAS /tmp/ccOwl4Y6.s page 255 6668 020e 52E7 b .L459 @@ -15298,7 +15298,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5960:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 6714 .loc 1 5960 2 is_stmt 1 view .LVU2251 5960:Middlewares/Third_Party/FatFs/src/ff.c **** #endif - ARM GAS /tmp/ccQCFK4e.s page 256 + ARM GAS /tmp/ccOwl4Y6.s page 256 6715 .loc 1 5960 11 is_stmt 0 view .LVU2252 @@ -15358,7 +15358,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6757 .LVL785: 6758 .L500: 5964:Middlewares/Third_Party/FatFs/src/ff.c **** i = (bw == (UINT)i) ? 0 : -1; - ARM GAS /tmp/ccQCFK4e.s page 257 + ARM GAS /tmp/ccOwl4Y6.s page 257 6759 .loc 1 5964 3 is_stmt 1 view .LVU2265 @@ -15418,7 +15418,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6803 .loc 1 5979 2 view .LVU2277 5979:Middlewares/Third_Party/FatFs/src/ff.c **** && f_write(pb->fp, pb->buf, (UINT)pb->idx, &nw) == FR_OK 6804 .loc 1 5979 11 is_stmt 0 view .LVU2278 - ARM GAS /tmp/ccQCFK4e.s page 258 + ARM GAS /tmp/ccOwl4Y6.s page 258 6805 0000 4268 ldr r2, [r0, #4] @@ -15478,7 +15478,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6847 .LVL793: 6848 .L504: 6849 .LCFI61: - ARM GAS /tmp/ccQCFK4e.s page 259 + ARM GAS /tmp/ccOwl4Y6.s page 259 6850 .cfi_def_cfa_offset 0 @@ -15538,7 +15538,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 3737:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD tm; 6900 .loc 1 3737 2 view .LVU2297 3738:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE *dir; - ARM GAS /tmp/ccQCFK4e.s page 260 + ARM GAS /tmp/ccOwl4Y6.s page 260 6901 .loc 1 3738 2 view .LVU2298 @@ -15598,7 +15598,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6938 002a 78B1 cbz r0, .L517 6939 .LVL802: 6940 .L512: - ARM GAS /tmp/ccQCFK4e.s page 261 + ARM GAS /tmp/ccOwl4Y6.s page 261 3802:Middlewares/Third_Party/FatFs/src/ff.c **** @@ -15658,7 +15658,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6982 .loc 1 3789 6 is_stmt 1 view .LVU2328 6983 0056 A268 ldr r2, [r4, #8] 6984 0058 3146 mov r1, r6 - ARM GAS /tmp/ccQCFK4e.s page 262 + ARM GAS /tmp/ccOwl4Y6.s page 262 6985 005a 2068 ldr r0, [r4] @@ -15718,7 +15718,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7027 .cfi_endproc 7028 .LFE1225: 7030 .section .text.f_close,"ax",%progbits - ARM GAS /tmp/ccQCFK4e.s page 263 + ARM GAS /tmp/ccOwl4Y6.s page 263 7031 .align 1 @@ -15778,7 +15778,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7076 .cfi_restore_state 3825:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { 7077 .loc 1 3825 3 is_stmt 1 view .LVU2351 - ARM GAS /tmp/ccQCFK4e.s page 264 + ARM GAS /tmp/ccOwl4Y6.s page 264 3825:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { @@ -15838,7 +15838,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7122 .cfi_def_cfa_offset 36 7123 .cfi_offset 4, -36 7124 .cfi_offset 5, -32 - ARM GAS /tmp/ccQCFK4e.s page 265 + ARM GAS /tmp/ccOwl4Y6.s page 265 7125 .cfi_offset 6, -28 @@ -15898,7 +15898,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4024:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs == CREATE_LINKMAP) { /* Create CLMT */ 7163 .loc 1 4024 5 view .LVU2380 7164 001a 002B cmp r3, #0 - ARM GAS /tmp/ccQCFK4e.s page 266 + ARM GAS /tmp/ccOwl4Y6.s page 266 7165 001c 00F08E80 beq .L526 @@ -15958,7 +15958,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7205 .loc 1 4027 9 view .LVU2394 7206 003e 58F804BB ldr fp, [r8], #4 7207 .LVL829: - ARM GAS /tmp/ccQCFK4e.s page 267 + ARM GAS /tmp/ccOwl4Y6.s page 267 4027:Middlewares/Third_Party/FatFs/src/ff.c **** cl = fp->obj.sclust; /* Origin of the chain */ @@ -16018,7 +16018,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7243 005c 2046 mov r0, r4 7244 005e FFF7FEFF bl get_fat 7245 .LVL835: - ARM GAS /tmp/ccQCFK4e.s page 268 + ARM GAS /tmp/ccOwl4Y6.s page 268 4035:Middlewares/Third_Party/FatFs/src/ff.c **** if (cl <= 1) ABORT(fs, FR_INT_ERR); @@ -16078,7 +16078,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4042:Middlewares/Third_Party/FatFs/src/ff.c **** } 7283 .loc 1 4042 17 is_stmt 1 view .LVU2431 4042:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 269 + ARM GAS /tmp/ccOwl4Y6.s page 269 7284 .loc 1 4042 21 is_stmt 0 view .LVU2432 @@ -16138,7 +16138,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4044:Middlewares/Third_Party/FatFs/src/ff.c **** if (ulen <= tlen) { 7324 .loc 1 4044 15 view .LVU2447 7325 00a2 C3F80090 str r9, [r3] - ARM GAS /tmp/ccQCFK4e.s page 270 + ARM GAS /tmp/ccOwl4Y6.s page 270 4045:Middlewares/Third_Party/FatFs/src/ff.c **** *tbl = 0; /* Terminate table */ @@ -16198,7 +16198,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4057:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ 7364 .loc 1 4057 53 view .LVU2464 7365 00da 013A subs r2, r2, #1 - ARM GAS /tmp/ccQCFK4e.s page 271 + ARM GAS /tmp/ccOwl4Y6.s page 271 4057:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ @@ -16258,7 +16258,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7404 .loc 1 4068 15 is_stmt 0 view .LVU2480 7405 010c 2562 str r5, [r4, #32] 7406 010e 91E7 b .L525 - ARM GAS /tmp/ccQCFK4e.s page 272 + ARM GAS /tmp/ccOwl4Y6.s page 272 7407 .LVL854: @@ -16318,7 +16318,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7446 .L572: 4066:Middlewares/Third_Party/FatFs/src/ff.c **** #endif 7447 .loc 1 4066 57 is_stmt 1 discriminator 1 view .LVU2496 - ARM GAS /tmp/ccQCFK4e.s page 273 + ARM GAS /tmp/ccOwl4Y6.s page 273 7448 0136 0126 movs r6, #1 @@ -16378,7 +16378,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7485 0154 019A ldr r2, [sp, #4] 7486 0156 B2F80A80 ldrh r8, [r2, #10] 4086:Middlewares/Third_Party/FatFs/src/ff.c **** if (ifptr > 0 && - ARM GAS /tmp/ccQCFK4e.s page 274 + ARM GAS /tmp/ccOwl4Y6.s page 274 7487 .loc 1 4086 29 view .LVU2514 @@ -16438,7 +16438,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7524 017e 04E0 b .L542 7525 .LVL869: 7526 .L541: - ARM GAS /tmp/ccQCFK4e.s page 275 + ARM GAS /tmp/ccOwl4Y6.s page 275 4093:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY @@ -16498,7 +16498,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7564 019e 2275 strb r2, [r4, #20] 7565 .L555: 4138:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY - ARM GAS /tmp/ccQCFK4e.s page 276 + ARM GAS /tmp/ccOwl4Y6.s page 276 7566 .loc 1 4138 3 is_stmt 1 view .LVU2549 @@ -16558,7 +16558,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7606 .L574: 4096:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 1) ABORT(fs, FR_INT_ERR); 7607 .loc 1 4096 6 is_stmt 1 view .LVU2564 - ARM GAS /tmp/ccQCFK4e.s page 277 + ARM GAS /tmp/ccOwl4Y6.s page 277 4096:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 1) ABORT(fs, FR_INT_ERR); @@ -16618,7 +16618,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7645 .loc 1 4098 30 is_stmt 1 discriminator 1 view .LVU2581 4098:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.sclust = clst; 7646 .loc 1 4098 30 is_stmt 0 view .LVU2582 - ARM GAS /tmp/ccQCFK4e.s page 278 + ARM GAS /tmp/ccOwl4Y6.s page 278 7647 01fa 1BE7 b .L525 @@ -16678,7 +16678,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7686 .LVL884: 4106:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY 7687 .loc 1 4106 18 is_stmt 1 view .LVU2598 - ARM GAS /tmp/ccQCFK4e.s page 279 + ARM GAS /tmp/ccOwl4Y6.s page 279 4106:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY @@ -16738,7 +16738,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4127:Middlewares/Third_Party/FatFs/src/ff.c **** nsect = clust2sect(fs, clst); /* Current sector */ 7726 .loc 1 4127 13 view .LVU2615 7727 024c B7FBF8F3 udiv r3, r7, r8 - ARM GAS /tmp/ccQCFK4e.s page 280 + ARM GAS /tmp/ccOwl4Y6.s page 280 7728 0250 08FB1373 mls r3, r8, r3, r7 @@ -16798,7 +16798,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7766 .LVL895: 4123:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; 7767 .loc 1 4123 45 is_stmt 0 discriminator 3 view .LVU2632 - ARM GAS /tmp/ccQCFK4e.s page 281 + ARM GAS /tmp/ccOwl4Y6.s page 281 7768 0270 6675 strb r6, [r4, #21] @@ -16858,7 +16858,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7807 0294 95E7 b .L556 7808 .L581: 4142:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY; - ARM GAS /tmp/ccQCFK4e.s page 282 + ARM GAS /tmp/ccOwl4Y6.s page 282 7809 .loc 1 4142 62 is_stmt 1 discriminator 1 view .LVU2648 @@ -16918,7 +16918,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7854 .cfi_def_cfa_offset 12 7855 .cfi_offset 4, -12 7856 .cfi_offset 5, -8 - ARM GAS /tmp/ccQCFK4e.s page 283 + ARM GAS /tmp/ccOwl4Y6.s page 283 7857 .cfi_offset 14, -4 @@ -16978,7 +16978,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7896 001e 2046 mov r0, r4 7897 0020 05B0 add sp, sp, #20 7898 .LCFI77: - ARM GAS /tmp/ccQCFK4e.s page 284 + ARM GAS /tmp/ccOwl4Y6.s page 284 7899 .cfi_remember_state @@ -17038,7 +17038,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7937 .loc 1 4196 21 is_stmt 0 view .LVU2690 7938 0044 296A ldr r1, [r5, #32] 7939 0046 0398 ldr r0, [sp, #12] - ARM GAS /tmp/ccQCFK4e.s page 285 + ARM GAS /tmp/ccOwl4Y6.s page 285 7940 .LVL917: @@ -17098,7 +17098,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 7977 006a 0021 movs r1, #0 7978 006c 2846 mov r0, r5 7979 .LVL920: - ARM GAS /tmp/ccQCFK4e.s page 286 + ARM GAS /tmp/ccOwl4Y6.s page 286 4208:Middlewares/Third_Party/FatFs/src/ff.c **** if (!obj->lockid) res = FR_TOO_MANY_OPEN_FILES; @@ -17158,7 +17158,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8021 .LFE1228: 8023 .section .text.f_closedir,"ax",%progbits 8024 .align 1 - ARM GAS /tmp/ccQCFK4e.s page 287 + ARM GAS /tmp/ccOwl4Y6.s page 287 8025 .global f_closedir @@ -17218,7 +17218,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4249:Middlewares/Third_Party/FatFs/src/ff.c **** } 8067 .loc 1 4249 4 is_stmt 1 view .LVU2734 4249:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 288 + ARM GAS /tmp/ccOwl4Y6.s page 288 8068 .loc 1 4249 15 is_stmt 0 view .LVU2735 @@ -17278,7 +17278,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8117 0002 82B0 sub sp, sp, #8 8118 .LCFI84: 8119 .cfi_def_cfa_offset 24 - ARM GAS /tmp/ccQCFK4e.s page 289 + ARM GAS /tmp/ccOwl4Y6.s page 289 8120 0004 0446 mov r4, r0 @@ -17338,7 +17338,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8156 .loc 1 4284 5 is_stmt 1 view .LVU2760 8157 0022 2946 mov r1, r5 8158 0024 2046 mov r0, r4 - ARM GAS /tmp/ccQCFK4e.s page 290 + ARM GAS /tmp/ccOwl4Y6.s page 290 8159 0026 FFF7FEFF bl get_fileinfo @@ -17398,7 +17398,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8201 004a 0646 mov r6, r0 8202 004c FAE7 b .L603 8203 .cfi_endproc - ARM GAS /tmp/ccQCFK4e.s page 291 + ARM GAS /tmp/ccOwl4Y6.s page 291 8204 .LFE1230: @@ -17458,7 +17458,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8250 .L610: 4375:Middlewares/Third_Party/FatFs/src/ff.c **** } 8251 .loc 1 4375 16 is_stmt 1 view .LVU2783 - ARM GAS /tmp/ccQCFK4e.s page 292 + ARM GAS /tmp/ccOwl4Y6.s page 292 4378:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -17518,7 +17518,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8292 .LVL954: 4372:Middlewares/Third_Party/FatFs/src/ff.c **** } 8293 .loc 1 4372 14 is_stmt 0 discriminator 1 view .LVU2798 - ARM GAS /tmp/ccQCFK4e.s page 293 + ARM GAS /tmp/ccOwl4Y6.s page 293 8294 003a FFF7FEFF bl get_fileinfo @@ -17578,7 +17578,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8342 .loc 1 4398 2 view .LVU2806 4399:Middlewares/Third_Party/FatFs/src/ff.c **** 8343 .loc 1 4399 2 view .LVU2807 - ARM GAS /tmp/ccQCFK4e.s page 294 + ARM GAS /tmp/ccOwl4Y6.s page 294 4403:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { @@ -17638,7 +17638,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8381 .loc 1 4411 4 is_stmt 1 view .LVU2824 8382 .LVL962: 4412:Middlewares/Third_Party/FatFs/src/ff.c **** clst = 2; obj.fs = fs; - ARM GAS /tmp/ccQCFK4e.s page 295 + ARM GAS /tmp/ccOwl4Y6.s page 295 8383 .loc 1 4412 4 view .LVU2825 @@ -17698,7 +17698,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8421 .LVL969: 4419:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 8422 .loc 1 4419 25 is_stmt 0 view .LVU2842 - ARM GAS /tmp/ccQCFK4e.s page 296 + ARM GAS /tmp/ccOwl4Y6.s page 296 8423 004c 079B ldr r3, [sp, #28] @@ -17758,7 +17758,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8461 .loc 1 4444 14 view .LVU2858 8462 0072 5146 mov r1, r10 8463 0074 0798 ldr r0, [sp, #28] - ARM GAS /tmp/ccQCFK4e.s page 297 + ARM GAS /tmp/ccOwl4Y6.s page 297 8464 0076 FFF7FEFF bl move_window @@ -17818,7 +17818,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4451:Middlewares/Third_Party/FatFs/src/ff.c **** } else { 8502 .loc 1 4451 18 is_stmt 0 view .LVU2875 8503 0096 023E subs r6, r6, #2 - ARM GAS /tmp/ccQCFK4e.s page 298 + ARM GAS /tmp/ccOwl4Y6.s page 298 8504 .LVL982: @@ -17878,7 +17878,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8542 00b0 FFF7FEFF bl ld_dword 8543 .LVL988: 4453:Middlewares/Third_Party/FatFs/src/ff.c **** p += 4; i -= 4; - ARM GAS /tmp/ccQCFK4e.s page 299 + ARM GAS /tmp/ccOwl4Y6.s page 299 8544 .loc 1 4453 11 discriminator 1 view .LVU2892 @@ -17938,7 +17938,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8584 .LVL993: 8585 .L628: 8586 .LCFI94: - ARM GAS /tmp/ccQCFK4e.s page 300 + ARM GAS /tmp/ccOwl4Y6.s page 300 8587 .cfi_restore_state @@ -17998,7 +17998,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8632 000e 0028 cmp r0, #0 8633 0010 49D1 bne .L636 4485:Middlewares/Third_Party/FatFs/src/ff.c **** if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ - ARM GAS /tmp/ccQCFK4e.s page 301 + ARM GAS /tmp/ccOwl4Y6.s page 301 8634 .loc 1 4485 27 discriminator 2 view .LVU2918 @@ -18058,7 +18058,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4501:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_MODIFIED; 8673 .loc 1 4501 23 is_stmt 0 view .LVU2934 8674 003a A369 ldr r3, [r4, #24] - ARM GAS /tmp/ccQCFK4e.s page 302 + ARM GAS /tmp/ccOwl4Y6.s page 302 4501:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_MODIFIED; @@ -18118,7 +18118,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4494:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR; 8714 .loc 1 4494 4 is_stmt 1 view .LVU2950 4495:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == 1) res = FR_INT_ERR; - ARM GAS /tmp/ccQCFK4e.s page 303 + ARM GAS /tmp/ccOwl4Y6.s page 303 8715 .loc 1 4495 4 view .LVU2951 @@ -18178,7 +18178,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8755 .loc 1 4496 22 discriminator 1 view .LVU2965 8756 009a 0225 movs r5, #2 8757 009c CDE7 b .L638 - ARM GAS /tmp/ccQCFK4e.s page 304 + ARM GAS /tmp/ccOwl4Y6.s page 304 8758 .LVL1008: @@ -18238,7 +18238,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8805 .cfi_offset 5, -16 8806 .cfi_offset 6, -12 8807 .cfi_offset 7, -8 - ARM GAS /tmp/ccQCFK4e.s page 305 + ARM GAS /tmp/ccOwl4Y6.s page 305 8808 .cfi_offset 14, -4 @@ -18298,7 +18298,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8848 .L656: 8849 .LCFI101: 8850 .cfi_restore_state - ARM GAS /tmp/ccQCFK4e.s page 306 + ARM GAS /tmp/ccOwl4Y6.s page 306 4543:Middlewares/Third_Party/FatFs/src/ff.c **** res = follow_path(&dj, path); /* Follow the file path */ @@ -18358,7 +18358,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4555:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DENIED; /* Cannot remove R/O object */ 8888 .loc 1 4555 8 view .LVU3006 8889 0046 15F0010F tst r5, #1 - ARM GAS /tmp/ccQCFK4e.s page 307 + ARM GAS /tmp/ccOwl4Y6.s page 307 8890 004a 39D1 bne .L653 @@ -18418,7 +18418,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8930 .loc 1 4597 8 view .LVU3020 8931 0076 D0B9 cbnz r0, .L658 8932 .LVL1029: - ARM GAS /tmp/ccQCFK4e.s page 308 + ARM GAS /tmp/ccOwl4Y6.s page 308 8933 .L651: @@ -18478,7 +18478,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 8971 009a 04A8 add r0, sp, #16 8972 .LVL1035: 4588:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) res = FR_DENIED; /* Not empty? */ - ARM GAS /tmp/ccQCFK4e.s page 309 + ARM GAS /tmp/ccOwl4Y6.s page 309 8973 .loc 1 4588 14 view .LVU3037 @@ -18538,7 +18538,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9018 .thumb 9019 .thumb_func 9021 f_mkdir: - ARM GAS /tmp/ccQCFK4e.s page 310 + ARM GAS /tmp/ccOwl4Y6.s page 310 9022 .LVL1041: @@ -18598,7 +18598,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9063 0014 0493 str r3, [sp, #16] 4636:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); 9064 .loc 1 4636 2 is_stmt 1 view .LVU3061 - ARM GAS /tmp/ccQCFK4e.s page 311 + ARM GAS /tmp/ccOwl4Y6.s page 311 4636:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); @@ -18658,7 +18658,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9105 .loc 1 4644 4 is_stmt 1 view .LVU3075 4644:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.objsize = (DWORD)fs->csize * SS(fs); 9106 .loc 1 4644 10 is_stmt 0 view .LVU3076 - ARM GAS /tmp/ccQCFK4e.s page 312 + ARM GAS /tmp/ccOwl4Y6.s page 312 9107 0038 0021 movs r1, #0 @@ -18718,7 +18718,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9146 .L662: 4650:Middlewares/Third_Party/FatFs/src/ff.c **** tm = GET_FATTIME(); 9147 .loc 1 4650 4 is_stmt 1 view .LVU3092 - ARM GAS /tmp/ccQCFK4e.s page 313 + ARM GAS /tmp/ccOwl4Y6.s page 313 4650:Middlewares/Third_Party/FatFs/src/ff.c **** tm = GET_FATTIME(); @@ -18778,7 +18778,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9188 0088 0B22 movs r2, #11 9189 008a 2021 movs r1, #32 9190 008c 4046 mov r0, r8 - ARM GAS /tmp/ccQCFK4e.s page 314 + ARM GAS /tmp/ccOwl4Y6.s page 314 9191 008e FFF7FEFF bl mem_set @@ -18838,7 +18838,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9230 00c8 0398 ldr r0, [sp, #12] 9231 00ca 0378 ldrb r3, [r0] @ zero_extendqisi2 4664:Middlewares/Third_Party/FatFs/src/ff.c **** st_clust(fs, dir + SZDIRE, pcl); - ARM GAS /tmp/ccQCFK4e.s page 315 + ARM GAS /tmp/ccOwl4Y6.s page 315 9232 .loc 1 4664 9 view .LVU3122 @@ -18898,7 +18898,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9271 00f0 039B ldr r3, [sp, #12] 9272 00f2 9A89 ldrh r2, [r3, #12] 9273 00f4 0021 movs r1, #0 - ARM GAS /tmp/ccQCFK4e.s page 316 + ARM GAS /tmp/ccOwl4Y6.s page 316 9274 00f6 4046 mov r0, r8 @@ -18958,7 +18958,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9315 .loc 1 4664 61 discriminator 2 view .LVU3150 9316 0118 DAE7 b .L665 9317 .LVL1083: - ARM GAS /tmp/ccQCFK4e.s page 317 + ARM GAS /tmp/ccOwl4Y6.s page 317 9318 .L667: @@ -19018,7 +19018,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4694:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 9360 .loc 1 4694 6 view .LVU3163 4694:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; - ARM GAS /tmp/ccQCFK4e.s page 318 + ARM GAS /tmp/ccOwl4Y6.s page 318 9361 .loc 1 4694 20 is_stmt 0 view .LVU3164 @@ -19078,7 +19078,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9408 0002 A3B0 sub sp, sp, #140 9409 .LCFI107: 9410 .cfi_def_cfa_offset 152 - ARM GAS /tmp/ccQCFK4e.s page 319 + ARM GAS /tmp/ccOwl4Y6.s page 319 9411 0004 0190 str r0, [sp, #4] @@ -19138,7 +19138,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 4733:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); 9451 .loc 1 4733 3 is_stmt 1 view .LVU3188 4733:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs); - ARM GAS /tmp/ccQCFK4e.s page 320 + ARM GAS /tmp/ccOwl4Y6.s page 320 9452 .loc 1 4733 14 is_stmt 0 view .LVU3189 @@ -19198,7 +19198,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9491 004c 1E99 ldr r1, [sp, #120] 9492 004e 0B31 adds r1, r1, #11 9493 0050 03A8 add r0, sp, #12 - ARM GAS /tmp/ccQCFK4e.s page 321 + ARM GAS /tmp/ccOwl4Y6.s page 321 9494 0052 FFF7FEFF bl mem_cpy @@ -19258,7 +19258,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9536 .loc 1 4775 8 is_stmt 0 view .LVU3216 9537 0084 0428 cmp r0, #4 9538 0086 0CD0 beq .L687 - ARM GAS /tmp/ccQCFK4e.s page 322 + ARM GAS /tmp/ccOwl4Y6.s page 322 9539 .LVL1113: @@ -19318,7 +19318,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9578 .loc 1 4778 7 is_stmt 1 view .LVU3231 4778:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(dir + 13, buf + 2, 19); 9579 .loc 1 4778 11 is_stmt 0 view .LVU3232 - ARM GAS /tmp/ccQCFK4e.s page 323 + ARM GAS /tmp/ccOwl4Y6.s page 323 9580 00ae 129D ldr r5, [sp, #72] @@ -19378,7 +19378,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9620 .LVL1124: 9621 00e8 0146 mov r1, r0 4783:Middlewares/Third_Party/FatFs/src/ff.c **** if (!dw) { - ARM GAS /tmp/ccQCFK4e.s page 324 + ARM GAS /tmp/ccOwl4Y6.s page 324 9622 .loc 1 4783 13 discriminator 1 view .LVU3247 @@ -19438,7 +19438,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9662 .LVL1131: 4791:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1; 9663 .loc 1 4791 10 is_stmt 0 view .LVU3262 - ARM GAS /tmp/ccQCFK4e.s page 325 + ARM GAS /tmp/ccOwl4Y6.s page 325 9664 0116 FFF7FEFF bl st_clust @@ -19498,7 +19498,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9705 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} 9706 .LCFI110: 9707 .cfi_def_cfa_offset 36 - ARM GAS /tmp/ccQCFK4e.s page 326 + ARM GAS /tmp/ccOwl4Y6.s page 326 9708 .cfi_offset 4, -36 @@ -19558,7 +19558,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9745 .loc 1 5328 5 is_stmt 0 view .LVU3284 9746 0014 0028 cmp r0, #0 5328:Middlewares/Third_Party/FatFs/src/ff.c **** if (FatFs[vol]) FatFs[vol]->fs_type = 0; /* Clear the volume */ - ARM GAS /tmp/ccQCFK4e.s page 327 + ARM GAS /tmp/ccOwl4Y6.s page 327 9747 .loc 1 5328 5 view .LVU3285 @@ -19618,7 +19618,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9784 0042 2046 mov r0, r4 9785 .LVL1141: 5337:Middlewares/Third_Party/FatFs/src/ff.c **** #if _MAX_SS != _MIN_SS /* Get sector size of the medium if variable sector size cfg. */ - ARM GAS /tmp/ccQCFK4e.s page 328 + ARM GAS /tmp/ccOwl4Y6.s page 328 9786 .loc 1 5337 6 view .LVU3303 @@ -19678,7 +19678,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9826 007e 00F2D082 bhi .L742 5340:Middlewares/Third_Party/FatFs/src/ff.c **** #else 9827 .loc 1 5340 48 discriminator 2 view .LVU3318 - ARM GAS /tmp/ccQCFK4e.s page 329 + ARM GAS /tmp/ccOwl4Y6.s page 329 9828 0082 5A1E subs r2, r3, #1 @@ -19738,7 +19738,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9866 00b6 00F0BE82 beq .L747 5354:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get partition information from partition table in the MBR */ 9867 .loc 1 5354 2 is_stmt 1 view .LVU3335 - ARM GAS /tmp/ccQCFK4e.s page 330 + ARM GAS /tmp/ccOwl4Y6.s page 330 5364:Middlewares/Third_Party/FatFs/src/ff.c **** b_vol = (opt & FM_SFD) ? 0 : 63; /* Volume start sector */ @@ -19798,7 +19798,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9905 00ea 802D cmp r5, #128 9906 00ec 00F2B882 bhi .L752 5379:Middlewares/Third_Party/FatFs/src/ff.c **** if ((opt & FM_ANY) == FM_FAT32 || !(opt & FM_FAT)) { /* FAT32 only or no-FAT? */ - ARM GAS /tmp/ccQCFK4e.s page 331 + ARM GAS /tmp/ccOwl4Y6.s page 331 9907 .loc 1 5379 3 is_stmt 1 view .LVU3353 @@ -19858,7 +19858,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9950 0136 1D46 mov r5, r3 9951 .LVL1152: 5604:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 332 + ARM GAS /tmp/ccOwl4Y6.s page 332 9952 .loc 1 5604 10 view .LVU3365 @@ -19918,7 +19918,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 9990 015a 0444 add r4, r4, r0 5564:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* FAT12/16 volume */ 9991 .loc 1 5564 8 view .LVU3382 - ARM GAS /tmp/ccQCFK4e.s page 333 + ARM GAS /tmp/ccOwl4Y6.s page 333 9992 015c 5248 ldr r0, .L793+8 @@ -19978,7 +19978,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10031 0186 DDD0 beq .L706 5558:Middlewares/Third_Party/FatFs/src/ff.c **** } 10032 .loc 1 5558 36 discriminator 3 view .LVU3398 - ARM GAS /tmp/ccQCFK4e.s page 334 + ARM GAS /tmp/ccOwl4Y6.s page 334 10033 0188 A342 cmp r3, r4 @@ -20038,7 +20038,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10072 .loc 1 5575 6 view .LVU3413 5575:Middlewares/Third_Party/FatFs/src/ff.c **** } 10073 .loc 1 5575 18 is_stmt 0 view .LVU3414 - ARM GAS /tmp/ccQCFK4e.s page 335 + ARM GAS /tmp/ccOwl4Y6.s page 335 10074 01ac 03EB4303 add r3, r3, r3, lsl #1 @@ -20098,7 +20098,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10113 .LVL1178: 5597:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; 10114 .loc 1 5597 14 discriminator 1 view .LVU3430 - ARM GAS /tmp/ccQCFK4e.s page 336 + ARM GAS /tmp/ccOwl4Y6.s page 336 10115 01d4 B8F1010F cmp r8, #1 @@ -20158,7 +20158,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10153 01fe A846 mov r8, r5 10154 .LVL1183: 10155 .L710: - ARM GAS /tmp/ccQCFK4e.s page 337 + ARM GAS /tmp/ccOwl4Y6.s page 337 5570:Middlewares/Third_Party/FatFs/src/ff.c **** if (n_clst > MAX_FAT12) { @@ -20218,7 +20218,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5581:Middlewares/Third_Party/FatFs/src/ff.c **** b_data = b_fat + sz_fat * n_fats + sz_dir; /* Data base */ 10194 .loc 1 5581 10 is_stmt 0 view .LVU3463 10195 0228 0EEB0B09 add r9, lr, fp - ARM GAS /tmp/ccQCFK4e.s page 338 + ARM GAS /tmp/ccOwl4Y6.s page 338 10196 .LVL1191: @@ -20278,7 +20278,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10233 0250 C0F00C82 bcc .L759 5594:Middlewares/Third_Party/FatFs/src/ff.c **** if (fmt == FS_FAT32) { 10234 .loc 1 5594 4 is_stmt 1 view .LVU3481 - ARM GAS /tmp/ccQCFK4e.s page 339 + ARM GAS /tmp/ccOwl4Y6.s page 339 5594:Middlewares/Third_Party/FatFs/src/ff.c **** if (fmt == FS_FAT32) { @@ -20338,7 +20338,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5609:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; 10273 .loc 1 5609 6 is_stmt 1 view .LVU3498 5609:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED; - ARM GAS /tmp/ccQCFK4e.s page 340 + ARM GAS /tmp/ccOwl4Y6.s page 340 10274 .loc 1 5609 9 is_stmt 0 view .LVU3499 @@ -20398,7 +20398,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10318 02c8 40F6F572 movw r2, #4085 10319 02cc BAF1010F cmp r10, #1 10320 02d0 14BF ite ne - ARM GAS /tmp/ccQCFK4e.s page 341 + ARM GAS /tmp/ccOwl4Y6.s page 341 10321 02d2 0023 movne r3, #0 @@ -20458,7 +20458,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10363 0314 3374 strb r3, [r6, #16] 5634:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol < 0x10000) { 10364 .loc 1 5634 3 is_stmt 1 view .LVU3522 - ARM GAS /tmp/ccQCFK4e.s page 342 + ARM GAS /tmp/ccOwl4Y6.s page 342 10365 0316 06F11100 add r0, r6, #17 @@ -20518,7 +20518,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10406 .loc 1 5644 6 is_stmt 0 view .LVU3535 10407 035e BAF1030F cmp r10, #3 10408 0362 6BD0 beq .L787 - ARM GAS /tmp/ccQCFK4e.s page 343 + ARM GAS /tmp/ccOwl4Y6.s page 343 5654:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */ @@ -20578,7 +20578,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10451 03ac FFF7FEFF bl disk_write 10452 .LVL1224: 5661:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 344 + ARM GAS /tmp/ccOwl4Y6.s page 344 10453 .loc 1 5661 6 discriminator 1 view .LVU3548 @@ -20638,7 +20638,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5697:Middlewares/Third_Party/FatFs/src/ff.c **** do { 10494 .loc 1 5697 35 view .LVU3562 10495 03e2 DDF82080 ldr r8, [sp, #32] - ARM GAS /tmp/ccQCFK4e.s page 345 + ARM GAS /tmp/ccOwl4Y6.s page 345 10496 03e6 0197 str r7, [sp, #4] @@ -20698,7 +20698,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10535 .loc 1 5709 3 view .LVU3577 5709:Middlewares/Third_Party/FatFs/src/ff.c **** sys = 0x0C; /* FAT32X */ 10536 .loc 1 5709 6 is_stmt 0 view .LVU3578 - ARM GAS /tmp/ccQCFK4e.s page 346 + ARM GAS /tmp/ccOwl4Y6.s page 346 10537 040e BAF1030F cmp r10, #3 @@ -20758,7 +20758,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5647:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FSInfo32, 1); /* Offset of FSINFO sector (VBR + 1) */ 10579 .loc 1 5647 4 view .LVU3591 10580 0454 0221 movs r1, #2 - ARM GAS /tmp/ccQCFK4e.s page 347 + ARM GAS /tmp/ccOwl4Y6.s page 347 10581 0456 06F12C00 add r0, r6, #44 @@ -20818,7 +20818,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10625 04a6 6A49 ldr r1, .L795+12 10626 04a8 3046 mov r0, r6 10627 04aa FFF7FEFF bl st_dword - ARM GAS /tmp/ccQCFK4e.s page 348 + ARM GAS /tmp/ccOwl4Y6.s page 348 10628 .LVL1251: @@ -20878,7 +20878,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5685:Middlewares/Third_Party/FatFs/src/ff.c **** } 10673 .loc 1 5685 5 is_stmt 0 discriminator 2 view .LVU3611 10674 0500 6FF00701 mvn r1, #7 - ARM GAS /tmp/ccQCFK4e.s page 349 + ARM GAS /tmp/ccOwl4Y6.s page 349 10675 .L731: @@ -20938,7 +20938,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10716 .loc 1 5693 13 view .LVU3624 10717 053a B8EB0A08 subs r8, r8, r10 10718 .LVL1265: - ARM GAS /tmp/ccQCFK4e.s page 350 + ARM GAS /tmp/ccOwl4Y6.s page 350 5693:Middlewares/Third_Party/FatFs/src/ff.c **** } @@ -20998,7 +20998,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10763 0578 4FF00408 mov r8, #4 10764 .LVL1275: 5715:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 351 + ARM GAS /tmp/ccOwl4Y6.s page 351 10765 .loc 1 5715 9 discriminator 1 view .LVU3635 @@ -21058,7 +21058,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5734:Middlewares/Third_Party/FatFs/src/ff.c **** pte[PTE_System] = sys; /* System type */ 10804 .loc 1 5734 19 is_stmt 0 view .LVU3651 10805 05ac 86F8C151 strb r5, [r6, #449] - ARM GAS /tmp/ccQCFK4e.s page 352 + ARM GAS /tmp/ccOwl4Y6.s page 352 5735:Middlewares/Third_Party/FatFs/src/ff.c **** n = (b_vol + sz_vol) / (63 * 255); /* (End CHS may be invalid) */ @@ -21118,7 +21118,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10843 05e8 3B46 mov r3, r7 10844 05ea 2A46 mov r2, r5 10845 05ec 3146 mov r1, r6 - ARM GAS /tmp/ccQCFK4e.s page 353 + ARM GAS /tmp/ccOwl4Y6.s page 353 10846 05ee 2046 mov r0, r4 @@ -21178,7 +21178,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 5336:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_ioctl(pdrv, GET_BLOCK_SIZE, &sz_blk) != RES_OK || !sz_blk || sz_blk > 32768 || (sz_blk & 10889 .loc 1 5336 33 discriminator 1 view .LVU3680 10890 0616 0A20 movs r0, #10 - ARM GAS /tmp/ccQCFK4e.s page 354 + ARM GAS /tmp/ccOwl4Y6.s page 354 10891 .LVL1294: @@ -21238,7 +21238,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10937 .loc 1 5366 30 discriminator 1 view .LVU3688 10938 063e 0E20 movs r0, #14 10939 0640 EAE7 b .L696 - ARM GAS /tmp/ccQCFK4e.s page 355 + ARM GAS /tmp/ccOwl4Y6.s page 355 10940 .L796: @@ -21298,7 +21298,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 10985 .LVL1305: 10986 .L764: 5614:Middlewares/Third_Party/FatFs/src/ff.c **** } - ARM GAS /tmp/ccQCFK4e.s page 356 + ARM GAS /tmp/ccOwl4Y6.s page 356 10987 .loc 1 5614 13 view .LVU3698 @@ -21358,7 +21358,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11035 @ frame_needed = 0, uses_anonymous_args = 0 5835:Middlewares/Third_Party/FatFs/src/ff.c **** int n = 0; 11036 .loc 1 5835 1 is_stmt 0 view .LVU3707 - ARM GAS /tmp/ccQCFK4e.s page 357 + ARM GAS /tmp/ccOwl4Y6.s page 357 11037 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} @@ -21418,7 +21418,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11078 0018 AB42 cmp r3, r5 11079 001a 13DD ble .L799 5887:Middlewares/Third_Party/FatFs/src/ff.c **** if (rc != 1) break; - ARM GAS /tmp/ccQCFK4e.s page 358 + ARM GAS /tmp/ccOwl4Y6.s page 358 11080 .loc 1 5887 3 is_stmt 1 view .LVU3721 @@ -21478,7 +21478,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11119 .L799: 5896:Middlewares/Third_Party/FatFs/src/ff.c **** return n ? buff : 0; /* When no data read (eof or error), return with error. */ 11120 .loc 1 5896 2 is_stmt 1 view .LVU3737 - ARM GAS /tmp/ccQCFK4e.s page 359 + ARM GAS /tmp/ccOwl4Y6.s page 359 5896:Middlewares/Third_Party/FatFs/src/ff.c **** return n ? buff : 0; /* When no data read (eof or error), return with error. */ @@ -21538,7 +21538,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11162 .loc 1 6002 1 is_stmt 0 view .LVU3746 11163 0000 10B5 push {r4, lr} 11164 .LCFI118: - ARM GAS /tmp/ccQCFK4e.s page 360 + ARM GAS /tmp/ccOwl4Y6.s page 360 11165 .cfi_def_cfa_offset 8 @@ -21598,7 +21598,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6015:Middlewares/Third_Party/FatFs/src/ff.c **** /* Put a string to the file */ 6016:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/ 6017:Middlewares/Third_Party/FatFs/src/ff.c **** - ARM GAS /tmp/ccQCFK4e.s page 361 + ARM GAS /tmp/ccOwl4Y6.s page 361 6018:Middlewares/Third_Party/FatFs/src/ff.c **** int f_puts ( @@ -21658,7 +21658,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6029:Middlewares/Third_Party/FatFs/src/ff.c **** } 11252 .loc 1 6029 1 view .LVU3768 11253 0022 14B0 add sp, sp, #80 - ARM GAS /tmp/ccQCFK4e.s page 362 + ARM GAS /tmp/ccOwl4Y6.s page 362 11254 .LCFI123: @@ -21718,7 +21718,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11296 .cfi_def_cfa_offset 160 11297 0008 0146 mov r1, r0 11298 000a 25AC add r4, sp, #148 - ARM GAS /tmp/ccQCFK4e.s page 363 + ARM GAS /tmp/ccOwl4Y6.s page 363 11299 000c 54F8045B ldr r5, [r4], #4 @@ -21778,7 +21778,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6061:Middlewares/Third_Party/FatFs/src/ff.c **** continue; 11336 .loc 1 6061 4 view .LVU3790 6057:Middlewares/Third_Party/FatFs/src/ff.c **** if (c == 0) break; /* End of string */ - ARM GAS /tmp/ccQCFK4e.s page 364 + ARM GAS /tmp/ccOwl4Y6.s page 364 11337 .loc 1 6057 11 is_stmt 0 view .LVU3791 @@ -21838,7 +21838,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11377 .LVL1349: 6066:Middlewares/Third_Party/FatFs/src/ff.c **** f = 1; c = *fmt++; 11378 .loc 1 6066 6 view .LVU3808 - ARM GAS /tmp/ccQCFK4e.s page 365 + ARM GAS /tmp/ccOwl4Y6.s page 365 11379 004a 0126 movs r6, #1 @@ -21898,7 +21898,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11423 0076 46F00406 orr r6, r6, #4 11424 .LVL1357: 11425 .loc 1 6077 12 is_stmt 1 view .LVU3825 - ARM GAS /tmp/ccQCFK4e.s page 366 + ARM GAS /tmp/ccOwl4Y6.s page 366 11426 .loc 1 6077 14 is_stmt 0 view .LVU3826 @@ -21958,7 +21958,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11475 00b4 5C .byte (.L824-.L826)/2 11476 00b5 5C .byte (.L824-.L826)/2 11477 00b6 5A .byte (.L825-.L826)/2 - ARM GAS /tmp/ccQCFK4e.s page 367 + ARM GAS /tmp/ccOwl4Y6.s page 367 11478 .LVL1361: @@ -22018,7 +22018,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11526 .loc 1 6087 13 is_stmt 0 discriminator 1 view .LVU3851 11527 00e6 3746 mov r7, r6 11528 .LVL1370: - ARM GAS /tmp/ccQCFK4e.s page 368 + ARM GAS /tmp/ccOwl4Y6.s page 368 11529 .L834: @@ -22078,7 +22078,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 6093:Middlewares/Third_Party/FatFs/src/ff.c **** case 'C' : /* Character */ 6094:Middlewares/Third_Party/FatFs/src/ff.c **** putc_bfd(&pb, (TCHAR)va_arg(arp, int)); continue; 11578 .loc 1 6094 4 is_stmt 1 view .LVU3866 - ARM GAS /tmp/ccQCFK4e.s page 369 + ARM GAS /tmp/ccOwl4Y6.s page 369 11579 .loc 1 6094 25 is_stmt 0 view .LVU3867 @@ -22138,7 +22138,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11613 0138 1268 ldr r2, [r2] 11614 .L842: 11615 .LVL1386: - ARM GAS /tmp/ccQCFK4e.s page 370 + ARM GAS /tmp/ccOwl4Y6.s page 370 6115:Middlewares/Third_Party/FatFs/src/ff.c **** if (d == 'D' && (v & 0x80000000)) { @@ -22198,7 +22198,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11657 .loc 1 6082 3 view .LVU3896 11658 0160 0220 movs r0, #2 11659 0162 E3E7 b .L829 - ARM GAS /tmp/ccQCFK4e.s page 371 + ARM GAS /tmp/ccOwl4Y6.s page 371 11660 .L859: @@ -22258,7 +22258,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11705 .loc 1 6124 14 is_stmt 1 view .LVU3908 11706 .loc 1 6124 19 is_stmt 0 view .LVU3909 11707 0196 1F2F cmp r7, #31 - ARM GAS /tmp/ccQCFK4e.s page 372 + ARM GAS /tmp/ccOwl4Y6.s page 372 11708 0198 8CBF ite hi @@ -22318,7 +22318,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11749 .loc 1 6125 6 is_stmt 0 view .LVU3925 11750 01c2 16F0080F tst r6, #8 11751 01c6 08D0 beq .L849 - ARM GAS /tmp/ccQCFK4e.s page 373 + ARM GAS /tmp/ccOwl4Y6.s page 373 11752 .loc 1 6125 14 is_stmt 1 discriminator 1 view .LVU3926 @@ -22378,7 +22378,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11802 .loc 1 6127 23 discriminator 2 view .LVU3942 11803 0206 C846 mov r8, r9 11804 .LVL1412: - ARM GAS /tmp/ccQCFK4e.s page 374 + ARM GAS /tmp/ccOwl4Y6.s page 374 11805 .L854: @@ -22438,7 +22438,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11849 @ sp needed 11850 023c BDE8F047 pop {r4, r5, r6, r7, r8, r9, r10, lr} 11851 .LCFI128: - ARM GAS /tmp/ccQCFK4e.s page 375 + ARM GAS /tmp/ccOwl4Y6.s page 375 11852 .cfi_restore 14 @@ -22498,7 +22498,7 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11903 0040 C0C1C2C3 .ascii "\300\301\302\303\304\305AA\310\311\312\313\314\315\316" 11903 C4C54141 11903 C8C9CACB - ARM GAS /tmp/ccQCFK4e.s page 376 + ARM GAS /tmp/ccOwl4Y6.s page 376 11903 CCCDCE @@ -22542,173 +22542,173 @@ ARM GAS /tmp/ccQCFK4e.s page 1 11933 .file 8 "Middlewares/Third_Party/FatFs/src/diskio.h" 11934 .file 9 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdarg.h" 11935 .file 10 "" - ARM GAS /tmp/ccQCFK4e.s page 377 + ARM GAS /tmp/ccOwl4Y6.s page 377 DEFINED SYMBOLS *ABS*:00000000 ff.c - /tmp/ccQCFK4e.s:20 .text.ld_word:00000000 $t - /tmp/ccQCFK4e.s:25 .text.ld_word:00000000 ld_word - /tmp/ccQCFK4e.s:52 .text.ld_dword:00000000 $t - /tmp/ccQCFK4e.s:57 .text.ld_dword:00000000 ld_dword - /tmp/ccQCFK4e.s:96 .text.st_word:00000000 $t - /tmp/ccQCFK4e.s:101 .text.st_word:00000000 st_word - /tmp/ccQCFK4e.s:125 .text.st_dword:00000000 $t - /tmp/ccQCFK4e.s:130 .text.st_dword:00000000 st_dword - /tmp/ccQCFK4e.s:169 .text.mem_cpy:00000000 $t - /tmp/ccQCFK4e.s:174 .text.mem_cpy:00000000 mem_cpy - /tmp/ccQCFK4e.s:214 .text.mem_set:00000000 $t - /tmp/ccQCFK4e.s:219 .text.mem_set:00000000 mem_set - /tmp/ccQCFK4e.s:246 .text.mem_cmp:00000000 $t - /tmp/ccQCFK4e.s:251 .text.mem_cmp:00000000 mem_cmp - /tmp/ccQCFK4e.s:294 .text.chk_chr:00000000 $t - /tmp/ccQCFK4e.s:299 .text.chk_chr:00000000 chk_chr - /tmp/ccQCFK4e.s:335 .text.chk_lock:00000000 $t - /tmp/ccQCFK4e.s:340 .text.chk_lock:00000000 chk_lock - /tmp/ccQCFK4e.s:477 .text.chk_lock:00000078 $d - /tmp/ccQCFK4e.s:11911 .bss.Files:00000000 Files - /tmp/ccQCFK4e.s:482 .text.enq_lock:00000000 $t - /tmp/ccQCFK4e.s:487 .text.enq_lock:00000000 enq_lock - /tmp/ccQCFK4e.s:531 .text.enq_lock:0000001c $d - /tmp/ccQCFK4e.s:536 .text.inc_lock:00000000 $t - /tmp/ccQCFK4e.s:541 .text.inc_lock:00000000 inc_lock - /tmp/ccQCFK4e.s:711 .text.inc_lock:0000009c $d - /tmp/ccQCFK4e.s:716 .text.dec_lock:00000000 $t - /tmp/ccQCFK4e.s:721 .text.dec_lock:00000000 dec_lock - /tmp/ccQCFK4e.s:802 .text.dec_lock:0000003c $d - /tmp/ccQCFK4e.s:807 .text.clear_lock:00000000 $t - /tmp/ccQCFK4e.s:812 .text.clear_lock:00000000 clear_lock - /tmp/ccQCFK4e.s:889 .text.clear_lock:00000038 $d - /tmp/ccQCFK4e.s:894 .text.clust2sect:00000000 $t - /tmp/ccQCFK4e.s:899 .text.clust2sect:00000000 clust2sect - /tmp/ccQCFK4e.s:939 .text.clmt_clust:00000000 $t - /tmp/ccQCFK4e.s:944 .text.clmt_clust:00000000 clmt_clust - /tmp/ccQCFK4e.s:1015 .text.ld_clust:00000000 $t - /tmp/ccQCFK4e.s:1020 .text.ld_clust:00000000 ld_clust - /tmp/ccQCFK4e.s:1076 .text.st_clust:00000000 $t - /tmp/ccQCFK4e.s:1081 .text.st_clust:00000000 st_clust - /tmp/ccQCFK4e.s:1130 .text.get_fileinfo:00000000 $t - /tmp/ccQCFK4e.s:1135 .text.get_fileinfo:00000000 get_fileinfo - /tmp/ccQCFK4e.s:1275 .rodata.create_name.str1.4:00000000 $d - /tmp/ccQCFK4e.s:1279 .text.create_name:00000000 $t - /tmp/ccQCFK4e.s:1284 .text.create_name:00000000 create_name - /tmp/ccQCFK4e.s:1516 .text.create_name:000000c8 $d - /tmp/ccQCFK4e.s:11899 .rodata.ExCvt:00000000 ExCvt - /tmp/ccQCFK4e.s:1522 .text.get_ldnumber:00000000 $t - /tmp/ccQCFK4e.s:1527 .text.get_ldnumber:00000000 get_ldnumber - /tmp/ccQCFK4e.s:1628 .text.putc_init:00000000 $t - /tmp/ccQCFK4e.s:1633 .text.putc_init:00000000 putc_init - /tmp/ccQCFK4e.s:1656 .text.validate:00000000 $t - /tmp/ccQCFK4e.s:1661 .text.validate:00000000 validate - /tmp/ccQCFK4e.s:1770 .text.sync_window:00000000 $t - /tmp/ccQCFK4e.s:1775 .text.sync_window:00000000 sync_window - ARM GAS /tmp/ccQCFK4e.s page 378 + /tmp/ccOwl4Y6.s:20 .text.ld_word:00000000 $t + /tmp/ccOwl4Y6.s:25 .text.ld_word:00000000 ld_word + /tmp/ccOwl4Y6.s:52 .text.ld_dword:00000000 $t + /tmp/ccOwl4Y6.s:57 .text.ld_dword:00000000 ld_dword + /tmp/ccOwl4Y6.s:96 .text.st_word:00000000 $t + /tmp/ccOwl4Y6.s:101 .text.st_word:00000000 st_word + /tmp/ccOwl4Y6.s:125 .text.st_dword:00000000 $t + /tmp/ccOwl4Y6.s:130 .text.st_dword:00000000 st_dword + /tmp/ccOwl4Y6.s:169 .text.mem_cpy:00000000 $t + /tmp/ccOwl4Y6.s:174 .text.mem_cpy:00000000 mem_cpy + /tmp/ccOwl4Y6.s:214 .text.mem_set:00000000 $t + /tmp/ccOwl4Y6.s:219 .text.mem_set:00000000 mem_set + /tmp/ccOwl4Y6.s:246 .text.mem_cmp:00000000 $t + /tmp/ccOwl4Y6.s:251 .text.mem_cmp:00000000 mem_cmp + /tmp/ccOwl4Y6.s:294 .text.chk_chr:00000000 $t + /tmp/ccOwl4Y6.s:299 .text.chk_chr:00000000 chk_chr + /tmp/ccOwl4Y6.s:335 .text.chk_lock:00000000 $t + /tmp/ccOwl4Y6.s:340 .text.chk_lock:00000000 chk_lock + /tmp/ccOwl4Y6.s:477 .text.chk_lock:00000078 $d + /tmp/ccOwl4Y6.s:11911 .bss.Files:00000000 Files + /tmp/ccOwl4Y6.s:482 .text.enq_lock:00000000 $t + /tmp/ccOwl4Y6.s:487 .text.enq_lock:00000000 enq_lock + /tmp/ccOwl4Y6.s:531 .text.enq_lock:0000001c $d + /tmp/ccOwl4Y6.s:536 .text.inc_lock:00000000 $t + /tmp/ccOwl4Y6.s:541 .text.inc_lock:00000000 inc_lock + /tmp/ccOwl4Y6.s:711 .text.inc_lock:0000009c $d + /tmp/ccOwl4Y6.s:716 .text.dec_lock:00000000 $t + /tmp/ccOwl4Y6.s:721 .text.dec_lock:00000000 dec_lock + /tmp/ccOwl4Y6.s:802 .text.dec_lock:0000003c $d + /tmp/ccOwl4Y6.s:807 .text.clear_lock:00000000 $t + /tmp/ccOwl4Y6.s:812 .text.clear_lock:00000000 clear_lock + /tmp/ccOwl4Y6.s:889 .text.clear_lock:00000038 $d + /tmp/ccOwl4Y6.s:894 .text.clust2sect:00000000 $t + /tmp/ccOwl4Y6.s:899 .text.clust2sect:00000000 clust2sect + /tmp/ccOwl4Y6.s:939 .text.clmt_clust:00000000 $t + /tmp/ccOwl4Y6.s:944 .text.clmt_clust:00000000 clmt_clust + /tmp/ccOwl4Y6.s:1015 .text.ld_clust:00000000 $t + /tmp/ccOwl4Y6.s:1020 .text.ld_clust:00000000 ld_clust + /tmp/ccOwl4Y6.s:1076 .text.st_clust:00000000 $t + /tmp/ccOwl4Y6.s:1081 .text.st_clust:00000000 st_clust + /tmp/ccOwl4Y6.s:1130 .text.get_fileinfo:00000000 $t + /tmp/ccOwl4Y6.s:1135 .text.get_fileinfo:00000000 get_fileinfo + /tmp/ccOwl4Y6.s:1275 .rodata.create_name.str1.4:00000000 $d + /tmp/ccOwl4Y6.s:1279 .text.create_name:00000000 $t + /tmp/ccOwl4Y6.s:1284 .text.create_name:00000000 create_name + /tmp/ccOwl4Y6.s:1516 .text.create_name:000000c8 $d + /tmp/ccOwl4Y6.s:11899 .rodata.ExCvt:00000000 ExCvt + /tmp/ccOwl4Y6.s:1522 .text.get_ldnumber:00000000 $t + /tmp/ccOwl4Y6.s:1527 .text.get_ldnumber:00000000 get_ldnumber + /tmp/ccOwl4Y6.s:1628 .text.putc_init:00000000 $t + /tmp/ccOwl4Y6.s:1633 .text.putc_init:00000000 putc_init + /tmp/ccOwl4Y6.s:1656 .text.validate:00000000 $t + /tmp/ccOwl4Y6.s:1661 .text.validate:00000000 validate + /tmp/ccOwl4Y6.s:1770 .text.sync_window:00000000 $t + /tmp/ccOwl4Y6.s:1775 .text.sync_window:00000000 sync_window + ARM GAS /tmp/ccOwl4Y6.s page 378 - /tmp/ccQCFK4e.s:1882 .text.move_window:00000000 $t - /tmp/ccQCFK4e.s:1887 .text.move_window:00000000 move_window - /tmp/ccQCFK4e.s:1959 .text.check_fs:00000000 $t - /tmp/ccQCFK4e.s:1964 .text.check_fs:00000000 check_fs - /tmp/ccQCFK4e.s:2060 .text.check_fs:0000006c $d - /tmp/ccQCFK4e.s:2067 .text.find_volume:00000000 $t - /tmp/ccQCFK4e.s:2072 .text.find_volume:00000000 find_volume - /tmp/ccQCFK4e.s:2746 .text.find_volume:00000314 $d - /tmp/ccQCFK4e.s:11923 .bss.FatFs:00000000 FatFs - /tmp/ccQCFK4e.s:11917 .bss.Fsid:00000000 Fsid - /tmp/ccQCFK4e.s:2753 .text.find_volume:00000324 $t - /tmp/ccQCFK4e.s:2802 .text.put_fat:00000000 $t - /tmp/ccQCFK4e.s:2807 .text.put_fat:00000000 put_fat - /tmp/ccQCFK4e.s:3085 .text.get_fat:00000000 $t - /tmp/ccQCFK4e.s:3090 .text.get_fat:00000000 get_fat - /tmp/ccQCFK4e.s:3338 .text.dir_sdi:00000000 $t - /tmp/ccQCFK4e.s:3343 .text.dir_sdi:00000000 dir_sdi - /tmp/ccQCFK4e.s:3548 .text.create_chain:00000000 $t - /tmp/ccQCFK4e.s:3553 .text.create_chain:00000000 create_chain - /tmp/ccQCFK4e.s:3789 .text.remove_chain:00000000 $t - /tmp/ccQCFK4e.s:3794 .text.remove_chain:00000000 remove_chain - /tmp/ccQCFK4e.s:3955 .text.dir_remove:00000000 $t - /tmp/ccQCFK4e.s:3960 .text.dir_remove:00000000 dir_remove - /tmp/ccQCFK4e.s:4011 .text.dir_next:00000000 $t - /tmp/ccQCFK4e.s:4016 .text.dir_next:00000000 dir_next - /tmp/ccQCFK4e.s:4326 .text.dir_find:00000000 $t - /tmp/ccQCFK4e.s:4331 .text.dir_find:00000000 dir_find - /tmp/ccQCFK4e.s:4439 .text.follow_path:00000000 $t - /tmp/ccQCFK4e.s:4444 .text.follow_path:00000000 follow_path - /tmp/ccQCFK4e.s:4612 .text.dir_alloc:00000000 $t - /tmp/ccQCFK4e.s:4617 .text.dir_alloc:00000000 dir_alloc - /tmp/ccQCFK4e.s:4728 .text.dir_register:00000000 $t - /tmp/ccQCFK4e.s:4733 .text.dir_register:00000000 dir_register - /tmp/ccQCFK4e.s:4807 .text.dir_read:00000000 $t - /tmp/ccQCFK4e.s:4812 .text.dir_read:00000000 dir_read - /tmp/ccQCFK4e.s:4934 .text.sync_fs:00000000 $t - /tmp/ccQCFK4e.s:4939 .text.sync_fs:00000000 sync_fs - /tmp/ccQCFK4e.s:5053 .text.sync_fs:00000080 $d - /tmp/ccQCFK4e.s:5059 .text.f_mount:00000000 $t - /tmp/ccQCFK4e.s:5065 .text.f_mount:00000000 f_mount - /tmp/ccQCFK4e.s:5181 .text.f_mount:0000005c $d - /tmp/ccQCFK4e.s:5186 .text.f_open:00000000 $t - /tmp/ccQCFK4e.s:5192 .text.f_open:00000000 f_open - /tmp/ccQCFK4e.s:5748 .text.f_read:00000000 $t - /tmp/ccQCFK4e.s:5754 .text.f_read:00000000 f_read - /tmp/ccQCFK4e.s:6186 .text.f_write:00000000 $t - /tmp/ccQCFK4e.s:6192 .text.f_write:00000000 f_write - /tmp/ccQCFK4e.s:6673 .text.putc_bfd:00000000 $t - /tmp/ccQCFK4e.s:6678 .text.putc_bfd:00000000 putc_bfd - /tmp/ccQCFK4e.s:6790 .text.putc_flush:00000000 $t - /tmp/ccQCFK4e.s:6795 .text.putc_flush:00000000 putc_flush - /tmp/ccQCFK4e.s:6874 .text.f_sync:00000000 $t - /tmp/ccQCFK4e.s:6880 .text.f_sync:00000000 f_sync - /tmp/ccQCFK4e.s:7031 .text.f_close:00000000 $t - /tmp/ccQCFK4e.s:7037 .text.f_close:00000000 f_close - /tmp/ccQCFK4e.s:7106 .text.f_lseek:00000000 $t - /tmp/ccQCFK4e.s:7112 .text.f_lseek:00000000 f_lseek - ARM GAS /tmp/ccQCFK4e.s page 379 + /tmp/ccOwl4Y6.s:1882 .text.move_window:00000000 $t + /tmp/ccOwl4Y6.s:1887 .text.move_window:00000000 move_window + /tmp/ccOwl4Y6.s:1959 .text.check_fs:00000000 $t + /tmp/ccOwl4Y6.s:1964 .text.check_fs:00000000 check_fs + /tmp/ccOwl4Y6.s:2060 .text.check_fs:0000006c $d + /tmp/ccOwl4Y6.s:2067 .text.find_volume:00000000 $t + /tmp/ccOwl4Y6.s:2072 .text.find_volume:00000000 find_volume + /tmp/ccOwl4Y6.s:2746 .text.find_volume:00000314 $d + /tmp/ccOwl4Y6.s:11923 .bss.FatFs:00000000 FatFs + /tmp/ccOwl4Y6.s:11917 .bss.Fsid:00000000 Fsid + /tmp/ccOwl4Y6.s:2753 .text.find_volume:00000324 $t + /tmp/ccOwl4Y6.s:2802 .text.put_fat:00000000 $t + /tmp/ccOwl4Y6.s:2807 .text.put_fat:00000000 put_fat + /tmp/ccOwl4Y6.s:3085 .text.get_fat:00000000 $t + /tmp/ccOwl4Y6.s:3090 .text.get_fat:00000000 get_fat + /tmp/ccOwl4Y6.s:3338 .text.dir_sdi:00000000 $t + /tmp/ccOwl4Y6.s:3343 .text.dir_sdi:00000000 dir_sdi + /tmp/ccOwl4Y6.s:3548 .text.create_chain:00000000 $t + /tmp/ccOwl4Y6.s:3553 .text.create_chain:00000000 create_chain + /tmp/ccOwl4Y6.s:3789 .text.remove_chain:00000000 $t + /tmp/ccOwl4Y6.s:3794 .text.remove_chain:00000000 remove_chain + /tmp/ccOwl4Y6.s:3955 .text.dir_remove:00000000 $t + /tmp/ccOwl4Y6.s:3960 .text.dir_remove:00000000 dir_remove + /tmp/ccOwl4Y6.s:4011 .text.dir_next:00000000 $t + /tmp/ccOwl4Y6.s:4016 .text.dir_next:00000000 dir_next + /tmp/ccOwl4Y6.s:4326 .text.dir_find:00000000 $t + /tmp/ccOwl4Y6.s:4331 .text.dir_find:00000000 dir_find + /tmp/ccOwl4Y6.s:4439 .text.follow_path:00000000 $t + /tmp/ccOwl4Y6.s:4444 .text.follow_path:00000000 follow_path + /tmp/ccOwl4Y6.s:4612 .text.dir_alloc:00000000 $t + /tmp/ccOwl4Y6.s:4617 .text.dir_alloc:00000000 dir_alloc + /tmp/ccOwl4Y6.s:4728 .text.dir_register:00000000 $t + /tmp/ccOwl4Y6.s:4733 .text.dir_register:00000000 dir_register + /tmp/ccOwl4Y6.s:4807 .text.dir_read:00000000 $t + /tmp/ccOwl4Y6.s:4812 .text.dir_read:00000000 dir_read + /tmp/ccOwl4Y6.s:4934 .text.sync_fs:00000000 $t + /tmp/ccOwl4Y6.s:4939 .text.sync_fs:00000000 sync_fs + /tmp/ccOwl4Y6.s:5053 .text.sync_fs:00000080 $d + /tmp/ccOwl4Y6.s:5059 .text.f_mount:00000000 $t + /tmp/ccOwl4Y6.s:5065 .text.f_mount:00000000 f_mount + /tmp/ccOwl4Y6.s:5181 .text.f_mount:0000005c $d + /tmp/ccOwl4Y6.s:5186 .text.f_open:00000000 $t + /tmp/ccOwl4Y6.s:5192 .text.f_open:00000000 f_open + /tmp/ccOwl4Y6.s:5748 .text.f_read:00000000 $t + /tmp/ccOwl4Y6.s:5754 .text.f_read:00000000 f_read + /tmp/ccOwl4Y6.s:6186 .text.f_write:00000000 $t + /tmp/ccOwl4Y6.s:6192 .text.f_write:00000000 f_write + /tmp/ccOwl4Y6.s:6673 .text.putc_bfd:00000000 $t + /tmp/ccOwl4Y6.s:6678 .text.putc_bfd:00000000 putc_bfd + /tmp/ccOwl4Y6.s:6790 .text.putc_flush:00000000 $t + /tmp/ccOwl4Y6.s:6795 .text.putc_flush:00000000 putc_flush + /tmp/ccOwl4Y6.s:6874 .text.f_sync:00000000 $t + /tmp/ccOwl4Y6.s:6880 .text.f_sync:00000000 f_sync + /tmp/ccOwl4Y6.s:7031 .text.f_close:00000000 $t + /tmp/ccOwl4Y6.s:7037 .text.f_close:00000000 f_close + /tmp/ccOwl4Y6.s:7106 .text.f_lseek:00000000 $t + /tmp/ccOwl4Y6.s:7112 .text.f_lseek:00000000 f_lseek + ARM GAS /tmp/ccOwl4Y6.s page 379 - /tmp/ccQCFK4e.s:7838 .text.f_opendir:00000000 $t - /tmp/ccQCFK4e.s:7844 .text.f_opendir:00000000 f_opendir - /tmp/ccQCFK4e.s:8024 .text.f_closedir:00000000 $t - /tmp/ccQCFK4e.s:8030 .text.f_closedir:00000000 f_closedir - /tmp/ccQCFK4e.s:8096 .text.f_readdir:00000000 $t - /tmp/ccQCFK4e.s:8102 .text.f_readdir:00000000 f_readdir - /tmp/ccQCFK4e.s:8207 .text.f_stat:00000000 $t - /tmp/ccQCFK4e.s:8213 .text.f_stat:00000000 f_stat - /tmp/ccQCFK4e.s:8306 .text.f_getfree:00000000 $t - /tmp/ccQCFK4e.s:8312 .text.f_getfree:00000000 f_getfree - /tmp/ccQCFK4e.s:8597 .text.f_truncate:00000000 $t - /tmp/ccQCFK4e.s:8603 .text.f_truncate:00000000 f_truncate - /tmp/ccQCFK4e.s:8787 .text.f_unlink:00000000 $t - /tmp/ccQCFK4e.s:8793 .text.f_unlink:00000000 f_unlink - /tmp/ccQCFK4e.s:9015 .text.f_mkdir:00000000 $t - /tmp/ccQCFK4e.s:9021 .text.f_mkdir:00000000 f_mkdir - /tmp/ccQCFK4e.s:9388 .text.f_rename:00000000 $t - /tmp/ccQCFK4e.s:9394 .text.f_rename:00000000 f_rename - /tmp/ccQCFK4e.s:9681 .rodata.f_mkfs.str1.4:00000000 $d - /tmp/ccQCFK4e.s:9691 .text.f_mkfs:00000000 $t - /tmp/ccQCFK4e.s:9697 .text.f_mkfs:00000000 f_mkfs - /tmp/ccQCFK4e.s:10298 .text.f_mkfs:000002a0 $d - /tmp/ccQCFK4e.s:11887 .rodata.cst32.1:00000000 cst32.1 - /tmp/ccQCFK4e.s:11875 .rodata.cst.0:00000000 cst.0 - /tmp/ccQCFK4e.s:10306 .text.f_mkfs:000002b4 $t - /tmp/ccQCFK4e.s:10943 .text.f_mkfs:00000644 $d - /tmp/ccQCFK4e.s:10951 .text.f_mkfs:0000065c $t - /tmp/ccQCFK4e.s:11023 .text.f_gets:00000000 $t - /tmp/ccQCFK4e.s:11029 .text.f_gets:00000000 f_gets - /tmp/ccQCFK4e.s:11149 .text.f_putc:00000000 $t - /tmp/ccQCFK4e.s:11155 .text.f_putc:00000000 f_putc - /tmp/ccQCFK4e.s:11200 .text.f_puts:00000000 $t - /tmp/ccQCFK4e.s:11206 .text.f_puts:00000000 f_puts - /tmp/ccQCFK4e.s:11263 .text.f_printf:00000000 $t - /tmp/ccQCFK4e.s:11269 .text.f_printf:00000000 f_printf - /tmp/ccQCFK4e.s:11455 .text.f_printf:000000a0 $d - /tmp/ccQCFK4e.s:11872 .rodata.cst.0:00000000 $d - /tmp/ccQCFK4e.s:11884 .rodata.cst32.1:00000000 $d - /tmp/ccQCFK4e.s:11896 .rodata.ExCvt:00000000 $d - /tmp/ccQCFK4e.s:11908 .bss.Files:00000000 $d - /tmp/ccQCFK4e.s:11914 .bss.Fsid:00000000 $d - /tmp/ccQCFK4e.s:11920 .bss.FatFs:00000000 $d - /tmp/ccQCFK4e.s:11479 .text.f_printf:000000b7 $d - /tmp/ccQCFK4e.s:11479 .text.f_printf:000000b8 $t + /tmp/ccOwl4Y6.s:7838 .text.f_opendir:00000000 $t + /tmp/ccOwl4Y6.s:7844 .text.f_opendir:00000000 f_opendir + /tmp/ccOwl4Y6.s:8024 .text.f_closedir:00000000 $t + /tmp/ccOwl4Y6.s:8030 .text.f_closedir:00000000 f_closedir + /tmp/ccOwl4Y6.s:8096 .text.f_readdir:00000000 $t + /tmp/ccOwl4Y6.s:8102 .text.f_readdir:00000000 f_readdir + /tmp/ccOwl4Y6.s:8207 .text.f_stat:00000000 $t + /tmp/ccOwl4Y6.s:8213 .text.f_stat:00000000 f_stat + /tmp/ccOwl4Y6.s:8306 .text.f_getfree:00000000 $t + /tmp/ccOwl4Y6.s:8312 .text.f_getfree:00000000 f_getfree + /tmp/ccOwl4Y6.s:8597 .text.f_truncate:00000000 $t + /tmp/ccOwl4Y6.s:8603 .text.f_truncate:00000000 f_truncate + /tmp/ccOwl4Y6.s:8787 .text.f_unlink:00000000 $t + /tmp/ccOwl4Y6.s:8793 .text.f_unlink:00000000 f_unlink + /tmp/ccOwl4Y6.s:9015 .text.f_mkdir:00000000 $t + /tmp/ccOwl4Y6.s:9021 .text.f_mkdir:00000000 f_mkdir + /tmp/ccOwl4Y6.s:9388 .text.f_rename:00000000 $t + /tmp/ccOwl4Y6.s:9394 .text.f_rename:00000000 f_rename + /tmp/ccOwl4Y6.s:9681 .rodata.f_mkfs.str1.4:00000000 $d + /tmp/ccOwl4Y6.s:9691 .text.f_mkfs:00000000 $t + /tmp/ccOwl4Y6.s:9697 .text.f_mkfs:00000000 f_mkfs + /tmp/ccOwl4Y6.s:10298 .text.f_mkfs:000002a0 $d + /tmp/ccOwl4Y6.s:11887 .rodata.cst32.1:00000000 cst32.1 + /tmp/ccOwl4Y6.s:11875 .rodata.cst.0:00000000 cst.0 + /tmp/ccOwl4Y6.s:10306 .text.f_mkfs:000002b4 $t + /tmp/ccOwl4Y6.s:10943 .text.f_mkfs:00000644 $d + /tmp/ccOwl4Y6.s:10951 .text.f_mkfs:0000065c $t + /tmp/ccOwl4Y6.s:11023 .text.f_gets:00000000 $t + /tmp/ccOwl4Y6.s:11029 .text.f_gets:00000000 f_gets + /tmp/ccOwl4Y6.s:11149 .text.f_putc:00000000 $t + /tmp/ccOwl4Y6.s:11155 .text.f_putc:00000000 f_putc + /tmp/ccOwl4Y6.s:11200 .text.f_puts:00000000 $t + /tmp/ccOwl4Y6.s:11206 .text.f_puts:00000000 f_puts + /tmp/ccOwl4Y6.s:11263 .text.f_printf:00000000 $t + /tmp/ccOwl4Y6.s:11269 .text.f_printf:00000000 f_printf + /tmp/ccOwl4Y6.s:11455 .text.f_printf:000000a0 $d + /tmp/ccOwl4Y6.s:11872 .rodata.cst.0:00000000 $d + /tmp/ccOwl4Y6.s:11884 .rodata.cst32.1:00000000 $d + /tmp/ccOwl4Y6.s:11896 .rodata.ExCvt:00000000 $d + /tmp/ccOwl4Y6.s:11908 .bss.Files:00000000 $d + /tmp/ccOwl4Y6.s:11914 .bss.Fsid:00000000 $d + /tmp/ccOwl4Y6.s:11920 .bss.FatFs:00000000 $d + /tmp/ccOwl4Y6.s:11479 .text.f_printf:000000b7 $d + /tmp/ccOwl4Y6.s:11479 .text.f_printf:000000b8 $t UNDEFINED SYMBOLS disk_status diff --git a/build/ff_gen_drv.lst b/build/ff_gen_drv.lst index 5fd81d4..d3197d0 100644 --- a/build/ff_gen_drv.lst +++ b/build/ff_gen_drv.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccyRZSSS.s page 1 +ARM GAS /tmp/ccmSANvY.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccyRZSSS.s page 1 28:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** 29:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** /** 30:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * @brief Links a compatible diskio driver/lun id and increments the number of active - ARM GAS /tmp/ccyRZSSS.s page 2 + ARM GAS /tmp/ccmSANvY.s page 2 31:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * linked drivers. @@ -118,7 +118,7 @@ ARM GAS /tmp/ccyRZSSS.s page 1 64 .loc 1 48 5 is_stmt 1 view .LVU13 65 .loc 1 48 18 is_stmt 0 view .LVU14 66 002c 5C7A ldrb r4, [r3, #9] @ zero_extendqisi2 - ARM GAS /tmp/ccyRZSSS.s page 3 + ARM GAS /tmp/ccmSANvY.s page 3 67 .LVL2: @@ -178,7 +178,7 @@ ARM GAS /tmp/ccyRZSSS.s page 1 41:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** uint8_t DiskNum = 0; 111 .loc 1 41 11 view .LVU32 112 004c 0120 movs r0, #1 - ARM GAS /tmp/ccyRZSSS.s page 4 + ARM GAS /tmp/ccmSANvY.s page 4 113 .LVL10: @@ -238,7 +238,7 @@ ARM GAS /tmp/ccyRZSSS.s page 1 156 .global FATFS_UnLinkDriverEx 157 .syntax unified 158 .thumb - ARM GAS /tmp/ccyRZSSS.s page 5 + ARM GAS /tmp/ccmSANvY.s page 5 159 .thumb_func @@ -298,7 +298,7 @@ ARM GAS /tmp/ccyRZSSS.s page 1 195 .LVL15: 196 .loc 1 90 25 view .LVU54 197 001c 0020 movs r0, #0 - ARM GAS /tmp/ccyRZSSS.s page 6 + ARM GAS /tmp/ccmSANvY.s page 6 198 .LVL16: @@ -358,7 +358,7 @@ ARM GAS /tmp/ccyRZSSS.s page 1 242 .align 1 243 .global FATFS_UnLinkDriver 244 .syntax unified - ARM GAS /tmp/ccyRZSSS.s page 7 + ARM GAS /tmp/ccmSANvY.s page 7 245 .thumb @@ -418,7 +418,7 @@ ARM GAS /tmp/ccyRZSSS.s page 1 283 @ frame_needed = 0, uses_anonymous_args = 0 284 @ link register save eliminated. 118:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** return disk.nbr; - ARM GAS /tmp/ccyRZSSS.s page 8 + ARM GAS /tmp/ccmSANvY.s page 8 285 .loc 1 118 3 view .LVU75 @@ -450,25 +450,25 @@ ARM GAS /tmp/ccyRZSSS.s page 1 311 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 312 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 313 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" - ARM GAS /tmp/ccyRZSSS.s page 9 + ARM GAS /tmp/ccmSANvY.s page 9 DEFINED SYMBOLS *ABS*:00000000 ff_gen_drv.c - /tmp/ccyRZSSS.s:20 .text.FATFS_LinkDriverEx:00000000 $t - /tmp/ccyRZSSS.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx - /tmp/ccyRZSSS.s:120 .text.FATFS_LinkDriverEx:00000050 $d - /tmp/ccyRZSSS.s:303 .bss.disk:00000000 disk - /tmp/ccyRZSSS.s:125 .text.FATFS_LinkDriver:00000000 $t - /tmp/ccyRZSSS.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver - /tmp/ccyRZSSS.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t - /tmp/ccyRZSSS.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx - /tmp/ccyRZSSS.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d - /tmp/ccyRZSSS.s:242 .text.FATFS_UnLinkDriver:00000000 $t - /tmp/ccyRZSSS.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver - /tmp/ccyRZSSS.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t - /tmp/ccyRZSSS.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr - /tmp/ccyRZSSS.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d - /tmp/ccyRZSSS.s:300 .bss.disk:00000000 $d + /tmp/ccmSANvY.s:20 .text.FATFS_LinkDriverEx:00000000 $t + /tmp/ccmSANvY.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx + /tmp/ccmSANvY.s:120 .text.FATFS_LinkDriverEx:00000050 $d + /tmp/ccmSANvY.s:303 .bss.disk:00000000 disk + /tmp/ccmSANvY.s:125 .text.FATFS_LinkDriver:00000000 $t + /tmp/ccmSANvY.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver + /tmp/ccmSANvY.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t + /tmp/ccmSANvY.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx + /tmp/ccmSANvY.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d + /tmp/ccmSANvY.s:242 .text.FATFS_UnLinkDriver:00000000 $t + /tmp/ccmSANvY.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver + /tmp/ccmSANvY.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t + /tmp/ccmSANvY.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr + /tmp/ccmSANvY.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d + /tmp/ccmSANvY.s:300 .bss.disk:00000000 $d NO UNDEFINED SYMBOLS diff --git a/build/main.lst b/build/main.lst index 589df87..074a6a8 100644 --- a/build/main.lst +++ b/build/main.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccuHnxNu.s page 1 +ARM GAS /tmp/ccLSPxIe.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 28:Drivers/CMSIS/Include/core_cm7.h **** #pragma clang system_header /* treat file as system include file */ 29:Drivers/CMSIS/Include/core_cm7.h **** #endif 30:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 2 + ARM GAS /tmp/ccLSPxIe.s page 2 31:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __CORE_CM7_H_GENERIC @@ -118,7 +118,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 85:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 86:Drivers/CMSIS/Include/core_cm7.h **** #endif 87:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 3 + ARM GAS /tmp/ccLSPxIe.s page 3 88:Drivers/CMSIS/Include/core_cm7.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) @@ -178,7 +178,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 142:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 143:Drivers/CMSIS/Include/core_cm7.h **** #endif 144:Drivers/CMSIS/Include/core_cm7.h **** #else - ARM GAS /tmp/ccuHnxNu.s page 4 + ARM GAS /tmp/ccLSPxIe.s page 4 145:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U @@ -238,7 +238,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 199:Drivers/CMSIS/Include/core_cm7.h **** #warning "__ICACHE_PRESENT not defined in device header file; using default!" 200:Drivers/CMSIS/Include/core_cm7.h **** #endif 201:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 5 + ARM GAS /tmp/ccLSPxIe.s page 5 202:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __DCACHE_PRESENT @@ -298,7 +298,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 256:Drivers/CMSIS/Include/core_cm7.h **** - Core MPU Register 257:Drivers/CMSIS/Include/core_cm7.h **** - Core FPU Register 258:Drivers/CMSIS/Include/core_cm7.h **** ******************************************************************************/ - ARM GAS /tmp/ccuHnxNu.s page 6 + ARM GAS /tmp/ccLSPxIe.s page 6 259:Drivers/CMSIS/Include/core_cm7.h **** /** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 313:Drivers/CMSIS/Include/core_cm7.h **** typedef union 314:Drivers/CMSIS/Include/core_cm7.h **** { 315:Drivers/CMSIS/Include/core_cm7.h **** struct - ARM GAS /tmp/ccuHnxNu.s page 7 + ARM GAS /tmp/ccLSPxIe.s page 7 316:Drivers/CMSIS/Include/core_cm7.h **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 370:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Pos 24U /*!< xPSR 371:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR 372:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 8 + ARM GAS /tmp/ccLSPxIe.s page 8 373:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_GE_Pos 16U /*!< xPSR @@ -478,7 +478,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 427:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * 428:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED2[24U]; 429:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register - ARM GAS /tmp/ccuHnxNu.s page 9 + ARM GAS /tmp/ccLSPxIe.s page 9 430:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED3[24U]; @@ -538,7 +538,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 484:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[15U]; 485:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 486:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 - ARM GAS /tmp/ccuHnxNu.s page 10 + ARM GAS /tmp/ccLSPxIe.s page 10 487:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 541:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB 542:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB 543:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 11 + ARM GAS /tmp/ccLSPxIe.s page 11 544:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB @@ -658,7 +658,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 598:Drivers/CMSIS/Include/core_cm7.h **** 599:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Pos 16U /*!< SCB 600:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB - ARM GAS /tmp/ccuHnxNu.s page 12 + ARM GAS /tmp/ccLSPxIe.s page 12 601:Drivers/CMSIS/Include/core_cm7.h **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 655:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB 656:Drivers/CMSIS/Include/core_cm7.h **** 657:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB - ARM GAS /tmp/ccuHnxNu.s page 13 + ARM GAS /tmp/ccLSPxIe.s page 13 658:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB @@ -778,7 +778,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 712:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB 713:Drivers/CMSIS/Include/core_cm7.h **** 714:Drivers/CMSIS/Include/core_cm7.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ - ARM GAS /tmp/ccuHnxNu.s page 14 + ARM GAS /tmp/ccLSPxIe.s page 14 715:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB @@ -838,7 +838,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 769:Drivers/CMSIS/Include/core_cm7.h **** 770:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Pos 24U /*!< SCB 771:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB - ARM GAS /tmp/ccuHnxNu.s page 15 + ARM GAS /tmp/ccLSPxIe.s page 15 772:Drivers/CMSIS/Include/core_cm7.h **** @@ -898,7 +898,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 826:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Pos 5U /*!< SCB 827:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB 828:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 16 + ARM GAS /tmp/ccLSPxIe.s page 16 829:Drivers/CMSIS/Include/core_cm7.h **** /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 883:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB 884:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB 885:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 17 + ARM GAS /tmp/ccLSPxIe.s page 17 886:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_CTL_Pos 0U /*!< SCB @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 940:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: 941:Drivers/CMSIS/Include/core_cm7.h **** 942:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: - ARM GAS /tmp/ccuHnxNu.s page 18 + ARM GAS /tmp/ccLSPxIe.s page 18 943:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 997:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT 998:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT 999:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 19 + ARM GAS /tmp/ccLSPxIe.s page 19 1000:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_SysTick */ @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1054:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM 1055:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM 1056:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 20 + ARM GAS /tmp/ccLSPxIe.s page 20 1057:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1111:Drivers/CMSIS/Include/core_cm7.h **** */ 1112:Drivers/CMSIS/Include/core_cm7.h **** 1113:Drivers/CMSIS/Include/core_cm7.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 21 + ARM GAS /tmp/ccLSPxIe.s page 21 1114:Drivers/CMSIS/Include/core_cm7.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT). @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1168:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR 1169:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR 1170:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 22 + ARM GAS /tmp/ccLSPxIe.s page 22 1171:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1225:Drivers/CMSIS/Include/core_cm7.h **** /* DWT Comparator Function Register Definitions */ 1226:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN 1227:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN - ARM GAS /tmp/ccuHnxNu.s page 23 + ARM GAS /tmp/ccLSPxIe.s page 23 1228:Drivers/CMSIS/Include/core_cm7.h **** @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1282:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[1U]; 1283:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ 1284:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - ARM GAS /tmp/ccuHnxNu.s page 24 + ARM GAS /tmp/ccLSPxIe.s page 24 1285:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1339:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF 1340:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF 1341:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 25 + ARM GAS /tmp/ccLSPxIe.s page 25 1342:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1396:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV 1397:Drivers/CMSIS/Include/core_cm7.h **** 1398:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV - ARM GAS /tmp/ccuHnxNu.s page 26 + ARM GAS /tmp/ccLSPxIe.s page 26 1399:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1453:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU 1454:Drivers/CMSIS/Include/core_cm7.h **** 1455:Drivers/CMSIS/Include/core_cm7.h **** /* MPU Control Register Definitions */ - ARM GAS /tmp/ccuHnxNu.s page 27 + ARM GAS /tmp/ccLSPxIe.s page 27 1456:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1510:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_MPU */ 1511:Drivers/CMSIS/Include/core_cm7.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ 1512:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 28 + ARM GAS /tmp/ccLSPxIe.s page 28 1513:Drivers/CMSIS/Include/core_cm7.h **** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1567:Drivers/CMSIS/Include/core_cm7.h **** /* Floating-Point Default Status Control Register Definitions */ 1568:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS 1569:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS - ARM GAS /tmp/ccuHnxNu.s page 29 + ARM GAS /tmp/ccLSPxIe.s page 29 1570:Drivers/CMSIS/Include/core_cm7.h **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1624:Drivers/CMSIS/Include/core_cm7.h **** \ingroup CMSIS_core_register 1625:Drivers/CMSIS/Include/core_cm7.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) 1626:Drivers/CMSIS/Include/core_cm7.h **** \brief Type definitions for the Core Debug Registers - ARM GAS /tmp/ccuHnxNu.s page 30 + ARM GAS /tmp/ccLSPxIe.s page 30 1627:Drivers/CMSIS/Include/core_cm7.h **** @{ @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1681:Drivers/CMSIS/Include/core_cm7.h **** 1682:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core 1683:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core - ARM GAS /tmp/ccuHnxNu.s page 31 + ARM GAS /tmp/ccLSPxIe.s page 31 1684:Drivers/CMSIS/Include/core_cm7.h **** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1738:Drivers/CMSIS/Include/core_cm7.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. 1739:Drivers/CMSIS/Include/core_cm7.h **** \return Masked and shifted value. 1740:Drivers/CMSIS/Include/core_cm7.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 32 + ARM GAS /tmp/ccLSPxIe.s page 32 1741:Drivers/CMSIS/Include/core_cm7.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1795:Drivers/CMSIS/Include/core_cm7.h **** - Core NVIC Functions 1796:Drivers/CMSIS/Include/core_cm7.h **** - Core SysTick Functions 1797:Drivers/CMSIS/Include/core_cm7.h **** - Core Debug Functions - ARM GAS /tmp/ccuHnxNu.s page 33 + ARM GAS /tmp/ccLSPxIe.s page 33 1798:Drivers/CMSIS/Include/core_cm7.h **** - Core Register Access Functions @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1852:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu 1853:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu 1854:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccuHnxNu.s page 34 + ARM GAS /tmp/ccLSPxIe.s page 34 1855:Drivers/CMSIS/Include/core_cm7.h **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1909:Drivers/CMSIS/Include/core_cm7.h **** \return 0 Interrupt is not enabled. 1910:Drivers/CMSIS/Include/core_cm7.h **** \return 1 Interrupt is enabled. 1911:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccuHnxNu.s page 35 + ARM GAS /tmp/ccLSPxIe.s page 35 1912:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1966:Drivers/CMSIS/Include/core_cm7.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. 1967:Drivers/CMSIS/Include/core_cm7.h **** \param [in] IRQn Device specific interrupt number. 1968:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccuHnxNu.s page 36 + ARM GAS /tmp/ccLSPxIe.s page 36 1969:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2023:Drivers/CMSIS/Include/core_cm7.h **** */ 2024:Drivers/CMSIS/Include/core_cm7.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) 2025:Drivers/CMSIS/Include/core_cm7.h **** { - ARM GAS /tmp/ccuHnxNu.s page 37 + ARM GAS /tmp/ccLSPxIe.s page 37 2026:Drivers/CMSIS/Include/core_cm7.h **** if ((int32_t)(IRQn) >= 0) @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 36 .cfi_def_cfa_offset 4 37 .cfi_offset 14, -4 2073:Drivers/CMSIS/Include/core_cm7.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used - ARM GAS /tmp/ccuHnxNu.s page 38 + ARM GAS /tmp/ccLSPxIe.s page 38 38 .loc 2 2073 3 is_stmt 1 view .LVU2 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2078:Drivers/CMSIS/Include/core_cm7.h **** 81 .loc 2 2078 109 discriminator 2 view .LVU19 82 003a 0023 movs r3, #0 - ARM GAS /tmp/ccuHnxNu.s page 39 + ARM GAS /tmp/ccLSPxIe.s page 39 83 003c EEE7 b .L2 @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 45:Src/main.c **** #define AD9102_REG_PAT_TIMEBASE 0x0028u 46:Src/main.c **** #define AD9102_REG_PAT_PERIOD 0x0029u 47:Src/main.c **** #define AD9102_REG_DAC_PAT 0x002Bu - ARM GAS /tmp/ccuHnxNu.s page 40 + ARM GAS /tmp/ccLSPxIe.s page 40 48:Src/main.c **** #define AD9102_REG_SAW_CONFIG 0x0037u @@ -2393,1274 +2393,1371 @@ ARM GAS /tmp/ccuHnxNu.s page 1 97:Src/main.c **** #define AD9102_FLAG_TRIANGLE 0x0002u 98:Src/main.c **** #define AD9102_FLAG_SRAM 0x0004u 99:Src/main.c **** #define AD9102_FLAG_SRAM_FMT 0x0008u - 100:Src/main.c **** - 101:Src/main.c **** #define AD9833_FLAG_ENABLE 0x0001u - 102:Src/main.c **** #define AD9833_FLAG_TRIANGLE 0x0002u - 103:Src/main.c **** #define DS1809_FLAG_UC 0x0001u - 104:Src/main.c **** #define DS1809_FLAG_DC 0x0002u - ARM GAS /tmp/ccuHnxNu.s page 41 + 100:Src/main.c **** #define AD9102_WAVE_OPCODE_BEGIN 0x0001u + 101:Src/main.c **** #define AD9102_WAVE_OPCODE_COMMIT 0x0002u + 102:Src/main.c **** #define AD9102_WAVE_OPCODE_CANCEL 0x0003u + 103:Src/main.c **** #define AD9102_WAVE_MAX_CHUNK_SAMPLES 12u + 104:Src/main.c **** + ARM GAS /tmp/ccLSPxIe.s page 41 - 105:Src/main.c **** #define DS1809_PULSE_MS_DEFAULT 2u - 106:Src/main.c **** #define STM32_DAC_FLAG_ENABLE 0x0001u - 107:Src/main.c **** #define STM32_DAC_CODE_MAX 4095u - 108:Src/main.c **** /* USER CODE END PD */ - 109:Src/main.c **** - 110:Src/main.c **** /* Private macro -------------------------------------------------------------*/ - 111:Src/main.c **** /* USER CODE BEGIN PM */ - 112:Src/main.c **** - 113:Src/main.c **** /* USER CODE END PM */ - 114:Src/main.c **** - 115:Src/main.c **** /* Private variables ---------------------------------------------------------*/ - 116:Src/main.c **** ADC_HandleTypeDef hadc1; - 117:Src/main.c **** ADC_HandleTypeDef hadc3; + 105:Src/main.c **** #define AD9833_FLAG_ENABLE 0x0001u + 106:Src/main.c **** #define AD9833_FLAG_TRIANGLE 0x0002u + 107:Src/main.c **** #define DS1809_FLAG_UC 0x0001u + 108:Src/main.c **** #define DS1809_FLAG_DC 0x0002u + 109:Src/main.c **** #define DS1809_PULSE_MS_DEFAULT 2u + 110:Src/main.c **** #define STM32_DAC_FLAG_ENABLE 0x0001u + 111:Src/main.c **** #define STM32_DAC_CODE_MAX 4095u + 112:Src/main.c **** /* USER CODE END PD */ + 113:Src/main.c **** + 114:Src/main.c **** /* Private macro -------------------------------------------------------------*/ + 115:Src/main.c **** /* USER CODE BEGIN PM */ + 116:Src/main.c **** + 117:Src/main.c **** /* USER CODE END PM */ 118:Src/main.c **** - 119:Src/main.c **** SD_HandleTypeDef hsd1; - 120:Src/main.c **** - 121:Src/main.c **** TIM_HandleTypeDef htim4; - 122:Src/main.c **** TIM_HandleTypeDef htim8; - 123:Src/main.c **** TIM_HandleTypeDef htim1; - 124:Src/main.c **** TIM_HandleTypeDef htim10; - 125:Src/main.c **** TIM_HandleTypeDef htim11; - 126:Src/main.c **** - 127:Src/main.c **** UART_HandleTypeDef huart8; - 128:Src/main.c **** - 129:Src/main.c **** /* USER CODE BEGIN PV */ - 130:Src/main.c **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, - 131:Src/main.c **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_ - 132:Src/main.c **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat - 133:Src/main.c **** FRESULT fresult; // result - 134:Src/main.c **** int test; - 135:Src/main.c **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_ - 136:Src/main.c **** - 137:Src/main.c **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup; - 138:Src/main.c **** Work_SetupTypeDef Curr_setup, Def_setup; - 139:Src/main.c **** LDx_ParamTypeDef LD1_param, LD2_param; + 119:Src/main.c **** /* Private variables ---------------------------------------------------------*/ + 120:Src/main.c **** ADC_HandleTypeDef hadc1; + 121:Src/main.c **** ADC_HandleTypeDef hadc3; + 122:Src/main.c **** + 123:Src/main.c **** SD_HandleTypeDef hsd1; + 124:Src/main.c **** + 125:Src/main.c **** TIM_HandleTypeDef htim4; + 126:Src/main.c **** TIM_HandleTypeDef htim8; + 127:Src/main.c **** TIM_HandleTypeDef htim1; + 128:Src/main.c **** TIM_HandleTypeDef htim10; + 129:Src/main.c **** TIM_HandleTypeDef htim11; + 130:Src/main.c **** + 131:Src/main.c **** UART_HandleTypeDef huart8; + 132:Src/main.c **** + 133:Src/main.c **** /* USER CODE BEGIN PV */ + 134:Src/main.c **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, + 135:Src/main.c **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_ + 136:Src/main.c **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat + 137:Src/main.c **** FRESULT fresult; // result + 138:Src/main.c **** int test; + 139:Src/main.c **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_ 140:Src/main.c **** - 141:Src/main.c **** LD_Blinker_StateTypeDef LD_blinker; - 142:Src/main.c **** - 143:Src/main.c **** task_t task; + 141:Src/main.c **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup; + 142:Src/main.c **** Work_SetupTypeDef Curr_setup, Def_setup; + 143:Src/main.c **** LDx_ParamTypeDef LD1_param, LD2_param; 144:Src/main.c **** - 145:Src/main.c **** static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = { - 146:Src/main.c **** 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u, - 147:Src/main.c **** 0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu, - 148:Src/main.c **** 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u, - 149:Src/main.c **** 0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u, - 150:Src/main.c **** 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu, - 151:Src/main.c **** 0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u, - 152:Src/main.c **** 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u, - 153:Src/main.c **** 0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu, - 154:Src/main.c **** 0x001eu, 0x001du - 155:Src/main.c **** }; - 156:Src/main.c **** - 157:Src/main.c **** static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = { - 158:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, - 159:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, - 160:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u, - 161:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - ARM GAS /tmp/ccuHnxNu.s page 42 + 145:Src/main.c **** LD_Blinker_StateTypeDef LD_blinker; + 146:Src/main.c **** + 147:Src/main.c **** task_t task; + 148:Src/main.c **** + 149:Src/main.c **** static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = { + 150:Src/main.c **** 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u, + 151:Src/main.c **** 0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu, + 152:Src/main.c **** 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u, + 153:Src/main.c **** 0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u, + 154:Src/main.c **** 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu, + 155:Src/main.c **** 0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u, + 156:Src/main.c **** 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u, + 157:Src/main.c **** 0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu, + 158:Src/main.c **** 0x001eu, 0x001du + 159:Src/main.c **** }; + 160:Src/main.c **** + 161:Src/main.c **** static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = { + ARM GAS /tmp/ccLSPxIe.s page 42 - 162:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u, - 163:Src/main.c **** 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 164:Src/main.c **** 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 165:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu, - 166:Src/main.c **** 0x0001u, 0x0001u - 167:Src/main.c **** }; - 168:Src/main.c **** - 169:Src/main.c **** static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = { - 170:Src/main.c **** 0x0000u, 0x0e00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, - 171:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, - 172:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u, - 173:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 174:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u, - 175:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 176:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, - 177:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u, - 178:Src/main.c **** 0x0001u, 0x0001u - 179:Src/main.c **** }; - 180:Src/main.c **** - 181:Src/main.c **** - 182:Src/main.c **** - 183:Src/main.c **** - 184:Src/main.c **** /* USER CODE END PV */ - 185:Src/main.c **** - 186:Src/main.c **** /* Private function prototypes -----------------------------------------------*/ - 187:Src/main.c **** void SystemClock_Config(void); - 188:Src/main.c **** static void MX_GPIO_Init(void); - 189:Src/main.c **** static void MX_DMA_Init(void); - 190:Src/main.c **** static void MX_SPI4_Init(void); - 191:Src/main.c **** static void MX_TIM2_Init(void); - 192:Src/main.c **** static void MX_TIM5_Init(void); - 193:Src/main.c **** static void MX_ADC1_Init(void); - 194:Src/main.c **** static void MX_ADC3_Init(void); - 195:Src/main.c **** static void MX_SPI2_Init(void); - 196:Src/main.c **** static void MX_SPI5_Init(void); - 197:Src/main.c **** static void MX_SPI6_Init(void); - 198:Src/main.c **** static void MX_USART1_UART_Init(void); - 199:Src/main.c **** static void MX_SDMMC1_SD_Init(void); - 200:Src/main.c **** static void MX_TIM7_Init(void); - 201:Src/main.c **** static void MX_TIM6_Init(void); - 202:Src/main.c **** static void MX_TIM10_Init(void); - 203:Src/main.c **** static void MX_UART8_Init(void); - 204:Src/main.c **** static void MX_TIM8_Init(void); - 205:Src/main.c **** static void MX_TIM11_Init(void); - 206:Src/main.c **** static void MX_TIM4_Init(void); - 207:Src/main.c **** static void MX_TIM1_Init(void); - 208:Src/main.c **** /* USER CODE BEGIN PFP */ - 209:Src/main.c **** static void Init_params(void); - 210:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 211:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 212:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA); - 213:Src/main.c **** static uint16_t MPhD_T(uint8_t num); - 214:Src/main.c **** static uint16_t Get_ADC(uint8_t num); - 215:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul - 216:Src/main.c **** static void AD9102_Init(void); - 217:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value); - 218:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr); - ARM GAS /tmp/ccuHnxNu.s page 43 + 162:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, + 163:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, + 164:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u, + 165:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 166:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u, + 167:Src/main.c **** 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 168:Src/main.c **** 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 169:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu, + 170:Src/main.c **** 0x0001u, 0x0001u + 171:Src/main.c **** }; + 172:Src/main.c **** + 173:Src/main.c **** static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = { + 174:Src/main.c **** 0x0000u, 0x0e00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, + 175:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u, + 176:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u, + 177:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 178:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u, + 179:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 180:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, + 181:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u, + 182:Src/main.c **** 0x0001u, 0x0001u + 183:Src/main.c **** }; + 184:Src/main.c **** + 185:Src/main.c **** static uint8_t ad9102_wave_upload_active = 0u; + 186:Src/main.c **** static uint16_t ad9102_wave_expected_samples = 0u; + 187:Src/main.c **** static uint16_t ad9102_wave_written_samples = 0u; + 188:Src/main.c **** + 189:Src/main.c **** + 190:Src/main.c **** + 191:Src/main.c **** + 192:Src/main.c **** /* USER CODE END PV */ + 193:Src/main.c **** + 194:Src/main.c **** /* Private function prototypes -----------------------------------------------*/ + 195:Src/main.c **** void SystemClock_Config(void); + 196:Src/main.c **** static void MX_GPIO_Init(void); + 197:Src/main.c **** static void MX_DMA_Init(void); + 198:Src/main.c **** static void MX_SPI4_Init(void); + 199:Src/main.c **** static void MX_TIM2_Init(void); + 200:Src/main.c **** static void MX_TIM5_Init(void); + 201:Src/main.c **** static void MX_ADC1_Init(void); + 202:Src/main.c **** static void MX_ADC3_Init(void); + 203:Src/main.c **** static void MX_SPI2_Init(void); + 204:Src/main.c **** static void MX_SPI5_Init(void); + 205:Src/main.c **** static void MX_SPI6_Init(void); + 206:Src/main.c **** static void MX_USART1_UART_Init(void); + 207:Src/main.c **** static void MX_SDMMC1_SD_Init(void); + 208:Src/main.c **** static void MX_TIM7_Init(void); + 209:Src/main.c **** static void MX_TIM6_Init(void); + 210:Src/main.c **** static void MX_TIM10_Init(void); + 211:Src/main.c **** static void MX_UART8_Init(void); + 212:Src/main.c **** static void MX_TIM8_Init(void); + 213:Src/main.c **** static void MX_TIM11_Init(void); + 214:Src/main.c **** static void MX_TIM4_Init(void); + 215:Src/main.c **** static void MX_TIM1_Init(void); + 216:Src/main.c **** /* USER CODE BEGIN PFP */ + 217:Src/main.c **** static void Init_params(void); + 218:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + ARM GAS /tmp/ccLSPxIe.s page 43 - 219:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); - 220:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, - 221:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, - 222:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude); - 223:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t - 224:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin - 225:Src/main.c **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase); - 226:Src/main.c **** static void AD9833_WriteWord(uint16_t word); - 227:Src/main.c **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word); - 228:Src/main.c **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms); - 229:Src/main.c **** static void PA4_DAC_Init(void); - 230:Src/main.c **** static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable); - 231:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff); - 232:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); - 233:Src/main.c **** //int SD_Init(void); - 234:Src/main.c **** int SD_SAVE(uint16_t *pbuff); - 235:Src/main.c **** //uint32_t Get_Length(void); - 236:Src/main.c **** int SD_READ(uint16_t *pbuff); - 237:Src/main.c **** int SD_REMOVE(void); - 238:Src/main.c **** void USART_TX (uint8_t* dt, uint16_t sz); - 239:Src/main.c **** void USART_TX_DMA (uint16_t sz); - 240:Src/main.c **** static void Stop_TIM10(); - 241:Src/main.c **** static void OUT_trigger(uint8_t); - 242:Src/main.c **** /* USER CODE END PFP */ - 243:Src/main.c **** - 244:Src/main.c **** /* Private user code ---------------------------------------------------------*/ - 245:Src/main.c **** /* USER CODE BEGIN 0 */ - 246:Src/main.c **** - 247:Src/main.c **** /* USER CODE END 0 */ - 248:Src/main.c **** - 249:Src/main.c **** /** - 250:Src/main.c **** * @brief The application entry point. - 251:Src/main.c **** * @retval int - 252:Src/main.c **** */ - 253:Src/main.c **** int main(void) - 254:Src/main.c **** { - 255:Src/main.c **** - 256:Src/main.c **** /* USER CODE BEGIN 1 */ - 257:Src/main.c **** HAL_StatusTypeDef st; - 258:Src/main.c **** /* USER CODE END 1 */ + 219:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 220:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA); + 221:Src/main.c **** static uint16_t MPhD_T(uint8_t num); + 222:Src/main.c **** static uint16_t Get_ADC(uint8_t num); + 223:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul + 224:Src/main.c **** static void AD9102_Init(void); + 225:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value); + 226:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr); + 227:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); + 228:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, + 229:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, + 230:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude); + 231:Src/main.c **** static void AD9102_ResetWaveUploadState(void); + 232:Src/main.c **** static void AD9102_StopOutput(void); + 233:Src/main.c **** static void AD9102_StartOutput(void); + 234:Src/main.c **** static void AD9102_ConfigureSramPlayback(uint16_t samples, uint8_t hold); + 235:Src/main.c **** static uint8_t AD9102_BeginWaveUpload(uint16_t samples); + 236:Src/main.c **** static uint8_t AD9102_WriteWaveUploadChunk(const uint16_t *samples, uint16_t chunk_count); + 237:Src/main.c **** static uint16_t AD9102_CommitWaveUpload(uint8_t *ok); + 238:Src/main.c **** static void AD9102_CancelWaveUpload(void); + 239:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t + 240:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin + 241:Src/main.c **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase); + 242:Src/main.c **** static void AD9833_WriteWord(uint16_t word); + 243:Src/main.c **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word); + 244:Src/main.c **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms); + 245:Src/main.c **** static void PA4_DAC_Init(void); + 246:Src/main.c **** static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable); + 247:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff); + 248:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); + 249:Src/main.c **** //int SD_Init(void); + 250:Src/main.c **** int SD_SAVE(uint16_t *pbuff); + 251:Src/main.c **** //uint32_t Get_Length(void); + 252:Src/main.c **** int SD_READ(uint16_t *pbuff); + 253:Src/main.c **** int SD_REMOVE(void); + 254:Src/main.c **** void USART_TX (uint8_t* dt, uint16_t sz); + 255:Src/main.c **** void USART_TX_DMA (uint16_t sz); + 256:Src/main.c **** static void Stop_TIM10(); + 257:Src/main.c **** static void OUT_trigger(uint8_t); + 258:Src/main.c **** /* USER CODE END PFP */ 259:Src/main.c **** - 260:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ - 261:Src/main.c **** - 262:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ - 263:Src/main.c **** HAL_Init(); + 260:Src/main.c **** /* Private user code ---------------------------------------------------------*/ + 261:Src/main.c **** /* USER CODE BEGIN 0 */ + 262:Src/main.c **** + 263:Src/main.c **** /* USER CODE END 0 */ 264:Src/main.c **** - 265:Src/main.c **** /* USER CODE BEGIN Init */ - 266:Src/main.c **** /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/ - 267:Src/main.c **** /* USER CODE END Init */ - 268:Src/main.c **** - 269:Src/main.c **** /* Configure the system clock */ - 270:Src/main.c **** SystemClock_Config(); + 265:Src/main.c **** /** + 266:Src/main.c **** * @brief The application entry point. + 267:Src/main.c **** * @retval int + 268:Src/main.c **** */ + 269:Src/main.c **** int main(void) + 270:Src/main.c **** { 271:Src/main.c **** - 272:Src/main.c **** /* USER CODE BEGIN SysInit */ - 273:Src/main.c **** - 274:Src/main.c **** /* USER CODE END SysInit */ + 272:Src/main.c **** /* USER CODE BEGIN 1 */ + 273:Src/main.c **** HAL_StatusTypeDef st; + 274:Src/main.c **** /* USER CODE END 1 */ 275:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 44 + ARM GAS /tmp/ccLSPxIe.s page 44 - 276:Src/main.c **** /* Initialize all configured peripherals */ - 277:Src/main.c **** MX_GPIO_Init(); - 278:Src/main.c **** MX_DMA_Init(); - 279:Src/main.c **** MX_SPI4_Init(); - 280:Src/main.c **** MX_FATFS_Init(); - 281:Src/main.c **** MX_TIM2_Init(); - 282:Src/main.c **** MX_TIM5_Init(); - 283:Src/main.c **** MX_ADC1_Init(); - 284:Src/main.c **** MX_ADC3_Init(); - 285:Src/main.c **** MX_SPI2_Init(); - 286:Src/main.c **** MX_SPI5_Init(); - 287:Src/main.c **** MX_SPI6_Init(); - 288:Src/main.c **** MX_USART1_UART_Init(); - 289:Src/main.c **** MX_SDMMC1_SD_Init(); - 290:Src/main.c **** MX_TIM7_Init(); - 291:Src/main.c **** MX_TIM6_Init(); - 292:Src/main.c **** MX_TIM10_Init(); - 293:Src/main.c **** MX_UART8_Init(); - 294:Src/main.c **** MX_TIM8_Init(); - 295:Src/main.c **** MX_TIM11_Init(); - 296:Src/main.c **** MX_TIM4_Init(); - 297:Src/main.c **** MX_TIM1_Init(); - 298:Src/main.c **** PA4_DAC_Init(); - 299:Src/main.c **** /* USER CODE BEGIN 2 */ - 300:Src/main.c **** Init_params(); - 301:Src/main.c **** //HAL_TIM_Base_Start(&htim11); - 302:Src/main.c **** //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 303:Src/main.c **** - 304:Src/main.c **** - 305:Src/main.c **** //TIM4,11 clocks = 92 MHz - 306:Src/main.c **** - 307:Src/main.c **** //ADC clock - 308:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz - 309:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz - 310:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz - 311:Src/main.c **** TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre - 312:Src/main.c **** - 313:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - 314:Src/main.c **** - 315:Src/main.c **** - 316:Src/main.c **** //Mach-Zander clock (should be 1/4 of ADC clock freq) - 317:Src/main.c **** - 318:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; - 319:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 276:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ + 277:Src/main.c **** + 278:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + 279:Src/main.c **** HAL_Init(); + 280:Src/main.c **** + 281:Src/main.c **** /* USER CODE BEGIN Init */ + 282:Src/main.c **** /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/ + 283:Src/main.c **** /* USER CODE END Init */ + 284:Src/main.c **** + 285:Src/main.c **** /* Configure the system clock */ + 286:Src/main.c **** SystemClock_Config(); + 287:Src/main.c **** + 288:Src/main.c **** /* USER CODE BEGIN SysInit */ + 289:Src/main.c **** + 290:Src/main.c **** /* USER CODE END SysInit */ + 291:Src/main.c **** + 292:Src/main.c **** /* Initialize all configured peripherals */ + 293:Src/main.c **** MX_GPIO_Init(); + 294:Src/main.c **** MX_DMA_Init(); + 295:Src/main.c **** MX_SPI4_Init(); + 296:Src/main.c **** MX_FATFS_Init(); + 297:Src/main.c **** MX_TIM2_Init(); + 298:Src/main.c **** MX_TIM5_Init(); + 299:Src/main.c **** MX_ADC1_Init(); + 300:Src/main.c **** MX_ADC3_Init(); + 301:Src/main.c **** MX_SPI2_Init(); + 302:Src/main.c **** MX_SPI5_Init(); + 303:Src/main.c **** MX_SPI6_Init(); + 304:Src/main.c **** MX_USART1_UART_Init(); + 305:Src/main.c **** MX_SDMMC1_SD_Init(); + 306:Src/main.c **** MX_TIM7_Init(); + 307:Src/main.c **** MX_TIM6_Init(); + 308:Src/main.c **** MX_TIM10_Init(); + 309:Src/main.c **** MX_UART8_Init(); + 310:Src/main.c **** MX_TIM8_Init(); + 311:Src/main.c **** MX_TIM11_Init(); + 312:Src/main.c **** MX_TIM4_Init(); + 313:Src/main.c **** MX_TIM1_Init(); + 314:Src/main.c **** PA4_DAC_Init(); + 315:Src/main.c **** /* USER CODE BEGIN 2 */ + 316:Src/main.c **** Init_params(); + 317:Src/main.c **** //HAL_TIM_Base_Start(&htim11); + 318:Src/main.c **** //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 319:Src/main.c **** 320:Src/main.c **** - 321:Src/main.c **** // AD9833 MCLK output on PE9 (TIM1_CH1) - 322:Src/main.c **** // TIM1 clock = 184 MHz, ARR=8 -> ~20.44 MHz output - 323:Src/main.c **** HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1); - 324:Src/main.c **** - 325:Src/main.c **** /* - 326:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ - 327:Src/main.c **** - 328:Src/main.c **** CPU_state = DECODE_ENABLE; - 329:Src/main.c **** } - 330:Src/main.c **** */ - 331:Src/main.c **** /* USER CODE END 2 */ - 332:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 45 + 321:Src/main.c **** //TIM4,11 clocks = 92 MHz + 322:Src/main.c **** + 323:Src/main.c **** //ADC clock + 324:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz + 325:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz + 326:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz + 327:Src/main.c **** TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre + 328:Src/main.c **** + 329:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; + 330:Src/main.c **** + 331:Src/main.c **** + 332:Src/main.c **** //Mach-Zander clock (should be 1/4 of ADC clock freq) + ARM GAS /tmp/ccLSPxIe.s page 45 - 333:Src/main.c **** /* Infinite loop */ - 334:Src/main.c **** /* USER CODE BEGIN WHILE */ - 335:Src/main.c **** while (1) - 336:Src/main.c **** { - 337:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) - 338:Src/main.c **** { - 339:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); - 340:Src/main.c **** LL_USART_EnableIT_PE(USART1); - 341:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); - 342:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); - 343:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); - 344:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 345:Src/main.c **** u_rx_flg = 1; - 346:Src/main.c **** } - 347:Src/main.c **** // else - 348:Src/main.c **** // { - 349:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); - 350:Src/main.c **** // u_rx_flg = 0; - 351:Src/main.c **** // } - 352:Src/main.c **** switch (CPU_state) - 353:Src/main.c **** { - 354:Src/main.c **** case HALT://0 - Default state - 355:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 356:Src/main.c **** task.current_param = task.min_param; - 357:Src/main.c **** Stop_TIM10(); - 358:Src/main.c **** break; - 359:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 360:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); - 361:Src/main.c **** if (CheckChecksum(COMMAND)) - 362:Src/main.c **** { - 363:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 - 364:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 365:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 366:Src/main.c **** TO6_before = TO6; - 367:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 368:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; - 369:Src/main.c **** CPU_state = WORK_ENABLE; - 370:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 371:Src/main.c **** } - 372:Src/main.c **** else - 373:Src/main.c **** { - 374:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 375:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 376:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 377:Src/main.c **** } - 378:Src/main.c **** UART_transmission_request = MESS_01; - 379:Src/main.c **** break; - 380:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 381:Src/main.c **** //Set current setup to default - 382:Src/main.c **** task.current_param = task.min_param; - 383:Src/main.c **** Stop_TIM10(); - 384:Src/main.c **** Init_params(); - 385:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 386:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 387:Src/main.c **** CPU_state = HALT; - 388:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 389:Src/main.c **** UART_transmission_request = MESS_01; - ARM GAS /tmp/ccuHnxNu.s page 46 + 333:Src/main.c **** + 334:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; + 335:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 336:Src/main.c **** + 337:Src/main.c **** // AD9833 MCLK output on PE9 (TIM1_CH1) + 338:Src/main.c **** // TIM1 clock = 184 MHz, ARR=8 -> ~20.44 MHz output + 339:Src/main.c **** HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1); + 340:Src/main.c **** + 341:Src/main.c **** /* + 342:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ + 343:Src/main.c **** + 344:Src/main.c **** CPU_state = DECODE_ENABLE; + 345:Src/main.c **** } + 346:Src/main.c **** */ + 347:Src/main.c **** /* USER CODE END 2 */ + 348:Src/main.c **** + 349:Src/main.c **** /* Infinite loop */ + 350:Src/main.c **** /* USER CODE BEGIN WHILE */ + 351:Src/main.c **** while (1) + 352:Src/main.c **** { + 353:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) + 354:Src/main.c **** { + 355:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); + 356:Src/main.c **** LL_USART_EnableIT_PE(USART1); + 357:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); + 358:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); + 359:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); + 360:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 361:Src/main.c **** u_rx_flg = 1; + 362:Src/main.c **** } + 363:Src/main.c **** // else + 364:Src/main.c **** // { + 365:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); + 366:Src/main.c **** // u_rx_flg = 0; + 367:Src/main.c **** // } + 368:Src/main.c **** switch (CPU_state) + 369:Src/main.c **** { + 370:Src/main.c **** case HALT://0 - Default state + 371:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 372:Src/main.c **** task.current_param = task.min_param; + 373:Src/main.c **** Stop_TIM10(); + 374:Src/main.c **** break; + 375:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 376:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); + 377:Src/main.c **** if (CheckChecksum(COMMAND)) + 378:Src/main.c **** { + 379:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 + 380:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 381:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 382:Src/main.c **** TO6_before = TO6; + 383:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 384:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; + 385:Src/main.c **** CPU_state = WORK_ENABLE; + 386:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 387:Src/main.c **** } + 388:Src/main.c **** else + 389:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 46 - 390:Src/main.c **** break; - 391:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 392:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); - 393:Src/main.c **** State_Data[0]|=temp16&0xff; - 394:Src/main.c **** if (temp16==0) - 395:Src/main.c **** { - 396:Src/main.c **** UART_transmission_request = MESS_03; - 397:Src/main.c **** } - 398:Src/main.c **** else - 399:Src/main.c **** { - 400:Src/main.c **** UART_transmission_request = MESS_01; - 401:Src/main.c **** } - 402:Src/main.c **** CPU_state_old = HALT; - 403:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 404:Src/main.c **** break; - 405:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 406:Src/main.c **** UART_transmission_request = MESS_02; - 407:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 408:Src/main.c **** break; - 409:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 410:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; - 411:Src/main.c **** UART_transmission_request = MESS_01; - 412:Src/main.c **** CPU_state = CPU_state_old; - 413:Src/main.c **** break; - 414:Src/main.c **** case STATE://6 - Transmith state message - 415:Src/main.c **** UART_transmission_request = MESS_01; - 416:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 417:Src/main.c **** break; - 418:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 419:Src/main.c **** task.current_param = task.min_param; - 420:Src/main.c **** Stop_TIM10(); - 421:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 422:Src/main.c **** { - 423:Src/main.c **** TO7_before = TO7; - 424:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 425:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 426:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 427:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 428:Src/main.c **** - 429:Src/main.c **** //Correct temperature in all pulses - 430:Src/main.c **** (void) MPhD_T(3); - 431:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 432:Src/main.c **** (void) MPhD_T(4); - 433:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 434:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 435:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 436:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 437:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 438:Src/main.c **** - 439:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 440:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 441:Src/main.c **** - 442:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 - 443:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 444:Src/main.c **** - 445:Src/main.c **** //Prepare DATA of internals ADCs - 446:Src/main.c **** //Put the temperature of LD2 to Long_Data: - ARM GAS /tmp/ccuHnxNu.s page 47 + 390:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 391:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 392:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 393:Src/main.c **** } + 394:Src/main.c **** UART_transmission_request = MESS_01; + 395:Src/main.c **** break; + 396:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 397:Src/main.c **** //Set current setup to default + 398:Src/main.c **** task.current_param = task.min_param; + 399:Src/main.c **** Stop_TIM10(); + 400:Src/main.c **** Init_params(); + 401:Src/main.c **** AD9102_CancelWaveUpload(); + 402:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 403:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 404:Src/main.c **** CPU_state = HALT; + 405:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 406:Src/main.c **** UART_transmission_request = MESS_01; + 407:Src/main.c **** break; + 408:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 409:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); + 410:Src/main.c **** State_Data[0]|=temp16&0xff; + 411:Src/main.c **** if (temp16==0) + 412:Src/main.c **** { + 413:Src/main.c **** UART_transmission_request = MESS_03; + 414:Src/main.c **** } + 415:Src/main.c **** else + 416:Src/main.c **** { + 417:Src/main.c **** UART_transmission_request = MESS_01; + 418:Src/main.c **** } + 419:Src/main.c **** CPU_state_old = HALT; + 420:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 421:Src/main.c **** break; + 422:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 423:Src/main.c **** UART_transmission_request = MESS_02; + 424:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 425:Src/main.c **** break; + 426:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 427:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; + 428:Src/main.c **** UART_transmission_request = MESS_01; + 429:Src/main.c **** CPU_state = CPU_state_old; + 430:Src/main.c **** break; + 431:Src/main.c **** case STATE://6 - Transmith state message + 432:Src/main.c **** UART_transmission_request = MESS_01; + 433:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 434:Src/main.c **** break; + 435:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 436:Src/main.c **** task.current_param = task.min_param; + 437:Src/main.c **** Stop_TIM10(); + 438:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 439:Src/main.c **** { + 440:Src/main.c **** TO7_before = TO7; + 441:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 442:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 443:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 444:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 445:Src/main.c **** + 446:Src/main.c **** //Correct temperature in all pulses + ARM GAS /tmp/ccLSPxIe.s page 47 - 447:Src/main.c **** temp16 = Get_ADC(0); - 448:Src/main.c **** temp16 = Get_ADC(1); - 449:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 450:Src/main.c **** - 451:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 452:Src/main.c **** temp16 = Get_ADC(1); - 453:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 454:Src/main.c **** - 455:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 456:Src/main.c **** temp16 = Get_ADC(1); - 457:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 458:Src/main.c **** - 459:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 460:Src/main.c **** temp16 = Get_ADC(1); - 461:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 462:Src/main.c **** + 447:Src/main.c **** (void) MPhD_T(3); + 448:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 449:Src/main.c **** (void) MPhD_T(4); + 450:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 451:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 452:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 453:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 454:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 455:Src/main.c **** + 456:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 457:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 458:Src/main.c **** + 459:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 + 460:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 461:Src/main.c **** + 462:Src/main.c **** //Prepare DATA of internals ADCs 463:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 464:Src/main.c **** temp16 = Get_ADC(1); - 465:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 466:Src/main.c **** temp16 = Get_ADC(2); + 464:Src/main.c **** temp16 = Get_ADC(0); + 465:Src/main.c **** temp16 = Get_ADC(1); + 466:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain 467:Src/main.c **** 468:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 469:Src/main.c **** temp16 = Get_ADC(3); - 470:Src/main.c **** temp16 = Get_ADC(4); - 471:Src/main.c **** Long_Data[12] = temp16; - 472:Src/main.c **** temp16 = Get_ADC(5); - 473:Src/main.c **** - 474:Src/main.c **** //Put the timer tick to Long_Data: - 475:Src/main.c **** TO6_stop = TO6; - 476:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 477:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 478:Src/main.c **** - 479:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 480:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 481:Src/main.c **** - 482:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 483:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 484:Src/main.c **** - 485:Src/main.c **** if (Curr_setup.SD_EN==1) - 486:Src/main.c **** { - 487:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 488:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 489:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 490:Src/main.c **** State_Data[0]|=temp16&0xff; - 491:Src/main.c **** } - 492:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 493:Src/main.c **** } - 494:Src/main.c **** break; - 495:Src/main.c **** case AD9102_CMD://10 - Configure AD9102 sawtooth output - 496:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) - 497:Src/main.c **** { - 498:Src/main.c **** uint16_t flags = COMMAND[0]; - 499:Src/main.c **** uint16_t param0 = COMMAND[1]; - 500:Src/main.c **** uint16_t param1 = COMMAND[2]; - 501:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; - 502:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; - 503:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; - ARM GAS /tmp/ccuHnxNu.s page 48 + 469:Src/main.c **** temp16 = Get_ADC(1); + 470:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 471:Src/main.c **** + 472:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 473:Src/main.c **** temp16 = Get_ADC(1); + 474:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 475:Src/main.c **** + 476:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 477:Src/main.c **** temp16 = Get_ADC(1); + 478:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 479:Src/main.c **** + 480:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 481:Src/main.c **** temp16 = Get_ADC(1); + 482:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 483:Src/main.c **** temp16 = Get_ADC(2); + 484:Src/main.c **** + 485:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 486:Src/main.c **** temp16 = Get_ADC(3); + 487:Src/main.c **** temp16 = Get_ADC(4); + 488:Src/main.c **** Long_Data[12] = temp16; + 489:Src/main.c **** temp16 = Get_ADC(5); + 490:Src/main.c **** + 491:Src/main.c **** //Put the timer tick to Long_Data: + 492:Src/main.c **** TO6_stop = TO6; + 493:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 494:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 495:Src/main.c **** + 496:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 497:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 498:Src/main.c **** + 499:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 500:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; + 501:Src/main.c **** + 502:Src/main.c **** if (Curr_setup.SD_EN==1) + 503:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 48 - 504:Src/main.c **** - 505:Src/main.c **** if (sram_mode) - 506:Src/main.c **** { - 507:Src/main.c **** uint8_t sram_fmt = (flags & AD9102_FLAG_SRAM_FMT) ? 1u : 0u; - 508:Src/main.c **** uint16_t samples; - 509:Src/main.c **** uint8_t hold; - 510:Src/main.c **** uint16_t amplitude; - 511:Src/main.c **** - 512:Src/main.c **** if (sram_fmt) - 513:Src/main.c **** { - 514:Src/main.c **** amplitude = param0; - 515:Src/main.c **** samples = param1; - 516:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; - 517:Src/main.c **** } - 518:Src/main.c **** else - 519:Src/main.c **** { - 520:Src/main.c **** samples = param0; - 521:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); - 522:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; - 523:Src/main.c **** } - 524:Src/main.c **** - 525:Src/main.c **** uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle, amplitude); - 526:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 527:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) - 528:Src/main.c **** { - 529:Src/main.c **** State_Data[0] |= AD9102_ERR; - 530:Src/main.c **** } - 531:Src/main.c **** } - 532:Src/main.c **** else - 533:Src/main.c **** { - 534:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; - 535:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 536:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); - 537:Src/main.c **** uint16_t pat_period = param1; - 538:Src/main.c **** - 539:Src/main.c **** if (param0 == 0u && param1 == 0u) - 540:Src/main.c **** { - 541:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; - 542:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; - 543:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; - 544:Src/main.c **** } - 545:Src/main.c **** else - 546:Src/main.c **** { - 547:Src/main.c **** if (saw_step == 0u) - 548:Src/main.c **** { - 549:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; - 550:Src/main.c **** } - 551:Src/main.c **** else if (saw_step > 63u) - 552:Src/main.c **** { - 553:Src/main.c **** saw_step = 63u; - 554:Src/main.c **** } - 555:Src/main.c **** if (pat_period == 0u) - 556:Src/main.c **** { - 557:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; - 558:Src/main.c **** } - 559:Src/main.c **** } - 560:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 49 + 504:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); + 505:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 506:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 507:Src/main.c **** State_Data[0]|=temp16&0xff; + 508:Src/main.c **** } + 509:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 510:Src/main.c **** } + 511:Src/main.c **** break; + 512:Src/main.c **** case AD9102_CMD://10 - Configure AD9102 sawtooth output + 513:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) + 514:Src/main.c **** { + 515:Src/main.c **** uint16_t flags = COMMAND[0]; + 516:Src/main.c **** uint16_t param0 = COMMAND[1]; + 517:Src/main.c **** uint16_t param1 = COMMAND[2]; + 518:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 519:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 520:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; + 521:Src/main.c **** + 522:Src/main.c **** if (sram_mode) + 523:Src/main.c **** { + 524:Src/main.c **** uint8_t sram_fmt = (flags & AD9102_FLAG_SRAM_FMT) ? 1u : 0u; + 525:Src/main.c **** uint16_t samples; + 526:Src/main.c **** uint8_t hold; + 527:Src/main.c **** uint16_t amplitude; + 528:Src/main.c **** + 529:Src/main.c **** if (sram_fmt) + 530:Src/main.c **** { + 531:Src/main.c **** amplitude = param0; + 532:Src/main.c **** samples = param1; + 533:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; + 534:Src/main.c **** } + 535:Src/main.c **** else + 536:Src/main.c **** { + 537:Src/main.c **** samples = param0; + 538:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); + 539:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; + 540:Src/main.c **** } + 541:Src/main.c **** + 542:Src/main.c **** uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle, amplitude); + 543:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 544:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) + 545:Src/main.c **** { + 546:Src/main.c **** State_Data[0] |= AD9102_ERR; + 547:Src/main.c **** } + 548:Src/main.c **** } + 549:Src/main.c **** else + 550:Src/main.c **** { + 551:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP; + 552:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 553:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 554:Src/main.c **** uint16_t pat_period = param1; + 555:Src/main.c **** + 556:Src/main.c **** if (param0 == 0u && param1 == 0u) + 557:Src/main.c **** { + 558:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; + 559:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; + 560:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + ARM GAS /tmp/ccLSPxIe.s page 49 - 561:Src/main.c **** uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period); - 562:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 563:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) - 564:Src/main.c **** { - 565:Src/main.c **** State_Data[0] |= AD9102_ERR; - 566:Src/main.c **** } - 567:Src/main.c **** } - 568:Src/main.c **** } - 569:Src/main.c **** else - 570:Src/main.c **** { - 571:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 572:Src/main.c **** } - 573:Src/main.c **** UART_transmission_request = MESS_01; - 574:Src/main.c **** CPU_state = CPU_state_old; - 575:Src/main.c **** break; - 576:Src/main.c **** case AD9833_CMD://11 - Configure AD9833 triangle output - 577:Src/main.c **** State_Data[1] = 0u; - 578:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) - 579:Src/main.c **** { - 580:Src/main.c **** uint16_t flags = COMMAND[0]; - 581:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); - 582:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); - 583:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; - 584:Src/main.c **** uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u; - 585:Src/main.c **** uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw; - 586:Src/main.c **** - 587:Src/main.c **** AD9833_Apply(enable, triangle, freq_word); - 588:Src/main.c **** } - 589:Src/main.c **** else - 590:Src/main.c **** { - 591:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 592:Src/main.c **** } - 593:Src/main.c **** UART_transmission_request = MESS_01; - 594:Src/main.c **** CPU_state = CPU_state_old; - 595:Src/main.c **** break; - 596:Src/main.c **** case DS1809_CMD://12 - Pulse DS1809 UC/DC controls - 597:Src/main.c **** if (CalculateChecksum(COMMAND, DS1809_CMD_WORDS - 1) == COMMAND[DS1809_CMD_WORDS - 1]) - 598:Src/main.c **** { - 599:Src/main.c **** uint16_t flags = COMMAND[0]; - 600:Src/main.c **** uint16_t count = COMMAND[1]; - 601:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; - 602:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; - 603:Src/main.c **** uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u; - 604:Src/main.c **** - 605:Src/main.c **** if (uc && dc) - 606:Src/main.c **** { - 607:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 608:Src/main.c **** } - 609:Src/main.c **** else - 610:Src/main.c **** { - 611:Src/main.c **** if (count == 0u) - 612:Src/main.c **** { - 613:Src/main.c **** count = 1u; - 614:Src/main.c **** } - 615:Src/main.c **** if (count > 64u) - 616:Src/main.c **** { - 617:Src/main.c **** count = 64u; - ARM GAS /tmp/ccuHnxNu.s page 50 + 561:Src/main.c **** } + 562:Src/main.c **** else + 563:Src/main.c **** { + 564:Src/main.c **** if (saw_step == 0u) + 565:Src/main.c **** { + 566:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; + 567:Src/main.c **** } + 568:Src/main.c **** else if (saw_step > 63u) + 569:Src/main.c **** { + 570:Src/main.c **** saw_step = 63u; + 571:Src/main.c **** } + 572:Src/main.c **** if (pat_period == 0u) + 573:Src/main.c **** { + 574:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + 575:Src/main.c **** } + 576:Src/main.c **** } + 577:Src/main.c **** + 578:Src/main.c **** uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period); + 579:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 580:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 581:Src/main.c **** { + 582:Src/main.c **** State_Data[0] |= AD9102_ERR; + 583:Src/main.c **** } + 584:Src/main.c **** } + 585:Src/main.c **** } + 586:Src/main.c **** else + 587:Src/main.c **** { + 588:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 589:Src/main.c **** } + 590:Src/main.c **** UART_transmission_request = MESS_01; + 591:Src/main.c **** CPU_state = CPU_state_old; + 592:Src/main.c **** break; + 593:Src/main.c **** case AD9833_CMD://11 - Configure AD9833 triangle output + 594:Src/main.c **** State_Data[1] = 0u; + 595:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) + 596:Src/main.c **** { + 597:Src/main.c **** uint16_t flags = COMMAND[0]; + 598:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); + 599:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); + 600:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; + 601:Src/main.c **** uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u; + 602:Src/main.c **** uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw; + 603:Src/main.c **** + 604:Src/main.c **** AD9833_Apply(enable, triangle, freq_word); + 605:Src/main.c **** } + 606:Src/main.c **** else + 607:Src/main.c **** { + 608:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 609:Src/main.c **** } + 610:Src/main.c **** UART_transmission_request = MESS_01; + 611:Src/main.c **** CPU_state = CPU_state_old; + 612:Src/main.c **** break; + 613:Src/main.c **** case DS1809_CMD://12 - Pulse DS1809 UC/DC controls + 614:Src/main.c **** if (CalculateChecksum(COMMAND, DS1809_CMD_WORDS - 1) == COMMAND[DS1809_CMD_WORDS - 1]) + 615:Src/main.c **** { + 616:Src/main.c **** uint16_t flags = COMMAND[0]; + 617:Src/main.c **** uint16_t count = COMMAND[1]; + ARM GAS /tmp/ccLSPxIe.s page 50 - 618:Src/main.c **** } - 619:Src/main.c **** if (pulse_ms == 0u) - 620:Src/main.c **** { - 621:Src/main.c **** pulse_ms = DS1809_PULSE_MS_DEFAULT; - 622:Src/main.c **** } - 623:Src/main.c **** if (pulse_ms > 500u) - 624:Src/main.c **** { - 625:Src/main.c **** pulse_ms = 500u; - 626:Src/main.c **** } - 627:Src/main.c **** DS1809_Pulse(uc, dc, count, pulse_ms); - 628:Src/main.c **** } - 629:Src/main.c **** } - 630:Src/main.c **** else - 631:Src/main.c **** { - 632:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 633:Src/main.c **** } - 634:Src/main.c **** UART_transmission_request = MESS_01; - 635:Src/main.c **** CPU_state = CPU_state_old; - 636:Src/main.c **** break; - 637:Src/main.c **** case STM32_DAC_CMD://13 - Set STM32 internal DAC (PA4) - 638:Src/main.c **** if (CalculateChecksum(COMMAND, STM32_DAC_CMD_WORDS - 1) == COMMAND[STM32_DAC_CMD_WORDS - 1]) - 639:Src/main.c **** { - 640:Src/main.c **** uint16_t flags = COMMAND[0]; - 641:Src/main.c **** uint16_t dac_code = (uint16_t)(COMMAND[1] & 0x0FFFu); - 642:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u; - 643:Src/main.c **** PA4_DAC_Set(dac_code, enable); - 644:Src/main.c **** } - 645:Src/main.c **** else - 646:Src/main.c **** { - 647:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 648:Src/main.c **** } - 649:Src/main.c **** UART_transmission_request = MESS_01; - 650:Src/main.c **** CPU_state = CPU_state_old; - 651:Src/main.c **** break; - 652:Src/main.c **** case DECODE_TASK: - 653:Src/main.c **** if (CheckChecksum(COMMAND)) - 654:Src/main.c **** { - 655:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 656:Src/main.c **** TO6_before = TO6; - 657:Src/main.c **** CPU_state = RUN_TASK; - 658:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 659:Src/main.c **** } - 660:Src/main.c **** else - 661:Src/main.c **** { - 662:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 663:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 664:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 618:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; + 619:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; + 620:Src/main.c **** uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u; + 621:Src/main.c **** + 622:Src/main.c **** if (uc && dc) + 623:Src/main.c **** { + 624:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 625:Src/main.c **** } + 626:Src/main.c **** else + 627:Src/main.c **** { + 628:Src/main.c **** if (count == 0u) + 629:Src/main.c **** { + 630:Src/main.c **** count = 1u; + 631:Src/main.c **** } + 632:Src/main.c **** if (count > 64u) + 633:Src/main.c **** { + 634:Src/main.c **** count = 64u; + 635:Src/main.c **** } + 636:Src/main.c **** if (pulse_ms == 0u) + 637:Src/main.c **** { + 638:Src/main.c **** pulse_ms = DS1809_PULSE_MS_DEFAULT; + 639:Src/main.c **** } + 640:Src/main.c **** if (pulse_ms > 500u) + 641:Src/main.c **** { + 642:Src/main.c **** pulse_ms = 500u; + 643:Src/main.c **** } + 644:Src/main.c **** DS1809_Pulse(uc, dc, count, pulse_ms); + 645:Src/main.c **** } + 646:Src/main.c **** } + 647:Src/main.c **** else + 648:Src/main.c **** { + 649:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 650:Src/main.c **** } + 651:Src/main.c **** UART_transmission_request = MESS_01; + 652:Src/main.c **** CPU_state = CPU_state_old; + 653:Src/main.c **** break; + 654:Src/main.c **** case STM32_DAC_CMD://13 - Set STM32 internal DAC (PA4) + 655:Src/main.c **** if (CalculateChecksum(COMMAND, STM32_DAC_CMD_WORDS - 1) == COMMAND[STM32_DAC_CMD_WORDS - 1]) + 656:Src/main.c **** { + 657:Src/main.c **** uint16_t flags = COMMAND[0]; + 658:Src/main.c **** uint16_t dac_code = (uint16_t)(COMMAND[1] & 0x0FFFu); + 659:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u; + 660:Src/main.c **** PA4_DAC_Set(dac_code, enable); + 661:Src/main.c **** } + 662:Src/main.c **** else + 663:Src/main.c **** { + 664:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; 665:Src/main.c **** } 666:Src/main.c **** UART_transmission_request = MESS_01; - 667:Src/main.c **** break; - 668:Src/main.c **** case RUN_TASK: - 669:Src/main.c **** switch (task.task_type) - 670:Src/main.c **** { - 671:Src/main.c **** case TT_CHANGE_CURR_1: - 672:Src/main.c **** - 673:Src/main.c **** - 674:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator - ARM GAS /tmp/ccuHnxNu.s page 51 + 667:Src/main.c **** CPU_state = CPU_state_old; + 668:Src/main.c **** break; + 669:Src/main.c **** case AD9102_WAVE_CTRL_CMD://14 - Control custom AD9102 SRAM upload + 670:Src/main.c **** State_Data[1] = 0u; + 671:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_CTRL_WORDS - 1) == COMMAND[AD9102_WAVE_CTRL_WORDS - + 672:Src/main.c **** { + 673:Src/main.c **** uint16_t opcode = COMMAND[0]; + 674:Src/main.c **** uint16_t param0 = COMMAND[1]; + ARM GAS /tmp/ccLSPxIe.s page 51 - 675:Src/main.c **** //ADC clock - 676:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz - 677:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz - 678:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz - 679:Src/main.c **** - 680:Src/main.c **** //online calculation for debug purposes: - 681:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running - 682:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - 683:Src/main.c **** - 684:Src/main.c **** - 685:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) - 686:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; - 687:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 688:Src/main.c **** - 689:Src/main.c **** - 690:Src/main.c **** - 691:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); - 692:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 693:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 694:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 695:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 696:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 697:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 698:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 699:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 700:Src/main.c **** - 701:Src/main.c **** // Toggle pin for oscilloscope - 702:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc - 703:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 704:Src/main.c **** - 705:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 706:Src/main.c **** if (st != HAL_OK) - 707:Src/main.c **** while(1); - 708:Src/main.c **** - 709:Src/main.c **** uint16_t step_counter = 0; - 710:Src/main.c **** uint16_t trigger_counter = 0; - 711:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 712:Src/main.c **** uint16_t task_sheduler = 0; - 713:Src/main.c **** - 714:Src/main.c **** - 715:Src/main.c **** - 716:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 717:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 718:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 719:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 720:Src/main.c **** - 721:Src/main.c **** - 722:Src/main.c **** - 723:Src/main.c **** TIM11 -> CNT = 0; - 724:Src/main.c **** TIM4 -> CNT = 0; - 725:Src/main.c **** - 726:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 727:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 728:Src/main.c **** //TIM4 -> CNT = 0; - 729:Src/main.c **** - 730:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de - 731:Src/main.c **** TIM11 -> CNT = 0; - ARM GAS /tmp/ccuHnxNu.s page 52 + 675:Src/main.c **** uint16_t param1 = COMMAND[2]; + 676:Src/main.c **** + 677:Src/main.c **** switch (opcode) + 678:Src/main.c **** { + 679:Src/main.c **** case AD9102_WAVE_OPCODE_BEGIN: + 680:Src/main.c **** if ((param1 != 0u) || !AD9102_BeginWaveUpload(param0)) + 681:Src/main.c **** { + 682:Src/main.c **** AD9102_CancelWaveUpload(); + 683:Src/main.c **** State_Data[0] |= AD9102_ERR; + 684:Src/main.c **** } + 685:Src/main.c **** break; + 686:Src/main.c **** case AD9102_WAVE_OPCODE_COMMIT: + 687:Src/main.c **** { + 688:Src/main.c **** uint16_t samples = ad9102_wave_expected_samples; + 689:Src/main.c **** uint8_t ok = 0u; + 690:Src/main.c **** uint16_t pat_status; + 691:Src/main.c **** + 692:Src/main.c **** if ((param0 != 0u) || (param1 != 0u)) + 693:Src/main.c **** { + 694:Src/main.c **** AD9102_CancelWaveUpload(); + 695:Src/main.c **** State_Data[0] |= AD9102_ERR; + 696:Src/main.c **** break; + 697:Src/main.c **** } + 698:Src/main.c **** + 699:Src/main.c **** pat_status = AD9102_CommitWaveUpload(&ok); + 700:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 701:Src/main.c **** if ((!ok) || AD9102_CheckFlagsSram(pat_status, 1u, samples, AD9102_SRAM_HOLD_DEFAULT)) + 702:Src/main.c **** { + 703:Src/main.c **** State_Data[0] |= AD9102_ERR; + 704:Src/main.c **** } + 705:Src/main.c **** } + 706:Src/main.c **** break; + 707:Src/main.c **** case AD9102_WAVE_OPCODE_CANCEL: + 708:Src/main.c **** if ((param0 != 0u) || (param1 != 0u)) + 709:Src/main.c **** { + 710:Src/main.c **** State_Data[0] |= AD9102_ERR; + 711:Src/main.c **** } + 712:Src/main.c **** AD9102_CancelWaveUpload(); + 713:Src/main.c **** break; + 714:Src/main.c **** default: + 715:Src/main.c **** AD9102_CancelWaveUpload(); + 716:Src/main.c **** State_Data[0] |= AD9102_ERR; + 717:Src/main.c **** break; + 718:Src/main.c **** } + 719:Src/main.c **** } + 720:Src/main.c **** else + 721:Src/main.c **** { + 722:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 723:Src/main.c **** } + 724:Src/main.c **** UART_transmission_request = MESS_01; + 725:Src/main.c **** CPU_state = CPU_state_old; + 726:Src/main.c **** break; + 727:Src/main.c **** case AD9102_WAVE_DATA_CMD://15 - Write custom AD9102 SRAM samples + 728:Src/main.c **** State_Data[1] = 0u; + 729:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_DATA_WORDS - 1) == COMMAND[AD9102_WAVE_DATA_WORDS - + 730:Src/main.c **** { + 731:Src/main.c **** uint16_t chunk_count = COMMAND[0]; + ARM GAS /tmp/ccLSPxIe.s page 52 - 732:Src/main.c **** - 733:Src/main.c **** - 734:Src/main.c **** while (task.current_param < task.max_param) - 735:Src/main.c **** { - 736:Src/main.c **** if (TIM10_coflag) - 737:Src/main.c **** { - 738:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 739:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 740:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase - 741:Src/main.c **** task.current_param += task.delta_param; - 742:Src/main.c **** TO10 = 0; - 743:Src/main.c **** TIM10_coflag = 0; - 744:Src/main.c **** - 745:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t - 746:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 747:Src/main.c **** //* - 748:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step - 749:Src/main.c **** OUT_trigger(trigger_counter); - 750:Src/main.c **** ++trigger_counter; - 751:Src/main.c **** } - 752:Src/main.c **** ++step_counter; - 753:Src/main.c **** //*/ - 754:Src/main.c **** /* - 755:Src/main.c **** ++task_sheduler; - 756:Src/main.c **** if (task_sheduler >= 10){ - 757:Src/main.c **** task_sheduler = 0; - 758:Src/main.c **** } - 759:Src/main.c **** //maintain stable temperature of laser 2 - 760:Src/main.c **** if (task_sheduler == 0){ - 761:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 762:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 763:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 764:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 765:Src/main.c **** } - 766:Src/main.c **** //maintain stable temperature of laser 1 - 767:Src/main.c **** //* - 768:Src/main.c **** if (task_sheduler == 5){ - 769:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 770:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 771:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 772:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 773:Src/main.c **** } - 774:Src/main.c **** //*/ - 775:Src/main.c **** } - 776:Src/main.c **** } - 777:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o - 778:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 779:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda - 780:Src/main.c **** //but one-pulse mode should be disabled - 781:Src/main.c **** - 782:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 783:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 732:Src/main.c **** if (!AD9102_WriteWaveUploadChunk(&COMMAND[1], chunk_count)) + 733:Src/main.c **** { + 734:Src/main.c **** AD9102_CancelWaveUpload(); + 735:Src/main.c **** State_Data[0] |= AD9102_ERR; + 736:Src/main.c **** } + 737:Src/main.c **** } + 738:Src/main.c **** else + 739:Src/main.c **** { + 740:Src/main.c **** AD9102_CancelWaveUpload(); + 741:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 742:Src/main.c **** } + 743:Src/main.c **** UART_transmission_request = MESS_01; + 744:Src/main.c **** CPU_state = CPU_state_old; + 745:Src/main.c **** break; + 746:Src/main.c **** case DECODE_TASK: + 747:Src/main.c **** if (CheckChecksum(COMMAND)) + 748:Src/main.c **** { + 749:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 750:Src/main.c **** TO6_before = TO6; + 751:Src/main.c **** CPU_state = RUN_TASK; + 752:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 753:Src/main.c **** } + 754:Src/main.c **** else + 755:Src/main.c **** { + 756:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 757:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 758:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 759:Src/main.c **** } + 760:Src/main.c **** UART_transmission_request = MESS_01; + 761:Src/main.c **** break; + 762:Src/main.c **** case RUN_TASK: + 763:Src/main.c **** switch (task.task_type) + 764:Src/main.c **** { + 765:Src/main.c **** case TT_CHANGE_CURR_1: + 766:Src/main.c **** + 767:Src/main.c **** + 768:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator + 769:Src/main.c **** //ADC clock + 770:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz + 771:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz + 772:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz + 773:Src/main.c **** + 774:Src/main.c **** //online calculation for debug purposes: + 775:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running + 776:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; + 777:Src/main.c **** + 778:Src/main.c **** + 779:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) + 780:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; + 781:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 782:Src/main.c **** + 783:Src/main.c **** 784:Src/main.c **** - 785:Src/main.c **** - 786:Src/main.c **** - 787:Src/main.c **** Stop_TIM10(); - 788:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 53 + 785:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); + 786:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 787:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 788:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + ARM GAS /tmp/ccLSPxIe.s page 53 - 789:Src/main.c **** task.current_param = task.min_param; - 790:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 791:Src/main.c **** if (task.tau > 3) - 792:Src/main.c **** { - 793:Src/main.c **** TIM10_period = htim10.Init.Period; - 794:Src/main.c **** htim10.Init.Period = 9999; - 795:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 796:Src/main.c **** } - 797:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 798:Src/main.c **** break; - 799:Src/main.c **** case TT_CHANGE_CURR_2: - 800:Src/main.c **** //Blink laser 2 - 801:Src/main.c **** //* - 802:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 803:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 804:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 805:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 806:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 807:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 808:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 809:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 810:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 811:Src/main.c **** - 812:Src/main.c **** LD_blinker.task_type = 2; - 813:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 814:Src/main.c **** //LD_blinker.param = task.current_param; - 815:Src/main.c **** LD_blinker.param = 0; - 816:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 817:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 818:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 789:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 790:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 791:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 792:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 793:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 794:Src/main.c **** + 795:Src/main.c **** // Toggle pin for oscilloscope + 796:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc + 797:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 798:Src/main.c **** + 799:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 800:Src/main.c **** if (st != HAL_OK) + 801:Src/main.c **** while(1); + 802:Src/main.c **** + 803:Src/main.c **** uint16_t step_counter = 0; + 804:Src/main.c **** uint16_t trigger_counter = 0; + 805:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 806:Src/main.c **** uint16_t task_sheduler = 0; + 807:Src/main.c **** + 808:Src/main.c **** + 809:Src/main.c **** + 810:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 811:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 812:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 813:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 814:Src/main.c **** + 815:Src/main.c **** + 816:Src/main.c **** + 817:Src/main.c **** TIM11 -> CNT = 0; + 818:Src/main.c **** TIM4 -> CNT = 0; 819:Src/main.c **** - 820:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). - 821:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 822:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); - 823:Src/main.c **** if (st != HAL_OK) - 824:Src/main.c **** while(1); - 825:Src/main.c **** // */ + 820:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 821:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 822:Src/main.c **** //TIM4 -> CNT = 0; + 823:Src/main.c **** + 824:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de + 825:Src/main.c **** TIM11 -> CNT = 0; 826:Src/main.c **** - 827:Src/main.c **** // Toggle pin for oscilloscope - 828:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 829:Src/main.c **** uint32_t i = 10000; while (--i){} - 830:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 831:Src/main.c **** LD_blinker.state = 2; - 832:Src/main.c **** - 833:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 834:Src/main.c **** if (st != HAL_OK) - 835:Src/main.c **** while(1); - 836:Src/main.c **** while (task.current_param < task.max_param) - 837:Src/main.c **** { - 838:Src/main.c **** if (TIM10_coflag) - 839:Src/main.c **** { - 840:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 841:Src/main.c **** //LD_blinker.param = task.current_param; - 842:Src/main.c **** //++LD_blinker.param; - 843:Src/main.c **** task.current_param += task.delta_param; - 844:Src/main.c **** TO10 = 0; - 845:Src/main.c **** TIM10_coflag = 0; - ARM GAS /tmp/ccuHnxNu.s page 54 + 827:Src/main.c **** + 828:Src/main.c **** while (task.current_param < task.max_param) + 829:Src/main.c **** { + 830:Src/main.c **** if (TIM10_coflag) + 831:Src/main.c **** { + 832:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 833:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 834:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase + 835:Src/main.c **** task.current_param += task.delta_param; + 836:Src/main.c **** TO10 = 0; + 837:Src/main.c **** TIM10_coflag = 0; + 838:Src/main.c **** + 839:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t + 840:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 841:Src/main.c **** //* + 842:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step + 843:Src/main.c **** OUT_trigger(trigger_counter); + 844:Src/main.c **** ++trigger_counter; + 845:Src/main.c **** } + ARM GAS /tmp/ccLSPxIe.s page 54 - 846:Src/main.c **** - 847:Src/main.c **** - 848:Src/main.c **** } - 849:Src/main.c **** } - 850:Src/main.c **** HAL_TIM_Base_Stop(&htim10); - 851:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 852:Src/main.c **** - 853:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 854:Src/main.c **** - 855:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); - 856:Src/main.c **** TIM8->CNT = 0; - 857:Src/main.c **** - 858:Src/main.c **** Stop_TIM10(); - 859:Src/main.c **** task.current_param = task.min_param; - 860:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 861:Src/main.c **** if (task.tau > 3) - 862:Src/main.c **** { - 863:Src/main.c **** TIM10_period = htim10.Init.Period; - 864:Src/main.c **** htim10.Init.Period = 9999; - 865:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 866:Src/main.c **** } - 867:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 868:Src/main.c **** - 869:Src/main.c **** - 870:Src/main.c **** //*/ - 871:Src/main.c **** - 872:Src/main.c **** /* // Backup - 873:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 874:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 875:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 876:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 877:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 878:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 879:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 880:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 881:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 846:Src/main.c **** ++step_counter; + 847:Src/main.c **** //*/ + 848:Src/main.c **** /* + 849:Src/main.c **** ++task_sheduler; + 850:Src/main.c **** if (task_sheduler >= 10){ + 851:Src/main.c **** task_sheduler = 0; + 852:Src/main.c **** } + 853:Src/main.c **** //maintain stable temperature of laser 2 + 854:Src/main.c **** if (task_sheduler == 0){ + 855:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 856:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 857:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 858:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 859:Src/main.c **** } + 860:Src/main.c **** //maintain stable temperature of laser 1 + 861:Src/main.c **** //* + 862:Src/main.c **** if (task_sheduler == 5){ + 863:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 864:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 865:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 866:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 867:Src/main.c **** } + 868:Src/main.c **** //*/ + 869:Src/main.c **** } + 870:Src/main.c **** } + 871:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o + 872:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 873:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda + 874:Src/main.c **** //but one-pulse mode should be disabled + 875:Src/main.c **** + 876:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 877:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 878:Src/main.c **** + 879:Src/main.c **** + 880:Src/main.c **** + 881:Src/main.c **** Stop_TIM10(); 882:Src/main.c **** - 883:Src/main.c **** // Toggle pin for oscilloscope - 884:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 885:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 886:Src/main.c **** - 887:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 888:Src/main.c **** if (st != HAL_OK) - 889:Src/main.c **** while(1); - 890:Src/main.c **** while (task.current_param < task.max_param) - 891:Src/main.c **** { - 892:Src/main.c **** if (TIM10_coflag) - 893:Src/main.c **** { - 894:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 895:Src/main.c **** task.current_param += task.delta_param; - 896:Src/main.c **** TO10 = 0; - 897:Src/main.c **** TIM10_coflag = 0; - 898:Src/main.c **** - 899:Src/main.c **** - 900:Src/main.c **** } - 901:Src/main.c **** } - 902:Src/main.c **** Stop_TIM10(); - ARM GAS /tmp/ccuHnxNu.s page 55 + 883:Src/main.c **** task.current_param = task.min_param; + 884:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 885:Src/main.c **** if (task.tau > 3) + 886:Src/main.c **** { + 887:Src/main.c **** TIM10_period = htim10.Init.Period; + 888:Src/main.c **** htim10.Init.Period = 9999; + 889:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 890:Src/main.c **** } + 891:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 892:Src/main.c **** break; + 893:Src/main.c **** case TT_CHANGE_CURR_2: + 894:Src/main.c **** //Blink laser 2 + 895:Src/main.c **** //* + 896:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 897:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 898:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 899:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 900:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 901:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 902:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + ARM GAS /tmp/ccLSPxIe.s page 55 - 903:Src/main.c **** task.current_param = task.min_param; - 904:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 905:Src/main.c **** if (task.tau > 3) - 906:Src/main.c **** { - 907:Src/main.c **** TIM10_period = htim10.Init.Period; - 908:Src/main.c **** htim10.Init.Period = 9999; - 909:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 910:Src/main.c **** } - 911:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 912:Src/main.c **** */ + 903:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 904:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 905:Src/main.c **** + 906:Src/main.c **** LD_blinker.task_type = 2; + 907:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 908:Src/main.c **** //LD_blinker.param = task.current_param; + 909:Src/main.c **** LD_blinker.param = 0; + 910:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 911:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 912:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; 913:Src/main.c **** - 914:Src/main.c **** - 915:Src/main.c **** break; - 916:Src/main.c **** case TT_CHANGE_TEMP_1: - 917:Src/main.c **** // isn't implemented - 918:Src/main.c **** break; - 919:Src/main.c **** case TT_CHANGE_TEMP_2: - 920:Src/main.c **** // isn't implemented - 921:Src/main.c **** break; - 922:Src/main.c **** } - 923:Src/main.c **** - 924:Src/main.c **** if (TO7>TO7_before) - 925:Src/main.c **** { - 926:Src/main.c **** TO7_before = TO7; - 927:Src/main.c **** - 928:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 929:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 930:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 931:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 932:Src/main.c **** - 933:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 934:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 935:Src/main.c **** - 936:Src/main.c **** //Prepare DATA of internals ADCs - 937:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 938:Src/main.c **** temp16 = Get_ADC(0); - 939:Src/main.c **** temp16 = Get_ADC(1); - 940:Src/main.c **** Long_Data[7] = temp16; - 941:Src/main.c **** - 942:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 943:Src/main.c **** temp16 = Get_ADC(1); - 944:Src/main.c **** Long_Data[8] = temp16; - 945:Src/main.c **** - 946:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 947:Src/main.c **** temp16 = Get_ADC(1); - 948:Src/main.c **** Long_Data[9] = temp16; - 949:Src/main.c **** - 950:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 951:Src/main.c **** temp16 = Get_ADC(1); - 952:Src/main.c **** Long_Data[10] = temp16; - 953:Src/main.c **** - 954:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 955:Src/main.c **** temp16 = Get_ADC(1); - 956:Src/main.c **** Long_Data[11] = temp16; - 957:Src/main.c **** temp16 = Get_ADC(2); - 958:Src/main.c **** - 959:Src/main.c **** //Put the temperature of LD2 to Long_Data: - ARM GAS /tmp/ccuHnxNu.s page 56 + 914:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). + 915:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 916:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); + 917:Src/main.c **** if (st != HAL_OK) + 918:Src/main.c **** while(1); + 919:Src/main.c **** // */ + 920:Src/main.c **** + 921:Src/main.c **** // Toggle pin for oscilloscope + 922:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 923:Src/main.c **** uint32_t i = 10000; while (--i){} + 924:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 925:Src/main.c **** LD_blinker.state = 2; + 926:Src/main.c **** + 927:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 928:Src/main.c **** if (st != HAL_OK) + 929:Src/main.c **** while(1); + 930:Src/main.c **** while (task.current_param < task.max_param) + 931:Src/main.c **** { + 932:Src/main.c **** if (TIM10_coflag) + 933:Src/main.c **** { + 934:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 935:Src/main.c **** //LD_blinker.param = task.current_param; + 936:Src/main.c **** //++LD_blinker.param; + 937:Src/main.c **** task.current_param += task.delta_param; + 938:Src/main.c **** TO10 = 0; + 939:Src/main.c **** TIM10_coflag = 0; + 940:Src/main.c **** + 941:Src/main.c **** + 942:Src/main.c **** } + 943:Src/main.c **** } + 944:Src/main.c **** HAL_TIM_Base_Stop(&htim10); + 945:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 946:Src/main.c **** + 947:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 948:Src/main.c **** + 949:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); + 950:Src/main.c **** TIM8->CNT = 0; + 951:Src/main.c **** + 952:Src/main.c **** Stop_TIM10(); + 953:Src/main.c **** task.current_param = task.min_param; + 954:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 955:Src/main.c **** if (task.tau > 3) + 956:Src/main.c **** { + 957:Src/main.c **** TIM10_period = htim10.Init.Period; + 958:Src/main.c **** htim10.Init.Period = 9999; + 959:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + ARM GAS /tmp/ccLSPxIe.s page 56 - 960:Src/main.c **** temp16 = Get_ADC(3); - 961:Src/main.c **** temp16 = Get_ADC(4); - 962:Src/main.c **** Long_Data[12] = temp16; - 963:Src/main.c **** temp16 = Get_ADC(5); - 964:Src/main.c **** - 965:Src/main.c **** //Put the timer tick to Long_Data: - 966:Src/main.c **** TO6_stop = TO6; - 967:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 968:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 969:Src/main.c **** - 970:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 971:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 972:Src/main.c **** - 973:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 974:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 975:Src/main.c **** } - 976:Src/main.c **** while (!TIM10_coflag); - 977:Src/main.c **** - 978:Src/main.c **** Stop_TIM10(); - 979:Src/main.c **** - 980:Src/main.c **** if (task.tau > 3) - 981:Src/main.c **** { - 982:Src/main.c **** htim10.Init.Period = TIM10_period; - 983:Src/main.c **** TO10_counter = task.dt / 10; - 984:Src/main.c **** } - 985:Src/main.c **** - 986:Src/main.c **** CPU_state_old = RUN_TASK; - 987:Src/main.c **** break; - 988:Src/main.c **** } - 989:Src/main.c **** - 990:Src/main.c **** switch (UART_transmission_request) - 991:Src/main.c **** { - 992:Src/main.c **** case MESS_01://Default state - 993:Src/main.c **** USART_TX(State_Data,2); - 994:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 995:Src/main.c **** State_Data[0]=0; - 996:Src/main.c **** State_Data[1]=0;//All OK! - 997:Src/main.c **** UART_transmission_request = NO_MESS; - 998:Src/main.c **** break; - 999:Src/main.c **** case MESS_02://Transmith packet -1000:Src/main.c **** -1001:Src/main.c **** //Find CS and put to Long_Data: -1002:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); -1003:Src/main.c **** Long_Data[DL_16-1] = CS_result; -1004:Src/main.c **** -1005:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) -1006:Src/main.c **** { -1007:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; -1008:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; -1009:Src/main.c **** } -1010:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); -1011:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); -1012:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); -1013:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; -1014:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; -1015:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA -1016:Src/main.c **** UART_transmission_request = NO_MESS; - ARM GAS /tmp/ccuHnxNu.s page 57 + 960:Src/main.c **** } + 961:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 962:Src/main.c **** + 963:Src/main.c **** + 964:Src/main.c **** //*/ + 965:Src/main.c **** + 966:Src/main.c **** /* // Backup + 967:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 968:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 969:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 970:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 971:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 972:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 973:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 974:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 975:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 976:Src/main.c **** + 977:Src/main.c **** // Toggle pin for oscilloscope + 978:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 979:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 980:Src/main.c **** + 981:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 982:Src/main.c **** if (st != HAL_OK) + 983:Src/main.c **** while(1); + 984:Src/main.c **** while (task.current_param < task.max_param) + 985:Src/main.c **** { + 986:Src/main.c **** if (TIM10_coflag) + 987:Src/main.c **** { + 988:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 989:Src/main.c **** task.current_param += task.delta_param; + 990:Src/main.c **** TO10 = 0; + 991:Src/main.c **** TIM10_coflag = 0; + 992:Src/main.c **** + 993:Src/main.c **** + 994:Src/main.c **** } + 995:Src/main.c **** } + 996:Src/main.c **** Stop_TIM10(); + 997:Src/main.c **** task.current_param = task.min_param; + 998:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 999:Src/main.c **** if (task.tau > 3) +1000:Src/main.c **** { +1001:Src/main.c **** TIM10_period = htim10.Init.Period; +1002:Src/main.c **** htim10.Init.Period = 9999; +1003:Src/main.c **** TO10_counter = (task.tau - 1) * 100; +1004:Src/main.c **** } +1005:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); +1006:Src/main.c **** */ +1007:Src/main.c **** +1008:Src/main.c **** +1009:Src/main.c **** break; +1010:Src/main.c **** case TT_CHANGE_TEMP_1: +1011:Src/main.c **** // isn't implemented +1012:Src/main.c **** break; +1013:Src/main.c **** case TT_CHANGE_TEMP_2: +1014:Src/main.c **** // isn't implemented +1015:Src/main.c **** break; +1016:Src/main.c **** } + ARM GAS /tmp/ccLSPxIe.s page 57 -1017:Src/main.c **** break; -1018:Src/main.c **** case MESS_03://Transmith saved packet -1019:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) -1020:Src/main.c **** { -1021:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; -1022:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; -1023:Src/main.c **** } -1024:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); -1025:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); -1026:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; -1027:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; -1028:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA -1029:Src/main.c **** UART_transmission_request = NO_MESS; -1030:Src/main.c **** break; -1031:Src/main.c **** } -1032:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of -1033:Src/main.c **** { -1034:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter -1035:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! -1036:Src/main.c **** UART_transmission_request = MESS_01;//Send status -1037:Src/main.c **** flg_tmt = 0;//Reset timeout flag -1038:Src/main.c **** } -1039:Src/main.c **** /* USER CODE END WHILE */ -1040:Src/main.c **** -1041:Src/main.c **** /* USER CODE BEGIN 3 */ -1042:Src/main.c **** } -1043:Src/main.c **** /* USER CODE END 3 */ -1044:Src/main.c **** } -1045:Src/main.c **** -1046:Src/main.c **** /** -1047:Src/main.c **** * @brief System Clock Configuration -1048:Src/main.c **** * @retval None -1049:Src/main.c **** */ -1050:Src/main.c **** void SystemClock_Config(void) -1051:Src/main.c **** { -1052:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; -1053:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; -1054:Src/main.c **** -1055:Src/main.c **** /** Configure the main internal regulator output voltage -1056:Src/main.c **** */ -1057:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); -1058:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); -1059:Src/main.c **** -1060:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters -1061:Src/main.c **** * in the RCC_OscInitTypeDef structure. -1062:Src/main.c **** */ -1063:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; -1064:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; -1065:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; -1066:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; -1067:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; -1068:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; -1069:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; -1070:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; -1071:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; -1072:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) -1073:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 58 +1017:Src/main.c **** +1018:Src/main.c **** if (TO7>TO7_before) +1019:Src/main.c **** { +1020:Src/main.c **** TO7_before = TO7; +1021:Src/main.c **** +1022:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 +1023:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 +1024:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 +1025:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 +1026:Src/main.c **** +1027:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data +1028:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data +1029:Src/main.c **** +1030:Src/main.c **** //Prepare DATA of internals ADCs +1031:Src/main.c **** //Put the temperature of LD2 to Long_Data: +1032:Src/main.c **** temp16 = Get_ADC(0); +1033:Src/main.c **** temp16 = Get_ADC(1); +1034:Src/main.c **** Long_Data[7] = temp16; +1035:Src/main.c **** +1036:Src/main.c **** //Put the temperature of LD2 to Long_Data: +1037:Src/main.c **** temp16 = Get_ADC(1); +1038:Src/main.c **** Long_Data[8] = temp16; +1039:Src/main.c **** +1040:Src/main.c **** //Put the temperature of LD2 to Long_Data: +1041:Src/main.c **** temp16 = Get_ADC(1); +1042:Src/main.c **** Long_Data[9] = temp16; +1043:Src/main.c **** +1044:Src/main.c **** //Put the temperature of LD2 to Long_Data: +1045:Src/main.c **** temp16 = Get_ADC(1); +1046:Src/main.c **** Long_Data[10] = temp16; +1047:Src/main.c **** +1048:Src/main.c **** //Put the temperature of LD2 to Long_Data: +1049:Src/main.c **** temp16 = Get_ADC(1); +1050:Src/main.c **** Long_Data[11] = temp16; +1051:Src/main.c **** temp16 = Get_ADC(2); +1052:Src/main.c **** +1053:Src/main.c **** //Put the temperature of LD2 to Long_Data: +1054:Src/main.c **** temp16 = Get_ADC(3); +1055:Src/main.c **** temp16 = Get_ADC(4); +1056:Src/main.c **** Long_Data[12] = temp16; +1057:Src/main.c **** temp16 = Get_ADC(5); +1058:Src/main.c **** +1059:Src/main.c **** //Put the timer tick to Long_Data: +1060:Src/main.c **** TO6_stop = TO6; +1061:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; +1062:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; +1063:Src/main.c **** +1064:Src/main.c **** //Put the average temperature of LD1 to Long_Data: +1065:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; +1066:Src/main.c **** +1067:Src/main.c **** //Put the average temperature of LD2 to Long_Data: +1068:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; +1069:Src/main.c **** } +1070:Src/main.c **** while (!TIM10_coflag); +1071:Src/main.c **** +1072:Src/main.c **** Stop_TIM10(); +1073:Src/main.c **** + ARM GAS /tmp/ccLSPxIe.s page 58 -1074:Src/main.c **** Error_Handler(); -1075:Src/main.c **** } -1076:Src/main.c **** -1077:Src/main.c **** /** Activate the Over-Drive mode -1078:Src/main.c **** */ -1079:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) -1080:Src/main.c **** { -1081:Src/main.c **** Error_Handler(); -1082:Src/main.c **** } -1083:Src/main.c **** -1084:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks -1085:Src/main.c **** */ -1086:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK -1087:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; -1088:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; -1089:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; -1090:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; -1091:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; -1092:Src/main.c **** -1093:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) -1094:Src/main.c **** { -1095:Src/main.c **** Error_Handler(); -1096:Src/main.c **** } -1097:Src/main.c **** } -1098:Src/main.c **** -1099:Src/main.c **** /** -1100:Src/main.c **** * @brief ADC1 Initialization Function -1101:Src/main.c **** * @param None -1102:Src/main.c **** * @retval None -1103:Src/main.c **** */ -1104:Src/main.c **** static void MX_ADC1_Init(void) -1105:Src/main.c **** { -1106:Src/main.c **** -1107:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ -1108:Src/main.c **** -1109:Src/main.c **** /* USER CODE END ADC1_Init 0 */ -1110:Src/main.c **** -1111:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; -1112:Src/main.c **** -1113:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ -1114:Src/main.c **** -1115:Src/main.c **** /* USER CODE END ADC1_Init 1 */ -1116:Src/main.c **** -1117:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con -1118:Src/main.c **** */ -1119:Src/main.c **** hadc1.Instance = ADC1; -1120:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; -1121:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; -1122:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; -1123:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; -1124:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; -1125:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; -1126:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; -1127:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; -1128:Src/main.c **** hadc1.Init.NbrOfConversion = 5; -1129:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; -1130:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - ARM GAS /tmp/ccuHnxNu.s page 59 +1074:Src/main.c **** if (task.tau > 3) +1075:Src/main.c **** { +1076:Src/main.c **** htim10.Init.Period = TIM10_period; +1077:Src/main.c **** TO10_counter = task.dt / 10; +1078:Src/main.c **** } +1079:Src/main.c **** +1080:Src/main.c **** CPU_state_old = RUN_TASK; +1081:Src/main.c **** break; +1082:Src/main.c **** } +1083:Src/main.c **** +1084:Src/main.c **** switch (UART_transmission_request) +1085:Src/main.c **** { +1086:Src/main.c **** case MESS_01://Default state +1087:Src/main.c **** USART_TX(State_Data,2); +1088:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); +1089:Src/main.c **** State_Data[0]=0; +1090:Src/main.c **** State_Data[1]=0;//All OK! +1091:Src/main.c **** UART_transmission_request = NO_MESS; +1092:Src/main.c **** break; +1093:Src/main.c **** case MESS_02://Transmith packet +1094:Src/main.c **** +1095:Src/main.c **** //Find CS and put to Long_Data: +1096:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); +1097:Src/main.c **** Long_Data[DL_16-1] = CS_result; +1098:Src/main.c **** +1099:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) +1100:Src/main.c **** { +1101:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; +1102:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; +1103:Src/main.c **** } +1104:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); +1105:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); +1106:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); +1107:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; +1108:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; +1109:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA +1110:Src/main.c **** UART_transmission_request = NO_MESS; +1111:Src/main.c **** break; +1112:Src/main.c **** case MESS_03://Transmith saved packet +1113:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) +1114:Src/main.c **** { +1115:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; +1116:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; +1117:Src/main.c **** } +1118:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); +1119:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); +1120:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; +1121:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; +1122:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA +1123:Src/main.c **** UART_transmission_request = NO_MESS; +1124:Src/main.c **** break; +1125:Src/main.c **** } +1126:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of +1127:Src/main.c **** { +1128:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter +1129:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! +1130:Src/main.c **** UART_transmission_request = MESS_01;//Send status + ARM GAS /tmp/ccLSPxIe.s page 59 -1131:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) -1132:Src/main.c **** { -1133:Src/main.c **** Error_Handler(); -1134:Src/main.c **** } -1135:Src/main.c **** -1136:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1137:Src/main.c **** */ -1138:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; -1139:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; -1140:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; -1141:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1142:Src/main.c **** { -1143:Src/main.c **** Error_Handler(); -1144:Src/main.c **** } -1145:Src/main.c **** -1146:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1147:Src/main.c **** */ -1148:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; -1149:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; -1150:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1151:Src/main.c **** { -1152:Src/main.c **** Error_Handler(); -1153:Src/main.c **** } -1154:Src/main.c **** -1155:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1131:Src/main.c **** flg_tmt = 0;//Reset timeout flag +1132:Src/main.c **** } +1133:Src/main.c **** /* USER CODE END WHILE */ +1134:Src/main.c **** +1135:Src/main.c **** /* USER CODE BEGIN 3 */ +1136:Src/main.c **** } +1137:Src/main.c **** /* USER CODE END 3 */ +1138:Src/main.c **** } +1139:Src/main.c **** +1140:Src/main.c **** /** +1141:Src/main.c **** * @brief System Clock Configuration +1142:Src/main.c **** * @retval None +1143:Src/main.c **** */ +1144:Src/main.c **** void SystemClock_Config(void) +1145:Src/main.c **** { +1146:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; +1147:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; +1148:Src/main.c **** +1149:Src/main.c **** /** Configure the main internal regulator output voltage +1150:Src/main.c **** */ +1151:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); +1152:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); +1153:Src/main.c **** +1154:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters +1155:Src/main.c **** * in the RCC_OscInitTypeDef structure. 1156:Src/main.c **** */ -1157:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; -1158:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; -1159:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1160:Src/main.c **** { -1161:Src/main.c **** Error_Handler(); -1162:Src/main.c **** } -1163:Src/main.c **** -1164:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1165:Src/main.c **** */ -1166:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; -1167:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; -1168:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1169:Src/main.c **** { -1170:Src/main.c **** Error_Handler(); -1171:Src/main.c **** } -1172:Src/main.c **** -1173:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1174:Src/main.c **** */ -1175:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; -1176:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; -1177:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) -1178:Src/main.c **** { -1179:Src/main.c **** Error_Handler(); -1180:Src/main.c **** } -1181:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ -1182:Src/main.c **** -1183:Src/main.c **** /* USER CODE END ADC1_Init 2 */ -1184:Src/main.c **** -1185:Src/main.c **** } +1157:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; +1158:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; +1159:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; +1160:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; +1161:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; +1162:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; +1163:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; +1164:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; +1165:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; +1166:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) +1167:Src/main.c **** { +1168:Src/main.c **** Error_Handler(); +1169:Src/main.c **** } +1170:Src/main.c **** +1171:Src/main.c **** /** Activate the Over-Drive mode +1172:Src/main.c **** */ +1173:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) +1174:Src/main.c **** { +1175:Src/main.c **** Error_Handler(); +1176:Src/main.c **** } +1177:Src/main.c **** +1178:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks +1179:Src/main.c **** */ +1180:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK +1181:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; +1182:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; +1183:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; +1184:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; +1185:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 1186:Src/main.c **** -1187:Src/main.c **** /** - ARM GAS /tmp/ccuHnxNu.s page 60 +1187:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) + ARM GAS /tmp/ccLSPxIe.s page 60 -1188:Src/main.c **** * @brief ADC3 Initialization Function -1189:Src/main.c **** * @param None -1190:Src/main.c **** * @retval None -1191:Src/main.c **** */ -1192:Src/main.c **** static void MX_ADC3_Init(void) -1193:Src/main.c **** { -1194:Src/main.c **** -1195:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ -1196:Src/main.c **** -1197:Src/main.c **** /* USER CODE END ADC3_Init 0 */ -1198:Src/main.c **** -1199:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; +1188:Src/main.c **** { +1189:Src/main.c **** Error_Handler(); +1190:Src/main.c **** } +1191:Src/main.c **** } +1192:Src/main.c **** +1193:Src/main.c **** /** +1194:Src/main.c **** * @brief ADC1 Initialization Function +1195:Src/main.c **** * @param None +1196:Src/main.c **** * @retval None +1197:Src/main.c **** */ +1198:Src/main.c **** static void MX_ADC1_Init(void) +1199:Src/main.c **** { 1200:Src/main.c **** -1201:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ +1201:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ 1202:Src/main.c **** -1203:Src/main.c **** /* USER CODE END ADC3_Init 1 */ +1203:Src/main.c **** /* USER CODE END ADC1_Init 0 */ 1204:Src/main.c **** -1205:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con -1206:Src/main.c **** */ -1207:Src/main.c **** hadc3.Instance = ADC3; -1208:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; -1209:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; -1210:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; -1211:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; -1212:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; -1213:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; -1214:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; -1215:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; -1216:Src/main.c **** hadc3.Init.NbrOfConversion = 1; -1217:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; -1218:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; -1219:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) -1220:Src/main.c **** { -1221:Src/main.c **** Error_Handler(); -1222:Src/main.c **** } -1223:Src/main.c **** -1224:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it -1225:Src/main.c **** */ -1226:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; -1227:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; -1228:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; -1229:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) -1230:Src/main.c **** { -1231:Src/main.c **** Error_Handler(); -1232:Src/main.c **** } -1233:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ -1234:Src/main.c **** -1235:Src/main.c **** /* USER CODE END ADC3_Init 2 */ -1236:Src/main.c **** -1237:Src/main.c **** } -1238:Src/main.c **** -1239:Src/main.c **** /** -1240:Src/main.c **** * @brief SDMMC1 Initialization Function -1241:Src/main.c **** * @param None -1242:Src/main.c **** * @retval None -1243:Src/main.c **** */ -1244:Src/main.c **** static void MX_SDMMC1_SD_Init(void) - ARM GAS /tmp/ccuHnxNu.s page 61 +1205:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; +1206:Src/main.c **** +1207:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ +1208:Src/main.c **** +1209:Src/main.c **** /* USER CODE END ADC1_Init 1 */ +1210:Src/main.c **** +1211:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con +1212:Src/main.c **** */ +1213:Src/main.c **** hadc1.Instance = ADC1; +1214:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; +1215:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; +1216:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; +1217:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; +1218:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; +1219:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; +1220:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; +1221:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; +1222:Src/main.c **** hadc1.Init.NbrOfConversion = 5; +1223:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; +1224:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; +1225:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) +1226:Src/main.c **** { +1227:Src/main.c **** Error_Handler(); +1228:Src/main.c **** } +1229:Src/main.c **** +1230:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1231:Src/main.c **** */ +1232:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; +1233:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; +1234:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; +1235:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1236:Src/main.c **** { +1237:Src/main.c **** Error_Handler(); +1238:Src/main.c **** } +1239:Src/main.c **** +1240:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1241:Src/main.c **** */ +1242:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; +1243:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; +1244:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + ARM GAS /tmp/ccLSPxIe.s page 61 -1245:Src/main.c **** { - 95 .loc 1 1245 1 is_stmt 1 view -0 +1245:Src/main.c **** { +1246:Src/main.c **** Error_Handler(); +1247:Src/main.c **** } +1248:Src/main.c **** +1249:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1250:Src/main.c **** */ +1251:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; +1252:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; +1253:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1254:Src/main.c **** { +1255:Src/main.c **** Error_Handler(); +1256:Src/main.c **** } +1257:Src/main.c **** +1258:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1259:Src/main.c **** */ +1260:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; +1261:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; +1262:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1263:Src/main.c **** { +1264:Src/main.c **** Error_Handler(); +1265:Src/main.c **** } +1266:Src/main.c **** +1267:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1268:Src/main.c **** */ +1269:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; +1270:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; +1271:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) +1272:Src/main.c **** { +1273:Src/main.c **** Error_Handler(); +1274:Src/main.c **** } +1275:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ +1276:Src/main.c **** +1277:Src/main.c **** /* USER CODE END ADC1_Init 2 */ +1278:Src/main.c **** +1279:Src/main.c **** } +1280:Src/main.c **** +1281:Src/main.c **** /** +1282:Src/main.c **** * @brief ADC3 Initialization Function +1283:Src/main.c **** * @param None +1284:Src/main.c **** * @retval None +1285:Src/main.c **** */ +1286:Src/main.c **** static void MX_ADC3_Init(void) +1287:Src/main.c **** { +1288:Src/main.c **** +1289:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ +1290:Src/main.c **** +1291:Src/main.c **** /* USER CODE END ADC3_Init 0 */ +1292:Src/main.c **** +1293:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; +1294:Src/main.c **** +1295:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ +1296:Src/main.c **** +1297:Src/main.c **** /* USER CODE END ADC3_Init 1 */ +1298:Src/main.c **** +1299:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con +1300:Src/main.c **** */ +1301:Src/main.c **** hadc3.Instance = ADC3; + ARM GAS /tmp/ccLSPxIe.s page 62 + + +1302:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; +1303:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; +1304:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; +1305:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; +1306:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; +1307:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; +1308:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; +1309:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; +1310:Src/main.c **** hadc3.Init.NbrOfConversion = 1; +1311:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; +1312:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; +1313:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) +1314:Src/main.c **** { +1315:Src/main.c **** Error_Handler(); +1316:Src/main.c **** } +1317:Src/main.c **** +1318:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it +1319:Src/main.c **** */ +1320:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; +1321:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; +1322:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; +1323:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) +1324:Src/main.c **** { +1325:Src/main.c **** Error_Handler(); +1326:Src/main.c **** } +1327:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ +1328:Src/main.c **** +1329:Src/main.c **** /* USER CODE END ADC3_Init 2 */ +1330:Src/main.c **** +1331:Src/main.c **** } +1332:Src/main.c **** +1333:Src/main.c **** /** +1334:Src/main.c **** * @brief SDMMC1 Initialization Function +1335:Src/main.c **** * @param None +1336:Src/main.c **** * @retval None +1337:Src/main.c **** */ +1338:Src/main.c **** static void MX_SDMMC1_SD_Init(void) +1339:Src/main.c **** { + 95 .loc 1 1339 1 is_stmt 1 view -0 96 .cfi_startproc 97 @ args = 0, pretend = 0, frame = 0 98 @ frame_needed = 0, uses_anonymous_args = 0 99 @ link register save eliminated. -1246:Src/main.c **** -1247:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ -1248:Src/main.c **** -1249:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ -1250:Src/main.c **** -1251:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ -1252:Src/main.c **** -1253:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ -1254:Src/main.c **** hsd1.Instance = SDMMC1; - 100 .loc 1 1254 3 view .LVU21 - 101 .loc 1 1254 17 is_stmt 0 view .LVU22 +1340:Src/main.c **** +1341:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ +1342:Src/main.c **** +1343:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ +1344:Src/main.c **** +1345:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ +1346:Src/main.c **** +1347:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ +1348:Src/main.c **** hsd1.Instance = SDMMC1; + 100 .loc 1 1348 3 view .LVU21 + 101 .loc 1 1348 17 is_stmt 0 view .LVU22 102 0000 064B ldr r3, .L6 103 0002 074A ldr r2, .L6+4 104 0004 1A60 str r2, [r3] -1255:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - 105 .loc 1 1255 3 is_stmt 1 view .LVU23 - 106 .loc 1 1255 23 is_stmt 0 view .LVU24 + ARM GAS /tmp/ccLSPxIe.s page 63 + + +1349:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + 105 .loc 1 1349 3 is_stmt 1 view .LVU23 + 106 .loc 1 1349 23 is_stmt 0 view .LVU24 107 0006 0022 movs r2, #0 108 0008 5A60 str r2, [r3, #4] -1256:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; - 109 .loc 1 1256 3 is_stmt 1 view .LVU25 - 110 .loc 1 1256 25 is_stmt 0 view .LVU26 +1350:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; + 109 .loc 1 1350 3 is_stmt 1 view .LVU25 + 110 .loc 1 1350 25 is_stmt 0 view .LVU26 111 000a 9A60 str r2, [r3, #8] -1257:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - 112 .loc 1 1257 3 is_stmt 1 view .LVU27 - 113 .loc 1 1257 28 is_stmt 0 view .LVU28 +1351:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + 112 .loc 1 1351 3 is_stmt 1 view .LVU27 + 113 .loc 1 1351 28 is_stmt 0 view .LVU28 114 000c DA60 str r2, [r3, #12] -1258:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; - 115 .loc 1 1258 3 is_stmt 1 view .LVU29 - 116 .loc 1 1258 21 is_stmt 0 view .LVU30 +1352:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; + 115 .loc 1 1352 3 is_stmt 1 view .LVU29 + 116 .loc 1 1352 21 is_stmt 0 view .LVU30 117 000e 4FF40061 mov r1, #2048 118 0012 1961 str r1, [r3, #16] -1259:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - 119 .loc 1 1259 3 is_stmt 1 view .LVU31 - 120 .loc 1 1259 33 is_stmt 0 view .LVU32 +1353:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + 119 .loc 1 1353 3 is_stmt 1 view .LVU31 + 120 .loc 1 1353 33 is_stmt 0 view .LVU32 121 0014 5A61 str r2, [r3, #20] -1260:Src/main.c **** hsd1.Init.ClockDiv = 20; - 122 .loc 1 1260 3 is_stmt 1 view .LVU33 - 123 .loc 1 1260 22 is_stmt 0 view .LVU34 +1354:Src/main.c **** hsd1.Init.ClockDiv = 20; + 122 .loc 1 1354 3 is_stmt 1 view .LVU33 + 123 .loc 1 1354 22 is_stmt 0 view .LVU34 124 0016 1422 movs r2, #20 125 0018 9A61 str r2, [r3, #24] -1261:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ -1262:Src/main.c **** -1263:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ -1264:Src/main.c **** -1265:Src/main.c **** } - 126 .loc 1 1265 1 view .LVU35 +1355:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ +1356:Src/main.c **** +1357:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ +1358:Src/main.c **** +1359:Src/main.c **** } + 126 .loc 1 1359 1 view .LVU35 127 001a 7047 bx lr 128 .L7: 129 .align 2 130 .L6: - ARM GAS /tmp/ccuHnxNu.s page 62 - - 131 001c 00000000 .word hsd1 132 0020 002C0140 .word 1073818624 133 .cfi_endproc @@ -3672,867 +3769,870 @@ ARM GAS /tmp/ccuHnxNu.s page 1 140 .thumb_func 142 MX_DMA_Init: 143 .LFB1206: -1266:Src/main.c **** -1267:Src/main.c **** /** -1268:Src/main.c **** * @brief SPI2 Initialization Function -1269:Src/main.c **** * @param None -1270:Src/main.c **** * @retval None -1271:Src/main.c **** */ -1272:Src/main.c **** static void MX_SPI2_Init(void) -1273:Src/main.c **** { -1274:Src/main.c **** -1275:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ -1276:Src/main.c **** -1277:Src/main.c **** /* USER CODE END SPI2_Init 0 */ -1278:Src/main.c **** -1279:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1280:Src/main.c **** -1281:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1282:Src/main.c **** -1283:Src/main.c **** /* Peripheral clock enable */ -1284:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); -1285:Src/main.c **** -1286:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); -1287:Src/main.c **** /**SPI2 GPIO Configuration -1288:Src/main.c **** PB13 ------> SPI2_SCK -1289:Src/main.c **** PB14 ------> SPI2_MISO -1290:Src/main.c **** PB15 ------> SPI2_MOSI -1291:Src/main.c **** */ -1292:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1293:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1294:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1295:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1296:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1297:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1298:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1299:Src/main.c **** -1300:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_14; -1301:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1302:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1303:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1304:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1305:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1306:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1307:Src/main.c **** -1308:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; -1309:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1310:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1311:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - ARM GAS /tmp/ccuHnxNu.s page 63 +1360:Src/main.c **** +1361:Src/main.c **** /** +1362:Src/main.c **** * @brief SPI2 Initialization Function +1363:Src/main.c **** * @param None +1364:Src/main.c **** * @retval None +1365:Src/main.c **** */ +1366:Src/main.c **** static void MX_SPI2_Init(void) +1367:Src/main.c **** { +1368:Src/main.c **** + ARM GAS /tmp/ccLSPxIe.s page 64 -1312:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1313:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1314:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1315:Src/main.c **** -1316:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ -1317:Src/main.c **** -1318:Src/main.c **** /* USER CODE END SPI2_Init 1 */ -1319:Src/main.c **** /* SPI2 parameter configuration*/ -1320:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1321:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1322:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1323:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; -1324:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1325:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1326:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; -1327:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1328:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1329:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1330:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); -1331:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); -1332:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); -1333:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ -1334:Src/main.c **** -1335:Src/main.c **** /* USER CODE END SPI2_Init 2 */ -1336:Src/main.c **** -1337:Src/main.c **** } -1338:Src/main.c **** -1339:Src/main.c **** /** -1340:Src/main.c **** * @brief SPI4 Initialization Function -1341:Src/main.c **** * @param None -1342:Src/main.c **** * @retval None -1343:Src/main.c **** */ -1344:Src/main.c **** static void MX_SPI4_Init(void) -1345:Src/main.c **** { -1346:Src/main.c **** -1347:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ -1348:Src/main.c **** -1349:Src/main.c **** /* USER CODE END SPI4_Init 0 */ -1350:Src/main.c **** -1351:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1352:Src/main.c **** -1353:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1354:Src/main.c **** -1355:Src/main.c **** /* Peripheral clock enable */ -1356:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); -1357:Src/main.c **** -1358:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); -1359:Src/main.c **** /**SPI4 GPIO Configuration -1360:Src/main.c **** PE12 ------> SPI4_SCK -1361:Src/main.c **** PE13 ------> SPI4_MISO -1362:Src/main.c **** */ -1363:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; -1364:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1365:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1366:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1367:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1368:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - ARM GAS /tmp/ccuHnxNu.s page 64 - - -1369:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1369:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ 1370:Src/main.c **** -1371:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1372:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1373:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1374:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1375:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1376:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1377:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1378:Src/main.c **** -1379:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ -1380:Src/main.c **** -1381:Src/main.c **** /* USER CODE END SPI4_Init 1 */ -1382:Src/main.c **** /* SPI4 parameter configuration*/ -1383:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1384:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1385:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1386:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1387:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1388:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1389:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1390:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1391:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1392:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1393:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); -1394:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); -1395:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); -1396:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ -1397:Src/main.c **** -1398:Src/main.c **** /* USER CODE END SPI4_Init 2 */ -1399:Src/main.c **** -1400:Src/main.c **** } +1371:Src/main.c **** /* USER CODE END SPI2_Init 0 */ +1372:Src/main.c **** +1373:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1374:Src/main.c **** +1375:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1376:Src/main.c **** +1377:Src/main.c **** /* Peripheral clock enable */ +1378:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); +1379:Src/main.c **** +1380:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); +1381:Src/main.c **** /**SPI2 GPIO Configuration +1382:Src/main.c **** PB13 ------> SPI2_SCK +1383:Src/main.c **** PB14 ------> SPI2_MISO +1384:Src/main.c **** PB15 ------> SPI2_MOSI +1385:Src/main.c **** */ +1386:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1387:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1388:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1389:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1390:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1391:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1392:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1393:Src/main.c **** +1394:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_14; +1395:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1396:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1397:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1398:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1399:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1400:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1401:Src/main.c **** -1402:Src/main.c **** /** -1403:Src/main.c **** * @brief SPI5 Initialization Function -1404:Src/main.c **** * @param None -1405:Src/main.c **** * @retval None -1406:Src/main.c **** */ -1407:Src/main.c **** static void MX_SPI5_Init(void) -1408:Src/main.c **** { +1402:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; +1403:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1404:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1405:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1406:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1407:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1408:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1409:Src/main.c **** -1410:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ +1410:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ 1411:Src/main.c **** -1412:Src/main.c **** /* USER CODE END SPI5_Init 0 */ -1413:Src/main.c **** -1414:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1415:Src/main.c **** -1416:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1417:Src/main.c **** -1418:Src/main.c **** /* Peripheral clock enable */ -1419:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); -1420:Src/main.c **** -1421:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); -1422:Src/main.c **** /**SPI5 GPIO Configuration -1423:Src/main.c **** PF7 ------> SPI5_SCK -1424:Src/main.c **** PF8 ------> SPI5_MISO -1425:Src/main.c **** */ - ARM GAS /tmp/ccuHnxNu.s page 65 +1412:Src/main.c **** /* USER CODE END SPI2_Init 1 */ +1413:Src/main.c **** /* SPI2 parameter configuration*/ +1414:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1415:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1416:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1417:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; +1418:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1419:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1420:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; +1421:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1422:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1423:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1424:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); +1425:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); + ARM GAS /tmp/ccLSPxIe.s page 65 -1426:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1427:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1428:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1429:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1430:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1431:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1432:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1433:Src/main.c **** -1434:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; -1435:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1436:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1437:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1438:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1439:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1440:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1441:Src/main.c **** -1442:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ -1443:Src/main.c **** -1444:Src/main.c **** /* USER CODE END SPI5_Init 1 */ -1445:Src/main.c **** /* SPI5 parameter configuration*/ -1446:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1447:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1448:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1449:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1450:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1451:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1452:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1453:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1454:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1455:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1456:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); -1457:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); -1458:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); -1459:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ -1460:Src/main.c **** -1461:Src/main.c **** /* USER CODE END SPI5_Init 2 */ -1462:Src/main.c **** -1463:Src/main.c **** } +1426:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); +1427:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ +1428:Src/main.c **** +1429:Src/main.c **** /* USER CODE END SPI2_Init 2 */ +1430:Src/main.c **** +1431:Src/main.c **** } +1432:Src/main.c **** +1433:Src/main.c **** /** +1434:Src/main.c **** * @brief SPI4 Initialization Function +1435:Src/main.c **** * @param None +1436:Src/main.c **** * @retval None +1437:Src/main.c **** */ +1438:Src/main.c **** static void MX_SPI4_Init(void) +1439:Src/main.c **** { +1440:Src/main.c **** +1441:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ +1442:Src/main.c **** +1443:Src/main.c **** /* USER CODE END SPI4_Init 0 */ +1444:Src/main.c **** +1445:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1446:Src/main.c **** +1447:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1448:Src/main.c **** +1449:Src/main.c **** /* Peripheral clock enable */ +1450:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); +1451:Src/main.c **** +1452:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); +1453:Src/main.c **** /**SPI4 GPIO Configuration +1454:Src/main.c **** PE12 ------> SPI4_SCK +1455:Src/main.c **** PE13 ------> SPI4_MISO +1456:Src/main.c **** */ +1457:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; +1458:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1459:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1460:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1461:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1462:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1463:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); 1464:Src/main.c **** -1465:Src/main.c **** /** -1466:Src/main.c **** * @brief SPI6 Initialization Function -1467:Src/main.c **** * @param None -1468:Src/main.c **** * @retval None -1469:Src/main.c **** */ -1470:Src/main.c **** static void MX_SPI6_Init(void) -1471:Src/main.c **** { +1465:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1466:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1467:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1468:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1469:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1470:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1471:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); 1472:Src/main.c **** -1473:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ +1473:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ 1474:Src/main.c **** -1475:Src/main.c **** /* USER CODE END SPI6_Init 0 */ -1476:Src/main.c **** -1477:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; -1478:Src/main.c **** -1479:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1480:Src/main.c **** -1481:Src/main.c **** /* Peripheral clock enable */ -1482:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); - ARM GAS /tmp/ccuHnxNu.s page 66 +1475:Src/main.c **** /* USER CODE END SPI4_Init 1 */ +1476:Src/main.c **** /* SPI4 parameter configuration*/ +1477:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1478:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1479:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1480:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1481:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1482:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + ARM GAS /tmp/ccLSPxIe.s page 66 -1483:Src/main.c **** -1484:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1485:Src/main.c **** /**SPI6 GPIO Configuration -1486:Src/main.c **** PA5 ------> SPI6_SCK -1487:Src/main.c **** PA7 ------> SPI6_MOSI -1488:Src/main.c **** */ -1489:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; -1490:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1491:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1492:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1493:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1494:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; -1495:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1496:Src/main.c **** -1497:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1498:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1499:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1500:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1501:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1502:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; -1503:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1504:Src/main.c **** -1505:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ -1506:Src/main.c **** -1507:Src/main.c **** /* USER CODE END SPI6_Init 1 */ -1508:Src/main.c **** /* SPI6 parameter configuration*/ -1509:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1510:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1511:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1512:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1513:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; -1514:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1515:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1516:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1517:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1518:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1519:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); -1520:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); -1521:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); -1522:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ -1523:Src/main.c **** -1524:Src/main.c **** /* USER CODE END SPI6_Init 2 */ -1525:Src/main.c **** -1526:Src/main.c **** } +1483:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1484:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1485:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1486:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1487:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); +1488:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); +1489:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); +1490:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ +1491:Src/main.c **** +1492:Src/main.c **** /* USER CODE END SPI4_Init 2 */ +1493:Src/main.c **** +1494:Src/main.c **** } +1495:Src/main.c **** +1496:Src/main.c **** /** +1497:Src/main.c **** * @brief SPI5 Initialization Function +1498:Src/main.c **** * @param None +1499:Src/main.c **** * @retval None +1500:Src/main.c **** */ +1501:Src/main.c **** static void MX_SPI5_Init(void) +1502:Src/main.c **** { +1503:Src/main.c **** +1504:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ +1505:Src/main.c **** +1506:Src/main.c **** /* USER CODE END SPI5_Init 0 */ +1507:Src/main.c **** +1508:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1509:Src/main.c **** +1510:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1511:Src/main.c **** +1512:Src/main.c **** /* Peripheral clock enable */ +1513:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); +1514:Src/main.c **** +1515:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); +1516:Src/main.c **** /**SPI5 GPIO Configuration +1517:Src/main.c **** PF7 ------> SPI5_SCK +1518:Src/main.c **** PF8 ------> SPI5_MISO +1519:Src/main.c **** */ +1520:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1521:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1522:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1523:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1524:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1525:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1526:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); 1527:Src/main.c **** -1528:Src/main.c **** /** -1529:Src/main.c **** * @brief TIM2 Initialization Function -1530:Src/main.c **** * @param None -1531:Src/main.c **** * @retval None -1532:Src/main.c **** */ -1533:Src/main.c **** static void MX_TIM2_Init(void) -1534:Src/main.c **** { +1528:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; +1529:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1530:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1531:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1532:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1533:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1534:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); 1535:Src/main.c **** -1536:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ +1536:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ 1537:Src/main.c **** -1538:Src/main.c **** /* USER CODE END TIM2_Init 0 */ -1539:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 67 +1538:Src/main.c **** /* USER CODE END SPI5_Init 1 */ +1539:Src/main.c **** /* SPI5 parameter configuration*/ + ARM GAS /tmp/ccLSPxIe.s page 67 -1540:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1541:Src/main.c **** -1542:Src/main.c **** /* Peripheral clock enable */ -1543:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); -1544:Src/main.c **** -1545:Src/main.c **** /* TIM2 interrupt Init */ -1546:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1547:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); -1548:Src/main.c **** -1549:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ -1550:Src/main.c **** -1551:Src/main.c **** /* USER CODE END TIM2_Init 1 */ -1552:Src/main.c **** TIM_InitStruct.Prescaler = 1000; -1553:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1554:Src/main.c **** TIM_InitStruct.Autoreload = 840000; -1555:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1556:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); -1557:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); -1558:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); -1559:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); -1560:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); -1561:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ -1562:Src/main.c **** -1563:Src/main.c **** /* USER CODE END TIM2_Init 2 */ -1564:Src/main.c **** -1565:Src/main.c **** } +1540:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1541:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1542:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1543:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1544:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1545:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1546:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1547:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1548:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1549:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1550:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); +1551:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); +1552:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); +1553:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ +1554:Src/main.c **** +1555:Src/main.c **** /* USER CODE END SPI5_Init 2 */ +1556:Src/main.c **** +1557:Src/main.c **** } +1558:Src/main.c **** +1559:Src/main.c **** /** +1560:Src/main.c **** * @brief SPI6 Initialization Function +1561:Src/main.c **** * @param None +1562:Src/main.c **** * @retval None +1563:Src/main.c **** */ +1564:Src/main.c **** static void MX_SPI6_Init(void) +1565:Src/main.c **** { 1566:Src/main.c **** -1567:Src/main.c **** /** -1568:Src/main.c **** * @brief TIM4 Initialization Function -1569:Src/main.c **** * @param None -1570:Src/main.c **** * @retval None -1571:Src/main.c **** */ -1572:Src/main.c **** static void MX_TIM4_Init(void) -1573:Src/main.c **** { +1567:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ +1568:Src/main.c **** +1569:Src/main.c **** /* USER CODE END SPI6_Init 0 */ +1570:Src/main.c **** +1571:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1572:Src/main.c **** +1573:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; 1574:Src/main.c **** -1575:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ -1576:Src/main.c **** -1577:Src/main.c **** /* USER CODE END TIM4_Init 0 */ -1578:Src/main.c **** -1579:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1580:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1581:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; -1582:Src/main.c **** -1583:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ -1584:Src/main.c **** -1585:Src/main.c **** /* USER CODE END TIM4_Init 1 */ -1586:Src/main.c **** htim4.Instance = TIM4; -1587:Src/main.c **** htim4.Init.Prescaler = 0; -1588:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; -1589:Src/main.c **** htim4.Init.Period = 45; -1590:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1591:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1592:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) -1593:Src/main.c **** { -1594:Src/main.c **** Error_Handler(); -1595:Src/main.c **** } -1596:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - ARM GAS /tmp/ccuHnxNu.s page 68 +1575:Src/main.c **** /* Peripheral clock enable */ +1576:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); +1577:Src/main.c **** +1578:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +1579:Src/main.c **** /**SPI6 GPIO Configuration +1580:Src/main.c **** PA5 ------> SPI6_SCK +1581:Src/main.c **** PA7 ------> SPI6_MOSI +1582:Src/main.c **** */ +1583:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; +1584:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1585:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1586:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1587:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1588:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; +1589:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1590:Src/main.c **** +1591:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1592:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1593:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1594:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1595:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1596:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + ARM GAS /tmp/ccLSPxIe.s page 68 -1597:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) -1598:Src/main.c **** { -1599:Src/main.c **** Error_Handler(); -1600:Src/main.c **** } -1601:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) -1602:Src/main.c **** { -1603:Src/main.c **** Error_Handler(); -1604:Src/main.c **** } -1605:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1606:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1607:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) -1608:Src/main.c **** { -1609:Src/main.c **** Error_Handler(); -1610:Src/main.c **** } -1611:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1612:Src/main.c **** sConfigOC.Pulse = 22; -1613:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1614:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1615:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) -1616:Src/main.c **** { -1617:Src/main.c **** Error_Handler(); -1618:Src/main.c **** } -1619:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ -1620:Src/main.c **** -1621:Src/main.c **** /* USER CODE END TIM4_Init 2 */ -1622:Src/main.c **** HAL_TIM_MspPostInit(&htim4); -1623:Src/main.c **** -1624:Src/main.c **** } -1625:Src/main.c **** -1626:Src/main.c **** /** -1627:Src/main.c **** * @brief TIM5 Initialization Function -1628:Src/main.c **** * @param None -1629:Src/main.c **** * @retval None -1630:Src/main.c **** */ -1631:Src/main.c **** static void MX_TIM5_Init(void) -1632:Src/main.c **** { +1597:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1598:Src/main.c **** +1599:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ +1600:Src/main.c **** +1601:Src/main.c **** /* USER CODE END SPI6_Init 1 */ +1602:Src/main.c **** /* SPI6 parameter configuration*/ +1603:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1604:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1605:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1606:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1607:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; +1608:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1609:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1610:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1611:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1612:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1613:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); +1614:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); +1615:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); +1616:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ +1617:Src/main.c **** +1618:Src/main.c **** /* USER CODE END SPI6_Init 2 */ +1619:Src/main.c **** +1620:Src/main.c **** } +1621:Src/main.c **** +1622:Src/main.c **** /** +1623:Src/main.c **** * @brief TIM2 Initialization Function +1624:Src/main.c **** * @param None +1625:Src/main.c **** * @retval None +1626:Src/main.c **** */ +1627:Src/main.c **** static void MX_TIM2_Init(void) +1628:Src/main.c **** { +1629:Src/main.c **** +1630:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ +1631:Src/main.c **** +1632:Src/main.c **** /* USER CODE END TIM2_Init 0 */ 1633:Src/main.c **** -1634:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ +1634:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; 1635:Src/main.c **** -1636:Src/main.c **** /* USER CODE END TIM5_Init 0 */ -1637:Src/main.c **** -1638:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1639:Src/main.c **** -1640:Src/main.c **** /* Peripheral clock enable */ -1641:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); +1636:Src/main.c **** /* Peripheral clock enable */ +1637:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); +1638:Src/main.c **** +1639:Src/main.c **** /* TIM2 interrupt Init */ +1640:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1641:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); 1642:Src/main.c **** -1643:Src/main.c **** /* TIM5 interrupt Init */ -1644:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1645:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); -1646:Src/main.c **** -1647:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ -1648:Src/main.c **** -1649:Src/main.c **** /* USER CODE END TIM5_Init 1 */ -1650:Src/main.c **** TIM_InitStruct.Prescaler = 10000; -1651:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1652:Src/main.c **** TIM_InitStruct.Autoreload = 560; -1653:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - ARM GAS /tmp/ccuHnxNu.s page 69 +1643:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ +1644:Src/main.c **** +1645:Src/main.c **** /* USER CODE END TIM2_Init 1 */ +1646:Src/main.c **** TIM_InitStruct.Prescaler = 1000; +1647:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1648:Src/main.c **** TIM_InitStruct.Autoreload = 840000; +1649:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1650:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); +1651:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); +1652:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); +1653:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); + ARM GAS /tmp/ccLSPxIe.s page 69 -1654:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); -1655:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); -1656:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); -1657:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); -1658:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); -1659:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ +1654:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); +1655:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ +1656:Src/main.c **** +1657:Src/main.c **** /* USER CODE END TIM2_Init 2 */ +1658:Src/main.c **** +1659:Src/main.c **** } 1660:Src/main.c **** -1661:Src/main.c **** /* USER CODE END TIM5_Init 2 */ -1662:Src/main.c **** -1663:Src/main.c **** } -1664:Src/main.c **** -1665:Src/main.c **** /** -1666:Src/main.c **** * @brief TIM6 Initialization Function -1667:Src/main.c **** * @param None -1668:Src/main.c **** * @retval None -1669:Src/main.c **** */ -1670:Src/main.c **** static void MX_TIM6_Init(void) -1671:Src/main.c **** { +1661:Src/main.c **** /** +1662:Src/main.c **** * @brief TIM4 Initialization Function +1663:Src/main.c **** * @param None +1664:Src/main.c **** * @retval None +1665:Src/main.c **** */ +1666:Src/main.c **** static void MX_TIM4_Init(void) +1667:Src/main.c **** { +1668:Src/main.c **** +1669:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ +1670:Src/main.c **** +1671:Src/main.c **** /* USER CODE END TIM4_Init 0 */ 1672:Src/main.c **** -1673:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ -1674:Src/main.c **** -1675:Src/main.c **** /* USER CODE END TIM6_Init 0 */ +1673:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1674:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1675:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 1676:Src/main.c **** -1677:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1677:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ 1678:Src/main.c **** -1679:Src/main.c **** /* Peripheral clock enable */ -1680:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); -1681:Src/main.c **** -1682:Src/main.c **** /* TIM6 interrupt Init */ -1683:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1684:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); -1685:Src/main.c **** -1686:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ -1687:Src/main.c **** -1688:Src/main.c **** /* USER CODE END TIM6_Init 1 */ -1689:Src/main.c **** TIM_InitStruct.Prescaler = 45999; -1690:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1691:Src/main.c **** TIM_InitStruct.Autoreload = 19; -1692:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); -1693:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); -1694:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); -1695:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); -1696:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ -1697:Src/main.c **** -1698:Src/main.c **** /* USER CODE END TIM6_Init 2 */ -1699:Src/main.c **** -1700:Src/main.c **** } -1701:Src/main.c **** -1702:Src/main.c **** /** -1703:Src/main.c **** * @brief TIM7 Initialization Function -1704:Src/main.c **** * @param None -1705:Src/main.c **** * @retval None -1706:Src/main.c **** */ -1707:Src/main.c **** static void MX_TIM7_Init(void) -1708:Src/main.c **** { -1709:Src/main.c **** -1710:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ - ARM GAS /tmp/ccuHnxNu.s page 70 +1679:Src/main.c **** /* USER CODE END TIM4_Init 1 */ +1680:Src/main.c **** htim4.Instance = TIM4; +1681:Src/main.c **** htim4.Init.Prescaler = 0; +1682:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; +1683:Src/main.c **** htim4.Init.Period = 45; +1684:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1685:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1686:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) +1687:Src/main.c **** { +1688:Src/main.c **** Error_Handler(); +1689:Src/main.c **** } +1690:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1691:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) +1692:Src/main.c **** { +1693:Src/main.c **** Error_Handler(); +1694:Src/main.c **** } +1695:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) +1696:Src/main.c **** { +1697:Src/main.c **** Error_Handler(); +1698:Src/main.c **** } +1699:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1700:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1701:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) +1702:Src/main.c **** { +1703:Src/main.c **** Error_Handler(); +1704:Src/main.c **** } +1705:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1706:Src/main.c **** sConfigOC.Pulse = 22; +1707:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1708:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1709:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) +1710:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 70 -1711:Src/main.c **** -1712:Src/main.c **** /* USER CODE END TIM7_Init 0 */ -1713:Src/main.c **** -1714:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; -1715:Src/main.c **** -1716:Src/main.c **** /* Peripheral clock enable */ -1717:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); -1718:Src/main.c **** -1719:Src/main.c **** /* TIM7 interrupt Init */ -1720:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1721:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); -1722:Src/main.c **** -1723:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ -1724:Src/main.c **** -1725:Src/main.c **** /* USER CODE END TIM7_Init 1 */ -1726:Src/main.c **** TIM_InitStruct.Prescaler = 919; -1727:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1728:Src/main.c **** TIM_InitStruct.Autoreload = 99; -1729:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); -1730:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); -1731:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); -1732:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); -1733:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ -1734:Src/main.c **** -1735:Src/main.c **** /* USER CODE END TIM7_Init 2 */ +1711:Src/main.c **** Error_Handler(); +1712:Src/main.c **** } +1713:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ +1714:Src/main.c **** +1715:Src/main.c **** /* USER CODE END TIM4_Init 2 */ +1716:Src/main.c **** HAL_TIM_MspPostInit(&htim4); +1717:Src/main.c **** +1718:Src/main.c **** } +1719:Src/main.c **** +1720:Src/main.c **** /** +1721:Src/main.c **** * @brief TIM5 Initialization Function +1722:Src/main.c **** * @param None +1723:Src/main.c **** * @retval None +1724:Src/main.c **** */ +1725:Src/main.c **** static void MX_TIM5_Init(void) +1726:Src/main.c **** { +1727:Src/main.c **** +1728:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ +1729:Src/main.c **** +1730:Src/main.c **** /* USER CODE END TIM5_Init 0 */ +1731:Src/main.c **** +1732:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1733:Src/main.c **** +1734:Src/main.c **** /* Peripheral clock enable */ +1735:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); 1736:Src/main.c **** -1737:Src/main.c **** } -1738:Src/main.c **** -1739:Src/main.c **** /** -1740:Src/main.c **** * @brief TIM8 Initialization Function -1741:Src/main.c **** * @param None -1742:Src/main.c **** * @retval None -1743:Src/main.c **** */ -1744:Src/main.c **** static void MX_TIM8_Init(void) -1745:Src/main.c **** { -1746:Src/main.c **** -1747:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ -1748:Src/main.c **** -1749:Src/main.c **** /* USER CODE END TIM8_Init 0 */ -1750:Src/main.c **** -1751:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1752:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1753:Src/main.c **** -1754:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ -1755:Src/main.c **** -1756:Src/main.c **** /* USER CODE END TIM8_Init 1 */ -1757:Src/main.c **** htim8.Instance = TIM8; -1758:Src/main.c **** htim8.Init.Prescaler = 0; -1759:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; -1760:Src/main.c **** htim8.Init.Period = 91; -1761:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1762:Src/main.c **** htim8.Init.RepetitionCounter = 0; -1763:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1764:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) -1765:Src/main.c **** { -1766:Src/main.c **** Error_Handler(); -1767:Src/main.c **** } - ARM GAS /tmp/ccuHnxNu.s page 71 +1737:Src/main.c **** /* TIM5 interrupt Init */ +1738:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1739:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); +1740:Src/main.c **** +1741:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ +1742:Src/main.c **** +1743:Src/main.c **** /* USER CODE END TIM5_Init 1 */ +1744:Src/main.c **** TIM_InitStruct.Prescaler = 10000; +1745:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1746:Src/main.c **** TIM_InitStruct.Autoreload = 560; +1747:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1748:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); +1749:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); +1750:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); +1751:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); +1752:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); +1753:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ +1754:Src/main.c **** +1755:Src/main.c **** /* USER CODE END TIM5_Init 2 */ +1756:Src/main.c **** +1757:Src/main.c **** } +1758:Src/main.c **** +1759:Src/main.c **** /** +1760:Src/main.c **** * @brief TIM6 Initialization Function +1761:Src/main.c **** * @param None +1762:Src/main.c **** * @retval None +1763:Src/main.c **** */ +1764:Src/main.c **** static void MX_TIM6_Init(void) +1765:Src/main.c **** { +1766:Src/main.c **** +1767:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ + ARM GAS /tmp/ccLSPxIe.s page 71 -1768:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1769:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) -1770:Src/main.c **** { -1771:Src/main.c **** Error_Handler(); -1772:Src/main.c **** } -1773:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1774:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; -1775:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1776:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) -1777:Src/main.c **** { -1778:Src/main.c **** Error_Handler(); -1779:Src/main.c **** } -1780:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ +1768:Src/main.c **** +1769:Src/main.c **** /* USER CODE END TIM6_Init 0 */ +1770:Src/main.c **** +1771:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1772:Src/main.c **** +1773:Src/main.c **** /* Peripheral clock enable */ +1774:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); +1775:Src/main.c **** +1776:Src/main.c **** /* TIM6 interrupt Init */ +1777:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1778:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); +1779:Src/main.c **** +1780:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ 1781:Src/main.c **** -1782:Src/main.c **** /* USER CODE END TIM8_Init 2 */ -1783:Src/main.c **** -1784:Src/main.c **** } -1785:Src/main.c **** -1786:Src/main.c **** /** -1787:Src/main.c **** * @brief TIM10 Initialization Function -1788:Src/main.c **** * @param None -1789:Src/main.c **** * @retval None -1790:Src/main.c **** */ -1791:Src/main.c **** static void MX_TIM10_Init(void) -1792:Src/main.c **** { +1782:Src/main.c **** /* USER CODE END TIM6_Init 1 */ +1783:Src/main.c **** TIM_InitStruct.Prescaler = 45999; +1784:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1785:Src/main.c **** TIM_InitStruct.Autoreload = 19; +1786:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); +1787:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); +1788:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); +1789:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); +1790:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ +1791:Src/main.c **** +1792:Src/main.c **** /* USER CODE END TIM6_Init 2 */ 1793:Src/main.c **** -1794:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ +1794:Src/main.c **** } 1795:Src/main.c **** -1796:Src/main.c **** /* USER CODE END TIM10_Init 0 */ -1797:Src/main.c **** -1798:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ -1799:Src/main.c **** -1800:Src/main.c **** /* USER CODE END TIM10_Init 1 */ -1801:Src/main.c **** htim10.Instance = TIM10; -1802:Src/main.c **** htim10.Init.Prescaler = 183; -1803:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; -1804:Src/main.c **** htim10.Init.Period = 9; -1805:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1806:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1807:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) -1808:Src/main.c **** { -1809:Src/main.c **** Error_Handler(); -1810:Src/main.c **** } -1811:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ +1796:Src/main.c **** /** +1797:Src/main.c **** * @brief TIM7 Initialization Function +1798:Src/main.c **** * @param None +1799:Src/main.c **** * @retval None +1800:Src/main.c **** */ +1801:Src/main.c **** static void MX_TIM7_Init(void) +1802:Src/main.c **** { +1803:Src/main.c **** +1804:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ +1805:Src/main.c **** +1806:Src/main.c **** /* USER CODE END TIM7_Init 0 */ +1807:Src/main.c **** +1808:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1809:Src/main.c **** +1810:Src/main.c **** /* Peripheral clock enable */ +1811:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); 1812:Src/main.c **** -1813:Src/main.c **** /* USER CODE END TIM10_Init 2 */ -1814:Src/main.c **** -1815:Src/main.c **** } +1813:Src/main.c **** /* TIM7 interrupt Init */ +1814:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1815:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); 1816:Src/main.c **** -1817:Src/main.c **** /** -1818:Src/main.c **** * @brief TIM11 Initialization Function -1819:Src/main.c **** * @param None -1820:Src/main.c **** * @retval None -1821:Src/main.c **** */ -1822:Src/main.c **** static void MX_TIM11_Init(void) -1823:Src/main.c **** { -1824:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 72 +1817:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ +1818:Src/main.c **** +1819:Src/main.c **** /* USER CODE END TIM7_Init 1 */ +1820:Src/main.c **** TIM_InitStruct.Prescaler = 919; +1821:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1822:Src/main.c **** TIM_InitStruct.Autoreload = 99; +1823:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); +1824:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); + ARM GAS /tmp/ccLSPxIe.s page 72 -1825:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ -1826:Src/main.c **** -1827:Src/main.c **** /* USER CODE END TIM11_Init 0 */ +1825:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); +1826:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); +1827:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ 1828:Src/main.c **** -1829:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1829:Src/main.c **** /* USER CODE END TIM7_Init 2 */ 1830:Src/main.c **** -1831:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ +1831:Src/main.c **** } 1832:Src/main.c **** -1833:Src/main.c **** /* USER CODE END TIM11_Init 1 */ -1834:Src/main.c **** htim11.Instance = TIM11; -1835:Src/main.c **** htim11.Init.Prescaler = 1; -1836:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; -1837:Src/main.c **** htim11.Init.Period = 91; -1838:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1839:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; -1840:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) -1841:Src/main.c **** { -1842:Src/main.c **** Error_Handler(); -1843:Src/main.c **** } -1844:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) -1845:Src/main.c **** { -1846:Src/main.c **** Error_Handler(); -1847:Src/main.c **** } -1848:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1849:Src/main.c **** sConfigOC.Pulse = 91; -1850:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1851:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1852:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) -1853:Src/main.c **** { -1854:Src/main.c **** Error_Handler(); -1855:Src/main.c **** } -1856:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ -1857:Src/main.c **** -1858:Src/main.c **** /* USER CODE END TIM11_Init 2 */ -1859:Src/main.c **** HAL_TIM_MspPostInit(&htim11); -1860:Src/main.c **** -1861:Src/main.c **** } -1862:Src/main.c **** -1863:Src/main.c **** /** -1864:Src/main.c **** * @brief TIM1 Initialization Function -1865:Src/main.c **** * @param None -1866:Src/main.c **** * @retval None -1867:Src/main.c **** */ -1868:Src/main.c **** static void MX_TIM1_Init(void) -1869:Src/main.c **** { -1870:Src/main.c **** -1871:Src/main.c **** /* USER CODE BEGIN TIM1_Init 0 */ -1872:Src/main.c **** -1873:Src/main.c **** /* USER CODE END TIM1_Init 0 */ -1874:Src/main.c **** -1875:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1876:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; -1877:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; -1878:Src/main.c **** -1879:Src/main.c **** /* USER CODE BEGIN TIM1_Init 1 */ -1880:Src/main.c **** -1881:Src/main.c **** /* USER CODE END TIM1_Init 1 */ - ARM GAS /tmp/ccuHnxNu.s page 73 +1833:Src/main.c **** /** +1834:Src/main.c **** * @brief TIM8 Initialization Function +1835:Src/main.c **** * @param None +1836:Src/main.c **** * @retval None +1837:Src/main.c **** */ +1838:Src/main.c **** static void MX_TIM8_Init(void) +1839:Src/main.c **** { +1840:Src/main.c **** +1841:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ +1842:Src/main.c **** +1843:Src/main.c **** /* USER CODE END TIM8_Init 0 */ +1844:Src/main.c **** +1845:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1846:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1847:Src/main.c **** +1848:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ +1849:Src/main.c **** +1850:Src/main.c **** /* USER CODE END TIM8_Init 1 */ +1851:Src/main.c **** htim8.Instance = TIM8; +1852:Src/main.c **** htim8.Init.Prescaler = 0; +1853:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; +1854:Src/main.c **** htim8.Init.Period = 91; +1855:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1856:Src/main.c **** htim8.Init.RepetitionCounter = 0; +1857:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1858:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) +1859:Src/main.c **** { +1860:Src/main.c **** Error_Handler(); +1861:Src/main.c **** } +1862:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1863:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) +1864:Src/main.c **** { +1865:Src/main.c **** Error_Handler(); +1866:Src/main.c **** } +1867:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1868:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; +1869:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1870:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) +1871:Src/main.c **** { +1872:Src/main.c **** Error_Handler(); +1873:Src/main.c **** } +1874:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ +1875:Src/main.c **** +1876:Src/main.c **** /* USER CODE END TIM8_Init 2 */ +1877:Src/main.c **** +1878:Src/main.c **** } +1879:Src/main.c **** +1880:Src/main.c **** /** +1881:Src/main.c **** * @brief TIM10 Initialization Function + ARM GAS /tmp/ccLSPxIe.s page 73 -1882:Src/main.c **** htim1.Instance = TIM1; -1883:Src/main.c **** htim1.Init.Prescaler = 0; -1884:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; -1885:Src/main.c **** htim1.Init.Period = 8; -1886:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1887:Src/main.c **** htim1.Init.RepetitionCounter = 0; -1888:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1889:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) -1890:Src/main.c **** { -1891:Src/main.c **** Error_Handler(); -1892:Src/main.c **** } -1893:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1894:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) -1895:Src/main.c **** { -1896:Src/main.c **** Error_Handler(); -1897:Src/main.c **** } -1898:Src/main.c **** if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) -1899:Src/main.c **** { -1900:Src/main.c **** Error_Handler(); -1901:Src/main.c **** } -1902:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1903:Src/main.c **** sConfigOC.Pulse = 4; -1904:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1905:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1906:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) -1907:Src/main.c **** { -1908:Src/main.c **** Error_Handler(); -1909:Src/main.c **** } -1910:Src/main.c **** sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; -1911:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; -1912:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; -1913:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; -1914:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; -1915:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; -1916:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; -1917:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; -1918:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; -1919:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; -1920:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; -1921:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) -1922:Src/main.c **** { -1923:Src/main.c **** Error_Handler(); -1924:Src/main.c **** } -1925:Src/main.c **** /* USER CODE BEGIN TIM1_Init 2 */ +1882:Src/main.c **** * @param None +1883:Src/main.c **** * @retval None +1884:Src/main.c **** */ +1885:Src/main.c **** static void MX_TIM10_Init(void) +1886:Src/main.c **** { +1887:Src/main.c **** +1888:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ +1889:Src/main.c **** +1890:Src/main.c **** /* USER CODE END TIM10_Init 0 */ +1891:Src/main.c **** +1892:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ +1893:Src/main.c **** +1894:Src/main.c **** /* USER CODE END TIM10_Init 1 */ +1895:Src/main.c **** htim10.Instance = TIM10; +1896:Src/main.c **** htim10.Init.Prescaler = 183; +1897:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; +1898:Src/main.c **** htim10.Init.Period = 9; +1899:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1900:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1901:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) +1902:Src/main.c **** { +1903:Src/main.c **** Error_Handler(); +1904:Src/main.c **** } +1905:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ +1906:Src/main.c **** +1907:Src/main.c **** /* USER CODE END TIM10_Init 2 */ +1908:Src/main.c **** +1909:Src/main.c **** } +1910:Src/main.c **** +1911:Src/main.c **** /** +1912:Src/main.c **** * @brief TIM11 Initialization Function +1913:Src/main.c **** * @param None +1914:Src/main.c **** * @retval None +1915:Src/main.c **** */ +1916:Src/main.c **** static void MX_TIM11_Init(void) +1917:Src/main.c **** { +1918:Src/main.c **** +1919:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ +1920:Src/main.c **** +1921:Src/main.c **** /* USER CODE END TIM11_Init 0 */ +1922:Src/main.c **** +1923:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1924:Src/main.c **** +1925:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ 1926:Src/main.c **** -1927:Src/main.c **** /* USER CODE END TIM1_Init 2 */ -1928:Src/main.c **** HAL_TIM_MspPostInit(&htim1); -1929:Src/main.c **** -1930:Src/main.c **** } -1931:Src/main.c **** -1932:Src/main.c **** /** -1933:Src/main.c **** * @brief UART8 Initialization Function -1934:Src/main.c **** * @param None -1935:Src/main.c **** * @retval None -1936:Src/main.c **** */ -1937:Src/main.c **** static void MX_UART8_Init(void) -1938:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 74 +1927:Src/main.c **** /* USER CODE END TIM11_Init 1 */ +1928:Src/main.c **** htim11.Instance = TIM11; +1929:Src/main.c **** htim11.Init.Prescaler = 1; +1930:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; +1931:Src/main.c **** htim11.Init.Period = 91; +1932:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1933:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; +1934:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) +1935:Src/main.c **** { +1936:Src/main.c **** Error_Handler(); +1937:Src/main.c **** } +1938:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) + ARM GAS /tmp/ccLSPxIe.s page 74 -1939:Src/main.c **** -1940:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ -1941:Src/main.c **** -1942:Src/main.c **** /* USER CODE END UART8_Init 0 */ -1943:Src/main.c **** -1944:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ -1945:Src/main.c **** -1946:Src/main.c **** /* USER CODE END UART8_Init 1 */ -1947:Src/main.c **** huart8.Instance = UART8; -1948:Src/main.c **** huart8.Init.BaudRate = 115200; -1949:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; -1950:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; -1951:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; -1952:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; -1953:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; -1954:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; -1955:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; -1956:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; -1957:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) -1958:Src/main.c **** { -1959:Src/main.c **** Error_Handler(); -1960:Src/main.c **** } -1961:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ -1962:Src/main.c **** -1963:Src/main.c **** /* USER CODE END UART8_Init 2 */ +1939:Src/main.c **** { +1940:Src/main.c **** Error_Handler(); +1941:Src/main.c **** } +1942:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1943:Src/main.c **** sConfigOC.Pulse = 91; +1944:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1945:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1946:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) +1947:Src/main.c **** { +1948:Src/main.c **** Error_Handler(); +1949:Src/main.c **** } +1950:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ +1951:Src/main.c **** +1952:Src/main.c **** /* USER CODE END TIM11_Init 2 */ +1953:Src/main.c **** HAL_TIM_MspPostInit(&htim11); +1954:Src/main.c **** +1955:Src/main.c **** } +1956:Src/main.c **** +1957:Src/main.c **** /** +1958:Src/main.c **** * @brief TIM1 Initialization Function +1959:Src/main.c **** * @param None +1960:Src/main.c **** * @retval None +1961:Src/main.c **** */ +1962:Src/main.c **** static void MX_TIM1_Init(void) +1963:Src/main.c **** { 1964:Src/main.c **** -1965:Src/main.c **** } +1965:Src/main.c **** /* USER CODE BEGIN TIM1_Init 0 */ 1966:Src/main.c **** -1967:Src/main.c **** /** -1968:Src/main.c **** * @brief USART1 Initialization Function -1969:Src/main.c **** * @param None -1970:Src/main.c **** * @retval None -1971:Src/main.c **** */ -1972:Src/main.c **** static void MX_USART1_UART_Init(void) -1973:Src/main.c **** { +1967:Src/main.c **** /* USER CODE END TIM1_Init 0 */ +1968:Src/main.c **** +1969:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1970:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1971:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; +1972:Src/main.c **** +1973:Src/main.c **** /* USER CODE BEGIN TIM1_Init 1 */ 1974:Src/main.c **** -1975:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ -1976:Src/main.c **** -1977:Src/main.c **** /* USER CODE END USART1_Init 0 */ -1978:Src/main.c **** -1979:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; -1980:Src/main.c **** -1981:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1982:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; -1983:Src/main.c **** -1984:Src/main.c **** /** Initializes the peripherals clock -1985:Src/main.c **** */ -1986:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; -1987:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; -1988:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) +1975:Src/main.c **** /* USER CODE END TIM1_Init 1 */ +1976:Src/main.c **** htim1.Instance = TIM1; +1977:Src/main.c **** htim1.Init.Prescaler = 0; +1978:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; +1979:Src/main.c **** htim1.Init.Period = 8; +1980:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1981:Src/main.c **** htim1.Init.RepetitionCounter = 0; +1982:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1983:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) +1984:Src/main.c **** { +1985:Src/main.c **** Error_Handler(); +1986:Src/main.c **** } +1987:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1988:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) 1989:Src/main.c **** { 1990:Src/main.c **** Error_Handler(); 1991:Src/main.c **** } -1992:Src/main.c **** -1993:Src/main.c **** /* Peripheral clock enable */ -1994:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); -1995:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 75 +1992:Src/main.c **** if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) +1993:Src/main.c **** { +1994:Src/main.c **** Error_Handler(); +1995:Src/main.c **** } + ARM GAS /tmp/ccLSPxIe.s page 75 -1996:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1997:Src/main.c **** /**USART1 GPIO Configuration -1998:Src/main.c **** PA9 ------> USART1_TX -1999:Src/main.c **** PA10 ------> USART1_RX -2000:Src/main.c **** */ -2001:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; -2002:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -2003:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -2004:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -2005:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -2006:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -2007:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -2008:Src/main.c **** -2009:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; -2010:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -2011:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -2012:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -2013:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -2014:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -2015:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -2016:Src/main.c **** -2017:Src/main.c **** /* USART1 DMA Init */ -2018:Src/main.c **** -2019:Src/main.c **** /* USART1_TX Init */ -2020:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); -2021:Src/main.c **** -2022:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); +1996:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1997:Src/main.c **** sConfigOC.Pulse = 4; +1998:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1999:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +2000:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) +2001:Src/main.c **** { +2002:Src/main.c **** Error_Handler(); +2003:Src/main.c **** } +2004:Src/main.c **** sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; +2005:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; +2006:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; +2007:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; +2008:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; +2009:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; +2010:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; +2011:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; +2012:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; +2013:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; +2014:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; +2015:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) +2016:Src/main.c **** { +2017:Src/main.c **** Error_Handler(); +2018:Src/main.c **** } +2019:Src/main.c **** /* USER CODE BEGIN TIM1_Init 2 */ +2020:Src/main.c **** +2021:Src/main.c **** /* USER CODE END TIM1_Init 2 */ +2022:Src/main.c **** HAL_TIM_MspPostInit(&htim1); 2023:Src/main.c **** -2024:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); +2024:Src/main.c **** } 2025:Src/main.c **** -2026:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); -2027:Src/main.c **** -2028:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); -2029:Src/main.c **** -2030:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); -2031:Src/main.c **** -2032:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); +2026:Src/main.c **** /** +2027:Src/main.c **** * @brief UART8 Initialization Function +2028:Src/main.c **** * @param None +2029:Src/main.c **** * @retval None +2030:Src/main.c **** */ +2031:Src/main.c **** static void MX_UART8_Init(void) +2032:Src/main.c **** { 2033:Src/main.c **** -2034:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); +2034:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ 2035:Src/main.c **** -2036:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); +2036:Src/main.c **** /* USER CODE END UART8_Init 0 */ 2037:Src/main.c **** -2038:Src/main.c **** /* USART1 interrupt Init */ -2039:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -2040:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); -2041:Src/main.c **** -2042:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ -2043:Src/main.c **** -2044:Src/main.c **** /* USER CODE END USART1_Init 1 */ -2045:Src/main.c **** USART_InitStruct.BaudRate = 115200; -2046:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; -2047:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; -2048:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; -2049:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; -2050:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; -2051:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; -2052:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - ARM GAS /tmp/ccuHnxNu.s page 76 +2038:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ +2039:Src/main.c **** +2040:Src/main.c **** /* USER CODE END UART8_Init 1 */ +2041:Src/main.c **** huart8.Instance = UART8; +2042:Src/main.c **** huart8.Init.BaudRate = 115200; +2043:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; +2044:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; +2045:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; +2046:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; +2047:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; +2048:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; +2049:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; +2050:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; +2051:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) +2052:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 76 -2053:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); -2054:Src/main.c **** LL_USART_Enable(USART1); -2055:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ +2053:Src/main.c **** Error_Handler(); +2054:Src/main.c **** } +2055:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ 2056:Src/main.c **** -2057:Src/main.c **** /* USER CODE END USART1_Init 2 */ +2057:Src/main.c **** /* USER CODE END UART8_Init 2 */ 2058:Src/main.c **** 2059:Src/main.c **** } 2060:Src/main.c **** 2061:Src/main.c **** /** -2062:Src/main.c **** * Enable DMA controller clock -2063:Src/main.c **** */ -2064:Src/main.c **** static void MX_DMA_Init(void) -2065:Src/main.c **** { - 144 .loc 1 2065 1 is_stmt 1 view -0 +2062:Src/main.c **** * @brief USART1 Initialization Function +2063:Src/main.c **** * @param None +2064:Src/main.c **** * @retval None +2065:Src/main.c **** */ +2066:Src/main.c **** static void MX_USART1_UART_Init(void) +2067:Src/main.c **** { +2068:Src/main.c **** +2069:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ +2070:Src/main.c **** +2071:Src/main.c **** /* USER CODE END USART1_Init 0 */ +2072:Src/main.c **** +2073:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; +2074:Src/main.c **** +2075:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +2076:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; +2077:Src/main.c **** +2078:Src/main.c **** /** Initializes the peripherals clock +2079:Src/main.c **** */ +2080:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; +2081:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; +2082:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) +2083:Src/main.c **** { +2084:Src/main.c **** Error_Handler(); +2085:Src/main.c **** } +2086:Src/main.c **** +2087:Src/main.c **** /* Peripheral clock enable */ +2088:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); +2089:Src/main.c **** +2090:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +2091:Src/main.c **** /**USART1 GPIO Configuration +2092:Src/main.c **** PA9 ------> USART1_TX +2093:Src/main.c **** PA10 ------> USART1_RX +2094:Src/main.c **** */ +2095:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; +2096:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +2097:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +2098:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +2099:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +2100:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +2101:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +2102:Src/main.c **** +2103:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; +2104:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +2105:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +2106:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +2107:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +2108:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +2109:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + ARM GAS /tmp/ccLSPxIe.s page 77 + + +2110:Src/main.c **** +2111:Src/main.c **** /* USART1 DMA Init */ +2112:Src/main.c **** +2113:Src/main.c **** /* USART1_TX Init */ +2114:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); +2115:Src/main.c **** +2116:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); +2117:Src/main.c **** +2118:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); +2119:Src/main.c **** +2120:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); +2121:Src/main.c **** +2122:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); +2123:Src/main.c **** +2124:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); +2125:Src/main.c **** +2126:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); +2127:Src/main.c **** +2128:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); +2129:Src/main.c **** +2130:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); +2131:Src/main.c **** +2132:Src/main.c **** /* USART1 interrupt Init */ +2133:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +2134:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); +2135:Src/main.c **** +2136:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ +2137:Src/main.c **** +2138:Src/main.c **** /* USER CODE END USART1_Init 1 */ +2139:Src/main.c **** USART_InitStruct.BaudRate = 115200; +2140:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; +2141:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; +2142:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; +2143:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; +2144:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; +2145:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; +2146:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); +2147:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); +2148:Src/main.c **** LL_USART_Enable(USART1); +2149:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ +2150:Src/main.c **** +2151:Src/main.c **** /* USER CODE END USART1_Init 2 */ +2152:Src/main.c **** +2153:Src/main.c **** } +2154:Src/main.c **** +2155:Src/main.c **** /** +2156:Src/main.c **** * Enable DMA controller clock +2157:Src/main.c **** */ +2158:Src/main.c **** static void MX_DMA_Init(void) +2159:Src/main.c **** { + 144 .loc 1 2159 1 is_stmt 1 view -0 145 .cfi_startproc 146 @ args = 0, pretend = 0, frame = 8 147 @ frame_needed = 0, uses_anonymous_args = 0 148 0000 00B5 push {lr} 149 .LCFI1: 150 .cfi_def_cfa_offset 4 + ARM GAS /tmp/ccLSPxIe.s page 78 + + 151 .cfi_offset 14, -4 152 0002 83B0 sub sp, sp, #12 153 .LCFI2: 154 .cfi_def_cfa_offset 16 -2066:Src/main.c **** -2067:Src/main.c **** /* Init with LL driver */ -2068:Src/main.c **** /* DMA controller clock enable */ -2069:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); - 155 .loc 1 2069 3 view .LVU37 +2160:Src/main.c **** +2161:Src/main.c **** /* Init with LL driver */ +2162:Src/main.c **** /* DMA controller clock enable */ +2163:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); + 155 .loc 1 2163 3 view .LVU37 156 .LVL8: - 157 .LBB352: - 158 .LBI352: + 157 .LBB355: + 158 .LBI355: 159 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ****************************************************************************** @@ -4558,9 +4658,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @endverbatim 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ****************************************************************************** 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @attention - ARM GAS /tmp/ccuHnxNu.s page 77 - - 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * Copyright (c) 2017 STMicroelectronics. 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * All rights reserved. @@ -4581,6 +4678,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/ 44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #include "stm32f7xx.h" + ARM GAS /tmp/ccLSPxIe.s page 79 + + 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @addtogroup STM32F7xx_LL_Driver 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ @@ -4618,9 +4718,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(GPIOJ) 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_GPIOJ RCC_AHB1ENR_GPIOJEN 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* GPIOJ */ - ARM GAS /tmp/ccuHnxNu.s page 78 - - 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(GPIOK) 83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_GPIOK RCC_AHB1ENR_GPIOKEN 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* GPIOK */ @@ -4641,6 +4738,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGHS RCC_AHB1ENR_OTGHSEN 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGHSULPI RCC_AHB1ENR_OTGHSULPIEN 101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_AXI RCC_AHB1LPENR_AXILPEN + ARM GAS /tmp/ccLSPxIe.s page 80 + + 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_FLITF RCC_AHB1LPENR_FLITFLPEN 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM2 RCC_AHB1LPENR_SRAM2LPEN @@ -4678,9 +4778,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB3_GRP1_PERIPH_ALL 0xFFFFFFFFU 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB3_GRP1_PERIPH_FMC RCC_AHB3ENR_FMCEN - ARM GAS /tmp/ccuHnxNu.s page 79 - - 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB3_GRP1_PERIPH_QSPI RCC_AHB3ENR_QSPIEN 140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @} @@ -4701,6 +4798,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM14 RCC_APB1ENR_TIM14EN 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPTIM1 RCC_APB1ENR_LPTIM1EN 158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN + ARM GAS /tmp/ccLSPxIe.s page 81 + + 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPDIFRX) @@ -4738,9 +4838,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH APB2 GRP1 PERIPH - ARM GAS /tmp/ccuHnxNu.s page 80 - - 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ALL 0xFFFFFFFFU @@ -4761,6 +4858,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM9 RCC_APB2ENR_TIM9EN 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM10 RCC_APB2ENR_TIM10EN 215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM11 RCC_APB2ENR_TIM11EN + ARM GAS /tmp/ccLSPxIe.s page 82 + + 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI5 RCC_APB2ENR_SPI5EN 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPI6) 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI6 RCC_APB2ENR_SPI6EN @@ -4798,9 +4898,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB1 AHB1 - ARM GAS /tmp/ccuHnxNu.s page 81 - - 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -4821,6 +4918,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_EnableClock\n 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_EnableClock\n 272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_EnableClock\n + ARM GAS /tmp/ccLSPxIe.s page 83 + + 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock\n 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_EnableClock\n @@ -4858,11 +4958,8 @@ ARM GAS /tmp/ccuHnxNu.s page 1 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) - ARM GAS /tmp/ccuHnxNu.s page 82 - - 160 .loc 3 309 22 view .LVU38 - 161 .LBB353: + 161 .LBB356: 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; 162 .loc 3 311 3 view .LVU39 @@ -4881,46 +4978,46 @@ ARM GAS /tmp/ccuHnxNu.s page 1 172 .loc 3 314 10 view .LVU43 173 0014 0193 str r3, [sp, #4] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + ARM GAS /tmp/ccLSPxIe.s page 84 + + 174 .loc 3 315 3 is_stmt 1 view .LVU44 175 0016 019B ldr r3, [sp, #4] 176 .LVL9: 177 .loc 3 315 3 is_stmt 0 view .LVU45 - 178 .LBE353: - 179 .LBE352: -2070:Src/main.c **** -2071:Src/main.c **** /* DMA interrupt init */ -2072:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ -2073:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); - 180 .loc 1 2073 3 is_stmt 1 view .LVU46 - 181 .LBB354: - 182 .LBI354: + 178 .LBE356: + 179 .LBE355: +2164:Src/main.c **** +2165:Src/main.c **** /* DMA interrupt init */ +2166:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ +2167:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + 180 .loc 1 2167 3 is_stmt 1 view .LVU46 + 181 .LBB357: + 182 .LBI357: 1884:Drivers/CMSIS/Include/core_cm7.h **** { 183 .loc 2 1884 26 view .LVU47 - 184 .LBB355: + 184 .LBB358: 1886:Drivers/CMSIS/Include/core_cm7.h **** } 185 .loc 2 1886 3 view .LVU48 1886:Drivers/CMSIS/Include/core_cm7.h **** } 186 .loc 2 1886 26 is_stmt 0 view .LVU49 187 0018 094B ldr r3, .L10+4 188 001a D868 ldr r0, [r3, #12] - 189 .LBE355: - 190 .LBE354: - 191 .loc 1 2073 3 discriminator 1 view .LVU50 + 189 .LBE358: + 190 .LBE357: + 191 .loc 1 2167 3 discriminator 1 view .LVU50 192 001c 0022 movs r2, #0 193 001e 1146 mov r1, r2 194 0020 C0F30220 ubfx r0, r0, #8, #3 195 0024 FFF7FEFF bl NVIC_EncodePriority 196 .LVL10: - 197 .LBB356: - 198 .LBI356: + 197 .LBB359: + 198 .LBI359: 2024:Drivers/CMSIS/Include/core_cm7.h **** { 199 .loc 2 2024 22 is_stmt 1 view .LVU51 - 200 .LBB357: + 200 .LBB360: 2026:Drivers/CMSIS/Include/core_cm7.h **** { 201 .loc 2 2026 3 view .LVU52 - ARM GAS /tmp/ccuHnxNu.s page 83 - - 2028:Drivers/CMSIS/Include/core_cm7.h **** } 202 .loc 2 2028 5 view .LVU53 2028:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4937,15 +5034,18 @@ ARM GAS /tmp/ccuHnxNu.s page 1 211 .LVL12: 2028:Drivers/CMSIS/Include/core_cm7.h **** } 212 .loc 2 2028 47 view .LVU57 - 213 .LBE357: - 214 .LBE356: -2074:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 215 .loc 1 2074 3 is_stmt 1 view .LVU58 - 216 .LBB358: - 217 .LBI358: + 213 .LBE360: + 214 .LBE359: +2168:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 215 .loc 1 2168 3 is_stmt 1 view .LVU58 + ARM GAS /tmp/ccLSPxIe.s page 85 + + + 216 .LBB361: + 217 .LBI361: 1896:Drivers/CMSIS/Include/core_cm7.h **** { 218 .loc 2 1896 22 view .LVU59 - 219 .LBB359: + 219 .LBB362: 1898:Drivers/CMSIS/Include/core_cm7.h **** { 220 .loc 2 1898 3 view .LVU60 1900:Drivers/CMSIS/Include/core_cm7.h **** } @@ -4957,11 +5057,11 @@ ARM GAS /tmp/ccuHnxNu.s page 1 225 .LVL13: 1900:Drivers/CMSIS/Include/core_cm7.h **** } 226 .loc 2 1900 43 view .LVU63 - 227 .LBE359: - 228 .LBE358: -2075:Src/main.c **** -2076:Src/main.c **** } - 229 .loc 1 2076 1 view .LVU64 + 227 .LBE362: + 228 .LBE361: +2169:Src/main.c **** +2170:Src/main.c **** } + 229 .loc 1 2170 1 view .LVU64 230 0036 03B0 add sp, sp, #12 231 .LCFI3: 232 .cfi_def_cfa_offset 4 @@ -4978,830 +5078,830 @@ ARM GAS /tmp/ccuHnxNu.s page 1 244 .section .text.Decode_task,"ax",%progbits 245 .align 1 246 .syntax unified - ARM GAS /tmp/ccuHnxNu.s page 84 - - 247 .thumb 248 .thumb_func 250 Decode_task: 251 .LVL14: 252 .LFB1210: -2077:Src/main.c **** -2078:Src/main.c **** /** -2079:Src/main.c **** * @brief GPIO Initialization Function -2080:Src/main.c **** * @param None -2081:Src/main.c **** * @retval None -2082:Src/main.c **** */ -2083:Src/main.c **** static void MX_GPIO_Init(void) -2084:Src/main.c **** { -2085:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; -2086:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ -2087:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ -2088:Src/main.c **** -2089:Src/main.c **** /* GPIO Ports Clock Enable */ -2090:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); -2091:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); -2092:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); -2093:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); -2094:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); -2095:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); -2096:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); -2097:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); -2098:Src/main.c **** -2099:Src/main.c **** /*Configure GPIO pin Output Level */ -2100:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -2101:Src/main.c **** -2102:Src/main.c **** /*Configure GPIO pin Output Level */ -2103:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); -2104:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); -2105:Src/main.c **** -2106:Src/main.c **** /*Configure GPIO pin Output Level */ -2107:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); -2108:Src/main.c **** -2109:Src/main.c **** /*Configure GPIO pin Output Level */ -2110:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); -2111:Src/main.c **** -2112:Src/main.c **** /*Configure GPIO pin Output Level */ -2113:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -2114:Src/main.c **** HAL_GPIO_WritePin(GPIOE, DS1809_UC_Pin|DS1809_DC_Pin, GPIO_PIN_SET); -2115:Src/main.c **** -2116:Src/main.c **** /*Configure GPIO pin Output Level */ -2117:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); -2118:Src/main.c **** -2119:Src/main.c **** /*Configure GPIO pin Output Level */ -2120:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin -2121:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); -2122:Src/main.c **** -2123:Src/main.c **** /*Configure GPIO pin Output Level */ -2124:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -2125:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2126:Src/main.c **** -2127:Src/main.c **** /*Configure GPIO pin Output Level */ -2128:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); - ARM GAS /tmp/ccuHnxNu.s page 85 - - -2129:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2130:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET); -2131:Src/main.c **** -2132:Src/main.c **** /*Configure GPIO pin Output Level */ -2133:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -2134:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); -2135:Src/main.c **** -2136:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ -2137:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; -2138:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -2139:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; -2140:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -2141:Src/main.c **** -2142:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ -2143:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; -2144:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2145:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2146:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2147:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -2148:Src/main.c **** -2149:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */ -2150:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin; -2151:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2152:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2153:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2154:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); -2155:Src/main.c **** -2156:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */ -2157:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin; -2158:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2159:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2160:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -2161:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); -2162:Src/main.c **** -2163:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_LD2_CS_Pin */ -2164:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin; -2165:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2166:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2167:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2168:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); -2169:Src/main.c **** -2170:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */ -2171:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin; -2172:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -2173:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2174:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -2175:Src/main.c **** -2176:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin DAC_TEC2_CS_Pin */ -2177:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin|DAC_TEC2_CS_Pin; -2178:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2179:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2180:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2181:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); +2171:Src/main.c **** +2172:Src/main.c **** /** +2173:Src/main.c **** * @brief GPIO Initialization Function +2174:Src/main.c **** * @param None +2175:Src/main.c **** * @retval None +2176:Src/main.c **** */ +2177:Src/main.c **** static void MX_GPIO_Init(void) +2178:Src/main.c **** { +2179:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; +2180:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ +2181:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ 2182:Src/main.c **** -2183:Src/main.c **** /*Configure GPIO pins : DS1809_UC_Pin DS1809_DC_Pin */ -2184:Src/main.c **** GPIO_InitStruct.Pin = DS1809_UC_Pin|DS1809_DC_Pin; -2185:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - ARM GAS /tmp/ccuHnxNu.s page 86 +2183:Src/main.c **** /* GPIO Ports Clock Enable */ +2184:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); +2185:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); + ARM GAS /tmp/ccLSPxIe.s page 86 -2186:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2187:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2188:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); -2189:Src/main.c **** -2190:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */ -2191:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin; -2192:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2193:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2194:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -2195:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); -2196:Src/main.c **** -2197:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin AD9102_CS_Pin -2198:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ -2199:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|AD9102_CS_Pin -2200:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; -2201:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2202:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2203:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2204:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); +2186:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); +2187:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); +2188:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); +2189:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); +2190:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); +2191:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); +2192:Src/main.c **** +2193:Src/main.c **** /*Configure GPIO pin Output Level */ +2194:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +2195:Src/main.c **** +2196:Src/main.c **** /*Configure GPIO pin Output Level */ +2197:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); +2198:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); +2199:Src/main.c **** +2200:Src/main.c **** /*Configure GPIO pin Output Level */ +2201:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); +2202:Src/main.c **** +2203:Src/main.c **** /*Configure GPIO pin Output Level */ +2204:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); 2205:Src/main.c **** -2206:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin DAC_TEC1_CS_Pin AD9833_CS_Pin -2207:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin|DAC_TEC1_CS_Pin|AD9833_CS -2208:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2209:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2210:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2211:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); +2206:Src/main.c **** /*Configure GPIO pin Output Level */ +2207:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +2208:Src/main.c **** HAL_GPIO_WritePin(GPIOE, DS1809_UC_Pin|DS1809_DC_Pin, GPIO_PIN_SET); +2209:Src/main.c **** +2210:Src/main.c **** /*Configure GPIO pin Output Level */ +2211:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); 2212:Src/main.c **** -2213:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */ -2214:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin; -2215:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -2216:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2217:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); -2218:Src/main.c **** -2219:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */ -2220:Src/main.c **** GPIO_InitStruct.Pin = SDMMC1_EN_Pin; -2221:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -2222:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2223:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct); -2224:Src/main.c **** -2225:Src/main.c **** /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin -2226:Src/main.c **** OUT_3_Pin OUT_4_Pin OUT_5_Pin */ -2227:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -2228:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin; -2229:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -2230:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2231:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -2232:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); -2233:Src/main.c **** -2234:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ -2235:Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ -2236:Src/main.c **** } -2237:Src/main.c **** -2238:Src/main.c **** /* USER CODE BEGIN 4 */ -2239:Src/main.c **** -2240:Src/main.c **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { -2241:Src/main.c **** -2242:Src/main.c **** // UART_transmission_request = NO_MESS; - ARM GAS /tmp/ccuHnxNu.s page 87 +2213:Src/main.c **** /*Configure GPIO pin Output Level */ +2214:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin +2215:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); +2216:Src/main.c **** +2217:Src/main.c **** /*Configure GPIO pin Output Level */ +2218:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); +2219:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2220:Src/main.c **** +2221:Src/main.c **** /*Configure GPIO pin Output Level */ +2222:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); +2223:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2224:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET); +2225:Src/main.c **** +2226:Src/main.c **** /*Configure GPIO pin Output Level */ +2227:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin +2228:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); +2229:Src/main.c **** +2230:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ +2231:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; +2232:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +2233:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; +2234:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +2235:Src/main.c **** +2236:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ +2237:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; +2238:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +2239:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2240:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +2241:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +2242:Src/main.c **** + ARM GAS /tmp/ccLSPxIe.s page 87 -2243:Src/main.c **** -2244:Src/main.c **** //} -2245:Src/main.c **** -2246:Src/main.c **** static void Init_params(void) -2247:Src/main.c **** { -2248:Src/main.c **** TO6 = 0; -2249:Src/main.c **** TO7 = 0; -2250:Src/main.c **** TO7_before = 0; -2251:Src/main.c **** TO6_before = 0; -2252:Src/main.c **** TO6_uart = 0; -2253:Src/main.c **** flg_tmt = 0; -2254:Src/main.c **** UART_rec_incr = 0; -2255:Src/main.c **** fgoto = 0; -2256:Src/main.c **** sizeoffile = 0; -2257:Src/main.c **** u_tx_flg = 0; -2258:Src/main.c **** u_rx_flg = 0; -2259:Src/main.c **** //State_Data[0]=0; -2260:Src/main.c **** //State_Data[1]=0;//All OK! -2261:Src/main.c **** for (uint16_t i=0; iWORK_EN = ((uint8_t)((*temp2)>>0))&0x01; -2416:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; -2417:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; -2418:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; -2419:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; -2420:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; -2421:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; -2422:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; -2423:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; -2424:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; -2425:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; -2426:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; -2427:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; -2428:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; -2429:Src/main.c **** -2430:Src/main.c **** temp2++; -2431:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); -2432:Src/main.c **** temp2++; -2433:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); -2434:Src/main.c **** temp2++; -2435:Src/main.c **** temp2++; -2436:Src/main.c **** temp2++; -2437:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); -2438:Src/main.c **** temp2++; -2439:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2440:Src/main.c **** temp2++; -2441:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2442:Src/main.c **** temp2++; -2443:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2444:Src/main.c **** temp2++; -2445:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint -2446:Src/main.c **** temp2++; -2447:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID -2448:Src/main.c **** temp2++; -2449:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); -2450:Src/main.c **** temp2++; -2451:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); -2452:Src/main.c **** temp2++; -2453:Src/main.c **** -2454:Src/main.c **** if (Curr_setup->U5V1_EN) -2455:Src/main.c **** { -2456:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); -2457:Src/main.c **** } -2458:Src/main.c **** else -2459:Src/main.c **** { -2460:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); -2461:Src/main.c **** } -2462:Src/main.c **** -2463:Src/main.c **** if (Curr_setup->U5V2_EN) -2464:Src/main.c **** { -2465:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); -2466:Src/main.c **** } -2467:Src/main.c **** else -2468:Src/main.c **** { -2469:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); -2470:Src/main.c **** } - ARM GAS /tmp/ccuHnxNu.s page 91 +2414:Src/main.c **** //HAL_UART_Receive_IT(&huart1, &uart_buf, 1); +2415:Src/main.c **** +2416:Src/main.c **** +2417:Src/main.c **** SD_SEEK = 0; +2418:Src/main.c **** SD_SLIDE = 0; +2419:Src/main.c **** //Reset all periphery +2420:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); +2421:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); +2422:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); +2423:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); +2424:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); +2425:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); +2426:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); +2427:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); +2428:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); +2429:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); +2430:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) +2431:Src/main.c **** // { +2432:Src/main.c **** // for (uint16_t j = 0; j < DL_16; j++) +2433:Src/main.c **** // { +2434:Src/main.c **** // SD_matr[i][j] = 0; +2435:Src/main.c **** // } +2436:Src/main.c **** // } +2437:Src/main.c **** //LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC +2438:Src/main.c **** //LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC +2439:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD1 ADC +2440:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC +2441:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +2442:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +2443:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 +2444:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 +2445:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 +2446:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 +2447:Src/main.c **** PA4_DAC_Set(0u, 0u); +2448:Src/main.c **** +2449:Src/main.c **** //------------------------------------------------------------------------------------------------ +2450:Src/main.c **** //test = 11; +2451:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)//if exist sd && disconne +2452:Src/main.c **** { +2453:Src/main.c **** //test = 14; +2454:Src/main.c **** if (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_RESET) +2455:Src/main.c **** { +2456:Src/main.c **** //test = 15; +2457:Src/main.c **** test = Mount_SD("/"); +2458:Src/main.c **** if (test == 0) //0 - suc +2459:Src/main.c **** { +2460:Src/main.c **** //Format_SD(); +2461:Src/main.c **** test = Seek_Read_File ("COMMAND.TXT", (uint8_t *)COMMAND, DL_8, DL_8);//Read next DL_8 bytes +2462:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2463:Src/main.c **** UART_rec_incr = 0; +2464:Src/main.c **** flg_tmt = 0;//Reset the timeout flag +2465:Src/main.c **** } +2466:Src/main.c **** // else +2467:Src/main.c **** // { +2468:Src/main.c **** // test = 13; +2469:Src/main.c **** // } +2470:Src/main.c **** CPU_state = DECODE_ENABLE;//Decoding data with last saved settings + ARM GAS /tmp/ccLSPxIe.s page 91 -2471:Src/main.c **** -2472:Src/main.c **** if (Curr_setup->LD1_EN) -2473:Src/main.c **** { -2474:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); -2475:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC +2471:Src/main.c **** } +2472:Src/main.c **** // else +2473:Src/main.c **** // { +2474:Src/main.c **** // test = 16; +2475:Src/main.c **** // } 2476:Src/main.c **** } -2477:Src/main.c **** else -2478:Src/main.c **** { -2479:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); -2480:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC -2481:Src/main.c **** } -2482:Src/main.c **** -2483:Src/main.c **** if (Curr_setup->LD2_EN) -2484:Src/main.c **** { -2485:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); -2486:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC -2487:Src/main.c **** } -2488:Src/main.c **** else -2489:Src/main.c **** { -2490:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); -2491:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC -2492:Src/main.c **** } -2493:Src/main.c **** -2494:Src/main.c **** if (Curr_setup->REF1_EN) +2477:Src/main.c **** // else +2478:Src/main.c **** // { +2479:Src/main.c **** // test = 12; +2480:Src/main.c **** // } +2481:Src/main.c **** +2482:Src/main.c **** AD9102_Init(); +2483:Src/main.c **** } +2484:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ +2485:Src/main.c **** { +2486:Src/main.c **** // uint8_t *temp1; +2487:Src/main.c **** uint16_t *temp2; +2488:Src/main.c **** +2489:Src/main.c **** //------------------------------------------------------------------------------------------------ +2490:Src/main.c **** +2491:Src/main.c **** +2492:Src/main.c **** test=0; +2493:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& +2494:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u 2495:Src/main.c **** { -2496:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); -2497:Src/main.c **** } -2498:Src/main.c **** else -2499:Src/main.c **** { -2500:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); -2501:Src/main.c **** } -2502:Src/main.c **** -2503:Src/main.c **** if (Curr_setup->REF2_EN) -2504:Src/main.c **** { -2505:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); +2496:Src/main.c **** test = Mount_SD("/"); +2497:Src/main.c **** if (test == 0) //0 - suc +2498:Src/main.c **** { +2499:Src/main.c **** //Format_SD(); +2500:Src/main.c **** test = Remove_File ("COMMAND.TXT"); +2501:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ +2502:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); +2503:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); +2504:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2505:Src/main.c **** } 2506:Src/main.c **** } -2507:Src/main.c **** else -2508:Src/main.c **** { -2509:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); -2510:Src/main.c **** } -2511:Src/main.c **** -2512:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) -2513:Src/main.c **** { -2514:Src/main.c **** Set_LTEC(3,32767); -2515:Src/main.c **** Set_LTEC(3,32767); -2516:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); -2517:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); -2518:Src/main.c **** } -2519:Src/main.c **** else -2520:Src/main.c **** { -2521:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); -2522:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); -2523:Src/main.c **** } -2524:Src/main.c **** -2525:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) -2526:Src/main.c **** { -2527:Src/main.c **** Set_LTEC(4,32767); - ARM GAS /tmp/ccuHnxNu.s page 92 +2507:Src/main.c **** +2508:Src/main.c **** temp2 = (uint16_t *)Command; +2509:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; +2510:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; +2511:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; +2512:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; +2513:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; +2514:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; +2515:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; +2516:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; +2517:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; +2518:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; +2519:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; +2520:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; +2521:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; +2522:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; +2523:Src/main.c **** +2524:Src/main.c **** temp2++; +2525:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); +2526:Src/main.c **** temp2++; +2527:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); + ARM GAS /tmp/ccLSPxIe.s page 92 -2528:Src/main.c **** Set_LTEC(4,32767); -2529:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); -2530:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); -2531:Src/main.c **** } -2532:Src/main.c **** else -2533:Src/main.c **** { -2534:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); -2535:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); -2536:Src/main.c **** } -2537:Src/main.c **** -2538:Src/main.c **** if (Curr_setup->PI1_RD==0) -2539:Src/main.c **** { -2540:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; -2541:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; -2542:Src/main.c **** } -2543:Src/main.c **** -2544:Src/main.c **** if (Curr_setup->PI2_RD==0) -2545:Src/main.c **** { -2546:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; -2547:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; -2548:Src/main.c **** } -2549:Src/main.c **** } -2550:Src/main.c **** -2551:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ -2552:Src/main.c **** { - 253 .loc 1 2552 1 is_stmt 1 view -0 +2528:Src/main.c **** temp2++; +2529:Src/main.c **** temp2++; +2530:Src/main.c **** temp2++; +2531:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); +2532:Src/main.c **** temp2++; +2533:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2534:Src/main.c **** temp2++; +2535:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2536:Src/main.c **** temp2++; +2537:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2538:Src/main.c **** temp2++; +2539:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2540:Src/main.c **** temp2++; +2541:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID +2542:Src/main.c **** temp2++; +2543:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); +2544:Src/main.c **** temp2++; +2545:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); +2546:Src/main.c **** temp2++; +2547:Src/main.c **** +2548:Src/main.c **** if (Curr_setup->U5V1_EN) +2549:Src/main.c **** { +2550:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); +2551:Src/main.c **** } +2552:Src/main.c **** else +2553:Src/main.c **** { +2554:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); +2555:Src/main.c **** } +2556:Src/main.c **** +2557:Src/main.c **** if (Curr_setup->U5V2_EN) +2558:Src/main.c **** { +2559:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); +2560:Src/main.c **** } +2561:Src/main.c **** else +2562:Src/main.c **** { +2563:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); +2564:Src/main.c **** } +2565:Src/main.c **** +2566:Src/main.c **** if (Curr_setup->LD1_EN) +2567:Src/main.c **** { +2568:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); +2569:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC +2570:Src/main.c **** } +2571:Src/main.c **** else +2572:Src/main.c **** { +2573:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); +2574:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC +2575:Src/main.c **** } +2576:Src/main.c **** +2577:Src/main.c **** if (Curr_setup->LD2_EN) +2578:Src/main.c **** { +2579:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); +2580:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC +2581:Src/main.c **** } +2582:Src/main.c **** else +2583:Src/main.c **** { +2584:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); + ARM GAS /tmp/ccLSPxIe.s page 93 + + +2585:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC +2586:Src/main.c **** } +2587:Src/main.c **** +2588:Src/main.c **** if (Curr_setup->REF1_EN) +2589:Src/main.c **** { +2590:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); +2591:Src/main.c **** } +2592:Src/main.c **** else +2593:Src/main.c **** { +2594:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); +2595:Src/main.c **** } +2596:Src/main.c **** +2597:Src/main.c **** if (Curr_setup->REF2_EN) +2598:Src/main.c **** { +2599:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); +2600:Src/main.c **** } +2601:Src/main.c **** else +2602:Src/main.c **** { +2603:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); +2604:Src/main.c **** } +2605:Src/main.c **** +2606:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) +2607:Src/main.c **** { +2608:Src/main.c **** Set_LTEC(3,32767); +2609:Src/main.c **** Set_LTEC(3,32767); +2610:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); +2611:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); +2612:Src/main.c **** } +2613:Src/main.c **** else +2614:Src/main.c **** { +2615:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); +2616:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); +2617:Src/main.c **** } +2618:Src/main.c **** +2619:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) +2620:Src/main.c **** { +2621:Src/main.c **** Set_LTEC(4,32767); +2622:Src/main.c **** Set_LTEC(4,32767); +2623:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); +2624:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); +2625:Src/main.c **** } +2626:Src/main.c **** else +2627:Src/main.c **** { +2628:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); +2629:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); +2630:Src/main.c **** } +2631:Src/main.c **** +2632:Src/main.c **** if (Curr_setup->PI1_RD==0) +2633:Src/main.c **** { +2634:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; +2635:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; +2636:Src/main.c **** } +2637:Src/main.c **** +2638:Src/main.c **** if (Curr_setup->PI2_RD==0) +2639:Src/main.c **** { +2640:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; +2641:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + ARM GAS /tmp/ccLSPxIe.s page 94 + + +2642:Src/main.c **** } +2643:Src/main.c **** } +2644:Src/main.c **** +2645:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ +2646:Src/main.c **** { + 253 .loc 1 2646 1 is_stmt 1 view -0 254 .cfi_startproc 255 @ args = 0, pretend = 0, frame = 8 256 @ frame_needed = 0, uses_anonymous_args = 0 257 @ link register save eliminated. - 258 .loc 1 2552 1 is_stmt 0 view .LVU66 + 258 .loc 1 2646 1 is_stmt 0 view .LVU66 259 0000 82B0 sub sp, sp, #8 260 .LCFI4: 261 .cfi_def_cfa_offset 8 -2553:Src/main.c **** uint16_t *temp2; - 262 .loc 1 2553 2 is_stmt 1 view .LVU67 -2554:Src/main.c **** -2555:Src/main.c **** temp2 = (uint16_t *)Command; - 263 .loc 1 2555 2 view .LVU68 +2647:Src/main.c **** uint16_t *temp2; + 262 .loc 1 2647 2 is_stmt 1 view .LVU67 +2648:Src/main.c **** +2649:Src/main.c **** temp2 = (uint16_t *)Command; + 263 .loc 1 2649 2 view .LVU68 264 .LVL15: -2556:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 265 .loc 1 2556 2 view .LVU69 - 266 .loc 1 2556 36 is_stmt 0 view .LVU70 +2650:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 265 .loc 1 2650 2 view .LVU69 + 266 .loc 1 2650 36 is_stmt 0 view .LVU70 267 0002 0288 ldrh r2, [r0] 268 .LVL16: - 269 .loc 1 2556 48 view .LVU71 + 269 .loc 1 2650 48 view .LVU71 270 0004 02F00102 and r2, r2, #1 - 271 .loc 1 2556 22 view .LVU72 + 271 .loc 1 2650 22 view .LVU72 272 0008 1A70 strb r2, [r3] -2557:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 273 .loc 1 2557 2 is_stmt 1 view .LVU73 - 274 .loc 1 2557 36 is_stmt 0 view .LVU74 +2651:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 273 .loc 1 2651 2 is_stmt 1 view .LVU73 + 274 .loc 1 2651 36 is_stmt 0 view .LVU74 275 000a 0288 ldrh r2, [r0] - 276 .loc 1 2557 48 view .LVU75 + 276 .loc 1 2651 48 view .LVU75 277 000c C2F34002 ubfx r2, r2, #1, #1 - 278 .loc 1 2557 22 view .LVU76 + 278 .loc 1 2651 22 view .LVU76 279 0010 5A70 strb r2, [r3, #1] - ARM GAS /tmp/ccuHnxNu.s page 93 - - -2558:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 280 .loc 1 2558 2 is_stmt 1 view .LVU77 - 281 .loc 1 2558 36 is_stmt 0 view .LVU78 +2652:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 280 .loc 1 2652 2 is_stmt 1 view .LVU77 + 281 .loc 1 2652 36 is_stmt 0 view .LVU78 282 0012 0288 ldrh r2, [r0] - 283 .loc 1 2558 48 view .LVU79 + 283 .loc 1 2652 48 view .LVU79 284 0014 C2F38002 ubfx r2, r2, #2, #1 - 285 .loc 1 2558 22 view .LVU80 + 285 .loc 1 2652 22 view .LVU80 286 0018 9A70 strb r2, [r3, #2] -2559:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 287 .loc 1 2559 2 is_stmt 1 view .LVU81 - 288 .loc 1 2559 35 is_stmt 0 view .LVU82 +2653:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 287 .loc 1 2653 2 is_stmt 1 view .LVU81 + 288 .loc 1 2653 35 is_stmt 0 view .LVU82 289 001a 0288 ldrh r2, [r0] - 290 .loc 1 2559 47 view .LVU83 + 290 .loc 1 2653 47 view .LVU83 291 001c C2F3C002 ubfx r2, r2, #3, #1 - 292 .loc 1 2559 21 view .LVU84 + 292 .loc 1 2653 21 view .LVU84 293 0020 DA70 strb r2, [r3, #3] -2560:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 294 .loc 1 2560 2 is_stmt 1 view .LVU85 - 295 .loc 1 2560 35 is_stmt 0 view .LVU86 +2654:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 294 .loc 1 2654 2 is_stmt 1 view .LVU85 + 295 .loc 1 2654 35 is_stmt 0 view .LVU86 296 0022 0288 ldrh r2, [r0] - 297 .loc 1 2560 47 view .LVU87 + ARM GAS /tmp/ccLSPxIe.s page 95 + + + 297 .loc 1 2654 47 view .LVU87 298 0024 C2F30012 ubfx r2, r2, #4, #1 - 299 .loc 1 2560 21 view .LVU88 + 299 .loc 1 2654 21 view .LVU88 300 0028 1A71 strb r2, [r3, #4] -2561:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 301 .loc 1 2561 2 is_stmt 1 view .LVU89 - 302 .loc 1 2561 36 is_stmt 0 view .LVU90 +2655:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 301 .loc 1 2655 2 is_stmt 1 view .LVU89 + 302 .loc 1 2655 36 is_stmt 0 view .LVU90 303 002a 0288 ldrh r2, [r0] - 304 .loc 1 2561 48 view .LVU91 + 304 .loc 1 2655 48 view .LVU91 305 002c C2F34012 ubfx r2, r2, #5, #1 - 306 .loc 1 2561 22 view .LVU92 + 306 .loc 1 2655 22 view .LVU92 307 0030 5A71 strb r2, [r3, #5] -2562:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 308 .loc 1 2562 2 is_stmt 1 view .LVU93 - 309 .loc 1 2562 36 is_stmt 0 view .LVU94 +2656:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 308 .loc 1 2656 2 is_stmt 1 view .LVU93 + 309 .loc 1 2656 36 is_stmt 0 view .LVU94 310 0032 0288 ldrh r2, [r0] - 311 .loc 1 2562 48 view .LVU95 + 311 .loc 1 2656 48 view .LVU95 312 0034 C2F38012 ubfx r2, r2, #6, #1 - 313 .loc 1 2562 22 view .LVU96 + 313 .loc 1 2656 22 view .LVU96 314 0038 9A71 strb r2, [r3, #6] -2563:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 315 .loc 1 2563 2 is_stmt 1 view .LVU97 - 316 .loc 1 2563 36 is_stmt 0 view .LVU98 +2657:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 315 .loc 1 2657 2 is_stmt 1 view .LVU97 + 316 .loc 1 2657 36 is_stmt 0 view .LVU98 317 003a 0288 ldrh r2, [r0] - 318 .loc 1 2563 48 view .LVU99 + 318 .loc 1 2657 48 view .LVU99 319 003c C2F3C012 ubfx r2, r2, #7, #1 - 320 .loc 1 2563 22 view .LVU100 + 320 .loc 1 2657 22 view .LVU100 321 0040 DA71 strb r2, [r3, #7] -2564:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 322 .loc 1 2564 2 is_stmt 1 view .LVU101 - 323 .loc 1 2564 36 is_stmt 0 view .LVU102 +2658:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 322 .loc 1 2658 2 is_stmt 1 view .LVU101 + 323 .loc 1 2658 36 is_stmt 0 view .LVU102 324 0042 0288 ldrh r2, [r0] - 325 .loc 1 2564 48 view .LVU103 + 325 .loc 1 2658 48 view .LVU103 326 0044 C2F30022 ubfx r2, r2, #8, #1 - 327 .loc 1 2564 22 view .LVU104 + 327 .loc 1 2658 22 view .LVU104 328 0048 1A72 strb r2, [r3, #8] -2565:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - ARM GAS /tmp/ccuHnxNu.s page 94 - - - 329 .loc 1 2565 2 is_stmt 1 view .LVU105 - 330 .loc 1 2565 35 is_stmt 0 view .LVU106 +2659:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 329 .loc 1 2659 2 is_stmt 1 view .LVU105 + 330 .loc 1 2659 35 is_stmt 0 view .LVU106 331 004a 0288 ldrh r2, [r0] - 332 .loc 1 2565 47 view .LVU107 + 332 .loc 1 2659 47 view .LVU107 333 004c C2F34022 ubfx r2, r2, #9, #1 - 334 .loc 1 2565 21 view .LVU108 + 334 .loc 1 2659 21 view .LVU108 335 0050 5A72 strb r2, [r3, #9] -2566:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 336 .loc 1 2566 2 is_stmt 1 view .LVU109 - 337 .loc 1 2566 35 is_stmt 0 view .LVU110 +2660:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 336 .loc 1 2660 2 is_stmt 1 view .LVU109 + 337 .loc 1 2660 35 is_stmt 0 view .LVU110 338 0052 0288 ldrh r2, [r0] - 339 .loc 1 2566 48 view .LVU111 + 339 .loc 1 2660 48 view .LVU111 340 0054 C2F38022 ubfx r2, r2, #10, #1 - 341 .loc 1 2566 21 view .LVU112 + 341 .loc 1 2660 21 view .LVU112 342 0058 9A72 strb r2, [r3, #10] -2567:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 343 .loc 1 2567 2 is_stmt 1 view .LVU113 - 344 .loc 1 2567 34 is_stmt 0 view .LVU114 +2661:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 343 .loc 1 2661 2 is_stmt 1 view .LVU113 + 344 .loc 1 2661 34 is_stmt 0 view .LVU114 345 005a 0288 ldrh r2, [r0] - 346 .loc 1 2567 47 view .LVU115 + 346 .loc 1 2661 47 view .LVU115 + ARM GAS /tmp/ccLSPxIe.s page 96 + + 347 005c C2F3C022 ubfx r2, r2, #11, #1 - 348 .loc 1 2567 20 view .LVU116 + 348 .loc 1 2661 20 view .LVU116 349 0060 DA72 strb r2, [r3, #11] -2568:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 350 .loc 1 2568 2 is_stmt 1 view .LVU117 - 351 .loc 1 2568 35 is_stmt 0 view .LVU118 +2662:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 350 .loc 1 2662 2 is_stmt 1 view .LVU117 + 351 .loc 1 2662 35 is_stmt 0 view .LVU118 352 0062 0288 ldrh r2, [r0] - 353 .loc 1 2568 48 view .LVU119 + 353 .loc 1 2662 48 view .LVU119 354 0064 C2F30032 ubfx r2, r2, #12, #1 - 355 .loc 1 2568 21 view .LVU120 + 355 .loc 1 2662 21 view .LVU120 356 0068 1A73 strb r2, [r3, #12] -2569:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 357 .loc 1 2569 2 is_stmt 1 view .LVU121 - 358 .loc 1 2569 35 is_stmt 0 view .LVU122 +2663:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 357 .loc 1 2663 2 is_stmt 1 view .LVU121 + 358 .loc 1 2663 35 is_stmt 0 view .LVU122 359 006a 0288 ldrh r2, [r0] - 360 .loc 1 2569 48 view .LVU123 + 360 .loc 1 2663 48 view .LVU123 361 006c C2F34032 ubfx r2, r2, #13, #1 - 362 .loc 1 2569 21 view .LVU124 + 362 .loc 1 2663 21 view .LVU124 363 0070 5A73 strb r2, [r3, #13] -2570:Src/main.c **** -2571:Src/main.c **** temp2++; - 364 .loc 1 2571 2 is_stmt 1 view .LVU125 +2664:Src/main.c **** +2665:Src/main.c **** temp2++; + 364 .loc 1 2665 2 is_stmt 1 view .LVU125 365 .LVL17: -2572:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; - 366 .loc 1 2572 2 view .LVU126 - 367 .loc 1 2572 21 is_stmt 0 view .LVU127 +2666:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; + 366 .loc 1 2666 2 view .LVU126 + 367 .loc 1 2666 21 is_stmt 0 view .LVU127 368 0072 8278 ldrb r2, [r0, #2] @ zero_extendqisi2 - 369 .loc 1 2572 19 view .LVU128 + 369 .loc 1 2666 19 view .LVU128 370 0074 384B ldr r3, .L14+8 371 .LVL18: - 372 .loc 1 2572 19 view .LVU129 + 372 .loc 1 2666 19 view .LVU129 373 0076 1A70 strb r2, [r3] - 374 .loc 1 2572 40 is_stmt 1 view .LVU130 + 374 .loc 1 2666 40 is_stmt 1 view .LVU130 375 .LVL19: -2573:Src/main.c **** task.min_param = (float)(*temp2); temp2++; - 376 .loc 1 2573 2 view .LVU131 - 377 .loc 1 2573 29 is_stmt 0 view .LVU132 - ARM GAS /tmp/ccuHnxNu.s page 95 - - +2667:Src/main.c **** task.min_param = (float)(*temp2); temp2++; + 376 .loc 1 2667 2 view .LVU131 + 377 .loc 1 2667 29 is_stmt 0 view .LVU132 378 0078 8288 ldrh r2, [r0, #4] 379 007a 07EE902A vmov s15, r2 @ int - 380 .loc 1 2573 21 view .LVU133 + 380 .loc 1 2667 21 view .LVU133 381 007e F8EE677A vcvt.f32.u32 s15, s15 - 382 .loc 1 2573 19 view .LVU134 + 382 .loc 1 2667 19 view .LVU134 383 0082 C3ED017A vstr.32 s15, [r3, #4] - 384 .loc 1 2573 38 is_stmt 1 view .LVU135 + 384 .loc 1 2667 38 is_stmt 1 view .LVU135 385 .LVL20: -2574:Src/main.c **** task.max_param = (float)(*temp2); temp2++; - 386 .loc 1 2574 2 view .LVU136 - 387 .loc 1 2574 29 is_stmt 0 view .LVU137 +2668:Src/main.c **** task.max_param = (float)(*temp2); temp2++; + 386 .loc 1 2668 2 view .LVU136 + 387 .loc 1 2668 29 is_stmt 0 view .LVU137 388 0086 C288 ldrh r2, [r0, #6] 389 0088 07EE902A vmov s15, r2 @ int - 390 .loc 1 2574 21 view .LVU138 + 390 .loc 1 2668 21 view .LVU138 391 008c F8EE677A vcvt.f32.u32 s15, s15 - 392 .loc 1 2574 19 view .LVU139 + 392 .loc 1 2668 19 view .LVU139 393 0090 C3ED027A vstr.32 s15, [r3, #8] - 394 .loc 1 2574 38 is_stmt 1 view .LVU140 + 394 .loc 1 2668 38 is_stmt 1 view .LVU140 395 .LVL21: -2575:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; - 396 .loc 1 2575 2 view .LVU141 - 397 .loc 1 2575 29 is_stmt 0 view .LVU142 +2669:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; + ARM GAS /tmp/ccLSPxIe.s page 97 + + + 396 .loc 1 2669 2 view .LVU141 + 397 .loc 1 2669 29 is_stmt 0 view .LVU142 398 0094 0289 ldrh r2, [r0, #8] 399 0096 07EE902A vmov s15, r2 @ int - 400 .loc 1 2575 21 view .LVU143 + 400 .loc 1 2669 21 view .LVU143 401 009a F8EE677A vcvt.f32.u32 s15, s15 - 402 .loc 1 2575 19 view .LVU144 + 402 .loc 1 2669 19 view .LVU144 403 009e C3ED037A vstr.32 s15, [r3, #12] - 404 .loc 1 2575 38 is_stmt 1 view .LVU145 + 404 .loc 1 2669 38 is_stmt 1 view .LVU145 405 .LVL22: -2576:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; - 406 .loc 1 2576 2 view .LVU146 - 407 .loc 1 2576 29 is_stmt 0 view .LVU147 +2670:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; + 406 .loc 1 2670 2 view .LVU146 + 407 .loc 1 2670 29 is_stmt 0 view .LVU147 408 00a2 4289 ldrh r2, [r0, #10] 409 00a4 07EE102A vmov s14, r2 @ int - 410 .loc 1 2576 21 view .LVU148 + 410 .loc 1 2670 21 view .LVU148 411 00a8 B8EE477B vcvt.f64.u32 d7, s14 - 412 .loc 1 2576 37 view .LVU149 + 412 .loc 1 2670 37 view .LVU149 413 00ac 9FED285B vldr.64 d5, .L14 414 00b0 87EE056B vdiv.f64 d6, d7, d5 - 415 .loc 1 2576 19 view .LVU150 + 415 .loc 1 2670 19 view .LVU150 416 00b4 FCEEC67B vcvt.u32.f64 s15, d6 417 00b8 CDED017A vstr.32 s15, [sp, #4] @ int 418 00bc 9DF80420 ldrb r2, [sp, #4] @ zero_extendqisi2 419 00c0 1A75 strb r2, [r3, #20] - 420 .loc 1 2576 46 is_stmt 1 view .LVU151 + 420 .loc 1 2670 46 is_stmt 1 view .LVU151 421 .LVL23: -2577:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; - 422 .loc 1 2577 2 view .LVU152 - 423 .loc 1 2577 29 is_stmt 0 view .LVU153 +2671:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; + 422 .loc 1 2671 2 view .LVU152 + 423 .loc 1 2671 29 is_stmt 0 view .LVU153 424 00c2 8189 ldrh r1, [r0, #12] 425 .LVL24: - 426 .loc 1 2577 29 view .LVU154 + 426 .loc 1 2671 29 view .LVU154 427 00c4 07EE901A vmov s15, r1 @ int - 428 .loc 1 2577 21 view .LVU155 + 428 .loc 1 2671 21 view .LVU155 429 00c8 F8EE677A vcvt.f32.u32 s15, s15 - 430 .loc 1 2577 19 view .LVU156 - ARM GAS /tmp/ccuHnxNu.s page 96 - - + 430 .loc 1 2671 19 view .LVU156 431 00cc C3ED067A vstr.32 s15, [r3, #24] - 432 .loc 1 2577 38 is_stmt 1 view .LVU157 + 432 .loc 1 2671 38 is_stmt 1 view .LVU157 433 .LVL25: -2578:Src/main.c **** task.curr = (float)(*temp2); temp2++; - 434 .loc 1 2578 2 view .LVU158 - 435 .loc 1 2578 29 is_stmt 0 view .LVU159 +2672:Src/main.c **** task.curr = (float)(*temp2); temp2++; + 434 .loc 1 2672 2 view .LVU158 + 435 .loc 1 2672 29 is_stmt 0 view .LVU159 436 00d0 C189 ldrh r1, [r0, #14] 437 00d2 07EE901A vmov s15, r1 @ int - 438 .loc 1 2578 21 view .LVU160 + 438 .loc 1 2672 21 view .LVU160 439 00d6 F8EE677A vcvt.f32.u32 s15, s15 - 440 .loc 1 2578 19 view .LVU161 + 440 .loc 1 2672 19 view .LVU161 441 00da C3ED077A vstr.32 s15, [r3, #28] - 442 .loc 1 2578 38 is_stmt 1 view .LVU162 + 442 .loc 1 2672 38 is_stmt 1 view .LVU162 443 .LVL26: -2579:Src/main.c **** task.temp = (float)(*temp2); temp2++; - 444 .loc 1 2579 2 view .LVU163 - 445 .loc 1 2579 29 is_stmt 0 view .LVU164 +2673:Src/main.c **** task.temp = (float)(*temp2); temp2++; + 444 .loc 1 2673 2 view .LVU163 + 445 .loc 1 2673 29 is_stmt 0 view .LVU164 446 00de 018A ldrh r1, [r0, #16] 447 00e0 07EE901A vmov s15, r1 @ int - 448 .loc 1 2579 21 view .LVU165 + 448 .loc 1 2673 21 view .LVU165 + ARM GAS /tmp/ccLSPxIe.s page 98 + + 449 00e4 F8EE677A vcvt.f32.u32 s15, s15 - 450 .loc 1 2579 19 view .LVU166 + 450 .loc 1 2673 19 view .LVU166 451 00e8 C3ED087A vstr.32 s15, [r3, #32] - 452 .loc 1 2579 38 is_stmt 1 view .LVU167 + 452 .loc 1 2673 38 is_stmt 1 view .LVU167 453 .LVL27: -2580:Src/main.c **** task.tau = (float)(*temp2); temp2++; - 454 .loc 1 2580 2 view .LVU168 - 455 .loc 1 2580 29 is_stmt 0 view .LVU169 +2674:Src/main.c **** task.tau = (float)(*temp2); temp2++; + 454 .loc 1 2674 2 view .LVU168 + 455 .loc 1 2674 29 is_stmt 0 view .LVU169 456 00ec 418A ldrh r1, [r0, #18] - 457 .loc 1 2580 19 view .LVU170 + 457 .loc 1 2674 19 view .LVU170 458 00ee D982 strh r1, [r3, #22] @ movhi - 459 .loc 1 2580 38 is_stmt 1 view .LVU171 + 459 .loc 1 2674 38 is_stmt 1 view .LVU171 460 .LVL28: -2581:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; - 461 .loc 1 2581 2 view .LVU172 - 462 .loc 1 2581 29 is_stmt 0 view .LVU173 +2675:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; + 461 .loc 1 2675 2 view .LVU172 + 462 .loc 1 2675 29 is_stmt 0 view .LVU173 463 00f0 818A ldrh r1, [r0, #20] 464 00f2 07EE901A vmov s15, r1 @ int - 465 .loc 1 2581 21 view .LVU174 + 465 .loc 1 2675 21 view .LVU174 466 00f6 F8EE677A vcvt.f32.u32 s15, s15 - 467 .loc 1 2581 37 view .LVU175 + 467 .loc 1 2675 37 view .LVU175 468 00fa 9FED187A vldr.32 s14, .L14+12 469 00fe 67EE877A vmul.f32 s15, s15, s14 - 470 .loc 1 2581 19 view .LVU176 + 470 .loc 1 2675 19 view .LVU176 471 0102 C3ED0A7A vstr.32 s15, [r3, #40] - 472 .loc 1 2581 46 is_stmt 1 view .LVU177 + 472 .loc 1 2675 46 is_stmt 1 view .LVU177 473 .LVL29: -2582:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; - 474 .loc 1 2582 2 view .LVU178 - 475 .loc 1 2582 29 is_stmt 0 view .LVU179 +2676:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; + 474 .loc 1 2676 2 view .LVU178 + 475 .loc 1 2676 29 is_stmt 0 view .LVU179 476 0106 C18A ldrh r1, [r0, #22] 477 0108 07EE901A vmov s15, r1 @ int - 478 .loc 1 2582 21 view .LVU180 + 478 .loc 1 2676 21 view .LVU180 479 010c F8EE677A vcvt.f32.u32 s15, s15 - 480 .loc 1 2582 37 view .LVU181 + 480 .loc 1 2676 37 view .LVU181 481 0110 67EE877A vmul.f32 s15, s15, s14 - 482 .loc 1 2582 19 view .LVU182 - ARM GAS /tmp/ccuHnxNu.s page 97 - - + 482 .loc 1 2676 19 view .LVU182 483 0114 C3ED097A vstr.32 s15, [r3, #36] - 484 .loc 1 2582 46 is_stmt 1 view .LVU183 + 484 .loc 1 2676 46 is_stmt 1 view .LVU183 485 .LVL30: -2583:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; - 486 .loc 1 2583 2 view .LVU184 - 487 .loc 1 2583 29 is_stmt 0 view .LVU185 +2677:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; + 486 .loc 1 2677 2 view .LVU184 + 487 .loc 1 2677 29 is_stmt 0 view .LVU185 488 0118 018B ldrh r1, [r0, #24] 489 011a 07EE901A vmov s15, r1 @ int - 490 .loc 1 2583 21 view .LVU186 + 490 .loc 1 2677 21 view .LVU186 491 011e F8EE677A vcvt.f32.u32 s15, s15 - 492 .loc 1 2583 37 view .LVU187 + 492 .loc 1 2677 37 view .LVU187 493 0122 67EE877A vmul.f32 s15, s15, s14 - 494 .loc 1 2583 19 view .LVU188 + 494 .loc 1 2677 19 view .LVU188 495 0126 C3ED0C7A vstr.32 s15, [r3, #48] - 496 .loc 1 2583 46 is_stmt 1 view .LVU189 + 496 .loc 1 2677 46 is_stmt 1 view .LVU189 497 .LVL31: -2584:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; - 498 .loc 1 2584 2 view .LVU190 - 499 .loc 1 2584 29 is_stmt 0 view .LVU191 +2678:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; + 498 .loc 1 2678 2 view .LVU190 + 499 .loc 1 2678 29 is_stmt 0 view .LVU191 500 012a 418B ldrh r1, [r0, #26] + ARM GAS /tmp/ccLSPxIe.s page 99 + + 501 012c 07EE901A vmov s15, r1 @ int - 502 .loc 1 2584 21 view .LVU192 + 502 .loc 1 2678 21 view .LVU192 503 0130 F8EE677A vcvt.f32.u32 s15, s15 - 504 .loc 1 2584 37 view .LVU193 + 504 .loc 1 2678 37 view .LVU193 505 0134 67EE877A vmul.f32 s15, s15, s14 - 506 .loc 1 2584 19 view .LVU194 + 506 .loc 1 2678 19 view .LVU194 507 0138 C3ED0B7A vstr.32 s15, [r3, #44] - 508 .loc 1 2584 46 is_stmt 1 view .LVU195 + 508 .loc 1 2678 46 is_stmt 1 view .LVU195 509 .LVL32: -2585:Src/main.c **** -2586:Src/main.c **** TO10_counter = task.dt / 10; - 510 .loc 1 2586 2 view .LVU196 - 511 .loc 1 2586 25 is_stmt 0 view .LVU197 +2679:Src/main.c **** +2680:Src/main.c **** TO10_counter = task.dt / 10; + 510 .loc 1 2680 2 view .LVU196 + 511 .loc 1 2680 25 is_stmt 0 view .LVU197 512 013c 084B ldr r3, .L14+16 513 013e A3FB0232 umull r3, r2, r3, r2 514 0142 D208 lsrs r2, r2, #3 - 515 .loc 1 2586 15 view .LVU198 + 515 .loc 1 2680 15 view .LVU198 516 0144 074B ldr r3, .L14+20 517 0146 1A60 str r2, [r3] -2587:Src/main.c **** } - 518 .loc 1 2587 1 view .LVU199 +2681:Src/main.c **** } + 518 .loc 1 2681 1 view .LVU199 519 0148 02B0 add sp, sp, #8 520 .LCFI5: 521 .cfi_def_cfa_offset 0 @@ -5818,9 +5918,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 532 0164 00000000 .word TO10_counter 533 .cfi_endproc 534 .LFE1210: - ARM GAS /tmp/ccuHnxNu.s page 98 - - 536 .section .text.SPI2_SetMode,"ax",%progbits 537 .align 1 538 .syntax unified @@ -5829,90 +5926,93 @@ ARM GAS /tmp/ccuHnxNu.s page 1 542 SPI2_SetMode: 543 .LVL33: 544 .LFB1213: -2588:Src/main.c **** -2589:Src/main.c **** void OUT_trigger(uint8_t out_n) -2590:Src/main.c **** { -2591:Src/main.c **** switch (out_n) -2592:Src/main.c **** { -2593:Src/main.c **** case 0: -2594:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); -2595:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); -2596:Src/main.c **** break; -2597:Src/main.c **** -2598:Src/main.c **** case 1: -2599:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); -2600:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); -2601:Src/main.c **** break; -2602:Src/main.c **** -2603:Src/main.c **** case 2: -2604:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); -2605:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); -2606:Src/main.c **** break; -2607:Src/main.c **** -2608:Src/main.c **** case 3: -2609:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); -2610:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); -2611:Src/main.c **** break; -2612:Src/main.c **** -2613:Src/main.c **** case 4: -2614:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); -2615:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); -2616:Src/main.c **** break; -2617:Src/main.c **** -2618:Src/main.c **** case 5: -2619:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); -2620:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); -2621:Src/main.c **** break; -2622:Src/main.c **** -2623:Src/main.c **** case 6: -2624:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); -2625:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); -2626:Src/main.c **** break; -2627:Src/main.c **** -2628:Src/main.c **** case 7: -2629:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); -2630:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); -2631:Src/main.c **** break; -2632:Src/main.c **** -2633:Src/main.c **** case 8: -2634:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); -2635:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); -2636:Src/main.c **** break; - ARM GAS /tmp/ccuHnxNu.s page 99 +2682:Src/main.c **** +2683:Src/main.c **** void OUT_trigger(uint8_t out_n) +2684:Src/main.c **** { +2685:Src/main.c **** switch (out_n) +2686:Src/main.c **** { +2687:Src/main.c **** case 0: +2688:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); +2689:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); +2690:Src/main.c **** break; +2691:Src/main.c **** +2692:Src/main.c **** case 1: +2693:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); + ARM GAS /tmp/ccLSPxIe.s page 100 -2637:Src/main.c **** -2638:Src/main.c **** case 9: -2639:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); -2640:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); -2641:Src/main.c **** break; -2642:Src/main.c **** } -2643:Src/main.c **** } -2644:Src/main.c **** -2645:Src/main.c **** static void AD9102_Init(void) -2646:Src/main.c **** { -2647:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2648:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); -2649:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} -2650:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); -2651:Src/main.c **** -2652:Src/main.c **** AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT); -2653:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -2654:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); -2655:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2656:Src/main.c **** } -2657:Src/main.c **** -2658:Src/main.c **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase) -2659:Src/main.c **** { - 545 .loc 1 2659 1 is_stmt 1 view -0 +2694:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); +2695:Src/main.c **** break; +2696:Src/main.c **** +2697:Src/main.c **** case 2: +2698:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); +2699:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); +2700:Src/main.c **** break; +2701:Src/main.c **** +2702:Src/main.c **** case 3: +2703:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); +2704:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); +2705:Src/main.c **** break; +2706:Src/main.c **** +2707:Src/main.c **** case 4: +2708:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); +2709:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); +2710:Src/main.c **** break; +2711:Src/main.c **** +2712:Src/main.c **** case 5: +2713:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); +2714:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); +2715:Src/main.c **** break; +2716:Src/main.c **** +2717:Src/main.c **** case 6: +2718:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); +2719:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); +2720:Src/main.c **** break; +2721:Src/main.c **** +2722:Src/main.c **** case 7: +2723:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); +2724:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); +2725:Src/main.c **** break; +2726:Src/main.c **** +2727:Src/main.c **** case 8: +2728:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); +2729:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); +2730:Src/main.c **** break; +2731:Src/main.c **** +2732:Src/main.c **** case 9: +2733:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); +2734:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); +2735:Src/main.c **** break; +2736:Src/main.c **** } +2737:Src/main.c **** } +2738:Src/main.c **** +2739:Src/main.c **** static void AD9102_Init(void) +2740:Src/main.c **** { +2741:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2742:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); +2743:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} +2744:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); +2745:Src/main.c **** +2746:Src/main.c **** AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT); +2747:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +2748:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +2749:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2750:Src/main.c **** } + ARM GAS /tmp/ccLSPxIe.s page 101 + + +2751:Src/main.c **** +2752:Src/main.c **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase) +2753:Src/main.c **** { + 545 .loc 1 2753 1 is_stmt 1 view -0 546 .cfi_startproc 547 @ args = 0, pretend = 0, frame = 0 548 @ frame_needed = 0, uses_anonymous_args = 0 549 @ link register save eliminated. -2660:Src/main.c **** if (LL_SPI_IsEnabled(SPI2)) - 550 .loc 1 2660 2 view .LVU201 - 551 .LBB360: - 552 .LBI360: +2754:Src/main.c **** if (LL_SPI_IsEnabled(SPI2)) + 550 .loc 1 2754 2 view .LVU201 + 551 .LBB363: + 552 .LBI363: 553 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** ****************************************************************************** @@ -5938,9 +6038,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #ifdef __cplusplus 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** extern "C" { - ARM GAS /tmp/ccuHnxNu.s page 100 - - 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif 26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Includes ------------------------------------------------------------------*/ @@ -5961,6 +6058,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Private macros ------------------------------------------------------------*/ 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported types ------------------------------------------------------------*/ + ARM GAS /tmp/ccLSPxIe.s page 102 + + 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined(USE_FULL_LL_DRIVER) 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_ES_INIT SPI Exported Init structure 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -5998,9 +6098,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (N 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_NSS_MODE. - ARM GAS /tmp/ccuHnxNu.s page 101 - - 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6021,6 +6118,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation. + ARM GAS /tmp/ccLSPxIe.s page 103 + + 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter must be a number between Min_Data = 0x00 an 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func @@ -6058,9 +6158,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_RXNEIE SPI_CR2_RXNEIE /*!< Rx buffer not empty inter 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_TXEIE SPI_CR2_TXEIE /*!< Tx buffer empty interrupt - ARM GAS /tmp/ccuHnxNu.s page 102 - - 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CR2_ERRIE SPI_CR2_ERRIE /*!< Error interrupt enable 140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} @@ -6081,6 +6178,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_PROTOCOL_MOTOROLA 0x00000000U /*!< Motorola mode. Used as de 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_PROTOCOL_TI (SPI_CR2_FRF) /*!< TI mode 158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 104 + + 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6118,9 +6218,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_BIT_ORDER Transmission Bit Order - ARM GAS /tmp/ccuHnxNu.s page 103 - - 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_LSB_FIRST (SPI_CR1_LSBFIRST) /*!< Data is transmitted/recei @@ -6141,6 +6238,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_NSS_MODE Slave Select Pin Mode + ARM GAS /tmp/ccLSPxIe.s page 105 + + 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_NSS_SOFT (SPI_CR1_SSM) /*!< NSS managed inter @@ -6178,9 +6278,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_CRCCALCULATION_ENABLE (SPI_CR1_CRCEN) /*!< CRC calculation enabled 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} - ARM GAS /tmp/ccuHnxNu.s page 104 - - 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif /* USE_FULL_LL_DRIVER */ 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6201,6 +6298,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 106 + + 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_RX_FIFO RX FIFO Level 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -6238,9 +6338,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccuHnxNu.s page 105 - - 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported macro ------------------------------------------------------------*/ 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_Exported_Macros SPI Exported Macros 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -6261,6 +6358,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Read a value in SPI register + ARM GAS /tmp/ccLSPxIe.s page 107 + + 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param __INSTANCE__ SPI Instance 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param __REG__ Register to be read 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Register value @@ -6298,9 +6398,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable SPI peripheral 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note When disabling the SPI, follow the procedure described in the Reference Manual. 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 SPE LL_SPI_Disable - ARM GAS /tmp/ccuHnxNu.s page 106 - - 367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -6317,10 +6414,13 @@ ARM GAS /tmp/ccuHnxNu.s page 1 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx) 554 .loc 4 381 26 view .LVU202 - 555 .LBB361: + 555 .LBB364: 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL); 556 .loc 4 383 3 view .LVU203 + ARM GAS /tmp/ccLSPxIe.s page 108 + + 557 .loc 4 383 12 is_stmt 0 view .LVU204 558 0000 0F4B ldr r3, .L19 559 0002 1B68 ldr r3, [r3] @@ -6329,16 +6429,16 @@ ARM GAS /tmp/ccuHnxNu.s page 1 562 0008 04D0 beq .L17 563 .LVL34: 564 .loc 4 383 69 view .LVU206 - 565 .LBE361: - 566 .LBE360: -2661:Src/main.c **** { -2662:Src/main.c **** LL_SPI_Disable(SPI2); - 567 .loc 1 2662 3 is_stmt 1 view .LVU207 - 568 .LBB362: - 569 .LBI362: + 565 .LBE364: + 566 .LBE363: +2755:Src/main.c **** { +2756:Src/main.c **** LL_SPI_Disable(SPI2); + 567 .loc 1 2756 3 is_stmt 1 view .LVU207 + 568 .LBB365: + 569 .LBI365: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 570 .loc 4 370 22 view .LVU208 - 571 .LBB363: + 571 .LBB366: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 572 .loc 4 372 3 view .LVU209 573 000a 0D4A ldr r2, .L19 @@ -6349,18 +6449,15 @@ ARM GAS /tmp/ccuHnxNu.s page 1 578 .L17: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 579 .loc 4 372 3 is_stmt 0 view .LVU210 - 580 .LBE363: - 581 .LBE362: -2663:Src/main.c **** } -2664:Src/main.c **** LL_SPI_SetClockPolarity(SPI2, polarity); - 582 .loc 1 2664 2 is_stmt 1 view .LVU211 - 583 .LBB364: - 584 .LBI364: + 580 .LBE366: + 581 .LBE365: +2757:Src/main.c **** } +2758:Src/main.c **** LL_SPI_SetClockPolarity(SPI2, polarity); + 582 .loc 1 2758 2 is_stmt 1 view .LVU211 + 583 .LBB367: + 584 .LBI367: 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccuHnxNu.s page 107 - - 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set SPI operation mode to Master or Slave 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should not be changed when communication is ongoing. @@ -6381,6 +6478,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get SPI operation mode (Master or Slave) 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 MSTR LL_SPI_GetMode\n 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 SSI LL_SPI_GetMode + ARM GAS /tmp/ccLSPxIe.s page 109 + + 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: 408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MODE_MASTER @@ -6418,9 +6518,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF)); 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccuHnxNu.s page 108 - - 443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set clock phase @@ -6441,6 +6538,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get clock phase 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CPHA LL_SPI_GetClockPhase + ARM GAS /tmp/ccLSPxIe.s page 110 + + 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: 465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PHASE_1EDGE @@ -6464,7 +6564,7 @@ ARM GAS /tmp/ccuHnxNu.s page 1 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) 585 .loc 4 484 22 view .LVU212 - 586 .LBB365: + 586 .LBB368: 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); 587 .loc 4 486 3 view .LVU213 @@ -6477,18 +6577,15 @@ ARM GAS /tmp/ccuHnxNu.s page 1 594 001e 1860 str r0, [r3] 595 .LVL37: 596 .loc 4 486 3 view .LVU215 - 597 .LBE365: - ARM GAS /tmp/ccuHnxNu.s page 109 - - - 598 .LBE364: -2665:Src/main.c **** LL_SPI_SetClockPhase(SPI2, phase); - 599 .loc 1 2665 2 is_stmt 1 view .LVU216 - 600 .LBB366: - 601 .LBI366: + 597 .LBE368: + 598 .LBE367: +2759:Src/main.c **** LL_SPI_SetClockPhase(SPI2, phase); + 599 .loc 1 2759 2 is_stmt 1 view .LVU216 + 600 .LBB369: + 601 .LBI369: 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 602 .loc 4 455 22 view .LVU217 - 603 .LBB367: + 603 .LBB370: 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 604 .loc 4 457 3 view .LVU218 605 0020 1A68 ldr r2, [r3] @@ -6501,15 +6598,18 @@ ARM GAS /tmp/ccuHnxNu.s page 1 611 .LVL39: 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 612 .loc 4 457 3 view .LVU220 - 613 .LBE367: - 614 .LBE366: -2666:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) - 615 .loc 1 2666 2 is_stmt 1 view .LVU221 - 616 .LBB368: - 617 .LBI368: + ARM GAS /tmp/ccLSPxIe.s page 111 + + + 613 .LBE370: + 614 .LBE369: +2760:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) + 615 .loc 1 2760 2 is_stmt 1 view .LVU221 + 616 .LBB371: + 617 .LBI371: 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 618 .loc 4 381 26 view .LVU222 - 619 .LBB369: + 619 .LBB372: 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 620 .loc 4 383 3 view .LVU223 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -6522,34 +6622,31 @@ ARM GAS /tmp/ccuHnxNu.s page 1 626 .LVL40: 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 627 .loc 4 383 69 view .LVU226 - 628 .LBE369: - 629 .LBE368: -2667:Src/main.c **** { -2668:Src/main.c **** LL_SPI_Enable(SPI2); - 630 .loc 1 2668 3 is_stmt 1 view .LVU227 - 631 .LBB370: - 632 .LBI370: + 628 .LBE372: + 629 .LBE371: +2761:Src/main.c **** { +2762:Src/main.c **** LL_SPI_Enable(SPI2); + 630 .loc 1 2762 3 is_stmt 1 view .LVU227 + 631 .LBB373: + 632 .LBI373: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 633 .loc 4 358 22 view .LVU228 - 634 .LBB371: + 634 .LBB374: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 635 .loc 4 360 3 view .LVU229 636 0032 034A ldr r2, .L19 637 0034 1368 ldr r3, [r2] 638 0036 43F04003 orr r3, r3, #64 639 003a 1360 str r3, [r2] - ARM GAS /tmp/ccuHnxNu.s page 110 - - 640 .LVL41: 641 .L16: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 642 .loc 4 360 3 is_stmt 0 view .LVU230 - 643 .LBE371: - 644 .LBE370: -2669:Src/main.c **** } -2670:Src/main.c **** } - 645 .loc 1 2670 1 view .LVU231 + 643 .LBE374: + 644 .LBE373: +2763:Src/main.c **** } +2764:Src/main.c **** } + 645 .loc 1 2764 1 view .LVU231 646 003c 7047 bx lr 647 .L20: 648 003e 00BF .align 2 @@ -6561,135 +6658,138 @@ ARM GAS /tmp/ccuHnxNu.s page 1 655 .align 1 656 .syntax unified 657 .thumb + ARM GAS /tmp/ccLSPxIe.s page 112 + + 658 .thumb_func 660 PA4_DAC_Set: 661 .LVL42: 662 .LFB1217: -2671:Src/main.c **** -2672:Src/main.c **** static void AD9833_WriteWord(uint16_t word) -2673:Src/main.c **** { -2674:Src/main.c **** uint32_t tmp32 = 0; -2675:Src/main.c **** -2676:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_1EDGE); -2677:Src/main.c **** -2678:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2679:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); -2680:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -2681:Src/main.c **** -2682:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_RESET); -2683:Src/main.c **** -2684:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2685:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); -2686:Src/main.c **** tmp32 = 0; -2687:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2688:Src/main.c **** (void) SPI2->DR; -2689:Src/main.c **** -2690:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET); -2691:Src/main.c **** } -2692:Src/main.c **** -2693:Src/main.c **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word) -2694:Src/main.c **** { -2695:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 -2696:Src/main.c **** if (triangle) -2697:Src/main.c **** { -2698:Src/main.c **** control |= 0x0002u; // MODE = 1 (triangle) -2699:Src/main.c **** } -2700:Src/main.c **** control |= 0x0100u; // RESET = 1 while updating -2701:Src/main.c **** -2702:Src/main.c **** freq_word &= 0x0FFFFFFFu; -2703:Src/main.c **** uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB - ARM GAS /tmp/ccuHnxNu.s page 111 +2765:Src/main.c **** +2766:Src/main.c **** static void AD9833_WriteWord(uint16_t word) +2767:Src/main.c **** { +2768:Src/main.c **** uint32_t tmp32 = 0; +2769:Src/main.c **** +2770:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_1EDGE); +2771:Src/main.c **** +2772:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2773:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); +2774:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); +2775:Src/main.c **** +2776:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_RESET); +2777:Src/main.c **** +2778:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2779:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); +2780:Src/main.c **** tmp32 = 0; +2781:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2782:Src/main.c **** (void) SPI2->DR; +2783:Src/main.c **** +2784:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET); +2785:Src/main.c **** } +2786:Src/main.c **** +2787:Src/main.c **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word) +2788:Src/main.c **** { +2789:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 +2790:Src/main.c **** if (triangle) +2791:Src/main.c **** { +2792:Src/main.c **** control |= 0x0002u; // MODE = 1 (triangle) +2793:Src/main.c **** } +2794:Src/main.c **** control |= 0x0100u; // RESET = 1 while updating +2795:Src/main.c **** +2796:Src/main.c **** freq_word &= 0x0FFFFFFFu; +2797:Src/main.c **** uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB +2798:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB +2799:Src/main.c **** +2800:Src/main.c **** AD9833_WriteWord(control); +2801:Src/main.c **** AD9833_WriteWord(lsw); +2802:Src/main.c **** AD9833_WriteWord(msw); +2803:Src/main.c **** AD9833_WriteWord(0xC000u); // PHASE0 = 0 +2804:Src/main.c **** +2805:Src/main.c **** if (enable) +2806:Src/main.c **** { +2807:Src/main.c **** control &= (uint16_t)(~0x0100u); +2808:Src/main.c **** } +2809:Src/main.c **** AD9833_WriteWord(control); +2810:Src/main.c **** } +2811:Src/main.c **** +2812:Src/main.c **** static void PA4_DAC_Init(void) +2813:Src/main.c **** { +2814:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; +2815:Src/main.c **** +2816:Src/main.c **** __HAL_RCC_DAC_CLK_ENABLE(); +2817:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + ARM GAS /tmp/ccLSPxIe.s page 113 -2704:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB -2705:Src/main.c **** -2706:Src/main.c **** AD9833_WriteWord(control); -2707:Src/main.c **** AD9833_WriteWord(lsw); -2708:Src/main.c **** AD9833_WriteWord(msw); -2709:Src/main.c **** AD9833_WriteWord(0xC000u); // PHASE0 = 0 -2710:Src/main.c **** -2711:Src/main.c **** if (enable) -2712:Src/main.c **** { -2713:Src/main.c **** control &= (uint16_t)(~0x0100u); -2714:Src/main.c **** } -2715:Src/main.c **** AD9833_WriteWord(control); -2716:Src/main.c **** } -2717:Src/main.c **** -2718:Src/main.c **** static void PA4_DAC_Init(void) -2719:Src/main.c **** { -2720:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; -2721:Src/main.c **** -2722:Src/main.c **** __HAL_RCC_DAC_CLK_ENABLE(); -2723:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); -2724:Src/main.c **** -2725:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_4; -2726:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; -2727:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -2728:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); -2729:Src/main.c **** -2730:Src/main.c **** // Keep channel disabled until a dedicated serial command enables it. -2731:Src/main.c **** DAC->CR &= ~(DAC_CR_EN1 | DAC_CR_TEN1 | DAC_CR_DMAEN1); -2732:Src/main.c **** DAC->DHR12R1 = 0u; -2733:Src/main.c **** } -2734:Src/main.c **** -2735:Src/main.c **** static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable) -2736:Src/main.c **** { - 663 .loc 1 2736 1 is_stmt 1 view -0 +2818:Src/main.c **** +2819:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_4; +2820:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; +2821:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +2822:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +2823:Src/main.c **** +2824:Src/main.c **** // Keep channel disabled until a dedicated serial command enables it. +2825:Src/main.c **** DAC->CR &= ~(DAC_CR_EN1 | DAC_CR_TEN1 | DAC_CR_DMAEN1); +2826:Src/main.c **** DAC->DHR12R1 = 0u; +2827:Src/main.c **** } +2828:Src/main.c **** +2829:Src/main.c **** static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable) +2830:Src/main.c **** { + 663 .loc 1 2830 1 is_stmt 1 view -0 664 .cfi_startproc 665 @ args = 0, pretend = 0, frame = 0 666 @ frame_needed = 0, uses_anonymous_args = 0 667 @ link register save eliminated. -2737:Src/main.c **** if (dac_code > STM32_DAC_CODE_MAX) - 668 .loc 1 2737 2 view .LVU233 - 669 .loc 1 2737 5 is_stmt 0 view .LVU234 +2831:Src/main.c **** if (dac_code > STM32_DAC_CODE_MAX) + 668 .loc 1 2831 2 view .LVU233 + 669 .loc 1 2831 5 is_stmt 0 view .LVU234 670 0000 B0F5805F cmp r0, #4096 671 0004 01D3 bcc .L22 -2738:Src/main.c **** { -2739:Src/main.c **** dac_code = STM32_DAC_CODE_MAX; - 672 .loc 1 2739 12 view .LVU235 +2832:Src/main.c **** { +2833:Src/main.c **** dac_code = STM32_DAC_CODE_MAX; + 672 .loc 1 2833 12 view .LVU235 673 0006 40F6FF70 movw r0, #4095 674 .LVL43: 675 .L22: -2740:Src/main.c **** } -2741:Src/main.c **** -2742:Src/main.c **** DAC->DHR12R1 = dac_code; - 676 .loc 1 2742 2 is_stmt 1 view .LVU236 - 677 .loc 1 2742 15 is_stmt 0 view .LVU237 +2834:Src/main.c **** } +2835:Src/main.c **** +2836:Src/main.c **** DAC->DHR12R1 = dac_code; + 676 .loc 1 2836 2 is_stmt 1 view .LVU236 + 677 .loc 1 2836 15 is_stmt 0 view .LVU237 678 000a 074B ldr r3, .L26 679 000c 9860 str r0, [r3, #8] -2743:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 112 - - -2744:Src/main.c **** if (enable) - 680 .loc 1 2744 2 is_stmt 1 view .LVU238 - 681 .loc 1 2744 5 is_stmt 0 view .LVU239 +2837:Src/main.c **** +2838:Src/main.c **** if (enable) + 680 .loc 1 2838 2 is_stmt 1 view .LVU238 + 681 .loc 1 2838 5 is_stmt 0 view .LVU239 682 000e 29B1 cbz r1, .L23 -2745:Src/main.c **** { -2746:Src/main.c **** DAC->CR |= DAC_CR_EN1; - 683 .loc 1 2746 3 is_stmt 1 view .LVU240 - 684 .loc 1 2746 6 is_stmt 0 view .LVU241 +2839:Src/main.c **** { +2840:Src/main.c **** DAC->CR |= DAC_CR_EN1; + 683 .loc 1 2840 3 is_stmt 1 view .LVU240 + 684 .loc 1 2840 6 is_stmt 0 view .LVU241 685 0010 1A46 mov r2, r3 686 0012 1B68 ldr r3, [r3] - 687 .loc 1 2746 11 view .LVU242 + 687 .loc 1 2840 11 view .LVU242 688 0014 43F00103 orr r3, r3, #1 689 0018 1360 str r3, [r2] 690 001a 7047 bx lr 691 .L23: -2747:Src/main.c **** } -2748:Src/main.c **** else -2749:Src/main.c **** { -2750:Src/main.c **** DAC->CR &= ~DAC_CR_EN1; - 692 .loc 1 2750 3 is_stmt 1 view .LVU243 - 693 .loc 1 2750 6 is_stmt 0 view .LVU244 +2841:Src/main.c **** } +2842:Src/main.c **** else +2843:Src/main.c **** { +2844:Src/main.c **** DAC->CR &= ~DAC_CR_EN1; + 692 .loc 1 2844 3 is_stmt 1 view .LVU243 + ARM GAS /tmp/ccLSPxIe.s page 114 + + + 693 .loc 1 2844 6 is_stmt 0 view .LVU244 694 001c 024A ldr r2, .L26 695 001e 1368 ldr r3, [r2] - 696 .loc 1 2750 11 view .LVU245 + 696 .loc 1 2844 11 view .LVU245 697 0020 23F00103 bic r3, r3, #1 698 0024 1360 str r3, [r2] -2751:Src/main.c **** } -2752:Src/main.c **** } - 699 .loc 1 2752 1 view .LVU246 +2845:Src/main.c **** } +2846:Src/main.c **** } + 699 .loc 1 2846 1 view .LVU246 700 0026 7047 bx lr 701 .L27: 702 .align 2 @@ -6697,1156 +6797,1333 @@ ARM GAS /tmp/ccuHnxNu.s page 1 704 0028 00740040 .word 1073771520 705 .cfi_endproc 706 .LFE1217: - 708 .section .text.PID_Controller_Temp,"ax",%progbits + 708 .section .text.AD9102_ResetWaveUploadState,"ax",%progbits 709 .align 1 710 .syntax unified 711 .thumb 712 .thumb_func - 714 PID_Controller_Temp: - 715 .LVL44: - 716 .LFB1231: -2753:Src/main.c **** -2754:Src/main.c **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms) -2755:Src/main.c **** { -2756:Src/main.c **** for (uint16_t i = 0; i < count; i++) -2757:Src/main.c **** { -2758:Src/main.c **** if (uc) -2759:Src/main.c **** { -2760:Src/main.c **** HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_RESET); -2761:Src/main.c **** } -2762:Src/main.c **** if (dc) -2763:Src/main.c **** { -2764:Src/main.c **** HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_RESET); -2765:Src/main.c **** } - ARM GAS /tmp/ccuHnxNu.s page 113 + 714 AD9102_ResetWaveUploadState: + 715 .LFB1222: +2847:Src/main.c **** +2848:Src/main.c **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms) +2849:Src/main.c **** { +2850:Src/main.c **** for (uint16_t i = 0; i < count; i++) +2851:Src/main.c **** { +2852:Src/main.c **** if (uc) +2853:Src/main.c **** { +2854:Src/main.c **** HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_RESET); +2855:Src/main.c **** } +2856:Src/main.c **** if (dc) +2857:Src/main.c **** { +2858:Src/main.c **** HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_RESET); +2859:Src/main.c **** } +2860:Src/main.c **** HAL_Delay(pulse_ms); +2861:Src/main.c **** if (uc) +2862:Src/main.c **** { +2863:Src/main.c **** HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_SET); +2864:Src/main.c **** } +2865:Src/main.c **** if (dc) +2866:Src/main.c **** { +2867:Src/main.c **** HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_SET); +2868:Src/main.c **** } +2869:Src/main.c **** HAL_Delay(pulse_ms); +2870:Src/main.c **** } +2871:Src/main.c **** } +2872:Src/main.c **** +2873:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value) +2874:Src/main.c **** { +2875:Src/main.c **** uint32_t tmp32 = 0; +2876:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address +2877:Src/main.c **** +2878:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE); +2879:Src/main.c **** +2880:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); + ARM GAS /tmp/ccLSPxIe.s page 115 -2766:Src/main.c **** HAL_Delay(pulse_ms); -2767:Src/main.c **** if (uc) -2768:Src/main.c **** { -2769:Src/main.c **** HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_SET); -2770:Src/main.c **** } -2771:Src/main.c **** if (dc) -2772:Src/main.c **** { -2773:Src/main.c **** HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_SET); -2774:Src/main.c **** } -2775:Src/main.c **** HAL_Delay(pulse_ms); -2776:Src/main.c **** } -2777:Src/main.c **** } -2778:Src/main.c **** -2779:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value) -2780:Src/main.c **** { -2781:Src/main.c **** uint32_t tmp32 = 0; -2782:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address -2783:Src/main.c **** -2784:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE); -2785:Src/main.c **** -2786:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); -2787:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -2788:Src/main.c **** -2789:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) -2790:Src/main.c **** { -2791:Src/main.c **** LL_SPI_Enable(SPI2); -2792:Src/main.c **** } -2793:Src/main.c **** -2794:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); -2795:Src/main.c **** -2796:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2797:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); -2798:Src/main.c **** tmp32 = 0; -2799:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2800:Src/main.c **** (void) SPI2->DR; -2801:Src/main.c **** -2802:Src/main.c **** tmp32 = 0; -2803:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2804:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); -2805:Src/main.c **** tmp32 = 0; -2806:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2807:Src/main.c **** (void) SPI2->DR; -2808:Src/main.c **** -2809:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2810:Src/main.c **** } -2811:Src/main.c **** -2812:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr) -2813:Src/main.c **** { -2814:Src/main.c **** uint32_t tmp32 = 0; -2815:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) -2816:Src/main.c **** uint16_t value; -2817:Src/main.c **** -2818:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE); -2819:Src/main.c **** -2820:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); -2821:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -2822:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 114 - - -2823:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) -2824:Src/main.c **** { -2825:Src/main.c **** LL_SPI_Enable(SPI2); -2826:Src/main.c **** } -2827:Src/main.c **** -2828:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); -2829:Src/main.c **** -2830:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2831:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); -2832:Src/main.c **** tmp32 = 0; -2833:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2834:Src/main.c **** (void) SPI2->DR; -2835:Src/main.c **** -2836:Src/main.c **** tmp32 = 0; -2837:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} -2838:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); -2839:Src/main.c **** tmp32 = 0; -2840:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} -2841:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); -2842:Src/main.c **** -2843:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -2844:Src/main.c **** return value; -2845:Src/main.c **** } -2846:Src/main.c **** -2847:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count) -2848:Src/main.c **** { -2849:Src/main.c **** for (uint16_t i = 0; i < count; i++) -2850:Src/main.c **** { -2851:Src/main.c **** AD9102_WriteReg(ad9102_reg_addr[i], values[i]); -2852:Src/main.c **** } -2853:Src/main.c **** } -2854:Src/main.c **** -2855:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, -2856:Src/main.c **** { -2857:Src/main.c **** if (enable) -2858:Src/main.c **** { -2859:Src/main.c **** uint16_t saw_cfg; -2860:Src/main.c **** uint16_t pat_timebase; -2861:Src/main.c **** -2862:Src/main.c **** if (saw_step == 0u) -2863:Src/main.c **** { -2864:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; -2865:Src/main.c **** } -2866:Src/main.c **** if (saw_step > 63u) -2867:Src/main.c **** { -2868:Src/main.c **** saw_step = 63u; -2869:Src/main.c **** } -2870:Src/main.c **** saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | -2871:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); -2872:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | -2873:Src/main.c **** ((pat_base & 0x0Fu) << 4) | -2874:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); -2875:Src/main.c **** -2876:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG); -2877:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); -2878:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); -2879:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); - ARM GAS /tmp/ccuHnxNu.s page 115 - - -2880:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat -2881:Src/main.c **** -2882:Src/main.c **** // Update RUN then RAMUPDATE at the end of the write sequence. -2883:Src/main.c **** // AD9102 output is started by a falling edge of TRIGGER pin when RUN=1. -2884:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2885:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); -2886:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); -2887:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} -2888:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); -2889:Src/main.c **** } -2890:Src/main.c **** else -2891:Src/main.c **** { -2892:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -2893:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -2894:Src/main.c **** } +2881:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); +2882:Src/main.c **** +2883:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) +2884:Src/main.c **** { +2885:Src/main.c **** LL_SPI_Enable(SPI2); +2886:Src/main.c **** } +2887:Src/main.c **** +2888:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); +2889:Src/main.c **** +2890:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2891:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); +2892:Src/main.c **** tmp32 = 0; +2893:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2894:Src/main.c **** (void) SPI2->DR; 2895:Src/main.c **** -2896:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); -2897:Src/main.c **** } -2898:Src/main.c **** -2899:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude) -2900:Src/main.c **** { -2901:Src/main.c **** if (samples < 2u) -2902:Src/main.c **** { -2903:Src/main.c **** samples = 2u; -2904:Src/main.c **** } -2905:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) -2906:Src/main.c **** { -2907:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; -2908:Src/main.c **** } -2909:Src/main.c **** if (amplitude > AD9102_SRAM_AMP_DEFAULT) -2910:Src/main.c **** { -2911:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; -2912:Src/main.c **** } +2896:Src/main.c **** tmp32 = 0; +2897:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2898:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); +2899:Src/main.c **** tmp32 = 0; +2900:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2901:Src/main.c **** (void) SPI2->DR; +2902:Src/main.c **** +2903:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +2904:Src/main.c **** } +2905:Src/main.c **** +2906:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr) +2907:Src/main.c **** { +2908:Src/main.c **** uint32_t tmp32 = 0; +2909:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) +2910:Src/main.c **** uint16_t value; +2911:Src/main.c **** +2912:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE); 2913:Src/main.c **** -2914:Src/main.c **** // Enable SRAM access. -2915:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); +2914:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); +2915:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); 2916:Src/main.c **** -2917:Src/main.c **** for (uint16_t i = 0; i < samples; i++) +2917:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2)) 2918:Src/main.c **** { -2919:Src/main.c **** int32_t value; -2920:Src/main.c **** int32_t min_val = -(int32_t)amplitude; -2921:Src/main.c **** int32_t max_val = (int32_t)amplitude; -2922:Src/main.c **** int32_t span = max_val - min_val; -2923:Src/main.c **** if (triangle) -2924:Src/main.c **** { -2925:Src/main.c **** uint16_t half = samples / 2u; -2926:Src/main.c **** if (half == 0u) -2927:Src/main.c **** { -2928:Src/main.c **** half = 1u; -2929:Src/main.c **** } -2930:Src/main.c **** if (i < half) -2931:Src/main.c **** { -2932:Src/main.c **** uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u; -2933:Src/main.c **** if (span == 0) -2934:Src/main.c **** { -2935:Src/main.c **** value = 0; -2936:Src/main.c **** } - ARM GAS /tmp/ccuHnxNu.s page 116 +2919:Src/main.c **** LL_SPI_Enable(SPI2); +2920:Src/main.c **** } +2921:Src/main.c **** +2922:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET); +2923:Src/main.c **** +2924:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2925:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); +2926:Src/main.c **** tmp32 = 0; +2927:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2928:Src/main.c **** (void) SPI2->DR; +2929:Src/main.c **** +2930:Src/main.c **** tmp32 = 0; +2931:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} +2932:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); +2933:Src/main.c **** tmp32 = 0; +2934:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} +2935:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); +2936:Src/main.c **** +2937:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + ARM GAS /tmp/ccLSPxIe.s page 116 -2937:Src/main.c **** else -2938:Src/main.c **** { -2939:Src/main.c **** value = min_val + (span * (int32_t)i) / (int32_t)denom; -2940:Src/main.c **** } -2941:Src/main.c **** } -2942:Src/main.c **** else -2943:Src/main.c **** { -2944:Src/main.c **** uint16_t tail = (uint16_t)(samples - half); -2945:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; -2946:Src/main.c **** if (span == 0) -2947:Src/main.c **** { -2948:Src/main.c **** value = 0; -2949:Src/main.c **** } -2950:Src/main.c **** else -2951:Src/main.c **** { -2952:Src/main.c **** value = max_val - (span * (int32_t)(i - half)) / (int32_t)denom; -2953:Src/main.c **** } -2954:Src/main.c **** } -2955:Src/main.c **** } -2956:Src/main.c **** else -2957:Src/main.c **** { -2958:Src/main.c **** uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u; -2959:Src/main.c **** if (span == 0) -2960:Src/main.c **** { -2961:Src/main.c **** value = 0; -2962:Src/main.c **** } -2963:Src/main.c **** else -2964:Src/main.c **** { -2965:Src/main.c **** value = min_val + (span * (int32_t)i) / (int32_t)denom; -2966:Src/main.c **** } -2967:Src/main.c **** } -2968:Src/main.c **** -2969:Src/main.c **** if (value < -8192) -2970:Src/main.c **** { -2971:Src/main.c **** value = -8192; -2972:Src/main.c **** } -2973:Src/main.c **** else if (value > 8191) -2974:Src/main.c **** { -2975:Src/main.c **** value = 8191; -2976:Src/main.c **** } -2977:Src/main.c **** -2978:Src/main.c **** uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu; -2979:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); -2980:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); -2981:Src/main.c **** } -2982:Src/main.c **** -2983:Src/main.c **** // Disable SRAM access. -2984:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -2985:Src/main.c **** } -2986:Src/main.c **** -2987:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, -2988:Src/main.c **** { -2989:Src/main.c **** if (samples == 0u) -2990:Src/main.c **** { -2991:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT; -2992:Src/main.c **** } -2993:Src/main.c **** if (samples < 2u) - ARM GAS /tmp/ccuHnxNu.s page 117 +2938:Src/main.c **** return value; +2939:Src/main.c **** } +2940:Src/main.c **** +2941:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count) +2942:Src/main.c **** { +2943:Src/main.c **** for (uint16_t i = 0; i < count; i++) +2944:Src/main.c **** { +2945:Src/main.c **** AD9102_WriteReg(ad9102_reg_addr[i], values[i]); +2946:Src/main.c **** } +2947:Src/main.c **** } +2948:Src/main.c **** +2949:Src/main.c **** static void AD9102_ResetWaveUploadState(void) +2950:Src/main.c **** { + 716 .loc 1 2950 1 is_stmt 1 view -0 + 717 .cfi_startproc + 718 @ args = 0, pretend = 0, frame = 0 + 719 @ frame_needed = 0, uses_anonymous_args = 0 + 720 @ link register save eliminated. +2951:Src/main.c **** ad9102_wave_upload_active = 0u; + 721 .loc 1 2951 2 view .LVU248 + 722 .loc 1 2951 28 is_stmt 0 view .LVU249 + 723 0000 0023 movs r3, #0 + 724 0002 034A ldr r2, .L29 + 725 0004 1370 strb r3, [r2] +2952:Src/main.c **** ad9102_wave_expected_samples = 0u; + 726 .loc 1 2952 2 is_stmt 1 view .LVU250 + 727 .loc 1 2952 31 is_stmt 0 view .LVU251 + 728 0006 034A ldr r2, .L29+4 + 729 0008 1380 strh r3, [r2] @ movhi +2953:Src/main.c **** ad9102_wave_written_samples = 0u; + 730 .loc 1 2953 2 is_stmt 1 view .LVU252 + 731 .loc 1 2953 30 is_stmt 0 view .LVU253 + 732 000a 034A ldr r2, .L29+8 + 733 000c 1380 strh r3, [r2] @ movhi +2954:Src/main.c **** } + 734 .loc 1 2954 1 view .LVU254 + 735 000e 7047 bx lr + 736 .L30: + 737 .align 2 + 738 .L29: + 739 0010 00000000 .word ad9102_wave_upload_active + 740 0014 00000000 .word ad9102_wave_expected_samples + 741 0018 00000000 .word ad9102_wave_written_samples + 742 .cfi_endproc + 743 .LFE1222: + 745 .section .text.PID_Controller_Temp,"ax",%progbits + 746 .align 1 + 747 .syntax unified + 748 .thumb + 749 .thumb_func + 751 PID_Controller_Temp: + 752 .LVL44: + 753 .LFB1239: +2955:Src/main.c **** +2956:Src/main.c **** static void AD9102_StopOutput(void) +2957:Src/main.c **** { +2958:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + ARM GAS /tmp/ccLSPxIe.s page 117 -2994:Src/main.c **** { -2995:Src/main.c **** samples = 2u; -2996:Src/main.c **** } -2997:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) +2959:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2960:Src/main.c **** } +2961:Src/main.c **** +2962:Src/main.c **** static void AD9102_StartOutput(void) +2963:Src/main.c **** { +2964:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); +2965:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); +2966:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +2967:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} +2968:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); +2969:Src/main.c **** } +2970:Src/main.c **** +2971:Src/main.c **** static void AD9102_ConfigureSramPlayback(uint16_t samples, uint8_t hold) +2972:Src/main.c **** { +2973:Src/main.c **** uint16_t pat_timebase; +2974:Src/main.c **** uint32_t pat_period; +2975:Src/main.c **** +2976:Src/main.c **** if (samples < 2u) +2977:Src/main.c **** { +2978:Src/main.c **** samples = 2u; +2979:Src/main.c **** } +2980:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) +2981:Src/main.c **** { +2982:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; +2983:Src/main.c **** } +2984:Src/main.c **** if (hold == 0u) +2985:Src/main.c **** { +2986:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; +2987:Src/main.c **** } +2988:Src/main.c **** if (hold > 0x0Fu) +2989:Src/main.c **** { +2990:Src/main.c **** hold = 0x0Fu; +2991:Src/main.c **** } +2992:Src/main.c **** +2993:Src/main.c **** pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | +2994:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | +2995:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); +2996:Src/main.c **** pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); +2997:Src/main.c **** if (pat_period == 0u) 2998:Src/main.c **** { -2999:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; +2999:Src/main.c **** pat_period = samples; 3000:Src/main.c **** } -3001:Src/main.c **** if (hold == 0u) +3001:Src/main.c **** if (pat_period > 0xFFFFu) 3002:Src/main.c **** { -3003:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; +3003:Src/main.c **** pat_period = 0xFFFFu; 3004:Src/main.c **** } -3005:Src/main.c **** if (hold > 0x0Fu) -3006:Src/main.c **** { -3007:Src/main.c **** hold = 0x0Fu; -3008:Src/main.c **** } -3009:Src/main.c **** -3010:Src/main.c **** if (amplitude > AD9102_SRAM_AMP_DEFAULT) -3011:Src/main.c **** { -3012:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; -3013:Src/main.c **** } -3014:Src/main.c **** -3015:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | -3016:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | -3017:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); -3018:Src/main.c **** uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); -3019:Src/main.c **** if (pat_period == 0u) -3020:Src/main.c **** { -3021:Src/main.c **** pat_period = samples; -3022:Src/main.c **** } -3023:Src/main.c **** if (pat_period > 0xFFFFu) -3024:Src/main.c **** { -3025:Src/main.c **** pat_period = 0xFFFFu; -3026:Src/main.c **** } -3027:Src/main.c **** -3028:Src/main.c **** AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT); -3029:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -3030:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); -3031:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); -3032:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); -3033:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); -3034:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); -3035:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat -3036:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); -3037:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); -3038:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); -3039:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); -3040:Src/main.c **** -3041:Src/main.c **** AD9102_LoadSramRamp(samples, triangle, amplitude); -3042:Src/main.c **** -3043:Src/main.c **** if (enable) -3044:Src/main.c **** { -3045:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -3046:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); -3047:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); -3048:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} -3049:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); -3050:Src/main.c **** } - ARM GAS /tmp/ccuHnxNu.s page 118 +3005:Src/main.c **** +3006:Src/main.c **** AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT); +3007:Src/main.c **** AD9102_StopOutput(); +3008:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); +3009:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); +3010:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); +3011:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); +3012:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); +3013:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat +3014:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); +3015:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); + ARM GAS /tmp/ccLSPxIe.s page 118 -3051:Src/main.c **** else -3052:Src/main.c **** { -3053:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); -3054:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); -3055:Src/main.c **** } -3056:Src/main.c **** -3057:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); -3058:Src/main.c **** } -3059:Src/main.c **** -3060:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t -3061:Src/main.c **** { -3062:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); -3063:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); -3064:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); -3065:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); -3066:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | -3067:Src/main.c **** ((pat_base & 0x0Fu) << 4) | -3068:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); -3069:Src/main.c **** -3070:Src/main.c **** if (saw_step == 0u) -3071:Src/main.c **** { -3072:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; -3073:Src/main.c **** } -3074:Src/main.c **** if (saw_step > 63u) -3075:Src/main.c **** { -3076:Src/main.c **** saw_step = 63u; -3077:Src/main.c **** } -3078:Src/main.c **** if (pat_period == 0u) -3079:Src/main.c **** { -3080:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; -3081:Src/main.c **** } -3082:Src/main.c **** uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | -3083:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); -3084:Src/main.c **** -3085:Src/main.c **** uint8_t ok = 1u; -3086:Src/main.c **** -3087:Src/main.c **** // Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset. -3088:Src/main.c **** if (spiconfig != 0x0000u) -3089:Src/main.c **** { -3090:Src/main.c **** ok = 0u; -3091:Src/main.c **** } -3092:Src/main.c **** -3093:Src/main.c **** // Power blocks should not be powered down. -3094:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) -3095:Src/main.c **** { -3096:Src/main.c **** ok = 0u; -3097:Src/main.c **** } -3098:Src/main.c **** -3099:Src/main.c **** // Clock receiver must be enabled (cannot directly detect external clock presence). -3100:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) -3101:Src/main.c **** { -3102:Src/main.c **** ok = 0u; -3103:Src/main.c **** } -3104:Src/main.c **** -3105:Src/main.c **** // Any configuration error flags indicate a bad setup. -3106:Src/main.c **** if (cfg_err & 0x003Fu) -3107:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 119 +3016:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); +3017:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +3018:Src/main.c **** } +3019:Src/main.c **** +3020:Src/main.c **** static uint8_t AD9102_BeginWaveUpload(uint16_t samples) +3021:Src/main.c **** { +3022:Src/main.c **** if ((samples < 2u) || (samples > AD9102_SRAM_MAX_SAMPLES)) +3023:Src/main.c **** { +3024:Src/main.c **** return 0u; +3025:Src/main.c **** } +3026:Src/main.c **** +3027:Src/main.c **** AD9102_StopOutput(); +3028:Src/main.c **** AD9102_ResetWaveUploadState(); +3029:Src/main.c **** AD9102_ConfigureSramPlayback(samples, AD9102_SRAM_HOLD_DEFAULT); +3030:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); // enable SRAM access +3031:Src/main.c **** +3032:Src/main.c **** ad9102_wave_expected_samples = samples; +3033:Src/main.c **** ad9102_wave_written_samples = 0u; +3034:Src/main.c **** ad9102_wave_upload_active = 1u; +3035:Src/main.c **** return 1u; +3036:Src/main.c **** } +3037:Src/main.c **** +3038:Src/main.c **** static uint8_t AD9102_WriteWaveUploadChunk(const uint16_t *samples, uint16_t chunk_count) +3039:Src/main.c **** { +3040:Src/main.c **** if (ad9102_wave_upload_active == 0u) +3041:Src/main.c **** { +3042:Src/main.c **** return 0u; +3043:Src/main.c **** } +3044:Src/main.c **** if ((chunk_count == 0u) || (chunk_count > AD9102_WAVE_MAX_CHUNK_SAMPLES)) +3045:Src/main.c **** { +3046:Src/main.c **** return 0u; +3047:Src/main.c **** } +3048:Src/main.c **** if (((uint32_t)ad9102_wave_written_samples + (uint32_t)chunk_count) > (uint32_t)ad9102_wave_expect +3049:Src/main.c **** { +3050:Src/main.c **** return 0u; +3051:Src/main.c **** } +3052:Src/main.c **** +3053:Src/main.c **** for (uint16_t i = 0; i < chunk_count; i++) +3054:Src/main.c **** { +3055:Src/main.c **** int16_t sample = (int16_t)samples[i]; +3056:Src/main.c **** uint16_t sample_u14; +3057:Src/main.c **** uint16_t word; +3058:Src/main.c **** +3059:Src/main.c **** if ((sample < AD9102_SRAM_RAMP_MIN) || (sample > AD9102_SRAM_RAMP_MAX)) +3060:Src/main.c **** { +3061:Src/main.c **** return 0u; +3062:Src/main.c **** } +3063:Src/main.c **** +3064:Src/main.c **** sample_u14 = ((uint16_t)sample) & 0x3FFFu; +3065:Src/main.c **** word = (uint16_t)(sample_u14 << 2); +3066:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + ad9102_wave_written_samples + i), word); +3067:Src/main.c **** } +3068:Src/main.c **** +3069:Src/main.c **** ad9102_wave_written_samples = (uint16_t)(ad9102_wave_written_samples + chunk_count); +3070:Src/main.c **** return 1u; +3071:Src/main.c **** } +3072:Src/main.c **** + ARM GAS /tmp/ccLSPxIe.s page 119 -3108:Src/main.c **** ok = 0u; -3109:Src/main.c **** } -3110:Src/main.c **** -3111:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) -3112:Src/main.c **** { -3113:Src/main.c **** ok = 0u; -3114:Src/main.c **** } -3115:Src/main.c **** -3116:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG) -3117:Src/main.c **** { -3118:Src/main.c **** ok = 0u; -3119:Src/main.c **** } -3120:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) -3121:Src/main.c **** { -3122:Src/main.c **** ok = 0u; -3123:Src/main.c **** } -3124:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period) -3125:Src/main.c **** { -3126:Src/main.c **** ok = 0u; -3127:Src/main.c **** } -3128:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) -3129:Src/main.c **** { -3130:Src/main.c **** ok = 0u; -3131:Src/main.c **** } -3132:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw) -3133:Src/main.c **** { -3134:Src/main.c **** ok = 0u; -3135:Src/main.c **** } -3136:Src/main.c **** -3137:Src/main.c **** return (ok ? 0u : 1u); -3138:Src/main.c **** } -3139:Src/main.c **** -3140:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin -3141:Src/main.c **** { -3142:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); -3143:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); -3144:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); -3145:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); -3146:Src/main.c **** -3147:Src/main.c **** if (samples == 0u) -3148:Src/main.c **** { -3149:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT; -3150:Src/main.c **** } -3151:Src/main.c **** if (samples < 2u) -3152:Src/main.c **** { -3153:Src/main.c **** samples = 2u; -3154:Src/main.c **** } -3155:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) -3156:Src/main.c **** { -3157:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; -3158:Src/main.c **** } -3159:Src/main.c **** if (hold == 0u) -3160:Src/main.c **** { -3161:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; -3162:Src/main.c **** } -3163:Src/main.c **** if (hold > 0x0Fu) -3164:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 120 +3073:Src/main.c **** static uint16_t AD9102_CommitWaveUpload(uint8_t *ok) +3074:Src/main.c **** { +3075:Src/main.c **** uint16_t pat_status; +3076:Src/main.c **** +3077:Src/main.c **** if (ok != NULL) +3078:Src/main.c **** { +3079:Src/main.c **** *ok = 0u; +3080:Src/main.c **** } +3081:Src/main.c **** +3082:Src/main.c **** if ((ad9102_wave_upload_active == 0u) || +3083:Src/main.c **** (ad9102_wave_expected_samples < 2u) || +3084:Src/main.c **** (ad9102_wave_written_samples != ad9102_wave_expected_samples)) +3085:Src/main.c **** { +3086:Src/main.c **** AD9102_CancelWaveUpload(); +3087:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); +3088:Src/main.c **** } +3089:Src/main.c **** +3090:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); // disable SRAM access +3091:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); +3092:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((ad9102_wave_expected_samples - 1u) << 4)); +3093:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); +3094:Src/main.c **** AD9102_StartOutput(); +3095:Src/main.c **** pat_status = AD9102_ReadReg(AD9102_REG_PAT_STATUS); +3096:Src/main.c **** +3097:Src/main.c **** AD9102_ResetWaveUploadState(); +3098:Src/main.c **** if (ok != NULL) +3099:Src/main.c **** { +3100:Src/main.c **** *ok = 1u; +3101:Src/main.c **** } +3102:Src/main.c **** +3103:Src/main.c **** return pat_status; +3104:Src/main.c **** } +3105:Src/main.c **** +3106:Src/main.c **** static void AD9102_CancelWaveUpload(void) +3107:Src/main.c **** { +3108:Src/main.c **** if (ad9102_wave_upload_active != 0u) +3109:Src/main.c **** { +3110:Src/main.c **** AD9102_StopOutput(); +3111:Src/main.c **** } +3112:Src/main.c **** AD9102_ResetWaveUploadState(); +3113:Src/main.c **** } +3114:Src/main.c **** +3115:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, +3116:Src/main.c **** { +3117:Src/main.c **** AD9102_ResetWaveUploadState(); +3118:Src/main.c **** +3119:Src/main.c **** if (enable) +3120:Src/main.c **** { +3121:Src/main.c **** uint16_t saw_cfg; +3122:Src/main.c **** uint16_t pat_timebase; +3123:Src/main.c **** +3124:Src/main.c **** if (saw_step == 0u) +3125:Src/main.c **** { +3126:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; +3127:Src/main.c **** } +3128:Src/main.c **** if (saw_step > 63u) +3129:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 120 -3165:Src/main.c **** hold = 0x0Fu; -3166:Src/main.c **** } -3167:Src/main.c **** -3168:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | -3169:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | -3170:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); -3171:Src/main.c **** uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); -3172:Src/main.c **** if (pat_period == 0u) +3130:Src/main.c **** saw_step = 63u; +3131:Src/main.c **** } +3132:Src/main.c **** saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | +3133:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); +3134:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | +3135:Src/main.c **** ((pat_base & 0x0Fu) << 4) | +3136:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); +3137:Src/main.c **** +3138:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG); +3139:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); +3140:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); +3141:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); +3142:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat +3143:Src/main.c **** +3144:Src/main.c **** AD9102_StartOutput(); +3145:Src/main.c **** } +3146:Src/main.c **** else +3147:Src/main.c **** { +3148:Src/main.c **** AD9102_StopOutput(); +3149:Src/main.c **** } +3150:Src/main.c **** +3151:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); +3152:Src/main.c **** } +3153:Src/main.c **** +3154:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude) +3155:Src/main.c **** { +3156:Src/main.c **** if (samples < 2u) +3157:Src/main.c **** { +3158:Src/main.c **** samples = 2u; +3159:Src/main.c **** } +3160:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) +3161:Src/main.c **** { +3162:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; +3163:Src/main.c **** } +3164:Src/main.c **** if (amplitude > AD9102_SRAM_AMP_DEFAULT) +3165:Src/main.c **** { +3166:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; +3167:Src/main.c **** } +3168:Src/main.c **** +3169:Src/main.c **** // Enable SRAM access. +3170:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); +3171:Src/main.c **** +3172:Src/main.c **** for (uint16_t i = 0; i < samples; i++) 3173:Src/main.c **** { -3174:Src/main.c **** pat_period = samples; -3175:Src/main.c **** } -3176:Src/main.c **** if (pat_period > 0xFFFFu) -3177:Src/main.c **** { -3178:Src/main.c **** pat_period = 0xFFFFu; -3179:Src/main.c **** } -3180:Src/main.c **** -3181:Src/main.c **** uint16_t stop_addr = (uint16_t)((samples - 1u) << 4); -3182:Src/main.c **** -3183:Src/main.c **** uint8_t ok = 1u; -3184:Src/main.c **** -3185:Src/main.c **** if (spiconfig != 0x0000u) -3186:Src/main.c **** { -3187:Src/main.c **** ok = 0u; -3188:Src/main.c **** } -3189:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) -3190:Src/main.c **** { -3191:Src/main.c **** ok = 0u; -3192:Src/main.c **** } -3193:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) -3194:Src/main.c **** { -3195:Src/main.c **** ok = 0u; -3196:Src/main.c **** } -3197:Src/main.c **** if (cfg_err & 0x003Fu) -3198:Src/main.c **** { -3199:Src/main.c **** ok = 0u; -3200:Src/main.c **** } -3201:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) -3202:Src/main.c **** { -3203:Src/main.c **** ok = 0u; -3204:Src/main.c **** } -3205:Src/main.c **** -3206:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG) -3207:Src/main.c **** { -3208:Src/main.c **** ok = 0u; -3209:Src/main.c **** } -3210:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) -3211:Src/main.c **** { -3212:Src/main.c **** ok = 0u; -3213:Src/main.c **** } -3214:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period) -3215:Src/main.c **** { -3216:Src/main.c **** ok = 0u; -3217:Src/main.c **** } -3218:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) -3219:Src/main.c **** { -3220:Src/main.c **** ok = 0u; -3221:Src/main.c **** } - ARM GAS /tmp/ccuHnxNu.s page 121 +3174:Src/main.c **** int32_t value; +3175:Src/main.c **** int32_t min_val = -(int32_t)amplitude; +3176:Src/main.c **** int32_t max_val = (int32_t)amplitude; +3177:Src/main.c **** int32_t span = max_val - min_val; +3178:Src/main.c **** if (triangle) +3179:Src/main.c **** { +3180:Src/main.c **** uint16_t half = samples / 2u; +3181:Src/main.c **** if (half == 0u) +3182:Src/main.c **** { +3183:Src/main.c **** half = 1u; +3184:Src/main.c **** } +3185:Src/main.c **** if (i < half) +3186:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 121 -3222:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_START_ADDR) != 0x0000u) -3223:Src/main.c **** { -3224:Src/main.c **** ok = 0u; -3225:Src/main.c **** } -3226:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_STOP_ADDR) != stop_addr) -3227:Src/main.c **** { -3228:Src/main.c **** ok = 0u; -3229:Src/main.c **** } -3230:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT) -3231:Src/main.c **** { -3232:Src/main.c **** ok = 0u; -3233:Src/main.c **** } -3234:Src/main.c **** -3235:Src/main.c **** return (ok ? 0u : 1u); -3236:Src/main.c **** } +3187:Src/main.c **** uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u; +3188:Src/main.c **** if (span == 0) +3189:Src/main.c **** { +3190:Src/main.c **** value = 0; +3191:Src/main.c **** } +3192:Src/main.c **** else +3193:Src/main.c **** { +3194:Src/main.c **** value = min_val + (span * (int32_t)i) / (int32_t)denom; +3195:Src/main.c **** } +3196:Src/main.c **** } +3197:Src/main.c **** else +3198:Src/main.c **** { +3199:Src/main.c **** uint16_t tail = (uint16_t)(samples - half); +3200:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; +3201:Src/main.c **** if (span == 0) +3202:Src/main.c **** { +3203:Src/main.c **** value = 0; +3204:Src/main.c **** } +3205:Src/main.c **** else +3206:Src/main.c **** { +3207:Src/main.c **** value = max_val - (span * (int32_t)(i - half)) / (int32_t)denom; +3208:Src/main.c **** } +3209:Src/main.c **** } +3210:Src/main.c **** } +3211:Src/main.c **** else +3212:Src/main.c **** { +3213:Src/main.c **** uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u; +3214:Src/main.c **** if (span == 0) +3215:Src/main.c **** { +3216:Src/main.c **** value = 0; +3217:Src/main.c **** } +3218:Src/main.c **** else +3219:Src/main.c **** { +3220:Src/main.c **** value = min_val + (span * (int32_t)i) / (int32_t)denom; +3221:Src/main.c **** } +3222:Src/main.c **** } +3223:Src/main.c **** +3224:Src/main.c **** if (value < AD9102_SRAM_RAMP_MIN) +3225:Src/main.c **** { +3226:Src/main.c **** value = AD9102_SRAM_RAMP_MIN; +3227:Src/main.c **** } +3228:Src/main.c **** else if (value > AD9102_SRAM_RAMP_MAX) +3229:Src/main.c **** { +3230:Src/main.c **** value = AD9102_SRAM_RAMP_MAX; +3231:Src/main.c **** } +3232:Src/main.c **** +3233:Src/main.c **** uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu; +3234:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); +3235:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); +3236:Src/main.c **** } 3237:Src/main.c **** -3238:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) -3239:Src/main.c **** { -3240:Src/main.c **** uint32_t tmp32; +3238:Src/main.c **** // Disable SRAM access. +3239:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); +3240:Src/main.c **** } 3241:Src/main.c **** -3242:Src/main.c **** if (num == 1 || num == 3) -3243:Src/main.c **** { -3244:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_2EDGE); -3245:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); -3246:Src/main.c **** } -3247:Src/main.c **** -3248:Src/main.c **** switch (num) -3249:Src/main.c **** { -3250:Src/main.c **** case 1: -3251:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L -3252:Src/main.c **** //tmp32=0; -3253:Src/main.c **** //while(tmp32<500){tmp32++;} -3254:Src/main.c **** tmp32 = 0; -3255:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -3256:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -3257:Src/main.c **** tmp32 = 0; -3258:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -3259:Src/main.c **** (void) SPI2->DR; -3260:Src/main.c **** break; -3261:Src/main.c **** case 2: -3262:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes -3263:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L -3264:Src/main.c **** //tmp32=0; -3265:Src/main.c **** //while(tmp32<500){tmp32++;} -3266:Src/main.c **** tmp32 = 0; -3267:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -3268:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC -3269:Src/main.c **** tmp32 = 0; -3270:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -3271:Src/main.c **** (void) SPI6->DR; -3272:Src/main.c **** break; -3273:Src/main.c **** case 3: -3274:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with -3275:Src/main.c **** //tmp32=0; -3276:Src/main.c **** //while(tmp32<500){tmp32++;} -3277:Src/main.c **** tmp32 = 0; -3278:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - ARM GAS /tmp/ccuHnxNu.s page 122 +3242:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, +3243:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 122 -3279:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -3280:Src/main.c **** tmp32 = 0; -3281:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -3282:Src/main.c **** (void) SPI2->DR; -3283:Src/main.c **** break; -3284:Src/main.c **** case 4: -3285:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with -3286:Src/main.c **** //tmp32=0; -3287:Src/main.c **** //while(tmp32<500){tmp32++;} -3288:Src/main.c **** tmp32 = 0; -3289:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -3290:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC -3291:Src/main.c **** tmp32 = 0; -3292:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -3293:Src/main.c **** (void) SPI6->DR; -3294:Src/main.c **** break; -3295:Src/main.c **** } -3296:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 -3297:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 -3298:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 -3299:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 -3300:Src/main.c **** } -3301:Src/main.c **** static uint16_t MPhD_T(uint8_t num) -3302:Src/main.c **** { -3303:Src/main.c **** uint16_t P; -3304:Src/main.c **** uint32_t tmp32; -3305:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -3306:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -3307:Src/main.c **** tmp32=0; -3308:Src/main.c **** while(tmp32<500){tmp32++;} -3309:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -3310:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -3311:Src/main.c **** tmp32=0; -3312:Src/main.c **** while(tmp32<500){tmp32++;} -3313:Src/main.c **** if (num==1)//MPD1 -3314:Src/main.c **** { -3315:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -3316:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); -3317:Src/main.c **** tmp32=0; -3318:Src/main.c **** while(tmp32<500){tmp32++;} -3319:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -3320:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC -3321:Src/main.c **** tmp32 = 0; -3322:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -3323:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC -3324:Src/main.c **** while(tmp32<500){tmp32++;} -3325:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -3326:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -3327:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -3328:Src/main.c **** } -3329:Src/main.c **** else if (num==2)//MPD2 -3330:Src/main.c **** { -3331:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -3332:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); -3333:Src/main.c **** tmp32=0; -3334:Src/main.c **** while(tmp32<500){tmp32++;} -3335:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - ARM GAS /tmp/ccuHnxNu.s page 123 +3244:Src/main.c **** AD9102_ResetWaveUploadState(); +3245:Src/main.c **** +3246:Src/main.c **** if (samples == 0u) +3247:Src/main.c **** { +3248:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT; +3249:Src/main.c **** } +3250:Src/main.c **** if (samples < 2u) +3251:Src/main.c **** { +3252:Src/main.c **** samples = 2u; +3253:Src/main.c **** } +3254:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) +3255:Src/main.c **** { +3256:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; +3257:Src/main.c **** } +3258:Src/main.c **** if (hold == 0u) +3259:Src/main.c **** { +3260:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; +3261:Src/main.c **** } +3262:Src/main.c **** if (hold > 0x0Fu) +3263:Src/main.c **** { +3264:Src/main.c **** hold = 0x0Fu; +3265:Src/main.c **** } +3266:Src/main.c **** +3267:Src/main.c **** if (amplitude > AD9102_SRAM_AMP_DEFAULT) +3268:Src/main.c **** { +3269:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; +3270:Src/main.c **** } +3271:Src/main.c **** +3272:Src/main.c **** AD9102_ConfigureSramPlayback(samples, hold); +3273:Src/main.c **** AD9102_LoadSramRamp(samples, triangle, amplitude); +3274:Src/main.c **** +3275:Src/main.c **** if (enable) +3276:Src/main.c **** { +3277:Src/main.c **** AD9102_StartOutput(); +3278:Src/main.c **** } +3279:Src/main.c **** else +3280:Src/main.c **** { +3281:Src/main.c **** AD9102_StopOutput(); +3282:Src/main.c **** } +3283:Src/main.c **** +3284:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); +3285:Src/main.c **** } +3286:Src/main.c **** +3287:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t +3288:Src/main.c **** { +3289:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); +3290:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); +3291:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); +3292:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); +3293:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | +3294:Src/main.c **** ((pat_base & 0x0Fu) << 4) | +3295:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); +3296:Src/main.c **** +3297:Src/main.c **** if (saw_step == 0u) +3298:Src/main.c **** { +3299:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT; +3300:Src/main.c **** } + ARM GAS /tmp/ccLSPxIe.s page 123 -3336:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC -3337:Src/main.c **** tmp32 = 0; -3338:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -3339:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC -3340:Src/main.c **** while(tmp32<500){tmp32++;} -3341:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -3342:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -3343:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -3344:Src/main.c **** } -3345:Src/main.c **** else if (num==3)//ThrLD1 -3346:Src/main.c **** { -3347:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -3348:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -3349:Src/main.c **** tmp32=0; -3350:Src/main.c **** while(tmp32<500){tmp32++;} -3351:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -3352:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC -3353:Src/main.c **** tmp32 = 0; -3354:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -3355:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC -3356:Src/main.c **** while(tmp32<500){tmp32++;} -3357:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -3358:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -3359:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -3360:Src/main.c **** } -3361:Src/main.c **** else if (num==4)//ThrLD2 -3362:Src/main.c **** { -3363:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -3364:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -3365:Src/main.c **** tmp32=0; -3366:Src/main.c **** while(tmp32<500){tmp32++;} -3367:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -3368:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC -3369:Src/main.c **** tmp32 = 0; -3370:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -3371:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC -3372:Src/main.c **** while(tmp32<500){tmp32++;} -3373:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -3374:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -3375:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -3376:Src/main.c **** } -3377:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; -3378:Src/main.c **** -3379:Src/main.c **** Inorm = (float) (65535) / (float) (100); -3380:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); -3381:Src/main.c **** Tnorm2 = 4; -3382:Src/main.c **** Pnorm = (float)(65535) / (float)(20); -3383:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system -3384:Src/main.c **** T0m = 48.6282; -3385:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; -3386:Src/main.c **** -3387:Src/main.c **** Ith = I0m * expf(T_C/T0m); -3388:Src/main.c **** I_LD = (float) (C_LD) / Inorm; -3389:Src/main.c **** -3390:Src/main.c **** if (I_LD > Ith) +3301:Src/main.c **** if (saw_step > 63u) +3302:Src/main.c **** { +3303:Src/main.c **** saw_step = 63u; +3304:Src/main.c **** } +3305:Src/main.c **** if (pat_period == 0u) +3306:Src/main.c **** { +3307:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; +3308:Src/main.c **** } +3309:Src/main.c **** uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | +3310:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); +3311:Src/main.c **** +3312:Src/main.c **** uint8_t ok = 1u; +3313:Src/main.c **** +3314:Src/main.c **** // Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset. +3315:Src/main.c **** if (spiconfig != 0x0000u) +3316:Src/main.c **** { +3317:Src/main.c **** ok = 0u; +3318:Src/main.c **** } +3319:Src/main.c **** +3320:Src/main.c **** // Power blocks should not be powered down. +3321:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) +3322:Src/main.c **** { +3323:Src/main.c **** ok = 0u; +3324:Src/main.c **** } +3325:Src/main.c **** +3326:Src/main.c **** // Clock receiver must be enabled (cannot directly detect external clock presence). +3327:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) +3328:Src/main.c **** { +3329:Src/main.c **** ok = 0u; +3330:Src/main.c **** } +3331:Src/main.c **** +3332:Src/main.c **** // Any configuration error flags indicate a bad setup. +3333:Src/main.c **** if (cfg_err & 0x003Fu) +3334:Src/main.c **** { +3335:Src/main.c **** ok = 0u; +3336:Src/main.c **** } +3337:Src/main.c **** +3338:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) +3339:Src/main.c **** { +3340:Src/main.c **** ok = 0u; +3341:Src/main.c **** } +3342:Src/main.c **** +3343:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG) +3344:Src/main.c **** { +3345:Src/main.c **** ok = 0u; +3346:Src/main.c **** } +3347:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) +3348:Src/main.c **** { +3349:Src/main.c **** ok = 0u; +3350:Src/main.c **** } +3351:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period) +3352:Src/main.c **** { +3353:Src/main.c **** ok = 0u; +3354:Src/main.c **** } +3355:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) +3356:Src/main.c **** { +3357:Src/main.c **** ok = 0u; + ARM GAS /tmp/ccLSPxIe.s page 124 + + +3358:Src/main.c **** } +3359:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw) +3360:Src/main.c **** { +3361:Src/main.c **** ok = 0u; +3362:Src/main.c **** } +3363:Src/main.c **** +3364:Src/main.c **** return (ok ? 0u : 1u); +3365:Src/main.c **** } +3366:Src/main.c **** +3367:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin +3368:Src/main.c **** { +3369:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); +3370:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); +3371:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); +3372:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); +3373:Src/main.c **** +3374:Src/main.c **** if (samples == 0u) +3375:Src/main.c **** { +3376:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT; +3377:Src/main.c **** } +3378:Src/main.c **** if (samples < 2u) +3379:Src/main.c **** { +3380:Src/main.c **** samples = 2u; +3381:Src/main.c **** } +3382:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES) +3383:Src/main.c **** { +3384:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES; +3385:Src/main.c **** } +3386:Src/main.c **** if (hold == 0u) +3387:Src/main.c **** { +3388:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT; +3389:Src/main.c **** } +3390:Src/main.c **** if (hold > 0x0Fu) 3391:Src/main.c **** { -3392:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ - ARM GAS /tmp/ccuHnxNu.s page 124 +3392:Src/main.c **** hold = 0x0Fu; +3393:Src/main.c **** } +3394:Src/main.c **** +3395:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | +3396:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | +3397:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); +3398:Src/main.c **** uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu); +3399:Src/main.c **** if (pat_period == 0u) +3400:Src/main.c **** { +3401:Src/main.c **** pat_period = samples; +3402:Src/main.c **** } +3403:Src/main.c **** if (pat_period > 0xFFFFu) +3404:Src/main.c **** { +3405:Src/main.c **** pat_period = 0xFFFFu; +3406:Src/main.c **** } +3407:Src/main.c **** +3408:Src/main.c **** uint16_t stop_addr = (uint16_t)((samples - 1u) << 4); +3409:Src/main.c **** +3410:Src/main.c **** uint8_t ok = 1u; +3411:Src/main.c **** +3412:Src/main.c **** if (spiconfig != 0x0000u) +3413:Src/main.c **** { +3414:Src/main.c **** ok = 0u; + ARM GAS /tmp/ccLSPxIe.s page 125 -3393:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; -3394:Src/main.c **** } -3395:Src/main.c **** else -3396:Src/main.c **** { -3397:Src/main.c **** P = 0; -3398:Src/main.c **** } */ -3399:Src/main.c **** return P; -3400:Src/main.c **** } -3401:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time -3402:Src/main.c **** { -3403:Src/main.c **** uint16_t Result; -3404:Src/main.c **** // uint8_t randf; -3405:Src/main.c **** -3406:Src/main.c **** randf = 0; -3407:Src/main.c **** for (uint8_t i = 0; i < 32; i++) -3408:Src/main.c **** { -3409:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; -3410:Src/main.c **** } -3411:Src/main.c **** -3412:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl -3413:Src/main.c **** -3414:Src/main.c **** return (uint16_t)(Result); -3415:Src/main.c **** }*/ -3416:Src/main.c **** static uint16_t Get_ADC(uint8_t num) -3417:Src/main.c **** { -3418:Src/main.c **** uint16_t OUT; -3419:Src/main.c **** switch (num) -3420:Src/main.c **** { -3421:Src/main.c **** case 0: -3422:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on -3423:Src/main.c **** break; -3424:Src/main.c **** case 1: -3425:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion -3426:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc -3427:Src/main.c **** break; -3428:Src/main.c **** case 2: -3429:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off -3430:Src/main.c **** break; -3431:Src/main.c **** case 3: -3432:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on -3433:Src/main.c **** break; -3434:Src/main.c **** case 4: -3435:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion -3436:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc -3437:Src/main.c **** break; -3438:Src/main.c **** case 5: -3439:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off -3440:Src/main.c **** break; -3441:Src/main.c **** } -3442:Src/main.c **** return OUT; -3443:Src/main.c **** } -3444:Src/main.c **** -3445:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results -3446:Src/main.c **** { -3447:Src/main.c **** // Main idea: -3448:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat -3449:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept - ARM GAS /tmp/ccuHnxNu.s page 125 - - -3450:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t -3451:Src/main.c **** // So, equation should be look like this: -3452:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) -3453:Src/main.c **** // t -- cycle phase -3454:Src/main.c **** // a,b,c -- constants -3455:Src/main.c **** // -3456:Src/main.c **** // How can we control laser diode temperature? -3457:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. -3458:Src/main.c **** // Then we should measure wavelength. -3459:Src/main.c **** // Calibration sequence: -3460:Src/main.c **** // 1) n +3415:Src/main.c **** } +3416:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3))) +3417:Src/main.c **** { +3418:Src/main.c **** ok = 0u; +3419:Src/main.c **** } +3420:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5))) +3421:Src/main.c **** { +3422:Src/main.c **** ok = 0u; +3423:Src/main.c **** } +3424:Src/main.c **** if (cfg_err & 0x003Fu) +3425:Src/main.c **** { +3426:Src/main.c **** ok = 0u; +3427:Src/main.c **** } +3428:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u)) +3429:Src/main.c **** { +3430:Src/main.c **** ok = 0u; +3431:Src/main.c **** } +3432:Src/main.c **** +3433:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG) +3434:Src/main.c **** { +3435:Src/main.c **** ok = 0u; +3436:Src/main.c **** } +3437:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase) +3438:Src/main.c **** { +3439:Src/main.c **** ok = 0u; +3440:Src/main.c **** } +3441:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period) +3442:Src/main.c **** { +3443:Src/main.c **** ok = 0u; +3444:Src/main.c **** } +3445:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u) +3446:Src/main.c **** { +3447:Src/main.c **** ok = 0u; +3448:Src/main.c **** } +3449:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_START_ADDR) != 0x0000u) +3450:Src/main.c **** { +3451:Src/main.c **** ok = 0u; +3452:Src/main.c **** } +3453:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_STOP_ADDR) != stop_addr) +3454:Src/main.c **** { +3455:Src/main.c **** ok = 0u; +3456:Src/main.c **** } +3457:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT) +3458:Src/main.c **** { +3459:Src/main.c **** ok = 0u; +3460:Src/main.c **** } 3461:Src/main.c **** -3462:Src/main.c **** -3463:Src/main.c **** -3464:Src/main.c **** int e_pid; -3465:Src/main.c **** float P_coef_current;//, I_coef_current; -3466:Src/main.c **** float e_integral; -3467:Src/main.c **** int x_output; +3462:Src/main.c **** return (ok ? 0u : 1u); +3463:Src/main.c **** } +3464:Src/main.c **** +3465:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) +3466:Src/main.c **** { +3467:Src/main.c **** uint32_t tmp32; 3468:Src/main.c **** -3469:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; -3470:Src/main.c **** -3471:Src/main.c **** e_integral = LDx_results->e_integral; -3472:Src/main.c **** -3473:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ -3474:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 -3475:Src/main.c **** } -3476:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; -3477:Src/main.c **** -3478:Src/main.c **** if (e_integral > 32000){ -3479:Src/main.c **** e_integral = 32000; -3480:Src/main.c **** } -3481:Src/main.c **** else if (e_integral < - 32000){ -3482:Src/main.c **** e_integral = -32000; -3483:Src/main.c **** } -3484:Src/main.c **** LDx_results->e_integral = e_integral; -3485:Src/main.c **** -3486:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in -3487:Src/main.c **** -3488:Src/main.c **** if(x_output < 1000){ -3489:Src/main.c **** x_output = 8800; -3490:Src/main.c **** } -3491:Src/main.c **** else if(x_output > 56800){ -3492:Src/main.c **** x_output = 56800; -3493:Src/main.c **** } -3494:Src/main.c **** -3495:Src/main.c **** if (num==2) -3496:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -3497:Src/main.c **** -3498:Src/main.c **** return (uint16_t)x_output; -3499:Src/main.c **** } -3500:Src/main.c **** -3501:Src/main.c **** -3502:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin -3503:Src/main.c **** { - 717 .loc 1 3503 1 is_stmt 1 view -0 - 718 .cfi_startproc - 719 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccuHnxNu.s page 126 +3469:Src/main.c **** if (num == 1 || num == 3) +3470:Src/main.c **** { +3471:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_2EDGE); + ARM GAS /tmp/ccLSPxIe.s page 126 - 720 @ frame_needed = 0, uses_anonymous_args = 0 - 721 @ link register save eliminated. - 722 .loc 1 3503 1 is_stmt 0 view .LVU248 - 723 0000 30B4 push {r4, r5} - 724 .LCFI6: - 725 .cfi_def_cfa_offset 8 - 726 .cfi_offset 4, -8 - 727 .cfi_offset 5, -4 -3504:Src/main.c **** int e_pid; - 728 .loc 1 3504 2 is_stmt 1 view .LVU249 -3505:Src/main.c **** float P_coef_current;//, I_coef_current; - 729 .loc 1 3505 2 view .LVU250 -3506:Src/main.c **** float e_integral; - 730 .loc 1 3506 2 view .LVU251 -3507:Src/main.c **** int x_output; - 731 .loc 1 3507 2 view .LVU252 -3508:Src/main.c **** -3509:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; - 732 .loc 1 3509 2 view .LVU253 - 733 .loc 1 3509 28 is_stmt 0 view .LVU254 - 734 0002 0B88 ldrh r3, [r1] - 735 .loc 1 3509 65 view .LVU255 - 736 0004 0488 ldrh r4, [r0] - 737 .loc 1 3509 8 view .LVU256 - 738 0006 1B1B subs r3, r3, r4 - 739 .LVL45: -3510:Src/main.c **** -3511:Src/main.c **** e_integral = LDx_results->e_integral; - 740 .loc 1 3511 2 is_stmt 1 view .LVU257 - 741 .loc 1 3511 13 is_stmt 0 view .LVU258 - 742 0008 D1ED017A vldr.32 s15, [r1, #4] - 743 .LVL46: -3512:Src/main.c **** -3513:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ - 744 .loc 1 3513 2 is_stmt 1 view .LVU259 - 745 .loc 1 3513 20 is_stmt 0 view .LVU260 - 746 000c 03F6B73C addw ip, r3, #2999 - 747 .loc 1 3513 4 view .LVU261 - 748 0010 41F26E74 movw r4, #5998 - 749 0014 A445 cmp ip, r4 - 750 0016 18D8 bhi .L29 -3514:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 751 .loc 1 3514 3 is_stmt 1 view .LVU262 - 752 .loc 1 3514 31 is_stmt 0 view .LVU263 - 753 0018 90ED027A vldr.32 s14, [r0, #8] - 754 .loc 1 3514 47 view .LVU264 - 755 001c 06EE903A vmov s13, r3 @ int - 756 0020 F8EEE66A vcvt.f32.s32 s13, s13 - 757 .loc 1 3514 45 view .LVU265 - 758 0024 27EE267A vmul.f32 s14, s14, s13 - 759 .loc 1 3514 76 view .LVU266 - 760 0028 284C ldr r4, .L39 - 761 002a 2468 ldr r4, [r4] - 762 002c 284D ldr r5, .L39+4 - 763 002e 2D68 ldr r5, [r5] - 764 0030 641B subs r4, r4, r5 - 765 .loc 1 3514 64 view .LVU267 - ARM GAS /tmp/ccuHnxNu.s page 127 +3472:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); +3473:Src/main.c **** } +3474:Src/main.c **** +3475:Src/main.c **** switch (num) +3476:Src/main.c **** { +3477:Src/main.c **** case 1: +3478:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L +3479:Src/main.c **** //tmp32=0; +3480:Src/main.c **** //while(tmp32<500){tmp32++;} +3481:Src/main.c **** tmp32 = 0; +3482:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +3483:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +3484:Src/main.c **** tmp32 = 0; +3485:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +3486:Src/main.c **** (void) SPI2->DR; +3487:Src/main.c **** break; +3488:Src/main.c **** case 2: +3489:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes +3490:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L +3491:Src/main.c **** //tmp32=0; +3492:Src/main.c **** //while(tmp32<500){tmp32++;} +3493:Src/main.c **** tmp32 = 0; +3494:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +3495:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +3496:Src/main.c **** tmp32 = 0; +3497:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +3498:Src/main.c **** (void) SPI6->DR; +3499:Src/main.c **** break; +3500:Src/main.c **** case 3: +3501:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with +3502:Src/main.c **** //tmp32=0; +3503:Src/main.c **** //while(tmp32<500){tmp32++;} +3504:Src/main.c **** tmp32 = 0; +3505:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +3506:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +3507:Src/main.c **** tmp32 = 0; +3508:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +3509:Src/main.c **** (void) SPI2->DR; +3510:Src/main.c **** break; +3511:Src/main.c **** case 4: +3512:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with +3513:Src/main.c **** //tmp32=0; +3514:Src/main.c **** //while(tmp32<500){tmp32++;} +3515:Src/main.c **** tmp32 = 0; +3516:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +3517:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +3518:Src/main.c **** tmp32 = 0; +3519:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +3520:Src/main.c **** (void) SPI6->DR; +3521:Src/main.c **** break; +3522:Src/main.c **** } +3523:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 +3524:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 +3525:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 +3526:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 +3527:Src/main.c **** } +3528:Src/main.c **** static uint16_t MPhD_T(uint8_t num) + ARM GAS /tmp/ccLSPxIe.s page 127 - 766 0032 06EE904A vmov s13, r4 @ int - 767 0036 F8EE666A vcvt.f32.u32 s13, s13 - 768 .loc 1 3514 62 view .LVU268 - 769 003a 27EE267A vmul.f32 s14, s14, s13 - 770 .loc 1 3514 87 view .LVU269 - 771 003e 9FED256A vldr.32 s12, .L39+8 - 772 0042 C7EE066A vdiv.f32 s13, s14, s12 - 773 .loc 1 3514 14 view .LVU270 - 774 0046 77EEA67A vadd.f32 s15, s15, s13 - 775 .LVL47: - 776 .L29: -3515:Src/main.c **** } -3516:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; - 777 .loc 1 3516 2 is_stmt 1 view .LVU271 - 778 .loc 1 3516 17 is_stmt 0 view .LVU272 - 779 004a D0ED016A vldr.32 s13, [r0, #4] - 780 .LVL48: -3517:Src/main.c **** -3518:Src/main.c **** if (e_integral > 32000){ - 781 .loc 1 3518 2 is_stmt 1 view .LVU273 - 782 .loc 1 3518 5 is_stmt 0 view .LVU274 - 783 004e 9FED227A vldr.32 s14, .L39+12 - 784 0052 F4EEC77A vcmpe.f32 s15, s14 - 785 0056 F1EE10FA vmrs APSR_nzcv, FPSCR - 786 005a 09DC bgt .L33 -3519:Src/main.c **** e_integral = 32000; -3520:Src/main.c **** } -3521:Src/main.c **** else if (e_integral < - 32000){ - 787 .loc 1 3521 7 is_stmt 1 view .LVU275 - 788 .loc 1 3521 10 is_stmt 0 view .LVU276 - 789 005c 9FED1F7A vldr.32 s14, .L39+16 - 790 0060 F4EEC77A vcmpe.f32 s15, s14 - 791 0064 F1EE10FA vmrs APSR_nzcv, FPSCR - 792 0068 04D5 bpl .L30 -3522:Src/main.c **** e_integral = -32000; - 793 .loc 1 3522 15 view .LVU277 - 794 006a DFED1C7A vldr.32 s15, .L39+16 - 795 .LVL49: - 796 .loc 1 3522 15 view .LVU278 - 797 006e 01E0 b .L30 - 798 .LVL50: - 799 .L33: -3519:Src/main.c **** e_integral = 32000; - 800 .loc 1 3519 15 view .LVU279 - 801 0070 DFED197A vldr.32 s15, .L39+12 - 802 .LVL51: - 803 .L30: -3523:Src/main.c **** } -3524:Src/main.c **** LDx_results->e_integral = e_integral; - 804 .loc 1 3524 2 is_stmt 1 view .LVU280 - 805 .loc 1 3524 26 is_stmt 0 view .LVU281 - 806 0074 C1ED017A vstr.32 s15, [r1, #4] -3525:Src/main.c **** -3526:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in - 807 .loc 1 3526 2 is_stmt 1 view .LVU282 - 808 .loc 1 3526 36 is_stmt 0 view .LVU283 - 809 0078 07EE103A vmov s14, r3 @ int - ARM GAS /tmp/ccuHnxNu.s page 128 +3529:Src/main.c **** { +3530:Src/main.c **** uint16_t P; +3531:Src/main.c **** uint32_t tmp32; +3532:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +3533:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +3534:Src/main.c **** tmp32=0; +3535:Src/main.c **** while(tmp32<500){tmp32++;} +3536:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +3537:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +3538:Src/main.c **** tmp32=0; +3539:Src/main.c **** while(tmp32<500){tmp32++;} +3540:Src/main.c **** if (num==1)//MPD1 +3541:Src/main.c **** { +3542:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +3543:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); +3544:Src/main.c **** tmp32=0; +3545:Src/main.c **** while(tmp32<500){tmp32++;} +3546:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +3547:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC +3548:Src/main.c **** tmp32 = 0; +3549:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +3550:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC +3551:Src/main.c **** while(tmp32<500){tmp32++;} +3552:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +3553:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +3554:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +3555:Src/main.c **** } +3556:Src/main.c **** else if (num==2)//MPD2 +3557:Src/main.c **** { +3558:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +3559:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); +3560:Src/main.c **** tmp32=0; +3561:Src/main.c **** while(tmp32<500){tmp32++;} +3562:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +3563:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC +3564:Src/main.c **** tmp32 = 0; +3565:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +3566:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC +3567:Src/main.c **** while(tmp32<500){tmp32++;} +3568:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +3569:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +3570:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +3571:Src/main.c **** } +3572:Src/main.c **** else if (num==3)//ThrLD1 +3573:Src/main.c **** { +3574:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +3575:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +3576:Src/main.c **** tmp32=0; +3577:Src/main.c **** while(tmp32<500){tmp32++;} +3578:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +3579:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC +3580:Src/main.c **** tmp32 = 0; +3581:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +3582:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC +3583:Src/main.c **** while(tmp32<500){tmp32++;} +3584:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +3585:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); + ARM GAS /tmp/ccLSPxIe.s page 128 - 810 007c B8EEC77A vcvt.f32.s32 s14, s14 - 811 0080 27EE267A vmul.f32 s14, s14, s13 - 812 .loc 1 3526 19 view .LVU284 - 813 0084 DFED166A vldr.32 s13, .L39+20 - 814 .LVL52: - 815 .loc 1 3526 19 view .LVU285 - 816 0088 37EE267A vadd.f32 s14, s14, s13 - 817 .loc 1 3526 46 view .LVU286 - 818 008c FDEEE77A vcvt.s32.f32 s15, s15 - 819 .LVL53: - 820 .loc 1 3526 44 view .LVU287 - 821 0090 F8EEE77A vcvt.f32.s32 s15, s15 - 822 0094 77EE877A vadd.f32 s15, s15, s14 - 823 .loc 1 3526 11 view .LVU288 - 824 0098 FDEEE77A vcvt.s32.f32 s15, s15 - 825 009c 17EE900A vmov r0, s15 @ int - 826 .LVL54: -3527:Src/main.c **** -3528:Src/main.c **** if(x_output < 1000){ - 827 .loc 1 3528 2 is_stmt 1 view .LVU289 - 828 .loc 1 3528 4 is_stmt 0 view .LVU290 - 829 00a0 B0F57A7F cmp r0, #1000 - 830 00a4 06DB blt .L35 -3529:Src/main.c **** x_output = 8800; -3530:Src/main.c **** } -3531:Src/main.c **** else if(x_output > 56800){ - 831 .loc 1 3531 7 is_stmt 1 view .LVU291 - 832 .loc 1 3531 9 is_stmt 0 view .LVU292 - 833 00a6 4DF6E053 movw r3, #56800 - 834 .LVL55: - 835 .loc 1 3531 9 view .LVU293 - 836 00aa 9842 cmp r0, r3 - 837 00ac 04DD ble .L31 -3532:Src/main.c **** x_output = 56800; - 838 .loc 1 3532 12 view .LVU294 - 839 00ae 4DF6E050 movw r0, #56800 - 840 .LVL56: - 841 .loc 1 3532 12 view .LVU295 - 842 00b2 01E0 b .L31 - 843 .LVL57: - 844 .L35: -3529:Src/main.c **** x_output = 8800; - 845 .loc 1 3529 12 view .LVU296 - 846 00b4 42F26020 movw r0, #8800 - 847 .LVL58: - 848 .L31: -3533:Src/main.c **** } -3534:Src/main.c **** -3535:Src/main.c **** if (num==2) - 849 .loc 1 3535 2 is_stmt 1 view .LVU297 - 850 .loc 1 3535 5 is_stmt 0 view .LVU298 - 851 00b8 022A cmp r2, #2 - 852 00ba 02D0 beq .L38 - 853 .LVL59: - 854 .L32: -3536:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -3537:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 129 +3586:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +3587:Src/main.c **** } +3588:Src/main.c **** else if (num==4)//ThrLD2 +3589:Src/main.c **** { +3590:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +3591:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +3592:Src/main.c **** tmp32=0; +3593:Src/main.c **** while(tmp32<500){tmp32++;} +3594:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +3595:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC +3596:Src/main.c **** tmp32 = 0; +3597:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +3598:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC +3599:Src/main.c **** while(tmp32<500){tmp32++;} +3600:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +3601:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +3602:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +3603:Src/main.c **** } +3604:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; +3605:Src/main.c **** +3606:Src/main.c **** Inorm = (float) (65535) / (float) (100); +3607:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); +3608:Src/main.c **** Tnorm2 = 4; +3609:Src/main.c **** Pnorm = (float)(65535) / (float)(20); +3610:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system +3611:Src/main.c **** T0m = 48.6282; +3612:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; +3613:Src/main.c **** +3614:Src/main.c **** Ith = I0m * expf(T_C/T0m); +3615:Src/main.c **** I_LD = (float) (C_LD) / Inorm; +3616:Src/main.c **** +3617:Src/main.c **** if (I_LD > Ith) +3618:Src/main.c **** { +3619:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ +3620:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; +3621:Src/main.c **** } +3622:Src/main.c **** else +3623:Src/main.c **** { +3624:Src/main.c **** P = 0; +3625:Src/main.c **** } */ +3626:Src/main.c **** return P; +3627:Src/main.c **** } +3628:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time +3629:Src/main.c **** { +3630:Src/main.c **** uint16_t Result; +3631:Src/main.c **** // uint8_t randf; +3632:Src/main.c **** +3633:Src/main.c **** randf = 0; +3634:Src/main.c **** for (uint8_t i = 0; i < 32; i++) +3635:Src/main.c **** { +3636:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; +3637:Src/main.c **** } +3638:Src/main.c **** +3639:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl +3640:Src/main.c **** +3641:Src/main.c **** return (uint16_t)(Result); +3642:Src/main.c **** }*/ + ARM GAS /tmp/ccLSPxIe.s page 129 -3538:Src/main.c **** return (uint16_t)x_output; - 855 .loc 1 3538 2 is_stmt 1 view .LVU299 -3539:Src/main.c **** } - 856 .loc 1 3539 1 is_stmt 0 view .LVU300 - 857 00bc 80B2 uxth r0, r0 - 858 .LVL60: - 859 .loc 1 3539 1 view .LVU301 - 860 00be 30BC pop {r4, r5} - 861 .LCFI7: - 862 .cfi_remember_state - 863 .cfi_restore 5 - 864 .cfi_restore 4 - 865 .cfi_def_cfa_offset 0 - 866 00c0 7047 bx lr - 867 .LVL61: - 868 .L38: - 869 .LCFI8: - 870 .cfi_restore_state -3536:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 871 .loc 1 3536 3 is_stmt 1 view .LVU302 -3536:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 872 .loc 1 3536 11 is_stmt 0 view .LVU303 - 873 00c2 024B ldr r3, .L39 - 874 00c4 1A68 ldr r2, [r3] - 875 .LVL62: -3536:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 876 .loc 1 3536 11 view .LVU304 - 877 00c6 024B ldr r3, .L39+4 - 878 00c8 1A60 str r2, [r3] - 879 00ca F7E7 b .L32 - 880 .L40: - 881 .align 2 - 882 .L39: - 883 00cc 00000000 .word TO7 - 884 00d0 00000000 .word TO7_PID - 885 00d4 0000C842 .word 1120403456 - 886 00d8 0000FA46 .word 1190789120 - 887 00dc 0000FAC6 .word -956694528 - 888 00e0 00000047 .word 1191182336 - 889 .cfi_endproc - 890 .LFE1231: - 892 .section .text.AD9102_WriteReg,"ax",%progbits - 893 .align 1 - 894 .syntax unified - 895 .thumb - 896 .thumb_func - 898 AD9102_WriteReg: - 899 .LVL63: - 900 .LFB1219: -2780:Src/main.c **** uint32_t tmp32 = 0; - 901 .loc 1 2780 1 is_stmt 1 view -0 - 902 .cfi_startproc - 903 @ args = 0, pretend = 0, frame = 0 - 904 @ frame_needed = 0, uses_anonymous_args = 0 -2780:Src/main.c **** uint32_t tmp32 = 0; - 905 .loc 1 2780 1 is_stmt 0 view .LVU306 - 906 0000 38B5 push {r3, r4, r5, lr} - ARM GAS /tmp/ccuHnxNu.s page 130 +3643:Src/main.c **** static uint16_t Get_ADC(uint8_t num) +3644:Src/main.c **** { +3645:Src/main.c **** uint16_t OUT; +3646:Src/main.c **** switch (num) +3647:Src/main.c **** { +3648:Src/main.c **** case 0: +3649:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on +3650:Src/main.c **** break; +3651:Src/main.c **** case 1: +3652:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion +3653:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc +3654:Src/main.c **** break; +3655:Src/main.c **** case 2: +3656:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off +3657:Src/main.c **** break; +3658:Src/main.c **** case 3: +3659:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on +3660:Src/main.c **** break; +3661:Src/main.c **** case 4: +3662:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion +3663:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc +3664:Src/main.c **** break; +3665:Src/main.c **** case 5: +3666:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off +3667:Src/main.c **** break; +3668:Src/main.c **** } +3669:Src/main.c **** return OUT; +3670:Src/main.c **** } +3671:Src/main.c **** +3672:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results +3673:Src/main.c **** { +3674:Src/main.c **** // Main idea: +3675:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat +3676:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept +3677:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t +3678:Src/main.c **** // So, equation should be look like this: +3679:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) +3680:Src/main.c **** // t -- cycle phase +3681:Src/main.c **** // a,b,c -- constants +3682:Src/main.c **** // +3683:Src/main.c **** // How can we control laser diode temperature? +3684:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. +3685:Src/main.c **** // Then we should measure wavelength. +3686:Src/main.c **** // Calibration sequence: +3687:Src/main.c **** // 1) n +3688:Src/main.c **** +3689:Src/main.c **** +3690:Src/main.c **** +3691:Src/main.c **** int e_pid; +3692:Src/main.c **** float P_coef_current;//, I_coef_current; +3693:Src/main.c **** float e_integral; +3694:Src/main.c **** int x_output; +3695:Src/main.c **** +3696:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; +3697:Src/main.c **** +3698:Src/main.c **** e_integral = LDx_results->e_integral; +3699:Src/main.c **** + ARM GAS /tmp/ccLSPxIe.s page 130 - 907 .LCFI9: - 908 .cfi_def_cfa_offset 16 - 909 .cfi_offset 3, -16 - 910 .cfi_offset 4, -12 - 911 .cfi_offset 5, -8 - 912 .cfi_offset 14, -4 - 913 0002 0C46 mov r4, r1 -2781:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address - 914 .loc 1 2781 2 is_stmt 1 view .LVU307 - 915 .LVL64: -2782:Src/main.c **** - 916 .loc 1 2782 2 view .LVU308 -2782:Src/main.c **** - 917 .loc 1 2782 11 is_stmt 0 view .LVU309 - 918 0004 C0F30E05 ubfx r5, r0, #0, #15 - 919 .LVL65: -2784:Src/main.c **** - 920 .loc 1 2784 2 is_stmt 1 view .LVU310 - 921 0008 0021 movs r1, #0 - 922 .LVL66: -2784:Src/main.c **** - 923 .loc 1 2784 2 is_stmt 0 view .LVU311 - 924 000a 0846 mov r0, r1 - 925 .LVL67: -2784:Src/main.c **** - 926 .loc 1 2784 2 view .LVU312 - 927 000c FFF7FEFF bl SPI2_SetMode - 928 .LVL68: -2786:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); - 929 .loc 1 2786 2 is_stmt 1 view .LVU313 - 930 0010 0122 movs r2, #1 - 931 0012 4FF48041 mov r1, #16384 - 932 0016 2C48 ldr r0, .L56 - 933 0018 FFF7FEFF bl HAL_GPIO_WritePin - 934 .LVL69: -2787:Src/main.c **** - 935 .loc 1 2787 2 view .LVU314 - 936 001c 0122 movs r2, #1 - 937 001e 4FF48051 mov r1, #4096 - 938 0022 2A48 ldr r0, .L56+4 - 939 0024 FFF7FEFF bl HAL_GPIO_WritePin - 940 .LVL70: -2789:Src/main.c **** { - 941 .loc 1 2789 2 view .LVU315 - 942 .LBB372: - 943 .LBI372: +3700:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ +3701:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 +3702:Src/main.c **** } +3703:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; +3704:Src/main.c **** +3705:Src/main.c **** if (e_integral > 32000){ +3706:Src/main.c **** e_integral = 32000; +3707:Src/main.c **** } +3708:Src/main.c **** else if (e_integral < - 32000){ +3709:Src/main.c **** e_integral = -32000; +3710:Src/main.c **** } +3711:Src/main.c **** LDx_results->e_integral = e_integral; +3712:Src/main.c **** +3713:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in +3714:Src/main.c **** +3715:Src/main.c **** if(x_output < 1000){ +3716:Src/main.c **** x_output = 8800; +3717:Src/main.c **** } +3718:Src/main.c **** else if(x_output > 56800){ +3719:Src/main.c **** x_output = 56800; +3720:Src/main.c **** } +3721:Src/main.c **** +3722:Src/main.c **** if (num==2) +3723:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +3724:Src/main.c **** +3725:Src/main.c **** return (uint16_t)x_output; +3726:Src/main.c **** } +3727:Src/main.c **** +3728:Src/main.c **** +3729:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin +3730:Src/main.c **** { + 754 .loc 1 3730 1 is_stmt 1 view -0 + 755 .cfi_startproc + 756 @ args = 0, pretend = 0, frame = 0 + 757 @ frame_needed = 0, uses_anonymous_args = 0 + 758 @ link register save eliminated. + 759 .loc 1 3730 1 is_stmt 0 view .LVU256 + 760 0000 30B4 push {r4, r5} + 761 .LCFI6: + 762 .cfi_def_cfa_offset 8 + 763 .cfi_offset 4, -8 + 764 .cfi_offset 5, -4 +3731:Src/main.c **** int e_pid; + 765 .loc 1 3731 2 is_stmt 1 view .LVU257 +3732:Src/main.c **** float P_coef_current;//, I_coef_current; + 766 .loc 1 3732 2 view .LVU258 +3733:Src/main.c **** float e_integral; + 767 .loc 1 3733 2 view .LVU259 +3734:Src/main.c **** int x_output; + 768 .loc 1 3734 2 view .LVU260 +3735:Src/main.c **** +3736:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; + 769 .loc 1 3736 2 view .LVU261 + 770 .loc 1 3736 28 is_stmt 0 view .LVU262 + 771 0002 0B88 ldrh r3, [r1] + 772 .loc 1 3736 65 view .LVU263 + 773 0004 0488 ldrh r4, [r0] + ARM GAS /tmp/ccLSPxIe.s page 131 + + + 774 .loc 1 3736 8 view .LVU264 + 775 0006 1B1B subs r3, r3, r4 + 776 .LVL45: +3737:Src/main.c **** +3738:Src/main.c **** e_integral = LDx_results->e_integral; + 777 .loc 1 3738 2 is_stmt 1 view .LVU265 + 778 .loc 1 3738 13 is_stmt 0 view .LVU266 + 779 0008 D1ED017A vldr.32 s15, [r1, #4] + 780 .LVL46: +3739:Src/main.c **** +3740:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ + 781 .loc 1 3740 2 is_stmt 1 view .LVU267 + 782 .loc 1 3740 20 is_stmt 0 view .LVU268 + 783 000c 03F6B73C addw ip, r3, #2999 + 784 .loc 1 3740 4 view .LVU269 + 785 0010 41F26E74 movw r4, #5998 + 786 0014 A445 cmp ip, r4 + 787 0016 18D8 bhi .L32 +3741:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 788 .loc 1 3741 3 is_stmt 1 view .LVU270 + 789 .loc 1 3741 31 is_stmt 0 view .LVU271 + 790 0018 90ED027A vldr.32 s14, [r0, #8] + 791 .loc 1 3741 47 view .LVU272 + 792 001c 06EE903A vmov s13, r3 @ int + 793 0020 F8EEE66A vcvt.f32.s32 s13, s13 + 794 .loc 1 3741 45 view .LVU273 + 795 0024 27EE267A vmul.f32 s14, s14, s13 + 796 .loc 1 3741 76 view .LVU274 + 797 0028 284C ldr r4, .L42 + 798 002a 2468 ldr r4, [r4] + 799 002c 284D ldr r5, .L42+4 + 800 002e 2D68 ldr r5, [r5] + 801 0030 641B subs r4, r4, r5 + 802 .loc 1 3741 64 view .LVU275 + 803 0032 06EE904A vmov s13, r4 @ int + 804 0036 F8EE666A vcvt.f32.u32 s13, s13 + 805 .loc 1 3741 62 view .LVU276 + 806 003a 27EE267A vmul.f32 s14, s14, s13 + 807 .loc 1 3741 87 view .LVU277 + 808 003e 9FED256A vldr.32 s12, .L42+8 + 809 0042 C7EE066A vdiv.f32 s13, s14, s12 + 810 .loc 1 3741 14 view .LVU278 + 811 0046 77EEA67A vadd.f32 s15, s15, s13 + 812 .LVL47: + 813 .L32: +3742:Src/main.c **** } +3743:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; + 814 .loc 1 3743 2 is_stmt 1 view .LVU279 + 815 .loc 1 3743 17 is_stmt 0 view .LVU280 + 816 004a D0ED016A vldr.32 s13, [r0, #4] + 817 .LVL48: +3744:Src/main.c **** +3745:Src/main.c **** if (e_integral > 32000){ + 818 .loc 1 3745 2 is_stmt 1 view .LVU281 + 819 .loc 1 3745 5 is_stmt 0 view .LVU282 + 820 004e 9FED227A vldr.32 s14, .L42+12 + 821 0052 F4EEC77A vcmpe.f32 s15, s14 + ARM GAS /tmp/ccLSPxIe.s page 132 + + + 822 0056 F1EE10FA vmrs APSR_nzcv, FPSCR + 823 005a 09DC bgt .L36 +3746:Src/main.c **** e_integral = 32000; +3747:Src/main.c **** } +3748:Src/main.c **** else if (e_integral < - 32000){ + 824 .loc 1 3748 7 is_stmt 1 view .LVU283 + 825 .loc 1 3748 10 is_stmt 0 view .LVU284 + 826 005c 9FED1F7A vldr.32 s14, .L42+16 + 827 0060 F4EEC77A vcmpe.f32 s15, s14 + 828 0064 F1EE10FA vmrs APSR_nzcv, FPSCR + 829 0068 04D5 bpl .L33 +3749:Src/main.c **** e_integral = -32000; + 830 .loc 1 3749 15 view .LVU285 + 831 006a DFED1C7A vldr.32 s15, .L42+16 + 832 .LVL49: + 833 .loc 1 3749 15 view .LVU286 + 834 006e 01E0 b .L33 + 835 .LVL50: + 836 .L36: +3746:Src/main.c **** e_integral = 32000; + 837 .loc 1 3746 15 view .LVU287 + 838 0070 DFED197A vldr.32 s15, .L42+12 + 839 .LVL51: + 840 .L33: +3750:Src/main.c **** } +3751:Src/main.c **** LDx_results->e_integral = e_integral; + 841 .loc 1 3751 2 is_stmt 1 view .LVU288 + 842 .loc 1 3751 26 is_stmt 0 view .LVU289 + 843 0074 C1ED017A vstr.32 s15, [r1, #4] +3752:Src/main.c **** +3753:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in + 844 .loc 1 3753 2 is_stmt 1 view .LVU290 + 845 .loc 1 3753 36 is_stmt 0 view .LVU291 + 846 0078 07EE103A vmov s14, r3 @ int + 847 007c B8EEC77A vcvt.f32.s32 s14, s14 + 848 0080 27EE267A vmul.f32 s14, s14, s13 + 849 .loc 1 3753 19 view .LVU292 + 850 0084 DFED166A vldr.32 s13, .L42+20 + 851 .LVL52: + 852 .loc 1 3753 19 view .LVU293 + 853 0088 37EE267A vadd.f32 s14, s14, s13 + 854 .loc 1 3753 46 view .LVU294 + 855 008c FDEEE77A vcvt.s32.f32 s15, s15 + 856 .LVL53: + 857 .loc 1 3753 44 view .LVU295 + 858 0090 F8EEE77A vcvt.f32.s32 s15, s15 + 859 0094 77EE877A vadd.f32 s15, s15, s14 + 860 .loc 1 3753 11 view .LVU296 + 861 0098 FDEEE77A vcvt.s32.f32 s15, s15 + 862 009c 17EE900A vmov r0, s15 @ int + 863 .LVL54: +3754:Src/main.c **** +3755:Src/main.c **** if(x_output < 1000){ + 864 .loc 1 3755 2 is_stmt 1 view .LVU297 + 865 .loc 1 3755 4 is_stmt 0 view .LVU298 + 866 00a0 B0F57A7F cmp r0, #1000 + 867 00a4 06DB blt .L38 + ARM GAS /tmp/ccLSPxIe.s page 133 + + +3756:Src/main.c **** x_output = 8800; +3757:Src/main.c **** } +3758:Src/main.c **** else if(x_output > 56800){ + 868 .loc 1 3758 7 is_stmt 1 view .LVU299 + 869 .loc 1 3758 9 is_stmt 0 view .LVU300 + 870 00a6 4DF6E053 movw r3, #56800 + 871 .LVL55: + 872 .loc 1 3758 9 view .LVU301 + 873 00aa 9842 cmp r0, r3 + 874 00ac 04DD ble .L34 +3759:Src/main.c **** x_output = 56800; + 875 .loc 1 3759 12 view .LVU302 + 876 00ae 4DF6E050 movw r0, #56800 + 877 .LVL56: + 878 .loc 1 3759 12 view .LVU303 + 879 00b2 01E0 b .L34 + 880 .LVL57: + 881 .L38: +3756:Src/main.c **** x_output = 8800; + 882 .loc 1 3756 12 view .LVU304 + 883 00b4 42F26020 movw r0, #8800 + 884 .LVL58: + 885 .L34: +3760:Src/main.c **** } +3761:Src/main.c **** +3762:Src/main.c **** if (num==2) + 886 .loc 1 3762 2 is_stmt 1 view .LVU305 + 887 .loc 1 3762 5 is_stmt 0 view .LVU306 + 888 00b8 022A cmp r2, #2 + 889 00ba 02D0 beq .L41 + 890 .LVL59: + 891 .L35: +3763:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +3764:Src/main.c **** +3765:Src/main.c **** return (uint16_t)x_output; + 892 .loc 1 3765 2 is_stmt 1 view .LVU307 +3766:Src/main.c **** } + 893 .loc 1 3766 1 is_stmt 0 view .LVU308 + 894 00bc 80B2 uxth r0, r0 + 895 .LVL60: + 896 .loc 1 3766 1 view .LVU309 + 897 00be 30BC pop {r4, r5} + 898 .LCFI7: + 899 .cfi_remember_state + 900 .cfi_restore 5 + 901 .cfi_restore 4 + 902 .cfi_def_cfa_offset 0 + 903 00c0 7047 bx lr + 904 .LVL61: + 905 .L41: + 906 .LCFI8: + 907 .cfi_restore_state +3763:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 908 .loc 1 3763 3 is_stmt 1 view .LVU310 +3763:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 909 .loc 1 3763 11 is_stmt 0 view .LVU311 + 910 00c2 024B ldr r3, .L42 + ARM GAS /tmp/ccLSPxIe.s page 134 + + + 911 00c4 1A68 ldr r2, [r3] + 912 .LVL62: +3763:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 913 .loc 1 3763 11 view .LVU312 + 914 00c6 024B ldr r3, .L42+4 + 915 00c8 1A60 str r2, [r3] + 916 00ca F7E7 b .L35 + 917 .L43: + 918 .align 2 + 919 .L42: + 920 00cc 00000000 .word TO7 + 921 00d0 00000000 .word TO7_PID + 922 00d4 0000C842 .word 1120403456 + 923 00d8 0000FA46 .word 1190789120 + 924 00dc 0000FAC6 .word -956694528 + 925 00e0 00000047 .word 1191182336 + 926 .cfi_endproc + 927 .LFE1239: + 929 .section .text.AD9102_WriteReg,"ax",%progbits + 930 .align 1 + 931 .syntax unified + 932 .thumb + 933 .thumb_func + 935 AD9102_WriteReg: + 936 .LVL63: + 937 .LFB1219: +2874:Src/main.c **** uint32_t tmp32 = 0; + 938 .loc 1 2874 1 is_stmt 1 view -0 + 939 .cfi_startproc + 940 @ args = 0, pretend = 0, frame = 0 + 941 @ frame_needed = 0, uses_anonymous_args = 0 +2874:Src/main.c **** uint32_t tmp32 = 0; + 942 .loc 1 2874 1 is_stmt 0 view .LVU314 + 943 0000 38B5 push {r3, r4, r5, lr} + 944 .LCFI9: + 945 .cfi_def_cfa_offset 16 + 946 .cfi_offset 3, -16 + 947 .cfi_offset 4, -12 + 948 .cfi_offset 5, -8 + 949 .cfi_offset 14, -4 + 950 0002 0C46 mov r4, r1 +2875:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address + 951 .loc 1 2875 2 is_stmt 1 view .LVU315 + 952 .LVL64: +2876:Src/main.c **** + 953 .loc 1 2876 2 view .LVU316 +2876:Src/main.c **** + 954 .loc 1 2876 11 is_stmt 0 view .LVU317 + 955 0004 C0F30E05 ubfx r5, r0, #0, #15 + 956 .LVL65: +2878:Src/main.c **** + 957 .loc 1 2878 2 is_stmt 1 view .LVU318 + 958 0008 0021 movs r1, #0 + 959 .LVL66: +2878:Src/main.c **** + 960 .loc 1 2878 2 is_stmt 0 view .LVU319 + 961 000a 0846 mov r0, r1 + ARM GAS /tmp/ccLSPxIe.s page 135 + + + 962 .LVL67: +2878:Src/main.c **** + 963 .loc 1 2878 2 view .LVU320 + 964 000c FFF7FEFF bl SPI2_SetMode + 965 .LVL68: +2880:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); + 966 .loc 1 2880 2 is_stmt 1 view .LVU321 + 967 0010 0122 movs r2, #1 + 968 0012 4FF48041 mov r1, #16384 + 969 0016 2C48 ldr r0, .L59 + 970 0018 FFF7FEFF bl HAL_GPIO_WritePin + 971 .LVL69: +2881:Src/main.c **** + 972 .loc 1 2881 2 view .LVU322 + 973 001c 0122 movs r2, #1 + 974 001e 4FF48051 mov r1, #4096 + 975 0022 2A48 ldr r0, .L59+4 + 976 0024 FFF7FEFF bl HAL_GPIO_WritePin + 977 .LVL70: +2883:Src/main.c **** { + 978 .loc 1 2883 2 view .LVU323 + 979 .LBB375: + 980 .LBI375: 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 944 .loc 4 381 26 view .LVU316 - 945 .LBB373: + 981 .loc 4 381 26 view .LVU324 + 982 .LBB376: 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 946 .loc 4 383 3 view .LVU317 + 983 .loc 4 383 3 view .LVU325 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 947 .loc 4 383 12 is_stmt 0 view .LVU318 - 948 0028 294B ldr r3, .L56+8 - 949 002a 1B68 ldr r3, [r3] + 984 .loc 4 383 12 is_stmt 0 view .LVU326 + 985 0028 294B ldr r3, .L59+8 + 986 002a 1B68 ldr r3, [r3] 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 950 .loc 4 383 69 view .LVU319 - ARM GAS /tmp/ccuHnxNu.s page 131 - - - 951 002c 13F0400F tst r3, #64 - 952 0030 04D1 bne .L42 - 953 .LVL71: + 987 .loc 4 383 69 view .LVU327 + 988 002c 13F0400F tst r3, #64 + 989 0030 04D1 bne .L45 + 990 .LVL71: 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 954 .loc 4 383 69 view .LVU320 - 955 .LBE373: - 956 .LBE372: -2791:Src/main.c **** } - 957 .loc 1 2791 3 is_stmt 1 view .LVU321 - 958 .LBB374: - 959 .LBI374: + 991 .loc 4 383 69 view .LVU328 + 992 .LBE376: + 993 .LBE375: +2885:Src/main.c **** } + 994 .loc 1 2885 3 is_stmt 1 view .LVU329 + 995 .LBB377: + 996 .LBI377: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 960 .loc 4 358 22 view .LVU322 - 961 .LBB375: + 997 .loc 4 358 22 view .LVU330 + 998 .LBB378: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 962 .loc 4 360 3 view .LVU323 - 963 0032 274A ldr r2, .L56+8 - 964 0034 1368 ldr r3, [r2] - 965 0036 43F04003 orr r3, r3, #64 - 966 003a 1360 str r3, [r2] - 967 .LVL72: - 968 .L42: + 999 .loc 4 360 3 view .LVU331 + 1000 0032 274A ldr r2, .L59+8 + 1001 0034 1368 ldr r3, [r2] + 1002 0036 43F04003 orr r3, r3, #64 + 1003 003a 1360 str r3, [r2] + 1004 .LVL72: + 1005 .L45: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 969 .loc 4 360 3 is_stmt 0 view .LVU324 - 970 .LBE375: - 971 .LBE374: -2794:Src/main.c **** - 972 .loc 1 2794 2 is_stmt 1 view .LVU325 - 973 003c 0022 movs r2, #0 - 974 003e 4FF48051 mov r1, #4096 - 975 0042 2148 ldr r0, .L56 - 976 0044 FFF7FEFF bl HAL_GPIO_WritePin - 977 .LVL73: -2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 978 .loc 1 2796 2 view .LVU326 -2781:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address - 979 .loc 1 2781 11 is_stmt 0 view .LVU327 - 980 0048 0023 movs r3, #0 - 981 .LVL74: - 982 .L44: -2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 983 .loc 1 2796 63 is_stmt 1 discriminator 2 view .LVU328 -2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 984 .loc 1 2796 41 discriminator 2 view .LVU329 - 985 .LBB376: - 986 .LBI376: + ARM GAS /tmp/ccLSPxIe.s page 136 + + + 1006 .loc 4 360 3 is_stmt 0 view .LVU332 + 1007 .LBE378: + 1008 .LBE377: +2888:Src/main.c **** + 1009 .loc 1 2888 2 is_stmt 1 view .LVU333 + 1010 003c 0022 movs r2, #0 + 1011 003e 4FF48051 mov r1, #4096 + 1012 0042 2148 ldr r0, .L59 + 1013 0044 FFF7FEFF bl HAL_GPIO_WritePin + 1014 .LVL73: +2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1015 .loc 1 2890 2 view .LVU334 +2875:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address + 1016 .loc 1 2875 11 is_stmt 0 view .LVU335 + 1017 0048 0023 movs r3, #0 + 1018 .LVL74: + 1019 .L47: +2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1020 .loc 1 2890 63 is_stmt 1 discriminator 2 view .LVU336 +2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1021 .loc 1 2890 41 discriminator 2 view .LVU337 + 1022 .LBB379: + 1023 .LBI379: 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7858,9 +8135,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_POLARITY_HIGH 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetClockPolarity(SPI_TypeDef *SPIx) - ARM GAS /tmp/ccuHnxNu.s page 132 - - 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPOL)); 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -7884,6 +8158,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t BaudRate) 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_BR, BaudRate); + ARM GAS /tmp/ccLSPxIe.s page 137 + + 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7918,9 +8195,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetTransferBitOrder(SPI_TypeDef *SPIx, uint32_t BitOrder) 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_LSBFIRST, BitOrder); - ARM GAS /tmp/ccuHnxNu.s page 133 - - 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -7944,6 +8218,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIMODE LL_SPI_SetTransferDirection\n 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIOE LL_SPI_SetTransferDirection 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance + ARM GAS /tmp/ccLSPxIe.s page 138 + + 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param TransferDirection This parameter can be one of the following values: 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_FULL_DUPLEX 580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_SIMPLEX_RX @@ -7978,9 +8255,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 DS LL_SPI_SetDataWidth 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param DataWidth This parameter can be one of the following values: - ARM GAS /tmp/ccuHnxNu.s page 134 - - 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_4BIT 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_5BIT 614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_6BIT @@ -8004,6 +8278,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get frame data width 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 DS LL_SPI_GetDataWidth + ARM GAS /tmp/ccLSPxIe.s page 139 + + 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: 637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_4BIT @@ -8038,9 +8315,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR2, SPI_CR2_FRXTH, Threshold); 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccuHnxNu.s page 135 - - 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get threshold of RXFIFO that triggers an RXNE event @@ -8064,6 +8338,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 140 + + 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable CRC 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. 694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CRCEN LL_SPI_EnableCRC @@ -8098,9 +8375,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR1, SPI_CR1_CRCEN) == (SPI_CR1_CRCEN)) ? 1UL : 0UL); 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccuHnxNu.s page 136 - - 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set CRC Length @@ -8124,6 +8398,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_CRC_8BIT 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_CRC_16BIT + ARM GAS /tmp/ccLSPxIe.s page 141 + + 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetCRCWidth(SPI_TypeDef *SPIx) 751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8158,9 +8435,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get polynomial for CRC calculation 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CRCPR CRCPOLY LL_SPI_GetCRCPolynomial 782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccuHnxNu.s page 137 - - 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetCRCPolynomial(SPI_TypeDef *SPIx) @@ -8184,6 +8458,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll TXCRCR TXCRC LL_SPI_GetTxCRC 804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF + ARM GAS /tmp/ccLSPxIe.s page 142 + + 806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx) 808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8218,9 +8495,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get NSS mode - ARM GAS /tmp/ccuHnxNu.s page 138 - - 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 SSM LL_SPI_GetNSSMode\n 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 SSOE LL_SPI_GetNSSMode 842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance @@ -8244,6 +8518,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableNSSPulseMgt(SPI_TypeDef *SPIx) + ARM GAS /tmp/ccLSPxIe.s page 143 + + 863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_NSSP); 865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -8278,9 +8555,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_FLAG_Management FLAG Management 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ - ARM GAS /tmp/ccuHnxNu.s page 139 - - 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -8301,46 +8575,46 @@ ARM GAS /tmp/ccuHnxNu.s page 1 914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx) - 987 .loc 4 916 26 view .LVU330 - 988 .LBB377: + 1024 .loc 4 916 26 view .LVU338 + 1025 .LBB380: 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + ARM GAS /tmp/ccLSPxIe.s page 144 + + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL); - 989 .loc 4 918 3 view .LVU331 - 990 .loc 4 918 12 is_stmt 0 view .LVU332 - 991 004a 214A ldr r2, .L56+8 - 992 004c 9268 ldr r2, [r2, #8] - 993 .loc 4 918 66 view .LVU333 - 994 004e 12F0020F tst r2, #2 - 995 0052 05D1 bne .L43 - 996 .LVL75: - 997 .loc 4 918 66 view .LVU334 - 998 .LBE377: - 999 .LBE376: -2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1000 .loc 1 2796 50 discriminator 1 view .LVU335 - 1001 0054 5A1C adds r2, r3, #1 - 1002 .LVL76: -2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1003 .loc 1 2796 41 discriminator 1 view .LVU336 - 1004 0056 B3F57A7F cmp r3, #1000 - 1005 005a 01D2 bcs .L43 -2796:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1006 .loc 1 2796 50 discriminator 1 view .LVU337 - 1007 005c 1346 mov r3, r2 - 1008 005e F4E7 b .L44 - 1009 .LVL77: - 1010 .L43: -2797:Src/main.c **** tmp32 = 0; - 1011 .loc 1 2797 2 is_stmt 1 view .LVU338 - 1012 .LBB378: - 1013 .LBI378: + 1026 .loc 4 918 3 view .LVU339 + 1027 .loc 4 918 12 is_stmt 0 view .LVU340 + 1028 004a 214A ldr r2, .L59+8 + 1029 004c 9268 ldr r2, [r2, #8] + 1030 .loc 4 918 66 view .LVU341 + 1031 004e 12F0020F tst r2, #2 + 1032 0052 05D1 bne .L46 + 1033 .LVL75: + 1034 .loc 4 918 66 view .LVU342 + 1035 .LBE380: + 1036 .LBE379: +2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1037 .loc 1 2890 50 discriminator 1 view .LVU343 + 1038 0054 5A1C adds r2, r3, #1 + 1039 .LVL76: +2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1040 .loc 1 2890 41 discriminator 1 view .LVU344 + 1041 0056 B3F57A7F cmp r3, #1000 + 1042 005a 01D2 bcs .L46 +2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 1043 .loc 1 2890 50 discriminator 1 view .LVU345 + 1044 005c 1346 mov r3, r2 + 1045 005e F4E7 b .L47 + 1046 .LVL77: + 1047 .L46: +2891:Src/main.c **** tmp32 = 0; + 1048 .loc 1 2891 2 is_stmt 1 view .LVU346 + 1049 .LBB381: + 1050 .LBI381: 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get CRC error flag - ARM GAS /tmp/ccuHnxNu.s page 140 - - 923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR CRCERR LL_SPI_IsActiveFlag_CRCERR 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). @@ -8364,6 +8638,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get overrun error flag 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR OVR LL_SPI_IsActiveFlag_OVR + ARM GAS /tmp/ccLSPxIe.s page 145 + + 946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -8398,9 +8675,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx) 979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccuHnxNu.s page 141 - - 980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE)) ? 1UL : 0UL); 981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8424,6 +8698,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR FTLVL LL_SPI_GetTxFIFOLevel 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccLSPxIe.s page 146 + + 1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_TX_FIFO_EMPTY 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_TX_FIFO_QUARTER_FULL 1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_TX_FIFO_HALF_FULL @@ -8458,9 +8735,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint32_t tmpreg_sr; 1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** tmpreg_sr = SPIx->SR; 1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** (void) tmpreg_sr; - ARM GAS /tmp/ccuHnxNu.s page 142 - - 1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE); 1038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8484,6 +8758,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear frame format error flag 1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note Clearing this flag is done by reading SPIx_SR register + ARM GAS /tmp/ccLSPxIe.s page 147 + + 1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR FRE LL_SPI_ClearFlag_FRE 1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None @@ -8518,9 +8795,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable Rx buffer not empty interrupt 1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXNEIE LL_SPI_EnableIT_RXNE - ARM GAS /tmp/ccuHnxNu.s page 143 - - 1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -8544,6 +8818,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable error interrupt 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR 1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR + ARM GAS /tmp/ccLSPxIe.s page 148 + + 1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -8578,9 +8855,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if error interrupt is enabled 1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 ERRIE LL_SPI_IsEnabledIT_ERR 1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccuHnxNu.s page 144 - - 1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 1152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx) @@ -8604,6 +8878,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXEIE LL_SPI_IsEnabledIT_TXE 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccLSPxIe.s page 149 + + 1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx) 1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8638,9 +8915,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx) 1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN); - ARM GAS /tmp/ccuHnxNu.s page 145 - - 1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -8664,6 +8938,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN); 1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccLSPxIe.s page 150 + + 1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable DMA Tx @@ -8698,9 +8975,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetDMAParity_RX(SPI_TypeDef *SPIx, uint32_t Parity) 1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccuHnxNu.s page 146 - - 1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR2, SPI_CR2_LDMARX, (Parity << SPI_CR2_LDMARX_Pos)); 1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8724,6 +8998,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Parity This parameter can be one of the following values: 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_ODD 1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_EVEN + ARM GAS /tmp/ccLSPxIe.s page 151 + + 1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetDMAParity_TX(SPI_TypeDef *SPIx, uint32_t Parity) @@ -8758,9 +9035,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 147 - - 1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_DATA_Management DATA Management 1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -8784,6 +9058,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFFFF 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx) + ARM GAS /tmp/ccLSPxIe.s page 152 + + 1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint16_t)(READ_REG(SPIx->DR)); 1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -8813,5207 +9090,5777 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData) - 1014 .loc 4 1373 22 view .LVU339 - 1015 .LBB379: + 1051 .loc 4 1373 22 view .LVU347 + 1052 .LBB382: 1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__) 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint16_t *spidr = ((__IO uint16_t *)&SPIx->DR); - ARM GAS /tmp/ccuHnxNu.s page 148 - - - 1016 .loc 4 1376 3 view .LVU340 + 1053 .loc 4 1376 3 view .LVU348 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 1017 .loc 4 1377 3 view .LVU341 - 1018 .loc 4 1377 10 is_stmt 0 view .LVU342 - 1019 0060 1B4B ldr r3, .L56+8 - 1020 0062 9D81 strh r5, [r3, #12] @ movhi - 1021 .LVL78: - 1022 .loc 4 1377 10 view .LVU343 - 1023 .LBE379: - 1024 .LBE378: -2798:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1025 .loc 1 2798 2 is_stmt 1 view .LVU344 -2799:Src/main.c **** (void) SPI2->DR; - 1026 .loc 1 2799 2 view .LVU345 -2798:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1027 .loc 1 2798 8 is_stmt 0 view .LVU346 - 1028 0064 0023 movs r3, #0 - 1029 .LVL79: - 1030 .L46: -2799:Src/main.c **** (void) SPI2->DR; - 1031 .loc 1 2799 64 is_stmt 1 discriminator 2 view .LVU347 -2799:Src/main.c **** (void) SPI2->DR; - 1032 .loc 1 2799 42 discriminator 2 view .LVU348 - 1033 .LBB380: - 1034 .LBI380: + 1054 .loc 4 1377 3 view .LVU349 + 1055 .loc 4 1377 10 is_stmt 0 view .LVU350 + 1056 0060 1B4B ldr r3, .L59+8 + 1057 0062 9D81 strh r5, [r3, #12] @ movhi + 1058 .LVL78: + 1059 .loc 4 1377 10 view .LVU351 + 1060 .LBE382: + 1061 .LBE381: +2892:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1062 .loc 1 2892 2 is_stmt 1 view .LVU352 +2893:Src/main.c **** (void) SPI2->DR; + 1063 .loc 1 2893 2 view .LVU353 +2892:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1064 .loc 1 2892 8 is_stmt 0 view .LVU354 + 1065 0064 0023 movs r3, #0 + 1066 .LVL79: + 1067 .L49: +2893:Src/main.c **** (void) SPI2->DR; + 1068 .loc 1 2893 64 is_stmt 1 discriminator 2 view .LVU355 +2893:Src/main.c **** (void) SPI2->DR; + 1069 .loc 1 2893 42 discriminator 2 view .LVU356 + ARM GAS /tmp/ccLSPxIe.s page 153 + + + 1070 .LBB383: + 1071 .LBI383: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1035 .loc 4 905 26 view .LVU349 - 1036 .LBB381: + 1072 .loc 4 905 26 view .LVU357 + 1073 .LBB384: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1037 .loc 4 907 3 view .LVU350 + 1074 .loc 4 907 3 view .LVU358 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1038 .loc 4 907 12 is_stmt 0 view .LVU351 - 1039 0066 1A4A ldr r2, .L56+8 - 1040 0068 9268 ldr r2, [r2, #8] + 1075 .loc 4 907 12 is_stmt 0 view .LVU359 + 1076 0066 1A4A ldr r2, .L59+8 + 1077 0068 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1041 .loc 4 907 68 view .LVU352 - 1042 006a 12F0010F tst r2, #1 - 1043 006e 05D1 bne .L45 - 1044 .LVL80: + 1078 .loc 4 907 68 view .LVU360 + 1079 006a 12F0010F tst r2, #1 + 1080 006e 05D1 bne .L48 + 1081 .LVL80: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1045 .loc 4 907 68 view .LVU353 - 1046 .LBE381: - 1047 .LBE380: -2799:Src/main.c **** (void) SPI2->DR; - 1048 .loc 1 2799 51 discriminator 1 view .LVU354 - 1049 0070 5A1C adds r2, r3, #1 - 1050 .LVL81: -2799:Src/main.c **** (void) SPI2->DR; - 1051 .loc 1 2799 42 discriminator 1 view .LVU355 - 1052 0072 B3F57A7F cmp r3, #1000 - 1053 0076 01D2 bcs .L45 -2799:Src/main.c **** (void) SPI2->DR; - 1054 .loc 1 2799 51 discriminator 1 view .LVU356 - 1055 0078 1346 mov r3, r2 - 1056 007a F4E7 b .L46 - 1057 .LVL82: - 1058 .L45: - ARM GAS /tmp/ccuHnxNu.s page 149 - - -2800:Src/main.c **** - 1059 .loc 1 2800 2 is_stmt 1 view .LVU357 - 1060 007c 144B ldr r3, .L56+8 - 1061 007e DB68 ldr r3, [r3, #12] -2802:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 1062 .loc 1 2802 2 view .LVU358 - 1063 .LVL83: -2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1064 .loc 1 2803 2 view .LVU359 -2802:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 1065 .loc 1 2802 8 is_stmt 0 view .LVU360 - 1066 0080 0023 movs r3, #0 - 1067 .LVL84: - 1068 .L48: -2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1069 .loc 1 2803 63 is_stmt 1 discriminator 2 view .LVU361 -2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1070 .loc 1 2803 41 discriminator 2 view .LVU362 - 1071 .LBB382: - 1072 .LBI382: - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1073 .loc 4 916 26 view .LVU363 - 1074 .LBB383: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1075 .loc 4 918 3 view .LVU364 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1076 .loc 4 918 12 is_stmt 0 view .LVU365 - 1077 0082 134A ldr r2, .L56+8 - 1078 0084 9268 ldr r2, [r2, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1079 .loc 4 918 66 view .LVU366 - 1080 0086 12F0020F tst r2, #2 - 1081 008a 05D1 bne .L47 - 1082 .LVL85: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1083 .loc 4 918 66 view .LVU367 + 1082 .loc 4 907 68 view .LVU361 + 1083 .LBE384: 1084 .LBE383: - 1085 .LBE382: -2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1086 .loc 1 2803 50 discriminator 1 view .LVU368 - 1087 008c 5A1C adds r2, r3, #1 - 1088 .LVL86: -2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1089 .loc 1 2803 41 discriminator 1 view .LVU369 - 1090 008e B3F57A7F cmp r3, #1000 - 1091 0092 01D2 bcs .L47 -2803:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); - 1092 .loc 1 2803 50 discriminator 1 view .LVU370 - 1093 0094 1346 mov r3, r2 - 1094 0096 F4E7 b .L48 - 1095 .LVL87: - 1096 .L47: -2804:Src/main.c **** tmp32 = 0; - 1097 .loc 1 2804 2 is_stmt 1 view .LVU371 - 1098 .LBB384: - 1099 .LBI384: -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccuHnxNu.s page 150 - - - 1100 .loc 4 1373 22 view .LVU372 - 1101 .LBB385: -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 1102 .loc 4 1376 3 view .LVU373 - 1103 .loc 4 1377 3 view .LVU374 - 1104 .loc 4 1377 10 is_stmt 0 view .LVU375 - 1105 0098 0D4B ldr r3, .L56+8 - 1106 009a 9C81 strh r4, [r3, #12] @ movhi - 1107 .LVL88: - 1108 .loc 4 1377 10 view .LVU376 - 1109 .LBE385: - 1110 .LBE384: -2805:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1111 .loc 1 2805 2 is_stmt 1 view .LVU377 -2806:Src/main.c **** (void) SPI2->DR; - 1112 .loc 1 2806 2 view .LVU378 -2805:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1113 .loc 1 2805 8 is_stmt 0 view .LVU379 - 1114 009c 0023 movs r3, #0 - 1115 .LVL89: - 1116 .L50: -2806:Src/main.c **** (void) SPI2->DR; - 1117 .loc 1 2806 64 is_stmt 1 discriminator 2 view .LVU380 -2806:Src/main.c **** (void) SPI2->DR; - 1118 .loc 1 2806 42 discriminator 2 view .LVU381 - 1119 .LBB386: - 1120 .LBI386: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1121 .loc 4 905 26 view .LVU382 - 1122 .LBB387: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1123 .loc 4 907 3 view .LVU383 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1124 .loc 4 907 12 is_stmt 0 view .LVU384 - 1125 009e 0C4A ldr r2, .L56+8 - 1126 00a0 9268 ldr r2, [r2, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1127 .loc 4 907 68 view .LVU385 - 1128 00a2 12F0010F tst r2, #1 - 1129 00a6 05D1 bne .L49 - 1130 .LVL90: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1131 .loc 4 907 68 view .LVU386 - 1132 .LBE387: - 1133 .LBE386: -2806:Src/main.c **** (void) SPI2->DR; - 1134 .loc 1 2806 51 discriminator 1 view .LVU387 - 1135 00a8 5A1C adds r2, r3, #1 - 1136 .LVL91: -2806:Src/main.c **** (void) SPI2->DR; - 1137 .loc 1 2806 42 discriminator 1 view .LVU388 - 1138 00aa B3F57A7F cmp r3, #1000 - 1139 00ae 01D2 bcs .L49 -2806:Src/main.c **** (void) SPI2->DR; - 1140 .loc 1 2806 51 discriminator 1 view .LVU389 - 1141 00b0 1346 mov r3, r2 - 1142 00b2 F4E7 b .L50 - ARM GAS /tmp/ccuHnxNu.s page 151 - - - 1143 .LVL92: - 1144 .L49: -2807:Src/main.c **** - 1145 .loc 1 2807 2 is_stmt 1 view .LVU390 - 1146 00b4 064B ldr r3, .L56+8 - 1147 00b6 DB68 ldr r3, [r3, #12] -2809:Src/main.c **** } - 1148 .loc 1 2809 2 view .LVU391 - 1149 00b8 0122 movs r2, #1 - 1150 00ba 4FF48051 mov r1, #4096 - 1151 00be 0248 ldr r0, .L56 - 1152 00c0 FFF7FEFF bl HAL_GPIO_WritePin - 1153 .LVL93: -2810:Src/main.c **** - 1154 .loc 1 2810 1 is_stmt 0 view .LVU392 - 1155 00c4 38BD pop {r3, r4, r5, pc} - 1156 .LVL94: - 1157 .L57: -2810:Src/main.c **** - 1158 .loc 1 2810 1 view .LVU393 - 1159 00c6 00BF .align 2 - 1160 .L56: - 1161 00c8 00040240 .word 1073873920 - 1162 00cc 000C0240 .word 1073875968 - 1163 00d0 00380040 .word 1073756160 - 1164 .cfi_endproc - 1165 .LFE1219: - 1167 .section .text.AD9102_WriteRegTable,"ax",%progbits - 1168 .align 1 - 1169 .syntax unified - 1170 .thumb - 1171 .thumb_func - 1173 AD9102_WriteRegTable: - 1174 .LVL95: - 1175 .LFB1221: -2848:Src/main.c **** for (uint16_t i = 0; i < count; i++) - 1176 .loc 1 2848 1 is_stmt 1 view -0 - 1177 .cfi_startproc - 1178 @ args = 0, pretend = 0, frame = 0 - 1179 @ frame_needed = 0, uses_anonymous_args = 0 -2848:Src/main.c **** for (uint16_t i = 0; i < count; i++) - 1180 .loc 1 2848 1 is_stmt 0 view .LVU395 - 1181 0000 70B5 push {r4, r5, r6, lr} - 1182 .LCFI10: - 1183 .cfi_def_cfa_offset 16 - 1184 .cfi_offset 4, -16 - 1185 .cfi_offset 5, -12 - 1186 .cfi_offset 6, -8 - 1187 .cfi_offset 14, -4 - 1188 0002 0646 mov r6, r0 - 1189 0004 0D46 mov r5, r1 -2849:Src/main.c **** { - 1190 .loc 1 2849 2 is_stmt 1 view .LVU396 - 1191 .LBB388: -2849:Src/main.c **** { - 1192 .loc 1 2849 7 view .LVU397 - 1193 .LVL96: - ARM GAS /tmp/ccuHnxNu.s page 152 - - -2849:Src/main.c **** { - 1194 .loc 1 2849 16 is_stmt 0 view .LVU398 - 1195 0006 0024 movs r4, #0 -2849:Src/main.c **** { - 1196 .loc 1 2849 2 view .LVU399 - 1197 0008 08E0 b .L59 - 1198 .LVL97: - 1199 .L60: -2851:Src/main.c **** } - 1200 .loc 1 2851 3 is_stmt 1 view .LVU400 - 1201 000a 36F81410 ldrh r1, [r6, r4, lsl #1] - 1202 000e 054B ldr r3, .L62 - 1203 0010 33F81400 ldrh r0, [r3, r4, lsl #1] - 1204 0014 FFF7FEFF bl AD9102_WriteReg - 1205 .LVL98: -2849:Src/main.c **** { - 1206 .loc 1 2849 35 discriminator 3 view .LVU401 - 1207 0018 0134 adds r4, r4, #1 - 1208 .LVL99: -2849:Src/main.c **** { - 1209 .loc 1 2849 35 is_stmt 0 discriminator 3 view .LVU402 - 1210 001a A4B2 uxth r4, r4 - 1211 .LVL100: - 1212 .L59: -2849:Src/main.c **** { - 1213 .loc 1 2849 25 is_stmt 1 discriminator 1 view .LVU403 - 1214 001c AC42 cmp r4, r5 - 1215 001e F4D3 bcc .L60 - 1216 .LBE388: -2853:Src/main.c **** - 1217 .loc 1 2853 1 is_stmt 0 view .LVU404 - 1218 0020 70BD pop {r4, r5, r6, pc} - 1219 .LVL101: - 1220 .L63: -2853:Src/main.c **** - 1221 .loc 1 2853 1 view .LVU405 - 1222 0022 00BF .align 2 - 1223 .L62: - 1224 0024 00000000 .word ad9102_reg_addr - 1225 .cfi_endproc - 1226 .LFE1221: - 1228 .section .text.AD9102_LoadSramRamp,"ax",%progbits - 1229 .align 1 - 1230 .syntax unified - 1231 .thumb - 1232 .thumb_func - 1234 AD9102_LoadSramRamp: - 1235 .LVL102: - 1236 .LFB1223: -2900:Src/main.c **** if (samples < 2u) - 1237 .loc 1 2900 1 is_stmt 1 view -0 - 1238 .cfi_startproc - 1239 @ args = 0, pretend = 0, frame = 0 - 1240 @ frame_needed = 0, uses_anonymous_args = 0 -2900:Src/main.c **** if (samples < 2u) - 1241 .loc 1 2900 1 is_stmt 0 view .LVU407 - 1242 0000 F8B5 push {r3, r4, r5, r6, r7, lr} - ARM GAS /tmp/ccuHnxNu.s page 153 - - - 1243 .LCFI11: - 1244 .cfi_def_cfa_offset 24 - 1245 .cfi_offset 3, -24 - 1246 .cfi_offset 4, -20 - 1247 .cfi_offset 5, -16 - 1248 .cfi_offset 6, -12 - 1249 .cfi_offset 7, -8 - 1250 .cfi_offset 14, -4 - 1251 0002 0F46 mov r7, r1 - 1252 0004 1646 mov r6, r2 -2901:Src/main.c **** { - 1253 .loc 1 2901 2 is_stmt 1 view .LVU408 -2901:Src/main.c **** { - 1254 .loc 1 2901 5 is_stmt 0 view .LVU409 - 1255 0006 0128 cmp r0, #1 - 1256 0008 06D9 bls .L78 - 1257 000a 0546 mov r5, r0 -2905:Src/main.c **** { - 1258 .loc 1 2905 2 is_stmt 1 view .LVU410 -2905:Src/main.c **** { - 1259 .loc 1 2905 5 is_stmt 0 view .LVU411 - 1260 000c B0F5805F cmp r0, #4096 - 1261 0010 03D9 bls .L65 -2907:Src/main.c **** } - 1262 .loc 1 2907 11 view .LVU412 - 1263 0012 4FF48055 mov r5, #4096 - 1264 0016 00E0 b .L65 - 1265 .L78: -2903:Src/main.c **** } - 1266 .loc 1 2903 11 view .LVU413 - 1267 0018 0225 movs r5, #2 - 1268 .L65: - 1269 .LVL103: -2909:Src/main.c **** { - 1270 .loc 1 2909 2 is_stmt 1 view .LVU414 -2909:Src/main.c **** { - 1271 .loc 1 2909 5 is_stmt 0 view .LVU415 - 1272 001a B6F5005F cmp r6, #8192 - 1273 001e 01D3 bcc .L66 -2911:Src/main.c **** } - 1274 .loc 1 2911 13 view .LVU416 - 1275 0020 41F6FF76 movw r6, #8191 - 1276 .L66: - 1277 .LVL104: -2915:Src/main.c **** - 1278 .loc 1 2915 2 is_stmt 1 view .LVU417 - 1279 0024 0421 movs r1, #4 - 1280 .LVL105: -2915:Src/main.c **** - 1281 .loc 1 2915 2 is_stmt 0 view .LVU418 - 1282 0026 1E20 movs r0, #30 - 1283 0028 FFF7FEFF bl AD9102_WriteReg - 1284 .LVL106: -2917:Src/main.c **** { - 1285 .loc 1 2917 2 is_stmt 1 view .LVU419 - 1286 .LBB389: -2917:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 154 - - - 1287 .loc 1 2917 7 view .LVU420 -2917:Src/main.c **** { - 1288 .loc 1 2917 16 is_stmt 0 view .LVU421 - 1289 002c 0024 movs r4, #0 -2917:Src/main.c **** { - 1290 .loc 1 2917 2 view .LVU422 - 1291 002e 2DE0 b .L67 - 1292 .LVL107: - 1293 .L89: - 1294 .LBB390: - 1295 .LBB391: -2928:Src/main.c **** } - 1296 .loc 1 2928 10 view .LVU423 - 1297 0030 0122 movs r2, #1 - 1298 .LVL108: -2928:Src/main.c **** } - 1299 .loc 1 2928 10 view .LVU424 - 1300 0032 34E0 b .L69 - 1301 .LVL109: - 1302 .L82: - 1303 .LBB392: -2932:Src/main.c **** if (span == 0) - 1304 .loc 1 2932 14 discriminator 2 view .LVU425 - 1305 0034 0122 movs r2, #1 - 1306 .LVL110: -2932:Src/main.c **** if (span == 0) - 1307 .loc 1 2932 14 discriminator 2 view .LVU426 - 1308 0036 38E0 b .L71 - 1309 .LVL111: - 1310 .L70: -2932:Src/main.c **** if (span == 0) - 1311 .loc 1 2932 14 discriminator 2 view .LVU427 - 1312 .LBE392: - 1313 .LBB393: -2944:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; - 1314 .loc 1 2944 5 is_stmt 1 view .LVU428 -2944:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; - 1315 .loc 1 2944 14 is_stmt 0 view .LVU429 - 1316 0038 A91A subs r1, r5, r2 - 1317 003a 89B2 uxth r1, r1 - 1318 .LVL112: -2945:Src/main.c **** if (span == 0) - 1319 .loc 1 2945 5 is_stmt 1 view .LVU430 -2945:Src/main.c **** if (span == 0) - 1320 .loc 1 2945 14 is_stmt 0 view .LVU431 - 1321 003c 0129 cmp r1, #1 - 1322 003e 09D9 bls .L83 -2945:Src/main.c **** if (span == 0) - 1323 .loc 1 2945 14 discriminator 1 view .LVU432 - 1324 0040 0139 subs r1, r1, #1 - 1325 .LVL113: -2945:Src/main.c **** if (span == 0) - 1326 .loc 1 2945 14 discriminator 1 view .LVU433 - 1327 0042 89B2 uxth r1, r1 - 1328 .LVL114: - 1329 .L74: -2946:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 155 - - - 1330 .loc 1 2946 5 is_stmt 1 view .LVU434 -2946:Src/main.c **** { - 1331 .loc 1 2946 8 is_stmt 0 view .LVU435 - 1332 0044 ABB1 cbz r3, .L72 -2952:Src/main.c **** } - 1333 .loc 1 2952 6 is_stmt 1 view .LVU436 -2952:Src/main.c **** } - 1334 .loc 1 2952 44 is_stmt 0 view .LVU437 - 1335 0046 A21A subs r2, r4, r2 - 1336 .LVL115: -2952:Src/main.c **** } - 1337 .loc 1 2952 30 view .LVU438 - 1338 0048 03FB02F2 mul r2, r3, r2 -2952:Src/main.c **** } - 1339 .loc 1 2952 53 view .LVU439 - 1340 004c 92FBF1F2 sdiv r2, r2, r1 -2952:Src/main.c **** } - 1341 .loc 1 2952 12 view .LVU440 - 1342 0050 831A subs r3, r0, r2 - 1343 .LVL116: -2952:Src/main.c **** } - 1344 .loc 1 2952 12 view .LVU441 - 1345 0052 0BE0 b .L73 - 1346 .LVL117: - 1347 .L83: -2945:Src/main.c **** if (span == 0) - 1348 .loc 1 2945 14 discriminator 2 view .LVU442 - 1349 0054 0121 movs r1, #1 - 1350 .LVL118: -2945:Src/main.c **** if (span == 0) - 1351 .loc 1 2945 14 discriminator 2 view .LVU443 - 1352 0056 F5E7 b .L74 - 1353 .LVL119: - 1354 .L68: -2945:Src/main.c **** if (span == 0) - 1355 .loc 1 2945 14 discriminator 2 view .LVU444 - 1356 .LBE393: - 1357 .LBE391: - 1358 .LBB395: -2958:Src/main.c **** if (span == 0) - 1359 .loc 1 2958 4 is_stmt 1 view .LVU445 -2958:Src/main.c **** if (span == 0) - 1360 .loc 1 2958 13 is_stmt 0 view .LVU446 - 1361 0058 012D cmp r5, #1 - 1362 005a 2ED9 bls .L84 -2958:Src/main.c **** if (span == 0) - 1363 .loc 1 2958 13 discriminator 1 view .LVU447 - 1364 005c 6A1E subs r2, r5, #1 - 1365 005e 92B2 uxth r2, r2 - 1366 .L75: - 1367 .LVL120: -2959:Src/main.c **** { - 1368 .loc 1 2959 4 is_stmt 1 view .LVU448 -2959:Src/main.c **** { - 1369 .loc 1 2959 7 is_stmt 0 view .LVU449 - 1370 0060 3BB1 cbz r3, .L72 -2965:Src/main.c **** } - ARM GAS /tmp/ccuHnxNu.s page 156 - - - 1371 .loc 1 2965 5 is_stmt 1 view .LVU450 -2965:Src/main.c **** } - 1372 .loc 1 2965 29 is_stmt 0 view .LVU451 - 1373 0062 04FB03F3 mul r3, r4, r3 - 1374 .LVL121: -2965:Src/main.c **** } - 1375 .loc 1 2965 43 view .LVU452 - 1376 0066 93FBF2F3 sdiv r3, r3, r2 - 1377 006a 1B1A subs r3, r3, r0 - 1378 .LVL122: - 1379 .L73: -2965:Src/main.c **** } - 1380 .loc 1 2965 43 view .LVU453 - 1381 .LBE395: -2969:Src/main.c **** { - 1382 .loc 1 2969 3 is_stmt 1 view .LVU454 -2969:Src/main.c **** { - 1383 .loc 1 2969 6 is_stmt 0 view .LVU455 - 1384 006c 13F5005F cmn r3, #8192 - 1385 0070 25DB blt .L85 - 1386 .LVL123: - 1387 .L72: -2973:Src/main.c **** { - 1388 .loc 1 2973 8 is_stmt 1 view .LVU456 -2973:Src/main.c **** { - 1389 .loc 1 2973 11 is_stmt 0 view .LVU457 - 1390 0072 B3F5005F cmp r3, #8192 - 1391 0076 24DA bge .L86 - 1392 .L76: - 1393 .LVL124: -2978:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); - 1394 .loc 1 2978 3 is_stmt 1 view .LVU458 -2978:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); - 1395 .loc 1 2978 25 is_stmt 0 view .LVU459 - 1396 0078 99B2 uxth r1, r3 - 1397 .LVL125: -2979:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); - 1398 .loc 1 2979 3 is_stmt 1 view .LVU460 -2980:Src/main.c **** } - 1399 .loc 1 2980 3 view .LVU461 - 1400 007a 8900 lsls r1, r1, #2 - 1401 .LVL126: -2980:Src/main.c **** } - 1402 .loc 1 2980 3 is_stmt 0 view .LVU462 - 1403 007c 89B2 uxth r1, r1 - 1404 007e 04F5C040 add r0, r4, #24576 - 1405 .LVL127: -2980:Src/main.c **** } - 1406 .loc 1 2980 3 view .LVU463 - 1407 0082 80B2 uxth r0, r0 - 1408 0084 FFF7FEFF bl AD9102_WriteReg - 1409 .LVL128: -2980:Src/main.c **** } - 1410 .loc 1 2980 3 view .LVU464 - 1411 .LBE390: -2917:Src/main.c **** { - 1412 .loc 1 2917 37 is_stmt 1 discriminator 2 view .LVU465 - ARM GAS /tmp/ccuHnxNu.s page 157 - - - 1413 0088 0134 adds r4, r4, #1 - 1414 .LVL129: -2917:Src/main.c **** { - 1415 .loc 1 2917 37 is_stmt 0 discriminator 2 view .LVU466 - 1416 008a A4B2 uxth r4, r4 - 1417 .LVL130: - 1418 .L67: -2917:Src/main.c **** { - 1419 .loc 1 2917 25 is_stmt 1 discriminator 1 view .LVU467 - 1420 008c A542 cmp r5, r4 - 1421 008e 1BD9 bls .L88 - 1422 .LBB398: -2919:Src/main.c **** int32_t min_val = -(int32_t)amplitude; - 1423 .loc 1 2919 3 view .LVU468 -2920:Src/main.c **** int32_t max_val = (int32_t)amplitude; - 1424 .loc 1 2920 3 view .LVU469 -2920:Src/main.c **** int32_t max_val = (int32_t)amplitude; - 1425 .loc 1 2920 22 is_stmt 0 view .LVU470 - 1426 0090 3046 mov r0, r6 - 1427 .LVL131: -2921:Src/main.c **** int32_t span = max_val - min_val; - 1428 .loc 1 2921 3 is_stmt 1 view .LVU471 -2922:Src/main.c **** if (triangle) - 1429 .loc 1 2922 3 view .LVU472 -2922:Src/main.c **** if (triangle) - 1430 .loc 1 2922 11 is_stmt 0 view .LVU473 - 1431 0092 7300 lsls r3, r6, #1 - 1432 .LVL132: -2923:Src/main.c **** { - 1433 .loc 1 2923 3 is_stmt 1 view .LVU474 -2923:Src/main.c **** { - 1434 .loc 1 2923 6 is_stmt 0 view .LVU475 - 1435 0094 002F cmp r7, #0 - 1436 0096 DFD0 beq .L68 - 1437 .LBB396: -2925:Src/main.c **** if (half == 0u) - 1438 .loc 1 2925 4 is_stmt 1 view .LVU476 -2925:Src/main.c **** if (half == 0u) - 1439 .loc 1 2925 13 is_stmt 0 view .LVU477 - 1440 0098 6A08 lsrs r2, r5, #1 - 1441 .LVL133: -2926:Src/main.c **** { - 1442 .loc 1 2926 4 is_stmt 1 view .LVU478 -2926:Src/main.c **** { - 1443 .loc 1 2926 7 is_stmt 0 view .LVU479 - 1444 009a 012D cmp r5, #1 - 1445 009c C8D9 bls .L89 - 1446 .LVL134: - 1447 .L69: -2930:Src/main.c **** { - 1448 .loc 1 2930 4 is_stmt 1 view .LVU480 -2930:Src/main.c **** { - 1449 .loc 1 2930 7 is_stmt 0 view .LVU481 - 1450 009e 9442 cmp r4, r2 - 1451 00a0 CAD2 bcs .L70 - 1452 .LBB394: -2932:Src/main.c **** if (span == 0) - ARM GAS /tmp/ccuHnxNu.s page 158 - - - 1453 .loc 1 2932 5 is_stmt 1 view .LVU482 -2932:Src/main.c **** if (span == 0) - 1454 .loc 1 2932 14 is_stmt 0 view .LVU483 - 1455 00a2 012A cmp r2, #1 - 1456 00a4 C6D9 bls .L82 -2932:Src/main.c **** if (span == 0) - 1457 .loc 1 2932 14 discriminator 1 view .LVU484 - 1458 00a6 013A subs r2, r2, #1 - 1459 .LVL135: -2932:Src/main.c **** if (span == 0) - 1460 .loc 1 2932 14 discriminator 1 view .LVU485 - 1461 00a8 92B2 uxth r2, r2 - 1462 .LVL136: - 1463 .L71: -2933:Src/main.c **** { - 1464 .loc 1 2933 5 is_stmt 1 view .LVU486 -2933:Src/main.c **** { - 1465 .loc 1 2933 8 is_stmt 0 view .LVU487 - 1466 00aa 002B cmp r3, #0 - 1467 00ac E1D0 beq .L72 -2939:Src/main.c **** } - 1468 .loc 1 2939 6 is_stmt 1 view .LVU488 -2939:Src/main.c **** } - 1469 .loc 1 2939 30 is_stmt 0 view .LVU489 - 1470 00ae 04FB03F3 mul r3, r4, r3 - 1471 .LVL137: -2939:Src/main.c **** } - 1472 .loc 1 2939 44 view .LVU490 - 1473 00b2 93FBF2F3 sdiv r3, r3, r2 - 1474 00b6 1B1A subs r3, r3, r0 - 1475 .LVL138: -2939:Src/main.c **** } - 1476 .loc 1 2939 44 view .LVU491 - 1477 00b8 D8E7 b .L73 - 1478 .LVL139: - 1479 .L84: -2939:Src/main.c **** } - 1480 .loc 1 2939 44 view .LVU492 - 1481 .LBE394: - 1482 .LBE396: - 1483 .LBB397: -2958:Src/main.c **** if (span == 0) - 1484 .loc 1 2958 13 discriminator 2 view .LVU493 - 1485 00ba 0122 movs r2, #1 - 1486 00bc D0E7 b .L75 - 1487 .LVL140: - 1488 .L85: -2958:Src/main.c **** if (span == 0) - 1489 .loc 1 2958 13 discriminator 2 view .LVU494 - 1490 .LBE397: -2971:Src/main.c **** } - 1491 .loc 1 2971 10 view .LVU495 - 1492 00be 054B ldr r3, .L90 - 1493 .LVL141: -2971:Src/main.c **** } - 1494 .loc 1 2971 10 view .LVU496 - 1495 00c0 DAE7 b .L76 - ARM GAS /tmp/ccuHnxNu.s page 159 - - - 1496 .LVL142: - 1497 .L86: -2975:Src/main.c **** } - 1498 .loc 1 2975 10 view .LVU497 - 1499 00c2 41F6FF73 movw r3, #8191 - 1500 00c6 D7E7 b .L76 - 1501 .LVL143: - 1502 .L88: -2975:Src/main.c **** } - 1503 .loc 1 2975 10 view .LVU498 - 1504 .LBE398: - 1505 .LBE389: -2984:Src/main.c **** } - 1506 .loc 1 2984 2 is_stmt 1 view .LVU499 - 1507 00c8 0021 movs r1, #0 - 1508 00ca 1E20 movs r0, #30 - 1509 00cc FFF7FEFF bl AD9102_WriteReg - 1510 .LVL144: -2985:Src/main.c **** - 1511 .loc 1 2985 1 is_stmt 0 view .LVU500 - 1512 00d0 F8BD pop {r3, r4, r5, r6, r7, pc} - 1513 .LVL145: - 1514 .L91: -2985:Src/main.c **** - 1515 .loc 1 2985 1 view .LVU501 - 1516 00d2 00BF .align 2 - 1517 .L90: - 1518 00d4 00E0FFFF .word -8192 - 1519 .cfi_endproc - 1520 .LFE1223: - 1522 .section .text.AD9102_Init,"ax",%progbits - 1523 .align 1 - 1524 .syntax unified - 1525 .thumb - 1526 .thumb_func - 1528 AD9102_Init: - 1529 .LFB1212: -2646:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); - 1530 .loc 1 2646 1 is_stmt 1 view -0 - 1531 .cfi_startproc - 1532 @ args = 0, pretend = 0, frame = 8 - 1533 @ frame_needed = 0, uses_anonymous_args = 0 - 1534 0000 00B5 push {lr} - 1535 .LCFI12: - 1536 .cfi_def_cfa_offset 4 - 1537 .cfi_offset 14, -4 - 1538 0002 83B0 sub sp, sp, #12 - 1539 .LCFI13: - 1540 .cfi_def_cfa_offset 16 -2647:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); - 1541 .loc 1 2647 2 view .LVU503 - 1542 0004 0122 movs r2, #1 - 1543 0006 4FF48051 mov r1, #4096 - 1544 000a 1648 ldr r0, .L96 - 1545 000c FFF7FEFF bl HAL_GPIO_WritePin - 1546 .LVL146: -2648:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} - ARM GAS /tmp/ccuHnxNu.s page 160 - - - 1547 .loc 1 2648 2 view .LVU504 - 1548 0010 0022 movs r2, #0 - 1549 0012 4021 movs r1, #64 - 1550 0014 1448 ldr r0, .L96+4 - 1551 0016 FFF7FEFF bl HAL_GPIO_WritePin - 1552 .LVL147: -2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1553 .loc 1 2649 2 view .LVU505 - 1554 .LBB399: -2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1555 .loc 1 2649 7 view .LVU506 -2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1556 .loc 1 2649 25 is_stmt 0 view .LVU507 - 1557 001a 0023 movs r3, #0 - 1558 001c 0193 str r3, [sp, #4] -2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1559 .loc 1 2649 2 view .LVU508 - 1560 001e 02E0 b .L93 - 1561 .L94: -2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1562 .loc 1 2649 48 is_stmt 1 discriminator 3 view .LVU509 -2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1563 .loc 1 2649 43 discriminator 3 view .LVU510 - 1564 0020 019B ldr r3, [sp, #4] - 1565 0022 0133 adds r3, r3, #1 - 1566 0024 0193 str r3, [sp, #4] - 1567 .L93: -2649:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); - 1568 .loc 1 2649 34 discriminator 1 view .LVU511 - 1569 0026 019B ldr r3, [sp, #4] - 1570 0028 B3F57A7F cmp r3, #1000 - 1571 002c F8D3 bcc .L94 - 1572 .LBE399: -2650:Src/main.c **** - 1573 .loc 1 2650 2 view .LVU512 - 1574 002e 0122 movs r2, #1 - 1575 0030 4021 movs r1, #64 - 1576 0032 0D48 ldr r0, .L96+4 - 1577 0034 FFF7FEFF bl HAL_GPIO_WritePin - 1578 .LVL148: -2652:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); - 1579 .loc 1 2652 2 view .LVU513 - 1580 0038 4221 movs r1, #66 - 1581 003a 0C48 ldr r0, .L96+8 - 1582 003c FFF7FEFF bl AD9102_WriteRegTable - 1583 .LVL149: -2653:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 1584 .loc 1 2653 2 view .LVU514 - 1585 0040 0021 movs r1, #0 - 1586 0042 1E20 movs r0, #30 - 1587 0044 FFF7FEFF bl AD9102_WriteReg - 1588 .LVL150: -2654:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 1589 .loc 1 2654 2 view .LVU515 - 1590 0048 0121 movs r1, #1 - 1591 004a 1D20 movs r0, #29 - 1592 004c FFF7FEFF bl AD9102_WriteReg - ARM GAS /tmp/ccuHnxNu.s page 161 - - - 1593 .LVL151: -2655:Src/main.c **** } - 1594 .loc 1 2655 2 view .LVU516 - 1595 0050 0122 movs r2, #1 - 1596 0052 4FF40061 mov r1, #2048 - 1597 0056 0648 ldr r0, .L96+12 - 1598 0058 FFF7FEFF bl HAL_GPIO_WritePin - 1599 .LVL152: -2656:Src/main.c **** - 1600 .loc 1 2656 1 is_stmt 0 view .LVU517 - 1601 005c 03B0 add sp, sp, #12 - 1602 .LCFI14: - 1603 .cfi_def_cfa_offset 4 - 1604 @ sp needed - 1605 005e 5DF804FB ldr pc, [sp], #4 - 1606 .L97: - 1607 0062 00BF .align 2 - 1608 .L96: - 1609 0064 00040240 .word 1073873920 - 1610 0068 00080240 .word 1073874944 - 1611 006c 00000000 .word ad9102_example4_regval - 1612 0070 000C0240 .word 1073875968 - 1613 .cfi_endproc - 1614 .LFE1212: - 1616 .section .text.AD9102_ReadReg,"ax",%progbits - 1617 .align 1 - 1618 .syntax unified - 1619 .thumb - 1620 .thumb_func - 1622 AD9102_ReadReg: - 1623 .LVL153: - 1624 .LFB1220: -2813:Src/main.c **** uint32_t tmp32 = 0; - 1625 .loc 1 2813 1 is_stmt 1 view -0 - 1626 .cfi_startproc - 1627 @ args = 0, pretend = 0, frame = 0 - 1628 @ frame_needed = 0, uses_anonymous_args = 0 -2813:Src/main.c **** uint32_t tmp32 = 0; - 1629 .loc 1 2813 1 is_stmt 0 view .LVU519 - 1630 0000 10B5 push {r4, lr} - 1631 .LCFI15: - 1632 .cfi_def_cfa_offset 8 - 1633 .cfi_offset 4, -8 - 1634 .cfi_offset 14, -4 -2814:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) - 1635 .loc 1 2814 2 is_stmt 1 view .LVU520 - 1636 .LVL154: -2815:Src/main.c **** uint16_t value; - 1637 .loc 1 2815 2 view .LVU521 -2815:Src/main.c **** uint16_t value; - 1638 .loc 1 2815 11 is_stmt 0 view .LVU522 - 1639 0002 40F40044 orr r4, r0, #32768 - 1640 .LVL155: -2816:Src/main.c **** - 1641 .loc 1 2816 2 is_stmt 1 view .LVU523 -2818:Src/main.c **** - 1642 .loc 1 2818 2 view .LVU524 - ARM GAS /tmp/ccuHnxNu.s page 162 - - - 1643 0006 0021 movs r1, #0 - 1644 0008 0846 mov r0, r1 - 1645 .LVL156: -2818:Src/main.c **** - 1646 .loc 1 2818 2 is_stmt 0 view .LVU525 - 1647 000a FFF7FEFF bl SPI2_SetMode - 1648 .LVL157: -2820:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); - 1649 .loc 1 2820 2 is_stmt 1 view .LVU526 - 1650 000e 0122 movs r2, #1 - 1651 0010 4FF48041 mov r1, #16384 - 1652 0014 2C48 ldr r0, .L113 - 1653 0016 FFF7FEFF bl HAL_GPIO_WritePin - 1654 .LVL158: -2821:Src/main.c **** - 1655 .loc 1 2821 2 view .LVU527 - 1656 001a 0122 movs r2, #1 - 1657 001c 4FF48051 mov r1, #4096 - 1658 0020 2A48 ldr r0, .L113+4 - 1659 0022 FFF7FEFF bl HAL_GPIO_WritePin - 1660 .LVL159: -2823:Src/main.c **** { - 1661 .loc 1 2823 2 view .LVU528 - 1662 .LBB400: - 1663 .LBI400: - 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1664 .loc 4 381 26 view .LVU529 - 1665 .LBB401: - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1666 .loc 4 383 3 view .LVU530 - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1667 .loc 4 383 12 is_stmt 0 view .LVU531 - 1668 0026 2A4B ldr r3, .L113+8 - 1669 0028 1B68 ldr r3, [r3] - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1670 .loc 4 383 69 view .LVU532 - 1671 002a 13F0400F tst r3, #64 - 1672 002e 04D1 bne .L99 - 1673 .LVL160: - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1674 .loc 4 383 69 view .LVU533 - 1675 .LBE401: - 1676 .LBE400: -2825:Src/main.c **** } - 1677 .loc 1 2825 3 is_stmt 1 view .LVU534 - 1678 .LBB402: - 1679 .LBI402: - 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1680 .loc 4 358 22 view .LVU535 - 1681 .LBB403: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1682 .loc 4 360 3 view .LVU536 - 1683 0030 274A ldr r2, .L113+8 - 1684 0032 1368 ldr r3, [r2] - 1685 0034 43F04003 orr r3, r3, #64 - 1686 0038 1360 str r3, [r2] - 1687 .LVL161: - ARM GAS /tmp/ccuHnxNu.s page 163 - - - 1688 .L99: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1689 .loc 4 360 3 is_stmt 0 view .LVU537 - 1690 .LBE403: - 1691 .LBE402: -2828:Src/main.c **** - 1692 .loc 1 2828 2 is_stmt 1 view .LVU538 - 1693 003a 0022 movs r2, #0 - 1694 003c 4FF48051 mov r1, #4096 - 1695 0040 2148 ldr r0, .L113 - 1696 0042 FFF7FEFF bl HAL_GPIO_WritePin - 1697 .LVL162: -2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1698 .loc 1 2830 2 view .LVU539 -2814:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) - 1699 .loc 1 2814 11 is_stmt 0 view .LVU540 - 1700 0046 0023 movs r3, #0 - 1701 .LVL163: - 1702 .L101: -2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1703 .loc 1 2830 63 is_stmt 1 discriminator 2 view .LVU541 -2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1704 .loc 1 2830 41 discriminator 2 view .LVU542 - 1705 .LBB404: - 1706 .LBI404: +2893:Src/main.c **** (void) SPI2->DR; + 1085 .loc 1 2893 51 discriminator 1 view .LVU362 + 1086 0070 5A1C adds r2, r3, #1 + 1087 .LVL81: +2893:Src/main.c **** (void) SPI2->DR; + 1088 .loc 1 2893 42 discriminator 1 view .LVU363 + 1089 0072 B3F57A7F cmp r3, #1000 + 1090 0076 01D2 bcs .L48 +2893:Src/main.c **** (void) SPI2->DR; + 1091 .loc 1 2893 51 discriminator 1 view .LVU364 + 1092 0078 1346 mov r3, r2 + 1093 007a F4E7 b .L49 + 1094 .LVL82: + 1095 .L48: +2894:Src/main.c **** + 1096 .loc 1 2894 2 is_stmt 1 view .LVU365 + 1097 007c 144B ldr r3, .L59+8 + 1098 007e DB68 ldr r3, [r3, #12] +2896:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 1099 .loc 1 2896 2 view .LVU366 + 1100 .LVL83: +2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1101 .loc 1 2897 2 view .LVU367 +2896:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 1102 .loc 1 2896 8 is_stmt 0 view .LVU368 + 1103 0080 0023 movs r3, #0 + 1104 .LVL84: + 1105 .L51: +2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1106 .loc 1 2897 63 is_stmt 1 discriminator 2 view .LVU369 +2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1107 .loc 1 2897 41 discriminator 2 view .LVU370 + 1108 .LBB385: + 1109 .LBI385: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1707 .loc 4 916 26 view .LVU543 - 1708 .LBB405: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1709 .loc 4 918 3 view .LVU544 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1710 .loc 4 918 12 is_stmt 0 view .LVU545 - 1711 0048 214A ldr r2, .L113+8 - 1712 004a 9268 ldr r2, [r2, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1713 .loc 4 918 66 view .LVU546 - 1714 004c 12F0020F tst r2, #2 - 1715 0050 05D1 bne .L100 - 1716 .LVL164: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1717 .loc 4 918 66 view .LVU547 - 1718 .LBE405: - 1719 .LBE404: -2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1720 .loc 1 2830 50 discriminator 1 view .LVU548 - 1721 0052 5A1C adds r2, r3, #1 - 1722 .LVL165: -2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1723 .loc 1 2830 41 discriminator 1 view .LVU549 - 1724 0054 B3F57A7F cmp r3, #1000 - 1725 0058 01D2 bcs .L100 -2830:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); - 1726 .loc 1 2830 50 discriminator 1 view .LVU550 - 1727 005a 1346 mov r3, r2 - 1728 005c F4E7 b .L101 - 1729 .LVL166: - 1730 .L100: - ARM GAS /tmp/ccuHnxNu.s page 164 + 1110 .loc 4 916 26 view .LVU371 + 1111 .LBB386: + ARM GAS /tmp/ccLSPxIe.s page 154 -2831:Src/main.c **** tmp32 = 0; - 1731 .loc 1 2831 2 is_stmt 1 view .LVU551 - 1732 .LBB406: - 1733 .LBI406: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1112 .loc 4 918 3 view .LVU372 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1113 .loc 4 918 12 is_stmt 0 view .LVU373 + 1114 0082 134A ldr r2, .L59+8 + 1115 0084 9268 ldr r2, [r2, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1116 .loc 4 918 66 view .LVU374 + 1117 0086 12F0020F tst r2, #2 + 1118 008a 05D1 bne .L50 + 1119 .LVL85: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 1120 .loc 4 918 66 view .LVU375 + 1121 .LBE386: + 1122 .LBE385: +2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1123 .loc 1 2897 50 discriminator 1 view .LVU376 + 1124 008c 5A1C adds r2, r3, #1 + 1125 .LVL86: +2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1126 .loc 1 2897 41 discriminator 1 view .LVU377 + 1127 008e B3F57A7F cmp r3, #1000 + 1128 0092 01D2 bcs .L50 +2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value); + 1129 .loc 1 2897 50 discriminator 1 view .LVU378 + 1130 0094 1346 mov r3, r2 + 1131 0096 F4E7 b .L51 + 1132 .LVL87: + 1133 .L50: +2898:Src/main.c **** tmp32 = 0; + 1134 .loc 1 2898 2 is_stmt 1 view .LVU379 + 1135 .LBB387: + 1136 .LBI387: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1734 .loc 4 1373 22 view .LVU552 - 1735 .LBB407: + 1137 .loc 4 1373 22 view .LVU380 + 1138 .LBB388: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 1736 .loc 4 1376 3 view .LVU553 - 1737 .loc 4 1377 3 view .LVU554 - 1738 .loc 4 1377 10 is_stmt 0 view .LVU555 - 1739 005e 1C4B ldr r3, .L113+8 - 1740 0060 9C81 strh r4, [r3, #12] @ movhi - 1741 .LVL167: - 1742 .loc 4 1377 10 view .LVU556 - 1743 .LBE407: - 1744 .LBE406: -2832:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1745 .loc 1 2832 2 is_stmt 1 view .LVU557 -2833:Src/main.c **** (void) SPI2->DR; - 1746 .loc 1 2833 2 view .LVU558 -2832:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1747 .loc 1 2832 8 is_stmt 0 view .LVU559 - 1748 0062 0023 movs r3, #0 - 1749 .LVL168: - 1750 .L103: -2833:Src/main.c **** (void) SPI2->DR; - 1751 .loc 1 2833 64 is_stmt 1 discriminator 2 view .LVU560 -2833:Src/main.c **** (void) SPI2->DR; - 1752 .loc 1 2833 42 discriminator 2 view .LVU561 - 1753 .LBB408: - 1754 .LBI408: + 1139 .loc 4 1376 3 view .LVU381 + 1140 .loc 4 1377 3 view .LVU382 + 1141 .loc 4 1377 10 is_stmt 0 view .LVU383 + 1142 0098 0D4B ldr r3, .L59+8 + 1143 009a 9C81 strh r4, [r3, #12] @ movhi + 1144 .LVL88: + 1145 .loc 4 1377 10 view .LVU384 + 1146 .LBE388: + 1147 .LBE387: +2899:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1148 .loc 1 2899 2 is_stmt 1 view .LVU385 +2900:Src/main.c **** (void) SPI2->DR; + 1149 .loc 1 2900 2 view .LVU386 +2899:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 1150 .loc 1 2899 8 is_stmt 0 view .LVU387 + 1151 009c 0023 movs r3, #0 + 1152 .LVL89: + 1153 .L53: +2900:Src/main.c **** (void) SPI2->DR; + 1154 .loc 1 2900 64 is_stmt 1 discriminator 2 view .LVU388 + ARM GAS /tmp/ccLSPxIe.s page 155 + + +2900:Src/main.c **** (void) SPI2->DR; + 1155 .loc 1 2900 42 discriminator 2 view .LVU389 + 1156 .LBB389: + 1157 .LBI389: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1755 .loc 4 905 26 view .LVU562 - 1756 .LBB409: + 1158 .loc 4 905 26 view .LVU390 + 1159 .LBB390: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1757 .loc 4 907 3 view .LVU563 + 1160 .loc 4 907 3 view .LVU391 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1758 .loc 4 907 12 is_stmt 0 view .LVU564 - 1759 0064 1A4A ldr r2, .L113+8 - 1760 0066 9268 ldr r2, [r2, #8] + 1161 .loc 4 907 12 is_stmt 0 view .LVU392 + 1162 009e 0C4A ldr r2, .L59+8 + 1163 00a0 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1761 .loc 4 907 68 view .LVU565 - 1762 0068 12F0010F tst r2, #1 - 1763 006c 05D1 bne .L102 - 1764 .LVL169: + 1164 .loc 4 907 68 view .LVU393 + 1165 00a2 12F0010F tst r2, #1 + 1166 00a6 05D1 bne .L52 + 1167 .LVL90: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1765 .loc 4 907 68 view .LVU566 - 1766 .LBE409: - 1767 .LBE408: -2833:Src/main.c **** (void) SPI2->DR; - 1768 .loc 1 2833 51 discriminator 1 view .LVU567 - 1769 006e 5A1C adds r2, r3, #1 - 1770 .LVL170: -2833:Src/main.c **** (void) SPI2->DR; - 1771 .loc 1 2833 42 discriminator 1 view .LVU568 - 1772 0070 B3F57A7F cmp r3, #1000 - ARM GAS /tmp/ccuHnxNu.s page 165 + 1168 .loc 4 907 68 view .LVU394 + 1169 .LBE390: + 1170 .LBE389: +2900:Src/main.c **** (void) SPI2->DR; + 1171 .loc 1 2900 51 discriminator 1 view .LVU395 + 1172 00a8 5A1C adds r2, r3, #1 + 1173 .LVL91: +2900:Src/main.c **** (void) SPI2->DR; + 1174 .loc 1 2900 42 discriminator 1 view .LVU396 + 1175 00aa B3F57A7F cmp r3, #1000 + 1176 00ae 01D2 bcs .L52 +2900:Src/main.c **** (void) SPI2->DR; + 1177 .loc 1 2900 51 discriminator 1 view .LVU397 + 1178 00b0 1346 mov r3, r2 + 1179 00b2 F4E7 b .L53 + 1180 .LVL92: + 1181 .L52: +2901:Src/main.c **** + 1182 .loc 1 2901 2 is_stmt 1 view .LVU398 + 1183 00b4 064B ldr r3, .L59+8 + 1184 00b6 DB68 ldr r3, [r3, #12] +2903:Src/main.c **** } + 1185 .loc 1 2903 2 view .LVU399 + 1186 00b8 0122 movs r2, #1 + 1187 00ba 4FF48051 mov r1, #4096 + 1188 00be 0248 ldr r0, .L59 + 1189 00c0 FFF7FEFF bl HAL_GPIO_WritePin + 1190 .LVL93: +2904:Src/main.c **** + 1191 .loc 1 2904 1 is_stmt 0 view .LVU400 + 1192 00c4 38BD pop {r3, r4, r5, pc} + 1193 .LVL94: + 1194 .L60: +2904:Src/main.c **** + 1195 .loc 1 2904 1 view .LVU401 + 1196 00c6 00BF .align 2 + 1197 .L59: + 1198 00c8 00040240 .word 1073873920 + ARM GAS /tmp/ccLSPxIe.s page 156 - 1773 0074 01D2 bcs .L102 -2833:Src/main.c **** (void) SPI2->DR; - 1774 .loc 1 2833 51 discriminator 1 view .LVU569 - 1775 0076 1346 mov r3, r2 - 1776 0078 F4E7 b .L103 - 1777 .LVL171: - 1778 .L102: -2834:Src/main.c **** - 1779 .loc 1 2834 2 is_stmt 1 view .LVU570 - 1780 007a 154B ldr r3, .L113+8 - 1781 007c DB68 ldr r3, [r3, #12] -2836:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 1782 .loc 1 2836 2 view .LVU571 - 1783 .LVL172: -2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1784 .loc 1 2837 2 view .LVU572 -2836:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} - 1785 .loc 1 2836 8 is_stmt 0 view .LVU573 - 1786 007e 0023 movs r3, #0 - 1787 .LVL173: - 1788 .L105: -2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1789 .loc 1 2837 63 is_stmt 1 discriminator 2 view .LVU574 -2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1790 .loc 1 2837 41 discriminator 2 view .LVU575 - 1791 .LBB410: - 1792 .LBI410: - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1793 .loc 4 916 26 view .LVU576 - 1794 .LBB411: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1795 .loc 4 918 3 view .LVU577 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1796 .loc 4 918 12 is_stmt 0 view .LVU578 - 1797 0080 134A ldr r2, .L113+8 - 1798 0082 9268 ldr r2, [r2, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1799 .loc 4 918 66 view .LVU579 - 1800 0084 12F0020F tst r2, #2 - 1801 0088 05D1 bne .L104 - 1802 .LVL174: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1803 .loc 4 918 66 view .LVU580 - 1804 .LBE411: - 1805 .LBE410: -2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1806 .loc 1 2837 50 discriminator 1 view .LVU581 - 1807 008a 5A1C adds r2, r3, #1 - 1808 .LVL175: -2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1809 .loc 1 2837 41 discriminator 1 view .LVU582 - 1810 008c B3F57A7F cmp r3, #1000 - 1811 0090 01D2 bcs .L104 -2837:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); - 1812 .loc 1 2837 50 discriminator 1 view .LVU583 - 1813 0092 1346 mov r3, r2 - 1814 0094 F4E7 b .L105 - ARM GAS /tmp/ccuHnxNu.s page 166 + 1199 00cc 000C0240 .word 1073875968 + 1200 00d0 00380040 .word 1073756160 + 1201 .cfi_endproc + 1202 .LFE1219: + 1204 .section .text.AD9102_WriteRegTable,"ax",%progbits + 1205 .align 1 + 1206 .syntax unified + 1207 .thumb + 1208 .thumb_func + 1210 AD9102_WriteRegTable: + 1211 .LVL95: + 1212 .LFB1221: +2942:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 1213 .loc 1 2942 1 is_stmt 1 view -0 + 1214 .cfi_startproc + 1215 @ args = 0, pretend = 0, frame = 0 + 1216 @ frame_needed = 0, uses_anonymous_args = 0 +2942:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 1217 .loc 1 2942 1 is_stmt 0 view .LVU403 + 1218 0000 70B5 push {r4, r5, r6, lr} + 1219 .LCFI10: + 1220 .cfi_def_cfa_offset 16 + 1221 .cfi_offset 4, -16 + 1222 .cfi_offset 5, -12 + 1223 .cfi_offset 6, -8 + 1224 .cfi_offset 14, -4 + 1225 0002 0646 mov r6, r0 + 1226 0004 0D46 mov r5, r1 +2943:Src/main.c **** { + 1227 .loc 1 2943 2 is_stmt 1 view .LVU404 + 1228 .LBB391: +2943:Src/main.c **** { + 1229 .loc 1 2943 7 view .LVU405 + 1230 .LVL96: +2943:Src/main.c **** { + 1231 .loc 1 2943 16 is_stmt 0 view .LVU406 + 1232 0006 0024 movs r4, #0 +2943:Src/main.c **** { + 1233 .loc 1 2943 2 view .LVU407 + 1234 0008 08E0 b .L62 + 1235 .LVL97: + 1236 .L63: +2945:Src/main.c **** } + 1237 .loc 1 2945 3 is_stmt 1 view .LVU408 + 1238 000a 36F81410 ldrh r1, [r6, r4, lsl #1] + 1239 000e 054B ldr r3, .L65 + 1240 0010 33F81400 ldrh r0, [r3, r4, lsl #1] + 1241 0014 FFF7FEFF bl AD9102_WriteReg + 1242 .LVL98: +2943:Src/main.c **** { + 1243 .loc 1 2943 35 discriminator 3 view .LVU409 + 1244 0018 0134 adds r4, r4, #1 + 1245 .LVL99: +2943:Src/main.c **** { + 1246 .loc 1 2943 35 is_stmt 0 discriminator 3 view .LVU410 + 1247 001a A4B2 uxth r4, r4 + 1248 .LVL100: + ARM GAS /tmp/ccLSPxIe.s page 157 - 1815 .LVL176: - 1816 .L104: -2838:Src/main.c **** tmp32 = 0; - 1817 .loc 1 2838 2 is_stmt 1 view .LVU584 - 1818 .LBB412: - 1819 .LBI412: -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1820 .loc 4 1373 22 view .LVU585 - 1821 .LBB413: -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 1822 .loc 4 1376 3 view .LVU586 - 1823 .loc 4 1377 3 view .LVU587 - 1824 .loc 4 1377 10 is_stmt 0 view .LVU588 - 1825 0096 0023 movs r3, #0 - 1826 0098 0D4A ldr r2, .L113+8 - 1827 009a 9381 strh r3, [r2, #12] @ movhi - 1828 .LVL177: - 1829 .loc 4 1377 10 view .LVU589 - 1830 .LBE413: - 1831 .LBE412: -2839:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 1832 .loc 1 2839 2 is_stmt 1 view .LVU590 -2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1833 .loc 1 2840 2 view .LVU591 - 1834 .L107: -2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1835 .loc 1 2840 64 discriminator 2 view .LVU592 -2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1836 .loc 1 2840 42 discriminator 2 view .LVU593 - 1837 .LBB414: - 1838 .LBI414: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1839 .loc 4 905 26 view .LVU594 - 1840 .LBB415: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1841 .loc 4 907 3 view .LVU595 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1842 .loc 4 907 12 is_stmt 0 view .LVU596 - 1843 009c 0C4A ldr r2, .L113+8 - 1844 009e 9268 ldr r2, [r2, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1845 .loc 4 907 68 view .LVU597 - 1846 00a0 12F0010F tst r2, #1 - 1847 00a4 05D1 bne .L106 - 1848 .LVL178: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1849 .loc 4 907 68 view .LVU598 - 1850 .LBE415: - 1851 .LBE414: -2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1852 .loc 1 2840 51 discriminator 1 view .LVU599 - 1853 00a6 5A1C adds r2, r3, #1 - 1854 .LVL179: -2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1855 .loc 1 2840 42 discriminator 1 view .LVU600 - 1856 00a8 B3F57A7F cmp r3, #1000 - 1857 00ac 01D2 bcs .L106 - ARM GAS /tmp/ccuHnxNu.s page 167 + 1249 .L62: +2943:Src/main.c **** { + 1250 .loc 1 2943 25 is_stmt 1 discriminator 1 view .LVU411 + 1251 001c AC42 cmp r4, r5 + 1252 001e F4D3 bcc .L63 + 1253 .LBE391: +2947:Src/main.c **** + 1254 .loc 1 2947 1 is_stmt 0 view .LVU412 + 1255 0020 70BD pop {r4, r5, r6, pc} + 1256 .LVL101: + 1257 .L66: +2947:Src/main.c **** + 1258 .loc 1 2947 1 view .LVU413 + 1259 0022 00BF .align 2 + 1260 .L65: + 1261 0024 00000000 .word ad9102_reg_addr + 1262 .cfi_endproc + 1263 .LFE1221: + 1265 .section .text.AD9102_LoadSramRamp,"ax",%progbits + 1266 .align 1 + 1267 .syntax unified + 1268 .thumb + 1269 .thumb_func + 1271 AD9102_LoadSramRamp: + 1272 .LVL102: + 1273 .LFB1231: +3155:Src/main.c **** if (samples < 2u) + 1274 .loc 1 3155 1 is_stmt 1 view -0 + 1275 .cfi_startproc + 1276 @ args = 0, pretend = 0, frame = 0 + 1277 @ frame_needed = 0, uses_anonymous_args = 0 +3155:Src/main.c **** if (samples < 2u) + 1278 .loc 1 3155 1 is_stmt 0 view .LVU415 + 1279 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1280 .LCFI11: + 1281 .cfi_def_cfa_offset 24 + 1282 .cfi_offset 3, -24 + 1283 .cfi_offset 4, -20 + 1284 .cfi_offset 5, -16 + 1285 .cfi_offset 6, -12 + 1286 .cfi_offset 7, -8 + 1287 .cfi_offset 14, -4 + 1288 0002 0F46 mov r7, r1 + 1289 0004 1646 mov r6, r2 +3156:Src/main.c **** { + 1290 .loc 1 3156 2 is_stmt 1 view .LVU416 +3156:Src/main.c **** { + 1291 .loc 1 3156 5 is_stmt 0 view .LVU417 + 1292 0006 0128 cmp r0, #1 + 1293 0008 06D9 bls .L81 + 1294 000a 0546 mov r5, r0 +3160:Src/main.c **** { + 1295 .loc 1 3160 2 is_stmt 1 view .LVU418 +3160:Src/main.c **** { + 1296 .loc 1 3160 5 is_stmt 0 view .LVU419 + 1297 000c B0F5805F cmp r0, #4096 + 1298 0010 03D9 bls .L68 + ARM GAS /tmp/ccLSPxIe.s page 158 -2840:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); - 1858 .loc 1 2840 51 discriminator 1 view .LVU601 - 1859 00ae 1346 mov r3, r2 - 1860 00b0 F4E7 b .L107 - 1861 .LVL180: - 1862 .L106: -2841:Src/main.c **** - 1863 .loc 1 2841 2 is_stmt 1 view .LVU602 - 1864 .LBB416: - 1865 .LBI416: -1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 1866 .loc 4 1344 26 view .LVU603 - 1867 .LBB417: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1868 .loc 4 1346 3 view .LVU604 -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1869 .loc 4 1346 21 is_stmt 0 view .LVU605 - 1870 00b2 074B ldr r3, .L113+8 - 1871 00b4 DC68 ldr r4, [r3, #12] - 1872 .LVL181: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1873 .loc 4 1346 10 view .LVU606 - 1874 00b6 A4B2 uxth r4, r4 - 1875 .LVL182: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 1876 .loc 4 1346 10 view .LVU607 - 1877 .LBE417: - 1878 .LBE416: -2843:Src/main.c **** return value; - 1879 .loc 1 2843 2 is_stmt 1 view .LVU608 - 1880 00b8 0122 movs r2, #1 - 1881 00ba 4FF48051 mov r1, #4096 - 1882 00be 0248 ldr r0, .L113 - 1883 00c0 FFF7FEFF bl HAL_GPIO_WritePin - 1884 .LVL183: -2844:Src/main.c **** } - 1885 .loc 1 2844 2 view .LVU609 -2845:Src/main.c **** - 1886 .loc 1 2845 1 is_stmt 0 view .LVU610 - 1887 00c4 2046 mov r0, r4 - 1888 00c6 10BD pop {r4, pc} - 1889 .LVL184: - 1890 .L114: -2845:Src/main.c **** - 1891 .loc 1 2845 1 view .LVU611 - 1892 .align 2 - 1893 .L113: - 1894 00c8 00040240 .word 1073873920 - 1895 00cc 000C0240 .word 1073875968 - 1896 00d0 00380040 .word 1073756160 - 1897 .cfi_endproc - 1898 .LFE1220: - 1900 .section .text.AD9102_CheckFlagsSram,"ax",%progbits - 1901 .align 1 - 1902 .syntax unified - 1903 .thumb - 1904 .thumb_func - ARM GAS /tmp/ccuHnxNu.s page 168 - - - 1906 AD9102_CheckFlagsSram: - 1907 .LVL185: - 1908 .LFB1226: -3141:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); - 1909 .loc 1 3141 1 is_stmt 1 view -0 - 1910 .cfi_startproc - 1911 @ args = 0, pretend = 0, frame = 8 - 1912 @ frame_needed = 0, uses_anonymous_args = 0 -3141:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); - 1913 .loc 1 3141 1 is_stmt 0 view .LVU613 - 1914 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} - 1915 .LCFI16: - 1916 .cfi_def_cfa_offset 36 - 1917 .cfi_offset 4, -36 - 1918 .cfi_offset 5, -32 - 1919 .cfi_offset 6, -28 - 1920 .cfi_offset 7, -24 - 1921 .cfi_offset 8, -20 - 1922 .cfi_offset 9, -16 - 1923 .cfi_offset 10, -12 - 1924 .cfi_offset 11, -8 - 1925 .cfi_offset 14, -4 - 1926 0004 83B0 sub sp, sp, #12 - 1927 .LCFI17: - 1928 .cfi_def_cfa_offset 48 - 1929 0006 8346 mov fp, r0 - 1930 0008 0F46 mov r7, r1 - 1931 000a 1446 mov r4, r2 - 1932 000c 1D46 mov r5, r3 -3142:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1933 .loc 1 3142 2 is_stmt 1 view .LVU614 -3142:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1934 .loc 1 3142 23 is_stmt 0 view .LVU615 - 1935 000e 0020 movs r0, #0 - 1936 .LVL186: -3142:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1937 .loc 1 3142 23 view .LVU616 - 1938 0010 FFF7FEFF bl AD9102_ReadReg - 1939 .LVL187: -3142:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 1940 .loc 1 3142 23 view .LVU617 - 1941 0014 8246 mov r10, r0 - 1942 .LVL188: -3143:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); - 1943 .loc 1 3143 2 is_stmt 1 view .LVU618 -3143:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); - 1944 .loc 1 3143 22 is_stmt 0 view .LVU619 - 1945 0016 0120 movs r0, #1 - 1946 0018 FFF7FEFF bl AD9102_ReadReg - 1947 .LVL189: - 1948 001c 8146 mov r9, r0 - 1949 .LVL190: -3144:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); - 1950 .loc 1 3144 2 is_stmt 1 view .LVU620 -3144:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); - 1951 .loc 1 3144 22 is_stmt 0 view .LVU621 - 1952 001e 0220 movs r0, #2 - ARM GAS /tmp/ccuHnxNu.s page 169 - - - 1953 0020 FFF7FEFF bl AD9102_ReadReg - 1954 .LVL191: - 1955 0024 8046 mov r8, r0 - 1956 .LVL192: -3145:Src/main.c **** - 1957 .loc 1 3145 2 is_stmt 1 view .LVU622 -3145:Src/main.c **** - 1958 .loc 1 3145 21 is_stmt 0 view .LVU623 - 1959 0026 6020 movs r0, #96 - 1960 0028 FFF7FEFF bl AD9102_ReadReg - 1961 .LVL193: -3147:Src/main.c **** { - 1962 .loc 1 3147 2 is_stmt 1 view .LVU624 -3147:Src/main.c **** { - 1963 .loc 1 3147 5 is_stmt 0 view .LVU625 - 1964 002c 1CB1 cbz r4, .L132 -3151:Src/main.c **** { - 1965 .loc 1 3151 2 is_stmt 1 view .LVU626 -3151:Src/main.c **** { - 1966 .loc 1 3151 5 is_stmt 0 view .LVU627 - 1967 002e 012C cmp r4, #1 - 1968 0030 02D8 bhi .L116 -3153:Src/main.c **** } - 1969 .loc 1 3153 11 view .LVU628 - 1970 0032 0224 movs r4, #2 - 1971 .LVL194: -3153:Src/main.c **** } - 1972 .loc 1 3153 11 view .LVU629 - 1973 0034 03E0 b .L117 - 1974 .LVL195: - 1975 .L132: -3149:Src/main.c **** } - 1976 .loc 1 3149 11 view .LVU630 - 1977 0036 1024 movs r4, #16 - 1978 .LVL196: - 1979 .L116: -3155:Src/main.c **** { - 1980 .loc 1 3155 2 is_stmt 1 view .LVU631 -3155:Src/main.c **** { - 1981 .loc 1 3155 5 is_stmt 0 view .LVU632 - 1982 0038 B4F5805F cmp r4, #4096 - 1983 003c 04D8 bhi .L134 - 1984 .LVL197: - 1985 .L117: -3159:Src/main.c **** { - 1986 .loc 1 3159 2 is_stmt 1 view .LVU633 -3159:Src/main.c **** { - 1987 .loc 1 3159 5 is_stmt 0 view .LVU634 - 1988 003e 35B1 cbz r5, .L135 -3163:Src/main.c **** { - 1989 .loc 1 3163 2 is_stmt 1 view .LVU635 -3163:Src/main.c **** { - 1990 .loc 1 3163 5 is_stmt 0 view .LVU636 - 1991 0040 0F2D cmp r5, #15 - 1992 0042 05D9 bls .L118 -3165:Src/main.c **** } - 1993 .loc 1 3165 8 view .LVU637 - ARM GAS /tmp/ccuHnxNu.s page 170 - - - 1994 0044 0F25 movs r5, #15 - 1995 .LVL198: -3165:Src/main.c **** } - 1996 .loc 1 3165 8 view .LVU638 - 1997 0046 03E0 b .L118 - 1998 .LVL199: - 1999 .L134: -3157:Src/main.c **** } - 2000 .loc 1 3157 11 view .LVU639 - 2001 0048 4FF48054 mov r4, #4096 - 2002 .LVL200: -3157:Src/main.c **** } - 2003 .loc 1 3157 11 view .LVU640 - 2004 004c F7E7 b .L117 - 2005 .LVL201: - 2006 .L135: -3161:Src/main.c **** } - 2007 .loc 1 3161 8 view .LVU641 - 2008 004e 0125 movs r5, #1 - 2009 .LVL202: - 2010 .L118: -3168:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 2011 .loc 1 3168 2 is_stmt 1 view .LVU642 -3168:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 2012 .loc 1 3168 63 is_stmt 0 view .LVU643 - 2013 0050 2E02 lsls r6, r5, #8 - 2014 0052 06F47066 and r6, r6, #3840 -3168:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 2015 .loc 1 3168 11 view .LVU644 - 2016 0056 46F01106 orr r6, r6, #17 - 2017 .LVL203: -3171:Src/main.c **** if (pat_period == 0u) - 2018 .loc 1 3171 2 is_stmt 1 view .LVU645 -3171:Src/main.c **** if (pat_period == 0u) - 2019 .loc 1 3171 24 is_stmt 0 view .LVU646 - 2020 005a 0194 str r4, [sp, #4] -3171:Src/main.c **** if (pat_period == 0u) - 2021 .loc 1 3171 44 view .LVU647 - 2022 005c 05F00F05 and r5, r5, #15 - 2023 .LVL204: -3171:Src/main.c **** if (pat_period == 0u) - 2024 .loc 1 3171 11 view .LVU648 - 2025 0060 04FB05F5 mul r5, r4, r5 - 2026 .LVL205: +3162:Src/main.c **** } + 1299 .loc 1 3162 11 view .LVU420 + 1300 0012 4FF48055 mov r5, #4096 + 1301 0016 00E0 b .L68 + 1302 .L81: +3158:Src/main.c **** } + 1303 .loc 1 3158 11 view .LVU421 + 1304 0018 0225 movs r5, #2 + 1305 .L68: + 1306 .LVL103: +3164:Src/main.c **** { + 1307 .loc 1 3164 2 is_stmt 1 view .LVU422 +3164:Src/main.c **** { + 1308 .loc 1 3164 5 is_stmt 0 view .LVU423 + 1309 001a B6F5005F cmp r6, #8192 + 1310 001e 01D3 bcc .L69 +3166:Src/main.c **** } + 1311 .loc 1 3166 13 view .LVU424 + 1312 0020 41F6FF76 movw r6, #8191 + 1313 .L69: + 1314 .LVL104: +3170:Src/main.c **** + 1315 .loc 1 3170 2 is_stmt 1 view .LVU425 + 1316 0024 0421 movs r1, #4 + 1317 .LVL105: +3170:Src/main.c **** + 1318 .loc 1 3170 2 is_stmt 0 view .LVU426 + 1319 0026 1E20 movs r0, #30 + 1320 0028 FFF7FEFF bl AD9102_WriteReg + 1321 .LVL106: 3172:Src/main.c **** { - 2027 .loc 1 3172 2 is_stmt 1 view .LVU649 + 1322 .loc 1 3172 2 is_stmt 1 view .LVU427 + 1323 .LBB392: 3172:Src/main.c **** { - 2028 .loc 1 3172 5 is_stmt 0 view .LVU650 - 2029 0064 1DB1 cbz r5, .L119 -3176:Src/main.c **** { - 2030 .loc 1 3176 2 is_stmt 1 view .LVU651 -3176:Src/main.c **** { - 2031 .loc 1 3176 5 is_stmt 0 view .LVU652 - 2032 0066 B5F5803F cmp r5, #65536 - 2033 006a 4CD2 bcs .L137 - 2034 006c 0195 str r5, [sp, #4] - 2035 .L119: - ARM GAS /tmp/ccuHnxNu.s page 171 + 1324 .loc 1 3172 7 view .LVU428 +3172:Src/main.c **** { + 1325 .loc 1 3172 16 is_stmt 0 view .LVU429 + 1326 002c 0024 movs r4, #0 +3172:Src/main.c **** { + 1327 .loc 1 3172 2 view .LVU430 + 1328 002e 2DE0 b .L70 + 1329 .LVL107: + 1330 .L92: + 1331 .LBB393: + 1332 .LBB394: +3183:Src/main.c **** } + 1333 .loc 1 3183 10 view .LVU431 + 1334 0030 0122 movs r2, #1 + 1335 .LVL108: +3183:Src/main.c **** } + 1336 .loc 1 3183 10 view .LVU432 + 1337 0032 34E0 b .L72 + 1338 .LVL109: + 1339 .L85: + 1340 .LBB395: +3187:Src/main.c **** if (span == 0) + 1341 .loc 1 3187 14 discriminator 2 view .LVU433 + ARM GAS /tmp/ccLSPxIe.s page 159 - 2036 .LVL206: -3181:Src/main.c **** - 2037 .loc 1 3181 2 is_stmt 1 view .LVU653 -3181:Src/main.c **** - 2038 .loc 1 3181 43 is_stmt 0 view .LVU654 - 2039 006e 013C subs r4, r4, #1 - 2040 .LVL207: -3181:Src/main.c **** - 2041 .loc 1 3181 43 view .LVU655 - 2042 0070 A4B2 uxth r4, r4 -3181:Src/main.c **** - 2043 .loc 1 3181 11 view .LVU656 - 2044 0072 2401 lsls r4, r4, #4 - 2045 0074 A4B2 uxth r4, r4 - 2046 .LVL208: -3183:Src/main.c **** - 2047 .loc 1 3183 2 is_stmt 1 view .LVU657 -3185:Src/main.c **** { - 2048 .loc 1 3185 2 view .LVU658 -3185:Src/main.c **** { - 2049 .loc 1 3185 5 is_stmt 0 view .LVU659 - 2050 0076 BAF1000F cmp r10, #0 - 2051 007a 48D1 bne .L138 -3183:Src/main.c **** - 2052 .loc 1 3183 10 view .LVU660 - 2053 007c 0125 movs r5, #1 - 2054 .L120: - 2055 .LVL209: -3189:Src/main.c **** { - 2056 .loc 1 3189 2 is_stmt 1 view .LVU661 -3189:Src/main.c **** { - 2057 .loc 1 3189 5 is_stmt 0 view .LVU662 - 2058 007e 19F4F47F tst r9, #488 - 2059 0082 00D0 beq .L121 -3191:Src/main.c **** } - 2060 .loc 1 3191 6 view .LVU663 - 2061 0084 0025 movs r5, #0 - 2062 .LVL210: - 2063 .L121: -3193:Src/main.c **** { - 2064 .loc 1 3193 2 is_stmt 1 view .LVU664 -3193:Src/main.c **** { - 2065 .loc 1 3193 5 is_stmt 0 view .LVU665 - 2066 0086 18F40E6F tst r8, #2272 - 2067 008a 00D0 beq .L122 -3195:Src/main.c **** } - 2068 .loc 1 3195 6 view .LVU666 - 2069 008c 0025 movs r5, #0 - 2070 .LVL211: - 2071 .L122: -3197:Src/main.c **** { - 2072 .loc 1 3197 2 is_stmt 1 view .LVU667 -3197:Src/main.c **** { - 2073 .loc 1 3197 5 is_stmt 0 view .LVU668 - 2074 008e 10F03F0F tst r0, #63 - 2075 0092 00D0 beq .L123 -3199:Src/main.c **** } - ARM GAS /tmp/ccuHnxNu.s page 172 + 1342 0034 0122 movs r2, #1 + 1343 .LVL110: +3187:Src/main.c **** if (span == 0) + 1344 .loc 1 3187 14 discriminator 2 view .LVU434 + 1345 0036 38E0 b .L74 + 1346 .LVL111: + 1347 .L73: +3187:Src/main.c **** if (span == 0) + 1348 .loc 1 3187 14 discriminator 2 view .LVU435 + 1349 .LBE395: + 1350 .LBB396: +3199:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; + 1351 .loc 1 3199 5 is_stmt 1 view .LVU436 +3199:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; + 1352 .loc 1 3199 14 is_stmt 0 view .LVU437 + 1353 0038 A91A subs r1, r5, r2 + 1354 003a 89B2 uxth r1, r1 + 1355 .LVL112: +3200:Src/main.c **** if (span == 0) + 1356 .loc 1 3200 5 is_stmt 1 view .LVU438 +3200:Src/main.c **** if (span == 0) + 1357 .loc 1 3200 14 is_stmt 0 view .LVU439 + 1358 003c 0129 cmp r1, #1 + 1359 003e 09D9 bls .L86 +3200:Src/main.c **** if (span == 0) + 1360 .loc 1 3200 14 discriminator 1 view .LVU440 + 1361 0040 0139 subs r1, r1, #1 + 1362 .LVL113: +3200:Src/main.c **** if (span == 0) + 1363 .loc 1 3200 14 discriminator 1 view .LVU441 + 1364 0042 89B2 uxth r1, r1 + 1365 .LVL114: + 1366 .L77: +3201:Src/main.c **** { + 1367 .loc 1 3201 5 is_stmt 1 view .LVU442 +3201:Src/main.c **** { + 1368 .loc 1 3201 8 is_stmt 0 view .LVU443 + 1369 0044 ABB1 cbz r3, .L75 +3207:Src/main.c **** } + 1370 .loc 1 3207 6 is_stmt 1 view .LVU444 +3207:Src/main.c **** } + 1371 .loc 1 3207 44 is_stmt 0 view .LVU445 + 1372 0046 A21A subs r2, r4, r2 + 1373 .LVL115: +3207:Src/main.c **** } + 1374 .loc 1 3207 30 view .LVU446 + 1375 0048 03FB02F2 mul r2, r3, r2 +3207:Src/main.c **** } + 1376 .loc 1 3207 53 view .LVU447 + 1377 004c 92FBF1F2 sdiv r2, r2, r1 +3207:Src/main.c **** } + 1378 .loc 1 3207 12 view .LVU448 + 1379 0050 831A subs r3, r0, r2 + 1380 .LVL116: +3207:Src/main.c **** } + 1381 .loc 1 3207 12 view .LVU449 + 1382 0052 0BE0 b .L76 + ARM GAS /tmp/ccLSPxIe.s page 160 - 2076 .loc 1 3199 6 view .LVU669 - 2077 0094 0025 movs r5, #0 - 2078 .LVL212: - 2079 .L123: -3201:Src/main.c **** { - 2080 .loc 1 3201 2 is_stmt 1 view .LVU670 -3201:Src/main.c **** { - 2081 .loc 1 3201 5 is_stmt 0 view .LVU671 - 2082 0096 1FB1 cbz r7, .L124 -3201:Src/main.c **** { - 2083 .loc 1 3201 17 discriminator 1 view .LVU672 - 2084 0098 1BF0010F tst fp, #1 - 2085 009c 00D1 bne .L124 -3203:Src/main.c **** } - 2086 .loc 1 3203 6 view .LVU673 - 2087 009e 0025 movs r5, #0 - 2088 .LVL213: - 2089 .L124: -3206:Src/main.c **** { - 2090 .loc 1 3206 2 is_stmt 1 view .LVU674 -3206:Src/main.c **** { - 2091 .loc 1 3206 6 is_stmt 0 view .LVU675 - 2092 00a0 2720 movs r0, #39 - 2093 .LVL214: -3206:Src/main.c **** { - 2094 .loc 1 3206 6 view .LVU676 - 2095 00a2 FFF7FEFF bl AD9102_ReadReg - 2096 .LVL215: -3206:Src/main.c **** { - 2097 .loc 1 3206 5 discriminator 1 view .LVU677 - 2098 00a6 43F23003 movw r3, #12336 - 2099 00aa 9842 cmp r0, r3 - 2100 00ac 00D0 beq .L125 -3208:Src/main.c **** } - 2101 .loc 1 3208 6 view .LVU678 - 2102 00ae 0025 movs r5, #0 - 2103 .LVL216: - 2104 .L125: -3210:Src/main.c **** { - 2105 .loc 1 3210 2 is_stmt 1 view .LVU679 -3210:Src/main.c **** { - 2106 .loc 1 3210 6 is_stmt 0 view .LVU680 - 2107 00b0 2820 movs r0, #40 - 2108 00b2 FFF7FEFF bl AD9102_ReadReg - 2109 .LVL217: -3210:Src/main.c **** { - 2110 .loc 1 3210 5 discriminator 1 view .LVU681 - 2111 00b6 B042 cmp r0, r6 - 2112 00b8 00D0 beq .L126 -3212:Src/main.c **** } - 2113 .loc 1 3212 6 view .LVU682 - 2114 00ba 0025 movs r5, #0 - 2115 .LVL218: - 2116 .L126: -3214:Src/main.c **** { - 2117 .loc 1 3214 2 is_stmt 1 view .LVU683 -3214:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 173 + 1383 .LVL117: + 1384 .L86: +3200:Src/main.c **** if (span == 0) + 1385 .loc 1 3200 14 discriminator 2 view .LVU450 + 1386 0054 0121 movs r1, #1 + 1387 .LVL118: +3200:Src/main.c **** if (span == 0) + 1388 .loc 1 3200 14 discriminator 2 view .LVU451 + 1389 0056 F5E7 b .L77 + 1390 .LVL119: + 1391 .L71: +3200:Src/main.c **** if (span == 0) + 1392 .loc 1 3200 14 discriminator 2 view .LVU452 + 1393 .LBE396: + 1394 .LBE394: + 1395 .LBB398: +3213:Src/main.c **** if (span == 0) + 1396 .loc 1 3213 4 is_stmt 1 view .LVU453 +3213:Src/main.c **** if (span == 0) + 1397 .loc 1 3213 13 is_stmt 0 view .LVU454 + 1398 0058 012D cmp r5, #1 + 1399 005a 2ED9 bls .L87 +3213:Src/main.c **** if (span == 0) + 1400 .loc 1 3213 13 discriminator 1 view .LVU455 + 1401 005c 6A1E subs r2, r5, #1 + 1402 005e 92B2 uxth r2, r2 + 1403 .L78: + 1404 .LVL120: +3214:Src/main.c **** { + 1405 .loc 1 3214 4 is_stmt 1 view .LVU456 +3214:Src/main.c **** { + 1406 .loc 1 3214 7 is_stmt 0 view .LVU457 + 1407 0060 3BB1 cbz r3, .L75 +3220:Src/main.c **** } + 1408 .loc 1 3220 5 is_stmt 1 view .LVU458 +3220:Src/main.c **** } + 1409 .loc 1 3220 29 is_stmt 0 view .LVU459 + 1410 0062 04FB03F3 mul r3, r4, r3 + 1411 .LVL121: +3220:Src/main.c **** } + 1412 .loc 1 3220 43 view .LVU460 + 1413 0066 93FBF2F3 sdiv r3, r3, r2 + 1414 006a 1B1A subs r3, r3, r0 + 1415 .LVL122: + 1416 .L76: +3220:Src/main.c **** } + 1417 .loc 1 3220 43 view .LVU461 + 1418 .LBE398: +3224:Src/main.c **** { + 1419 .loc 1 3224 3 is_stmt 1 view .LVU462 +3224:Src/main.c **** { + 1420 .loc 1 3224 6 is_stmt 0 view .LVU463 + 1421 006c 13F5005F cmn r3, #8192 + 1422 0070 25DB blt .L88 + 1423 .LVL123: + 1424 .L75: +3228:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 161 - 2118 .loc 1 3214 6 is_stmt 0 view .LVU684 - 2119 00bc 2920 movs r0, #41 - 2120 00be FFF7FEFF bl AD9102_ReadReg - 2121 .LVL219: -3214:Src/main.c **** { - 2122 .loc 1 3214 44 discriminator 1 view .LVU685 - 2123 00c2 BDF80430 ldrh r3, [sp, #4] -3214:Src/main.c **** { - 2124 .loc 1 3214 5 discriminator 1 view .LVU686 - 2125 00c6 9842 cmp r0, r3 - 2126 00c8 00D0 beq .L127 -3216:Src/main.c **** } - 2127 .loc 1 3216 6 view .LVU687 - 2128 00ca 0025 movs r5, #0 - 2129 .LVL220: - 2130 .L127: -3218:Src/main.c **** { - 2131 .loc 1 3218 2 is_stmt 1 view .LVU688 -3218:Src/main.c **** { - 2132 .loc 1 3218 6 is_stmt 0 view .LVU689 - 2133 00cc 1F20 movs r0, #31 - 2134 00ce FFF7FEFF bl AD9102_ReadReg - 2135 .LVL221: -3218:Src/main.c **** { - 2136 .loc 1 3218 5 discriminator 1 view .LVU690 - 2137 00d2 00B1 cbz r0, .L128 -3220:Src/main.c **** } - 2138 .loc 1 3220 6 view .LVU691 - 2139 00d4 0025 movs r5, #0 - 2140 .LVL222: - 2141 .L128: -3222:Src/main.c **** { - 2142 .loc 1 3222 2 is_stmt 1 view .LVU692 -3222:Src/main.c **** { - 2143 .loc 1 3222 6 is_stmt 0 view .LVU693 - 2144 00d6 5D20 movs r0, #93 - 2145 00d8 FFF7FEFF bl AD9102_ReadReg - 2146 .LVL223: -3222:Src/main.c **** { - 2147 .loc 1 3222 5 discriminator 1 view .LVU694 - 2148 00dc 00B1 cbz r0, .L129 -3224:Src/main.c **** } - 2149 .loc 1 3224 6 view .LVU695 - 2150 00de 0025 movs r5, #0 - 2151 .LVL224: - 2152 .L129: -3226:Src/main.c **** { - 2153 .loc 1 3226 2 is_stmt 1 view .LVU696 -3226:Src/main.c **** { - 2154 .loc 1 3226 6 is_stmt 0 view .LVU697 - 2155 00e0 5E20 movs r0, #94 - 2156 00e2 FFF7FEFF bl AD9102_ReadReg - 2157 .LVL225: -3226:Src/main.c **** { - 2158 .loc 1 3226 5 discriminator 1 view .LVU698 - 2159 00e6 A042 cmp r0, r4 - 2160 00e8 00D0 beq .L130 - ARM GAS /tmp/ccuHnxNu.s page 174 + 1425 .loc 1 3228 8 is_stmt 1 view .LVU464 +3228:Src/main.c **** { + 1426 .loc 1 3228 11 is_stmt 0 view .LVU465 + 1427 0072 B3F5005F cmp r3, #8192 + 1428 0076 24DA bge .L89 + 1429 .L79: + 1430 .LVL124: +3233:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); + 1431 .loc 1 3233 3 is_stmt 1 view .LVU466 +3233:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2); + 1432 .loc 1 3233 25 is_stmt 0 view .LVU467 + 1433 0078 99B2 uxth r1, r3 + 1434 .LVL125: +3234:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word); + 1435 .loc 1 3234 3 is_stmt 1 view .LVU468 +3235:Src/main.c **** } + 1436 .loc 1 3235 3 view .LVU469 + 1437 007a 8900 lsls r1, r1, #2 + 1438 .LVL126: +3235:Src/main.c **** } + 1439 .loc 1 3235 3 is_stmt 0 view .LVU470 + 1440 007c 89B2 uxth r1, r1 + 1441 007e 04F5C040 add r0, r4, #24576 + 1442 .LVL127: +3235:Src/main.c **** } + 1443 .loc 1 3235 3 view .LVU471 + 1444 0082 80B2 uxth r0, r0 + 1445 0084 FFF7FEFF bl AD9102_WriteReg + 1446 .LVL128: +3235:Src/main.c **** } + 1447 .loc 1 3235 3 view .LVU472 + 1448 .LBE393: +3172:Src/main.c **** { + 1449 .loc 1 3172 37 is_stmt 1 discriminator 2 view .LVU473 + 1450 0088 0134 adds r4, r4, #1 + 1451 .LVL129: +3172:Src/main.c **** { + 1452 .loc 1 3172 37 is_stmt 0 discriminator 2 view .LVU474 + 1453 008a A4B2 uxth r4, r4 + 1454 .LVL130: + 1455 .L70: +3172:Src/main.c **** { + 1456 .loc 1 3172 25 is_stmt 1 discriminator 1 view .LVU475 + 1457 008c A542 cmp r5, r4 + 1458 008e 1BD9 bls .L91 + 1459 .LBB401: +3174:Src/main.c **** int32_t min_val = -(int32_t)amplitude; + 1460 .loc 1 3174 3 view .LVU476 +3175:Src/main.c **** int32_t max_val = (int32_t)amplitude; + 1461 .loc 1 3175 3 view .LVU477 +3175:Src/main.c **** int32_t max_val = (int32_t)amplitude; + 1462 .loc 1 3175 22 is_stmt 0 view .LVU478 + 1463 0090 3046 mov r0, r6 + 1464 .LVL131: +3176:Src/main.c **** int32_t span = max_val - min_val; + 1465 .loc 1 3176 3 is_stmt 1 view .LVU479 +3177:Src/main.c **** if (triangle) + ARM GAS /tmp/ccLSPxIe.s page 162 -3228:Src/main.c **** } - 2161 .loc 1 3228 6 view .LVU699 - 2162 00ea 0025 movs r5, #0 - 2163 .LVL226: - 2164 .L130: -3230:Src/main.c **** { - 2165 .loc 1 3230 2 is_stmt 1 view .LVU700 -3230:Src/main.c **** { - 2166 .loc 1 3230 6 is_stmt 0 view .LVU701 - 2167 00ec 2B20 movs r0, #43 - 2168 00ee FFF7FEFF bl AD9102_ReadReg - 2169 .LVL227: -3230:Src/main.c **** { - 2170 .loc 1 3230 5 discriminator 1 view .LVU702 - 2171 00f2 40F20113 movw r3, #257 - 2172 00f6 9842 cmp r0, r3 - 2173 00f8 00D0 beq .L131 -3232:Src/main.c **** } - 2174 .loc 1 3232 6 view .LVU703 - 2175 00fa 0025 movs r5, #0 - 2176 .LVL228: - 2177 .L131: -3235:Src/main.c **** } - 2178 .loc 1 3235 2 is_stmt 1 view .LVU704 -3236:Src/main.c **** - 2179 .loc 1 3236 1 is_stmt 0 view .LVU705 - 2180 00fc 85F00100 eor r0, r5, #1 - 2181 0100 03B0 add sp, sp, #12 - 2182 .LCFI18: - 2183 .cfi_remember_state - 2184 .cfi_def_cfa_offset 36 - 2185 @ sp needed - 2186 0102 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} - 2187 .LVL229: - 2188 .L137: - 2189 .LCFI19: - 2190 .cfi_restore_state -3178:Src/main.c **** } - 2191 .loc 1 3178 14 view .LVU706 - 2192 0106 4FF6FF73 movw r3, #65535 - 2193 010a 0193 str r3, [sp, #4] - 2194 010c AFE7 b .L119 - 2195 .LVL230: - 2196 .L138: -3187:Src/main.c **** } - 2197 .loc 1 3187 6 view .LVU707 - 2198 010e 0025 movs r5, #0 - 2199 0110 B5E7 b .L120 - 2200 .cfi_endproc - 2201 .LFE1226: - 2203 .section .text.AD9102_CheckFlags,"ax",%progbits - 2204 .align 1 - 2205 .syntax unified - 2206 .thumb - 2207 .thumb_func - 2209 AD9102_CheckFlags: - 2210 .LVL231: - ARM GAS /tmp/ccuHnxNu.s page 175 + 1466 .loc 1 3177 3 view .LVU480 +3177:Src/main.c **** if (triangle) + 1467 .loc 1 3177 11 is_stmt 0 view .LVU481 + 1468 0092 7300 lsls r3, r6, #1 + 1469 .LVL132: +3178:Src/main.c **** { + 1470 .loc 1 3178 3 is_stmt 1 view .LVU482 +3178:Src/main.c **** { + 1471 .loc 1 3178 6 is_stmt 0 view .LVU483 + 1472 0094 002F cmp r7, #0 + 1473 0096 DFD0 beq .L71 + 1474 .LBB399: +3180:Src/main.c **** if (half == 0u) + 1475 .loc 1 3180 4 is_stmt 1 view .LVU484 +3180:Src/main.c **** if (half == 0u) + 1476 .loc 1 3180 13 is_stmt 0 view .LVU485 + 1477 0098 6A08 lsrs r2, r5, #1 + 1478 .LVL133: +3181:Src/main.c **** { + 1479 .loc 1 3181 4 is_stmt 1 view .LVU486 +3181:Src/main.c **** { + 1480 .loc 1 3181 7 is_stmt 0 view .LVU487 + 1481 009a 012D cmp r5, #1 + 1482 009c C8D9 bls .L92 + 1483 .LVL134: + 1484 .L72: +3185:Src/main.c **** { + 1485 .loc 1 3185 4 is_stmt 1 view .LVU488 +3185:Src/main.c **** { + 1486 .loc 1 3185 7 is_stmt 0 view .LVU489 + 1487 009e 9442 cmp r4, r2 + 1488 00a0 CAD2 bcs .L73 + 1489 .LBB397: +3187:Src/main.c **** if (span == 0) + 1490 .loc 1 3187 5 is_stmt 1 view .LVU490 +3187:Src/main.c **** if (span == 0) + 1491 .loc 1 3187 14 is_stmt 0 view .LVU491 + 1492 00a2 012A cmp r2, #1 + 1493 00a4 C6D9 bls .L85 +3187:Src/main.c **** if (span == 0) + 1494 .loc 1 3187 14 discriminator 1 view .LVU492 + 1495 00a6 013A subs r2, r2, #1 + 1496 .LVL135: +3187:Src/main.c **** if (span == 0) + 1497 .loc 1 3187 14 discriminator 1 view .LVU493 + 1498 00a8 92B2 uxth r2, r2 + 1499 .LVL136: + 1500 .L74: +3188:Src/main.c **** { + 1501 .loc 1 3188 5 is_stmt 1 view .LVU494 +3188:Src/main.c **** { + 1502 .loc 1 3188 8 is_stmt 0 view .LVU495 + 1503 00aa 002B cmp r3, #0 + 1504 00ac E1D0 beq .L75 +3194:Src/main.c **** } + 1505 .loc 1 3194 6 is_stmt 1 view .LVU496 +3194:Src/main.c **** } + ARM GAS /tmp/ccLSPxIe.s page 163 - 2211 .LFB1225: -3061:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); - 2212 .loc 1 3061 1 is_stmt 1 view -0 - 2213 .cfi_startproc - 2214 @ args = 8, pretend = 0, frame = 8 - 2215 @ frame_needed = 0, uses_anonymous_args = 0 -3061:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); - 2216 .loc 1 3061 1 is_stmt 0 view .LVU709 - 2217 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} - 2218 .LCFI20: - 2219 .cfi_def_cfa_offset 36 - 2220 .cfi_offset 4, -36 - 2221 .cfi_offset 5, -32 - 2222 .cfi_offset 6, -28 - 2223 .cfi_offset 7, -24 - 2224 .cfi_offset 8, -20 - 2225 .cfi_offset 9, -16 - 2226 .cfi_offset 10, -12 - 2227 .cfi_offset 11, -8 - 2228 .cfi_offset 14, -4 - 2229 0004 83B0 sub sp, sp, #12 - 2230 .LCFI21: - 2231 .cfi_def_cfa_offset 48 - 2232 0006 0190 str r0, [sp, #4] - 2233 0008 0F46 mov r7, r1 - 2234 000a 1546 mov r5, r2 - 2235 000c 1C46 mov r4, r3 - 2236 000e BDF834B0 ldrh fp, [sp, #52] -3062:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 2237 .loc 1 3062 2 is_stmt 1 view .LVU710 -3062:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 2238 .loc 1 3062 23 is_stmt 0 view .LVU711 - 2239 0012 0020 movs r0, #0 - 2240 .LVL232: -3062:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 2241 .loc 1 3062 23 view .LVU712 - 2242 0014 FFF7FEFF bl AD9102_ReadReg - 2243 .LVL233: -3062:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); - 2244 .loc 1 3062 23 view .LVU713 - 2245 0018 8246 mov r10, r0 - 2246 .LVL234: -3063:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); - 2247 .loc 1 3063 2 is_stmt 1 view .LVU714 -3063:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); - 2248 .loc 1 3063 22 is_stmt 0 view .LVU715 - 2249 001a 0120 movs r0, #1 - 2250 001c FFF7FEFF bl AD9102_ReadReg - 2251 .LVL235: - 2252 0020 8146 mov r9, r0 - 2253 .LVL236: -3064:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); - 2254 .loc 1 3064 2 is_stmt 1 view .LVU716 -3064:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); - 2255 .loc 1 3064 22 is_stmt 0 view .LVU717 - 2256 0022 0220 movs r0, #2 - 2257 0024 FFF7FEFF bl AD9102_ReadReg - ARM GAS /tmp/ccuHnxNu.s page 176 + 1506 .loc 1 3194 30 is_stmt 0 view .LVU497 + 1507 00ae 04FB03F3 mul r3, r4, r3 + 1508 .LVL137: +3194:Src/main.c **** } + 1509 .loc 1 3194 44 view .LVU498 + 1510 00b2 93FBF2F3 sdiv r3, r3, r2 + 1511 00b6 1B1A subs r3, r3, r0 + 1512 .LVL138: +3194:Src/main.c **** } + 1513 .loc 1 3194 44 view .LVU499 + 1514 00b8 D8E7 b .L76 + 1515 .LVL139: + 1516 .L87: +3194:Src/main.c **** } + 1517 .loc 1 3194 44 view .LVU500 + 1518 .LBE397: + 1519 .LBE399: + 1520 .LBB400: +3213:Src/main.c **** if (span == 0) + 1521 .loc 1 3213 13 discriminator 2 view .LVU501 + 1522 00ba 0122 movs r2, #1 + 1523 00bc D0E7 b .L78 + 1524 .LVL140: + 1525 .L88: +3213:Src/main.c **** if (span == 0) + 1526 .loc 1 3213 13 discriminator 2 view .LVU502 + 1527 .LBE400: +3226:Src/main.c **** } + 1528 .loc 1 3226 10 view .LVU503 + 1529 00be 054B ldr r3, .L93 + 1530 .LVL141: +3226:Src/main.c **** } + 1531 .loc 1 3226 10 view .LVU504 + 1532 00c0 DAE7 b .L79 + 1533 .LVL142: + 1534 .L89: +3230:Src/main.c **** } + 1535 .loc 1 3230 10 view .LVU505 + 1536 00c2 41F6FF73 movw r3, #8191 + 1537 00c6 D7E7 b .L79 + 1538 .LVL143: + 1539 .L91: +3230:Src/main.c **** } + 1540 .loc 1 3230 10 view .LVU506 + 1541 .LBE401: + 1542 .LBE392: +3239:Src/main.c **** } + 1543 .loc 1 3239 2 is_stmt 1 view .LVU507 + 1544 00c8 0021 movs r1, #0 + 1545 00ca 1E20 movs r0, #30 + 1546 00cc FFF7FEFF bl AD9102_WriteReg + 1547 .LVL144: +3240:Src/main.c **** + 1548 .loc 1 3240 1 is_stmt 0 view .LVU508 + 1549 00d0 F8BD pop {r3, r4, r5, r6, r7, pc} + 1550 .LVL145: + 1551 .L94: + ARM GAS /tmp/ccLSPxIe.s page 164 - 2258 .LVL237: - 2259 0028 8046 mov r8, r0 - 2260 .LVL238: -3065:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | - 2261 .loc 1 3065 2 is_stmt 1 view .LVU718 -3065:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | - 2262 .loc 1 3065 21 is_stmt 0 view .LVU719 - 2263 002a 6020 movs r0, #96 - 2264 002c FFF7FEFF bl AD9102_ReadReg - 2265 .LVL239: -3066:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 2266 .loc 1 3066 2 is_stmt 1 view .LVU720 -3067:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); - 2267 .loc 1 3067 57 is_stmt 0 view .LVU721 - 2268 0030 9DF83030 ldrb r3, [sp, #48] @ zero_extendqisi2 - 2269 0034 1B01 lsls r3, r3, #4 - 2270 0036 03F0F003 and r3, r3, #240 -3066:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 2271 .loc 1 3066 11 view .LVU722 - 2272 003a 40F20116 movw r6, #257 - 2273 003e 1E43 orrs r6, r6, r3 - 2274 .LVL240: -3070:Src/main.c **** { - 2275 .loc 1 3070 2 is_stmt 1 view .LVU723 -3070:Src/main.c **** { - 2276 .loc 1 3070 5 is_stmt 0 view .LVU724 - 2277 0040 1CB1 cbz r4, .L164 -3074:Src/main.c **** { - 2278 .loc 1 3074 2 is_stmt 1 view .LVU725 -3074:Src/main.c **** { - 2279 .loc 1 3074 5 is_stmt 0 view .LVU726 - 2280 0042 3F2C cmp r4, #63 - 2281 0044 02D9 bls .L152 -3076:Src/main.c **** } - 2282 .loc 1 3076 12 view .LVU727 - 2283 0046 3F24 movs r4, #63 - 2284 .LVL241: -3076:Src/main.c **** } - 2285 .loc 1 3076 12 view .LVU728 - 2286 0048 00E0 b .L152 - 2287 .LVL242: - 2288 .L164: -3072:Src/main.c **** } - 2289 .loc 1 3072 12 view .LVU729 - 2290 004a 0124 movs r4, #1 - 2291 .LVL243: - 2292 .L152: -3078:Src/main.c **** { - 2293 .loc 1 3078 2 is_stmt 1 view .LVU730 -3078:Src/main.c **** { - 2294 .loc 1 3078 5 is_stmt 0 view .LVU731 - 2295 004c BBF1000F cmp fp, #0 - 2296 0050 01D1 bne .L153 -3080:Src/main.c **** } - 2297 .loc 1 3080 14 view .LVU732 - 2298 0052 4FF6FF7B movw fp, #65535 - 2299 .L153: - ARM GAS /tmp/ccuHnxNu.s page 177 +3240:Src/main.c **** + 1552 .loc 1 3240 1 view .LVU509 + 1553 00d2 00BF .align 2 + 1554 .L93: + 1555 00d4 00E0FFFF .word -8192 + 1556 .cfi_endproc + 1557 .LFE1231: + 1559 .section .text.AD9102_WriteWaveUploadChunk,"ax",%progbits + 1560 .align 1 + 1561 .syntax unified + 1562 .thumb + 1563 .thumb_func + 1565 AD9102_WriteWaveUploadChunk: + 1566 .LVL146: + 1567 .LFB1227: +3039:Src/main.c **** if (ad9102_wave_upload_active == 0u) + 1568 .loc 1 3039 1 is_stmt 1 view -0 + 1569 .cfi_startproc + 1570 @ args = 0, pretend = 0, frame = 0 + 1571 @ frame_needed = 0, uses_anonymous_args = 0 +3039:Src/main.c **** if (ad9102_wave_upload_active == 0u) + 1572 .loc 1 3039 1 is_stmt 0 view .LVU511 + 1573 0000 70B5 push {r4, r5, r6, lr} + 1574 .LCFI12: + 1575 .cfi_def_cfa_offset 16 + 1576 .cfi_offset 4, -16 + 1577 .cfi_offset 5, -12 + 1578 .cfi_offset 6, -8 + 1579 .cfi_offset 14, -4 + 1580 0002 0646 mov r6, r0 +3040:Src/main.c **** { + 1581 .loc 1 3040 2 is_stmt 1 view .LVU512 +3040:Src/main.c **** { + 1582 .loc 1 3040 32 is_stmt 0 view .LVU513 + 1583 0004 194B ldr r3, .L104 + 1584 0006 1878 ldrb r0, [r3] @ zero_extendqisi2 + 1585 .LVL147: +3040:Src/main.c **** { + 1586 .loc 1 3040 5 view .LVU514 + 1587 0008 58B3 cbz r0, .L96 + 1588 000a 0D46 mov r5, r1 +3044:Src/main.c **** { + 1589 .loc 1 3044 2 is_stmt 1 view .LVU515 +3044:Src/main.c **** { + 1590 .loc 1 3044 26 is_stmt 0 view .LVU516 + 1591 000c 4B1E subs r3, r1, #1 + 1592 000e 9BB2 uxth r3, r3 +3044:Src/main.c **** { + 1593 .loc 1 3044 5 view .LVU517 + 1594 0010 0B2B cmp r3, #11 + 1595 0012 25D8 bhi .L99 +3048:Src/main.c **** { + 1596 .loc 1 3048 2 is_stmt 1 view .LVU518 +3048:Src/main.c **** { + 1597 .loc 1 3048 7 is_stmt 0 view .LVU519 + 1598 0014 164B ldr r3, .L104+4 + 1599 0016 1B88 ldrh r3, [r3] + ARM GAS /tmp/ccLSPxIe.s page 165 - 2300 .LVL244: -3082:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2301 .loc 1 3082 2 is_stmt 1 view .LVU733 -3083:Src/main.c **** - 2302 .loc 1 3083 35 is_stmt 0 view .LVU734 - 2303 0056 05F00305 and r5, r5, #3 - 2304 .LVL245: -3082:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2305 .loc 1 3082 71 view .LVU735 - 2306 005a A400 lsls r4, r4, #2 - 2307 .LVL246: -3082:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2308 .loc 1 3082 71 view .LVU736 - 2309 005c E4B2 uxtb r4, r4 -3082:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2310 .loc 1 3082 11 view .LVU737 - 2311 005e 2543 orrs r5, r5, r4 - 2312 .LVL247: -3085:Src/main.c **** - 2313 .loc 1 3085 2 is_stmt 1 view .LVU738 -3088:Src/main.c **** { - 2314 .loc 1 3088 2 view .LVU739 -3088:Src/main.c **** { - 2315 .loc 1 3088 5 is_stmt 0 view .LVU740 - 2316 0060 BAF1000F cmp r10, #0 - 2317 0064 36D1 bne .L167 -3085:Src/main.c **** - 2318 .loc 1 3085 10 view .LVU741 - 2319 0066 0124 movs r4, #1 - 2320 .L154: - 2321 .LVL248: -3094:Src/main.c **** { - 2322 .loc 1 3094 2 is_stmt 1 view .LVU742 -3094:Src/main.c **** { - 2323 .loc 1 3094 5 is_stmt 0 view .LVU743 - 2324 0068 19F4F47F tst r9, #488 - 2325 006c 00D0 beq .L155 -3096:Src/main.c **** } - 2326 .loc 1 3096 6 view .LVU744 - 2327 006e 0024 movs r4, #0 - 2328 .LVL249: - 2329 .L155: -3100:Src/main.c **** { - 2330 .loc 1 3100 2 is_stmt 1 view .LVU745 -3100:Src/main.c **** { - 2331 .loc 1 3100 5 is_stmt 0 view .LVU746 - 2332 0070 18F40E6F tst r8, #2272 - 2333 0074 00D0 beq .L156 -3102:Src/main.c **** } - 2334 .loc 1 3102 6 view .LVU747 - 2335 0076 0024 movs r4, #0 - 2336 .LVL250: - 2337 .L156: -3106:Src/main.c **** { - 2338 .loc 1 3106 2 is_stmt 1 view .LVU748 -3106:Src/main.c **** { - 2339 .loc 1 3106 5 is_stmt 0 view .LVU749 - ARM GAS /tmp/ccuHnxNu.s page 178 +3048:Src/main.c **** { + 1600 .loc 1 3048 45 view .LVU520 + 1601 0018 0B44 add r3, r3, r1 +3048:Src/main.c **** { + 1602 .loc 1 3048 72 view .LVU521 + 1603 001a 164A ldr r2, .L104+8 + 1604 001c 1288 ldrh r2, [r2] +3048:Src/main.c **** { + 1605 .loc 1 3048 5 view .LVU522 + 1606 001e 9342 cmp r3, r2 + 1607 0020 20D8 bhi .L100 + 1608 .LBB402: +3053:Src/main.c **** { + 1609 .loc 1 3053 16 view .LVU523 + 1610 0022 0024 movs r4, #0 + 1611 .LVL148: + 1612 .L97: +3053:Src/main.c **** { + 1613 .loc 1 3053 25 is_stmt 1 discriminator 1 view .LVU524 + 1614 0024 AC42 cmp r4, r5 + 1615 0026 15D2 bcs .L103 + 1616 .LBB403: +3055:Src/main.c **** uint16_t sample_u14; + 1617 .loc 1 3055 3 view .LVU525 +3055:Src/main.c **** uint16_t sample_u14; + 1618 .loc 1 3055 36 is_stmt 0 view .LVU526 + 1619 0028 36F81430 ldrh r3, [r6, r4, lsl #1] + 1620 .LVL149: +3056:Src/main.c **** uint16_t word; + 1621 .loc 1 3056 3 is_stmt 1 view .LVU527 +3057:Src/main.c **** + 1622 .loc 1 3057 3 view .LVU528 +3059:Src/main.c **** { + 1623 .loc 1 3059 3 view .LVU529 +3059:Src/main.c **** { + 1624 .loc 1 3059 39 is_stmt 0 view .LVU530 + 1625 002c 03F50052 add r2, r3, #8192 + 1626 0030 92B2 uxth r2, r2 +3059:Src/main.c **** { + 1627 .loc 1 3059 6 view .LVU531 + 1628 0032 B2F5804F cmp r2, #16384 + 1629 0036 17D2 bcs .L101 +3064:Src/main.c **** word = (uint16_t)(sample_u14 << 2); + 1630 .loc 1 3064 3 is_stmt 1 view .LVU532 + 1631 .LVL150: +3065:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + ad9102_wave_written_samples + i), word); + 1632 .loc 1 3065 3 view .LVU533 +3066:Src/main.c **** } + 1633 .loc 1 3066 3 view .LVU534 +3066:Src/main.c **** } + 1634 .loc 1 3066 86 is_stmt 0 view .LVU535 + 1635 0038 0D4A ldr r2, .L104+4 + 1636 003a 1088 ldrh r0, [r2] + 1637 003c 2044 add r0, r0, r4 + 1638 003e 80B2 uxth r0, r0 +3066:Src/main.c **** } + 1639 .loc 1 3066 3 view .LVU536 + ARM GAS /tmp/ccLSPxIe.s page 166 - 2340 0078 10F03F0F tst r0, #63 - 2341 007c 00D0 beq .L157 -3108:Src/main.c **** } - 2342 .loc 1 3108 6 view .LVU750 - 2343 007e 0024 movs r4, #0 - 2344 .LVL251: - 2345 .L157: -3111:Src/main.c **** { - 2346 .loc 1 3111 2 is_stmt 1 view .LVU751 -3111:Src/main.c **** { - 2347 .loc 1 3111 5 is_stmt 0 view .LVU752 - 2348 0080 27B1 cbz r7, .L158 -3111:Src/main.c **** { - 2349 .loc 1 3111 17 discriminator 1 view .LVU753 - 2350 0082 019B ldr r3, [sp, #4] - 2351 0084 13F0010F tst r3, #1 - 2352 0088 00D1 bne .L158 -3113:Src/main.c **** } - 2353 .loc 1 3113 6 view .LVU754 - 2354 008a 0024 movs r4, #0 - 2355 .LVL252: - 2356 .L158: -3116:Src/main.c **** { - 2357 .loc 1 3116 2 is_stmt 1 view .LVU755 -3116:Src/main.c **** { - 2358 .loc 1 3116 6 is_stmt 0 view .LVU756 - 2359 008c 2720 movs r0, #39 - 2360 .LVL253: -3116:Src/main.c **** { - 2361 .loc 1 3116 6 view .LVU757 - 2362 008e FFF7FEFF bl AD9102_ReadReg - 2363 .LVL254: -3116:Src/main.c **** { - 2364 .loc 1 3116 5 discriminator 1 view .LVU758 - 2365 0092 43F21223 movw r3, #12818 - 2366 0096 9842 cmp r0, r3 - 2367 0098 00D0 beq .L159 -3118:Src/main.c **** } - 2368 .loc 1 3118 6 view .LVU759 - 2369 009a 0024 movs r4, #0 - 2370 .LVL255: - 2371 .L159: -3120:Src/main.c **** { - 2372 .loc 1 3120 2 is_stmt 1 view .LVU760 -3120:Src/main.c **** { - 2373 .loc 1 3120 6 is_stmt 0 view .LVU761 - 2374 009c 2820 movs r0, #40 - 2375 009e FFF7FEFF bl AD9102_ReadReg - 2376 .LVL256: -3120:Src/main.c **** { - 2377 .loc 1 3120 5 discriminator 1 view .LVU762 - 2378 00a2 B042 cmp r0, r6 - 2379 00a4 00D0 beq .L160 -3122:Src/main.c **** } - 2380 .loc 1 3122 6 view .LVU763 - 2381 00a6 0024 movs r4, #0 - 2382 .LVL257: - ARM GAS /tmp/ccuHnxNu.s page 179 + 1640 0040 9900 lsls r1, r3, #2 + 1641 0042 89B2 uxth r1, r1 + 1642 0044 00F5C040 add r0, r0, #24576 + 1643 0048 80B2 uxth r0, r0 + 1644 004a FFF7FEFF bl AD9102_WriteReg + 1645 .LVL151: +3066:Src/main.c **** } + 1646 .loc 1 3066 3 view .LVU537 + 1647 .LBE403: +3053:Src/main.c **** { + 1648 .loc 1 3053 41 is_stmt 1 discriminator 2 view .LVU538 + 1649 004e 0134 adds r4, r4, #1 + 1650 .LVL152: +3053:Src/main.c **** { + 1651 .loc 1 3053 41 is_stmt 0 discriminator 2 view .LVU539 + 1652 0050 A4B2 uxth r4, r4 + 1653 .LVL153: +3053:Src/main.c **** { + 1654 .loc 1 3053 41 discriminator 2 view .LVU540 + 1655 0052 E7E7 b .L97 + 1656 .LVL154: + 1657 .L103: +3053:Src/main.c **** { + 1658 .loc 1 3053 41 discriminator 2 view .LVU541 + 1659 .LBE402: +3069:Src/main.c **** return 1u; + 1660 .loc 1 3069 2 is_stmt 1 view .LVU542 +3069:Src/main.c **** return 1u; + 1661 .loc 1 3069 32 is_stmt 0 view .LVU543 + 1662 0054 064B ldr r3, .L104+4 + 1663 0056 1A88 ldrh r2, [r3] + 1664 0058 1544 add r5, r5, r2 + 1665 .LVL155: +3069:Src/main.c **** return 1u; + 1666 .loc 1 3069 30 view .LVU544 + 1667 005a 1D80 strh r5, [r3] @ movhi +3070:Src/main.c **** } + 1668 .loc 1 3070 2 is_stmt 1 view .LVU545 +3070:Src/main.c **** } + 1669 .loc 1 3070 9 is_stmt 0 view .LVU546 + 1670 005c 0120 movs r0, #1 + 1671 005e 00E0 b .L96 + 1672 .LVL156: + 1673 .L99: +3046:Src/main.c **** } + 1674 .loc 1 3046 10 view .LVU547 + 1675 0060 0020 movs r0, #0 + 1676 .LVL157: + 1677 .L96: +3071:Src/main.c **** + 1678 .loc 1 3071 1 view .LVU548 + 1679 0062 70BD pop {r4, r5, r6, pc} + 1680 .LVL158: + 1681 .L100: +3050:Src/main.c **** } + 1682 .loc 1 3050 10 view .LVU549 + 1683 0064 0020 movs r0, #0 + ARM GAS /tmp/ccLSPxIe.s page 167 - 2383 .L160: -3124:Src/main.c **** { - 2384 .loc 1 3124 2 is_stmt 1 view .LVU764 -3124:Src/main.c **** { - 2385 .loc 1 3124 6 is_stmt 0 view .LVU765 - 2386 00a8 2920 movs r0, #41 - 2387 00aa FFF7FEFF bl AD9102_ReadReg - 2388 .LVL258: -3124:Src/main.c **** { - 2389 .loc 1 3124 5 discriminator 1 view .LVU766 - 2390 00ae 5845 cmp r0, fp - 2391 00b0 00D0 beq .L161 -3126:Src/main.c **** } - 2392 .loc 1 3126 6 view .LVU767 - 2393 00b2 0024 movs r4, #0 - 2394 .LVL259: - 2395 .L161: -3128:Src/main.c **** { - 2396 .loc 1 3128 2 is_stmt 1 view .LVU768 -3128:Src/main.c **** { - 2397 .loc 1 3128 6 is_stmt 0 view .LVU769 - 2398 00b4 1F20 movs r0, #31 - 2399 00b6 FFF7FEFF bl AD9102_ReadReg - 2400 .LVL260: -3128:Src/main.c **** { - 2401 .loc 1 3128 5 discriminator 1 view .LVU770 - 2402 00ba 00B1 cbz r0, .L162 -3130:Src/main.c **** } - 2403 .loc 1 3130 6 view .LVU771 - 2404 00bc 0024 movs r4, #0 - 2405 .LVL261: - 2406 .L162: -3132:Src/main.c **** { - 2407 .loc 1 3132 2 is_stmt 1 view .LVU772 -3132:Src/main.c **** { - 2408 .loc 1 3132 6 is_stmt 0 view .LVU773 - 2409 00be 3720 movs r0, #55 - 2410 00c0 FFF7FEFF bl AD9102_ReadReg - 2411 .LVL262: -3132:Src/main.c **** { - 2412 .loc 1 3132 5 discriminator 1 view .LVU774 - 2413 00c4 A842 cmp r0, r5 - 2414 00c6 00D0 beq .L163 -3134:Src/main.c **** } - 2415 .loc 1 3134 6 view .LVU775 - 2416 00c8 0024 movs r4, #0 - 2417 .LVL263: - 2418 .L163: -3137:Src/main.c **** } - 2419 .loc 1 3137 2 is_stmt 1 view .LVU776 -3138:Src/main.c **** - 2420 .loc 1 3138 1 is_stmt 0 view .LVU777 - 2421 00ca 84F00100 eor r0, r4, #1 - 2422 00ce 03B0 add sp, sp, #12 - 2423 .LCFI22: - 2424 .cfi_remember_state - 2425 .cfi_def_cfa_offset 36 - ARM GAS /tmp/ccuHnxNu.s page 180 + 1684 0066 FCE7 b .L96 + 1685 .LVL159: + 1686 .L101: + 1687 .LBB405: + 1688 .LBB404: +3061:Src/main.c **** } + 1689 .loc 1 3061 11 view .LVU550 + 1690 0068 0020 movs r0, #0 + 1691 006a FAE7 b .L96 + 1692 .L105: + 1693 .align 2 + 1694 .L104: + 1695 006c 00000000 .word ad9102_wave_upload_active + 1696 0070 00000000 .word ad9102_wave_written_samples + 1697 0074 00000000 .word ad9102_wave_expected_samples + 1698 .LBE404: + 1699 .LBE405: + 1700 .cfi_endproc + 1701 .LFE1227: + 1703 .section .text.AD9102_Init,"ax",%progbits + 1704 .align 1 + 1705 .syntax unified + 1706 .thumb + 1707 .thumb_func + 1709 AD9102_Init: + 1710 .LFB1212: +2740:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + 1711 .loc 1 2740 1 is_stmt 1 view -0 + 1712 .cfi_startproc + 1713 @ args = 0, pretend = 0, frame = 8 + 1714 @ frame_needed = 0, uses_anonymous_args = 0 + 1715 0000 00B5 push {lr} + 1716 .LCFI13: + 1717 .cfi_def_cfa_offset 4 + 1718 .cfi_offset 14, -4 + 1719 0002 83B0 sub sp, sp, #12 + 1720 .LCFI14: + 1721 .cfi_def_cfa_offset 16 +2741:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); + 1722 .loc 1 2741 2 view .LVU552 + 1723 0004 0122 movs r2, #1 + 1724 0006 4FF48051 mov r1, #4096 + 1725 000a 1648 ldr r0, .L110 + 1726 000c FFF7FEFF bl HAL_GPIO_WritePin + 1727 .LVL160: +2742:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + 1728 .loc 1 2742 2 view .LVU553 + 1729 0010 0022 movs r2, #0 + 1730 0012 4021 movs r1, #64 + 1731 0014 1448 ldr r0, .L110+4 + 1732 0016 FFF7FEFF bl HAL_GPIO_WritePin + 1733 .LVL161: +2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1734 .loc 1 2743 2 view .LVU554 + 1735 .LBB406: +2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1736 .loc 1 2743 7 view .LVU555 + ARM GAS /tmp/ccLSPxIe.s page 168 - 2426 @ sp needed - 2427 00d0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} - 2428 .LVL264: - 2429 .L167: - 2430 .LCFI23: - 2431 .cfi_restore_state -3090:Src/main.c **** } - 2432 .loc 1 3090 6 view .LVU778 - 2433 00d4 0024 movs r4, #0 - 2434 00d6 C7E7 b .L154 - 2435 .cfi_endproc - 2436 .LFE1225: - 2438 .section .text.AD9102_ApplySram,"ax",%progbits - 2439 .align 1 - 2440 .syntax unified - 2441 .thumb - 2442 .thumb_func - 2444 AD9102_ApplySram: - 2445 .LVL265: - 2446 .LFB1224: -2988:Src/main.c **** if (samples == 0u) - 2447 .loc 1 2988 1 is_stmt 1 view -0 - 2448 .cfi_startproc - 2449 @ args = 4, pretend = 0, frame = 8 - 2450 @ frame_needed = 0, uses_anonymous_args = 0 -2988:Src/main.c **** if (samples == 0u) - 2451 .loc 1 2988 1 is_stmt 0 view .LVU780 - 2452 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} - 2453 .LCFI24: - 2454 .cfi_def_cfa_offset 28 - 2455 .cfi_offset 4, -28 - 2456 .cfi_offset 5, -24 - 2457 .cfi_offset 6, -20 - 2458 .cfi_offset 7, -16 - 2459 .cfi_offset 8, -12 - 2460 .cfi_offset 9, -8 - 2461 .cfi_offset 14, -4 - 2462 0004 83B0 sub sp, sp, #12 - 2463 .LCFI25: - 2464 .cfi_def_cfa_offset 40 - 2465 0006 0646 mov r6, r0 - 2466 0008 1F46 mov r7, r3 - 2467 000a BDF82880 ldrh r8, [sp, #40] -2989:Src/main.c **** { - 2468 .loc 1 2989 2 is_stmt 1 view .LVU781 -2989:Src/main.c **** { - 2469 .loc 1 2989 5 is_stmt 0 view .LVU782 - 2470 000e 21B1 cbz r1, .L188 - 2471 0010 0C46 mov r4, r1 -2993:Src/main.c **** { - 2472 .loc 1 2993 2 is_stmt 1 view .LVU783 -2993:Src/main.c **** { - 2473 .loc 1 2993 5 is_stmt 0 view .LVU784 - 2474 0012 0129 cmp r1, #1 - 2475 0014 02D8 bhi .L179 -2995:Src/main.c **** } - 2476 .loc 1 2995 11 view .LVU785 - ARM GAS /tmp/ccuHnxNu.s page 181 +2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1737 .loc 1 2743 25 is_stmt 0 view .LVU556 + 1738 001a 0023 movs r3, #0 + 1739 001c 0193 str r3, [sp, #4] +2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1740 .loc 1 2743 2 view .LVU557 + 1741 001e 02E0 b .L107 + 1742 .L108: +2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1743 .loc 1 2743 48 is_stmt 1 discriminator 3 view .LVU558 +2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1744 .loc 1 2743 43 discriminator 3 view .LVU559 + 1745 0020 019B ldr r3, [sp, #4] + 1746 0022 0133 adds r3, r3, #1 + 1747 0024 0193 str r3, [sp, #4] + 1748 .L107: +2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); + 1749 .loc 1 2743 34 discriminator 1 view .LVU560 + 1750 0026 019B ldr r3, [sp, #4] + 1751 0028 B3F57A7F cmp r3, #1000 + 1752 002c F8D3 bcc .L108 + 1753 .LBE406: +2744:Src/main.c **** + 1754 .loc 1 2744 2 view .LVU561 + 1755 002e 0122 movs r2, #1 + 1756 0030 4021 movs r1, #64 + 1757 0032 0D48 ldr r0, .L110+4 + 1758 0034 FFF7FEFF bl HAL_GPIO_WritePin + 1759 .LVL162: +2746:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + 1760 .loc 1 2746 2 view .LVU562 + 1761 0038 4221 movs r1, #66 + 1762 003a 0C48 ldr r0, .L110+8 + 1763 003c FFF7FEFF bl AD9102_WriteRegTable + 1764 .LVL163: +2747:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 1765 .loc 1 2747 2 view .LVU563 + 1766 0040 0021 movs r1, #0 + 1767 0042 1E20 movs r0, #30 + 1768 0044 FFF7FEFF bl AD9102_WriteReg + 1769 .LVL164: +2748:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 1770 .loc 1 2748 2 view .LVU564 + 1771 0048 0121 movs r1, #1 + 1772 004a 1D20 movs r0, #29 + 1773 004c FFF7FEFF bl AD9102_WriteReg + 1774 .LVL165: +2749:Src/main.c **** } + 1775 .loc 1 2749 2 view .LVU565 + 1776 0050 0122 movs r2, #1 + 1777 0052 4FF40061 mov r1, #2048 + 1778 0056 0648 ldr r0, .L110+12 + 1779 0058 FFF7FEFF bl HAL_GPIO_WritePin + 1780 .LVL166: +2750:Src/main.c **** + 1781 .loc 1 2750 1 is_stmt 0 view .LVU566 + 1782 005c 03B0 add sp, sp, #12 + ARM GAS /tmp/ccLSPxIe.s page 169 - 2477 0016 0224 movs r4, #2 - 2478 0018 03E0 b .L180 - 2479 .L188: -2991:Src/main.c **** } - 2480 .loc 1 2991 11 view .LVU786 - 2481 001a 1024 movs r4, #16 - 2482 .L179: - 2483 .LVL266: + 1783 .LCFI15: + 1784 .cfi_def_cfa_offset 4 + 1785 @ sp needed + 1786 005e 5DF804FB ldr pc, [sp], #4 + 1787 .L111: + 1788 0062 00BF .align 2 + 1789 .L110: + 1790 0064 00040240 .word 1073873920 + 1791 0068 00080240 .word 1073874944 + 1792 006c 00000000 .word ad9102_example4_regval + 1793 0070 000C0240 .word 1073875968 + 1794 .cfi_endproc + 1795 .LFE1212: + 1797 .section .text.AD9102_StartOutput,"ax",%progbits + 1798 .align 1 + 1799 .syntax unified + 1800 .thumb + 1801 .thumb_func + 1803 AD9102_StartOutput: + 1804 .LFB1224: +2963:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 1805 .loc 1 2963 1 is_stmt 1 view -0 + 1806 .cfi_startproc + 1807 @ args = 0, pretend = 0, frame = 8 + 1808 @ frame_needed = 0, uses_anonymous_args = 0 + 1809 0000 00B5 push {lr} + 1810 .LCFI16: + 1811 .cfi_def_cfa_offset 4 + 1812 .cfi_offset 14, -4 + 1813 0002 83B0 sub sp, sp, #12 + 1814 .LCFI17: + 1815 .cfi_def_cfa_offset 16 +2964:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); + 1816 .loc 1 2964 2 view .LVU568 + 1817 0004 0122 movs r2, #1 + 1818 0006 4FF40061 mov r1, #2048 + 1819 000a 0F48 ldr r0, .L116 + 1820 000c FFF7FEFF bl HAL_GPIO_WritePin + 1821 .LVL167: +2965:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 1822 .loc 1 2965 2 view .LVU569 + 1823 0010 0121 movs r1, #1 + 1824 0012 1E20 movs r0, #30 + 1825 0014 FFF7FEFF bl AD9102_WriteReg + 1826 .LVL168: +2966:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} + 1827 .loc 1 2966 2 view .LVU570 + 1828 0018 0121 movs r1, #1 + 1829 001a 1D20 movs r0, #29 + 1830 001c FFF7FEFF bl AD9102_WriteReg + 1831 .LVL169: +2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1832 .loc 1 2967 2 view .LVU571 + 1833 .LBB407: +2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1834 .loc 1 2967 7 view .LVU572 +2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + ARM GAS /tmp/ccLSPxIe.s page 170 + + + 1835 .loc 1 2967 25 is_stmt 0 view .LVU573 + 1836 0020 0023 movs r3, #0 + 1837 0022 0193 str r3, [sp, #4] +2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1838 .loc 1 2967 2 view .LVU574 + 1839 0024 02E0 b .L113 + 1840 .L114: +2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1841 .loc 1 2967 48 is_stmt 1 discriminator 3 view .LVU575 +2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1842 .loc 1 2967 43 discriminator 3 view .LVU576 + 1843 0026 019B ldr r3, [sp, #4] + 1844 0028 0133 adds r3, r3, #1 + 1845 002a 0193 str r3, [sp, #4] + 1846 .L113: +2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); + 1847 .loc 1 2967 34 discriminator 1 view .LVU577 + 1848 002c 019B ldr r3, [sp, #4] + 1849 002e B3F57A7F cmp r3, #1000 + 1850 0032 F8D3 bcc .L114 + 1851 .LBE407: +2968:Src/main.c **** } + 1852 .loc 1 2968 2 view .LVU578 + 1853 0034 0022 movs r2, #0 + 1854 0036 4FF40061 mov r1, #2048 + 1855 003a 0348 ldr r0, .L116 + 1856 003c FFF7FEFF bl HAL_GPIO_WritePin + 1857 .LVL170: +2969:Src/main.c **** + 1858 .loc 1 2969 1 is_stmt 0 view .LVU579 + 1859 0040 03B0 add sp, sp, #12 + 1860 .LCFI18: + 1861 .cfi_def_cfa_offset 4 + 1862 @ sp needed + 1863 0042 5DF804FB ldr pc, [sp], #4 + 1864 .L117: + 1865 0046 00BF .align 2 + 1866 .L116: + 1867 0048 000C0240 .word 1073875968 + 1868 .cfi_endproc + 1869 .LFE1224: + 1871 .section .text.AD9102_StopOutput,"ax",%progbits + 1872 .align 1 + 1873 .syntax unified + 1874 .thumb + 1875 .thumb_func + 1877 AD9102_StopOutput: + 1878 .LFB1223: +2957:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); + 1879 .loc 1 2957 1 is_stmt 1 view -0 + 1880 .cfi_startproc + 1881 @ args = 0, pretend = 0, frame = 0 + 1882 @ frame_needed = 0, uses_anonymous_args = 0 + 1883 0000 08B5 push {r3, lr} + 1884 .LCFI19: + 1885 .cfi_def_cfa_offset 8 + 1886 .cfi_offset 3, -8 + ARM GAS /tmp/ccLSPxIe.s page 171 + + + 1887 .cfi_offset 14, -4 +2958:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); + 1888 .loc 1 2958 2 view .LVU581 + 1889 0002 0021 movs r1, #0 + 1890 0004 1E20 movs r0, #30 + 1891 0006 FFF7FEFF bl AD9102_WriteReg + 1892 .LVL171: +2959:Src/main.c **** } + 1893 .loc 1 2959 2 view .LVU582 + 1894 000a 0122 movs r2, #1 + 1895 000c 4FF40061 mov r1, #2048 + 1896 0010 0148 ldr r0, .L120 + 1897 0012 FFF7FEFF bl HAL_GPIO_WritePin + 1898 .LVL172: +2960:Src/main.c **** + 1899 .loc 1 2960 1 is_stmt 0 view .LVU583 + 1900 0016 08BD pop {r3, pc} + 1901 .L121: + 1902 .align 2 + 1903 .L120: + 1904 0018 000C0240 .word 1073875968 + 1905 .cfi_endproc + 1906 .LFE1223: + 1908 .section .text.AD9102_ConfigureSramPlayback,"ax",%progbits + 1909 .align 1 + 1910 .syntax unified + 1911 .thumb + 1912 .thumb_func + 1914 AD9102_ConfigureSramPlayback: + 1915 .LVL173: + 1916 .LFB1225: +2972:Src/main.c **** uint16_t pat_timebase; + 1917 .loc 1 2972 1 is_stmt 1 view -0 + 1918 .cfi_startproc + 1919 @ args = 0, pretend = 0, frame = 0 + 1920 @ frame_needed = 0, uses_anonymous_args = 0 +2972:Src/main.c **** uint16_t pat_timebase; + 1921 .loc 1 2972 1 is_stmt 0 view .LVU585 + 1922 0000 70B5 push {r4, r5, r6, lr} + 1923 .LCFI20: + 1924 .cfi_def_cfa_offset 16 + 1925 .cfi_offset 4, -16 + 1926 .cfi_offset 5, -12 + 1927 .cfi_offset 6, -8 + 1928 .cfi_offset 14, -4 +2973:Src/main.c **** uint32_t pat_period; + 1929 .loc 1 2973 2 is_stmt 1 view .LVU586 +2974:Src/main.c **** + 1930 .loc 1 2974 2 view .LVU587 +2976:Src/main.c **** { + 1931 .loc 1 2976 2 view .LVU588 +2976:Src/main.c **** { + 1932 .loc 1 2976 5 is_stmt 0 view .LVU589 + 1933 0002 0128 cmp r0, #1 + 1934 0004 06D9 bls .L126 + 1935 0006 0446 mov r4, r0 +2980:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 172 + + + 1936 .loc 1 2980 2 is_stmt 1 view .LVU590 +2980:Src/main.c **** { + 1937 .loc 1 2980 5 is_stmt 0 view .LVU591 + 1938 0008 B0F5805F cmp r0, #4096 + 1939 000c 03D9 bls .L123 +2982:Src/main.c **** } + 1940 .loc 1 2982 11 view .LVU592 + 1941 000e 4FF48054 mov r4, #4096 + 1942 0012 00E0 b .L123 + 1943 .L126: +2978:Src/main.c **** } + 1944 .loc 1 2978 11 view .LVU593 + 1945 0014 0224 movs r4, #2 + 1946 .L123: + 1947 .LVL174: +2984:Src/main.c **** { + 1948 .loc 1 2984 2 is_stmt 1 view .LVU594 +2984:Src/main.c **** { + 1949 .loc 1 2984 5 is_stmt 0 view .LVU595 + 1950 0016 19B1 cbz r1, .L128 +2988:Src/main.c **** { + 1951 .loc 1 2988 2 is_stmt 1 view .LVU596 +2988:Src/main.c **** { + 1952 .loc 1 2988 5 is_stmt 0 view .LVU597 + 1953 0018 0F29 cmp r1, #15 + 1954 001a 02D9 bls .L124 +2990:Src/main.c **** } + 1955 .loc 1 2990 8 view .LVU598 + 1956 001c 0F21 movs r1, #15 + 1957 .LVL175: +2990:Src/main.c **** } + 1958 .loc 1 2990 8 view .LVU599 + 1959 001e 00E0 b .L124 + 1960 .LVL176: + 1961 .L128: +2986:Src/main.c **** } + 1962 .loc 1 2986 8 view .LVU600 + 1963 0020 0121 movs r1, #1 + 1964 .LVL177: + 1965 .L124: +2993:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 1966 .loc 1 2993 2 is_stmt 1 view .LVU601 +2993:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 1967 .loc 1 2993 54 is_stmt 0 view .LVU602 + 1968 0022 0D02 lsls r5, r1, #8 + 1969 0024 05F47065 and r5, r5, #3840 +2993:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 1970 .loc 1 2993 15 view .LVU603 + 1971 0028 45F01105 orr r5, r5, #17 + 1972 .LVL178: +2996:Src/main.c **** if (pat_period == 0u) + 1973 .loc 1 2996 2 is_stmt 1 view .LVU604 +2996:Src/main.c **** if (pat_period == 0u) + 1974 .loc 1 2996 15 is_stmt 0 view .LVU605 + 1975 002c 2646 mov r6, r4 +2996:Src/main.c **** if (pat_period == 0u) + 1976 .loc 1 2996 35 view .LVU606 + ARM GAS /tmp/ccLSPxIe.s page 173 + + + 1977 002e 01F00F01 and r1, r1, #15 + 1978 .LVL179: +2996:Src/main.c **** if (pat_period == 0u) + 1979 .loc 1 2996 13 view .LVU607 + 1980 0032 04FB01F1 mul r1, r4, r1 + 1981 .LVL180: 2997:Src/main.c **** { - 2484 .loc 1 2997 2 is_stmt 1 view .LVU787 + 1982 .loc 1 2997 2 is_stmt 1 view .LVU608 2997:Src/main.c **** { - 2485 .loc 1 2997 5 is_stmt 0 view .LVU788 - 2486 001c B4F5805F cmp r4, #4096 - 2487 0020 04D8 bhi .L190 - 2488 .LVL267: - 2489 .L180: + 1983 .loc 1 2997 5 is_stmt 0 view .LVU609 + 1984 0036 19B1 cbz r1, .L125 3001:Src/main.c **** { - 2490 .loc 1 3001 2 is_stmt 1 view .LVU789 + 1985 .loc 1 3001 2 is_stmt 1 view .LVU610 3001:Src/main.c **** { - 2491 .loc 1 3001 5 is_stmt 0 view .LVU790 - 2492 0022 32B1 cbz r2, .L191 -3005:Src/main.c **** { - 2493 .loc 1 3005 2 is_stmt 1 view .LVU791 -3005:Src/main.c **** { - 2494 .loc 1 3005 5 is_stmt 0 view .LVU792 - 2495 0024 0F2A cmp r2, #15 - 2496 0026 05D9 bls .L181 -3007:Src/main.c **** } - 2497 .loc 1 3007 8 view .LVU793 - 2498 0028 0F22 movs r2, #15 - 2499 .LVL268: -3007:Src/main.c **** } - 2500 .loc 1 3007 8 view .LVU794 - 2501 002a 03E0 b .L181 - 2502 .LVL269: - 2503 .L190: -2999:Src/main.c **** } - 2504 .loc 1 2999 11 view .LVU795 - 2505 002c 4FF48054 mov r4, #4096 - 2506 .LVL270: -2999:Src/main.c **** } - 2507 .loc 1 2999 11 view .LVU796 - 2508 0030 F7E7 b .L180 - 2509 .LVL271: - 2510 .L191: + 1986 .loc 1 3001 5 is_stmt 0 view .LVU611 + 1987 0038 B1F5803F cmp r1, #65536 + 1988 003c 35D2 bcs .L130 + 1989 003e 0E46 mov r6, r1 + 1990 .L125: + 1991 .LVL181: +3006:Src/main.c **** AD9102_StopOutput(); + 1992 .loc 1 3006 2 is_stmt 1 view .LVU612 + 1993 0040 4221 movs r1, #66 + 1994 0042 1B48 ldr r0, .L132 + 1995 0044 FFF7FEFF bl AD9102_WriteRegTable + 1996 .LVL182: +3007:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); + 1997 .loc 1 3007 2 view .LVU613 + 1998 0048 FFF7FEFF bl AD9102_StopOutput + 1999 .LVL183: +3008:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); + 2000 .loc 1 3008 2 view .LVU614 + 2001 004c 43F23001 movw r1, #12336 + 2002 0050 2720 movs r0, #39 + 2003 0052 FFF7FEFF bl AD9102_WriteReg + 2004 .LVL184: +3009:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); + 2005 .loc 1 3009 2 view .LVU615 + 2006 0056 4FF40071 mov r1, #512 + 2007 005a 3720 movs r0, #55 + 2008 005c FFF7FEFF bl AD9102_WriteReg + 2009 .LVL185: +3010:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); + 2010 .loc 1 3010 2 view .LVU616 + 2011 0060 40F20111 movw r1, #257 + 2012 0064 2B20 movs r0, #43 + 2013 0066 FFF7FEFF bl AD9102_WriteReg + 2014 .LVL186: +3011:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); + 2015 .loc 1 3011 2 view .LVU617 + 2016 006a 2946 mov r1, r5 + 2017 006c 2820 movs r0, #40 + 2018 006e FFF7FEFF bl AD9102_WriteReg + 2019 .LVL187: +3012:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat + 2020 .loc 1 3012 2 view .LVU618 + 2021 0072 B1B2 uxth r1, r6 + ARM GAS /tmp/ccLSPxIe.s page 174 + + + 2022 0074 2920 movs r0, #41 + 2023 0076 FFF7FEFF bl AD9102_WriteReg + 2024 .LVL188: +3013:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); + 2025 .loc 1 3013 2 view .LVU619 + 2026 007a 0021 movs r1, #0 + 2027 007c 1F20 movs r0, #31 + 2028 007e FFF7FEFF bl AD9102_WriteReg + 2029 .LVL189: +3014:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); + 2030 .loc 1 3014 2 view .LVU620 + 2031 0082 0021 movs r1, #0 + 2032 0084 5C20 movs r0, #92 + 2033 0086 FFF7FEFF bl AD9102_WriteReg + 2034 .LVL190: +3015:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); + 2035 .loc 1 3015 2 view .LVU621 + 2036 008a 0021 movs r1, #0 + 2037 008c 5D20 movs r0, #93 + 2038 008e FFF7FEFF bl AD9102_WriteReg + 2039 .LVL191: +3016:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2040 .loc 1 3016 2 view .LVU622 +3016:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2041 .loc 1 3016 60 is_stmt 0 view .LVU623 + 2042 0092 611E subs r1, r4, #1 + 2043 0094 89B2 uxth r1, r1 +3016:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 2044 .loc 1 3016 2 view .LVU624 + 2045 0096 0901 lsls r1, r1, #4 + 2046 0098 89B2 uxth r1, r1 + 2047 009a 5E20 movs r0, #94 + 2048 009c FFF7FEFF bl AD9102_WriteReg + 2049 .LVL192: +3017:Src/main.c **** } + 2050 .loc 1 3017 2 is_stmt 1 view .LVU625 + 2051 00a0 0121 movs r1, #1 + 2052 00a2 1D20 movs r0, #29 + 2053 00a4 FFF7FEFF bl AD9102_WriteReg + 2054 .LVL193: +3018:Src/main.c **** + 2055 .loc 1 3018 1 is_stmt 0 view .LVU626 + 2056 00a8 70BD pop {r4, r5, r6, pc} + 2057 .LVL194: + 2058 .L130: 3003:Src/main.c **** } - 2511 .loc 1 3003 8 view .LVU797 - 2512 0032 0122 movs r2, #1 - 2513 .LVL272: - 2514 .L181: -3010:Src/main.c **** { - 2515 .loc 1 3010 2 is_stmt 1 view .LVU798 -3010:Src/main.c **** { - 2516 .loc 1 3010 5 is_stmt 0 view .LVU799 - 2517 0034 B8F5005F cmp r8, #8192 - 2518 0038 01D3 bcc .L182 -3012:Src/main.c **** } - ARM GAS /tmp/ccuHnxNu.s page 182 + 2059 .loc 1 3003 14 view .LVU627 + 2060 00aa 4FF6FF76 movw r6, #65535 + 2061 00ae C7E7 b .L125 + 2062 .L133: + 2063 .align 2 + 2064 .L132: + 2065 00b0 00000000 .word ad9102_example2_regval + 2066 .cfi_endproc + 2067 .LFE1225: + 2069 .section .text.AD9102_BeginWaveUpload,"ax",%progbits + 2070 .align 1 + ARM GAS /tmp/ccLSPxIe.s page 175 - 2519 .loc 1 3012 13 view .LVU800 - 2520 003a 41F6FF78 movw r8, #8191 - 2521 .L182: - 2522 .LVL273: -3015:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 2523 .loc 1 3015 2 is_stmt 1 view .LVU801 -3015:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 2524 .loc 1 3015 63 is_stmt 0 view .LVU802 - 2525 003e 1502 lsls r5, r2, #8 - 2526 0040 05F47065 and r5, r5, #3840 -3015:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | - 2527 .loc 1 3015 11 view .LVU803 - 2528 0044 45F01105 orr r5, r5, #17 - 2529 .LVL274: -3018:Src/main.c **** if (pat_period == 0u) - 2530 .loc 1 3018 2 is_stmt 1 view .LVU804 -3018:Src/main.c **** if (pat_period == 0u) - 2531 .loc 1 3018 24 is_stmt 0 view .LVU805 - 2532 0048 A146 mov r9, r4 -3018:Src/main.c **** if (pat_period == 0u) - 2533 .loc 1 3018 44 view .LVU806 - 2534 004a 02F00F02 and r2, r2, #15 - 2535 .LVL275: -3018:Src/main.c **** if (pat_period == 0u) - 2536 .loc 1 3018 11 view .LVU807 - 2537 004e 04FB02F2 mul r2, r4, r2 - 2538 .LVL276: -3019:Src/main.c **** { - 2539 .loc 1 3019 2 is_stmt 1 view .LVU808 -3019:Src/main.c **** { - 2540 .loc 1 3019 5 is_stmt 0 view .LVU809 - 2541 0052 1AB1 cbz r2, .L183 -3023:Src/main.c **** { - 2542 .loc 1 3023 2 is_stmt 1 view .LVU810 -3023:Src/main.c **** { - 2543 .loc 1 3023 5 is_stmt 0 view .LVU811 - 2544 0054 B2F5803F cmp r2, #65536 - 2545 0058 4ED2 bcs .L194 - 2546 005a 9146 mov r9, r2 - 2547 .L183: - 2548 .LVL277: -3028:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); - 2549 .loc 1 3028 2 is_stmt 1 view .LVU812 - 2550 005c 4221 movs r1, #66 - 2551 005e 3748 ldr r0, .L196 - 2552 .LVL278: -3028:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); - 2553 .loc 1 3028 2 is_stmt 0 view .LVU813 - 2554 0060 FFF7FEFF bl AD9102_WriteRegTable - 2555 .LVL279: -3029:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG); - 2556 .loc 1 3029 2 is_stmt 1 view .LVU814 - 2557 0064 0021 movs r1, #0 - 2558 0066 1E20 movs r0, #30 - 2559 0068 FFF7FEFF bl AD9102_WriteReg - 2560 .LVL280: -3030:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG); - ARM GAS /tmp/ccuHnxNu.s page 183 + 2071 .syntax unified + 2072 .thumb + 2073 .thumb_func + 2075 AD9102_BeginWaveUpload: + 2076 .LVL195: + 2077 .LFB1226: +3021:Src/main.c **** if ((samples < 2u) || (samples > AD9102_SRAM_MAX_SAMPLES)) + 2078 .loc 1 3021 1 is_stmt 1 view -0 + 2079 .cfi_startproc + 2080 @ args = 0, pretend = 0, frame = 0 + 2081 @ frame_needed = 0, uses_anonymous_args = 0 +3022:Src/main.c **** { + 2082 .loc 1 3022 2 view .LVU629 +3022:Src/main.c **** { + 2083 .loc 1 3022 21 is_stmt 0 view .LVU630 + 2084 0000 831E subs r3, r0, #2 + 2085 0002 9BB2 uxth r3, r3 +3022:Src/main.c **** { + 2086 .loc 1 3022 5 view .LVU631 + 2087 0004 40F6FE72 movw r2, #4094 + 2088 0008 9342 cmp r3, r2 + 2089 000a 01D9 bls .L141 +3024:Src/main.c **** } + 2090 .loc 1 3024 10 view .LVU632 + 2091 000c 0020 movs r0, #0 + 2092 .LVL196: +3036:Src/main.c **** + 2093 .loc 1 3036 1 view .LVU633 + 2094 000e 7047 bx lr + 2095 .LVL197: + 2096 .L141: +3021:Src/main.c **** if ((samples < 2u) || (samples > AD9102_SRAM_MAX_SAMPLES)) + 2097 .loc 1 3021 1 view .LVU634 + 2098 0010 10B5 push {r4, lr} + 2099 .LCFI21: + 2100 .cfi_def_cfa_offset 8 + 2101 .cfi_offset 4, -8 + 2102 .cfi_offset 14, -4 + 2103 0012 0446 mov r4, r0 +3027:Src/main.c **** AD9102_ResetWaveUploadState(); + 2104 .loc 1 3027 2 is_stmt 1 view .LVU635 + 2105 0014 FFF7FEFF bl AD9102_StopOutput + 2106 .LVL198: +3028:Src/main.c **** AD9102_ConfigureSramPlayback(samples, AD9102_SRAM_HOLD_DEFAULT); + 2107 .loc 1 3028 2 view .LVU636 + 2108 0018 FFF7FEFF bl AD9102_ResetWaveUploadState + 2109 .LVL199: +3029:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); // enable SRAM access + 2110 .loc 1 3029 2 view .LVU637 + 2111 001c 0121 movs r1, #1 + 2112 001e 2046 mov r0, r4 + 2113 0020 FFF7FEFF bl AD9102_ConfigureSramPlayback + 2114 .LVL200: +3030:Src/main.c **** + 2115 .loc 1 3030 2 view .LVU638 + 2116 0024 0421 movs r1, #4 + 2117 0026 1E20 movs r0, #30 + ARM GAS /tmp/ccLSPxIe.s page 176 - 2561 .loc 1 3030 2 view .LVU815 - 2562 006c 43F23001 movw r1, #12336 - 2563 0070 2720 movs r0, #39 - 2564 0072 FFF7FEFF bl AD9102_WriteReg - 2565 .LVL281: -3031:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT); - 2566 .loc 1 3031 2 view .LVU816 - 2567 0076 4FF40071 mov r1, #512 - 2568 007a 3720 movs r0, #55 - 2569 007c FFF7FEFF bl AD9102_WriteReg - 2570 .LVL282: -3032:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); - 2571 .loc 1 3032 2 view .LVU817 - 2572 0080 40F20111 movw r1, #257 - 2573 0084 2B20 movs r0, #43 - 2574 0086 FFF7FEFF bl AD9102_WriteReg - 2575 .LVL283: -3033:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period); - 2576 .loc 1 3033 2 view .LVU818 - 2577 008a 2946 mov r1, r5 - 2578 008c 2820 movs r0, #40 - 2579 008e FFF7FEFF bl AD9102_WriteReg - 2580 .LVL284: -3034:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat - 2581 .loc 1 3034 2 view .LVU819 - 2582 0092 1FFA89F1 uxth r1, r9 - 2583 0096 2920 movs r0, #41 - 2584 0098 FFF7FEFF bl AD9102_WriteReg - 2585 .LVL285: -3035:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT); - 2586 .loc 1 3035 2 view .LVU820 - 2587 009c 0021 movs r1, #0 - 2588 009e 1F20 movs r0, #31 - 2589 00a0 FFF7FEFF bl AD9102_WriteReg - 2590 .LVL286: -3036:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); - 2591 .loc 1 3036 2 view .LVU821 - 2592 00a4 0021 movs r1, #0 - 2593 00a6 5C20 movs r0, #92 - 2594 00a8 FFF7FEFF bl AD9102_WriteReg - 2595 .LVL287: -3037:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); - 2596 .loc 1 3037 2 view .LVU822 - 2597 00ac 0021 movs r1, #0 - 2598 00ae 5D20 movs r0, #93 - 2599 00b0 FFF7FEFF bl AD9102_WriteReg - 2600 .LVL288: -3038:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 2601 .loc 1 3038 2 view .LVU823 -3038:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 2602 .loc 1 3038 60 is_stmt 0 view .LVU824 - 2603 00b4 611E subs r1, r4, #1 - 2604 00b6 89B2 uxth r1, r1 -3038:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 2605 .loc 1 3038 2 view .LVU825 - 2606 00b8 0901 lsls r1, r1, #4 - 2607 00ba 89B2 uxth r1, r1 - ARM GAS /tmp/ccuHnxNu.s page 184 + 2118 0028 FFF7FEFF bl AD9102_WriteReg + 2119 .LVL201: +3032:Src/main.c **** ad9102_wave_written_samples = 0u; + 2120 .loc 1 3032 2 view .LVU639 +3032:Src/main.c **** ad9102_wave_written_samples = 0u; + 2121 .loc 1 3032 31 is_stmt 0 view .LVU640 + 2122 002c 044B ldr r3, .L142 + 2123 002e 1C80 strh r4, [r3] @ movhi +3033:Src/main.c **** ad9102_wave_upload_active = 1u; + 2124 .loc 1 3033 2 is_stmt 1 view .LVU641 +3033:Src/main.c **** ad9102_wave_upload_active = 1u; + 2125 .loc 1 3033 30 is_stmt 0 view .LVU642 + 2126 0030 044B ldr r3, .L142+4 + 2127 0032 0022 movs r2, #0 + 2128 0034 1A80 strh r2, [r3] @ movhi +3034:Src/main.c **** return 1u; + 2129 .loc 1 3034 2 is_stmt 1 view .LVU643 +3034:Src/main.c **** return 1u; + 2130 .loc 1 3034 28 is_stmt 0 view .LVU644 + 2131 0036 0120 movs r0, #1 + 2132 0038 034B ldr r3, .L142+8 + 2133 003a 1870 strb r0, [r3] +3035:Src/main.c **** } + 2134 .loc 1 3035 2 is_stmt 1 view .LVU645 +3036:Src/main.c **** + 2135 .loc 1 3036 1 is_stmt 0 view .LVU646 + 2136 003c 10BD pop {r4, pc} + 2137 .L143: + 2138 003e 00BF .align 2 + 2139 .L142: + 2140 0040 00000000 .word ad9102_wave_expected_samples + 2141 0044 00000000 .word ad9102_wave_written_samples + 2142 0048 00000000 .word ad9102_wave_upload_active + 2143 .cfi_endproc + 2144 .LFE1226: + 2146 .section .text.AD9102_CancelWaveUpload,"ax",%progbits + 2147 .align 1 + 2148 .syntax unified + 2149 .thumb + 2150 .thumb_func + 2152 AD9102_CancelWaveUpload: + 2153 .LFB1229: +3107:Src/main.c **** if (ad9102_wave_upload_active != 0u) + 2154 .loc 1 3107 1 is_stmt 1 view -0 + 2155 .cfi_startproc + 2156 @ args = 0, pretend = 0, frame = 0 + 2157 @ frame_needed = 0, uses_anonymous_args = 0 + 2158 0000 08B5 push {r3, lr} + 2159 .LCFI22: + 2160 .cfi_def_cfa_offset 8 + 2161 .cfi_offset 3, -8 + 2162 .cfi_offset 14, -4 +3108:Src/main.c **** { + 2163 .loc 1 3108 2 view .LVU648 +3108:Src/main.c **** { + 2164 .loc 1 3108 32 is_stmt 0 view .LVU649 + 2165 0002 044B ldr r3, .L148 + ARM GAS /tmp/ccLSPxIe.s page 177 - 2608 00bc 5E20 movs r0, #94 - 2609 00be FFF7FEFF bl AD9102_WriteReg - 2610 .LVL289: -3039:Src/main.c **** - 2611 .loc 1 3039 2 is_stmt 1 view .LVU826 - 2612 00c2 0121 movs r1, #1 - 2613 00c4 1D20 movs r0, #29 - 2614 00c6 FFF7FEFF bl AD9102_WriteReg - 2615 .LVL290: -3041:Src/main.c **** - 2616 .loc 1 3041 2 view .LVU827 - 2617 00ca 4246 mov r2, r8 - 2618 00cc 3946 mov r1, r7 - 2619 00ce 2046 mov r0, r4 - 2620 00d0 FFF7FEFF bl AD9102_LoadSramRamp - 2621 .LVL291: -3043:Src/main.c **** { - 2622 .loc 1 3043 2 view .LVU828 -3043:Src/main.c **** { - 2623 .loc 1 3043 5 is_stmt 0 view .LVU829 - 2624 00d4 36B3 cbz r6, .L184 -3045:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); - 2625 .loc 1 3045 3 is_stmt 1 view .LVU830 - 2626 00d6 0122 movs r2, #1 - 2627 00d8 4FF40061 mov r1, #2048 - 2628 00dc 1848 ldr r0, .L196+4 - 2629 00de FFF7FEFF bl HAL_GPIO_WritePin - 2630 .LVL292: -3046:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 2631 .loc 1 3046 3 view .LVU831 - 2632 00e2 0121 movs r1, #1 - 2633 00e4 1E20 movs r0, #30 - 2634 00e6 FFF7FEFF bl AD9102_WriteReg - 2635 .LVL293: -3047:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} - 2636 .loc 1 3047 3 view .LVU832 - 2637 00ea 0121 movs r1, #1 - 2638 00ec 1D20 movs r0, #29 - 2639 00ee FFF7FEFF bl AD9102_WriteReg - 2640 .LVL294: -3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2641 .loc 1 3048 3 view .LVU833 - 2642 .LBB418: -3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2643 .loc 1 3048 8 view .LVU834 -3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2644 .loc 1 3048 26 is_stmt 0 view .LVU835 - 2645 00f2 0023 movs r3, #0 - 2646 00f4 0193 str r3, [sp, #4] -3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2647 .loc 1 3048 3 view .LVU836 - 2648 00f6 05E0 b .L185 - 2649 .LVL295: - 2650 .L194: -3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2651 .loc 1 3048 3 view .LVU837 - 2652 .LBE418: - ARM GAS /tmp/ccuHnxNu.s page 185 + 2166 0004 1B78 ldrb r3, [r3] @ zero_extendqisi2 +3108:Src/main.c **** { + 2167 .loc 1 3108 5 view .LVU650 + 2168 0006 13B9 cbnz r3, .L147 + 2169 .L145: +3112:Src/main.c **** } + 2170 .loc 1 3112 2 is_stmt 1 view .LVU651 + 2171 0008 FFF7FEFF bl AD9102_ResetWaveUploadState + 2172 .LVL202: +3113:Src/main.c **** + 2173 .loc 1 3113 1 is_stmt 0 view .LVU652 + 2174 000c 08BD pop {r3, pc} + 2175 .L147: +3110:Src/main.c **** } + 2176 .loc 1 3110 3 is_stmt 1 view .LVU653 + 2177 000e FFF7FEFF bl AD9102_StopOutput + 2178 .LVL203: + 2179 0012 F9E7 b .L145 + 2180 .L149: + 2181 .align 2 + 2182 .L148: + 2183 0014 00000000 .word ad9102_wave_upload_active + 2184 .cfi_endproc + 2185 .LFE1229: + 2187 .section .text.AD9102_ReadReg,"ax",%progbits + 2188 .align 1 + 2189 .syntax unified + 2190 .thumb + 2191 .thumb_func + 2193 AD9102_ReadReg: + 2194 .LVL204: + 2195 .LFB1220: +2907:Src/main.c **** uint32_t tmp32 = 0; + 2196 .loc 1 2907 1 view -0 + 2197 .cfi_startproc + 2198 @ args = 0, pretend = 0, frame = 0 + 2199 @ frame_needed = 0, uses_anonymous_args = 0 +2907:Src/main.c **** uint32_t tmp32 = 0; + 2200 .loc 1 2907 1 is_stmt 0 view .LVU655 + 2201 0000 10B5 push {r4, lr} + 2202 .LCFI23: + 2203 .cfi_def_cfa_offset 8 + 2204 .cfi_offset 4, -8 + 2205 .cfi_offset 14, -4 +2908:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) + 2206 .loc 1 2908 2 is_stmt 1 view .LVU656 + 2207 .LVL205: +2909:Src/main.c **** uint16_t value; + 2208 .loc 1 2909 2 view .LVU657 +2909:Src/main.c **** uint16_t value; + 2209 .loc 1 2909 11 is_stmt 0 view .LVU658 + 2210 0002 40F40044 orr r4, r0, #32768 + 2211 .LVL206: +2910:Src/main.c **** + 2212 .loc 1 2910 2 is_stmt 1 view .LVU659 +2912:Src/main.c **** + 2213 .loc 1 2912 2 view .LVU660 + ARM GAS /tmp/ccLSPxIe.s page 178 -3025:Src/main.c **** } - 2653 .loc 1 3025 14 view .LVU838 - 2654 00f8 4FF6FF79 movw r9, #65535 - 2655 00fc AEE7 b .L183 - 2656 .LVL296: - 2657 .L186: - 2658 .LBB419: -3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2659 .loc 1 3048 49 is_stmt 1 discriminator 3 view .LVU839 -3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2660 .loc 1 3048 44 discriminator 3 view .LVU840 - 2661 00fe 019B ldr r3, [sp, #4] - 2662 0100 0133 adds r3, r3, #1 - 2663 0102 0193 str r3, [sp, #4] - 2664 .L185: -3048:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2665 .loc 1 3048 35 discriminator 1 view .LVU841 - 2666 0104 019B ldr r3, [sp, #4] - 2667 0106 B3F57A7F cmp r3, #1000 - 2668 010a F8D3 bcc .L186 - 2669 .LBE419: -3049:Src/main.c **** } - 2670 .loc 1 3049 3 view .LVU842 - 2671 010c 0022 movs r2, #0 - 2672 010e 4FF40061 mov r1, #2048 - 2673 0112 0B48 ldr r0, .L196+4 - 2674 0114 FFF7FEFF bl HAL_GPIO_WritePin - 2675 .LVL297: - 2676 .L187: -3057:Src/main.c **** } - 2677 .loc 1 3057 2 view .LVU843 -3057:Src/main.c **** } - 2678 .loc 1 3057 9 is_stmt 0 view .LVU844 - 2679 0118 1E20 movs r0, #30 - 2680 011a FFF7FEFF bl AD9102_ReadReg - 2681 .LVL298: -3058:Src/main.c **** - 2682 .loc 1 3058 1 view .LVU845 - 2683 011e 03B0 add sp, sp, #12 - 2684 .LCFI26: - 2685 .cfi_remember_state - 2686 .cfi_def_cfa_offset 28 - 2687 @ sp needed - 2688 0120 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} - 2689 .LVL299: - 2690 .L184: - 2691 .LCFI27: - 2692 .cfi_restore_state -3053:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 2693 .loc 1 3053 3 is_stmt 1 view .LVU846 - 2694 0124 0021 movs r1, #0 - 2695 0126 1E20 movs r0, #30 - 2696 0128 FFF7FEFF bl AD9102_WriteReg - 2697 .LVL300: -3054:Src/main.c **** } - 2698 .loc 1 3054 3 view .LVU847 - 2699 012c 0122 movs r2, #1 - ARM GAS /tmp/ccuHnxNu.s page 186 + 2214 0006 0021 movs r1, #0 + 2215 0008 0846 mov r0, r1 + 2216 .LVL207: +2912:Src/main.c **** + 2217 .loc 1 2912 2 is_stmt 0 view .LVU661 + 2218 000a FFF7FEFF bl SPI2_SetMode + 2219 .LVL208: +2914:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); + 2220 .loc 1 2914 2 is_stmt 1 view .LVU662 + 2221 000e 0122 movs r2, #1 + 2222 0010 4FF48041 mov r1, #16384 + 2223 0014 2C48 ldr r0, .L165 + 2224 0016 FFF7FEFF bl HAL_GPIO_WritePin + 2225 .LVL209: +2915:Src/main.c **** + 2226 .loc 1 2915 2 view .LVU663 + 2227 001a 0122 movs r2, #1 + 2228 001c 4FF48051 mov r1, #4096 + 2229 0020 2A48 ldr r0, .L165+4 + 2230 0022 FFF7FEFF bl HAL_GPIO_WritePin + 2231 .LVL210: +2917:Src/main.c **** { + 2232 .loc 1 2917 2 view .LVU664 + 2233 .LBB408: + 2234 .LBI408: + 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 2235 .loc 4 381 26 view .LVU665 + 2236 .LBB409: + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2237 .loc 4 383 3 view .LVU666 + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2238 .loc 4 383 12 is_stmt 0 view .LVU667 + 2239 0026 2A4B ldr r3, .L165+8 + 2240 0028 1B68 ldr r3, [r3] + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2241 .loc 4 383 69 view .LVU668 + 2242 002a 13F0400F tst r3, #64 + 2243 002e 04D1 bne .L151 + 2244 .LVL211: + 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2245 .loc 4 383 69 view .LVU669 + 2246 .LBE409: + 2247 .LBE408: +2919:Src/main.c **** } + 2248 .loc 1 2919 3 is_stmt 1 view .LVU670 + 2249 .LBB410: + 2250 .LBI410: + 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 2251 .loc 4 358 22 view .LVU671 + 2252 .LBB411: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2253 .loc 4 360 3 view .LVU672 + 2254 0030 274A ldr r2, .L165+8 + 2255 0032 1368 ldr r3, [r2] + 2256 0034 43F04003 orr r3, r3, #64 + 2257 0038 1360 str r3, [r2] + 2258 .LVL212: + ARM GAS /tmp/ccLSPxIe.s page 179 - 2700 012e 4FF40061 mov r1, #2048 - 2701 0132 0348 ldr r0, .L196+4 - 2702 0134 FFF7FEFF bl HAL_GPIO_WritePin - 2703 .LVL301: - 2704 0138 EEE7 b .L187 - 2705 .L197: - 2706 013a 00BF .align 2 - 2707 .L196: - 2708 013c 00000000 .word ad9102_example2_regval - 2709 0140 000C0240 .word 1073875968 - 2710 .cfi_endproc - 2711 .LFE1224: - 2713 .section .text.AD9102_Apply,"ax",%progbits - 2714 .align 1 - 2715 .syntax unified - 2716 .thumb - 2717 .thumb_func - 2719 AD9102_Apply: - 2720 .LVL302: - 2721 .LFB1222: -2856:Src/main.c **** if (enable) - 2722 .loc 1 2856 1 view -0 - 2723 .cfi_startproc - 2724 @ args = 4, pretend = 0, frame = 8 - 2725 @ frame_needed = 0, uses_anonymous_args = 0 -2856:Src/main.c **** if (enable) - 2726 .loc 1 2856 1 is_stmt 0 view .LVU849 - 2727 0000 30B5 push {r4, r5, lr} - 2728 .LCFI28: - 2729 .cfi_def_cfa_offset 12 - 2730 .cfi_offset 4, -12 - 2731 .cfi_offset 5, -8 - 2732 .cfi_offset 14, -4 - 2733 0002 83B0 sub sp, sp, #12 - 2734 .LCFI29: - 2735 .cfi_def_cfa_offset 24 -2857:Src/main.c **** { - 2736 .loc 1 2857 2 is_stmt 1 view .LVU850 -2857:Src/main.c **** { - 2737 .loc 1 2857 5 is_stmt 0 view .LVU851 - 2738 0004 0029 cmp r1, #0 - 2739 0006 4AD0 beq .L199 - 2740 .LBB420: -2859:Src/main.c **** uint16_t pat_timebase; - 2741 .loc 1 2859 3 is_stmt 1 view .LVU852 -2860:Src/main.c **** - 2742 .loc 1 2860 3 view .LVU853 -2862:Src/main.c **** { - 2743 .loc 1 2862 3 view .LVU854 -2862:Src/main.c **** { - 2744 .loc 1 2862 6 is_stmt 0 view .LVU855 - 2745 0008 1AB1 cbz r2, .L204 -2866:Src/main.c **** { - 2746 .loc 1 2866 3 is_stmt 1 view .LVU856 -2866:Src/main.c **** { - 2747 .loc 1 2866 6 is_stmt 0 view .LVU857 - 2748 000a 3F2A cmp r2, #63 - ARM GAS /tmp/ccuHnxNu.s page 187 - - - 2749 000c 02D9 bls .L200 -2868:Src/main.c **** } - 2750 .loc 1 2868 13 view .LVU858 - 2751 000e 3F22 movs r2, #63 - 2752 .LVL303: -2868:Src/main.c **** } - 2753 .loc 1 2868 13 view .LVU859 - 2754 0010 00E0 b .L200 - 2755 .LVL304: - 2756 .L204: -2864:Src/main.c **** } - 2757 .loc 1 2864 13 view .LVU860 - 2758 0012 0122 movs r2, #1 - 2759 .LVL305: - 2760 .L200: -2870:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2761 .loc 1 2870 3 is_stmt 1 view .LVU861 -2871:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | - 2762 .loc 1 2871 25 is_stmt 0 view .LVU862 - 2763 0014 00F00300 and r0, r0, #3 - 2764 .LVL306: -2870:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2765 .loc 1 2870 60 view .LVU863 - 2766 0018 9200 lsls r2, r2, #2 - 2767 .LVL307: -2870:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2768 .loc 1 2870 60 view .LVU864 - 2769 001a D2B2 uxtb r2, r2 -2870:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); - 2770 .loc 1 2870 11 view .LVU865 - 2771 001c 40EA0204 orr r4, r0, r2 - 2772 .LVL308: -2872:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 2773 .loc 1 2872 3 is_stmt 1 view .LVU866 -2873:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); - 2774 .loc 1 2873 49 is_stmt 0 view .LVU867 - 2775 0020 1B01 lsls r3, r3, #4 - 2776 .LVL309: -2873:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); - 2777 .loc 1 2873 49 view .LVU868 - 2778 0022 03F0F003 and r3, r3, #240 -2872:Src/main.c **** ((pat_base & 0x0Fu) << 4) | - 2779 .loc 1 2872 16 view .LVU869 - 2780 0026 40F20115 movw r5, #257 - 2781 002a 1D43 orrs r5, r5, r3 - 2782 .LVL310: -2876:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); - 2783 .loc 1 2876 3 is_stmt 1 view .LVU870 - 2784 002c 43F21221 movw r1, #12818 - 2785 .LVL311: -2876:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); - 2786 .loc 1 2876 3 is_stmt 0 view .LVU871 - 2787 0030 2720 movs r0, #39 - 2788 0032 FFF7FEFF bl AD9102_WriteReg - 2789 .LVL312: -2877:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); - 2790 .loc 1 2877 3 is_stmt 1 view .LVU872 - ARM GAS /tmp/ccuHnxNu.s page 188 - - - 2791 0036 2146 mov r1, r4 - 2792 0038 3720 movs r0, #55 - 2793 003a FFF7FEFF bl AD9102_WriteReg - 2794 .LVL313: -2878:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); - 2795 .loc 1 2878 3 view .LVU873 - 2796 003e 2946 mov r1, r5 - 2797 0040 2820 movs r0, #40 - 2798 0042 FFF7FEFF bl AD9102_WriteReg - 2799 .LVL314: -2879:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat - 2800 .loc 1 2879 3 view .LVU874 - 2801 0046 BDF81810 ldrh r1, [sp, #24] - 2802 004a 2920 movs r0, #41 - 2803 004c FFF7FEFF bl AD9102_WriteReg - 2804 .LVL315: -2880:Src/main.c **** - 2805 .loc 1 2880 3 view .LVU875 - 2806 0050 0021 movs r1, #0 - 2807 0052 1F20 movs r0, #31 - 2808 0054 FFF7FEFF bl AD9102_WriteReg - 2809 .LVL316: -2884:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN); - 2810 .loc 1 2884 3 view .LVU876 - 2811 0058 0122 movs r2, #1 - 2812 005a 4FF40061 mov r1, #2048 - 2813 005e 1548 ldr r0, .L207 - 2814 0060 FFF7FEFF bl HAL_GPIO_WritePin - 2815 .LVL317: -2885:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); - 2816 .loc 1 2885 3 view .LVU877 - 2817 0064 0121 movs r1, #1 - 2818 0066 1E20 movs r0, #30 - 2819 0068 FFF7FEFF bl AD9102_WriteReg - 2820 .LVL318: -2886:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {} - 2821 .loc 1 2886 3 view .LVU878 - 2822 006c 0121 movs r1, #1 - 2823 006e 1D20 movs r0, #29 - 2824 0070 FFF7FEFF bl AD9102_WriteReg - 2825 .LVL319: -2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2826 .loc 1 2887 3 view .LVU879 - 2827 .LBB421: -2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2828 .loc 1 2887 8 view .LVU880 -2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2829 .loc 1 2887 26 is_stmt 0 view .LVU881 - 2830 0074 0023 movs r3, #0 - 2831 0076 0193 str r3, [sp, #4] -2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2832 .loc 1 2887 3 view .LVU882 - 2833 0078 02E0 b .L201 - 2834 .L202: -2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2835 .loc 1 2887 49 is_stmt 1 discriminator 3 view .LVU883 -2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - ARM GAS /tmp/ccuHnxNu.s page 189 - - - 2836 .loc 1 2887 44 discriminator 3 view .LVU884 - 2837 007a 019B ldr r3, [sp, #4] - 2838 007c 0133 adds r3, r3, #1 - 2839 007e 0193 str r3, [sp, #4] - 2840 .L201: -2887:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET); - 2841 .loc 1 2887 35 discriminator 1 view .LVU885 - 2842 0080 019B ldr r3, [sp, #4] - 2843 0082 B3F57A7F cmp r3, #1000 - 2844 0086 F8D3 bcc .L202 - 2845 .LBE421: -2888:Src/main.c **** } - 2846 .loc 1 2888 3 view .LVU886 - 2847 0088 0022 movs r2, #0 - 2848 008a 4FF40061 mov r1, #2048 - 2849 008e 0948 ldr r0, .L207 - 2850 0090 FFF7FEFF bl HAL_GPIO_WritePin - 2851 .LVL320: - 2852 .L203: -2888:Src/main.c **** } - 2853 .loc 1 2888 3 is_stmt 0 view .LVU887 - 2854 .LBE420: -2896:Src/main.c **** } - 2855 .loc 1 2896 2 is_stmt 1 view .LVU888 -2896:Src/main.c **** } - 2856 .loc 1 2896 9 is_stmt 0 view .LVU889 - 2857 0094 1E20 movs r0, #30 - 2858 0096 FFF7FEFF bl AD9102_ReadReg - 2859 .LVL321: -2897:Src/main.c **** - 2860 .loc 1 2897 1 view .LVU890 - 2861 009a 03B0 add sp, sp, #12 - 2862 .LCFI30: - 2863 .cfi_remember_state - 2864 .cfi_def_cfa_offset 12 - 2865 @ sp needed - 2866 009c 30BD pop {r4, r5, pc} - 2867 .LVL322: - 2868 .L199: - 2869 .LCFI31: - 2870 .cfi_restore_state -2892:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 2871 .loc 1 2892 3 is_stmt 1 view .LVU891 - 2872 009e 0021 movs r1, #0 - 2873 .LVL323: -2892:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 2874 .loc 1 2892 3 is_stmt 0 view .LVU892 - 2875 00a0 1E20 movs r0, #30 - 2876 .LVL324: -2892:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); - 2877 .loc 1 2892 3 view .LVU893 - 2878 00a2 FFF7FEFF bl AD9102_WriteReg - 2879 .LVL325: -2893:Src/main.c **** } - 2880 .loc 1 2893 3 is_stmt 1 view .LVU894 - 2881 00a6 0122 movs r2, #1 - 2882 00a8 4FF40061 mov r1, #2048 - ARM GAS /tmp/ccuHnxNu.s page 190 - - - 2883 00ac 0148 ldr r0, .L207 - 2884 00ae FFF7FEFF bl HAL_GPIO_WritePin - 2885 .LVL326: - 2886 00b2 EFE7 b .L203 - 2887 .L208: - 2888 .align 2 - 2889 .L207: - 2890 00b4 000C0240 .word 1073875968 - 2891 .cfi_endproc - 2892 .LFE1222: - 2894 .section .text.AD9833_WriteWord,"ax",%progbits - 2895 .align 1 - 2896 .syntax unified - 2897 .thumb - 2898 .thumb_func - 2900 AD9833_WriteWord: - 2901 .LVL327: - 2902 .LFB1214: -2673:Src/main.c **** uint32_t tmp32 = 0; - 2903 .loc 1 2673 1 view -0 - 2904 .cfi_startproc - 2905 @ args = 0, pretend = 0, frame = 0 - 2906 @ frame_needed = 0, uses_anonymous_args = 0 -2673:Src/main.c **** uint32_t tmp32 = 0; - 2907 .loc 1 2673 1 is_stmt 0 view .LVU896 - 2908 0000 38B5 push {r3, r4, r5, lr} - 2909 .LCFI32: - 2910 .cfi_def_cfa_offset 16 - 2911 .cfi_offset 3, -16 - 2912 .cfi_offset 4, -12 - 2913 .cfi_offset 5, -8 - 2914 .cfi_offset 14, -4 - 2915 0002 0446 mov r4, r0 -2674:Src/main.c **** - 2916 .loc 1 2674 2 is_stmt 1 view .LVU897 - 2917 .LVL328: -2676:Src/main.c **** - 2918 .loc 1 2676 2 view .LVU898 - 2919 0004 0021 movs r1, #0 - 2920 0006 0220 movs r0, #2 - 2921 .LVL329: -2676:Src/main.c **** - 2922 .loc 1 2676 2 is_stmt 0 view .LVU899 - 2923 0008 FFF7FEFF bl SPI2_SetMode - 2924 .LVL330: -2678:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); - 2925 .loc 1 2678 2 is_stmt 1 view .LVU900 - 2926 000c 1E4D ldr r5, .L217 - 2927 000e 0122 movs r2, #1 - 2928 0010 4FF48051 mov r1, #4096 - 2929 0014 2846 mov r0, r5 - 2930 0016 FFF7FEFF bl HAL_GPIO_WritePin - 2931 .LVL331: -2679:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); - 2932 .loc 1 2679 2 view .LVU901 - 2933 001a 0122 movs r2, #1 - 2934 001c 4FF48041 mov r1, #16384 - ARM GAS /tmp/ccuHnxNu.s page 191 - - - 2935 0020 2846 mov r0, r5 - 2936 0022 FFF7FEFF bl HAL_GPIO_WritePin - 2937 .LVL332: -2680:Src/main.c **** - 2938 .loc 1 2680 2 view .LVU902 - 2939 0026 05F50065 add r5, r5, #2048 - 2940 002a 0122 movs r2, #1 - 2941 002c 4FF48051 mov r1, #4096 - 2942 0030 2846 mov r0, r5 - 2943 0032 FFF7FEFF bl HAL_GPIO_WritePin - 2944 .LVL333: -2682:Src/main.c **** - 2945 .loc 1 2682 2 view .LVU903 - 2946 0036 0022 movs r2, #0 - 2947 0038 4FF40051 mov r1, #8192 - 2948 003c 2846 mov r0, r5 - 2949 003e FFF7FEFF bl HAL_GPIO_WritePin - 2950 .LVL334: -2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2951 .loc 1 2684 2 view .LVU904 -2674:Src/main.c **** - 2952 .loc 1 2674 11 is_stmt 0 view .LVU905 - 2953 0042 0023 movs r3, #0 - 2954 .LVL335: - 2955 .L211: -2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2956 .loc 1 2684 63 is_stmt 1 discriminator 2 view .LVU906 -2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2957 .loc 1 2684 41 discriminator 2 view .LVU907 - 2958 .LBB422: - 2959 .LBI422: + 2259 .L151: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2260 .loc 4 360 3 is_stmt 0 view .LVU673 + 2261 .LBE411: + 2262 .LBE410: +2922:Src/main.c **** + 2263 .loc 1 2922 2 is_stmt 1 view .LVU674 + 2264 003a 0022 movs r2, #0 + 2265 003c 4FF48051 mov r1, #4096 + 2266 0040 2148 ldr r0, .L165 + 2267 0042 FFF7FEFF bl HAL_GPIO_WritePin + 2268 .LVL213: +2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 2269 .loc 1 2924 2 view .LVU675 +2908:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) + 2270 .loc 1 2908 11 is_stmt 0 view .LVU676 + 2271 0046 0023 movs r3, #0 + 2272 .LVL214: + 2273 .L153: +2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 2274 .loc 1 2924 63 is_stmt 1 discriminator 2 view .LVU677 +2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 2275 .loc 1 2924 41 discriminator 2 view .LVU678 + 2276 .LBB412: + 2277 .LBI412: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2960 .loc 4 916 26 view .LVU908 - 2961 .LBB423: + 2278 .loc 4 916 26 view .LVU679 + 2279 .LBB413: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2962 .loc 4 918 3 view .LVU909 + 2280 .loc 4 918 3 view .LVU680 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2963 .loc 4 918 12 is_stmt 0 view .LVU910 - 2964 0044 114A ldr r2, .L217+4 - 2965 0046 9268 ldr r2, [r2, #8] + 2281 .loc 4 918 12 is_stmt 0 view .LVU681 + 2282 0048 214A ldr r2, .L165+8 + 2283 004a 9268 ldr r2, [r2, #8] 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2966 .loc 4 918 66 view .LVU911 - 2967 0048 12F0020F tst r2, #2 - 2968 004c 05D1 bne .L210 - 2969 .LVL336: + 2284 .loc 4 918 66 view .LVU682 + 2285 004c 12F0020F tst r2, #2 + 2286 0050 05D1 bne .L152 + 2287 .LVL215: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 2970 .loc 4 918 66 view .LVU912 - 2971 .LBE423: - 2972 .LBE422: -2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2973 .loc 1 2684 50 discriminator 1 view .LVU913 - 2974 004e 5A1C adds r2, r3, #1 - 2975 .LVL337: -2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2976 .loc 1 2684 41 discriminator 1 view .LVU914 - 2977 0050 B3F57A7F cmp r3, #1000 - 2978 0054 01D2 bcs .L210 - ARM GAS /tmp/ccuHnxNu.s page 192 + 2288 .loc 4 918 66 view .LVU683 + 2289 .LBE413: + 2290 .LBE412: +2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 2291 .loc 1 2924 50 discriminator 1 view .LVU684 + 2292 0052 5A1C adds r2, r3, #1 + 2293 .LVL216: +2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 2294 .loc 1 2924 41 discriminator 1 view .LVU685 + 2295 0054 B3F57A7F cmp r3, #1000 + 2296 0058 01D2 bcs .L152 +2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd); + 2297 .loc 1 2924 50 discriminator 1 view .LVU686 + 2298 005a 1346 mov r3, r2 + 2299 005c F4E7 b .L153 + 2300 .LVL217: + 2301 .L152: + ARM GAS /tmp/ccLSPxIe.s page 180 -2684:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); - 2979 .loc 1 2684 50 discriminator 1 view .LVU915 - 2980 0056 1346 mov r3, r2 - 2981 0058 F4E7 b .L211 - 2982 .LVL338: - 2983 .L210: -2685:Src/main.c **** tmp32 = 0; - 2984 .loc 1 2685 2 is_stmt 1 view .LVU916 - 2985 .LBB424: - 2986 .LBI424: +2925:Src/main.c **** tmp32 = 0; + 2302 .loc 1 2925 2 is_stmt 1 view .LVU687 + 2303 .LBB414: + 2304 .LBI414: 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 2987 .loc 4 1373 22 view .LVU917 - 2988 .LBB425: + 2305 .loc 4 1373 22 view .LVU688 + 2306 .LBB415: 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 2989 .loc 4 1376 3 view .LVU918 - 2990 .loc 4 1377 3 view .LVU919 - 2991 .loc 4 1377 10 is_stmt 0 view .LVU920 - 2992 005a 0C4B ldr r3, .L217+4 - 2993 005c 9C81 strh r4, [r3, #12] @ movhi - 2994 .LVL339: - 2995 .loc 4 1377 10 view .LVU921 - 2996 .LBE425: - 2997 .LBE424: -2686:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 2998 .loc 1 2686 2 is_stmt 1 view .LVU922 -2687:Src/main.c **** (void) SPI2->DR; - 2999 .loc 1 2687 2 view .LVU923 -2686:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} - 3000 .loc 1 2686 8 is_stmt 0 view .LVU924 - 3001 005e 0023 movs r3, #0 - 3002 .LVL340: - 3003 .L213: -2687:Src/main.c **** (void) SPI2->DR; - 3004 .loc 1 2687 64 is_stmt 1 discriminator 2 view .LVU925 -2687:Src/main.c **** (void) SPI2->DR; - 3005 .loc 1 2687 42 discriminator 2 view .LVU926 - 3006 .LBB426: - 3007 .LBI426: + 2307 .loc 4 1376 3 view .LVU689 + 2308 .loc 4 1377 3 view .LVU690 + 2309 .loc 4 1377 10 is_stmt 0 view .LVU691 + 2310 005e 1C4B ldr r3, .L165+8 + 2311 0060 9C81 strh r4, [r3, #12] @ movhi + 2312 .LVL218: + 2313 .loc 4 1377 10 view .LVU692 + 2314 .LBE415: + 2315 .LBE414: +2926:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 2316 .loc 1 2926 2 is_stmt 1 view .LVU693 +2927:Src/main.c **** (void) SPI2->DR; + 2317 .loc 1 2927 2 view .LVU694 +2926:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 2318 .loc 1 2926 8 is_stmt 0 view .LVU695 + 2319 0062 0023 movs r3, #0 + 2320 .LVL219: + 2321 .L155: +2927:Src/main.c **** (void) SPI2->DR; + 2322 .loc 1 2927 64 is_stmt 1 discriminator 2 view .LVU696 +2927:Src/main.c **** (void) SPI2->DR; + 2323 .loc 1 2927 42 discriminator 2 view .LVU697 + 2324 .LBB416: + 2325 .LBI416: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3008 .loc 4 905 26 view .LVU927 - 3009 .LBB427: + 2326 .loc 4 905 26 view .LVU698 + 2327 .LBB417: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3010 .loc 4 907 3 view .LVU928 + 2328 .loc 4 907 3 view .LVU699 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3011 .loc 4 907 12 is_stmt 0 view .LVU929 - 3012 0060 0A4A ldr r2, .L217+4 - 3013 0062 9268 ldr r2, [r2, #8] + 2329 .loc 4 907 12 is_stmt 0 view .LVU700 + 2330 0064 1A4A ldr r2, .L165+8 + 2331 0066 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3014 .loc 4 907 68 view .LVU930 - 3015 0064 12F0010F tst r2, #1 - 3016 0068 05D1 bne .L212 - 3017 .LVL341: + 2332 .loc 4 907 68 view .LVU701 + 2333 0068 12F0010F tst r2, #1 + 2334 006c 05D1 bne .L154 + 2335 .LVL220: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3018 .loc 4 907 68 view .LVU931 - 3019 .LBE427: - 3020 .LBE426: -2687:Src/main.c **** (void) SPI2->DR; - ARM GAS /tmp/ccuHnxNu.s page 193 + 2336 .loc 4 907 68 view .LVU702 + 2337 .LBE417: + 2338 .LBE416: +2927:Src/main.c **** (void) SPI2->DR; + 2339 .loc 1 2927 51 discriminator 1 view .LVU703 + 2340 006e 5A1C adds r2, r3, #1 + 2341 .LVL221: +2927:Src/main.c **** (void) SPI2->DR; + 2342 .loc 1 2927 42 discriminator 1 view .LVU704 + 2343 0070 B3F57A7F cmp r3, #1000 + ARM GAS /tmp/ccLSPxIe.s page 181 - 3021 .loc 1 2687 51 discriminator 1 view .LVU932 - 3022 006a 5A1C adds r2, r3, #1 - 3023 .LVL342: -2687:Src/main.c **** (void) SPI2->DR; - 3024 .loc 1 2687 42 discriminator 1 view .LVU933 - 3025 006c B3F57A7F cmp r3, #1000 - 3026 0070 01D2 bcs .L212 -2687:Src/main.c **** (void) SPI2->DR; - 3027 .loc 1 2687 51 discriminator 1 view .LVU934 - 3028 0072 1346 mov r3, r2 - 3029 0074 F4E7 b .L213 - 3030 .LVL343: - 3031 .L212: -2688:Src/main.c **** - 3032 .loc 1 2688 2 is_stmt 1 view .LVU935 - 3033 0076 054B ldr r3, .L217+4 - 3034 0078 DB68 ldr r3, [r3, #12] -2690:Src/main.c **** } - 3035 .loc 1 2690 2 view .LVU936 - 3036 007a 0122 movs r2, #1 - 3037 007c 4FF40051 mov r1, #8192 - 3038 0080 0348 ldr r0, .L217+8 - 3039 0082 FFF7FEFF bl HAL_GPIO_WritePin - 3040 .LVL344: -2691:Src/main.c **** - 3041 .loc 1 2691 1 is_stmt 0 view .LVU937 - 3042 0086 38BD pop {r3, r4, r5, pc} - 3043 .LVL345: - 3044 .L218: -2691:Src/main.c **** - 3045 .loc 1 2691 1 view .LVU938 - 3046 .align 2 - 3047 .L217: - 3048 0088 00040240 .word 1073873920 - 3049 008c 00380040 .word 1073756160 - 3050 0090 000C0240 .word 1073875968 - 3051 .cfi_endproc - 3052 .LFE1214: - 3054 .section .text.AD9833_Apply,"ax",%progbits - 3055 .align 1 - 3056 .syntax unified - 3057 .thumb - 3058 .thumb_func - 3060 AD9833_Apply: - 3061 .LVL346: - 3062 .LFB1215: -2694:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 - 3063 .loc 1 2694 1 is_stmt 1 view -0 - 3064 .cfi_startproc - 3065 @ args = 0, pretend = 0, frame = 0 - 3066 @ frame_needed = 0, uses_anonymous_args = 0 -2694:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 - 3067 .loc 1 2694 1 is_stmt 0 view .LVU940 - 3068 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 3069 .LCFI33: - 3070 .cfi_def_cfa_offset 24 - 3071 .cfi_offset 4, -24 - ARM GAS /tmp/ccuHnxNu.s page 194 + 2344 0074 01D2 bcs .L154 +2927:Src/main.c **** (void) SPI2->DR; + 2345 .loc 1 2927 51 discriminator 1 view .LVU705 + 2346 0076 1346 mov r3, r2 + 2347 0078 F4E7 b .L155 + 2348 .LVL222: + 2349 .L154: +2928:Src/main.c **** + 2350 .loc 1 2928 2 is_stmt 1 view .LVU706 + 2351 007a 154B ldr r3, .L165+8 + 2352 007c DB68 ldr r3, [r3, #12] +2930:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 2353 .loc 1 2930 2 view .LVU707 + 2354 .LVL223: +2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 2355 .loc 1 2931 2 view .LVU708 +2930:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {} + 2356 .loc 1 2930 8 is_stmt 0 view .LVU709 + 2357 007e 0023 movs r3, #0 + 2358 .LVL224: + 2359 .L157: +2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 2360 .loc 1 2931 63 is_stmt 1 discriminator 2 view .LVU710 +2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 2361 .loc 1 2931 41 discriminator 2 view .LVU711 + 2362 .LBB418: + 2363 .LBI418: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 2364 .loc 4 916 26 view .LVU712 + 2365 .LBB419: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2366 .loc 4 918 3 view .LVU713 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2367 .loc 4 918 12 is_stmt 0 view .LVU714 + 2368 0080 134A ldr r2, .L165+8 + 2369 0082 9268 ldr r2, [r2, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2370 .loc 4 918 66 view .LVU715 + 2371 0084 12F0020F tst r2, #2 + 2372 0088 05D1 bne .L156 + 2373 .LVL225: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2374 .loc 4 918 66 view .LVU716 + 2375 .LBE419: + 2376 .LBE418: +2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 2377 .loc 1 2931 50 discriminator 1 view .LVU717 + 2378 008a 5A1C adds r2, r3, #1 + 2379 .LVL226: +2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 2380 .loc 1 2931 41 discriminator 1 view .LVU718 + 2381 008c B3F57A7F cmp r3, #1000 + 2382 0090 01D2 bcs .L156 +2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u); + 2383 .loc 1 2931 50 discriminator 1 view .LVU719 + 2384 0092 1346 mov r3, r2 + 2385 0094 F4E7 b .L157 + ARM GAS /tmp/ccLSPxIe.s page 182 - 3072 .cfi_offset 5, -20 - 3073 .cfi_offset 6, -16 - 3074 .cfi_offset 7, -12 - 3075 .cfi_offset 8, -8 - 3076 .cfi_offset 14, -4 - 3077 0004 0546 mov r5, r0 -2695:Src/main.c **** if (triangle) - 3078 .loc 1 2695 2 is_stmt 1 view .LVU941 - 3079 .LVL347: -2696:Src/main.c **** { - 3080 .loc 1 2696 2 view .LVU942 -2696:Src/main.c **** { - 3081 .loc 1 2696 5 is_stmt 0 view .LVU943 - 3082 0006 F9B9 cbnz r1, .L222 -2695:Src/main.c **** if (triangle) - 3083 .loc 1 2695 11 view .LVU944 - 3084 0008 4FF40057 mov r7, #8192 - 3085 .L220: - 3086 .LVL348: + 2386 .LVL227: + 2387 .L156: +2932:Src/main.c **** tmp32 = 0; + 2388 .loc 1 2932 2 is_stmt 1 view .LVU720 + 2389 .LBB420: + 2390 .LBI420: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 2391 .loc 4 1373 22 view .LVU721 + 2392 .LBB421: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 2393 .loc 4 1376 3 view .LVU722 + 2394 .loc 4 1377 3 view .LVU723 + 2395 .loc 4 1377 10 is_stmt 0 view .LVU724 + 2396 0096 0023 movs r3, #0 + 2397 0098 0D4A ldr r2, .L165+8 + 2398 009a 9381 strh r3, [r2, #12] @ movhi + 2399 .LVL228: + 2400 .loc 4 1377 10 view .LVU725 + 2401 .LBE421: + 2402 .LBE420: +2933:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 2403 .loc 1 2933 2 is_stmt 1 view .LVU726 +2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 2404 .loc 1 2934 2 view .LVU727 + 2405 .L159: +2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 2406 .loc 1 2934 64 discriminator 2 view .LVU728 +2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 2407 .loc 1 2934 42 discriminator 2 view .LVU729 + 2408 .LBB422: + 2409 .LBI422: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 2410 .loc 4 905 26 view .LVU730 + 2411 .LBB423: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2412 .loc 4 907 3 view .LVU731 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2413 .loc 4 907 12 is_stmt 0 view .LVU732 + 2414 009c 0C4A ldr r2, .L165+8 + 2415 009e 9268 ldr r2, [r2, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2416 .loc 4 907 68 view .LVU733 + 2417 00a0 12F0010F tst r2, #1 + 2418 00a4 05D1 bne .L158 + 2419 .LVL229: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2420 .loc 4 907 68 view .LVU734 + 2421 .LBE423: + 2422 .LBE422: +2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 2423 .loc 1 2934 51 discriminator 1 view .LVU735 + 2424 00a6 5A1C adds r2, r3, #1 + 2425 .LVL230: +2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 2426 .loc 1 2934 42 discriminator 1 view .LVU736 + 2427 00a8 B3F57A7F cmp r3, #1000 + 2428 00ac 01D2 bcs .L158 + ARM GAS /tmp/ccLSPxIe.s page 183 + + +2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2); + 2429 .loc 1 2934 51 discriminator 1 view .LVU737 + 2430 00ae 1346 mov r3, r2 + 2431 00b0 F4E7 b .L159 + 2432 .LVL231: + 2433 .L158: +2935:Src/main.c **** + 2434 .loc 1 2935 2 is_stmt 1 view .LVU738 + 2435 .LBB424: + 2436 .LBI424: +1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 2437 .loc 4 1344 26 view .LVU739 + 2438 .LBB425: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2439 .loc 4 1346 3 view .LVU740 +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2440 .loc 4 1346 21 is_stmt 0 view .LVU741 + 2441 00b2 074B ldr r3, .L165+8 + 2442 00b4 DC68 ldr r4, [r3, #12] + 2443 .LVL232: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2444 .loc 4 1346 10 view .LVU742 + 2445 00b6 A4B2 uxth r4, r4 + 2446 .LVL233: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 2447 .loc 4 1346 10 view .LVU743 + 2448 .LBE425: + 2449 .LBE424: +2937:Src/main.c **** return value; + 2450 .loc 1 2937 2 is_stmt 1 view .LVU744 + 2451 00b8 0122 movs r2, #1 + 2452 00ba 4FF48051 mov r1, #4096 + 2453 00be 0248 ldr r0, .L165 + 2454 00c0 FFF7FEFF bl HAL_GPIO_WritePin + 2455 .LVL234: +2938:Src/main.c **** } + 2456 .loc 1 2938 2 view .LVU745 +2939:Src/main.c **** + 2457 .loc 1 2939 1 is_stmt 0 view .LVU746 + 2458 00c4 2046 mov r0, r4 + 2459 00c6 10BD pop {r4, pc} + 2460 .LVL235: + 2461 .L166: +2939:Src/main.c **** + 2462 .loc 1 2939 1 view .LVU747 + 2463 .align 2 + 2464 .L165: + 2465 00c8 00040240 .word 1073873920 + 2466 00cc 000C0240 .word 1073875968 + 2467 00d0 00380040 .word 1073756160 + 2468 .cfi_endproc + 2469 .LFE1220: + 2471 .section .text.AD9102_ApplySram,"ax",%progbits + 2472 .align 1 + 2473 .syntax unified + 2474 .thumb + 2475 .thumb_func + ARM GAS /tmp/ccLSPxIe.s page 184 + + + 2477 AD9102_ApplySram: + 2478 .LVL236: + 2479 .LFB1232: +3243:Src/main.c **** AD9102_ResetWaveUploadState(); + 2480 .loc 1 3243 1 is_stmt 1 view -0 + 2481 .cfi_startproc + 2482 @ args = 4, pretend = 0, frame = 0 + 2483 @ frame_needed = 0, uses_anonymous_args = 0 +3243:Src/main.c **** AD9102_ResetWaveUploadState(); + 2484 .loc 1 3243 1 is_stmt 0 view .LVU749 + 2485 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 2486 .LCFI24: + 2487 .cfi_def_cfa_offset 24 + 2488 .cfi_offset 4, -24 + 2489 .cfi_offset 5, -20 + 2490 .cfi_offset 6, -16 + 2491 .cfi_offset 7, -12 + 2492 .cfi_offset 8, -8 + 2493 .cfi_offset 14, -4 + 2494 0004 0646 mov r6, r0 + 2495 0006 0C46 mov r4, r1 + 2496 0008 1546 mov r5, r2 + 2497 000a 1F46 mov r7, r3 + 2498 000c BDF81880 ldrh r8, [sp, #24] +3244:Src/main.c **** + 2499 .loc 1 3244 2 is_stmt 1 view .LVU750 + 2500 0010 FFF7FEFF bl AD9102_ResetWaveUploadState + 2501 .LVL237: +3246:Src/main.c **** { + 2502 .loc 1 3246 2 view .LVU751 +3246:Src/main.c **** { + 2503 .loc 1 3246 5 is_stmt 0 view .LVU752 + 2504 0014 1CB1 cbz r4, .L174 +3250:Src/main.c **** { + 2505 .loc 1 3250 2 is_stmt 1 view .LVU753 +3250:Src/main.c **** { + 2506 .loc 1 3250 5 is_stmt 0 view .LVU754 + 2507 0016 012C cmp r4, #1 + 2508 0018 02D8 bhi .L168 +3252:Src/main.c **** } + 2509 .loc 1 3252 11 view .LVU755 + 2510 001a 0224 movs r4, #2 + 2511 .LVL238: +3252:Src/main.c **** } + 2512 .loc 1 3252 11 view .LVU756 + 2513 001c 03E0 b .L169 + 2514 .LVL239: + 2515 .L174: +3248:Src/main.c **** } + 2516 .loc 1 3248 11 view .LVU757 + 2517 001e 1024 movs r4, #16 + 2518 .LVL240: + 2519 .L168: +3254:Src/main.c **** { + 2520 .loc 1 3254 2 is_stmt 1 view .LVU758 +3254:Src/main.c **** { + 2521 .loc 1 3254 5 is_stmt 0 view .LVU759 + ARM GAS /tmp/ccLSPxIe.s page 185 + + + 2522 0020 B4F5805F cmp r4, #4096 + 2523 0024 04D8 bhi .L176 + 2524 .LVL241: + 2525 .L169: +3258:Src/main.c **** { + 2526 .loc 1 3258 2 is_stmt 1 view .LVU760 +3258:Src/main.c **** { + 2527 .loc 1 3258 5 is_stmt 0 view .LVU761 + 2528 0026 35B1 cbz r5, .L177 +3262:Src/main.c **** { + 2529 .loc 1 3262 2 is_stmt 1 view .LVU762 +3262:Src/main.c **** { + 2530 .loc 1 3262 5 is_stmt 0 view .LVU763 + 2531 0028 0F2D cmp r5, #15 + 2532 002a 05D9 bls .L170 +3264:Src/main.c **** } + 2533 .loc 1 3264 8 view .LVU764 + 2534 002c 0F25 movs r5, #15 + 2535 .LVL242: +3264:Src/main.c **** } + 2536 .loc 1 3264 8 view .LVU765 + 2537 002e 03E0 b .L170 + 2538 .LVL243: + 2539 .L176: +3256:Src/main.c **** } + 2540 .loc 1 3256 11 view .LVU766 + 2541 0030 4FF48054 mov r4, #4096 + 2542 .LVL244: +3256:Src/main.c **** } + 2543 .loc 1 3256 11 view .LVU767 + 2544 0034 F7E7 b .L169 + 2545 .LVL245: + 2546 .L177: +3260:Src/main.c **** } + 2547 .loc 1 3260 8 view .LVU768 + 2548 0036 0125 movs r5, #1 + 2549 .LVL246: + 2550 .L170: +3267:Src/main.c **** { + 2551 .loc 1 3267 2 is_stmt 1 view .LVU769 +3267:Src/main.c **** { + 2552 .loc 1 3267 5 is_stmt 0 view .LVU770 + 2553 0038 B8F5005F cmp r8, #8192 + 2554 003c 01D3 bcc .L171 +3269:Src/main.c **** } + 2555 .loc 1 3269 13 view .LVU771 + 2556 003e 41F6FF78 movw r8, #8191 + 2557 .L171: + 2558 .LVL247: +3272:Src/main.c **** AD9102_LoadSramRamp(samples, triangle, amplitude); + 2559 .loc 1 3272 2 is_stmt 1 view .LVU772 + 2560 0042 2946 mov r1, r5 + 2561 0044 2046 mov r0, r4 + 2562 0046 FFF7FEFF bl AD9102_ConfigureSramPlayback + 2563 .LVL248: +3273:Src/main.c **** + 2564 .loc 1 3273 2 view .LVU773 + ARM GAS /tmp/ccLSPxIe.s page 186 + + + 2565 004a 4246 mov r2, r8 + 2566 004c 3946 mov r1, r7 + 2567 004e 2046 mov r0, r4 + 2568 0050 FFF7FEFF bl AD9102_LoadSramRamp + 2569 .LVL249: +3275:Src/main.c **** { + 2570 .loc 1 3275 2 view .LVU774 +3275:Src/main.c **** { + 2571 .loc 1 3275 5 is_stmt 0 view .LVU775 + 2572 0054 36B1 cbz r6, .L172 +3277:Src/main.c **** } + 2573 .loc 1 3277 3 is_stmt 1 view .LVU776 + 2574 0056 FFF7FEFF bl AD9102_StartOutput + 2575 .LVL250: + 2576 .L173: +3284:Src/main.c **** } + 2577 .loc 1 3284 2 view .LVU777 +3284:Src/main.c **** } + 2578 .loc 1 3284 9 is_stmt 0 view .LVU778 + 2579 005a 1E20 movs r0, #30 + 2580 005c FFF7FEFF bl AD9102_ReadReg + 2581 .LVL251: +3285:Src/main.c **** + 2582 .loc 1 3285 1 view .LVU779 + 2583 0060 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 2584 .LVL252: + 2585 .L172: +3281:Src/main.c **** } + 2586 .loc 1 3281 3 is_stmt 1 view .LVU780 + 2587 0064 FFF7FEFF bl AD9102_StopOutput + 2588 .LVL253: + 2589 0068 F7E7 b .L173 + 2590 .cfi_endproc + 2591 .LFE1232: + 2593 .section .text.AD9102_Apply,"ax",%progbits + 2594 .align 1 + 2595 .syntax unified + 2596 .thumb + 2597 .thumb_func + 2599 AD9102_Apply: + 2600 .LVL254: + 2601 .LFB1230: +3116:Src/main.c **** AD9102_ResetWaveUploadState(); + 2602 .loc 1 3116 1 view -0 + 2603 .cfi_startproc + 2604 @ args = 4, pretend = 0, frame = 0 + 2605 @ frame_needed = 0, uses_anonymous_args = 0 +3116:Src/main.c **** AD9102_ResetWaveUploadState(); + 2606 .loc 1 3116 1 is_stmt 0 view .LVU782 + 2607 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 2608 .LCFI25: + 2609 .cfi_def_cfa_offset 24 + 2610 .cfi_offset 3, -24 + 2611 .cfi_offset 4, -20 + 2612 .cfi_offset 5, -16 + 2613 .cfi_offset 6, -12 + 2614 .cfi_offset 7, -8 + ARM GAS /tmp/ccLSPxIe.s page 187 + + + 2615 .cfi_offset 14, -4 + 2616 0002 0546 mov r5, r0 + 2617 0004 0F46 mov r7, r1 + 2618 0006 1446 mov r4, r2 + 2619 0008 1E46 mov r6, r3 +3117:Src/main.c **** + 2620 .loc 1 3117 2 is_stmt 1 view .LVU783 + 2621 000a FFF7FEFF bl AD9102_ResetWaveUploadState + 2622 .LVL255: +3119:Src/main.c **** { + 2623 .loc 1 3119 2 view .LVU784 +3119:Src/main.c **** { + 2624 .loc 1 3119 5 is_stmt 0 view .LVU785 + 2625 000e 67B3 cbz r7, .L182 + 2626 .LBB426: +3121:Src/main.c **** uint16_t pat_timebase; + 2627 .loc 1 3121 3 is_stmt 1 view .LVU786 +3122:Src/main.c **** + 2628 .loc 1 3122 3 view .LVU787 +3124:Src/main.c **** { + 2629 .loc 1 3124 3 view .LVU788 +3124:Src/main.c **** { + 2630 .loc 1 3124 6 is_stmt 0 view .LVU789 + 2631 0010 1CB1 cbz r4, .L185 +3128:Src/main.c **** { + 2632 .loc 1 3128 3 is_stmt 1 view .LVU790 +3128:Src/main.c **** { + 2633 .loc 1 3128 6 is_stmt 0 view .LVU791 + 2634 0012 3F2C cmp r4, #63 + 2635 0014 02D9 bls .L183 +3130:Src/main.c **** } + 2636 .loc 1 3130 13 view .LVU792 + 2637 0016 3F24 movs r4, #63 + 2638 .LVL256: +3130:Src/main.c **** } + 2639 .loc 1 3130 13 view .LVU793 + 2640 0018 00E0 b .L183 + 2641 .LVL257: + 2642 .L185: +3126:Src/main.c **** } + 2643 .loc 1 3126 13 view .LVU794 + 2644 001a 0124 movs r4, #1 + 2645 .LVL258: + 2646 .L183: +3132:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2647 .loc 1 3132 3 is_stmt 1 view .LVU795 +3133:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 2648 .loc 1 3133 25 is_stmt 0 view .LVU796 + 2649 001c 05F00305 and r5, r5, #3 + 2650 .LVL259: +3132:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2651 .loc 1 3132 60 view .LVU797 + 2652 0020 A400 lsls r4, r4, #2 + 2653 .LVL260: +3132:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2654 .loc 1 3132 60 view .LVU798 + 2655 0022 E4B2 uxtb r4, r4 + ARM GAS /tmp/ccLSPxIe.s page 188 + + +3132:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2656 .loc 1 3132 11 view .LVU799 + 2657 0024 2543 orrs r5, r5, r4 + 2658 .LVL261: +3134:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2659 .loc 1 3134 3 is_stmt 1 view .LVU800 +3135:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 2660 .loc 1 3135 49 is_stmt 0 view .LVU801 + 2661 0026 3301 lsls r3, r6, #4 + 2662 0028 03F0F003 and r3, r3, #240 +3134:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2663 .loc 1 3134 16 view .LVU802 + 2664 002c 40F20114 movw r4, #257 + 2665 0030 1C43 orrs r4, r4, r3 + 2666 .LVL262: +3138:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg); + 2667 .loc 1 3138 3 is_stmt 1 view .LVU803 + 2668 0032 43F21221 movw r1, #12818 + 2669 0036 2720 movs r0, #39 + 2670 0038 FFF7FEFF bl AD9102_WriteReg + 2671 .LVL263: +3139:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase); + 2672 .loc 1 3139 3 view .LVU804 + 2673 003c 2946 mov r1, r5 + 2674 003e 3720 movs r0, #55 + 2675 0040 FFF7FEFF bl AD9102_WriteReg + 2676 .LVL264: +3140:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period); + 2677 .loc 1 3140 3 view .LVU805 + 2678 0044 2146 mov r1, r4 + 2679 0046 2820 movs r0, #40 + 2680 0048 FFF7FEFF bl AD9102_WriteReg + 2681 .LVL265: +3141:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat + 2682 .loc 1 3141 3 view .LVU806 + 2683 004c BDF81810 ldrh r1, [sp, #24] + 2684 0050 2920 movs r0, #41 + 2685 0052 FFF7FEFF bl AD9102_WriteReg + 2686 .LVL266: +3142:Src/main.c **** + 2687 .loc 1 3142 3 view .LVU807 + 2688 0056 0021 movs r1, #0 + 2689 0058 1F20 movs r0, #31 + 2690 005a FFF7FEFF bl AD9102_WriteReg + 2691 .LVL267: +3144:Src/main.c **** } + 2692 .loc 1 3144 3 view .LVU808 + 2693 005e FFF7FEFF bl AD9102_StartOutput + 2694 .LVL268: + 2695 .L184: +3144:Src/main.c **** } + 2696 .loc 1 3144 3 is_stmt 0 view .LVU809 + 2697 .LBE426: +3151:Src/main.c **** } + 2698 .loc 1 3151 2 is_stmt 1 view .LVU810 +3151:Src/main.c **** } + 2699 .loc 1 3151 9 is_stmt 0 view .LVU811 + ARM GAS /tmp/ccLSPxIe.s page 189 + + + 2700 0062 1E20 movs r0, #30 + 2701 0064 FFF7FEFF bl AD9102_ReadReg + 2702 .LVL269: +3152:Src/main.c **** + 2703 .loc 1 3152 1 view .LVU812 + 2704 0068 F8BD pop {r3, r4, r5, r6, r7, pc} + 2705 .LVL270: + 2706 .L182: +3148:Src/main.c **** } + 2707 .loc 1 3148 3 is_stmt 1 view .LVU813 + 2708 006a FFF7FEFF bl AD9102_StopOutput + 2709 .LVL271: + 2710 006e F8E7 b .L184 + 2711 .cfi_endproc + 2712 .LFE1230: + 2714 .section .text.AD9102_CheckFlags,"ax",%progbits + 2715 .align 1 + 2716 .syntax unified + 2717 .thumb + 2718 .thumb_func + 2720 AD9102_CheckFlags: + 2721 .LVL272: + 2722 .LFB1233: +3288:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 2723 .loc 1 3288 1 view -0 + 2724 .cfi_startproc + 2725 @ args = 8, pretend = 0, frame = 8 + 2726 @ frame_needed = 0, uses_anonymous_args = 0 +3288:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 2727 .loc 1 3288 1 is_stmt 0 view .LVU815 + 2728 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2729 .LCFI26: + 2730 .cfi_def_cfa_offset 36 + 2731 .cfi_offset 4, -36 + 2732 .cfi_offset 5, -32 + 2733 .cfi_offset 6, -28 + 2734 .cfi_offset 7, -24 + 2735 .cfi_offset 8, -20 + 2736 .cfi_offset 9, -16 + 2737 .cfi_offset 10, -12 + 2738 .cfi_offset 11, -8 + 2739 .cfi_offset 14, -4 + 2740 0004 83B0 sub sp, sp, #12 + 2741 .LCFI27: + 2742 .cfi_def_cfa_offset 48 + 2743 0006 0190 str r0, [sp, #4] + 2744 0008 0F46 mov r7, r1 + 2745 000a 1546 mov r5, r2 + 2746 000c 1C46 mov r4, r3 + 2747 000e BDF834B0 ldrh fp, [sp, #52] +3289:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 2748 .loc 1 3289 2 is_stmt 1 view .LVU816 +3289:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 2749 .loc 1 3289 23 is_stmt 0 view .LVU817 + 2750 0012 0020 movs r0, #0 + 2751 .LVL273: +3289:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + ARM GAS /tmp/ccLSPxIe.s page 190 + + + 2752 .loc 1 3289 23 view .LVU818 + 2753 0014 FFF7FEFF bl AD9102_ReadReg + 2754 .LVL274: +3289:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 2755 .loc 1 3289 23 view .LVU819 + 2756 0018 8246 mov r10, r0 + 2757 .LVL275: +3290:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 2758 .loc 1 3290 2 is_stmt 1 view .LVU820 +3290:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 2759 .loc 1 3290 22 is_stmt 0 view .LVU821 + 2760 001a 0120 movs r0, #1 + 2761 001c FFF7FEFF bl AD9102_ReadReg + 2762 .LVL276: + 2763 0020 8146 mov r9, r0 + 2764 .LVL277: +3291:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 2765 .loc 1 3291 2 is_stmt 1 view .LVU822 +3291:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 2766 .loc 1 3291 22 is_stmt 0 view .LVU823 + 2767 0022 0220 movs r0, #2 + 2768 0024 FFF7FEFF bl AD9102_ReadReg + 2769 .LVL278: + 2770 0028 8046 mov r8, r0 + 2771 .LVL279: +3292:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 2772 .loc 1 3292 2 is_stmt 1 view .LVU824 +3292:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) | + 2773 .loc 1 3292 21 is_stmt 0 view .LVU825 + 2774 002a 6020 movs r0, #96 + 2775 002c FFF7FEFF bl AD9102_ReadReg + 2776 .LVL280: +3293:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2777 .loc 1 3293 2 is_stmt 1 view .LVU826 +3294:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu)); + 2778 .loc 1 3294 57 is_stmt 0 view .LVU827 + 2779 0030 9DF83030 ldrb r3, [sp, #48] @ zero_extendqisi2 + 2780 0034 1B01 lsls r3, r3, #4 + 2781 0036 03F0F003 and r3, r3, #240 +3293:Src/main.c **** ((pat_base & 0x0Fu) << 4) | + 2782 .loc 1 3293 11 view .LVU828 + 2783 003a 40F20116 movw r6, #257 + 2784 003e 1E43 orrs r6, r6, r3 + 2785 .LVL281: +3297:Src/main.c **** { + 2786 .loc 1 3297 2 is_stmt 1 view .LVU829 +3297:Src/main.c **** { + 2787 .loc 1 3297 5 is_stmt 0 view .LVU830 + 2788 0040 1CB1 cbz r4, .L201 +3301:Src/main.c **** { + 2789 .loc 1 3301 2 is_stmt 1 view .LVU831 +3301:Src/main.c **** { + 2790 .loc 1 3301 5 is_stmt 0 view .LVU832 + 2791 0042 3F2C cmp r4, #63 + 2792 0044 02D9 bls .L189 +3303:Src/main.c **** } + 2793 .loc 1 3303 12 view .LVU833 + ARM GAS /tmp/ccLSPxIe.s page 191 + + + 2794 0046 3F24 movs r4, #63 + 2795 .LVL282: +3303:Src/main.c **** } + 2796 .loc 1 3303 12 view .LVU834 + 2797 0048 00E0 b .L189 + 2798 .LVL283: + 2799 .L201: +3299:Src/main.c **** } + 2800 .loc 1 3299 12 view .LVU835 + 2801 004a 0124 movs r4, #1 + 2802 .LVL284: + 2803 .L189: +3305:Src/main.c **** { + 2804 .loc 1 3305 2 is_stmt 1 view .LVU836 +3305:Src/main.c **** { + 2805 .loc 1 3305 5 is_stmt 0 view .LVU837 + 2806 004c BBF1000F cmp fp, #0 + 2807 0050 01D1 bne .L190 +3307:Src/main.c **** } + 2808 .loc 1 3307 14 view .LVU838 + 2809 0052 4FF6FF7B movw fp, #65535 + 2810 .L190: + 2811 .LVL285: +3309:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2812 .loc 1 3309 2 is_stmt 1 view .LVU839 +3310:Src/main.c **** + 2813 .loc 1 3310 35 is_stmt 0 view .LVU840 + 2814 0056 05F00305 and r5, r5, #3 + 2815 .LVL286: +3309:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2816 .loc 1 3309 71 view .LVU841 + 2817 005a A400 lsls r4, r4, #2 + 2818 .LVL287: +3309:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2819 .loc 1 3309 71 view .LVU842 + 2820 005c E4B2 uxtb r4, r4 +3309:Src/main.c **** ((uint16_t)(saw_type & 0x3u))); + 2821 .loc 1 3309 11 view .LVU843 + 2822 005e 2543 orrs r5, r5, r4 + 2823 .LVL288: +3312:Src/main.c **** + 2824 .loc 1 3312 2 is_stmt 1 view .LVU844 +3315:Src/main.c **** { + 2825 .loc 1 3315 2 view .LVU845 +3315:Src/main.c **** { + 2826 .loc 1 3315 5 is_stmt 0 view .LVU846 + 2827 0060 BAF1000F cmp r10, #0 + 2828 0064 36D1 bne .L204 +3312:Src/main.c **** + 2829 .loc 1 3312 10 view .LVU847 + 2830 0066 0124 movs r4, #1 + 2831 .L191: + 2832 .LVL289: +3321:Src/main.c **** { + 2833 .loc 1 3321 2 is_stmt 1 view .LVU848 +3321:Src/main.c **** { + 2834 .loc 1 3321 5 is_stmt 0 view .LVU849 + ARM GAS /tmp/ccLSPxIe.s page 192 + + + 2835 0068 19F4F47F tst r9, #488 + 2836 006c 00D0 beq .L192 +3323:Src/main.c **** } + 2837 .loc 1 3323 6 view .LVU850 + 2838 006e 0024 movs r4, #0 + 2839 .LVL290: + 2840 .L192: +3327:Src/main.c **** { + 2841 .loc 1 3327 2 is_stmt 1 view .LVU851 +3327:Src/main.c **** { + 2842 .loc 1 3327 5 is_stmt 0 view .LVU852 + 2843 0070 18F40E6F tst r8, #2272 + 2844 0074 00D0 beq .L193 +3329:Src/main.c **** } + 2845 .loc 1 3329 6 view .LVU853 + 2846 0076 0024 movs r4, #0 + 2847 .LVL291: + 2848 .L193: +3333:Src/main.c **** { + 2849 .loc 1 3333 2 is_stmt 1 view .LVU854 +3333:Src/main.c **** { + 2850 .loc 1 3333 5 is_stmt 0 view .LVU855 + 2851 0078 10F03F0F tst r0, #63 + 2852 007c 00D0 beq .L194 +3335:Src/main.c **** } + 2853 .loc 1 3335 6 view .LVU856 + 2854 007e 0024 movs r4, #0 + 2855 .LVL292: + 2856 .L194: +3338:Src/main.c **** { + 2857 .loc 1 3338 2 is_stmt 1 view .LVU857 +3338:Src/main.c **** { + 2858 .loc 1 3338 5 is_stmt 0 view .LVU858 + 2859 0080 27B1 cbz r7, .L195 +3338:Src/main.c **** { + 2860 .loc 1 3338 17 discriminator 1 view .LVU859 + 2861 0082 019B ldr r3, [sp, #4] + 2862 0084 13F0010F tst r3, #1 + 2863 0088 00D1 bne .L195 +3340:Src/main.c **** } + 2864 .loc 1 3340 6 view .LVU860 + 2865 008a 0024 movs r4, #0 + 2866 .LVL293: + 2867 .L195: +3343:Src/main.c **** { + 2868 .loc 1 3343 2 is_stmt 1 view .LVU861 +3343:Src/main.c **** { + 2869 .loc 1 3343 6 is_stmt 0 view .LVU862 + 2870 008c 2720 movs r0, #39 + 2871 .LVL294: +3343:Src/main.c **** { + 2872 .loc 1 3343 6 view .LVU863 + 2873 008e FFF7FEFF bl AD9102_ReadReg + 2874 .LVL295: +3343:Src/main.c **** { + 2875 .loc 1 3343 5 discriminator 1 view .LVU864 + 2876 0092 43F21223 movw r3, #12818 + ARM GAS /tmp/ccLSPxIe.s page 193 + + + 2877 0096 9842 cmp r0, r3 + 2878 0098 00D0 beq .L196 +3345:Src/main.c **** } + 2879 .loc 1 3345 6 view .LVU865 + 2880 009a 0024 movs r4, #0 + 2881 .LVL296: + 2882 .L196: +3347:Src/main.c **** { + 2883 .loc 1 3347 2 is_stmt 1 view .LVU866 +3347:Src/main.c **** { + 2884 .loc 1 3347 6 is_stmt 0 view .LVU867 + 2885 009c 2820 movs r0, #40 + 2886 009e FFF7FEFF bl AD9102_ReadReg + 2887 .LVL297: +3347:Src/main.c **** { + 2888 .loc 1 3347 5 discriminator 1 view .LVU868 + 2889 00a2 B042 cmp r0, r6 + 2890 00a4 00D0 beq .L197 +3349:Src/main.c **** } + 2891 .loc 1 3349 6 view .LVU869 + 2892 00a6 0024 movs r4, #0 + 2893 .LVL298: + 2894 .L197: +3351:Src/main.c **** { + 2895 .loc 1 3351 2 is_stmt 1 view .LVU870 +3351:Src/main.c **** { + 2896 .loc 1 3351 6 is_stmt 0 view .LVU871 + 2897 00a8 2920 movs r0, #41 + 2898 00aa FFF7FEFF bl AD9102_ReadReg + 2899 .LVL299: +3351:Src/main.c **** { + 2900 .loc 1 3351 5 discriminator 1 view .LVU872 + 2901 00ae 5845 cmp r0, fp + 2902 00b0 00D0 beq .L198 +3353:Src/main.c **** } + 2903 .loc 1 3353 6 view .LVU873 + 2904 00b2 0024 movs r4, #0 + 2905 .LVL300: + 2906 .L198: +3355:Src/main.c **** { + 2907 .loc 1 3355 2 is_stmt 1 view .LVU874 +3355:Src/main.c **** { + 2908 .loc 1 3355 6 is_stmt 0 view .LVU875 + 2909 00b4 1F20 movs r0, #31 + 2910 00b6 FFF7FEFF bl AD9102_ReadReg + 2911 .LVL301: +3355:Src/main.c **** { + 2912 .loc 1 3355 5 discriminator 1 view .LVU876 + 2913 00ba 00B1 cbz r0, .L199 +3357:Src/main.c **** } + 2914 .loc 1 3357 6 view .LVU877 + 2915 00bc 0024 movs r4, #0 + 2916 .LVL302: + 2917 .L199: +3359:Src/main.c **** { + 2918 .loc 1 3359 2 is_stmt 1 view .LVU878 +3359:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 194 + + + 2919 .loc 1 3359 6 is_stmt 0 view .LVU879 + 2920 00be 3720 movs r0, #55 + 2921 00c0 FFF7FEFF bl AD9102_ReadReg + 2922 .LVL303: +3359:Src/main.c **** { + 2923 .loc 1 3359 5 discriminator 1 view .LVU880 + 2924 00c4 A842 cmp r0, r5 + 2925 00c6 00D0 beq .L200 +3361:Src/main.c **** } + 2926 .loc 1 3361 6 view .LVU881 + 2927 00c8 0024 movs r4, #0 + 2928 .LVL304: + 2929 .L200: +3364:Src/main.c **** } + 2930 .loc 1 3364 2 is_stmt 1 view .LVU882 +3365:Src/main.c **** + 2931 .loc 1 3365 1 is_stmt 0 view .LVU883 + 2932 00ca 84F00100 eor r0, r4, #1 + 2933 00ce 03B0 add sp, sp, #12 + 2934 .LCFI28: + 2935 .cfi_remember_state + 2936 .cfi_def_cfa_offset 36 + 2937 @ sp needed + 2938 00d0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2939 .LVL305: + 2940 .L204: + 2941 .LCFI29: + 2942 .cfi_restore_state +3317:Src/main.c **** } + 2943 .loc 1 3317 6 view .LVU884 + 2944 00d4 0024 movs r4, #0 + 2945 00d6 C7E7 b .L191 + 2946 .cfi_endproc + 2947 .LFE1233: + 2949 .section .text.AD9102_CommitWaveUpload,"ax",%progbits + 2950 .align 1 + 2951 .syntax unified + 2952 .thumb + 2953 .thumb_func + 2955 AD9102_CommitWaveUpload: + 2956 .LVL306: + 2957 .LFB1228: +3074:Src/main.c **** uint16_t pat_status; + 2958 .loc 1 3074 1 is_stmt 1 view -0 + 2959 .cfi_startproc + 2960 @ args = 0, pretend = 0, frame = 0 + 2961 @ frame_needed = 0, uses_anonymous_args = 0 +3074:Src/main.c **** uint16_t pat_status; + 2962 .loc 1 3074 1 is_stmt 0 view .LVU886 + 2963 0000 38B5 push {r3, r4, r5, lr} + 2964 .LCFI30: + 2965 .cfi_def_cfa_offset 16 + 2966 .cfi_offset 3, -16 + 2967 .cfi_offset 4, -12 + 2968 .cfi_offset 5, -8 + 2969 .cfi_offset 14, -4 +3075:Src/main.c **** + ARM GAS /tmp/ccLSPxIe.s page 195 + + + 2970 .loc 1 3075 2 is_stmt 1 view .LVU887 +3077:Src/main.c **** { + 2971 .loc 1 3077 2 view .LVU888 +3077:Src/main.c **** { + 2972 .loc 1 3077 5 is_stmt 0 view .LVU889 + 2973 0002 0546 mov r5, r0 + 2974 0004 08B1 cbz r0, .L216 +3079:Src/main.c **** } + 2975 .loc 1 3079 3 is_stmt 1 view .LVU890 +3079:Src/main.c **** } + 2976 .loc 1 3079 7 is_stmt 0 view .LVU891 + 2977 0006 0023 movs r3, #0 + 2978 0008 0370 strb r3, [r0] + 2979 .L216: +3082:Src/main.c **** (ad9102_wave_expected_samples < 2u) || + 2980 .loc 1 3082 2 is_stmt 1 view .LVU892 +3082:Src/main.c **** (ad9102_wave_expected_samples < 2u) || + 2981 .loc 1 3082 33 is_stmt 0 view .LVU893 + 2982 000a 1A4B ldr r3, .L221 + 2983 000c 1B78 ldrb r3, [r3] @ zero_extendqisi2 +3082:Src/main.c **** (ad9102_wave_expected_samples < 2u) || + 2984 .loc 1 3082 5 view .LVU894 + 2985 000e 3BB1 cbz r3, .L217 +3083:Src/main.c **** (ad9102_wave_written_samples != ad9102_wave_expected_samples)) + 2986 .loc 1 3083 36 view .LVU895 + 2987 0010 194B ldr r3, .L221+4 + 2988 0012 1B88 ldrh r3, [r3] +3082:Src/main.c **** (ad9102_wave_expected_samples < 2u) || + 2989 .loc 1 3082 40 discriminator 1 view .LVU896 + 2990 0014 012B cmp r3, #1 + 2991 0016 03D9 bls .L217 +3084:Src/main.c **** { + 2992 .loc 1 3084 35 view .LVU897 + 2993 0018 184A ldr r2, .L221+8 + 2994 001a 1288 ldrh r2, [r2] +3083:Src/main.c **** (ad9102_wave_written_samples != ad9102_wave_expected_samples)) + 2995 .loc 1 3083 42 view .LVU898 + 2996 001c 9342 cmp r3, r2 + 2997 001e 07D0 beq .L218 + 2998 .L217: +3086:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS); + 2999 .loc 1 3086 3 is_stmt 1 view .LVU899 + 3000 0020 FFF7FEFF bl AD9102_CancelWaveUpload + 3001 .LVL307: +3087:Src/main.c **** } + 3002 .loc 1 3087 3 view .LVU900 +3087:Src/main.c **** } + 3003 .loc 1 3087 10 is_stmt 0 view .LVU901 + 3004 0024 1E20 movs r0, #30 + 3005 0026 FFF7FEFF bl AD9102_ReadReg + 3006 .LVL308: + 3007 002a 0446 mov r4, r0 + 3008 .L219: +3104:Src/main.c **** + 3009 .loc 1 3104 1 view .LVU902 + 3010 002c 2046 mov r0, r4 + 3011 002e 38BD pop {r3, r4, r5, pc} + ARM GAS /tmp/ccLSPxIe.s page 196 + + + 3012 .LVL309: + 3013 .L218: +3090:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); + 3014 .loc 1 3090 2 is_stmt 1 view .LVU903 + 3015 0030 0021 movs r1, #0 + 3016 0032 1E20 movs r0, #30 + 3017 .LVL310: +3090:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u); + 3018 .loc 1 3090 2 is_stmt 0 view .LVU904 + 3019 0034 FFF7FEFF bl AD9102_WriteReg + 3020 .LVL311: +3091:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((ad9102_wave_expected_samples - 1u) << 4)); + 3021 .loc 1 3091 2 is_stmt 1 view .LVU905 + 3022 0038 0021 movs r1, #0 + 3023 003a 5D20 movs r0, #93 + 3024 003c FFF7FEFF bl AD9102_WriteReg + 3025 .LVL312: +3092:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 3026 .loc 1 3092 2 view .LVU906 +3092:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 3027 .loc 1 3092 81 is_stmt 0 view .LVU907 + 3028 0040 0D4B ldr r3, .L221+4 + 3029 0042 1988 ldrh r1, [r3] + 3030 0044 0139 subs r1, r1, #1 + 3031 0046 89B2 uxth r1, r1 +3092:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); + 3032 .loc 1 3092 2 view .LVU908 + 3033 0048 0901 lsls r1, r1, #4 + 3034 004a 89B2 uxth r1, r1 + 3035 004c 5E20 movs r0, #94 + 3036 004e FFF7FEFF bl AD9102_WriteReg + 3037 .LVL313: +3093:Src/main.c **** AD9102_StartOutput(); + 3038 .loc 1 3093 2 is_stmt 1 view .LVU909 + 3039 0052 0121 movs r1, #1 + 3040 0054 1D20 movs r0, #29 + 3041 0056 FFF7FEFF bl AD9102_WriteReg + 3042 .LVL314: +3094:Src/main.c **** pat_status = AD9102_ReadReg(AD9102_REG_PAT_STATUS); + 3043 .loc 1 3094 2 view .LVU910 + 3044 005a FFF7FEFF bl AD9102_StartOutput + 3045 .LVL315: +3095:Src/main.c **** + 3046 .loc 1 3095 2 view .LVU911 +3095:Src/main.c **** + 3047 .loc 1 3095 15 is_stmt 0 view .LVU912 + 3048 005e 1E20 movs r0, #30 + 3049 0060 FFF7FEFF bl AD9102_ReadReg + 3050 .LVL316: + 3051 0064 0446 mov r4, r0 + 3052 .LVL317: +3097:Src/main.c **** if (ok != NULL) + 3053 .loc 1 3097 2 is_stmt 1 view .LVU913 + 3054 0066 FFF7FEFF bl AD9102_ResetWaveUploadState + 3055 .LVL318: +3098:Src/main.c **** { + 3056 .loc 1 3098 2 view .LVU914 + ARM GAS /tmp/ccLSPxIe.s page 197 + + +3098:Src/main.c **** { + 3057 .loc 1 3098 5 is_stmt 0 view .LVU915 + 3058 006a 002D cmp r5, #0 + 3059 006c DED0 beq .L219 +3100:Src/main.c **** } + 3060 .loc 1 3100 3 is_stmt 1 view .LVU916 +3100:Src/main.c **** } + 3061 .loc 1 3100 7 is_stmt 0 view .LVU917 + 3062 006e 0123 movs r3, #1 + 3063 0070 2B70 strb r3, [r5] + 3064 0072 DBE7 b .L219 + 3065 .L222: + 3066 .align 2 + 3067 .L221: + 3068 0074 00000000 .word ad9102_wave_upload_active + 3069 0078 00000000 .word ad9102_wave_expected_samples + 3070 007c 00000000 .word ad9102_wave_written_samples + 3071 .cfi_endproc + 3072 .LFE1228: + 3074 .section .text.AD9102_CheckFlagsSram,"ax",%progbits + 3075 .align 1 + 3076 .syntax unified + 3077 .thumb + 3078 .thumb_func + 3080 AD9102_CheckFlagsSram: + 3081 .LVL319: + 3082 .LFB1234: +3368:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 3083 .loc 1 3368 1 is_stmt 1 view -0 + 3084 .cfi_startproc + 3085 @ args = 0, pretend = 0, frame = 8 + 3086 @ frame_needed = 0, uses_anonymous_args = 0 +3368:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG); + 3087 .loc 1 3368 1 is_stmt 0 view .LVU919 + 3088 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 3089 .LCFI31: + 3090 .cfi_def_cfa_offset 36 + 3091 .cfi_offset 4, -36 + 3092 .cfi_offset 5, -32 + 3093 .cfi_offset 6, -28 + 3094 .cfi_offset 7, -24 + 3095 .cfi_offset 8, -20 + 3096 .cfi_offset 9, -16 + 3097 .cfi_offset 10, -12 + 3098 .cfi_offset 11, -8 + 3099 .cfi_offset 14, -4 + 3100 0004 83B0 sub sp, sp, #12 + 3101 .LCFI32: + 3102 .cfi_def_cfa_offset 48 + 3103 0006 8346 mov fp, r0 + 3104 0008 0F46 mov r7, r1 + 3105 000a 1446 mov r4, r2 + 3106 000c 1D46 mov r5, r3 +3369:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 3107 .loc 1 3369 2 is_stmt 1 view .LVU920 +3369:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 3108 .loc 1 3369 23 is_stmt 0 view .LVU921 + ARM GAS /tmp/ccLSPxIe.s page 198 + + + 3109 000e 0020 movs r0, #0 + 3110 .LVL320: +3369:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 3111 .loc 1 3369 23 view .LVU922 + 3112 0010 FFF7FEFF bl AD9102_ReadReg + 3113 .LVL321: +3369:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG); + 3114 .loc 1 3369 23 view .LVU923 + 3115 0014 8246 mov r10, r0 + 3116 .LVL322: +3370:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 3117 .loc 1 3370 2 is_stmt 1 view .LVU924 +3370:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG); + 3118 .loc 1 3370 22 is_stmt 0 view .LVU925 + 3119 0016 0120 movs r0, #1 + 3120 0018 FFF7FEFF bl AD9102_ReadReg + 3121 .LVL323: + 3122 001c 8146 mov r9, r0 + 3123 .LVL324: +3371:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 3124 .loc 1 3371 2 is_stmt 1 view .LVU926 +3371:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR); + 3125 .loc 1 3371 22 is_stmt 0 view .LVU927 + 3126 001e 0220 movs r0, #2 + 3127 0020 FFF7FEFF bl AD9102_ReadReg + 3128 .LVL325: + 3129 0024 8046 mov r8, r0 + 3130 .LVL326: +3372:Src/main.c **** + 3131 .loc 1 3372 2 is_stmt 1 view .LVU928 +3372:Src/main.c **** + 3132 .loc 1 3372 21 is_stmt 0 view .LVU929 + 3133 0026 6020 movs r0, #96 + 3134 0028 FFF7FEFF bl AD9102_ReadReg + 3135 .LVL327: +3374:Src/main.c **** { + 3136 .loc 1 3374 2 is_stmt 1 view .LVU930 +3374:Src/main.c **** { + 3137 .loc 1 3374 5 is_stmt 0 view .LVU931 + 3138 002c 1CB1 cbz r4, .L240 +3378:Src/main.c **** { + 3139 .loc 1 3378 2 is_stmt 1 view .LVU932 +3378:Src/main.c **** { + 3140 .loc 1 3378 5 is_stmt 0 view .LVU933 + 3141 002e 012C cmp r4, #1 + 3142 0030 02D8 bhi .L224 +3380:Src/main.c **** } + 3143 .loc 1 3380 11 view .LVU934 + 3144 0032 0224 movs r4, #2 + 3145 .LVL328: +3380:Src/main.c **** } + 3146 .loc 1 3380 11 view .LVU935 + 3147 0034 03E0 b .L225 + 3148 .LVL329: + 3149 .L240: +3376:Src/main.c **** } + 3150 .loc 1 3376 11 view .LVU936 + ARM GAS /tmp/ccLSPxIe.s page 199 + + + 3151 0036 1024 movs r4, #16 + 3152 .LVL330: + 3153 .L224: +3382:Src/main.c **** { + 3154 .loc 1 3382 2 is_stmt 1 view .LVU937 +3382:Src/main.c **** { + 3155 .loc 1 3382 5 is_stmt 0 view .LVU938 + 3156 0038 B4F5805F cmp r4, #4096 + 3157 003c 04D8 bhi .L242 + 3158 .LVL331: + 3159 .L225: +3386:Src/main.c **** { + 3160 .loc 1 3386 2 is_stmt 1 view .LVU939 +3386:Src/main.c **** { + 3161 .loc 1 3386 5 is_stmt 0 view .LVU940 + 3162 003e 35B1 cbz r5, .L243 +3390:Src/main.c **** { + 3163 .loc 1 3390 2 is_stmt 1 view .LVU941 +3390:Src/main.c **** { + 3164 .loc 1 3390 5 is_stmt 0 view .LVU942 + 3165 0040 0F2D cmp r5, #15 + 3166 0042 05D9 bls .L226 +3392:Src/main.c **** } + 3167 .loc 1 3392 8 view .LVU943 + 3168 0044 0F25 movs r5, #15 + 3169 .LVL332: +3392:Src/main.c **** } + 3170 .loc 1 3392 8 view .LVU944 + 3171 0046 03E0 b .L226 + 3172 .LVL333: + 3173 .L242: +3384:Src/main.c **** } + 3174 .loc 1 3384 11 view .LVU945 + 3175 0048 4FF48054 mov r4, #4096 + 3176 .LVL334: +3384:Src/main.c **** } + 3177 .loc 1 3384 11 view .LVU946 + 3178 004c F7E7 b .L225 + 3179 .LVL335: + 3180 .L243: +3388:Src/main.c **** } + 3181 .loc 1 3388 8 view .LVU947 + 3182 004e 0125 movs r5, #1 + 3183 .LVL336: + 3184 .L226: +3395:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 3185 .loc 1 3395 2 is_stmt 1 view .LVU948 +3395:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 3186 .loc 1 3395 63 is_stmt 0 view .LVU949 + 3187 0050 2E02 lsls r6, r5, #8 + 3188 0052 06F47066 and r6, r6, #3840 +3395:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | + 3189 .loc 1 3395 11 view .LVU950 + 3190 0056 46F01106 orr r6, r6, #17 + 3191 .LVL337: +3398:Src/main.c **** if (pat_period == 0u) + 3192 .loc 1 3398 2 is_stmt 1 view .LVU951 + ARM GAS /tmp/ccLSPxIe.s page 200 + + +3398:Src/main.c **** if (pat_period == 0u) + 3193 .loc 1 3398 24 is_stmt 0 view .LVU952 + 3194 005a 0194 str r4, [sp, #4] +3398:Src/main.c **** if (pat_period == 0u) + 3195 .loc 1 3398 44 view .LVU953 + 3196 005c 05F00F05 and r5, r5, #15 + 3197 .LVL338: +3398:Src/main.c **** if (pat_period == 0u) + 3198 .loc 1 3398 11 view .LVU954 + 3199 0060 04FB05F5 mul r5, r4, r5 + 3200 .LVL339: +3399:Src/main.c **** { + 3201 .loc 1 3399 2 is_stmt 1 view .LVU955 +3399:Src/main.c **** { + 3202 .loc 1 3399 5 is_stmt 0 view .LVU956 + 3203 0064 1DB1 cbz r5, .L227 +3403:Src/main.c **** { + 3204 .loc 1 3403 2 is_stmt 1 view .LVU957 +3403:Src/main.c **** { + 3205 .loc 1 3403 5 is_stmt 0 view .LVU958 + 3206 0066 B5F5803F cmp r5, #65536 + 3207 006a 4CD2 bcs .L245 + 3208 006c 0195 str r5, [sp, #4] + 3209 .L227: + 3210 .LVL340: +3408:Src/main.c **** + 3211 .loc 1 3408 2 is_stmt 1 view .LVU959 +3408:Src/main.c **** + 3212 .loc 1 3408 43 is_stmt 0 view .LVU960 + 3213 006e 013C subs r4, r4, #1 + 3214 .LVL341: +3408:Src/main.c **** + 3215 .loc 1 3408 43 view .LVU961 + 3216 0070 A4B2 uxth r4, r4 +3408:Src/main.c **** + 3217 .loc 1 3408 11 view .LVU962 + 3218 0072 2401 lsls r4, r4, #4 + 3219 0074 A4B2 uxth r4, r4 + 3220 .LVL342: +3410:Src/main.c **** + 3221 .loc 1 3410 2 is_stmt 1 view .LVU963 +3412:Src/main.c **** { + 3222 .loc 1 3412 2 view .LVU964 +3412:Src/main.c **** { + 3223 .loc 1 3412 5 is_stmt 0 view .LVU965 + 3224 0076 BAF1000F cmp r10, #0 + 3225 007a 48D1 bne .L246 +3410:Src/main.c **** + 3226 .loc 1 3410 10 view .LVU966 + 3227 007c 0125 movs r5, #1 + 3228 .L228: + 3229 .LVL343: +3416:Src/main.c **** { + 3230 .loc 1 3416 2 is_stmt 1 view .LVU967 +3416:Src/main.c **** { + 3231 .loc 1 3416 5 is_stmt 0 view .LVU968 + 3232 007e 19F4F47F tst r9, #488 + ARM GAS /tmp/ccLSPxIe.s page 201 + + + 3233 0082 00D0 beq .L229 +3418:Src/main.c **** } + 3234 .loc 1 3418 6 view .LVU969 + 3235 0084 0025 movs r5, #0 + 3236 .LVL344: + 3237 .L229: +3420:Src/main.c **** { + 3238 .loc 1 3420 2 is_stmt 1 view .LVU970 +3420:Src/main.c **** { + 3239 .loc 1 3420 5 is_stmt 0 view .LVU971 + 3240 0086 18F40E6F tst r8, #2272 + 3241 008a 00D0 beq .L230 +3422:Src/main.c **** } + 3242 .loc 1 3422 6 view .LVU972 + 3243 008c 0025 movs r5, #0 + 3244 .LVL345: + 3245 .L230: +3424:Src/main.c **** { + 3246 .loc 1 3424 2 is_stmt 1 view .LVU973 +3424:Src/main.c **** { + 3247 .loc 1 3424 5 is_stmt 0 view .LVU974 + 3248 008e 10F03F0F tst r0, #63 + 3249 0092 00D0 beq .L231 +3426:Src/main.c **** } + 3250 .loc 1 3426 6 view .LVU975 + 3251 0094 0025 movs r5, #0 + 3252 .LVL346: + 3253 .L231: +3428:Src/main.c **** { + 3254 .loc 1 3428 2 is_stmt 1 view .LVU976 +3428:Src/main.c **** { + 3255 .loc 1 3428 5 is_stmt 0 view .LVU977 + 3256 0096 1FB1 cbz r7, .L232 +3428:Src/main.c **** { + 3257 .loc 1 3428 17 discriminator 1 view .LVU978 + 3258 0098 1BF0010F tst fp, #1 + 3259 009c 00D1 bne .L232 +3430:Src/main.c **** } + 3260 .loc 1 3430 6 view .LVU979 + 3261 009e 0025 movs r5, #0 + 3262 .LVL347: + 3263 .L232: +3433:Src/main.c **** { + 3264 .loc 1 3433 2 is_stmt 1 view .LVU980 +3433:Src/main.c **** { + 3265 .loc 1 3433 6 is_stmt 0 view .LVU981 + 3266 00a0 2720 movs r0, #39 + 3267 .LVL348: +3433:Src/main.c **** { + 3268 .loc 1 3433 6 view .LVU982 + 3269 00a2 FFF7FEFF bl AD9102_ReadReg + 3270 .LVL349: +3433:Src/main.c **** { + 3271 .loc 1 3433 5 discriminator 1 view .LVU983 + 3272 00a6 43F23003 movw r3, #12336 + 3273 00aa 9842 cmp r0, r3 + 3274 00ac 00D0 beq .L233 + ARM GAS /tmp/ccLSPxIe.s page 202 + + +3435:Src/main.c **** } + 3275 .loc 1 3435 6 view .LVU984 + 3276 00ae 0025 movs r5, #0 + 3277 .LVL350: + 3278 .L233: +3437:Src/main.c **** { + 3279 .loc 1 3437 2 is_stmt 1 view .LVU985 +3437:Src/main.c **** { + 3280 .loc 1 3437 6 is_stmt 0 view .LVU986 + 3281 00b0 2820 movs r0, #40 + 3282 00b2 FFF7FEFF bl AD9102_ReadReg + 3283 .LVL351: +3437:Src/main.c **** { + 3284 .loc 1 3437 5 discriminator 1 view .LVU987 + 3285 00b6 B042 cmp r0, r6 + 3286 00b8 00D0 beq .L234 +3439:Src/main.c **** } + 3287 .loc 1 3439 6 view .LVU988 + 3288 00ba 0025 movs r5, #0 + 3289 .LVL352: + 3290 .L234: +3441:Src/main.c **** { + 3291 .loc 1 3441 2 is_stmt 1 view .LVU989 +3441:Src/main.c **** { + 3292 .loc 1 3441 6 is_stmt 0 view .LVU990 + 3293 00bc 2920 movs r0, #41 + 3294 00be FFF7FEFF bl AD9102_ReadReg + 3295 .LVL353: +3441:Src/main.c **** { + 3296 .loc 1 3441 44 discriminator 1 view .LVU991 + 3297 00c2 BDF80430 ldrh r3, [sp, #4] +3441:Src/main.c **** { + 3298 .loc 1 3441 5 discriminator 1 view .LVU992 + 3299 00c6 9842 cmp r0, r3 + 3300 00c8 00D0 beq .L235 +3443:Src/main.c **** } + 3301 .loc 1 3443 6 view .LVU993 + 3302 00ca 0025 movs r5, #0 + 3303 .LVL354: + 3304 .L235: +3445:Src/main.c **** { + 3305 .loc 1 3445 2 is_stmt 1 view .LVU994 +3445:Src/main.c **** { + 3306 .loc 1 3445 6 is_stmt 0 view .LVU995 + 3307 00cc 1F20 movs r0, #31 + 3308 00ce FFF7FEFF bl AD9102_ReadReg + 3309 .LVL355: +3445:Src/main.c **** { + 3310 .loc 1 3445 5 discriminator 1 view .LVU996 + 3311 00d2 00B1 cbz r0, .L236 +3447:Src/main.c **** } + 3312 .loc 1 3447 6 view .LVU997 + 3313 00d4 0025 movs r5, #0 + 3314 .LVL356: + 3315 .L236: +3449:Src/main.c **** { + 3316 .loc 1 3449 2 is_stmt 1 view .LVU998 + ARM GAS /tmp/ccLSPxIe.s page 203 + + +3449:Src/main.c **** { + 3317 .loc 1 3449 6 is_stmt 0 view .LVU999 + 3318 00d6 5D20 movs r0, #93 + 3319 00d8 FFF7FEFF bl AD9102_ReadReg + 3320 .LVL357: +3449:Src/main.c **** { + 3321 .loc 1 3449 5 discriminator 1 view .LVU1000 + 3322 00dc 00B1 cbz r0, .L237 +3451:Src/main.c **** } + 3323 .loc 1 3451 6 view .LVU1001 + 3324 00de 0025 movs r5, #0 + 3325 .LVL358: + 3326 .L237: +3453:Src/main.c **** { + 3327 .loc 1 3453 2 is_stmt 1 view .LVU1002 +3453:Src/main.c **** { + 3328 .loc 1 3453 6 is_stmt 0 view .LVU1003 + 3329 00e0 5E20 movs r0, #94 + 3330 00e2 FFF7FEFF bl AD9102_ReadReg + 3331 .LVL359: +3453:Src/main.c **** { + 3332 .loc 1 3453 5 discriminator 1 view .LVU1004 + 3333 00e6 A042 cmp r0, r4 + 3334 00e8 00D0 beq .L238 +3455:Src/main.c **** } + 3335 .loc 1 3455 6 view .LVU1005 + 3336 00ea 0025 movs r5, #0 + 3337 .LVL360: + 3338 .L238: +3457:Src/main.c **** { + 3339 .loc 1 3457 2 is_stmt 1 view .LVU1006 +3457:Src/main.c **** { + 3340 .loc 1 3457 6 is_stmt 0 view .LVU1007 + 3341 00ec 2B20 movs r0, #43 + 3342 00ee FFF7FEFF bl AD9102_ReadReg + 3343 .LVL361: +3457:Src/main.c **** { + 3344 .loc 1 3457 5 discriminator 1 view .LVU1008 + 3345 00f2 40F20113 movw r3, #257 + 3346 00f6 9842 cmp r0, r3 + 3347 00f8 00D0 beq .L239 +3459:Src/main.c **** } + 3348 .loc 1 3459 6 view .LVU1009 + 3349 00fa 0025 movs r5, #0 + 3350 .LVL362: + 3351 .L239: +3462:Src/main.c **** } + 3352 .loc 1 3462 2 is_stmt 1 view .LVU1010 +3463:Src/main.c **** + 3353 .loc 1 3463 1 is_stmt 0 view .LVU1011 + 3354 00fc 85F00100 eor r0, r5, #1 + 3355 0100 03B0 add sp, sp, #12 + 3356 .LCFI33: + 3357 .cfi_remember_state + 3358 .cfi_def_cfa_offset 36 + 3359 @ sp needed + 3360 0102 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + ARM GAS /tmp/ccLSPxIe.s page 204 + + + 3361 .LVL363: + 3362 .L245: + 3363 .LCFI34: + 3364 .cfi_restore_state +3405:Src/main.c **** } + 3365 .loc 1 3405 14 view .LVU1012 + 3366 0106 4FF6FF73 movw r3, #65535 + 3367 010a 0193 str r3, [sp, #4] + 3368 010c AFE7 b .L227 + 3369 .LVL364: + 3370 .L246: +3414:Src/main.c **** } + 3371 .loc 1 3414 6 view .LVU1013 + 3372 010e 0025 movs r5, #0 + 3373 0110 B5E7 b .L228 + 3374 .cfi_endproc + 3375 .LFE1234: + 3377 .section .text.AD9833_WriteWord,"ax",%progbits + 3378 .align 1 + 3379 .syntax unified + 3380 .thumb + 3381 .thumb_func + 3383 AD9833_WriteWord: + 3384 .LVL365: + 3385 .LFB1214: +2767:Src/main.c **** uint32_t tmp32 = 0; + 3386 .loc 1 2767 1 is_stmt 1 view -0 + 3387 .cfi_startproc + 3388 @ args = 0, pretend = 0, frame = 0 + 3389 @ frame_needed = 0, uses_anonymous_args = 0 +2767:Src/main.c **** uint32_t tmp32 = 0; + 3390 .loc 1 2767 1 is_stmt 0 view .LVU1015 + 3391 0000 38B5 push {r3, r4, r5, lr} + 3392 .LCFI35: + 3393 .cfi_def_cfa_offset 16 + 3394 .cfi_offset 3, -16 + 3395 .cfi_offset 4, -12 + 3396 .cfi_offset 5, -8 + 3397 .cfi_offset 14, -4 + 3398 0002 0446 mov r4, r0 +2768:Src/main.c **** + 3399 .loc 1 2768 2 is_stmt 1 view .LVU1016 + 3400 .LVL366: +2770:Src/main.c **** + 3401 .loc 1 2770 2 view .LVU1017 + 3402 0004 0021 movs r1, #0 + 3403 0006 0220 movs r0, #2 + 3404 .LVL367: +2770:Src/main.c **** + 3405 .loc 1 2770 2 is_stmt 0 view .LVU1018 + 3406 0008 FFF7FEFF bl SPI2_SetMode + 3407 .LVL368: +2772:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET); + 3408 .loc 1 2772 2 is_stmt 1 view .LVU1019 + 3409 000c 1E4D ldr r5, .L267 + 3410 000e 0122 movs r2, #1 + 3411 0010 4FF48051 mov r1, #4096 + ARM GAS /tmp/ccLSPxIe.s page 205 + + + 3412 0014 2846 mov r0, r5 + 3413 0016 FFF7FEFF bl HAL_GPIO_WritePin + 3414 .LVL369: +2773:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); + 3415 .loc 1 2773 2 view .LVU1020 + 3416 001a 0122 movs r2, #1 + 3417 001c 4FF48041 mov r1, #16384 + 3418 0020 2846 mov r0, r5 + 3419 0022 FFF7FEFF bl HAL_GPIO_WritePin + 3420 .LVL370: +2774:Src/main.c **** + 3421 .loc 1 2774 2 view .LVU1021 + 3422 0026 05F50065 add r5, r5, #2048 + 3423 002a 0122 movs r2, #1 + 3424 002c 4FF48051 mov r1, #4096 + 3425 0030 2846 mov r0, r5 + 3426 0032 FFF7FEFF bl HAL_GPIO_WritePin + 3427 .LVL371: +2776:Src/main.c **** + 3428 .loc 1 2776 2 view .LVU1022 + 3429 0036 0022 movs r2, #0 + 3430 0038 4FF40051 mov r1, #8192 + 3431 003c 2846 mov r0, r5 + 3432 003e FFF7FEFF bl HAL_GPIO_WritePin + 3433 .LVL372: +2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 3434 .loc 1 2778 2 view .LVU1023 +2768:Src/main.c **** + 3435 .loc 1 2768 11 is_stmt 0 view .LVU1024 + 3436 0042 0023 movs r3, #0 + 3437 .LVL373: + 3438 .L261: +2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 3439 .loc 1 2778 63 is_stmt 1 discriminator 2 view .LVU1025 +2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 3440 .loc 1 2778 41 discriminator 2 view .LVU1026 + 3441 .LBB427: + 3442 .LBI427: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 3443 .loc 4 916 26 view .LVU1027 + 3444 .LBB428: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3445 .loc 4 918 3 view .LVU1028 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3446 .loc 4 918 12 is_stmt 0 view .LVU1029 + 3447 0044 114A ldr r2, .L267+4 + 3448 0046 9268 ldr r2, [r2, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3449 .loc 4 918 66 view .LVU1030 + 3450 0048 12F0020F tst r2, #2 + 3451 004c 05D1 bne .L260 + 3452 .LVL374: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3453 .loc 4 918 66 view .LVU1031 + 3454 .LBE428: + 3455 .LBE427: +2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + ARM GAS /tmp/ccLSPxIe.s page 206 + + + 3456 .loc 1 2778 50 discriminator 1 view .LVU1032 + 3457 004e 5A1C adds r2, r3, #1 + 3458 .LVL375: +2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 3459 .loc 1 2778 41 discriminator 1 view .LVU1033 + 3460 0050 B3F57A7F cmp r3, #1000 + 3461 0054 01D2 bcs .L260 +2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word); + 3462 .loc 1 2778 50 discriminator 1 view .LVU1034 + 3463 0056 1346 mov r3, r2 + 3464 0058 F4E7 b .L261 + 3465 .LVL376: + 3466 .L260: +2779:Src/main.c **** tmp32 = 0; + 3467 .loc 1 2779 2 is_stmt 1 view .LVU1035 + 3468 .LBB429: + 3469 .LBI429: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 3470 .loc 4 1373 22 view .LVU1036 + 3471 .LBB430: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 3472 .loc 4 1376 3 view .LVU1037 + 3473 .loc 4 1377 3 view .LVU1038 + 3474 .loc 4 1377 10 is_stmt 0 view .LVU1039 + 3475 005a 0C4B ldr r3, .L267+4 + 3476 005c 9C81 strh r4, [r3, #12] @ movhi + 3477 .LVL377: + 3478 .loc 4 1377 10 view .LVU1040 + 3479 .LBE430: + 3480 .LBE429: +2780:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 3481 .loc 1 2780 2 is_stmt 1 view .LVU1041 +2781:Src/main.c **** (void) SPI2->DR; + 3482 .loc 1 2781 2 view .LVU1042 +2780:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {} + 3483 .loc 1 2780 8 is_stmt 0 view .LVU1043 + 3484 005e 0023 movs r3, #0 + 3485 .LVL378: + 3486 .L263: +2781:Src/main.c **** (void) SPI2->DR; + 3487 .loc 1 2781 64 is_stmt 1 discriminator 2 view .LVU1044 +2781:Src/main.c **** (void) SPI2->DR; + 3488 .loc 1 2781 42 discriminator 2 view .LVU1045 + 3489 .LBB431: + 3490 .LBI431: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 3491 .loc 4 905 26 view .LVU1046 + 3492 .LBB432: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3493 .loc 4 907 3 view .LVU1047 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3494 .loc 4 907 12 is_stmt 0 view .LVU1048 + 3495 0060 0A4A ldr r2, .L267+4 + 3496 0062 9268 ldr r2, [r2, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3497 .loc 4 907 68 view .LVU1049 + 3498 0064 12F0010F tst r2, #1 + ARM GAS /tmp/ccLSPxIe.s page 207 + + + 3499 0068 05D1 bne .L262 + 3500 .LVL379: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 3501 .loc 4 907 68 view .LVU1050 + 3502 .LBE432: + 3503 .LBE431: +2781:Src/main.c **** (void) SPI2->DR; + 3504 .loc 1 2781 51 discriminator 1 view .LVU1051 + 3505 006a 5A1C adds r2, r3, #1 + 3506 .LVL380: +2781:Src/main.c **** (void) SPI2->DR; + 3507 .loc 1 2781 42 discriminator 1 view .LVU1052 + 3508 006c B3F57A7F cmp r3, #1000 + 3509 0070 01D2 bcs .L262 +2781:Src/main.c **** (void) SPI2->DR; + 3510 .loc 1 2781 51 discriminator 1 view .LVU1053 + 3511 0072 1346 mov r3, r2 + 3512 0074 F4E7 b .L263 + 3513 .LVL381: + 3514 .L262: +2782:Src/main.c **** + 3515 .loc 1 2782 2 is_stmt 1 view .LVU1054 + 3516 0076 054B ldr r3, .L267+4 + 3517 0078 DB68 ldr r3, [r3, #12] +2784:Src/main.c **** } + 3518 .loc 1 2784 2 view .LVU1055 + 3519 007a 0122 movs r2, #1 + 3520 007c 4FF40051 mov r1, #8192 + 3521 0080 0348 ldr r0, .L267+8 + 3522 0082 FFF7FEFF bl HAL_GPIO_WritePin + 3523 .LVL382: +2785:Src/main.c **** + 3524 .loc 1 2785 1 is_stmt 0 view .LVU1056 + 3525 0086 38BD pop {r3, r4, r5, pc} + 3526 .LVL383: + 3527 .L268: +2785:Src/main.c **** + 3528 .loc 1 2785 1 view .LVU1057 + 3529 .align 2 + 3530 .L267: + 3531 0088 00040240 .word 1073873920 + 3532 008c 00380040 .word 1073756160 + 3533 0090 000C0240 .word 1073875968 + 3534 .cfi_endproc + 3535 .LFE1214: + 3537 .section .text.AD9833_Apply,"ax",%progbits + 3538 .align 1 + 3539 .syntax unified + 3540 .thumb + 3541 .thumb_func + 3543 AD9833_Apply: + 3544 .LVL384: + 3545 .LFB1215: +2788:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 + 3546 .loc 1 2788 1 is_stmt 1 view -0 + 3547 .cfi_startproc + 3548 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccLSPxIe.s page 208 + + + 3549 @ frame_needed = 0, uses_anonymous_args = 0 +2788:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1 + 3550 .loc 1 2788 1 is_stmt 0 view .LVU1059 + 3551 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 3552 .LCFI36: + 3553 .cfi_def_cfa_offset 24 + 3554 .cfi_offset 4, -24 + 3555 .cfi_offset 5, -20 + 3556 .cfi_offset 6, -16 + 3557 .cfi_offset 7, -12 + 3558 .cfi_offset 8, -8 + 3559 .cfi_offset 14, -4 + 3560 0004 0546 mov r5, r0 +2789:Src/main.c **** if (triangle) + 3561 .loc 1 2789 2 is_stmt 1 view .LVU1060 + 3562 .LVL385: +2790:Src/main.c **** { + 3563 .loc 1 2790 2 view .LVU1061 +2790:Src/main.c **** { + 3564 .loc 1 2790 5 is_stmt 0 view .LVU1062 + 3565 0006 F9B9 cbnz r1, .L272 +2789:Src/main.c **** if (triangle) + 3566 .loc 1 2789 11 view .LVU1063 + 3567 0008 4FF40057 mov r7, #8192 + 3568 .L270: + 3569 .LVL386: +2794:Src/main.c **** + 3570 .loc 1 2794 2 is_stmt 1 view .LVU1064 +2794:Src/main.c **** + 3571 .loc 1 2794 10 is_stmt 0 view .LVU1065 + 3572 000c 47F48078 orr r8, r7, #256 + 3573 .LVL387: +2796:Src/main.c **** uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB + 3574 .loc 1 2796 2 is_stmt 1 view .LVU1066 +2797:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB + 3575 .loc 1 2797 2 view .LVU1067 +2797:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB + 3576 .loc 1 2797 49 is_stmt 0 view .LVU1068 + 3577 0010 C2F30D06 ubfx r6, r2, #0, #14 +2797:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB + 3578 .loc 1 2797 11 view .LVU1069 + 3579 0014 46F48046 orr r6, r6, #16384 + 3580 .LVL388: +2798:Src/main.c **** + 3581 .loc 1 2798 2 is_stmt 1 view .LVU1070 +2798:Src/main.c **** + 3582 .loc 1 2798 57 is_stmt 0 view .LVU1071 + 3583 0018 C2F38D32 ubfx r2, r2, #14, #14 + 3584 .LVL389: +2798:Src/main.c **** + 3585 .loc 1 2798 11 view .LVU1072 + 3586 001c 42F48044 orr r4, r2, #16384 + 3587 .LVL390: +2800:Src/main.c **** AD9833_WriteWord(lsw); + 3588 .loc 1 2800 2 is_stmt 1 view .LVU1073 + 3589 0020 4046 mov r0, r8 + 3590 .LVL391: + ARM GAS /tmp/ccLSPxIe.s page 209 + + +2800:Src/main.c **** AD9833_WriteWord(lsw); + 3591 .loc 1 2800 2 is_stmt 0 view .LVU1074 + 3592 0022 FFF7FEFF bl AD9833_WriteWord + 3593 .LVL392: +2801:Src/main.c **** AD9833_WriteWord(msw); + 3594 .loc 1 2801 2 is_stmt 1 view .LVU1075 + 3595 0026 3046 mov r0, r6 + 3596 0028 FFF7FEFF bl AD9833_WriteWord + 3597 .LVL393: +2802:Src/main.c **** AD9833_WriteWord(0xC000u); // PHASE0 = 0 + 3598 .loc 1 2802 2 view .LVU1076 + 3599 002c 2046 mov r0, r4 + 3600 002e FFF7FEFF bl AD9833_WriteWord + 3601 .LVL394: +2803:Src/main.c **** + 3602 .loc 1 2803 2 view .LVU1077 + 3603 0032 4FF44040 mov r0, #49152 + 3604 0036 FFF7FEFF bl AD9833_WriteWord + 3605 .LVL395: +2805:Src/main.c **** { + 3606 .loc 1 2805 2 view .LVU1078 +2805:Src/main.c **** { + 3607 .loc 1 2805 5 is_stmt 0 view .LVU1079 + 3608 003a 05B9 cbnz r5, .L271 +2794:Src/main.c **** + 3609 .loc 1 2794 10 view .LVU1080 + 3610 003c 4746 mov r7, r8 + 3611 .L271: + 3612 .LVL396: +2809:Src/main.c **** } + 3613 .loc 1 2809 2 is_stmt 1 view .LVU1081 + 3614 003e 3846 mov r0, r7 + 3615 0040 FFF7FEFF bl AD9833_WriteWord + 3616 .LVL397: +2810:Src/main.c **** + 3617 .loc 1 2810 1 is_stmt 0 view .LVU1082 + 3618 0044 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 3619 .LVL398: + 3620 .L272: +2792:Src/main.c **** } + 3621 .loc 1 2792 11 view .LVU1083 + 3622 0048 42F20207 movw r7, #8194 + 3623 004c DEE7 b .L270 + 3624 .cfi_endproc + 3625 .LFE1215: + 3627 .section .text.OUT_trigger,"ax",%progbits + 3628 .align 1 + 3629 .syntax unified + 3630 .thumb + 3631 .thumb_func + 3633 OUT_trigger: + 3634 .LVL399: + 3635 .LFB1211: +2684:Src/main.c **** switch (out_n) + 3636 .loc 1 2684 1 is_stmt 1 view -0 + 3637 .cfi_startproc + 3638 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccLSPxIe.s page 210 + + + 3639 @ frame_needed = 0, uses_anonymous_args = 0 +2684:Src/main.c **** switch (out_n) + 3640 .loc 1 2684 1 is_stmt 0 view .LVU1085 + 3641 0000 10B5 push {r4, lr} + 3642 .LCFI37: + 3643 .cfi_def_cfa_offset 8 + 3644 .cfi_offset 4, -8 + 3645 .cfi_offset 14, -4 +2685:Src/main.c **** { + 3646 .loc 1 2685 2 is_stmt 1 view .LVU1086 + 3647 0002 0928 cmp r0, #9 + 3648 0004 13D8 bhi .L274 + 3649 0006 DFE800F0 tbb [pc, r0] + 3650 .L277: + 3651 000a 05 .byte (.L286-.L277)/2 + 3652 000b 13 .byte (.L285-.L277)/2 + 3653 000c 21 .byte (.L284-.L277)/2 + 3654 000d 2F .byte (.L283-.L277)/2 + 3655 000e 3D .byte (.L282-.L277)/2 + 3656 000f 4B .byte (.L281-.L277)/2 + 3657 0010 59 .byte (.L280-.L277)/2 + 3658 0011 65 .byte (.L279-.L277)/2 + 3659 0012 71 .byte (.L278-.L277)/2 + 3660 0013 7D .byte (.L276-.L277)/2 + 3661 .p2align 1 + 3662 .L286: +2688:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 3663 .loc 1 2688 3 view .LVU1087 + 3664 0014 414C ldr r4, .L289 + 3665 0016 0122 movs r2, #1 + 3666 0018 4FF48061 mov r1, #1024 + 3667 001c 2046 mov r0, r4 + 3668 .LVL400: +2688:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 3669 .loc 1 2688 3 is_stmt 0 view .LVU1088 + 3670 001e FFF7FEFF bl HAL_GPIO_WritePin + 3671 .LVL401: +2689:Src/main.c **** break; + 3672 .loc 1 2689 3 is_stmt 1 view .LVU1089 + 3673 0022 0022 movs r2, #0 + 3674 0024 4FF48061 mov r1, #1024 + 3675 0028 2046 mov r0, r4 + 3676 002a FFF7FEFF bl HAL_GPIO_WritePin + 3677 .LVL402: +2690:Src/main.c **** + 3678 .loc 1 2690 2 view .LVU1090 + 3679 .L274: +2737:Src/main.c **** + 3680 .loc 1 2737 1 is_stmt 0 view .LVU1091 + 3681 002e 10BD pop {r4, pc} + 3682 .LVL403: + 3683 .L285: +2693:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 3684 .loc 1 2693 3 is_stmt 1 view .LVU1092 + 3685 0030 3A4C ldr r4, .L289 + 3686 0032 0122 movs r2, #1 + 3687 0034 4FF40061 mov r1, #2048 + ARM GAS /tmp/ccLSPxIe.s page 211 + + + 3688 0038 2046 mov r0, r4 + 3689 .LVL404: +2693:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 3690 .loc 1 2693 3 is_stmt 0 view .LVU1093 + 3691 003a FFF7FEFF bl HAL_GPIO_WritePin + 3692 .LVL405: +2694:Src/main.c **** break; + 3693 .loc 1 2694 3 is_stmt 1 view .LVU1094 + 3694 003e 0022 movs r2, #0 + 3695 0040 4FF40061 mov r1, #2048 + 3696 0044 2046 mov r0, r4 + 3697 0046 FFF7FEFF bl HAL_GPIO_WritePin + 3698 .LVL406: +2695:Src/main.c **** + 3699 .loc 1 2695 2 view .LVU1095 + 3700 004a F0E7 b .L274 + 3701 .LVL407: + 3702 .L284: +2698:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 3703 .loc 1 2698 3 view .LVU1096 + 3704 004c 334C ldr r4, .L289 + 3705 004e 0122 movs r2, #1 + 3706 0050 4FF48051 mov r1, #4096 + 3707 0054 2046 mov r0, r4 + 3708 .LVL408: +2698:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 3709 .loc 1 2698 3 is_stmt 0 view .LVU1097 + 3710 0056 FFF7FEFF bl HAL_GPIO_WritePin + 3711 .LVL409: +2699:Src/main.c **** break; + 3712 .loc 1 2699 3 is_stmt 1 view .LVU1098 + 3713 005a 0022 movs r2, #0 + 3714 005c 4FF48051 mov r1, #4096 + 3715 0060 2046 mov r0, r4 + 3716 0062 FFF7FEFF bl HAL_GPIO_WritePin + 3717 .LVL410: 2700:Src/main.c **** - 3087 .loc 1 2700 2 is_stmt 1 view .LVU945 -2700:Src/main.c **** - 3088 .loc 1 2700 10 is_stmt 0 view .LVU946 - 3089 000c 47F48078 orr r8, r7, #256 - 3090 .LVL349: -2702:Src/main.c **** uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB - 3091 .loc 1 2702 2 is_stmt 1 view .LVU947 -2703:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB - 3092 .loc 1 2703 2 view .LVU948 -2703:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB - 3093 .loc 1 2703 49 is_stmt 0 view .LVU949 - 3094 0010 C2F30D06 ubfx r6, r2, #0, #14 -2703:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB - 3095 .loc 1 2703 11 view .LVU950 - 3096 0014 46F48046 orr r6, r6, #16384 - 3097 .LVL350: -2704:Src/main.c **** - 3098 .loc 1 2704 2 is_stmt 1 view .LVU951 -2704:Src/main.c **** - 3099 .loc 1 2704 57 is_stmt 0 view .LVU952 - 3100 0018 C2F38D32 ubfx r2, r2, #14, #14 - 3101 .LVL351: -2704:Src/main.c **** - 3102 .loc 1 2704 11 view .LVU953 - 3103 001c 42F48044 orr r4, r2, #16384 - 3104 .LVL352: -2706:Src/main.c **** AD9833_WriteWord(lsw); - 3105 .loc 1 2706 2 is_stmt 1 view .LVU954 - 3106 0020 4046 mov r0, r8 - 3107 .LVL353: -2706:Src/main.c **** AD9833_WriteWord(lsw); - 3108 .loc 1 2706 2 is_stmt 0 view .LVU955 - 3109 0022 FFF7FEFF bl AD9833_WriteWord - 3110 .LVL354: -2707:Src/main.c **** AD9833_WriteWord(msw); - 3111 .loc 1 2707 2 is_stmt 1 view .LVU956 - 3112 0026 3046 mov r0, r6 - ARM GAS /tmp/ccuHnxNu.s page 195 + 3718 .loc 1 2700 2 view .LVU1099 + 3719 0066 E2E7 b .L274 + 3720 .LVL411: + 3721 .L283: +2703:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 3722 .loc 1 2703 3 view .LVU1100 + 3723 0068 2C4C ldr r4, .L289 + 3724 006a 0122 movs r2, #1 + 3725 006c 4FF40051 mov r1, #8192 + 3726 0070 2046 mov r0, r4 + 3727 .LVL412: +2703:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 3728 .loc 1 2703 3 is_stmt 0 view .LVU1101 + 3729 0072 FFF7FEFF bl HAL_GPIO_WritePin + 3730 .LVL413: +2704:Src/main.c **** break; + 3731 .loc 1 2704 3 is_stmt 1 view .LVU1102 + 3732 0076 0022 movs r2, #0 + 3733 0078 4FF40051 mov r1, #8192 + 3734 007c 2046 mov r0, r4 + ARM GAS /tmp/ccLSPxIe.s page 212 - 3113 0028 FFF7FEFF bl AD9833_WriteWord - 3114 .LVL355: -2708:Src/main.c **** AD9833_WriteWord(0xC000u); // PHASE0 = 0 - 3115 .loc 1 2708 2 view .LVU957 - 3116 002c 2046 mov r0, r4 - 3117 002e FFF7FEFF bl AD9833_WriteWord - 3118 .LVL356: -2709:Src/main.c **** - 3119 .loc 1 2709 2 view .LVU958 - 3120 0032 4FF44040 mov r0, #49152 - 3121 0036 FFF7FEFF bl AD9833_WriteWord - 3122 .LVL357: -2711:Src/main.c **** { - 3123 .loc 1 2711 2 view .LVU959 -2711:Src/main.c **** { - 3124 .loc 1 2711 5 is_stmt 0 view .LVU960 - 3125 003a 05B9 cbnz r5, .L221 -2700:Src/main.c **** - 3126 .loc 1 2700 10 view .LVU961 - 3127 003c 4746 mov r7, r8 - 3128 .L221: - 3129 .LVL358: -2715:Src/main.c **** } - 3130 .loc 1 2715 2 is_stmt 1 view .LVU962 - 3131 003e 3846 mov r0, r7 - 3132 0040 FFF7FEFF bl AD9833_WriteWord - 3133 .LVL359: -2716:Src/main.c **** - 3134 .loc 1 2716 1 is_stmt 0 view .LVU963 - 3135 0044 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 3136 .LVL360: - 3137 .L222: -2698:Src/main.c **** } - 3138 .loc 1 2698 11 view .LVU964 - 3139 0048 42F20207 movw r7, #8194 - 3140 004c DEE7 b .L220 - 3141 .cfi_endproc - 3142 .LFE1215: - 3144 .section .text.OUT_trigger,"ax",%progbits - 3145 .align 1 - 3146 .syntax unified - 3147 .thumb - 3148 .thumb_func - 3150 OUT_trigger: - 3151 .LVL361: - 3152 .LFB1211: -2590:Src/main.c **** switch (out_n) - 3153 .loc 1 2590 1 is_stmt 1 view -0 - 3154 .cfi_startproc - 3155 @ args = 0, pretend = 0, frame = 0 - 3156 @ frame_needed = 0, uses_anonymous_args = 0 -2590:Src/main.c **** switch (out_n) - 3157 .loc 1 2590 1 is_stmt 0 view .LVU966 - 3158 0000 10B5 push {r4, lr} - 3159 .LCFI34: - 3160 .cfi_def_cfa_offset 8 - 3161 .cfi_offset 4, -8 - ARM GAS /tmp/ccuHnxNu.s page 196 + 3735 007e FFF7FEFF bl HAL_GPIO_WritePin + 3736 .LVL414: +2705:Src/main.c **** + 3737 .loc 1 2705 2 view .LVU1103 + 3738 0082 D4E7 b .L274 + 3739 .LVL415: + 3740 .L282: +2708:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 3741 .loc 1 2708 3 view .LVU1104 + 3742 0084 254C ldr r4, .L289 + 3743 0086 0122 movs r2, #1 + 3744 0088 4FF48041 mov r1, #16384 + 3745 008c 2046 mov r0, r4 + 3746 .LVL416: +2708:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 3747 .loc 1 2708 3 is_stmt 0 view .LVU1105 + 3748 008e FFF7FEFF bl HAL_GPIO_WritePin + 3749 .LVL417: +2709:Src/main.c **** break; + 3750 .loc 1 2709 3 is_stmt 1 view .LVU1106 + 3751 0092 0022 movs r2, #0 + 3752 0094 4FF48041 mov r1, #16384 + 3753 0098 2046 mov r0, r4 + 3754 009a FFF7FEFF bl HAL_GPIO_WritePin + 3755 .LVL418: +2710:Src/main.c **** + 3756 .loc 1 2710 2 view .LVU1107 + 3757 009e C6E7 b .L274 + 3758 .LVL419: + 3759 .L281: +2713:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 3760 .loc 1 2713 3 view .LVU1108 + 3761 00a0 1E4C ldr r4, .L289 + 3762 00a2 0122 movs r2, #1 + 3763 00a4 4FF40041 mov r1, #32768 + 3764 00a8 2046 mov r0, r4 + 3765 .LVL420: +2713:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 3766 .loc 1 2713 3 is_stmt 0 view .LVU1109 + 3767 00aa FFF7FEFF bl HAL_GPIO_WritePin + 3768 .LVL421: +2714:Src/main.c **** break; + 3769 .loc 1 2714 3 is_stmt 1 view .LVU1110 + 3770 00ae 0022 movs r2, #0 + 3771 00b0 4FF40041 mov r1, #32768 + 3772 00b4 2046 mov r0, r4 + 3773 00b6 FFF7FEFF bl HAL_GPIO_WritePin + 3774 .LVL422: +2715:Src/main.c **** + 3775 .loc 1 2715 2 view .LVU1111 + 3776 00ba B8E7 b .L274 + 3777 .LVL423: + 3778 .L280: +2718:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 3779 .loc 1 2718 3 view .LVU1112 + 3780 00bc 184C ldr r4, .L289+4 + 3781 00be 0122 movs r2, #1 + ARM GAS /tmp/ccLSPxIe.s page 213 - 3162 .cfi_offset 14, -4 -2591:Src/main.c **** { - 3163 .loc 1 2591 2 is_stmt 1 view .LVU967 - 3164 0002 0928 cmp r0, #9 - 3165 0004 13D8 bhi .L224 - 3166 0006 DFE800F0 tbb [pc, r0] - 3167 .L227: - 3168 000a 05 .byte (.L236-.L227)/2 - 3169 000b 13 .byte (.L235-.L227)/2 - 3170 000c 21 .byte (.L234-.L227)/2 - 3171 000d 2F .byte (.L233-.L227)/2 - 3172 000e 3D .byte (.L232-.L227)/2 - 3173 000f 4B .byte (.L231-.L227)/2 - 3174 0010 59 .byte (.L230-.L227)/2 - 3175 0011 65 .byte (.L229-.L227)/2 - 3176 0012 71 .byte (.L228-.L227)/2 - 3177 0013 7D .byte (.L226-.L227)/2 - 3178 .p2align 1 - 3179 .L236: -2594:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 3180 .loc 1 2594 3 view .LVU968 - 3181 0014 414C ldr r4, .L239 - 3182 0016 0122 movs r2, #1 - 3183 0018 4FF48061 mov r1, #1024 - 3184 001c 2046 mov r0, r4 - 3185 .LVL362: -2594:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 3186 .loc 1 2594 3 is_stmt 0 view .LVU969 - 3187 001e FFF7FEFF bl HAL_GPIO_WritePin - 3188 .LVL363: -2595:Src/main.c **** break; - 3189 .loc 1 2595 3 is_stmt 1 view .LVU970 - 3190 0022 0022 movs r2, #0 - 3191 0024 4FF48061 mov r1, #1024 - 3192 0028 2046 mov r0, r4 - 3193 002a FFF7FEFF bl HAL_GPIO_WritePin - 3194 .LVL364: -2596:Src/main.c **** - 3195 .loc 1 2596 2 view .LVU971 - 3196 .L224: -2643:Src/main.c **** - 3197 .loc 1 2643 1 is_stmt 0 view .LVU972 - 3198 002e 10BD pop {r4, pc} - 3199 .LVL365: - 3200 .L235: -2599:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 3201 .loc 1 2599 3 is_stmt 1 view .LVU973 - 3202 0030 3A4C ldr r4, .L239 - 3203 0032 0122 movs r2, #1 - 3204 0034 4FF40061 mov r1, #2048 - 3205 0038 2046 mov r0, r4 - 3206 .LVL366: -2599:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 3207 .loc 1 2599 3 is_stmt 0 view .LVU974 - 3208 003a FFF7FEFF bl HAL_GPIO_WritePin - 3209 .LVL367: -2600:Src/main.c **** break; - ARM GAS /tmp/ccuHnxNu.s page 197 + 3782 00c0 1021 movs r1, #16 + 3783 00c2 2046 mov r0, r4 + 3784 .LVL424: +2718:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 3785 .loc 1 2718 3 is_stmt 0 view .LVU1113 + 3786 00c4 FFF7FEFF bl HAL_GPIO_WritePin + 3787 .LVL425: +2719:Src/main.c **** break; + 3788 .loc 1 2719 3 is_stmt 1 view .LVU1114 + 3789 00c8 0022 movs r2, #0 + 3790 00ca 1021 movs r1, #16 + 3791 00cc 2046 mov r0, r4 + 3792 00ce FFF7FEFF bl HAL_GPIO_WritePin + 3793 .LVL426: +2720:Src/main.c **** + 3794 .loc 1 2720 2 view .LVU1115 + 3795 00d2 ACE7 b .L274 + 3796 .LVL427: + 3797 .L279: +2723:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 3798 .loc 1 2723 3 view .LVU1116 + 3799 00d4 124C ldr r4, .L289+4 + 3800 00d6 0122 movs r2, #1 + 3801 00d8 2021 movs r1, #32 + 3802 00da 2046 mov r0, r4 + 3803 .LVL428: +2723:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 3804 .loc 1 2723 3 is_stmt 0 view .LVU1117 + 3805 00dc FFF7FEFF bl HAL_GPIO_WritePin + 3806 .LVL429: +2724:Src/main.c **** break; + 3807 .loc 1 2724 3 is_stmt 1 view .LVU1118 + 3808 00e0 0022 movs r2, #0 + 3809 00e2 2021 movs r1, #32 + 3810 00e4 2046 mov r0, r4 + 3811 00e6 FFF7FEFF bl HAL_GPIO_WritePin + 3812 .LVL430: +2725:Src/main.c **** + 3813 .loc 1 2725 2 view .LVU1119 + 3814 00ea A0E7 b .L274 + 3815 .LVL431: + 3816 .L278: +2728:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 3817 .loc 1 2728 3 view .LVU1120 + 3818 00ec 0C4C ldr r4, .L289+4 + 3819 00ee 0122 movs r2, #1 + 3820 00f0 4021 movs r1, #64 + 3821 00f2 2046 mov r0, r4 + 3822 .LVL432: +2728:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 3823 .loc 1 2728 3 is_stmt 0 view .LVU1121 + 3824 00f4 FFF7FEFF bl HAL_GPIO_WritePin + 3825 .LVL433: +2729:Src/main.c **** break; + 3826 .loc 1 2729 3 is_stmt 1 view .LVU1122 + 3827 00f8 0022 movs r2, #0 + 3828 00fa 4021 movs r1, #64 + ARM GAS /tmp/ccLSPxIe.s page 214 - 3210 .loc 1 2600 3 is_stmt 1 view .LVU975 - 3211 003e 0022 movs r2, #0 - 3212 0040 4FF40061 mov r1, #2048 - 3213 0044 2046 mov r0, r4 - 3214 0046 FFF7FEFF bl HAL_GPIO_WritePin - 3215 .LVL368: -2601:Src/main.c **** - 3216 .loc 1 2601 2 view .LVU976 - 3217 004a F0E7 b .L224 - 3218 .LVL369: - 3219 .L234: -2604:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 3220 .loc 1 2604 3 view .LVU977 - 3221 004c 334C ldr r4, .L239 - 3222 004e 0122 movs r2, #1 - 3223 0050 4FF48051 mov r1, #4096 - 3224 0054 2046 mov r0, r4 - 3225 .LVL370: -2604:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 3226 .loc 1 2604 3 is_stmt 0 view .LVU978 - 3227 0056 FFF7FEFF bl HAL_GPIO_WritePin - 3228 .LVL371: -2605:Src/main.c **** break; - 3229 .loc 1 2605 3 is_stmt 1 view .LVU979 - 3230 005a 0022 movs r2, #0 - 3231 005c 4FF48051 mov r1, #4096 - 3232 0060 2046 mov r0, r4 - 3233 0062 FFF7FEFF bl HAL_GPIO_WritePin - 3234 .LVL372: -2606:Src/main.c **** - 3235 .loc 1 2606 2 view .LVU980 - 3236 0066 E2E7 b .L224 - 3237 .LVL373: - 3238 .L233: -2609:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 3239 .loc 1 2609 3 view .LVU981 - 3240 0068 2C4C ldr r4, .L239 - 3241 006a 0122 movs r2, #1 - 3242 006c 4FF40051 mov r1, #8192 - 3243 0070 2046 mov r0, r4 - 3244 .LVL374: -2609:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 3245 .loc 1 2609 3 is_stmt 0 view .LVU982 - 3246 0072 FFF7FEFF bl HAL_GPIO_WritePin - 3247 .LVL375: -2610:Src/main.c **** break; - 3248 .loc 1 2610 3 is_stmt 1 view .LVU983 - 3249 0076 0022 movs r2, #0 - 3250 0078 4FF40051 mov r1, #8192 - 3251 007c 2046 mov r0, r4 - 3252 007e FFF7FEFF bl HAL_GPIO_WritePin - 3253 .LVL376: -2611:Src/main.c **** - 3254 .loc 1 2611 2 view .LVU984 - 3255 0082 D4E7 b .L224 - 3256 .LVL377: - 3257 .L232: - ARM GAS /tmp/ccuHnxNu.s page 198 + 3829 00fc 2046 mov r0, r4 + 3830 00fe FFF7FEFF bl HAL_GPIO_WritePin + 3831 .LVL434: +2730:Src/main.c **** + 3832 .loc 1 2730 2 view .LVU1123 + 3833 0102 94E7 b .L274 + 3834 .LVL435: + 3835 .L276: +2733:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 3836 .loc 1 2733 3 view .LVU1124 + 3837 0104 064C ldr r4, .L289+4 + 3838 0106 0122 movs r2, #1 + 3839 0108 8021 movs r1, #128 + 3840 010a 2046 mov r0, r4 + 3841 .LVL436: +2733:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 3842 .loc 1 2733 3 is_stmt 0 view .LVU1125 + 3843 010c FFF7FEFF bl HAL_GPIO_WritePin + 3844 .LVL437: +2734:Src/main.c **** break; + 3845 .loc 1 2734 3 is_stmt 1 view .LVU1126 + 3846 0110 0022 movs r2, #0 + 3847 0112 8021 movs r1, #128 + 3848 0114 2046 mov r0, r4 + 3849 0116 FFF7FEFF bl HAL_GPIO_WritePin + 3850 .LVL438: +2735:Src/main.c **** } + 3851 .loc 1 2735 2 view .LVU1127 +2737:Src/main.c **** + 3852 .loc 1 2737 1 is_stmt 0 view .LVU1128 + 3853 011a 88E7 b .L274 + 3854 .L290: + 3855 .align 2 + 3856 .L289: + 3857 011c 00180240 .word 1073879040 + 3858 0120 00040240 .word 1073873920 + 3859 .cfi_endproc + 3860 .LFE1211: + 3862 .section .text.MPhD_T,"ax",%progbits + 3863 .align 1 + 3864 .syntax unified + 3865 .thumb + 3866 .thumb_func + 3868 MPhD_T: + 3869 .LVL439: + 3870 .LFB1236: +3529:Src/main.c **** uint16_t P; + 3871 .loc 1 3529 1 is_stmt 1 view -0 + 3872 .cfi_startproc + 3873 @ args = 0, pretend = 0, frame = 0 + 3874 @ frame_needed = 0, uses_anonymous_args = 0 +3529:Src/main.c **** uint16_t P; + 3875 .loc 1 3529 1 is_stmt 0 view .LVU1130 + 3876 0000 38B5 push {r3, r4, r5, lr} + 3877 .LCFI38: + 3878 .cfi_def_cfa_offset 16 + 3879 .cfi_offset 3, -16 + ARM GAS /tmp/ccLSPxIe.s page 215 -2614:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 3258 .loc 1 2614 3 view .LVU985 - 3259 0084 254C ldr r4, .L239 - 3260 0086 0122 movs r2, #1 - 3261 0088 4FF48041 mov r1, #16384 - 3262 008c 2046 mov r0, r4 - 3263 .LVL378: -2614:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 3264 .loc 1 2614 3 is_stmt 0 view .LVU986 - 3265 008e FFF7FEFF bl HAL_GPIO_WritePin - 3266 .LVL379: -2615:Src/main.c **** break; - 3267 .loc 1 2615 3 is_stmt 1 view .LVU987 - 3268 0092 0022 movs r2, #0 - 3269 0094 4FF48041 mov r1, #16384 - 3270 0098 2046 mov r0, r4 - 3271 009a FFF7FEFF bl HAL_GPIO_WritePin - 3272 .LVL380: -2616:Src/main.c **** - 3273 .loc 1 2616 2 view .LVU988 - 3274 009e C6E7 b .L224 - 3275 .LVL381: - 3276 .L231: -2619:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 3277 .loc 1 2619 3 view .LVU989 - 3278 00a0 1E4C ldr r4, .L239 - 3279 00a2 0122 movs r2, #1 - 3280 00a4 4FF40041 mov r1, #32768 - 3281 00a8 2046 mov r0, r4 - 3282 .LVL382: -2619:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 3283 .loc 1 2619 3 is_stmt 0 view .LVU990 - 3284 00aa FFF7FEFF bl HAL_GPIO_WritePin - 3285 .LVL383: -2620:Src/main.c **** break; - 3286 .loc 1 2620 3 is_stmt 1 view .LVU991 - 3287 00ae 0022 movs r2, #0 - 3288 00b0 4FF40041 mov r1, #32768 - 3289 00b4 2046 mov r0, r4 - 3290 00b6 FFF7FEFF bl HAL_GPIO_WritePin - 3291 .LVL384: -2621:Src/main.c **** - 3292 .loc 1 2621 2 view .LVU992 - 3293 00ba B8E7 b .L224 - 3294 .LVL385: - 3295 .L230: -2624:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 3296 .loc 1 2624 3 view .LVU993 - 3297 00bc 184C ldr r4, .L239+4 - 3298 00be 0122 movs r2, #1 - 3299 00c0 1021 movs r1, #16 - 3300 00c2 2046 mov r0, r4 - 3301 .LVL386: -2624:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 3302 .loc 1 2624 3 is_stmt 0 view .LVU994 - 3303 00c4 FFF7FEFF bl HAL_GPIO_WritePin - 3304 .LVL387: - ARM GAS /tmp/ccuHnxNu.s page 199 + 3880 .cfi_offset 4, -12 + 3881 .cfi_offset 5, -8 + 3882 .cfi_offset 14, -4 + 3883 0002 0446 mov r4, r0 +3530:Src/main.c **** uint32_t tmp32; + 3884 .loc 1 3530 2 is_stmt 1 view .LVU1131 +3531:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 3885 .loc 1 3531 2 view .LVU1132 +3532:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 3886 .loc 1 3532 2 view .LVU1133 + 3887 0004 0022 movs r2, #0 + 3888 0006 4FF48041 mov r1, #16384 + 3889 000a 8148 ldr r0, .L332 + 3890 .LVL440: +3532:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 3891 .loc 1 3532 2 is_stmt 0 view .LVU1134 + 3892 000c FFF7FEFF bl HAL_GPIO_WritePin + 3893 .LVL441: +3533:Src/main.c **** tmp32=0; + 3894 .loc 1 3533 2 is_stmt 1 view .LVU1135 + 3895 0010 0022 movs r2, #0 + 3896 0012 4FF40071 mov r1, #512 + 3897 0016 7F48 ldr r0, .L332+4 + 3898 0018 FFF7FEFF bl HAL_GPIO_WritePin + 3899 .LVL442: +3534:Src/main.c **** while(tmp32<500){tmp32++;} + 3900 .loc 1 3534 2 view .LVU1136 +3535:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3901 .loc 1 3535 2 view .LVU1137 +3534:Src/main.c **** while(tmp32<500){tmp32++;} + 3902 .loc 1 3534 7 is_stmt 0 view .LVU1138 + 3903 001c 0023 movs r3, #0 +3535:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3904 .loc 1 3535 7 view .LVU1139 + 3905 001e 00E0 b .L292 + 3906 .LVL443: + 3907 .L293: +3535:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3908 .loc 1 3535 19 is_stmt 1 discriminator 2 view .LVU1140 +3535:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3909 .loc 1 3535 24 is_stmt 0 discriminator 2 view .LVU1141 + 3910 0020 0133 adds r3, r3, #1 + 3911 .LVL444: + 3912 .L292: +3535:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3913 .loc 1 3535 13 is_stmt 1 discriminator 1 view .LVU1142 + 3914 0022 B3F5FA7F cmp r3, #500 + 3915 0026 FBD3 bcc .L293 +3536:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 3916 .loc 1 3536 2 view .LVU1143 + 3917 0028 0122 movs r2, #1 + 3918 002a 4FF48041 mov r1, #16384 + 3919 002e 7848 ldr r0, .L332 + 3920 0030 FFF7FEFF bl HAL_GPIO_WritePin + 3921 .LVL445: +3537:Src/main.c **** tmp32=0; + 3922 .loc 1 3537 2 view .LVU1144 + ARM GAS /tmp/ccLSPxIe.s page 216 -2625:Src/main.c **** break; - 3305 .loc 1 2625 3 is_stmt 1 view .LVU995 - 3306 00c8 0022 movs r2, #0 - 3307 00ca 1021 movs r1, #16 - 3308 00cc 2046 mov r0, r4 - 3309 00ce FFF7FEFF bl HAL_GPIO_WritePin - 3310 .LVL388: -2626:Src/main.c **** - 3311 .loc 1 2626 2 view .LVU996 - 3312 00d2 ACE7 b .L224 - 3313 .LVL389: - 3314 .L229: -2629:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 3315 .loc 1 2629 3 view .LVU997 - 3316 00d4 124C ldr r4, .L239+4 - 3317 00d6 0122 movs r2, #1 - 3318 00d8 2021 movs r1, #32 - 3319 00da 2046 mov r0, r4 - 3320 .LVL390: -2629:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 3321 .loc 1 2629 3 is_stmt 0 view .LVU998 - 3322 00dc FFF7FEFF bl HAL_GPIO_WritePin - 3323 .LVL391: -2630:Src/main.c **** break; - 3324 .loc 1 2630 3 is_stmt 1 view .LVU999 - 3325 00e0 0022 movs r2, #0 - 3326 00e2 2021 movs r1, #32 - 3327 00e4 2046 mov r0, r4 - 3328 00e6 FFF7FEFF bl HAL_GPIO_WritePin - 3329 .LVL392: -2631:Src/main.c **** - 3330 .loc 1 2631 2 view .LVU1000 - 3331 00ea A0E7 b .L224 - 3332 .LVL393: - 3333 .L228: -2634:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 3334 .loc 1 2634 3 view .LVU1001 - 3335 00ec 0C4C ldr r4, .L239+4 - 3336 00ee 0122 movs r2, #1 - 3337 00f0 4021 movs r1, #64 - 3338 00f2 2046 mov r0, r4 - 3339 .LVL394: -2634:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 3340 .loc 1 2634 3 is_stmt 0 view .LVU1002 - 3341 00f4 FFF7FEFF bl HAL_GPIO_WritePin - 3342 .LVL395: -2635:Src/main.c **** break; - 3343 .loc 1 2635 3 is_stmt 1 view .LVU1003 - 3344 00f8 0022 movs r2, #0 - 3345 00fa 4021 movs r1, #64 - 3346 00fc 2046 mov r0, r4 - 3347 00fe FFF7FEFF bl HAL_GPIO_WritePin - 3348 .LVL396: -2636:Src/main.c **** - 3349 .loc 1 2636 2 view .LVU1004 - 3350 0102 94E7 b .L224 - 3351 .LVL397: - ARM GAS /tmp/ccuHnxNu.s page 200 + 3923 0034 0122 movs r2, #1 + 3924 0036 4FF40071 mov r1, #512 + 3925 003a 7648 ldr r0, .L332+4 + 3926 003c FFF7FEFF bl HAL_GPIO_WritePin + 3927 .LVL446: +3538:Src/main.c **** while(tmp32<500){tmp32++;} + 3928 .loc 1 3538 2 view .LVU1145 +3539:Src/main.c **** if (num==1)//MPD1 + 3929 .loc 1 3539 2 view .LVU1146 +3538:Src/main.c **** while(tmp32<500){tmp32++;} + 3930 .loc 1 3538 7 is_stmt 0 view .LVU1147 + 3931 0040 0023 movs r3, #0 +3539:Src/main.c **** if (num==1)//MPD1 + 3932 .loc 1 3539 7 view .LVU1148 + 3933 0042 00E0 b .L294 + 3934 .LVL447: + 3935 .L295: +3539:Src/main.c **** if (num==1)//MPD1 + 3936 .loc 1 3539 19 is_stmt 1 discriminator 2 view .LVU1149 +3539:Src/main.c **** if (num==1)//MPD1 + 3937 .loc 1 3539 24 is_stmt 0 discriminator 2 view .LVU1150 + 3938 0044 0133 adds r3, r3, #1 + 3939 .LVL448: + 3940 .L294: +3539:Src/main.c **** if (num==1)//MPD1 + 3941 .loc 1 3539 13 is_stmt 1 discriminator 1 view .LVU1151 + 3942 0046 B3F5FA7F cmp r3, #500 + 3943 004a FBD3 bcc .L295 +3540:Src/main.c **** { + 3944 .loc 1 3540 2 view .LVU1152 + 3945 004c 631E subs r3, r4, #1 + 3946 .LVL449: +3540:Src/main.c **** { + 3947 .loc 1 3540 2 is_stmt 0 view .LVU1153 + 3948 004e 032B cmp r3, #3 + 3949 0050 39D8 bhi .L296 + 3950 0052 DFE803F0 tbb [pc, r3] + 3951 .L298: + 3952 0056 02 .byte (.L301-.L298)/2 + 3953 0057 3A .byte (.L300-.L298)/2 + 3954 0058 6F .byte (.L299-.L298)/2 + 3955 0059 A6 .byte (.L297-.L298)/2 + 3956 .p2align 1 + 3957 .L301: +3542:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); + 3958 .loc 1 3542 3 is_stmt 1 view .LVU1154 + 3959 005a 6D4C ldr r4, .L332 + 3960 .LVL450: +3542:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); + 3961 .loc 1 3542 3 is_stmt 0 view .LVU1155 + 3962 005c 0122 movs r2, #1 + 3963 005e 4FF40061 mov r1, #2048 + 3964 0062 2046 mov r0, r4 + 3965 0064 FFF7FEFF bl HAL_GPIO_WritePin + 3966 .LVL451: +3543:Src/main.c **** tmp32=0; + 3967 .loc 1 3543 3 is_stmt 1 view .LVU1156 + ARM GAS /tmp/ccLSPxIe.s page 217 - 3352 .L226: -2639:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 3353 .loc 1 2639 3 view .LVU1005 - 3354 0104 064C ldr r4, .L239+4 - 3355 0106 0122 movs r2, #1 - 3356 0108 8021 movs r1, #128 - 3357 010a 2046 mov r0, r4 - 3358 .LVL398: -2639:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 3359 .loc 1 2639 3 is_stmt 0 view .LVU1006 - 3360 010c FFF7FEFF bl HAL_GPIO_WritePin - 3361 .LVL399: -2640:Src/main.c **** break; - 3362 .loc 1 2640 3 is_stmt 1 view .LVU1007 - 3363 0110 0022 movs r2, #0 - 3364 0112 8021 movs r1, #128 - 3365 0114 2046 mov r0, r4 - 3366 0116 FFF7FEFF bl HAL_GPIO_WritePin - 3367 .LVL400: -2641:Src/main.c **** } - 3368 .loc 1 2641 2 view .LVU1008 -2643:Src/main.c **** - 3369 .loc 1 2643 1 is_stmt 0 view .LVU1009 - 3370 011a 88E7 b .L224 - 3371 .L240: - 3372 .align 2 - 3373 .L239: - 3374 011c 00180240 .word 1073879040 - 3375 0120 00040240 .word 1073873920 - 3376 .cfi_endproc - 3377 .LFE1211: - 3379 .section .text.MPhD_T,"ax",%progbits - 3380 .align 1 - 3381 .syntax unified - 3382 .thumb - 3383 .thumb_func - 3385 MPhD_T: - 3386 .LVL401: - 3387 .LFB1228: -3302:Src/main.c **** uint16_t P; - 3388 .loc 1 3302 1 is_stmt 1 view -0 - 3389 .cfi_startproc - 3390 @ args = 0, pretend = 0, frame = 0 - 3391 @ frame_needed = 0, uses_anonymous_args = 0 -3302:Src/main.c **** uint16_t P; - 3392 .loc 1 3302 1 is_stmt 0 view .LVU1011 - 3393 0000 38B5 push {r3, r4, r5, lr} - 3394 .LCFI35: - 3395 .cfi_def_cfa_offset 16 - 3396 .cfi_offset 3, -16 - 3397 .cfi_offset 4, -12 - 3398 .cfi_offset 5, -8 - 3399 .cfi_offset 14, -4 - 3400 0002 0446 mov r4, r0 -3303:Src/main.c **** uint32_t tmp32; - 3401 .loc 1 3303 2 is_stmt 1 view .LVU1012 -3304:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - ARM GAS /tmp/ccuHnxNu.s page 201 - - - 3402 .loc 1 3304 2 view .LVU1013 -3305:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 3403 .loc 1 3305 2 view .LVU1014 - 3404 0004 0022 movs r2, #0 - 3405 0006 4FF48041 mov r1, #16384 - 3406 000a 8148 ldr r0, .L282 - 3407 .LVL402: -3305:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 3408 .loc 1 3305 2 is_stmt 0 view .LVU1015 - 3409 000c FFF7FEFF bl HAL_GPIO_WritePin - 3410 .LVL403: -3306:Src/main.c **** tmp32=0; - 3411 .loc 1 3306 2 is_stmt 1 view .LVU1016 - 3412 0010 0022 movs r2, #0 - 3413 0012 4FF40071 mov r1, #512 - 3414 0016 7F48 ldr r0, .L282+4 - 3415 0018 FFF7FEFF bl HAL_GPIO_WritePin - 3416 .LVL404: -3307:Src/main.c **** while(tmp32<500){tmp32++;} - 3417 .loc 1 3307 2 view .LVU1017 -3308:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3418 .loc 1 3308 2 view .LVU1018 -3307:Src/main.c **** while(tmp32<500){tmp32++;} - 3419 .loc 1 3307 7 is_stmt 0 view .LVU1019 - 3420 001c 0023 movs r3, #0 -3308:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3421 .loc 1 3308 7 view .LVU1020 - 3422 001e 00E0 b .L242 - 3423 .LVL405: - 3424 .L243: -3308:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3425 .loc 1 3308 19 is_stmt 1 discriminator 2 view .LVU1021 -3308:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3426 .loc 1 3308 24 is_stmt 0 discriminator 2 view .LVU1022 - 3427 0020 0133 adds r3, r3, #1 - 3428 .LVL406: - 3429 .L242: -3308:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3430 .loc 1 3308 13 is_stmt 1 discriminator 1 view .LVU1023 - 3431 0022 B3F5FA7F cmp r3, #500 - 3432 0026 FBD3 bcc .L243 -3309:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 3433 .loc 1 3309 2 view .LVU1024 - 3434 0028 0122 movs r2, #1 - 3435 002a 4FF48041 mov r1, #16384 - 3436 002e 7848 ldr r0, .L282 - 3437 0030 FFF7FEFF bl HAL_GPIO_WritePin - 3438 .LVL407: -3310:Src/main.c **** tmp32=0; - 3439 .loc 1 3310 2 view .LVU1025 - 3440 0034 0122 movs r2, #1 - 3441 0036 4FF40071 mov r1, #512 - 3442 003a 7648 ldr r0, .L282+4 - 3443 003c FFF7FEFF bl HAL_GPIO_WritePin - 3444 .LVL408: -3311:Src/main.c **** while(tmp32<500){tmp32++;} - 3445 .loc 1 3311 2 view .LVU1026 - ARM GAS /tmp/ccuHnxNu.s page 202 - - -3312:Src/main.c **** if (num==1)//MPD1 - 3446 .loc 1 3312 2 view .LVU1027 -3311:Src/main.c **** while(tmp32<500){tmp32++;} - 3447 .loc 1 3311 7 is_stmt 0 view .LVU1028 - 3448 0040 0023 movs r3, #0 -3312:Src/main.c **** if (num==1)//MPD1 - 3449 .loc 1 3312 7 view .LVU1029 - 3450 0042 00E0 b .L244 - 3451 .LVL409: - 3452 .L245: -3312:Src/main.c **** if (num==1)//MPD1 - 3453 .loc 1 3312 19 is_stmt 1 discriminator 2 view .LVU1030 -3312:Src/main.c **** if (num==1)//MPD1 - 3454 .loc 1 3312 24 is_stmt 0 discriminator 2 view .LVU1031 - 3455 0044 0133 adds r3, r3, #1 - 3456 .LVL410: - 3457 .L244: -3312:Src/main.c **** if (num==1)//MPD1 - 3458 .loc 1 3312 13 is_stmt 1 discriminator 1 view .LVU1032 - 3459 0046 B3F5FA7F cmp r3, #500 - 3460 004a FBD3 bcc .L245 -3313:Src/main.c **** { - 3461 .loc 1 3313 2 view .LVU1033 - 3462 004c 631E subs r3, r4, #1 - 3463 .LVL411: -3313:Src/main.c **** { - 3464 .loc 1 3313 2 is_stmt 0 view .LVU1034 - 3465 004e 032B cmp r3, #3 - 3466 0050 39D8 bhi .L246 - 3467 0052 DFE803F0 tbb [pc, r3] - 3468 .L248: - 3469 0056 02 .byte (.L251-.L248)/2 - 3470 0057 3A .byte (.L250-.L248)/2 - 3471 0058 6F .byte (.L249-.L248)/2 - 3472 0059 A6 .byte (.L247-.L248)/2 - 3473 .p2align 1 - 3474 .L251: -3315:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 3475 .loc 1 3315 3 is_stmt 1 view .LVU1035 - 3476 005a 6D4C ldr r4, .L282 - 3477 .LVL412: -3315:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 3478 .loc 1 3315 3 is_stmt 0 view .LVU1036 - 3479 005c 0122 movs r2, #1 - 3480 005e 4FF40061 mov r1, #2048 - 3481 0062 2046 mov r0, r4 - 3482 0064 FFF7FEFF bl HAL_GPIO_WritePin - 3483 .LVL413: -3316:Src/main.c **** tmp32=0; - 3484 .loc 1 3316 3 is_stmt 1 view .LVU1037 - 3485 0068 0022 movs r2, #0 - 3486 006a 4FF48061 mov r1, #1024 - 3487 006e 2046 mov r0, r4 - 3488 0070 FFF7FEFF bl HAL_GPIO_WritePin - 3489 .LVL414: -3317:Src/main.c **** while(tmp32<500){tmp32++;} - 3490 .loc 1 3317 3 view .LVU1038 - ARM GAS /tmp/ccuHnxNu.s page 203 - - -3318:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3491 .loc 1 3318 3 view .LVU1039 -3317:Src/main.c **** while(tmp32<500){tmp32++;} - 3492 .loc 1 3317 8 is_stmt 0 view .LVU1040 - 3493 0074 0023 movs r3, #0 -3318:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3494 .loc 1 3318 8 view .LVU1041 - 3495 0076 00E0 b .L252 - 3496 .LVL415: - 3497 .L253: -3318:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3498 .loc 1 3318 20 is_stmt 1 discriminator 2 view .LVU1042 -3318:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3499 .loc 1 3318 25 is_stmt 0 discriminator 2 view .LVU1043 - 3500 0078 0133 adds r3, r3, #1 - 3501 .LVL416: - 3502 .L252: -3318:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3503 .loc 1 3318 14 is_stmt 1 discriminator 1 view .LVU1044 - 3504 007a B3F5FA7F cmp r3, #500 - 3505 007e FBD3 bcc .L253 -3320:Src/main.c **** tmp32 = 0; - 3506 .loc 1 3320 3 view .LVU1045 - 3507 .LVL417: - 3508 .LBB428: - 3509 .LBI428: + 3968 0068 0022 movs r2, #0 + 3969 006a 4FF48061 mov r1, #1024 + 3970 006e 2046 mov r0, r4 + 3971 0070 FFF7FEFF bl HAL_GPIO_WritePin + 3972 .LVL452: +3544:Src/main.c **** while(tmp32<500){tmp32++;} + 3973 .loc 1 3544 3 view .LVU1157 +3545:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3974 .loc 1 3545 3 view .LVU1158 +3544:Src/main.c **** while(tmp32<500){tmp32++;} + 3975 .loc 1 3544 8 is_stmt 0 view .LVU1159 + 3976 0074 0023 movs r3, #0 +3545:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3977 .loc 1 3545 8 view .LVU1160 + 3978 0076 00E0 b .L302 + 3979 .LVL453: + 3980 .L303: +3545:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3981 .loc 1 3545 20 is_stmt 1 discriminator 2 view .LVU1161 +3545:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3982 .loc 1 3545 25 is_stmt 0 discriminator 2 view .LVU1162 + 3983 0078 0133 adds r3, r3, #1 + 3984 .LVL454: + 3985 .L302: +3545:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 3986 .loc 1 3545 14 is_stmt 1 discriminator 1 view .LVU1163 + 3987 007a B3F5FA7F cmp r3, #500 + 3988 007e FBD3 bcc .L303 +3547:Src/main.c **** tmp32 = 0; + 3989 .loc 1 3547 3 view .LVU1164 + 3990 .LVL455: + 3991 .LBB433: + 3992 .LBI433: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3510 .loc 4 358 22 view .LVU1046 - 3511 .LBB429: + 3993 .loc 4 358 22 view .LVU1165 + 3994 .LBB434: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3512 .loc 4 360 3 view .LVU1047 - 3513 0080 654A ldr r2, .L282+8 - 3514 0082 1368 ldr r3, [r2] - 3515 .LVL418: + 3995 .loc 4 360 3 view .LVU1166 + 3996 0080 654A ldr r2, .L332+8 + 3997 0082 1368 ldr r3, [r2] + 3998 .LVL456: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3516 .loc 4 360 3 is_stmt 0 view .LVU1048 - 3517 0084 43F04003 orr r3, r3, #64 - 3518 0088 1360 str r3, [r2] - 3519 .LVL419: + 3999 .loc 4 360 3 is_stmt 0 view .LVU1167 + 4000 0084 43F04003 orr r3, r3, #64 + 4001 0088 1360 str r3, [r2] + 4002 .LVL457: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3520 .loc 4 360 3 view .LVU1049 - 3521 .LBE429: - 3522 .LBE428: -3321:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3523 .loc 1 3321 3 is_stmt 1 view .LVU1050 -3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3524 .loc 1 3322 3 view .LVU1051 -3321:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3525 .loc 1 3321 9 is_stmt 0 view .LVU1052 - 3526 008a 0023 movs r3, #0 - 3527 .LVL420: - 3528 .L254: -3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3529 .loc 1 3322 43 is_stmt 1 discriminator 1 view .LVU1053 - 3530 .LBB430: - 3531 .LBI430: + 4003 .loc 4 360 3 view .LVU1168 + 4004 .LBE434: + 4005 .LBE433: +3548:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 4006 .loc 1 3548 3 is_stmt 1 view .LVU1169 +3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 4007 .loc 1 3549 3 view .LVU1170 +3548:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 4008 .loc 1 3548 9 is_stmt 0 view .LVU1171 + 4009 008a 0023 movs r3, #0 + ARM GAS /tmp/ccLSPxIe.s page 218 + + + 4010 .LVL458: + 4011 .L304: +3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 4012 .loc 1 3549 43 is_stmt 1 discriminator 1 view .LVU1172 + 4013 .LBB435: + 4014 .LBI435: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccuHnxNu.s page 204 - - - 3532 .loc 4 905 26 view .LVU1054 - 3533 .LBB431: + 4015 .loc 4 905 26 view .LVU1173 + 4016 .LBB436: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3534 .loc 4 907 3 view .LVU1055 + 4017 .loc 4 907 3 view .LVU1174 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3535 .loc 4 907 12 is_stmt 0 view .LVU1056 - 3536 008c 624A ldr r2, .L282+8 - 3537 008e 9268 ldr r2, [r2, #8] + 4018 .loc 4 907 12 is_stmt 0 view .LVU1175 + 4019 008c 624A ldr r2, .L332+8 + 4020 008e 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3538 .loc 4 907 68 view .LVU1057 - 3539 0090 12F0010F tst r2, #1 - 3540 0094 04D1 bne .L255 - 3541 .LVL421: + 4021 .loc 4 907 68 view .LVU1176 + 4022 0090 12F0010F tst r2, #1 + 4023 0094 04D1 bne .L305 + 4024 .LVL459: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3542 .loc 4 907 68 view .LVU1058 - 3543 .LBE431: - 3544 .LBE430: -3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3545 .loc 1 3322 43 discriminator 2 view .LVU1059 - 3546 0096 B3F57A7F cmp r3, #1000 - 3547 009a 01D8 bhi .L255 -3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3548 .loc 1 3322 62 is_stmt 1 discriminator 3 view .LVU1060 -3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3549 .loc 1 3322 67 is_stmt 0 discriminator 3 view .LVU1061 - 3550 009c 0133 adds r3, r3, #1 - 3551 .LVL422: -3322:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 3552 .loc 1 3322 67 discriminator 3 view .LVU1062 - 3553 009e F5E7 b .L254 - 3554 .L255: -3323:Src/main.c **** while(tmp32<500){tmp32++;} - 3555 .loc 1 3323 3 is_stmt 1 view .LVU1063 - 3556 .LVL423: - 3557 .LBB432: - 3558 .LBI432: + 4025 .loc 4 907 68 view .LVU1177 + 4026 .LBE436: + 4027 .LBE435: +3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 4028 .loc 1 3549 43 discriminator 2 view .LVU1178 + 4029 0096 B3F57A7F cmp r3, #1000 + 4030 009a 01D8 bhi .L305 +3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 4031 .loc 1 3549 62 is_stmt 1 discriminator 3 view .LVU1179 +3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 4032 .loc 1 3549 67 is_stmt 0 discriminator 3 view .LVU1180 + 4033 009c 0133 adds r3, r3, #1 + 4034 .LVL460: +3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 4035 .loc 1 3549 67 discriminator 3 view .LVU1181 + 4036 009e F5E7 b .L304 + 4037 .L305: +3550:Src/main.c **** while(tmp32<500){tmp32++;} + 4038 .loc 1 3550 3 is_stmt 1 view .LVU1182 + 4039 .LVL461: + 4040 .LBB437: + 4041 .LBI437: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3559 .loc 4 370 22 view .LVU1064 - 3560 .LBB433: + 4042 .loc 4 370 22 view .LVU1183 + 4043 .LBB438: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3561 .loc 4 372 3 view .LVU1065 - 3562 00a0 5D49 ldr r1, .L282+8 - 3563 00a2 0A68 ldr r2, [r1] - 3564 00a4 22F04002 bic r2, r2, #64 - 3565 00a8 0A60 str r2, [r1] - 3566 .LVL424: + 4044 .loc 4 372 3 view .LVU1184 + 4045 00a0 5D49 ldr r1, .L332+8 + 4046 00a2 0A68 ldr r2, [r1] + 4047 00a4 22F04002 bic r2, r2, #64 + 4048 00a8 0A60 str r2, [r1] + 4049 .LVL462: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3567 .loc 4 372 3 is_stmt 0 view .LVU1066 - 3568 .LBE433: - 3569 .LBE432: -3324:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3570 .loc 1 3324 3 is_stmt 1 view .LVU1067 - 3571 .LBB435: - 3572 .LBB434: - 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3573 .loc 4 373 1 is_stmt 0 view .LVU1068 - 3574 00aa 00E0 b .L257 - ARM GAS /tmp/ccuHnxNu.s page 205 + 4050 .loc 4 372 3 is_stmt 0 view .LVU1185 + 4051 .LBE438: + 4052 .LBE437: + ARM GAS /tmp/ccLSPxIe.s page 219 - 3575 .L258: +3551:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4053 .loc 1 3551 3 is_stmt 1 view .LVU1186 + 4054 .LBB440: + 4055 .LBB439: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3576 .loc 4 373 1 view .LVU1069 - 3577 .LBE434: - 3578 .LBE435: -3324:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3579 .loc 1 3324 20 is_stmt 1 discriminator 2 view .LVU1070 -3324:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3580 .loc 1 3324 25 is_stmt 0 discriminator 2 view .LVU1071 - 3581 00ac 0133 adds r3, r3, #1 - 3582 .LVL425: - 3583 .L257: -3324:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3584 .loc 1 3324 14 is_stmt 1 discriminator 1 view .LVU1072 - 3585 00ae B3F5FA7F cmp r3, #500 - 3586 00b2 FBD3 bcc .L258 -3326:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 3587 .loc 1 3326 3 view .LVU1073 - 3588 00b4 0122 movs r2, #1 - 3589 00b6 4FF48061 mov r1, #1024 - 3590 00ba 5548 ldr r0, .L282 - 3591 00bc FFF7FEFF bl HAL_GPIO_WritePin - 3592 .LVL426: -3327:Src/main.c **** } - 3593 .loc 1 3327 3 view .LVU1074 - 3594 .LBB436: - 3595 .LBI436: + 4056 .loc 4 373 1 is_stmt 0 view .LVU1187 + 4057 00aa 00E0 b .L307 + 4058 .L308: + 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + 4059 .loc 4 373 1 view .LVU1188 + 4060 .LBE439: + 4061 .LBE440: +3551:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4062 .loc 1 3551 20 is_stmt 1 discriminator 2 view .LVU1189 +3551:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4063 .loc 1 3551 25 is_stmt 0 discriminator 2 view .LVU1190 + 4064 00ac 0133 adds r3, r3, #1 + 4065 .LVL463: + 4066 .L307: +3551:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4067 .loc 1 3551 14 is_stmt 1 discriminator 1 view .LVU1191 + 4068 00ae B3F5FA7F cmp r3, #500 + 4069 00b2 FBD3 bcc .L308 +3553:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); + 4070 .loc 1 3553 3 view .LVU1192 + 4071 00b4 0122 movs r2, #1 + 4072 00b6 4FF48061 mov r1, #1024 + 4073 00ba 5548 ldr r0, .L332 + 4074 00bc FFF7FEFF bl HAL_GPIO_WritePin + 4075 .LVL464: +3554:Src/main.c **** } + 4076 .loc 1 3554 3 view .LVU1193 + 4077 .LBB441: + 4078 .LBI441: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3596 .loc 4 1344 26 view .LVU1075 - 3597 .LBB437: + 4079 .loc 4 1344 26 view .LVU1194 + 4080 .LBB442: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3598 .loc 4 1346 3 view .LVU1076 + 4081 .loc 4 1346 3 view .LVU1195 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3599 .loc 4 1346 21 is_stmt 0 view .LVU1077 - 3600 00c0 554B ldr r3, .L282+8 - 3601 00c2 DD68 ldr r5, [r3, #12] + 4082 .loc 4 1346 21 is_stmt 0 view .LVU1196 + 4083 00c0 554B ldr r3, .L332+8 + 4084 00c2 DD68 ldr r5, [r3, #12] 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3602 .loc 4 1346 10 view .LVU1078 - 3603 00c4 ADB2 uxth r5, r5 - 3604 .LVL427: - 3605 .L246: + 4085 .loc 4 1346 10 view .LVU1197 + 4086 00c4 ADB2 uxth r5, r5 + 4087 .LVL465: + 4088 .L296: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3606 .loc 4 1346 10 view .LVU1079 - 3607 .LBE437: - 3608 .LBE436: -3399:Src/main.c **** } - 3609 .loc 1 3399 2 is_stmt 1 view .LVU1080 -3400:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time - 3610 .loc 1 3400 1 is_stmt 0 view .LVU1081 - 3611 00c6 2846 mov r0, r5 - 3612 00c8 38BD pop {r3, r4, r5, pc} - 3613 .LVL428: - 3614 .L250: -3331:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); - 3615 .loc 1 3331 3 is_stmt 1 view .LVU1082 - 3616 00ca 524C ldr r4, .L282+4 - 3617 00cc 0122 movs r2, #1 - ARM GAS /tmp/ccuHnxNu.s page 206 + 4089 .loc 4 1346 10 view .LVU1198 + 4090 .LBE442: + 4091 .LBE441: +3626:Src/main.c **** } + 4092 .loc 1 3626 2 is_stmt 1 view .LVU1199 +3627:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time + 4093 .loc 1 3627 1 is_stmt 0 view .LVU1200 + 4094 00c6 2846 mov r0, r5 + ARM GAS /tmp/ccLSPxIe.s page 220 - 3618 00ce 4FF48061 mov r1, #1024 - 3619 00d2 2046 mov r0, r4 - 3620 00d4 FFF7FEFF bl HAL_GPIO_WritePin - 3621 .LVL429: -3332:Src/main.c **** tmp32=0; - 3622 .loc 1 3332 3 view .LVU1083 - 3623 00d8 0022 movs r2, #0 - 3624 00da 4021 movs r1, #64 - 3625 00dc 2046 mov r0, r4 - 3626 00de FFF7FEFF bl HAL_GPIO_WritePin - 3627 .LVL430: -3333:Src/main.c **** while(tmp32<500){tmp32++;} - 3628 .loc 1 3333 3 view .LVU1084 -3334:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3629 .loc 1 3334 3 view .LVU1085 -3333:Src/main.c **** while(tmp32<500){tmp32++;} - 3630 .loc 1 3333 8 is_stmt 0 view .LVU1086 - 3631 00e2 0023 movs r3, #0 -3334:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3632 .loc 1 3334 8 view .LVU1087 - 3633 00e4 00E0 b .L259 - 3634 .LVL431: - 3635 .L260: -3334:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3636 .loc 1 3334 20 is_stmt 1 discriminator 2 view .LVU1088 -3334:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3637 .loc 1 3334 25 is_stmt 0 discriminator 2 view .LVU1089 - 3638 00e6 0133 adds r3, r3, #1 - 3639 .LVL432: - 3640 .L259: -3334:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3641 .loc 1 3334 14 is_stmt 1 discriminator 1 view .LVU1090 - 3642 00e8 B3F5FA7F cmp r3, #500 - 3643 00ec FBD3 bcc .L260 -3336:Src/main.c **** tmp32 = 0; - 3644 .loc 1 3336 3 view .LVU1091 - 3645 .LVL433: - 3646 .LBB438: - 3647 .LBI438: + 4095 00c8 38BD pop {r3, r4, r5, pc} + 4096 .LVL466: + 4097 .L300: +3558:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); + 4098 .loc 1 3558 3 is_stmt 1 view .LVU1201 + 4099 00ca 524C ldr r4, .L332+4 + 4100 00cc 0122 movs r2, #1 + 4101 00ce 4FF48061 mov r1, #1024 + 4102 00d2 2046 mov r0, r4 + 4103 00d4 FFF7FEFF bl HAL_GPIO_WritePin + 4104 .LVL467: +3559:Src/main.c **** tmp32=0; + 4105 .loc 1 3559 3 view .LVU1202 + 4106 00d8 0022 movs r2, #0 + 4107 00da 4021 movs r1, #64 + 4108 00dc 2046 mov r0, r4 + 4109 00de FFF7FEFF bl HAL_GPIO_WritePin + 4110 .LVL468: +3560:Src/main.c **** while(tmp32<500){tmp32++;} + 4111 .loc 1 3560 3 view .LVU1203 +3561:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4112 .loc 1 3561 3 view .LVU1204 +3560:Src/main.c **** while(tmp32<500){tmp32++;} + 4113 .loc 1 3560 8 is_stmt 0 view .LVU1205 + 4114 00e2 0023 movs r3, #0 +3561:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4115 .loc 1 3561 8 view .LVU1206 + 4116 00e4 00E0 b .L309 + 4117 .LVL469: + 4118 .L310: +3561:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4119 .loc 1 3561 20 is_stmt 1 discriminator 2 view .LVU1207 +3561:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4120 .loc 1 3561 25 is_stmt 0 discriminator 2 view .LVU1208 + 4121 00e6 0133 adds r3, r3, #1 + 4122 .LVL470: + 4123 .L309: +3561:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4124 .loc 1 3561 14 is_stmt 1 discriminator 1 view .LVU1209 + 4125 00e8 B3F5FA7F cmp r3, #500 + 4126 00ec FBD3 bcc .L310 +3563:Src/main.c **** tmp32 = 0; + 4127 .loc 1 3563 3 view .LVU1210 + 4128 .LVL471: + 4129 .LBB443: + 4130 .LBI443: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3648 .loc 4 358 22 view .LVU1092 - 3649 .LBB439: + 4131 .loc 4 358 22 view .LVU1211 + 4132 .LBB444: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3650 .loc 4 360 3 view .LVU1093 - 3651 00ee 4B4A ldr r2, .L282+12 - 3652 00f0 1368 ldr r3, [r2] - 3653 .LVL434: + 4133 .loc 4 360 3 view .LVU1212 + 4134 00ee 4B4A ldr r2, .L332+12 + 4135 00f0 1368 ldr r3, [r2] + 4136 .LVL472: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3654 .loc 4 360 3 is_stmt 0 view .LVU1094 - 3655 00f2 43F04003 orr r3, r3, #64 - 3656 00f6 1360 str r3, [r2] - 3657 .LVL435: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3658 .loc 4 360 3 view .LVU1095 - 3659 .LBE439: - 3660 .LBE438: -3337:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - ARM GAS /tmp/ccuHnxNu.s page 207 + 4137 .loc 4 360 3 is_stmt 0 view .LVU1213 + 4138 00f2 43F04003 orr r3, r3, #64 + ARM GAS /tmp/ccLSPxIe.s page 221 - 3661 .loc 1 3337 3 is_stmt 1 view .LVU1096 -3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3662 .loc 1 3338 3 view .LVU1097 -3337:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3663 .loc 1 3337 9 is_stmt 0 view .LVU1098 - 3664 00f8 0023 movs r3, #0 - 3665 .LVL436: - 3666 .L261: -3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3667 .loc 1 3338 43 is_stmt 1 discriminator 1 view .LVU1099 - 3668 .LBB440: - 3669 .LBI440: + 4139 00f6 1360 str r3, [r2] + 4140 .LVL473: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4141 .loc 4 360 3 view .LVU1214 + 4142 .LBE444: + 4143 .LBE443: +3564:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 4144 .loc 1 3564 3 is_stmt 1 view .LVU1215 +3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 4145 .loc 1 3565 3 view .LVU1216 +3564:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 4146 .loc 1 3564 9 is_stmt 0 view .LVU1217 + 4147 00f8 0023 movs r3, #0 + 4148 .LVL474: + 4149 .L311: +3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 4150 .loc 1 3565 43 is_stmt 1 discriminator 1 view .LVU1218 + 4151 .LBB445: + 4152 .LBI445: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3670 .loc 4 905 26 view .LVU1100 - 3671 .LBB441: + 4153 .loc 4 905 26 view .LVU1219 + 4154 .LBB446: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3672 .loc 4 907 3 view .LVU1101 + 4155 .loc 4 907 3 view .LVU1220 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3673 .loc 4 907 12 is_stmt 0 view .LVU1102 - 3674 00fa 484A ldr r2, .L282+12 - 3675 00fc 9268 ldr r2, [r2, #8] + 4156 .loc 4 907 12 is_stmt 0 view .LVU1221 + 4157 00fa 484A ldr r2, .L332+12 + 4158 00fc 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3676 .loc 4 907 68 view .LVU1103 - 3677 00fe 12F0010F tst r2, #1 - 3678 0102 04D1 bne .L262 - 3679 .LVL437: + 4159 .loc 4 907 68 view .LVU1222 + 4160 00fe 12F0010F tst r2, #1 + 4161 0102 04D1 bne .L312 + 4162 .LVL475: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3680 .loc 4 907 68 view .LVU1104 - 3681 .LBE441: - 3682 .LBE440: -3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3683 .loc 1 3338 43 discriminator 2 view .LVU1105 - 3684 0104 B3F57A7F cmp r3, #1000 - 3685 0108 01D8 bhi .L262 -3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3686 .loc 1 3338 62 is_stmt 1 discriminator 3 view .LVU1106 -3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3687 .loc 1 3338 67 is_stmt 0 discriminator 3 view .LVU1107 - 3688 010a 0133 adds r3, r3, #1 - 3689 .LVL438: -3338:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 3690 .loc 1 3338 67 discriminator 3 view .LVU1108 - 3691 010c F5E7 b .L261 - 3692 .L262: -3339:Src/main.c **** while(tmp32<500){tmp32++;} - 3693 .loc 1 3339 3 is_stmt 1 view .LVU1109 - 3694 .LVL439: - 3695 .LBB442: - 3696 .LBI442: + 4163 .loc 4 907 68 view .LVU1223 + 4164 .LBE446: + 4165 .LBE445: +3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 4166 .loc 1 3565 43 discriminator 2 view .LVU1224 + 4167 0104 B3F57A7F cmp r3, #1000 + 4168 0108 01D8 bhi .L312 +3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 4169 .loc 1 3565 62 is_stmt 1 discriminator 3 view .LVU1225 +3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 4170 .loc 1 3565 67 is_stmt 0 discriminator 3 view .LVU1226 + 4171 010a 0133 adds r3, r3, #1 + 4172 .LVL476: +3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 4173 .loc 1 3565 67 discriminator 3 view .LVU1227 + 4174 010c F5E7 b .L311 + 4175 .L312: +3566:Src/main.c **** while(tmp32<500){tmp32++;} + 4176 .loc 1 3566 3 is_stmt 1 view .LVU1228 + 4177 .LVL477: + 4178 .LBB447: + 4179 .LBI447: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3697 .loc 4 370 22 view .LVU1110 - 3698 .LBB443: - 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3699 .loc 4 372 3 view .LVU1111 - 3700 010e 4349 ldr r1, .L282+12 - 3701 0110 0A68 ldr r2, [r1] - 3702 0112 22F04002 bic r2, r2, #64 - ARM GAS /tmp/ccuHnxNu.s page 208 + ARM GAS /tmp/ccLSPxIe.s page 222 - 3703 0116 0A60 str r2, [r1] - 3704 .LVL440: + 4180 .loc 4 370 22 view .LVU1229 + 4181 .LBB448: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3705 .loc 4 372 3 is_stmt 0 view .LVU1112 - 3706 .LBE443: - 3707 .LBE442: -3340:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3708 .loc 1 3340 3 is_stmt 1 view .LVU1113 - 3709 .LBB445: - 3710 .LBB444: + 4182 .loc 4 372 3 view .LVU1230 + 4183 010e 4349 ldr r1, .L332+12 + 4184 0110 0A68 ldr r2, [r1] + 4185 0112 22F04002 bic r2, r2, #64 + 4186 0116 0A60 str r2, [r1] + 4187 .LVL478: + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4188 .loc 4 372 3 is_stmt 0 view .LVU1231 + 4189 .LBE448: + 4190 .LBE447: +3567:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4191 .loc 1 3567 3 is_stmt 1 view .LVU1232 + 4192 .LBB450: + 4193 .LBB449: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3711 .loc 4 373 1 is_stmt 0 view .LVU1114 - 3712 0118 00E0 b .L264 - 3713 .L265: + 4194 .loc 4 373 1 is_stmt 0 view .LVU1233 + 4195 0118 00E0 b .L314 + 4196 .L315: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3714 .loc 4 373 1 view .LVU1115 - 3715 .LBE444: - 3716 .LBE445: -3340:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3717 .loc 1 3340 20 is_stmt 1 discriminator 2 view .LVU1116 -3340:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3718 .loc 1 3340 25 is_stmt 0 discriminator 2 view .LVU1117 - 3719 011a 0133 adds r3, r3, #1 - 3720 .LVL441: - 3721 .L264: -3340:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3722 .loc 1 3340 14 is_stmt 1 discriminator 1 view .LVU1118 - 3723 011c B3F5FA7F cmp r3, #500 - 3724 0120 FBD3 bcc .L265 -3342:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 3725 .loc 1 3342 3 view .LVU1119 - 3726 0122 0122 movs r2, #1 - 3727 0124 4021 movs r1, #64 - 3728 0126 3B48 ldr r0, .L282+4 - 3729 0128 FFF7FEFF bl HAL_GPIO_WritePin - 3730 .LVL442: -3343:Src/main.c **** } - 3731 .loc 1 3343 3 view .LVU1120 - 3732 .LBB446: - 3733 .LBI446: + 4197 .loc 4 373 1 view .LVU1234 + 4198 .LBE449: + 4199 .LBE450: +3567:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4200 .loc 1 3567 20 is_stmt 1 discriminator 2 view .LVU1235 +3567:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4201 .loc 1 3567 25 is_stmt 0 discriminator 2 view .LVU1236 + 4202 011a 0133 adds r3, r3, #1 + 4203 .LVL479: + 4204 .L314: +3567:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4205 .loc 1 3567 14 is_stmt 1 discriminator 1 view .LVU1237 + 4206 011c B3F5FA7F cmp r3, #500 + 4207 0120 FBD3 bcc .L315 +3569:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); + 4208 .loc 1 3569 3 view .LVU1238 + 4209 0122 0122 movs r2, #1 + 4210 0124 4021 movs r1, #64 + 4211 0126 3B48 ldr r0, .L332+4 + 4212 0128 FFF7FEFF bl HAL_GPIO_WritePin + 4213 .LVL480: +3570:Src/main.c **** } + 4214 .loc 1 3570 3 view .LVU1239 + 4215 .LBB451: + 4216 .LBI451: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3734 .loc 4 1344 26 view .LVU1121 - 3735 .LBB447: + 4217 .loc 4 1344 26 view .LVU1240 + 4218 .LBB452: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3736 .loc 4 1346 3 view .LVU1122 + 4219 .loc 4 1346 3 view .LVU1241 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3737 .loc 4 1346 21 is_stmt 0 view .LVU1123 - 3738 012c 3B4B ldr r3, .L282+12 - 3739 012e DD68 ldr r5, [r3, #12] + 4220 .loc 4 1346 21 is_stmt 0 view .LVU1242 + 4221 012c 3B4B ldr r3, .L332+12 + 4222 012e DD68 ldr r5, [r3, #12] 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3740 .loc 4 1346 10 view .LVU1124 - 3741 0130 ADB2 uxth r5, r5 - 3742 .LVL443: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3743 .loc 4 1346 10 view .LVU1125 - 3744 .LBE447: - 3745 .LBE446: - ARM GAS /tmp/ccuHnxNu.s page 209 + ARM GAS /tmp/ccLSPxIe.s page 223 - 3746 0132 C8E7 b .L246 - 3747 .LVL444: - 3748 .L249: -3347:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); - 3749 .loc 1 3347 3 is_stmt 1 view .LVU1126 - 3750 0134 364C ldr r4, .L282 - 3751 0136 0122 movs r2, #1 - 3752 0138 4FF48061 mov r1, #1024 - 3753 013c 2046 mov r0, r4 - 3754 013e FFF7FEFF bl HAL_GPIO_WritePin - 3755 .LVL445: -3348:Src/main.c **** tmp32=0; - 3756 .loc 1 3348 3 view .LVU1127 - 3757 0142 0022 movs r2, #0 - 3758 0144 4FF40061 mov r1, #2048 - 3759 0148 2046 mov r0, r4 - 3760 014a FFF7FEFF bl HAL_GPIO_WritePin - 3761 .LVL446: -3349:Src/main.c **** while(tmp32<500){tmp32++;} - 3762 .loc 1 3349 3 view .LVU1128 -3350:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3763 .loc 1 3350 3 view .LVU1129 -3349:Src/main.c **** while(tmp32<500){tmp32++;} - 3764 .loc 1 3349 8 is_stmt 0 view .LVU1130 - 3765 014e 0023 movs r3, #0 -3350:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3766 .loc 1 3350 8 view .LVU1131 - 3767 0150 00E0 b .L266 - 3768 .LVL447: - 3769 .L267: -3350:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3770 .loc 1 3350 20 is_stmt 1 discriminator 2 view .LVU1132 -3350:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3771 .loc 1 3350 25 is_stmt 0 discriminator 2 view .LVU1133 - 3772 0152 0133 adds r3, r3, #1 - 3773 .LVL448: - 3774 .L266: -3350:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3775 .loc 1 3350 14 is_stmt 1 discriminator 1 view .LVU1134 - 3776 0154 B3F5FA7F cmp r3, #500 - 3777 0158 FBD3 bcc .L267 -3352:Src/main.c **** tmp32 = 0; - 3778 .loc 1 3352 3 view .LVU1135 - 3779 .LVL449: - 3780 .LBB448: - 3781 .LBI448: + 4223 .loc 4 1346 10 view .LVU1243 + 4224 0130 ADB2 uxth r5, r5 + 4225 .LVL481: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4226 .loc 4 1346 10 view .LVU1244 + 4227 .LBE452: + 4228 .LBE451: + 4229 0132 C8E7 b .L296 + 4230 .LVL482: + 4231 .L299: +3574:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); + 4232 .loc 1 3574 3 is_stmt 1 view .LVU1245 + 4233 0134 364C ldr r4, .L332 + 4234 0136 0122 movs r2, #1 + 4235 0138 4FF48061 mov r1, #1024 + 4236 013c 2046 mov r0, r4 + 4237 013e FFF7FEFF bl HAL_GPIO_WritePin + 4238 .LVL483: +3575:Src/main.c **** tmp32=0; + 4239 .loc 1 3575 3 view .LVU1246 + 4240 0142 0022 movs r2, #0 + 4241 0144 4FF40061 mov r1, #2048 + 4242 0148 2046 mov r0, r4 + 4243 014a FFF7FEFF bl HAL_GPIO_WritePin + 4244 .LVL484: +3576:Src/main.c **** while(tmp32<500){tmp32++;} + 4245 .loc 1 3576 3 view .LVU1247 +3577:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4246 .loc 1 3577 3 view .LVU1248 +3576:Src/main.c **** while(tmp32<500){tmp32++;} + 4247 .loc 1 3576 8 is_stmt 0 view .LVU1249 + 4248 014e 0023 movs r3, #0 +3577:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4249 .loc 1 3577 8 view .LVU1250 + 4250 0150 00E0 b .L316 + 4251 .LVL485: + 4252 .L317: +3577:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4253 .loc 1 3577 20 is_stmt 1 discriminator 2 view .LVU1251 +3577:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4254 .loc 1 3577 25 is_stmt 0 discriminator 2 view .LVU1252 + 4255 0152 0133 adds r3, r3, #1 + 4256 .LVL486: + 4257 .L316: +3577:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4258 .loc 1 3577 14 is_stmt 1 discriminator 1 view .LVU1253 + 4259 0154 B3F5FA7F cmp r3, #500 + 4260 0158 FBD3 bcc .L317 +3579:Src/main.c **** tmp32 = 0; + 4261 .loc 1 3579 3 view .LVU1254 + 4262 .LVL487: + 4263 .LBB453: + 4264 .LBI453: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3782 .loc 4 358 22 view .LVU1136 - 3783 .LBB449: + 4265 .loc 4 358 22 view .LVU1255 + 4266 .LBB454: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3784 .loc 4 360 3 view .LVU1137 - 3785 015a 2F4A ldr r2, .L282+8 - 3786 015c 1368 ldr r3, [r2] - 3787 .LVL450: - 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3788 .loc 4 360 3 is_stmt 0 view .LVU1138 - 3789 015e 43F04003 orr r3, r3, #64 - ARM GAS /tmp/ccuHnxNu.s page 210 + ARM GAS /tmp/ccLSPxIe.s page 224 - 3790 0162 1360 str r3, [r2] - 3791 .LVL451: + 4267 .loc 4 360 3 view .LVU1256 + 4268 015a 2F4A ldr r2, .L332+8 + 4269 015c 1368 ldr r3, [r2] + 4270 .LVL488: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3792 .loc 4 360 3 view .LVU1139 - 3793 .LBE449: - 3794 .LBE448: -3353:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3795 .loc 1 3353 3 is_stmt 1 view .LVU1140 -3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3796 .loc 1 3354 3 view .LVU1141 -3353:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3797 .loc 1 3353 9 is_stmt 0 view .LVU1142 - 3798 0164 0023 movs r3, #0 - 3799 .LVL452: - 3800 .L268: -3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3801 .loc 1 3354 43 is_stmt 1 discriminator 1 view .LVU1143 - 3802 .LBB450: - 3803 .LBI450: + 4271 .loc 4 360 3 is_stmt 0 view .LVU1257 + 4272 015e 43F04003 orr r3, r3, #64 + 4273 0162 1360 str r3, [r2] + 4274 .LVL489: + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4275 .loc 4 360 3 view .LVU1258 + 4276 .LBE454: + 4277 .LBE453: +3580:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 4278 .loc 1 3580 3 is_stmt 1 view .LVU1259 +3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 4279 .loc 1 3581 3 view .LVU1260 +3580:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 4280 .loc 1 3580 9 is_stmt 0 view .LVU1261 + 4281 0164 0023 movs r3, #0 + 4282 .LVL490: + 4283 .L318: +3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 4284 .loc 1 3581 43 is_stmt 1 discriminator 1 view .LVU1262 + 4285 .LBB455: + 4286 .LBI455: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3804 .loc 4 905 26 view .LVU1144 - 3805 .LBB451: + 4287 .loc 4 905 26 view .LVU1263 + 4288 .LBB456: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3806 .loc 4 907 3 view .LVU1145 + 4289 .loc 4 907 3 view .LVU1264 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3807 .loc 4 907 12 is_stmt 0 view .LVU1146 - 3808 0166 2C4A ldr r2, .L282+8 - 3809 0168 9268 ldr r2, [r2, #8] + 4290 .loc 4 907 12 is_stmt 0 view .LVU1265 + 4291 0166 2C4A ldr r2, .L332+8 + 4292 0168 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3810 .loc 4 907 68 view .LVU1147 - 3811 016a 12F0010F tst r2, #1 - 3812 016e 04D1 bne .L269 - 3813 .LVL453: + 4293 .loc 4 907 68 view .LVU1266 + 4294 016a 12F0010F tst r2, #1 + 4295 016e 04D1 bne .L319 + 4296 .LVL491: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3814 .loc 4 907 68 view .LVU1148 - 3815 .LBE451: - 3816 .LBE450: -3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3817 .loc 1 3354 43 discriminator 2 view .LVU1149 - 3818 0170 B3F57A7F cmp r3, #1000 - 3819 0174 01D8 bhi .L269 -3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3820 .loc 1 3354 62 is_stmt 1 discriminator 3 view .LVU1150 -3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3821 .loc 1 3354 67 is_stmt 0 discriminator 3 view .LVU1151 - 3822 0176 0133 adds r3, r3, #1 - 3823 .LVL454: -3354:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 3824 .loc 1 3354 67 discriminator 3 view .LVU1152 - 3825 0178 F5E7 b .L268 - 3826 .L269: -3355:Src/main.c **** while(tmp32<500){tmp32++;} - 3827 .loc 1 3355 3 is_stmt 1 view .LVU1153 - 3828 .LVL455: - 3829 .LBB452: - 3830 .LBI452: + 4297 .loc 4 907 68 view .LVU1267 + 4298 .LBE456: + 4299 .LBE455: +3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 4300 .loc 1 3581 43 discriminator 2 view .LVU1268 + 4301 0170 B3F57A7F cmp r3, #1000 + 4302 0174 01D8 bhi .L319 +3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 4303 .loc 1 3581 62 is_stmt 1 discriminator 3 view .LVU1269 +3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 4304 .loc 1 3581 67 is_stmt 0 discriminator 3 view .LVU1270 + 4305 0176 0133 adds r3, r3, #1 + 4306 .LVL492: +3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 4307 .loc 1 3581 67 discriminator 3 view .LVU1271 + 4308 0178 F5E7 b .L318 + ARM GAS /tmp/ccLSPxIe.s page 225 + + + 4309 .L319: +3582:Src/main.c **** while(tmp32<500){tmp32++;} + 4310 .loc 1 3582 3 is_stmt 1 view .LVU1272 + 4311 .LVL493: + 4312 .LBB457: + 4313 .LBI457: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccuHnxNu.s page 211 - - - 3831 .loc 4 370 22 view .LVU1154 - 3832 .LBB453: + 4314 .loc 4 370 22 view .LVU1273 + 4315 .LBB458: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3833 .loc 4 372 3 view .LVU1155 - 3834 017a 2749 ldr r1, .L282+8 - 3835 017c 0A68 ldr r2, [r1] - 3836 017e 22F04002 bic r2, r2, #64 - 3837 0182 0A60 str r2, [r1] - 3838 .LVL456: + 4316 .loc 4 372 3 view .LVU1274 + 4317 017a 2749 ldr r1, .L332+8 + 4318 017c 0A68 ldr r2, [r1] + 4319 017e 22F04002 bic r2, r2, #64 + 4320 0182 0A60 str r2, [r1] + 4321 .LVL494: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3839 .loc 4 372 3 is_stmt 0 view .LVU1156 - 3840 .LBE453: - 3841 .LBE452: -3356:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3842 .loc 1 3356 3 is_stmt 1 view .LVU1157 - 3843 .LBB455: - 3844 .LBB454: + 4322 .loc 4 372 3 is_stmt 0 view .LVU1275 + 4323 .LBE458: + 4324 .LBE457: +3583:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4325 .loc 1 3583 3 is_stmt 1 view .LVU1276 + 4326 .LBB460: + 4327 .LBB459: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3845 .loc 4 373 1 is_stmt 0 view .LVU1158 - 3846 0184 00E0 b .L271 - 3847 .L272: + 4328 .loc 4 373 1 is_stmt 0 view .LVU1277 + 4329 0184 00E0 b .L321 + 4330 .L322: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3848 .loc 4 373 1 view .LVU1159 - 3849 .LBE454: - 3850 .LBE455: -3356:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3851 .loc 1 3356 20 is_stmt 1 discriminator 2 view .LVU1160 -3356:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3852 .loc 1 3356 25 is_stmt 0 discriminator 2 view .LVU1161 - 3853 0186 0133 adds r3, r3, #1 - 3854 .LVL457: - 3855 .L271: -3356:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3856 .loc 1 3356 14 is_stmt 1 discriminator 1 view .LVU1162 - 3857 0188 B3F5FA7F cmp r3, #500 - 3858 018c FBD3 bcc .L272 -3358:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 3859 .loc 1 3358 3 view .LVU1163 - 3860 018e 0122 movs r2, #1 - 3861 0190 4FF40061 mov r1, #2048 - 3862 0194 1E48 ldr r0, .L282 - 3863 0196 FFF7FEFF bl HAL_GPIO_WritePin - 3864 .LVL458: -3359:Src/main.c **** } - 3865 .loc 1 3359 3 view .LVU1164 - 3866 .LBB456: - 3867 .LBI456: + 4331 .loc 4 373 1 view .LVU1278 + 4332 .LBE459: + 4333 .LBE460: +3583:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4334 .loc 1 3583 20 is_stmt 1 discriminator 2 view .LVU1279 +3583:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4335 .loc 1 3583 25 is_stmt 0 discriminator 2 view .LVU1280 + 4336 0186 0133 adds r3, r3, #1 + 4337 .LVL495: + 4338 .L321: +3583:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4339 .loc 1 3583 14 is_stmt 1 discriminator 1 view .LVU1281 + 4340 0188 B3F5FA7F cmp r3, #500 + 4341 018c FBD3 bcc .L322 +3585:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); + 4342 .loc 1 3585 3 view .LVU1282 + 4343 018e 0122 movs r2, #1 + 4344 0190 4FF40061 mov r1, #2048 + 4345 0194 1E48 ldr r0, .L332 + 4346 0196 FFF7FEFF bl HAL_GPIO_WritePin + 4347 .LVL496: +3586:Src/main.c **** } + 4348 .loc 1 3586 3 view .LVU1283 + 4349 .LBB461: + 4350 .LBI461: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3868 .loc 4 1344 26 view .LVU1165 - 3869 .LBB457: -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3870 .loc 4 1346 3 view .LVU1166 -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3871 .loc 4 1346 21 is_stmt 0 view .LVU1167 - 3872 019a 1F4B ldr r3, .L282+8 - 3873 019c DD68 ldr r5, [r3, #12] -1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccuHnxNu.s page 212 + 4351 .loc 4 1344 26 view .LVU1284 + 4352 .LBB462: + ARM GAS /tmp/ccLSPxIe.s page 226 - 3874 .loc 4 1346 10 view .LVU1168 - 3875 019e ADB2 uxth r5, r5 - 3876 .LVL459: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3877 .loc 4 1346 10 view .LVU1169 - 3878 .LBE457: - 3879 .LBE456: - 3880 01a0 91E7 b .L246 - 3881 .LVL460: - 3882 .L247: -3363:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); - 3883 .loc 1 3363 3 is_stmt 1 view .LVU1170 - 3884 01a2 1C4C ldr r4, .L282+4 - 3885 01a4 0122 movs r2, #1 - 3886 01a6 4021 movs r1, #64 - 3887 01a8 2046 mov r0, r4 - 3888 01aa FFF7FEFF bl HAL_GPIO_WritePin - 3889 .LVL461: -3364:Src/main.c **** tmp32=0; - 3890 .loc 1 3364 3 view .LVU1171 - 3891 01ae 0022 movs r2, #0 - 3892 01b0 4FF48061 mov r1, #1024 - 3893 01b4 2046 mov r0, r4 - 3894 01b6 FFF7FEFF bl HAL_GPIO_WritePin - 3895 .LVL462: -3365:Src/main.c **** while(tmp32<500){tmp32++;} - 3896 .loc 1 3365 3 view .LVU1172 -3366:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3897 .loc 1 3366 3 view .LVU1173 -3365:Src/main.c **** while(tmp32<500){tmp32++;} - 3898 .loc 1 3365 8 is_stmt 0 view .LVU1174 - 3899 01ba 0023 movs r3, #0 -3366:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3900 .loc 1 3366 8 view .LVU1175 - 3901 01bc 00E0 b .L273 - 3902 .LVL463: - 3903 .L274: -3366:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3904 .loc 1 3366 20 is_stmt 1 discriminator 2 view .LVU1176 -3366:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3905 .loc 1 3366 25 is_stmt 0 discriminator 2 view .LVU1177 - 3906 01be 0133 adds r3, r3, #1 - 3907 .LVL464: - 3908 .L273: -3366:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 3909 .loc 1 3366 14 is_stmt 1 discriminator 1 view .LVU1178 - 3910 01c0 B3F5FA7F cmp r3, #500 - 3911 01c4 FBD3 bcc .L274 -3368:Src/main.c **** tmp32 = 0; - 3912 .loc 1 3368 3 view .LVU1179 - 3913 .LVL465: - 3914 .LBB458: - 3915 .LBI458: + 4353 .loc 4 1346 3 view .LVU1285 +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4354 .loc 4 1346 21 is_stmt 0 view .LVU1286 + 4355 019a 1F4B ldr r3, .L332+8 + 4356 019c DD68 ldr r5, [r3, #12] +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4357 .loc 4 1346 10 view .LVU1287 + 4358 019e ADB2 uxth r5, r5 + 4359 .LVL497: +1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 4360 .loc 4 1346 10 view .LVU1288 + 4361 .LBE462: + 4362 .LBE461: + 4363 01a0 91E7 b .L296 + 4364 .LVL498: + 4365 .L297: +3590:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); + 4366 .loc 1 3590 3 is_stmt 1 view .LVU1289 + 4367 01a2 1C4C ldr r4, .L332+4 + 4368 01a4 0122 movs r2, #1 + 4369 01a6 4021 movs r1, #64 + 4370 01a8 2046 mov r0, r4 + 4371 01aa FFF7FEFF bl HAL_GPIO_WritePin + 4372 .LVL499: +3591:Src/main.c **** tmp32=0; + 4373 .loc 1 3591 3 view .LVU1290 + 4374 01ae 0022 movs r2, #0 + 4375 01b0 4FF48061 mov r1, #1024 + 4376 01b4 2046 mov r0, r4 + 4377 01b6 FFF7FEFF bl HAL_GPIO_WritePin + 4378 .LVL500: +3592:Src/main.c **** while(tmp32<500){tmp32++;} + 4379 .loc 1 3592 3 view .LVU1291 +3593:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4380 .loc 1 3593 3 view .LVU1292 +3592:Src/main.c **** while(tmp32<500){tmp32++;} + 4381 .loc 1 3592 8 is_stmt 0 view .LVU1293 + 4382 01ba 0023 movs r3, #0 +3593:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4383 .loc 1 3593 8 view .LVU1294 + 4384 01bc 00E0 b .L323 + 4385 .LVL501: + 4386 .L324: +3593:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4387 .loc 1 3593 20 is_stmt 1 discriminator 2 view .LVU1295 +3593:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4388 .loc 1 3593 25 is_stmt 0 discriminator 2 view .LVU1296 + 4389 01be 0133 adds r3, r3, #1 + 4390 .LVL502: + 4391 .L323: +3593:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 4392 .loc 1 3593 14 is_stmt 1 discriminator 1 view .LVU1297 + 4393 01c0 B3F5FA7F cmp r3, #500 + 4394 01c4 FBD3 bcc .L324 +3595:Src/main.c **** tmp32 = 0; + 4395 .loc 1 3595 3 view .LVU1298 + ARM GAS /tmp/ccLSPxIe.s page 227 + + + 4396 .LVL503: + 4397 .LBB463: + 4398 .LBI463: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3916 .loc 4 358 22 view .LVU1180 - 3917 .LBB459: + 4399 .loc 4 358 22 view .LVU1299 + 4400 .LBB464: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/ccuHnxNu.s page 213 - - - 3918 .loc 4 360 3 view .LVU1181 - 3919 01c6 154A ldr r2, .L282+12 - 3920 01c8 1368 ldr r3, [r2] - 3921 .LVL466: + 4401 .loc 4 360 3 view .LVU1300 + 4402 01c6 154A ldr r2, .L332+12 + 4403 01c8 1368 ldr r3, [r2] + 4404 .LVL504: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3922 .loc 4 360 3 is_stmt 0 view .LVU1182 - 3923 01ca 43F04003 orr r3, r3, #64 - 3924 01ce 1360 str r3, [r2] - 3925 .LVL467: + 4405 .loc 4 360 3 is_stmt 0 view .LVU1301 + 4406 01ca 43F04003 orr r3, r3, #64 + 4407 01ce 1360 str r3, [r2] + 4408 .LVL505: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3926 .loc 4 360 3 view .LVU1183 - 3927 .LBE459: - 3928 .LBE458: -3369:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3929 .loc 1 3369 3 is_stmt 1 view .LVU1184 -3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3930 .loc 1 3370 3 view .LVU1185 -3369:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 3931 .loc 1 3369 9 is_stmt 0 view .LVU1186 - 3932 01d0 0023 movs r3, #0 - 3933 .LVL468: - 3934 .L275: -3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3935 .loc 1 3370 43 is_stmt 1 discriminator 1 view .LVU1187 - 3936 .LBB460: - 3937 .LBI460: + 4409 .loc 4 360 3 view .LVU1302 + 4410 .LBE464: + 4411 .LBE463: +3596:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 4412 .loc 1 3596 3 is_stmt 1 view .LVU1303 +3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 4413 .loc 1 3597 3 view .LVU1304 +3596:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 4414 .loc 1 3596 9 is_stmt 0 view .LVU1305 + 4415 01d0 0023 movs r3, #0 + 4416 .LVL506: + 4417 .L325: +3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 4418 .loc 1 3597 43 is_stmt 1 discriminator 1 view .LVU1306 + 4419 .LBB465: + 4420 .LBI465: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3938 .loc 4 905 26 view .LVU1188 - 3939 .LBB461: + 4421 .loc 4 905 26 view .LVU1307 + 4422 .LBB466: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3940 .loc 4 907 3 view .LVU1189 + 4423 .loc 4 907 3 view .LVU1308 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3941 .loc 4 907 12 is_stmt 0 view .LVU1190 - 3942 01d2 124A ldr r2, .L282+12 - 3943 01d4 9268 ldr r2, [r2, #8] + 4424 .loc 4 907 12 is_stmt 0 view .LVU1309 + 4425 01d2 124A ldr r2, .L332+12 + 4426 01d4 9268 ldr r2, [r2, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3944 .loc 4 907 68 view .LVU1191 - 3945 01d6 12F0010F tst r2, #1 - 3946 01da 04D1 bne .L276 - 3947 .LVL469: + 4427 .loc 4 907 68 view .LVU1310 + 4428 01d6 12F0010F tst r2, #1 + 4429 01da 04D1 bne .L326 + 4430 .LVL507: 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3948 .loc 4 907 68 view .LVU1192 - 3949 .LBE461: - 3950 .LBE460: -3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3951 .loc 1 3370 43 discriminator 2 view .LVU1193 - 3952 01dc B3F57A7F cmp r3, #1000 - 3953 01e0 01D8 bhi .L276 -3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3954 .loc 1 3370 62 is_stmt 1 discriminator 3 view .LVU1194 -3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3955 .loc 1 3370 67 is_stmt 0 discriminator 3 view .LVU1195 - 3956 01e2 0133 adds r3, r3, #1 - 3957 .LVL470: -3370:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 3958 .loc 1 3370 67 discriminator 3 view .LVU1196 - 3959 01e4 F5E7 b .L275 - ARM GAS /tmp/ccuHnxNu.s page 214 + 4431 .loc 4 907 68 view .LVU1311 + 4432 .LBE466: + 4433 .LBE465: +3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 4434 .loc 1 3597 43 discriminator 2 view .LVU1312 + 4435 01dc B3F57A7F cmp r3, #1000 + 4436 01e0 01D8 bhi .L326 +3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 4437 .loc 1 3597 62 is_stmt 1 discriminator 3 view .LVU1313 + ARM GAS /tmp/ccLSPxIe.s page 228 - 3960 .L276: -3371:Src/main.c **** while(tmp32<500){tmp32++;} - 3961 .loc 1 3371 3 is_stmt 1 view .LVU1197 - 3962 .LVL471: - 3963 .LBB462: - 3964 .LBI462: +3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 4438 .loc 1 3597 67 is_stmt 0 discriminator 3 view .LVU1314 + 4439 01e2 0133 adds r3, r3, #1 + 4440 .LVL508: +3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 4441 .loc 1 3597 67 discriminator 3 view .LVU1315 + 4442 01e4 F5E7 b .L325 + 4443 .L326: +3598:Src/main.c **** while(tmp32<500){tmp32++;} + 4444 .loc 1 3598 3 is_stmt 1 view .LVU1316 + 4445 .LVL509: + 4446 .LBB467: + 4447 .LBI467: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 3965 .loc 4 370 22 view .LVU1198 - 3966 .LBB463: + 4448 .loc 4 370 22 view .LVU1317 + 4449 .LBB468: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3967 .loc 4 372 3 view .LVU1199 - 3968 01e6 0D49 ldr r1, .L282+12 - 3969 01e8 0A68 ldr r2, [r1] - 3970 01ea 22F04002 bic r2, r2, #64 - 3971 01ee 0A60 str r2, [r1] - 3972 .LVL472: + 4450 .loc 4 372 3 view .LVU1318 + 4451 01e6 0D49 ldr r1, .L332+12 + 4452 01e8 0A68 ldr r2, [r1] + 4453 01ea 22F04002 bic r2, r2, #64 + 4454 01ee 0A60 str r2, [r1] + 4455 .LVL510: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 3973 .loc 4 372 3 is_stmt 0 view .LVU1200 - 3974 .LBE463: - 3975 .LBE462: -3372:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3976 .loc 1 3372 3 is_stmt 1 view .LVU1201 - 3977 .LBB465: - 3978 .LBB464: + 4456 .loc 4 372 3 is_stmt 0 view .LVU1319 + 4457 .LBE468: + 4458 .LBE467: +3599:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4459 .loc 1 3599 3 is_stmt 1 view .LVU1320 + 4460 .LBB470: + 4461 .LBB469: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3979 .loc 4 373 1 is_stmt 0 view .LVU1202 - 3980 01f0 00E0 b .L278 - 3981 .L279: + 4462 .loc 4 373 1 is_stmt 0 view .LVU1321 + 4463 01f0 00E0 b .L328 + 4464 .L329: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - 3982 .loc 4 373 1 view .LVU1203 - 3983 .LBE464: - 3984 .LBE465: -3372:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3985 .loc 1 3372 20 is_stmt 1 discriminator 2 view .LVU1204 -3372:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3986 .loc 1 3372 25 is_stmt 0 discriminator 2 view .LVU1205 - 3987 01f2 0133 adds r3, r3, #1 - 3988 .LVL473: - 3989 .L278: -3372:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 3990 .loc 1 3372 14 is_stmt 1 discriminator 1 view .LVU1206 - 3991 01f4 B3F5FA7F cmp r3, #500 - 3992 01f8 FBD3 bcc .L279 -3374:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 3993 .loc 1 3374 3 view .LVU1207 - 3994 01fa 0122 movs r2, #1 - 3995 01fc 4FF48061 mov r1, #1024 - 3996 0200 0448 ldr r0, .L282+4 - 3997 0202 FFF7FEFF bl HAL_GPIO_WritePin - 3998 .LVL474: -3375:Src/main.c **** } - 3999 .loc 1 3375 3 view .LVU1208 - 4000 .LBB466: - 4001 .LBI466: + 4465 .loc 4 373 1 view .LVU1322 + 4466 .LBE469: + 4467 .LBE470: +3599:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4468 .loc 1 3599 20 is_stmt 1 discriminator 2 view .LVU1323 +3599:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4469 .loc 1 3599 25 is_stmt 0 discriminator 2 view .LVU1324 + 4470 01f2 0133 adds r3, r3, #1 + 4471 .LVL511: + 4472 .L328: +3599:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 4473 .loc 1 3599 14 is_stmt 1 discriminator 1 view .LVU1325 + 4474 01f4 B3F5FA7F cmp r3, #500 + 4475 01f8 FBD3 bcc .L329 +3601:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); + 4476 .loc 1 3601 3 view .LVU1326 + 4477 01fa 0122 movs r2, #1 + 4478 01fc 4FF48061 mov r1, #1024 + 4479 0200 0448 ldr r0, .L332+4 + 4480 0202 FFF7FEFF bl HAL_GPIO_WritePin + 4481 .LVL512: + ARM GAS /tmp/ccLSPxIe.s page 229 + + +3602:Src/main.c **** } + 4482 .loc 1 3602 3 view .LVU1327 + 4483 .LBB471: + 4484 .LBI471: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4002 .loc 4 1344 26 view .LVU1209 - 4003 .LBB467: - ARM GAS /tmp/ccuHnxNu.s page 215 - - + 4485 .loc 4 1344 26 view .LVU1328 + 4486 .LBB472: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4004 .loc 4 1346 3 view .LVU1210 + 4487 .loc 4 1346 3 view .LVU1329 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4005 .loc 4 1346 21 is_stmt 0 view .LVU1211 - 4006 0206 054B ldr r3, .L282+12 - 4007 0208 DD68 ldr r5, [r3, #12] + 4488 .loc 4 1346 21 is_stmt 0 view .LVU1330 + 4489 0206 054B ldr r3, .L332+12 + 4490 0208 DD68 ldr r5, [r3, #12] 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4008 .loc 4 1346 10 view .LVU1212 - 4009 020a ADB2 uxth r5, r5 - 4010 .LVL475: + 4491 .loc 4 1346 10 view .LVU1331 + 4492 020a ADB2 uxth r5, r5 + 4493 .LVL513: 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4011 .loc 4 1346 10 view .LVU1213 - 4012 020c 5BE7 b .L246 - 4013 .L283: - 4014 020e 00BF .align 2 - 4015 .L282: - 4016 0210 00100240 .word 1073876992 - 4017 0214 00140240 .word 1073878016 - 4018 0218 00340140 .word 1073820672 - 4019 021c 00500140 .word 1073827840 - 4020 .LBE467: - 4021 .LBE466: - 4022 .cfi_endproc - 4023 .LFE1228: - 4025 .section .text.Stop_TIM10,"ax",%progbits - 4026 .align 1 - 4027 .syntax unified - 4028 .thumb - 4029 .thumb_func - 4031 Stop_TIM10: - 4032 .LFB1239: -3540:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff) -3541:Src/main.c **** { -3542:Src/main.c **** uint16_t cl_ind; -3543:Src/main.c **** -3544:Src/main.c **** switch (UART_header) -3545:Src/main.c **** { -3546:Src/main.c **** case 0x7777: -3547:Src/main.c **** cl_ind = TSK_16 - 2; -3548:Src/main.c **** break; -3549:Src/main.c **** case 0x1111: -3550:Src/main.c **** cl_ind = CL_16 - 2; -3551:Src/main.c **** break; -3552:Src/main.c **** default: -3553:Src/main.c **** return 0; -3554:Src/main.c **** break; -3555:Src/main.c **** } -3556:Src/main.c **** -3557:Src/main.c **** CS_result = CalculateChecksum(pbuff, cl_ind); -3558:Src/main.c **** -3559:Src/main.c **** return ((CS_result == COMMAND[cl_ind]) ? 1 : 0); -3560:Src/main.c **** } -3561:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) -3562:Src/main.c **** { -3563:Src/main.c **** short i; -3564:Src/main.c **** uint16_t cs = *pbuff; -3565:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 216 + 4494 .loc 4 1346 10 view .LVU1332 + 4495 020c 5BE7 b .L296 + 4496 .L333: + 4497 020e 00BF .align 2 + 4498 .L332: + 4499 0210 00100240 .word 1073876992 + 4500 0214 00140240 .word 1073878016 + 4501 0218 00340140 .word 1073820672 + 4502 021c 00500140 .word 1073827840 + 4503 .LBE472: + 4504 .LBE471: + 4505 .cfi_endproc + 4506 .LFE1236: + 4508 .section .text.Stop_TIM10,"ax",%progbits + 4509 .align 1 + 4510 .syntax unified + 4511 .thumb + 4512 .thumb_func + 4514 Stop_TIM10: + 4515 .LFB1247: +3767:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff) +3768:Src/main.c **** { +3769:Src/main.c **** uint16_t cl_ind; +3770:Src/main.c **** +3771:Src/main.c **** switch (UART_header) +3772:Src/main.c **** { +3773:Src/main.c **** case 0x7777: +3774:Src/main.c **** cl_ind = TSK_16 - 2; +3775:Src/main.c **** break; +3776:Src/main.c **** case 0x1111: +3777:Src/main.c **** cl_ind = CL_16 - 2; +3778:Src/main.c **** break; +3779:Src/main.c **** default: +3780:Src/main.c **** return 0; +3781:Src/main.c **** break; +3782:Src/main.c **** } +3783:Src/main.c **** +3784:Src/main.c **** CS_result = CalculateChecksum(pbuff, cl_ind); +3785:Src/main.c **** + ARM GAS /tmp/ccLSPxIe.s page 230 -3566:Src/main.c **** for(i = 1; i < len; i++) -3567:Src/main.c **** { -3568:Src/main.c **** cs ^= *(pbuff+i); -3569:Src/main.c **** } -3570:Src/main.c **** return cs; -3571:Src/main.c **** } -3572:Src/main.c **** -3573:Src/main.c **** /*int SD_Init(void) -3574:Src/main.c **** { -3575:Src/main.c **** int test=0; -3576:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -3577:Src/main.c **** { -3578:Src/main.c **** test = Mount_SD("/"); -3579:Src/main.c **** if (test == 0) //0 - suc -3580:Src/main.c **** { -3581:Src/main.c **** //Format_SD(); -3582:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc -3583:Src/main.c **** //Create_File("FILE2.TXT"); -3584:Src/main.c **** Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part -3585:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -3586:Src/main.c **** return test; -3587:Src/main.c **** } -3588:Src/main.c **** else -3589:Src/main.c **** { -3590:Src/main.c **** return 1; -3591:Src/main.c **** } -3592:Src/main.c **** } -3593:Src/main.c **** else -3594:Src/main.c **** { -3595:Src/main.c **** return 1; -3596:Src/main.c **** } -3597:Src/main.c **** }*/ -3598:Src/main.c **** -3599:Src/main.c **** int SD_SAVE(uint16_t *pbuff) -3600:Src/main.c **** { -3601:Src/main.c **** int test=0; -3602:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -3603:Src/main.c **** { -3604:Src/main.c **** test = Mount_SD("/"); -3605:Src/main.c **** if (test == 0) //0 - suc -3606:Src/main.c **** { -3607:Src/main.c **** //Format_SD(); -3608:Src/main.c **** test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8); -3609:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -3610:Src/main.c **** return test; -3611:Src/main.c **** } -3612:Src/main.c **** else -3613:Src/main.c **** { -3614:Src/main.c **** return 1; -3615:Src/main.c **** } -3616:Src/main.c **** } -3617:Src/main.c **** else -3618:Src/main.c **** { -3619:Src/main.c **** return 1; -3620:Src/main.c **** } -3621:Src/main.c **** } -3622:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 217 +3786:Src/main.c **** return ((CS_result == COMMAND[cl_ind]) ? 1 : 0); +3787:Src/main.c **** } +3788:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) +3789:Src/main.c **** { +3790:Src/main.c **** short i; +3791:Src/main.c **** uint16_t cs = *pbuff; +3792:Src/main.c **** +3793:Src/main.c **** for(i = 1; i < len; i++) +3794:Src/main.c **** { +3795:Src/main.c **** cs ^= *(pbuff+i); +3796:Src/main.c **** } +3797:Src/main.c **** return cs; +3798:Src/main.c **** } +3799:Src/main.c **** +3800:Src/main.c **** /*int SD_Init(void) +3801:Src/main.c **** { +3802:Src/main.c **** int test=0; +3803:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) +3804:Src/main.c **** { +3805:Src/main.c **** test = Mount_SD("/"); +3806:Src/main.c **** if (test == 0) //0 - suc +3807:Src/main.c **** { +3808:Src/main.c **** //Format_SD(); +3809:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc +3810:Src/main.c **** //Create_File("FILE2.TXT"); +3811:Src/main.c **** Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part +3812:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +3813:Src/main.c **** return test; +3814:Src/main.c **** } +3815:Src/main.c **** else +3816:Src/main.c **** { +3817:Src/main.c **** return 1; +3818:Src/main.c **** } +3819:Src/main.c **** } +3820:Src/main.c **** else +3821:Src/main.c **** { +3822:Src/main.c **** return 1; +3823:Src/main.c **** } +3824:Src/main.c **** }*/ +3825:Src/main.c **** +3826:Src/main.c **** int SD_SAVE(uint16_t *pbuff) +3827:Src/main.c **** { +3828:Src/main.c **** int test=0; +3829:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) +3830:Src/main.c **** { +3831:Src/main.c **** test = Mount_SD("/"); +3832:Src/main.c **** if (test == 0) //0 - suc +3833:Src/main.c **** { +3834:Src/main.c **** //Format_SD(); +3835:Src/main.c **** test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8); +3836:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +3837:Src/main.c **** return test; +3838:Src/main.c **** } +3839:Src/main.c **** else +3840:Src/main.c **** { +3841:Src/main.c **** return 1; +3842:Src/main.c **** } + ARM GAS /tmp/ccLSPxIe.s page 231 -3623:Src/main.c **** -3624:Src/main.c **** -3625:Src/main.c **** //uint32_t Get_Length(void) -3626:Src/main.c **** //{ -3627:Src/main.c **** // return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16); -3628:Src/main.c **** //} -3629:Src/main.c **** -3630:Src/main.c **** int SD_READ(uint16_t *pbuff) -3631:Src/main.c **** { -3632:Src/main.c **** int test=0; -3633:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -3634:Src/main.c **** { -3635:Src/main.c **** test = Mount_SD("/"); -3636:Src/main.c **** if (test == 0) //0 - suc -3637:Src/main.c **** { -3638:Src/main.c **** //Format_SD(); -3639:Src/main.c **** test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes -3640:Src/main.c **** fgoto+=DL_8; -3641:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -3642:Src/main.c **** return test; -3643:Src/main.c **** } -3644:Src/main.c **** else -3645:Src/main.c **** { -3646:Src/main.c **** return 1; -3647:Src/main.c **** } -3648:Src/main.c **** } -3649:Src/main.c **** else -3650:Src/main.c **** { -3651:Src/main.c **** return 1; -3652:Src/main.c **** } -3653:Src/main.c **** -3654:Src/main.c **** /* for (uint16_t j = 0; j < DL_16; j++) -3655:Src/main.c **** { -3656:Src/main.c **** *(pbuff+j) = SD_matr[SD_SLIDE][j]; -3657:Src/main.c **** } -3658:Src/main.c **** if (SD_SLIDEDHR12R1 = 0u; - 4654 .loc 1 2731 2 view .LVU1427 -2731:Src/main.c **** DAC->DHR12R1 = 0u; - 4655 .loc 1 2731 5 is_stmt 0 view .LVU1428 - 4656 0046 064B ldr r3, .L294+8 - 4657 0048 1968 ldr r1, [r3] -2731:Src/main.c **** DAC->DHR12R1 = 0u; - 4658 .loc 1 2731 10 view .LVU1429 - 4659 004a 064A ldr r2, .L294+12 - 4660 004c 0A40 ands r2, r2, r1 - 4661 004e 1A60 str r2, [r3] -2732:Src/main.c **** } - 4662 .loc 1 2732 2 is_stmt 1 view .LVU1430 -2732:Src/main.c **** } - 4663 .loc 1 2732 15 is_stmt 0 view .LVU1431 - 4664 0050 9C60 str r4, [r3, #8] -2733:Src/main.c **** - 4665 .loc 1 2733 1 view .LVU1432 - 4666 0052 08B0 add sp, sp, #32 - 4667 .LCFI42: - 4668 .cfi_def_cfa_offset 8 - 4669 @ sp needed - 4670 0054 10BD pop {r4, pc} - 4671 .L295: - 4672 0056 00BF .align 2 - 4673 .L294: - 4674 0058 00380240 .word 1073887232 - 4675 005c 00000240 .word 1073872896 - 4676 0060 00740040 .word 1073771520 - 4677 0064 FAEFFFFF .word -4102 - 4678 .cfi_endproc - 4679 .LFE1216: - 4681 .section .text.MX_SPI4_Init,"ax",%progbits - 4682 .align 1 - 4683 .syntax unified - 4684 .thumb - 4685 .thumb_func - 4687 MX_SPI4_Init: - 4688 .LFB1192: -1345:Src/main.c **** - 4689 .loc 1 1345 1 is_stmt 1 view -0 - 4690 .cfi_startproc - 4691 @ args = 0, pretend = 0, frame = 72 - 4692 @ frame_needed = 0, uses_anonymous_args = 0 - 4693 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 4694 .LCFI43: - 4695 .cfi_def_cfa_offset 24 - 4696 .cfi_offset 4, -24 - ARM GAS /tmp/ccuHnxNu.s page 234 +2260:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 4879 .loc 1 2260 3 is_stmt 1 view .LVU1444 +2260:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 4880 .loc 1 2260 24 is_stmt 0 view .LVU1445 + 4881 01b6 0B94 str r4, [sp, #44] +2261:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 4882 .loc 1 2261 3 is_stmt 1 view .LVU1446 +2261:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 4883 .loc 1 2261 25 is_stmt 0 view .LVU1447 + 4884 01b8 0C94 str r4, [sp, #48] +2262:Src/main.c **** + 4885 .loc 1 2262 3 is_stmt 1 view .LVU1448 + 4886 01ba 09A9 add r1, sp, #36 + 4887 01bc 5046 mov r0, r10 + 4888 01be FFF7FEFF bl HAL_GPIO_Init + 4889 .LVL534: +2265:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + 4890 .loc 1 2265 3 view .LVU1449 +2265:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + 4891 .loc 1 2265 23 is_stmt 0 view .LVU1450 + 4892 01c2 4FF4F043 mov r3, #30720 + 4893 01c6 0993 str r3, [sp, #36] +2266:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4894 .loc 1 2266 3 is_stmt 1 view .LVU1451 +2266:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4895 .loc 1 2266 24 is_stmt 0 view .LVU1452 + 4896 01c8 0A94 str r4, [sp, #40] +2267:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 4897 .loc 1 2267 3 is_stmt 1 view .LVU1453 +2267:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 4898 .loc 1 2267 24 is_stmt 0 view .LVU1454 + 4899 01ca 0B94 str r4, [sp, #44] +2268:Src/main.c **** + 4900 .loc 1 2268 3 is_stmt 1 view .LVU1455 + 4901 01cc 09A9 add r1, sp, #36 + 4902 01ce 4046 mov r0, r8 + 4903 01d0 FFF7FEFF bl HAL_GPIO_Init + 4904 .LVL535: +2271:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 4905 .loc 1 2271 3 view .LVU1456 +2271:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 4906 .loc 1 2271 23 is_stmt 0 view .LVU1457 + 4907 01d4 4FF45063 mov r3, #3328 + 4908 01d8 0993 str r3, [sp, #36] +2272:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4909 .loc 1 2272 3 is_stmt 1 view .LVU1458 +2272:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4910 .loc 1 2272 24 is_stmt 0 view .LVU1459 + 4911 01da 0A95 str r5, [sp, #40] +2273:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 4912 .loc 1 2273 3 is_stmt 1 view .LVU1460 +2273:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 4913 .loc 1 2273 24 is_stmt 0 view .LVU1461 + 4914 01dc 0B94 str r4, [sp, #44] +2274:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4915 .loc 1 2274 3 is_stmt 1 view .LVU1462 +2274:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + ARM GAS /tmp/ccLSPxIe.s page 242 - 4697 .cfi_offset 5, -20 - 4698 .cfi_offset 6, -16 - 4699 .cfi_offset 7, -12 - 4700 .cfi_offset 8, -8 - 4701 .cfi_offset 14, -4 - 4702 0004 92B0 sub sp, sp, #72 - 4703 .LCFI44: - 4704 .cfi_def_cfa_offset 96 -1351:Src/main.c **** - 4705 .loc 1 1351 3 view .LVU1434 -1351:Src/main.c **** - 4706 .loc 1 1351 22 is_stmt 0 view .LVU1435 - 4707 0006 2822 movs r2, #40 - 4708 0008 0021 movs r1, #0 - 4709 000a 08A8 add r0, sp, #32 - 4710 000c FFF7FEFF bl memset - 4711 .LVL507: -1353:Src/main.c **** - 4712 .loc 1 1353 3 is_stmt 1 view .LVU1436 -1353:Src/main.c **** - 4713 .loc 1 1353 23 is_stmt 0 view .LVU1437 - 4714 0010 0024 movs r4, #0 - 4715 0012 0294 str r4, [sp, #8] - 4716 0014 0394 str r4, [sp, #12] - 4717 0016 0494 str r4, [sp, #16] - 4718 0018 0594 str r4, [sp, #20] - 4719 001a 0694 str r4, [sp, #24] - 4720 001c 0794 str r4, [sp, #28] -1356:Src/main.c **** - 4721 .loc 1 1356 3 is_stmt 1 view .LVU1438 - 4722 .LVL508: - 4723 .LBB478: - 4724 .LBI478: + 4916 .loc 1 2274 25 is_stmt 0 view .LVU1463 + 4917 01de 0C94 str r4, [sp, #48] +2275:Src/main.c **** + 4918 .loc 1 2275 3 is_stmt 1 view .LVU1464 + 4919 01e0 09A9 add r1, sp, #36 + 4920 01e2 3046 mov r0, r6 + 4921 01e4 FFF7FEFF bl HAL_GPIO_Init + 4922 .LVL536: +2278:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + 4923 .loc 1 2278 3 view .LVU1465 +2278:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + 4924 .loc 1 2278 23 is_stmt 0 view .LVU1466 + 4925 01e8 0C23 movs r3, #12 + 4926 01ea 0993 str r3, [sp, #36] +2279:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4927 .loc 1 2279 3 is_stmt 1 view .LVU1467 +2279:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4928 .loc 1 2279 24 is_stmt 0 view .LVU1468 + 4929 01ec 1123 movs r3, #17 + 4930 01ee 0A93 str r3, [sp, #40] +2280:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 4931 .loc 1 2280 3 is_stmt 1 view .LVU1469 +2280:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 4932 .loc 1 2280 24 is_stmt 0 view .LVU1470 + 4933 01f0 0B94 str r4, [sp, #44] +2281:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4934 .loc 1 2281 3 is_stmt 1 view .LVU1471 +2281:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 4935 .loc 1 2281 25 is_stmt 0 view .LVU1472 + 4936 01f2 0C94 str r4, [sp, #48] +2282:Src/main.c **** + 4937 .loc 1 2282 3 is_stmt 1 view .LVU1473 + 4938 01f4 09A9 add r1, sp, #36 + 4939 01f6 3046 mov r0, r6 + 4940 01f8 FFF7FEFF bl HAL_GPIO_Init + 4941 .LVL537: +2285:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 4942 .loc 1 2285 3 view .LVU1474 +2285:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 4943 .loc 1 2285 23 is_stmt 0 view .LVU1475 + 4944 01fc 4FF48043 mov r3, #16384 + 4945 0200 0993 str r3, [sp, #36] +2286:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4946 .loc 1 2286 3 is_stmt 1 view .LVU1476 +2286:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4947 .loc 1 2286 24 is_stmt 0 view .LVU1477 + 4948 0202 0A95 str r5, [sp, #40] +2287:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + 4949 .loc 1 2287 3 is_stmt 1 view .LVU1478 +2287:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + 4950 .loc 1 2287 24 is_stmt 0 view .LVU1479 + 4951 0204 0B94 str r4, [sp, #44] +2288:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); + 4952 .loc 1 2288 3 is_stmt 1 view .LVU1480 +2288:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); + 4953 .loc 1 2288 25 is_stmt 0 view .LVU1481 + 4954 0206 0323 movs r3, #3 + ARM GAS /tmp/ccLSPxIe.s page 243 + + + 4955 0208 0C93 str r3, [sp, #48] +2289:Src/main.c **** + 4956 .loc 1 2289 3 is_stmt 1 view .LVU1482 + 4957 020a 09A9 add r1, sp, #36 + 4958 020c 3046 mov r0, r6 + 4959 020e FFF7FEFF bl HAL_GPIO_Init + 4960 .LVL538: +2293:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; + 4961 .loc 1 2293 3 view .LVU1483 +2293:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; + 4962 .loc 1 2293 23 is_stmt 0 view .LVU1484 + 4963 0212 41F6F043 movw r3, #7408 + 4964 0216 0993 str r3, [sp, #36] +2295:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4965 .loc 1 2295 3 is_stmt 1 view .LVU1485 +2295:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4966 .loc 1 2295 24 is_stmt 0 view .LVU1486 + 4967 0218 0A95 str r5, [sp, #40] +2296:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 4968 .loc 1 2296 3 is_stmt 1 view .LVU1487 +2296:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 4969 .loc 1 2296 24 is_stmt 0 view .LVU1488 + 4970 021a 0B94 str r4, [sp, #44] +2297:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 4971 .loc 1 2297 3 is_stmt 1 view .LVU1489 +2297:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 4972 .loc 1 2297 25 is_stmt 0 view .LVU1490 + 4973 021c 0C94 str r4, [sp, #48] +2298:Src/main.c **** + 4974 .loc 1 2298 3 is_stmt 1 view .LVU1491 + 4975 021e 09A9 add r1, sp, #36 + 4976 0220 5846 mov r0, fp + 4977 0222 FFF7FEFF bl HAL_GPIO_Init + 4978 .LVL539: +2301:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 4979 .loc 1 2301 3 view .LVU1492 +2301:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 4980 .loc 1 2301 23 is_stmt 0 view .LVU1493 + 4981 0226 43F68213 movw r3, #14722 + 4982 022a 0993 str r3, [sp, #36] +2302:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4983 .loc 1 2302 3 is_stmt 1 view .LVU1494 +2302:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 4984 .loc 1 2302 24 is_stmt 0 view .LVU1495 + 4985 022c 0A95 str r5, [sp, #40] +2303:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 4986 .loc 1 2303 3 is_stmt 1 view .LVU1496 +2303:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 4987 .loc 1 2303 24 is_stmt 0 view .LVU1497 + 4988 022e 0B94 str r4, [sp, #44] +2304:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + 4989 .loc 1 2304 3 is_stmt 1 view .LVU1498 +2304:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + 4990 .loc 1 2304 25 is_stmt 0 view .LVU1499 + 4991 0230 0C94 str r4, [sp, #48] +2305:Src/main.c **** + 4992 .loc 1 2305 3 is_stmt 1 view .LVU1500 + ARM GAS /tmp/ccLSPxIe.s page 244 + + + 4993 0232 09A9 add r1, sp, #36 + 4994 0234 3846 mov r0, r7 + 4995 0236 FFF7FEFF bl HAL_GPIO_Init + 4996 .LVL540: +2308:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + 4997 .loc 1 2308 3 view .LVU1501 +2308:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + 4998 .loc 1 2308 23 is_stmt 0 view .LVU1502 + 4999 023a 4FF48073 mov r3, #256 + 5000 023e 0993 str r3, [sp, #36] +2309:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 5001 .loc 1 2309 3 is_stmt 1 view .LVU1503 +2309:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 5002 .loc 1 2309 24 is_stmt 0 view .LVU1504 + 5003 0240 0A94 str r4, [sp, #40] +2310:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); + 5004 .loc 1 2310 3 is_stmt 1 view .LVU1505 +2310:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); + 5005 .loc 1 2310 24 is_stmt 0 view .LVU1506 + 5006 0242 0B94 str r4, [sp, #44] +2311:Src/main.c **** + 5007 .loc 1 2311 3 is_stmt 1 view .LVU1507 + 5008 0244 09A9 add r1, sp, #36 + 5009 0246 5046 mov r0, r10 + 5010 0248 FFF7FEFF bl HAL_GPIO_Init + 5011 .LVL541: +2314:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + 5012 .loc 1 2314 3 view .LVU1508 +2314:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + 5013 .loc 1 2314 23 is_stmt 0 view .LVU1509 + 5014 024c 0995 str r5, [sp, #36] +2315:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 5015 .loc 1 2315 3 is_stmt 1 view .LVU1510 +2315:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 5016 .loc 1 2315 24 is_stmt 0 view .LVU1511 + 5017 024e 0A94 str r4, [sp, #40] +2316:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct); + 5018 .loc 1 2316 3 is_stmt 1 view .LVU1512 +2316:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct); + 5019 .loc 1 2316 24 is_stmt 0 view .LVU1513 + 5020 0250 0B94 str r4, [sp, #44] +2317:Src/main.c **** + 5021 .loc 1 2317 3 is_stmt 1 view .LVU1514 + 5022 0252 09A9 add r1, sp, #36 + 5023 0254 3846 mov r0, r7 + 5024 0256 FFF7FEFF bl HAL_GPIO_Init + 5025 .LVL542: +2321:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin; + 5026 .loc 1 2321 3 view .LVU1515 +2321:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin; + 5027 .loc 1 2321 23 is_stmt 0 view .LVU1516 + 5028 025a 4FF47E43 mov r3, #65024 + 5029 025e 0993 str r3, [sp, #36] +2323:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 5030 .loc 1 2323 3 is_stmt 1 view .LVU1517 +2323:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 5031 .loc 1 2323 24 is_stmt 0 view .LVU1518 + ARM GAS /tmp/ccLSPxIe.s page 245 + + + 5032 0260 0A95 str r5, [sp, #40] +2324:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 5033 .loc 1 2324 3 is_stmt 1 view .LVU1519 +2324:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 5034 .loc 1 2324 24 is_stmt 0 view .LVU1520 + 5035 0262 0B94 str r4, [sp, #44] +2325:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + 5036 .loc 1 2325 3 is_stmt 1 view .LVU1521 +2325:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + 5037 .loc 1 2325 25 is_stmt 0 view .LVU1522 + 5038 0264 0C94 str r4, [sp, #48] +2326:Src/main.c **** + 5039 .loc 1 2326 3 is_stmt 1 view .LVU1523 + 5040 0266 09A9 add r1, sp, #36 + 5041 0268 0548 ldr r0, .L340+12 + 5042 026a FFF7FEFF bl HAL_GPIO_Init + 5043 .LVL543: +2330:Src/main.c **** + 5044 .loc 1 2330 1 is_stmt 0 view .LVU1524 + 5045 026e 0FB0 add sp, sp, #60 + 5046 .LCFI42: + 5047 .cfi_def_cfa_offset 36 + 5048 @ sp needed + 5049 0270 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5050 .L341: + 5051 .align 2 + 5052 .L340: + 5053 0274 00380240 .word 1073887232 + 5054 0278 00100240 .word 1073876992 + 5055 027c 000C0240 .word 1073875968 + 5056 0280 00180240 .word 1073879040 + 5057 0284 00140240 .word 1073878016 + 5058 0288 00080240 .word 1073874944 + 5059 028c 00000240 .word 1073872896 + 5060 0290 00040240 .word 1073873920 + 5061 .cfi_endproc + 5062 .LFE1207: + 5064 .section .text.PA4_DAC_Init,"ax",%progbits + 5065 .align 1 + 5066 .syntax unified + 5067 .thumb + 5068 .thumb_func + 5070 PA4_DAC_Init: + 5071 .LFB1216: +2813:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 5072 .loc 1 2813 1 is_stmt 1 view -0 + 5073 .cfi_startproc + 5074 @ args = 0, pretend = 0, frame = 32 + 5075 @ frame_needed = 0, uses_anonymous_args = 0 + 5076 0000 10B5 push {r4, lr} + 5077 .LCFI43: + 5078 .cfi_def_cfa_offset 8 + 5079 .cfi_offset 4, -8 + 5080 .cfi_offset 14, -4 + 5081 0002 88B0 sub sp, sp, #32 + 5082 .LCFI44: + 5083 .cfi_def_cfa_offset 40 + ARM GAS /tmp/ccLSPxIe.s page 246 + + +2814:Src/main.c **** + 5084 .loc 1 2814 2 view .LVU1526 +2814:Src/main.c **** + 5085 .loc 1 2814 19 is_stmt 0 view .LVU1527 + 5086 0004 0024 movs r4, #0 + 5087 0006 0394 str r4, [sp, #12] + 5088 0008 0494 str r4, [sp, #16] + 5089 000a 0594 str r4, [sp, #20] + 5090 000c 0694 str r4, [sp, #24] + 5091 000e 0794 str r4, [sp, #28] +2816:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 5092 .loc 1 2816 2 is_stmt 1 view .LVU1528 + 5093 .LBB481: +2816:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 5094 .loc 1 2816 2 view .LVU1529 +2816:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 5095 .loc 1 2816 2 view .LVU1530 + 5096 0010 114B ldr r3, .L344 + 5097 0012 1A6C ldr r2, [r3, #64] + 5098 0014 42F00052 orr r2, r2, #536870912 + 5099 0018 1A64 str r2, [r3, #64] +2816:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 5100 .loc 1 2816 2 view .LVU1531 + 5101 001a 1A6C ldr r2, [r3, #64] + 5102 001c 02F00052 and r2, r2, #536870912 + 5103 0020 0192 str r2, [sp, #4] +2816:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 5104 .loc 1 2816 2 view .LVU1532 + 5105 0022 019A ldr r2, [sp, #4] + 5106 .LBE481: +2816:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 5107 .loc 1 2816 2 view .LVU1533 +2817:Src/main.c **** + 5108 .loc 1 2817 2 view .LVU1534 + 5109 .LBB482: +2817:Src/main.c **** + 5110 .loc 1 2817 2 view .LVU1535 +2817:Src/main.c **** + 5111 .loc 1 2817 2 view .LVU1536 + 5112 0024 1A6B ldr r2, [r3, #48] + 5113 0026 42F00102 orr r2, r2, #1 + 5114 002a 1A63 str r2, [r3, #48] +2817:Src/main.c **** + 5115 .loc 1 2817 2 view .LVU1537 + 5116 002c 1B6B ldr r3, [r3, #48] + 5117 002e 03F00103 and r3, r3, #1 + 5118 0032 0293 str r3, [sp, #8] +2817:Src/main.c **** + 5119 .loc 1 2817 2 view .LVU1538 + 5120 0034 029B ldr r3, [sp, #8] + 5121 .LBE482: +2817:Src/main.c **** + 5122 .loc 1 2817 2 view .LVU1539 +2819:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 5123 .loc 1 2819 2 view .LVU1540 +2819:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 5124 .loc 1 2819 22 is_stmt 0 view .LVU1541 + ARM GAS /tmp/ccLSPxIe.s page 247 + + + 5125 0036 1023 movs r3, #16 + 5126 0038 0393 str r3, [sp, #12] +2820:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 5127 .loc 1 2820 2 is_stmt 1 view .LVU1542 +2820:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 5128 .loc 1 2820 23 is_stmt 0 view .LVU1543 + 5129 003a 0323 movs r3, #3 + 5130 003c 0493 str r3, [sp, #16] +2821:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 5131 .loc 1 2821 2 is_stmt 1 view .LVU1544 +2822:Src/main.c **** + 5132 .loc 1 2822 2 view .LVU1545 + 5133 003e 03A9 add r1, sp, #12 + 5134 0040 0648 ldr r0, .L344+4 + 5135 0042 FFF7FEFF bl HAL_GPIO_Init + 5136 .LVL544: +2825:Src/main.c **** DAC->DHR12R1 = 0u; + 5137 .loc 1 2825 2 view .LVU1546 +2825:Src/main.c **** DAC->DHR12R1 = 0u; + 5138 .loc 1 2825 5 is_stmt 0 view .LVU1547 + 5139 0046 064B ldr r3, .L344+8 + 5140 0048 1968 ldr r1, [r3] +2825:Src/main.c **** DAC->DHR12R1 = 0u; + 5141 .loc 1 2825 10 view .LVU1548 + 5142 004a 064A ldr r2, .L344+12 + 5143 004c 0A40 ands r2, r2, r1 + 5144 004e 1A60 str r2, [r3] +2826:Src/main.c **** } + 5145 .loc 1 2826 2 is_stmt 1 view .LVU1549 +2826:Src/main.c **** } + 5146 .loc 1 2826 15 is_stmt 0 view .LVU1550 + 5147 0050 9C60 str r4, [r3, #8] +2827:Src/main.c **** + 5148 .loc 1 2827 1 view .LVU1551 + 5149 0052 08B0 add sp, sp, #32 + 5150 .LCFI45: + 5151 .cfi_def_cfa_offset 8 + 5152 @ sp needed + 5153 0054 10BD pop {r4, pc} + 5154 .L345: + 5155 0056 00BF .align 2 + 5156 .L344: + 5157 0058 00380240 .word 1073887232 + 5158 005c 00000240 .word 1073872896 + 5159 0060 00740040 .word 1073771520 + 5160 0064 FAEFFFFF .word -4102 + 5161 .cfi_endproc + 5162 .LFE1216: + 5164 .section .text.MX_SPI4_Init,"ax",%progbits + 5165 .align 1 + 5166 .syntax unified + 5167 .thumb + 5168 .thumb_func + 5170 MX_SPI4_Init: + 5171 .LFB1192: +1439:Src/main.c **** + 5172 .loc 1 1439 1 is_stmt 1 view -0 + ARM GAS /tmp/ccLSPxIe.s page 248 + + + 5173 .cfi_startproc + 5174 @ args = 0, pretend = 0, frame = 72 + 5175 @ frame_needed = 0, uses_anonymous_args = 0 + 5176 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 5177 .LCFI46: + 5178 .cfi_def_cfa_offset 24 + 5179 .cfi_offset 4, -24 + 5180 .cfi_offset 5, -20 + 5181 .cfi_offset 6, -16 + 5182 .cfi_offset 7, -12 + 5183 .cfi_offset 8, -8 + 5184 .cfi_offset 14, -4 + 5185 0004 92B0 sub sp, sp, #72 + 5186 .LCFI47: + 5187 .cfi_def_cfa_offset 96 +1445:Src/main.c **** + 5188 .loc 1 1445 3 view .LVU1553 +1445:Src/main.c **** + 5189 .loc 1 1445 22 is_stmt 0 view .LVU1554 + 5190 0006 2822 movs r2, #40 + 5191 0008 0021 movs r1, #0 + 5192 000a 08A8 add r0, sp, #32 + 5193 000c FFF7FEFF bl memset + 5194 .LVL545: +1447:Src/main.c **** + 5195 .loc 1 1447 3 is_stmt 1 view .LVU1555 +1447:Src/main.c **** + 5196 .loc 1 1447 23 is_stmt 0 view .LVU1556 + 5197 0010 0024 movs r4, #0 + 5198 0012 0294 str r4, [sp, #8] + 5199 0014 0394 str r4, [sp, #12] + 5200 0016 0494 str r4, [sp, #16] + 5201 0018 0594 str r4, [sp, #20] + 5202 001a 0694 str r4, [sp, #24] + 5203 001c 0794 str r4, [sp, #28] +1450:Src/main.c **** + 5204 .loc 1 1450 3 is_stmt 1 view .LVU1557 + 5205 .LVL546: + 5206 .LBB483: + 5207 .LBI483: 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @@ -14031,6 +14878,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_IsEnabledClock\n 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_IsEnabledClock\n + ARM GAS /tmp/ccLSPxIe.s page 249 + + 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_IsEnabledClock\n 334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_IsEnabledClock\n 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_IsEnabledClock\n @@ -14038,9 +14888,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_IsEnabledClock\n 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_IsEnabledClock\n 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_IsEnabledClock\n - ARM GAS /tmp/ccuHnxNu.s page 235 - - 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_IsEnabledClock\n 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSEN LL_AHB1_GRP1_IsEnabledClock\n 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSULPIENDEN LL_AHB1_GRP1_IsEnabledClock @@ -14091,6 +14938,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_DisableClock\n 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_DisableClock\n 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_DisableClock\n + ARM GAS /tmp/ccLSPxIe.s page 250 + + 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_DisableClock\n 391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_DisableClock\n 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_DisableClock\n @@ -14098,9 +14948,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_DisableClock\n 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_DisableClock\n 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_DisableClock\n - ARM GAS /tmp/ccuHnxNu.s page 236 - - 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_DisableClock\n 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_DisableClock\n 399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSEN LL_AHB1_GRP1_DisableClock\n @@ -14151,6 +14998,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ForceReset\n 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ForceReset\n 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ForceReset\n + ARM GAS /tmp/ccLSPxIe.s page 251 + + 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR CRCRST LL_AHB1_GRP1_ForceReset\n 448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA1RST LL_AHB1_GRP1_ForceReset\n 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA2RST LL_AHB1_GRP1_ForceReset\n @@ -14158,9 +15008,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ForceReset\n 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ForceReset 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: - ARM GAS /tmp/ccuHnxNu.s page 237 - - 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA 456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB @@ -14211,6 +15058,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB + ARM GAS /tmp/ccLSPxIe.s page 252 + + 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC 505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE @@ -14218,9 +15068,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI - ARM GAS /tmp/ccuHnxNu.s page 238 - - 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) 513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC @@ -14271,6 +15118,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA 559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC + ARM GAS /tmp/ccLSPxIe.s page 253 + + 561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF @@ -14278,9 +15128,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) - ARM GAS /tmp/ccuHnxNu.s page 239 - - 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) 569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_AXI @@ -14331,6 +15178,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_DisableClockLowPower\n 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n 617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DTCMRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n + ARM GAS /tmp/ccLSPxIe.s page 254 + + 618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_DisableClockLowPower\n 619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_DisableClockLowPower\n 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_DisableClockLowPower\n @@ -14338,9 +15188,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_DisableClockLowPower\n 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_DisableClockLowPower\n 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_DisableClockLowPower\n - ARM GAS /tmp/ccuHnxNu.s page 240 - - 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_DisableClockLowPower\n 626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_DisableClockLowPower 627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: @@ -14391,6 +15238,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB2 peripherals clock. 674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_EnableClock\n + ARM GAS /tmp/ccLSPxIe.s page 255 + + 675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_EnableClock\n 676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR CRYPEN LL_AHB2_GRP1_EnableClock\n 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_EnableClock\n @@ -14398,9 +15248,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR RNGEN LL_AHB2_GRP1_EnableClock\n 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_EnableClock 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: - ARM GAS /tmp/ccuHnxNu.s page 241 - - 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) 683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) 684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) @@ -14451,6 +15298,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB2 peripherals clock. 730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_DisableClock\n 731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_DisableClock\n + ARM GAS /tmp/ccLSPxIe.s page 256 + + 732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR CRYPEN LL_AHB2_GRP1_DisableClock\n 733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_DisableClock\n 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_DisableClock\n @@ -14458,9 +15308,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_DisableClock 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) - ARM GAS /tmp/ccuHnxNu.s page 242 - - 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) 741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) @@ -14511,6 +15358,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset\n 787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR HASHRST LL_AHB2_GRP1_ReleaseReset\n 788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR RNGRST LL_AHB2_GRP1_ReleaseReset\n + ARM GAS /tmp/ccLSPxIe.s page 257 + + 789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ReleaseReset 790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL @@ -14518,9 +15368,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*) 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) - ARM GAS /tmp/ccuHnxNu.s page 243 - - 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) 797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG 798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS @@ -14571,6 +15418,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR AESLPEN LL_AHB2_GRP1_DisableClockLowPower\n 844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR HASHLPEN LL_AHB2_GRP1_DisableClockLowPower\n 845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR RNGLPEN LL_AHB2_GRP1_DisableClockLowPower\n + ARM GAS /tmp/ccLSPxIe.s page 258 + + 846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_DisableClockLowPower 847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) @@ -14578,9 +15428,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) - ARM GAS /tmp/ccuHnxNu.s page 244 - - 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG 854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS 855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @@ -14631,6 +15478,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0). 902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 259 + + 903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs) 904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->AHB3ENR, Periphs) == Periphs); @@ -14638,9 +15488,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB3 peripherals clock. - ARM GAS /tmp/ccuHnxNu.s page 245 - - 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock\n 911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock 912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: @@ -14691,6 +15538,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB3 peripheral clocks in low-power mode + ARM GAS /tmp/ccLSPxIe.s page 260 + + 960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3LPENR FMCLPEN LL_AHB3_GRP1_EnableClockLowPower\n 961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3LPENR QSPILPEN LL_AHB3_GRP1_EnableClockLowPower 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: @@ -14698,9 +15548,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. - ARM GAS /tmp/ccuHnxNu.s page 246 - - 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_EnableClockLowPower(uint32_t Periphs) @@ -14751,6 +15598,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock\n 1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n 1016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_EnableClock\n + ARM GAS /tmp/ccLSPxIe.s page 261 + + 1017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPDIFRXEN LL_APB1_GRP1_EnableClock\n 1018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_EnableClock\n 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_EnableClock\n @@ -14758,9 +15608,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_EnableClock\n 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n - ARM GAS /tmp/ccuHnxNu.s page 247 - - 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_EnableClock\n 1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_EnableClock\n 1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_EnableClock\n @@ -14811,6 +15658,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) 1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; + ARM GAS /tmp/ccLSPxIe.s page 262 + + 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); 1075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1ENR, Periphs); @@ -14818,9 +15668,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 248 - - 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if APB1 peripheral clock is enabled or not 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_IsEnabledClock\n 1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_IsEnabledClock\n @@ -14871,6 +15718,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 + ARM GAS /tmp/ccLSPxIe.s page 263 + + 1131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 1132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 @@ -14878,9 +15728,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*) 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) - ARM GAS /tmp/ccuHnxNu.s page 249 - - 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) 1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR @@ -14931,6 +15778,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART8EN LL_APB1_GRP1_DisableClock\n 1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR RTCEN LL_APB1_GRP1_DisableClock 1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: + ARM GAS /tmp/ccLSPxIe.s page 264 + + 1188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 @@ -14938,9 +15788,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 - ARM GAS /tmp/ccuHnxNu.s page 250 - - 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 @@ -14991,6 +15838,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ForceReset\n 1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ForceReset\n 1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ForceReset\n + ARM GAS /tmp/ccLSPxIe.s page 265 + + 1245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART3RST LL_APB1_GRP1_ForceReset\n 1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART4RST LL_APB1_GRP1_ForceReset\n 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART5RST LL_APB1_GRP1_ForceReset\n @@ -14998,9 +15848,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ForceReset\n 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C4RST LL_APB1_GRP1_ForceReset\n - ARM GAS /tmp/ccuHnxNu.s page 251 - - 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ForceReset\n 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN2RST LL_APB1_GRP1_ForceReset\n 1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN3RST LL_APB1_GRP1_ForceReset\n @@ -15051,6 +15898,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Release APB1 peripherals reset. + ARM GAS /tmp/ccLSPxIe.s page 266 + + 1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ReleaseReset\n 1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ReleaseReset\n 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ReleaseReset\n @@ -15058,9 +15908,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM12RST LL_APB1_GRP1_ReleaseReset\n - ARM GAS /tmp/ccuHnxNu.s page 252 - - 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM13RST LL_APB1_GRP1_ReleaseReset\n 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM14RST LL_APB1_GRP1_ReleaseReset\n 1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ReleaseReset\n @@ -15111,6 +15958,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) 1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) + ARM GAS /tmp/ccLSPxIe.s page 267 + + 1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7 @@ -15118,9 +15968,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None - ARM GAS /tmp/ccuHnxNu.s page 253 - - 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) 1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -15171,6 +16018,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 + ARM GAS /tmp/ccLSPxIe.s page 268 + + 1416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 1417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 @@ -15178,9 +16028,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 - ARM GAS /tmp/ccuHnxNu.s page 254 - - 1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 @@ -15231,6 +16078,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C1LPEN LL_APB1_GRP1_DisableClockLowPower\n 1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C2LPEN LL_APB1_GRP1_DisableClockLowPower\n 1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C3LPEN LL_APB1_GRP1_DisableClockLowPower\n + ARM GAS /tmp/ccLSPxIe.s page 269 + + 1473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C4LPEN LL_APB1_GRP1_DisableClockLowPower\n 1474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN1LPEN LL_APB1_GRP1_DisableClockLowPower\n 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN2LPEN LL_APB1_GRP1_DisableClockLowPower\n @@ -15238,9 +16088,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CECLPEN LL_APB1_GRP1_DisableClockLowPower\n 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR PWRLPEN LL_APB1_GRP1_DisableClockLowPower\n 1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR DACLPEN LL_APB1_GRP1_DisableClockLowPower\n - ARM GAS /tmp/ccuHnxNu.s page 255 - - 1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_DisableClockLowPower\n 1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_DisableClockLowPower\n 1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR RTCLPEN LL_APB1_GRP1_DisableClockLowPower @@ -15291,6 +16138,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2 1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ + ARM GAS /tmp/ccLSPxIe.s page 270 + + 1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @@ -15298,9 +16148,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_EnableClock\n 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM8EN LL_APB2_GRP1_EnableClock\n 1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_EnableClock\n - ARM GAS /tmp/ccuHnxNu.s page 256 - - 1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART6EN LL_APB2_GRP1_EnableClock\n 1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC1EN LL_APB2_GRP1_EnableClock\n 1539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC2EN LL_APB2_GRP1_EnableClock\n @@ -15351,1396 +16198,1396 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 271 + + 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) - 4725 .loc 3 1587 22 view .LVU1439 - 4726 .LBB479: + 5208 .loc 3 1587 22 view .LVU1558 + 5209 .LBB484: 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; - 4727 .loc 3 1589 3 view .LVU1440 + 5210 .loc 3 1589 3 view .LVU1559 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - ARM GAS /tmp/ccuHnxNu.s page 257 - - - 4728 .loc 3 1590 3 view .LVU1441 - 4729 001e 2A4B ldr r3, .L298 - 4730 0020 5A6C ldr r2, [r3, #68] - 4731 0022 42F40052 orr r2, r2, #8192 - 4732 0026 5A64 str r2, [r3, #68] + 5211 .loc 3 1590 3 view .LVU1560 + 5212 001e 2A4B ldr r3, .L348 + 5213 0020 5A6C ldr r2, [r3, #68] + 5214 0022 42F40052 orr r2, r2, #8192 + 5215 0026 5A64 str r2, [r3, #68] 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB2ENR, Periphs); - 4733 .loc 3 1592 3 view .LVU1442 - 4734 .loc 3 1592 12 is_stmt 0 view .LVU1443 - 4735 0028 5A6C ldr r2, [r3, #68] - 4736 002a 02F40052 and r2, r2, #8192 - 4737 .loc 3 1592 10 view .LVU1444 - 4738 002e 0192 str r2, [sp, #4] + 5216 .loc 3 1592 3 view .LVU1561 + 5217 .loc 3 1592 12 is_stmt 0 view .LVU1562 + 5218 0028 5A6C ldr r2, [r3, #68] + 5219 002a 02F40052 and r2, r2, #8192 + 5220 .loc 3 1592 10 view .LVU1563 + 5221 002e 0192 str r2, [sp, #4] 1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4739 .loc 3 1593 3 is_stmt 1 view .LVU1445 - 4740 0030 019A ldr r2, [sp, #4] - 4741 .LVL509: - 4742 .loc 3 1593 3 is_stmt 0 view .LVU1446 - 4743 .LBE479: - 4744 .LBE478: -1358:Src/main.c **** /**SPI4 GPIO Configuration - 4745 .loc 1 1358 3 is_stmt 1 view .LVU1447 - 4746 .LBB480: - 4747 .LBI480: + 5222 .loc 3 1593 3 is_stmt 1 view .LVU1564 + 5223 0030 019A ldr r2, [sp, #4] + 5224 .LVL547: + 5225 .loc 3 1593 3 is_stmt 0 view .LVU1565 + 5226 .LBE484: + 5227 .LBE483: +1452:Src/main.c **** /**SPI4 GPIO Configuration + 5228 .loc 1 1452 3 is_stmt 1 view .LVU1566 + 5229 .LBB485: + 5230 .LBI485: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 4748 .loc 3 309 22 view .LVU1448 - 4749 .LBB481: + 5231 .loc 3 309 22 view .LVU1567 + 5232 .LBB486: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 4750 .loc 3 311 3 view .LVU1449 + 5233 .loc 3 311 3 view .LVU1568 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 4751 .loc 3 312 3 view .LVU1450 - 4752 0032 1A6B ldr r2, [r3, #48] - 4753 0034 42F01002 orr r2, r2, #16 - 4754 0038 1A63 str r2, [r3, #48] + 5234 .loc 3 312 3 view .LVU1569 + 5235 0032 1A6B ldr r2, [r3, #48] + 5236 0034 42F01002 orr r2, r2, #16 + 5237 0038 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4755 .loc 3 314 3 view .LVU1451 + 5238 .loc 3 314 3 view .LVU1570 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4756 .loc 3 314 12 is_stmt 0 view .LVU1452 - 4757 003a 1B6B ldr r3, [r3, #48] - 4758 003c 03F01003 and r3, r3, #16 + 5239 .loc 3 314 12 is_stmt 0 view .LVU1571 + 5240 003a 1B6B ldr r3, [r3, #48] + 5241 003c 03F01003 and r3, r3, #16 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4759 .loc 3 314 10 view .LVU1453 - 4760 0040 0093 str r3, [sp] + 5242 .loc 3 314 10 view .LVU1572 + 5243 0040 0093 str r3, [sp] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4761 .loc 3 315 3 is_stmt 1 view .LVU1454 - 4762 0042 009B ldr r3, [sp] - 4763 .LVL510: + 5244 .loc 3 315 3 is_stmt 1 view .LVU1573 + 5245 0042 009B ldr r3, [sp] + 5246 .LVL548: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4764 .loc 3 315 3 is_stmt 0 view .LVU1455 - 4765 .LBE481: - 4766 .LBE480: -1363:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4767 .loc 1 1363 3 is_stmt 1 view .LVU1456 -1363:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4768 .loc 1 1363 23 is_stmt 0 view .LVU1457 - 4769 0044 4FF48053 mov r3, #4096 - 4770 0048 0293 str r3, [sp, #8] - ARM GAS /tmp/ccuHnxNu.s page 258 + 5247 .loc 3 315 3 is_stmt 0 view .LVU1574 + 5248 .LBE486: + ARM GAS /tmp/ccLSPxIe.s page 272 -1364:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4771 .loc 1 1364 3 is_stmt 1 view .LVU1458 -1364:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4772 .loc 1 1364 24 is_stmt 0 view .LVU1459 - 4773 004a 0225 movs r5, #2 - 4774 004c 0395 str r5, [sp, #12] -1365:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4775 .loc 1 1365 3 is_stmt 1 view .LVU1460 -1365:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4776 .loc 1 1365 25 is_stmt 0 view .LVU1461 - 4777 004e 4FF00308 mov r8, #3 - 4778 0052 CDF81080 str r8, [sp, #16] -1366:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4779 .loc 1 1366 3 is_stmt 1 view .LVU1462 -1367:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4780 .loc 1 1367 3 view .LVU1463 -1368:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 4781 .loc 1 1368 3 view .LVU1464 -1368:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 4782 .loc 1 1368 29 is_stmt 0 view .LVU1465 - 4783 0056 0527 movs r7, #5 - 4784 0058 0797 str r7, [sp, #28] -1369:Src/main.c **** - 4785 .loc 1 1369 3 is_stmt 1 view .LVU1466 - 4786 005a 1C4E ldr r6, .L298+4 - 4787 005c 02A9 add r1, sp, #8 - 4788 005e 3046 mov r0, r6 - 4789 0060 FFF7FEFF bl LL_GPIO_Init - 4790 .LVL511: -1371:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4791 .loc 1 1371 3 view .LVU1467 -1371:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4792 .loc 1 1371 23 is_stmt 0 view .LVU1468 - 4793 0064 4FF40053 mov r3, #8192 - 4794 0068 0293 str r3, [sp, #8] -1372:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4795 .loc 1 1372 3 is_stmt 1 view .LVU1469 -1372:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4796 .loc 1 1372 24 is_stmt 0 view .LVU1470 - 4797 006a 0395 str r5, [sp, #12] -1373:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4798 .loc 1 1373 3 is_stmt 1 view .LVU1471 -1373:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4799 .loc 1 1373 25 is_stmt 0 view .LVU1472 - 4800 006c CDF81080 str r8, [sp, #16] -1374:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4801 .loc 1 1374 3 is_stmt 1 view .LVU1473 -1374:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4802 .loc 1 1374 30 is_stmt 0 view .LVU1474 - 4803 0070 0594 str r4, [sp, #20] -1375:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4804 .loc 1 1375 3 is_stmt 1 view .LVU1475 -1375:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4805 .loc 1 1375 24 is_stmt 0 view .LVU1476 - 4806 0072 0694 str r4, [sp, #24] -1376:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 4807 .loc 1 1376 3 is_stmt 1 view .LVU1477 - ARM GAS /tmp/ccuHnxNu.s page 259 - - -1376:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 4808 .loc 1 1376 29 is_stmt 0 view .LVU1478 - 4809 0074 0797 str r7, [sp, #28] -1377:Src/main.c **** - 4810 .loc 1 1377 3 is_stmt 1 view .LVU1479 - 4811 0076 02A9 add r1, sp, #8 - 4812 0078 3046 mov r0, r6 - 4813 007a FFF7FEFF bl LL_GPIO_Init - 4814 .LVL512: -1383:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 4815 .loc 1 1383 3 view .LVU1480 -1383:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 4816 .loc 1 1383 36 is_stmt 0 view .LVU1481 - 4817 007e 4FF48063 mov r3, #1024 - 4818 0082 0893 str r3, [sp, #32] -1384:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 4819 .loc 1 1384 3 is_stmt 1 view .LVU1482 -1384:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 4820 .loc 1 1384 23 is_stmt 0 view .LVU1483 - 4821 0084 4FF48273 mov r3, #260 - 4822 0088 0993 str r3, [sp, #36] -1385:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 4823 .loc 1 1385 3 is_stmt 1 view .LVU1484 -1385:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 4824 .loc 1 1385 28 is_stmt 0 view .LVU1485 - 4825 008a 4FF47063 mov r3, #3840 - 4826 008e 0A93 str r3, [sp, #40] -1386:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 4827 .loc 1 1386 3 is_stmt 1 view .LVU1486 -1386:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 4828 .loc 1 1386 32 is_stmt 0 view .LVU1487 - 4829 0090 0B95 str r5, [sp, #44] -1387:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 4830 .loc 1 1387 3 is_stmt 1 view .LVU1488 -1387:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 4831 .loc 1 1387 29 is_stmt 0 view .LVU1489 - 4832 0092 0C94 str r4, [sp, #48] -1388:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 4833 .loc 1 1388 3 is_stmt 1 view .LVU1490 -1388:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 4834 .loc 1 1388 22 is_stmt 0 view .LVU1491 - 4835 0094 4FF40073 mov r3, #512 - 4836 0098 0D93 str r3, [sp, #52] -1389:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 4837 .loc 1 1389 3 is_stmt 1 view .LVU1492 -1389:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 4838 .loc 1 1389 27 is_stmt 0 view .LVU1493 - 4839 009a 1823 movs r3, #24 - 4840 009c 0E93 str r3, [sp, #56] -1390:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 4841 .loc 1 1390 3 is_stmt 1 view .LVU1494 -1390:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 4842 .loc 1 1390 27 is_stmt 0 view .LVU1495 - 4843 009e 0F94 str r4, [sp, #60] -1391:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 4844 .loc 1 1391 3 is_stmt 1 view .LVU1496 -1391:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - ARM GAS /tmp/ccuHnxNu.s page 260 - - - 4845 .loc 1 1391 33 is_stmt 0 view .LVU1497 - 4846 00a0 1094 str r4, [sp, #64] -1392:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 4847 .loc 1 1392 3 is_stmt 1 view .LVU1498 -1392:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 4848 .loc 1 1392 26 is_stmt 0 view .LVU1499 - 4849 00a2 0723 movs r3, #7 - 4850 00a4 1193 str r3, [sp, #68] -1393:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); - 4851 .loc 1 1393 3 is_stmt 1 view .LVU1500 - 4852 00a6 0A4C ldr r4, .L298+8 - 4853 00a8 08A9 add r1, sp, #32 - 4854 00aa 2046 mov r0, r4 - 4855 00ac FFF7FEFF bl LL_SPI_Init - 4856 .LVL513: -1394:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); - 4857 .loc 1 1394 3 view .LVU1501 - 4858 .LBB482: - 4859 .LBI482: - 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4860 .loc 4 426 22 view .LVU1502 - 4861 .LBB483: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4862 .loc 4 428 3 view .LVU1503 - 4863 00b0 6368 ldr r3, [r4, #4] - 4864 00b2 23F01003 bic r3, r3, #16 - 4865 00b6 6360 str r3, [r4, #4] - 4866 .LVL514: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4867 .loc 4 428 3 is_stmt 0 view .LVU1504 - 4868 .LBE483: - 4869 .LBE482: -1395:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ - 4870 .loc 1 1395 3 is_stmt 1 view .LVU1505 - 4871 .LBB484: - 4872 .LBI484: - 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 4873 .loc 4 874 22 view .LVU1506 - 4874 .LBB485: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4875 .loc 4 876 3 view .LVU1507 - 4876 00b8 6368 ldr r3, [r4, #4] - 4877 00ba 23F00803 bic r3, r3, #8 - 4878 00be 6360 str r3, [r4, #4] - 4879 .LVL515: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 4880 .loc 4 876 3 is_stmt 0 view .LVU1508 - 4881 .LBE485: - 4882 .LBE484: -1400:Src/main.c **** - 4883 .loc 1 1400 1 view .LVU1509 - 4884 00c0 12B0 add sp, sp, #72 - 4885 .LCFI45: - 4886 .cfi_def_cfa_offset 24 - 4887 @ sp needed - 4888 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 4889 .L299: - ARM GAS /tmp/ccuHnxNu.s page 261 - - - 4890 00c6 00BF .align 2 - 4891 .L298: - 4892 00c8 00380240 .word 1073887232 - 4893 00cc 00100240 .word 1073876992 - 4894 00d0 00340140 .word 1073820672 - 4895 .cfi_endproc - 4896 .LFE1192: - 4898 .section .text.MX_SPI2_Init,"ax",%progbits - 4899 .align 1 - 4900 .syntax unified - 4901 .thumb - 4902 .thumb_func - 4904 MX_SPI2_Init: - 4905 .LFB1191: -1273:Src/main.c **** - 4906 .loc 1 1273 1 is_stmt 1 view -0 - 4907 .cfi_startproc - 4908 @ args = 0, pretend = 0, frame = 72 - 4909 @ frame_needed = 0, uses_anonymous_args = 0 - 4910 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 4911 .LCFI46: - 4912 .cfi_def_cfa_offset 24 - 4913 .cfi_offset 4, -24 - 4914 .cfi_offset 5, -20 - 4915 .cfi_offset 6, -16 - 4916 .cfi_offset 7, -12 - 4917 .cfi_offset 8, -8 - 4918 .cfi_offset 14, -4 - 4919 0004 92B0 sub sp, sp, #72 - 4920 .LCFI47: - 4921 .cfi_def_cfa_offset 96 -1279:Src/main.c **** - 4922 .loc 1 1279 3 view .LVU1511 -1279:Src/main.c **** - 4923 .loc 1 1279 22 is_stmt 0 view .LVU1512 - 4924 0006 2822 movs r2, #40 - 4925 0008 0021 movs r1, #0 - 4926 000a 08A8 add r0, sp, #32 - 4927 000c FFF7FEFF bl memset - 4928 .LVL516: -1281:Src/main.c **** - 4929 .loc 1 1281 3 is_stmt 1 view .LVU1513 -1281:Src/main.c **** - 4930 .loc 1 1281 23 is_stmt 0 view .LVU1514 - 4931 0010 0024 movs r4, #0 - 4932 0012 0294 str r4, [sp, #8] - 4933 0014 0394 str r4, [sp, #12] - 4934 0016 0494 str r4, [sp, #16] - 4935 0018 0594 str r4, [sp, #20] - 4936 001a 0694 str r4, [sp, #24] - 4937 001c 0794 str r4, [sp, #28] -1284:Src/main.c **** - 4938 .loc 1 1284 3 is_stmt 1 view .LVU1515 - 4939 .LVL517: - 4940 .LBB486: - 4941 .LBI486: -1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - ARM GAS /tmp/ccuHnxNu.s page 262 - - - 4942 .loc 3 1071 22 view .LVU1516 - 4943 .LBB487: -1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 4944 .loc 3 1073 3 view .LVU1517 -1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 4945 .loc 3 1074 3 view .LVU1518 - 4946 001e 2F4B ldr r3, .L302 - 4947 0020 1A6C ldr r2, [r3, #64] - 4948 0022 42F48042 orr r2, r2, #16384 - 4949 0026 1A64 str r2, [r3, #64] -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4950 .loc 3 1076 3 view .LVU1519 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4951 .loc 3 1076 12 is_stmt 0 view .LVU1520 - 4952 0028 1A6C ldr r2, [r3, #64] - 4953 002a 02F48042 and r2, r2, #16384 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4954 .loc 3 1076 10 view .LVU1521 - 4955 002e 0192 str r2, [sp, #4] -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4956 .loc 3 1077 3 is_stmt 1 view .LVU1522 - 4957 0030 019A ldr r2, [sp, #4] - 4958 .LVL518: -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4959 .loc 3 1077 3 is_stmt 0 view .LVU1523 - 4960 .LBE487: - 4961 .LBE486: -1286:Src/main.c **** /**SPI2 GPIO Configuration - 4962 .loc 1 1286 3 is_stmt 1 view .LVU1524 - 4963 .LBB488: - 4964 .LBI488: - 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 4965 .loc 3 309 22 view .LVU1525 - 4966 .LBB489: - 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 4967 .loc 3 311 3 view .LVU1526 - 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 4968 .loc 3 312 3 view .LVU1527 - 4969 0032 1A6B ldr r2, [r3, #48] - 4970 0034 42F00202 orr r2, r2, #2 - 4971 0038 1A63 str r2, [r3, #48] - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4972 .loc 3 314 3 view .LVU1528 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4973 .loc 3 314 12 is_stmt 0 view .LVU1529 - 4974 003a 1B6B ldr r3, [r3, #48] - 4975 003c 03F00203 and r3, r3, #2 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 4976 .loc 3 314 10 view .LVU1530 - 4977 0040 0093 str r3, [sp] - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4978 .loc 3 315 3 is_stmt 1 view .LVU1531 - 4979 0042 009B ldr r3, [sp] - 4980 .LVL519: - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 4981 .loc 3 315 3 is_stmt 0 view .LVU1532 - 4982 .LBE489: - ARM GAS /tmp/ccuHnxNu.s page 263 - - - 4983 .LBE488: -1292:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4984 .loc 1 1292 3 is_stmt 1 view .LVU1533 -1292:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 4985 .loc 1 1292 23 is_stmt 0 view .LVU1534 - 4986 0044 4FF40053 mov r3, #8192 - 4987 0048 0293 str r3, [sp, #8] -1293:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4988 .loc 1 1293 3 is_stmt 1 view .LVU1535 -1293:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 4989 .loc 1 1293 24 is_stmt 0 view .LVU1536 - 4990 004a 4FF00208 mov r8, #2 - 4991 004e CDF80C80 str r8, [sp, #12] -1294:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4992 .loc 1 1294 3 is_stmt 1 view .LVU1537 -1294:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 4993 .loc 1 1294 25 is_stmt 0 view .LVU1538 - 4994 0052 0327 movs r7, #3 - 4995 0054 0497 str r7, [sp, #16] -1295:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 4996 .loc 1 1295 3 is_stmt 1 view .LVU1539 -1296:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 4997 .loc 1 1296 3 view .LVU1540 -1297:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 4998 .loc 1 1297 3 view .LVU1541 -1297:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 4999 .loc 1 1297 29 is_stmt 0 view .LVU1542 - 5000 0056 0526 movs r6, #5 - 5001 0058 0796 str r6, [sp, #28] -1298:Src/main.c **** - 5002 .loc 1 1298 3 is_stmt 1 view .LVU1543 - 5003 005a 214D ldr r5, .L302+4 - 5004 005c 02A9 add r1, sp, #8 - 5005 005e 2846 mov r0, r5 - 5006 0060 FFF7FEFF bl LL_GPIO_Init - 5007 .LVL520: -1300:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5008 .loc 1 1300 3 view .LVU1544 -1300:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5009 .loc 1 1300 23 is_stmt 0 view .LVU1545 - 5010 0064 4FF48043 mov r3, #16384 - 5011 0068 0293 str r3, [sp, #8] -1301:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5012 .loc 1 1301 3 is_stmt 1 view .LVU1546 -1301:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5013 .loc 1 1301 24 is_stmt 0 view .LVU1547 - 5014 006a CDF80C80 str r8, [sp, #12] -1302:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5015 .loc 1 1302 3 is_stmt 1 view .LVU1548 -1302:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5016 .loc 1 1302 25 is_stmt 0 view .LVU1549 - 5017 006e 0497 str r7, [sp, #16] -1303:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5018 .loc 1 1303 3 is_stmt 1 view .LVU1550 -1303:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5019 .loc 1 1303 30 is_stmt 0 view .LVU1551 - 5020 0070 0594 str r4, [sp, #20] - ARM GAS /tmp/ccuHnxNu.s page 264 - - -1304:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 5021 .loc 1 1304 3 is_stmt 1 view .LVU1552 -1304:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 5022 .loc 1 1304 24 is_stmt 0 view .LVU1553 - 5023 0072 0694 str r4, [sp, #24] -1305:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 5024 .loc 1 1305 3 is_stmt 1 view .LVU1554 -1305:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 5025 .loc 1 1305 29 is_stmt 0 view .LVU1555 - 5026 0074 0796 str r6, [sp, #28] -1306:Src/main.c **** - 5027 .loc 1 1306 3 is_stmt 1 view .LVU1556 - 5028 0076 02A9 add r1, sp, #8 - 5029 0078 2846 mov r0, r5 - 5030 007a FFF7FEFF bl LL_GPIO_Init - 5031 .LVL521: -1308:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5032 .loc 1 1308 3 view .LVU1557 -1308:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5033 .loc 1 1308 23 is_stmt 0 view .LVU1558 - 5034 007e 4FF40043 mov r3, #32768 - 5035 0082 0293 str r3, [sp, #8] -1309:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5036 .loc 1 1309 3 is_stmt 1 view .LVU1559 -1309:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5037 .loc 1 1309 24 is_stmt 0 view .LVU1560 - 5038 0084 CDF80C80 str r8, [sp, #12] -1310:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5039 .loc 1 1310 3 is_stmt 1 view .LVU1561 -1310:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5040 .loc 1 1310 25 is_stmt 0 view .LVU1562 - 5041 0088 0497 str r7, [sp, #16] -1311:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5042 .loc 1 1311 3 is_stmt 1 view .LVU1563 -1311:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5043 .loc 1 1311 30 is_stmt 0 view .LVU1564 - 5044 008a 0594 str r4, [sp, #20] -1312:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 5045 .loc 1 1312 3 is_stmt 1 view .LVU1565 -1312:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 5046 .loc 1 1312 24 is_stmt 0 view .LVU1566 - 5047 008c 0694 str r4, [sp, #24] -1313:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 5048 .loc 1 1313 3 is_stmt 1 view .LVU1567 -1313:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 5049 .loc 1 1313 29 is_stmt 0 view .LVU1568 - 5050 008e 0796 str r6, [sp, #28] -1314:Src/main.c **** - 5051 .loc 1 1314 3 is_stmt 1 view .LVU1569 - 5052 0090 02A9 add r1, sp, #8 - 5053 0092 2846 mov r0, r5 - 5054 0094 FFF7FEFF bl LL_GPIO_Init - 5055 .LVL522: -1320:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 5056 .loc 1 1320 3 view .LVU1570 -1320:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 5057 .loc 1 1320 36 is_stmt 0 view .LVU1571 - ARM GAS /tmp/ccuHnxNu.s page 265 - - - 5058 0098 0894 str r4, [sp, #32] -1321:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 5059 .loc 1 1321 3 is_stmt 1 view .LVU1572 -1321:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 5060 .loc 1 1321 23 is_stmt 0 view .LVU1573 - 5061 009a 4FF48273 mov r3, #260 - 5062 009e 0993 str r3, [sp, #36] -1322:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; - 5063 .loc 1 1322 3 is_stmt 1 view .LVU1574 -1322:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; - 5064 .loc 1 1322 28 is_stmt 0 view .LVU1575 - 5065 00a0 4FF47063 mov r3, #3840 - 5066 00a4 0A93 str r3, [sp, #40] -1323:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 5067 .loc 1 1323 3 is_stmt 1 view .LVU1576 -1323:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 5068 .loc 1 1323 32 is_stmt 0 view .LVU1577 - 5069 00a6 0B94 str r4, [sp, #44] -1324:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 5070 .loc 1 1324 3 is_stmt 1 view .LVU1578 -1324:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 5071 .loc 1 1324 29 is_stmt 0 view .LVU1579 - 5072 00a8 0C94 str r4, [sp, #48] -1325:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 5073 .loc 1 1325 3 is_stmt 1 view .LVU1580 -1325:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 5074 .loc 1 1325 22 is_stmt 0 view .LVU1581 - 5075 00aa 4FF40073 mov r3, #512 - 5076 00ae 0D93 str r3, [sp, #52] -1326:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 5077 .loc 1 1326 3 is_stmt 1 view .LVU1582 -1326:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 5078 .loc 1 1326 27 is_stmt 0 view .LVU1583 - 5079 00b0 1023 movs r3, #16 - 5080 00b2 0E93 str r3, [sp, #56] -1327:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 5081 .loc 1 1327 3 is_stmt 1 view .LVU1584 -1327:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 5082 .loc 1 1327 27 is_stmt 0 view .LVU1585 - 5083 00b4 0F94 str r4, [sp, #60] -1328:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 5084 .loc 1 1328 3 is_stmt 1 view .LVU1586 -1328:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 5085 .loc 1 1328 33 is_stmt 0 view .LVU1587 - 5086 00b6 1094 str r4, [sp, #64] -1329:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 5087 .loc 1 1329 3 is_stmt 1 view .LVU1588 -1329:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 5088 .loc 1 1329 26 is_stmt 0 view .LVU1589 - 5089 00b8 0723 movs r3, #7 - 5090 00ba 1193 str r3, [sp, #68] -1330:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); - 5091 .loc 1 1330 3 is_stmt 1 view .LVU1590 - 5092 00bc 094C ldr r4, .L302+8 - 5093 00be 08A9 add r1, sp, #32 - 5094 00c0 2046 mov r0, r4 - 5095 00c2 FFF7FEFF bl LL_SPI_Init - ARM GAS /tmp/ccuHnxNu.s page 266 - - - 5096 .LVL523: -1331:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); - 5097 .loc 1 1331 3 view .LVU1591 - 5098 .LBB490: - 5099 .LBI490: - 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5100 .loc 4 426 22 view .LVU1592 - 5101 .LBB491: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5102 .loc 4 428 3 view .LVU1593 - 5103 00c6 6368 ldr r3, [r4, #4] - 5104 00c8 23F01003 bic r3, r3, #16 - 5105 00cc 6360 str r3, [r4, #4] - 5106 .LVL524: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5107 .loc 4 428 3 is_stmt 0 view .LVU1594 - 5108 .LBE491: - 5109 .LBE490: -1332:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ - 5110 .loc 1 1332 3 is_stmt 1 view .LVU1595 - 5111 .LBB492: - 5112 .LBI492: - 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5113 .loc 4 874 22 view .LVU1596 - 5114 .LBB493: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5115 .loc 4 876 3 view .LVU1597 - 5116 00ce 6368 ldr r3, [r4, #4] - 5117 00d0 23F00803 bic r3, r3, #8 - 5118 00d4 6360 str r3, [r4, #4] - 5119 .LVL525: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5120 .loc 4 876 3 is_stmt 0 view .LVU1598 - 5121 .LBE493: - 5122 .LBE492: -1337:Src/main.c **** - 5123 .loc 1 1337 1 view .LVU1599 - 5124 00d6 12B0 add sp, sp, #72 - 5125 .LCFI48: - 5126 .cfi_def_cfa_offset 24 - 5127 @ sp needed - 5128 00d8 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 5129 .L303: - 5130 .align 2 - 5131 .L302: - 5132 00dc 00380240 .word 1073887232 - 5133 00e0 00040240 .word 1073873920 - 5134 00e4 00380040 .word 1073756160 - 5135 .cfi_endproc - 5136 .LFE1191: - 5138 .section .text.MX_SPI5_Init,"ax",%progbits - 5139 .align 1 - 5140 .syntax unified - 5141 .thumb - 5142 .thumb_func - 5144 MX_SPI5_Init: - 5145 .LFB1193: - ARM GAS /tmp/ccuHnxNu.s page 267 - - -1408:Src/main.c **** - 5146 .loc 1 1408 1 is_stmt 1 view -0 - 5147 .cfi_startproc - 5148 @ args = 0, pretend = 0, frame = 72 - 5149 @ frame_needed = 0, uses_anonymous_args = 0 - 5150 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 5151 .LCFI49: - 5152 .cfi_def_cfa_offset 24 - 5153 .cfi_offset 4, -24 - 5154 .cfi_offset 5, -20 - 5155 .cfi_offset 6, -16 - 5156 .cfi_offset 7, -12 - 5157 .cfi_offset 8, -8 - 5158 .cfi_offset 14, -4 - 5159 0004 92B0 sub sp, sp, #72 - 5160 .LCFI50: - 5161 .cfi_def_cfa_offset 96 -1414:Src/main.c **** - 5162 .loc 1 1414 3 view .LVU1601 -1414:Src/main.c **** - 5163 .loc 1 1414 22 is_stmt 0 view .LVU1602 - 5164 0006 2822 movs r2, #40 - 5165 0008 0021 movs r1, #0 - 5166 000a 08A8 add r0, sp, #32 - 5167 000c FFF7FEFF bl memset - 5168 .LVL526: -1416:Src/main.c **** - 5169 .loc 1 1416 3 is_stmt 1 view .LVU1603 -1416:Src/main.c **** - 5170 .loc 1 1416 23 is_stmt 0 view .LVU1604 - 5171 0010 0024 movs r4, #0 - 5172 0012 0294 str r4, [sp, #8] - 5173 0014 0394 str r4, [sp, #12] - 5174 0016 0494 str r4, [sp, #16] - 5175 0018 0594 str r4, [sp, #20] - 5176 001a 0694 str r4, [sp, #24] - 5177 001c 0794 str r4, [sp, #28] -1419:Src/main.c **** - 5178 .loc 1 1419 3 is_stmt 1 view .LVU1605 - 5179 .LVL527: - 5180 .LBB494: - 5181 .LBI494: -1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5182 .loc 3 1587 22 view .LVU1606 - 5183 .LBB495: -1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 5184 .loc 3 1589 3 view .LVU1607 -1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5185 .loc 3 1590 3 view .LVU1608 - 5186 001e 294B ldr r3, .L306 - 5187 0020 5A6C ldr r2, [r3, #68] - 5188 0022 42F48012 orr r2, r2, #1048576 - 5189 0026 5A64 str r2, [r3, #68] -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5190 .loc 3 1592 3 view .LVU1609 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5191 .loc 3 1592 12 is_stmt 0 view .LVU1610 - ARM GAS /tmp/ccuHnxNu.s page 268 - - - 5192 0028 5A6C ldr r2, [r3, #68] - 5193 002a 02F48012 and r2, r2, #1048576 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5194 .loc 3 1592 10 view .LVU1611 - 5195 002e 0192 str r2, [sp, #4] - 5196 .loc 3 1593 3 is_stmt 1 view .LVU1612 - 5197 0030 019A ldr r2, [sp, #4] - 5198 .LVL528: - 5199 .loc 3 1593 3 is_stmt 0 view .LVU1613 - 5200 .LBE495: - 5201 .LBE494: -1421:Src/main.c **** /**SPI5 GPIO Configuration - 5202 .loc 1 1421 3 is_stmt 1 view .LVU1614 - 5203 .LBB496: - 5204 .LBI496: - 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5205 .loc 3 309 22 view .LVU1615 - 5206 .LBB497: - 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 5207 .loc 3 311 3 view .LVU1616 - 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5208 .loc 3 312 3 view .LVU1617 - 5209 0032 1A6B ldr r2, [r3, #48] - 5210 0034 42F02002 orr r2, r2, #32 - 5211 0038 1A63 str r2, [r3, #48] - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5212 .loc 3 314 3 view .LVU1618 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5213 .loc 3 314 12 is_stmt 0 view .LVU1619 - 5214 003a 1B6B ldr r3, [r3, #48] - 5215 003c 03F02003 and r3, r3, #32 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5216 .loc 3 314 10 view .LVU1620 - 5217 0040 0093 str r3, [sp] - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5218 .loc 3 315 3 is_stmt 1 view .LVU1621 - 5219 0042 009B ldr r3, [sp] - 5220 .LVL529: - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5221 .loc 3 315 3 is_stmt 0 view .LVU1622 - 5222 .LBE497: - 5223 .LBE496: -1426:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5224 .loc 1 1426 3 is_stmt 1 view .LVU1623 -1426:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5225 .loc 1 1426 23 is_stmt 0 view .LVU1624 - 5226 0044 8023 movs r3, #128 - 5227 0046 0293 str r3, [sp, #8] -1427:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5228 .loc 1 1427 3 is_stmt 1 view .LVU1625 -1427:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5229 .loc 1 1427 24 is_stmt 0 view .LVU1626 - 5230 0048 0225 movs r5, #2 - 5231 004a 0395 str r5, [sp, #12] -1428:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5232 .loc 1 1428 3 is_stmt 1 view .LVU1627 -1428:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - ARM GAS /tmp/ccuHnxNu.s page 269 - - - 5233 .loc 1 1428 25 is_stmt 0 view .LVU1628 - 5234 004c 4FF00308 mov r8, #3 - 5235 0050 CDF81080 str r8, [sp, #16] -1429:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5236 .loc 1 1429 3 is_stmt 1 view .LVU1629 -1430:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 5237 .loc 1 1430 3 view .LVU1630 -1431:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 5238 .loc 1 1431 3 view .LVU1631 -1431:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 5239 .loc 1 1431 29 is_stmt 0 view .LVU1632 - 5240 0054 0527 movs r7, #5 - 5241 0056 0797 str r7, [sp, #28] -1432:Src/main.c **** - 5242 .loc 1 1432 3 is_stmt 1 view .LVU1633 - 5243 0058 1B4E ldr r6, .L306+4 - 5244 005a 02A9 add r1, sp, #8 - 5245 005c 3046 mov r0, r6 - 5246 005e FFF7FEFF bl LL_GPIO_Init - 5247 .LVL530: -1434:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5248 .loc 1 1434 3 view .LVU1634 -1434:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5249 .loc 1 1434 23 is_stmt 0 view .LVU1635 - 5250 0062 4FF48073 mov r3, #256 - 5251 0066 0293 str r3, [sp, #8] -1435:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5252 .loc 1 1435 3 is_stmt 1 view .LVU1636 -1435:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5253 .loc 1 1435 24 is_stmt 0 view .LVU1637 - 5254 0068 0395 str r5, [sp, #12] -1436:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5255 .loc 1 1436 3 is_stmt 1 view .LVU1638 -1436:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5256 .loc 1 1436 25 is_stmt 0 view .LVU1639 - 5257 006a CDF81080 str r8, [sp, #16] -1437:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5258 .loc 1 1437 3 is_stmt 1 view .LVU1640 -1437:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5259 .loc 1 1437 30 is_stmt 0 view .LVU1641 - 5260 006e 0594 str r4, [sp, #20] -1438:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 5261 .loc 1 1438 3 is_stmt 1 view .LVU1642 -1438:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 5262 .loc 1 1438 24 is_stmt 0 view .LVU1643 - 5263 0070 0694 str r4, [sp, #24] -1439:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 5264 .loc 1 1439 3 is_stmt 1 view .LVU1644 -1439:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 5265 .loc 1 1439 29 is_stmt 0 view .LVU1645 - 5266 0072 0797 str r7, [sp, #28] -1440:Src/main.c **** - 5267 .loc 1 1440 3 is_stmt 1 view .LVU1646 - 5268 0074 02A9 add r1, sp, #8 - 5269 0076 3046 mov r0, r6 - 5270 0078 FFF7FEFF bl LL_GPIO_Init - 5271 .LVL531: - ARM GAS /tmp/ccuHnxNu.s page 270 - - -1446:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 5272 .loc 1 1446 3 view .LVU1647 -1446:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 5273 .loc 1 1446 36 is_stmt 0 view .LVU1648 - 5274 007c 4FF48063 mov r3, #1024 - 5275 0080 0893 str r3, [sp, #32] -1447:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 5276 .loc 1 1447 3 is_stmt 1 view .LVU1649 -1447:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 5277 .loc 1 1447 23 is_stmt 0 view .LVU1650 - 5278 0082 4FF48273 mov r3, #260 - 5279 0086 0993 str r3, [sp, #36] -1448:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 5280 .loc 1 1448 3 is_stmt 1 view .LVU1651 -1448:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 5281 .loc 1 1448 28 is_stmt 0 view .LVU1652 - 5282 0088 4FF47063 mov r3, #3840 - 5283 008c 0A93 str r3, [sp, #40] -1449:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 5284 .loc 1 1449 3 is_stmt 1 view .LVU1653 -1449:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 5285 .loc 1 1449 32 is_stmt 0 view .LVU1654 - 5286 008e 0B95 str r5, [sp, #44] -1450:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 5287 .loc 1 1450 3 is_stmt 1 view .LVU1655 -1450:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 5288 .loc 1 1450 29 is_stmt 0 view .LVU1656 - 5289 0090 0C94 str r4, [sp, #48] -1451:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 5290 .loc 1 1451 3 is_stmt 1 view .LVU1657 -1451:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 5291 .loc 1 1451 22 is_stmt 0 view .LVU1658 - 5292 0092 4FF40073 mov r3, #512 - 5293 0096 0D93 str r3, [sp, #52] -1452:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 5294 .loc 1 1452 3 is_stmt 1 view .LVU1659 -1452:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 5295 .loc 1 1452 27 is_stmt 0 view .LVU1660 - 5296 0098 1823 movs r3, #24 - 5297 009a 0E93 str r3, [sp, #56] -1453:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 5298 .loc 1 1453 3 is_stmt 1 view .LVU1661 -1453:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 5299 .loc 1 1453 27 is_stmt 0 view .LVU1662 - 5300 009c 0F94 str r4, [sp, #60] -1454:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 5301 .loc 1 1454 3 is_stmt 1 view .LVU1663 -1454:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 5302 .loc 1 1454 33 is_stmt 0 view .LVU1664 - 5303 009e 1094 str r4, [sp, #64] -1455:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 5304 .loc 1 1455 3 is_stmt 1 view .LVU1665 -1455:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 5305 .loc 1 1455 26 is_stmt 0 view .LVU1666 - 5306 00a0 0723 movs r3, #7 - 5307 00a2 1193 str r3, [sp, #68] -1456:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); - ARM GAS /tmp/ccuHnxNu.s page 271 - - - 5308 .loc 1 1456 3 is_stmt 1 view .LVU1667 - 5309 00a4 094C ldr r4, .L306+8 - 5310 00a6 08A9 add r1, sp, #32 - 5311 00a8 2046 mov r0, r4 - 5312 00aa FFF7FEFF bl LL_SPI_Init - 5313 .LVL532: -1457:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); - 5314 .loc 1 1457 3 view .LVU1668 - 5315 .LBB498: - 5316 .LBI498: - 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5317 .loc 4 426 22 view .LVU1669 - 5318 .LBB499: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5319 .loc 4 428 3 view .LVU1670 - 5320 00ae 6368 ldr r3, [r4, #4] - 5321 00b0 23F01003 bic r3, r3, #16 - 5322 00b4 6360 str r3, [r4, #4] - 5323 .LVL533: - 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5324 .loc 4 428 3 is_stmt 0 view .LVU1671 - 5325 .LBE499: - 5326 .LBE498: -1458:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ - 5327 .loc 1 1458 3 is_stmt 1 view .LVU1672 - 5328 .LBB500: - 5329 .LBI500: - 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5330 .loc 4 874 22 view .LVU1673 - 5331 .LBB501: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5332 .loc 4 876 3 view .LVU1674 - 5333 00b6 6368 ldr r3, [r4, #4] - 5334 00b8 23F00803 bic r3, r3, #8 - 5335 00bc 6360 str r3, [r4, #4] - 5336 .LVL534: - 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5337 .loc 4 876 3 is_stmt 0 view .LVU1675 - 5338 .LBE501: - 5339 .LBE500: + 5249 .LBE485: +1457:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5250 .loc 1 1457 3 is_stmt 1 view .LVU1575 +1457:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5251 .loc 1 1457 23 is_stmt 0 view .LVU1576 + 5252 0044 4FF48053 mov r3, #4096 + 5253 0048 0293 str r3, [sp, #8] +1458:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5254 .loc 1 1458 3 is_stmt 1 view .LVU1577 +1458:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5255 .loc 1 1458 24 is_stmt 0 view .LVU1578 + 5256 004a 0225 movs r5, #2 + 5257 004c 0395 str r5, [sp, #12] +1459:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5258 .loc 1 1459 3 is_stmt 1 view .LVU1579 +1459:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5259 .loc 1 1459 25 is_stmt 0 view .LVU1580 + 5260 004e 4FF00308 mov r8, #3 + 5261 0052 CDF81080 str r8, [sp, #16] +1460:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5262 .loc 1 1460 3 is_stmt 1 view .LVU1581 +1461:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5263 .loc 1 1461 3 view .LVU1582 +1462:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 5264 .loc 1 1462 3 view .LVU1583 +1462:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 5265 .loc 1 1462 29 is_stmt 0 view .LVU1584 + 5266 0056 0527 movs r7, #5 + 5267 0058 0797 str r7, [sp, #28] 1463:Src/main.c **** - 5340 .loc 1 1463 1 view .LVU1676 - 5341 00be 12B0 add sp, sp, #72 - 5342 .LCFI51: - 5343 .cfi_def_cfa_offset 24 - 5344 @ sp needed - 5345 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 5346 .L307: - 5347 .align 2 - 5348 .L306: - 5349 00c4 00380240 .word 1073887232 - 5350 00c8 00140240 .word 1073878016 - 5351 00cc 00500140 .word 1073827840 - 5352 .cfi_endproc - 5353 .LFE1193: - 5355 .section .text.MX_SPI6_Init,"ax",%progbits - 5356 .align 1 - ARM GAS /tmp/ccuHnxNu.s page 272 + 5268 .loc 1 1463 3 is_stmt 1 view .LVU1585 + 5269 005a 1C4E ldr r6, .L348+4 + 5270 005c 02A9 add r1, sp, #8 + 5271 005e 3046 mov r0, r6 + 5272 0060 FFF7FEFF bl LL_GPIO_Init + 5273 .LVL549: +1465:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5274 .loc 1 1465 3 view .LVU1586 +1465:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5275 .loc 1 1465 23 is_stmt 0 view .LVU1587 + 5276 0064 4FF40053 mov r3, #8192 + 5277 0068 0293 str r3, [sp, #8] +1466:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5278 .loc 1 1466 3 is_stmt 1 view .LVU1588 +1466:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5279 .loc 1 1466 24 is_stmt 0 view .LVU1589 + 5280 006a 0395 str r5, [sp, #12] +1467:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5281 .loc 1 1467 3 is_stmt 1 view .LVU1590 +1467:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5282 .loc 1 1467 25 is_stmt 0 view .LVU1591 + 5283 006c CDF81080 str r8, [sp, #16] +1468:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5284 .loc 1 1468 3 is_stmt 1 view .LVU1592 +1468:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5285 .loc 1 1468 30 is_stmt 0 view .LVU1593 + 5286 0070 0594 str r4, [sp, #20] + ARM GAS /tmp/ccLSPxIe.s page 273 - 5357 .syntax unified - 5358 .thumb - 5359 .thumb_func - 5361 MX_SPI6_Init: - 5362 .LFB1194: +1469:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5287 .loc 1 1469 3 is_stmt 1 view .LVU1594 +1469:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5288 .loc 1 1469 24 is_stmt 0 view .LVU1595 + 5289 0072 0694 str r4, [sp, #24] +1470:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 5290 .loc 1 1470 3 is_stmt 1 view .LVU1596 +1470:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 5291 .loc 1 1470 29 is_stmt 0 view .LVU1597 + 5292 0074 0797 str r7, [sp, #28] 1471:Src/main.c **** - 5363 .loc 1 1471 1 is_stmt 1 view -0 - 5364 .cfi_startproc - 5365 @ args = 0, pretend = 0, frame = 72 - 5366 @ frame_needed = 0, uses_anonymous_args = 0 - 5367 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 5368 .LCFI52: - 5369 .cfi_def_cfa_offset 24 - 5370 .cfi_offset 4, -24 - 5371 .cfi_offset 5, -20 - 5372 .cfi_offset 6, -16 - 5373 .cfi_offset 7, -12 - 5374 .cfi_offset 8, -8 - 5375 .cfi_offset 14, -4 - 5376 0004 92B0 sub sp, sp, #72 - 5377 .LCFI53: - 5378 .cfi_def_cfa_offset 96 -1477:Src/main.c **** - 5379 .loc 1 1477 3 view .LVU1678 -1477:Src/main.c **** - 5380 .loc 1 1477 22 is_stmt 0 view .LVU1679 - 5381 0006 2822 movs r2, #40 - 5382 0008 0021 movs r1, #0 - 5383 000a 08A8 add r0, sp, #32 - 5384 000c FFF7FEFF bl memset - 5385 .LVL535: -1479:Src/main.c **** - 5386 .loc 1 1479 3 is_stmt 1 view .LVU1680 -1479:Src/main.c **** - 5387 .loc 1 1479 23 is_stmt 0 view .LVU1681 - 5388 0010 0024 movs r4, #0 - 5389 0012 0294 str r4, [sp, #8] - 5390 0014 0394 str r4, [sp, #12] - 5391 0016 0494 str r4, [sp, #16] - 5392 0018 0594 str r4, [sp, #20] - 5393 001a 0694 str r4, [sp, #24] - 5394 001c 0794 str r4, [sp, #28] -1482:Src/main.c **** - 5395 .loc 1 1482 3 is_stmt 1 view .LVU1682 - 5396 .LVL536: - 5397 .LBB502: - 5398 .LBI502: -1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5399 .loc 3 1587 22 view .LVU1683 - 5400 .LBB503: -1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 5401 .loc 3 1589 3 view .LVU1684 -1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5402 .loc 3 1590 3 view .LVU1685 - 5403 001e 294B ldr r3, .L310 - 5404 0020 5A6C ldr r2, [r3, #68] - 5405 0022 42F40012 orr r2, r2, #2097152 - ARM GAS /tmp/ccuHnxNu.s page 273 + 5293 .loc 1 1471 3 is_stmt 1 view .LVU1598 + 5294 0076 02A9 add r1, sp, #8 + 5295 0078 3046 mov r0, r6 + 5296 007a FFF7FEFF bl LL_GPIO_Init + 5297 .LVL550: +1477:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5298 .loc 1 1477 3 view .LVU1599 +1477:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5299 .loc 1 1477 36 is_stmt 0 view .LVU1600 + 5300 007e 4FF48063 mov r3, #1024 + 5301 0082 0893 str r3, [sp, #32] +1478:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5302 .loc 1 1478 3 is_stmt 1 view .LVU1601 +1478:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5303 .loc 1 1478 23 is_stmt 0 view .LVU1602 + 5304 0084 4FF48273 mov r3, #260 + 5305 0088 0993 str r3, [sp, #36] +1479:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 5306 .loc 1 1479 3 is_stmt 1 view .LVU1603 +1479:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 5307 .loc 1 1479 28 is_stmt 0 view .LVU1604 + 5308 008a 4FF47063 mov r3, #3840 + 5309 008e 0A93 str r3, [sp, #40] +1480:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 5310 .loc 1 1480 3 is_stmt 1 view .LVU1605 +1480:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 5311 .loc 1 1480 32 is_stmt 0 view .LVU1606 + 5312 0090 0B95 str r5, [sp, #44] +1481:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5313 .loc 1 1481 3 is_stmt 1 view .LVU1607 +1481:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5314 .loc 1 1481 29 is_stmt 0 view .LVU1608 + 5315 0092 0C94 str r4, [sp, #48] +1482:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 5316 .loc 1 1482 3 is_stmt 1 view .LVU1609 +1482:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 5317 .loc 1 1482 22 is_stmt 0 view .LVU1610 + 5318 0094 4FF40073 mov r3, #512 + 5319 0098 0D93 str r3, [sp, #52] +1483:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5320 .loc 1 1483 3 is_stmt 1 view .LVU1611 +1483:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5321 .loc 1 1483 27 is_stmt 0 view .LVU1612 + 5322 009a 1823 movs r3, #24 + 5323 009c 0E93 str r3, [sp, #56] +1484:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + ARM GAS /tmp/ccLSPxIe.s page 274 - 5406 0026 5A64 str r2, [r3, #68] -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5407 .loc 3 1592 3 view .LVU1686 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5408 .loc 3 1592 12 is_stmt 0 view .LVU1687 - 5409 0028 5A6C ldr r2, [r3, #68] - 5410 002a 02F40012 and r2, r2, #2097152 -1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5411 .loc 3 1592 10 view .LVU1688 - 5412 002e 0192 str r2, [sp, #4] - 5413 .loc 3 1593 3 is_stmt 1 view .LVU1689 - 5414 0030 019A ldr r2, [sp, #4] - 5415 .LVL537: - 5416 .loc 3 1593 3 is_stmt 0 view .LVU1690 - 5417 .LBE503: - 5418 .LBE502: -1484:Src/main.c **** /**SPI6 GPIO Configuration - 5419 .loc 1 1484 3 is_stmt 1 view .LVU1691 - 5420 .LBB504: - 5421 .LBI504: - 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5422 .loc 3 309 22 view .LVU1692 - 5423 .LBB505: - 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 5424 .loc 3 311 3 view .LVU1693 - 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5425 .loc 3 312 3 view .LVU1694 - 5426 0032 1A6B ldr r2, [r3, #48] - 5427 0034 42F00102 orr r2, r2, #1 - 5428 0038 1A63 str r2, [r3, #48] - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5429 .loc 3 314 3 view .LVU1695 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5430 .loc 3 314 12 is_stmt 0 view .LVU1696 - 5431 003a 1B6B ldr r3, [r3, #48] - 5432 003c 03F00103 and r3, r3, #1 - 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5433 .loc 3 314 10 view .LVU1697 - 5434 0040 0093 str r3, [sp] - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5435 .loc 3 315 3 is_stmt 1 view .LVU1698 - 5436 0042 009B ldr r3, [sp] - 5437 .LVL538: - 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5438 .loc 3 315 3 is_stmt 0 view .LVU1699 - 5439 .LBE505: - 5440 .LBE504: -1489:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5441 .loc 1 1489 3 is_stmt 1 view .LVU1700 -1489:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5442 .loc 1 1489 23 is_stmt 0 view .LVU1701 - 5443 0044 2023 movs r3, #32 - 5444 0046 0293 str r3, [sp, #8] -1490:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5445 .loc 1 1490 3 is_stmt 1 view .LVU1702 -1490:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5446 .loc 1 1490 24 is_stmt 0 view .LVU1703 - ARM GAS /tmp/ccuHnxNu.s page 274 - - - 5447 0048 0225 movs r5, #2 - 5448 004a 0395 str r5, [sp, #12] -1491:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5449 .loc 1 1491 3 is_stmt 1 view .LVU1704 -1491:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5450 .loc 1 1491 25 is_stmt 0 view .LVU1705 - 5451 004c 4FF00308 mov r8, #3 - 5452 0050 CDF81080 str r8, [sp, #16] -1492:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5453 .loc 1 1492 3 is_stmt 1 view .LVU1706 -1493:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 5454 .loc 1 1493 3 view .LVU1707 -1494:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 5455 .loc 1 1494 3 view .LVU1708 -1494:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 5456 .loc 1 1494 29 is_stmt 0 view .LVU1709 - 5457 0054 0827 movs r7, #8 - 5458 0056 0797 str r7, [sp, #28] -1495:Src/main.c **** - 5459 .loc 1 1495 3 is_stmt 1 view .LVU1710 - 5460 0058 1B4E ldr r6, .L310+4 - 5461 005a 0DEB0701 add r1, sp, r7 - 5462 005e 3046 mov r0, r6 - 5463 0060 FFF7FEFF bl LL_GPIO_Init - 5464 .LVL539: -1497:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5465 .loc 1 1497 3 view .LVU1711 -1497:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 5466 .loc 1 1497 23 is_stmt 0 view .LVU1712 - 5467 0064 8023 movs r3, #128 - 5468 0066 0293 str r3, [sp, #8] -1498:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5469 .loc 1 1498 3 is_stmt 1 view .LVU1713 -1498:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 5470 .loc 1 1498 24 is_stmt 0 view .LVU1714 - 5471 0068 0395 str r5, [sp, #12] -1499:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5472 .loc 1 1499 3 is_stmt 1 view .LVU1715 -1499:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 5473 .loc 1 1499 25 is_stmt 0 view .LVU1716 - 5474 006a CDF81080 str r8, [sp, #16] -1500:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5475 .loc 1 1500 3 is_stmt 1 view .LVU1717 -1500:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 5476 .loc 1 1500 30 is_stmt 0 view .LVU1718 - 5477 006e 0594 str r4, [sp, #20] -1501:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 5478 .loc 1 1501 3 is_stmt 1 view .LVU1719 -1501:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 5479 .loc 1 1501 24 is_stmt 0 view .LVU1720 - 5480 0070 0694 str r4, [sp, #24] -1502:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 5481 .loc 1 1502 3 is_stmt 1 view .LVU1721 -1502:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 5482 .loc 1 1502 29 is_stmt 0 view .LVU1722 - 5483 0072 0797 str r7, [sp, #28] -1503:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 275 - - - 5484 .loc 1 1503 3 is_stmt 1 view .LVU1723 - 5485 0074 0DEB0701 add r1, sp, r7 - 5486 0078 3046 mov r0, r6 - 5487 007a FFF7FEFF bl LL_GPIO_Init - 5488 .LVL540: -1509:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 5489 .loc 1 1509 3 view .LVU1724 -1509:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 5490 .loc 1 1509 36 is_stmt 0 view .LVU1725 - 5491 007e 0894 str r4, [sp, #32] -1510:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 5492 .loc 1 1510 3 is_stmt 1 view .LVU1726 -1510:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 5493 .loc 1 1510 23 is_stmt 0 view .LVU1727 - 5494 0080 4FF48273 mov r3, #260 - 5495 0084 0993 str r3, [sp, #36] -1511:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 5496 .loc 1 1511 3 is_stmt 1 view .LVU1728 -1511:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 5497 .loc 1 1511 28 is_stmt 0 view .LVU1729 - 5498 0086 4FF47063 mov r3, #3840 - 5499 008a 0A93 str r3, [sp, #40] -1512:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 5500 .loc 1 1512 3 is_stmt 1 view .LVU1730 -1512:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 5501 .loc 1 1512 32 is_stmt 0 view .LVU1731 - 5502 008c 0B95 str r5, [sp, #44] -1513:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 5503 .loc 1 1513 3 is_stmt 1 view .LVU1732 -1513:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 5504 .loc 1 1513 29 is_stmt 0 view .LVU1733 - 5505 008e 0123 movs r3, #1 - 5506 0090 0C93 str r3, [sp, #48] -1514:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 5507 .loc 1 1514 3 is_stmt 1 view .LVU1734 -1514:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 5508 .loc 1 1514 22 is_stmt 0 view .LVU1735 - 5509 0092 4FF40073 mov r3, #512 - 5510 0096 0D93 str r3, [sp, #52] -1515:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 5511 .loc 1 1515 3 is_stmt 1 view .LVU1736 -1515:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 5512 .loc 1 1515 27 is_stmt 0 view .LVU1737 - 5513 0098 1823 movs r3, #24 - 5514 009a 0E93 str r3, [sp, #56] -1516:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 5515 .loc 1 1516 3 is_stmt 1 view .LVU1738 -1516:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 5516 .loc 1 1516 27 is_stmt 0 view .LVU1739 - 5517 009c 0F94 str r4, [sp, #60] -1517:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 5518 .loc 1 1517 3 is_stmt 1 view .LVU1740 -1517:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 5519 .loc 1 1517 33 is_stmt 0 view .LVU1741 - 5520 009e 1094 str r4, [sp, #64] -1518:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 5521 .loc 1 1518 3 is_stmt 1 view .LVU1742 - ARM GAS /tmp/ccuHnxNu.s page 276 - - -1518:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 5522 .loc 1 1518 26 is_stmt 0 view .LVU1743 - 5523 00a0 0723 movs r3, #7 - 5524 00a2 1193 str r3, [sp, #68] -1519:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); - 5525 .loc 1 1519 3 is_stmt 1 view .LVU1744 - 5526 00a4 094C ldr r4, .L310+8 - 5527 00a6 08A9 add r1, sp, #32 - 5528 00a8 2046 mov r0, r4 - 5529 00aa FFF7FEFF bl LL_SPI_Init - 5530 .LVL541: -1520:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); - 5531 .loc 1 1520 3 view .LVU1745 - 5532 .LBB506: - 5533 .LBI506: + 5324 .loc 1 1484 3 is_stmt 1 view .LVU1613 +1484:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5325 .loc 1 1484 27 is_stmt 0 view .LVU1614 + 5326 009e 0F94 str r4, [sp, #60] +1485:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5327 .loc 1 1485 3 is_stmt 1 view .LVU1615 +1485:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5328 .loc 1 1485 33 is_stmt 0 view .LVU1616 + 5329 00a0 1094 str r4, [sp, #64] +1486:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 5330 .loc 1 1486 3 is_stmt 1 view .LVU1617 +1486:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 5331 .loc 1 1486 26 is_stmt 0 view .LVU1618 + 5332 00a2 0723 movs r3, #7 + 5333 00a4 1193 str r3, [sp, #68] +1487:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); + 5334 .loc 1 1487 3 is_stmt 1 view .LVU1619 + 5335 00a6 0A4C ldr r4, .L348+8 + 5336 00a8 08A9 add r1, sp, #32 + 5337 00aa 2046 mov r0, r4 + 5338 00ac FFF7FEFF bl LL_SPI_Init + 5339 .LVL551: +1488:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); + 5340 .loc 1 1488 3 view .LVU1620 + 5341 .LBB487: + 5342 .LBI487: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5534 .loc 4 426 22 view .LVU1746 - 5535 .LBB507: + 5343 .loc 4 426 22 view .LVU1621 + 5344 .LBB488: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5536 .loc 4 428 3 view .LVU1747 - 5537 00ae 6368 ldr r3, [r4, #4] - 5538 00b0 23F01003 bic r3, r3, #16 - 5539 00b4 6360 str r3, [r4, #4] - 5540 .LVL542: + 5345 .loc 4 428 3 view .LVU1622 + 5346 00b0 6368 ldr r3, [r4, #4] + 5347 00b2 23F01003 bic r3, r3, #16 + 5348 00b6 6360 str r3, [r4, #4] + 5349 .LVL552: 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5541 .loc 4 428 3 is_stmt 0 view .LVU1748 - 5542 .LBE507: - 5543 .LBE506: -1521:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ - 5544 .loc 1 1521 3 is_stmt 1 view .LVU1749 - 5545 .LBB508: - 5546 .LBI508: + 5350 .loc 4 428 3 is_stmt 0 view .LVU1623 + 5351 .LBE488: + 5352 .LBE487: +1489:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ + 5353 .loc 1 1489 3 is_stmt 1 view .LVU1624 + 5354 .LBB489: + 5355 .LBI489: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 5547 .loc 4 874 22 view .LVU1750 - 5548 .LBB509: + 5356 .loc 4 874 22 view .LVU1625 + 5357 .LBB490: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5549 .loc 4 876 3 view .LVU1751 - 5550 00b6 6368 ldr r3, [r4, #4] - 5551 00b8 23F00803 bic r3, r3, #8 - 5552 00bc 6360 str r3, [r4, #4] - 5553 .LVL543: + 5358 .loc 4 876 3 view .LVU1626 + 5359 00b8 6368 ldr r3, [r4, #4] + 5360 00ba 23F00803 bic r3, r3, #8 + 5361 00be 6360 str r3, [r4, #4] + 5362 .LVL553: 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 5554 .loc 4 876 3 is_stmt 0 view .LVU1752 - 5555 .LBE509: - 5556 .LBE508: -1526:Src/main.c **** - 5557 .loc 1 1526 1 view .LVU1753 - 5558 00be 12B0 add sp, sp, #72 - 5559 .LCFI54: - 5560 .cfi_def_cfa_offset 24 - 5561 @ sp needed - 5562 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 5563 .L311: - 5564 .align 2 - 5565 .L310: - 5566 00c4 00380240 .word 1073887232 - 5567 00c8 00000240 .word 1073872896 - ARM GAS /tmp/ccuHnxNu.s page 277 + 5363 .loc 4 876 3 is_stmt 0 view .LVU1627 + 5364 .LBE490: + 5365 .LBE489: +1494:Src/main.c **** + ARM GAS /tmp/ccLSPxIe.s page 275 - 5568 00cc 00540140 .word 1073828864 - 5569 .cfi_endproc - 5570 .LFE1194: - 5572 .section .text.MX_TIM2_Init,"ax",%progbits - 5573 .align 1 - 5574 .syntax unified - 5575 .thumb - 5576 .thumb_func - 5578 MX_TIM2_Init: - 5579 .LFB1195: -1534:Src/main.c **** - 5580 .loc 1 1534 1 is_stmt 1 view -0 - 5581 .cfi_startproc - 5582 @ args = 0, pretend = 0, frame = 24 - 5583 @ frame_needed = 0, uses_anonymous_args = 0 - 5584 0000 10B5 push {r4, lr} - 5585 .LCFI55: - 5586 .cfi_def_cfa_offset 8 - 5587 .cfi_offset 4, -8 - 5588 .cfi_offset 14, -4 - 5589 0002 86B0 sub sp, sp, #24 - 5590 .LCFI56: - 5591 .cfi_def_cfa_offset 32 -1540:Src/main.c **** - 5592 .loc 1 1540 3 view .LVU1755 -1540:Src/main.c **** - 5593 .loc 1 1540 22 is_stmt 0 view .LVU1756 - 5594 0004 0024 movs r4, #0 - 5595 0006 0194 str r4, [sp, #4] - 5596 0008 0294 str r4, [sp, #8] - 5597 000a 0394 str r4, [sp, #12] - 5598 000c 0494 str r4, [sp, #16] - 5599 000e 0594 str r4, [sp, #20] -1543:Src/main.c **** - 5600 .loc 1 1543 3 is_stmt 1 view .LVU1757 - 5601 .LVL544: - 5602 .LBB510: - 5603 .LBI510: + 5366 .loc 1 1494 1 view .LVU1628 + 5367 00c0 12B0 add sp, sp, #72 + 5368 .LCFI48: + 5369 .cfi_def_cfa_offset 24 + 5370 @ sp needed + 5371 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 5372 .L349: + 5373 00c6 00BF .align 2 + 5374 .L348: + 5375 00c8 00380240 .word 1073887232 + 5376 00cc 00100240 .word 1073876992 + 5377 00d0 00340140 .word 1073820672 + 5378 .cfi_endproc + 5379 .LFE1192: + 5381 .section .text.MX_SPI2_Init,"ax",%progbits + 5382 .align 1 + 5383 .syntax unified + 5384 .thumb + 5385 .thumb_func + 5387 MX_SPI2_Init: + 5388 .LFB1191: +1367:Src/main.c **** + 5389 .loc 1 1367 1 is_stmt 1 view -0 + 5390 .cfi_startproc + 5391 @ args = 0, pretend = 0, frame = 72 + 5392 @ frame_needed = 0, uses_anonymous_args = 0 + 5393 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 5394 .LCFI49: + 5395 .cfi_def_cfa_offset 24 + 5396 .cfi_offset 4, -24 + 5397 .cfi_offset 5, -20 + 5398 .cfi_offset 6, -16 + 5399 .cfi_offset 7, -12 + 5400 .cfi_offset 8, -8 + 5401 .cfi_offset 14, -4 + 5402 0004 92B0 sub sp, sp, #72 + 5403 .LCFI50: + 5404 .cfi_def_cfa_offset 96 +1373:Src/main.c **** + 5405 .loc 1 1373 3 view .LVU1630 +1373:Src/main.c **** + 5406 .loc 1 1373 22 is_stmt 0 view .LVU1631 + 5407 0006 2822 movs r2, #40 + 5408 0008 0021 movs r1, #0 + 5409 000a 08A8 add r0, sp, #32 + 5410 000c FFF7FEFF bl memset + 5411 .LVL554: +1375:Src/main.c **** + 5412 .loc 1 1375 3 is_stmt 1 view .LVU1632 +1375:Src/main.c **** + 5413 .loc 1 1375 23 is_stmt 0 view .LVU1633 + 5414 0010 0024 movs r4, #0 + 5415 0012 0294 str r4, [sp, #8] + 5416 0014 0394 str r4, [sp, #12] + 5417 0016 0494 str r4, [sp, #16] + 5418 0018 0594 str r4, [sp, #20] + 5419 001a 0694 str r4, [sp, #24] + ARM GAS /tmp/ccLSPxIe.s page 276 + + + 5420 001c 0794 str r4, [sp, #28] +1378:Src/main.c **** + 5421 .loc 1 1378 3 is_stmt 1 view .LVU1634 + 5422 .LVL555: + 5423 .LBB491: + 5424 .LBI491: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5604 .loc 3 1071 22 view .LVU1758 - 5605 .LBB511: + 5425 .loc 3 1071 22 view .LVU1635 + 5426 .LBB492: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 5606 .loc 3 1073 3 view .LVU1759 + 5427 .loc 3 1073 3 view .LVU1636 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5607 .loc 3 1074 3 view .LVU1760 - 5608 0010 1D4B ldr r3, .L314 - 5609 0012 1A6C ldr r2, [r3, #64] - 5610 0014 42F00102 orr r2, r2, #1 - 5611 0018 1A64 str r2, [r3, #64] + 5428 .loc 3 1074 3 view .LVU1637 + 5429 001e 2F4B ldr r3, .L352 + 5430 0020 1A6C ldr r2, [r3, #64] + 5431 0022 42F48042 orr r2, r2, #16384 + 5432 0026 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5612 .loc 3 1076 3 view .LVU1761 + 5433 .loc 3 1076 3 view .LVU1638 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5613 .loc 3 1076 12 is_stmt 0 view .LVU1762 - 5614 001a 1B6C ldr r3, [r3, #64] - 5615 001c 03F00103 and r3, r3, #1 + 5434 .loc 3 1076 12 is_stmt 0 view .LVU1639 + 5435 0028 1A6C ldr r2, [r3, #64] + 5436 002a 02F48042 and r2, r2, #16384 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5616 .loc 3 1076 10 view .LVU1763 - ARM GAS /tmp/ccuHnxNu.s page 278 + 5437 .loc 3 1076 10 view .LVU1640 + 5438 002e 0192 str r2, [sp, #4] +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 5439 .loc 3 1077 3 is_stmt 1 view .LVU1641 + 5440 0030 019A ldr r2, [sp, #4] + 5441 .LVL556: +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 5442 .loc 3 1077 3 is_stmt 0 view .LVU1642 + 5443 .LBE492: + 5444 .LBE491: +1380:Src/main.c **** /**SPI2 GPIO Configuration + 5445 .loc 1 1380 3 is_stmt 1 view .LVU1643 + 5446 .LBB493: + 5447 .LBI493: + 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 5448 .loc 3 309 22 view .LVU1644 + 5449 .LBB494: + 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); + 5450 .loc 3 311 3 view .LVU1645 + 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 5451 .loc 3 312 3 view .LVU1646 + 5452 0032 1A6B ldr r2, [r3, #48] + 5453 0034 42F00202 orr r2, r2, #2 + 5454 0038 1A63 str r2, [r3, #48] + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5455 .loc 3 314 3 view .LVU1647 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5456 .loc 3 314 12 is_stmt 0 view .LVU1648 + 5457 003a 1B6B ldr r3, [r3, #48] + 5458 003c 03F00203 and r3, r3, #2 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5459 .loc 3 314 10 view .LVU1649 + 5460 0040 0093 str r3, [sp] + ARM GAS /tmp/ccLSPxIe.s page 277 - 5617 0020 0093 str r3, [sp] + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 5461 .loc 3 315 3 is_stmt 1 view .LVU1650 + 5462 0042 009B ldr r3, [sp] + 5463 .LVL557: + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 5464 .loc 3 315 3 is_stmt 0 view .LVU1651 + 5465 .LBE494: + 5466 .LBE493: +1386:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5467 .loc 1 1386 3 is_stmt 1 view .LVU1652 +1386:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5468 .loc 1 1386 23 is_stmt 0 view .LVU1653 + 5469 0044 4FF40053 mov r3, #8192 + 5470 0048 0293 str r3, [sp, #8] +1387:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5471 .loc 1 1387 3 is_stmt 1 view .LVU1654 +1387:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5472 .loc 1 1387 24 is_stmt 0 view .LVU1655 + 5473 004a 4FF00208 mov r8, #2 + 5474 004e CDF80C80 str r8, [sp, #12] +1388:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5475 .loc 1 1388 3 is_stmt 1 view .LVU1656 +1388:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5476 .loc 1 1388 25 is_stmt 0 view .LVU1657 + 5477 0052 0327 movs r7, #3 + 5478 0054 0497 str r7, [sp, #16] +1389:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5479 .loc 1 1389 3 is_stmt 1 view .LVU1658 +1390:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5480 .loc 1 1390 3 view .LVU1659 +1391:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 5481 .loc 1 1391 3 view .LVU1660 +1391:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 5482 .loc 1 1391 29 is_stmt 0 view .LVU1661 + 5483 0056 0526 movs r6, #5 + 5484 0058 0796 str r6, [sp, #28] +1392:Src/main.c **** + 5485 .loc 1 1392 3 is_stmt 1 view .LVU1662 + 5486 005a 214D ldr r5, .L352+4 + 5487 005c 02A9 add r1, sp, #8 + 5488 005e 2846 mov r0, r5 + 5489 0060 FFF7FEFF bl LL_GPIO_Init + 5490 .LVL558: +1394:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5491 .loc 1 1394 3 view .LVU1663 +1394:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5492 .loc 1 1394 23 is_stmt 0 view .LVU1664 + 5493 0064 4FF48043 mov r3, #16384 + 5494 0068 0293 str r3, [sp, #8] +1395:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5495 .loc 1 1395 3 is_stmt 1 view .LVU1665 +1395:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5496 .loc 1 1395 24 is_stmt 0 view .LVU1666 + 5497 006a CDF80C80 str r8, [sp, #12] +1396:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5498 .loc 1 1396 3 is_stmt 1 view .LVU1667 +1396:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + ARM GAS /tmp/ccLSPxIe.s page 278 + + + 5499 .loc 1 1396 25 is_stmt 0 view .LVU1668 + 5500 006e 0497 str r7, [sp, #16] +1397:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5501 .loc 1 1397 3 is_stmt 1 view .LVU1669 +1397:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5502 .loc 1 1397 30 is_stmt 0 view .LVU1670 + 5503 0070 0594 str r4, [sp, #20] +1398:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5504 .loc 1 1398 3 is_stmt 1 view .LVU1671 +1398:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5505 .loc 1 1398 24 is_stmt 0 view .LVU1672 + 5506 0072 0694 str r4, [sp, #24] +1399:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 5507 .loc 1 1399 3 is_stmt 1 view .LVU1673 +1399:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 5508 .loc 1 1399 29 is_stmt 0 view .LVU1674 + 5509 0074 0796 str r6, [sp, #28] +1400:Src/main.c **** + 5510 .loc 1 1400 3 is_stmt 1 view .LVU1675 + 5511 0076 02A9 add r1, sp, #8 + 5512 0078 2846 mov r0, r5 + 5513 007a FFF7FEFF bl LL_GPIO_Init + 5514 .LVL559: +1402:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5515 .loc 1 1402 3 view .LVU1676 +1402:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5516 .loc 1 1402 23 is_stmt 0 view .LVU1677 + 5517 007e 4FF40043 mov r3, #32768 + 5518 0082 0293 str r3, [sp, #8] +1403:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5519 .loc 1 1403 3 is_stmt 1 view .LVU1678 +1403:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5520 .loc 1 1403 24 is_stmt 0 view .LVU1679 + 5521 0084 CDF80C80 str r8, [sp, #12] +1404:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5522 .loc 1 1404 3 is_stmt 1 view .LVU1680 +1404:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5523 .loc 1 1404 25 is_stmt 0 view .LVU1681 + 5524 0088 0497 str r7, [sp, #16] +1405:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5525 .loc 1 1405 3 is_stmt 1 view .LVU1682 +1405:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5526 .loc 1 1405 30 is_stmt 0 view .LVU1683 + 5527 008a 0594 str r4, [sp, #20] +1406:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5528 .loc 1 1406 3 is_stmt 1 view .LVU1684 +1406:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5529 .loc 1 1406 24 is_stmt 0 view .LVU1685 + 5530 008c 0694 str r4, [sp, #24] +1407:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 5531 .loc 1 1407 3 is_stmt 1 view .LVU1686 +1407:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 5532 .loc 1 1407 29 is_stmt 0 view .LVU1687 + 5533 008e 0796 str r6, [sp, #28] +1408:Src/main.c **** + 5534 .loc 1 1408 3 is_stmt 1 view .LVU1688 + 5535 0090 02A9 add r1, sp, #8 + ARM GAS /tmp/ccLSPxIe.s page 279 + + + 5536 0092 2846 mov r0, r5 + 5537 0094 FFF7FEFF bl LL_GPIO_Init + 5538 .LVL560: +1414:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5539 .loc 1 1414 3 view .LVU1689 +1414:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5540 .loc 1 1414 36 is_stmt 0 view .LVU1690 + 5541 0098 0894 str r4, [sp, #32] +1415:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5542 .loc 1 1415 3 is_stmt 1 view .LVU1691 +1415:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5543 .loc 1 1415 23 is_stmt 0 view .LVU1692 + 5544 009a 4FF48273 mov r3, #260 + 5545 009e 0993 str r3, [sp, #36] +1416:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + 5546 .loc 1 1416 3 is_stmt 1 view .LVU1693 +1416:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + 5547 .loc 1 1416 28 is_stmt 0 view .LVU1694 + 5548 00a0 4FF47063 mov r3, #3840 + 5549 00a4 0A93 str r3, [sp, #40] +1417:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 5550 .loc 1 1417 3 is_stmt 1 view .LVU1695 +1417:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 5551 .loc 1 1417 32 is_stmt 0 view .LVU1696 + 5552 00a6 0B94 str r4, [sp, #44] +1418:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5553 .loc 1 1418 3 is_stmt 1 view .LVU1697 +1418:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5554 .loc 1 1418 29 is_stmt 0 view .LVU1698 + 5555 00a8 0C94 str r4, [sp, #48] +1419:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 5556 .loc 1 1419 3 is_stmt 1 view .LVU1699 +1419:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 5557 .loc 1 1419 22 is_stmt 0 view .LVU1700 + 5558 00aa 4FF40073 mov r3, #512 + 5559 00ae 0D93 str r3, [sp, #52] +1420:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5560 .loc 1 1420 3 is_stmt 1 view .LVU1701 +1420:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5561 .loc 1 1420 27 is_stmt 0 view .LVU1702 + 5562 00b0 1023 movs r3, #16 + 5563 00b2 0E93 str r3, [sp, #56] +1421:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5564 .loc 1 1421 3 is_stmt 1 view .LVU1703 +1421:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5565 .loc 1 1421 27 is_stmt 0 view .LVU1704 + 5566 00b4 0F94 str r4, [sp, #60] +1422:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5567 .loc 1 1422 3 is_stmt 1 view .LVU1705 +1422:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5568 .loc 1 1422 33 is_stmt 0 view .LVU1706 + 5569 00b6 1094 str r4, [sp, #64] +1423:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 5570 .loc 1 1423 3 is_stmt 1 view .LVU1707 +1423:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 5571 .loc 1 1423 26 is_stmt 0 view .LVU1708 + 5572 00b8 0723 movs r3, #7 + ARM GAS /tmp/ccLSPxIe.s page 280 + + + 5573 00ba 1193 str r3, [sp, #68] +1424:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); + 5574 .loc 1 1424 3 is_stmt 1 view .LVU1709 + 5575 00bc 094C ldr r4, .L352+8 + 5576 00be 08A9 add r1, sp, #32 + 5577 00c0 2046 mov r0, r4 + 5578 00c2 FFF7FEFF bl LL_SPI_Init + 5579 .LVL561: +1425:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); + 5580 .loc 1 1425 3 view .LVU1710 + 5581 .LBB495: + 5582 .LBI495: + 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 5583 .loc 4 426 22 view .LVU1711 + 5584 .LBB496: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 5585 .loc 4 428 3 view .LVU1712 + 5586 00c6 6368 ldr r3, [r4, #4] + 5587 00c8 23F01003 bic r3, r3, #16 + 5588 00cc 6360 str r3, [r4, #4] + 5589 .LVL562: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 5590 .loc 4 428 3 is_stmt 0 view .LVU1713 + 5591 .LBE496: + 5592 .LBE495: +1426:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ + 5593 .loc 1 1426 3 is_stmt 1 view .LVU1714 + 5594 .LBB497: + 5595 .LBI497: + 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 5596 .loc 4 874 22 view .LVU1715 + 5597 .LBB498: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 5598 .loc 4 876 3 view .LVU1716 + 5599 00ce 6368 ldr r3, [r4, #4] + 5600 00d0 23F00803 bic r3, r3, #8 + 5601 00d4 6360 str r3, [r4, #4] + 5602 .LVL563: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 5603 .loc 4 876 3 is_stmt 0 view .LVU1717 + 5604 .LBE498: + 5605 .LBE497: +1431:Src/main.c **** + 5606 .loc 1 1431 1 view .LVU1718 + 5607 00d6 12B0 add sp, sp, #72 + 5608 .LCFI51: + 5609 .cfi_def_cfa_offset 24 + 5610 @ sp needed + 5611 00d8 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 5612 .L353: + 5613 .align 2 + 5614 .L352: + 5615 00dc 00380240 .word 1073887232 + 5616 00e0 00040240 .word 1073873920 + 5617 00e4 00380040 .word 1073756160 + 5618 .cfi_endproc + 5619 .LFE1191: + ARM GAS /tmp/ccLSPxIe.s page 281 + + + 5621 .section .text.MX_SPI5_Init,"ax",%progbits + 5622 .align 1 + 5623 .syntax unified + 5624 .thumb + 5625 .thumb_func + 5627 MX_SPI5_Init: + 5628 .LFB1193: +1502:Src/main.c **** + 5629 .loc 1 1502 1 is_stmt 1 view -0 + 5630 .cfi_startproc + 5631 @ args = 0, pretend = 0, frame = 72 + 5632 @ frame_needed = 0, uses_anonymous_args = 0 + 5633 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 5634 .LCFI52: + 5635 .cfi_def_cfa_offset 24 + 5636 .cfi_offset 4, -24 + 5637 .cfi_offset 5, -20 + 5638 .cfi_offset 6, -16 + 5639 .cfi_offset 7, -12 + 5640 .cfi_offset 8, -8 + 5641 .cfi_offset 14, -4 + 5642 0004 92B0 sub sp, sp, #72 + 5643 .LCFI53: + 5644 .cfi_def_cfa_offset 96 +1508:Src/main.c **** + 5645 .loc 1 1508 3 view .LVU1720 +1508:Src/main.c **** + 5646 .loc 1 1508 22 is_stmt 0 view .LVU1721 + 5647 0006 2822 movs r2, #40 + 5648 0008 0021 movs r1, #0 + 5649 000a 08A8 add r0, sp, #32 + 5650 000c FFF7FEFF bl memset + 5651 .LVL564: +1510:Src/main.c **** + 5652 .loc 1 1510 3 is_stmt 1 view .LVU1722 +1510:Src/main.c **** + 5653 .loc 1 1510 23 is_stmt 0 view .LVU1723 + 5654 0010 0024 movs r4, #0 + 5655 0012 0294 str r4, [sp, #8] + 5656 0014 0394 str r4, [sp, #12] + 5657 0016 0494 str r4, [sp, #16] + 5658 0018 0594 str r4, [sp, #20] + 5659 001a 0694 str r4, [sp, #24] + 5660 001c 0794 str r4, [sp, #28] +1513:Src/main.c **** + 5661 .loc 1 1513 3 is_stmt 1 view .LVU1724 + 5662 .LVL565: + 5663 .LBB499: + 5664 .LBI499: +1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 5665 .loc 3 1587 22 view .LVU1725 + 5666 .LBB500: +1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); + 5667 .loc 3 1589 3 view .LVU1726 +1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 5668 .loc 3 1590 3 view .LVU1727 + 5669 001e 294B ldr r3, .L356 + ARM GAS /tmp/ccLSPxIe.s page 282 + + + 5670 0020 5A6C ldr r2, [r3, #68] + 5671 0022 42F48012 orr r2, r2, #1048576 + 5672 0026 5A64 str r2, [r3, #68] +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5673 .loc 3 1592 3 view .LVU1728 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5674 .loc 3 1592 12 is_stmt 0 view .LVU1729 + 5675 0028 5A6C ldr r2, [r3, #68] + 5676 002a 02F48012 and r2, r2, #1048576 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5677 .loc 3 1592 10 view .LVU1730 + 5678 002e 0192 str r2, [sp, #4] + 5679 .loc 3 1593 3 is_stmt 1 view .LVU1731 + 5680 0030 019A ldr r2, [sp, #4] + 5681 .LVL566: + 5682 .loc 3 1593 3 is_stmt 0 view .LVU1732 + 5683 .LBE500: + 5684 .LBE499: +1515:Src/main.c **** /**SPI5 GPIO Configuration + 5685 .loc 1 1515 3 is_stmt 1 view .LVU1733 + 5686 .LBB501: + 5687 .LBI501: + 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 5688 .loc 3 309 22 view .LVU1734 + 5689 .LBB502: + 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); + 5690 .loc 3 311 3 view .LVU1735 + 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 5691 .loc 3 312 3 view .LVU1736 + 5692 0032 1A6B ldr r2, [r3, #48] + 5693 0034 42F02002 orr r2, r2, #32 + 5694 0038 1A63 str r2, [r3, #48] + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5695 .loc 3 314 3 view .LVU1737 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5696 .loc 3 314 12 is_stmt 0 view .LVU1738 + 5697 003a 1B6B ldr r3, [r3, #48] + 5698 003c 03F02003 and r3, r3, #32 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5699 .loc 3 314 10 view .LVU1739 + 5700 0040 0093 str r3, [sp] + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 5701 .loc 3 315 3 is_stmt 1 view .LVU1740 + 5702 0042 009B ldr r3, [sp] + 5703 .LVL567: + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 5704 .loc 3 315 3 is_stmt 0 view .LVU1741 + 5705 .LBE502: + 5706 .LBE501: +1520:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5707 .loc 1 1520 3 is_stmt 1 view .LVU1742 +1520:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5708 .loc 1 1520 23 is_stmt 0 view .LVU1743 + 5709 0044 8023 movs r3, #128 + 5710 0046 0293 str r3, [sp, #8] +1521:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5711 .loc 1 1521 3 is_stmt 1 view .LVU1744 + ARM GAS /tmp/ccLSPxIe.s page 283 + + +1521:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5712 .loc 1 1521 24 is_stmt 0 view .LVU1745 + 5713 0048 0225 movs r5, #2 + 5714 004a 0395 str r5, [sp, #12] +1522:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5715 .loc 1 1522 3 is_stmt 1 view .LVU1746 +1522:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5716 .loc 1 1522 25 is_stmt 0 view .LVU1747 + 5717 004c 4FF00308 mov r8, #3 + 5718 0050 CDF81080 str r8, [sp, #16] +1523:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5719 .loc 1 1523 3 is_stmt 1 view .LVU1748 +1524:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5720 .loc 1 1524 3 view .LVU1749 +1525:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 5721 .loc 1 1525 3 view .LVU1750 +1525:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 5722 .loc 1 1525 29 is_stmt 0 view .LVU1751 + 5723 0054 0527 movs r7, #5 + 5724 0056 0797 str r7, [sp, #28] +1526:Src/main.c **** + 5725 .loc 1 1526 3 is_stmt 1 view .LVU1752 + 5726 0058 1B4E ldr r6, .L356+4 + 5727 005a 02A9 add r1, sp, #8 + 5728 005c 3046 mov r0, r6 + 5729 005e FFF7FEFF bl LL_GPIO_Init + 5730 .LVL568: +1528:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5731 .loc 1 1528 3 view .LVU1753 +1528:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5732 .loc 1 1528 23 is_stmt 0 view .LVU1754 + 5733 0062 4FF48073 mov r3, #256 + 5734 0066 0293 str r3, [sp, #8] +1529:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5735 .loc 1 1529 3 is_stmt 1 view .LVU1755 +1529:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5736 .loc 1 1529 24 is_stmt 0 view .LVU1756 + 5737 0068 0395 str r5, [sp, #12] +1530:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5738 .loc 1 1530 3 is_stmt 1 view .LVU1757 +1530:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5739 .loc 1 1530 25 is_stmt 0 view .LVU1758 + 5740 006a CDF81080 str r8, [sp, #16] +1531:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5741 .loc 1 1531 3 is_stmt 1 view .LVU1759 +1531:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5742 .loc 1 1531 30 is_stmt 0 view .LVU1760 + 5743 006e 0594 str r4, [sp, #20] +1532:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5744 .loc 1 1532 3 is_stmt 1 view .LVU1761 +1532:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 5745 .loc 1 1532 24 is_stmt 0 view .LVU1762 + 5746 0070 0694 str r4, [sp, #24] +1533:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 5747 .loc 1 1533 3 is_stmt 1 view .LVU1763 +1533:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 5748 .loc 1 1533 29 is_stmt 0 view .LVU1764 + ARM GAS /tmp/ccLSPxIe.s page 284 + + + 5749 0072 0797 str r7, [sp, #28] +1534:Src/main.c **** + 5750 .loc 1 1534 3 is_stmt 1 view .LVU1765 + 5751 0074 02A9 add r1, sp, #8 + 5752 0076 3046 mov r0, r6 + 5753 0078 FFF7FEFF bl LL_GPIO_Init + 5754 .LVL569: +1540:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5755 .loc 1 1540 3 view .LVU1766 +1540:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5756 .loc 1 1540 36 is_stmt 0 view .LVU1767 + 5757 007c 4FF48063 mov r3, #1024 + 5758 0080 0893 str r3, [sp, #32] +1541:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5759 .loc 1 1541 3 is_stmt 1 view .LVU1768 +1541:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5760 .loc 1 1541 23 is_stmt 0 view .LVU1769 + 5761 0082 4FF48273 mov r3, #260 + 5762 0086 0993 str r3, [sp, #36] +1542:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 5763 .loc 1 1542 3 is_stmt 1 view .LVU1770 +1542:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 5764 .loc 1 1542 28 is_stmt 0 view .LVU1771 + 5765 0088 4FF47063 mov r3, #3840 + 5766 008c 0A93 str r3, [sp, #40] +1543:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 5767 .loc 1 1543 3 is_stmt 1 view .LVU1772 +1543:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 5768 .loc 1 1543 32 is_stmt 0 view .LVU1773 + 5769 008e 0B95 str r5, [sp, #44] +1544:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5770 .loc 1 1544 3 is_stmt 1 view .LVU1774 +1544:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5771 .loc 1 1544 29 is_stmt 0 view .LVU1775 + 5772 0090 0C94 str r4, [sp, #48] +1545:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 5773 .loc 1 1545 3 is_stmt 1 view .LVU1776 +1545:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 5774 .loc 1 1545 22 is_stmt 0 view .LVU1777 + 5775 0092 4FF40073 mov r3, #512 + 5776 0096 0D93 str r3, [sp, #52] +1546:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5777 .loc 1 1546 3 is_stmt 1 view .LVU1778 +1546:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5778 .loc 1 1546 27 is_stmt 0 view .LVU1779 + 5779 0098 1823 movs r3, #24 + 5780 009a 0E93 str r3, [sp, #56] +1547:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5781 .loc 1 1547 3 is_stmt 1 view .LVU1780 +1547:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5782 .loc 1 1547 27 is_stmt 0 view .LVU1781 + 5783 009c 0F94 str r4, [sp, #60] +1548:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5784 .loc 1 1548 3 is_stmt 1 view .LVU1782 +1548:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 5785 .loc 1 1548 33 is_stmt 0 view .LVU1783 + 5786 009e 1094 str r4, [sp, #64] + ARM GAS /tmp/ccLSPxIe.s page 285 + + +1549:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 5787 .loc 1 1549 3 is_stmt 1 view .LVU1784 +1549:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 5788 .loc 1 1549 26 is_stmt 0 view .LVU1785 + 5789 00a0 0723 movs r3, #7 + 5790 00a2 1193 str r3, [sp, #68] +1550:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); + 5791 .loc 1 1550 3 is_stmt 1 view .LVU1786 + 5792 00a4 094C ldr r4, .L356+8 + 5793 00a6 08A9 add r1, sp, #32 + 5794 00a8 2046 mov r0, r4 + 5795 00aa FFF7FEFF bl LL_SPI_Init + 5796 .LVL570: +1551:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); + 5797 .loc 1 1551 3 view .LVU1787 + 5798 .LBB503: + 5799 .LBI503: + 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 5800 .loc 4 426 22 view .LVU1788 + 5801 .LBB504: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 5802 .loc 4 428 3 view .LVU1789 + 5803 00ae 6368 ldr r3, [r4, #4] + 5804 00b0 23F01003 bic r3, r3, #16 + 5805 00b4 6360 str r3, [r4, #4] + 5806 .LVL571: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 5807 .loc 4 428 3 is_stmt 0 view .LVU1790 + 5808 .LBE504: + 5809 .LBE503: +1552:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ + 5810 .loc 1 1552 3 is_stmt 1 view .LVU1791 + 5811 .LBB505: + 5812 .LBI505: + 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 5813 .loc 4 874 22 view .LVU1792 + 5814 .LBB506: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 5815 .loc 4 876 3 view .LVU1793 + 5816 00b6 6368 ldr r3, [r4, #4] + 5817 00b8 23F00803 bic r3, r3, #8 + 5818 00bc 6360 str r3, [r4, #4] + 5819 .LVL572: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 5820 .loc 4 876 3 is_stmt 0 view .LVU1794 + 5821 .LBE506: + 5822 .LBE505: +1557:Src/main.c **** + 5823 .loc 1 1557 1 view .LVU1795 + 5824 00be 12B0 add sp, sp, #72 + 5825 .LCFI54: + 5826 .cfi_def_cfa_offset 24 + 5827 @ sp needed + 5828 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 5829 .L357: + 5830 .align 2 + 5831 .L356: + ARM GAS /tmp/ccLSPxIe.s page 286 + + + 5832 00c4 00380240 .word 1073887232 + 5833 00c8 00140240 .word 1073878016 + 5834 00cc 00500140 .word 1073827840 + 5835 .cfi_endproc + 5836 .LFE1193: + 5838 .section .text.MX_SPI6_Init,"ax",%progbits + 5839 .align 1 + 5840 .syntax unified + 5841 .thumb + 5842 .thumb_func + 5844 MX_SPI6_Init: + 5845 .LFB1194: +1565:Src/main.c **** + 5846 .loc 1 1565 1 is_stmt 1 view -0 + 5847 .cfi_startproc + 5848 @ args = 0, pretend = 0, frame = 72 + 5849 @ frame_needed = 0, uses_anonymous_args = 0 + 5850 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 5851 .LCFI55: + 5852 .cfi_def_cfa_offset 24 + 5853 .cfi_offset 4, -24 + 5854 .cfi_offset 5, -20 + 5855 .cfi_offset 6, -16 + 5856 .cfi_offset 7, -12 + 5857 .cfi_offset 8, -8 + 5858 .cfi_offset 14, -4 + 5859 0004 92B0 sub sp, sp, #72 + 5860 .LCFI56: + 5861 .cfi_def_cfa_offset 96 +1571:Src/main.c **** + 5862 .loc 1 1571 3 view .LVU1797 +1571:Src/main.c **** + 5863 .loc 1 1571 22 is_stmt 0 view .LVU1798 + 5864 0006 2822 movs r2, #40 + 5865 0008 0021 movs r1, #0 + 5866 000a 08A8 add r0, sp, #32 + 5867 000c FFF7FEFF bl memset + 5868 .LVL573: +1573:Src/main.c **** + 5869 .loc 1 1573 3 is_stmt 1 view .LVU1799 +1573:Src/main.c **** + 5870 .loc 1 1573 23 is_stmt 0 view .LVU1800 + 5871 0010 0024 movs r4, #0 + 5872 0012 0294 str r4, [sp, #8] + 5873 0014 0394 str r4, [sp, #12] + 5874 0016 0494 str r4, [sp, #16] + 5875 0018 0594 str r4, [sp, #20] + 5876 001a 0694 str r4, [sp, #24] + 5877 001c 0794 str r4, [sp, #28] +1576:Src/main.c **** + 5878 .loc 1 1576 3 is_stmt 1 view .LVU1801 + 5879 .LVL574: + 5880 .LBB507: + 5881 .LBI507: +1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 5882 .loc 3 1587 22 view .LVU1802 + 5883 .LBB508: + ARM GAS /tmp/ccLSPxIe.s page 287 + + +1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); + 5884 .loc 3 1589 3 view .LVU1803 +1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 5885 .loc 3 1590 3 view .LVU1804 + 5886 001e 294B ldr r3, .L360 + 5887 0020 5A6C ldr r2, [r3, #68] + 5888 0022 42F40012 orr r2, r2, #2097152 + 5889 0026 5A64 str r2, [r3, #68] +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5890 .loc 3 1592 3 view .LVU1805 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5891 .loc 3 1592 12 is_stmt 0 view .LVU1806 + 5892 0028 5A6C ldr r2, [r3, #68] + 5893 002a 02F40012 and r2, r2, #2097152 +1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5894 .loc 3 1592 10 view .LVU1807 + 5895 002e 0192 str r2, [sp, #4] + 5896 .loc 3 1593 3 is_stmt 1 view .LVU1808 + 5897 0030 019A ldr r2, [sp, #4] + 5898 .LVL575: + 5899 .loc 3 1593 3 is_stmt 0 view .LVU1809 + 5900 .LBE508: + 5901 .LBE507: +1578:Src/main.c **** /**SPI6 GPIO Configuration + 5902 .loc 1 1578 3 is_stmt 1 view .LVU1810 + 5903 .LBB509: + 5904 .LBI509: + 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 5905 .loc 3 309 22 view .LVU1811 + 5906 .LBB510: + 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); + 5907 .loc 3 311 3 view .LVU1812 + 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 5908 .loc 3 312 3 view .LVU1813 + 5909 0032 1A6B ldr r2, [r3, #48] + 5910 0034 42F00102 orr r2, r2, #1 + 5911 0038 1A63 str r2, [r3, #48] + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5912 .loc 3 314 3 view .LVU1814 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5913 .loc 3 314 12 is_stmt 0 view .LVU1815 + 5914 003a 1B6B ldr r3, [r3, #48] + 5915 003c 03F00103 and r3, r3, #1 + 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 5916 .loc 3 314 10 view .LVU1816 + 5917 0040 0093 str r3, [sp] + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 5918 .loc 3 315 3 is_stmt 1 view .LVU1817 + 5919 0042 009B ldr r3, [sp] + 5920 .LVL576: + 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 5921 .loc 3 315 3 is_stmt 0 view .LVU1818 + 5922 .LBE510: + 5923 .LBE509: +1583:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5924 .loc 1 1583 3 is_stmt 1 view .LVU1819 +1583:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + ARM GAS /tmp/ccLSPxIe.s page 288 + + + 5925 .loc 1 1583 23 is_stmt 0 view .LVU1820 + 5926 0044 2023 movs r3, #32 + 5927 0046 0293 str r3, [sp, #8] +1584:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5928 .loc 1 1584 3 is_stmt 1 view .LVU1821 +1584:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5929 .loc 1 1584 24 is_stmt 0 view .LVU1822 + 5930 0048 0225 movs r5, #2 + 5931 004a 0395 str r5, [sp, #12] +1585:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5932 .loc 1 1585 3 is_stmt 1 view .LVU1823 +1585:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5933 .loc 1 1585 25 is_stmt 0 view .LVU1824 + 5934 004c 4FF00308 mov r8, #3 + 5935 0050 CDF81080 str r8, [sp, #16] +1586:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5936 .loc 1 1586 3 is_stmt 1 view .LVU1825 +1587:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 5937 .loc 1 1587 3 view .LVU1826 +1588:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 5938 .loc 1 1588 3 view .LVU1827 +1588:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 5939 .loc 1 1588 29 is_stmt 0 view .LVU1828 + 5940 0054 0827 movs r7, #8 + 5941 0056 0797 str r7, [sp, #28] +1589:Src/main.c **** + 5942 .loc 1 1589 3 is_stmt 1 view .LVU1829 + 5943 0058 1B4E ldr r6, .L360+4 + 5944 005a 0DEB0701 add r1, sp, r7 + 5945 005e 3046 mov r0, r6 + 5946 0060 FFF7FEFF bl LL_GPIO_Init + 5947 .LVL577: +1591:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5948 .loc 1 1591 3 view .LVU1830 +1591:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 5949 .loc 1 1591 23 is_stmt 0 view .LVU1831 + 5950 0064 8023 movs r3, #128 + 5951 0066 0293 str r3, [sp, #8] +1592:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5952 .loc 1 1592 3 is_stmt 1 view .LVU1832 +1592:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 5953 .loc 1 1592 24 is_stmt 0 view .LVU1833 + 5954 0068 0395 str r5, [sp, #12] +1593:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5955 .loc 1 1593 3 is_stmt 1 view .LVU1834 +1593:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 5956 .loc 1 1593 25 is_stmt 0 view .LVU1835 + 5957 006a CDF81080 str r8, [sp, #16] +1594:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5958 .loc 1 1594 3 is_stmt 1 view .LVU1836 +1594:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 5959 .loc 1 1594 30 is_stmt 0 view .LVU1837 + 5960 006e 0594 str r4, [sp, #20] +1595:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 5961 .loc 1 1595 3 is_stmt 1 view .LVU1838 +1595:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 5962 .loc 1 1595 24 is_stmt 0 view .LVU1839 + ARM GAS /tmp/ccLSPxIe.s page 289 + + + 5963 0070 0694 str r4, [sp, #24] +1596:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 5964 .loc 1 1596 3 is_stmt 1 view .LVU1840 +1596:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 5965 .loc 1 1596 29 is_stmt 0 view .LVU1841 + 5966 0072 0797 str r7, [sp, #28] +1597:Src/main.c **** + 5967 .loc 1 1597 3 is_stmt 1 view .LVU1842 + 5968 0074 0DEB0701 add r1, sp, r7 + 5969 0078 3046 mov r0, r6 + 5970 007a FFF7FEFF bl LL_GPIO_Init + 5971 .LVL578: +1603:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5972 .loc 1 1603 3 view .LVU1843 +1603:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 5973 .loc 1 1603 36 is_stmt 0 view .LVU1844 + 5974 007e 0894 str r4, [sp, #32] +1604:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5975 .loc 1 1604 3 is_stmt 1 view .LVU1845 +1604:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 5976 .loc 1 1604 23 is_stmt 0 view .LVU1846 + 5977 0080 4FF48273 mov r3, #260 + 5978 0084 0993 str r3, [sp, #36] +1605:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 5979 .loc 1 1605 3 is_stmt 1 view .LVU1847 +1605:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 5980 .loc 1 1605 28 is_stmt 0 view .LVU1848 + 5981 0086 4FF47063 mov r3, #3840 + 5982 008a 0A93 str r3, [sp, #40] +1606:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 5983 .loc 1 1606 3 is_stmt 1 view .LVU1849 +1606:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 5984 .loc 1 1606 32 is_stmt 0 view .LVU1850 + 5985 008c 0B95 str r5, [sp, #44] +1607:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5986 .loc 1 1607 3 is_stmt 1 view .LVU1851 +1607:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 5987 .loc 1 1607 29 is_stmt 0 view .LVU1852 + 5988 008e 0123 movs r3, #1 + 5989 0090 0C93 str r3, [sp, #48] +1608:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 5990 .loc 1 1608 3 is_stmt 1 view .LVU1853 +1608:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 5991 .loc 1 1608 22 is_stmt 0 view .LVU1854 + 5992 0092 4FF40073 mov r3, #512 + 5993 0096 0D93 str r3, [sp, #52] +1609:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5994 .loc 1 1609 3 is_stmt 1 view .LVU1855 +1609:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 5995 .loc 1 1609 27 is_stmt 0 view .LVU1856 + 5996 0098 1823 movs r3, #24 + 5997 009a 0E93 str r3, [sp, #56] +1610:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5998 .loc 1 1610 3 is_stmt 1 view .LVU1857 +1610:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 5999 .loc 1 1610 27 is_stmt 0 view .LVU1858 + 6000 009c 0F94 str r4, [sp, #60] + ARM GAS /tmp/ccLSPxIe.s page 290 + + +1611:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 6001 .loc 1 1611 3 is_stmt 1 view .LVU1859 +1611:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 6002 .loc 1 1611 33 is_stmt 0 view .LVU1860 + 6003 009e 1094 str r4, [sp, #64] +1612:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 6004 .loc 1 1612 3 is_stmt 1 view .LVU1861 +1612:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 6005 .loc 1 1612 26 is_stmt 0 view .LVU1862 + 6006 00a0 0723 movs r3, #7 + 6007 00a2 1193 str r3, [sp, #68] +1613:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); + 6008 .loc 1 1613 3 is_stmt 1 view .LVU1863 + 6009 00a4 094C ldr r4, .L360+8 + 6010 00a6 08A9 add r1, sp, #32 + 6011 00a8 2046 mov r0, r4 + 6012 00aa FFF7FEFF bl LL_SPI_Init + 6013 .LVL579: +1614:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); + 6014 .loc 1 1614 3 view .LVU1864 + 6015 .LBB511: + 6016 .LBI511: + 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 6017 .loc 4 426 22 view .LVU1865 + 6018 .LBB512: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6019 .loc 4 428 3 view .LVU1866 + 6020 00ae 6368 ldr r3, [r4, #4] + 6021 00b0 23F01003 bic r3, r3, #16 + 6022 00b4 6360 str r3, [r4, #4] + 6023 .LVL580: + 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6024 .loc 4 428 3 is_stmt 0 view .LVU1867 + 6025 .LBE512: + 6026 .LBE511: +1615:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ + 6027 .loc 1 1615 3 is_stmt 1 view .LVU1868 + 6028 .LBB513: + 6029 .LBI513: + 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 6030 .loc 4 874 22 view .LVU1869 + 6031 .LBB514: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6032 .loc 4 876 3 view .LVU1870 + 6033 00b6 6368 ldr r3, [r4, #4] + 6034 00b8 23F00803 bic r3, r3, #8 + 6035 00bc 6360 str r3, [r4, #4] + 6036 .LVL581: + 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 6037 .loc 4 876 3 is_stmt 0 view .LVU1871 + 6038 .LBE514: + 6039 .LBE513: +1620:Src/main.c **** + 6040 .loc 1 1620 1 view .LVU1872 + 6041 00be 12B0 add sp, sp, #72 + 6042 .LCFI57: + 6043 .cfi_def_cfa_offset 24 + ARM GAS /tmp/ccLSPxIe.s page 291 + + + 6044 @ sp needed + 6045 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 6046 .L361: + 6047 .align 2 + 6048 .L360: + 6049 00c4 00380240 .word 1073887232 + 6050 00c8 00000240 .word 1073872896 + 6051 00cc 00540140 .word 1073828864 + 6052 .cfi_endproc + 6053 .LFE1194: + 6055 .section .text.MX_TIM2_Init,"ax",%progbits + 6056 .align 1 + 6057 .syntax unified + 6058 .thumb + 6059 .thumb_func + 6061 MX_TIM2_Init: + 6062 .LFB1195: +1628:Src/main.c **** + 6063 .loc 1 1628 1 is_stmt 1 view -0 + 6064 .cfi_startproc + 6065 @ args = 0, pretend = 0, frame = 24 + 6066 @ frame_needed = 0, uses_anonymous_args = 0 + 6067 0000 10B5 push {r4, lr} + 6068 .LCFI58: + 6069 .cfi_def_cfa_offset 8 + 6070 .cfi_offset 4, -8 + 6071 .cfi_offset 14, -4 + 6072 0002 86B0 sub sp, sp, #24 + 6073 .LCFI59: + 6074 .cfi_def_cfa_offset 32 +1634:Src/main.c **** + 6075 .loc 1 1634 3 view .LVU1874 +1634:Src/main.c **** + 6076 .loc 1 1634 22 is_stmt 0 view .LVU1875 + 6077 0004 0024 movs r4, #0 + 6078 0006 0194 str r4, [sp, #4] + 6079 0008 0294 str r4, [sp, #8] + 6080 000a 0394 str r4, [sp, #12] + 6081 000c 0494 str r4, [sp, #16] + 6082 000e 0594 str r4, [sp, #20] +1637:Src/main.c **** + 6083 .loc 1 1637 3 is_stmt 1 view .LVU1876 + 6084 .LVL582: + 6085 .LBB515: + 6086 .LBI515: +1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { + 6087 .loc 3 1071 22 view .LVU1877 + 6088 .LBB516: +1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); + 6089 .loc 3 1073 3 view .LVU1878 +1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ + 6090 .loc 3 1074 3 view .LVU1879 + 6091 0010 1D4B ldr r3, .L364 + 6092 0012 1A6C ldr r2, [r3, #64] + 6093 0014 42F00102 orr r2, r2, #1 + 6094 0018 1A64 str r2, [r3, #64] +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + ARM GAS /tmp/ccLSPxIe.s page 292 + + + 6095 .loc 3 1076 3 view .LVU1880 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 6096 .loc 3 1076 12 is_stmt 0 view .LVU1881 + 6097 001a 1B6C ldr r3, [r3, #64] + 6098 001c 03F00103 and r3, r3, #1 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 6099 .loc 3 1076 10 view .LVU1882 + 6100 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5618 .loc 3 1077 3 is_stmt 1 view .LVU1764 - 5619 0022 009B ldr r3, [sp] - 5620 .LVL545: + 6101 .loc 3 1077 3 is_stmt 1 view .LVU1883 + 6102 0022 009B ldr r3, [sp] + 6103 .LVL583: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5621 .loc 3 1077 3 is_stmt 0 view .LVU1765 - 5622 .LBE511: - 5623 .LBE510: -1546:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 5624 .loc 1 1546 3 is_stmt 1 view .LVU1766 - 5625 .LBB512: - 5626 .LBI512: + 6104 .loc 3 1077 3 is_stmt 0 view .LVU1884 + 6105 .LBE516: + 6106 .LBE515: +1640:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 6107 .loc 1 1640 3 is_stmt 1 view .LVU1885 + 6108 .LBB517: + 6109 .LBI517: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 5627 .loc 2 1884 26 view .LVU1767 - 5628 .LBB513: + 6110 .loc 2 1884 26 view .LVU1886 + 6111 .LBB518: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 5629 .loc 2 1886 3 view .LVU1768 + 6112 .loc 2 1886 3 view .LVU1887 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 5630 .loc 2 1886 26 is_stmt 0 view .LVU1769 - 5631 0024 194B ldr r3, .L314+4 - 5632 0026 D868 ldr r0, [r3, #12] - 5633 .LBE513: - 5634 .LBE512: -1546:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 5635 .loc 1 1546 3 discriminator 1 view .LVU1770 - 5636 0028 2246 mov r2, r4 - 5637 002a 2146 mov r1, r4 - 5638 002c C0F30220 ubfx r0, r0, #8, #3 - 5639 0030 FFF7FEFF bl NVIC_EncodePriority - 5640 .LVL546: - 5641 .LBB514: - 5642 .LBI514: + 6113 .loc 2 1886 26 is_stmt 0 view .LVU1888 + 6114 0024 194B ldr r3, .L364+4 + 6115 0026 D868 ldr r0, [r3, #12] + 6116 .LBE518: + 6117 .LBE517: +1640:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 6118 .loc 1 1640 3 discriminator 1 view .LVU1889 + 6119 0028 2246 mov r2, r4 + 6120 002a 2146 mov r1, r4 + 6121 002c C0F30220 ubfx r0, r0, #8, #3 + 6122 0030 FFF7FEFF bl NVIC_EncodePriority + 6123 .LVL584: + 6124 .LBB519: + 6125 .LBI519: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 5643 .loc 2 2024 22 is_stmt 1 view .LVU1771 - 5644 .LBB515: + 6126 .loc 2 2024 22 is_stmt 1 view .LVU1890 + 6127 .LBB520: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 5645 .loc 2 2026 3 view .LVU1772 + 6128 .loc 2 2026 3 view .LVU1891 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5646 .loc 2 2028 5 view .LVU1773 + 6129 .loc 2 2028 5 view .LVU1892 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5647 .loc 2 2028 49 is_stmt 0 view .LVU1774 - 5648 0034 0001 lsls r0, r0, #4 - 5649 .LVL547: + 6130 .loc 2 2028 49 is_stmt 0 view .LVU1893 + 6131 0034 0001 lsls r0, r0, #4 + 6132 .LVL585: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5650 .loc 2 2028 49 view .LVU1775 - 5651 0036 C0B2 uxtb r0, r0 + 6133 .loc 2 2028 49 view .LVU1894 + 6134 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5652 .loc 2 2028 47 view .LVU1776 - 5653 0038 154B ldr r3, .L314+8 - 5654 003a 83F81C03 strb r0, [r3, #796] - 5655 .LVL548: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5656 .loc 2 2028 47 view .LVU1777 - 5657 .LBE515: - 5658 .LBE514: -1547:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 279 + 6135 .loc 2 2028 47 view .LVU1895 + 6136 0038 154B ldr r3, .L364+8 + ARM GAS /tmp/ccLSPxIe.s page 293 - 5659 .loc 1 1547 3 is_stmt 1 view .LVU1778 - 5660 .LBB516: - 5661 .LBI516: + 6137 003a 83F81C03 strb r0, [r3, #796] + 6138 .LVL586: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 6139 .loc 2 2028 47 view .LVU1896 + 6140 .LBE520: + 6141 .LBE519: +1641:Src/main.c **** + 6142 .loc 1 1641 3 is_stmt 1 view .LVU1897 + 6143 .LBB521: + 6144 .LBI521: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 5662 .loc 2 1896 22 view .LVU1779 - 5663 .LBB517: + 6145 .loc 2 1896 22 view .LVU1898 + 6146 .LBB522: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 5664 .loc 2 1898 3 view .LVU1780 + 6147 .loc 2 1898 3 view .LVU1899 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5665 .loc 2 1900 5 view .LVU1781 + 6148 .loc 2 1900 5 view .LVU1900 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5666 .loc 2 1900 43 is_stmt 0 view .LVU1782 - 5667 003e 4FF08052 mov r2, #268435456 - 5668 0042 1A60 str r2, [r3] - 5669 .LVL549: + 6149 .loc 2 1900 43 is_stmt 0 view .LVU1901 + 6150 003e 4FF08052 mov r2, #268435456 + 6151 0042 1A60 str r2, [r3] + 6152 .LVL587: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5670 .loc 2 1900 43 view .LVU1783 - 5671 .LBE517: - 5672 .LBE516: -1552:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 5673 .loc 1 1552 3 is_stmt 1 view .LVU1784 -1552:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 5674 .loc 1 1552 28 is_stmt 0 view .LVU1785 - 5675 0044 4FF47A73 mov r3, #1000 - 5676 0048 ADF80430 strh r3, [sp, #4] @ movhi -1553:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 5677 .loc 1 1553 3 is_stmt 1 view .LVU1786 -1553:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 5678 .loc 1 1553 30 is_stmt 0 view .LVU1787 - 5679 004c 0294 str r4, [sp, #8] -1554:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 5680 .loc 1 1554 3 is_stmt 1 view .LVU1788 -1554:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 5681 .loc 1 1554 29 is_stmt 0 view .LVU1789 - 5682 004e 114B ldr r3, .L314+12 - 5683 0050 0393 str r3, [sp, #12] -1555:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 5684 .loc 1 1555 3 is_stmt 1 view .LVU1790 -1555:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 5685 .loc 1 1555 32 is_stmt 0 view .LVU1791 - 5686 0052 0494 str r4, [sp, #16] -1556:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); - 5687 .loc 1 1556 3 is_stmt 1 view .LVU1792 - 5688 0054 01A9 add r1, sp, #4 - 5689 0056 4FF08040 mov r0, #1073741824 - 5690 005a FFF7FEFF bl LL_TIM_Init - 5691 .LVL550: -1557:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); - 5692 .loc 1 1557 3 view .LVU1793 - 5693 .LBB518: - 5694 .LBI518: - 5695 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" + 6153 .loc 2 1900 43 view .LVU1902 + 6154 .LBE522: + 6155 .LBE521: +1646:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6156 .loc 1 1646 3 is_stmt 1 view .LVU1903 +1646:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6157 .loc 1 1646 28 is_stmt 0 view .LVU1904 + 6158 0044 4FF47A73 mov r3, #1000 + 6159 0048 ADF80430 strh r3, [sp, #4] @ movhi +1647:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 6160 .loc 1 1647 3 is_stmt 1 view .LVU1905 +1647:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 6161 .loc 1 1647 30 is_stmt 0 view .LVU1906 + 6162 004c 0294 str r4, [sp, #8] +1648:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 6163 .loc 1 1648 3 is_stmt 1 view .LVU1907 +1648:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 6164 .loc 1 1648 29 is_stmt 0 view .LVU1908 + 6165 004e 114B ldr r3, .L364+12 + 6166 0050 0393 str r3, [sp, #12] +1649:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 6167 .loc 1 1649 3 is_stmt 1 view .LVU1909 +1649:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 6168 .loc 1 1649 32 is_stmt 0 view .LVU1910 + 6169 0052 0494 str r4, [sp, #16] +1650:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); + 6170 .loc 1 1650 3 is_stmt 1 view .LVU1911 + 6171 0054 01A9 add r1, sp, #4 + 6172 0056 4FF08040 mov r0, #1073741824 + 6173 005a FFF7FEFF bl LL_TIM_Init + 6174 .LVL588: +1651:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); + 6175 .loc 1 1651 3 view .LVU1912 + 6176 .LBB523: + ARM GAS /tmp/ccLSPxIe.s page 294 + + + 6177 .LBI523: + 6178 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @file stm32f7xx_ll_tim.h 4:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @author MCD Application Team 5:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Header file of TIM LL module. - ARM GAS /tmp/ccuHnxNu.s page 280 - - 6:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ****************************************************************************** 7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @attention 8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @@ -16791,6 +17638,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 6: TIMx_CH4 */ 54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU, /* 7: TIMx_CH5 */ 55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU /* 8: TIMx_CH6 */ + ARM GAS /tmp/ccLSPxIe.s page 295 + + 56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }; 57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OCxx[] = @@ -16798,9 +17648,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 60:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: OC1M, OC1FE, OC1PE */ 61:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 1: - NA */ 62:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 2: OC2M, OC2FE, OC2PE */ - ARM GAS /tmp/ccuHnxNu.s page 281 - - 63:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 3: - NA */ 64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 4: OC3M, OC3FE, OC3PE */ 65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 5: - NA */ @@ -16851,6 +17698,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccLSPxIe.s page 296 + + 113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private constants ---------------------------------------------------------*/ 114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Constants TIM Private Constants 115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -16858,9 +17708,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT) 119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Defines used for the bit position in the register and perform offsets */ - ARM GAS /tmp/ccuHnxNu.s page 282 - - 120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_POSITION_BRK_SOURCE (POSITION_VAL(Source) & 0x1FUL) 121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Generic bit definitions for TIMx_AF1 register */ @@ -16911,6 +17758,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \ 168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\ 169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\ + ARM GAS /tmp/ccLSPxIe.s page 297 + + 170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\ 171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\ 172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\ @@ -16918,9 +17768,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH4) ? 6U :\ 175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH5) ? 7U : 8U) 176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccuHnxNu.s page 283 - - 177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @brief Calculate the deadtime sampling period(in ps). 178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz). 179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CKD__ This parameter can be one of the following values: @@ -16971,6 +17818,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetAutoReload().*/ 225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ClockDivision; /*!< Specifies the clock division. + ARM GAS /tmp/ccLSPxIe.s page 298 + + 227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION. 228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function @@ -16978,9 +17828,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downc 233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** reaches zero, an update event is generated and counting restarts - ARM GAS /tmp/ccuHnxNu.s page 284 - - 234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** from the RCR value (N). 235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This means in PWM mode that (N+1) corresponds to: 236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - the number of PWM periods in edge-aligned mode @@ -17031,6 +17878,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. 283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. + ARM GAS /tmp/ccLSPxIe.s page 299 + + 284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetPolarity().*/ @@ -17038,9 +17888,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. 290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. - ARM GAS /tmp/ccuHnxNu.s page 285 - - 291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetIdleState().*/ @@ -17091,6 +17938,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4). + ARM GAS /tmp/ccLSPxIe.s page 300 + + 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE. 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function @@ -17098,9 +17948,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. 347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. - ARM GAS /tmp/ccuHnxNu.s page 286 - - 348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ @@ -17151,6 +17998,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Hall sensor interface configuration structure definition. + ARM GAS /tmp/ccLSPxIe.s page 301 + + 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct 400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17158,9 +18008,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccuHnxNu.s page 287 - - 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -17211,6 +18058,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field cannot be modified as long as LOCK level 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccLSPxIe.s page 302 + + 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t LockLevel; /*!< Specifies the LOCK level parameters. 456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -17218,9 +18068,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** register has been written, their content is frozen until the 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the - ARM GAS /tmp/ccuHnxNu.s page 288 - - 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** switching-on of the outputs. 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data = 0x00 and Ma 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -17271,6 +18118,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK2() + ARM GAS /tmp/ccLSPxIe.s page 303 + + 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve 514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ @@ -17278,9 +18128,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2Filter; /*!< Specifies the TIM Break2 Filter. 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_FILTER 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccuHnxNu.s page 289 - - 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK2() 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -17331,6 +18178,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccLSPxIe.s page 304 + + 569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER) 570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_ENABLE Break Enable 571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -17338,9 +18188,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_DISABLE 0x00000000U /*!< Break function disabled */ 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break function enabled */ 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 290 - - 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -17391,6 +18238,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 305 + + 626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at 627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at 628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -17398,9 +18248,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode - ARM GAS /tmp/ccuHnxNu.s page 291 - - 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_UP 0x00000000U /*!< Counter used as upcounter @@ -17451,6 +18298,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_LOCKLEVEL Lock Level 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ + ARM GAS /tmp/ccLSPxIe.s page 306 + + 683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_OFF 0x00000000U /*!< LOCK OFF - No bit is write 685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_1 TIM_BDTR_LOCK_0 /*!< LOCK Level 1 */ @@ -17458,9 +18308,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_3 TIM_BDTR_LOCK /*!< LOCK Level 3 */ 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} - ARM GAS /tmp/ccuHnxNu.s page 292 - - 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CHANNEL Channel @@ -17511,6 +18358,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM1 TIM_CCMR1_OC1M_3 + ARM GAS /tmp/ccLSPxIe.s page 307 + + 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) 741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) 742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1 @@ -17518,9 +18368,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASYMMETRIC_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M) 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} - ARM GAS /tmp/ccuHnxNu.s page 293 - - 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity @@ -17571,6 +18418,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC << 16U) /*!< Capture is done 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} + ARM GAS /tmp/ccLSPxIe.s page 308 + + 797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_IC_FILTER Input Configuration Filter @@ -17578,9 +18428,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1 0x00000000U 803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1_N2 (TIM_CCMR1_IC1F_0 << 16U) - ARM GAS /tmp/ccuHnxNu.s page 294 - - 804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1_N4 (TIM_CCMR1_IC1F_1 << 16U) 805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1_N8 ((TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC1F_0) << 16U) 806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV2_N6 (TIM_CCMR1_IC1F_2 << 16U) @@ -17631,6 +18478,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TRGO Trigger Output 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ + ARM GAS /tmp/ccLSPxIe.s page 309 + + 854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_RESET 0x00000000U /*!< 856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_ENABLE TIM_CR2_MMS_0 /*!< @@ -17638,9 +18488,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_CC1IF (TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!< 859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC1REF TIM_CR2_MMS_2 /*!< 860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC2REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_0) /*!< - ARM GAS /tmp/ccuHnxNu.s page 295 - - 861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC3REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_1) /*!< 862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC4REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!< 863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -17691,6 +18538,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1) 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI1F_ED TIM_SMCR_TS_2 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI1FP1 (TIM_SMCR_TS_2 | TIM_SMCR_TS_0) + ARM GAS /tmp/ccLSPxIe.s page 310 + + 911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI2FP2 (TIM_SMCR_TS_2 | TIM_SMCR_TS_1) 912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ETRF (TIM_SMCR_TS_2 | TIM_SMCR_TS_1 | TIM_SMCR_TS_0) 913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -17698,9 +18548,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ETR_POLARITY External Trigger Polarity - ARM GAS /tmp/ccuHnxNu.s page 296 - - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_POLARITY_NONINVERTED 0x00000000U /*!< ETR is non-inverted, ac @@ -17751,6 +18598,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_POLARITY_HIGH TIM_BDTR_BKP /*!< Break input BRK is ac 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} + ARM GAS /tmp/ccLSPxIe.s page 311 + + 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_FILTER break filter @@ -17758,9 +18608,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1 0x00000000U /*!< No filter, BRK acts asynchronousl 974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1_N2 0x00010000U /*!< fSAMPLING=fCK_INT, N=2 */ - ARM GAS /tmp/ccuHnxNu.s page 297 - - 975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1_N4 0x00020000U /*!< fSAMPLING=fCK_INT, N=4 */ 976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1_N8 0x00030000U /*!< fSAMPLING=fCK_INT, N=8 */ 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV2_N6 0x00040000U /*!< fSAMPLING=fDTS/2, N=6 */ @@ -17811,6 +18658,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccLSPxIe.s page 312 + + 1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OSSI OSSI 1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -17818,9 +18668,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSI_ENABLE TIM_BDTR_OSSI /*!< When inactive, OxC/OCxN 1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} - ARM GAS /tmp/ccuHnxNu.s page 298 - - 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OSSR OSSR @@ -17871,6 +18718,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0) 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1) + ARM GAS /tmp/ccLSPxIe.s page 313 + + 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) 1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 | TIM_DCR_DBA_0) @@ -17878,9 +18728,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) 1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 | TIM_DCR_DBA_2) 1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) - ARM GAS /tmp/ccuHnxNu.s page 299 - - 1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR2 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) 1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR3 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM 1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR4 TIM_DCR_DBA_4 @@ -17931,6 +18778,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF (TIM2_OR_ITR1_RMP_1 | TIM2_OR_RMP_MASK) /*!< TIM2_ITR1 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF (TIM2_OR_ITR1_RMP | TIM2_OR_RMP_MASK) /*!< TIM2_ITR1 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 314 + + 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -17938,9 +18788,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_GPIO TIM5_OR_RMP_MASK /*!< TIM5 chan - ARM GAS /tmp/ccuHnxNu.s page 300 - - 1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_LSI (TIM5_OR_TI4_RMP_0 | TIM5_OR_RMP_MASK) /*!< TIM5 chan 1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_LSE (TIM5_OR_TI4_RMP_1 | TIM5_OR_RMP_MASK) /*!< TIM5 chan 1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_RTC (TIM5_OR_TI4_RMP | TIM5_OR_RMP_MASK) /*!< TIM5 chan @@ -17991,6 +18838,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 315 + + 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro retrieving the UIFCPY flag from the counter value. @@ -17998,9 +18848,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Relevant only if UIF flag remapping has been enabled (UIF status bit is copied 1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * to TIMx_CNT register bit 31) 1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CNT__ Counter value - ARM GAS /tmp/ccuHnxNu.s page 301 - - 1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval UIF status bit 1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_GETFLAG_UIFCPY(__CNT__) \ @@ -18051,6 +18898,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \ 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) + ARM GAS /tmp/ccLSPxIe.s page 316 + + 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the compare value required to achieve the required timer outpu @@ -18058,9 +18908,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10); 1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler - ARM GAS /tmp/ccuHnxNu.s page 302 - - 1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __DELAY__ timer output compare active/inactive delay (in us) 1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Compare value (between Min_Data=0 and Max_Data=65535) 1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -18111,6 +18958,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable timer counter. 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_EnableCounter + ARM GAS /tmp/ccLSPxIe.s page 317 + + 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -18118,9 +18968,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_CEN); 1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccuHnxNu.s page 303 - - 1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable timer counter. @@ -18171,6 +19018,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Inverted state of bit (0 or 1). + ARM GAS /tmp/ccLSPxIe.s page 318 + + 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx) 1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -18178,9 +19028,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 304 - - 1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set update event source 1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events 1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * generate an update interrupt or DMA request if enabled: @@ -18231,6 +19078,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual one pulse mode. 1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_GetOnePulseMode + ARM GAS /tmp/ccLSPxIe.s page 319 + + 1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE @@ -18238,9 +19088,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx) 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccuHnxNu.s page 305 - - 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM)); 1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -18291,6 +19138,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** if (counter_mode == 0U) 1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccLSPxIe.s page 320 + + 1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); 1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -18298,9 +19148,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 306 - - 1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable auto-reload (ARR) preload. 1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload 1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -18318,23 +19165,23 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx) - 5696 .loc 5 1504 22 view .LVU1794 - 5697 .LBB519: + 6179 .loc 5 1504 22 view .LVU1913 + 6180 .LBB524: 1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE); - 5698 .loc 5 1506 3 view .LVU1795 - 5699 005e 4FF08043 mov r3, #1073741824 - 5700 0062 1A68 ldr r2, [r3] - 5701 0064 22F08002 bic r2, r2, #128 - 5702 0068 1A60 str r2, [r3] - 5703 .LVL551: - 5704 .loc 5 1506 3 is_stmt 0 view .LVU1796 - 5705 .LBE519: - 5706 .LBE518: -1558:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); - 5707 .loc 1 1558 3 is_stmt 1 view .LVU1797 - 5708 .LBB520: - 5709 .LBI520: + 6181 .loc 5 1506 3 view .LVU1914 + 6182 005e 4FF08043 mov r3, #1073741824 + 6183 0062 1A68 ldr r2, [r3] + 6184 0064 22F08002 bic r2, r2, #128 + 6185 0068 1A60 str r2, [r3] + 6186 .LVL589: + 6187 .loc 5 1506 3 is_stmt 0 view .LVU1915 + 6188 .LBE524: + 6189 .LBE523: +1652:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); + 6190 .loc 1 1652 3 is_stmt 1 view .LVU1916 + 6191 .LBB525: + 6192 .LBI525: 1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -18351,6 +19198,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the division ratio between the timer clock and the sampling clock used by the dead 1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (when supported) and the digital filters. + ARM GAS /tmp/ccLSPxIe.s page 321 + + 1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check 1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * instance. @@ -18358,9 +19208,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ClockDivision This parameter can be one of the following values: 1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 - ARM GAS /tmp/ccuHnxNu.s page 307 - - 1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -18411,6 +19258,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF) 1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx) + ARM GAS /tmp/ccLSPxIe.s page 322 + + 1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CNT)); 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -18418,9 +19268,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current direction of the counter 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetDirection - ARM GAS /tmp/ccuHnxNu.s page 308 - - 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_UP @@ -18471,6 +19318,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload) 1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccLSPxIe.s page 323 + + 1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->ARR, AutoReload); 1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -18478,9 +19328,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the auto-reload value. 1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_GetAutoReload 1643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check - ARM GAS /tmp/ccuHnxNu.s page 309 - - 1644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 1645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value @@ -18531,6 +19378,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); 1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccLSPxIe.s page 324 + + 1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update interrupt flag (UIF) remapping. 1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UIFREMAP LL_TIM_DisableUIFRemap @@ -18538,9 +19388,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx) - ARM GAS /tmp/ccuHnxNu.s page 310 - - 1701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -18591,6 +19438,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC); 1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccLSPxIe.s page 325 + + 1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is en 1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_IsEnabledPreload @@ -18598,9 +19448,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx) - ARM GAS /tmp/ccuHnxNu.s page 311 - - 1758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL); 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -18651,6 +19498,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the lock level to freeze the 1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * configuration of several capture/compare parameters. + ARM GAS /tmp/ccLSPxIe.s page 326 + + 1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the lock mechanism is supported by a timer instance. 1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR LOCK LL_TIM_CC_SetLockLevel @@ -18658,9 +19508,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param LockLevel This parameter can be one of the following values: 1813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_OFF 1814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_1 - ARM GAS /tmp/ccuHnxNu.s page 312 - - 1815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_2 1816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_3 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -18711,6 +19558,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_DisableChannel\n 1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_DisableChannel 1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccLSPxIe.s page 327 + + 1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N @@ -18718,9 +19568,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N - ARM GAS /tmp/ccuHnxNu.s page 313 - - 1872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 @@ -18771,6 +19618,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure an output channel. 1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n 1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_OC_ConfigOutput\n + ARM GAS /tmp/ccLSPxIe.s page 328 + + 1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_OC_ConfigOutput\n 1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_OC_ConfigOutput\n 1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 CC5S LL_TIM_OC_ConfigOutput\n @@ -18778,9 +19628,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1P LL_TIM_OC_ConfigOutput\n 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_ConfigOutput\n 1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_ConfigOutput\n - ARM GAS /tmp/ccuHnxNu.s page 314 - - 1929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_ConfigOutput\n 1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_ConfigOutput\n 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_ConfigOutput\n @@ -18831,6 +19678,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 + ARM GAS /tmp/ccLSPxIe.s page 329 + + 1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Mode This parameter can be one of the following values: 1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN 1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE @@ -18838,9 +19688,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE 1984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE 1985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE - ARM GAS /tmp/ccuHnxNu.s page 315 - - 1986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1 1987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1 @@ -18891,6 +19738,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2 2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel) + ARM GAS /tmp/ccLSPxIe.s page 330 + + 2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC @@ -18898,9 +19748,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 316 - - 2043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the polarity of an output channel. 2044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_SetPolarity\n @@ -18951,6 +19798,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 + ARM GAS /tmp/ccLSPxIe.s page 331 + + 2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 @@ -18958,9 +19808,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH 2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW - ARM GAS /tmp/ccuHnxNu.s page 317 - - 2100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -19011,6 +19858,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n 2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_GetIdleState\n 2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n + ARM GAS /tmp/ccLSPxIe.s page 332 + + 2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_GetIdleState\n 2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_GetIdleState\n 2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_GetIdleState\n @@ -19018,9 +19868,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_GetIdleState 2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: - ARM GAS /tmp/ccuHnxNu.s page 318 - - 2157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 @@ -19071,6 +19918,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable fast mode for the output channel. 2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n 2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_DisableFast\n + ARM GAS /tmp/ccLSPxIe.s page 333 + + 2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_DisableFast\n 2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_DisableFast\n 2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_DisableFast\n @@ -19078,9 +19928,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 - ARM GAS /tmp/ccuHnxNu.s page 319 - - 2214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 @@ -19131,6 +19978,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5PE LL_TIM_OC_EnablePreload\n 2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6PE LL_TIM_OC_EnablePreload 2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccLSPxIe.s page 334 + + 2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 @@ -19138,9 +19988,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 - ARM GAS /tmp/ccuHnxNu.s page 320 - - 2271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) @@ -19191,6 +20038,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 + ARM GAS /tmp/ccLSPxIe.s page 335 + + 2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel) @@ -19198,9 +20048,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]; - ARM GAS /tmp/ccuHnxNu.s page 321 - - 2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -19251,6 +20098,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None + ARM GAS /tmp/ccLSPxIe.s page 336 + + 2378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel) 2380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -19258,9 +20108,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); 2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccuHnxNu.s page 322 - - 2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates clearing the output channel on an external event is enabled for the output ch @@ -19311,6 +20158,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 1 (TIMx_CCR1). 2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF. + ARM GAS /tmp/ccLSPxIe.s page 337 + + 2435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 2436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 2437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not @@ -19318,9 +20168,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1 2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 - ARM GAS /tmp/ccuHnxNu.s page 323 - - 2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) @@ -19371,6 +20218,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance. 2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4 2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccLSPxIe.s page 338 + + 2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -19378,9 +20228,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR4, CompareValue); 2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccuHnxNu.s page 324 - - 2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 5 (TIMx_CCR5). @@ -19431,6 +20278,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF 2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. + ARM GAS /tmp/ccLSPxIe.s page 339 + + 2549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not 2550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 2 is supported by a timer instance. 2551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2 @@ -19438,9 +20288,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) - ARM GAS /tmp/ccuHnxNu.s page 325 - - 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -19491,6 +20338,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 340 + + 2606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR6) set for output channel 6. 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not 2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 6 is supported by a timer instance. @@ -19498,9 +20348,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 326 - - 2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx) 2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR6)); @@ -19551,6 +20398,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_Config\n 2661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_Config\n 2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_Config\n + ARM GAS /tmp/ccLSPxIe.s page 341 + + 2663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_Config\n 2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_Config\n 2665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_Config\n @@ -19558,9 +20408,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 - ARM GAS /tmp/ccuHnxNu.s page 327 - - 2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 @@ -19611,6 +20458,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current active input. 2718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n 2719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_GetActiveInput\n + ARM GAS /tmp/ccLSPxIe.s page 342 + + 2720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_GetActiveInput\n 2721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_GetActiveInput 2722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -19618,9 +20468,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 - ARM GAS /tmp/ccuHnxNu.s page 328 - - 2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI @@ -19671,6 +20518,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 + ARM GAS /tmp/ccLSPxIe.s page 343 + + 2777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 @@ -19678,9 +20528,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4 2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8 2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 329 - - 2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) 2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); @@ -19731,6 +20578,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n 2832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_GetFilter\n 2833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_GetFilter\n + ARM GAS /tmp/ccLSPxIe.s page 344 + + 2834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_GetFilter 2835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: @@ -19738,9 +20588,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 - ARM GAS /tmp/ccuHnxNu.s page 330 - - 2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 @@ -19791,6 +20638,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity 2889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + ARM GAS /tmp/ccLSPxIe.s page 345 + + 2891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), 2892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ICPolarity << SHIFT_TAB_CCxP[iChannel]); 2893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -19798,9 +20648,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current input channel polarity. 2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n - ARM GAS /tmp/ccuHnxNu.s page 331 - - 2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n 2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_GetPolarity\n @@ -19851,6 +20698,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S); 2947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccLSPxIe.s page 346 + + 2948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input. @@ -19858,9 +20708,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an XOR input. 2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination 2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccuHnxNu.s page 332 - - 2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx) @@ -19911,6 +20758,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 3004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 347 + + 3005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx) 3006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3)); @@ -19918,9 +20768,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 4. - ARM GAS /tmp/ccuHnxNu.s page 333 - - 3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF 3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. @@ -19971,6 +20818,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether external clock mode 2 is enabled. + ARM GAS /tmp/ccLSPxIe.s page 348 + + 3062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 3063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 3064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock @@ -19978,9 +20828,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) - ARM GAS /tmp/ccuHnxNu.s page 334 - - 3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -20005,23 +20852,23 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) - 5710 .loc 5 3092 22 view .LVU1798 - 5711 .LBB521: + 6193 .loc 5 3092 22 view .LVU1917 + 6194 .LBB526: 3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); - 5712 .loc 5 3094 3 view .LVU1799 - 5713 006a 9968 ldr r1, [r3, #8] - 5714 006c 0A4A ldr r2, .L314+16 - 5715 006e 0A40 ands r2, r2, r1 - 5716 0070 9A60 str r2, [r3, #8] - 5717 .LVL552: - 5718 .loc 5 3094 3 is_stmt 0 view .LVU1800 - 5719 .LBE521: - 5720 .LBE520: -1559:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); - 5721 .loc 1 1559 3 is_stmt 1 view .LVU1801 - 5722 .LBB522: - 5723 .LBI522: + 6195 .loc 5 3094 3 view .LVU1918 + 6196 006a 9968 ldr r1, [r3, #8] + 6197 006c 0A4A ldr r2, .L364+16 + 6198 006e 0A40 ands r2, r2, r1 + 6199 0070 9A60 str r2, [r3, #8] + 6200 .LVL590: + 6201 .loc 5 3094 3 is_stmt 0 view .LVU1919 + 6202 .LBE526: + 6203 .LBE525: +1653:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); + 6204 .loc 1 1653 3 is_stmt 1 view .LVU1920 + 6205 .LBB527: + 6206 .LBI527: 3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -20031,6 +20878,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetEncoderMode 3102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param EncoderMode This parameter can be one of the following values: + ARM GAS /tmp/ccLSPxIe.s page 349 + + 3104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI1 3105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI2 3106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X4_TI12 @@ -20038,9 +20888,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode) 3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccuHnxNu.s page 335 - - 3111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); 3112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -20069,28 +20916,31 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization) - 5724 .loc 5 3138 22 view .LVU1802 - 5725 .LBB523: + 6207 .loc 5 3138 22 view .LVU1921 + 6208 .LBB528: 3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); - 5726 .loc 5 3140 3 view .LVU1803 - 5727 0072 5A68 ldr r2, [r3, #4] - 5728 0074 22F07002 bic r2, r2, #112 - 5729 0078 5A60 str r2, [r3, #4] - 5730 .LVL553: - 5731 .loc 5 3140 3 is_stmt 0 view .LVU1804 - 5732 .LBE523: - 5733 .LBE522: -1560:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ - 5734 .loc 1 1560 3 is_stmt 1 view .LVU1805 - 5735 .LBB524: - 5736 .LBI524: + 6209 .loc 5 3140 3 view .LVU1922 + 6210 0072 5A68 ldr r2, [r3, #4] + 6211 0074 22F07002 bic r2, r2, #112 + 6212 0078 5A60 str r2, [r3, #4] + 6213 .LVL591: + 6214 .loc 5 3140 3 is_stmt 0 view .LVU1923 + 6215 .LBE528: + 6216 .LBE527: +1654:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ + 6217 .loc 1 1654 3 is_stmt 1 view .LVU1924 + 6218 .LBB529: + 6219 .LBI529: 3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger output 2 (TRGO2) used for ADC synchronization . 3145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_TRGO2_INSTANCE(TIMx) can be used to check 3146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance can be used for ADC synchronization. + ARM GAS /tmp/ccLSPxIe.s page 350 + + 3147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS2 LL_TIM_SetTriggerOutput2 3148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer Instance 3149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ADCSynchronization This parameter can be one of the following values: @@ -20098,9 +20948,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_ENABLE 3152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_UPDATE 3153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_CC1F - ARM GAS /tmp/ccuHnxNu.s page 336 - - 3154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC1 3155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC2 3156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC3 @@ -20151,6 +20998,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR2 3202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR3 3203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1F_ED + ARM GAS /tmp/ccLSPxIe.s page 351 + + 3204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1FP1 3205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI2FP2 3206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ETRF @@ -20158,9 +21008,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput) 3210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccuHnxNu.s page 337 - - 3211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); 3212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -20186,1061 +21033,1061 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx) - 5737 .loc 5 3235 22 view .LVU1806 - 5738 .LBB525: + 6220 .loc 5 3235 22 view .LVU1925 + 6221 .LBB530: 3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); - 5739 .loc 5 3237 3 view .LVU1807 - 5740 007a 9A68 ldr r2, [r3, #8] - 5741 007c 22F08002 bic r2, r2, #128 - 5742 0080 9A60 str r2, [r3, #8] - 5743 .LVL554: - 5744 .loc 5 3237 3 is_stmt 0 view .LVU1808 - 5745 .LBE525: - 5746 .LBE524: -1565:Src/main.c **** - 5747 .loc 1 1565 1 view .LVU1809 - 5748 0082 06B0 add sp, sp, #24 - 5749 .LCFI57: - 5750 .cfi_def_cfa_offset 8 - 5751 @ sp needed - 5752 0084 10BD pop {r4, pc} - 5753 .L315: - 5754 0086 00BF .align 2 - 5755 .L314: - 5756 0088 00380240 .word 1073887232 - 5757 008c 00ED00E0 .word -536810240 - 5758 0090 00E100E0 .word -536813312 - 5759 0094 40D10C00 .word 840000 - 5760 0098 F8BFFEFF .word -81928 - 5761 .cfi_endproc - 5762 .LFE1195: - 5764 .section .text.MX_TIM5_Init,"ax",%progbits - 5765 .align 1 - 5766 .syntax unified - ARM GAS /tmp/ccuHnxNu.s page 338 + 6222 .loc 5 3237 3 view .LVU1926 + 6223 007a 9A68 ldr r2, [r3, #8] + 6224 007c 22F08002 bic r2, r2, #128 + 6225 0080 9A60 str r2, [r3, #8] + 6226 .LVL592: + 6227 .loc 5 3237 3 is_stmt 0 view .LVU1927 + 6228 .LBE530: + 6229 .LBE529: +1659:Src/main.c **** + 6230 .loc 1 1659 1 view .LVU1928 + 6231 0082 06B0 add sp, sp, #24 + 6232 .LCFI60: + 6233 .cfi_def_cfa_offset 8 + 6234 @ sp needed + 6235 0084 10BD pop {r4, pc} + 6236 .L365: + 6237 0086 00BF .align 2 + 6238 .L364: + 6239 0088 00380240 .word 1073887232 + 6240 008c 00ED00E0 .word -536810240 + 6241 0090 00E100E0 .word -536813312 + ARM GAS /tmp/ccLSPxIe.s page 352 - 5767 .thumb - 5768 .thumb_func - 5770 MX_TIM5_Init: - 5771 .LFB1197: -1632:Src/main.c **** - 5772 .loc 1 1632 1 is_stmt 1 view -0 - 5773 .cfi_startproc - 5774 @ args = 0, pretend = 0, frame = 24 - 5775 @ frame_needed = 0, uses_anonymous_args = 0 - 5776 0000 10B5 push {r4, lr} - 5777 .LCFI58: - 5778 .cfi_def_cfa_offset 8 - 5779 .cfi_offset 4, -8 - 5780 .cfi_offset 14, -4 - 5781 0002 86B0 sub sp, sp, #24 - 5782 .LCFI59: - 5783 .cfi_def_cfa_offset 32 -1638:Src/main.c **** - 5784 .loc 1 1638 3 view .LVU1811 -1638:Src/main.c **** - 5785 .loc 1 1638 22 is_stmt 0 view .LVU1812 - 5786 0004 0024 movs r4, #0 - 5787 0006 0194 str r4, [sp, #4] - 5788 0008 0294 str r4, [sp, #8] - 5789 000a 0394 str r4, [sp, #12] - 5790 000c 0494 str r4, [sp, #16] - 5791 000e 0594 str r4, [sp, #20] -1641:Src/main.c **** - 5792 .loc 1 1641 3 is_stmt 1 view .LVU1813 - 5793 .LVL555: - 5794 .LBB526: - 5795 .LBI526: + 6242 0094 40D10C00 .word 840000 + 6243 0098 F8BFFEFF .word -81928 + 6244 .cfi_endproc + 6245 .LFE1195: + 6247 .section .text.MX_TIM5_Init,"ax",%progbits + 6248 .align 1 + 6249 .syntax unified + 6250 .thumb + 6251 .thumb_func + 6253 MX_TIM5_Init: + 6254 .LFB1197: +1726:Src/main.c **** + 6255 .loc 1 1726 1 is_stmt 1 view -0 + 6256 .cfi_startproc + 6257 @ args = 0, pretend = 0, frame = 24 + 6258 @ frame_needed = 0, uses_anonymous_args = 0 + 6259 0000 10B5 push {r4, lr} + 6260 .LCFI61: + 6261 .cfi_def_cfa_offset 8 + 6262 .cfi_offset 4, -8 + 6263 .cfi_offset 14, -4 + 6264 0002 86B0 sub sp, sp, #24 + 6265 .LCFI62: + 6266 .cfi_def_cfa_offset 32 +1732:Src/main.c **** + 6267 .loc 1 1732 3 view .LVU1930 +1732:Src/main.c **** + 6268 .loc 1 1732 22 is_stmt 0 view .LVU1931 + 6269 0004 0024 movs r4, #0 + 6270 0006 0194 str r4, [sp, #4] + 6271 0008 0294 str r4, [sp, #8] + 6272 000a 0394 str r4, [sp, #12] + 6273 000c 0494 str r4, [sp, #16] + 6274 000e 0594 str r4, [sp, #20] +1735:Src/main.c **** + 6275 .loc 1 1735 3 is_stmt 1 view .LVU1932 + 6276 .LVL593: + 6277 .LBB531: + 6278 .LBI531: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5796 .loc 3 1071 22 view .LVU1814 - 5797 .LBB527: + 6279 .loc 3 1071 22 view .LVU1933 + 6280 .LBB532: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 5798 .loc 3 1073 3 view .LVU1815 + 6281 .loc 3 1073 3 view .LVU1934 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5799 .loc 3 1074 3 view .LVU1816 - 5800 0010 1C4B ldr r3, .L318 - 5801 0012 1A6C ldr r2, [r3, #64] - 5802 0014 42F00802 orr r2, r2, #8 - 5803 0018 1A64 str r2, [r3, #64] + 6282 .loc 3 1074 3 view .LVU1935 + 6283 0010 1C4B ldr r3, .L368 + 6284 0012 1A6C ldr r2, [r3, #64] + 6285 0014 42F00802 orr r2, r2, #8 + 6286 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5804 .loc 3 1076 3 view .LVU1817 + 6287 .loc 3 1076 3 view .LVU1936 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5805 .loc 3 1076 12 is_stmt 0 view .LVU1818 - 5806 001a 1B6C ldr r3, [r3, #64] - 5807 001c 03F00803 and r3, r3, #8 + 6288 .loc 3 1076 12 is_stmt 0 view .LVU1937 + 6289 001a 1B6C ldr r3, [r3, #64] + 6290 001c 03F00803 and r3, r3, #8 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5808 .loc 3 1076 10 view .LVU1819 - 5809 0020 0093 str r3, [sp] -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 5810 .loc 3 1077 3 is_stmt 1 view .LVU1820 - 5811 0022 009B ldr r3, [sp] - 5812 .LVL556: -1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - ARM GAS /tmp/ccuHnxNu.s page 339 + ARM GAS /tmp/ccLSPxIe.s page 353 - 5813 .loc 3 1077 3 is_stmt 0 view .LVU1821 - 5814 .LBE527: - 5815 .LBE526: -1644:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 5816 .loc 1 1644 3 is_stmt 1 view .LVU1822 - 5817 .LBB528: - 5818 .LBI528: + 6291 .loc 3 1076 10 view .LVU1938 + 6292 0020 0093 str r3, [sp] +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 6293 .loc 3 1077 3 is_stmt 1 view .LVU1939 + 6294 0022 009B ldr r3, [sp] + 6295 .LVL594: +1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + 6296 .loc 3 1077 3 is_stmt 0 view .LVU1940 + 6297 .LBE532: + 6298 .LBE531: +1738:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 6299 .loc 1 1738 3 is_stmt 1 view .LVU1941 + 6300 .LBB533: + 6301 .LBI533: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 5819 .loc 2 1884 26 view .LVU1823 - 5820 .LBB529: + 6302 .loc 2 1884 26 view .LVU1942 + 6303 .LBB534: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 5821 .loc 2 1886 3 view .LVU1824 + 6304 .loc 2 1886 3 view .LVU1943 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 5822 .loc 2 1886 26 is_stmt 0 view .LVU1825 - 5823 0024 184B ldr r3, .L318+4 - 5824 0026 D868 ldr r0, [r3, #12] - 5825 .LBE529: - 5826 .LBE528: -1644:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 5827 .loc 1 1644 3 discriminator 1 view .LVU1826 - 5828 0028 2246 mov r2, r4 - 5829 002a 2146 mov r1, r4 - 5830 002c C0F30220 ubfx r0, r0, #8, #3 - 5831 0030 FFF7FEFF bl NVIC_EncodePriority - 5832 .LVL557: - 5833 .LBB530: - 5834 .LBI530: + 6305 .loc 2 1886 26 is_stmt 0 view .LVU1944 + 6306 0024 184B ldr r3, .L368+4 + 6307 0026 D868 ldr r0, [r3, #12] + 6308 .LBE534: + 6309 .LBE533: +1738:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 6310 .loc 1 1738 3 discriminator 1 view .LVU1945 + 6311 0028 2246 mov r2, r4 + 6312 002a 2146 mov r1, r4 + 6313 002c C0F30220 ubfx r0, r0, #8, #3 + 6314 0030 FFF7FEFF bl NVIC_EncodePriority + 6315 .LVL595: + 6316 .LBB535: + 6317 .LBI535: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 5835 .loc 2 2024 22 is_stmt 1 view .LVU1827 - 5836 .LBB531: + 6318 .loc 2 2024 22 is_stmt 1 view .LVU1946 + 6319 .LBB536: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 5837 .loc 2 2026 3 view .LVU1828 + 6320 .loc 2 2026 3 view .LVU1947 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5838 .loc 2 2028 5 view .LVU1829 + 6321 .loc 2 2028 5 view .LVU1948 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5839 .loc 2 2028 49 is_stmt 0 view .LVU1830 - 5840 0034 0001 lsls r0, r0, #4 - 5841 .LVL558: + 6322 .loc 2 2028 49 is_stmt 0 view .LVU1949 + 6323 0034 0001 lsls r0, r0, #4 + 6324 .LVL596: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5842 .loc 2 2028 49 view .LVU1831 - 5843 0036 C0B2 uxtb r0, r0 + 6325 .loc 2 2028 49 view .LVU1950 + 6326 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5844 .loc 2 2028 47 view .LVU1832 - 5845 0038 144B ldr r3, .L318+8 - 5846 003a 83F83203 strb r0, [r3, #818] - 5847 .LVL559: + 6327 .loc 2 2028 47 view .LVU1951 + 6328 0038 144B ldr r3, .L368+8 + 6329 003a 83F83203 strb r0, [r3, #818] + 6330 .LVL597: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 5848 .loc 2 2028 47 view .LVU1833 - 5849 .LBE531: - 5850 .LBE530: -1645:Src/main.c **** - 5851 .loc 1 1645 3 is_stmt 1 view .LVU1834 - 5852 .LBB532: - 5853 .LBI532: + 6331 .loc 2 2028 47 view .LVU1952 + 6332 .LBE536: + 6333 .LBE535: + ARM GAS /tmp/ccLSPxIe.s page 354 + + +1739:Src/main.c **** + 6334 .loc 1 1739 3 is_stmt 1 view .LVU1953 + 6335 .LBB537: + 6336 .LBI537: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 5854 .loc 2 1896 22 view .LVU1835 - 5855 .LBB533: - ARM GAS /tmp/ccuHnxNu.s page 340 - - + 6337 .loc 2 1896 22 view .LVU1954 + 6338 .LBB538: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 5856 .loc 2 1898 3 view .LVU1836 + 6339 .loc 2 1898 3 view .LVU1955 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5857 .loc 2 1900 5 view .LVU1837 + 6340 .loc 2 1900 5 view .LVU1956 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5858 .loc 2 1900 43 is_stmt 0 view .LVU1838 - 5859 003e 4FF48022 mov r2, #262144 - 5860 0042 5A60 str r2, [r3, #4] - 5861 .LVL560: + 6341 .loc 2 1900 43 is_stmt 0 view .LVU1957 + 6342 003e 4FF48022 mov r2, #262144 + 6343 0042 5A60 str r2, [r3, #4] + 6344 .LVL598: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 5862 .loc 2 1900 43 view .LVU1839 - 5863 .LBE533: - 5864 .LBE532: -1650:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 5865 .loc 1 1650 3 is_stmt 1 view .LVU1840 -1650:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 5866 .loc 1 1650 28 is_stmt 0 view .LVU1841 - 5867 0044 42F21073 movw r3, #10000 - 5868 0048 ADF80430 strh r3, [sp, #4] @ movhi -1651:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 5869 .loc 1 1651 3 is_stmt 1 view .LVU1842 -1651:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 5870 .loc 1 1651 30 is_stmt 0 view .LVU1843 - 5871 004c 0294 str r4, [sp, #8] -1652:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 5872 .loc 1 1652 3 is_stmt 1 view .LVU1844 -1652:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 5873 .loc 1 1652 29 is_stmt 0 view .LVU1845 - 5874 004e 4FF40C73 mov r3, #560 - 5875 0052 0393 str r3, [sp, #12] -1653:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 5876 .loc 1 1653 3 is_stmt 1 view .LVU1846 -1653:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 5877 .loc 1 1653 32 is_stmt 0 view .LVU1847 - 5878 0054 0494 str r4, [sp, #16] -1654:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); - 5879 .loc 1 1654 3 is_stmt 1 view .LVU1848 - 5880 0056 0E4C ldr r4, .L318+12 - 5881 0058 01A9 add r1, sp, #4 - 5882 005a 2046 mov r0, r4 - 5883 005c FFF7FEFF bl LL_TIM_Init - 5884 .LVL561: -1655:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); - 5885 .loc 1 1655 3 view .LVU1849 - 5886 .LBB534: - 5887 .LBI534: + 6345 .loc 2 1900 43 view .LVU1958 + 6346 .LBE538: + 6347 .LBE537: +1744:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6348 .loc 1 1744 3 is_stmt 1 view .LVU1959 +1744:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6349 .loc 1 1744 28 is_stmt 0 view .LVU1960 + 6350 0044 42F21073 movw r3, #10000 + 6351 0048 ADF80430 strh r3, [sp, #4] @ movhi +1745:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 6352 .loc 1 1745 3 is_stmt 1 view .LVU1961 +1745:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 6353 .loc 1 1745 30 is_stmt 0 view .LVU1962 + 6354 004c 0294 str r4, [sp, #8] +1746:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 6355 .loc 1 1746 3 is_stmt 1 view .LVU1963 +1746:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 6356 .loc 1 1746 29 is_stmt 0 view .LVU1964 + 6357 004e 4FF40C73 mov r3, #560 + 6358 0052 0393 str r3, [sp, #12] +1747:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 6359 .loc 1 1747 3 is_stmt 1 view .LVU1965 +1747:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 6360 .loc 1 1747 32 is_stmt 0 view .LVU1966 + 6361 0054 0494 str r4, [sp, #16] +1748:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); + 6362 .loc 1 1748 3 is_stmt 1 view .LVU1967 + 6363 0056 0E4C ldr r4, .L368+12 + 6364 0058 01A9 add r1, sp, #4 + 6365 005a 2046 mov r0, r4 + 6366 005c FFF7FEFF bl LL_TIM_Init + 6367 .LVL599: +1749:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); + 6368 .loc 1 1749 3 view .LVU1968 + 6369 .LBB539: + 6370 .LBI539: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5888 .loc 5 1504 22 view .LVU1850 - 5889 .LBB535: + 6371 .loc 5 1504 22 view .LVU1969 + 6372 .LBB540: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5890 .loc 5 1506 3 view .LVU1851 - 5891 0060 2368 ldr r3, [r4] - 5892 0062 23F08003 bic r3, r3, #128 - 5893 0066 2360 str r3, [r4] - 5894 .LVL562: -1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5895 .loc 5 1506 3 is_stmt 0 view .LVU1852 - ARM GAS /tmp/ccuHnxNu.s page 341 + ARM GAS /tmp/ccLSPxIe.s page 355 - 5896 .LBE535: - 5897 .LBE534: -1656:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); - 5898 .loc 1 1656 3 is_stmt 1 view .LVU1853 - 5899 .LBB536: - 5900 .LBI536: + 6373 .loc 5 1506 3 view .LVU1970 + 6374 0060 2368 ldr r3, [r4] + 6375 0062 23F08003 bic r3, r3, #128 + 6376 0066 2360 str r3, [r4] + 6377 .LVL600: +1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 6378 .loc 5 1506 3 is_stmt 0 view .LVU1971 + 6379 .LBE540: + 6380 .LBE539: +1750:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); + 6381 .loc 1 1750 3 is_stmt 1 view .LVU1972 + 6382 .LBB541: + 6383 .LBI541: 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5901 .loc 5 3092 22 view .LVU1854 - 5902 .LBB537: + 6384 .loc 5 3092 22 view .LVU1973 + 6385 .LBB542: 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5903 .loc 5 3094 3 view .LVU1855 - 5904 0068 A268 ldr r2, [r4, #8] - 5905 006a 0A4B ldr r3, .L318+16 - 5906 006c 1340 ands r3, r3, r2 - 5907 006e A360 str r3, [r4, #8] - 5908 .LVL563: + 6386 .loc 5 3094 3 view .LVU1974 + 6387 0068 A268 ldr r2, [r4, #8] + 6388 006a 0A4B ldr r3, .L368+16 + 6389 006c 1340 ands r3, r3, r2 + 6390 006e A360 str r3, [r4, #8] + 6391 .LVL601: 3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5909 .loc 5 3094 3 is_stmt 0 view .LVU1856 - 5910 .LBE537: - 5911 .LBE536: -1657:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); - 5912 .loc 1 1657 3 is_stmt 1 view .LVU1857 - 5913 .LBB538: - 5914 .LBI538: + 6392 .loc 5 3094 3 is_stmt 0 view .LVU1975 + 6393 .LBE542: + 6394 .LBE541: +1751:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); + 6395 .loc 1 1751 3 is_stmt 1 view .LVU1976 + 6396 .LBB543: + 6397 .LBI543: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5915 .loc 5 3138 22 view .LVU1858 - 5916 .LBB539: + 6398 .loc 5 3138 22 view .LVU1977 + 6399 .LBB544: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5917 .loc 5 3140 3 view .LVU1859 - 5918 0070 6368 ldr r3, [r4, #4] - 5919 0072 23F07003 bic r3, r3, #112 - 5920 0076 6360 str r3, [r4, #4] - 5921 .LVL564: + 6400 .loc 5 3140 3 view .LVU1978 + 6401 0070 6368 ldr r3, [r4, #4] + 6402 0072 23F07003 bic r3, r3, #112 + 6403 0076 6360 str r3, [r4, #4] + 6404 .LVL602: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 5922 .loc 5 3140 3 is_stmt 0 view .LVU1860 - 5923 .LBE539: - 5924 .LBE538: -1658:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ - 5925 .loc 1 1658 3 is_stmt 1 view .LVU1861 - 5926 .LBB540: - 5927 .LBI540: + 6405 .loc 5 3140 3 is_stmt 0 view .LVU1979 + 6406 .LBE544: + 6407 .LBE543: +1752:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ + 6408 .loc 1 1752 3 is_stmt 1 view .LVU1980 + 6409 .LBB545: + 6410 .LBI545: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 5928 .loc 5 3235 22 view .LVU1862 - 5929 .LBB541: - 5930 .loc 5 3237 3 view .LVU1863 - 5931 0078 A368 ldr r3, [r4, #8] - 5932 007a 23F08003 bic r3, r3, #128 - 5933 007e A360 str r3, [r4, #8] - 5934 .LVL565: - 5935 .loc 5 3237 3 is_stmt 0 view .LVU1864 - 5936 .LBE541: - 5937 .LBE540: -1663:Src/main.c **** - 5938 .loc 1 1663 1 view .LVU1865 - 5939 0080 06B0 add sp, sp, #24 - 5940 .LCFI60: - 5941 .cfi_def_cfa_offset 8 - ARM GAS /tmp/ccuHnxNu.s page 342 + 6411 .loc 5 3235 22 view .LVU1981 + 6412 .LBB546: + 6413 .loc 5 3237 3 view .LVU1982 + 6414 0078 A368 ldr r3, [r4, #8] + 6415 007a 23F08003 bic r3, r3, #128 + 6416 007e A360 str r3, [r4, #8] + 6417 .LVL603: + 6418 .loc 5 3237 3 is_stmt 0 view .LVU1983 + ARM GAS /tmp/ccLSPxIe.s page 356 - 5942 @ sp needed - 5943 0082 10BD pop {r4, pc} - 5944 .L319: - 5945 .align 2 - 5946 .L318: - 5947 0084 00380240 .word 1073887232 - 5948 0088 00ED00E0 .word -536810240 - 5949 008c 00E100E0 .word -536813312 - 5950 0090 000C0040 .word 1073744896 - 5951 0094 F8BFFEFF .word -81928 - 5952 .cfi_endproc - 5953 .LFE1197: - 5955 .section .text.MX_TIM7_Init,"ax",%progbits - 5956 .align 1 - 5957 .syntax unified - 5958 .thumb - 5959 .thumb_func - 5961 MX_TIM7_Init: - 5962 .LFB1199: -1708:Src/main.c **** - 5963 .loc 1 1708 1 is_stmt 1 view -0 - 5964 .cfi_startproc - 5965 @ args = 0, pretend = 0, frame = 24 - 5966 @ frame_needed = 0, uses_anonymous_args = 0 - 5967 0000 10B5 push {r4, lr} - 5968 .LCFI61: - 5969 .cfi_def_cfa_offset 8 - 5970 .cfi_offset 4, -8 - 5971 .cfi_offset 14, -4 - 5972 0002 86B0 sub sp, sp, #24 - 5973 .LCFI62: - 5974 .cfi_def_cfa_offset 32 -1714:Src/main.c **** - 5975 .loc 1 1714 3 view .LVU1867 -1714:Src/main.c **** - 5976 .loc 1 1714 22 is_stmt 0 view .LVU1868 - 5977 0004 0024 movs r4, #0 - 5978 0006 0194 str r4, [sp, #4] - 5979 0008 0294 str r4, [sp, #8] - 5980 000a 0394 str r4, [sp, #12] - 5981 000c 0494 str r4, [sp, #16] - 5982 000e 0594 str r4, [sp, #20] -1717:Src/main.c **** - 5983 .loc 1 1717 3 is_stmt 1 view .LVU1869 - 5984 .LVL566: - 5985 .LBB542: - 5986 .LBI542: + 6419 .LBE546: + 6420 .LBE545: +1757:Src/main.c **** + 6421 .loc 1 1757 1 view .LVU1984 + 6422 0080 06B0 add sp, sp, #24 + 6423 .LCFI63: + 6424 .cfi_def_cfa_offset 8 + 6425 @ sp needed + 6426 0082 10BD pop {r4, pc} + 6427 .L369: + 6428 .align 2 + 6429 .L368: + 6430 0084 00380240 .word 1073887232 + 6431 0088 00ED00E0 .word -536810240 + 6432 008c 00E100E0 .word -536813312 + 6433 0090 000C0040 .word 1073744896 + 6434 0094 F8BFFEFF .word -81928 + 6435 .cfi_endproc + 6436 .LFE1197: + 6438 .section .text.MX_TIM7_Init,"ax",%progbits + 6439 .align 1 + 6440 .syntax unified + 6441 .thumb + 6442 .thumb_func + 6444 MX_TIM7_Init: + 6445 .LFB1199: +1802:Src/main.c **** + 6446 .loc 1 1802 1 is_stmt 1 view -0 + 6447 .cfi_startproc + 6448 @ args = 0, pretend = 0, frame = 24 + 6449 @ frame_needed = 0, uses_anonymous_args = 0 + 6450 0000 10B5 push {r4, lr} + 6451 .LCFI64: + 6452 .cfi_def_cfa_offset 8 + 6453 .cfi_offset 4, -8 + 6454 .cfi_offset 14, -4 + 6455 0002 86B0 sub sp, sp, #24 + 6456 .LCFI65: + 6457 .cfi_def_cfa_offset 32 +1808:Src/main.c **** + 6458 .loc 1 1808 3 view .LVU1986 +1808:Src/main.c **** + 6459 .loc 1 1808 22 is_stmt 0 view .LVU1987 + 6460 0004 0024 movs r4, #0 + 6461 0006 0194 str r4, [sp, #4] + 6462 0008 0294 str r4, [sp, #8] + 6463 000a 0394 str r4, [sp, #12] + 6464 000c 0494 str r4, [sp, #16] + 6465 000e 0594 str r4, [sp, #20] +1811:Src/main.c **** + 6466 .loc 1 1811 3 is_stmt 1 view .LVU1988 + 6467 .LVL604: + 6468 .LBB547: + 6469 .LBI547: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 5987 .loc 3 1071 22 view .LVU1870 - 5988 .LBB543: + 6470 .loc 3 1071 22 view .LVU1989 + 6471 .LBB548: + ARM GAS /tmp/ccLSPxIe.s page 357 + + 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 5989 .loc 3 1073 3 view .LVU1871 + 6472 .loc 3 1073 3 view .LVU1990 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 5990 .loc 3 1074 3 view .LVU1872 - 5991 0010 1A4B ldr r3, .L322 - 5992 0012 1A6C ldr r2, [r3, #64] - 5993 0014 42F02002 orr r2, r2, #32 - ARM GAS /tmp/ccuHnxNu.s page 343 - - - 5994 0018 1A64 str r2, [r3, #64] + 6473 .loc 3 1074 3 view .LVU1991 + 6474 0010 1A4B ldr r3, .L372 + 6475 0012 1A6C ldr r2, [r3, #64] + 6476 0014 42F02002 orr r2, r2, #32 + 6477 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5995 .loc 3 1076 3 view .LVU1873 + 6478 .loc 3 1076 3 view .LVU1992 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5996 .loc 3 1076 12 is_stmt 0 view .LVU1874 - 5997 001a 1B6C ldr r3, [r3, #64] - 5998 001c 03F02003 and r3, r3, #32 + 6479 .loc 3 1076 12 is_stmt 0 view .LVU1993 + 6480 001a 1B6C ldr r3, [r3, #64] + 6481 001c 03F02003 and r3, r3, #32 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 5999 .loc 3 1076 10 view .LVU1875 - 6000 0020 0093 str r3, [sp] + 6482 .loc 3 1076 10 view .LVU1994 + 6483 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 6001 .loc 3 1077 3 is_stmt 1 view .LVU1876 - 6002 0022 009B ldr r3, [sp] - 6003 .LVL567: + 6484 .loc 3 1077 3 is_stmt 1 view .LVU1995 + 6485 0022 009B ldr r3, [sp] + 6486 .LVL605: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 6004 .loc 3 1077 3 is_stmt 0 view .LVU1877 - 6005 .LBE543: - 6006 .LBE542: -1720:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 6007 .loc 1 1720 3 is_stmt 1 view .LVU1878 - 6008 .LBB544: - 6009 .LBI544: + 6487 .loc 3 1077 3 is_stmt 0 view .LVU1996 + 6488 .LBE548: + 6489 .LBE547: +1814:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 6490 .loc 1 1814 3 is_stmt 1 view .LVU1997 + 6491 .LBB549: + 6492 .LBI549: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 6010 .loc 2 1884 26 view .LVU1879 - 6011 .LBB545: + 6493 .loc 2 1884 26 view .LVU1998 + 6494 .LBB550: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 6012 .loc 2 1886 3 view .LVU1880 + 6495 .loc 2 1886 3 view .LVU1999 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 6013 .loc 2 1886 26 is_stmt 0 view .LVU1881 - 6014 0024 164B ldr r3, .L322+4 - 6015 0026 D868 ldr r0, [r3, #12] - 6016 .LBE545: - 6017 .LBE544: -1720:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 6018 .loc 1 1720 3 discriminator 1 view .LVU1882 - 6019 0028 2246 mov r2, r4 - 6020 002a 2146 mov r1, r4 - 6021 002c C0F30220 ubfx r0, r0, #8, #3 - 6022 0030 FFF7FEFF bl NVIC_EncodePriority - 6023 .LVL568: - 6024 .LBB546: - 6025 .LBI546: + 6496 .loc 2 1886 26 is_stmt 0 view .LVU2000 + 6497 0024 164B ldr r3, .L372+4 + 6498 0026 D868 ldr r0, [r3, #12] + 6499 .LBE550: + 6500 .LBE549: +1814:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 6501 .loc 1 1814 3 discriminator 1 view .LVU2001 + 6502 0028 2246 mov r2, r4 + 6503 002a 2146 mov r1, r4 + 6504 002c C0F30220 ubfx r0, r0, #8, #3 + 6505 0030 FFF7FEFF bl NVIC_EncodePriority + 6506 .LVL606: + 6507 .LBB551: + 6508 .LBI551: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 6026 .loc 2 2024 22 is_stmt 1 view .LVU1883 - 6027 .LBB547: + 6509 .loc 2 2024 22 is_stmt 1 view .LVU2002 + 6510 .LBB552: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 6028 .loc 2 2026 3 view .LVU1884 + 6511 .loc 2 2026 3 view .LVU2003 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6029 .loc 2 2028 5 view .LVU1885 + 6512 .loc 2 2028 5 view .LVU2004 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6030 .loc 2 2028 49 is_stmt 0 view .LVU1886 - 6031 0034 0001 lsls r0, r0, #4 - 6032 .LVL569: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6033 .loc 2 2028 49 view .LVU1887 - 6034 0036 C0B2 uxtb r0, r0 -2028:Drivers/CMSIS/Include/core_cm7.h **** } - ARM GAS /tmp/ccuHnxNu.s page 344 + ARM GAS /tmp/ccLSPxIe.s page 358 - 6035 .loc 2 2028 47 view .LVU1888 - 6036 0038 124B ldr r3, .L322+8 - 6037 003a 83F83703 strb r0, [r3, #823] - 6038 .LVL570: + 6513 .loc 2 2028 49 is_stmt 0 view .LVU2005 + 6514 0034 0001 lsls r0, r0, #4 + 6515 .LVL607: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6039 .loc 2 2028 47 view .LVU1889 - 6040 .LBE547: - 6041 .LBE546: -1721:Src/main.c **** - 6042 .loc 1 1721 3 is_stmt 1 view .LVU1890 - 6043 .LBB548: - 6044 .LBI548: + 6516 .loc 2 2028 49 view .LVU2006 + 6517 0036 C0B2 uxtb r0, r0 +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 6518 .loc 2 2028 47 view .LVU2007 + 6519 0038 124B ldr r3, .L372+8 + 6520 003a 83F83703 strb r0, [r3, #823] + 6521 .LVL608: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 6522 .loc 2 2028 47 view .LVU2008 + 6523 .LBE552: + 6524 .LBE551: +1815:Src/main.c **** + 6525 .loc 1 1815 3 is_stmt 1 view .LVU2009 + 6526 .LBB553: + 6527 .LBI553: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 6045 .loc 2 1896 22 view .LVU1891 - 6046 .LBB549: + 6528 .loc 2 1896 22 view .LVU2010 + 6529 .LBB554: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 6047 .loc 2 1898 3 view .LVU1892 + 6530 .loc 2 1898 3 view .LVU2011 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6048 .loc 2 1900 5 view .LVU1893 + 6531 .loc 2 1900 5 view .LVU2012 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6049 .loc 2 1900 43 is_stmt 0 view .LVU1894 - 6050 003e 4FF40002 mov r2, #8388608 - 6051 0042 5A60 str r2, [r3, #4] - 6052 .LVL571: + 6532 .loc 2 1900 43 is_stmt 0 view .LVU2013 + 6533 003e 4FF40002 mov r2, #8388608 + 6534 0042 5A60 str r2, [r3, #4] + 6535 .LVL609: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6053 .loc 2 1900 43 view .LVU1895 - 6054 .LBE549: - 6055 .LBE548: -1726:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 6056 .loc 1 1726 3 is_stmt 1 view .LVU1896 -1726:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 6057 .loc 1 1726 28 is_stmt 0 view .LVU1897 - 6058 0044 40F29733 movw r3, #919 - 6059 0048 ADF80430 strh r3, [sp, #4] @ movhi -1727:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 6060 .loc 1 1727 3 is_stmt 1 view .LVU1898 -1727:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 6061 .loc 1 1727 30 is_stmt 0 view .LVU1899 - 6062 004c 0294 str r4, [sp, #8] -1728:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 6063 .loc 1 1728 3 is_stmt 1 view .LVU1900 -1728:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 6064 .loc 1 1728 29 is_stmt 0 view .LVU1901 - 6065 004e 6323 movs r3, #99 - 6066 0050 0393 str r3, [sp, #12] -1729:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); - 6067 .loc 1 1729 3 is_stmt 1 view .LVU1902 - 6068 0052 0D4C ldr r4, .L322+12 - 6069 0054 01A9 add r1, sp, #4 - 6070 0056 2046 mov r0, r4 - 6071 0058 FFF7FEFF bl LL_TIM_Init - 6072 .LVL572: -1730:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); - 6073 .loc 1 1730 3 view .LVU1903 - 6074 .LBB550: - 6075 .LBI550: + 6536 .loc 2 1900 43 view .LVU2014 + 6537 .LBE554: + 6538 .LBE553: +1820:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6539 .loc 1 1820 3 is_stmt 1 view .LVU2015 +1820:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6540 .loc 1 1820 28 is_stmt 0 view .LVU2016 + 6541 0044 40F29733 movw r3, #919 + 6542 0048 ADF80430 strh r3, [sp, #4] @ movhi +1821:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 6543 .loc 1 1821 3 is_stmt 1 view .LVU2017 +1821:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 6544 .loc 1 1821 30 is_stmt 0 view .LVU2018 + 6545 004c 0294 str r4, [sp, #8] +1822:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 6546 .loc 1 1822 3 is_stmt 1 view .LVU2019 +1822:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 6547 .loc 1 1822 29 is_stmt 0 view .LVU2020 + 6548 004e 6323 movs r3, #99 + 6549 0050 0393 str r3, [sp, #12] +1823:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); + 6550 .loc 1 1823 3 is_stmt 1 view .LVU2021 + 6551 0052 0D4C ldr r4, .L372+12 + 6552 0054 01A9 add r1, sp, #4 + 6553 0056 2046 mov r0, r4 + ARM GAS /tmp/ccLSPxIe.s page 359 + + + 6554 0058 FFF7FEFF bl LL_TIM_Init + 6555 .LVL610: +1824:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); + 6556 .loc 1 1824 3 view .LVU2022 + 6557 .LBB555: + 6558 .LBI555: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccuHnxNu.s page 345 - - - 6076 .loc 5 1504 22 view .LVU1904 - 6077 .LBB551: + 6559 .loc 5 1504 22 view .LVU2023 + 6560 .LBB556: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6078 .loc 5 1506 3 view .LVU1905 - 6079 005c 2368 ldr r3, [r4] - 6080 005e 23F08003 bic r3, r3, #128 - 6081 0062 2360 str r3, [r4] - 6082 .LVL573: + 6561 .loc 5 1506 3 view .LVU2024 + 6562 005c 2368 ldr r3, [r4] + 6563 005e 23F08003 bic r3, r3, #128 + 6564 0062 2360 str r3, [r4] + 6565 .LVL611: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6083 .loc 5 1506 3 is_stmt 0 view .LVU1906 - 6084 .LBE551: - 6085 .LBE550: -1731:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); - 6086 .loc 1 1731 3 is_stmt 1 view .LVU1907 - 6087 .LBB552: - 6088 .LBI552: + 6566 .loc 5 1506 3 is_stmt 0 view .LVU2025 + 6567 .LBE556: + 6568 .LBE555: +1825:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); + 6569 .loc 1 1825 3 is_stmt 1 view .LVU2026 + 6570 .LBB557: + 6571 .LBI557: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6089 .loc 5 3138 22 view .LVU1908 - 6090 .LBB553: + 6572 .loc 5 3138 22 view .LVU2027 + 6573 .LBB558: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6091 .loc 5 3140 3 view .LVU1909 - 6092 0064 6368 ldr r3, [r4, #4] - 6093 0066 23F07003 bic r3, r3, #112 - 6094 006a 43F01003 orr r3, r3, #16 - 6095 006e 6360 str r3, [r4, #4] - 6096 .LVL574: + 6574 .loc 5 3140 3 view .LVU2028 + 6575 0064 6368 ldr r3, [r4, #4] + 6576 0066 23F07003 bic r3, r3, #112 + 6577 006a 43F01003 orr r3, r3, #16 + 6578 006e 6360 str r3, [r4, #4] + 6579 .LVL612: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6097 .loc 5 3140 3 is_stmt 0 view .LVU1910 - 6098 .LBE553: - 6099 .LBE552: -1732:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ - 6100 .loc 1 1732 3 is_stmt 1 view .LVU1911 - 6101 .LBB554: - 6102 .LBI554: + 6580 .loc 5 3140 3 is_stmt 0 view .LVU2029 + 6581 .LBE558: + 6582 .LBE557: +1826:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ + 6583 .loc 1 1826 3 is_stmt 1 view .LVU2030 + 6584 .LBB559: + 6585 .LBI559: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6103 .loc 5 3235 22 view .LVU1912 - 6104 .LBB555: - 6105 .loc 5 3237 3 view .LVU1913 - 6106 0070 A368 ldr r3, [r4, #8] - 6107 0072 23F08003 bic r3, r3, #128 - 6108 0076 A360 str r3, [r4, #8] - 6109 .LVL575: - 6110 .loc 5 3237 3 is_stmt 0 view .LVU1914 - 6111 .LBE555: - 6112 .LBE554: -1737:Src/main.c **** - 6113 .loc 1 1737 1 view .LVU1915 - 6114 0078 06B0 add sp, sp, #24 - 6115 .LCFI63: - 6116 .cfi_def_cfa_offset 8 - 6117 @ sp needed - 6118 007a 10BD pop {r4, pc} - 6119 .L323: - 6120 .align 2 - 6121 .L322: - 6122 007c 00380240 .word 1073887232 - 6123 0080 00ED00E0 .word -536810240 - ARM GAS /tmp/ccuHnxNu.s page 346 + 6586 .loc 5 3235 22 view .LVU2031 + 6587 .LBB560: + 6588 .loc 5 3237 3 view .LVU2032 + 6589 0070 A368 ldr r3, [r4, #8] + 6590 0072 23F08003 bic r3, r3, #128 + 6591 0076 A360 str r3, [r4, #8] + 6592 .LVL613: + 6593 .loc 5 3237 3 is_stmt 0 view .LVU2033 + 6594 .LBE560: + 6595 .LBE559: +1831:Src/main.c **** + 6596 .loc 1 1831 1 view .LVU2034 + 6597 0078 06B0 add sp, sp, #24 + 6598 .LCFI66: + 6599 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccLSPxIe.s page 360 - 6124 0084 00E100E0 .word -536813312 - 6125 0088 00140040 .word 1073746944 - 6126 .cfi_endproc - 6127 .LFE1199: - 6129 .section .text.MX_TIM6_Init,"ax",%progbits - 6130 .align 1 - 6131 .syntax unified - 6132 .thumb - 6133 .thumb_func - 6135 MX_TIM6_Init: - 6136 .LFB1198: -1671:Src/main.c **** - 6137 .loc 1 1671 1 is_stmt 1 view -0 - 6138 .cfi_startproc - 6139 @ args = 0, pretend = 0, frame = 24 - 6140 @ frame_needed = 0, uses_anonymous_args = 0 - 6141 0000 10B5 push {r4, lr} - 6142 .LCFI64: - 6143 .cfi_def_cfa_offset 8 - 6144 .cfi_offset 4, -8 - 6145 .cfi_offset 14, -4 - 6146 0002 86B0 sub sp, sp, #24 - 6147 .LCFI65: - 6148 .cfi_def_cfa_offset 32 -1677:Src/main.c **** - 6149 .loc 1 1677 3 view .LVU1917 -1677:Src/main.c **** - 6150 .loc 1 1677 22 is_stmt 0 view .LVU1918 - 6151 0004 0024 movs r4, #0 - 6152 0006 0194 str r4, [sp, #4] - 6153 0008 0294 str r4, [sp, #8] - 6154 000a 0394 str r4, [sp, #12] - 6155 000c 0494 str r4, [sp, #16] - 6156 000e 0594 str r4, [sp, #20] -1680:Src/main.c **** - 6157 .loc 1 1680 3 is_stmt 1 view .LVU1919 - 6158 .LVL576: - 6159 .LBB556: - 6160 .LBI556: + 6600 @ sp needed + 6601 007a 10BD pop {r4, pc} + 6602 .L373: + 6603 .align 2 + 6604 .L372: + 6605 007c 00380240 .word 1073887232 + 6606 0080 00ED00E0 .word -536810240 + 6607 0084 00E100E0 .word -536813312 + 6608 0088 00140040 .word 1073746944 + 6609 .cfi_endproc + 6610 .LFE1199: + 6612 .section .text.MX_TIM6_Init,"ax",%progbits + 6613 .align 1 + 6614 .syntax unified + 6615 .thumb + 6616 .thumb_func + 6618 MX_TIM6_Init: + 6619 .LFB1198: +1765:Src/main.c **** + 6620 .loc 1 1765 1 is_stmt 1 view -0 + 6621 .cfi_startproc + 6622 @ args = 0, pretend = 0, frame = 24 + 6623 @ frame_needed = 0, uses_anonymous_args = 0 + 6624 0000 10B5 push {r4, lr} + 6625 .LCFI67: + 6626 .cfi_def_cfa_offset 8 + 6627 .cfi_offset 4, -8 + 6628 .cfi_offset 14, -4 + 6629 0002 86B0 sub sp, sp, #24 + 6630 .LCFI68: + 6631 .cfi_def_cfa_offset 32 +1771:Src/main.c **** + 6632 .loc 1 1771 3 view .LVU2036 +1771:Src/main.c **** + 6633 .loc 1 1771 22 is_stmt 0 view .LVU2037 + 6634 0004 0024 movs r4, #0 + 6635 0006 0194 str r4, [sp, #4] + 6636 0008 0294 str r4, [sp, #8] + 6637 000a 0394 str r4, [sp, #12] + 6638 000c 0494 str r4, [sp, #16] + 6639 000e 0594 str r4, [sp, #20] +1774:Src/main.c **** + 6640 .loc 1 1774 3 is_stmt 1 view .LVU2038 + 6641 .LVL614: + 6642 .LBB561: + 6643 .LBI561: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 6161 .loc 3 1071 22 view .LVU1920 - 6162 .LBB557: + 6644 .loc 3 1071 22 view .LVU2039 + 6645 .LBB562: 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); - 6163 .loc 3 1073 3 view .LVU1921 + 6646 .loc 3 1073 3 view .LVU2040 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 6164 .loc 3 1074 3 view .LVU1922 - 6165 0010 1A4B ldr r3, .L326 - 6166 0012 1A6C ldr r2, [r3, #64] - 6167 0014 42F01002 orr r2, r2, #16 - 6168 0018 1A64 str r2, [r3, #64] -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6169 .loc 3 1076 3 view .LVU1923 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 6170 .loc 3 1076 12 is_stmt 0 view .LVU1924 - 6171 001a 1B6C ldr r3, [r3, #64] - 6172 001c 03F01003 and r3, r3, #16 -1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - ARM GAS /tmp/ccuHnxNu.s page 347 + 6647 .loc 3 1074 3 view .LVU2041 + 6648 0010 1A4B ldr r3, .L376 + 6649 0012 1A6C ldr r2, [r3, #64] + 6650 0014 42F01002 orr r2, r2, #16 + 6651 0018 1A64 str r2, [r3, #64] + ARM GAS /tmp/ccLSPxIe.s page 361 - 6173 .loc 3 1076 10 view .LVU1925 - 6174 0020 0093 str r3, [sp] +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 6652 .loc 3 1076 3 view .LVU2042 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 6653 .loc 3 1076 12 is_stmt 0 view .LVU2043 + 6654 001a 1B6C ldr r3, [r3, #64] + 6655 001c 03F01003 and r3, r3, #16 +1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + 6656 .loc 3 1076 10 view .LVU2044 + 6657 0020 0093 str r3, [sp] 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 6175 .loc 3 1077 3 is_stmt 1 view .LVU1926 - 6176 0022 009B ldr r3, [sp] - 6177 .LVL577: + 6658 .loc 3 1077 3 is_stmt 1 view .LVU2045 + 6659 0022 009B ldr r3, [sp] + 6660 .LVL615: 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 6178 .loc 3 1077 3 is_stmt 0 view .LVU1927 - 6179 .LBE557: - 6180 .LBE556: -1683:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 6181 .loc 1 1683 3 is_stmt 1 view .LVU1928 - 6182 .LBB558: - 6183 .LBI558: + 6661 .loc 3 1077 3 is_stmt 0 view .LVU2046 + 6662 .LBE562: + 6663 .LBE561: +1777:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 6664 .loc 1 1777 3 is_stmt 1 view .LVU2047 + 6665 .LBB563: + 6666 .LBI563: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 6184 .loc 2 1884 26 view .LVU1929 - 6185 .LBB559: + 6667 .loc 2 1884 26 view .LVU2048 + 6668 .LBB564: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 6186 .loc 2 1886 3 view .LVU1930 + 6669 .loc 2 1886 3 view .LVU2049 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 6187 .loc 2 1886 26 is_stmt 0 view .LVU1931 - 6188 0024 164B ldr r3, .L326+4 - 6189 0026 D868 ldr r0, [r3, #12] - 6190 .LBE559: - 6191 .LBE558: -1683:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 6192 .loc 1 1683 3 discriminator 1 view .LVU1932 - 6193 0028 2246 mov r2, r4 - 6194 002a 2146 mov r1, r4 - 6195 002c C0F30220 ubfx r0, r0, #8, #3 - 6196 0030 FFF7FEFF bl NVIC_EncodePriority - 6197 .LVL578: - 6198 .LBB560: - 6199 .LBI560: + 6670 .loc 2 1886 26 is_stmt 0 view .LVU2050 + 6671 0024 164B ldr r3, .L376+4 + 6672 0026 D868 ldr r0, [r3, #12] + 6673 .LBE564: + 6674 .LBE563: +1777:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 6675 .loc 1 1777 3 discriminator 1 view .LVU2051 + 6676 0028 2246 mov r2, r4 + 6677 002a 2146 mov r1, r4 + 6678 002c C0F30220 ubfx r0, r0, #8, #3 + 6679 0030 FFF7FEFF bl NVIC_EncodePriority + 6680 .LVL616: + 6681 .LBB565: + 6682 .LBI565: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 6200 .loc 2 2024 22 is_stmt 1 view .LVU1933 - 6201 .LBB561: + 6683 .loc 2 2024 22 is_stmt 1 view .LVU2052 + 6684 .LBB566: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 6202 .loc 2 2026 3 view .LVU1934 + 6685 .loc 2 2026 3 view .LVU2053 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6203 .loc 2 2028 5 view .LVU1935 + 6686 .loc 2 2028 5 view .LVU2054 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6204 .loc 2 2028 49 is_stmt 0 view .LVU1936 - 6205 0034 0001 lsls r0, r0, #4 - 6206 .LVL579: + 6687 .loc 2 2028 49 is_stmt 0 view .LVU2055 + 6688 0034 0001 lsls r0, r0, #4 + 6689 .LVL617: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6207 .loc 2 2028 49 view .LVU1937 - 6208 0036 C0B2 uxtb r0, r0 + 6690 .loc 2 2028 49 view .LVU2056 + 6691 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6209 .loc 2 2028 47 view .LVU1938 - 6210 0038 124B ldr r3, .L326+8 - 6211 003a 83F83603 strb r0, [r3, #822] - 6212 .LVL580: -2028:Drivers/CMSIS/Include/core_cm7.h **** } - 6213 .loc 2 2028 47 view .LVU1939 - 6214 .LBE561: - 6215 .LBE560: - ARM GAS /tmp/ccuHnxNu.s page 348 + 6692 .loc 2 2028 47 view .LVU2057 + ARM GAS /tmp/ccLSPxIe.s page 362 -1684:Src/main.c **** - 6216 .loc 1 1684 3 is_stmt 1 view .LVU1940 - 6217 .LBB562: - 6218 .LBI562: + 6693 0038 124B ldr r3, .L376+8 + 6694 003a 83F83603 strb r0, [r3, #822] + 6695 .LVL618: +2028:Drivers/CMSIS/Include/core_cm7.h **** } + 6696 .loc 2 2028 47 view .LVU2058 + 6697 .LBE566: + 6698 .LBE565: +1778:Src/main.c **** + 6699 .loc 1 1778 3 is_stmt 1 view .LVU2059 + 6700 .LBB567: + 6701 .LBI567: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 6219 .loc 2 1896 22 view .LVU1941 - 6220 .LBB563: + 6702 .loc 2 1896 22 view .LVU2060 + 6703 .LBB568: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 6221 .loc 2 1898 3 view .LVU1942 + 6704 .loc 2 1898 3 view .LVU2061 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6222 .loc 2 1900 5 view .LVU1943 + 6705 .loc 2 1900 5 view .LVU2062 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6223 .loc 2 1900 43 is_stmt 0 view .LVU1944 - 6224 003e 4FF48002 mov r2, #4194304 - 6225 0042 5A60 str r2, [r3, #4] - 6226 .LVL581: + 6706 .loc 2 1900 43 is_stmt 0 view .LVU2063 + 6707 003e 4FF48002 mov r2, #4194304 + 6708 0042 5A60 str r2, [r3, #4] + 6709 .LVL619: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 6227 .loc 2 1900 43 view .LVU1945 - 6228 .LBE563: - 6229 .LBE562: -1689:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 6230 .loc 1 1689 3 is_stmt 1 view .LVU1946 -1689:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 6231 .loc 1 1689 28 is_stmt 0 view .LVU1947 - 6232 0044 4BF2AF33 movw r3, #45999 - 6233 0048 ADF80430 strh r3, [sp, #4] @ movhi -1690:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 6234 .loc 1 1690 3 is_stmt 1 view .LVU1948 -1690:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 6235 .loc 1 1690 30 is_stmt 0 view .LVU1949 - 6236 004c 0294 str r4, [sp, #8] -1691:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 6237 .loc 1 1691 3 is_stmt 1 view .LVU1950 -1691:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 6238 .loc 1 1691 29 is_stmt 0 view .LVU1951 - 6239 004e 1323 movs r3, #19 - 6240 0050 0393 str r3, [sp, #12] -1692:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); - 6241 .loc 1 1692 3 is_stmt 1 view .LVU1952 - 6242 0052 0D4C ldr r4, .L326+12 - 6243 0054 01A9 add r1, sp, #4 - 6244 0056 2046 mov r0, r4 - 6245 0058 FFF7FEFF bl LL_TIM_Init - 6246 .LVL582: -1693:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); - 6247 .loc 1 1693 3 view .LVU1953 - 6248 .LBB564: - 6249 .LBI564: + 6710 .loc 2 1900 43 view .LVU2064 + 6711 .LBE568: + 6712 .LBE567: +1783:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6713 .loc 1 1783 3 is_stmt 1 view .LVU2065 +1783:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 6714 .loc 1 1783 28 is_stmt 0 view .LVU2066 + 6715 0044 4BF2AF33 movw r3, #45999 + 6716 0048 ADF80430 strh r3, [sp, #4] @ movhi +1784:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 6717 .loc 1 1784 3 is_stmt 1 view .LVU2067 +1784:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 6718 .loc 1 1784 30 is_stmt 0 view .LVU2068 + 6719 004c 0294 str r4, [sp, #8] +1785:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 6720 .loc 1 1785 3 is_stmt 1 view .LVU2069 +1785:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 6721 .loc 1 1785 29 is_stmt 0 view .LVU2070 + 6722 004e 1323 movs r3, #19 + 6723 0050 0393 str r3, [sp, #12] +1786:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); + 6724 .loc 1 1786 3 is_stmt 1 view .LVU2071 + 6725 0052 0D4C ldr r4, .L376+12 + 6726 0054 01A9 add r1, sp, #4 + 6727 0056 2046 mov r0, r4 + 6728 0058 FFF7FEFF bl LL_TIM_Init + 6729 .LVL620: +1787:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); + 6730 .loc 1 1787 3 view .LVU2072 + 6731 .LBB569: + 6732 .LBI569: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6250 .loc 5 1504 22 view .LVU1954 - 6251 .LBB565: -1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6252 .loc 5 1506 3 view .LVU1955 - 6253 005c 2368 ldr r3, [r4] - 6254 005e 23F08003 bic r3, r3, #128 - 6255 0062 2360 str r3, [r4] - 6256 .LVL583: - ARM GAS /tmp/ccuHnxNu.s page 349 + 6733 .loc 5 1504 22 view .LVU2073 + ARM GAS /tmp/ccLSPxIe.s page 363 + 6734 .LBB570: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6257 .loc 5 1506 3 is_stmt 0 view .LVU1956 - 6258 .LBE565: - 6259 .LBE564: -1694:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); - 6260 .loc 1 1694 3 is_stmt 1 view .LVU1957 - 6261 .LBB566: - 6262 .LBI566: + 6735 .loc 5 1506 3 view .LVU2074 + 6736 005c 2368 ldr r3, [r4] + 6737 005e 23F08003 bic r3, r3, #128 + 6738 0062 2360 str r3, [r4] + 6739 .LVL621: +1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 6740 .loc 5 1506 3 is_stmt 0 view .LVU2075 + 6741 .LBE570: + 6742 .LBE569: +1788:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); + 6743 .loc 1 1788 3 is_stmt 1 view .LVU2076 + 6744 .LBB571: + 6745 .LBI571: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6263 .loc 5 3138 22 view .LVU1958 - 6264 .LBB567: + 6746 .loc 5 3138 22 view .LVU2077 + 6747 .LBB572: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6265 .loc 5 3140 3 view .LVU1959 - 6266 0064 6368 ldr r3, [r4, #4] - 6267 0066 23F07003 bic r3, r3, #112 - 6268 006a 43F01003 orr r3, r3, #16 - 6269 006e 6360 str r3, [r4, #4] - 6270 .LVL584: + 6748 .loc 5 3140 3 view .LVU2078 + 6749 0064 6368 ldr r3, [r4, #4] + 6750 0066 23F07003 bic r3, r3, #112 + 6751 006a 43F01003 orr r3, r3, #16 + 6752 006e 6360 str r3, [r4, #4] + 6753 .LVL622: 3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6271 .loc 5 3140 3 is_stmt 0 view .LVU1960 - 6272 .LBE567: - 6273 .LBE566: -1695:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ - 6274 .loc 1 1695 3 is_stmt 1 view .LVU1961 - 6275 .LBB568: - 6276 .LBI568: + 6754 .loc 5 3140 3 is_stmt 0 view .LVU2079 + 6755 .LBE572: + 6756 .LBE571: +1789:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ + 6757 .loc 1 1789 3 is_stmt 1 view .LVU2080 + 6758 .LBB573: + 6759 .LBI573: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6277 .loc 5 3235 22 view .LVU1962 - 6278 .LBB569: - 6279 .loc 5 3237 3 view .LVU1963 - 6280 0070 A368 ldr r3, [r4, #8] - 6281 0072 23F08003 bic r3, r3, #128 - 6282 0076 A360 str r3, [r4, #8] - 6283 .LVL585: - 6284 .loc 5 3237 3 is_stmt 0 view .LVU1964 - 6285 .LBE569: - 6286 .LBE568: -1700:Src/main.c **** - 6287 .loc 1 1700 1 view .LVU1965 - 6288 0078 06B0 add sp, sp, #24 - 6289 .LCFI66: - 6290 .cfi_def_cfa_offset 8 - 6291 @ sp needed - 6292 007a 10BD pop {r4, pc} - 6293 .L327: - 6294 .align 2 - 6295 .L326: - 6296 007c 00380240 .word 1073887232 - 6297 0080 00ED00E0 .word -536810240 - 6298 0084 00E100E0 .word -536813312 - 6299 0088 00100040 .word 1073745920 - 6300 .cfi_endproc - 6301 .LFE1198: - 6303 .section .rodata.Init_params.str1.4,"aMS",%progbits,1 - 6304 .align 2 - 6305 .LC0: - 6306 0000 2F00 .ascii "/\000" - ARM GAS /tmp/ccuHnxNu.s page 350 + 6760 .loc 5 3235 22 view .LVU2081 + 6761 .LBB574: + 6762 .loc 5 3237 3 view .LVU2082 + 6763 0070 A368 ldr r3, [r4, #8] + 6764 0072 23F08003 bic r3, r3, #128 + 6765 0076 A360 str r3, [r4, #8] + 6766 .LVL623: + 6767 .loc 5 3237 3 is_stmt 0 view .LVU2083 + 6768 .LBE574: + 6769 .LBE573: +1794:Src/main.c **** + 6770 .loc 1 1794 1 view .LVU2084 + 6771 0078 06B0 add sp, sp, #24 + 6772 .LCFI69: + 6773 .cfi_def_cfa_offset 8 + 6774 @ sp needed + 6775 007a 10BD pop {r4, pc} + 6776 .L377: + 6777 .align 2 + 6778 .L376: + 6779 007c 00380240 .word 1073887232 + 6780 0080 00ED00E0 .word -536810240 + 6781 0084 00E100E0 .word -536813312 + ARM GAS /tmp/ccLSPxIe.s page 364 - 6307 0002 0000 .align 2 - 6308 .LC1: - 6309 0004 434F4D4D .ascii "COMMAND.TXT\000" - 6309 414E442E - 6309 54585400 - 6310 .section .text.Init_params,"ax",%progbits - 6311 .align 1 - 6312 .syntax unified - 6313 .thumb - 6314 .thumb_func - 6316 Init_params: - 6317 .LFB1208: -2247:Src/main.c **** TO6 = 0; - 6318 .loc 1 2247 1 is_stmt 1 view -0 - 6319 .cfi_startproc - 6320 @ args = 0, pretend = 0, frame = 0 - 6321 @ frame_needed = 0, uses_anonymous_args = 0 - 6322 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} - 6323 .LCFI67: - 6324 .cfi_def_cfa_offset 32 - 6325 .cfi_offset 3, -32 - 6326 .cfi_offset 4, -28 - 6327 .cfi_offset 5, -24 - 6328 .cfi_offset 6, -20 - 6329 .cfi_offset 7, -16 - 6330 .cfi_offset 8, -12 - 6331 .cfi_offset 9, -8 - 6332 .cfi_offset 14, -4 -2248:Src/main.c **** TO7 = 0; - 6333 .loc 1 2248 2 view .LVU1967 -2248:Src/main.c **** TO7 = 0; - 6334 .loc 1 2248 6 is_stmt 0 view .LVU1968 - 6335 0004 0023 movs r3, #0 - 6336 0006 A34A ldr r2, .L340 - 6337 0008 1360 str r3, [r2] -2249:Src/main.c **** TO7_before = 0; - 6338 .loc 1 2249 2 is_stmt 1 view .LVU1969 -2249:Src/main.c **** TO7_before = 0; - 6339 .loc 1 2249 6 is_stmt 0 view .LVU1970 - 6340 000a A34A ldr r2, .L340+4 - 6341 000c 1360 str r3, [r2] -2250:Src/main.c **** TO6_before = 0; - 6342 .loc 1 2250 2 is_stmt 1 view .LVU1971 -2250:Src/main.c **** TO6_before = 0; - 6343 .loc 1 2250 13 is_stmt 0 view .LVU1972 - 6344 000e A34A ldr r2, .L340+8 - 6345 0010 1360 str r3, [r2] -2251:Src/main.c **** TO6_uart = 0; - 6346 .loc 1 2251 2 is_stmt 1 view .LVU1973 -2251:Src/main.c **** TO6_uart = 0; - 6347 .loc 1 2251 13 is_stmt 0 view .LVU1974 - 6348 0012 A34A ldr r2, .L340+12 - 6349 0014 1360 str r3, [r2] -2252:Src/main.c **** flg_tmt = 0; - 6350 .loc 1 2252 2 is_stmt 1 view .LVU1975 -2252:Src/main.c **** flg_tmt = 0; - 6351 .loc 1 2252 11 is_stmt 0 view .LVU1976 - ARM GAS /tmp/ccuHnxNu.s page 351 + 6782 0088 00100040 .word 1073745920 + 6783 .cfi_endproc + 6784 .LFE1198: + 6786 .section .rodata.Init_params.str1.4,"aMS",%progbits,1 + 6787 .align 2 + 6788 .LC0: + 6789 0000 2F00 .ascii "/\000" + 6790 0002 0000 .align 2 + 6791 .LC1: + 6792 0004 434F4D4D .ascii "COMMAND.TXT\000" + 6792 414E442E + 6792 54585400 + 6793 .section .text.Init_params,"ax",%progbits + 6794 .align 1 + 6795 .syntax unified + 6796 .thumb + 6797 .thumb_func + 6799 Init_params: + 6800 .LFB1208: +2341:Src/main.c **** TO6 = 0; + 6801 .loc 1 2341 1 is_stmt 1 view -0 + 6802 .cfi_startproc + 6803 @ args = 0, pretend = 0, frame = 0 + 6804 @ frame_needed = 0, uses_anonymous_args = 0 + 6805 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 6806 .LCFI70: + 6807 .cfi_def_cfa_offset 32 + 6808 .cfi_offset 3, -32 + 6809 .cfi_offset 4, -28 + 6810 .cfi_offset 5, -24 + 6811 .cfi_offset 6, -20 + 6812 .cfi_offset 7, -16 + 6813 .cfi_offset 8, -12 + 6814 .cfi_offset 9, -8 + 6815 .cfi_offset 14, -4 +2342:Src/main.c **** TO7 = 0; + 6816 .loc 1 2342 2 view .LVU2086 +2342:Src/main.c **** TO7 = 0; + 6817 .loc 1 2342 6 is_stmt 0 view .LVU2087 + 6818 0004 0023 movs r3, #0 + 6819 0006 A34A ldr r2, .L390 + 6820 0008 1360 str r3, [r2] +2343:Src/main.c **** TO7_before = 0; + 6821 .loc 1 2343 2 is_stmt 1 view .LVU2088 +2343:Src/main.c **** TO7_before = 0; + 6822 .loc 1 2343 6 is_stmt 0 view .LVU2089 + 6823 000a A34A ldr r2, .L390+4 + 6824 000c 1360 str r3, [r2] +2344:Src/main.c **** TO6_before = 0; + 6825 .loc 1 2344 2 is_stmt 1 view .LVU2090 +2344:Src/main.c **** TO6_before = 0; + 6826 .loc 1 2344 13 is_stmt 0 view .LVU2091 + 6827 000e A34A ldr r2, .L390+8 + 6828 0010 1360 str r3, [r2] +2345:Src/main.c **** TO6_uart = 0; + 6829 .loc 1 2345 2 is_stmt 1 view .LVU2092 +2345:Src/main.c **** TO6_uart = 0; + ARM GAS /tmp/ccLSPxIe.s page 365 - 6352 0016 A34A ldr r2, .L340+16 - 6353 0018 1360 str r3, [r2] -2253:Src/main.c **** UART_rec_incr = 0; - 6354 .loc 1 2253 2 is_stmt 1 view .LVU1977 -2253:Src/main.c **** UART_rec_incr = 0; - 6355 .loc 1 2253 10 is_stmt 0 view .LVU1978 - 6356 001a A34A ldr r2, .L340+20 - 6357 001c 1370 strb r3, [r2] -2254:Src/main.c **** fgoto = 0; - 6358 .loc 1 2254 2 is_stmt 1 view .LVU1979 -2254:Src/main.c **** fgoto = 0; - 6359 .loc 1 2254 16 is_stmt 0 view .LVU1980 - 6360 001e A34A ldr r2, .L340+24 - 6361 0020 1380 strh r3, [r2] @ movhi -2255:Src/main.c **** sizeoffile = 0; - 6362 .loc 1 2255 2 is_stmt 1 view .LVU1981 -2255:Src/main.c **** sizeoffile = 0; - 6363 .loc 1 2255 8 is_stmt 0 view .LVU1982 - 6364 0022 A34A ldr r2, .L340+28 - 6365 0024 1360 str r3, [r2] -2256:Src/main.c **** u_tx_flg = 0; - 6366 .loc 1 2256 2 is_stmt 1 view .LVU1983 -2256:Src/main.c **** u_tx_flg = 0; - 6367 .loc 1 2256 13 is_stmt 0 view .LVU1984 - 6368 0026 A34A ldr r2, .L340+32 - 6369 0028 1360 str r3, [r2] -2257:Src/main.c **** u_rx_flg = 0; - 6370 .loc 1 2257 2 is_stmt 1 view .LVU1985 -2257:Src/main.c **** u_rx_flg = 0; - 6371 .loc 1 2257 11 is_stmt 0 view .LVU1986 - 6372 002a A34A ldr r2, .L340+36 - 6373 002c 1370 strb r3, [r2] -2258:Src/main.c **** //State_Data[0]=0; - 6374 .loc 1 2258 2 is_stmt 1 view .LVU1987 -2258:Src/main.c **** //State_Data[0]=0; - 6375 .loc 1 2258 11 is_stmt 0 view .LVU1988 - 6376 002e A34A ldr r2, .L340+40 - 6377 0030 1370 strb r3, [r2] -2261:Src/main.c **** { - 6378 .loc 1 2261 2 is_stmt 1 view .LVU1989 - 6379 .LBB570: -2261:Src/main.c **** { - 6380 .loc 1 2261 7 view .LVU1990 - 6381 .LVL586: -2261:Src/main.c **** { - 6382 .loc 1 2261 2 is_stmt 0 view .LVU1991 - 6383 0032 05E0 b .L329 - 6384 .LVL587: - 6385 .L330: -2263:Src/main.c **** } - 6386 .loc 1 2263 3 is_stmt 1 view .LVU1992 -2263:Src/main.c **** } - 6387 .loc 1 2263 16 is_stmt 0 view .LVU1993 - 6388 0034 A24A ldr r2, .L340+44 - 6389 0036 0021 movs r1, #0 - 6390 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi -2261:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 352 + 6830 .loc 1 2345 13 is_stmt 0 view .LVU2093 + 6831 0012 A34A ldr r2, .L390+12 + 6832 0014 1360 str r3, [r2] +2346:Src/main.c **** flg_tmt = 0; + 6833 .loc 1 2346 2 is_stmt 1 view .LVU2094 +2346:Src/main.c **** flg_tmt = 0; + 6834 .loc 1 2346 11 is_stmt 0 view .LVU2095 + 6835 0016 A34A ldr r2, .L390+16 + 6836 0018 1360 str r3, [r2] +2347:Src/main.c **** UART_rec_incr = 0; + 6837 .loc 1 2347 2 is_stmt 1 view .LVU2096 +2347:Src/main.c **** UART_rec_incr = 0; + 6838 .loc 1 2347 10 is_stmt 0 view .LVU2097 + 6839 001a A34A ldr r2, .L390+20 + 6840 001c 1370 strb r3, [r2] +2348:Src/main.c **** fgoto = 0; + 6841 .loc 1 2348 2 is_stmt 1 view .LVU2098 +2348:Src/main.c **** fgoto = 0; + 6842 .loc 1 2348 16 is_stmt 0 view .LVU2099 + 6843 001e A34A ldr r2, .L390+24 + 6844 0020 1380 strh r3, [r2] @ movhi +2349:Src/main.c **** sizeoffile = 0; + 6845 .loc 1 2349 2 is_stmt 1 view .LVU2100 +2349:Src/main.c **** sizeoffile = 0; + 6846 .loc 1 2349 8 is_stmt 0 view .LVU2101 + 6847 0022 A34A ldr r2, .L390+28 + 6848 0024 1360 str r3, [r2] +2350:Src/main.c **** u_tx_flg = 0; + 6849 .loc 1 2350 2 is_stmt 1 view .LVU2102 +2350:Src/main.c **** u_tx_flg = 0; + 6850 .loc 1 2350 13 is_stmt 0 view .LVU2103 + 6851 0026 A34A ldr r2, .L390+32 + 6852 0028 1360 str r3, [r2] +2351:Src/main.c **** u_rx_flg = 0; + 6853 .loc 1 2351 2 is_stmt 1 view .LVU2104 +2351:Src/main.c **** u_rx_flg = 0; + 6854 .loc 1 2351 11 is_stmt 0 view .LVU2105 + 6855 002a A34A ldr r2, .L390+36 + 6856 002c 1370 strb r3, [r2] +2352:Src/main.c **** //State_Data[0]=0; + 6857 .loc 1 2352 2 is_stmt 1 view .LVU2106 +2352:Src/main.c **** //State_Data[0]=0; + 6858 .loc 1 2352 11 is_stmt 0 view .LVU2107 + 6859 002e A34A ldr r2, .L390+40 + 6860 0030 1370 strb r3, [r2] +2355:Src/main.c **** { + 6861 .loc 1 2355 2 is_stmt 1 view .LVU2108 + 6862 .LBB575: +2355:Src/main.c **** { + 6863 .loc 1 2355 7 view .LVU2109 + 6864 .LVL624: +2355:Src/main.c **** { + 6865 .loc 1 2355 2 is_stmt 0 view .LVU2110 + 6866 0032 05E0 b .L379 + 6867 .LVL625: + 6868 .L380: +2357:Src/main.c **** } + ARM GAS /tmp/ccLSPxIe.s page 366 - 6391 .loc 1 2261 31 is_stmt 1 discriminator 3 view .LVU1994 - 6392 003c 0133 adds r3, r3, #1 - 6393 .LVL588: -2261:Src/main.c **** { - 6394 .loc 1 2261 31 is_stmt 0 discriminator 3 view .LVU1995 - 6395 003e 9BB2 uxth r3, r3 - 6396 .LVL589: - 6397 .L329: -2261:Src/main.c **** { - 6398 .loc 1 2261 22 is_stmt 1 discriminator 1 view .LVU1996 - 6399 0040 0E2B cmp r3, #14 - 6400 0042 F7D9 bls .L330 - 6401 .LBE570: -2265:Src/main.c **** - 6402 .loc 1 2265 2 view .LVU1997 -2265:Src/main.c **** - 6403 .loc 1 2265 14 is_stmt 0 view .LVU1998 - 6404 0044 9E4B ldr r3, .L340+44 - 6405 .LVL590: -2265:Src/main.c **** - 6406 .loc 1 2265 14 view .LVU1999 - 6407 0046 41F21112 movw r2, #4369 - 6408 004a 1A80 strh r2, [r3] @ movhi -2268:Src/main.c **** Def_setup.LD1_EN = 0; - 6409 .loc 1 2268 2 is_stmt 1 view .LVU2000 -2268:Src/main.c **** Def_setup.LD1_EN = 0; - 6410 .loc 1 2268 21 is_stmt 0 view .LVU2001 - 6411 004c 9D4B ldr r3, .L340+48 - 6412 004e 0022 movs r2, #0 - 6413 0050 DA81 strh r2, [r3, #14] @ movhi -2269:Src/main.c **** Def_setup.LD2_EN = 0; - 6414 .loc 1 2269 2 is_stmt 1 view .LVU2002 -2269:Src/main.c **** Def_setup.LD2_EN = 0; - 6415 .loc 1 2269 19 is_stmt 0 view .LVU2003 - 6416 0052 DA70 strb r2, [r3, #3] -2270:Src/main.c **** Def_setup.MES_ID = 0; - 6417 .loc 1 2270 2 is_stmt 1 view .LVU2004 -2270:Src/main.c **** Def_setup.MES_ID = 0; - 6418 .loc 1 2270 19 is_stmt 0 view .LVU2005 - 6419 0054 1A71 strb r2, [r3, #4] -2271:Src/main.c **** Def_setup.PI1_RD = 0; - 6420 .loc 1 2271 2 is_stmt 1 view .LVU2006 -2271:Src/main.c **** Def_setup.PI1_RD = 0; - 6421 .loc 1 2271 19 is_stmt 0 view .LVU2007 - 6422 0056 1A82 strh r2, [r3, #16] @ movhi -2272:Src/main.c **** Def_setup.PI2_RD = 0; - 6423 .loc 1 2272 2 is_stmt 1 view .LVU2008 -2272:Src/main.c **** Def_setup.PI2_RD = 0; - 6424 .loc 1 2272 19 is_stmt 0 view .LVU2009 - 6425 0058 1A73 strb r2, [r3, #12] -2273:Src/main.c **** Def_setup.REF1_EN = 0; - 6426 .loc 1 2273 2 is_stmt 1 view .LVU2010 -2273:Src/main.c **** Def_setup.REF1_EN = 0; - 6427 .loc 1 2273 19 is_stmt 0 view .LVU2011 - 6428 005a 5A73 strb r2, [r3, #13] -2274:Src/main.c **** Def_setup.REF2_EN = 0; - 6429 .loc 1 2274 2 is_stmt 1 view .LVU2012 - ARM GAS /tmp/ccuHnxNu.s page 353 + 6869 .loc 1 2357 3 is_stmt 1 view .LVU2111 +2357:Src/main.c **** } + 6870 .loc 1 2357 16 is_stmt 0 view .LVU2112 + 6871 0034 A24A ldr r2, .L390+44 + 6872 0036 0021 movs r1, #0 + 6873 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi +2355:Src/main.c **** { + 6874 .loc 1 2355 31 is_stmt 1 discriminator 3 view .LVU2113 + 6875 003c 0133 adds r3, r3, #1 + 6876 .LVL626: +2355:Src/main.c **** { + 6877 .loc 1 2355 31 is_stmt 0 discriminator 3 view .LVU2114 + 6878 003e 9BB2 uxth r3, r3 + 6879 .LVL627: + 6880 .L379: +2355:Src/main.c **** { + 6881 .loc 1 2355 22 is_stmt 1 discriminator 1 view .LVU2115 + 6882 0040 0E2B cmp r3, #14 + 6883 0042 F7D9 bls .L380 + 6884 .LBE575: +2359:Src/main.c **** + 6885 .loc 1 2359 2 view .LVU2116 +2359:Src/main.c **** + 6886 .loc 1 2359 14 is_stmt 0 view .LVU2117 + 6887 0044 9E4B ldr r3, .L390+44 + 6888 .LVL628: +2359:Src/main.c **** + 6889 .loc 1 2359 14 view .LVU2118 + 6890 0046 41F21112 movw r2, #4369 + 6891 004a 1A80 strh r2, [r3] @ movhi +2362:Src/main.c **** Def_setup.LD1_EN = 0; + 6892 .loc 1 2362 2 is_stmt 1 view .LVU2119 +2362:Src/main.c **** Def_setup.LD1_EN = 0; + 6893 .loc 1 2362 21 is_stmt 0 view .LVU2120 + 6894 004c 9D4B ldr r3, .L390+48 + 6895 004e 0022 movs r2, #0 + 6896 0050 DA81 strh r2, [r3, #14] @ movhi +2363:Src/main.c **** Def_setup.LD2_EN = 0; + 6897 .loc 1 2363 2 is_stmt 1 view .LVU2121 +2363:Src/main.c **** Def_setup.LD2_EN = 0; + 6898 .loc 1 2363 19 is_stmt 0 view .LVU2122 + 6899 0052 DA70 strb r2, [r3, #3] +2364:Src/main.c **** Def_setup.MES_ID = 0; + 6900 .loc 1 2364 2 is_stmt 1 view .LVU2123 +2364:Src/main.c **** Def_setup.MES_ID = 0; + 6901 .loc 1 2364 19 is_stmt 0 view .LVU2124 + 6902 0054 1A71 strb r2, [r3, #4] +2365:Src/main.c **** Def_setup.PI1_RD = 0; + 6903 .loc 1 2365 2 is_stmt 1 view .LVU2125 +2365:Src/main.c **** Def_setup.PI1_RD = 0; + 6904 .loc 1 2365 19 is_stmt 0 view .LVU2126 + 6905 0056 1A82 strh r2, [r3, #16] @ movhi +2366:Src/main.c **** Def_setup.PI2_RD = 0; + 6906 .loc 1 2366 2 is_stmt 1 view .LVU2127 +2366:Src/main.c **** Def_setup.PI2_RD = 0; + 6907 .loc 1 2366 19 is_stmt 0 view .LVU2128 + 6908 0058 1A73 strb r2, [r3, #12] + ARM GAS /tmp/ccLSPxIe.s page 367 -2274:Src/main.c **** Def_setup.REF2_EN = 0; - 6430 .loc 1 2274 20 is_stmt 0 view .LVU2013 - 6431 005c 5A71 strb r2, [r3, #5] -2275:Src/main.c **** Def_setup.SD_EN = 0; - 6432 .loc 1 2275 2 is_stmt 1 view .LVU2014 -2275:Src/main.c **** Def_setup.SD_EN = 0; - 6433 .loc 1 2275 20 is_stmt 0 view .LVU2015 - 6434 005e 9A71 strb r2, [r3, #6] -2276:Src/main.c **** Def_setup.TEC1_EN = 0; - 6435 .loc 1 2276 2 is_stmt 1 view .LVU2016 -2276:Src/main.c **** Def_setup.TEC1_EN = 0; - 6436 .loc 1 2276 18 is_stmt 0 view .LVU2017 - 6437 0060 DA72 strb r2, [r3, #11] -2277:Src/main.c **** Def_setup.TEC2_EN = 0; - 6438 .loc 1 2277 2 is_stmt 1 view .LVU2018 -2277:Src/main.c **** Def_setup.TEC2_EN = 0; - 6439 .loc 1 2277 20 is_stmt 0 view .LVU2019 - 6440 0062 DA71 strb r2, [r3, #7] -2278:Src/main.c **** Def_setup.TS1_EN = 0; - 6441 .loc 1 2278 2 is_stmt 1 view .LVU2020 -2278:Src/main.c **** Def_setup.TS1_EN = 0; - 6442 .loc 1 2278 20 is_stmt 0 view .LVU2021 - 6443 0064 1A72 strb r2, [r3, #8] -2279:Src/main.c **** Def_setup.TS2_EN = 0; - 6444 .loc 1 2279 2 is_stmt 1 view .LVU2022 -2279:Src/main.c **** Def_setup.TS2_EN = 0; - 6445 .loc 1 2279 19 is_stmt 0 view .LVU2023 - 6446 0066 5A72 strb r2, [r3, #9] -2280:Src/main.c **** Def_setup.U5V1_EN = 0; - 6447 .loc 1 2280 2 is_stmt 1 view .LVU2024 -2280:Src/main.c **** Def_setup.U5V1_EN = 0; - 6448 .loc 1 2280 19 is_stmt 0 view .LVU2025 - 6449 0068 9A72 strb r2, [r3, #10] -2281:Src/main.c **** Def_setup.U5V2_EN = 0; - 6450 .loc 1 2281 2 is_stmt 1 view .LVU2026 -2281:Src/main.c **** Def_setup.U5V2_EN = 0; - 6451 .loc 1 2281 20 is_stmt 0 view .LVU2027 - 6452 006a 5A70 strb r2, [r3, #1] -2282:Src/main.c **** Def_setup.WORK_EN = 0; - 6453 .loc 1 2282 2 is_stmt 1 view .LVU2028 -2282:Src/main.c **** Def_setup.WORK_EN = 0; - 6454 .loc 1 2282 20 is_stmt 0 view .LVU2029 - 6455 006c 9A70 strb r2, [r3, #2] -2283:Src/main.c **** - 6456 .loc 1 2283 2 is_stmt 1 view .LVU2030 -2283:Src/main.c **** - 6457 .loc 1 2283 20 is_stmt 0 view .LVU2031 - 6458 006e 1A70 strb r2, [r3] -2285:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 6459 .loc 1 2285 2 is_stmt 1 view .LVU2032 -2285:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 6460 .loc 1 2285 24 is_stmt 0 view .LVU2033 - 6461 0070 954D ldr r5, .L340+52 - 6462 0072 2A80 strh r2, [r5] @ movhi -2286:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 6463 .loc 1 2286 2 is_stmt 1 view .LVU2034 -2286:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - ARM GAS /tmp/ccuHnxNu.s page 354 +2367:Src/main.c **** Def_setup.REF1_EN = 0; + 6909 .loc 1 2367 2 is_stmt 1 view .LVU2129 +2367:Src/main.c **** Def_setup.REF1_EN = 0; + 6910 .loc 1 2367 19 is_stmt 0 view .LVU2130 + 6911 005a 5A73 strb r2, [r3, #13] +2368:Src/main.c **** Def_setup.REF2_EN = 0; + 6912 .loc 1 2368 2 is_stmt 1 view .LVU2131 +2368:Src/main.c **** Def_setup.REF2_EN = 0; + 6913 .loc 1 2368 20 is_stmt 0 view .LVU2132 + 6914 005c 5A71 strb r2, [r3, #5] +2369:Src/main.c **** Def_setup.SD_EN = 0; + 6915 .loc 1 2369 2 is_stmt 1 view .LVU2133 +2369:Src/main.c **** Def_setup.SD_EN = 0; + 6916 .loc 1 2369 20 is_stmt 0 view .LVU2134 + 6917 005e 9A71 strb r2, [r3, #6] +2370:Src/main.c **** Def_setup.TEC1_EN = 0; + 6918 .loc 1 2370 2 is_stmt 1 view .LVU2135 +2370:Src/main.c **** Def_setup.TEC1_EN = 0; + 6919 .loc 1 2370 18 is_stmt 0 view .LVU2136 + 6920 0060 DA72 strb r2, [r3, #11] +2371:Src/main.c **** Def_setup.TEC2_EN = 0; + 6921 .loc 1 2371 2 is_stmt 1 view .LVU2137 +2371:Src/main.c **** Def_setup.TEC2_EN = 0; + 6922 .loc 1 2371 20 is_stmt 0 view .LVU2138 + 6923 0062 DA71 strb r2, [r3, #7] +2372:Src/main.c **** Def_setup.TS1_EN = 0; + 6924 .loc 1 2372 2 is_stmt 1 view .LVU2139 +2372:Src/main.c **** Def_setup.TS1_EN = 0; + 6925 .loc 1 2372 20 is_stmt 0 view .LVU2140 + 6926 0064 1A72 strb r2, [r3, #8] +2373:Src/main.c **** Def_setup.TS2_EN = 0; + 6927 .loc 1 2373 2 is_stmt 1 view .LVU2141 +2373:Src/main.c **** Def_setup.TS2_EN = 0; + 6928 .loc 1 2373 19 is_stmt 0 view .LVU2142 + 6929 0066 5A72 strb r2, [r3, #9] +2374:Src/main.c **** Def_setup.U5V1_EN = 0; + 6930 .loc 1 2374 2 is_stmt 1 view .LVU2143 +2374:Src/main.c **** Def_setup.U5V1_EN = 0; + 6931 .loc 1 2374 19 is_stmt 0 view .LVU2144 + 6932 0068 9A72 strb r2, [r3, #10] +2375:Src/main.c **** Def_setup.U5V2_EN = 0; + 6933 .loc 1 2375 2 is_stmt 1 view .LVU2145 +2375:Src/main.c **** Def_setup.U5V2_EN = 0; + 6934 .loc 1 2375 20 is_stmt 0 view .LVU2146 + 6935 006a 5A70 strb r2, [r3, #1] +2376:Src/main.c **** Def_setup.WORK_EN = 0; + 6936 .loc 1 2376 2 is_stmt 1 view .LVU2147 +2376:Src/main.c **** Def_setup.WORK_EN = 0; + 6937 .loc 1 2376 20 is_stmt 0 view .LVU2148 + 6938 006c 9A70 strb r2, [r3, #2] +2377:Src/main.c **** + 6939 .loc 1 2377 2 is_stmt 1 view .LVU2149 +2377:Src/main.c **** + 6940 .loc 1 2377 20 is_stmt 0 view .LVU2150 + 6941 006e 1A70 strb r2, [r3] +2379:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 6942 .loc 1 2379 2 is_stmt 1 view .LVU2151 + ARM GAS /tmp/ccLSPxIe.s page 368 - 6464 .loc 1 2286 24 is_stmt 0 view .LVU2035 - 6465 0074 954C ldr r4, .L340+56 - 6466 0076 2280 strh r2, [r4] @ movhi -2287:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 6467 .loc 1 2287 2 is_stmt 1 view .LVU2036 -2287:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 6468 .loc 1 2287 28 is_stmt 0 view .LVU2037 - 6469 0078 0022 movs r2, #0 - 6470 007a 6A60 str r2, [r5, #4] @ float -2288:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 6471 .loc 1 2288 2 is_stmt 1 view .LVU2038 -2288:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 6472 .loc 1 2288 28 is_stmt 0 view .LVU2039 - 6473 007c 6260 str r2, [r4, #4] @ float -2289:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 6474 .loc 1 2289 2 is_stmt 1 view .LVU2040 -2289:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 6475 .loc 1 2289 28 is_stmt 0 view .LVU2041 - 6476 007e AA60 str r2, [r5, #8] @ float -2290:Src/main.c **** - 6477 .loc 1 2290 2 is_stmt 1 view .LVU2042 -2290:Src/main.c **** - 6478 .loc 1 2290 28 is_stmt 0 view .LVU2043 - 6479 0080 A260 str r2, [r4, #8] @ float -2293:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 6480 .loc 1 2293 2 is_stmt 1 view .LVU2044 -2293:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 6481 .loc 1 2293 13 is_stmt 0 view .LVU2045 - 6482 0082 934E ldr r6, .L340+60 - 6483 0084 9C46 mov ip, r3 - 6484 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3} - 6485 008a 0FC6 stmia r6!, {r0, r1, r2, r3} - 6486 008c DCF80030 ldr r3, [ip] - 6487 0090 3380 strh r3, [r6] @ movhi -2294:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 6488 .loc 1 2294 2 is_stmt 1 view .LVU2046 -2294:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 6489 .loc 1 2294 17 is_stmt 0 view .LVU2047 - 6490 0092 904E ldr r6, .L340+64 - 6491 0094 95E80F00 ldm r5, {r0, r1, r2, r3} - 6492 0098 86E80F00 stm r6, {r0, r1, r2, r3} -2295:Src/main.c **** - 6493 .loc 1 2295 2 is_stmt 1 view .LVU2048 -2295:Src/main.c **** - 6494 .loc 1 2295 17 is_stmt 0 view .LVU2049 - 6495 009c 8E4D ldr r5, .L340+68 - 6496 009e 94E80F00 ldm r4, {r0, r1, r2, r3} - 6497 00a2 85E80F00 stm r5, {r0, r1, r2, r3} -2300:Src/main.c **** LL_TIM_EnableCounter(TIM6); - 6498 .loc 1 2300 2 is_stmt 1 view .LVU2050 - 6499 .LVL591: - 6500 .LBB571: - 6501 .LBI571: +2379:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 6943 .loc 1 2379 24 is_stmt 0 view .LVU2152 + 6944 0070 954D ldr r5, .L390+52 + 6945 0072 2A80 strh r2, [r5] @ movhi +2380:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 6946 .loc 1 2380 2 is_stmt 1 view .LVU2153 +2380:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 6947 .loc 1 2380 24 is_stmt 0 view .LVU2154 + 6948 0074 954C ldr r4, .L390+56 + 6949 0076 2280 strh r2, [r4] @ movhi +2381:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 6950 .loc 1 2381 2 is_stmt 1 view .LVU2155 +2381:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 6951 .loc 1 2381 28 is_stmt 0 view .LVU2156 + 6952 0078 0022 movs r2, #0 + 6953 007a 6A60 str r2, [r5, #4] @ float +2382:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 6954 .loc 1 2382 2 is_stmt 1 view .LVU2157 +2382:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 6955 .loc 1 2382 28 is_stmt 0 view .LVU2158 + 6956 007c 6260 str r2, [r4, #4] @ float +2383:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 6957 .loc 1 2383 2 is_stmt 1 view .LVU2159 +2383:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 6958 .loc 1 2383 28 is_stmt 0 view .LVU2160 + 6959 007e AA60 str r2, [r5, #8] @ float +2384:Src/main.c **** + 6960 .loc 1 2384 2 is_stmt 1 view .LVU2161 +2384:Src/main.c **** + 6961 .loc 1 2384 28 is_stmt 0 view .LVU2162 + 6962 0080 A260 str r2, [r4, #8] @ float +2387:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 6963 .loc 1 2387 2 is_stmt 1 view .LVU2163 +2387:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 6964 .loc 1 2387 13 is_stmt 0 view .LVU2164 + 6965 0082 934E ldr r6, .L390+60 + 6966 0084 9C46 mov ip, r3 + 6967 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3} + 6968 008a 0FC6 stmia r6!, {r0, r1, r2, r3} + 6969 008c DCF80030 ldr r3, [ip] + 6970 0090 3380 strh r3, [r6] @ movhi +2388:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 6971 .loc 1 2388 2 is_stmt 1 view .LVU2165 +2388:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 6972 .loc 1 2388 17 is_stmt 0 view .LVU2166 + 6973 0092 904E ldr r6, .L390+64 + 6974 0094 95E80F00 ldm r5, {r0, r1, r2, r3} + 6975 0098 86E80F00 stm r6, {r0, r1, r2, r3} +2389:Src/main.c **** + 6976 .loc 1 2389 2 is_stmt 1 view .LVU2167 +2389:Src/main.c **** + 6977 .loc 1 2389 17 is_stmt 0 view .LVU2168 + 6978 009c 8E4D ldr r5, .L390+68 + 6979 009e 94E80F00 ldm r4, {r0, r1, r2, r3} + 6980 00a2 85E80F00 stm r5, {r0, r1, r2, r3} +2394:Src/main.c **** LL_TIM_EnableCounter(TIM6); + 6981 .loc 1 2394 2 is_stmt 1 view .LVU2169 + ARM GAS /tmp/ccLSPxIe.s page 369 + + + 6982 .LVL629: + 6983 .LBB576: + 6984 .LBI576: 3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled. - ARM GAS /tmp/ccuHnxNu.s page 355 - - 3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer. 3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode @@ -21291,6 +22138,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ETRFilter) 3290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | + ARM GAS /tmp/ccLSPxIe.s page 370 + + 3292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -21298,9 +22148,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration - ARM GAS /tmp/ccuHnxNu.s page 356 - - 3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -21351,6 +22198,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N6 3347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N8 3348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N5 + ARM GAS /tmp/ccLSPxIe.s page 371 + + 3349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N6 3350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N8 3351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N5 @@ -21358,9 +22208,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8 3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 357 - - 3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, 3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t BreakFilter) 3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -21411,6 +22258,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N6 3404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N8 3405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N6 + ARM GAS /tmp/ccLSPxIe.s page 372 + + 3406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N8 3407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N6 3408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N8 @@ -21418,9 +22268,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6 3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8 3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5 - ARM GAS /tmp/ccuHnxNu.s page 358 - - 3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6 3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N8 3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -21471,6 +22318,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 373 + + 3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx) 3464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE); @@ -21478,9 +22328,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled. - ARM GAS /tmp/ccuHnxNu.s page 359 - - 3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input. 3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_IsEnabledAutomaticOutput @@ -21531,6 +22378,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx) + ARM GAS /tmp/ccLSPxIe.s page 374 + + 3520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL); 3522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -21538,9 +22388,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT) 3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input. - ARM GAS /tmp/ccuHnxNu.s page 360 - - 3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether 3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection. 3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINE LL_TIM_EnableBreakInputSource\n @@ -21591,6 +22438,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection. 3575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINP LL_TIM_SetBreakInputSourcePolarity\n 3576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKP LL_TIM_SetBreakInputSourcePolarity\n + ARM GAS /tmp/ccLSPxIe.s page 375 + + 3577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INP LL_TIM_SetBreakInputSourcePolarity\n 3578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKP LL_TIM_SetBreakInputSourcePolarity 3579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -21598,9 +22448,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN 3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2 3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values: - ARM GAS /tmp/ccuHnxNu.s page 361 - - 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN 3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK 3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values: @@ -21651,6 +22498,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_OR 3632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3 3633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5 + ARM GAS /tmp/ccLSPxIe.s page 376 + + 3634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6 3635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF1 (*) 3636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF2 (*) @@ -21658,9 +22508,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values: 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS - ARM GAS /tmp/ccuHnxNu.s page 362 - - 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS 3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS 3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS @@ -21711,6 +22558,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO 3689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_ETH_PTP 3690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF + ARM GAS /tmp/ccLSPxIe.s page 377 + + 3691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF 3692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * 3693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM5: one of the following values @@ -21718,9 +22568,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO 3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI 3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE - ARM GAS /tmp/ccuHnxNu.s page 363 - - 3698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_RTC 3699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * 3700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM11: one of the following values @@ -21771,6 +22618,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1IF LL_TIM_ClearFlag_CC1 3746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None + ARM GAS /tmp/ccLSPxIe.s page 378 + + 3748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx) 3750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -21778,9 +22628,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 364 - - 3755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 inte 3756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1IF LL_TIM_IsActiveFlag_CC1 3757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -21831,6 +22678,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx) + ARM GAS /tmp/ccLSPxIe.s page 379 + + 3805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL); 3807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -21838,9 +22688,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 interrupt flag (CC4F). 3811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4 - ARM GAS /tmp/ccuHnxNu.s page 365 - - 3812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -21891,6 +22738,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx) 3860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF)); + ARM GAS /tmp/ccLSPxIe.s page 380 + + 3862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -21898,9 +22748,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC6IF LL_TIM_IsActiveFlag_CC6 3867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccuHnxNu.s page 366 - - 3869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx) 3871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -21951,6 +22798,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL); 3917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccLSPxIe.s page 381 + + 3919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the break interrupt flag (BIF). 3921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR BIF LL_TIM_ClearFlag_BRK @@ -21958,9 +22808,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx) - ARM GAS /tmp/ccuHnxNu.s page 367 - - 3926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_BIF)); 3928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -22011,6 +22858,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set + ARM GAS /tmp/ccLSPxIe.s page 382 + + 3976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (Capture/Compare 1 interrupt is pending). 3977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR 3978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -22018,9 +22868,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx) 3982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccuHnxNu.s page 368 - - 3983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL); 3984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -22071,6 +22918,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 4030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 4031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 383 + + 4033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF). 4034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR 4035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -22078,9 +22928,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 4037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 4038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) 4039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccuHnxNu.s page 369 - - 4040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF)); 4041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 4042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -22131,81 +22978,81 @@ ARM GAS /tmp/ccuHnxNu.s page 1 4087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 4088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 4089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 384 + + 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) - 6502 .loc 5 4090 22 view .LVU2051 - 6503 .LBB572: + 6985 .loc 5 4090 22 view .LVU2170 + 6986 .LBB577: 4091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 4092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_UIE); - 6504 .loc 5 4092 3 view .LVU2052 - 6505 00a6 8D4B ldr r3, .L340+72 - ARM GAS /tmp/ccuHnxNu.s page 370 - - - 6506 00a8 DA68 ldr r2, [r3, #12] - 6507 00aa 42F00102 orr r2, r2, #1 - 6508 00ae DA60 str r2, [r3, #12] - 6509 .LVL592: - 6510 .loc 5 4092 3 is_stmt 0 view .LVU2053 - 6511 .LBE572: - 6512 .LBE571: -2301:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); - 6513 .loc 1 2301 2 is_stmt 1 view .LVU2054 - 6514 .LBB573: - 6515 .LBI573: + 6987 .loc 5 4092 3 view .LVU2171 + 6988 00a6 8D4B ldr r3, .L390+72 + 6989 00a8 DA68 ldr r2, [r3, #12] + 6990 00aa 42F00102 orr r2, r2, #1 + 6991 00ae DA60 str r2, [r3, #12] + 6992 .LVL630: + 6993 .loc 5 4092 3 is_stmt 0 view .LVU2172 + 6994 .LBE577: + 6995 .LBE576: +2395:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); + 6996 .loc 1 2395 2 is_stmt 1 view .LVU2173 + 6997 .LBB578: + 6998 .LBI578: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6516 .loc 5 1313 22 view .LVU2055 - 6517 .LBB574: + 6999 .loc 5 1313 22 view .LVU2174 + 7000 .LBB579: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6518 .loc 5 1315 3 view .LVU2056 - 6519 00b0 1A68 ldr r2, [r3] - 6520 00b2 42F00102 orr r2, r2, #1 - 6521 00b6 1A60 str r2, [r3] - 6522 .LVL593: + 7001 .loc 5 1315 3 view .LVU2175 + 7002 00b0 1A68 ldr r2, [r3] + 7003 00b2 42F00102 orr r2, r2, #1 + 7004 00b6 1A60 str r2, [r3] + 7005 .LVL631: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6523 .loc 5 1315 3 is_stmt 0 view .LVU2057 - 6524 .LBE574: - 6525 .LBE573: -2302:Src/main.c **** LL_TIM_EnableCounter(TIM7); - 6526 .loc 1 2302 2 is_stmt 1 view .LVU2058 - 6527 .LBB575: - 6528 .LBI575: + 7006 .loc 5 1315 3 is_stmt 0 view .LVU2176 + 7007 .LBE579: + 7008 .LBE578: +2396:Src/main.c **** LL_TIM_EnableCounter(TIM7); + 7009 .loc 1 2396 2 is_stmt 1 view .LVU2177 + 7010 .LBB580: + 7011 .LBI580: 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6529 .loc 5 4090 22 view .LVU2059 - 6530 .LBB576: - 6531 .loc 5 4092 3 view .LVU2060 - 6532 00b8 03F58063 add r3, r3, #1024 - 6533 00bc DA68 ldr r2, [r3, #12] - 6534 00be 42F00102 orr r2, r2, #1 - 6535 00c2 DA60 str r2, [r3, #12] - 6536 .LVL594: - 6537 .loc 5 4092 3 is_stmt 0 view .LVU2061 - 6538 .LBE576: - 6539 .LBE575: -2303:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); - 6540 .loc 1 2303 2 is_stmt 1 view .LVU2062 - 6541 .LBB577: - 6542 .LBI577: + 7012 .loc 5 4090 22 view .LVU2178 + 7013 .LBB581: + 7014 .loc 5 4092 3 view .LVU2179 + 7015 00b8 03F58063 add r3, r3, #1024 + 7016 00bc DA68 ldr r2, [r3, #12] + 7017 00be 42F00102 orr r2, r2, #1 + 7018 00c2 DA60 str r2, [r3, #12] + 7019 .LVL632: + 7020 .loc 5 4092 3 is_stmt 0 view .LVU2180 + 7021 .LBE581: + 7022 .LBE580: +2397:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); + 7023 .loc 1 2397 2 is_stmt 1 view .LVU2181 + 7024 .LBB582: + 7025 .LBI582: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - 6543 .loc 5 1313 22 view .LVU2063 - 6544 .LBB578: + 7026 .loc 5 1313 22 view .LVU2182 + 7027 .LBB583: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6545 .loc 5 1315 3 view .LVU2064 - 6546 00c4 1A68 ldr r2, [r3] - 6547 00c6 42F00102 orr r2, r2, #1 - 6548 00ca 1A60 str r2, [r3] - 6549 .LVL595: -1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - 6550 .loc 5 1315 3 is_stmt 0 view .LVU2065 - 6551 .LBE578: - 6552 .LBE577: - ARM GAS /tmp/ccuHnxNu.s page 371 + 7028 .loc 5 1315 3 view .LVU2183 + 7029 00c4 1A68 ldr r2, [r3] + ARM GAS /tmp/ccLSPxIe.s page 385 -2310:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 6553 .loc 1 2310 3 is_stmt 1 view .LVU2066 - 6554 .LBB579: - 6555 .LBI579: - 6556 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" + 7030 00c6 42F00102 orr r2, r2, #1 + 7031 00ca 1A60 str r2, [r3] + 7032 .LVL633: +1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + 7033 .loc 5 1315 3 is_stmt 0 view .LVU2184 + 7034 .LBE583: + 7035 .LBE582: +2404:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 7036 .loc 1 2404 3 is_stmt 1 view .LVU2185 + 7037 .LBB584: + 7038 .LBI584: + 7039 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @file stm32f7xx_ll_dma.h @@ -22251,6 +23098,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Array used to get the DMA stream register offset versus stream index LL_DMA_STREAM_x */ + ARM GAS /tmp/ccLSPxIe.s page 386 + + 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** static const uint8_t STREAM_OFFSET_TAB[] = 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream0_BASE - DMA1_BASE), @@ -22258,9 +23108,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream2_BASE - DMA1_BASE), 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream3_BASE - DMA1_BASE), 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream4_BASE - DMA1_BASE), - ARM GAS /tmp/ccuHnxNu.s page 372 - - 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream5_BASE - DMA1_BASE), 54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream6_BASE - DMA1_BASE), 55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream7_BASE - DMA1_BASE) @@ -22311,6 +23158,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The circular buffer mode cannot be used if the memory 101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** data transfer direction is configured on the selected 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccLSPxIe.s page 387 + + 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t PeriphOrM2MSrcIncMode; /*!< Specifies whether the Peripheral address or Source address @@ -22318,9 +23168,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_PERIPH 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct - ARM GAS /tmp/ccuHnxNu.s page 373 - - 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t MemoryOrM2MDstIncMode; /*!< Specifies whether the Memory address or Destination address 112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** is incremented or not. @@ -22371,6 +23218,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t MemBurst; /*!< Specifies the Burst transfer configuration for the memory t 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** It specifies the amount of data to be transferred in a sing + ARM GAS /tmp/ccLSPxIe.s page 388 + + 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** transaction. 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MBURST 162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The burst mode is possible only if the address Increm @@ -22378,9 +23228,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t PeriphBurst; /*!< Specifies the Burst transfer configuration for the peripher - ARM GAS /tmp/ccuHnxNu.s page 374 - - 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** It specifies the amount of data to be transferred in a sing 168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** transaction. 169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_PBURST @@ -22431,6 +23278,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_CIRCULAR DMA_SxCR_CIRC /*!< Circular Mode 215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_PFCTRL DMA_SxCR_PFCTRL /*!< Peripheral flow control mo 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 389 + + 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -22438,9 +23288,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DOUBLEBUFFER_MODE_DISABLE 0x00000000U /*!< Disable double buffering m - ARM GAS /tmp/ccuHnxNu.s page 375 - - 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DOUBLEBUFFER_MODE_ENABLE DMA_SxCR_DBM /*!< Enable double buffering mo 225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} @@ -22491,6 +23338,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_OFFSETSIZE_FIXEDTO4 DMA_SxCR_PINCOS /*!< Peripheral increment offse 272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} + ARM GAS /tmp/ccLSPxIe.s page 390 + + 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PRIORITY PRIORITY @@ -22498,9 +23348,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 /*!< Priority level : Medium - ARM GAS /tmp/ccuHnxNu.s page 376 - - 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PRIORITY_HIGH DMA_SxCR_PL_1 /*!< Priority level : High 282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PRIORITY_VERYHIGH DMA_SxCR_PL /*!< Priority level : Very_High 283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -22551,6 +23398,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC8 DMA_SxCR_PBURST_1 /*!< Peripheral b 329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC16 (DMA_SxCR_PBURST_0 | DMA_SxCR_PBURST_1) /*!< Peripheral b 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 391 + + 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -22558,9 +23408,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode di - ARM GAS /tmp/ccuHnxNu.s page 377 - - 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOMODE_ENABLE DMA_SxFCR_DMDIS /*!< FIFO mode en 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} @@ -22611,6 +23458,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 392 + + 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Write a value in DMA register 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __INSTANCE__ DMA Instance @@ -22618,9 +23468,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __VALUE__ Value to be written in the register 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 378 - - 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -22671,6 +23518,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Convert DMA Instance DMAx and LL_DMA_STREAM_y into DMAx_Streamy 443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __DMA_INSTANCE__ DMAx 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __STREAM__ LL_DMA_STREAM_y + ARM GAS /tmp/ccLSPxIe.s page 393 + + 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval DMAx_Streamy 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __LL_DMA_GET_STREAM_INSTANCE(__DMA_INSTANCE__, __STREAM__) \ @@ -22678,9 +23528,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM - ARM GAS /tmp/ccuHnxNu.s page 379 - - 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM @@ -22731,6 +23578,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccLSPxIe.s page 394 + + 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable DMA stream. 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR EN LL_DMA_DisableStream @@ -22738,9 +23588,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/ccuHnxNu.s page 380 - - 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -22750,23 +23597,23 @@ ARM GAS /tmp/ccuHnxNu.s page 1 515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableStream(DMA_TypeDef *DMAx, uint32_t Stream) - 6557 .loc 6 517 22 view .LVU2067 - 6558 .LBB580: + 7040 .loc 6 517 22 view .LVU2186 + 7041 .LBB585: 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D - 6559 .loc 6 519 3 view .LVU2068 - 6560 00cc 03F51433 add r3, r3, #151552 - 6561 00d0 D3F8B820 ldr r2, [r3, #184] - 6562 00d4 22F00102 bic r2, r2, #1 - 6563 00d8 C3F8B820 str r2, [r3, #184] - 6564 .LVL596: - 6565 .loc 6 519 3 is_stmt 0 view .LVU2069 - 6566 .LBE580: - 6567 .LBE579: -2311:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 6568 .loc 1 2311 3 is_stmt 1 view .LVU2070 - 6569 .LBB581: - 6570 .LBI581: + 7042 .loc 6 519 3 view .LVU2187 + 7043 00cc 03F51433 add r3, r3, #151552 + 7044 00d0 D3F8B820 ldr r2, [r3, #184] + 7045 00d4 22F00102 bic r2, r2, #1 + 7046 00d8 C3F8B820 str r2, [r3, #184] + 7047 .LVL634: + 7048 .loc 6 519 3 is_stmt 0 view .LVU2188 + 7049 .LBE585: + 7050 .LBE584: +2405:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 7051 .loc 1 2405 3 is_stmt 1 view .LVU2189 + 7052 .LBB586: + 7053 .LBI586: 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -22791,6 +23638,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure all parameters linked to DMA transfer. + ARM GAS /tmp/ccLSPxIe.s page 395 + + 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_ConfigTransfer\n 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR CIRC LL_DMA_ConfigTransfer\n 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PINC LL_DMA_ConfigTransfer\n @@ -22798,9 +23648,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PSIZE LL_DMA_ConfigTransfer\n 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR MSIZE LL_DMA_ConfigTransfer\n 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PL LL_DMA_ConfigTransfer\n - ARM GAS /tmp/ccuHnxNu.s page 381 - - 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PFCTRL LL_DMA_ConfigTransfer 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -22851,6 +23698,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D + ARM GAS /tmp/ccLSPxIe.s page 396 + + 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -22858,9 +23708,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_GetDataTransferDirection 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: - ARM GAS /tmp/ccuHnxNu.s page 382 - - 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -22911,6 +23758,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 + ARM GAS /tmp/ccLSPxIe.s page 397 + + 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -22918,9 +23768,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 - ARM GAS /tmp/ccuHnxNu.s page 383 - - 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_CIRCULAR @@ -22971,6 +23818,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_NOINCREMENT 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_INCREMENT 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 398 + + 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream) 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- @@ -22978,9 +23828,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Memory increment mode. - ARM GAS /tmp/ccuHnxNu.s page 384 - - 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MINC LL_DMA_SetMemoryIncMode 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -23031,6 +23878,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 + ARM GAS /tmp/ccLSPxIe.s page 399 + + 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -23038,9 +23888,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Size This parameter can be one of the following values: - ARM GAS /tmp/ccuHnxNu.s page 385 - - 779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_BYTE 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_HALFWORD 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_WORD @@ -23091,6 +23938,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_BYTE 827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_HALFWORD 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_WORD + ARM GAS /tmp/ccLSPxIe.s page 400 + + 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size) @@ -23098,9 +23948,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccuHnxNu.s page 386 - - 836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory size. 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MSIZE LL_DMA_GetMemorySize @@ -23151,6 +23998,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Peripheral increment offset size. 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PINCOS LL_DMA_GetIncOffsetSize 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccLSPxIe.s page 401 + + 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -23158,9 +24008,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccuHnxNu.s page 387 - - 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: @@ -23211,6 +24058,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccLSPxIe.s page 402 + + 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH @@ -23218,9 +24068,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetStreamPriorityLevel(DMA_TypeDef *DMAx, uint32_t Stream) 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccuHnxNu.s page 388 - - 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -23271,6 +24118,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Select Channel number associated to the Stream. + ARM GAS /tmp/ccLSPxIe.s page 403 + + 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CHSEL LL_DMA_SetChannelSelection 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -23278,9 +24128,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 - ARM GAS /tmp/ccuHnxNu.s page 389 - - 1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 @@ -23331,6 +24178,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 + ARM GAS /tmp/ccLSPxIe.s page 404 + + 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_8 (*) @@ -23338,9 +24188,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_10 (*) 1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_11 (*) 1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_12 (*) - ARM GAS /tmp/ccuHnxNu.s page 390 - - 1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_13 (*) 1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_14 (*) 1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_15 (*) @@ -23391,6 +24238,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccLSPxIe.s page 405 + + 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_SINGLE 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC4 1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC8 @@ -23398,9 +24248,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream) 1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccuHnxNu.s page 391 - - 1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -23451,6 +24298,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream) 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- + ARM GAS /tmp/ccLSPxIe.s page 406 + + 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -23458,9 +24308,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CT LL_DMA_SetCurrentTargetMem 1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: - ARM GAS /tmp/ccuHnxNu.s page 392 - - 1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -23511,6 +24358,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 + ARM GAS /tmp/ccLSPxIe.s page 407 + + 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 @@ -23518,9 +24368,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableDoubleBufferMode(DMA_TypeDef *DMAx, uint32_t Stream) 1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccuHnxNu.s page 393 - - 1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA 1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -23571,6 +24418,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 408 + + 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable Fifo mode. 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR DMDIS LL_DMA_DisableFifoMode 1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -23578,9 +24428,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccuHnxNu.s page 394 - - 1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -23631,6 +24478,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_2 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL + ARM GAS /tmp/ccLSPxIe.s page 409 + + 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetFIFOThreshold(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Threshold @@ -23638,9 +24488,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, 1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccuHnxNu.s page 395 - - 1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get FIFO threshold. 1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_GetFIFOThreshold @@ -23691,6 +24538,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ConfigFifo(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t FifoMode, uint3 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccLSPxIe.s page 410 + + 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -23698,9 +24548,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure the Source and Destination addresses. 1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA stream is enabled. 1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_ConfigAddresses\n - ARM GAS /tmp/ccuHnxNu.s page 396 - - 1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * PAR PA LL_DMA_ConfigAddresses 1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -23751,6 +24598,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 + ARM GAS /tmp/ccLSPxIe.s page 411 + + 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -23758,9 +24608,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR, 1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccuHnxNu.s page 397 - - 1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Peripheral address. @@ -23811,6 +24658,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_GetPeriphAddress 1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccLSPxIe.s page 412 + + 1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -23818,9 +24668,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccuHnxNu.s page 398 - - 1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF @@ -23871,6 +24718,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF 1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 413 + + 1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd 1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR @@ -23878,9 +24728,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Memory to Memory Source address. - ARM GAS /tmp/ccuHnxNu.s page 399 - - 1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_GetM2MSrcAddress 1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. 1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -23931,6 +24778,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 + ARM GAS /tmp/ccLSPxIe.s page 414 + + 1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 @@ -23938,9 +24788,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemory1Address(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Address) - ARM GAS /tmp/ccuHnxNu.s page 400 - - 1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR, 1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -23991,6 +24838,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccLSPxIe.s page 415 + + 1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF1)==(DMA_LISR_HTIF1)); 1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -23998,9 +24848,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 half transfer flag. 1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF2 LL_DMA_IsActiveFlag_HT2 - ARM GAS /tmp/ccuHnxNu.s page 401 - - 1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -24051,6 +24898,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx) 1739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF6)==(DMA_HISR_HTIF6)); + ARM GAS /tmp/ccLSPxIe.s page 416 + + 1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -24058,9 +24908,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF7 LL_DMA_IsActiveFlag_HT7 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccuHnxNu.s page 402 - - 1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx) 1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -24111,6 +24958,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF3)==(DMA_LISR_TCIF3)); 1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccLSPxIe.s page 417 + + 1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 transfer complete flag. 1800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF4 LL_DMA_IsActiveFlag_TC4 @@ -24118,9 +24968,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccuHnxNu.s page 403 - - 1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF4)==(DMA_HISR_TCIF4)); 1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -24171,6 +25018,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 transfer error flag. + ARM GAS /tmp/ccLSPxIe.s page 418 + + 1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF1 LL_DMA_IsActiveFlag_TE1 1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). @@ -24178,9 +25028,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx) 1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF1)==(DMA_LISR_TEIF1)); - ARM GAS /tmp/ccuHnxNu.s page 404 - - 1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -24231,6 +25078,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 transfer error flag. 1910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF6 LL_DMA_IsActiveFlag_TE6 1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccLSPxIe.s page 419 + + 1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx) @@ -24238,9 +25088,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF6)==(DMA_HISR_TEIF6)); 1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccuHnxNu.s page 405 - - 1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 transfer error flag. 1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF7 LL_DMA_IsActiveFlag_TE7 @@ -24291,6 +25138,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 420 + + 1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME3(DMA_TypeDef *DMAx) 1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF3)==(DMA_LISR_DMEIF3)); @@ -24298,9 +25148,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 direct mode error flag. - ARM GAS /tmp/ccuHnxNu.s page 406 - - 1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF4 LL_DMA_IsActiveFlag_DME4 1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). @@ -24351,6 +25198,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE0(DMA_TypeDef *DMAx) 2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccLSPxIe.s page 421 + + 2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF0)==(DMA_LISR_FEIF0)); 2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -24358,9 +25208,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 FIFO error flag. 2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF1 LL_DMA_IsActiveFlag_FE1 2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccuHnxNu.s page 407 - - 2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE1(DMA_TypeDef *DMAx) @@ -24411,6 +25258,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF5)==(DMA_HISR_FEIF5)); 2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccLSPxIe.s page 422 + + 2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 FIFO error flag. @@ -24418,9 +25268,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 408 - - 2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE6(DMA_TypeDef *DMAx) 2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF6)==(DMA_HISR_FEIF6)); @@ -24471,6 +25318,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 423 + + 2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 half transfer flag. 2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CHTIF3 LL_DMA_ClearFlag_HT3 2142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -24478,9 +25328,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx) 2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccuHnxNu.s page 409 - - 2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF3); 2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -24531,6 +25378,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 transfer complete flag. 2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF0 LL_DMA_ClearFlag_TC0 + ARM GAS /tmp/ccLSPxIe.s page 424 + + 2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -24538,9 +25388,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF0); 2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccuHnxNu.s page 410 - - 2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 transfer complete flag. @@ -24591,6 +25438,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF5 LL_DMA_ClearFlag_TC5 2252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccLSPxIe.s page 425 + + 2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx) 2256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -24598,9 +25448,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 411 - - 2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 transfer complete flag. 2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF6 LL_DMA_ClearFlag_TC6 2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -24618,21 +25465,21 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx) - 6571 .loc 6 2277 22 view .LVU2071 - 6572 .LBB582: + 7054 .loc 6 2277 22 view .LVU2190 + 7055 .LBB587: 2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7); - 6573 .loc 6 2279 3 view .LVU2072 - 6574 00dc 4FF00062 mov r2, #134217728 - 6575 00e0 DA60 str r2, [r3, #12] - 6576 .LVL597: - 6577 .loc 6 2279 3 is_stmt 0 view .LVU2073 - 6578 .LBE582: - 6579 .LBE581: -2312:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); - 6580 .loc 1 2312 3 is_stmt 1 view .LVU2074 - 6581 .LBB583: - 6582 .LBI583: + 7056 .loc 6 2279 3 view .LVU2191 + 7057 00dc 4FF00062 mov r2, #134217728 + 7058 00e0 DA60 str r2, [r3, #12] + 7059 .LVL635: + 7060 .loc 6 2279 3 is_stmt 0 view .LVU2192 + 7061 .LBE587: + 7062 .LBE586: +2406:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); + 7063 .loc 1 2406 3 is_stmt 1 view .LVU2193 + 7064 .LBB588: + 7065 .LBI588: 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -24651,6 +25498,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF1 LL_DMA_ClearFlag_TE1 2296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccLSPxIe.s page 426 + + 2298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx) 2300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -24658,9 +25508,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 412 - - 2305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 transfer error flag. 2306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF2 LL_DMA_ClearFlag_TE2 2307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -24711,6 +25558,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccLSPxIe.s page 427 + + 2355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF6); 2357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -24718,29 +25568,26 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 transfer error flag. 2361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF7 LL_DMA_ClearFlag_TE7 - ARM GAS /tmp/ccuHnxNu.s page 413 - - 2362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx) - 6583 .loc 6 2365 22 view .LVU2075 - 6584 .LBB584: + 7066 .loc 6 2365 22 view .LVU2194 + 7067 .LBB589: 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7); - 6585 .loc 6 2367 3 view .LVU2076 - 6586 00e2 4FF00072 mov r2, #33554432 - 6587 00e6 DA60 str r2, [r3, #12] - 6588 .LVL598: - 6589 .loc 6 2367 3 is_stmt 0 view .LVU2077 - 6590 .LBE584: - 6591 .LBE583: -2313:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); - 6592 .loc 1 2313 3 is_stmt 1 view .LVU2078 - 6593 .LBB585: - 6594 .LBI585: - 6595 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h" + 7068 .loc 6 2367 3 view .LVU2195 + 7069 00e2 4FF00072 mov r2, #33554432 + 7070 00e6 DA60 str r2, [r3, #12] + 7071 .LVL636: + 7072 .loc 6 2367 3 is_stmt 0 view .LVU2196 + 7073 .LBE589: + 7074 .LBE588: +2407:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); + 7075 .loc 1 2407 3 is_stmt 1 view .LVU2197 + 7076 .LBB590: + 7077 .LBI590: + 7078 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @file stm32f7xx_ll_usart.h @@ -24771,6 +25618,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #include "stm32f7xx.h" 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @addtogroup STM32F7xx_LL_Driver + ARM GAS /tmp/ccLSPxIe.s page 428 + + 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -24778,9 +25628,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** || defined(UART4) || defined(UART5) || defined(UART7) || defined(UART8) 36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL USART - ARM GAS /tmp/ccuHnxNu.s page 414 - - 38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -24831,6 +25678,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_STOPBI 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary + ARM GAS /tmp/ccLSPxIe.s page 429 + + 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetStopBitsLength().*/ 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t Parity; /*!< Specifies the parity mode. @@ -24838,9 +25688,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary 94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetParity().*/ - ARM GAS /tmp/ccuHnxNu.s page 415 - - 95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is en 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_DIRECT @@ -24891,6 +25738,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the l 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** data bit (MSB) has to be output on the SCLK pin in synch 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_LASTCL + ARM GAS /tmp/ccLSPxIe.s page 430 + + 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USART HW configuration can be modified afterwards using 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** functions @ref LL_USART_SetLastClkPulseOutput(). @@ -24898,9 +25748,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } LL_USART_ClockInitTypeDef; 151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccuHnxNu.s page 416 - - 152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -24951,6 +25798,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TC USART_ISR_TC /*!< Transmission com 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TXE USART_ISR_TXE /*!< Transmit data re 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_LBDF USART_ISR_LBDF /*!< LIN break detect + ARM GAS /tmp/ccLSPxIe.s page 431 + + 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt fl 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTS USART_ISR_CTS /*!< CTS flag */ 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_RTOF USART_ISR_RTOF /*!< Receiver timeout @@ -24958,9 +25808,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_ABRE USART_ISR_ABRE /*!< Auto baud rate e 207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_ABRF USART_ISR_ABRF /*!< Auto baud rate f 208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */ - ARM GAS /tmp/ccuHnxNu.s page 417 - - 209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CMF USART_ISR_CMF /*!< Character match 210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup @@ -25011,6 +25858,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter + ARM GAS /tmp/ccLSPxIe.s page 432 + + 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter @@ -25018,9 +25868,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccuHnxNu.s page 418 - - 266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_PARITY Parity Control 267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -25071,6 +25918,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /*USE_FULL_LL_DRIVER*/ 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccLSPxIe.s page 433 + + 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -25078,9 +25928,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the l 321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} - ARM GAS /tmp/ccuHnxNu.s page 419 - - 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_PHASE Clock Phase @@ -25131,6 +25978,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion + ARM GAS /tmp/ccLSPxIe.s page 434 + + 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works usin @@ -25138,9 +25988,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 420 - - 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_BINARY_LOGIC Binary Data Inversion 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ @@ -25191,6 +26038,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccLSPxIe.s page 435 + + 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUS) 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_WAKEUP_ON Wakeup Activation @@ -25198,9 +26048,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_ADDRESS 0x00000000U /*!< Wake u 436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake u - ARM GAS /tmp/ccuHnxNu.s page 421 - - 437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake u 438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} @@ -25251,6 +26098,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported macro ------------------------------------------------------------*/ 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Macros USART Exported Macros 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ + ARM GAS /tmp/ccLSPxIe.s page 436 + + 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros @@ -25258,9 +26108,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 422 - - 494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Write a value in USART register 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __INSTANCE__ USART Instance 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __REG__ Register to be written @@ -25311,6 +26158,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccLSPxIe.s page 437 + + 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported functions --------------------------------------------------------*/ 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Functions USART Exported Functions @@ -25318,9 +26168,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration Configuration functions - ARM GAS /tmp/ccuHnxNu.s page 423 - - 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -25371,6 +26218,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 438 + + 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx) 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_UESM); @@ -25378,9 +26228,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART disabled in STOP Mode. - ARM GAS /tmp/ccuHnxNu.s page 424 - - 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note When this function is disabled, USART is not able to wake up the MCU from Stop mode 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. @@ -25431,6 +26278,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM); 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccLSPxIe.s page 439 + + 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if USART clock is enabled in STOP Mode 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 UCESM LL_USART_IsClockEnabledInStopMode @@ -25438,9 +26288,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsClockEnabledInStopMode(const USART_TypeDef *USARTx) - ARM GAS /tmp/ccuHnxNu.s page 425 - - 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (READ_BIT(USARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM)); 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -25491,6 +26338,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE); 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccLSPxIe.s page 440 + + 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure simultaneously enabled/disabled states 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * of Transmitter and Receiver @@ -25498,9 +26348,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 TE LL_USART_SetTransferDirection 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param TransferDirection This parameter can be one of the following values: - ARM GAS /tmp/ccuHnxNu.s page 426 - - 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_NONE 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_RX 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_TX @@ -25551,6 +26398,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Parity configuration (enabled/disabled and parity mode if enabled) 770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PS LL_USART_GetParity\n 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 PCE LL_USART_GetParity + ARM GAS /tmp/ccLSPxIe.s page 441 + + 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_NONE @@ -25558,9 +26408,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_ODD 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetParity(const USART_TypeDef *USARTx) - ARM GAS /tmp/ccuHnxNu.s page 427 - - 779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE)); 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -25611,6 +26458,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits) 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 M0 LL_USART_GetDataWidth\n + ARM GAS /tmp/ccLSPxIe.s page 442 + + 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M1 LL_USART_GetDataWidth 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: @@ -25618,9 +26468,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_8B 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_9B 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 428 - - 836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetDataWidth(const USART_TypeDef *USARTx) 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M)); @@ -25671,6 +26518,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling) 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling); + ARM GAS /tmp/ccLSPxIe.s page 443 + + 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -25678,9 +26528,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 OVER8 LL_USART_GetOverSampling 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccuHnxNu.s page 429 - - 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_16 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_8 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -25731,6 +26578,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_1EDGE 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None + ARM GAS /tmp/ccLSPxIe.s page 444 + + 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase) 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -25738,9 +26588,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 430 - - 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return phase of the clock output on the SCLK pin in synchronous mode 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance. @@ -25791,6 +26638,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance. 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : + ARM GAS /tmp/ccLSPxIe.s page 445 + + 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function 1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutpu @@ -25798,9 +26648,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CPOL LL_USART_ConfigClock\n 1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 LBCL LL_USART_ConfigClock 1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccuHnxNu.s page 431 - - 1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Phase This parameter can be one of the following values: 1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_1EDGE 1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE @@ -25851,6 +26698,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 446 + + 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx) 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)) ? 1UL : 0UL); @@ -25858,9 +26708,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set the length of the stop bits - ARM GAS /tmp/ccuHnxNu.s page 432 - - 1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 STOP LL_USART_SetStopBitsLength 1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param StopBits This parameter can be one of the following values: @@ -25911,6 +26758,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_EVEN 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_ODD 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param StopBits This parameter can be one of the following values: + ARM GAS /tmp/ccLSPxIe.s page 447 + + 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_0_5 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1 1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1_5 @@ -25918,9 +26768,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t P - ARM GAS /tmp/ccuHnxNu.s page 433 - - 1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t StopBits) 1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth); @@ -25971,6 +26818,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve RX pin active level logic configuration 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RXINV LL_USART_GetRXPinLevel + ARM GAS /tmp/ccLSPxIe.s page 448 + + 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD @@ -25978,9 +26828,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(const USART_TypeDef *USARTx) 1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccuHnxNu.s page 434 - - 1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_RXINV)); 1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -26031,6 +26878,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve Binary data configuration 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 DATAINV LL_USART_GetBinaryDataLogic 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccLSPxIe.s page 449 + + 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE 1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE @@ -26038,9 +26888,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(const USART_TypeDef *USARTx) 1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV)); - ARM GAS /tmp/ccuHnxNu.s page 435 - - 1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -26091,6 +26938,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Auto Baud-Rate Detection 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance. + ARM GAS /tmp/ccLSPxIe.s page 450 + + 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABREN LL_USART_DisableAutoBaudRate 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -26098,9 +26948,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx) 1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN); - ARM GAS /tmp/ccuHnxNu.s page 436 - - 1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -26151,6 +26998,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE)); 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccLSPxIe.s page 451 + + 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Receiver Timeout 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RTOEN LL_USART_EnableRxTimeout @@ -26158,9 +27008,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx) - ARM GAS /tmp/ccuHnxNu.s page 437 - - 1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_RTOEN); 1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -26211,6 +27058,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_ + ARM GAS /tmp/ccLSPxIe.s page 452 + + 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7, 1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos))); @@ -26218,9 +27068,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return 8 bit Address of the USART node as set in ADD field of CR2. - ARM GAS /tmp/ccuHnxNu.s page 438 - - 1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note If 4-bit Address Detection is selected in ADDM7, 1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant) 1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * If 7-bit Address Detection is selected in ADDM7, @@ -26271,6 +27118,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx) 1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); + ARM GAS /tmp/ccLSPxIe.s page 453 + + 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -26278,9 +27128,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not 1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl - ARM GAS /tmp/ccuHnxNu.s page 439 - - 1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -26331,6 +27178,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_NONE 1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_RTS + ARM GAS /tmp/ccLSPxIe.s page 454 + + 1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_CTS 1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_RTS_CTS 1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -26338,9 +27188,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); 1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccuHnxNu.s page 440 - - 1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable One bit sampling method @@ -26391,6 +27238,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 OVRDIS LL_USART_DisableOverrunDetect 1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None + ARM GAS /tmp/ccLSPxIe.s page 455 + + 1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx) 1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -26398,9 +27248,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 441 - - 1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if Overrun detection is enabled 1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 OVRDIS LL_USART_IsEnabledOverrunDetect 1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -26451,6 +27298,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure USART BRR register for achieving expected Baud Rate value. 1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Compute and set USARTDIV value in BRR Register (full BRR content) + ARM GAS /tmp/ccLSPxIe.s page 456 + + 1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values 1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Peripheral clock and Baud rate values provided as function parameters should be valid 1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (Baud rate value != 0) @@ -26458,9 +27308,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll BRR BRR LL_USART_SetBaudRate 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PeriphClk Peripheral Clock - ARM GAS /tmp/ccuHnxNu.s page 442 - - 1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param OverSampling This parameter can be one of the following values: 1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_16 1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_8 @@ -26511,6 +27358,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Do not perform a division by 0 */ 1682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** else if (OverSampling == LL_USART_OVERSAMPLING_8) + ARM GAS /tmp/ccLSPxIe.s page 457 + + 1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ; 1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if (usartdiv != 0U) @@ -26518,9 +27368,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrresult = (PeriphClk * 2U) / usartdiv; 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccuHnxNu.s page 443 - - 1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** else 1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if ((usartdiv & 0xFFFFU) != 0U) @@ -26571,6 +27418,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR BLEN LL_USART_GetBlockLength 1739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF + ARM GAS /tmp/ccLSPxIe.s page 458 + + 1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBlockLength(const USART_TypeDef *USARTx) 1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -26578,9 +27428,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 444 - - 1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -26631,6 +27478,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure IrDA Power Mode (Normal or Low Power) 1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not 1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. + ARM GAS /tmp/ccLSPxIe.s page 459 + + 1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode 1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PowerMode This parameter can be one of the following values: @@ -26638,9 +27488,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_IRDA_POWER_LOW 1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 445 - - 1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode) 1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode); @@ -26691,6 +27538,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 460 + + 1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -26698,9 +27548,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccuHnxNu.s page 446 - - 1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Smartcard NACK transmission 1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -26751,6 +27598,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx) 1910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_SCEN); + ARM GAS /tmp/ccLSPxIe.s page 461 + + 1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -26758,9 +27608,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 SCEN LL_USART_DisableSmartcard - ARM GAS /tmp/ccuHnxNu.s page 447 - - 1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -26811,6 +27658,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(const USART_TypeDef *USARTx) 1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccLSPxIe.s page 462 + + 1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos); 1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -26818,9 +27668,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Smartcard prescaler value, used for dividing the USART clock 1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * source to provide the SMARTCARD Clock (5 bits value) 1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccuHnxNu.s page 448 - - 1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler 1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -26871,6 +27718,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF) 2024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(const USART_TypeDef *USARTx) + ARM GAS /tmp/ccLSPxIe.s page 463 + + 2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos); 2028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -26878,9 +27728,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 449 - - 2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex f 2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ @@ -26931,6 +27778,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature 2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ + ARM GAS /tmp/ccLSPxIe.s page 464 + + 2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -26938,9 +27788,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen - ARM GAS /tmp/ccuHnxNu.s page 450 - - 2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param LINBDLength This parameter can be one of the following values: 2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LINBREAK_DETECT_10B @@ -26991,6 +27838,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx) 2138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN); + ARM GAS /tmp/ccLSPxIe.s page 465 + + 2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -26998,9 +27848,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN - ARM GAS /tmp/ccuHnxNu.s page 451 - - 2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -27051,6 +27898,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 DEAT LL_USART_SetDEAssertionTime 2195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Time Value between Min_Data=0 and Max_Data=31 + ARM GAS /tmp/ccLSPxIe.s page 466 + + 2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time) @@ -27058,9 +27908,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos); 2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccuHnxNu.s page 452 - - 2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return DEAT (Driver Enable Assertion Time) 2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not @@ -27111,6 +27958,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(const USART_TypeDef *USARTx) 2252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL); + ARM GAS /tmp/ccLSPxIe.s page 467 + + 2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -27118,9 +27968,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not 2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance. 2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DEP LL_USART_SetDESignalPolarity - ARM GAS /tmp/ccuHnxNu.s page 453 - - 2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Polarity This parameter can be one of the following values: 2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DE_POLARITY_HIGH @@ -27171,6 +28018,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function 2309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Asynchronous Mode 2310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, ...) should be set using + ARM GAS /tmp/ccLSPxIe.s page 468 + + 2311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n 2313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigAsyncMode\n @@ -27178,9 +28028,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigAsyncMode\n 2316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigAsyncMode 2317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccuHnxNu.s page 454 - - 2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx) @@ -27231,6 +28078,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Synchronous mode */ 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_CLKEN); 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccLSPxIe.s page 469 + + 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in LIN Mode @@ -27238,9 +28088,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - STOP and CLKEN bits in the USART_CR2 register, 2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register, 2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - IREN bit in the USART_CR3 register, - ARM GAS /tmp/ccuHnxNu.s page 455 - - 2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register. 2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * This function also set the UART/USART in LIN mode. 2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not @@ -27291,6 +28138,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function 2423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function 2424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function + ARM GAS /tmp/ccLSPxIe.s page 470 + + 2425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function 2426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Half Duplex Mode 2427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, ...) should be set using @@ -27298,9 +28148,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n 2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n 2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n - ARM GAS /tmp/ccuHnxNu.s page 456 - - 2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n 2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigHalfDuplexMode 2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -27351,6 +28198,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In Smartcard mode, the following bits must be kept cleared: 2481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN bit in the USART_CR2 register, + ARM GAS /tmp/ccLSPxIe.s page 471 + + 2482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - IREN and HDSEL bits in the USART_CR3 register. 2483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN)); @@ -27358,9 +28208,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Configure Stop bits to 1.5 bits */ 2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Synchronous mode is activated by default */ 2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN)); - ARM GAS /tmp/ccuHnxNu.s page 457 - - 2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Smartcard mode */ 2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_SCEN); 2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -27411,6 +28258,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (several USARTs connected in a network, one of the USARTs can be the master, 2537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * its TX output connected to the RX inputs of the other slaves USARTs). 2538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In MultiProcessor mode, the following bits must be kept cleared: + ARM GAS /tmp/ccLSPxIe.s page 472 + + 2539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, 2540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - CLKEN bit in the USART_CR2 register, 2541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register, @@ -27418,9 +28268,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register. 2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : 2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function - ARM GAS /tmp/ccuHnxNu.s page 458 - - 2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function 2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function 2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function @@ -27471,6 +28318,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccLSPxIe.s page 473 + + 2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(const USART_TypeDef *USARTx) 2597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL); @@ -27478,9 +28328,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Noise error detected Flag is set or not - ARM GAS /tmp/ccuHnxNu.s page 459 - - 2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR NE LL_USART_IsActiveFlag_NE 2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). @@ -27531,6 +28378,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(const USART_TypeDef *USARTx) 2652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccLSPxIe.s page 474 + + 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL); 2654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -27538,9 +28388,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Transmit Data Register Empty Flag is set or not 2658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TXE LL_USART_IsActiveFlag_TXE 2659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccuHnxNu.s page 460 - - 2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(const USART_TypeDef *USARTx) @@ -27591,6 +28438,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receiver Time Out Flag is set or not 2708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR RTOF LL_USART_IsActiveFlag_RTO 2709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccLSPxIe.s page 475 + + 2710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(const USART_TypeDef *USARTx) @@ -27598,9 +28448,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL); 2715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccuHnxNu.s page 461 - - 2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART End Of Block Flag is set or not 2719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -27651,6 +28498,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL); 2765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccLSPxIe.s page 476 + + 2767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Character Match Flag is set or not 2769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR CMF LL_USART_IsActiveFlag_CM @@ -27658,9 +28508,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(const USART_TypeDef *USARTx) - ARM GAS /tmp/ccuHnxNu.s page 462 - - 2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL); 2776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -27711,6 +28558,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(const USART_TypeDef *USARTx) + ARM GAS /tmp/ccLSPxIe.s page 477 + + 2824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL); 2826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -27718,9 +28568,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_ISR_REACK) 2829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receive Enable Acknowledge Flag is set or not - ARM GAS /tmp/ccuHnxNu.s page 463 - - 2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR REACK LL_USART_IsActiveFlag_REACK 2832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). @@ -27771,6 +28618,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Noise Error detected Flag 2879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR NCF LL_USART_ClearFlag_NE 2880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccLSPxIe.s page 478 + + 2881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx) @@ -27778,9 +28628,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_NCF); 2886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccuHnxNu.s page 464 - - 2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear OverRun Error Flag 2890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR ORECF LL_USART_ClearFlag_ORE @@ -27831,6 +28678,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear LIN Break Detection Flag 2937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not + ARM GAS /tmp/ccLSPxIe.s page 479 + + 2938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 2939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR LBDCF LL_USART_ClearFlag_LBD 2940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -27838,9 +28688,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx) 2944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccuHnxNu.s page 465 - - 2945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_LBDCF); 2946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -27891,6 +28738,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_CMCF); 2994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccLSPxIe.s page 480 + + 2995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) 2997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE) @@ -27898,9 +28748,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Wake Up from stop mode Flag 3000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not 3001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. - ARM GAS /tmp/ccuHnxNu.s page 466 - - 3002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR WUCF LL_USART_ClearFlag_WKUP 3003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -27951,6 +28798,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx) 3050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE); + ARM GAS /tmp/ccLSPxIe.s page 481 + + 3052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -27958,9 +28808,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE 3057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccuHnxNu.s page 467 - - 3059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx) 3061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -28011,6 +28858,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx) 3107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_EOBIE); + ARM GAS /tmp/ccLSPxIe.s page 482 + + 3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -28018,9 +28868,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 3114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 3115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD - ARM GAS /tmp/ccuHnxNu.s page 468 - - 3116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -28071,6 +28918,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE); 3165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccLSPxIe.s page 483 + + 3166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */ 3168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */ @@ -28078,9 +28928,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */ 3171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Smartcard Transmission Complete Before Guard Time Interrupt - ARM GAS /tmp/ccuHnxNu.s page 469 - - 3173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 3174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 3175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 TCBGTIE LL_USART_EnableIT_TCBGT @@ -28131,6 +28978,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE 3221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None + ARM GAS /tmp/ccLSPxIe.s page 484 + + 3223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx) 3225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -28138,9 +28988,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 470 - - 3230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Parity Error Interrupt 3231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PEIE LL_USART_DisableIT_PE 3232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -28191,6 +29038,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD + ARM GAS /tmp/ccLSPxIe.s page 485 + + 3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -28198,9 +29048,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE); 3286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccuHnxNu.s page 471 - - 3287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Error Interrupt @@ -28251,6 +29098,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */ 3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Smartcard Transmission Complete Before Guard Time Interrupt + ARM GAS /tmp/ccLSPxIe.s page 486 + + 3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 3339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 TCBGTIE LL_USART_DisableIT_TCBGT @@ -28258,9 +29108,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx) - ARM GAS /tmp/ccuHnxNu.s page 472 - - 3344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE); 3346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -28311,6 +29158,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 487 + + 3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Parity Error Interrupt is enabled or disabled. 3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE 3396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -28318,9 +29168,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(const USART_TypeDef *USARTx) 3400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccuHnxNu.s page 473 - - 3401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL); 3402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -28371,6 +29218,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)) ? 1UL : 0UL); 3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccLSPxIe.s page 488 + + 3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Error Interrupt is enabled or disabled. @@ -28378,9 +29228,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 3457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 474 - - 3458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(const USART_TypeDef *USARTx) 3459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL); @@ -28431,6 +29278,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL); 3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */ + ARM GAS /tmp/ccLSPxIe.s page 489 + + 3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} @@ -28438,9 +29288,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_DMA_Management DMA_Management 3514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ - ARM GAS /tmp/ccuHnxNu.s page 475 - - 3515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -28483,24 +29330,24 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx) - 6596 .loc 7 3556 22 view .LVU2079 - 6597 .L331: + 7079 .loc 7 3556 22 view .LVU2198 + 7080 .L381: 3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); - 6598 .loc 7 3558 3 discriminator 1 view .LVU2080 - 6599 .LBB586: - 6600 .loc 7 3558 3 discriminator 1 view .LVU2081 - 6601 .loc 7 3558 3 discriminator 1 view .LVU2082 - 6602 .loc 7 3558 3 discriminator 1 view .LVU2083 - 6603 .LBB587: - 6604 .LBI587: - 6605 .file 8 "Drivers/CMSIS/Include/cmsis_gcc.h" + 7081 .loc 7 3558 3 discriminator 1 view .LVU2199 + 7082 .LBB591: + 7083 .loc 7 3558 3 discriminator 1 view .LVU2200 + 7084 .loc 7 3558 3 discriminator 1 view .LVU2201 + ARM GAS /tmp/ccLSPxIe.s page 490 + + + 7085 .loc 7 3558 3 discriminator 1 view .LVU2202 + 7086 .LBB592: + 7087 .LBI592: + 7088 .file 8 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file - ARM GAS /tmp/ccuHnxNu.s page 476 - - 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ @@ -28551,6 +29398,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + ARM GAS /tmp/ccLSPxIe.s page 491 + + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) @@ -28558,9 +29408,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccuHnxNu.s page 477 - - 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -28611,6 +29458,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + ARM GAS /tmp/ccLSPxIe.s page 492 + + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT @@ -28618,9 +29468,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccuHnxNu.s page 478 - - 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions @@ -28671,6 +29518,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccLSPxIe.s page 493 + + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 169:Drivers/CMSIS/Include/cmsis_gcc.h **** 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); @@ -28678,9 +29528,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccuHnxNu.s page 479 - - 175:Drivers/CMSIS/Include/cmsis_gcc.h **** 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register @@ -28731,6 +29578,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 222:Drivers/CMSIS/Include/cmsis_gcc.h **** 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccLSPxIe.s page 494 + + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -28738,9 +29588,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value - ARM GAS /tmp/ccuHnxNu.s page 480 - - 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -28791,6 +29638,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccLSPxIe.s page 495 + + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -28798,9 +29648,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccuHnxNu.s page 481 - - 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); @@ -28851,6 +29698,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 336:Drivers/CMSIS/Include/cmsis_gcc.h **** 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 496 + + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set @@ -28858,9 +29708,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); - ARM GAS /tmp/ccuHnxNu.s page 482 - - 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 348:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -28911,6 +29758,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + ARM GAS /tmp/ccLSPxIe.s page 497 + + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -28918,9 +29768,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccuHnxNu.s page 483 - - 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 405:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -28971,6 +29818,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + ARM GAS /tmp/ccLSPxIe.s page 498 + + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } 454:Drivers/CMSIS/Include/cmsis_gcc.h **** 455:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -28978,9 +29828,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value - ARM GAS /tmp/ccuHnxNu.s page 484 - - 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -29031,6 +29878,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 508:Drivers/CMSIS/Include/cmsis_gcc.h **** 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccLSPxIe.s page 499 + + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable @@ -29038,9 +29888,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) - ARM GAS /tmp/ccuHnxNu.s page 485 - - 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -29091,6 +29938,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + ARM GAS /tmp/ccLSPxIe.s page 500 + + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) @@ -29098,9 +29948,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccuHnxNu.s page 486 - - 574:Drivers/CMSIS/Include/cmsis_gcc.h **** 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ @@ -29151,6 +29998,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccLSPxIe.s page 501 + + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 626:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -29158,9 +30008,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - ARM GAS /tmp/ccuHnxNu.s page 487 - - 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 633:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -29211,6 +30058,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccLSPxIe.s page 502 + + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI @@ -29218,9 +30068,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); - ARM GAS /tmp/ccuHnxNu.s page 488 - - 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -29271,6 +30118,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + ARM GAS /tmp/ccLSPxIe.s page 503 + + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure @@ -29278,9 +30128,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set - ARM GAS /tmp/ccuHnxNu.s page 489 - - 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -29331,6 +30178,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + ARM GAS /tmp/ccLSPxIe.s page 504 + + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed @@ -29338,9 +30188,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else - ARM GAS /tmp/ccuHnxNu.s page 490 - - 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else @@ -29391,6 +30238,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccLSPxIe.s page 505 + + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event @@ -29398,9 +30248,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 858:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccuHnxNu.s page 491 - - 859:Drivers/CMSIS/Include/cmsis_gcc.h **** 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier @@ -29451,6 +30298,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 906:Drivers/CMSIS/Include/cmsis_gcc.h **** 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + ARM GAS /tmp/ccLSPxIe.s page 506 + + 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } 911:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -29458,9 +30308,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes - ARM GAS /tmp/ccuHnxNu.s page 492 - - 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -29511,6 +30358,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 963:Drivers/CMSIS/Include/cmsis_gcc.h **** 964:Drivers/CMSIS/Include/cmsis_gcc.h **** 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccLSPxIe.s page 507 + + 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula @@ -29518,9 +30368,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) - ARM GAS /tmp/ccuHnxNu.s page 493 - - 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -29571,6 +30418,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value. 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) + ARM GAS /tmp/ccLSPxIe.s page 508 + + 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -29578,9 +30428,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); - ARM GAS /tmp/ccuHnxNu.s page 494 - - 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. @@ -29620,37 +30467,37 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) - 6606 .loc 8 1068 31 view .LVU2084 - 6607 .LBB588: + 7089 .loc 8 1068 31 view .LVU2203 + 7090 .LBB593: 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 6608 .loc 8 1070 5 view .LVU2085 + 7091 .loc 8 1070 5 view .LVU2204 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 6609 .loc 8 1072 4 view .LVU2086 - 6610 00e8 7D4A ldr r2, .L340+76 - 6611 00ea 02F10803 add r3, r2, #8 - 6612 .syntax unified - 6613 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 6614 00ee 53E8003F ldrex r3, [r3] - 6615 @ 0 "" 2 - 6616 .LVL599: + 7092 .loc 8 1072 4 view .LVU2205 + 7093 00e8 7D4A ldr r2, .L390+76 + 7094 00ea 02F10803 add r3, r2, #8 + 7095 .syntax unified + ARM GAS /tmp/ccLSPxIe.s page 509 + + + 7096 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7097 00ee 53E8003F ldrex r3, [r3] + 7098 @ 0 "" 2 + 7099 .LVL637: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 6617 .loc 8 1073 4 view .LVU2087 - 6618 .loc 8 1073 4 is_stmt 0 view .LVU2088 - ARM GAS /tmp/ccuHnxNu.s page 495 - - - 6619 .thumb - 6620 .syntax unified - 6621 .LBE588: - 6622 .LBE587: - 6623 .loc 7 3558 3 discriminator 1 view .LVU2089 - 6624 00f2 43F08003 orr r3, r3, #128 - 6625 .LVL600: - 6626 .loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU2090 - 6627 .LBB589: - 6628 .LBI589: + 7100 .loc 8 1073 4 view .LVU2206 + 7101 .loc 8 1073 4 is_stmt 0 view .LVU2207 + 7102 .thumb + 7103 .syntax unified + 7104 .LBE593: + 7105 .LBE592: + 7106 .loc 7 3558 3 discriminator 1 view .LVU2208 + 7107 00f2 43F08003 orr r3, r3, #128 + 7108 .LVL638: + 7109 .loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU2209 + 7110 .LBB594: + 7111 .LBI594: 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -29691,48 +30538,48 @@ ARM GAS /tmp/ccuHnxNu.s page 1 1111:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1112:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit) 1113:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. + ARM GAS /tmp/ccLSPxIe.s page 510 + + 1114:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1115:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1116:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) - 6629 .loc 8 1119 31 view .LVU2091 - ARM GAS /tmp/ccuHnxNu.s page 496 - - - 6630 .LBB590: + 7112 .loc 8 1119 31 view .LVU2210 + 7113 .LBB595: 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 6631 .loc 8 1121 4 view .LVU2092 + 7114 .loc 8 1121 4 view .LVU2211 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 6632 .loc 8 1123 4 view .LVU2093 - 6633 00f6 0832 adds r2, r2, #8 - 6634 .syntax unified - 6635 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 6636 00f8 42E80031 strex r1, r3, [r2] - 6637 @ 0 "" 2 - 6638 .LVL601: + 7115 .loc 8 1123 4 view .LVU2212 + 7116 00f6 0832 adds r2, r2, #8 + 7117 .syntax unified + 7118 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7119 00f8 42E80031 strex r1, r3, [r2] + 7120 @ 0 "" 2 + 7121 .LVL639: 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 6639 .loc 8 1124 4 view .LVU2094 - 6640 .loc 8 1124 4 is_stmt 0 view .LVU2095 - 6641 .thumb - 6642 .syntax unified - 6643 .LBE590: - 6644 .LBE589: - 6645 .loc 7 3558 3 discriminator 1 view .LVU2096 - 6646 00fc 0029 cmp r1, #0 - 6647 00fe F3D1 bne .L331 - 6648 .LBE586: - 6649 .loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU2097 - 6650 .LVL602: - 6651 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU2098 - 6652 .LBE585: -2314:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); - 6653 .loc 1 2314 3 is_stmt 1 view .LVU2099 - 6654 .LBB591: - 6655 .LBI591: + 7122 .loc 8 1124 4 view .LVU2213 + 7123 .loc 8 1124 4 is_stmt 0 view .LVU2214 + 7124 .thumb + 7125 .syntax unified + 7126 .LBE595: + 7127 .LBE594: + 7128 .loc 7 3558 3 discriminator 1 view .LVU2215 + 7129 00fc 0029 cmp r1, #0 + 7130 00fe F3D1 bne .L381 + 7131 .LBE591: + 7132 .loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU2216 + 7133 .LVL640: + 7134 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU2217 + 7135 .LBE590: +2408:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); + 7136 .loc 1 2408 3 is_stmt 1 view .LVU2218 + 7137 .LBB596: + 7138 .LBI596: 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -29751,6 +30598,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CDMEIF1 LL_DMA_ClearFlag_DME1 2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccLSPxIe.s page 511 + + 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME1(DMA_TypeDef *DMAx) 2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -29758,9 +30608,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccuHnxNu.s page 497 - - 2393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 direct mode error flag. 2394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CDMEIF2 LL_DMA_ClearFlag_DME2 2395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -29811,6 +30658,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME6(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccLSPxIe.s page 512 + + 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF6); 2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -29818,9 +30668,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 direct mode error flag. 2449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF7 LL_DMA_ClearFlag_DME7 - ARM GAS /tmp/ccuHnxNu.s page 498 - - 2450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -29871,6 +30718,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE3(DMA_TypeDef *DMAx) 2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF3); + ARM GAS /tmp/ccLSPxIe.s page 513 + + 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -29878,9 +30728,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CFEIF4 LL_DMA_ClearFlag_FE4 2505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccuHnxNu.s page 499 - - 2507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE4(DMA_TypeDef *DMAx) 2509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -29931,6 +30778,9 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Enable Half transfer interrupt. 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR HTIE LL_DMA_EnableIT_HT + ARM GAS /tmp/ccLSPxIe.s page 514 + + 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -29938,9 +30788,6 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 2562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 2563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 - ARM GAS /tmp/ccuHnxNu.s page 500 - - 2564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 2565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 2566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 @@ -29987,3080 +30834,3080 @@ ARM GAS /tmp/ccuHnxNu.s page 1 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Stream) - 6656 .loc 6 2609 22 view .LVU2100 - 6657 .LBB592: + 7139 .loc 6 2609 22 view .LVU2219 + 7140 .LBB597: 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA - 6658 .loc 6 2611 3 view .LVU2101 - 6659 0100 784B ldr r3, .L340+80 - 6660 0102 D3F8B820 ldr r2, [r3, #184] - 6661 0106 42F01002 orr r2, r2, #16 - 6662 010a C3F8B820 str r2, [r3, #184] - 6663 .LVL603: - 6664 .loc 6 2611 3 is_stmt 0 view .LVU2102 - ARM GAS /tmp/ccuHnxNu.s page 501 + ARM GAS /tmp/ccLSPxIe.s page 515 - 6665 .LBE592: - 6666 .LBE591: -2315:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 6667 .loc 1 2315 3 is_stmt 1 view .LVU2103 - 6668 .LBB593: - 6669 .LBI593: + 7141 .loc 6 2611 3 view .LVU2220 + 7142 0100 784B ldr r3, .L390+80 + 7143 0102 D3F8B820 ldr r2, [r3, #184] + 7144 0106 42F01002 orr r2, r2, #16 + 7145 010a C3F8B820 str r2, [r3, #184] + 7146 .LVL641: + 7147 .loc 6 2611 3 is_stmt 0 view .LVU2221 + 7148 .LBE597: + 7149 .LBE596: +2409:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 7150 .loc 1 2409 3 is_stmt 1 view .LVU2222 + 7151 .LBB598: + 7152 .LBI598: 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6670 .loc 6 2589 22 view .LVU2104 - 6671 .LBB594: + 7153 .loc 6 2589 22 view .LVU2223 + 7154 .LBB599: 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6672 .loc 6 2591 3 view .LVU2105 - 6673 010e D3F8B820 ldr r2, [r3, #184] - 6674 0112 42F00402 orr r2, r2, #4 - 6675 0116 C3F8B820 str r2, [r3, #184] - 6676 .LVL604: + 7155 .loc 6 2591 3 view .LVU2224 + 7156 010e D3F8B820 ldr r2, [r3, #184] + 7157 0112 42F00402 orr r2, r2, #4 + 7158 0116 C3F8B820 str r2, [r3, #184] + 7159 .LVL642: 2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6677 .loc 6 2591 3 is_stmt 0 view .LVU2106 - 6678 .LBE594: - 6679 .LBE593: -2316:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 6680 .loc 1 2316 3 is_stmt 1 view .LVU2107 - 6681 .LBB595: - 6682 .LBI595: + 7160 .loc 6 2591 3 is_stmt 0 view .LVU2225 + 7161 .LBE599: + 7162 .LBE598: +2410:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 7163 .loc 1 2410 3 is_stmt 1 view .LVU2226 + 7164 .LBB600: + 7165 .LBI600: 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6683 .loc 6 2277 22 view .LVU2108 - 6684 .LBB596: + 7166 .loc 6 2277 22 view .LVU2227 + 7167 .LBB601: 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6685 .loc 6 2279 3 view .LVU2109 - 6686 011a 4FF00062 mov r2, #134217728 - 6687 011e DA60 str r2, [r3, #12] - 6688 .LVL605: + 7168 .loc 6 2279 3 view .LVU2228 + 7169 011a 4FF00062 mov r2, #134217728 + 7170 011e DA60 str r2, [r3, #12] + 7171 .LVL643: 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6689 .loc 6 2279 3 is_stmt 0 view .LVU2110 - 6690 .LBE596: - 6691 .LBE595: -2317:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART - 6692 .loc 1 2317 3 is_stmt 1 view .LVU2111 - 6693 .LBB597: - 6694 .LBI597: + 7172 .loc 6 2279 3 is_stmt 0 view .LVU2229 + 7173 .LBE601: + 7174 .LBE600: +2411:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART + 7175 .loc 1 2411 3 is_stmt 1 view .LVU2230 + 7176 .LBB602: + 7177 .LBI602: 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6695 .loc 6 2365 22 view .LVU2112 - 6696 .LBB598: + 7178 .loc 6 2365 22 view .LVU2231 + 7179 .LBB603: 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6697 .loc 6 2367 3 view .LVU2113 - 6698 0120 4FF00072 mov r2, #33554432 - 6699 0124 DA60 str r2, [r3, #12] - 6700 .LVL606: + 7180 .loc 6 2367 3 view .LVU2232 + 7181 0120 4FF00072 mov r2, #33554432 + 7182 0124 DA60 str r2, [r3, #12] + 7183 .LVL644: 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6701 .loc 6 2367 3 is_stmt 0 view .LVU2114 - 6702 .LBE598: - 6703 .LBE597: -2318:Src/main.c **** - 6704 .loc 1 2318 3 is_stmt 1 view .LVU2115 - 6705 0126 704A ldr r2, .L340+84 - 6706 .LVL607: - 6707 .LBB599: - 6708 .LBI599: - ARM GAS /tmp/ccuHnxNu.s page 502 + 7184 .loc 6 2367 3 is_stmt 0 view .LVU2233 + 7185 .LBE603: + ARM GAS /tmp/ccLSPxIe.s page 516 + 7186 .LBE602: +2412:Src/main.c **** + 7187 .loc 1 2412 3 is_stmt 1 view .LVU2234 + 7188 0126 704A ldr r2, .L390+84 + 7189 .LVL645: + 7190 .LBB604: + 7191 .LBI604: 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6709 .loc 6 621 26 view .LVU2116 - 6710 .LBB600: + 7192 .loc 6 621 26 view .LVU2235 + 7193 .LBB605: 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6711 .loc 6 623 3 view .LVU2117 + 7194 .loc 6 623 3 view .LVU2236 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6712 .loc 6 623 11 is_stmt 0 view .LVU2118 - 6713 0128 D3F8B830 ldr r3, [r3, #184] - 6714 012c 03F0C003 and r3, r3, #192 - 6715 .LVL608: + 7195 .loc 6 623 11 is_stmt 0 view .LVU2237 + 7196 0128 D3F8B830 ldr r3, [r3, #184] + 7197 012c 03F0C003 and r3, r3, #192 + 7198 .LVL646: 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6716 .loc 6 623 11 view .LVU2119 - 6717 .LBE600: - 6718 .LBE599: - 6719 .LBB601: - 6720 .LBI601: + 7199 .loc 6 623 11 view .LVU2238 + 7200 .LBE605: + 7201 .LBE604: + 7202 .LBB606: + 7203 .LBI606: 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6721 .loc 6 1425 22 is_stmt 1 view .LVU2120 - 6722 .LBB602: + 7204 .loc 6 1425 22 is_stmt 1 view .LVU2239 + 7205 .LBB607: 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6723 .loc 6 1428 3 view .LVU2121 + 7206 .loc 6 1428 3 view .LVU2240 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 6724 .loc 6 1428 6 is_stmt 0 view .LVU2122 - 6725 0130 402B cmp r3, #64 - 6726 0132 00F08480 beq .L337 + 7207 .loc 6 1428 6 is_stmt 0 view .LVU2241 + 7208 0130 402B cmp r3, #64 + 7209 0132 00F08480 beq .L387 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR - 6727 .loc 6 1436 5 is_stmt 1 view .LVU2123 - 6728 0136 6B4B ldr r3, .L340+80 - 6729 .LVL609: + 7210 .loc 6 1436 5 is_stmt 1 view .LVU2242 + 7211 0136 6B4B ldr r3, .L390+80 + 7212 .LVL647: 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR - 6730 .loc 6 1436 5 is_stmt 0 view .LVU2124 - 6731 0138 C3F8C020 str r2, [r3, #192] + 7213 .loc 6 1436 5 is_stmt 0 view .LVU2243 + 7214 0138 C3F8C020 str r2, [r3, #192] 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6732 .loc 6 1437 5 is_stmt 1 view .LVU2125 - 6733 013c 6B4A ldr r2, .L340+88 - 6734 013e C3F8C420 str r2, [r3, #196] - 6735 .L333: - 6736 .LVL610: + 7215 .loc 6 1437 5 is_stmt 1 view .LVU2244 + 7216 013c 6B4A ldr r2, .L390+88 + 7217 013e C3F8C420 str r2, [r3, #196] + 7218 .L383: + 7219 .LVL648: 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6737 .loc 6 1437 5 is_stmt 0 view .LVU2126 - 6738 .LBE602: - 6739 .LBE601: -2323:Src/main.c **** SD_SLIDE = 0; - 6740 .loc 1 2323 2 is_stmt 1 view .LVU2127 -2323:Src/main.c **** SD_SLIDE = 0; - 6741 .loc 1 2323 10 is_stmt 0 view .LVU2128 - 6742 0142 0024 movs r4, #0 - 6743 0144 6A4B ldr r3, .L340+92 - 6744 0146 1C60 str r4, [r3] -2324:Src/main.c **** //Reset all periphery - 6745 .loc 1 2324 2 is_stmt 1 view .LVU2129 -2324:Src/main.c **** //Reset all periphery - 6746 .loc 1 2324 11 is_stmt 0 view .LVU2130 - 6747 0148 6A4B ldr r3, .L340+96 - 6748 014a 1C60 str r4, [r3] -2326:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); - 6749 .loc 1 2326 2 is_stmt 1 view .LVU2131 - ARM GAS /tmp/ccuHnxNu.s page 503 + 7220 .loc 6 1437 5 is_stmt 0 view .LVU2245 + 7221 .LBE607: + 7222 .LBE606: +2417:Src/main.c **** SD_SLIDE = 0; + 7223 .loc 1 2417 2 is_stmt 1 view .LVU2246 +2417:Src/main.c **** SD_SLIDE = 0; + 7224 .loc 1 2417 10 is_stmt 0 view .LVU2247 + 7225 0142 0024 movs r4, #0 + 7226 0144 6A4B ldr r3, .L390+92 + 7227 0146 1C60 str r4, [r3] +2418:Src/main.c **** //Reset all periphery + ARM GAS /tmp/ccLSPxIe.s page 517 - 6750 014c 6A4E ldr r6, .L340+100 - 6751 014e 2246 mov r2, r4 - 6752 0150 0821 movs r1, #8 - 6753 0152 3046 mov r0, r6 - 6754 0154 FFF7FEFF bl HAL_GPIO_WritePin - 6755 .LVL611: -2327:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); - 6756 .loc 1 2327 2 view .LVU2132 - 6757 0158 2246 mov r2, r4 - 6758 015a 8021 movs r1, #128 - 6759 015c 3046 mov r0, r6 - 6760 015e FFF7FEFF bl HAL_GPIO_WritePin - 6761 .LVL612: -2328:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); - 6762 .loc 1 2328 2 view .LVU2133 - 6763 0162 664F ldr r7, .L340+104 - 6764 0164 2246 mov r2, r4 - 6765 0166 4FF48071 mov r1, #256 - 6766 016a 3846 mov r0, r7 - 6767 016c FFF7FEFF bl HAL_GPIO_WritePin - 6768 .LVL613: -2329:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); - 6769 .loc 1 2329 2 view .LVU2134 - 6770 0170 2246 mov r2, r4 - 6771 0172 1021 movs r1, #16 - 6772 0174 3046 mov r0, r6 - 6773 0176 FFF7FEFF bl HAL_GPIO_WritePin - 6774 .LVL614: -2330:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); - 6775 .loc 1 2330 2 view .LVU2135 - 6776 017a DFF89C81 ldr r8, .L340+132 - 6777 017e 2246 mov r2, r4 - 6778 0180 4FF48061 mov r1, #1024 - 6779 0184 4046 mov r0, r8 - 6780 0186 FFF7FEFF bl HAL_GPIO_WritePin - 6781 .LVL615: -2331:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); - 6782 .loc 1 2331 2 view .LVU2136 - 6783 018a 5D4D ldr r5, .L340+108 - 6784 018c 2246 mov r2, r4 - 6785 018e 0821 movs r1, #8 - 6786 0190 2846 mov r0, r5 - 6787 0192 FFF7FEFF bl HAL_GPIO_WritePin - 6788 .LVL616: -2332:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); - 6789 .loc 1 2332 2 view .LVU2137 - 6790 0196 2246 mov r2, r4 - 6791 0198 0121 movs r1, #1 - 6792 019a 2846 mov r0, r5 - 6793 019c FFF7FEFF bl HAL_GPIO_WritePin - 6794 .LVL617: -2333:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 6795 .loc 1 2333 2 view .LVU2138 - 6796 01a0 2246 mov r2, r4 - 6797 01a2 0221 movs r1, #2 - 6798 01a4 2846 mov r0, r5 - 6799 01a6 FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccuHnxNu.s page 504 + 7228 .loc 1 2418 2 is_stmt 1 view .LVU2248 +2418:Src/main.c **** //Reset all periphery + 7229 .loc 1 2418 11 is_stmt 0 view .LVU2249 + 7230 0148 6A4B ldr r3, .L390+96 + 7231 014a 1C60 str r4, [r3] +2420:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); + 7232 .loc 1 2420 2 is_stmt 1 view .LVU2250 + 7233 014c 6A4E ldr r6, .L390+100 + 7234 014e 2246 mov r2, r4 + 7235 0150 0821 movs r1, #8 + 7236 0152 3046 mov r0, r6 + 7237 0154 FFF7FEFF bl HAL_GPIO_WritePin + 7238 .LVL649: +2421:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); + 7239 .loc 1 2421 2 view .LVU2251 + 7240 0158 2246 mov r2, r4 + 7241 015a 8021 movs r1, #128 + 7242 015c 3046 mov r0, r6 + 7243 015e FFF7FEFF bl HAL_GPIO_WritePin + 7244 .LVL650: +2422:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); + 7245 .loc 1 2422 2 view .LVU2252 + 7246 0162 664F ldr r7, .L390+104 + 7247 0164 2246 mov r2, r4 + 7248 0166 4FF48071 mov r1, #256 + 7249 016a 3846 mov r0, r7 + 7250 016c FFF7FEFF bl HAL_GPIO_WritePin + 7251 .LVL651: +2423:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); + 7252 .loc 1 2423 2 view .LVU2253 + 7253 0170 2246 mov r2, r4 + 7254 0172 1021 movs r1, #16 + 7255 0174 3046 mov r0, r6 + 7256 0176 FFF7FEFF bl HAL_GPIO_WritePin + 7257 .LVL652: +2424:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); + 7258 .loc 1 2424 2 view .LVU2254 + 7259 017a DFF89C81 ldr r8, .L390+132 + 7260 017e 2246 mov r2, r4 + 7261 0180 4FF48061 mov r1, #1024 + 7262 0184 4046 mov r0, r8 + 7263 0186 FFF7FEFF bl HAL_GPIO_WritePin + 7264 .LVL653: +2425:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); + 7265 .loc 1 2425 2 view .LVU2255 + 7266 018a 5D4D ldr r5, .L390+108 + 7267 018c 2246 mov r2, r4 + 7268 018e 0821 movs r1, #8 + 7269 0190 2846 mov r0, r5 + 7270 0192 FFF7FEFF bl HAL_GPIO_WritePin + 7271 .LVL654: +2426:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); + 7272 .loc 1 2426 2 view .LVU2256 + 7273 0196 2246 mov r2, r4 + 7274 0198 0121 movs r1, #1 + 7275 019a 2846 mov r0, r5 + 7276 019c FFF7FEFF bl HAL_GPIO_WritePin + ARM GAS /tmp/ccLSPxIe.s page 518 - 6800 .LVL618: -2334:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 6801 .loc 1 2334 2 view .LVU2139 - 6802 01aa 2246 mov r2, r4 - 6803 01ac 4FF40061 mov r1, #2048 - 6804 01b0 4046 mov r0, r8 - 6805 01b2 FFF7FEFF bl HAL_GPIO_WritePin - 6806 .LVL619: -2335:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) - 6807 .loc 1 2335 2 view .LVU2140 - 6808 01b6 2246 mov r2, r4 - 6809 01b8 2021 movs r1, #32 - 6810 01ba 3046 mov r0, r6 - 6811 01bc FFF7FEFF bl HAL_GPIO_WritePin - 6812 .LVL620: -2345:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC - 6813 .loc 1 2345 2 view .LVU2141 - 6814 01c0 06F50066 add r6, r6, #2048 - 6815 01c4 0122 movs r2, #1 - 6816 01c6 4FF48061 mov r1, #1024 - 6817 01ca 3046 mov r0, r6 - 6818 01cc FFF7FEFF bl HAL_GPIO_WritePin - 6819 .LVL621: -2346:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 6820 .loc 1 2346 2 view .LVU2142 - 6821 01d0 DFF84891 ldr r9, .L340+136 - 6822 01d4 0122 movs r2, #1 - 6823 01d6 4021 movs r1, #64 - 6824 01d8 4846 mov r0, r9 - 6825 01da FFF7FEFF bl HAL_GPIO_WritePin - 6826 .LVL622: -2347:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 6827 .loc 1 2347 2 view .LVU2143 - 6828 01de 0122 movs r2, #1 - 6829 01e0 4FF48041 mov r1, #16384 - 6830 01e4 3046 mov r0, r6 - 6831 01e6 FFF7FEFF bl HAL_GPIO_WritePin - 6832 .LVL623: -2348:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 - 6833 .loc 1 2348 2 view .LVU2144 - 6834 01ea 0122 movs r2, #1 - 6835 01ec 4FF48041 mov r1, #16384 - 6836 01f0 4846 mov r0, r9 - 6837 01f2 FFF7FEFF bl HAL_GPIO_WritePin - 6838 .LVL624: -2349:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 6839 .loc 1 2349 2 view .LVU2145 - 6840 01f6 0122 movs r2, #1 - 6841 01f8 4FF48041 mov r1, #16384 - 6842 01fc 4046 mov r0, r8 - 6843 01fe FFF7FEFF bl HAL_GPIO_WritePin - 6844 .LVL625: -2350:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 6845 .loc 1 2350 2 view .LVU2146 - 6846 0202 0122 movs r2, #1 - 6847 0204 4021 movs r1, #64 - 6848 0206 2846 mov r0, r5 - ARM GAS /tmp/ccuHnxNu.s page 505 + 7277 .LVL655: +2427:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 7278 .loc 1 2427 2 view .LVU2257 + 7279 01a0 2246 mov r2, r4 + 7280 01a2 0221 movs r1, #2 + 7281 01a4 2846 mov r0, r5 + 7282 01a6 FFF7FEFF bl HAL_GPIO_WritePin + 7283 .LVL656: +2428:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 7284 .loc 1 2428 2 view .LVU2258 + 7285 01aa 2246 mov r2, r4 + 7286 01ac 4FF40061 mov r1, #2048 + 7287 01b0 4046 mov r0, r8 + 7288 01b2 FFF7FEFF bl HAL_GPIO_WritePin + 7289 .LVL657: +2429:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) + 7290 .loc 1 2429 2 view .LVU2259 + 7291 01b6 2246 mov r2, r4 + 7292 01b8 2021 movs r1, #32 + 7293 01ba 3046 mov r0, r6 + 7294 01bc FFF7FEFF bl HAL_GPIO_WritePin + 7295 .LVL658: +2439:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC + 7296 .loc 1 2439 2 view .LVU2260 + 7297 01c0 06F50066 add r6, r6, #2048 + 7298 01c4 0122 movs r2, #1 + 7299 01c6 4FF48061 mov r1, #1024 + 7300 01ca 3046 mov r0, r6 + 7301 01cc FFF7FEFF bl HAL_GPIO_WritePin + 7302 .LVL659: +2440:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 7303 .loc 1 2440 2 view .LVU2261 + 7304 01d0 DFF84891 ldr r9, .L390+136 + 7305 01d4 0122 movs r2, #1 + 7306 01d6 4021 movs r1, #64 + 7307 01d8 4846 mov r0, r9 + 7308 01da FFF7FEFF bl HAL_GPIO_WritePin + 7309 .LVL660: +2441:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 7310 .loc 1 2441 2 view .LVU2262 + 7311 01de 0122 movs r2, #1 + 7312 01e0 4FF48041 mov r1, #16384 + 7313 01e4 3046 mov r0, r6 + 7314 01e6 FFF7FEFF bl HAL_GPIO_WritePin + 7315 .LVL661: +2442:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 + 7316 .loc 1 2442 2 view .LVU2263 + 7317 01ea 0122 movs r2, #1 + 7318 01ec 4FF48041 mov r1, #16384 + 7319 01f0 4846 mov r0, r9 + 7320 01f2 FFF7FEFF bl HAL_GPIO_WritePin + 7321 .LVL662: +2443:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 7322 .loc 1 2443 2 view .LVU2264 + 7323 01f6 0122 movs r2, #1 + 7324 01f8 4FF48041 mov r1, #16384 + 7325 01fc 4046 mov r0, r8 + ARM GAS /tmp/ccLSPxIe.s page 519 - 6849 0208 FFF7FEFF bl HAL_GPIO_WritePin - 6850 .LVL626: -2351:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 6851 .loc 1 2351 2 view .LVU2147 - 6852 020c 0122 movs r2, #1 - 6853 020e 4FF48051 mov r1, #4096 - 6854 0212 3846 mov r0, r7 - 6855 0214 FFF7FEFF bl HAL_GPIO_WritePin - 6856 .LVL627: -2352:Src/main.c **** PA4_DAC_Set(0u, 0u); - 6857 .loc 1 2352 2 view .LVU2148 - 6858 0218 0122 movs r2, #1 - 6859 021a 4FF48071 mov r1, #256 - 6860 021e 3046 mov r0, r6 - 6861 0220 FFF7FEFF bl HAL_GPIO_WritePin - 6862 .LVL628: -2353:Src/main.c **** - 6863 .loc 1 2353 2 view .LVU2149 - 6864 0224 2146 mov r1, r4 - 6865 0226 2046 mov r0, r4 - 6866 0228 FFF7FEFF bl PA4_DAC_Set - 6867 .LVL629: -2357:Src/main.c **** { - 6868 .loc 1 2357 2 view .LVU2150 -2357:Src/main.c **** { - 6869 .loc 1 2357 6 is_stmt 0 view .LVU2151 - 6870 022c 0121 movs r1, #1 - 6871 022e 3846 mov r0, r7 - 6872 0230 FFF7FEFF bl HAL_GPIO_ReadPin - 6873 .LVL630: -2357:Src/main.c **** { - 6874 .loc 1 2357 5 discriminator 1 view .LVU2152 - 6875 0234 50B1 cbz r0, .L338 - 6876 .L334: -2388:Src/main.c **** } - 6877 .loc 1 2388 2 is_stmt 1 view .LVU2153 - 6878 0236 FFF7FEFF bl AD9102_Init - 6879 .LVL631: -2389:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 6880 .loc 1 2389 1 is_stmt 0 view .LVU2154 - 6881 023a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} - 6882 .LVL632: - 6883 .L337: - 6884 .LBB604: - 6885 .LBB603: + 7326 01fe FFF7FEFF bl HAL_GPIO_WritePin + 7327 .LVL663: +2444:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 7328 .loc 1 2444 2 view .LVU2265 + 7329 0202 0122 movs r2, #1 + 7330 0204 4021 movs r1, #64 + 7331 0206 2846 mov r0, r5 + 7332 0208 FFF7FEFF bl HAL_GPIO_WritePin + 7333 .LVL664: +2445:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 7334 .loc 1 2445 2 view .LVU2266 + 7335 020c 0122 movs r2, #1 + 7336 020e 4FF48051 mov r1, #4096 + 7337 0212 3846 mov r0, r7 + 7338 0214 FFF7FEFF bl HAL_GPIO_WritePin + 7339 .LVL665: +2446:Src/main.c **** PA4_DAC_Set(0u, 0u); + 7340 .loc 1 2446 2 view .LVU2267 + 7341 0218 0122 movs r2, #1 + 7342 021a 4FF48071 mov r1, #256 + 7343 021e 3046 mov r0, r6 + 7344 0220 FFF7FEFF bl HAL_GPIO_WritePin + 7345 .LVL666: +2447:Src/main.c **** + 7346 .loc 1 2447 2 view .LVU2268 + 7347 0224 2146 mov r1, r4 + 7348 0226 2046 mov r0, r4 + 7349 0228 FFF7FEFF bl PA4_DAC_Set + 7350 .LVL667: +2451:Src/main.c **** { + 7351 .loc 1 2451 2 view .LVU2269 +2451:Src/main.c **** { + 7352 .loc 1 2451 6 is_stmt 0 view .LVU2270 + 7353 022c 0121 movs r1, #1 + 7354 022e 3846 mov r0, r7 + 7355 0230 FFF7FEFF bl HAL_GPIO_ReadPin + 7356 .LVL668: +2451:Src/main.c **** { + 7357 .loc 1 2451 5 discriminator 1 view .LVU2271 + 7358 0234 50B1 cbz r0, .L388 + 7359 .L384: +2482:Src/main.c **** } + 7360 .loc 1 2482 2 is_stmt 1 view .LVU2272 + 7361 0236 FFF7FEFF bl AD9102_Init + 7362 .LVL669: +2483:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 7363 .loc 1 2483 1 is_stmt 0 view .LVU2273 + 7364 023a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 7365 .LVL670: + 7366 .L387: + 7367 .LBB609: + 7368 .LBB608: 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, - 6886 .loc 6 1430 5 is_stmt 1 view .LVU2155 - 6887 023e 294B ldr r3, .L340+80 - 6888 .LVL633: + 7369 .loc 6 1430 5 is_stmt 1 view .LVU2274 + 7370 023e 294B ldr r3, .L390+80 + 7371 .LVL671: 1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, - 6889 .loc 6 1430 5 is_stmt 0 view .LVU2156 - 6890 0240 C3F8C420 str r2, [r3, #196] + ARM GAS /tmp/ccLSPxIe.s page 520 + + + 7372 .loc 6 1430 5 is_stmt 0 view .LVU2275 + 7373 0240 C3F8C420 str r2, [r3, #196] 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6891 .loc 6 1431 5 is_stmt 1 view .LVU2157 - 6892 0244 294A ldr r2, .L340+88 - 6893 0246 C3F8C020 str r2, [r3, #192] - 6894 024a 7AE7 b .L333 - ARM GAS /tmp/ccuHnxNu.s page 506 - - - 6895 .LVL634: - 6896 .L338: + 7374 .loc 6 1431 5 is_stmt 1 view .LVU2276 + 7375 0244 294A ldr r2, .L390+88 + 7376 0246 C3F8C020 str r2, [r3, #192] + 7377 024a 7AE7 b .L383 + 7378 .LVL672: + 7379 .L388: 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 6897 .loc 6 1431 5 is_stmt 0 view .LVU2158 - 6898 .LBE603: - 6899 .LBE604: -2360:Src/main.c **** { - 6900 .loc 1 2360 3 is_stmt 1 view .LVU2159 -2360:Src/main.c **** { - 6901 .loc 1 2360 7 is_stmt 0 view .LVU2160 - 6902 024c 4FF48071 mov r1, #256 - 6903 0250 2846 mov r0, r5 - 6904 0252 FFF7FEFF bl HAL_GPIO_ReadPin - 6905 .LVL635: -2360:Src/main.c **** { - 6906 .loc 1 2360 6 discriminator 1 view .LVU2161 - 6907 0256 0028 cmp r0, #0 - 6908 0258 EDD1 bne .L334 -2363:Src/main.c **** if (test == 0) //0 - suc - 6909 .loc 1 2363 4 is_stmt 1 view .LVU2162 -2363:Src/main.c **** if (test == 0) //0 - suc - 6910 .loc 1 2363 11 is_stmt 0 view .LVU2163 - 6911 025a 2A48 ldr r0, .L340+112 - 6912 025c FFF7FEFF bl Mount_SD - 6913 .LVL636: -2363:Src/main.c **** if (test == 0) //0 - suc - 6914 .loc 1 2363 9 discriminator 1 view .LVU2164 - 6915 0260 294B ldr r3, .L340+116 - 6916 0262 1860 str r0, [r3] -2364:Src/main.c **** { - 6917 .loc 1 2364 4 is_stmt 1 view .LVU2165 -2364:Src/main.c **** { - 6918 .loc 1 2364 7 is_stmt 0 view .LVU2166 - 6919 0264 18B1 cbz r0, .L339 - 6920 .L335: -2376:Src/main.c **** } - 6921 .loc 1 2376 4 is_stmt 1 view .LVU2167 -2376:Src/main.c **** } - 6922 .loc 1 2376 14 is_stmt 0 view .LVU2168 - 6923 0266 294B ldr r3, .L340+120 - 6924 0268 0122 movs r2, #1 - 6925 026a 1A70 strb r2, [r3] - 6926 026c E3E7 b .L334 - 6927 .L339: -2367:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6928 .loc 1 2367 5 is_stmt 1 view .LVU2169 -2367:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6929 .loc 1 2367 12 is_stmt 0 view .LVU2170 - 6930 026e 1E23 movs r3, #30 - 6931 0270 1A46 mov r2, r3 - 6932 0272 2749 ldr r1, .L340+124 - 6933 0274 2748 ldr r0, .L340+128 - 6934 0276 FFF7FEFF bl Seek_Read_File - 6935 .LVL637: -2367:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6936 .loc 1 2367 10 discriminator 1 view .LVU2171 - 6937 027a 234C ldr r4, .L340+116 - ARM GAS /tmp/ccuHnxNu.s page 507 + 7380 .loc 6 1431 5 is_stmt 0 view .LVU2277 + 7381 .LBE608: + 7382 .LBE609: +2454:Src/main.c **** { + 7383 .loc 1 2454 3 is_stmt 1 view .LVU2278 +2454:Src/main.c **** { + 7384 .loc 1 2454 7 is_stmt 0 view .LVU2279 + 7385 024c 4FF48071 mov r1, #256 + 7386 0250 2846 mov r0, r5 + 7387 0252 FFF7FEFF bl HAL_GPIO_ReadPin + 7388 .LVL673: +2454:Src/main.c **** { + 7389 .loc 1 2454 6 discriminator 1 view .LVU2280 + 7390 0256 0028 cmp r0, #0 + 7391 0258 EDD1 bne .L384 +2457:Src/main.c **** if (test == 0) //0 - suc + 7392 .loc 1 2457 4 is_stmt 1 view .LVU2281 +2457:Src/main.c **** if (test == 0) //0 - suc + 7393 .loc 1 2457 11 is_stmt 0 view .LVU2282 + 7394 025a 2A48 ldr r0, .L390+112 + 7395 025c FFF7FEFF bl Mount_SD + 7396 .LVL674: +2457:Src/main.c **** if (test == 0) //0 - suc + 7397 .loc 1 2457 9 discriminator 1 view .LVU2283 + 7398 0260 294B ldr r3, .L390+116 + 7399 0262 1860 str r0, [r3] +2458:Src/main.c **** { + 7400 .loc 1 2458 4 is_stmt 1 view .LVU2284 +2458:Src/main.c **** { + 7401 .loc 1 2458 7 is_stmt 0 view .LVU2285 + 7402 0264 18B1 cbz r0, .L389 + 7403 .L385: +2470:Src/main.c **** } + 7404 .loc 1 2470 4 is_stmt 1 view .LVU2286 +2470:Src/main.c **** } + 7405 .loc 1 2470 14 is_stmt 0 view .LVU2287 + 7406 0266 294B ldr r3, .L390+120 + 7407 0268 0122 movs r2, #1 + 7408 026a 1A70 strb r2, [r3] + 7409 026c E3E7 b .L384 + 7410 .L389: +2461:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7411 .loc 1 2461 5 is_stmt 1 view .LVU2288 +2461:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7412 .loc 1 2461 12 is_stmt 0 view .LVU2289 + 7413 026e 1E23 movs r3, #30 + 7414 0270 1A46 mov r2, r3 + ARM GAS /tmp/ccLSPxIe.s page 521 - 6938 027c 2060 str r0, [r4] -2368:Src/main.c **** UART_rec_incr = 0; - 6939 .loc 1 2368 5 is_stmt 1 view .LVU2172 -2368:Src/main.c **** UART_rec_incr = 0; - 6940 .loc 1 2368 12 is_stmt 0 view .LVU2173 - 6941 027e 2148 ldr r0, .L340+112 - 6942 0280 FFF7FEFF bl Unmount_SD - 6943 .LVL638: -2368:Src/main.c **** UART_rec_incr = 0; - 6944 .loc 1 2368 10 discriminator 1 view .LVU2174 - 6945 0284 2060 str r0, [r4] -2369:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 6946 .loc 1 2369 5 is_stmt 1 view .LVU2175 -2369:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 6947 .loc 1 2369 19 is_stmt 0 view .LVU2176 - 6948 0286 0023 movs r3, #0 - 6949 0288 084A ldr r2, .L340+24 - 6950 028a 1380 strh r3, [r2] @ movhi -2370:Src/main.c **** } - 6951 .loc 1 2370 5 is_stmt 1 view .LVU2177 -2370:Src/main.c **** } - 6952 .loc 1 2370 13 is_stmt 0 view .LVU2178 - 6953 028c 064A ldr r2, .L340+20 - 6954 028e 1370 strb r3, [r2] - 6955 0290 E9E7 b .L335 - 6956 .L341: - 6957 0292 00BF .align 2 - 6958 .L340: - 6959 0294 00000000 .word TO6 - 6960 0298 00000000 .word TO7 - 6961 029c 00000000 .word TO7_before - 6962 02a0 00000000 .word TO6_before - 6963 02a4 00000000 .word TO6_uart - 6964 02a8 00000000 .word flg_tmt - 6965 02ac 00000000 .word UART_rec_incr - 6966 02b0 00000000 .word fgoto - 6967 02b4 00000000 .word sizeoffile - 6968 02b8 00000000 .word u_tx_flg - 6969 02bc 00000000 .word u_rx_flg - 6970 02c0 00000000 .word Long_Data - 6971 02c4 00000000 .word Def_setup - 6972 02c8 00000000 .word LD1_def_setup - 6973 02cc 00000000 .word LD2_def_setup - 6974 02d0 00000000 .word Curr_setup - 6975 02d4 00000000 .word LD1_curr_setup - 6976 02d8 00000000 .word LD2_curr_setup - 6977 02dc 00100040 .word 1073745920 - 6978 02e0 00100140 .word 1073811456 - 6979 02e4 00640240 .word 1073898496 - 6980 02e8 00000000 .word UART_DATA - 6981 02ec 28100140 .word 1073811496 - 6982 02f0 00000000 .word SD_SEEK - 6983 02f4 00000000 .word SD_SLIDE - 6984 02f8 00080240 .word 1073874944 - 6985 02fc 000C0240 .word 1073875968 - 6986 0300 00000240 .word 1073872896 - 6987 0304 00000000 .word .LC0 - ARM GAS /tmp/ccuHnxNu.s page 508 + 7415 0272 2749 ldr r1, .L390+124 + 7416 0274 2748 ldr r0, .L390+128 + 7417 0276 FFF7FEFF bl Seek_Read_File + 7418 .LVL675: +2461:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 7419 .loc 1 2461 10 discriminator 1 view .LVU2290 + 7420 027a 234C ldr r4, .L390+116 + 7421 027c 2060 str r0, [r4] +2462:Src/main.c **** UART_rec_incr = 0; + 7422 .loc 1 2462 5 is_stmt 1 view .LVU2291 +2462:Src/main.c **** UART_rec_incr = 0; + 7423 .loc 1 2462 12 is_stmt 0 view .LVU2292 + 7424 027e 2148 ldr r0, .L390+112 + 7425 0280 FFF7FEFF bl Unmount_SD + 7426 .LVL676: +2462:Src/main.c **** UART_rec_incr = 0; + 7427 .loc 1 2462 10 discriminator 1 view .LVU2293 + 7428 0284 2060 str r0, [r4] +2463:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 7429 .loc 1 2463 5 is_stmt 1 view .LVU2294 +2463:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 7430 .loc 1 2463 19 is_stmt 0 view .LVU2295 + 7431 0286 0023 movs r3, #0 + 7432 0288 084A ldr r2, .L390+24 + 7433 028a 1380 strh r3, [r2] @ movhi +2464:Src/main.c **** } + 7434 .loc 1 2464 5 is_stmt 1 view .LVU2296 +2464:Src/main.c **** } + 7435 .loc 1 2464 13 is_stmt 0 view .LVU2297 + 7436 028c 064A ldr r2, .L390+20 + 7437 028e 1370 strb r3, [r2] + 7438 0290 E9E7 b .L385 + 7439 .L391: + 7440 0292 00BF .align 2 + 7441 .L390: + 7442 0294 00000000 .word TO6 + 7443 0298 00000000 .word TO7 + 7444 029c 00000000 .word TO7_before + 7445 02a0 00000000 .word TO6_before + 7446 02a4 00000000 .word TO6_uart + 7447 02a8 00000000 .word flg_tmt + 7448 02ac 00000000 .word UART_rec_incr + 7449 02b0 00000000 .word fgoto + 7450 02b4 00000000 .word sizeoffile + 7451 02b8 00000000 .word u_tx_flg + 7452 02bc 00000000 .word u_rx_flg + 7453 02c0 00000000 .word Long_Data + 7454 02c4 00000000 .word Def_setup + 7455 02c8 00000000 .word LD1_def_setup + 7456 02cc 00000000 .word LD2_def_setup + 7457 02d0 00000000 .word Curr_setup + 7458 02d4 00000000 .word LD1_curr_setup + 7459 02d8 00000000 .word LD2_curr_setup + 7460 02dc 00100040 .word 1073745920 + 7461 02e0 00100140 .word 1073811456 + 7462 02e4 00640240 .word 1073898496 + 7463 02e8 00000000 .word UART_DATA + ARM GAS /tmp/ccLSPxIe.s page 522 - 6988 0308 00000000 .word test - 6989 030c 00000000 .word CPU_state - 6990 0310 00000000 .word COMMAND - 6991 0314 04000000 .word .LC1 - 6992 0318 00040240 .word 1073873920 - 6993 031c 00140240 .word 1073878016 - 6994 .cfi_endproc - 6995 .LFE1208: - 6997 .section .text.DS1809_Pulse,"ax",%progbits - 6998 .align 1 - 6999 .syntax unified - 7000 .thumb - 7001 .thumb_func - 7003 DS1809_Pulse: - 7004 .LVL639: - 7005 .LFB1218: -2755:Src/main.c **** for (uint16_t i = 0; i < count; i++) - 7006 .loc 1 2755 1 is_stmt 1 view -0 - 7007 .cfi_startproc - 7008 @ args = 0, pretend = 0, frame = 0 - 7009 @ frame_needed = 0, uses_anonymous_args = 0 -2755:Src/main.c **** for (uint16_t i = 0; i < count; i++) - 7010 .loc 1 2755 1 is_stmt 0 view .LVU2180 - 7011 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 7012 .LCFI68: - 7013 .cfi_def_cfa_offset 24 - 7014 .cfi_offset 4, -24 - 7015 .cfi_offset 5, -20 - 7016 .cfi_offset 6, -16 - 7017 .cfi_offset 7, -12 - 7018 .cfi_offset 8, -8 - 7019 .cfi_offset 14, -4 - 7020 0004 0746 mov r7, r0 - 7021 0006 0E46 mov r6, r1 - 7022 0008 9046 mov r8, r2 - 7023 000a 1D46 mov r5, r3 -2756:Src/main.c **** { - 7024 .loc 1 2756 2 is_stmt 1 view .LVU2181 - 7025 .LBB605: -2756:Src/main.c **** { - 7026 .loc 1 2756 7 view .LVU2182 - 7027 .LVL640: -2756:Src/main.c **** { - 7028 .loc 1 2756 16 is_stmt 0 view .LVU2183 - 7029 000c 0024 movs r4, #0 -2756:Src/main.c **** { - 7030 .loc 1 2756 2 view .LVU2184 - 7031 000e 16E0 b .L343 - 7032 .LVL641: - 7033 .L351: -2760:Src/main.c **** } - 7034 .loc 1 2760 4 is_stmt 1 view .LVU2185 - 7035 0010 0022 movs r2, #0 - 7036 0012 0421 movs r1, #4 - 7037 0014 1448 ldr r0, .L354 - 7038 0016 FFF7FEFF bl HAL_GPIO_WritePin - 7039 .LVL642: - ARM GAS /tmp/ccuHnxNu.s page 509 + 7464 02ec 28100140 .word 1073811496 + 7465 02f0 00000000 .word SD_SEEK + 7466 02f4 00000000 .word SD_SLIDE + 7467 02f8 00080240 .word 1073874944 + 7468 02fc 000C0240 .word 1073875968 + 7469 0300 00000240 .word 1073872896 + 7470 0304 00000000 .word .LC0 + 7471 0308 00000000 .word test + 7472 030c 00000000 .word CPU_state + 7473 0310 00000000 .word COMMAND + 7474 0314 04000000 .word .LC1 + 7475 0318 00040240 .word 1073873920 + 7476 031c 00140240 .word 1073878016 + 7477 .cfi_endproc + 7478 .LFE1208: + 7480 .section .text.DS1809_Pulse,"ax",%progbits + 7481 .align 1 + 7482 .syntax unified + 7483 .thumb + 7484 .thumb_func + 7486 DS1809_Pulse: + 7487 .LVL677: + 7488 .LFB1218: +2849:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 7489 .loc 1 2849 1 is_stmt 1 view -0 + 7490 .cfi_startproc + 7491 @ args = 0, pretend = 0, frame = 0 + 7492 @ frame_needed = 0, uses_anonymous_args = 0 +2849:Src/main.c **** for (uint16_t i = 0; i < count; i++) + 7493 .loc 1 2849 1 is_stmt 0 view .LVU2299 + 7494 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 7495 .LCFI71: + 7496 .cfi_def_cfa_offset 24 + 7497 .cfi_offset 4, -24 + 7498 .cfi_offset 5, -20 + 7499 .cfi_offset 6, -16 + 7500 .cfi_offset 7, -12 + 7501 .cfi_offset 8, -8 + 7502 .cfi_offset 14, -4 + 7503 0004 0746 mov r7, r0 + 7504 0006 0E46 mov r6, r1 + 7505 0008 9046 mov r8, r2 + 7506 000a 1D46 mov r5, r3 +2850:Src/main.c **** { + 7507 .loc 1 2850 2 is_stmt 1 view .LVU2300 + 7508 .LBB610: +2850:Src/main.c **** { + 7509 .loc 1 2850 7 view .LVU2301 + 7510 .LVL678: +2850:Src/main.c **** { + 7511 .loc 1 2850 16 is_stmt 0 view .LVU2302 + 7512 000c 0024 movs r4, #0 +2850:Src/main.c **** { + 7513 .loc 1 2850 2 view .LVU2303 + 7514 000e 16E0 b .L393 + 7515 .LVL679: + 7516 .L401: + ARM GAS /tmp/ccLSPxIe.s page 523 - 7040 001a 14E0 b .L344 - 7041 .L352: -2764:Src/main.c **** } - 7042 .loc 1 2764 4 view .LVU2186 - 7043 001c 0022 movs r2, #0 - 7044 001e 0821 movs r1, #8 - 7045 0020 1148 ldr r0, .L354 - 7046 0022 FFF7FEFF bl HAL_GPIO_WritePin - 7047 .LVL643: - 7048 0026 10E0 b .L345 - 7049 .L353: -2769:Src/main.c **** } - 7050 .loc 1 2769 4 view .LVU2187 - 7051 0028 0122 movs r2, #1 - 7052 002a 0421 movs r1, #4 - 7053 002c 0E48 ldr r0, .L354 - 7054 002e FFF7FEFF bl HAL_GPIO_WritePin - 7055 .LVL644: - 7056 0032 0FE0 b .L346 - 7057 .L347: -2775:Src/main.c **** } - 7058 .loc 1 2775 3 view .LVU2188 - 7059 0034 2846 mov r0, r5 - 7060 0036 FFF7FEFF bl HAL_Delay - 7061 .LVL645: -2756:Src/main.c **** { - 7062 .loc 1 2756 35 discriminator 2 view .LVU2189 - 7063 003a 0134 adds r4, r4, #1 - 7064 .LVL646: -2756:Src/main.c **** { - 7065 .loc 1 2756 35 is_stmt 0 discriminator 2 view .LVU2190 - 7066 003c A4B2 uxth r4, r4 - 7067 .LVL647: - 7068 .L343: -2756:Src/main.c **** { - 7069 .loc 1 2756 25 is_stmt 1 discriminator 1 view .LVU2191 - 7070 003e 4445 cmp r4, r8 - 7071 0040 10D2 bcs .L350 -2758:Src/main.c **** { - 7072 .loc 1 2758 3 view .LVU2192 -2758:Src/main.c **** { - 7073 .loc 1 2758 6 is_stmt 0 view .LVU2193 - 7074 0042 002F cmp r7, #0 - 7075 0044 E4D1 bne .L351 - 7076 .L344: -2762:Src/main.c **** { - 7077 .loc 1 2762 3 is_stmt 1 view .LVU2194 -2762:Src/main.c **** { - 7078 .loc 1 2762 6 is_stmt 0 view .LVU2195 - 7079 0046 002E cmp r6, #0 - 7080 0048 E8D1 bne .L352 - 7081 .L345: -2766:Src/main.c **** if (uc) - 7082 .loc 1 2766 3 is_stmt 1 view .LVU2196 - 7083 004a 2846 mov r0, r5 - 7084 004c FFF7FEFF bl HAL_Delay - 7085 .LVL648: - ARM GAS /tmp/ccuHnxNu.s page 510 +2854:Src/main.c **** } + 7517 .loc 1 2854 4 is_stmt 1 view .LVU2304 + 7518 0010 0022 movs r2, #0 + 7519 0012 0421 movs r1, #4 + 7520 0014 1448 ldr r0, .L404 + 7521 0016 FFF7FEFF bl HAL_GPIO_WritePin + 7522 .LVL680: + 7523 001a 14E0 b .L394 + 7524 .L402: +2858:Src/main.c **** } + 7525 .loc 1 2858 4 view .LVU2305 + 7526 001c 0022 movs r2, #0 + 7527 001e 0821 movs r1, #8 + 7528 0020 1148 ldr r0, .L404 + 7529 0022 FFF7FEFF bl HAL_GPIO_WritePin + 7530 .LVL681: + 7531 0026 10E0 b .L395 + 7532 .L403: +2863:Src/main.c **** } + 7533 .loc 1 2863 4 view .LVU2306 + 7534 0028 0122 movs r2, #1 + 7535 002a 0421 movs r1, #4 + 7536 002c 0E48 ldr r0, .L404 + 7537 002e FFF7FEFF bl HAL_GPIO_WritePin + 7538 .LVL682: + 7539 0032 0FE0 b .L396 + 7540 .L397: +2869:Src/main.c **** } + 7541 .loc 1 2869 3 view .LVU2307 + 7542 0034 2846 mov r0, r5 + 7543 0036 FFF7FEFF bl HAL_Delay + 7544 .LVL683: +2850:Src/main.c **** { + 7545 .loc 1 2850 35 discriminator 2 view .LVU2308 + 7546 003a 0134 adds r4, r4, #1 + 7547 .LVL684: +2850:Src/main.c **** { + 7548 .loc 1 2850 35 is_stmt 0 discriminator 2 view .LVU2309 + 7549 003c A4B2 uxth r4, r4 + 7550 .LVL685: + 7551 .L393: +2850:Src/main.c **** { + 7552 .loc 1 2850 25 is_stmt 1 discriminator 1 view .LVU2310 + 7553 003e 4445 cmp r4, r8 + 7554 0040 10D2 bcs .L400 +2852:Src/main.c **** { + 7555 .loc 1 2852 3 view .LVU2311 +2852:Src/main.c **** { + 7556 .loc 1 2852 6 is_stmt 0 view .LVU2312 + 7557 0042 002F cmp r7, #0 + 7558 0044 E4D1 bne .L401 + 7559 .L394: +2856:Src/main.c **** { + 7560 .loc 1 2856 3 is_stmt 1 view .LVU2313 +2856:Src/main.c **** { + 7561 .loc 1 2856 6 is_stmt 0 view .LVU2314 + 7562 0046 002E cmp r6, #0 + ARM GAS /tmp/ccLSPxIe.s page 524 -2767:Src/main.c **** { - 7086 .loc 1 2767 3 view .LVU2197 -2767:Src/main.c **** { - 7087 .loc 1 2767 6 is_stmt 0 view .LVU2198 - 7088 0050 002F cmp r7, #0 - 7089 0052 E9D1 bne .L353 - 7090 .L346: -2771:Src/main.c **** { - 7091 .loc 1 2771 3 is_stmt 1 view .LVU2199 -2771:Src/main.c **** { - 7092 .loc 1 2771 6 is_stmt 0 view .LVU2200 - 7093 0054 002E cmp r6, #0 - 7094 0056 EDD0 beq .L347 -2773:Src/main.c **** } - 7095 .loc 1 2773 4 is_stmt 1 view .LVU2201 - 7096 0058 0122 movs r2, #1 - 7097 005a 0821 movs r1, #8 - 7098 005c 0248 ldr r0, .L354 - 7099 005e FFF7FEFF bl HAL_GPIO_WritePin - 7100 .LVL649: - 7101 0062 E7E7 b .L347 - 7102 .L350: -2773:Src/main.c **** } - 7103 .loc 1 2773 4 is_stmt 0 view .LVU2202 - 7104 .LBE605: -2777:Src/main.c **** - 7105 .loc 1 2777 1 view .LVU2203 - 7106 0064 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 7107 .LVL650: - 7108 .L355: -2777:Src/main.c **** - 7109 .loc 1 2777 1 view .LVU2204 - 7110 .align 2 - 7111 .L354: - 7112 0068 00100240 .word 1073876992 - 7113 .cfi_endproc - 7114 .LFE1218: - 7116 .section .text.Get_ADC,"ax",%progbits - 7117 .align 1 - 7118 .syntax unified - 7119 .thumb - 7120 .thumb_func - 7122 Get_ADC: - 7123 .LVL651: - 7124 .LFB1229: -3417:Src/main.c **** uint16_t OUT; - 7125 .loc 1 3417 1 is_stmt 1 view -0 - 7126 .cfi_startproc - 7127 @ args = 0, pretend = 0, frame = 0 - 7128 @ frame_needed = 0, uses_anonymous_args = 0 -3417:Src/main.c **** uint16_t OUT; - 7129 .loc 1 3417 1 is_stmt 0 view .LVU2206 - 7130 0000 10B5 push {r4, lr} - 7131 .LCFI69: - 7132 .cfi_def_cfa_offset 8 - 7133 .cfi_offset 4, -8 - 7134 .cfi_offset 14, -4 - ARM GAS /tmp/ccuHnxNu.s page 511 + 7563 0048 E8D1 bne .L402 + 7564 .L395: +2860:Src/main.c **** if (uc) + 7565 .loc 1 2860 3 is_stmt 1 view .LVU2315 + 7566 004a 2846 mov r0, r5 + 7567 004c FFF7FEFF bl HAL_Delay + 7568 .LVL686: +2861:Src/main.c **** { + 7569 .loc 1 2861 3 view .LVU2316 +2861:Src/main.c **** { + 7570 .loc 1 2861 6 is_stmt 0 view .LVU2317 + 7571 0050 002F cmp r7, #0 + 7572 0052 E9D1 bne .L403 + 7573 .L396: +2865:Src/main.c **** { + 7574 .loc 1 2865 3 is_stmt 1 view .LVU2318 +2865:Src/main.c **** { + 7575 .loc 1 2865 6 is_stmt 0 view .LVU2319 + 7576 0054 002E cmp r6, #0 + 7577 0056 EDD0 beq .L397 +2867:Src/main.c **** } + 7578 .loc 1 2867 4 is_stmt 1 view .LVU2320 + 7579 0058 0122 movs r2, #1 + 7580 005a 0821 movs r1, #8 + 7581 005c 0248 ldr r0, .L404 + 7582 005e FFF7FEFF bl HAL_GPIO_WritePin + 7583 .LVL687: + 7584 0062 E7E7 b .L397 + 7585 .L400: +2867:Src/main.c **** } + 7586 .loc 1 2867 4 is_stmt 0 view .LVU2321 + 7587 .LBE610: +2871:Src/main.c **** + 7588 .loc 1 2871 1 view .LVU2322 + 7589 0064 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 7590 .LVL688: + 7591 .L405: +2871:Src/main.c **** + 7592 .loc 1 2871 1 view .LVU2323 + 7593 .align 2 + 7594 .L404: + 7595 0068 00100240 .word 1073876992 + 7596 .cfi_endproc + 7597 .LFE1218: + 7599 .section .text.Get_ADC,"ax",%progbits + 7600 .align 1 + 7601 .syntax unified + 7602 .thumb + 7603 .thumb_func + 7605 Get_ADC: + 7606 .LVL689: + 7607 .LFB1237: +3644:Src/main.c **** uint16_t OUT; + 7608 .loc 1 3644 1 is_stmt 1 view -0 + 7609 .cfi_startproc + 7610 @ args = 0, pretend = 0, frame = 0 + 7611 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccLSPxIe.s page 525 - 7135 0002 0024 movs r4, #0 -3418:Src/main.c **** switch (num) - 7136 .loc 1 3418 2 is_stmt 1 view .LVU2207 -3419:Src/main.c **** { - 7137 .loc 1 3419 2 view .LVU2208 - 7138 0004 0528 cmp r0, #5 - 7139 0006 2CD8 bhi .L365 - 7140 0008 DFE800F0 tbb [pc, r0] - 7141 .L359: - 7142 000c 03 .byte (.L364-.L359)/2 - 7143 000d 08 .byte (.L363-.L359)/2 - 7144 000e 12 .byte (.L362-.L359)/2 - 7145 000f 17 .byte (.L361-.L359)/2 - 7146 0010 1C .byte (.L360-.L359)/2 - 7147 0011 26 .byte (.L358-.L359)/2 - 7148 .p2align 1 - 7149 .L364: -3422:Src/main.c **** break; - 7150 .loc 1 3422 5 view .LVU2209 - 7151 0012 1548 ldr r0, .L367 - 7152 .LVL652: -3422:Src/main.c **** break; - 7153 .loc 1 3422 5 is_stmt 0 view .LVU2210 - 7154 0014 FFF7FEFF bl HAL_ADC_Start - 7155 .LVL653: -3423:Src/main.c **** case 1: - 7156 .loc 1 3423 4 is_stmt 1 view .LVU2211 - 7157 0018 2046 mov r0, r4 - 7158 .L357: - 7159 .LVL654: -3442:Src/main.c **** } - 7160 .loc 1 3442 2 view .LVU2212 -3443:Src/main.c **** - 7161 .loc 1 3443 1 is_stmt 0 view .LVU2213 - 7162 001a 10BD pop {r4, pc} - 7163 .LVL655: - 7164 .L363: -3425:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 7165 .loc 1 3425 5 is_stmt 1 view .LVU2214 - 7166 001c 124C ldr r4, .L367 - 7167 001e 6421 movs r1, #100 - 7168 0020 2046 mov r0, r4 - 7169 .LVL656: -3425:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 7170 .loc 1 3425 5 is_stmt 0 view .LVU2215 - 7171 0022 FFF7FEFF bl HAL_ADC_PollForConversion - 7172 .LVL657: -3426:Src/main.c **** break; - 7173 .loc 1 3426 9 is_stmt 1 view .LVU2216 -3426:Src/main.c **** break; - 7174 .loc 1 3426 15 is_stmt 0 view .LVU2217 - 7175 0026 2046 mov r0, r4 - 7176 0028 FFF7FEFF bl HAL_ADC_GetValue - 7177 .LVL658: -3426:Src/main.c **** break; - 7178 .loc 1 3426 13 discriminator 1 view .LVU2218 - 7179 002c 80B2 uxth r0, r0 - ARM GAS /tmp/ccuHnxNu.s page 512 +3644:Src/main.c **** uint16_t OUT; + 7612 .loc 1 3644 1 is_stmt 0 view .LVU2325 + 7613 0000 10B5 push {r4, lr} + 7614 .LCFI72: + 7615 .cfi_def_cfa_offset 8 + 7616 .cfi_offset 4, -8 + 7617 .cfi_offset 14, -4 + 7618 0002 0024 movs r4, #0 +3645:Src/main.c **** switch (num) + 7619 .loc 1 3645 2 is_stmt 1 view .LVU2326 +3646:Src/main.c **** { + 7620 .loc 1 3646 2 view .LVU2327 + 7621 0004 0528 cmp r0, #5 + 7622 0006 2CD8 bhi .L415 + 7623 0008 DFE800F0 tbb [pc, r0] + 7624 .L409: + 7625 000c 03 .byte (.L414-.L409)/2 + 7626 000d 08 .byte (.L413-.L409)/2 + 7627 000e 12 .byte (.L412-.L409)/2 + 7628 000f 17 .byte (.L411-.L409)/2 + 7629 0010 1C .byte (.L410-.L409)/2 + 7630 0011 26 .byte (.L408-.L409)/2 + 7631 .p2align 1 + 7632 .L414: +3649:Src/main.c **** break; + 7633 .loc 1 3649 5 view .LVU2328 + 7634 0012 1548 ldr r0, .L417 + 7635 .LVL690: +3649:Src/main.c **** break; + 7636 .loc 1 3649 5 is_stmt 0 view .LVU2329 + 7637 0014 FFF7FEFF bl HAL_ADC_Start + 7638 .LVL691: +3650:Src/main.c **** case 1: + 7639 .loc 1 3650 4 is_stmt 1 view .LVU2330 + 7640 0018 2046 mov r0, r4 + 7641 .L407: + 7642 .LVL692: +3669:Src/main.c **** } + 7643 .loc 1 3669 2 view .LVU2331 +3670:Src/main.c **** + 7644 .loc 1 3670 1 is_stmt 0 view .LVU2332 + 7645 001a 10BD pop {r4, pc} + 7646 .LVL693: + 7647 .L413: +3652:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 7648 .loc 1 3652 5 is_stmt 1 view .LVU2333 + 7649 001c 124C ldr r4, .L417 + 7650 001e 6421 movs r1, #100 + 7651 0020 2046 mov r0, r4 + 7652 .LVL694: +3652:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 7653 .loc 1 3652 5 is_stmt 0 view .LVU2334 + 7654 0022 FFF7FEFF bl HAL_ADC_PollForConversion + 7655 .LVL695: +3653:Src/main.c **** break; + 7656 .loc 1 3653 9 is_stmt 1 view .LVU2335 +3653:Src/main.c **** break; + ARM GAS /tmp/ccLSPxIe.s page 526 - 7180 .LVL659: -3427:Src/main.c **** case 2: - 7181 .loc 1 3427 4 is_stmt 1 view .LVU2219 - 7182 002e F4E7 b .L357 - 7183 .LVL660: - 7184 .L362: -3429:Src/main.c **** break; - 7185 .loc 1 3429 5 view .LVU2220 - 7186 0030 0D48 ldr r0, .L367 - 7187 .LVL661: -3429:Src/main.c **** break; - 7188 .loc 1 3429 5 is_stmt 0 view .LVU2221 - 7189 0032 FFF7FEFF bl HAL_ADC_Stop - 7190 .LVL662: -3430:Src/main.c **** case 3: - 7191 .loc 1 3430 4 is_stmt 1 view .LVU2222 - 7192 0036 2046 mov r0, r4 - 7193 0038 EFE7 b .L357 - 7194 .LVL663: - 7195 .L361: -3432:Src/main.c **** break; - 7196 .loc 1 3432 5 view .LVU2223 - 7197 003a 0C48 ldr r0, .L367+4 - 7198 .LVL664: -3432:Src/main.c **** break; - 7199 .loc 1 3432 5 is_stmt 0 view .LVU2224 - 7200 003c FFF7FEFF bl HAL_ADC_Start - 7201 .LVL665: -3433:Src/main.c **** case 4: - 7202 .loc 1 3433 4 is_stmt 1 view .LVU2225 - 7203 0040 2046 mov r0, r4 - 7204 0042 EAE7 b .L357 - 7205 .LVL666: - 7206 .L360: -3435:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 7207 .loc 1 3435 5 view .LVU2226 - 7208 0044 094C ldr r4, .L367+4 - 7209 0046 6421 movs r1, #100 - 7210 0048 2046 mov r0, r4 - 7211 .LVL667: -3435:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 7212 .loc 1 3435 5 is_stmt 0 view .LVU2227 - 7213 004a FFF7FEFF bl HAL_ADC_PollForConversion - 7214 .LVL668: -3436:Src/main.c **** break; - 7215 .loc 1 3436 9 is_stmt 1 view .LVU2228 -3436:Src/main.c **** break; - 7216 .loc 1 3436 15 is_stmt 0 view .LVU2229 - 7217 004e 2046 mov r0, r4 - 7218 0050 FFF7FEFF bl HAL_ADC_GetValue - 7219 .LVL669: -3436:Src/main.c **** break; - 7220 .loc 1 3436 13 discriminator 1 view .LVU2230 - 7221 0054 80B2 uxth r0, r0 - 7222 .LVL670: -3437:Src/main.c **** case 5: - 7223 .loc 1 3437 4 is_stmt 1 view .LVU2231 - ARM GAS /tmp/ccuHnxNu.s page 513 + 7657 .loc 1 3653 15 is_stmt 0 view .LVU2336 + 7658 0026 2046 mov r0, r4 + 7659 0028 FFF7FEFF bl HAL_ADC_GetValue + 7660 .LVL696: +3653:Src/main.c **** break; + 7661 .loc 1 3653 13 discriminator 1 view .LVU2337 + 7662 002c 80B2 uxth r0, r0 + 7663 .LVL697: +3654:Src/main.c **** case 2: + 7664 .loc 1 3654 4 is_stmt 1 view .LVU2338 + 7665 002e F4E7 b .L407 + 7666 .LVL698: + 7667 .L412: +3656:Src/main.c **** break; + 7668 .loc 1 3656 5 view .LVU2339 + 7669 0030 0D48 ldr r0, .L417 + 7670 .LVL699: +3656:Src/main.c **** break; + 7671 .loc 1 3656 5 is_stmt 0 view .LVU2340 + 7672 0032 FFF7FEFF bl HAL_ADC_Stop + 7673 .LVL700: +3657:Src/main.c **** case 3: + 7674 .loc 1 3657 4 is_stmt 1 view .LVU2341 + 7675 0036 2046 mov r0, r4 + 7676 0038 EFE7 b .L407 + 7677 .LVL701: + 7678 .L411: +3659:Src/main.c **** break; + 7679 .loc 1 3659 5 view .LVU2342 + 7680 003a 0C48 ldr r0, .L417+4 + 7681 .LVL702: +3659:Src/main.c **** break; + 7682 .loc 1 3659 5 is_stmt 0 view .LVU2343 + 7683 003c FFF7FEFF bl HAL_ADC_Start + 7684 .LVL703: +3660:Src/main.c **** case 4: + 7685 .loc 1 3660 4 is_stmt 1 view .LVU2344 + 7686 0040 2046 mov r0, r4 + 7687 0042 EAE7 b .L407 + 7688 .LVL704: + 7689 .L410: +3662:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 7690 .loc 1 3662 5 view .LVU2345 + 7691 0044 094C ldr r4, .L417+4 + 7692 0046 6421 movs r1, #100 + 7693 0048 2046 mov r0, r4 + 7694 .LVL705: +3662:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 7695 .loc 1 3662 5 is_stmt 0 view .LVU2346 + 7696 004a FFF7FEFF bl HAL_ADC_PollForConversion + 7697 .LVL706: +3663:Src/main.c **** break; + 7698 .loc 1 3663 9 is_stmt 1 view .LVU2347 +3663:Src/main.c **** break; + 7699 .loc 1 3663 15 is_stmt 0 view .LVU2348 + 7700 004e 2046 mov r0, r4 + 7701 0050 FFF7FEFF bl HAL_ADC_GetValue + ARM GAS /tmp/ccLSPxIe.s page 527 - 7224 0056 E0E7 b .L357 - 7225 .LVL671: - 7226 .L358: -3439:Src/main.c **** break; - 7227 .loc 1 3439 9 view .LVU2232 - 7228 0058 0448 ldr r0, .L367+4 - 7229 .LVL672: -3439:Src/main.c **** break; - 7230 .loc 1 3439 9 is_stmt 0 view .LVU2233 - 7231 005a FFF7FEFF bl HAL_ADC_Stop - 7232 .LVL673: -3440:Src/main.c **** } - 7233 .loc 1 3440 4 is_stmt 1 view .LVU2234 - 7234 005e 2046 mov r0, r4 - 7235 0060 DBE7 b .L357 - 7236 .LVL674: - 7237 .L365: -3419:Src/main.c **** { - 7238 .loc 1 3419 2 is_stmt 0 view .LVU2235 - 7239 0062 2046 mov r0, r4 - 7240 .LVL675: -3419:Src/main.c **** { - 7241 .loc 1 3419 2 view .LVU2236 - 7242 0064 D9E7 b .L357 - 7243 .L368: - 7244 0066 00BF .align 2 - 7245 .L367: - 7246 0068 00000000 .word hadc1 - 7247 006c 00000000 .word hadc3 - 7248 .cfi_endproc - 7249 .LFE1229: - 7251 .section .text.Set_LTEC,"ax",%progbits - 7252 .align 1 - 7253 .global Set_LTEC - 7254 .syntax unified - 7255 .thumb - 7256 .thumb_func - 7258 Set_LTEC: - 7259 .LVL676: - 7260 .LFB1227: -3239:Src/main.c **** uint32_t tmp32; - 7261 .loc 1 3239 1 is_stmt 1 view -0 - 7262 .cfi_startproc - 7263 @ args = 0, pretend = 0, frame = 0 - 7264 @ frame_needed = 0, uses_anonymous_args = 0 -3239:Src/main.c **** uint32_t tmp32; - 7265 .loc 1 3239 1 is_stmt 0 view .LVU2238 - 7266 0000 38B5 push {r3, r4, r5, lr} - 7267 .LCFI70: - 7268 .cfi_def_cfa_offset 16 - 7269 .cfi_offset 3, -16 - 7270 .cfi_offset 4, -12 - 7271 .cfi_offset 5, -8 - 7272 .cfi_offset 14, -4 - 7273 0002 0446 mov r4, r0 - 7274 0004 0D46 mov r5, r1 -3240:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 514 + 7702 .LVL707: +3663:Src/main.c **** break; + 7703 .loc 1 3663 13 discriminator 1 view .LVU2349 + 7704 0054 80B2 uxth r0, r0 + 7705 .LVL708: +3664:Src/main.c **** case 5: + 7706 .loc 1 3664 4 is_stmt 1 view .LVU2350 + 7707 0056 E0E7 b .L407 + 7708 .LVL709: + 7709 .L408: +3666:Src/main.c **** break; + 7710 .loc 1 3666 9 view .LVU2351 + 7711 0058 0448 ldr r0, .L417+4 + 7712 .LVL710: +3666:Src/main.c **** break; + 7713 .loc 1 3666 9 is_stmt 0 view .LVU2352 + 7714 005a FFF7FEFF bl HAL_ADC_Stop + 7715 .LVL711: +3667:Src/main.c **** } + 7716 .loc 1 3667 4 is_stmt 1 view .LVU2353 + 7717 005e 2046 mov r0, r4 + 7718 0060 DBE7 b .L407 + 7719 .LVL712: + 7720 .L415: +3646:Src/main.c **** { + 7721 .loc 1 3646 2 is_stmt 0 view .LVU2354 + 7722 0062 2046 mov r0, r4 + 7723 .LVL713: +3646:Src/main.c **** { + 7724 .loc 1 3646 2 view .LVU2355 + 7725 0064 D9E7 b .L407 + 7726 .L418: + 7727 0066 00BF .align 2 + 7728 .L417: + 7729 0068 00000000 .word hadc1 + 7730 006c 00000000 .word hadc3 + 7731 .cfi_endproc + 7732 .LFE1237: + 7734 .section .text.Set_LTEC,"ax",%progbits + 7735 .align 1 + 7736 .global Set_LTEC + 7737 .syntax unified + 7738 .thumb + 7739 .thumb_func + 7741 Set_LTEC: + 7742 .LVL714: + 7743 .LFB1235: +3466:Src/main.c **** uint32_t tmp32; + 7744 .loc 1 3466 1 is_stmt 1 view -0 + 7745 .cfi_startproc + 7746 @ args = 0, pretend = 0, frame = 0 + 7747 @ frame_needed = 0, uses_anonymous_args = 0 +3466:Src/main.c **** uint32_t tmp32; + 7748 .loc 1 3466 1 is_stmt 0 view .LVU2357 + 7749 0000 38B5 push {r3, r4, r5, lr} + 7750 .LCFI73: + 7751 .cfi_def_cfa_offset 16 + ARM GAS /tmp/ccLSPxIe.s page 528 - 7275 .loc 1 3240 2 is_stmt 1 view .LVU2239 -3242:Src/main.c **** { - 7276 .loc 1 3242 2 view .LVU2240 -3242:Src/main.c **** { - 7277 .loc 1 3242 5 is_stmt 0 view .LVU2241 - 7278 0006 0328 cmp r0, #3 - 7279 0008 18BF it ne - 7280 000a 0128 cmpne r0, #1 - 7281 000c 06D0 beq .L403 - 7282 .LVL677: - 7283 .L370: -3248:Src/main.c **** { - 7284 .loc 1 3248 2 is_stmt 1 view .LVU2242 - 7285 000e 013C subs r4, r4, #1 - 7286 .LVL678: -3248:Src/main.c **** { - 7287 .loc 1 3248 2 is_stmt 0 view .LVU2243 - 7288 0010 032C cmp r4, #3 - 7289 0012 2ED8 bhi .L371 - 7290 0014 DFE804F0 tbb [pc, r4] - 7291 .L373: - 7292 0018 0D .byte (.L376-.L373)/2 - 7293 0019 45 .byte (.L375-.L373)/2 - 7294 001a 65 .byte (.L374-.L373)/2 - 7295 001b 86 .byte (.L372-.L373)/2 - 7296 .LVL679: - 7297 .p2align 1 - 7298 .L403: -3244:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); - 7299 .loc 1 3244 3 is_stmt 1 view .LVU2244 - 7300 001c 0121 movs r1, #1 - 7301 .LVL680: -3244:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); - 7302 .loc 1 3244 3 is_stmt 0 view .LVU2245 - 7303 001e 0220 movs r0, #2 - 7304 .LVL681: -3244:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); - 7305 .loc 1 3244 3 view .LVU2246 - 7306 0020 FFF7FEFF bl SPI2_SetMode - 7307 .LVL682: -3245:Src/main.c **** } - 7308 .loc 1 3245 3 is_stmt 1 view .LVU2247 - 7309 0024 0122 movs r2, #1 - 7310 0026 4FF48051 mov r1, #4096 - 7311 002a 4F48 ldr r0, .L404 - 7312 002c FFF7FEFF bl HAL_GPIO_WritePin - 7313 .LVL683: - 7314 0030 EDE7 b .L370 - 7315 .LVL684: - 7316 .L376: -3251:Src/main.c **** //tmp32=0; - 7317 .loc 1 3251 4 view .LVU2248 - 7318 0032 0022 movs r2, #0 - 7319 0034 4FF48041 mov r1, #16384 - 7320 0038 4B48 ldr r0, .L404 - 7321 003a FFF7FEFF bl HAL_GPIO_WritePin - 7322 .LVL685: - ARM GAS /tmp/ccuHnxNu.s page 515 - - -3254:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7323 .loc 1 3254 4 view .LVU2249 -3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7324 .loc 1 3255 4 view .LVU2250 -3254:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7325 .loc 1 3254 10 is_stmt 0 view .LVU2251 - 7326 003e 0022 movs r2, #0 - 7327 .LVL686: - 7328 .L377: -3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7329 .loc 1 3255 42 is_stmt 1 discriminator 1 view .LVU2252 - 7330 .LBB606: - 7331 .LBI606: - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7332 .loc 4 916 26 view .LVU2253 - 7333 .LBB607: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7334 .loc 4 918 3 view .LVU2254 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7335 .loc 4 918 12 is_stmt 0 view .LVU2255 - 7336 0040 4A4B ldr r3, .L404+4 - 7337 0042 9B68 ldr r3, [r3, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7338 .loc 4 918 66 view .LVU2256 - 7339 0044 13F0020F tst r3, #2 - 7340 0048 04D1 bne .L378 - 7341 .LVL687: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7342 .loc 4 918 66 view .LVU2257 - 7343 .LBE607: - 7344 .LBE606: -3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7345 .loc 1 3255 42 discriminator 2 view .LVU2258 - 7346 004a B2F5FA7F cmp r2, #500 - 7347 004e 01D8 bhi .L378 -3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7348 .loc 1 3255 59 is_stmt 1 discriminator 3 view .LVU2259 -3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7349 .loc 1 3255 64 is_stmt 0 discriminator 3 view .LVU2260 - 7350 0050 0132 adds r2, r2, #1 - 7351 .LVL688: -3255:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7352 .loc 1 3255 64 discriminator 3 view .LVU2261 - 7353 0052 F5E7 b .L377 - 7354 .L378: -3256:Src/main.c **** tmp32 = 0; - 7355 .loc 1 3256 4 is_stmt 1 view .LVU2262 - 7356 .LVL689: - 7357 .LBB608: - 7358 .LBI608: -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7359 .loc 4 1373 22 view .LVU2263 - 7360 .LBB609: -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 7361 .loc 4 1376 3 view .LVU2264 - 7362 .loc 4 1377 3 view .LVU2265 - 7363 .loc 4 1377 10 is_stmt 0 view .LVU2266 - ARM GAS /tmp/ccuHnxNu.s page 516 - - - 7364 0054 454B ldr r3, .L404+4 - 7365 0056 9D81 strh r5, [r3, #12] @ movhi - 7366 .LVL690: - 7367 .loc 4 1377 10 view .LVU2267 - 7368 .LBE609: - 7369 .LBE608: -3257:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7370 .loc 1 3257 4 is_stmt 1 view .LVU2268 -3258:Src/main.c **** (void) SPI2->DR; - 7371 .loc 1 3258 4 view .LVU2269 -3257:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7372 .loc 1 3257 10 is_stmt 0 view .LVU2270 - 7373 0058 0022 movs r2, #0 - 7374 .LVL691: - 7375 .L380: -3258:Src/main.c **** (void) SPI2->DR; - 7376 .loc 1 3258 43 is_stmt 1 discriminator 1 view .LVU2271 - 7377 .LBB610: - 7378 .LBI610: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7379 .loc 4 905 26 view .LVU2272 - 7380 .LBB611: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7381 .loc 4 907 3 view .LVU2273 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7382 .loc 4 907 12 is_stmt 0 view .LVU2274 - 7383 005a 444B ldr r3, .L404+4 - 7384 005c 9B68 ldr r3, [r3, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7385 .loc 4 907 68 view .LVU2275 - 7386 005e 13F0010F tst r3, #1 - 7387 0062 04D1 bne .L381 - 7388 .LVL692: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7389 .loc 4 907 68 view .LVU2276 - 7390 .LBE611: - 7391 .LBE610: -3258:Src/main.c **** (void) SPI2->DR; - 7392 .loc 1 3258 43 discriminator 2 view .LVU2277 - 7393 0064 B2F5FA7F cmp r2, #500 - 7394 0068 01D8 bhi .L381 -3258:Src/main.c **** (void) SPI2->DR; - 7395 .loc 1 3258 60 is_stmt 1 discriminator 3 view .LVU2278 -3258:Src/main.c **** (void) SPI2->DR; - 7396 .loc 1 3258 65 is_stmt 0 discriminator 3 view .LVU2279 - 7397 006a 0132 adds r2, r2, #1 - 7398 .LVL693: -3258:Src/main.c **** (void) SPI2->DR; - 7399 .loc 1 3258 65 discriminator 3 view .LVU2280 - 7400 006c F5E7 b .L380 - 7401 .L381: -3259:Src/main.c **** break; - 7402 .loc 1 3259 4 is_stmt 1 view .LVU2281 - 7403 006e 3F4B ldr r3, .L404+4 - 7404 0070 DB68 ldr r3, [r3, #12] -3260:Src/main.c **** case 2: - 7405 .loc 1 3260 3 view .LVU2282 - ARM GAS /tmp/ccuHnxNu.s page 517 - - - 7406 .LVL694: - 7407 .L371: -3296:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 7408 .loc 1 3296 2 view .LVU2283 - 7409 0072 0122 movs r2, #1 - 7410 0074 4FF48041 mov r1, #16384 - 7411 0078 3B48 ldr r0, .L404 - 7412 007a FFF7FEFF bl HAL_GPIO_WritePin - 7413 .LVL695: -3297:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 7414 .loc 1 3297 2 view .LVU2284 - 7415 007e 0122 movs r2, #1 - 7416 0080 4021 movs r1, #64 - 7417 0082 3B48 ldr r0, .L404+8 - 7418 0084 FFF7FEFF bl HAL_GPIO_WritePin - 7419 .LVL696: -3298:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 7420 .loc 1 3298 2 view .LVU2285 - 7421 0088 0122 movs r2, #1 - 7422 008a 4FF48051 mov r1, #4096 - 7423 008e 3948 ldr r0, .L404+12 - 7424 0090 FFF7FEFF bl HAL_GPIO_WritePin - 7425 .LVL697: -3299:Src/main.c **** } - 7426 .loc 1 3299 2 view .LVU2286 - 7427 0094 0122 movs r2, #1 - 7428 0096 4FF48071 mov r1, #256 - 7429 009a 3748 ldr r0, .L404+16 - 7430 009c FFF7FEFF bl HAL_GPIO_WritePin - 7431 .LVL698: -3300:Src/main.c **** static uint16_t MPhD_T(uint8_t num) - 7432 .loc 1 3300 1 is_stmt 0 view .LVU2287 - 7433 00a0 38BD pop {r3, r4, r5, pc} - 7434 .LVL699: - 7435 .L375: -3263:Src/main.c **** //tmp32=0; - 7436 .loc 1 3263 4 is_stmt 1 view .LVU2288 - 7437 00a2 0022 movs r2, #0 - 7438 00a4 4021 movs r1, #64 - 7439 00a6 3248 ldr r0, .L404+8 - 7440 00a8 FFF7FEFF bl HAL_GPIO_WritePin - 7441 .LVL700: -3266:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7442 .loc 1 3266 4 view .LVU2289 -3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7443 .loc 1 3267 4 view .LVU2290 -3266:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7444 .loc 1 3266 10 is_stmt 0 view .LVU2291 - 7445 00ac 0022 movs r2, #0 - 7446 .LVL701: - 7447 .L383: -3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7448 .loc 1 3267 42 is_stmt 1 discriminator 1 view .LVU2292 - 7449 .LBB612: - 7450 .LBI612: - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7451 .loc 4 916 26 view .LVU2293 - ARM GAS /tmp/ccuHnxNu.s page 518 - - - 7452 .LBB613: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7453 .loc 4 918 3 view .LVU2294 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7454 .loc 4 918 12 is_stmt 0 view .LVU2295 - 7455 00ae 334B ldr r3, .L404+20 - 7456 00b0 9B68 ldr r3, [r3, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7457 .loc 4 918 66 view .LVU2296 - 7458 00b2 13F0020F tst r3, #2 - 7459 00b6 04D1 bne .L384 - 7460 .LVL702: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7461 .loc 4 918 66 view .LVU2297 - 7462 .LBE613: - 7463 .LBE612: -3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7464 .loc 1 3267 42 discriminator 2 view .LVU2298 - 7465 00b8 B2F5FA7F cmp r2, #500 - 7466 00bc 01D8 bhi .L384 -3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7467 .loc 1 3267 59 is_stmt 1 discriminator 3 view .LVU2299 -3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7468 .loc 1 3267 64 is_stmt 0 discriminator 3 view .LVU2300 - 7469 00be 0132 adds r2, r2, #1 - 7470 .LVL703: -3267:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7471 .loc 1 3267 64 discriminator 3 view .LVU2301 - 7472 00c0 F5E7 b .L383 - 7473 .L384: -3268:Src/main.c **** tmp32 = 0; - 7474 .loc 1 3268 4 is_stmt 1 view .LVU2302 - 7475 .LVL704: - 7476 .LBB614: - 7477 .LBI614: -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7478 .loc 4 1373 22 view .LVU2303 - 7479 .LBB615: -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 7480 .loc 4 1376 3 view .LVU2304 - 7481 .loc 4 1377 3 view .LVU2305 - 7482 .loc 4 1377 10 is_stmt 0 view .LVU2306 - 7483 00c2 2E4B ldr r3, .L404+20 - 7484 00c4 9D81 strh r5, [r3, #12] @ movhi - 7485 .LVL705: - 7486 .loc 4 1377 10 view .LVU2307 - 7487 .LBE615: - 7488 .LBE614: -3269:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7489 .loc 1 3269 4 is_stmt 1 view .LVU2308 -3270:Src/main.c **** (void) SPI6->DR; - 7490 .loc 1 3270 4 view .LVU2309 -3269:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7491 .loc 1 3269 10 is_stmt 0 view .LVU2310 - 7492 00c6 0022 movs r2, #0 - 7493 .LVL706: - 7494 .L386: - ARM GAS /tmp/ccuHnxNu.s page 519 - - -3270:Src/main.c **** (void) SPI6->DR; - 7495 .loc 1 3270 43 is_stmt 1 discriminator 1 view .LVU2311 - 7496 .LBB616: - 7497 .LBI616: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7498 .loc 4 905 26 view .LVU2312 - 7499 .LBB617: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7500 .loc 4 907 3 view .LVU2313 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7501 .loc 4 907 12 is_stmt 0 view .LVU2314 - 7502 00c8 2C4B ldr r3, .L404+20 - 7503 00ca 9B68 ldr r3, [r3, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7504 .loc 4 907 68 view .LVU2315 - 7505 00cc 13F0010F tst r3, #1 - 7506 00d0 04D1 bne .L387 - 7507 .LVL707: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7508 .loc 4 907 68 view .LVU2316 - 7509 .LBE617: - 7510 .LBE616: -3270:Src/main.c **** (void) SPI6->DR; - 7511 .loc 1 3270 43 discriminator 2 view .LVU2317 - 7512 00d2 B2F5FA7F cmp r2, #500 - 7513 00d6 01D8 bhi .L387 -3270:Src/main.c **** (void) SPI6->DR; - 7514 .loc 1 3270 60 is_stmt 1 discriminator 3 view .LVU2318 -3270:Src/main.c **** (void) SPI6->DR; - 7515 .loc 1 3270 65 is_stmt 0 discriminator 3 view .LVU2319 - 7516 00d8 0132 adds r2, r2, #1 - 7517 .LVL708: -3270:Src/main.c **** (void) SPI6->DR; - 7518 .loc 1 3270 65 discriminator 3 view .LVU2320 - 7519 00da F5E7 b .L386 - 7520 .L387: -3271:Src/main.c **** break; - 7521 .loc 1 3271 4 is_stmt 1 view .LVU2321 - 7522 00dc 274B ldr r3, .L404+20 - 7523 00de DB68 ldr r3, [r3, #12] -3272:Src/main.c **** case 3: - 7524 .loc 1 3272 3 view .LVU2322 - 7525 00e0 C7E7 b .L371 - 7526 .LVL709: - 7527 .L374: -3274:Src/main.c **** //tmp32=0; - 7528 .loc 1 3274 4 view .LVU2323 - 7529 00e2 0022 movs r2, #0 - 7530 00e4 4FF48051 mov r1, #4096 - 7531 00e8 2248 ldr r0, .L404+12 - 7532 00ea FFF7FEFF bl HAL_GPIO_WritePin - 7533 .LVL710: -3277:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7534 .loc 1 3277 4 view .LVU2324 -3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7535 .loc 1 3278 4 view .LVU2325 -3277:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - ARM GAS /tmp/ccuHnxNu.s page 520 - - - 7536 .loc 1 3277 10 is_stmt 0 view .LVU2326 - 7537 00ee 0022 movs r2, #0 - 7538 .LVL711: - 7539 .L389: -3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7540 .loc 1 3278 42 is_stmt 1 discriminator 1 view .LVU2327 - 7541 .LBB618: - 7542 .LBI618: - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7543 .loc 4 916 26 view .LVU2328 - 7544 .LBB619: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7545 .loc 4 918 3 view .LVU2329 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7546 .loc 4 918 12 is_stmt 0 view .LVU2330 - 7547 00f0 1E4B ldr r3, .L404+4 - 7548 00f2 9B68 ldr r3, [r3, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7549 .loc 4 918 66 view .LVU2331 - 7550 00f4 13F0020F tst r3, #2 - 7551 00f8 04D1 bne .L390 - 7552 .LVL712: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7553 .loc 4 918 66 view .LVU2332 - 7554 .LBE619: - 7555 .LBE618: -3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7556 .loc 1 3278 42 discriminator 2 view .LVU2333 - 7557 00fa B2F5FA7F cmp r2, #500 - 7558 00fe 01D8 bhi .L390 -3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7559 .loc 1 3278 59 is_stmt 1 discriminator 3 view .LVU2334 -3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7560 .loc 1 3278 64 is_stmt 0 discriminator 3 view .LVU2335 - 7561 0100 0132 adds r2, r2, #1 - 7562 .LVL713: -3278:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 7563 .loc 1 3278 64 discriminator 3 view .LVU2336 - 7564 0102 F5E7 b .L389 - 7565 .L390: -3279:Src/main.c **** tmp32 = 0; - 7566 .loc 1 3279 4 is_stmt 1 view .LVU2337 - 7567 .LVL714: - 7568 .LBB620: - 7569 .LBI620: -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7570 .loc 4 1373 22 view .LVU2338 - 7571 .LBB621: -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 7572 .loc 4 1376 3 view .LVU2339 - 7573 .loc 4 1377 3 view .LVU2340 - 7574 .loc 4 1377 10 is_stmt 0 view .LVU2341 - 7575 0104 194B ldr r3, .L404+4 - 7576 0106 9D81 strh r5, [r3, #12] @ movhi - 7577 .LVL715: - 7578 .loc 4 1377 10 view .LVU2342 - 7579 .LBE621: - ARM GAS /tmp/ccuHnxNu.s page 521 - - - 7580 .LBE620: -3280:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7581 .loc 1 3280 4 is_stmt 1 view .LVU2343 -3281:Src/main.c **** (void) SPI2->DR; - 7582 .loc 1 3281 4 view .LVU2344 -3280:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7583 .loc 1 3280 10 is_stmt 0 view .LVU2345 - 7584 0108 0022 movs r2, #0 - 7585 .LVL716: - 7586 .L392: -3281:Src/main.c **** (void) SPI2->DR; - 7587 .loc 1 3281 43 is_stmt 1 discriminator 1 view .LVU2346 - 7588 .LBB622: - 7589 .LBI622: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7590 .loc 4 905 26 view .LVU2347 - 7591 .LBB623: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7592 .loc 4 907 3 view .LVU2348 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7593 .loc 4 907 12 is_stmt 0 view .LVU2349 - 7594 010a 184B ldr r3, .L404+4 - 7595 010c 9B68 ldr r3, [r3, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7596 .loc 4 907 68 view .LVU2350 - 7597 010e 13F0010F tst r3, #1 - 7598 0112 04D1 bne .L393 - 7599 .LVL717: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7600 .loc 4 907 68 view .LVU2351 - 7601 .LBE623: - 7602 .LBE622: -3281:Src/main.c **** (void) SPI2->DR; - 7603 .loc 1 3281 43 discriminator 2 view .LVU2352 - 7604 0114 B2F5FA7F cmp r2, #500 - 7605 0118 01D8 bhi .L393 -3281:Src/main.c **** (void) SPI2->DR; - 7606 .loc 1 3281 60 is_stmt 1 discriminator 3 view .LVU2353 -3281:Src/main.c **** (void) SPI2->DR; - 7607 .loc 1 3281 65 is_stmt 0 discriminator 3 view .LVU2354 - 7608 011a 0132 adds r2, r2, #1 - 7609 .LVL718: -3281:Src/main.c **** (void) SPI2->DR; - 7610 .loc 1 3281 65 discriminator 3 view .LVU2355 - 7611 011c F5E7 b .L392 - 7612 .L393: -3282:Src/main.c **** break; - 7613 .loc 1 3282 4 is_stmt 1 view .LVU2356 - 7614 011e 134B ldr r3, .L404+4 - 7615 0120 DB68 ldr r3, [r3, #12] -3283:Src/main.c **** case 4: - 7616 .loc 1 3283 3 view .LVU2357 - 7617 0122 A6E7 b .L371 - 7618 .LVL719: - 7619 .L372: -3285:Src/main.c **** //tmp32=0; - 7620 .loc 1 3285 4 view .LVU2358 - ARM GAS /tmp/ccuHnxNu.s page 522 - - - 7621 0124 0022 movs r2, #0 - 7622 0126 4FF48071 mov r1, #256 - 7623 012a 1348 ldr r0, .L404+16 - 7624 012c FFF7FEFF bl HAL_GPIO_WritePin - 7625 .LVL720: -3288:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7626 .loc 1 3288 4 view .LVU2359 -3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7627 .loc 1 3289 4 view .LVU2360 -3288:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 7628 .loc 1 3288 10 is_stmt 0 view .LVU2361 - 7629 0130 0022 movs r2, #0 - 7630 .LVL721: - 7631 .L395: -3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7632 .loc 1 3289 42 is_stmt 1 discriminator 1 view .LVU2362 - 7633 .LBB624: - 7634 .LBI624: - 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7635 .loc 4 916 26 view .LVU2363 - 7636 .LBB625: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7637 .loc 4 918 3 view .LVU2364 - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7638 .loc 4 918 12 is_stmt 0 view .LVU2365 - 7639 0132 124B ldr r3, .L404+20 - 7640 0134 9B68 ldr r3, [r3, #8] - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7641 .loc 4 918 66 view .LVU2366 - 7642 0136 13F0020F tst r3, #2 - 7643 013a 04D1 bne .L396 - 7644 .LVL722: - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7645 .loc 4 918 66 view .LVU2367 - 7646 .LBE625: - 7647 .LBE624: -3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7648 .loc 1 3289 42 discriminator 2 view .LVU2368 - 7649 013c B2F5FA7F cmp r2, #500 - 7650 0140 01D8 bhi .L396 -3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7651 .loc 1 3289 59 is_stmt 1 discriminator 3 view .LVU2369 -3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7652 .loc 1 3289 64 is_stmt 0 discriminator 3 view .LVU2370 - 7653 0142 0132 adds r2, r2, #1 - 7654 .LVL723: -3289:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 7655 .loc 1 3289 64 discriminator 3 view .LVU2371 - 7656 0144 F5E7 b .L395 - 7657 .L396: -3290:Src/main.c **** tmp32 = 0; - 7658 .loc 1 3290 4 is_stmt 1 view .LVU2372 - 7659 .LVL724: - 7660 .LBB626: - 7661 .LBI626: -1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7662 .loc 4 1373 22 view .LVU2373 - ARM GAS /tmp/ccuHnxNu.s page 523 - - - 7663 .LBB627: -1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; - 7664 .loc 4 1376 3 view .LVU2374 - 7665 .loc 4 1377 3 view .LVU2375 - 7666 .loc 4 1377 10 is_stmt 0 view .LVU2376 - 7667 0146 0D4B ldr r3, .L404+20 - 7668 0148 9D81 strh r5, [r3, #12] @ movhi - 7669 .LVL725: - 7670 .loc 4 1377 10 view .LVU2377 - 7671 .LBE627: - 7672 .LBE626: -3291:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7673 .loc 1 3291 4 is_stmt 1 view .LVU2378 -3292:Src/main.c **** (void) SPI6->DR; - 7674 .loc 1 3292 4 view .LVU2379 -3291:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 7675 .loc 1 3291 10 is_stmt 0 view .LVU2380 - 7676 014a 0022 movs r2, #0 - 7677 .LVL726: - 7678 .L398: -3292:Src/main.c **** (void) SPI6->DR; - 7679 .loc 1 3292 43 is_stmt 1 discriminator 1 view .LVU2381 - 7680 .LBB628: - 7681 .LBI628: - 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 7682 .loc 4 905 26 view .LVU2382 - 7683 .LBB629: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7684 .loc 4 907 3 view .LVU2383 - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7685 .loc 4 907 12 is_stmt 0 view .LVU2384 - 7686 014c 0B4B ldr r3, .L404+20 - 7687 014e 9B68 ldr r3, [r3, #8] - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7688 .loc 4 907 68 view .LVU2385 - 7689 0150 13F0010F tst r3, #1 - 7690 0154 04D1 bne .L399 - 7691 .LVL727: - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 7692 .loc 4 907 68 view .LVU2386 - 7693 .LBE629: - 7694 .LBE628: -3292:Src/main.c **** (void) SPI6->DR; - 7695 .loc 1 3292 43 discriminator 2 view .LVU2387 - 7696 0156 B2F5FA7F cmp r2, #500 - 7697 015a 01D8 bhi .L399 -3292:Src/main.c **** (void) SPI6->DR; - 7698 .loc 1 3292 60 is_stmt 1 discriminator 3 view .LVU2388 -3292:Src/main.c **** (void) SPI6->DR; - 7699 .loc 1 3292 65 is_stmt 0 discriminator 3 view .LVU2389 - 7700 015c 0132 adds r2, r2, #1 - 7701 .LVL728: -3292:Src/main.c **** (void) SPI6->DR; - 7702 .loc 1 3292 65 discriminator 3 view .LVU2390 - 7703 015e F5E7 b .L398 - 7704 .L399: -3293:Src/main.c **** break; - ARM GAS /tmp/ccuHnxNu.s page 524 - - - 7705 .loc 1 3293 4 is_stmt 1 view .LVU2391 - 7706 0160 064B ldr r3, .L404+20 - 7707 0162 DB68 ldr r3, [r3, #12] -3294:Src/main.c **** } - 7708 .loc 1 3294 3 view .LVU2392 - 7709 0164 85E7 b .L371 - 7710 .L405: - 7711 0166 00BF .align 2 - 7712 .L404: - 7713 0168 00040240 .word 1073873920 - 7714 016c 00380040 .word 1073756160 - 7715 0170 00000240 .word 1073872896 - 7716 0174 000C0240 .word 1073875968 - 7717 0178 00100240 .word 1073876992 - 7718 017c 00540140 .word 1073828864 - 7719 .cfi_endproc - 7720 .LFE1227: - 7722 .section .text.Decode_uart,"ax",%progbits - 7723 .align 1 - 7724 .syntax unified - 7725 .thumb - 7726 .thumb_func - 7728 Decode_uart: - 7729 .LVL729: - 7730 .LFB1209: -2391:Src/main.c **** // uint8_t *temp1; - 7731 .loc 1 2391 1 view -0 - 7732 .cfi_startproc - 7733 @ args = 0, pretend = 0, frame = 0 - 7734 @ frame_needed = 0, uses_anonymous_args = 0 -2391:Src/main.c **** // uint8_t *temp1; - 7735 .loc 1 2391 1 is_stmt 0 view .LVU2394 - 7736 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} - 7737 .LCFI71: - 7738 .cfi_def_cfa_offset 32 - 7739 .cfi_offset 3, -32 - 7740 .cfi_offset 4, -28 - 7741 .cfi_offset 5, -24 - 7742 .cfi_offset 6, -20 - 7743 .cfi_offset 7, -16 - 7744 .cfi_offset 8, -12 - 7745 .cfi_offset 9, -8 - 7746 .cfi_offset 14, -4 - 7747 0004 0546 mov r5, r0 - 7748 0006 0F46 mov r7, r1 - 7749 0008 1646 mov r6, r2 - 7750 000a 1C46 mov r4, r3 -2393:Src/main.c **** - 7751 .loc 1 2393 2 is_stmt 1 view .LVU2395 -2398:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 7752 .loc 1 2398 2 view .LVU2396 -2398:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 7753 .loc 1 2398 6 is_stmt 0 view .LVU2397 - 7754 000c AF4B ldr r3, .L430 - 7755 .LVL730: -2398:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 7756 .loc 1 2398 6 view .LVU2398 - ARM GAS /tmp/ccuHnxNu.s page 525 - - - 7757 000e 0022 movs r2, #0 - 7758 .LVL731: -2398:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 7759 .loc 1 2398 6 view .LVU2399 - 7760 0010 1A60 str r2, [r3] -2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7761 .loc 1 2399 2 is_stmt 1 view .LVU2400 -2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7762 .loc 1 2399 7 is_stmt 0 view .LVU2401 - 7763 0012 0121 movs r1, #1 - 7764 .LVL732: -2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7765 .loc 1 2399 7 view .LVU2402 - 7766 0014 AE48 ldr r0, .L430+4 - 7767 .LVL733: -2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7768 .loc 1 2399 7 view .LVU2403 - 7769 0016 FFF7FEFF bl HAL_GPIO_ReadPin - 7770 .LVL734: -2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 7771 .loc 1 2399 5 discriminator 1 view .LVU2404 - 7772 001a 0028 cmp r0, #0 - 7773 001c 00F0D280 beq .L427 - 7774 .L407: -2414:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 7775 .loc 1 2414 2 is_stmt 1 view .LVU2405 - 7776 .LVL735: -2415:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 7777 .loc 1 2415 2 view .LVU2406 -2415:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 7778 .loc 1 2415 36 is_stmt 0 view .LVU2407 - 7779 0020 2B88 ldrh r3, [r5] -2415:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 7780 .loc 1 2415 48 view .LVU2408 - 7781 0022 03F00103 and r3, r3, #1 -2415:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 7782 .loc 1 2415 22 view .LVU2409 - 7783 0026 2370 strb r3, [r4] -2416:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 7784 .loc 1 2416 2 is_stmt 1 view .LVU2410 -2416:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 7785 .loc 1 2416 36 is_stmt 0 view .LVU2411 - 7786 0028 2B88 ldrh r3, [r5] -2416:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 7787 .loc 1 2416 48 view .LVU2412 - 7788 002a C3F34003 ubfx r3, r3, #1, #1 -2416:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 7789 .loc 1 2416 22 view .LVU2413 - 7790 002e 6370 strb r3, [r4, #1] -2417:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 7791 .loc 1 2417 2 is_stmt 1 view .LVU2414 -2417:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 7792 .loc 1 2417 36 is_stmt 0 view .LVU2415 - 7793 0030 2B88 ldrh r3, [r5] -2417:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 7794 .loc 1 2417 48 view .LVU2416 - 7795 0032 C3F38003 ubfx r3, r3, #2, #1 - ARM GAS /tmp/ccuHnxNu.s page 526 - - -2417:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 7796 .loc 1 2417 22 view .LVU2417 - 7797 0036 A370 strb r3, [r4, #2] -2418:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 7798 .loc 1 2418 2 is_stmt 1 view .LVU2418 -2418:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 7799 .loc 1 2418 35 is_stmt 0 view .LVU2419 - 7800 0038 2B88 ldrh r3, [r5] -2418:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 7801 .loc 1 2418 47 view .LVU2420 - 7802 003a C3F3C003 ubfx r3, r3, #3, #1 -2418:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 7803 .loc 1 2418 21 view .LVU2421 - 7804 003e E370 strb r3, [r4, #3] -2419:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 7805 .loc 1 2419 2 is_stmt 1 view .LVU2422 -2419:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 7806 .loc 1 2419 35 is_stmt 0 view .LVU2423 - 7807 0040 2B88 ldrh r3, [r5] -2419:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 7808 .loc 1 2419 47 view .LVU2424 - 7809 0042 C3F30013 ubfx r3, r3, #4, #1 -2419:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 7810 .loc 1 2419 21 view .LVU2425 - 7811 0046 2371 strb r3, [r4, #4] -2420:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 7812 .loc 1 2420 2 is_stmt 1 view .LVU2426 -2420:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 7813 .loc 1 2420 36 is_stmt 0 view .LVU2427 - 7814 0048 2B88 ldrh r3, [r5] -2420:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 7815 .loc 1 2420 48 view .LVU2428 - 7816 004a C3F34013 ubfx r3, r3, #5, #1 -2420:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 7817 .loc 1 2420 22 view .LVU2429 - 7818 004e 6371 strb r3, [r4, #5] -2421:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 7819 .loc 1 2421 2 is_stmt 1 view .LVU2430 -2421:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 7820 .loc 1 2421 36 is_stmt 0 view .LVU2431 - 7821 0050 2B88 ldrh r3, [r5] -2421:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 7822 .loc 1 2421 48 view .LVU2432 - 7823 0052 C3F38013 ubfx r3, r3, #6, #1 -2421:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 7824 .loc 1 2421 22 view .LVU2433 - 7825 0056 A371 strb r3, [r4, #6] -2422:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 7826 .loc 1 2422 2 is_stmt 1 view .LVU2434 -2422:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 7827 .loc 1 2422 36 is_stmt 0 view .LVU2435 - 7828 0058 2B88 ldrh r3, [r5] -2422:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 7829 .loc 1 2422 48 view .LVU2436 - 7830 005a C3F3C013 ubfx r3, r3, #7, #1 -2422:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 7831 .loc 1 2422 22 view .LVU2437 - ARM GAS /tmp/ccuHnxNu.s page 527 - - - 7832 005e E371 strb r3, [r4, #7] -2423:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 7833 .loc 1 2423 2 is_stmt 1 view .LVU2438 -2423:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 7834 .loc 1 2423 36 is_stmt 0 view .LVU2439 - 7835 0060 2B88 ldrh r3, [r5] -2423:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 7836 .loc 1 2423 48 view .LVU2440 - 7837 0062 C3F30023 ubfx r3, r3, #8, #1 -2423:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 7838 .loc 1 2423 22 view .LVU2441 - 7839 0066 2372 strb r3, [r4, #8] -2424:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 7840 .loc 1 2424 2 is_stmt 1 view .LVU2442 -2424:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 7841 .loc 1 2424 35 is_stmt 0 view .LVU2443 - 7842 0068 2B88 ldrh r3, [r5] -2424:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 7843 .loc 1 2424 47 view .LVU2444 - 7844 006a C3F34023 ubfx r3, r3, #9, #1 -2424:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 7845 .loc 1 2424 21 view .LVU2445 - 7846 006e 6372 strb r3, [r4, #9] -2425:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 7847 .loc 1 2425 2 is_stmt 1 view .LVU2446 -2425:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 7848 .loc 1 2425 35 is_stmt 0 view .LVU2447 - 7849 0070 2B88 ldrh r3, [r5] -2425:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 7850 .loc 1 2425 48 view .LVU2448 - 7851 0072 C3F38023 ubfx r3, r3, #10, #1 -2425:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 7852 .loc 1 2425 21 view .LVU2449 - 7853 0076 A372 strb r3, [r4, #10] -2426:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 7854 .loc 1 2426 2 is_stmt 1 view .LVU2450 -2426:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 7855 .loc 1 2426 34 is_stmt 0 view .LVU2451 - 7856 0078 2B88 ldrh r3, [r5] -2426:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 7857 .loc 1 2426 47 view .LVU2452 - 7858 007a C3F3C023 ubfx r3, r3, #11, #1 -2426:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 7859 .loc 1 2426 20 view .LVU2453 - 7860 007e E372 strb r3, [r4, #11] -2427:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 7861 .loc 1 2427 2 is_stmt 1 view .LVU2454 -2427:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 7862 .loc 1 2427 35 is_stmt 0 view .LVU2455 - 7863 0080 2B88 ldrh r3, [r5] -2427:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 7864 .loc 1 2427 48 view .LVU2456 - 7865 0082 C3F30033 ubfx r3, r3, #12, #1 -2427:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 7866 .loc 1 2427 21 view .LVU2457 - 7867 0086 2373 strb r3, [r4, #12] -2428:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 528 - - - 7868 .loc 1 2428 2 is_stmt 1 view .LVU2458 -2428:Src/main.c **** - 7869 .loc 1 2428 35 is_stmt 0 view .LVU2459 - 7870 0088 2B88 ldrh r3, [r5] -2428:Src/main.c **** - 7871 .loc 1 2428 48 view .LVU2460 - 7872 008a C3F34033 ubfx r3, r3, #13, #1 -2428:Src/main.c **** - 7873 .loc 1 2428 21 view .LVU2461 - 7874 008e 6373 strb r3, [r4, #13] -2430:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 7875 .loc 1 2430 2 is_stmt 1 view .LVU2462 - 7876 .LVL736: -2431:Src/main.c **** temp2++; - 7877 .loc 1 2431 2 view .LVU2463 -2431:Src/main.c **** temp2++; - 7878 .loc 1 2431 28 is_stmt 0 view .LVU2464 - 7879 0090 6B88 ldrh r3, [r5, #2] -2431:Src/main.c **** temp2++; - 7880 .loc 1 2431 26 view .LVU2465 - 7881 0092 3B80 strh r3, [r7] @ movhi -2432:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 7882 .loc 1 2432 2 is_stmt 1 view .LVU2466 - 7883 .LVL737: -2433:Src/main.c **** temp2++; - 7884 .loc 1 2433 2 view .LVU2467 -2433:Src/main.c **** temp2++; - 7885 .loc 1 2433 28 is_stmt 0 view .LVU2468 - 7886 0094 AB88 ldrh r3, [r5, #4] -2433:Src/main.c **** temp2++; - 7887 .loc 1 2433 26 view .LVU2469 - 7888 0096 3380 strh r3, [r6] @ movhi -2434:Src/main.c **** temp2++; - 7889 .loc 1 2434 2 is_stmt 1 view .LVU2470 - 7890 .LVL738: -2435:Src/main.c **** temp2++; - 7891 .loc 1 2435 2 view .LVU2471 -2436:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); - 7892 .loc 1 2436 2 view .LVU2472 -2437:Src/main.c **** temp2++; - 7893 .loc 1 2437 2 view .LVU2473 -2437:Src/main.c **** temp2++; - 7894 .loc 1 2437 25 is_stmt 0 view .LVU2474 - 7895 0098 6B89 ldrh r3, [r5, #10] -2437:Src/main.c **** temp2++; - 7896 .loc 1 2437 23 view .LVU2475 - 7897 009a E381 strh r3, [r4, #14] @ movhi -2438:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 7898 .loc 1 2438 2 is_stmt 1 view .LVU2476 - 7899 .LVL739: -2439:Src/main.c **** temp2++; - 7900 .loc 1 2439 2 view .LVU2477 -2439:Src/main.c **** temp2++; - 7901 .loc 1 2439 51 is_stmt 0 view .LVU2478 - 7902 009c AB89 ldrh r3, [r5, #12] - 7903 009e 07EE903A vmov s15, r3 @ int -2439:Src/main.c **** temp2++; - ARM GAS /tmp/ccuHnxNu.s page 529 - - - 7904 .loc 1 2439 32 view .LVU2479 - 7905 00a2 F8EE677A vcvt.f32.u32 s15, s15 -2439:Src/main.c **** temp2++; - 7906 .loc 1 2439 59 view .LVU2480 - 7907 00a6 9FED8B7A vldr.32 s14, .L430+8 - 7908 00aa 67EE877A vmul.f32 s15, s15, s14 -2439:Src/main.c **** temp2++; - 7909 .loc 1 2439 30 view .LVU2481 - 7910 00ae C7ED017A vstr.32 s15, [r7, #4] -2440:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 7911 .loc 1 2440 2 is_stmt 1 view .LVU2482 - 7912 .LVL740: -2441:Src/main.c **** temp2++; - 7913 .loc 1 2441 2 view .LVU2483 -2441:Src/main.c **** temp2++; - 7914 .loc 1 2441 51 is_stmt 0 view .LVU2484 - 7915 00b2 EB89 ldrh r3, [r5, #14] - 7916 00b4 07EE903A vmov s15, r3 @ int -2441:Src/main.c **** temp2++; - 7917 .loc 1 2441 32 view .LVU2485 - 7918 00b8 F8EE677A vcvt.f32.u32 s15, s15 -2441:Src/main.c **** temp2++; - 7919 .loc 1 2441 59 view .LVU2486 - 7920 00bc 67EE877A vmul.f32 s15, s15, s14 -2441:Src/main.c **** temp2++; - 7921 .loc 1 2441 30 view .LVU2487 - 7922 00c0 C7ED027A vstr.32 s15, [r7, #8] -2442:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 7923 .loc 1 2442 2 is_stmt 1 view .LVU2488 - 7924 .LVL741: -2443:Src/main.c **** temp2++; - 7925 .loc 1 2443 2 view .LVU2489 -2443:Src/main.c **** temp2++; - 7926 .loc 1 2443 51 is_stmt 0 view .LVU2490 - 7927 00c4 2B8A ldrh r3, [r5, #16] - 7928 00c6 07EE903A vmov s15, r3 @ int -2443:Src/main.c **** temp2++; - 7929 .loc 1 2443 32 view .LVU2491 - 7930 00ca F8EE677A vcvt.f32.u32 s15, s15 -2443:Src/main.c **** temp2++; - 7931 .loc 1 2443 59 view .LVU2492 - 7932 00ce 67EE877A vmul.f32 s15, s15, s14 -2443:Src/main.c **** temp2++; - 7933 .loc 1 2443 30 view .LVU2493 - 7934 00d2 C6ED017A vstr.32 s15, [r6, #4] -2444:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 7935 .loc 1 2444 2 is_stmt 1 view .LVU2494 - 7936 .LVL742: -2445:Src/main.c **** temp2++; - 7937 .loc 1 2445 2 view .LVU2495 -2445:Src/main.c **** temp2++; - 7938 .loc 1 2445 51 is_stmt 0 view .LVU2496 - 7939 00d6 6B8A ldrh r3, [r5, #18] - 7940 00d8 07EE903A vmov s15, r3 @ int -2445:Src/main.c **** temp2++; - 7941 .loc 1 2445 32 view .LVU2497 - 7942 00dc F8EE677A vcvt.f32.u32 s15, s15 - ARM GAS /tmp/ccuHnxNu.s page 530 - - -2445:Src/main.c **** temp2++; - 7943 .loc 1 2445 59 view .LVU2498 - 7944 00e0 67EE877A vmul.f32 s15, s15, s14 -2445:Src/main.c **** temp2++; - 7945 .loc 1 2445 30 view .LVU2499 - 7946 00e4 C6ED027A vstr.32 s15, [r6, #8] -2446:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID - 7947 .loc 1 2446 2 is_stmt 1 view .LVU2500 - 7948 .LVL743: -2447:Src/main.c **** temp2++; - 7949 .loc 1 2447 2 view .LVU2501 -2447:Src/main.c **** temp2++; - 7950 .loc 1 2447 18 is_stmt 0 view .LVU2502 - 7951 00e8 AA8A ldrh r2, [r5, #20] -2447:Src/main.c **** temp2++; - 7952 .loc 1 2447 16 view .LVU2503 - 7953 00ea 7B4B ldr r3, .L430+12 - 7954 00ec 5A83 strh r2, [r3, #26] @ movhi -2448:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); - 7955 .loc 1 2448 2 is_stmt 1 view .LVU2504 - 7956 .LVL744: -2449:Src/main.c **** temp2++; - 7957 .loc 1 2449 2 view .LVU2505 -2449:Src/main.c **** temp2++; - 7958 .loc 1 2449 28 is_stmt 0 view .LVU2506 - 7959 00ee EB8A ldrh r3, [r5, #22] -2449:Src/main.c **** temp2++; - 7960 .loc 1 2449 26 view .LVU2507 - 7961 00f0 BB81 strh r3, [r7, #12] @ movhi -2450:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); - 7962 .loc 1 2450 2 is_stmt 1 view .LVU2508 - 7963 .LVL745: -2451:Src/main.c **** temp2++; - 7964 .loc 1 2451 2 view .LVU2509 -2451:Src/main.c **** temp2++; - 7965 .loc 1 2451 28 is_stmt 0 view .LVU2510 - 7966 00f2 2B8B ldrh r3, [r5, #24] -2451:Src/main.c **** temp2++; - 7967 .loc 1 2451 26 view .LVU2511 - 7968 00f4 B381 strh r3, [r6, #12] @ movhi -2452:Src/main.c **** - 7969 .loc 1 2452 2 is_stmt 1 view .LVU2512 - 7970 .LVL746: -2454:Src/main.c **** { - 7971 .loc 1 2454 2 view .LVU2513 -2454:Src/main.c **** { - 7972 .loc 1 2454 16 is_stmt 0 view .LVU2514 - 7973 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2 -2454:Src/main.c **** { - 7974 .loc 1 2454 5 view .LVU2515 - 7975 00f8 002B cmp r3, #0 - 7976 00fa 00F09580 beq .L408 -2456:Src/main.c **** } - 7977 .loc 1 2456 3 is_stmt 1 view .LVU2516 - 7978 00fe 0122 movs r2, #1 - 7979 0100 0821 movs r1, #8 - 7980 0102 7648 ldr r0, .L430+16 - ARM GAS /tmp/ccuHnxNu.s page 531 - - - 7981 0104 FFF7FEFF bl HAL_GPIO_WritePin - 7982 .LVL747: - 7983 .L409: -2463:Src/main.c **** { - 7984 .loc 1 2463 2 view .LVU2517 -2463:Src/main.c **** { - 7985 .loc 1 2463 16 is_stmt 0 view .LVU2518 - 7986 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2 -2463:Src/main.c **** { - 7987 .loc 1 2463 5 view .LVU2519 - 7988 010a 002B cmp r3, #0 - 7989 010c 00F09280 beq .L410 -2465:Src/main.c **** } - 7990 .loc 1 2465 3 is_stmt 1 view .LVU2520 - 7991 0110 0122 movs r2, #1 - 7992 0112 8021 movs r1, #128 - 7993 0114 7148 ldr r0, .L430+16 - 7994 0116 FFF7FEFF bl HAL_GPIO_WritePin - 7995 .LVL748: - 7996 .L411: -2472:Src/main.c **** { - 7997 .loc 1 2472 2 view .LVU2521 -2472:Src/main.c **** { - 7998 .loc 1 2472 16 is_stmt 0 view .LVU2522 - 7999 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 -2472:Src/main.c **** { - 8000 .loc 1 2472 5 view .LVU2523 - 8001 011c 002B cmp r3, #0 - 8002 011e 00F08F80 beq .L412 -2474:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC - 8003 .loc 1 2474 3 is_stmt 1 view .LVU2524 - 8004 0122 0122 movs r2, #1 - 8005 0124 4FF48071 mov r1, #256 - 8006 0128 6948 ldr r0, .L430+4 - 8007 012a FFF7FEFF bl HAL_GPIO_WritePin - 8008 .LVL749: - 8009 .L413: -2483:Src/main.c **** { - 8010 .loc 1 2483 2 view .LVU2525 -2483:Src/main.c **** { - 8011 .loc 1 2483 16 is_stmt 0 view .LVU2526 - 8012 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2 -2483:Src/main.c **** { - 8013 .loc 1 2483 5 view .LVU2527 - 8014 0130 002B cmp r3, #0 - 8015 0132 00F08C80 beq .L414 -2485:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC - 8016 .loc 1 2485 3 is_stmt 1 view .LVU2528 - 8017 0136 0122 movs r2, #1 - 8018 0138 1021 movs r1, #16 - 8019 013a 6848 ldr r0, .L430+16 - 8020 013c FFF7FEFF bl HAL_GPIO_WritePin - 8021 .LVL750: - 8022 .L415: -2494:Src/main.c **** { - 8023 .loc 1 2494 2 view .LVU2529 -2494:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 532 - - - 8024 .loc 1 2494 16 is_stmt 0 view .LVU2530 - 8025 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 -2494:Src/main.c **** { - 8026 .loc 1 2494 5 view .LVU2531 - 8027 0142 002B cmp r3, #0 - 8028 0144 00F08980 beq .L416 -2496:Src/main.c **** } - 8029 .loc 1 2496 3 is_stmt 1 view .LVU2532 - 8030 0148 0122 movs r2, #1 - 8031 014a 4FF48061 mov r1, #1024 - 8032 014e 6448 ldr r0, .L430+20 - 8033 0150 FFF7FEFF bl HAL_GPIO_WritePin - 8034 .LVL751: - 8035 .L417: -2503:Src/main.c **** { - 8036 .loc 1 2503 2 view .LVU2533 -2503:Src/main.c **** { - 8037 .loc 1 2503 16 is_stmt 0 view .LVU2534 - 8038 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2 -2503:Src/main.c **** { - 8039 .loc 1 2503 5 view .LVU2535 - 8040 0156 002B cmp r3, #0 - 8041 0158 00F08680 beq .L418 -2505:Src/main.c **** } - 8042 .loc 1 2505 3 is_stmt 1 view .LVU2536 - 8043 015c 0122 movs r2, #1 - 8044 015e 0821 movs r1, #8 - 8045 0160 6048 ldr r0, .L430+24 - 8046 0162 FFF7FEFF bl HAL_GPIO_WritePin - 8047 .LVL752: - 8048 .L419: -2512:Src/main.c **** { - 8049 .loc 1 2512 2 view .LVU2537 -2512:Src/main.c **** { - 8050 .loc 1 2512 17 is_stmt 0 view .LVU2538 - 8051 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2 -2512:Src/main.c **** { - 8052 .loc 1 2512 5 view .LVU2539 - 8053 0168 1BB1 cbz r3, .L420 -2512:Src/main.c **** { - 8054 .loc 1 2512 39 discriminator 1 view .LVU2540 - 8055 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2 -2512:Src/main.c **** { - 8056 .loc 1 2512 26 discriminator 1 view .LVU2541 - 8057 016c 002B cmp r3, #0 - 8058 016e 40F08180 bne .L428 - 8059 .L420: -2521:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 8060 .loc 1 2521 3 is_stmt 1 view .LVU2542 - 8061 0172 0022 movs r2, #0 - 8062 0174 0121 movs r1, #1 - 8063 0176 5B48 ldr r0, .L430+24 - 8064 0178 FFF7FEFF bl HAL_GPIO_WritePin - 8065 .LVL753: -2522:Src/main.c **** } - 8066 .loc 1 2522 3 view .LVU2543 - 8067 017c 0022 movs r2, #0 - ARM GAS /tmp/ccuHnxNu.s page 533 - - - 8068 017e 4FF40061 mov r1, #2048 - 8069 0182 5748 ldr r0, .L430+20 - 8070 0184 FFF7FEFF bl HAL_GPIO_WritePin - 8071 .LVL754: - 8072 .L421: -2525:Src/main.c **** { - 8073 .loc 1 2525 2 view .LVU2544 -2525:Src/main.c **** { - 8074 .loc 1 2525 17 is_stmt 0 view .LVU2545 - 8075 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2 -2525:Src/main.c **** { - 8076 .loc 1 2525 5 view .LVU2546 - 8077 018a 1BB1 cbz r3, .L422 -2525:Src/main.c **** { - 8078 .loc 1 2525 39 discriminator 1 view .LVU2547 - 8079 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2 -2525:Src/main.c **** { - 8080 .loc 1 2525 26 discriminator 1 view .LVU2548 - 8081 018e 002B cmp r3, #0 - 8082 0190 40F08680 bne .L429 - 8083 .L422: -2534:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 8084 .loc 1 2534 3 is_stmt 1 view .LVU2549 - 8085 0194 0022 movs r2, #0 - 8086 0196 0221 movs r1, #2 - 8087 0198 5248 ldr r0, .L430+24 - 8088 019a FFF7FEFF bl HAL_GPIO_WritePin - 8089 .LVL755: -2535:Src/main.c **** } - 8090 .loc 1 2535 3 view .LVU2550 - 8091 019e 0022 movs r2, #0 - 8092 01a0 2021 movs r1, #32 - 8093 01a2 4E48 ldr r0, .L430+16 - 8094 01a4 FFF7FEFF bl HAL_GPIO_WritePin - 8095 .LVL756: - 8096 .L423: -2538:Src/main.c **** { - 8097 .loc 1 2538 2 view .LVU2551 -2538:Src/main.c **** { - 8098 .loc 1 2538 16 is_stmt 0 view .LVU2552 - 8099 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2 -2538:Src/main.c **** { - 8100 .loc 1 2538 5 view .LVU2553 - 8101 01aa 1BB9 cbnz r3, .L424 -2540:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 8102 .loc 1 2540 3 is_stmt 1 view .LVU2554 -2540:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 8103 .loc 1 2540 31 is_stmt 0 view .LVU2555 - 8104 01ac 4E4B ldr r3, .L430+28 - 8105 01ae 7B60 str r3, [r7, #4] @ float -2541:Src/main.c **** } - 8106 .loc 1 2541 3 is_stmt 1 view .LVU2556 -2541:Src/main.c **** } - 8107 .loc 1 2541 31 is_stmt 0 view .LVU2557 - 8108 01b0 4E4B ldr r3, .L430+32 - 8109 01b2 BB60 str r3, [r7, #8] @ float - 8110 .L424: - ARM GAS /tmp/ccuHnxNu.s page 534 - - -2544:Src/main.c **** { - 8111 .loc 1 2544 2 is_stmt 1 view .LVU2558 -2544:Src/main.c **** { - 8112 .loc 1 2544 16 is_stmt 0 view .LVU2559 - 8113 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2 -2544:Src/main.c **** { - 8114 .loc 1 2544 5 view .LVU2560 - 8115 01b6 1BB9 cbnz r3, .L406 -2546:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 8116 .loc 1 2546 3 is_stmt 1 view .LVU2561 -2546:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 8117 .loc 1 2546 31 is_stmt 0 view .LVU2562 - 8118 01b8 4B4B ldr r3, .L430+28 - 8119 01ba 7360 str r3, [r6, #4] @ float -2547:Src/main.c **** } - 8120 .loc 1 2547 3 is_stmt 1 view .LVU2563 -2547:Src/main.c **** } - 8121 .loc 1 2547 31 is_stmt 0 view .LVU2564 - 8122 01bc 4B4B ldr r3, .L430+32 - 8123 01be B360 str r3, [r6, #8] @ float - 8124 .L406: -2549:Src/main.c **** - 8125 .loc 1 2549 1 view .LVU2565 - 8126 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} - 8127 .LVL757: - 8128 .L427: -2400:Src/main.c **** { - 8129 .loc 1 2400 6 view .LVU2566 - 8130 01c4 4FF48071 mov r1, #256 - 8131 01c8 4648 ldr r0, .L430+24 - 8132 01ca FFF7FEFF bl HAL_GPIO_ReadPin - 8133 .LVL758: -2399:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 8134 .loc 1 2399 78 discriminator 1 view .LVU2567 - 8135 01ce 0128 cmp r0, #1 - 8136 01d0 7FF426AF bne .L407 -2402:Src/main.c **** if (test == 0) //0 - suc - 8137 .loc 1 2402 3 is_stmt 1 view .LVU2568 -2402:Src/main.c **** if (test == 0) //0 - suc - 8138 .loc 1 2402 10 is_stmt 0 view .LVU2569 - 8139 01d4 4648 ldr r0, .L430+36 - 8140 01d6 FFF7FEFF bl Mount_SD - 8141 .LVL759: -2402:Src/main.c **** if (test == 0) //0 - suc - 8142 .loc 1 2402 8 discriminator 1 view .LVU2570 - 8143 01da 3C4B ldr r3, .L430 - 8144 01dc 1860 str r0, [r3] -2403:Src/main.c **** { - 8145 .loc 1 2403 3 is_stmt 1 view .LVU2571 -2403:Src/main.c **** { - 8146 .loc 1 2403 6 is_stmt 0 view .LVU2572 - 8147 01de 0028 cmp r0, #0 - 8148 01e0 7FF41EAF bne .L407 -2406:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 8149 .loc 1 2406 4 is_stmt 1 view .LVU2573 -2406:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 8150 .loc 1 2406 11 is_stmt 0 view .LVU2574 - ARM GAS /tmp/ccuHnxNu.s page 535 - - - 8151 01e4 DFF80C91 ldr r9, .L430+40 - 8152 01e8 4846 mov r0, r9 - 8153 01ea FFF7FEFF bl Remove_File - 8154 .LVL760: -2406:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 8155 .loc 1 2406 9 discriminator 1 view .LVU2575 - 8156 01ee DFF8DC80 ldr r8, .L430 - 8157 01f2 C8F80000 str r0, [r8] -2407:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8158 .loc 1 2407 4 is_stmt 1 view .LVU2576 -2407:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8159 .loc 1 2407 11 is_stmt 0 view .LVU2577 - 8160 01f6 4846 mov r0, r9 - 8161 01f8 FFF7FEFF bl Create_File - 8162 .LVL761: -2407:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8163 .loc 1 2407 9 discriminator 1 view .LVU2578 - 8164 01fc C8F80000 str r0, [r8] -2408:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8165 .loc 1 2408 4 is_stmt 1 view .LVU2579 -2408:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8166 .loc 1 2408 11 is_stmt 0 view .LVU2580 - 8167 0200 1E22 movs r2, #30 - 8168 0202 2946 mov r1, r5 - 8169 0204 4846 mov r0, r9 - 8170 0206 FFF7FEFF bl Write_File_byte - 8171 .LVL762: -2408:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 8172 .loc 1 2408 9 discriminator 1 view .LVU2581 - 8173 020a C8F80000 str r0, [r8] -2409:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8174 .loc 1 2409 4 is_stmt 1 view .LVU2582 -2409:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8175 .loc 1 2409 11 is_stmt 0 view .LVU2583 - 8176 020e 1E22 movs r2, #30 - 8177 0210 2946 mov r1, r5 - 8178 0212 4846 mov r0, r9 - 8179 0214 FFF7FEFF bl Update_File_byte - 8180 .LVL763: -2409:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8181 .loc 1 2409 9 discriminator 1 view .LVU2584 - 8182 0218 C8F80000 str r0, [r8] -2410:Src/main.c **** } - 8183 .loc 1 2410 4 is_stmt 1 view .LVU2585 -2410:Src/main.c **** } - 8184 .loc 1 2410 11 is_stmt 0 view .LVU2586 - 8185 021c 3448 ldr r0, .L430+36 - 8186 021e FFF7FEFF bl Unmount_SD - 8187 .LVL764: -2410:Src/main.c **** } - 8188 .loc 1 2410 9 discriminator 1 view .LVU2587 - 8189 0222 C8F80000 str r0, [r8] - 8190 0226 FBE6 b .L407 - 8191 .LVL765: - 8192 .L408: -2460:Src/main.c **** } - 8193 .loc 1 2460 3 is_stmt 1 view .LVU2588 - ARM GAS /tmp/ccuHnxNu.s page 536 - - - 8194 0228 0022 movs r2, #0 - 8195 022a 0821 movs r1, #8 - 8196 022c 2B48 ldr r0, .L430+16 - 8197 022e FFF7FEFF bl HAL_GPIO_WritePin - 8198 .LVL766: - 8199 0232 69E7 b .L409 - 8200 .L410: -2469:Src/main.c **** } - 8201 .loc 1 2469 3 view .LVU2589 - 8202 0234 0022 movs r2, #0 - 8203 0236 8021 movs r1, #128 - 8204 0238 2848 ldr r0, .L430+16 - 8205 023a FFF7FEFF bl HAL_GPIO_WritePin - 8206 .LVL767: - 8207 023e 6CE7 b .L411 - 8208 .L412: -2479:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC - 8209 .loc 1 2479 3 view .LVU2590 - 8210 0240 0022 movs r2, #0 - 8211 0242 4FF48071 mov r1, #256 - 8212 0246 2248 ldr r0, .L430+4 - 8213 0248 FFF7FEFF bl HAL_GPIO_WritePin - 8214 .LVL768: - 8215 024c 6FE7 b .L413 - 8216 .L414: -2490:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC - 8217 .loc 1 2490 3 view .LVU2591 - 8218 024e 0022 movs r2, #0 - 8219 0250 1021 movs r1, #16 - 8220 0252 2248 ldr r0, .L430+16 - 8221 0254 FFF7FEFF bl HAL_GPIO_WritePin - 8222 .LVL769: - 8223 0258 72E7 b .L415 - 8224 .L416: -2500:Src/main.c **** } - 8225 .loc 1 2500 3 view .LVU2592 - 8226 025a 0022 movs r2, #0 - 8227 025c 4FF48061 mov r1, #1024 - 8228 0260 1F48 ldr r0, .L430+20 - 8229 0262 FFF7FEFF bl HAL_GPIO_WritePin - 8230 .LVL770: - 8231 0266 75E7 b .L417 - 8232 .L418: -2509:Src/main.c **** } - 8233 .loc 1 2509 3 view .LVU2593 - 8234 0268 0022 movs r2, #0 - 8235 026a 0821 movs r1, #8 - 8236 026c 1D48 ldr r0, .L430+24 - 8237 026e FFF7FEFF bl HAL_GPIO_WritePin - 8238 .LVL771: - 8239 0272 78E7 b .L419 - 8240 .L428: -2514:Src/main.c **** Set_LTEC(3,32767); - 8241 .loc 1 2514 3 view .LVU2594 - 8242 0274 47F6FF71 movw r1, #32767 - 8243 0278 0320 movs r0, #3 - 8244 027a FFF7FEFF bl Set_LTEC - ARM GAS /tmp/ccuHnxNu.s page 537 - - - 8245 .LVL772: -2515:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); - 8246 .loc 1 2515 3 view .LVU2595 - 8247 027e 47F6FF71 movw r1, #32767 - 8248 0282 0320 movs r0, #3 - 8249 0284 FFF7FEFF bl Set_LTEC - 8250 .LVL773: -2516:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); - 8251 .loc 1 2516 3 view .LVU2596 - 8252 0288 0122 movs r2, #1 - 8253 028a 4FF40061 mov r1, #2048 - 8254 028e 1448 ldr r0, .L430+20 - 8255 0290 FFF7FEFF bl HAL_GPIO_WritePin - 8256 .LVL774: -2517:Src/main.c **** } - 8257 .loc 1 2517 3 view .LVU2597 - 8258 0294 0122 movs r2, #1 - 8259 0296 1146 mov r1, r2 - 8260 0298 1248 ldr r0, .L430+24 - 8261 029a FFF7FEFF bl HAL_GPIO_WritePin - 8262 .LVL775: - 8263 029e 73E7 b .L421 - 8264 .L429: -2527:Src/main.c **** Set_LTEC(4,32767); - 8265 .loc 1 2527 3 view .LVU2598 - 8266 02a0 47F6FF71 movw r1, #32767 - 8267 02a4 0420 movs r0, #4 - 8268 02a6 FFF7FEFF bl Set_LTEC - 8269 .LVL776: -2528:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); - 8270 .loc 1 2528 3 view .LVU2599 - 8271 02aa 47F6FF71 movw r1, #32767 - 8272 02ae 0420 movs r0, #4 - 8273 02b0 FFF7FEFF bl Set_LTEC - 8274 .LVL777: -2529:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); - 8275 .loc 1 2529 3 view .LVU2600 - 8276 02b4 0122 movs r2, #1 - 8277 02b6 2021 movs r1, #32 - 8278 02b8 0848 ldr r0, .L430+16 - 8279 02ba FFF7FEFF bl HAL_GPIO_WritePin - 8280 .LVL778: -2530:Src/main.c **** } - 8281 .loc 1 2530 3 view .LVU2601 - 8282 02be 0122 movs r2, #1 - 8283 02c0 0221 movs r1, #2 - 8284 02c2 0848 ldr r0, .L430+24 - 8285 02c4 FFF7FEFF bl HAL_GPIO_WritePin - 8286 .LVL779: - 8287 02c8 6EE7 b .L423 - 8288 .L431: - 8289 02ca 00BF .align 2 - 8290 .L430: - 8291 02cc 00000000 .word test - 8292 02d0 000C0240 .word 1073875968 - 8293 02d4 0000803B .word 998244352 - 8294 02d8 00000000 .word Long_Data - ARM GAS /tmp/ccuHnxNu.s page 538 - - - 8295 02dc 00080240 .word 1073874944 - 8296 02e0 00040240 .word 1073873920 - 8297 02e4 00000240 .word 1073872896 - 8298 02e8 00002041 .word 1092616192 - 8299 02ec 0AD7233C .word 1008981770 - 8300 02f0 00000000 .word .LC0 - 8301 02f4 04000000 .word .LC1 - 8302 .cfi_endproc - 8303 .LFE1209: - 8305 .section .text.Advanced_Controller_Temp,"ax",%progbits - 8306 .align 1 - 8307 .global Advanced_Controller_Temp - 8308 .syntax unified - 8309 .thumb - 8310 .thumb_func - 8312 Advanced_Controller_Temp: - 8313 .LVL780: - 8314 .LFB1230: -3446:Src/main.c **** // Main idea: - 8315 .loc 1 3446 1 view -0 - 8316 .cfi_startproc - 8317 @ args = 0, pretend = 0, frame = 0 - 8318 @ frame_needed = 0, uses_anonymous_args = 0 - 8319 @ link register save eliminated. -3446:Src/main.c **** // Main idea: - 8320 .loc 1 3446 1 is_stmt 0 view .LVU2603 - 8321 0000 30B4 push {r4, r5} - 8322 .LCFI72: - 8323 .cfi_def_cfa_offset 8 - 8324 .cfi_offset 4, -8 - 8325 .cfi_offset 5, -4 -3464:Src/main.c **** float P_coef_current;//, I_coef_current; - 8326 .loc 1 3464 2 is_stmt 1 view .LVU2604 -3465:Src/main.c **** float e_integral; - 8327 .loc 1 3465 2 view .LVU2605 -3466:Src/main.c **** int x_output; - 8328 .loc 1 3466 2 view .LVU2606 + 7752 .cfi_offset 3, -16 + 7753 .cfi_offset 4, -12 + 7754 .cfi_offset 5, -8 + 7755 .cfi_offset 14, -4 + 7756 0002 0446 mov r4, r0 + 7757 0004 0D46 mov r5, r1 3467:Src/main.c **** - 8329 .loc 1 3467 2 view .LVU2607 -3469:Src/main.c **** - 8330 .loc 1 3469 2 view .LVU2608 -3469:Src/main.c **** - 8331 .loc 1 3469 28 is_stmt 0 view .LVU2609 - 8332 0002 0B88 ldrh r3, [r1] -3469:Src/main.c **** - 8333 .loc 1 3469 65 view .LVU2610 - 8334 0004 0488 ldrh r4, [r0] -3469:Src/main.c **** - 8335 .loc 1 3469 8 view .LVU2611 - 8336 0006 1B1B subs r3, r3, r4 - 8337 .LVL781: -3471:Src/main.c **** - 8338 .loc 1 3471 2 is_stmt 1 view .LVU2612 -3471:Src/main.c **** - 8339 .loc 1 3471 13 is_stmt 0 view .LVU2613 - 8340 0008 D1ED017A vldr.32 s15, [r1, #4] - 8341 .LVL782: - ARM GAS /tmp/ccuHnxNu.s page 539 + 7758 .loc 1 3467 2 is_stmt 1 view .LVU2358 +3469:Src/main.c **** { + 7759 .loc 1 3469 2 view .LVU2359 +3469:Src/main.c **** { + 7760 .loc 1 3469 5 is_stmt 0 view .LVU2360 + 7761 0006 0328 cmp r0, #3 + 7762 0008 18BF it ne + 7763 000a 0128 cmpne r0, #1 + 7764 000c 06D0 beq .L453 + 7765 .LVL715: + 7766 .L420: +3475:Src/main.c **** { + 7767 .loc 1 3475 2 is_stmt 1 view .LVU2361 + 7768 000e 013C subs r4, r4, #1 + 7769 .LVL716: +3475:Src/main.c **** { + 7770 .loc 1 3475 2 is_stmt 0 view .LVU2362 + 7771 0010 032C cmp r4, #3 + 7772 0012 2ED8 bhi .L421 + 7773 0014 DFE804F0 tbb [pc, r4] + 7774 .L423: + 7775 0018 0D .byte (.L426-.L423)/2 + 7776 0019 45 .byte (.L425-.L423)/2 + 7777 001a 65 .byte (.L424-.L423)/2 + 7778 001b 86 .byte (.L422-.L423)/2 + 7779 .LVL717: + 7780 .p2align 1 + 7781 .L453: +3471:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + 7782 .loc 1 3471 3 is_stmt 1 view .LVU2363 + 7783 001c 0121 movs r1, #1 + 7784 .LVL718: +3471:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + 7785 .loc 1 3471 3 is_stmt 0 view .LVU2364 + 7786 001e 0220 movs r0, #2 + 7787 .LVL719: +3471:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); + 7788 .loc 1 3471 3 view .LVU2365 + 7789 0020 FFF7FEFF bl SPI2_SetMode + 7790 .LVL720: +3472:Src/main.c **** } + 7791 .loc 1 3472 3 is_stmt 1 view .LVU2366 + 7792 0024 0122 movs r2, #1 + 7793 0026 4FF48051 mov r1, #4096 + 7794 002a 4F48 ldr r0, .L454 + 7795 002c FFF7FEFF bl HAL_GPIO_WritePin + 7796 .LVL721: + 7797 0030 EDE7 b .L420 + 7798 .LVL722: + 7799 .L426: + ARM GAS /tmp/ccLSPxIe.s page 529 -3473:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 8342 .loc 1 3473 2 is_stmt 1 view .LVU2614 -3473:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 8343 .loc 1 3473 20 is_stmt 0 view .LVU2615 - 8344 000c 03F6B73C addw ip, r3, #2999 -3473:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 8345 .loc 1 3473 4 view .LVU2616 - 8346 0010 41F26E74 movw r4, #5998 - 8347 0014 A445 cmp ip, r4 - 8348 0016 18D8 bhi .L433 -3474:Src/main.c **** } - 8349 .loc 1 3474 3 is_stmt 1 view .LVU2617 -3474:Src/main.c **** } - 8350 .loc 1 3474 31 is_stmt 0 view .LVU2618 - 8351 0018 90ED027A vldr.32 s14, [r0, #8] -3474:Src/main.c **** } - 8352 .loc 1 3474 47 view .LVU2619 - 8353 001c 06EE903A vmov s13, r3 @ int - 8354 0020 F8EEE66A vcvt.f32.s32 s13, s13 -3474:Src/main.c **** } - 8355 .loc 1 3474 45 view .LVU2620 - 8356 0024 27EE267A vmul.f32 s14, s14, s13 -3474:Src/main.c **** } - 8357 .loc 1 3474 76 view .LVU2621 - 8358 0028 284C ldr r4, .L443 - 8359 002a 2468 ldr r4, [r4] - 8360 002c 284D ldr r5, .L443+4 - 8361 002e 2D68 ldr r5, [r5] - 8362 0030 641B subs r4, r4, r5 -3474:Src/main.c **** } - 8363 .loc 1 3474 64 view .LVU2622 - 8364 0032 06EE904A vmov s13, r4 @ int - 8365 0036 F8EE666A vcvt.f32.u32 s13, s13 -3474:Src/main.c **** } - 8366 .loc 1 3474 62 view .LVU2623 - 8367 003a 27EE267A vmul.f32 s14, s14, s13 -3474:Src/main.c **** } - 8368 .loc 1 3474 87 view .LVU2624 - 8369 003e 9FED256A vldr.32 s12, .L443+8 - 8370 0042 C7EE066A vdiv.f32 s13, s14, s12 -3474:Src/main.c **** } - 8371 .loc 1 3474 14 view .LVU2625 - 8372 0046 77EEA67A vadd.f32 s15, s15, s13 - 8373 .LVL783: - 8374 .L433: -3476:Src/main.c **** - 8375 .loc 1 3476 2 is_stmt 1 view .LVU2626 -3476:Src/main.c **** - 8376 .loc 1 3476 17 is_stmt 0 view .LVU2627 - 8377 004a D0ED016A vldr.32 s13, [r0, #4] - 8378 .LVL784: -3478:Src/main.c **** e_integral = 32000; - 8379 .loc 1 3478 2 is_stmt 1 view .LVU2628 -3478:Src/main.c **** e_integral = 32000; - 8380 .loc 1 3478 5 is_stmt 0 view .LVU2629 - 8381 004e 9FED227A vldr.32 s14, .L443+12 - 8382 0052 F4EEC77A vcmpe.f32 s15, s14 - ARM GAS /tmp/ccuHnxNu.s page 540 +3478:Src/main.c **** //tmp32=0; + 7800 .loc 1 3478 4 view .LVU2367 + 7801 0032 0022 movs r2, #0 + 7802 0034 4FF48041 mov r1, #16384 + 7803 0038 4B48 ldr r0, .L454 + 7804 003a FFF7FEFF bl HAL_GPIO_WritePin + 7805 .LVL723: +3481:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7806 .loc 1 3481 4 view .LVU2368 +3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7807 .loc 1 3482 4 view .LVU2369 +3481:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7808 .loc 1 3481 10 is_stmt 0 view .LVU2370 + 7809 003e 0022 movs r2, #0 + 7810 .LVL724: + 7811 .L427: +3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7812 .loc 1 3482 42 is_stmt 1 discriminator 1 view .LVU2371 + 7813 .LBB611: + 7814 .LBI611: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7815 .loc 4 916 26 view .LVU2372 + 7816 .LBB612: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7817 .loc 4 918 3 view .LVU2373 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7818 .loc 4 918 12 is_stmt 0 view .LVU2374 + 7819 0040 4A4B ldr r3, .L454+4 + 7820 0042 9B68 ldr r3, [r3, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7821 .loc 4 918 66 view .LVU2375 + 7822 0044 13F0020F tst r3, #2 + 7823 0048 04D1 bne .L428 + 7824 .LVL725: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7825 .loc 4 918 66 view .LVU2376 + 7826 .LBE612: + 7827 .LBE611: +3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7828 .loc 1 3482 42 discriminator 2 view .LVU2377 + 7829 004a B2F5FA7F cmp r2, #500 + 7830 004e 01D8 bhi .L428 +3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7831 .loc 1 3482 59 is_stmt 1 discriminator 3 view .LVU2378 +3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7832 .loc 1 3482 64 is_stmt 0 discriminator 3 view .LVU2379 + 7833 0050 0132 adds r2, r2, #1 + 7834 .LVL726: +3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 7835 .loc 1 3482 64 discriminator 3 view .LVU2380 + 7836 0052 F5E7 b .L427 + 7837 .L428: +3483:Src/main.c **** tmp32 = 0; + 7838 .loc 1 3483 4 is_stmt 1 view .LVU2381 + 7839 .LVL727: + 7840 .LBB613: + 7841 .LBI613: + ARM GAS /tmp/ccLSPxIe.s page 530 - 8383 0056 F1EE10FA vmrs APSR_nzcv, FPSCR - 8384 005a 09DC bgt .L437 -3481:Src/main.c **** e_integral = -32000; - 8385 .loc 1 3481 7 is_stmt 1 view .LVU2630 -3481:Src/main.c **** e_integral = -32000; - 8386 .loc 1 3481 10 is_stmt 0 view .LVU2631 - 8387 005c 9FED1F7A vldr.32 s14, .L443+16 - 8388 0060 F4EEC77A vcmpe.f32 s15, s14 - 8389 0064 F1EE10FA vmrs APSR_nzcv, FPSCR - 8390 0068 04D5 bpl .L434 -3482:Src/main.c **** } - 8391 .loc 1 3482 15 view .LVU2632 - 8392 006a DFED1C7A vldr.32 s15, .L443+16 - 8393 .LVL785: -3482:Src/main.c **** } - 8394 .loc 1 3482 15 view .LVU2633 - 8395 006e 01E0 b .L434 - 8396 .LVL786: - 8397 .L437: -3479:Src/main.c **** } - 8398 .loc 1 3479 15 view .LVU2634 - 8399 0070 DFED197A vldr.32 s15, .L443+12 - 8400 .LVL787: - 8401 .L434: -3484:Src/main.c **** - 8402 .loc 1 3484 2 is_stmt 1 view .LVU2635 -3484:Src/main.c **** - 8403 .loc 1 3484 26 is_stmt 0 view .LVU2636 - 8404 0074 C1ED017A vstr.32 s15, [r1, #4] -3486:Src/main.c **** - 8405 .loc 1 3486 2 is_stmt 1 view .LVU2637 -3486:Src/main.c **** - 8406 .loc 1 3486 36 is_stmt 0 view .LVU2638 - 8407 0078 07EE103A vmov s14, r3 @ int - 8408 007c B8EEC77A vcvt.f32.s32 s14, s14 - 8409 0080 27EE267A vmul.f32 s14, s14, s13 -3486:Src/main.c **** - 8410 .loc 1 3486 19 view .LVU2639 - 8411 0084 DFED166A vldr.32 s13, .L443+20 - 8412 .LVL788: -3486:Src/main.c **** - 8413 .loc 1 3486 19 view .LVU2640 - 8414 0088 37EE267A vadd.f32 s14, s14, s13 -3486:Src/main.c **** - 8415 .loc 1 3486 46 view .LVU2641 - 8416 008c FDEEE77A vcvt.s32.f32 s15, s15 - 8417 .LVL789: -3486:Src/main.c **** - 8418 .loc 1 3486 44 view .LVU2642 - 8419 0090 F8EEE77A vcvt.f32.s32 s15, s15 - 8420 0094 77EE877A vadd.f32 s15, s15, s14 -3486:Src/main.c **** - 8421 .loc 1 3486 11 view .LVU2643 - 8422 0098 FDEEE77A vcvt.s32.f32 s15, s15 - 8423 009c 17EE900A vmov r0, s15 @ int - 8424 .LVL790: -3488:Src/main.c **** x_output = 8800; - ARM GAS /tmp/ccuHnxNu.s page 541 +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7842 .loc 4 1373 22 view .LVU2382 + 7843 .LBB614: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 7844 .loc 4 1376 3 view .LVU2383 + 7845 .loc 4 1377 3 view .LVU2384 + 7846 .loc 4 1377 10 is_stmt 0 view .LVU2385 + 7847 0054 454B ldr r3, .L454+4 + 7848 0056 9D81 strh r5, [r3, #12] @ movhi + 7849 .LVL728: + 7850 .loc 4 1377 10 view .LVU2386 + 7851 .LBE614: + 7852 .LBE613: +3484:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7853 .loc 1 3484 4 is_stmt 1 view .LVU2387 +3485:Src/main.c **** (void) SPI2->DR; + 7854 .loc 1 3485 4 view .LVU2388 +3484:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7855 .loc 1 3484 10 is_stmt 0 view .LVU2389 + 7856 0058 0022 movs r2, #0 + 7857 .LVL729: + 7858 .L430: +3485:Src/main.c **** (void) SPI2->DR; + 7859 .loc 1 3485 43 is_stmt 1 discriminator 1 view .LVU2390 + 7860 .LBB615: + 7861 .LBI615: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7862 .loc 4 905 26 view .LVU2391 + 7863 .LBB616: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7864 .loc 4 907 3 view .LVU2392 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7865 .loc 4 907 12 is_stmt 0 view .LVU2393 + 7866 005a 444B ldr r3, .L454+4 + 7867 005c 9B68 ldr r3, [r3, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7868 .loc 4 907 68 view .LVU2394 + 7869 005e 13F0010F tst r3, #1 + 7870 0062 04D1 bne .L431 + 7871 .LVL730: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7872 .loc 4 907 68 view .LVU2395 + 7873 .LBE616: + 7874 .LBE615: +3485:Src/main.c **** (void) SPI2->DR; + 7875 .loc 1 3485 43 discriminator 2 view .LVU2396 + 7876 0064 B2F5FA7F cmp r2, #500 + 7877 0068 01D8 bhi .L431 +3485:Src/main.c **** (void) SPI2->DR; + 7878 .loc 1 3485 60 is_stmt 1 discriminator 3 view .LVU2397 +3485:Src/main.c **** (void) SPI2->DR; + 7879 .loc 1 3485 65 is_stmt 0 discriminator 3 view .LVU2398 + 7880 006a 0132 adds r2, r2, #1 + 7881 .LVL731: +3485:Src/main.c **** (void) SPI2->DR; + 7882 .loc 1 3485 65 discriminator 3 view .LVU2399 + 7883 006c F5E7 b .L430 + ARM GAS /tmp/ccLSPxIe.s page 531 - 8425 .loc 1 3488 2 is_stmt 1 view .LVU2644 -3488:Src/main.c **** x_output = 8800; - 8426 .loc 1 3488 4 is_stmt 0 view .LVU2645 - 8427 00a0 B0F57A7F cmp r0, #1000 - 8428 00a4 06DB blt .L439 -3491:Src/main.c **** x_output = 56800; - 8429 .loc 1 3491 7 is_stmt 1 view .LVU2646 -3491:Src/main.c **** x_output = 56800; - 8430 .loc 1 3491 9 is_stmt 0 view .LVU2647 - 8431 00a6 4DF6E053 movw r3, #56800 - 8432 .LVL791: -3491:Src/main.c **** x_output = 56800; - 8433 .loc 1 3491 9 view .LVU2648 - 8434 00aa 9842 cmp r0, r3 - 8435 00ac 04DD ble .L435 -3492:Src/main.c **** } - 8436 .loc 1 3492 12 view .LVU2649 - 8437 00ae 4DF6E050 movw r0, #56800 - 8438 .LVL792: -3492:Src/main.c **** } - 8439 .loc 1 3492 12 view .LVU2650 - 8440 00b2 01E0 b .L435 - 8441 .LVL793: - 8442 .L439: -3489:Src/main.c **** } - 8443 .loc 1 3489 12 view .LVU2651 - 8444 00b4 42F26020 movw r0, #8800 - 8445 .LVL794: - 8446 .L435: -3495:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 8447 .loc 1 3495 2 is_stmt 1 view .LVU2652 -3495:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 8448 .loc 1 3495 5 is_stmt 0 view .LVU2653 - 8449 00b8 022A cmp r2, #2 - 8450 00ba 02D0 beq .L442 - 8451 .LVL795: - 8452 .L436: -3498:Src/main.c **** } - 8453 .loc 1 3498 2 is_stmt 1 view .LVU2654 -3499:Src/main.c **** - 8454 .loc 1 3499 1 is_stmt 0 view .LVU2655 - 8455 00bc 80B2 uxth r0, r0 - 8456 .LVL796: -3499:Src/main.c **** - 8457 .loc 1 3499 1 view .LVU2656 - 8458 00be 30BC pop {r4, r5} - 8459 .LCFI73: - 8460 .cfi_remember_state - 8461 .cfi_restore 5 - 8462 .cfi_restore 4 - 8463 .cfi_def_cfa_offset 0 - 8464 00c0 7047 bx lr - 8465 .LVL797: - 8466 .L442: - 8467 .LCFI74: - 8468 .cfi_restore_state -3496:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 542 + 7884 .L431: +3486:Src/main.c **** break; + 7885 .loc 1 3486 4 is_stmt 1 view .LVU2400 + 7886 006e 3F4B ldr r3, .L454+4 + 7887 0070 DB68 ldr r3, [r3, #12] +3487:Src/main.c **** case 2: + 7888 .loc 1 3487 3 view .LVU2401 + 7889 .LVL732: + 7890 .L421: +3523:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 7891 .loc 1 3523 2 view .LVU2402 + 7892 0072 0122 movs r2, #1 + 7893 0074 4FF48041 mov r1, #16384 + 7894 0078 3B48 ldr r0, .L454 + 7895 007a FFF7FEFF bl HAL_GPIO_WritePin + 7896 .LVL733: +3524:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 7897 .loc 1 3524 2 view .LVU2403 + 7898 007e 0122 movs r2, #1 + 7899 0080 4021 movs r1, #64 + 7900 0082 3B48 ldr r0, .L454+8 + 7901 0084 FFF7FEFF bl HAL_GPIO_WritePin + 7902 .LVL734: +3525:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 7903 .loc 1 3525 2 view .LVU2404 + 7904 0088 0122 movs r2, #1 + 7905 008a 4FF48051 mov r1, #4096 + 7906 008e 3948 ldr r0, .L454+12 + 7907 0090 FFF7FEFF bl HAL_GPIO_WritePin + 7908 .LVL735: +3526:Src/main.c **** } + 7909 .loc 1 3526 2 view .LVU2405 + 7910 0094 0122 movs r2, #1 + 7911 0096 4FF48071 mov r1, #256 + 7912 009a 3748 ldr r0, .L454+16 + 7913 009c FFF7FEFF bl HAL_GPIO_WritePin + 7914 .LVL736: +3527:Src/main.c **** static uint16_t MPhD_T(uint8_t num) + 7915 .loc 1 3527 1 is_stmt 0 view .LVU2406 + 7916 00a0 38BD pop {r3, r4, r5, pc} + 7917 .LVL737: + 7918 .L425: +3490:Src/main.c **** //tmp32=0; + 7919 .loc 1 3490 4 is_stmt 1 view .LVU2407 + 7920 00a2 0022 movs r2, #0 + 7921 00a4 4021 movs r1, #64 + 7922 00a6 3248 ldr r0, .L454+8 + 7923 00a8 FFF7FEFF bl HAL_GPIO_WritePin + 7924 .LVL738: +3493:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7925 .loc 1 3493 4 view .LVU2408 +3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7926 .loc 1 3494 4 view .LVU2409 +3493:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 7927 .loc 1 3493 10 is_stmt 0 view .LVU2410 + 7928 00ac 0022 movs r2, #0 + 7929 .LVL739: + ARM GAS /tmp/ccLSPxIe.s page 532 - 8469 .loc 1 3496 3 is_stmt 1 view .LVU2657 -3496:Src/main.c **** - 8470 .loc 1 3496 11 is_stmt 0 view .LVU2658 - 8471 00c2 024B ldr r3, .L443 - 8472 00c4 1A68 ldr r2, [r3] - 8473 .LVL798: -3496:Src/main.c **** - 8474 .loc 1 3496 11 view .LVU2659 - 8475 00c6 024B ldr r3, .L443+4 - 8476 00c8 1A60 str r2, [r3] - 8477 00ca F7E7 b .L436 - 8478 .L444: - 8479 .align 2 - 8480 .L443: - 8481 00cc 00000000 .word TO7 - 8482 00d0 00000000 .word TO7_PID - 8483 00d4 0000C842 .word 1120403456 - 8484 00d8 0000FA46 .word 1190789120 - 8485 00dc 0000FAC6 .word -956694528 - 8486 00e0 00000047 .word 1191182336 - 8487 .cfi_endproc - 8488 .LFE1230: - 8490 .section .text.CalculateChecksum,"ax",%progbits - 8491 .align 1 - 8492 .global CalculateChecksum - 8493 .syntax unified - 8494 .thumb - 8495 .thumb_func - 8497 CalculateChecksum: - 8498 .LVL799: - 8499 .LFB1233: -3562:Src/main.c **** short i; - 8500 .loc 1 3562 1 is_stmt 1 view -0 - 8501 .cfi_startproc - 8502 @ args = 0, pretend = 0, frame = 0 - 8503 @ frame_needed = 0, uses_anonymous_args = 0 - 8504 @ link register save eliminated. -3562:Src/main.c **** short i; - 8505 .loc 1 3562 1 is_stmt 0 view .LVU2661 - 8506 0000 8446 mov ip, r0 -3563:Src/main.c **** uint16_t cs = *pbuff; - 8507 .loc 1 3563 2 is_stmt 1 view .LVU2662 -3564:Src/main.c **** - 8508 .loc 1 3564 2 view .LVU2663 -3564:Src/main.c **** - 8509 .loc 1 3564 11 is_stmt 0 view .LVU2664 - 8510 0002 0088 ldrh r0, [r0] - 8511 .LVL800: -3566:Src/main.c **** { - 8512 .loc 1 3566 3 is_stmt 1 view .LVU2665 -3566:Src/main.c **** { - 8513 .loc 1 3566 9 is_stmt 0 view .LVU2666 - 8514 0004 0123 movs r3, #1 -3566:Src/main.c **** { - 8515 .loc 1 3566 3 view .LVU2667 - 8516 0006 04E0 b .L446 - 8517 .LVL801: - ARM GAS /tmp/ccuHnxNu.s page 543 + 7930 .L433: +3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7931 .loc 1 3494 42 is_stmt 1 discriminator 1 view .LVU2411 + 7932 .LBB617: + 7933 .LBI617: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7934 .loc 4 916 26 view .LVU2412 + 7935 .LBB618: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7936 .loc 4 918 3 view .LVU2413 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7937 .loc 4 918 12 is_stmt 0 view .LVU2414 + 7938 00ae 334B ldr r3, .L454+20 + 7939 00b0 9B68 ldr r3, [r3, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7940 .loc 4 918 66 view .LVU2415 + 7941 00b2 13F0020F tst r3, #2 + 7942 00b6 04D1 bne .L434 + 7943 .LVL740: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7944 .loc 4 918 66 view .LVU2416 + 7945 .LBE618: + 7946 .LBE617: +3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7947 .loc 1 3494 42 discriminator 2 view .LVU2417 + 7948 00b8 B2F5FA7F cmp r2, #500 + 7949 00bc 01D8 bhi .L434 +3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7950 .loc 1 3494 59 is_stmt 1 discriminator 3 view .LVU2418 +3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7951 .loc 1 3494 64 is_stmt 0 discriminator 3 view .LVU2419 + 7952 00be 0132 adds r2, r2, #1 + 7953 .LVL741: +3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 7954 .loc 1 3494 64 discriminator 3 view .LVU2420 + 7955 00c0 F5E7 b .L433 + 7956 .L434: +3495:Src/main.c **** tmp32 = 0; + 7957 .loc 1 3495 4 is_stmt 1 view .LVU2421 + 7958 .LVL742: + 7959 .LBB619: + 7960 .LBI619: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7961 .loc 4 1373 22 view .LVU2422 + 7962 .LBB620: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 7963 .loc 4 1376 3 view .LVU2423 + 7964 .loc 4 1377 3 view .LVU2424 + 7965 .loc 4 1377 10 is_stmt 0 view .LVU2425 + 7966 00c2 2E4B ldr r3, .L454+20 + 7967 00c4 9D81 strh r5, [r3, #12] @ movhi + 7968 .LVL743: + 7969 .loc 4 1377 10 view .LVU2426 + 7970 .LBE620: + 7971 .LBE619: +3496:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7972 .loc 1 3496 4 is_stmt 1 view .LVU2427 + ARM GAS /tmp/ccLSPxIe.s page 533 - 8518 .L447: -3568:Src/main.c **** } - 8519 .loc 1 3568 3 is_stmt 1 view .LVU2668 -3568:Src/main.c **** } - 8520 .loc 1 3568 9 is_stmt 0 view .LVU2669 - 8521 0008 3CF81320 ldrh r2, [ip, r3, lsl #1] -3568:Src/main.c **** } - 8522 .loc 1 3568 6 view .LVU2670 - 8523 000c 5040 eors r0, r0, r2 - 8524 .LVL802: -3566:Src/main.c **** { - 8525 .loc 1 3566 24 is_stmt 1 discriminator 3 view .LVU2671 - 8526 000e 0133 adds r3, r3, #1 - 8527 .LVL803: -3566:Src/main.c **** { - 8528 .loc 1 3566 24 is_stmt 0 discriminator 3 view .LVU2672 - 8529 0010 1BB2 sxth r3, r3 - 8530 .LVL804: - 8531 .L446: -3566:Src/main.c **** { - 8532 .loc 1 3566 16 is_stmt 1 discriminator 1 view .LVU2673 - 8533 0012 8B42 cmp r3, r1 - 8534 0014 F8DB blt .L447 -3570:Src/main.c **** } - 8535 .loc 1 3570 2 view .LVU2674 -3571:Src/main.c **** - 8536 .loc 1 3571 1 is_stmt 0 view .LVU2675 - 8537 0016 7047 bx lr - 8538 .cfi_endproc - 8539 .LFE1233: - 8541 .section .text.CheckChecksum,"ax",%progbits - 8542 .align 1 - 8543 .global CheckChecksum - 8544 .syntax unified - 8545 .thumb - 8546 .thumb_func - 8548 CheckChecksum: - 8549 .LVL805: - 8550 .LFB1232: -3541:Src/main.c **** uint16_t cl_ind; - 8551 .loc 1 3541 1 is_stmt 1 view -0 - 8552 .cfi_startproc - 8553 @ args = 0, pretend = 0, frame = 0 - 8554 @ frame_needed = 0, uses_anonymous_args = 0 -3541:Src/main.c **** uint16_t cl_ind; - 8555 .loc 1 3541 1 is_stmt 0 view .LVU2677 - 8556 0000 10B5 push {r4, lr} - 8557 .LCFI75: - 8558 .cfi_def_cfa_offset 8 - 8559 .cfi_offset 4, -8 - 8560 .cfi_offset 14, -4 -3542:Src/main.c **** - 8561 .loc 1 3542 3 is_stmt 1 view .LVU2678 -3544:Src/main.c **** { - 8562 .loc 1 3544 3 view .LVU2679 - 8563 0002 0E4B ldr r3, .L454 - 8564 0004 1B88 ldrh r3, [r3] - ARM GAS /tmp/ccuHnxNu.s page 544 +3497:Src/main.c **** (void) SPI6->DR; + 7973 .loc 1 3497 4 view .LVU2428 +3496:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 7974 .loc 1 3496 10 is_stmt 0 view .LVU2429 + 7975 00c6 0022 movs r2, #0 + 7976 .LVL744: + 7977 .L436: +3497:Src/main.c **** (void) SPI6->DR; + 7978 .loc 1 3497 43 is_stmt 1 discriminator 1 view .LVU2430 + 7979 .LBB621: + 7980 .LBI621: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 7981 .loc 4 905 26 view .LVU2431 + 7982 .LBB622: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7983 .loc 4 907 3 view .LVU2432 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7984 .loc 4 907 12 is_stmt 0 view .LVU2433 + 7985 00c8 2C4B ldr r3, .L454+20 + 7986 00ca 9B68 ldr r3, [r3, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7987 .loc 4 907 68 view .LVU2434 + 7988 00cc 13F0010F tst r3, #1 + 7989 00d0 04D1 bne .L437 + 7990 .LVL745: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 7991 .loc 4 907 68 view .LVU2435 + 7992 .LBE622: + 7993 .LBE621: +3497:Src/main.c **** (void) SPI6->DR; + 7994 .loc 1 3497 43 discriminator 2 view .LVU2436 + 7995 00d2 B2F5FA7F cmp r2, #500 + 7996 00d6 01D8 bhi .L437 +3497:Src/main.c **** (void) SPI6->DR; + 7997 .loc 1 3497 60 is_stmt 1 discriminator 3 view .LVU2437 +3497:Src/main.c **** (void) SPI6->DR; + 7998 .loc 1 3497 65 is_stmt 0 discriminator 3 view .LVU2438 + 7999 00d8 0132 adds r2, r2, #1 + 8000 .LVL746: +3497:Src/main.c **** (void) SPI6->DR; + 8001 .loc 1 3497 65 discriminator 3 view .LVU2439 + 8002 00da F5E7 b .L436 + 8003 .L437: +3498:Src/main.c **** break; + 8004 .loc 1 3498 4 is_stmt 1 view .LVU2440 + 8005 00dc 274B ldr r3, .L454+20 + 8006 00de DB68 ldr r3, [r3, #12] +3499:Src/main.c **** case 3: + 8007 .loc 1 3499 3 view .LVU2441 + 8008 00e0 C7E7 b .L421 + 8009 .LVL747: + 8010 .L424: +3501:Src/main.c **** //tmp32=0; + 8011 .loc 1 3501 4 view .LVU2442 + 8012 00e2 0022 movs r2, #0 + 8013 00e4 4FF48051 mov r1, #4096 + 8014 00e8 2248 ldr r0, .L454+12 + ARM GAS /tmp/ccLSPxIe.s page 534 - 8565 0006 41F21112 movw r2, #4369 - 8566 000a 9342 cmp r3, r2 - 8567 000c 05D0 beq .L451 - 8568 000e 47F27772 movw r2, #30583 - 8569 0012 9342 cmp r3, r2 - 8570 0014 0FD1 bne .L452 - 8571 0016 0E24 movs r4, #14 - 8572 0018 00E0 b .L449 - 8573 .L451: -3550:Src/main.c **** break; - 8574 .loc 1 3550 14 is_stmt 0 view .LVU2680 - 8575 001a 0D24 movs r4, #13 - 8576 .L449: - 8577 .LVL806: -3554:Src/main.c **** } - 8578 .loc 1 3554 5 is_stmt 1 view .LVU2681 -3557:Src/main.c **** - 8579 .loc 1 3557 3 view .LVU2682 -3557:Src/main.c **** - 8580 .loc 1 3557 15 is_stmt 0 view .LVU2683 - 8581 001c 2146 mov r1, r4 - 8582 001e FFF7FEFF bl CalculateChecksum - 8583 .LVL807: -3557:Src/main.c **** - 8584 .loc 1 3557 13 discriminator 1 view .LVU2684 - 8585 0022 074B ldr r3, .L454+4 - 8586 0024 1880 strh r0, [r3] @ movhi -3559:Src/main.c **** } - 8587 .loc 1 3559 3 is_stmt 1 view .LVU2685 -3559:Src/main.c **** } - 8588 .loc 1 3559 32 is_stmt 0 view .LVU2686 - 8589 0026 074B ldr r3, .L454+8 - 8590 0028 33F81430 ldrh r3, [r3, r4, lsl #1] -3559:Src/main.c **** } - 8591 .loc 1 3559 46 view .LVU2687 - 8592 002c 9842 cmp r0, r3 - 8593 002e 14BF ite ne - 8594 0030 0020 movne r0, #0 - 8595 0032 0120 moveq r0, #1 - 8596 .LVL808: - 8597 .L450: -3560:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) - 8598 .loc 1 3560 1 view .LVU2688 - 8599 0034 10BD pop {r4, pc} - 8600 .LVL809: - 8601 .L452: -3544:Src/main.c **** { - 8602 .loc 1 3544 3 view .LVU2689 - 8603 0036 0020 movs r0, #0 - 8604 .LVL810: -3544:Src/main.c **** { - 8605 .loc 1 3544 3 view .LVU2690 - 8606 0038 FCE7 b .L450 - 8607 .L455: - 8608 003a 00BF .align 2 - 8609 .L454: - 8610 003c 00000000 .word UART_header - ARM GAS /tmp/ccuHnxNu.s page 545 + 8015 00ea FFF7FEFF bl HAL_GPIO_WritePin + 8016 .LVL748: +3504:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 8017 .loc 1 3504 4 view .LVU2443 +3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 8018 .loc 1 3505 4 view .LVU2444 +3504:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 8019 .loc 1 3504 10 is_stmt 0 view .LVU2445 + 8020 00ee 0022 movs r2, #0 + 8021 .LVL749: + 8022 .L439: +3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 8023 .loc 1 3505 42 is_stmt 1 discriminator 1 view .LVU2446 + 8024 .LBB623: + 8025 .LBI623: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 8026 .loc 4 916 26 view .LVU2447 + 8027 .LBB624: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8028 .loc 4 918 3 view .LVU2448 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8029 .loc 4 918 12 is_stmt 0 view .LVU2449 + 8030 00f0 1E4B ldr r3, .L454+4 + 8031 00f2 9B68 ldr r3, [r3, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8032 .loc 4 918 66 view .LVU2450 + 8033 00f4 13F0020F tst r3, #2 + 8034 00f8 04D1 bne .L440 + 8035 .LVL750: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8036 .loc 4 918 66 view .LVU2451 + 8037 .LBE624: + 8038 .LBE623: +3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 8039 .loc 1 3505 42 discriminator 2 view .LVU2452 + 8040 00fa B2F5FA7F cmp r2, #500 + 8041 00fe 01D8 bhi .L440 +3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 8042 .loc 1 3505 59 is_stmt 1 discriminator 3 view .LVU2453 +3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 8043 .loc 1 3505 64 is_stmt 0 discriminator 3 view .LVU2454 + 8044 0100 0132 adds r2, r2, #1 + 8045 .LVL751: +3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 8046 .loc 1 3505 64 discriminator 3 view .LVU2455 + 8047 0102 F5E7 b .L439 + 8048 .L440: +3506:Src/main.c **** tmp32 = 0; + 8049 .loc 1 3506 4 is_stmt 1 view .LVU2456 + 8050 .LVL752: + 8051 .LBB625: + 8052 .LBI625: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 8053 .loc 4 1373 22 view .LVU2457 + 8054 .LBB626: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 8055 .loc 4 1376 3 view .LVU2458 + ARM GAS /tmp/ccLSPxIe.s page 535 - 8611 0040 00000000 .word CS_result - 8612 0044 00000000 .word COMMAND - 8613 .cfi_endproc - 8614 .LFE1232: - 8616 .section .rodata.SD_SAVE.str1.4,"aMS",%progbits,1 - 8617 .align 2 - 8618 .LC2: - 8619 0000 46494C45 .ascii "FILE1.TXT\000" - 8619 312E5458 - 8619 5400 - 8620 .section .text.SD_SAVE,"ax",%progbits - 8621 .align 1 - 8622 .global SD_SAVE - 8623 .syntax unified - 8624 .thumb - 8625 .thumb_func - 8627 SD_SAVE: - 8628 .LVL811: - 8629 .LFB1234: -3600:Src/main.c **** int test=0; - 8630 .loc 1 3600 1 is_stmt 1 view -0 - 8631 .cfi_startproc - 8632 @ args = 0, pretend = 0, frame = 0 - 8633 @ frame_needed = 0, uses_anonymous_args = 0 -3600:Src/main.c **** int test=0; - 8634 .loc 1 3600 1 is_stmt 0 view .LVU2692 - 8635 0000 10B5 push {r4, lr} - 8636 .LCFI76: - 8637 .cfi_def_cfa_offset 8 - 8638 .cfi_offset 4, -8 - 8639 .cfi_offset 14, -4 - 8640 0002 0446 mov r4, r0 -3601:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 8641 .loc 1 3601 2 is_stmt 1 view .LVU2693 - 8642 .LVL812: -3602:Src/main.c **** { - 8643 .loc 1 3602 2 view .LVU2694 -3602:Src/main.c **** { - 8644 .loc 1 3602 6 is_stmt 0 view .LVU2695 - 8645 0004 0121 movs r1, #1 - 8646 0006 0A48 ldr r0, .L463 - 8647 .LVL813: -3602:Src/main.c **** { - 8648 .loc 1 3602 6 view .LVU2696 - 8649 0008 FFF7FEFF bl HAL_GPIO_ReadPin - 8650 .LVL814: -3602:Src/main.c **** { - 8651 .loc 1 3602 5 discriminator 1 view .LVU2697 - 8652 000c 08B1 cbz r0, .L461 -3619:Src/main.c **** } - 8653 .loc 1 3619 10 view .LVU2698 - 8654 000e 0120 movs r0, #1 - 8655 .LVL815: - 8656 .L456: -3621:Src/main.c **** - 8657 .loc 1 3621 1 view .LVU2699 - 8658 0010 10BD pop {r4, pc} - ARM GAS /tmp/ccuHnxNu.s page 546 + 8056 .loc 4 1377 3 view .LVU2459 + 8057 .loc 4 1377 10 is_stmt 0 view .LVU2460 + 8058 0104 194B ldr r3, .L454+4 + 8059 0106 9D81 strh r5, [r3, #12] @ movhi + 8060 .LVL753: + 8061 .loc 4 1377 10 view .LVU2461 + 8062 .LBE626: + 8063 .LBE625: +3507:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 8064 .loc 1 3507 4 is_stmt 1 view .LVU2462 +3508:Src/main.c **** (void) SPI2->DR; + 8065 .loc 1 3508 4 view .LVU2463 +3507:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 8066 .loc 1 3507 10 is_stmt 0 view .LVU2464 + 8067 0108 0022 movs r2, #0 + 8068 .LVL754: + 8069 .L442: +3508:Src/main.c **** (void) SPI2->DR; + 8070 .loc 1 3508 43 is_stmt 1 discriminator 1 view .LVU2465 + 8071 .LBB627: + 8072 .LBI627: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 8073 .loc 4 905 26 view .LVU2466 + 8074 .LBB628: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8075 .loc 4 907 3 view .LVU2467 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8076 .loc 4 907 12 is_stmt 0 view .LVU2468 + 8077 010a 184B ldr r3, .L454+4 + 8078 010c 9B68 ldr r3, [r3, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8079 .loc 4 907 68 view .LVU2469 + 8080 010e 13F0010F tst r3, #1 + 8081 0112 04D1 bne .L443 + 8082 .LVL755: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8083 .loc 4 907 68 view .LVU2470 + 8084 .LBE628: + 8085 .LBE627: +3508:Src/main.c **** (void) SPI2->DR; + 8086 .loc 1 3508 43 discriminator 2 view .LVU2471 + 8087 0114 B2F5FA7F cmp r2, #500 + 8088 0118 01D8 bhi .L443 +3508:Src/main.c **** (void) SPI2->DR; + 8089 .loc 1 3508 60 is_stmt 1 discriminator 3 view .LVU2472 +3508:Src/main.c **** (void) SPI2->DR; + 8090 .loc 1 3508 65 is_stmt 0 discriminator 3 view .LVU2473 + 8091 011a 0132 adds r2, r2, #1 + 8092 .LVL756: +3508:Src/main.c **** (void) SPI2->DR; + 8093 .loc 1 3508 65 discriminator 3 view .LVU2474 + 8094 011c F5E7 b .L442 + 8095 .L443: +3509:Src/main.c **** break; + 8096 .loc 1 3509 4 is_stmt 1 view .LVU2475 + 8097 011e 134B ldr r3, .L454+4 + 8098 0120 DB68 ldr r3, [r3, #12] + ARM GAS /tmp/ccLSPxIe.s page 536 - 8659 .LVL816: - 8660 .L461: -3604:Src/main.c **** if (test == 0) //0 - suc - 8661 .loc 1 3604 3 is_stmt 1 view .LVU2700 -3604:Src/main.c **** if (test == 0) //0 - suc - 8662 .loc 1 3604 10 is_stmt 0 view .LVU2701 - 8663 0012 0848 ldr r0, .L463+4 - 8664 0014 FFF7FEFF bl Mount_SD - 8665 .LVL817: -3605:Src/main.c **** { - 8666 .loc 1 3605 3 is_stmt 1 view .LVU2702 -3605:Src/main.c **** { - 8667 .loc 1 3605 6 is_stmt 0 view .LVU2703 - 8668 0018 08B1 cbz r0, .L462 -3614:Src/main.c **** } - 8669 .loc 1 3614 11 view .LVU2704 - 8670 001a 0120 movs r0, #1 - 8671 .LVL818: -3614:Src/main.c **** } - 8672 .loc 1 3614 11 view .LVU2705 - 8673 001c F8E7 b .L456 - 8674 .LVL819: - 8675 .L462: -3608:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8676 .loc 1 3608 4 is_stmt 1 view .LVU2706 -3608:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8677 .loc 1 3608 11 is_stmt 0 view .LVU2707 - 8678 001e 1E22 movs r2, #30 - 8679 0020 2146 mov r1, r4 - 8680 0022 0548 ldr r0, .L463+8 - 8681 .LVL820: -3608:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8682 .loc 1 3608 11 view .LVU2708 - 8683 0024 FFF7FEFF bl Update_File_byte - 8684 .LVL821: -3609:Src/main.c **** return test; - 8685 .loc 1 3609 4 is_stmt 1 view .LVU2709 -3609:Src/main.c **** return test; - 8686 .loc 1 3609 11 is_stmt 0 view .LVU2710 - 8687 0028 0248 ldr r0, .L463+4 - 8688 002a FFF7FEFF bl Unmount_SD - 8689 .LVL822: -3610:Src/main.c **** } - 8690 .loc 1 3610 4 is_stmt 1 view .LVU2711 -3610:Src/main.c **** } - 8691 .loc 1 3610 11 is_stmt 0 view .LVU2712 - 8692 002e EFE7 b .L456 - 8693 .L464: - 8694 .align 2 - 8695 .L463: - 8696 0030 000C0240 .word 1073875968 - 8697 0034 00000000 .word .LC0 - 8698 0038 00000000 .word .LC2 - 8699 .cfi_endproc - 8700 .LFE1234: - 8702 .section .text.SD_READ,"ax",%progbits - 8703 .align 1 - ARM GAS /tmp/ccuHnxNu.s page 547 +3510:Src/main.c **** case 4: + 8099 .loc 1 3510 3 view .LVU2476 + 8100 0122 A6E7 b .L421 + 8101 .LVL757: + 8102 .L422: +3512:Src/main.c **** //tmp32=0; + 8103 .loc 1 3512 4 view .LVU2477 + 8104 0124 0022 movs r2, #0 + 8105 0126 4FF48071 mov r1, #256 + 8106 012a 1348 ldr r0, .L454+16 + 8107 012c FFF7FEFF bl HAL_GPIO_WritePin + 8108 .LVL758: +3515:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 8109 .loc 1 3515 4 view .LVU2478 +3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 8110 .loc 1 3516 4 view .LVU2479 +3515:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 8111 .loc 1 3515 10 is_stmt 0 view .LVU2480 + 8112 0130 0022 movs r2, #0 + 8113 .LVL759: + 8114 .L445: +3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 8115 .loc 1 3516 42 is_stmt 1 discriminator 1 view .LVU2481 + 8116 .LBB629: + 8117 .LBI629: + 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 8118 .loc 4 916 26 view .LVU2482 + 8119 .LBB630: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8120 .loc 4 918 3 view .LVU2483 + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8121 .loc 4 918 12 is_stmt 0 view .LVU2484 + 8122 0132 124B ldr r3, .L454+20 + 8123 0134 9B68 ldr r3, [r3, #8] + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8124 .loc 4 918 66 view .LVU2485 + 8125 0136 13F0020F tst r3, #2 + 8126 013a 04D1 bne .L446 + 8127 .LVL760: + 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8128 .loc 4 918 66 view .LVU2486 + 8129 .LBE630: + 8130 .LBE629: +3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 8131 .loc 1 3516 42 discriminator 2 view .LVU2487 + 8132 013c B2F5FA7F cmp r2, #500 + 8133 0140 01D8 bhi .L446 +3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 8134 .loc 1 3516 59 is_stmt 1 discriminator 3 view .LVU2488 +3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 8135 .loc 1 3516 64 is_stmt 0 discriminator 3 view .LVU2489 + 8136 0142 0132 adds r2, r2, #1 + 8137 .LVL761: +3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 8138 .loc 1 3516 64 discriminator 3 view .LVU2490 + 8139 0144 F5E7 b .L445 + 8140 .L446: + ARM GAS /tmp/ccLSPxIe.s page 537 - 8704 .global SD_READ - 8705 .syntax unified - 8706 .thumb - 8707 .thumb_func - 8709 SD_READ: - 8710 .LVL823: - 8711 .LFB1235: -3631:Src/main.c **** int test=0; - 8712 .loc 1 3631 1 is_stmt 1 view -0 - 8713 .cfi_startproc - 8714 @ args = 0, pretend = 0, frame = 0 - 8715 @ frame_needed = 0, uses_anonymous_args = 0 -3631:Src/main.c **** int test=0; - 8716 .loc 1 3631 1 is_stmt 0 view .LVU2714 - 8717 0000 38B5 push {r3, r4, r5, lr} - 8718 .LCFI77: - 8719 .cfi_def_cfa_offset 16 - 8720 .cfi_offset 3, -16 - 8721 .cfi_offset 4, -12 - 8722 .cfi_offset 5, -8 - 8723 .cfi_offset 14, -4 - 8724 0002 0446 mov r4, r0 -3632:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 8725 .loc 1 3632 2 is_stmt 1 view .LVU2715 - 8726 .LVL824: -3633:Src/main.c **** { - 8727 .loc 1 3633 2 view .LVU2716 -3633:Src/main.c **** { - 8728 .loc 1 3633 6 is_stmt 0 view .LVU2717 - 8729 0004 0121 movs r1, #1 - 8730 0006 0D48 ldr r0, .L472 - 8731 .LVL825: -3633:Src/main.c **** { - 8732 .loc 1 3633 6 view .LVU2718 - 8733 0008 FFF7FEFF bl HAL_GPIO_ReadPin - 8734 .LVL826: -3633:Src/main.c **** { - 8735 .loc 1 3633 5 discriminator 1 view .LVU2719 - 8736 000c 08B1 cbz r0, .L470 -3651:Src/main.c **** } - 8737 .loc 1 3651 10 view .LVU2720 - 8738 000e 0120 movs r0, #1 - 8739 .LVL827: - 8740 .L465: -3667:Src/main.c **** - 8741 .loc 1 3667 1 view .LVU2721 - 8742 0010 38BD pop {r3, r4, r5, pc} - 8743 .LVL828: - 8744 .L470: -3635:Src/main.c **** if (test == 0) //0 - suc - 8745 .loc 1 3635 3 is_stmt 1 view .LVU2722 -3635:Src/main.c **** if (test == 0) //0 - suc - 8746 .loc 1 3635 10 is_stmt 0 view .LVU2723 - 8747 0012 0B48 ldr r0, .L472+4 - 8748 0014 FFF7FEFF bl Mount_SD - 8749 .LVL829: -3636:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 548 +3517:Src/main.c **** tmp32 = 0; + 8141 .loc 1 3517 4 is_stmt 1 view .LVU2491 + 8142 .LVL762: + 8143 .LBB631: + 8144 .LBI631: +1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 8145 .loc 4 1373 22 view .LVU2492 + 8146 .LBB632: +1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; + 8147 .loc 4 1376 3 view .LVU2493 + 8148 .loc 4 1377 3 view .LVU2494 + 8149 .loc 4 1377 10 is_stmt 0 view .LVU2495 + 8150 0146 0D4B ldr r3, .L454+20 + 8151 0148 9D81 strh r5, [r3, #12] @ movhi + 8152 .LVL763: + 8153 .loc 4 1377 10 view .LVU2496 + 8154 .LBE632: + 8155 .LBE631: +3518:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 8156 .loc 1 3518 4 is_stmt 1 view .LVU2497 +3519:Src/main.c **** (void) SPI6->DR; + 8157 .loc 1 3519 4 view .LVU2498 +3518:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 8158 .loc 1 3518 10 is_stmt 0 view .LVU2499 + 8159 014a 0022 movs r2, #0 + 8160 .LVL764: + 8161 .L448: +3519:Src/main.c **** (void) SPI6->DR; + 8162 .loc 1 3519 43 is_stmt 1 discriminator 1 view .LVU2500 + 8163 .LBB633: + 8164 .LBI633: + 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { + 8165 .loc 4 905 26 view .LVU2501 + 8166 .LBB634: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8167 .loc 4 907 3 view .LVU2502 + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8168 .loc 4 907 12 is_stmt 0 view .LVU2503 + 8169 014c 0B4B ldr r3, .L454+20 + 8170 014e 9B68 ldr r3, [r3, #8] + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8171 .loc 4 907 68 view .LVU2504 + 8172 0150 13F0010F tst r3, #1 + 8173 0154 04D1 bne .L449 + 8174 .LVL765: + 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + 8175 .loc 4 907 68 view .LVU2505 + 8176 .LBE634: + 8177 .LBE633: +3519:Src/main.c **** (void) SPI6->DR; + 8178 .loc 1 3519 43 discriminator 2 view .LVU2506 + 8179 0156 B2F5FA7F cmp r2, #500 + 8180 015a 01D8 bhi .L449 +3519:Src/main.c **** (void) SPI6->DR; + 8181 .loc 1 3519 60 is_stmt 1 discriminator 3 view .LVU2507 +3519:Src/main.c **** (void) SPI6->DR; + 8182 .loc 1 3519 65 is_stmt 0 discriminator 3 view .LVU2508 + ARM GAS /tmp/ccLSPxIe.s page 538 - 8750 .loc 1 3636 3 is_stmt 1 view .LVU2724 -3636:Src/main.c **** { - 8751 .loc 1 3636 6 is_stmt 0 view .LVU2725 - 8752 0018 08B1 cbz r0, .L471 -3646:Src/main.c **** } - 8753 .loc 1 3646 11 view .LVU2726 - 8754 001a 0120 movs r0, #1 - 8755 .LVL830: -3646:Src/main.c **** } - 8756 .loc 1 3646 11 view .LVU2727 - 8757 001c F8E7 b .L465 - 8758 .LVL831: - 8759 .L471: -3639:Src/main.c **** fgoto+=DL_8; - 8760 .loc 1 3639 4 is_stmt 1 view .LVU2728 -3639:Src/main.c **** fgoto+=DL_8; - 8761 .loc 1 3639 11 is_stmt 0 view .LVU2729 - 8762 001e 094D ldr r5, .L472+8 - 8763 0020 2B68 ldr r3, [r5] - 8764 0022 1E22 movs r2, #30 - 8765 0024 2146 mov r1, r4 - 8766 0026 0848 ldr r0, .L472+12 - 8767 .LVL832: -3639:Src/main.c **** fgoto+=DL_8; - 8768 .loc 1 3639 11 view .LVU2730 - 8769 0028 FFF7FEFF bl Seek_Read_File - 8770 .LVL833: -3640:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8771 .loc 1 3640 4 is_stmt 1 view .LVU2731 -3640:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 8772 .loc 1 3640 9 is_stmt 0 view .LVU2732 - 8773 002c 2B68 ldr r3, [r5] - 8774 002e 1E33 adds r3, r3, #30 - 8775 0030 2B60 str r3, [r5] -3641:Src/main.c **** return test; - 8776 .loc 1 3641 4 is_stmt 1 view .LVU2733 -3641:Src/main.c **** return test; - 8777 .loc 1 3641 11 is_stmt 0 view .LVU2734 - 8778 0032 0348 ldr r0, .L472+4 - 8779 0034 FFF7FEFF bl Unmount_SD - 8780 .LVL834: -3642:Src/main.c **** } - 8781 .loc 1 3642 4 is_stmt 1 view .LVU2735 -3642:Src/main.c **** } - 8782 .loc 1 3642 11 is_stmt 0 view .LVU2736 - 8783 0038 EAE7 b .L465 - 8784 .L473: - 8785 003a 00BF .align 2 - 8786 .L472: - 8787 003c 000C0240 .word 1073875968 - 8788 0040 00000000 .word .LC0 - 8789 0044 00000000 .word fgoto - 8790 0048 00000000 .word .LC2 - 8791 .cfi_endproc - 8792 .LFE1235: - 8794 .section .text.SD_REMOVE,"ax",%progbits - 8795 .align 1 - ARM GAS /tmp/ccuHnxNu.s page 549 + 8183 015c 0132 adds r2, r2, #1 + 8184 .LVL766: +3519:Src/main.c **** (void) SPI6->DR; + 8185 .loc 1 3519 65 discriminator 3 view .LVU2509 + 8186 015e F5E7 b .L448 + 8187 .L449: +3520:Src/main.c **** break; + 8188 .loc 1 3520 4 is_stmt 1 view .LVU2510 + 8189 0160 064B ldr r3, .L454+20 + 8190 0162 DB68 ldr r3, [r3, #12] +3521:Src/main.c **** } + 8191 .loc 1 3521 3 view .LVU2511 + 8192 0164 85E7 b .L421 + 8193 .L455: + 8194 0166 00BF .align 2 + 8195 .L454: + 8196 0168 00040240 .word 1073873920 + 8197 016c 00380040 .word 1073756160 + 8198 0170 00000240 .word 1073872896 + 8199 0174 000C0240 .word 1073875968 + 8200 0178 00100240 .word 1073876992 + 8201 017c 00540140 .word 1073828864 + 8202 .cfi_endproc + 8203 .LFE1235: + 8205 .section .text.Decode_uart,"ax",%progbits + 8206 .align 1 + 8207 .syntax unified + 8208 .thumb + 8209 .thumb_func + 8211 Decode_uart: + 8212 .LVL767: + 8213 .LFB1209: +2485:Src/main.c **** // uint8_t *temp1; + 8214 .loc 1 2485 1 view -0 + 8215 .cfi_startproc + 8216 @ args = 0, pretend = 0, frame = 0 + 8217 @ frame_needed = 0, uses_anonymous_args = 0 +2485:Src/main.c **** // uint8_t *temp1; + 8218 .loc 1 2485 1 is_stmt 0 view .LVU2513 + 8219 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 8220 .LCFI74: + 8221 .cfi_def_cfa_offset 32 + 8222 .cfi_offset 3, -32 + 8223 .cfi_offset 4, -28 + 8224 .cfi_offset 5, -24 + 8225 .cfi_offset 6, -20 + 8226 .cfi_offset 7, -16 + 8227 .cfi_offset 8, -12 + 8228 .cfi_offset 9, -8 + 8229 .cfi_offset 14, -4 + 8230 0004 0546 mov r5, r0 + 8231 0006 0F46 mov r7, r1 + 8232 0008 1646 mov r6, r2 + 8233 000a 1C46 mov r4, r3 +2487:Src/main.c **** + 8234 .loc 1 2487 2 is_stmt 1 view .LVU2514 +2492:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + ARM GAS /tmp/ccLSPxIe.s page 539 - 8796 .global SD_REMOVE - 8797 .syntax unified - 8798 .thumb - 8799 .thumb_func - 8801 SD_REMOVE: - 8802 .LFB1236: -3670:Src/main.c **** int test=0; - 8803 .loc 1 3670 1 is_stmt 1 view -0 - 8804 .cfi_startproc - 8805 @ args = 0, pretend = 0, frame = 0 - 8806 @ frame_needed = 0, uses_anonymous_args = 0 - 8807 0000 10B5 push {r4, lr} - 8808 .LCFI78: - 8809 .cfi_def_cfa_offset 8 - 8810 .cfi_offset 4, -8 - 8811 .cfi_offset 14, -4 -3671:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 8812 .loc 1 3671 2 view .LVU2738 - 8813 .LVL835: -3672:Src/main.c **** { - 8814 .loc 1 3672 2 view .LVU2739 -3672:Src/main.c **** { - 8815 .loc 1 3672 6 is_stmt 0 view .LVU2740 - 8816 0002 0121 movs r1, #1 - 8817 0004 0B48 ldr r0, .L481 - 8818 0006 FFF7FEFF bl HAL_GPIO_ReadPin - 8819 .LVL836: -3672:Src/main.c **** { - 8820 .loc 1 3672 5 discriminator 1 view .LVU2741 - 8821 000a 08B1 cbz r0, .L479 -3690:Src/main.c **** } - 8822 .loc 1 3690 10 view .LVU2742 - 8823 000c 0120 movs r0, #1 - 8824 .LVL837: - 8825 .L474: -3692:Src/main.c **** - 8826 .loc 1 3692 1 view .LVU2743 - 8827 000e 10BD pop {r4, pc} - 8828 .LVL838: - 8829 .L479: -3674:Src/main.c **** if (test==FR_OK) - 8830 .loc 1 3674 3 is_stmt 1 view .LVU2744 -3674:Src/main.c **** if (test==FR_OK) - 8831 .loc 1 3674 10 is_stmt 0 view .LVU2745 - 8832 0010 0948 ldr r0, .L481+4 - 8833 0012 FFF7FEFF bl Mount_SD - 8834 .LVL839: -3675:Src/main.c **** { - 8835 .loc 1 3675 3 is_stmt 1 view .LVU2746 -3675:Src/main.c **** { - 8836 .loc 1 3675 6 is_stmt 0 view .LVU2747 - 8837 0016 08B1 cbz r0, .L480 -3685:Src/main.c **** } - 8838 .loc 1 3685 11 view .LVU2748 - 8839 0018 0120 movs r0, #1 - 8840 .LVL840: -3685:Src/main.c **** } - ARM GAS /tmp/ccuHnxNu.s page 550 + 8235 .loc 1 2492 2 view .LVU2515 +2492:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 8236 .loc 1 2492 6 is_stmt 0 view .LVU2516 + 8237 000c AF4B ldr r3, .L480 + 8238 .LVL768: +2492:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 8239 .loc 1 2492 6 view .LVU2517 + 8240 000e 0022 movs r2, #0 + 8241 .LVL769: +2492:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 8242 .loc 1 2492 6 view .LVU2518 + 8243 0010 1A60 str r2, [r3] +2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 8244 .loc 1 2493 2 is_stmt 1 view .LVU2519 +2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 8245 .loc 1 2493 7 is_stmt 0 view .LVU2520 + 8246 0012 0121 movs r1, #1 + 8247 .LVL770: +2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 8248 .loc 1 2493 7 view .LVU2521 + 8249 0014 AE48 ldr r0, .L480+4 + 8250 .LVL771: +2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 8251 .loc 1 2493 7 view .LVU2522 + 8252 0016 FFF7FEFF bl HAL_GPIO_ReadPin + 8253 .LVL772: +2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 8254 .loc 1 2493 5 discriminator 1 view .LVU2523 + 8255 001a 0028 cmp r0, #0 + 8256 001c 00F0D280 beq .L477 + 8257 .L457: +2508:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 8258 .loc 1 2508 2 is_stmt 1 view .LVU2524 + 8259 .LVL773: +2509:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 8260 .loc 1 2509 2 view .LVU2525 +2509:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 8261 .loc 1 2509 36 is_stmt 0 view .LVU2526 + 8262 0020 2B88 ldrh r3, [r5] +2509:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 8263 .loc 1 2509 48 view .LVU2527 + 8264 0022 03F00103 and r3, r3, #1 +2509:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 8265 .loc 1 2509 22 view .LVU2528 + 8266 0026 2370 strb r3, [r4] +2510:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 8267 .loc 1 2510 2 is_stmt 1 view .LVU2529 +2510:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 8268 .loc 1 2510 36 is_stmt 0 view .LVU2530 + 8269 0028 2B88 ldrh r3, [r5] +2510:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 8270 .loc 1 2510 48 view .LVU2531 + 8271 002a C3F34003 ubfx r3, r3, #1, #1 +2510:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 8272 .loc 1 2510 22 view .LVU2532 + 8273 002e 6370 strb r3, [r4, #1] +2511:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + ARM GAS /tmp/ccLSPxIe.s page 540 - 8841 .loc 1 3685 11 view .LVU2749 - 8842 001a F8E7 b .L474 - 8843 .LVL841: - 8844 .L480: -3677:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 8845 .loc 1 3677 4 is_stmt 1 view .LVU2750 -3677:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 8846 .loc 1 3677 11 is_stmt 0 view .LVU2751 - 8847 001c 074C ldr r4, .L481+8 - 8848 001e 2046 mov r0, r4 - 8849 .LVL842: -3677:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 8850 .loc 1 3677 11 view .LVU2752 - 8851 0020 FFF7FEFF bl Remove_File - 8852 .LVL843: -3678:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 8853 .loc 1 3678 4 is_stmt 1 view .LVU2753 -3678:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 8854 .loc 1 3678 11 is_stmt 0 view .LVU2754 - 8855 0024 2046 mov r0, r4 - 8856 0026 FFF7FEFF bl Create_File - 8857 .LVL844: -3680:Src/main.c **** return test; - 8858 .loc 1 3680 4 is_stmt 1 view .LVU2755 -3680:Src/main.c **** return test; - 8859 .loc 1 3680 11 is_stmt 0 view .LVU2756 - 8860 002a 0348 ldr r0, .L481+4 - 8861 002c FFF7FEFF bl Unmount_SD - 8862 .LVL845: -3681:Src/main.c **** } - 8863 .loc 1 3681 4 is_stmt 1 view .LVU2757 -3681:Src/main.c **** } - 8864 .loc 1 3681 11 is_stmt 0 view .LVU2758 - 8865 0030 EDE7 b .L474 - 8866 .L482: - 8867 0032 00BF .align 2 - 8868 .L481: - 8869 0034 000C0240 .word 1073875968 - 8870 0038 00000000 .word .LC0 - 8871 003c 00000000 .word .LC2 - 8872 .cfi_endproc - 8873 .LFE1236: - 8875 .section .text.USART_TX,"ax",%progbits - 8876 .align 1 - 8877 .global USART_TX - 8878 .syntax unified - 8879 .thumb - 8880 .thumb_func - 8882 USART_TX: - 8883 .LVL846: - 8884 .LFB1237: -3696:Src/main.c **** uint16_t ind = 0; - 8885 .loc 1 3696 1 is_stmt 1 view -0 - 8886 .cfi_startproc - 8887 @ args = 0, pretend = 0, frame = 0 - 8888 @ frame_needed = 0, uses_anonymous_args = 0 - 8889 @ link register save eliminated. - ARM GAS /tmp/ccuHnxNu.s page 551 + 8274 .loc 1 2511 2 is_stmt 1 view .LVU2533 +2511:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 8275 .loc 1 2511 36 is_stmt 0 view .LVU2534 + 8276 0030 2B88 ldrh r3, [r5] +2511:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 8277 .loc 1 2511 48 view .LVU2535 + 8278 0032 C3F38003 ubfx r3, r3, #2, #1 +2511:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 8279 .loc 1 2511 22 view .LVU2536 + 8280 0036 A370 strb r3, [r4, #2] +2512:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 8281 .loc 1 2512 2 is_stmt 1 view .LVU2537 +2512:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 8282 .loc 1 2512 35 is_stmt 0 view .LVU2538 + 8283 0038 2B88 ldrh r3, [r5] +2512:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 8284 .loc 1 2512 47 view .LVU2539 + 8285 003a C3F3C003 ubfx r3, r3, #3, #1 +2512:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 8286 .loc 1 2512 21 view .LVU2540 + 8287 003e E370 strb r3, [r4, #3] +2513:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 8288 .loc 1 2513 2 is_stmt 1 view .LVU2541 +2513:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 8289 .loc 1 2513 35 is_stmt 0 view .LVU2542 + 8290 0040 2B88 ldrh r3, [r5] +2513:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 8291 .loc 1 2513 47 view .LVU2543 + 8292 0042 C3F30013 ubfx r3, r3, #4, #1 +2513:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 8293 .loc 1 2513 21 view .LVU2544 + 8294 0046 2371 strb r3, [r4, #4] +2514:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 8295 .loc 1 2514 2 is_stmt 1 view .LVU2545 +2514:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 8296 .loc 1 2514 36 is_stmt 0 view .LVU2546 + 8297 0048 2B88 ldrh r3, [r5] +2514:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 8298 .loc 1 2514 48 view .LVU2547 + 8299 004a C3F34013 ubfx r3, r3, #5, #1 +2514:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 8300 .loc 1 2514 22 view .LVU2548 + 8301 004e 6371 strb r3, [r4, #5] +2515:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 8302 .loc 1 2515 2 is_stmt 1 view .LVU2549 +2515:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 8303 .loc 1 2515 36 is_stmt 0 view .LVU2550 + 8304 0050 2B88 ldrh r3, [r5] +2515:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 8305 .loc 1 2515 48 view .LVU2551 + 8306 0052 C3F38013 ubfx r3, r3, #6, #1 +2515:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 8307 .loc 1 2515 22 view .LVU2552 + 8308 0056 A371 strb r3, [r4, #6] +2516:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 8309 .loc 1 2516 2 is_stmt 1 view .LVU2553 +2516:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + ARM GAS /tmp/ccLSPxIe.s page 541 -3696:Src/main.c **** uint16_t ind = 0; - 8890 .loc 1 3696 1 is_stmt 0 view .LVU2760 - 8891 0000 8C46 mov ip, r1 -3697:Src/main.c **** while (indTEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 8312 .loc 1 2516 48 view .LVU2555 + 8313 005a C3F3C013 ubfx r3, r3, #7, #1 +2516:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 8314 .loc 1 2516 22 view .LVU2556 + 8315 005e E371 strb r3, [r4, #7] +2517:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 8316 .loc 1 2517 2 is_stmt 1 view .LVU2557 +2517:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 8317 .loc 1 2517 36 is_stmt 0 view .LVU2558 + 8318 0060 2B88 ldrh r3, [r5] +2517:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 8319 .loc 1 2517 48 view .LVU2559 + 8320 0062 C3F30023 ubfx r3, r3, #8, #1 +2517:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 8321 .loc 1 2517 22 view .LVU2560 + 8322 0066 2372 strb r3, [r4, #8] +2518:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 8323 .loc 1 2518 2 is_stmt 1 view .LVU2561 +2518:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 8324 .loc 1 2518 35 is_stmt 0 view .LVU2562 + 8325 0068 2B88 ldrh r3, [r5] +2518:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 8326 .loc 1 2518 47 view .LVU2563 + 8327 006a C3F34023 ubfx r3, r3, #9, #1 +2518:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 8328 .loc 1 2518 21 view .LVU2564 + 8329 006e 6372 strb r3, [r4, #9] +2519:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 8330 .loc 1 2519 2 is_stmt 1 view .LVU2565 +2519:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 8331 .loc 1 2519 35 is_stmt 0 view .LVU2566 + 8332 0070 2B88 ldrh r3, [r5] +2519:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 8333 .loc 1 2519 48 view .LVU2567 + 8334 0072 C3F38023 ubfx r3, r3, #10, #1 +2519:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 8335 .loc 1 2519 21 view .LVU2568 + 8336 0076 A372 strb r3, [r4, #10] +2520:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 8337 .loc 1 2520 2 is_stmt 1 view .LVU2569 +2520:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 8338 .loc 1 2520 34 is_stmt 0 view .LVU2570 + 8339 0078 2B88 ldrh r3, [r5] +2520:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 8340 .loc 1 2520 47 view .LVU2571 + 8341 007a C3F3C023 ubfx r3, r3, #11, #1 +2520:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 8342 .loc 1 2520 20 view .LVU2572 + 8343 007e E372 strb r3, [r4, #11] +2521:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 8344 .loc 1 2521 2 is_stmt 1 view .LVU2573 +2521:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 8345 .loc 1 2521 35 is_stmt 0 view .LVU2574 + 8346 0080 2B88 ldrh r3, [r5] + ARM GAS /tmp/ccLSPxIe.s page 542 + + +2521:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 8347 .loc 1 2521 48 view .LVU2575 + 8348 0082 C3F30033 ubfx r3, r3, #12, #1 +2521:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 8349 .loc 1 2521 21 view .LVU2576 + 8350 0086 2373 strb r3, [r4, #12] +2522:Src/main.c **** + 8351 .loc 1 2522 2 is_stmt 1 view .LVU2577 +2522:Src/main.c **** + 8352 .loc 1 2522 35 is_stmt 0 view .LVU2578 + 8353 0088 2B88 ldrh r3, [r5] +2522:Src/main.c **** + 8354 .loc 1 2522 48 view .LVU2579 + 8355 008a C3F34033 ubfx r3, r3, #13, #1 +2522:Src/main.c **** + 8356 .loc 1 2522 21 view .LVU2580 + 8357 008e 6373 strb r3, [r4, #13] +2524:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 8358 .loc 1 2524 2 is_stmt 1 view .LVU2581 + 8359 .LVL774: +2525:Src/main.c **** temp2++; + 8360 .loc 1 2525 2 view .LVU2582 +2525:Src/main.c **** temp2++; + 8361 .loc 1 2525 28 is_stmt 0 view .LVU2583 + 8362 0090 6B88 ldrh r3, [r5, #2] +2525:Src/main.c **** temp2++; + 8363 .loc 1 2525 26 view .LVU2584 + 8364 0092 3B80 strh r3, [r7] @ movhi +2526:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 8365 .loc 1 2526 2 is_stmt 1 view .LVU2585 + 8366 .LVL775: +2527:Src/main.c **** temp2++; + 8367 .loc 1 2527 2 view .LVU2586 +2527:Src/main.c **** temp2++; + 8368 .loc 1 2527 28 is_stmt 0 view .LVU2587 + 8369 0094 AB88 ldrh r3, [r5, #4] +2527:Src/main.c **** temp2++; + 8370 .loc 1 2527 26 view .LVU2588 + 8371 0096 3380 strh r3, [r6] @ movhi +2528:Src/main.c **** temp2++; + 8372 .loc 1 2528 2 is_stmt 1 view .LVU2589 + 8373 .LVL776: +2529:Src/main.c **** temp2++; + 8374 .loc 1 2529 2 view .LVU2590 +2530:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); + 8375 .loc 1 2530 2 view .LVU2591 +2531:Src/main.c **** temp2++; + 8376 .loc 1 2531 2 view .LVU2592 +2531:Src/main.c **** temp2++; + 8377 .loc 1 2531 25 is_stmt 0 view .LVU2593 + 8378 0098 6B89 ldrh r3, [r5, #10] +2531:Src/main.c **** temp2++; + 8379 .loc 1 2531 23 view .LVU2594 + 8380 009a E381 strh r3, [r4, #14] @ movhi +2532:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 8381 .loc 1 2532 2 is_stmt 1 view .LVU2595 + 8382 .LVL777: + ARM GAS /tmp/ccLSPxIe.s page 543 + + +2533:Src/main.c **** temp2++; + 8383 .loc 1 2533 2 view .LVU2596 +2533:Src/main.c **** temp2++; + 8384 .loc 1 2533 51 is_stmt 0 view .LVU2597 + 8385 009c AB89 ldrh r3, [r5, #12] + 8386 009e 07EE903A vmov s15, r3 @ int +2533:Src/main.c **** temp2++; + 8387 .loc 1 2533 32 view .LVU2598 + 8388 00a2 F8EE677A vcvt.f32.u32 s15, s15 +2533:Src/main.c **** temp2++; + 8389 .loc 1 2533 59 view .LVU2599 + 8390 00a6 9FED8B7A vldr.32 s14, .L480+8 + 8391 00aa 67EE877A vmul.f32 s15, s15, s14 +2533:Src/main.c **** temp2++; + 8392 .loc 1 2533 30 view .LVU2600 + 8393 00ae C7ED017A vstr.32 s15, [r7, #4] +2534:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 8394 .loc 1 2534 2 is_stmt 1 view .LVU2601 + 8395 .LVL778: +2535:Src/main.c **** temp2++; + 8396 .loc 1 2535 2 view .LVU2602 +2535:Src/main.c **** temp2++; + 8397 .loc 1 2535 51 is_stmt 0 view .LVU2603 + 8398 00b2 EB89 ldrh r3, [r5, #14] + 8399 00b4 07EE903A vmov s15, r3 @ int +2535:Src/main.c **** temp2++; + 8400 .loc 1 2535 32 view .LVU2604 + 8401 00b8 F8EE677A vcvt.f32.u32 s15, s15 +2535:Src/main.c **** temp2++; + 8402 .loc 1 2535 59 view .LVU2605 + 8403 00bc 67EE877A vmul.f32 s15, s15, s14 +2535:Src/main.c **** temp2++; + 8404 .loc 1 2535 30 view .LVU2606 + 8405 00c0 C7ED027A vstr.32 s15, [r7, #8] +2536:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 8406 .loc 1 2536 2 is_stmt 1 view .LVU2607 + 8407 .LVL779: +2537:Src/main.c **** temp2++; + 8408 .loc 1 2537 2 view .LVU2608 +2537:Src/main.c **** temp2++; + 8409 .loc 1 2537 51 is_stmt 0 view .LVU2609 + 8410 00c4 2B8A ldrh r3, [r5, #16] + 8411 00c6 07EE903A vmov s15, r3 @ int +2537:Src/main.c **** temp2++; + 8412 .loc 1 2537 32 view .LVU2610 + 8413 00ca F8EE677A vcvt.f32.u32 s15, s15 +2537:Src/main.c **** temp2++; + 8414 .loc 1 2537 59 view .LVU2611 + 8415 00ce 67EE877A vmul.f32 s15, s15, s14 +2537:Src/main.c **** temp2++; + 8416 .loc 1 2537 30 view .LVU2612 + 8417 00d2 C6ED017A vstr.32 s15, [r6, #4] +2538:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 8418 .loc 1 2538 2 is_stmt 1 view .LVU2613 + 8419 .LVL780: +2539:Src/main.c **** temp2++; + 8420 .loc 1 2539 2 view .LVU2614 + ARM GAS /tmp/ccLSPxIe.s page 544 + + +2539:Src/main.c **** temp2++; + 8421 .loc 1 2539 51 is_stmt 0 view .LVU2615 + 8422 00d6 6B8A ldrh r3, [r5, #18] + 8423 00d8 07EE903A vmov s15, r3 @ int +2539:Src/main.c **** temp2++; + 8424 .loc 1 2539 32 view .LVU2616 + 8425 00dc F8EE677A vcvt.f32.u32 s15, s15 +2539:Src/main.c **** temp2++; + 8426 .loc 1 2539 59 view .LVU2617 + 8427 00e0 67EE877A vmul.f32 s15, s15, s14 +2539:Src/main.c **** temp2++; + 8428 .loc 1 2539 30 view .LVU2618 + 8429 00e4 C6ED027A vstr.32 s15, [r6, #8] +2540:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID + 8430 .loc 1 2540 2 is_stmt 1 view .LVU2619 + 8431 .LVL781: +2541:Src/main.c **** temp2++; + 8432 .loc 1 2541 2 view .LVU2620 +2541:Src/main.c **** temp2++; + 8433 .loc 1 2541 18 is_stmt 0 view .LVU2621 + 8434 00e8 AA8A ldrh r2, [r5, #20] +2541:Src/main.c **** temp2++; + 8435 .loc 1 2541 16 view .LVU2622 + 8436 00ea 7B4B ldr r3, .L480+12 + 8437 00ec 5A83 strh r2, [r3, #26] @ movhi +2542:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); + 8438 .loc 1 2542 2 is_stmt 1 view .LVU2623 + 8439 .LVL782: +2543:Src/main.c **** temp2++; + 8440 .loc 1 2543 2 view .LVU2624 +2543:Src/main.c **** temp2++; + 8441 .loc 1 2543 28 is_stmt 0 view .LVU2625 + 8442 00ee EB8A ldrh r3, [r5, #22] +2543:Src/main.c **** temp2++; + 8443 .loc 1 2543 26 view .LVU2626 + 8444 00f0 BB81 strh r3, [r7, #12] @ movhi +2544:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); + 8445 .loc 1 2544 2 is_stmt 1 view .LVU2627 + 8446 .LVL783: +2545:Src/main.c **** temp2++; + 8447 .loc 1 2545 2 view .LVU2628 +2545:Src/main.c **** temp2++; + 8448 .loc 1 2545 28 is_stmt 0 view .LVU2629 + 8449 00f2 2B8B ldrh r3, [r5, #24] +2545:Src/main.c **** temp2++; + 8450 .loc 1 2545 26 view .LVU2630 + 8451 00f4 B381 strh r3, [r6, #12] @ movhi +2546:Src/main.c **** + 8452 .loc 1 2546 2 is_stmt 1 view .LVU2631 + 8453 .LVL784: +2548:Src/main.c **** { + 8454 .loc 1 2548 2 view .LVU2632 +2548:Src/main.c **** { + 8455 .loc 1 2548 16 is_stmt 0 view .LVU2633 + 8456 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2 +2548:Src/main.c **** { + 8457 .loc 1 2548 5 view .LVU2634 + ARM GAS /tmp/ccLSPxIe.s page 545 + + + 8458 00f8 002B cmp r3, #0 + 8459 00fa 00F09580 beq .L458 +2550:Src/main.c **** } + 8460 .loc 1 2550 3 is_stmt 1 view .LVU2635 + 8461 00fe 0122 movs r2, #1 + 8462 0100 0821 movs r1, #8 + 8463 0102 7648 ldr r0, .L480+16 + 8464 0104 FFF7FEFF bl HAL_GPIO_WritePin + 8465 .LVL785: + 8466 .L459: +2557:Src/main.c **** { + 8467 .loc 1 2557 2 view .LVU2636 +2557:Src/main.c **** { + 8468 .loc 1 2557 16 is_stmt 0 view .LVU2637 + 8469 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2 +2557:Src/main.c **** { + 8470 .loc 1 2557 5 view .LVU2638 + 8471 010a 002B cmp r3, #0 + 8472 010c 00F09280 beq .L460 +2559:Src/main.c **** } + 8473 .loc 1 2559 3 is_stmt 1 view .LVU2639 + 8474 0110 0122 movs r2, #1 + 8475 0112 8021 movs r1, #128 + 8476 0114 7148 ldr r0, .L480+16 + 8477 0116 FFF7FEFF bl HAL_GPIO_WritePin + 8478 .LVL786: + 8479 .L461: +2566:Src/main.c **** { + 8480 .loc 1 2566 2 view .LVU2640 +2566:Src/main.c **** { + 8481 .loc 1 2566 16 is_stmt 0 view .LVU2641 + 8482 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 +2566:Src/main.c **** { + 8483 .loc 1 2566 5 view .LVU2642 + 8484 011c 002B cmp r3, #0 + 8485 011e 00F08F80 beq .L462 +2568:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC + 8486 .loc 1 2568 3 is_stmt 1 view .LVU2643 + 8487 0122 0122 movs r2, #1 + 8488 0124 4FF48071 mov r1, #256 + 8489 0128 6948 ldr r0, .L480+4 + 8490 012a FFF7FEFF bl HAL_GPIO_WritePin + 8491 .LVL787: + 8492 .L463: +2577:Src/main.c **** { + 8493 .loc 1 2577 2 view .LVU2644 +2577:Src/main.c **** { + 8494 .loc 1 2577 16 is_stmt 0 view .LVU2645 + 8495 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2 +2577:Src/main.c **** { + 8496 .loc 1 2577 5 view .LVU2646 + 8497 0130 002B cmp r3, #0 + 8498 0132 00F08C80 beq .L464 +2579:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC + 8499 .loc 1 2579 3 is_stmt 1 view .LVU2647 + 8500 0136 0122 movs r2, #1 + 8501 0138 1021 movs r1, #16 + ARM GAS /tmp/ccLSPxIe.s page 546 + + + 8502 013a 6848 ldr r0, .L480+16 + 8503 013c FFF7FEFF bl HAL_GPIO_WritePin + 8504 .LVL788: + 8505 .L465: +2588:Src/main.c **** { + 8506 .loc 1 2588 2 view .LVU2648 +2588:Src/main.c **** { + 8507 .loc 1 2588 16 is_stmt 0 view .LVU2649 + 8508 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 +2588:Src/main.c **** { + 8509 .loc 1 2588 5 view .LVU2650 + 8510 0142 002B cmp r3, #0 + 8511 0144 00F08980 beq .L466 +2590:Src/main.c **** } + 8512 .loc 1 2590 3 is_stmt 1 view .LVU2651 + 8513 0148 0122 movs r2, #1 + 8514 014a 4FF48061 mov r1, #1024 + 8515 014e 6448 ldr r0, .L480+20 + 8516 0150 FFF7FEFF bl HAL_GPIO_WritePin + 8517 .LVL789: + 8518 .L467: +2597:Src/main.c **** { + 8519 .loc 1 2597 2 view .LVU2652 +2597:Src/main.c **** { + 8520 .loc 1 2597 16 is_stmt 0 view .LVU2653 + 8521 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2 +2597:Src/main.c **** { + 8522 .loc 1 2597 5 view .LVU2654 + 8523 0156 002B cmp r3, #0 + 8524 0158 00F08680 beq .L468 +2599:Src/main.c **** } + 8525 .loc 1 2599 3 is_stmt 1 view .LVU2655 + 8526 015c 0122 movs r2, #1 + 8527 015e 0821 movs r1, #8 + 8528 0160 6048 ldr r0, .L480+24 + 8529 0162 FFF7FEFF bl HAL_GPIO_WritePin + 8530 .LVL790: + 8531 .L469: +2606:Src/main.c **** { + 8532 .loc 1 2606 2 view .LVU2656 +2606:Src/main.c **** { + 8533 .loc 1 2606 17 is_stmt 0 view .LVU2657 + 8534 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2 +2606:Src/main.c **** { + 8535 .loc 1 2606 5 view .LVU2658 + 8536 0168 1BB1 cbz r3, .L470 +2606:Src/main.c **** { + 8537 .loc 1 2606 39 discriminator 1 view .LVU2659 + 8538 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2 +2606:Src/main.c **** { + 8539 .loc 1 2606 26 discriminator 1 view .LVU2660 + 8540 016c 002B cmp r3, #0 + 8541 016e 40F08180 bne .L478 + 8542 .L470: +2615:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 8543 .loc 1 2615 3 is_stmt 1 view .LVU2661 + 8544 0172 0022 movs r2, #0 + ARM GAS /tmp/ccLSPxIe.s page 547 + + + 8545 0174 0121 movs r1, #1 + 8546 0176 5B48 ldr r0, .L480+24 + 8547 0178 FFF7FEFF bl HAL_GPIO_WritePin + 8548 .LVL791: +2616:Src/main.c **** } + 8549 .loc 1 2616 3 view .LVU2662 + 8550 017c 0022 movs r2, #0 + 8551 017e 4FF40061 mov r1, #2048 + 8552 0182 5748 ldr r0, .L480+20 + 8553 0184 FFF7FEFF bl HAL_GPIO_WritePin + 8554 .LVL792: + 8555 .L471: +2619:Src/main.c **** { + 8556 .loc 1 2619 2 view .LVU2663 +2619:Src/main.c **** { + 8557 .loc 1 2619 17 is_stmt 0 view .LVU2664 + 8558 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2 +2619:Src/main.c **** { + 8559 .loc 1 2619 5 view .LVU2665 + 8560 018a 1BB1 cbz r3, .L472 +2619:Src/main.c **** { + 8561 .loc 1 2619 39 discriminator 1 view .LVU2666 + 8562 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2 +2619:Src/main.c **** { + 8563 .loc 1 2619 26 discriminator 1 view .LVU2667 + 8564 018e 002B cmp r3, #0 + 8565 0190 40F08680 bne .L479 + 8566 .L472: +2628:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 8567 .loc 1 2628 3 is_stmt 1 view .LVU2668 + 8568 0194 0022 movs r2, #0 + 8569 0196 0221 movs r1, #2 + 8570 0198 5248 ldr r0, .L480+24 + 8571 019a FFF7FEFF bl HAL_GPIO_WritePin + 8572 .LVL793: +2629:Src/main.c **** } + 8573 .loc 1 2629 3 view .LVU2669 + 8574 019e 0022 movs r2, #0 + 8575 01a0 2021 movs r1, #32 + 8576 01a2 4E48 ldr r0, .L480+16 + 8577 01a4 FFF7FEFF bl HAL_GPIO_WritePin + 8578 .LVL794: + 8579 .L473: +2632:Src/main.c **** { + 8580 .loc 1 2632 2 view .LVU2670 +2632:Src/main.c **** { + 8581 .loc 1 2632 16 is_stmt 0 view .LVU2671 + 8582 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2 +2632:Src/main.c **** { + 8583 .loc 1 2632 5 view .LVU2672 + 8584 01aa 1BB9 cbnz r3, .L474 +2634:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 8585 .loc 1 2634 3 is_stmt 1 view .LVU2673 +2634:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 8586 .loc 1 2634 31 is_stmt 0 view .LVU2674 + 8587 01ac 4E4B ldr r3, .L480+28 + 8588 01ae 7B60 str r3, [r7, #4] @ float + ARM GAS /tmp/ccLSPxIe.s page 548 + + +2635:Src/main.c **** } + 8589 .loc 1 2635 3 is_stmt 1 view .LVU2675 +2635:Src/main.c **** } + 8590 .loc 1 2635 31 is_stmt 0 view .LVU2676 + 8591 01b0 4E4B ldr r3, .L480+32 + 8592 01b2 BB60 str r3, [r7, #8] @ float + 8593 .L474: +2638:Src/main.c **** { + 8594 .loc 1 2638 2 is_stmt 1 view .LVU2677 +2638:Src/main.c **** { + 8595 .loc 1 2638 16 is_stmt 0 view .LVU2678 + 8596 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2 +2638:Src/main.c **** { + 8597 .loc 1 2638 5 view .LVU2679 + 8598 01b6 1BB9 cbnz r3, .L456 +2640:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 8599 .loc 1 2640 3 is_stmt 1 view .LVU2680 +2640:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 8600 .loc 1 2640 31 is_stmt 0 view .LVU2681 + 8601 01b8 4B4B ldr r3, .L480+28 + 8602 01ba 7360 str r3, [r6, #4] @ float +2641:Src/main.c **** } + 8603 .loc 1 2641 3 is_stmt 1 view .LVU2682 +2641:Src/main.c **** } + 8604 .loc 1 2641 31 is_stmt 0 view .LVU2683 + 8605 01bc 4B4B ldr r3, .L480+32 + 8606 01be B360 str r3, [r6, #8] @ float + 8607 .L456: +2643:Src/main.c **** + 8608 .loc 1 2643 1 view .LVU2684 + 8609 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 8610 .LVL795: + 8611 .L477: +2494:Src/main.c **** { + 8612 .loc 1 2494 6 view .LVU2685 + 8613 01c4 4FF48071 mov r1, #256 + 8614 01c8 4648 ldr r0, .L480+24 + 8615 01ca FFF7FEFF bl HAL_GPIO_ReadPin + 8616 .LVL796: +2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 8617 .loc 1 2493 78 discriminator 1 view .LVU2686 + 8618 01ce 0128 cmp r0, #1 + 8619 01d0 7FF426AF bne .L457 +2496:Src/main.c **** if (test == 0) //0 - suc + 8620 .loc 1 2496 3 is_stmt 1 view .LVU2687 +2496:Src/main.c **** if (test == 0) //0 - suc + 8621 .loc 1 2496 10 is_stmt 0 view .LVU2688 + 8622 01d4 4648 ldr r0, .L480+36 + 8623 01d6 FFF7FEFF bl Mount_SD + 8624 .LVL797: +2496:Src/main.c **** if (test == 0) //0 - suc + 8625 .loc 1 2496 8 discriminator 1 view .LVU2689 + 8626 01da 3C4B ldr r3, .L480 + 8627 01dc 1860 str r0, [r3] +2497:Src/main.c **** { + 8628 .loc 1 2497 3 is_stmt 1 view .LVU2690 +2497:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 549 + + + 8629 .loc 1 2497 6 is_stmt 0 view .LVU2691 + 8630 01de 0028 cmp r0, #0 + 8631 01e0 7FF41EAF bne .L457 +2500:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 8632 .loc 1 2500 4 is_stmt 1 view .LVU2692 +2500:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 8633 .loc 1 2500 11 is_stmt 0 view .LVU2693 + 8634 01e4 DFF80C91 ldr r9, .L480+40 + 8635 01e8 4846 mov r0, r9 + 8636 01ea FFF7FEFF bl Remove_File + 8637 .LVL798: +2500:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 8638 .loc 1 2500 9 discriminator 1 view .LVU2694 + 8639 01ee DFF8DC80 ldr r8, .L480 + 8640 01f2 C8F80000 str r0, [r8] +2501:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8641 .loc 1 2501 4 is_stmt 1 view .LVU2695 +2501:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8642 .loc 1 2501 11 is_stmt 0 view .LVU2696 + 8643 01f6 4846 mov r0, r9 + 8644 01f8 FFF7FEFF bl Create_File + 8645 .LVL799: +2501:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8646 .loc 1 2501 9 discriminator 1 view .LVU2697 + 8647 01fc C8F80000 str r0, [r8] +2502:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8648 .loc 1 2502 4 is_stmt 1 view .LVU2698 +2502:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8649 .loc 1 2502 11 is_stmt 0 view .LVU2699 + 8650 0200 1E22 movs r2, #30 + 8651 0202 2946 mov r1, r5 + 8652 0204 4846 mov r0, r9 + 8653 0206 FFF7FEFF bl Write_File_byte + 8654 .LVL800: +2502:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 8655 .loc 1 2502 9 discriminator 1 view .LVU2700 + 8656 020a C8F80000 str r0, [r8] +2503:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8657 .loc 1 2503 4 is_stmt 1 view .LVU2701 +2503:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8658 .loc 1 2503 11 is_stmt 0 view .LVU2702 + 8659 020e 1E22 movs r2, #30 + 8660 0210 2946 mov r1, r5 + 8661 0212 4846 mov r0, r9 + 8662 0214 FFF7FEFF bl Update_File_byte + 8663 .LVL801: +2503:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 8664 .loc 1 2503 9 discriminator 1 view .LVU2703 + 8665 0218 C8F80000 str r0, [r8] +2504:Src/main.c **** } + 8666 .loc 1 2504 4 is_stmt 1 view .LVU2704 +2504:Src/main.c **** } + 8667 .loc 1 2504 11 is_stmt 0 view .LVU2705 + 8668 021c 3448 ldr r0, .L480+36 + 8669 021e FFF7FEFF bl Unmount_SD + 8670 .LVL802: +2504:Src/main.c **** } + ARM GAS /tmp/ccLSPxIe.s page 550 + + + 8671 .loc 1 2504 9 discriminator 1 view .LVU2706 + 8672 0222 C8F80000 str r0, [r8] + 8673 0226 FBE6 b .L457 + 8674 .LVL803: + 8675 .L458: +2554:Src/main.c **** } + 8676 .loc 1 2554 3 is_stmt 1 view .LVU2707 + 8677 0228 0022 movs r2, #0 + 8678 022a 0821 movs r1, #8 + 8679 022c 2B48 ldr r0, .L480+16 + 8680 022e FFF7FEFF bl HAL_GPIO_WritePin + 8681 .LVL804: + 8682 0232 69E7 b .L459 + 8683 .L460: +2563:Src/main.c **** } + 8684 .loc 1 2563 3 view .LVU2708 + 8685 0234 0022 movs r2, #0 + 8686 0236 8021 movs r1, #128 + 8687 0238 2848 ldr r0, .L480+16 + 8688 023a FFF7FEFF bl HAL_GPIO_WritePin + 8689 .LVL805: + 8690 023e 6CE7 b .L461 + 8691 .L462: +2573:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC + 8692 .loc 1 2573 3 view .LVU2709 + 8693 0240 0022 movs r2, #0 + 8694 0242 4FF48071 mov r1, #256 + 8695 0246 2248 ldr r0, .L480+4 + 8696 0248 FFF7FEFF bl HAL_GPIO_WritePin + 8697 .LVL806: + 8698 024c 6FE7 b .L463 + 8699 .L464: +2584:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC + 8700 .loc 1 2584 3 view .LVU2710 + 8701 024e 0022 movs r2, #0 + 8702 0250 1021 movs r1, #16 + 8703 0252 2248 ldr r0, .L480+16 + 8704 0254 FFF7FEFF bl HAL_GPIO_WritePin + 8705 .LVL807: + 8706 0258 72E7 b .L465 + 8707 .L466: +2594:Src/main.c **** } + 8708 .loc 1 2594 3 view .LVU2711 + 8709 025a 0022 movs r2, #0 + 8710 025c 4FF48061 mov r1, #1024 + 8711 0260 1F48 ldr r0, .L480+20 + 8712 0262 FFF7FEFF bl HAL_GPIO_WritePin + 8713 .LVL808: + 8714 0266 75E7 b .L467 + 8715 .L468: +2603:Src/main.c **** } + 8716 .loc 1 2603 3 view .LVU2712 + 8717 0268 0022 movs r2, #0 + 8718 026a 0821 movs r1, #8 + 8719 026c 1D48 ldr r0, .L480+24 + 8720 026e FFF7FEFF bl HAL_GPIO_WritePin + 8721 .LVL809: + ARM GAS /tmp/ccLSPxIe.s page 551 + + + 8722 0272 78E7 b .L469 + 8723 .L478: +2608:Src/main.c **** Set_LTEC(3,32767); + 8724 .loc 1 2608 3 view .LVU2713 + 8725 0274 47F6FF71 movw r1, #32767 + 8726 0278 0320 movs r0, #3 + 8727 027a FFF7FEFF bl Set_LTEC + 8728 .LVL810: +2609:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); + 8729 .loc 1 2609 3 view .LVU2714 + 8730 027e 47F6FF71 movw r1, #32767 + 8731 0282 0320 movs r0, #3 + 8732 0284 FFF7FEFF bl Set_LTEC + 8733 .LVL811: +2610:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); + 8734 .loc 1 2610 3 view .LVU2715 + 8735 0288 0122 movs r2, #1 + 8736 028a 4FF40061 mov r1, #2048 + 8737 028e 1448 ldr r0, .L480+20 + 8738 0290 FFF7FEFF bl HAL_GPIO_WritePin + 8739 .LVL812: +2611:Src/main.c **** } + 8740 .loc 1 2611 3 view .LVU2716 + 8741 0294 0122 movs r2, #1 + 8742 0296 1146 mov r1, r2 + 8743 0298 1248 ldr r0, .L480+24 + 8744 029a FFF7FEFF bl HAL_GPIO_WritePin + 8745 .LVL813: + 8746 029e 73E7 b .L471 + 8747 .L479: +2621:Src/main.c **** Set_LTEC(4,32767); + 8748 .loc 1 2621 3 view .LVU2717 + 8749 02a0 47F6FF71 movw r1, #32767 + 8750 02a4 0420 movs r0, #4 + 8751 02a6 FFF7FEFF bl Set_LTEC + 8752 .LVL814: +2622:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); + 8753 .loc 1 2622 3 view .LVU2718 + 8754 02aa 47F6FF71 movw r1, #32767 + 8755 02ae 0420 movs r0, #4 + 8756 02b0 FFF7FEFF bl Set_LTEC + 8757 .LVL815: +2623:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); + 8758 .loc 1 2623 3 view .LVU2719 + 8759 02b4 0122 movs r2, #1 + 8760 02b6 2021 movs r1, #32 + 8761 02b8 0848 ldr r0, .L480+16 + 8762 02ba FFF7FEFF bl HAL_GPIO_WritePin + 8763 .LVL816: +2624:Src/main.c **** } + 8764 .loc 1 2624 3 view .LVU2720 + 8765 02be 0122 movs r2, #1 + 8766 02c0 0221 movs r1, #2 + 8767 02c2 0848 ldr r0, .L480+24 + 8768 02c4 FFF7FEFF bl HAL_GPIO_WritePin + 8769 .LVL817: + 8770 02c8 6EE7 b .L473 + ARM GAS /tmp/ccLSPxIe.s page 552 + + + 8771 .L481: + 8772 02ca 00BF .align 2 + 8773 .L480: + 8774 02cc 00000000 .word test + 8775 02d0 000C0240 .word 1073875968 + 8776 02d4 0000803B .word 998244352 + 8777 02d8 00000000 .word Long_Data + 8778 02dc 00080240 .word 1073874944 + 8779 02e0 00040240 .word 1073873920 + 8780 02e4 00000240 .word 1073872896 + 8781 02e8 00002041 .word 1092616192 + 8782 02ec 0AD7233C .word 1008981770 + 8783 02f0 00000000 .word .LC0 + 8784 02f4 04000000 .word .LC1 + 8785 .cfi_endproc + 8786 .LFE1209: + 8788 .section .text.Advanced_Controller_Temp,"ax",%progbits + 8789 .align 1 + 8790 .global Advanced_Controller_Temp + 8791 .syntax unified + 8792 .thumb + 8793 .thumb_func + 8795 Advanced_Controller_Temp: + 8796 .LVL818: + 8797 .LFB1238: +3673:Src/main.c **** // Main idea: + 8798 .loc 1 3673 1 view -0 + 8799 .cfi_startproc + 8800 @ args = 0, pretend = 0, frame = 0 + 8801 @ frame_needed = 0, uses_anonymous_args = 0 + 8802 @ link register save eliminated. +3673:Src/main.c **** // Main idea: + 8803 .loc 1 3673 1 is_stmt 0 view .LVU2722 + 8804 0000 30B4 push {r4, r5} + 8805 .LCFI75: + 8806 .cfi_def_cfa_offset 8 + 8807 .cfi_offset 4, -8 + 8808 .cfi_offset 5, -4 +3691:Src/main.c **** float P_coef_current;//, I_coef_current; + 8809 .loc 1 3691 2 is_stmt 1 view .LVU2723 +3692:Src/main.c **** float e_integral; + 8810 .loc 1 3692 2 view .LVU2724 +3693:Src/main.c **** int x_output; + 8811 .loc 1 3693 2 view .LVU2725 +3694:Src/main.c **** + 8812 .loc 1 3694 2 view .LVU2726 +3696:Src/main.c **** + 8813 .loc 1 3696 2 view .LVU2727 +3696:Src/main.c **** + 8814 .loc 1 3696 28 is_stmt 0 view .LVU2728 + 8815 0002 0B88 ldrh r3, [r1] +3696:Src/main.c **** + 8816 .loc 1 3696 65 view .LVU2729 + 8817 0004 0488 ldrh r4, [r0] +3696:Src/main.c **** + 8818 .loc 1 3696 8 view .LVU2730 + 8819 0006 1B1B subs r3, r3, r4 + ARM GAS /tmp/ccLSPxIe.s page 553 + + + 8820 .LVL819: +3698:Src/main.c **** + 8821 .loc 1 3698 2 is_stmt 1 view .LVU2731 +3698:Src/main.c **** + 8822 .loc 1 3698 13 is_stmt 0 view .LVU2732 + 8823 0008 D1ED017A vldr.32 s15, [r1, #4] + 8824 .LVL820: +3700:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 8825 .loc 1 3700 2 is_stmt 1 view .LVU2733 +3700:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 8826 .loc 1 3700 20 is_stmt 0 view .LVU2734 + 8827 000c 03F6B73C addw ip, r3, #2999 +3700:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 8828 .loc 1 3700 4 view .LVU2735 + 8829 0010 41F26E74 movw r4, #5998 + 8830 0014 A445 cmp ip, r4 + 8831 0016 18D8 bhi .L483 +3701:Src/main.c **** } + 8832 .loc 1 3701 3 is_stmt 1 view .LVU2736 +3701:Src/main.c **** } + 8833 .loc 1 3701 31 is_stmt 0 view .LVU2737 + 8834 0018 90ED027A vldr.32 s14, [r0, #8] +3701:Src/main.c **** } + 8835 .loc 1 3701 47 view .LVU2738 + 8836 001c 06EE903A vmov s13, r3 @ int + 8837 0020 F8EEE66A vcvt.f32.s32 s13, s13 +3701:Src/main.c **** } + 8838 .loc 1 3701 45 view .LVU2739 + 8839 0024 27EE267A vmul.f32 s14, s14, s13 +3701:Src/main.c **** } + 8840 .loc 1 3701 76 view .LVU2740 + 8841 0028 284C ldr r4, .L493 + 8842 002a 2468 ldr r4, [r4] + 8843 002c 284D ldr r5, .L493+4 + 8844 002e 2D68 ldr r5, [r5] + 8845 0030 641B subs r4, r4, r5 +3701:Src/main.c **** } + 8846 .loc 1 3701 64 view .LVU2741 + 8847 0032 06EE904A vmov s13, r4 @ int + 8848 0036 F8EE666A vcvt.f32.u32 s13, s13 +3701:Src/main.c **** } + 8849 .loc 1 3701 62 view .LVU2742 + 8850 003a 27EE267A vmul.f32 s14, s14, s13 +3701:Src/main.c **** } + 8851 .loc 1 3701 87 view .LVU2743 + 8852 003e 9FED256A vldr.32 s12, .L493+8 + 8853 0042 C7EE066A vdiv.f32 s13, s14, s12 +3701:Src/main.c **** } + 8854 .loc 1 3701 14 view .LVU2744 + 8855 0046 77EEA67A vadd.f32 s15, s15, s13 + 8856 .LVL821: + 8857 .L483: +3703:Src/main.c **** + 8858 .loc 1 3703 2 is_stmt 1 view .LVU2745 +3703:Src/main.c **** + 8859 .loc 1 3703 17 is_stmt 0 view .LVU2746 + 8860 004a D0ED016A vldr.32 s13, [r0, #4] + ARM GAS /tmp/ccLSPxIe.s page 554 + + + 8861 .LVL822: +3705:Src/main.c **** e_integral = 32000; + 8862 .loc 1 3705 2 is_stmt 1 view .LVU2747 +3705:Src/main.c **** e_integral = 32000; + 8863 .loc 1 3705 5 is_stmt 0 view .LVU2748 + 8864 004e 9FED227A vldr.32 s14, .L493+12 + 8865 0052 F4EEC77A vcmpe.f32 s15, s14 + 8866 0056 F1EE10FA vmrs APSR_nzcv, FPSCR + 8867 005a 09DC bgt .L487 +3708:Src/main.c **** e_integral = -32000; + 8868 .loc 1 3708 7 is_stmt 1 view .LVU2749 +3708:Src/main.c **** e_integral = -32000; + 8869 .loc 1 3708 10 is_stmt 0 view .LVU2750 + 8870 005c 9FED1F7A vldr.32 s14, .L493+16 + 8871 0060 F4EEC77A vcmpe.f32 s15, s14 + 8872 0064 F1EE10FA vmrs APSR_nzcv, FPSCR + 8873 0068 04D5 bpl .L484 +3709:Src/main.c **** } + 8874 .loc 1 3709 15 view .LVU2751 + 8875 006a DFED1C7A vldr.32 s15, .L493+16 + 8876 .LVL823: +3709:Src/main.c **** } + 8877 .loc 1 3709 15 view .LVU2752 + 8878 006e 01E0 b .L484 + 8879 .LVL824: + 8880 .L487: +3706:Src/main.c **** } + 8881 .loc 1 3706 15 view .LVU2753 + 8882 0070 DFED197A vldr.32 s15, .L493+12 + 8883 .LVL825: + 8884 .L484: +3711:Src/main.c **** + 8885 .loc 1 3711 2 is_stmt 1 view .LVU2754 +3711:Src/main.c **** + 8886 .loc 1 3711 26 is_stmt 0 view .LVU2755 + 8887 0074 C1ED017A vstr.32 s15, [r1, #4] +3713:Src/main.c **** + 8888 .loc 1 3713 2 is_stmt 1 view .LVU2756 +3713:Src/main.c **** + 8889 .loc 1 3713 36 is_stmt 0 view .LVU2757 + 8890 0078 07EE103A vmov s14, r3 @ int + 8891 007c B8EEC77A vcvt.f32.s32 s14, s14 + 8892 0080 27EE267A vmul.f32 s14, s14, s13 +3713:Src/main.c **** + 8893 .loc 1 3713 19 view .LVU2758 + 8894 0084 DFED166A vldr.32 s13, .L493+20 + 8895 .LVL826: +3713:Src/main.c **** + 8896 .loc 1 3713 19 view .LVU2759 + 8897 0088 37EE267A vadd.f32 s14, s14, s13 +3713:Src/main.c **** + 8898 .loc 1 3713 46 view .LVU2760 + 8899 008c FDEEE77A vcvt.s32.f32 s15, s15 + 8900 .LVL827: +3713:Src/main.c **** + 8901 .loc 1 3713 44 view .LVU2761 + 8902 0090 F8EEE77A vcvt.f32.s32 s15, s15 + ARM GAS /tmp/ccLSPxIe.s page 555 + + + 8903 0094 77EE877A vadd.f32 s15, s15, s14 +3713:Src/main.c **** + 8904 .loc 1 3713 11 view .LVU2762 + 8905 0098 FDEEE77A vcvt.s32.f32 s15, s15 + 8906 009c 17EE900A vmov r0, s15 @ int + 8907 .LVL828: +3715:Src/main.c **** x_output = 8800; + 8908 .loc 1 3715 2 is_stmt 1 view .LVU2763 +3715:Src/main.c **** x_output = 8800; + 8909 .loc 1 3715 4 is_stmt 0 view .LVU2764 + 8910 00a0 B0F57A7F cmp r0, #1000 + 8911 00a4 06DB blt .L489 +3718:Src/main.c **** x_output = 56800; + 8912 .loc 1 3718 7 is_stmt 1 view .LVU2765 +3718:Src/main.c **** x_output = 56800; + 8913 .loc 1 3718 9 is_stmt 0 view .LVU2766 + 8914 00a6 4DF6E053 movw r3, #56800 + 8915 .LVL829: +3718:Src/main.c **** x_output = 56800; + 8916 .loc 1 3718 9 view .LVU2767 + 8917 00aa 9842 cmp r0, r3 + 8918 00ac 04DD ble .L485 +3719:Src/main.c **** } + 8919 .loc 1 3719 12 view .LVU2768 + 8920 00ae 4DF6E050 movw r0, #56800 + 8921 .LVL830: +3719:Src/main.c **** } + 8922 .loc 1 3719 12 view .LVU2769 + 8923 00b2 01E0 b .L485 + 8924 .LVL831: + 8925 .L489: +3716:Src/main.c **** } + 8926 .loc 1 3716 12 view .LVU2770 + 8927 00b4 42F26020 movw r0, #8800 + 8928 .LVL832: + 8929 .L485: +3722:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 8930 .loc 1 3722 2 is_stmt 1 view .LVU2771 +3722:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 8931 .loc 1 3722 5 is_stmt 0 view .LVU2772 + 8932 00b8 022A cmp r2, #2 + 8933 00ba 02D0 beq .L492 + 8934 .LVL833: + 8935 .L486: +3725:Src/main.c **** } + 8936 .loc 1 3725 2 is_stmt 1 view .LVU2773 +3726:Src/main.c **** + 8937 .loc 1 3726 1 is_stmt 0 view .LVU2774 + 8938 00bc 80B2 uxth r0, r0 + 8939 .LVL834: +3726:Src/main.c **** + 8940 .loc 1 3726 1 view .LVU2775 + 8941 00be 30BC pop {r4, r5} + 8942 .LCFI76: + 8943 .cfi_remember_state + 8944 .cfi_restore 5 + 8945 .cfi_restore 4 + ARM GAS /tmp/ccLSPxIe.s page 556 + + + 8946 .cfi_def_cfa_offset 0 + 8947 00c0 7047 bx lr + 8948 .LVL835: + 8949 .L492: + 8950 .LCFI77: + 8951 .cfi_restore_state +3723:Src/main.c **** + 8952 .loc 1 3723 3 is_stmt 1 view .LVU2776 +3723:Src/main.c **** + 8953 .loc 1 3723 11 is_stmt 0 view .LVU2777 + 8954 00c2 024B ldr r3, .L493 + 8955 00c4 1A68 ldr r2, [r3] + 8956 .LVL836: +3723:Src/main.c **** + 8957 .loc 1 3723 11 view .LVU2778 + 8958 00c6 024B ldr r3, .L493+4 + 8959 00c8 1A60 str r2, [r3] + 8960 00ca F7E7 b .L486 + 8961 .L494: + 8962 .align 2 + 8963 .L493: + 8964 00cc 00000000 .word TO7 + 8965 00d0 00000000 .word TO7_PID + 8966 00d4 0000C842 .word 1120403456 + 8967 00d8 0000FA46 .word 1190789120 + 8968 00dc 0000FAC6 .word -956694528 + 8969 00e0 00000047 .word 1191182336 + 8970 .cfi_endproc + 8971 .LFE1238: + 8973 .section .text.CalculateChecksum,"ax",%progbits + 8974 .align 1 + 8975 .global CalculateChecksum + 8976 .syntax unified + 8977 .thumb + 8978 .thumb_func + 8980 CalculateChecksum: + 8981 .LVL837: + 8982 .LFB1241: +3789:Src/main.c **** short i; + 8983 .loc 1 3789 1 is_stmt 1 view -0 + 8984 .cfi_startproc + 8985 @ args = 0, pretend = 0, frame = 0 + 8986 @ frame_needed = 0, uses_anonymous_args = 0 + 8987 @ link register save eliminated. +3789:Src/main.c **** short i; + 8988 .loc 1 3789 1 is_stmt 0 view .LVU2780 + 8989 0000 8446 mov ip, r0 +3790:Src/main.c **** uint16_t cs = *pbuff; + 8990 .loc 1 3790 2 is_stmt 1 view .LVU2781 +3791:Src/main.c **** + 8991 .loc 1 3791 2 view .LVU2782 +3791:Src/main.c **** + 8992 .loc 1 3791 11 is_stmt 0 view .LVU2783 + 8993 0002 0088 ldrh r0, [r0] + 8994 .LVL838: +3793:Src/main.c **** { + 8995 .loc 1 3793 3 is_stmt 1 view .LVU2784 + ARM GAS /tmp/ccLSPxIe.s page 557 + + +3793:Src/main.c **** { + 8996 .loc 1 3793 9 is_stmt 0 view .LVU2785 + 8997 0004 0123 movs r3, #1 +3793:Src/main.c **** { + 8998 .loc 1 3793 3 view .LVU2786 + 8999 0006 04E0 b .L496 + 9000 .LVL839: + 9001 .L497: +3795:Src/main.c **** } + 9002 .loc 1 3795 3 is_stmt 1 view .LVU2787 +3795:Src/main.c **** } + 9003 .loc 1 3795 9 is_stmt 0 view .LVU2788 + 9004 0008 3CF81320 ldrh r2, [ip, r3, lsl #1] +3795:Src/main.c **** } + 9005 .loc 1 3795 6 view .LVU2789 + 9006 000c 5040 eors r0, r0, r2 + 9007 .LVL840: +3793:Src/main.c **** { + 9008 .loc 1 3793 24 is_stmt 1 discriminator 3 view .LVU2790 + 9009 000e 0133 adds r3, r3, #1 + 9010 .LVL841: +3793:Src/main.c **** { + 9011 .loc 1 3793 24 is_stmt 0 discriminator 3 view .LVU2791 + 9012 0010 1BB2 sxth r3, r3 + 9013 .LVL842: + 9014 .L496: +3793:Src/main.c **** { + 9015 .loc 1 3793 16 is_stmt 1 discriminator 1 view .LVU2792 + 9016 0012 8B42 cmp r3, r1 + 9017 0014 F8DB blt .L497 +3797:Src/main.c **** } + 9018 .loc 1 3797 2 view .LVU2793 +3798:Src/main.c **** + 9019 .loc 1 3798 1 is_stmt 0 view .LVU2794 + 9020 0016 7047 bx lr + 9021 .cfi_endproc + 9022 .LFE1241: + 9024 .section .text.CheckChecksum,"ax",%progbits + 9025 .align 1 + 9026 .global CheckChecksum + 9027 .syntax unified + 9028 .thumb + 9029 .thumb_func + 9031 CheckChecksum: + 9032 .LVL843: + 9033 .LFB1240: +3768:Src/main.c **** uint16_t cl_ind; + 9034 .loc 1 3768 1 is_stmt 1 view -0 + 9035 .cfi_startproc + 9036 @ args = 0, pretend = 0, frame = 0 + 9037 @ frame_needed = 0, uses_anonymous_args = 0 +3768:Src/main.c **** uint16_t cl_ind; + 9038 .loc 1 3768 1 is_stmt 0 view .LVU2796 + 9039 0000 10B5 push {r4, lr} + 9040 .LCFI78: + 9041 .cfi_def_cfa_offset 8 + 9042 .cfi_offset 4, -8 + ARM GAS /tmp/ccLSPxIe.s page 558 + + + 9043 .cfi_offset 14, -4 +3769:Src/main.c **** + 9044 .loc 1 3769 3 is_stmt 1 view .LVU2797 +3771:Src/main.c **** { + 9045 .loc 1 3771 3 view .LVU2798 + 9046 0002 0E4B ldr r3, .L504 + 9047 0004 1B88 ldrh r3, [r3] + 9048 0006 41F21112 movw r2, #4369 + 9049 000a 9342 cmp r3, r2 + 9050 000c 05D0 beq .L501 + 9051 000e 47F27772 movw r2, #30583 + 9052 0012 9342 cmp r3, r2 + 9053 0014 0FD1 bne .L502 + 9054 0016 0E24 movs r4, #14 + 9055 0018 00E0 b .L499 + 9056 .L501: +3777:Src/main.c **** break; + 9057 .loc 1 3777 14 is_stmt 0 view .LVU2799 + 9058 001a 0D24 movs r4, #13 + 9059 .L499: + 9060 .LVL844: +3781:Src/main.c **** } + 9061 .loc 1 3781 5 is_stmt 1 view .LVU2800 +3784:Src/main.c **** + 9062 .loc 1 3784 3 view .LVU2801 +3784:Src/main.c **** + 9063 .loc 1 3784 15 is_stmt 0 view .LVU2802 + 9064 001c 2146 mov r1, r4 + 9065 001e FFF7FEFF bl CalculateChecksum + 9066 .LVL845: +3784:Src/main.c **** + 9067 .loc 1 3784 13 discriminator 1 view .LVU2803 + 9068 0022 074B ldr r3, .L504+4 + 9069 0024 1880 strh r0, [r3] @ movhi +3786:Src/main.c **** } + 9070 .loc 1 3786 3 is_stmt 1 view .LVU2804 +3786:Src/main.c **** } + 9071 .loc 1 3786 32 is_stmt 0 view .LVU2805 + 9072 0026 074B ldr r3, .L504+8 + 9073 0028 33F81430 ldrh r3, [r3, r4, lsl #1] +3786:Src/main.c **** } + 9074 .loc 1 3786 46 view .LVU2806 + 9075 002c 9842 cmp r0, r3 + 9076 002e 14BF ite ne + 9077 0030 0020 movne r0, #0 + 9078 0032 0120 moveq r0, #1 + 9079 .LVL846: + 9080 .L500: +3787:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) + 9081 .loc 1 3787 1 view .LVU2807 + 9082 0034 10BD pop {r4, pc} + 9083 .LVL847: + 9084 .L502: +3771:Src/main.c **** { + 9085 .loc 1 3771 3 view .LVU2808 + 9086 0036 0020 movs r0, #0 + 9087 .LVL848: + ARM GAS /tmp/ccLSPxIe.s page 559 + + +3771:Src/main.c **** { + 9088 .loc 1 3771 3 view .LVU2809 + 9089 0038 FCE7 b .L500 + 9090 .L505: + 9091 003a 00BF .align 2 + 9092 .L504: + 9093 003c 00000000 .word UART_header + 9094 0040 00000000 .word CS_result + 9095 0044 00000000 .word COMMAND + 9096 .cfi_endproc + 9097 .LFE1240: + 9099 .section .rodata.SD_SAVE.str1.4,"aMS",%progbits,1 + 9100 .align 2 + 9101 .LC2: + 9102 0000 46494C45 .ascii "FILE1.TXT\000" + 9102 312E5458 + 9102 5400 + 9103 .section .text.SD_SAVE,"ax",%progbits + 9104 .align 1 + 9105 .global SD_SAVE + 9106 .syntax unified + 9107 .thumb + 9108 .thumb_func + 9110 SD_SAVE: + 9111 .LVL849: + 9112 .LFB1242: +3827:Src/main.c **** int test=0; + 9113 .loc 1 3827 1 is_stmt 1 view -0 + 9114 .cfi_startproc + 9115 @ args = 0, pretend = 0, frame = 0 + 9116 @ frame_needed = 0, uses_anonymous_args = 0 +3827:Src/main.c **** int test=0; + 9117 .loc 1 3827 1 is_stmt 0 view .LVU2811 + 9118 0000 10B5 push {r4, lr} + 9119 .LCFI79: + 9120 .cfi_def_cfa_offset 8 + 9121 .cfi_offset 4, -8 + 9122 .cfi_offset 14, -4 + 9123 0002 0446 mov r4, r0 +3828:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 9124 .loc 1 3828 2 is_stmt 1 view .LVU2812 + 9125 .LVL850: +3829:Src/main.c **** { + 9126 .loc 1 3829 2 view .LVU2813 +3829:Src/main.c **** { + 9127 .loc 1 3829 6 is_stmt 0 view .LVU2814 + 9128 0004 0121 movs r1, #1 + 9129 0006 0A48 ldr r0, .L513 + 9130 .LVL851: +3829:Src/main.c **** { + 9131 .loc 1 3829 6 view .LVU2815 + 9132 0008 FFF7FEFF bl HAL_GPIO_ReadPin + 9133 .LVL852: +3829:Src/main.c **** { + 9134 .loc 1 3829 5 discriminator 1 view .LVU2816 + 9135 000c 08B1 cbz r0, .L511 +3846:Src/main.c **** } + ARM GAS /tmp/ccLSPxIe.s page 560 + + + 9136 .loc 1 3846 10 view .LVU2817 + 9137 000e 0120 movs r0, #1 + 9138 .LVL853: + 9139 .L506: +3848:Src/main.c **** + 9140 .loc 1 3848 1 view .LVU2818 + 9141 0010 10BD pop {r4, pc} + 9142 .LVL854: + 9143 .L511: +3831:Src/main.c **** if (test == 0) //0 - suc + 9144 .loc 1 3831 3 is_stmt 1 view .LVU2819 +3831:Src/main.c **** if (test == 0) //0 - suc + 9145 .loc 1 3831 10 is_stmt 0 view .LVU2820 + 9146 0012 0848 ldr r0, .L513+4 + 9147 0014 FFF7FEFF bl Mount_SD + 9148 .LVL855: +3832:Src/main.c **** { + 9149 .loc 1 3832 3 is_stmt 1 view .LVU2821 +3832:Src/main.c **** { + 9150 .loc 1 3832 6 is_stmt 0 view .LVU2822 + 9151 0018 08B1 cbz r0, .L512 +3841:Src/main.c **** } + 9152 .loc 1 3841 11 view .LVU2823 + 9153 001a 0120 movs r0, #1 + 9154 .LVL856: +3841:Src/main.c **** } + 9155 .loc 1 3841 11 view .LVU2824 + 9156 001c F8E7 b .L506 + 9157 .LVL857: + 9158 .L512: +3835:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 9159 .loc 1 3835 4 is_stmt 1 view .LVU2825 +3835:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 9160 .loc 1 3835 11 is_stmt 0 view .LVU2826 + 9161 001e 1E22 movs r2, #30 + 9162 0020 2146 mov r1, r4 + 9163 0022 0548 ldr r0, .L513+8 + 9164 .LVL858: +3835:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 9165 .loc 1 3835 11 view .LVU2827 + 9166 0024 FFF7FEFF bl Update_File_byte + 9167 .LVL859: +3836:Src/main.c **** return test; + 9168 .loc 1 3836 4 is_stmt 1 view .LVU2828 +3836:Src/main.c **** return test; + 9169 .loc 1 3836 11 is_stmt 0 view .LVU2829 + 9170 0028 0248 ldr r0, .L513+4 + 9171 002a FFF7FEFF bl Unmount_SD + 9172 .LVL860: +3837:Src/main.c **** } + 9173 .loc 1 3837 4 is_stmt 1 view .LVU2830 +3837:Src/main.c **** } + 9174 .loc 1 3837 11 is_stmt 0 view .LVU2831 + 9175 002e EFE7 b .L506 + 9176 .L514: + 9177 .align 2 + 9178 .L513: + ARM GAS /tmp/ccLSPxIe.s page 561 + + + 9179 0030 000C0240 .word 1073875968 + 9180 0034 00000000 .word .LC0 + 9181 0038 00000000 .word .LC2 + 9182 .cfi_endproc + 9183 .LFE1242: + 9185 .section .text.SD_READ,"ax",%progbits + 9186 .align 1 + 9187 .global SD_READ + 9188 .syntax unified + 9189 .thumb + 9190 .thumb_func + 9192 SD_READ: + 9193 .LVL861: + 9194 .LFB1243: +3858:Src/main.c **** int test=0; + 9195 .loc 1 3858 1 is_stmt 1 view -0 + 9196 .cfi_startproc + 9197 @ args = 0, pretend = 0, frame = 0 + 9198 @ frame_needed = 0, uses_anonymous_args = 0 +3858:Src/main.c **** int test=0; + 9199 .loc 1 3858 1 is_stmt 0 view .LVU2833 + 9200 0000 38B5 push {r3, r4, r5, lr} + 9201 .LCFI80: + 9202 .cfi_def_cfa_offset 16 + 9203 .cfi_offset 3, -16 + 9204 .cfi_offset 4, -12 + 9205 .cfi_offset 5, -8 + 9206 .cfi_offset 14, -4 + 9207 0002 0446 mov r4, r0 +3859:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 9208 .loc 1 3859 2 is_stmt 1 view .LVU2834 + 9209 .LVL862: +3860:Src/main.c **** { + 9210 .loc 1 3860 2 view .LVU2835 +3860:Src/main.c **** { + 9211 .loc 1 3860 6 is_stmt 0 view .LVU2836 + 9212 0004 0121 movs r1, #1 + 9213 0006 0D48 ldr r0, .L522 + 9214 .LVL863: +3860:Src/main.c **** { + 9215 .loc 1 3860 6 view .LVU2837 + 9216 0008 FFF7FEFF bl HAL_GPIO_ReadPin + 9217 .LVL864: +3860:Src/main.c **** { + 9218 .loc 1 3860 5 discriminator 1 view .LVU2838 + 9219 000c 08B1 cbz r0, .L520 +3878:Src/main.c **** } + 9220 .loc 1 3878 10 view .LVU2839 + 9221 000e 0120 movs r0, #1 + 9222 .LVL865: + 9223 .L515: +3894:Src/main.c **** + 9224 .loc 1 3894 1 view .LVU2840 + 9225 0010 38BD pop {r3, r4, r5, pc} + 9226 .LVL866: + 9227 .L520: +3862:Src/main.c **** if (test == 0) //0 - suc + ARM GAS /tmp/ccLSPxIe.s page 562 + + + 9228 .loc 1 3862 3 is_stmt 1 view .LVU2841 +3862:Src/main.c **** if (test == 0) //0 - suc + 9229 .loc 1 3862 10 is_stmt 0 view .LVU2842 + 9230 0012 0B48 ldr r0, .L522+4 + 9231 0014 FFF7FEFF bl Mount_SD + 9232 .LVL867: +3863:Src/main.c **** { + 9233 .loc 1 3863 3 is_stmt 1 view .LVU2843 +3863:Src/main.c **** { + 9234 .loc 1 3863 6 is_stmt 0 view .LVU2844 + 9235 0018 08B1 cbz r0, .L521 +3873:Src/main.c **** } + 9236 .loc 1 3873 11 view .LVU2845 + 9237 001a 0120 movs r0, #1 + 9238 .LVL868: +3873:Src/main.c **** } + 9239 .loc 1 3873 11 view .LVU2846 + 9240 001c F8E7 b .L515 + 9241 .LVL869: + 9242 .L521: +3866:Src/main.c **** fgoto+=DL_8; + 9243 .loc 1 3866 4 is_stmt 1 view .LVU2847 +3866:Src/main.c **** fgoto+=DL_8; + 9244 .loc 1 3866 11 is_stmt 0 view .LVU2848 + 9245 001e 094D ldr r5, .L522+8 + 9246 0020 2B68 ldr r3, [r5] + 9247 0022 1E22 movs r2, #30 + 9248 0024 2146 mov r1, r4 + 9249 0026 0848 ldr r0, .L522+12 + 9250 .LVL870: +3866:Src/main.c **** fgoto+=DL_8; + 9251 .loc 1 3866 11 view .LVU2849 + 9252 0028 FFF7FEFF bl Seek_Read_File + 9253 .LVL871: +3867:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 9254 .loc 1 3867 4 is_stmt 1 view .LVU2850 +3867:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 9255 .loc 1 3867 9 is_stmt 0 view .LVU2851 + 9256 002c 2B68 ldr r3, [r5] + 9257 002e 1E33 adds r3, r3, #30 + 9258 0030 2B60 str r3, [r5] +3868:Src/main.c **** return test; + 9259 .loc 1 3868 4 is_stmt 1 view .LVU2852 +3868:Src/main.c **** return test; + 9260 .loc 1 3868 11 is_stmt 0 view .LVU2853 + 9261 0032 0348 ldr r0, .L522+4 + 9262 0034 FFF7FEFF bl Unmount_SD + 9263 .LVL872: +3869:Src/main.c **** } + 9264 .loc 1 3869 4 is_stmt 1 view .LVU2854 +3869:Src/main.c **** } + 9265 .loc 1 3869 11 is_stmt 0 view .LVU2855 + 9266 0038 EAE7 b .L515 + 9267 .L523: + 9268 003a 00BF .align 2 + 9269 .L522: + 9270 003c 000C0240 .word 1073875968 + ARM GAS /tmp/ccLSPxIe.s page 563 + + + 9271 0040 00000000 .word .LC0 + 9272 0044 00000000 .word fgoto + 9273 0048 00000000 .word .LC2 + 9274 .cfi_endproc + 9275 .LFE1243: + 9277 .section .text.SD_REMOVE,"ax",%progbits + 9278 .align 1 + 9279 .global SD_REMOVE + 9280 .syntax unified + 9281 .thumb + 9282 .thumb_func + 9284 SD_REMOVE: + 9285 .LFB1244: +3897:Src/main.c **** int test=0; + 9286 .loc 1 3897 1 is_stmt 1 view -0 + 9287 .cfi_startproc + 9288 @ args = 0, pretend = 0, frame = 0 + 9289 @ frame_needed = 0, uses_anonymous_args = 0 + 9290 0000 10B5 push {r4, lr} + 9291 .LCFI81: + 9292 .cfi_def_cfa_offset 8 + 9293 .cfi_offset 4, -8 + 9294 .cfi_offset 14, -4 +3898:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 9295 .loc 1 3898 2 view .LVU2857 + 9296 .LVL873: +3899:Src/main.c **** { + 9297 .loc 1 3899 2 view .LVU2858 +3899:Src/main.c **** { + 9298 .loc 1 3899 6 is_stmt 0 view .LVU2859 + 9299 0002 0121 movs r1, #1 + 9300 0004 0B48 ldr r0, .L531 + 9301 0006 FFF7FEFF bl HAL_GPIO_ReadPin + 9302 .LVL874: +3899:Src/main.c **** { + 9303 .loc 1 3899 5 discriminator 1 view .LVU2860 + 9304 000a 08B1 cbz r0, .L529 +3917:Src/main.c **** } + 9305 .loc 1 3917 10 view .LVU2861 + 9306 000c 0120 movs r0, #1 + 9307 .LVL875: + 9308 .L524: +3919:Src/main.c **** + 9309 .loc 1 3919 1 view .LVU2862 + 9310 000e 10BD pop {r4, pc} + 9311 .LVL876: + 9312 .L529: +3901:Src/main.c **** if (test==FR_OK) + 9313 .loc 1 3901 3 is_stmt 1 view .LVU2863 +3901:Src/main.c **** if (test==FR_OK) + 9314 .loc 1 3901 10 is_stmt 0 view .LVU2864 + 9315 0010 0948 ldr r0, .L531+4 + 9316 0012 FFF7FEFF bl Mount_SD + 9317 .LVL877: +3902:Src/main.c **** { + 9318 .loc 1 3902 3 is_stmt 1 view .LVU2865 +3902:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 564 + + + 9319 .loc 1 3902 6 is_stmt 0 view .LVU2866 + 9320 0016 08B1 cbz r0, .L530 +3912:Src/main.c **** } + 9321 .loc 1 3912 11 view .LVU2867 + 9322 0018 0120 movs r0, #1 + 9323 .LVL878: +3912:Src/main.c **** } + 9324 .loc 1 3912 11 view .LVU2868 + 9325 001a F8E7 b .L524 + 9326 .LVL879: + 9327 .L530: +3904:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc + 9328 .loc 1 3904 4 is_stmt 1 view .LVU2869 +3904:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc + 9329 .loc 1 3904 11 is_stmt 0 view .LVU2870 + 9330 001c 074C ldr r4, .L531+8 + 9331 001e 2046 mov r0, r4 + 9332 .LVL880: +3904:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc + 9333 .loc 1 3904 11 view .LVU2871 + 9334 0020 FFF7FEFF bl Remove_File + 9335 .LVL881: +3905:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt + 9336 .loc 1 3905 4 is_stmt 1 view .LVU2872 +3905:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt + 9337 .loc 1 3905 11 is_stmt 0 view .LVU2873 + 9338 0024 2046 mov r0, r4 + 9339 0026 FFF7FEFF bl Create_File + 9340 .LVL882: +3907:Src/main.c **** return test; + 9341 .loc 1 3907 4 is_stmt 1 view .LVU2874 +3907:Src/main.c **** return test; + 9342 .loc 1 3907 11 is_stmt 0 view .LVU2875 + 9343 002a 0348 ldr r0, .L531+4 + 9344 002c FFF7FEFF bl Unmount_SD + 9345 .LVL883: +3908:Src/main.c **** } + 9346 .loc 1 3908 4 is_stmt 1 view .LVU2876 +3908:Src/main.c **** } + 9347 .loc 1 3908 11 is_stmt 0 view .LVU2877 + 9348 0030 EDE7 b .L524 + 9349 .L532: + 9350 0032 00BF .align 2 + 9351 .L531: + 9352 0034 000C0240 .word 1073875968 + 9353 0038 00000000 .word .LC0 + 9354 003c 00000000 .word .LC2 + 9355 .cfi_endproc + 9356 .LFE1244: + 9358 .section .text.USART_TX,"ax",%progbits + 9359 .align 1 + 9360 .global USART_TX + 9361 .syntax unified + 9362 .thumb + 9363 .thumb_func + 9365 USART_TX: + 9366 .LVL884: + ARM GAS /tmp/ccLSPxIe.s page 565 + + + 9367 .LFB1245: +3923:Src/main.c **** uint16_t ind = 0; + 9368 .loc 1 3923 1 is_stmt 1 view -0 + 9369 .cfi_startproc + 9370 @ args = 0, pretend = 0, frame = 0 + 9371 @ frame_needed = 0, uses_anonymous_args = 0 + 9372 @ link register save eliminated. +3923:Src/main.c **** uint16_t ind = 0; + 9373 .loc 1 3923 1 is_stmt 0 view .LVU2879 + 9374 0000 8C46 mov ip, r1 +3924:Src/main.c **** while (indRDR, USART_RDR_RDR)); 3672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccuHnxNu.s page 554 - - 3674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits) 3676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll TDR TDR LL_USART_TransmitData8 @@ -33189,7054 +34036,7493 @@ ARM GAS /tmp/ccuHnxNu.s page 1 3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value) - 8931 .loc 7 3681 22 view .LVU2775 - 8932 .LBB633: + 9414 .loc 7 3681 22 view .LVU2894 + 9415 .LBB638: 3682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USARTx->TDR = Value; - 8933 .loc 7 3683 3 view .LVU2776 - 8934 .loc 7 3683 15 is_stmt 0 view .LVU2777 - 8935 0018 034B ldr r3, .L488 - 8936 001a 9962 str r1, [r3, #40] - 8937 .LVL852: - 8938 .loc 7 3683 15 view .LVU2778 - 8939 .LBE633: - 8940 .LBE632: -3702:Src/main.c **** } - 8941 .loc 1 3702 5 is_stmt 1 view .LVU2779 -3702:Src/main.c **** } - 8942 .loc 1 3702 8 is_stmt 0 view .LVU2780 - 8943 001c 0132 adds r2, r2, #1 - 8944 .LVL853: -3702:Src/main.c **** } - 8945 .loc 1 3702 8 view .LVU2781 - 8946 001e 92B2 uxth r2, r2 - 8947 .LVL854: - 8948 .L484: -3698:Src/main.c **** { - 8949 .loc 1 3698 13 is_stmt 1 view .LVU2782 - 8950 0020 6245 cmp r2, ip - 8951 0022 F1D3 bcc .L486 -3704:Src/main.c **** - 8952 .loc 1 3704 1 is_stmt 0 view .LVU2783 - 8953 0024 7047 bx lr - 8954 .L489: - 8955 0026 00BF .align 2 - 8956 .L488: - 8957 0028 00100140 .word 1073811456 - 8958 .cfi_endproc - 8959 .LFE1237: - 8961 .section .text.USART_TX_DMA,"ax",%progbits - 8962 .align 1 - 8963 .global USART_TX_DMA - 8964 .syntax unified - 8965 .thumb - 8966 .thumb_func - 8968 USART_TX_DMA: - 8969 .LFB1238: -3707:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter - 8970 .loc 1 3707 1 is_stmt 1 view -0 - 8971 .cfi_startproc - 8972 @ args = 0, pretend = 0, frame = 0 - 8973 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccuHnxNu.s page 555 + 9416 .loc 7 3683 3 view .LVU2895 + 9417 .loc 7 3683 15 is_stmt 0 view .LVU2896 + 9418 0018 034B ldr r3, .L538 + 9419 001a 9962 str r1, [r3, #40] + 9420 .LVL890: + 9421 .loc 7 3683 15 view .LVU2897 + 9422 .LBE638: + 9423 .LBE637: +3929:Src/main.c **** } + 9424 .loc 1 3929 5 is_stmt 1 view .LVU2898 +3929:Src/main.c **** } + 9425 .loc 1 3929 8 is_stmt 0 view .LVU2899 + 9426 001c 0132 adds r2, r2, #1 + 9427 .LVL891: +3929:Src/main.c **** } + 9428 .loc 1 3929 8 view .LVU2900 + 9429 001e 92B2 uxth r2, r2 + 9430 .LVL892: + 9431 .L534: +3925:Src/main.c **** { + 9432 .loc 1 3925 13 is_stmt 1 view .LVU2901 + 9433 0020 6245 cmp r2, ip + 9434 0022 F1D3 bcc .L536 +3931:Src/main.c **** + 9435 .loc 1 3931 1 is_stmt 0 view .LVU2902 + 9436 0024 7047 bx lr + 9437 .L539: + 9438 0026 00BF .align 2 + 9439 .L538: + 9440 0028 00100140 .word 1073811456 + 9441 .cfi_endproc + 9442 .LFE1245: + 9444 .section .text.USART_TX_DMA,"ax",%progbits + 9445 .align 1 + 9446 .global USART_TX_DMA + 9447 .syntax unified + 9448 .thumb + 9449 .thumb_func + ARM GAS /tmp/ccLSPxIe.s page 569 - 8974 @ link register save eliminated. - 8975 .LVL855: - 8976 .L491: -3708:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); - 8977 .loc 1 3708 20 discriminator 1 view .LVU2785 -3708:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); - 8978 .loc 1 3708 9 discriminator 1 view .LVU2786 - 8979 0000 0D4B ldr r3, .L492 - 8980 0002 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 8981 0004 002B cmp r3, #0 - 8982 0006 FBD1 bne .L491 -3709:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz); - 8983 .loc 1 3709 2 view .LVU2787 - 8984 .LVL856: - 8985 .LBB634: - 8986 .LBI634: + 9451 USART_TX_DMA: + 9452 .LFB1246: +3934:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter + 9453 .loc 1 3934 1 is_stmt 1 view -0 + 9454 .cfi_startproc + 9455 @ args = 0, pretend = 0, frame = 0 + 9456 @ frame_needed = 0, uses_anonymous_args = 0 + 9457 @ link register save eliminated. + 9458 .LVL893: + 9459 .L541: +3935:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); + 9460 .loc 1 3935 20 discriminator 1 view .LVU2904 +3935:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); + 9461 .loc 1 3935 9 discriminator 1 view .LVU2905 + 9462 0000 0D4B ldr r3, .L542 + 9463 0002 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 9464 0004 002B cmp r3, #0 + 9465 0006 FBD1 bne .L541 +3936:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz); + 9466 .loc 1 3936 2 view .LVU2906 + 9467 .LVL894: + 9468 .LBB639: + 9469 .LBI639: 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 8987 .loc 6 517 22 view .LVU2788 - 8988 .LBB635: + 9470 .loc 6 517 22 view .LVU2907 + 9471 .LBB640: 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8989 .loc 6 519 3 view .LVU2789 - 8990 0008 0C4B ldr r3, .L492+4 - 8991 000a D3F8B820 ldr r2, [r3, #184] - 8992 000e 22F00102 bic r2, r2, #1 - 8993 0012 C3F8B820 str r2, [r3, #184] - 8994 .LVL857: + 9472 .loc 6 519 3 view .LVU2908 + 9473 0008 0C4B ldr r3, .L542+4 + 9474 000a D3F8B820 ldr r2, [r3, #184] + 9475 000e 22F00102 bic r2, r2, #1 + 9476 0012 C3F8B820 str r2, [r3, #184] + 9477 .LVL895: 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 8995 .loc 6 519 3 is_stmt 0 view .LVU2790 - 8996 .LBE635: - 8997 .LBE634: -3710:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7); - 8998 .loc 1 3710 3 is_stmt 1 view .LVU2791 - 8999 .LBB636: - 9000 .LBI636: + 9478 .loc 6 519 3 is_stmt 0 view .LVU2909 + 9479 .LBE640: + 9480 .LBE639: +3937:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7); + 9481 .loc 1 3937 3 is_stmt 1 view .LVU2910 + 9482 .LBB641: + 9483 .LBI641: 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9001 .loc 6 971 22 view .LVU2792 - 9002 .LBB637: + 9484 .loc 6 971 22 view .LVU2911 + 9485 .LBB642: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9003 .loc 6 973 3 view .LVU2793 - 9004 0016 D3F8BC20 ldr r2, [r3, #188] - 9005 001a 6FF30F02 bfc r2, #0, #16 - 9006 001e 1043 orrs r0, r0, r2 - 9007 .LVL858: + 9486 .loc 6 973 3 view .LVU2912 + 9487 0016 D3F8BC20 ldr r2, [r3, #188] + 9488 001a 6FF30F02 bfc r2, #0, #16 + 9489 001e 1043 orrs r0, r0, r2 + 9490 .LVL896: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9008 .loc 6 973 3 is_stmt 0 view .LVU2794 - 9009 0020 C3F8BC00 str r0, [r3, #188] - 9010 .LVL859: + 9491 .loc 6 973 3 is_stmt 0 view .LVU2913 + 9492 0020 C3F8BC00 str r0, [r3, #188] + 9493 .LVL897: 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9011 .loc 6 973 3 view .LVU2795 - 9012 .LBE637: - 9013 .LBE636: -3711:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin - 9014 .loc 1 3711 3 is_stmt 1 view .LVU2796 - 9015 .LBB638: - 9016 .LBI638: + 9494 .loc 6 973 3 view .LVU2914 + 9495 .LBE642: + ARM GAS /tmp/ccLSPxIe.s page 570 + + + 9496 .LBE641: +3938:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin + 9497 .loc 1 3938 3 is_stmt 1 view .LVU2915 + 9498 .LBB643: + 9499 .LBI643: 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9017 .loc 6 497 22 view .LVU2797 - ARM GAS /tmp/ccuHnxNu.s page 556 - - - 9018 .LBB639: + 9500 .loc 6 497 22 view .LVU2916 + 9501 .LBB644: 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9019 .loc 6 499 3 view .LVU2798 - 9020 0024 D3F8B820 ldr r2, [r3, #184] - 9021 0028 42F00102 orr r2, r2, #1 - 9022 002c C3F8B820 str r2, [r3, #184] - 9023 .LVL860: + 9502 .loc 6 499 3 view .LVU2917 + 9503 0024 D3F8B820 ldr r2, [r3, #184] + 9504 0028 42F00102 orr r2, r2, #1 + 9505 002c C3F8B820 str r2, [r3, #184] + 9506 .LVL898: 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9024 .loc 6 499 3 is_stmt 0 view .LVU2799 - 9025 .LBE639: - 9026 .LBE638: -3712:Src/main.c **** } - 9027 .loc 1 3712 2 is_stmt 1 view .LVU2800 -3712:Src/main.c **** } - 9028 .loc 1 3712 11 is_stmt 0 view .LVU2801 - 9029 0030 014B ldr r3, .L492 - 9030 0032 0122 movs r2, #1 - 9031 0034 1A70 strb r2, [r3] -3713:Src/main.c **** - 9032 .loc 1 3713 1 view .LVU2802 - 9033 0036 7047 bx lr - 9034 .L493: - 9035 .align 2 - 9036 .L492: - 9037 0038 00000000 .word u_tx_flg - 9038 003c 00640240 .word 1073898496 - 9039 .cfi_endproc - 9040 .LFE1238: - 9042 .section .text.Error_Handler,"ax",%progbits - 9043 .align 1 - 9044 .global Error_Handler - 9045 .syntax unified - 9046 .thumb - 9047 .thumb_func - 9049 Error_Handler: - 9050 .LFB1240: -3721:Src/main.c **** //------------------------------------------------------- -3722:Src/main.c **** /* USER CODE END 4 */ -3723:Src/main.c **** -3724:Src/main.c **** /** -3725:Src/main.c **** * @brief This function is executed in case of error occurrence. -3726:Src/main.c **** * @retval None -3727:Src/main.c **** */ -3728:Src/main.c **** void Error_Handler(void) -3729:Src/main.c **** { - 9051 .loc 1 3729 1 is_stmt 1 view -0 - 9052 .cfi_startproc - 9053 @ Volatile: function does not return. - 9054 @ args = 0, pretend = 0, frame = 0 - 9055 @ frame_needed = 0, uses_anonymous_args = 0 - 9056 @ link register save eliminated. -3730:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ -3731:Src/main.c **** /* User can add his own implementation to report the HAL error return state */ -3732:Src/main.c **** __disable_irq(); - 9057 .loc 1 3732 3 view .LVU2804 - 9058 .LBB640: - 9059 .LBI640: - ARM GAS /tmp/ccuHnxNu.s page 557 + 9507 .loc 6 499 3 is_stmt 0 view .LVU2918 + 9508 .LBE644: + 9509 .LBE643: +3939:Src/main.c **** } + 9510 .loc 1 3939 2 is_stmt 1 view .LVU2919 +3939:Src/main.c **** } + 9511 .loc 1 3939 11 is_stmt 0 view .LVU2920 + 9512 0030 014B ldr r3, .L542 + 9513 0032 0122 movs r2, #1 + 9514 0034 1A70 strb r2, [r3] +3940:Src/main.c **** + 9515 .loc 1 3940 1 view .LVU2921 + 9516 0036 7047 bx lr + 9517 .L543: + 9518 .align 2 + 9519 .L542: + 9520 0038 00000000 .word u_tx_flg + 9521 003c 00640240 .word 1073898496 + 9522 .cfi_endproc + 9523 .LFE1246: + 9525 .section .text.Error_Handler,"ax",%progbits + 9526 .align 1 + 9527 .global Error_Handler + 9528 .syntax unified + 9529 .thumb + 9530 .thumb_func + 9532 Error_Handler: + 9533 .LFB1248: +3948:Src/main.c **** //------------------------------------------------------- +3949:Src/main.c **** /* USER CODE END 4 */ +3950:Src/main.c **** +3951:Src/main.c **** /** +3952:Src/main.c **** * @brief This function is executed in case of error occurrence. +3953:Src/main.c **** * @retval None +3954:Src/main.c **** */ +3955:Src/main.c **** void Error_Handler(void) +3956:Src/main.c **** { + 9534 .loc 1 3956 1 is_stmt 1 view -0 + 9535 .cfi_startproc + 9536 @ Volatile: function does not return. + 9537 @ args = 0, pretend = 0, frame = 0 + 9538 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccLSPxIe.s page 571 + 9539 @ link register save eliminated. +3957:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ +3958:Src/main.c **** /* User can add his own implementation to report the HAL error return state */ +3959:Src/main.c **** __disable_irq(); + 9540 .loc 1 3959 3 view .LVU2923 + 9541 .LBB645: + 9542 .LBI645: 140:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 9060 .loc 8 140 27 view .LVU2805 - 9061 .LBB641: + 9543 .loc 8 140 27 view .LVU2924 + 9544 .LBB646: 142:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 9062 .loc 8 142 3 view .LVU2806 - 9063 .syntax unified - 9064 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 9065 0000 72B6 cpsid i - 9066 @ 0 "" 2 - 9067 .thumb - 9068 .syntax unified - 9069 .L495: - 9070 .LBE641: - 9071 .LBE640: -3733:Src/main.c **** while (1) - 9072 .loc 1 3733 3 view .LVU2807 -3734:Src/main.c **** { -3735:Src/main.c **** } - 9073 .loc 1 3735 3 view .LVU2808 -3733:Src/main.c **** while (1) - 9074 .loc 1 3733 9 view .LVU2809 - 9075 0002 FEE7 b .L495 - 9076 .cfi_endproc - 9077 .LFE1240: - 9079 .section .text.MX_ADC1_Init,"ax",%progbits - 9080 .align 1 - 9081 .syntax unified - 9082 .thumb - 9083 .thumb_func - 9085 MX_ADC1_Init: - 9086 .LFB1188: -1105:Src/main.c **** - 9087 .loc 1 1105 1 view -0 - 9088 .cfi_startproc - 9089 @ args = 0, pretend = 0, frame = 16 - 9090 @ frame_needed = 0, uses_anonymous_args = 0 - 9091 0000 00B5 push {lr} - 9092 .LCFI79: - 9093 .cfi_def_cfa_offset 4 - 9094 .cfi_offset 14, -4 - 9095 0002 85B0 sub sp, sp, #20 - 9096 .LCFI80: - 9097 .cfi_def_cfa_offset 24 -1111:Src/main.c **** - 9098 .loc 1 1111 3 view .LVU2811 -1111:Src/main.c **** - 9099 .loc 1 1111 26 is_stmt 0 view .LVU2812 - 9100 0004 0023 movs r3, #0 - 9101 0006 0093 str r3, [sp] - 9102 0008 0193 str r3, [sp, #4] - 9103 000a 0293 str r3, [sp, #8] - 9104 000c 0393 str r3, [sp, #12] -1119:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 9105 .loc 1 1119 3 is_stmt 1 view .LVU2813 -1119:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 9106 .loc 1 1119 18 is_stmt 0 view .LVU2814 - 9107 000e 2B48 ldr r0, .L510 - ARM GAS /tmp/ccuHnxNu.s page 558 - - - 9108 0010 2B4A ldr r2, .L510+4 - 9109 0012 0260 str r2, [r0] -1120:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 9110 .loc 1 1120 3 is_stmt 1 view .LVU2815 -1120:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 9111 .loc 1 1120 29 is_stmt 0 view .LVU2816 - 9112 0014 4FF44032 mov r2, #196608 - 9113 0018 4260 str r2, [r0, #4] -1121:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 9114 .loc 1 1121 3 is_stmt 1 view .LVU2817 -1121:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 9115 .loc 1 1121 25 is_stmt 0 view .LVU2818 - 9116 001a 8360 str r3, [r0, #8] -1122:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 9117 .loc 1 1122 3 is_stmt 1 view .LVU2819 -1122:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 9118 .loc 1 1122 27 is_stmt 0 view .LVU2820 - 9119 001c 0122 movs r2, #1 - 9120 001e 0261 str r2, [r0, #16] -1123:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 9121 .loc 1 1123 3 is_stmt 1 view .LVU2821 -1123:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 9122 .loc 1 1123 33 is_stmt 0 view .LVU2822 - 9123 0020 8361 str r3, [r0, #24] -1124:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 9124 .loc 1 1124 3 is_stmt 1 view .LVU2823 -1124:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 9125 .loc 1 1124 36 is_stmt 0 view .LVU2824 - 9126 0022 80F82030 strb r3, [r0, #32] -1125:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 9127 .loc 1 1125 3 is_stmt 1 view .LVU2825 -1125:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 9128 .loc 1 1125 35 is_stmt 0 view .LVU2826 - 9129 0026 C362 str r3, [r0, #44] -1126:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 9130 .loc 1 1126 3 is_stmt 1 view .LVU2827 -1126:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 9131 .loc 1 1126 31 is_stmt 0 view .LVU2828 - 9132 0028 2649 ldr r1, .L510+8 - 9133 002a 8162 str r1, [r0, #40] -1127:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 9134 .loc 1 1127 3 is_stmt 1 view .LVU2829 -1127:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 9135 .loc 1 1127 24 is_stmt 0 view .LVU2830 - 9136 002c C360 str r3, [r0, #12] -1128:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 9137 .loc 1 1128 3 is_stmt 1 view .LVU2831 -1128:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 9138 .loc 1 1128 30 is_stmt 0 view .LVU2832 - 9139 002e 0521 movs r1, #5 - 9140 0030 C161 str r1, [r0, #28] -1129:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 9141 .loc 1 1129 3 is_stmt 1 view .LVU2833 -1129:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 9142 .loc 1 1129 36 is_stmt 0 view .LVU2834 - 9143 0032 80F83030 strb r3, [r0, #48] -1130:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - ARM GAS /tmp/ccuHnxNu.s page 559 - - - 9144 .loc 1 1130 3 is_stmt 1 view .LVU2835 -1130:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 9145 .loc 1 1130 27 is_stmt 0 view .LVU2836 - 9146 0036 4261 str r2, [r0, #20] -1131:Src/main.c **** { - 9147 .loc 1 1131 3 is_stmt 1 view .LVU2837 -1131:Src/main.c **** { - 9148 .loc 1 1131 7 is_stmt 0 view .LVU2838 - 9149 0038 FFF7FEFF bl HAL_ADC_Init - 9150 .LVL861: -1131:Src/main.c **** { - 9151 .loc 1 1131 6 discriminator 1 view .LVU2839 - 9152 003c 0028 cmp r0, #0 - 9153 003e 31D1 bne .L504 -1138:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 9154 .loc 1 1138 3 is_stmt 1 view .LVU2840 -1138:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 9155 .loc 1 1138 19 is_stmt 0 view .LVU2841 - 9156 0040 0923 movs r3, #9 - 9157 0042 0093 str r3, [sp] -1139:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 9158 .loc 1 1139 3 is_stmt 1 view .LVU2842 -1139:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 9159 .loc 1 1139 16 is_stmt 0 view .LVU2843 - 9160 0044 0123 movs r3, #1 - 9161 0046 0193 str r3, [sp, #4] -1140:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9162 .loc 1 1140 3 is_stmt 1 view .LVU2844 -1140:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9163 .loc 1 1140 24 is_stmt 0 view .LVU2845 - 9164 0048 0723 movs r3, #7 - 9165 004a 0293 str r3, [sp, #8] -1141:Src/main.c **** { - 9166 .loc 1 1141 3 is_stmt 1 view .LVU2846 -1141:Src/main.c **** { - 9167 .loc 1 1141 7 is_stmt 0 view .LVU2847 - 9168 004c 6946 mov r1, sp - 9169 004e 1B48 ldr r0, .L510 - 9170 0050 FFF7FEFF bl HAL_ADC_ConfigChannel - 9171 .LVL862: -1141:Src/main.c **** { - 9172 .loc 1 1141 6 discriminator 1 view .LVU2848 - 9173 0054 40BB cbnz r0, .L505 -1148:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 9174 .loc 1 1148 3 is_stmt 1 view .LVU2849 -1148:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 9175 .loc 1 1148 19 is_stmt 0 view .LVU2850 - 9176 0056 0823 movs r3, #8 - 9177 0058 0093 str r3, [sp] -1149:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9178 .loc 1 1149 3 is_stmt 1 view .LVU2851 -1149:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9179 .loc 1 1149 16 is_stmt 0 view .LVU2852 - 9180 005a 0223 movs r3, #2 - 9181 005c 0193 str r3, [sp, #4] -1150:Src/main.c **** { - 9182 .loc 1 1150 3 is_stmt 1 view .LVU2853 - ARM GAS /tmp/ccuHnxNu.s page 560 - - -1150:Src/main.c **** { - 9183 .loc 1 1150 7 is_stmt 0 view .LVU2854 - 9184 005e 6946 mov r1, sp - 9185 0060 1648 ldr r0, .L510 - 9186 0062 FFF7FEFF bl HAL_ADC_ConfigChannel - 9187 .LVL863: -1150:Src/main.c **** { - 9188 .loc 1 1150 6 discriminator 1 view .LVU2855 - 9189 0066 08BB cbnz r0, .L506 -1157:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 9190 .loc 1 1157 3 is_stmt 1 view .LVU2856 -1157:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 9191 .loc 1 1157 19 is_stmt 0 view .LVU2857 - 9192 0068 0223 movs r3, #2 - 9193 006a 0093 str r3, [sp] -1158:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9194 .loc 1 1158 3 is_stmt 1 view .LVU2858 -1158:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9195 .loc 1 1158 16 is_stmt 0 view .LVU2859 - 9196 006c 0323 movs r3, #3 - 9197 006e 0193 str r3, [sp, #4] -1159:Src/main.c **** { - 9198 .loc 1 1159 3 is_stmt 1 view .LVU2860 -1159:Src/main.c **** { - 9199 .loc 1 1159 7 is_stmt 0 view .LVU2861 - 9200 0070 6946 mov r1, sp - 9201 0072 1248 ldr r0, .L510 - 9202 0074 FFF7FEFF bl HAL_ADC_ConfigChannel - 9203 .LVL864: -1159:Src/main.c **** { - 9204 .loc 1 1159 6 discriminator 1 view .LVU2862 - 9205 0078 D0B9 cbnz r0, .L507 -1166:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 9206 .loc 1 1166 3 is_stmt 1 view .LVU2863 -1166:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 9207 .loc 1 1166 19 is_stmt 0 view .LVU2864 - 9208 007a 0A23 movs r3, #10 - 9209 007c 0093 str r3, [sp] -1167:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9210 .loc 1 1167 3 is_stmt 1 view .LVU2865 -1167:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9211 .loc 1 1167 16 is_stmt 0 view .LVU2866 - 9212 007e 0423 movs r3, #4 - 9213 0080 0193 str r3, [sp, #4] -1168:Src/main.c **** { - 9214 .loc 1 1168 3 is_stmt 1 view .LVU2867 -1168:Src/main.c **** { - 9215 .loc 1 1168 7 is_stmt 0 view .LVU2868 - 9216 0082 6946 mov r1, sp - 9217 0084 0D48 ldr r0, .L510 - 9218 0086 FFF7FEFF bl HAL_ADC_ConfigChannel - 9219 .LVL865: -1168:Src/main.c **** { - 9220 .loc 1 1168 6 discriminator 1 view .LVU2869 - 9221 008a 98B9 cbnz r0, .L508 -1175:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 9222 .loc 1 1175 3 is_stmt 1 view .LVU2870 - ARM GAS /tmp/ccuHnxNu.s page 561 - - -1175:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 9223 .loc 1 1175 19 is_stmt 0 view .LVU2871 - 9224 008c 0B23 movs r3, #11 - 9225 008e 0093 str r3, [sp] -1176:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9226 .loc 1 1176 3 is_stmt 1 view .LVU2872 -1176:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 9227 .loc 1 1176 16 is_stmt 0 view .LVU2873 - 9228 0090 0523 movs r3, #5 - 9229 0092 0193 str r3, [sp, #4] -1177:Src/main.c **** { - 9230 .loc 1 1177 3 is_stmt 1 view .LVU2874 -1177:Src/main.c **** { - 9231 .loc 1 1177 7 is_stmt 0 view .LVU2875 - 9232 0094 6946 mov r1, sp - 9233 0096 0948 ldr r0, .L510 - 9234 0098 FFF7FEFF bl HAL_ADC_ConfigChannel - 9235 .LVL866: -1177:Src/main.c **** { - 9236 .loc 1 1177 6 discriminator 1 view .LVU2876 - 9237 009c 60B9 cbnz r0, .L509 -1185:Src/main.c **** - 9238 .loc 1 1185 1 view .LVU2877 - 9239 009e 05B0 add sp, sp, #20 - 9240 .LCFI81: - 9241 .cfi_remember_state - 9242 .cfi_def_cfa_offset 4 - 9243 @ sp needed - 9244 00a0 5DF804FB ldr pc, [sp], #4 - 9245 .L504: - 9246 .LCFI82: - 9247 .cfi_restore_state -1133:Src/main.c **** } - 9248 .loc 1 1133 5 is_stmt 1 view .LVU2878 - 9249 00a4 FFF7FEFF bl Error_Handler - 9250 .LVL867: - 9251 .L505: -1143:Src/main.c **** } - 9252 .loc 1 1143 5 view .LVU2879 - 9253 00a8 FFF7FEFF bl Error_Handler - 9254 .LVL868: - 9255 .L506: -1152:Src/main.c **** } - 9256 .loc 1 1152 5 view .LVU2880 - 9257 00ac FFF7FEFF bl Error_Handler - 9258 .LVL869: - 9259 .L507: -1161:Src/main.c **** } - 9260 .loc 1 1161 5 view .LVU2881 - 9261 00b0 FFF7FEFF bl Error_Handler - 9262 .LVL870: - 9263 .L508: -1170:Src/main.c **** } - 9264 .loc 1 1170 5 view .LVU2882 - 9265 00b4 FFF7FEFF bl Error_Handler - 9266 .LVL871: - 9267 .L509: - ARM GAS /tmp/ccuHnxNu.s page 562 - - -1179:Src/main.c **** } - 9268 .loc 1 1179 5 view .LVU2883 - 9269 00b8 FFF7FEFF bl Error_Handler - 9270 .LVL872: - 9271 .L511: - 9272 .align 2 - 9273 .L510: - 9274 00bc 00000000 .word hadc1 - 9275 00c0 00200140 .word 1073815552 - 9276 00c4 0100000F .word 251658241 - 9277 .cfi_endproc - 9278 .LFE1188: - 9280 .section .text.MX_ADC3_Init,"ax",%progbits - 9281 .align 1 - 9282 .syntax unified - 9283 .thumb - 9284 .thumb_func - 9286 MX_ADC3_Init: - 9287 .LFB1189: -1193:Src/main.c **** - 9288 .loc 1 1193 1 view -0 - 9289 .cfi_startproc - 9290 @ args = 0, pretend = 0, frame = 16 - 9291 @ frame_needed = 0, uses_anonymous_args = 0 - 9292 0000 00B5 push {lr} - 9293 .LCFI83: - 9294 .cfi_def_cfa_offset 4 - 9295 .cfi_offset 14, -4 - 9296 0002 85B0 sub sp, sp, #20 - 9297 .LCFI84: - 9298 .cfi_def_cfa_offset 24 + 9545 .loc 8 142 3 view .LVU2925 + 9546 .syntax unified + 9547 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9548 0000 72B6 cpsid i + 9549 @ 0 "" 2 + 9550 .thumb + 9551 .syntax unified + 9552 .L545: + 9553 .LBE646: + 9554 .LBE645: +3960:Src/main.c **** while (1) + 9555 .loc 1 3960 3 view .LVU2926 +3961:Src/main.c **** { +3962:Src/main.c **** } + 9556 .loc 1 3962 3 view .LVU2927 +3960:Src/main.c **** while (1) + 9557 .loc 1 3960 9 view .LVU2928 + 9558 0002 FEE7 b .L545 + 9559 .cfi_endproc + 9560 .LFE1248: + 9562 .section .text.MX_ADC1_Init,"ax",%progbits + 9563 .align 1 + 9564 .syntax unified + 9565 .thumb + 9566 .thumb_func + 9568 MX_ADC1_Init: + 9569 .LFB1188: 1199:Src/main.c **** - 9299 .loc 1 1199 3 view .LVU2885 -1199:Src/main.c **** - 9300 .loc 1 1199 26 is_stmt 0 view .LVU2886 - 9301 0004 0023 movs r3, #0 - 9302 0006 0093 str r3, [sp] - 9303 0008 0193 str r3, [sp, #4] - 9304 000a 0293 str r3, [sp, #8] - 9305 000c 0393 str r3, [sp, #12] -1207:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 9306 .loc 1 1207 3 is_stmt 1 view .LVU2887 -1207:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 9307 .loc 1 1207 18 is_stmt 0 view .LVU2888 - 9308 000e 1448 ldr r0, .L518 - 9309 0010 144A ldr r2, .L518+4 - 9310 0012 0260 str r2, [r0] -1208:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 9311 .loc 1 1208 3 is_stmt 1 view .LVU2889 -1208:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 9312 .loc 1 1208 29 is_stmt 0 view .LVU2890 - 9313 0014 4FF44032 mov r2, #196608 - 9314 0018 4260 str r2, [r0, #4] -1209:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 9315 .loc 1 1209 3 is_stmt 1 view .LVU2891 -1209:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 9316 .loc 1 1209 25 is_stmt 0 view .LVU2892 - ARM GAS /tmp/ccuHnxNu.s page 563 + 9570 .loc 1 1199 1 view -0 + 9571 .cfi_startproc + 9572 @ args = 0, pretend = 0, frame = 16 + 9573 @ frame_needed = 0, uses_anonymous_args = 0 + 9574 0000 00B5 push {lr} + 9575 .LCFI82: + 9576 .cfi_def_cfa_offset 4 + 9577 .cfi_offset 14, -4 + 9578 0002 85B0 sub sp, sp, #20 + 9579 .LCFI83: + 9580 .cfi_def_cfa_offset 24 +1205:Src/main.c **** + 9581 .loc 1 1205 3 view .LVU2930 +1205:Src/main.c **** + 9582 .loc 1 1205 26 is_stmt 0 view .LVU2931 + 9583 0004 0023 movs r3, #0 + 9584 0006 0093 str r3, [sp] + 9585 0008 0193 str r3, [sp, #4] + ARM GAS /tmp/ccLSPxIe.s page 572 - 9317 001a 8360 str r3, [r0, #8] -1210:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 9318 .loc 1 1210 3 is_stmt 1 view .LVU2893 -1210:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 9319 .loc 1 1210 27 is_stmt 0 view .LVU2894 - 9320 001c 0361 str r3, [r0, #16] -1211:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 9321 .loc 1 1211 3 is_stmt 1 view .LVU2895 -1211:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 9322 .loc 1 1211 33 is_stmt 0 view .LVU2896 - 9323 001e 8361 str r3, [r0, #24] -1212:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 9324 .loc 1 1212 3 is_stmt 1 view .LVU2897 -1212:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 9325 .loc 1 1212 36 is_stmt 0 view .LVU2898 - 9326 0020 80F82030 strb r3, [r0, #32] -1213:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 9327 .loc 1 1213 3 is_stmt 1 view .LVU2899 -1213:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 9328 .loc 1 1213 35 is_stmt 0 view .LVU2900 - 9329 0024 C362 str r3, [r0, #44] -1214:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 9330 .loc 1 1214 3 is_stmt 1 view .LVU2901 -1214:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 9331 .loc 1 1214 31 is_stmt 0 view .LVU2902 - 9332 0026 104A ldr r2, .L518+8 - 9333 0028 8262 str r2, [r0, #40] -1215:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 9334 .loc 1 1215 3 is_stmt 1 view .LVU2903 -1215:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 9335 .loc 1 1215 24 is_stmt 0 view .LVU2904 - 9336 002a C360 str r3, [r0, #12] -1216:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 9337 .loc 1 1216 3 is_stmt 1 view .LVU2905 -1216:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 9338 .loc 1 1216 30 is_stmt 0 view .LVU2906 - 9339 002c 0122 movs r2, #1 - 9340 002e C261 str r2, [r0, #28] -1217:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 9341 .loc 1 1217 3 is_stmt 1 view .LVU2907 -1217:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 9342 .loc 1 1217 36 is_stmt 0 view .LVU2908 - 9343 0030 80F83030 strb r3, [r0, #48] -1218:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 9344 .loc 1 1218 3 is_stmt 1 view .LVU2909 -1218:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 9345 .loc 1 1218 27 is_stmt 0 view .LVU2910 - 9346 0034 4261 str r2, [r0, #20] -1219:Src/main.c **** { - 9347 .loc 1 1219 3 is_stmt 1 view .LVU2911 -1219:Src/main.c **** { - 9348 .loc 1 1219 7 is_stmt 0 view .LVU2912 - 9349 0036 FFF7FEFF bl HAL_ADC_Init - 9350 .LVL873: -1219:Src/main.c **** { - 9351 .loc 1 1219 6 discriminator 1 view .LVU2913 - 9352 003a 68B9 cbnz r0, .L516 - ARM GAS /tmp/ccuHnxNu.s page 564 + 9586 000a 0293 str r3, [sp, #8] + 9587 000c 0393 str r3, [sp, #12] +1213:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 9588 .loc 1 1213 3 is_stmt 1 view .LVU2932 +1213:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 9589 .loc 1 1213 18 is_stmt 0 view .LVU2933 + 9590 000e 2B48 ldr r0, .L560 + 9591 0010 2B4A ldr r2, .L560+4 + 9592 0012 0260 str r2, [r0] +1214:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 9593 .loc 1 1214 3 is_stmt 1 view .LVU2934 +1214:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 9594 .loc 1 1214 29 is_stmt 0 view .LVU2935 + 9595 0014 4FF44032 mov r2, #196608 + 9596 0018 4260 str r2, [r0, #4] +1215:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 9597 .loc 1 1215 3 is_stmt 1 view .LVU2936 +1215:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 9598 .loc 1 1215 25 is_stmt 0 view .LVU2937 + 9599 001a 8360 str r3, [r0, #8] +1216:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 9600 .loc 1 1216 3 is_stmt 1 view .LVU2938 +1216:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 9601 .loc 1 1216 27 is_stmt 0 view .LVU2939 + 9602 001c 0122 movs r2, #1 + 9603 001e 0261 str r2, [r0, #16] +1217:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 9604 .loc 1 1217 3 is_stmt 1 view .LVU2940 +1217:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 9605 .loc 1 1217 33 is_stmt 0 view .LVU2941 + 9606 0020 8361 str r3, [r0, #24] +1218:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 9607 .loc 1 1218 3 is_stmt 1 view .LVU2942 +1218:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 9608 .loc 1 1218 36 is_stmt 0 view .LVU2943 + 9609 0022 80F82030 strb r3, [r0, #32] +1219:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 9610 .loc 1 1219 3 is_stmt 1 view .LVU2944 +1219:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 9611 .loc 1 1219 35 is_stmt 0 view .LVU2945 + 9612 0026 C362 str r3, [r0, #44] +1220:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 9613 .loc 1 1220 3 is_stmt 1 view .LVU2946 +1220:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 9614 .loc 1 1220 31 is_stmt 0 view .LVU2947 + 9615 0028 2649 ldr r1, .L560+8 + 9616 002a 8162 str r1, [r0, #40] +1221:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 9617 .loc 1 1221 3 is_stmt 1 view .LVU2948 +1221:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 9618 .loc 1 1221 24 is_stmt 0 view .LVU2949 + 9619 002c C360 str r3, [r0, #12] +1222:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 9620 .loc 1 1222 3 is_stmt 1 view .LVU2950 +1222:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 9621 .loc 1 1222 30 is_stmt 0 view .LVU2951 + 9622 002e 0521 movs r1, #5 + ARM GAS /tmp/ccLSPxIe.s page 573 -1226:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 9353 .loc 1 1226 3 is_stmt 1 view .LVU2914 -1226:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 9354 .loc 1 1226 19 is_stmt 0 view .LVU2915 - 9355 003c 0F23 movs r3, #15 - 9356 003e 0093 str r3, [sp] -1227:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 9357 .loc 1 1227 3 is_stmt 1 view .LVU2916 -1227:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 9358 .loc 1 1227 16 is_stmt 0 view .LVU2917 - 9359 0040 0123 movs r3, #1 - 9360 0042 0193 str r3, [sp, #4] -1228:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 9361 .loc 1 1228 3 is_stmt 1 view .LVU2918 -1228:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 9362 .loc 1 1228 24 is_stmt 0 view .LVU2919 - 9363 0044 0723 movs r3, #7 - 9364 0046 0293 str r3, [sp, #8] -1229:Src/main.c **** { - 9365 .loc 1 1229 3 is_stmt 1 view .LVU2920 -1229:Src/main.c **** { - 9366 .loc 1 1229 7 is_stmt 0 view .LVU2921 - 9367 0048 6946 mov r1, sp - 9368 004a 0548 ldr r0, .L518 - 9369 004c FFF7FEFF bl HAL_ADC_ConfigChannel - 9370 .LVL874: -1229:Src/main.c **** { - 9371 .loc 1 1229 6 discriminator 1 view .LVU2922 - 9372 0050 20B9 cbnz r0, .L517 -1237:Src/main.c **** - 9373 .loc 1 1237 1 view .LVU2923 - 9374 0052 05B0 add sp, sp, #20 - 9375 .LCFI85: - 9376 .cfi_remember_state - 9377 .cfi_def_cfa_offset 4 - 9378 @ sp needed - 9379 0054 5DF804FB ldr pc, [sp], #4 - 9380 .L516: - 9381 .LCFI86: - 9382 .cfi_restore_state -1221:Src/main.c **** } - 9383 .loc 1 1221 5 is_stmt 1 view .LVU2924 - 9384 0058 FFF7FEFF bl Error_Handler - 9385 .LVL875: - 9386 .L517: -1231:Src/main.c **** } - 9387 .loc 1 1231 5 view .LVU2925 - 9388 005c FFF7FEFF bl Error_Handler - 9389 .LVL876: - 9390 .L519: - 9391 .align 2 - 9392 .L518: - 9393 0060 00000000 .word hadc3 - 9394 0064 00220140 .word 1073816064 - 9395 0068 0100000F .word 251658241 - 9396 .cfi_endproc - 9397 .LFE1189: - ARM GAS /tmp/ccuHnxNu.s page 565 + 9623 0030 C161 str r1, [r0, #28] +1223:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 9624 .loc 1 1223 3 is_stmt 1 view .LVU2952 +1223:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 9625 .loc 1 1223 36 is_stmt 0 view .LVU2953 + 9626 0032 80F83030 strb r3, [r0, #48] +1224:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 9627 .loc 1 1224 3 is_stmt 1 view .LVU2954 +1224:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 9628 .loc 1 1224 27 is_stmt 0 view .LVU2955 + 9629 0036 4261 str r2, [r0, #20] +1225:Src/main.c **** { + 9630 .loc 1 1225 3 is_stmt 1 view .LVU2956 +1225:Src/main.c **** { + 9631 .loc 1 1225 7 is_stmt 0 view .LVU2957 + 9632 0038 FFF7FEFF bl HAL_ADC_Init + 9633 .LVL899: +1225:Src/main.c **** { + 9634 .loc 1 1225 6 discriminator 1 view .LVU2958 + 9635 003c 0028 cmp r0, #0 + 9636 003e 31D1 bne .L554 +1232:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 9637 .loc 1 1232 3 is_stmt 1 view .LVU2959 +1232:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 9638 .loc 1 1232 19 is_stmt 0 view .LVU2960 + 9639 0040 0923 movs r3, #9 + 9640 0042 0093 str r3, [sp] +1233:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 9641 .loc 1 1233 3 is_stmt 1 view .LVU2961 +1233:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 9642 .loc 1 1233 16 is_stmt 0 view .LVU2962 + 9643 0044 0123 movs r3, #1 + 9644 0046 0193 str r3, [sp, #4] +1234:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9645 .loc 1 1234 3 is_stmt 1 view .LVU2963 +1234:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9646 .loc 1 1234 24 is_stmt 0 view .LVU2964 + 9647 0048 0723 movs r3, #7 + 9648 004a 0293 str r3, [sp, #8] +1235:Src/main.c **** { + 9649 .loc 1 1235 3 is_stmt 1 view .LVU2965 +1235:Src/main.c **** { + 9650 .loc 1 1235 7 is_stmt 0 view .LVU2966 + 9651 004c 6946 mov r1, sp + 9652 004e 1B48 ldr r0, .L560 + 9653 0050 FFF7FEFF bl HAL_ADC_ConfigChannel + 9654 .LVL900: +1235:Src/main.c **** { + 9655 .loc 1 1235 6 discriminator 1 view .LVU2967 + 9656 0054 40BB cbnz r0, .L555 +1242:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 9657 .loc 1 1242 3 is_stmt 1 view .LVU2968 +1242:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 9658 .loc 1 1242 19 is_stmt 0 view .LVU2969 + 9659 0056 0823 movs r3, #8 + 9660 0058 0093 str r3, [sp] +1243:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + ARM GAS /tmp/ccLSPxIe.s page 574 - 9399 .section .text.MX_USART1_UART_Init,"ax",%progbits - 9400 .align 1 - 9401 .syntax unified - 9402 .thumb - 9403 .thumb_func - 9405 MX_USART1_UART_Init: - 9406 .LFB1205: -1973:Src/main.c **** - 9407 .loc 1 1973 1 view -0 - 9408 .cfi_startproc - 9409 @ args = 0, pretend = 0, frame = 208 - 9410 @ frame_needed = 0, uses_anonymous_args = 0 - 9411 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} - 9412 .LCFI87: - 9413 .cfi_def_cfa_offset 24 - 9414 .cfi_offset 4, -24 - 9415 .cfi_offset 5, -20 - 9416 .cfi_offset 6, -16 - 9417 .cfi_offset 7, -12 - 9418 .cfi_offset 8, -8 - 9419 .cfi_offset 14, -4 - 9420 0004 B4B0 sub sp, sp, #208 - 9421 .LCFI88: - 9422 .cfi_def_cfa_offset 232 -1979:Src/main.c **** - 9423 .loc 1 1979 3 view .LVU2927 -1979:Src/main.c **** - 9424 .loc 1 1979 24 is_stmt 0 view .LVU2928 - 9425 0006 0021 movs r1, #0 - 9426 0008 2D91 str r1, [sp, #180] - 9427 000a 2E91 str r1, [sp, #184] - 9428 000c 2F91 str r1, [sp, #188] - 9429 000e 3091 str r1, [sp, #192] - 9430 0010 3191 str r1, [sp, #196] - 9431 0012 3291 str r1, [sp, #200] - 9432 0014 3391 str r1, [sp, #204] -1981:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 9433 .loc 1 1981 3 is_stmt 1 view .LVU2929 -1981:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 9434 .loc 1 1981 23 is_stmt 0 view .LVU2930 - 9435 0016 2791 str r1, [sp, #156] - 9436 0018 2891 str r1, [sp, #160] - 9437 001a 2991 str r1, [sp, #164] - 9438 001c 2A91 str r1, [sp, #168] - 9439 001e 2B91 str r1, [sp, #172] - 9440 0020 2C91 str r1, [sp, #176] -1982:Src/main.c **** - 9441 .loc 1 1982 3 is_stmt 1 view .LVU2931 -1982:Src/main.c **** - 9442 .loc 1 1982 28 is_stmt 0 view .LVU2932 - 9443 0022 9022 movs r2, #144 - 9444 0024 03A8 add r0, sp, #12 - 9445 0026 FFF7FEFF bl memset - 9446 .LVL877: -1986:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 9447 .loc 1 1986 3 is_stmt 1 view .LVU2933 -1986:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - ARM GAS /tmp/ccuHnxNu.s page 566 + 9661 .loc 1 1243 3 is_stmt 1 view .LVU2970 +1243:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9662 .loc 1 1243 16 is_stmt 0 view .LVU2971 + 9663 005a 0223 movs r3, #2 + 9664 005c 0193 str r3, [sp, #4] +1244:Src/main.c **** { + 9665 .loc 1 1244 3 is_stmt 1 view .LVU2972 +1244:Src/main.c **** { + 9666 .loc 1 1244 7 is_stmt 0 view .LVU2973 + 9667 005e 6946 mov r1, sp + 9668 0060 1648 ldr r0, .L560 + 9669 0062 FFF7FEFF bl HAL_ADC_ConfigChannel + 9670 .LVL901: +1244:Src/main.c **** { + 9671 .loc 1 1244 6 discriminator 1 view .LVU2974 + 9672 0066 08BB cbnz r0, .L556 +1251:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 9673 .loc 1 1251 3 is_stmt 1 view .LVU2975 +1251:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 9674 .loc 1 1251 19 is_stmt 0 view .LVU2976 + 9675 0068 0223 movs r3, #2 + 9676 006a 0093 str r3, [sp] +1252:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9677 .loc 1 1252 3 is_stmt 1 view .LVU2977 +1252:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9678 .loc 1 1252 16 is_stmt 0 view .LVU2978 + 9679 006c 0323 movs r3, #3 + 9680 006e 0193 str r3, [sp, #4] +1253:Src/main.c **** { + 9681 .loc 1 1253 3 is_stmt 1 view .LVU2979 +1253:Src/main.c **** { + 9682 .loc 1 1253 7 is_stmt 0 view .LVU2980 + 9683 0070 6946 mov r1, sp + 9684 0072 1248 ldr r0, .L560 + 9685 0074 FFF7FEFF bl HAL_ADC_ConfigChannel + 9686 .LVL902: +1253:Src/main.c **** { + 9687 .loc 1 1253 6 discriminator 1 view .LVU2981 + 9688 0078 D0B9 cbnz r0, .L557 +1260:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 9689 .loc 1 1260 3 is_stmt 1 view .LVU2982 +1260:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 9690 .loc 1 1260 19 is_stmt 0 view .LVU2983 + 9691 007a 0A23 movs r3, #10 + 9692 007c 0093 str r3, [sp] +1261:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9693 .loc 1 1261 3 is_stmt 1 view .LVU2984 +1261:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9694 .loc 1 1261 16 is_stmt 0 view .LVU2985 + 9695 007e 0423 movs r3, #4 + 9696 0080 0193 str r3, [sp, #4] +1262:Src/main.c **** { + 9697 .loc 1 1262 3 is_stmt 1 view .LVU2986 +1262:Src/main.c **** { + 9698 .loc 1 1262 7 is_stmt 0 view .LVU2987 + 9699 0082 6946 mov r1, sp + 9700 0084 0D48 ldr r0, .L560 + ARM GAS /tmp/ccLSPxIe.s page 575 - 9448 .loc 1 1986 44 is_stmt 0 view .LVU2934 - 9449 002a 4023 movs r3, #64 - 9450 002c 0393 str r3, [sp, #12] -1987:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 9451 .loc 1 1987 3 is_stmt 1 view .LVU2935 -1988:Src/main.c **** { - 9452 .loc 1 1988 3 view .LVU2936 -1988:Src/main.c **** { - 9453 .loc 1 1988 7 is_stmt 0 view .LVU2937 - 9454 002e 03A8 add r0, sp, #12 - 9455 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig - 9456 .LVL878: -1988:Src/main.c **** { - 9457 .loc 1 1988 6 discriminator 1 view .LVU2938 - 9458 0034 0028 cmp r0, #0 - 9459 0036 40F09E80 bne .L523 -1994:Src/main.c **** - 9460 .loc 1 1994 3 is_stmt 1 view .LVU2939 - 9461 .LVL879: - 9462 .LBB642: - 9463 .LBI642: + 9701 0086 FFF7FEFF bl HAL_ADC_ConfigChannel + 9702 .LVL903: +1262:Src/main.c **** { + 9703 .loc 1 1262 6 discriminator 1 view .LVU2988 + 9704 008a 98B9 cbnz r0, .L558 +1269:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 9705 .loc 1 1269 3 is_stmt 1 view .LVU2989 +1269:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 9706 .loc 1 1269 19 is_stmt 0 view .LVU2990 + 9707 008c 0B23 movs r3, #11 + 9708 008e 0093 str r3, [sp] +1270:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9709 .loc 1 1270 3 is_stmt 1 view .LVU2991 +1270:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 9710 .loc 1 1270 16 is_stmt 0 view .LVU2992 + 9711 0090 0523 movs r3, #5 + 9712 0092 0193 str r3, [sp, #4] +1271:Src/main.c **** { + 9713 .loc 1 1271 3 is_stmt 1 view .LVU2993 +1271:Src/main.c **** { + 9714 .loc 1 1271 7 is_stmt 0 view .LVU2994 + 9715 0094 6946 mov r1, sp + 9716 0096 0948 ldr r0, .L560 + 9717 0098 FFF7FEFF bl HAL_ADC_ConfigChannel + 9718 .LVL904: +1271:Src/main.c **** { + 9719 .loc 1 1271 6 discriminator 1 view .LVU2995 + 9720 009c 60B9 cbnz r0, .L559 +1279:Src/main.c **** + 9721 .loc 1 1279 1 view .LVU2996 + 9722 009e 05B0 add sp, sp, #20 + 9723 .LCFI84: + 9724 .cfi_remember_state + 9725 .cfi_def_cfa_offset 4 + 9726 @ sp needed + 9727 00a0 5DF804FB ldr pc, [sp], #4 + 9728 .L554: + 9729 .LCFI85: + 9730 .cfi_restore_state +1227:Src/main.c **** } + 9731 .loc 1 1227 5 is_stmt 1 view .LVU2997 + 9732 00a4 FFF7FEFF bl Error_Handler + 9733 .LVL905: + 9734 .L555: +1237:Src/main.c **** } + 9735 .loc 1 1237 5 view .LVU2998 + 9736 00a8 FFF7FEFF bl Error_Handler + 9737 .LVL906: + 9738 .L556: +1246:Src/main.c **** } + 9739 .loc 1 1246 5 view .LVU2999 + 9740 00ac FFF7FEFF bl Error_Handler + 9741 .LVL907: + 9742 .L557: +1255:Src/main.c **** } + 9743 .loc 1 1255 5 view .LVU3000 + 9744 00b0 FFF7FEFF bl Error_Handler + ARM GAS /tmp/ccLSPxIe.s page 576 + + + 9745 .LVL908: + 9746 .L558: +1264:Src/main.c **** } + 9747 .loc 1 1264 5 view .LVU3001 + 9748 00b4 FFF7FEFF bl Error_Handler + 9749 .LVL909: + 9750 .L559: +1273:Src/main.c **** } + 9751 .loc 1 1273 5 view .LVU3002 + 9752 00b8 FFF7FEFF bl Error_Handler + 9753 .LVL910: + 9754 .L561: + 9755 .align 2 + 9756 .L560: + 9757 00bc 00000000 .word hadc1 + 9758 00c0 00200140 .word 1073815552 + 9759 00c4 0100000F .word 251658241 + 9760 .cfi_endproc + 9761 .LFE1188: + 9763 .section .text.MX_ADC3_Init,"ax",%progbits + 9764 .align 1 + 9765 .syntax unified + 9766 .thumb + 9767 .thumb_func + 9769 MX_ADC3_Init: + 9770 .LFB1189: +1287:Src/main.c **** + 9771 .loc 1 1287 1 view -0 + 9772 .cfi_startproc + 9773 @ args = 0, pretend = 0, frame = 16 + 9774 @ frame_needed = 0, uses_anonymous_args = 0 + 9775 0000 00B5 push {lr} + 9776 .LCFI86: + 9777 .cfi_def_cfa_offset 4 + 9778 .cfi_offset 14, -4 + 9779 0002 85B0 sub sp, sp, #20 + 9780 .LCFI87: + 9781 .cfi_def_cfa_offset 24 +1293:Src/main.c **** + 9782 .loc 1 1293 3 view .LVU3004 +1293:Src/main.c **** + 9783 .loc 1 1293 26 is_stmt 0 view .LVU3005 + 9784 0004 0023 movs r3, #0 + 9785 0006 0093 str r3, [sp] + 9786 0008 0193 str r3, [sp, #4] + 9787 000a 0293 str r3, [sp, #8] + 9788 000c 0393 str r3, [sp, #12] +1301:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 9789 .loc 1 1301 3 is_stmt 1 view .LVU3006 +1301:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 9790 .loc 1 1301 18 is_stmt 0 view .LVU3007 + 9791 000e 1448 ldr r0, .L568 + 9792 0010 144A ldr r2, .L568+4 + 9793 0012 0260 str r2, [r0] +1302:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 9794 .loc 1 1302 3 is_stmt 1 view .LVU3008 +1302:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + ARM GAS /tmp/ccLSPxIe.s page 577 + + + 9795 .loc 1 1302 29 is_stmt 0 view .LVU3009 + 9796 0014 4FF44032 mov r2, #196608 + 9797 0018 4260 str r2, [r0, #4] +1303:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 9798 .loc 1 1303 3 is_stmt 1 view .LVU3010 +1303:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 9799 .loc 1 1303 25 is_stmt 0 view .LVU3011 + 9800 001a 8360 str r3, [r0, #8] +1304:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 9801 .loc 1 1304 3 is_stmt 1 view .LVU3012 +1304:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 9802 .loc 1 1304 27 is_stmt 0 view .LVU3013 + 9803 001c 0361 str r3, [r0, #16] +1305:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 9804 .loc 1 1305 3 is_stmt 1 view .LVU3014 +1305:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 9805 .loc 1 1305 33 is_stmt 0 view .LVU3015 + 9806 001e 8361 str r3, [r0, #24] +1306:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 9807 .loc 1 1306 3 is_stmt 1 view .LVU3016 +1306:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 9808 .loc 1 1306 36 is_stmt 0 view .LVU3017 + 9809 0020 80F82030 strb r3, [r0, #32] +1307:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 9810 .loc 1 1307 3 is_stmt 1 view .LVU3018 +1307:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 9811 .loc 1 1307 35 is_stmt 0 view .LVU3019 + 9812 0024 C362 str r3, [r0, #44] +1308:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 9813 .loc 1 1308 3 is_stmt 1 view .LVU3020 +1308:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 9814 .loc 1 1308 31 is_stmt 0 view .LVU3021 + 9815 0026 104A ldr r2, .L568+8 + 9816 0028 8262 str r2, [r0, #40] +1309:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 9817 .loc 1 1309 3 is_stmt 1 view .LVU3022 +1309:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 9818 .loc 1 1309 24 is_stmt 0 view .LVU3023 + 9819 002a C360 str r3, [r0, #12] +1310:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 9820 .loc 1 1310 3 is_stmt 1 view .LVU3024 +1310:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 9821 .loc 1 1310 30 is_stmt 0 view .LVU3025 + 9822 002c 0122 movs r2, #1 + 9823 002e C261 str r2, [r0, #28] +1311:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 9824 .loc 1 1311 3 is_stmt 1 view .LVU3026 +1311:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 9825 .loc 1 1311 36 is_stmt 0 view .LVU3027 + 9826 0030 80F83030 strb r3, [r0, #48] +1312:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 9827 .loc 1 1312 3 is_stmt 1 view .LVU3028 +1312:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 9828 .loc 1 1312 27 is_stmt 0 view .LVU3029 + 9829 0034 4261 str r2, [r0, #20] +1313:Src/main.c **** { + 9830 .loc 1 1313 3 is_stmt 1 view .LVU3030 + ARM GAS /tmp/ccLSPxIe.s page 578 + + +1313:Src/main.c **** { + 9831 .loc 1 1313 7 is_stmt 0 view .LVU3031 + 9832 0036 FFF7FEFF bl HAL_ADC_Init + 9833 .LVL911: +1313:Src/main.c **** { + 9834 .loc 1 1313 6 discriminator 1 view .LVU3032 + 9835 003a 68B9 cbnz r0, .L566 +1320:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 9836 .loc 1 1320 3 is_stmt 1 view .LVU3033 +1320:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 9837 .loc 1 1320 19 is_stmt 0 view .LVU3034 + 9838 003c 0F23 movs r3, #15 + 9839 003e 0093 str r3, [sp] +1321:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 9840 .loc 1 1321 3 is_stmt 1 view .LVU3035 +1321:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 9841 .loc 1 1321 16 is_stmt 0 view .LVU3036 + 9842 0040 0123 movs r3, #1 + 9843 0042 0193 str r3, [sp, #4] +1322:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 9844 .loc 1 1322 3 is_stmt 1 view .LVU3037 +1322:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 9845 .loc 1 1322 24 is_stmt 0 view .LVU3038 + 9846 0044 0723 movs r3, #7 + 9847 0046 0293 str r3, [sp, #8] +1323:Src/main.c **** { + 9848 .loc 1 1323 3 is_stmt 1 view .LVU3039 +1323:Src/main.c **** { + 9849 .loc 1 1323 7 is_stmt 0 view .LVU3040 + 9850 0048 6946 mov r1, sp + 9851 004a 0548 ldr r0, .L568 + 9852 004c FFF7FEFF bl HAL_ADC_ConfigChannel + 9853 .LVL912: +1323:Src/main.c **** { + 9854 .loc 1 1323 6 discriminator 1 view .LVU3041 + 9855 0050 20B9 cbnz r0, .L567 +1331:Src/main.c **** + 9856 .loc 1 1331 1 view .LVU3042 + 9857 0052 05B0 add sp, sp, #20 + 9858 .LCFI88: + 9859 .cfi_remember_state + 9860 .cfi_def_cfa_offset 4 + 9861 @ sp needed + 9862 0054 5DF804FB ldr pc, [sp], #4 + 9863 .L566: + 9864 .LCFI89: + 9865 .cfi_restore_state +1315:Src/main.c **** } + 9866 .loc 1 1315 5 is_stmt 1 view .LVU3043 + 9867 0058 FFF7FEFF bl Error_Handler + 9868 .LVL913: + 9869 .L567: +1325:Src/main.c **** } + 9870 .loc 1 1325 5 view .LVU3044 + 9871 005c FFF7FEFF bl Error_Handler + 9872 .LVL914: + 9873 .L569: + ARM GAS /tmp/ccLSPxIe.s page 579 + + + 9874 .align 2 + 9875 .L568: + 9876 0060 00000000 .word hadc3 + 9877 0064 00220140 .word 1073816064 + 9878 0068 0100000F .word 251658241 + 9879 .cfi_endproc + 9880 .LFE1189: + 9882 .section .text.MX_USART1_UART_Init,"ax",%progbits + 9883 .align 1 + 9884 .syntax unified + 9885 .thumb + 9886 .thumb_func + 9888 MX_USART1_UART_Init: + 9889 .LFB1205: +2067:Src/main.c **** + 9890 .loc 1 2067 1 view -0 + 9891 .cfi_startproc + 9892 @ args = 0, pretend = 0, frame = 208 + 9893 @ frame_needed = 0, uses_anonymous_args = 0 + 9894 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 9895 .LCFI90: + 9896 .cfi_def_cfa_offset 24 + 9897 .cfi_offset 4, -24 + 9898 .cfi_offset 5, -20 + 9899 .cfi_offset 6, -16 + 9900 .cfi_offset 7, -12 + 9901 .cfi_offset 8, -8 + 9902 .cfi_offset 14, -4 + 9903 0004 B4B0 sub sp, sp, #208 + 9904 .LCFI91: + 9905 .cfi_def_cfa_offset 232 +2073:Src/main.c **** + 9906 .loc 1 2073 3 view .LVU3046 +2073:Src/main.c **** + 9907 .loc 1 2073 24 is_stmt 0 view .LVU3047 + 9908 0006 0021 movs r1, #0 + 9909 0008 2D91 str r1, [sp, #180] + 9910 000a 2E91 str r1, [sp, #184] + 9911 000c 2F91 str r1, [sp, #188] + 9912 000e 3091 str r1, [sp, #192] + 9913 0010 3191 str r1, [sp, #196] + 9914 0012 3291 str r1, [sp, #200] + 9915 0014 3391 str r1, [sp, #204] +2075:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + 9916 .loc 1 2075 3 is_stmt 1 view .LVU3048 +2075:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + 9917 .loc 1 2075 23 is_stmt 0 view .LVU3049 + 9918 0016 2791 str r1, [sp, #156] + 9919 0018 2891 str r1, [sp, #160] + 9920 001a 2991 str r1, [sp, #164] + 9921 001c 2A91 str r1, [sp, #168] + 9922 001e 2B91 str r1, [sp, #172] + 9923 0020 2C91 str r1, [sp, #176] +2076:Src/main.c **** + 9924 .loc 1 2076 3 is_stmt 1 view .LVU3050 +2076:Src/main.c **** + 9925 .loc 1 2076 28 is_stmt 0 view .LVU3051 + ARM GAS /tmp/ccLSPxIe.s page 580 + + + 9926 0022 9022 movs r2, #144 + 9927 0024 03A8 add r0, sp, #12 + 9928 0026 FFF7FEFF bl memset + 9929 .LVL915: +2080:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + 9930 .loc 1 2080 3 is_stmt 1 view .LVU3052 +2080:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + 9931 .loc 1 2080 44 is_stmt 0 view .LVU3053 + 9932 002a 4023 movs r3, #64 + 9933 002c 0393 str r3, [sp, #12] +2081:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + 9934 .loc 1 2081 3 is_stmt 1 view .LVU3054 +2082:Src/main.c **** { + 9935 .loc 1 2082 3 view .LVU3055 +2082:Src/main.c **** { + 9936 .loc 1 2082 7 is_stmt 0 view .LVU3056 + 9937 002e 03A8 add r0, sp, #12 + 9938 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig + 9939 .LVL916: +2082:Src/main.c **** { + 9940 .loc 1 2082 6 discriminator 1 view .LVU3057 + 9941 0034 0028 cmp r0, #0 + 9942 0036 40F09E80 bne .L573 +2088:Src/main.c **** + 9943 .loc 1 2088 3 is_stmt 1 view .LVU3058 + 9944 .LVL917: + 9945 .LBB647: + 9946 .LBI647: 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 9464 .loc 3 1587 22 view .LVU2940 - 9465 .LBB643: + 9947 .loc 3 1587 22 view .LVU3059 + 9948 .LBB648: 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); - 9466 .loc 3 1589 3 view .LVU2941 + 9949 .loc 3 1589 3 view .LVU3060 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - 9467 .loc 3 1590 3 view .LVU2942 - 9468 003a 504B ldr r3, .L524 - 9469 003c 5A6C ldr r2, [r3, #68] - 9470 003e 42F01002 orr r2, r2, #16 - 9471 0042 5A64 str r2, [r3, #68] + 9950 .loc 3 1590 3 view .LVU3061 + 9951 003a 504B ldr r3, .L574 + 9952 003c 5A6C ldr r2, [r3, #68] + 9953 003e 42F01002 orr r2, r2, #16 + 9954 0042 5A64 str r2, [r3, #68] 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9472 .loc 3 1592 3 view .LVU2943 + 9955 .loc 3 1592 3 view .LVU3062 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9473 .loc 3 1592 12 is_stmt 0 view .LVU2944 - 9474 0044 5A6C ldr r2, [r3, #68] - 9475 0046 02F01002 and r2, r2, #16 + 9956 .loc 3 1592 12 is_stmt 0 view .LVU3063 + 9957 0044 5A6C ldr r2, [r3, #68] + 9958 0046 02F01002 and r2, r2, #16 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9476 .loc 3 1592 10 view .LVU2945 - 9477 004a 0292 str r2, [sp, #8] - 9478 .loc 3 1593 3 is_stmt 1 view .LVU2946 - 9479 004c 029A ldr r2, [sp, #8] - 9480 .LVL880: - 9481 .loc 3 1593 3 is_stmt 0 view .LVU2947 - 9482 .LBE643: - 9483 .LBE642: -1996:Src/main.c **** /**USART1 GPIO Configuration - 9484 .loc 1 1996 3 is_stmt 1 view .LVU2948 - 9485 .LBB644: - 9486 .LBI644: + 9959 .loc 3 1592 10 view .LVU3064 + 9960 004a 0292 str r2, [sp, #8] + 9961 .loc 3 1593 3 is_stmt 1 view .LVU3065 + 9962 004c 029A ldr r2, [sp, #8] + 9963 .LVL918: + 9964 .loc 3 1593 3 is_stmt 0 view .LVU3066 + 9965 .LBE648: + 9966 .LBE647: +2090:Src/main.c **** /**USART1 GPIO Configuration + 9967 .loc 1 2090 3 is_stmt 1 view .LVU3067 + 9968 .LBB649: + ARM GAS /tmp/ccLSPxIe.s page 581 + + + 9969 .LBI649: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - 9487 .loc 3 309 22 view .LVU2949 - 9488 .LBB645: + 9970 .loc 3 309 22 view .LVU3068 + 9971 .LBB650: 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs); - 9489 .loc 3 311 3 view .LVU2950 + 9972 .loc 3 311 3 view .LVU3069 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - ARM GAS /tmp/ccuHnxNu.s page 567 - - - 9490 .loc 3 312 3 view .LVU2951 - 9491 004e 1A6B ldr r2, [r3, #48] - 9492 0050 42F00102 orr r2, r2, #1 - 9493 0054 1A63 str r2, [r3, #48] + 9973 .loc 3 312 3 view .LVU3070 + 9974 004e 1A6B ldr r2, [r3, #48] + 9975 0050 42F00102 orr r2, r2, #1 + 9976 0054 1A63 str r2, [r3, #48] 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9494 .loc 3 314 3 view .LVU2952 + 9977 .loc 3 314 3 view .LVU3071 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9495 .loc 3 314 12 is_stmt 0 view .LVU2953 - 9496 0056 1B6B ldr r3, [r3, #48] - 9497 0058 03F00103 and r3, r3, #1 + 9978 .loc 3 314 12 is_stmt 0 view .LVU3072 + 9979 0056 1B6B ldr r3, [r3, #48] + 9980 0058 03F00103 and r3, r3, #1 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - 9498 .loc 3 314 10 view .LVU2954 - 9499 005c 0193 str r3, [sp, #4] + 9981 .loc 3 314 10 view .LVU3073 + 9982 005c 0193 str r3, [sp, #4] 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 9500 .loc 3 315 3 is_stmt 1 view .LVU2955 - 9501 005e 019B ldr r3, [sp, #4] - 9502 .LVL881: + 9983 .loc 3 315 3 is_stmt 1 view .LVU3074 + 9984 005e 019B ldr r3, [sp, #4] + 9985 .LVL919: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - 9503 .loc 3 315 3 is_stmt 0 view .LVU2956 - 9504 .LBE645: - 9505 .LBE644: -2001:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 9506 .loc 1 2001 3 is_stmt 1 view .LVU2957 -2001:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 9507 .loc 1 2001 23 is_stmt 0 view .LVU2958 - 9508 0060 4FF40073 mov r3, #512 - 9509 0064 2793 str r3, [sp, #156] -2002:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 9510 .loc 1 2002 3 is_stmt 1 view .LVU2959 -2002:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 9511 .loc 1 2002 24 is_stmt 0 view .LVU2960 - 9512 0066 4FF00208 mov r8, #2 - 9513 006a CDF8A080 str r8, [sp, #160] -2003:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 9514 .loc 1 2003 3 is_stmt 1 view .LVU2961 -2003:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 9515 .loc 1 2003 25 is_stmt 0 view .LVU2962 - 9516 006e 0327 movs r7, #3 - 9517 0070 2997 str r7, [sp, #164] -2004:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 9518 .loc 1 2004 3 is_stmt 1 view .LVU2963 -2004:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 9519 .loc 1 2004 30 is_stmt 0 view .LVU2964 - 9520 0072 0024 movs r4, #0 - 9521 0074 2A94 str r4, [sp, #168] -2005:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 9522 .loc 1 2005 3 is_stmt 1 view .LVU2965 -2005:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 9523 .loc 1 2005 24 is_stmt 0 view .LVU2966 - 9524 0076 2B94 str r4, [sp, #172] -2006:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 9525 .loc 1 2006 3 is_stmt 1 view .LVU2967 -2006:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 9526 .loc 1 2006 29 is_stmt 0 view .LVU2968 - 9527 0078 0726 movs r6, #7 - 9528 007a 2C96 str r6, [sp, #176] -2007:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 568 + 9986 .loc 3 315 3 is_stmt 0 view .LVU3075 + 9987 .LBE650: + 9988 .LBE649: +2095:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 9989 .loc 1 2095 3 is_stmt 1 view .LVU3076 +2095:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 9990 .loc 1 2095 23 is_stmt 0 view .LVU3077 + 9991 0060 4FF40073 mov r3, #512 + 9992 0064 2793 str r3, [sp, #156] +2096:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 9993 .loc 1 2096 3 is_stmt 1 view .LVU3078 +2096:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 9994 .loc 1 2096 24 is_stmt 0 view .LVU3079 + 9995 0066 4FF00208 mov r8, #2 + 9996 006a CDF8A080 str r8, [sp, #160] +2097:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 9997 .loc 1 2097 3 is_stmt 1 view .LVU3080 +2097:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 9998 .loc 1 2097 25 is_stmt 0 view .LVU3081 + 9999 006e 0327 movs r7, #3 + 10000 0070 2997 str r7, [sp, #164] +2098:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 10001 .loc 1 2098 3 is_stmt 1 view .LVU3082 +2098:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 10002 .loc 1 2098 30 is_stmt 0 view .LVU3083 + 10003 0072 0024 movs r4, #0 + 10004 0074 2A94 str r4, [sp, #168] +2099:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 10005 .loc 1 2099 3 is_stmt 1 view .LVU3084 +2099:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 10006 .loc 1 2099 24 is_stmt 0 view .LVU3085 + 10007 0076 2B94 str r4, [sp, #172] + ARM GAS /tmp/ccLSPxIe.s page 582 - 9529 .loc 1 2007 3 is_stmt 1 view .LVU2969 - 9530 007c 404D ldr r5, .L524+4 - 9531 007e 27A9 add r1, sp, #156 - 9532 0080 2846 mov r0, r5 - 9533 0082 FFF7FEFF bl LL_GPIO_Init - 9534 .LVL882: -2009:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 9535 .loc 1 2009 3 view .LVU2970 -2009:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 9536 .loc 1 2009 23 is_stmt 0 view .LVU2971 - 9537 0086 4FF48063 mov r3, #1024 - 9538 008a 2793 str r3, [sp, #156] -2010:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 9539 .loc 1 2010 3 is_stmt 1 view .LVU2972 -2010:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 9540 .loc 1 2010 24 is_stmt 0 view .LVU2973 - 9541 008c CDF8A080 str r8, [sp, #160] -2011:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 9542 .loc 1 2011 3 is_stmt 1 view .LVU2974 -2011:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 9543 .loc 1 2011 25 is_stmt 0 view .LVU2975 - 9544 0090 2997 str r7, [sp, #164] -2012:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 9545 .loc 1 2012 3 is_stmt 1 view .LVU2976 -2012:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 9546 .loc 1 2012 30 is_stmt 0 view .LVU2977 - 9547 0092 2A94 str r4, [sp, #168] -2013:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 9548 .loc 1 2013 3 is_stmt 1 view .LVU2978 -2013:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 9549 .loc 1 2013 24 is_stmt 0 view .LVU2979 - 9550 0094 2B94 str r4, [sp, #172] -2014:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 9551 .loc 1 2014 3 is_stmt 1 view .LVU2980 -2014:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 9552 .loc 1 2014 29 is_stmt 0 view .LVU2981 - 9553 0096 2C96 str r6, [sp, #176] -2015:Src/main.c **** - 9554 .loc 1 2015 3 is_stmt 1 view .LVU2982 - 9555 0098 27A9 add r1, sp, #156 - 9556 009a 2846 mov r0, r5 - 9557 009c FFF7FEFF bl LL_GPIO_Init - 9558 .LVL883: -2020:Src/main.c **** - 9559 .loc 1 2020 3 view .LVU2983 - 9560 .LBB646: - 9561 .LBI646: +2100:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 10008 .loc 1 2100 3 is_stmt 1 view .LVU3086 +2100:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 10009 .loc 1 2100 29 is_stmt 0 view .LVU3087 + 10010 0078 0726 movs r6, #7 + 10011 007a 2C96 str r6, [sp, #176] +2101:Src/main.c **** + 10012 .loc 1 2101 3 is_stmt 1 view .LVU3088 + 10013 007c 404D ldr r5, .L574+4 + 10014 007e 27A9 add r1, sp, #156 + 10015 0080 2846 mov r0, r5 + 10016 0082 FFF7FEFF bl LL_GPIO_Init + 10017 .LVL920: +2103:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 10018 .loc 1 2103 3 view .LVU3089 +2103:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 10019 .loc 1 2103 23 is_stmt 0 view .LVU3090 + 10020 0086 4FF48063 mov r3, #1024 + 10021 008a 2793 str r3, [sp, #156] +2104:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 10022 .loc 1 2104 3 is_stmt 1 view .LVU3091 +2104:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 10023 .loc 1 2104 24 is_stmt 0 view .LVU3092 + 10024 008c CDF8A080 str r8, [sp, #160] +2105:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 10025 .loc 1 2105 3 is_stmt 1 view .LVU3093 +2105:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 10026 .loc 1 2105 25 is_stmt 0 view .LVU3094 + 10027 0090 2997 str r7, [sp, #164] +2106:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 10028 .loc 1 2106 3 is_stmt 1 view .LVU3095 +2106:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 10029 .loc 1 2106 30 is_stmt 0 view .LVU3096 + 10030 0092 2A94 str r4, [sp, #168] +2107:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 10031 .loc 1 2107 3 is_stmt 1 view .LVU3097 +2107:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 10032 .loc 1 2107 24 is_stmt 0 view .LVU3098 + 10033 0094 2B94 str r4, [sp, #172] +2108:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 10034 .loc 1 2108 3 is_stmt 1 view .LVU3099 +2108:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 10035 .loc 1 2108 29 is_stmt 0 view .LVU3100 + 10036 0096 2C96 str r6, [sp, #176] +2109:Src/main.c **** + 10037 .loc 1 2109 3 is_stmt 1 view .LVU3101 + 10038 0098 27A9 add r1, sp, #156 + 10039 009a 2846 mov r0, r5 + 10040 009c FFF7FEFF bl LL_GPIO_Init + 10041 .LVL921: +2114:Src/main.c **** + 10042 .loc 1 2114 3 view .LVU3102 + 10043 .LBB651: + 10044 .LBI651: 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9562 .loc 6 1032 22 view .LVU2984 - 9563 .LBB647: -1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9564 .loc 6 1034 3 view .LVU2985 - 9565 00a0 384B ldr r3, .L524+8 - 9566 00a2 D3F8B820 ldr r2, [r3, #184] - 9567 00a6 22F0F052 bic r2, r2, #503316480 - 9568 00aa 42F00062 orr r2, r2, #134217728 - 9569 00ae C3F8B820 str r2, [r3, #184] - ARM GAS /tmp/ccuHnxNu.s page 569 + 10045 .loc 6 1032 22 view .LVU3103 + 10046 .LBB652: + ARM GAS /tmp/ccLSPxIe.s page 583 - 9570 .LVL884: 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9571 .loc 6 1034 3 is_stmt 0 view .LVU2986 - 9572 .LBE647: - 9573 .LBE646: -2022:Src/main.c **** - 9574 .loc 1 2022 3 is_stmt 1 view .LVU2987 - 9575 .LBB648: - 9576 .LBI648: + 10047 .loc 6 1034 3 view .LVU3104 + 10048 00a0 384B ldr r3, .L574+8 + 10049 00a2 D3F8B820 ldr r2, [r3, #184] + 10050 00a6 22F0F052 bic r2, r2, #503316480 + 10051 00aa 42F00062 orr r2, r2, #134217728 + 10052 00ae C3F8B820 str r2, [r3, #184] + 10053 .LVL922: +1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 10054 .loc 6 1034 3 is_stmt 0 view .LVU3105 + 10055 .LBE652: + 10056 .LBE651: +2116:Src/main.c **** + 10057 .loc 1 2116 3 is_stmt 1 view .LVU3106 + 10058 .LBB653: + 10059 .LBI653: 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9577 .loc 6 598 22 view .LVU2988 - 9578 .LBB649: + 10060 .loc 6 598 22 view .LVU3107 + 10061 .LBB654: 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9579 .loc 6 600 3 view .LVU2989 - 9580 00b2 D3F8B820 ldr r2, [r3, #184] - 9581 00b6 22F0C002 bic r2, r2, #192 - 9582 00ba 42F04002 orr r2, r2, #64 - 9583 00be C3F8B820 str r2, [r3, #184] - 9584 .LVL885: + 10062 .loc 6 600 3 view .LVU3108 + 10063 00b2 D3F8B820 ldr r2, [r3, #184] + 10064 00b6 22F0C002 bic r2, r2, #192 + 10065 00ba 42F04002 orr r2, r2, #64 + 10066 00be C3F8B820 str r2, [r3, #184] + 10067 .LVL923: 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9585 .loc 6 600 3 is_stmt 0 view .LVU2990 - 9586 .LBE649: - 9587 .LBE648: -2024:Src/main.c **** - 9588 .loc 1 2024 3 is_stmt 1 view .LVU2991 - 9589 .LBB650: - 9590 .LBI650: + 10068 .loc 6 600 3 is_stmt 0 view .LVU3109 + 10069 .LBE654: + 10070 .LBE653: +2118:Src/main.c **** + 10071 .loc 1 2118 3 is_stmt 1 view .LVU3110 + 10072 .LBB655: + 10073 .LBI655: 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9591 .loc 6 924 22 view .LVU2992 - 9592 .LBB651: + 10074 .loc 6 924 22 view .LVU3111 + 10075 .LBB656: 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9593 .loc 6 926 3 view .LVU2993 - 9594 00c2 D3F8B820 ldr r2, [r3, #184] - 9595 00c6 42F44032 orr r2, r2, #196608 - 9596 00ca C3F8B820 str r2, [r3, #184] - 9597 .LVL886: + 10076 .loc 6 926 3 view .LVU3112 + 10077 00c2 D3F8B820 ldr r2, [r3, #184] + 10078 00c6 42F44032 orr r2, r2, #196608 + 10079 00ca C3F8B820 str r2, [r3, #184] + 10080 .LVL924: 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9598 .loc 6 926 3 is_stmt 0 view .LVU2994 - 9599 .LBE651: - 9600 .LBE650: -2026:Src/main.c **** - 9601 .loc 1 2026 3 is_stmt 1 view .LVU2995 - 9602 .LBB652: - 9603 .LBI652: + 10081 .loc 6 926 3 is_stmt 0 view .LVU3113 + 10082 .LBE656: + 10083 .LBE655: +2120:Src/main.c **** + 10084 .loc 1 2120 3 is_stmt 1 view .LVU3114 + 10085 .LBB657: + 10086 .LBI657: 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9604 .loc 6 646 22 view .LVU2996 - 9605 .LBB653: + 10087 .loc 6 646 22 view .LVU3115 + 10088 .LBB658: 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9606 .loc 6 648 3 view .LVU2997 - 9607 00ce D3F8B820 ldr r2, [r3, #184] - 9608 00d2 22F49072 bic r2, r2, #288 - 9609 00d6 C3F8B820 str r2, [r3, #184] - 9610 .LVL887: - 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9611 .loc 6 648 3 is_stmt 0 view .LVU2998 - 9612 .LBE653: - 9613 .LBE652: - ARM GAS /tmp/ccuHnxNu.s page 570 + 10089 .loc 6 648 3 view .LVU3116 + 10090 00ce D3F8B820 ldr r2, [r3, #184] + ARM GAS /tmp/ccLSPxIe.s page 584 -2028:Src/main.c **** - 9614 .loc 1 2028 3 is_stmt 1 view .LVU2999 - 9615 .LBB654: - 9616 .LBI654: + 10091 00d2 22F49072 bic r2, r2, #288 + 10092 00d6 C3F8B820 str r2, [r3, #184] + 10093 .LVL925: + 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + 10094 .loc 6 648 3 is_stmt 0 view .LVU3117 + 10095 .LBE658: + 10096 .LBE657: +2122:Src/main.c **** + 10097 .loc 1 2122 3 is_stmt 1 view .LVU3118 + 10098 .LBB659: + 10099 .LBI659: 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9617 .loc 6 693 22 view .LVU3000 - 9618 .LBB655: + 10100 .loc 6 693 22 view .LVU3119 + 10101 .LBB660: 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9619 .loc 6 695 3 view .LVU3001 - 9620 00da D3F8B820 ldr r2, [r3, #184] - 9621 00de 22F40072 bic r2, r2, #512 - 9622 00e2 C3F8B820 str r2, [r3, #184] - 9623 .LVL888: + 10102 .loc 6 695 3 view .LVU3120 + 10103 00da D3F8B820 ldr r2, [r3, #184] + 10104 00de 22F40072 bic r2, r2, #512 + 10105 00e2 C3F8B820 str r2, [r3, #184] + 10106 .LVL926: 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9624 .loc 6 695 3 is_stmt 0 view .LVU3002 - 9625 .LBE655: - 9626 .LBE654: -2030:Src/main.c **** - 9627 .loc 1 2030 3 is_stmt 1 view .LVU3003 - 9628 .LBB656: - 9629 .LBI656: + 10107 .loc 6 695 3 is_stmt 0 view .LVU3121 + 10108 .LBE660: + 10109 .LBE659: +2124:Src/main.c **** + 10110 .loc 1 2124 3 is_stmt 1 view .LVU3122 + 10111 .LBB661: + 10112 .LBI661: 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9630 .loc 6 738 22 view .LVU3004 - 9631 .LBB657: + 10113 .loc 6 738 22 view .LVU3123 + 10114 .LBB662: 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9632 .loc 6 740 3 view .LVU3005 - 9633 00e6 D3F8B820 ldr r2, [r3, #184] - 9634 00ea 42F48062 orr r2, r2, #1024 - 9635 00ee C3F8B820 str r2, [r3, #184] - 9636 .LVL889: + 10115 .loc 6 740 3 view .LVU3124 + 10116 00e6 D3F8B820 ldr r2, [r3, #184] + 10117 00ea 42F48062 orr r2, r2, #1024 + 10118 00ee C3F8B820 str r2, [r3, #184] + 10119 .LVL927: 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9637 .loc 6 740 3 is_stmt 0 view .LVU3006 - 9638 .LBE657: - 9639 .LBE656: -2032:Src/main.c **** - 9640 .loc 1 2032 3 is_stmt 1 view .LVU3007 - 9641 .LBB658: - 9642 .LBI658: + 10120 .loc 6 740 3 is_stmt 0 view .LVU3125 + 10121 .LBE662: + 10122 .LBE661: +2126:Src/main.c **** + 10123 .loc 1 2126 3 is_stmt 1 view .LVU3126 + 10124 .LBB663: + 10125 .LBI663: 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9643 .loc 6 784 22 view .LVU3008 - 9644 .LBB659: + 10126 .loc 6 784 22 view .LVU3127 + 10127 .LBB664: 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9645 .loc 6 786 3 view .LVU3009 - 9646 00f2 D3F8B820 ldr r2, [r3, #184] - 9647 00f6 22F4C052 bic r2, r2, #6144 - 9648 00fa C3F8B820 str r2, [r3, #184] - 9649 .LVL890: + 10128 .loc 6 786 3 view .LVU3128 + 10129 00f2 D3F8B820 ldr r2, [r3, #184] + 10130 00f6 22F4C052 bic r2, r2, #6144 + 10131 00fa C3F8B820 str r2, [r3, #184] + 10132 .LVL928: 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9650 .loc 6 786 3 is_stmt 0 view .LVU3010 - 9651 .LBE659: - 9652 .LBE658: -2034:Src/main.c **** - 9653 .loc 1 2034 3 is_stmt 1 view .LVU3011 - 9654 .LBB660: - 9655 .LBI660: + 10133 .loc 6 786 3 is_stmt 0 view .LVU3129 + 10134 .LBE664: + ARM GAS /tmp/ccLSPxIe.s page 585 + + + 10135 .LBE663: +2128:Src/main.c **** + 10136 .loc 1 2128 3 is_stmt 1 view .LVU3130 + 10137 .LBB665: + 10138 .LBI665: 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9656 .loc 6 831 22 view .LVU3012 - ARM GAS /tmp/ccuHnxNu.s page 571 - - - 9657 .LBB661: + 10139 .loc 6 831 22 view .LVU3131 + 10140 .LBB666: 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9658 .loc 6 833 3 view .LVU3013 - 9659 00fe D3F8B820 ldr r2, [r3, #184] - 9660 0102 22F4C042 bic r2, r2, #24576 - 9661 0106 C3F8B820 str r2, [r3, #184] - 9662 .LVL891: + 10141 .loc 6 833 3 view .LVU3132 + 10142 00fe D3F8B820 ldr r2, [r3, #184] + 10143 0102 22F4C042 bic r2, r2, #24576 + 10144 0106 C3F8B820 str r2, [r3, #184] + 10145 .LVL929: 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9663 .loc 6 833 3 is_stmt 0 view .LVU3014 - 9664 .LBE661: - 9665 .LBE660: -2036:Src/main.c **** - 9666 .loc 1 2036 3 is_stmt 1 view .LVU3015 - 9667 .LBB662: - 9668 .LBI662: + 10146 .loc 6 833 3 is_stmt 0 view .LVU3133 + 10147 .LBE666: + 10148 .LBE665: +2130:Src/main.c **** + 10149 .loc 1 2130 3 is_stmt 1 view .LVU3134 + 10150 .LBB667: + 10151 .LBI667: 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 9669 .loc 6 1299 22 view .LVU3016 - 9670 .LBB663: + 10152 .loc 6 1299 22 view .LVU3135 + 10153 .LBB668: 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9671 .loc 6 1301 3 view .LVU3017 - 9672 010a D3F8CC20 ldr r2, [r3, #204] - 9673 010e 22F00402 bic r2, r2, #4 - 9674 0112 C3F8CC20 str r2, [r3, #204] - 9675 .LVL892: + 10154 .loc 6 1301 3 view .LVU3136 + 10155 010a D3F8CC20 ldr r2, [r3, #204] + 10156 010e 22F00402 bic r2, r2, #4 + 10157 0112 C3F8CC20 str r2, [r3, #204] + 10158 .LVL930: 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 9676 .loc 6 1301 3 is_stmt 0 view .LVU3018 - 9677 .LBE663: - 9678 .LBE662: -2039:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); - 9679 .loc 1 2039 3 is_stmt 1 view .LVU3019 - 9680 .LBB664: - 9681 .LBI664: + 10159 .loc 6 1301 3 is_stmt 0 view .LVU3137 + 10160 .LBE668: + 10161 .LBE667: +2133:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); + 10162 .loc 1 2133 3 is_stmt 1 view .LVU3138 + 10163 .LBB669: + 10164 .LBI669: 1884:Drivers/CMSIS/Include/core_cm7.h **** { - 9682 .loc 2 1884 26 view .LVU3020 - 9683 .LBB665: + 10165 .loc 2 1884 26 view .LVU3139 + 10166 .LBB670: 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 9684 .loc 2 1886 3 view .LVU3021 + 10167 .loc 2 1886 3 view .LVU3140 1886:Drivers/CMSIS/Include/core_cm7.h **** } - 9685 .loc 2 1886 26 is_stmt 0 view .LVU3022 - 9686 0116 1C4B ldr r3, .L524+12 - 9687 0118 D868 ldr r0, [r3, #12] - 9688 .LBE665: - 9689 .LBE664: -2039:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); - 9690 .loc 1 2039 3 discriminator 1 view .LVU3023 - 9691 011a 2246 mov r2, r4 - 9692 011c 2146 mov r1, r4 - 9693 011e C0F30220 ubfx r0, r0, #8, #3 - 9694 0122 FFF7FEFF bl NVIC_EncodePriority - 9695 .LVL893: - 9696 .LBB666: - 9697 .LBI666: + 10168 .loc 2 1886 26 is_stmt 0 view .LVU3141 + 10169 0116 1C4B ldr r3, .L574+12 + 10170 0118 D868 ldr r0, [r3, #12] + 10171 .LBE670: + 10172 .LBE669: +2133:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); + 10173 .loc 1 2133 3 discriminator 1 view .LVU3142 + 10174 011a 2246 mov r2, r4 + 10175 011c 2146 mov r1, r4 + 10176 011e C0F30220 ubfx r0, r0, #8, #3 + 10177 0122 FFF7FEFF bl NVIC_EncodePriority + 10178 .LVL931: + ARM GAS /tmp/ccLSPxIe.s page 586 + + + 10179 .LBB671: + 10180 .LBI671: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 9698 .loc 2 2024 22 is_stmt 1 view .LVU3024 - 9699 .LBB667: + 10181 .loc 2 2024 22 is_stmt 1 view .LVU3143 + 10182 .LBB672: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 9700 .loc 2 2026 3 view .LVU3025 - ARM GAS /tmp/ccuHnxNu.s page 572 - - + 10183 .loc 2 2026 3 view .LVU3144 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9701 .loc 2 2028 5 view .LVU3026 + 10184 .loc 2 2028 5 view .LVU3145 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9702 .loc 2 2028 49 is_stmt 0 view .LVU3027 - 9703 0126 0001 lsls r0, r0, #4 - 9704 .LVL894: + 10185 .loc 2 2028 49 is_stmt 0 view .LVU3146 + 10186 0126 0001 lsls r0, r0, #4 + 10187 .LVL932: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9705 .loc 2 2028 49 view .LVU3028 - 9706 0128 C0B2 uxtb r0, r0 + 10188 .loc 2 2028 49 view .LVU3147 + 10189 0128 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9707 .loc 2 2028 47 view .LVU3029 - 9708 012a 184B ldr r3, .L524+16 - 9709 012c 83F82503 strb r0, [r3, #805] - 9710 .LVL895: + 10190 .loc 2 2028 47 view .LVU3148 + 10191 012a 184B ldr r3, .L574+16 + 10192 012c 83F82503 strb r0, [r3, #805] + 10193 .LVL933: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 9711 .loc 2 2028 47 view .LVU3030 - 9712 .LBE667: - 9713 .LBE666: -2040:Src/main.c **** - 9714 .loc 1 2040 3 is_stmt 1 view .LVU3031 - 9715 .LBB668: - 9716 .LBI668: + 10194 .loc 2 2028 47 view .LVU3149 + 10195 .LBE672: + 10196 .LBE671: +2134:Src/main.c **** + 10197 .loc 1 2134 3 is_stmt 1 view .LVU3150 + 10198 .LBB673: + 10199 .LBI673: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 9717 .loc 2 1896 22 view .LVU3032 - 9718 .LBB669: + 10200 .loc 2 1896 22 view .LVU3151 + 10201 .LBB674: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 9719 .loc 2 1898 3 view .LVU3033 + 10202 .loc 2 1898 3 view .LVU3152 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 9720 .loc 2 1900 5 view .LVU3034 + 10203 .loc 2 1900 5 view .LVU3153 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 9721 .loc 2 1900 43 is_stmt 0 view .LVU3035 - 9722 0130 2022 movs r2, #32 - 9723 0132 5A60 str r2, [r3, #4] - 9724 .LVL896: + 10204 .loc 2 1900 43 is_stmt 0 view .LVU3154 + 10205 0130 2022 movs r2, #32 + 10206 0132 5A60 str r2, [r3, #4] + 10207 .LVL934: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 9725 .loc 2 1900 43 view .LVU3036 - 9726 .LBE669: - 9727 .LBE668: -2045:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - 9728 .loc 1 2045 3 is_stmt 1 view .LVU3037 -2045:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - 9729 .loc 1 2045 29 is_stmt 0 view .LVU3038 - 9730 0134 4FF4E133 mov r3, #115200 - 9731 0138 2D93 str r3, [sp, #180] -2046:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - 9732 .loc 1 2046 3 is_stmt 1 view .LVU3039 -2046:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - 9733 .loc 1 2046 30 is_stmt 0 view .LVU3040 - 9734 013a 2E94 str r4, [sp, #184] -2047:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; - 9735 .loc 1 2047 3 is_stmt 1 view .LVU3041 -2047:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; - 9736 .loc 1 2047 29 is_stmt 0 view .LVU3042 - 9737 013c 2F94 str r4, [sp, #188] -2048:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - 9738 .loc 1 2048 3 is_stmt 1 view .LVU3043 -2048:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - ARM GAS /tmp/ccuHnxNu.s page 573 + 10208 .loc 2 1900 43 view .LVU3155 + 10209 .LBE674: + 10210 .LBE673: +2139:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + 10211 .loc 1 2139 3 is_stmt 1 view .LVU3156 +2139:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + 10212 .loc 1 2139 29 is_stmt 0 view .LVU3157 + 10213 0134 4FF4E133 mov r3, #115200 + 10214 0138 2D93 str r3, [sp, #180] +2140:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + 10215 .loc 1 2140 3 is_stmt 1 view .LVU3158 +2140:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + 10216 .loc 1 2140 30 is_stmt 0 view .LVU3159 + 10217 013a 2E94 str r4, [sp, #184] +2141:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; + ARM GAS /tmp/ccLSPxIe.s page 587 - 9739 .loc 1 2048 27 is_stmt 0 view .LVU3044 - 9740 013e 3094 str r4, [sp, #192] -2049:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; - 9741 .loc 1 2049 3 is_stmt 1 view .LVU3045 -2049:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; - 9742 .loc 1 2049 38 is_stmt 0 view .LVU3046 - 9743 0140 0C23 movs r3, #12 - 9744 0142 3193 str r3, [sp, #196] -2050:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - 9745 .loc 1 2050 3 is_stmt 1 view .LVU3047 -2050:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - 9746 .loc 1 2050 40 is_stmt 0 view .LVU3048 - 9747 0144 3294 str r4, [sp, #200] -2051:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - 9748 .loc 1 2051 3 is_stmt 1 view .LVU3049 -2051:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - 9749 .loc 1 2051 33 is_stmt 0 view .LVU3050 - 9750 0146 3394 str r4, [sp, #204] -2052:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); - 9751 .loc 1 2052 3 is_stmt 1 view .LVU3051 - 9752 0148 04F18044 add r4, r4, #1073741824 - 9753 014c 04F58834 add r4, r4, #69632 - 9754 0150 2DA9 add r1, sp, #180 - 9755 0152 2046 mov r0, r4 - 9756 0154 FFF7FEFF bl LL_USART_Init - 9757 .LVL897: -2053:Src/main.c **** LL_USART_Enable(USART1); - 9758 .loc 1 2053 3 view .LVU3052 - 9759 .LBB670: - 9760 .LBI670: + 10218 .loc 1 2141 3 is_stmt 1 view .LVU3160 +2141:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; + 10219 .loc 1 2141 29 is_stmt 0 view .LVU3161 + 10220 013c 2F94 str r4, [sp, #188] +2142:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + 10221 .loc 1 2142 3 is_stmt 1 view .LVU3162 +2142:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + 10222 .loc 1 2142 27 is_stmt 0 view .LVU3163 + 10223 013e 3094 str r4, [sp, #192] +2143:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + 10224 .loc 1 2143 3 is_stmt 1 view .LVU3164 +2143:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + 10225 .loc 1 2143 38 is_stmt 0 view .LVU3165 + 10226 0140 0C23 movs r3, #12 + 10227 0142 3193 str r3, [sp, #196] +2144:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + 10228 .loc 1 2144 3 is_stmt 1 view .LVU3166 +2144:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + 10229 .loc 1 2144 40 is_stmt 0 view .LVU3167 + 10230 0144 3294 str r4, [sp, #200] +2145:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + 10231 .loc 1 2145 3 is_stmt 1 view .LVU3168 +2145:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + 10232 .loc 1 2145 33 is_stmt 0 view .LVU3169 + 10233 0146 3394 str r4, [sp, #204] +2146:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); + 10234 .loc 1 2146 3 is_stmt 1 view .LVU3170 + 10235 0148 04F18044 add r4, r4, #1073741824 + 10236 014c 04F58834 add r4, r4, #69632 + 10237 0150 2DA9 add r1, sp, #180 + 10238 0152 2046 mov r0, r4 + 10239 0154 FFF7FEFF bl LL_USART_Init + 10240 .LVL935: +2147:Src/main.c **** LL_USART_Enable(USART1); + 10241 .loc 1 2147 3 view .LVU3171 + 10242 .LBB675: + 10243 .LBI675: 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 9761 .loc 7 2320 22 view .LVU3053 - 9762 .LBB671: + 10244 .loc 7 2320 22 view .LVU3172 + 10245 .LBB676: 2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL)); - 9763 .loc 7 2326 3 view .LVU3054 - 9764 0158 6368 ldr r3, [r4, #4] - 9765 015a 23F49043 bic r3, r3, #18432 - 9766 015e 6360 str r3, [r4, #4] + 10246 .loc 7 2326 3 view .LVU3173 + 10247 0158 6368 ldr r3, [r4, #4] + 10248 015a 23F49043 bic r3, r3, #18432 + 10249 015e 6360 str r3, [r4, #4] 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9767 .loc 7 2327 3 view .LVU3055 - 9768 0160 A368 ldr r3, [r4, #8] - 9769 0162 23F02A03 bic r3, r3, #42 - 9770 0166 A360 str r3, [r4, #8] - 9771 .LVL898: + 10250 .loc 7 2327 3 view .LVU3174 + 10251 0160 A368 ldr r3, [r4, #8] + 10252 0162 23F02A03 bic r3, r3, #42 + 10253 0166 A360 str r3, [r4, #8] + 10254 .LVL936: 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9772 .loc 7 2327 3 is_stmt 0 view .LVU3056 - 9773 .LBE671: - 9774 .LBE670: -2054:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ - 9775 .loc 1 2054 3 is_stmt 1 view .LVU3057 - 9776 .LBB672: - 9777 .LBI672: + 10255 .loc 7 2327 3 is_stmt 0 view .LVU3175 + 10256 .LBE676: + 10257 .LBE675: +2148:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ + 10258 .loc 1 2148 3 is_stmt 1 view .LVU3176 + ARM GAS /tmp/ccLSPxIe.s page 588 + + + 10259 .LBB677: + 10260 .LBI677: 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 9778 .loc 7 560 22 view .LVU3058 - 9779 .LBB673: + 10261 .loc 7 560 22 view .LVU3177 + 10262 .LBB678: 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9780 .loc 7 562 3 view .LVU3059 - ARM GAS /tmp/ccuHnxNu.s page 574 + 10263 .loc 7 562 3 view .LVU3178 + 10264 0168 2368 ldr r3, [r4] + 10265 016a 43F00103 orr r3, r3, #1 + 10266 016e 2360 str r3, [r4] + 10267 .LVL937: + 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 10268 .loc 7 562 3 is_stmt 0 view .LVU3179 + 10269 .LBE678: + 10270 .LBE677: +2153:Src/main.c **** + 10271 .loc 1 2153 1 view .LVU3180 + 10272 0170 34B0 add sp, sp, #208 + 10273 .LCFI92: + 10274 .cfi_remember_state + 10275 .cfi_def_cfa_offset 24 + 10276 @ sp needed + 10277 0172 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 10278 .L573: + 10279 .LCFI93: + 10280 .cfi_restore_state +2084:Src/main.c **** } + 10281 .loc 1 2084 5 is_stmt 1 view .LVU3181 + 10282 0176 FFF7FEFF bl Error_Handler + 10283 .LVL938: + 10284 .L575: + 10285 017a 00BF .align 2 + 10286 .L574: + 10287 017c 00380240 .word 1073887232 + 10288 0180 00000240 .word 1073872896 + 10289 0184 00640240 .word 1073898496 + 10290 0188 00ED00E0 .word -536810240 + 10291 018c 00E100E0 .word -536813312 + 10292 .cfi_endproc + 10293 .LFE1205: + 10295 .section .text.MX_TIM10_Init,"ax",%progbits + 10296 .align 1 + 10297 .syntax unified + 10298 .thumb + 10299 .thumb_func + 10301 MX_TIM10_Init: + 10302 .LFB1201: +1886:Src/main.c **** + 10303 .loc 1 1886 1 view -0 + 10304 .cfi_startproc + 10305 @ args = 0, pretend = 0, frame = 0 + 10306 @ frame_needed = 0, uses_anonymous_args = 0 + 10307 0000 08B5 push {r3, lr} + 10308 .LCFI94: + 10309 .cfi_def_cfa_offset 8 + 10310 .cfi_offset 3, -8 + 10311 .cfi_offset 14, -4 + ARM GAS /tmp/ccLSPxIe.s page 589 - 9781 0168 2368 ldr r3, [r4] - 9782 016a 43F00103 orr r3, r3, #1 - 9783 016e 2360 str r3, [r4] - 9784 .LVL899: - 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 9785 .loc 7 562 3 is_stmt 0 view .LVU3060 - 9786 .LBE673: - 9787 .LBE672: +1895:Src/main.c **** htim10.Init.Prescaler = 183; + 10312 .loc 1 1895 3 view .LVU3183 +1895:Src/main.c **** htim10.Init.Prescaler = 183; + 10313 .loc 1 1895 19 is_stmt 0 view .LVU3184 + 10314 0002 0848 ldr r0, .L580 + 10315 0004 084B ldr r3, .L580+4 + 10316 0006 0360 str r3, [r0] +1896:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; + 10317 .loc 1 1896 3 is_stmt 1 view .LVU3185 +1896:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; + 10318 .loc 1 1896 25 is_stmt 0 view .LVU3186 + 10319 0008 B723 movs r3, #183 + 10320 000a 4360 str r3, [r0, #4] +1897:Src/main.c **** htim10.Init.Period = 9; + 10321 .loc 1 1897 3 is_stmt 1 view .LVU3187 +1897:Src/main.c **** htim10.Init.Period = 9; + 10322 .loc 1 1897 27 is_stmt 0 view .LVU3188 + 10323 000c 0023 movs r3, #0 + 10324 000e 8360 str r3, [r0, #8] +1898:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10325 .loc 1 1898 3 is_stmt 1 view .LVU3189 +1898:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10326 .loc 1 1898 22 is_stmt 0 view .LVU3190 + 10327 0010 0922 movs r2, #9 + 10328 0012 C260 str r2, [r0, #12] +1899:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10329 .loc 1 1899 3 is_stmt 1 view .LVU3191 +1899:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10330 .loc 1 1899 29 is_stmt 0 view .LVU3192 + 10331 0014 0361 str r3, [r0, #16] +1900:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) + 10332 .loc 1 1900 3 is_stmt 1 view .LVU3193 +1900:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) + 10333 .loc 1 1900 33 is_stmt 0 view .LVU3194 + 10334 0016 8361 str r3, [r0, #24] +1901:Src/main.c **** { + 10335 .loc 1 1901 3 is_stmt 1 view .LVU3195 +1901:Src/main.c **** { + 10336 .loc 1 1901 7 is_stmt 0 view .LVU3196 + 10337 0018 FFF7FEFF bl HAL_TIM_Base_Init + 10338 .LVL939: +1901:Src/main.c **** { + 10339 .loc 1 1901 6 discriminator 1 view .LVU3197 + 10340 001c 00B9 cbnz r0, .L579 +1909:Src/main.c **** + 10341 .loc 1 1909 1 view .LVU3198 + 10342 001e 08BD pop {r3, pc} + 10343 .L579: +1903:Src/main.c **** } + 10344 .loc 1 1903 5 is_stmt 1 view .LVU3199 + 10345 0020 FFF7FEFF bl Error_Handler + 10346 .LVL940: + 10347 .L581: + 10348 .align 2 + 10349 .L580: + 10350 0024 00000000 .word htim10 + 10351 0028 00440140 .word 1073824768 + ARM GAS /tmp/ccLSPxIe.s page 590 + + + 10352 .cfi_endproc + 10353 .LFE1201: + 10355 .section .text.MX_UART8_Init,"ax",%progbits + 10356 .align 1 + 10357 .syntax unified + 10358 .thumb + 10359 .thumb_func + 10361 MX_UART8_Init: + 10362 .LFB1204: +2032:Src/main.c **** + 10363 .loc 1 2032 1 view -0 + 10364 .cfi_startproc + 10365 @ args = 0, pretend = 0, frame = 0 + 10366 @ frame_needed = 0, uses_anonymous_args = 0 + 10367 0000 08B5 push {r3, lr} + 10368 .LCFI95: + 10369 .cfi_def_cfa_offset 8 + 10370 .cfi_offset 3, -8 + 10371 .cfi_offset 14, -4 +2041:Src/main.c **** huart8.Init.BaudRate = 115200; + 10372 .loc 1 2041 3 view .LVU3201 +2041:Src/main.c **** huart8.Init.BaudRate = 115200; + 10373 .loc 1 2041 19 is_stmt 0 view .LVU3202 + 10374 0002 0B48 ldr r0, .L586 + 10375 0004 0B4B ldr r3, .L586+4 + 10376 0006 0360 str r3, [r0] +2042:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; + 10377 .loc 1 2042 3 is_stmt 1 view .LVU3203 +2042:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; + 10378 .loc 1 2042 24 is_stmt 0 view .LVU3204 + 10379 0008 4FF4E133 mov r3, #115200 + 10380 000c 4360 str r3, [r0, #4] +2043:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; + 10381 .loc 1 2043 3 is_stmt 1 view .LVU3205 +2043:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; + 10382 .loc 1 2043 26 is_stmt 0 view .LVU3206 + 10383 000e 0023 movs r3, #0 + 10384 0010 8360 str r3, [r0, #8] +2044:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; + 10385 .loc 1 2044 3 is_stmt 1 view .LVU3207 +2044:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; + 10386 .loc 1 2044 24 is_stmt 0 view .LVU3208 + 10387 0012 C360 str r3, [r0, #12] +2045:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + 10388 .loc 1 2045 3 is_stmt 1 view .LVU3209 +2045:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + 10389 .loc 1 2045 22 is_stmt 0 view .LVU3210 + 10390 0014 0361 str r3, [r0, #16] +2046:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 10391 .loc 1 2046 3 is_stmt 1 view .LVU3211 +2046:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 10392 .loc 1 2046 20 is_stmt 0 view .LVU3212 + 10393 0016 0C22 movs r2, #12 + 10394 0018 4261 str r2, [r0, #20] +2047:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; + 10395 .loc 1 2047 3 is_stmt 1 view .LVU3213 +2047:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; + ARM GAS /tmp/ccLSPxIe.s page 591 + + + 10396 .loc 1 2047 25 is_stmt 0 view .LVU3214 + 10397 001a 8361 str r3, [r0, #24] +2048:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 10398 .loc 1 2048 3 is_stmt 1 view .LVU3215 +2048:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 10399 .loc 1 2048 28 is_stmt 0 view .LVU3216 + 10400 001c C361 str r3, [r0, #28] +2049:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 10401 .loc 1 2049 3 is_stmt 1 view .LVU3217 +2049:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 10402 .loc 1 2049 30 is_stmt 0 view .LVU3218 + 10403 001e 0362 str r3, [r0, #32] +2050:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) + 10404 .loc 1 2050 3 is_stmt 1 view .LVU3219 +2050:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) + 10405 .loc 1 2050 38 is_stmt 0 view .LVU3220 + 10406 0020 4362 str r3, [r0, #36] +2051:Src/main.c **** { + 10407 .loc 1 2051 3 is_stmt 1 view .LVU3221 +2051:Src/main.c **** { + 10408 .loc 1 2051 7 is_stmt 0 view .LVU3222 + 10409 0022 FFF7FEFF bl HAL_UART_Init + 10410 .LVL941: +2051:Src/main.c **** { + 10411 .loc 1 2051 6 discriminator 1 view .LVU3223 + 10412 0026 00B9 cbnz r0, .L585 2059:Src/main.c **** - 9788 .loc 1 2059 1 view .LVU3061 - 9789 0170 34B0 add sp, sp, #208 - 9790 .LCFI89: - 9791 .cfi_remember_state - 9792 .cfi_def_cfa_offset 24 - 9793 @ sp needed - 9794 0172 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - 9795 .L523: - 9796 .LCFI90: - 9797 .cfi_restore_state + 10413 .loc 1 2059 1 view .LVU3224 + 10414 0028 08BD pop {r3, pc} + 10415 .L585: +2053:Src/main.c **** } + 10416 .loc 1 2053 5 is_stmt 1 view .LVU3225 + 10417 002a FFF7FEFF bl Error_Handler + 10418 .LVL942: + 10419 .L587: + 10420 002e 00BF .align 2 + 10421 .L586: + 10422 0030 00000000 .word huart8 + 10423 0034 007C0040 .word 1073773568 + 10424 .cfi_endproc + 10425 .LFE1204: + 10427 .section .text.MX_TIM8_Init,"ax",%progbits + 10428 .align 1 + 10429 .syntax unified + 10430 .thumb + 10431 .thumb_func + 10433 MX_TIM8_Init: + 10434 .LFB1200: +1839:Src/main.c **** + 10435 .loc 1 1839 1 view -0 + 10436 .cfi_startproc + 10437 @ args = 0, pretend = 0, frame = 32 + 10438 @ frame_needed = 0, uses_anonymous_args = 0 + 10439 0000 00B5 push {lr} + 10440 .LCFI96: + 10441 .cfi_def_cfa_offset 4 + 10442 .cfi_offset 14, -4 + ARM GAS /tmp/ccLSPxIe.s page 592 + + + 10443 0002 89B0 sub sp, sp, #36 + 10444 .LCFI97: + 10445 .cfi_def_cfa_offset 40 +1845:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 10446 .loc 1 1845 3 view .LVU3227 +1845:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 10447 .loc 1 1845 26 is_stmt 0 view .LVU3228 + 10448 0004 0023 movs r3, #0 + 10449 0006 0493 str r3, [sp, #16] + 10450 0008 0593 str r3, [sp, #20] + 10451 000a 0693 str r3, [sp, #24] + 10452 000c 0793 str r3, [sp, #28] +1846:Src/main.c **** + 10453 .loc 1 1846 3 is_stmt 1 view .LVU3229 +1846:Src/main.c **** + 10454 .loc 1 1846 27 is_stmt 0 view .LVU3230 + 10455 000e 0193 str r3, [sp, #4] + 10456 0010 0293 str r3, [sp, #8] + 10457 0012 0393 str r3, [sp, #12] +1851:Src/main.c **** htim8.Init.Prescaler = 0; + 10458 .loc 1 1851 3 is_stmt 1 view .LVU3231 +1851:Src/main.c **** htim8.Init.Prescaler = 0; + 10459 .loc 1 1851 18 is_stmt 0 view .LVU3232 + 10460 0014 1348 ldr r0, .L596 + 10461 0016 144A ldr r2, .L596+4 + 10462 0018 0260 str r2, [r0] +1852:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + 10463 .loc 1 1852 3 is_stmt 1 view .LVU3233 +1852:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + 10464 .loc 1 1852 24 is_stmt 0 view .LVU3234 + 10465 001a 4360 str r3, [r0, #4] +1853:Src/main.c **** htim8.Init.Period = 91; + 10466 .loc 1 1853 3 is_stmt 1 view .LVU3235 +1853:Src/main.c **** htim8.Init.Period = 91; + 10467 .loc 1 1853 26 is_stmt 0 view .LVU3236 + 10468 001c 8360 str r3, [r0, #8] +1854:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10469 .loc 1 1854 3 is_stmt 1 view .LVU3237 +1854:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10470 .loc 1 1854 21 is_stmt 0 view .LVU3238 + 10471 001e 5B22 movs r2, #91 + 10472 0020 C260 str r2, [r0, #12] +1855:Src/main.c **** htim8.Init.RepetitionCounter = 0; + 10473 .loc 1 1855 3 is_stmt 1 view .LVU3239 +1855:Src/main.c **** htim8.Init.RepetitionCounter = 0; + 10474 .loc 1 1855 28 is_stmt 0 view .LVU3240 + 10475 0022 0361 str r3, [r0, #16] +1856:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10476 .loc 1 1856 3 is_stmt 1 view .LVU3241 +1856:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10477 .loc 1 1856 32 is_stmt 0 view .LVU3242 + 10478 0024 4361 str r3, [r0, #20] +1857:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) + 10479 .loc 1 1857 3 is_stmt 1 view .LVU3243 +1857:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) + 10480 .loc 1 1857 32 is_stmt 0 view .LVU3244 + 10481 0026 8361 str r3, [r0, #24] + ARM GAS /tmp/ccLSPxIe.s page 593 + + +1858:Src/main.c **** { + 10482 .loc 1 1858 3 is_stmt 1 view .LVU3245 +1858:Src/main.c **** { + 10483 .loc 1 1858 7 is_stmt 0 view .LVU3246 + 10484 0028 FFF7FEFF bl HAL_TIM_Base_Init + 10485 .LVL943: +1858:Src/main.c **** { + 10486 .loc 1 1858 6 discriminator 1 view .LVU3247 + 10487 002c 98B9 cbnz r0, .L593 +1862:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + 10488 .loc 1 1862 3 is_stmt 1 view .LVU3248 +1862:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + 10489 .loc 1 1862 34 is_stmt 0 view .LVU3249 + 10490 002e 4FF48053 mov r3, #4096 + 10491 0032 0493 str r3, [sp, #16] +1863:Src/main.c **** { + 10492 .loc 1 1863 3 is_stmt 1 view .LVU3250 +1863:Src/main.c **** { + 10493 .loc 1 1863 7 is_stmt 0 view .LVU3251 + 10494 0034 04A9 add r1, sp, #16 + 10495 0036 0B48 ldr r0, .L596 + 10496 0038 FFF7FEFF bl HAL_TIM_ConfigClockSource + 10497 .LVL944: +1863:Src/main.c **** { + 10498 .loc 1 1863 6 discriminator 1 view .LVU3252 + 10499 003c 68B9 cbnz r0, .L594 +1867:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 10500 .loc 1 1867 3 is_stmt 1 view .LVU3253 +1867:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 10501 .loc 1 1867 37 is_stmt 0 view .LVU3254 + 10502 003e 0023 movs r3, #0 + 10503 0040 0193 str r3, [sp, #4] +1868:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 10504 .loc 1 1868 3 is_stmt 1 view .LVU3255 +1868:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 10505 .loc 1 1868 38 is_stmt 0 view .LVU3256 + 10506 0042 0293 str r3, [sp, #8] +1869:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) + 10507 .loc 1 1869 3 is_stmt 1 view .LVU3257 +1869:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) + 10508 .loc 1 1869 33 is_stmt 0 view .LVU3258 + 10509 0044 0393 str r3, [sp, #12] +1870:Src/main.c **** { + 10510 .loc 1 1870 3 is_stmt 1 view .LVU3259 +1870:Src/main.c **** { + 10511 .loc 1 1870 7 is_stmt 0 view .LVU3260 + 10512 0046 01A9 add r1, sp, #4 + 10513 0048 0648 ldr r0, .L596 + 10514 004a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 10515 .LVL945: +1870:Src/main.c **** { + 10516 .loc 1 1870 6 discriminator 1 view .LVU3261 + 10517 004e 30B9 cbnz r0, .L595 +1878:Src/main.c **** + 10518 .loc 1 1878 1 view .LVU3262 + 10519 0050 09B0 add sp, sp, #36 + 10520 .LCFI98: + ARM GAS /tmp/ccLSPxIe.s page 594 + + + 10521 .cfi_remember_state + 10522 .cfi_def_cfa_offset 4 + 10523 @ sp needed + 10524 0052 5DF804FB ldr pc, [sp], #4 + 10525 .L593: + 10526 .LCFI99: + 10527 .cfi_restore_state +1860:Src/main.c **** } + 10528 .loc 1 1860 5 is_stmt 1 view .LVU3263 + 10529 0056 FFF7FEFF bl Error_Handler + 10530 .LVL946: + 10531 .L594: +1865:Src/main.c **** } + 10532 .loc 1 1865 5 view .LVU3264 + 10533 005a FFF7FEFF bl Error_Handler + 10534 .LVL947: + 10535 .L595: +1872:Src/main.c **** } + 10536 .loc 1 1872 5 view .LVU3265 + 10537 005e FFF7FEFF bl Error_Handler + 10538 .LVL948: + 10539 .L597: + 10540 0062 00BF .align 2 + 10541 .L596: + 10542 0064 00000000 .word htim8 + 10543 0068 00040140 .word 1073808384 + 10544 .cfi_endproc + 10545 .LFE1200: + 10547 .section .text.MX_TIM11_Init,"ax",%progbits + 10548 .align 1 + 10549 .syntax unified + 10550 .thumb + 10551 .thumb_func + 10553 MX_TIM11_Init: + 10554 .LFB1202: +1917:Src/main.c **** + 10555 .loc 1 1917 1 view -0 + 10556 .cfi_startproc + 10557 @ args = 0, pretend = 0, frame = 32 + 10558 @ frame_needed = 0, uses_anonymous_args = 0 + 10559 0000 00B5 push {lr} + 10560 .LCFI100: + 10561 .cfi_def_cfa_offset 4 + 10562 .cfi_offset 14, -4 + 10563 0002 89B0 sub sp, sp, #36 + 10564 .LCFI101: + 10565 .cfi_def_cfa_offset 40 +1923:Src/main.c **** + 10566 .loc 1 1923 3 view .LVU3267 +1923:Src/main.c **** + 10567 .loc 1 1923 22 is_stmt 0 view .LVU3268 + 10568 0004 0023 movs r3, #0 + 10569 0006 0193 str r3, [sp, #4] + 10570 0008 0293 str r3, [sp, #8] + 10571 000a 0393 str r3, [sp, #12] + 10572 000c 0493 str r3, [sp, #16] + 10573 000e 0593 str r3, [sp, #20] + ARM GAS /tmp/ccLSPxIe.s page 595 + + + 10574 0010 0693 str r3, [sp, #24] + 10575 0012 0793 str r3, [sp, #28] +1928:Src/main.c **** htim11.Init.Prescaler = 1; + 10576 .loc 1 1928 3 is_stmt 1 view .LVU3269 +1928:Src/main.c **** htim11.Init.Prescaler = 1; + 10577 .loc 1 1928 19 is_stmt 0 view .LVU3270 + 10578 0014 1448 ldr r0, .L606 + 10579 0016 154A ldr r2, .L606+4 + 10580 0018 0260 str r2, [r0] +1929:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + 10581 .loc 1 1929 3 is_stmt 1 view .LVU3271 +1929:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + 10582 .loc 1 1929 25 is_stmt 0 view .LVU3272 + 10583 001a 0122 movs r2, #1 + 10584 001c 4260 str r2, [r0, #4] +1930:Src/main.c **** htim11.Init.Period = 91; + 10585 .loc 1 1930 3 is_stmt 1 view .LVU3273 +1930:Src/main.c **** htim11.Init.Period = 91; + 10586 .loc 1 1930 27 is_stmt 0 view .LVU3274 + 10587 001e 8360 str r3, [r0, #8] +1931:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10588 .loc 1 1931 3 is_stmt 1 view .LVU3275 +1931:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10589 .loc 1 1931 22 is_stmt 0 view .LVU3276 + 10590 0020 5B22 movs r2, #91 + 10591 0022 C260 str r2, [r0, #12] +1932:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 10592 .loc 1 1932 3 is_stmt 1 view .LVU3277 +1932:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 10593 .loc 1 1932 29 is_stmt 0 view .LVU3278 + 10594 0024 0361 str r3, [r0, #16] +1933:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) + 10595 .loc 1 1933 3 is_stmt 1 view .LVU3279 +1933:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) + 10596 .loc 1 1933 33 is_stmt 0 view .LVU3280 + 10597 0026 8023 movs r3, #128 + 10598 0028 8361 str r3, [r0, #24] +1934:Src/main.c **** { + 10599 .loc 1 1934 3 is_stmt 1 view .LVU3281 +1934:Src/main.c **** { + 10600 .loc 1 1934 7 is_stmt 0 view .LVU3282 + 10601 002a FFF7FEFF bl HAL_TIM_Base_Init + 10602 .LVL949: +1934:Src/main.c **** { + 10603 .loc 1 1934 6 discriminator 1 view .LVU3283 + 10604 002e A8B9 cbnz r0, .L603 +1938:Src/main.c **** { + 10605 .loc 1 1938 3 is_stmt 1 view .LVU3284 +1938:Src/main.c **** { + 10606 .loc 1 1938 7 is_stmt 0 view .LVU3285 + 10607 0030 0D48 ldr r0, .L606 + 10608 0032 FFF7FEFF bl HAL_TIM_PWM_Init + 10609 .LVL950: +1938:Src/main.c **** { + 10610 .loc 1 1938 6 discriminator 1 view .LVU3286 + 10611 0036 98B9 cbnz r0, .L604 +1942:Src/main.c **** sConfigOC.Pulse = 91; + ARM GAS /tmp/ccLSPxIe.s page 596 + + + 10612 .loc 1 1942 3 is_stmt 1 view .LVU3287 +1942:Src/main.c **** sConfigOC.Pulse = 91; + 10613 .loc 1 1942 20 is_stmt 0 view .LVU3288 + 10614 0038 6023 movs r3, #96 + 10615 003a 0193 str r3, [sp, #4] +1943:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10616 .loc 1 1943 3 is_stmt 1 view .LVU3289 +1943:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10617 .loc 1 1943 19 is_stmt 0 view .LVU3290 + 10618 003c 5B23 movs r3, #91 + 10619 003e 0293 str r3, [sp, #8] +1944:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10620 .loc 1 1944 3 is_stmt 1 view .LVU3291 +1944:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10621 .loc 1 1944 24 is_stmt 0 view .LVU3292 + 10622 0040 0022 movs r2, #0 + 10623 0042 0392 str r2, [sp, #12] +1945:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 10624 .loc 1 1945 3 is_stmt 1 view .LVU3293 +1945:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 10625 .loc 1 1945 24 is_stmt 0 view .LVU3294 + 10626 0044 0592 str r2, [sp, #20] +1946:Src/main.c **** { + 10627 .loc 1 1946 3 is_stmt 1 view .LVU3295 +1946:Src/main.c **** { + 10628 .loc 1 1946 7 is_stmt 0 view .LVU3296 + 10629 0046 01A9 add r1, sp, #4 + 10630 0048 0748 ldr r0, .L606 + 10631 004a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 10632 .LVL951: +1946:Src/main.c **** { + 10633 .loc 1 1946 6 discriminator 1 view .LVU3297 + 10634 004e 48B9 cbnz r0, .L605 +1953:Src/main.c **** + 10635 .loc 1 1953 3 is_stmt 1 view .LVU3298 + 10636 0050 0548 ldr r0, .L606 + 10637 0052 FFF7FEFF bl HAL_TIM_MspPostInit + 10638 .LVL952: +1955:Src/main.c **** + 10639 .loc 1 1955 1 is_stmt 0 view .LVU3299 + 10640 0056 09B0 add sp, sp, #36 + 10641 .LCFI102: + 10642 .cfi_remember_state + 10643 .cfi_def_cfa_offset 4 + 10644 @ sp needed + 10645 0058 5DF804FB ldr pc, [sp], #4 + 10646 .L603: + 10647 .LCFI103: + 10648 .cfi_restore_state +1936:Src/main.c **** } + 10649 .loc 1 1936 5 is_stmt 1 view .LVU3300 + 10650 005c FFF7FEFF bl Error_Handler + 10651 .LVL953: + 10652 .L604: +1940:Src/main.c **** } + 10653 .loc 1 1940 5 view .LVU3301 + 10654 0060 FFF7FEFF bl Error_Handler + ARM GAS /tmp/ccLSPxIe.s page 597 + + + 10655 .LVL954: + 10656 .L605: +1948:Src/main.c **** } + 10657 .loc 1 1948 5 view .LVU3302 + 10658 0064 FFF7FEFF bl Error_Handler + 10659 .LVL955: + 10660 .L607: + 10661 .align 2 + 10662 .L606: + 10663 0068 00000000 .word htim11 + 10664 006c 00480140 .word 1073825792 + 10665 .cfi_endproc + 10666 .LFE1202: + 10668 .section .text.MX_TIM4_Init,"ax",%progbits + 10669 .align 1 + 10670 .syntax unified + 10671 .thumb + 10672 .thumb_func + 10674 MX_TIM4_Init: + 10675 .LFB1196: +1667:Src/main.c **** + 10676 .loc 1 1667 1 view -0 + 10677 .cfi_startproc + 10678 @ args = 0, pretend = 0, frame = 56 + 10679 @ frame_needed = 0, uses_anonymous_args = 0 + 10680 0000 00B5 push {lr} + 10681 .LCFI104: + 10682 .cfi_def_cfa_offset 4 + 10683 .cfi_offset 14, -4 + 10684 0002 8FB0 sub sp, sp, #60 + 10685 .LCFI105: + 10686 .cfi_def_cfa_offset 64 +1673:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 10687 .loc 1 1673 3 view .LVU3304 +1673:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 10688 .loc 1 1673 26 is_stmt 0 view .LVU3305 + 10689 0004 0023 movs r3, #0 + 10690 0006 0A93 str r3, [sp, #40] + 10691 0008 0B93 str r3, [sp, #44] + 10692 000a 0C93 str r3, [sp, #48] + 10693 000c 0D93 str r3, [sp, #52] +1674:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 10694 .loc 1 1674 3 is_stmt 1 view .LVU3306 +1674:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 10695 .loc 1 1674 27 is_stmt 0 view .LVU3307 + 10696 000e 0793 str r3, [sp, #28] + 10697 0010 0893 str r3, [sp, #32] + 10698 0012 0993 str r3, [sp, #36] +1675:Src/main.c **** + 10699 .loc 1 1675 3 is_stmt 1 view .LVU3308 +1675:Src/main.c **** + 10700 .loc 1 1675 22 is_stmt 0 view .LVU3309 + 10701 0014 0093 str r3, [sp] + 10702 0016 0193 str r3, [sp, #4] + 10703 0018 0293 str r3, [sp, #8] + 10704 001a 0393 str r3, [sp, #12] + 10705 001c 0493 str r3, [sp, #16] + ARM GAS /tmp/ccLSPxIe.s page 598 + + + 10706 001e 0593 str r3, [sp, #20] + 10707 0020 0693 str r3, [sp, #24] +1680:Src/main.c **** htim4.Init.Prescaler = 0; + 10708 .loc 1 1680 3 is_stmt 1 view .LVU3310 +1680:Src/main.c **** htim4.Init.Prescaler = 0; + 10709 .loc 1 1680 18 is_stmt 0 view .LVU3311 + 10710 0022 1E48 ldr r0, .L620 + 10711 0024 1E4A ldr r2, .L620+4 + 10712 0026 0260 str r2, [r0] +1681:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 10713 .loc 1 1681 3 is_stmt 1 view .LVU3312 +1681:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 10714 .loc 1 1681 24 is_stmt 0 view .LVU3313 + 10715 0028 4360 str r3, [r0, #4] +1682:Src/main.c **** htim4.Init.Period = 45; + 10716 .loc 1 1682 3 is_stmt 1 view .LVU3314 +1682:Src/main.c **** htim4.Init.Period = 45; + 10717 .loc 1 1682 26 is_stmt 0 view .LVU3315 + 10718 002a 8360 str r3, [r0, #8] +1683:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10719 .loc 1 1683 3 is_stmt 1 view .LVU3316 +1683:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10720 .loc 1 1683 21 is_stmt 0 view .LVU3317 + 10721 002c 2D22 movs r2, #45 + 10722 002e C260 str r2, [r0, #12] +1684:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10723 .loc 1 1684 3 is_stmt 1 view .LVU3318 +1684:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10724 .loc 1 1684 28 is_stmt 0 view .LVU3319 + 10725 0030 0361 str r3, [r0, #16] +1685:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + 10726 .loc 1 1685 3 is_stmt 1 view .LVU3320 +1685:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + 10727 .loc 1 1685 32 is_stmt 0 view .LVU3321 + 10728 0032 8361 str r3, [r0, #24] +1686:Src/main.c **** { + 10729 .loc 1 1686 3 is_stmt 1 view .LVU3322 +1686:Src/main.c **** { + 10730 .loc 1 1686 7 is_stmt 0 view .LVU3323 + 10731 0034 FFF7FEFF bl HAL_TIM_Base_Init + 10732 .LVL956: +1686:Src/main.c **** { + 10733 .loc 1 1686 6 discriminator 1 view .LVU3324 + 10734 0038 30BB cbnz r0, .L615 +1690:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + 10735 .loc 1 1690 3 is_stmt 1 view .LVU3325 +1690:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + 10736 .loc 1 1690 34 is_stmt 0 view .LVU3326 + 10737 003a 4FF48053 mov r3, #4096 + 10738 003e 0A93 str r3, [sp, #40] +1691:Src/main.c **** { + 10739 .loc 1 1691 3 is_stmt 1 view .LVU3327 +1691:Src/main.c **** { + 10740 .loc 1 1691 7 is_stmt 0 view .LVU3328 + 10741 0040 0AA9 add r1, sp, #40 + 10742 0042 1648 ldr r0, .L620 + 10743 0044 FFF7FEFF bl HAL_TIM_ConfigClockSource + ARM GAS /tmp/ccLSPxIe.s page 599 + + + 10744 .LVL957: +1691:Src/main.c **** { + 10745 .loc 1 1691 6 discriminator 1 view .LVU3329 + 10746 0048 00BB cbnz r0, .L616 +1695:Src/main.c **** { + 10747 .loc 1 1695 3 is_stmt 1 view .LVU3330 +1695:Src/main.c **** { + 10748 .loc 1 1695 7 is_stmt 0 view .LVU3331 + 10749 004a 1448 ldr r0, .L620 + 10750 004c FFF7FEFF bl HAL_TIM_PWM_Init + 10751 .LVL958: +1695:Src/main.c **** { + 10752 .loc 1 1695 6 discriminator 1 view .LVU3332 + 10753 0050 F0B9 cbnz r0, .L617 +1699:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 10754 .loc 1 1699 3 is_stmt 1 view .LVU3333 +1699:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 10755 .loc 1 1699 37 is_stmt 0 view .LVU3334 + 10756 0052 0023 movs r3, #0 + 10757 0054 0793 str r3, [sp, #28] +1700:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + 10758 .loc 1 1700 3 is_stmt 1 view .LVU3335 +1700:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + 10759 .loc 1 1700 33 is_stmt 0 view .LVU3336 + 10760 0056 0993 str r3, [sp, #36] +1701:Src/main.c **** { + 10761 .loc 1 1701 3 is_stmt 1 view .LVU3337 +1701:Src/main.c **** { + 10762 .loc 1 1701 7 is_stmt 0 view .LVU3338 + 10763 0058 07A9 add r1, sp, #28 + 10764 005a 1048 ldr r0, .L620 + 10765 005c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization + 10766 .LVL959: +1701:Src/main.c **** { + 10767 .loc 1 1701 6 discriminator 1 view .LVU3339 + 10768 0060 C0B9 cbnz r0, .L618 +1705:Src/main.c **** sConfigOC.Pulse = 22; + 10769 .loc 1 1705 3 is_stmt 1 view .LVU3340 +1705:Src/main.c **** sConfigOC.Pulse = 22; + 10770 .loc 1 1705 20 is_stmt 0 view .LVU3341 + 10771 0062 6023 movs r3, #96 + 10772 0064 0093 str r3, [sp] +1706:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10773 .loc 1 1706 3 is_stmt 1 view .LVU3342 +1706:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10774 .loc 1 1706 19 is_stmt 0 view .LVU3343 + 10775 0066 1623 movs r3, #22 + 10776 0068 0193 str r3, [sp, #4] +1707:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10777 .loc 1 1707 3 is_stmt 1 view .LVU3344 +1707:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10778 .loc 1 1707 24 is_stmt 0 view .LVU3345 + 10779 006a 0023 movs r3, #0 + 10780 006c 0293 str r3, [sp, #8] +1708:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 10781 .loc 1 1708 3 is_stmt 1 view .LVU3346 +1708:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + ARM GAS /tmp/ccLSPxIe.s page 600 + + + 10782 .loc 1 1708 24 is_stmt 0 view .LVU3347 + 10783 006e 0493 str r3, [sp, #16] +1709:Src/main.c **** { + 10784 .loc 1 1709 3 is_stmt 1 view .LVU3348 +1709:Src/main.c **** { + 10785 .loc 1 1709 7 is_stmt 0 view .LVU3349 + 10786 0070 0822 movs r2, #8 + 10787 0072 6946 mov r1, sp + 10788 0074 0948 ldr r0, .L620 + 10789 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 10790 .LVL960: +1709:Src/main.c **** { + 10791 .loc 1 1709 6 discriminator 1 view .LVU3350 + 10792 007a 68B9 cbnz r0, .L619 +1716:Src/main.c **** + 10793 .loc 1 1716 3 is_stmt 1 view .LVU3351 + 10794 007c 0748 ldr r0, .L620 + 10795 007e FFF7FEFF bl HAL_TIM_MspPostInit + 10796 .LVL961: +1718:Src/main.c **** + 10797 .loc 1 1718 1 is_stmt 0 view .LVU3352 + 10798 0082 0FB0 add sp, sp, #60 + 10799 .LCFI106: + 10800 .cfi_remember_state + 10801 .cfi_def_cfa_offset 4 + 10802 @ sp needed + 10803 0084 5DF804FB ldr pc, [sp], #4 + 10804 .L615: + 10805 .LCFI107: + 10806 .cfi_restore_state +1688:Src/main.c **** } + 10807 .loc 1 1688 5 is_stmt 1 view .LVU3353 + 10808 0088 FFF7FEFF bl Error_Handler + 10809 .LVL962: + 10810 .L616: +1693:Src/main.c **** } + 10811 .loc 1 1693 5 view .LVU3354 + 10812 008c FFF7FEFF bl Error_Handler + 10813 .LVL963: + 10814 .L617: +1697:Src/main.c **** } + 10815 .loc 1 1697 5 view .LVU3355 + 10816 0090 FFF7FEFF bl Error_Handler + 10817 .LVL964: + 10818 .L618: +1703:Src/main.c **** } + 10819 .loc 1 1703 5 view .LVU3356 + 10820 0094 FFF7FEFF bl Error_Handler + 10821 .LVL965: + 10822 .L619: +1711:Src/main.c **** } + 10823 .loc 1 1711 5 view .LVU3357 + 10824 0098 FFF7FEFF bl Error_Handler + 10825 .LVL966: + 10826 .L621: + 10827 .align 2 + 10828 .L620: + ARM GAS /tmp/ccLSPxIe.s page 601 + + + 10829 009c 00000000 .word htim4 + 10830 00a0 00080040 .word 1073743872 + 10831 .cfi_endproc + 10832 .LFE1196: + 10834 .section .text.MX_TIM1_Init,"ax",%progbits + 10835 .align 1 + 10836 .syntax unified + 10837 .thumb + 10838 .thumb_func + 10840 MX_TIM1_Init: + 10841 .LFB1203: +1963:Src/main.c **** + 10842 .loc 1 1963 1 view -0 + 10843 .cfi_startproc + 10844 @ args = 0, pretend = 0, frame = 88 + 10845 @ frame_needed = 0, uses_anonymous_args = 0 + 10846 0000 10B5 push {r4, lr} + 10847 .LCFI108: + 10848 .cfi_def_cfa_offset 8 + 10849 .cfi_offset 4, -8 + 10850 .cfi_offset 14, -4 + 10851 0002 96B0 sub sp, sp, #88 + 10852 .LCFI109: + 10853 .cfi_def_cfa_offset 96 +1969:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 10854 .loc 1 1969 3 view .LVU3359 +1969:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 10855 .loc 1 1969 26 is_stmt 0 view .LVU3360 + 10856 0004 0024 movs r4, #0 + 10857 0006 1294 str r4, [sp, #72] + 10858 0008 1394 str r4, [sp, #76] + 10859 000a 1494 str r4, [sp, #80] + 10860 000c 1594 str r4, [sp, #84] +1970:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + 10861 .loc 1 1970 3 is_stmt 1 view .LVU3361 +1970:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; + 10862 .loc 1 1970 22 is_stmt 0 view .LVU3362 + 10863 000e 0B94 str r4, [sp, #44] + 10864 0010 0C94 str r4, [sp, #48] + 10865 0012 0D94 str r4, [sp, #52] + 10866 0014 0E94 str r4, [sp, #56] + 10867 0016 0F94 str r4, [sp, #60] + 10868 0018 1094 str r4, [sp, #64] + 10869 001a 1194 str r4, [sp, #68] +1971:Src/main.c **** + 10870 .loc 1 1971 3 is_stmt 1 view .LVU3363 +1971:Src/main.c **** + 10871 .loc 1 1971 34 is_stmt 0 view .LVU3364 + 10872 001c 2C22 movs r2, #44 + 10873 001e 2146 mov r1, r4 + 10874 0020 6846 mov r0, sp + 10875 0022 FFF7FEFF bl memset + 10876 .LVL967: +1976:Src/main.c **** htim1.Init.Prescaler = 0; + 10877 .loc 1 1976 3 is_stmt 1 view .LVU3365 +1976:Src/main.c **** htim1.Init.Prescaler = 0; + 10878 .loc 1 1976 18 is_stmt 0 view .LVU3366 + ARM GAS /tmp/ccLSPxIe.s page 602 + + + 10879 0026 2548 ldr r0, .L634 + 10880 0028 254B ldr r3, .L634+4 + 10881 002a 0360 str r3, [r0] +1977:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; + 10882 .loc 1 1977 3 is_stmt 1 view .LVU3367 +1977:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; + 10883 .loc 1 1977 24 is_stmt 0 view .LVU3368 + 10884 002c 4460 str r4, [r0, #4] +1978:Src/main.c **** htim1.Init.Period = 8; + 10885 .loc 1 1978 3 is_stmt 1 view .LVU3369 +1978:Src/main.c **** htim1.Init.Period = 8; + 10886 .loc 1 1978 26 is_stmt 0 view .LVU3370 + 10887 002e 8460 str r4, [r0, #8] +1979:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10888 .loc 1 1979 3 is_stmt 1 view .LVU3371 +1979:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 10889 .loc 1 1979 21 is_stmt 0 view .LVU3372 + 10890 0030 0823 movs r3, #8 + 10891 0032 C360 str r3, [r0, #12] +1980:Src/main.c **** htim1.Init.RepetitionCounter = 0; + 10892 .loc 1 1980 3 is_stmt 1 view .LVU3373 +1980:Src/main.c **** htim1.Init.RepetitionCounter = 0; + 10893 .loc 1 1980 28 is_stmt 0 view .LVU3374 + 10894 0034 0461 str r4, [r0, #16] +1981:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10895 .loc 1 1981 3 is_stmt 1 view .LVU3375 +1981:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 10896 .loc 1 1981 32 is_stmt 0 view .LVU3376 + 10897 0036 4461 str r4, [r0, #20] +1982:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) + 10898 .loc 1 1982 3 is_stmt 1 view .LVU3377 +1982:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) + 10899 .loc 1 1982 32 is_stmt 0 view .LVU3378 + 10900 0038 8461 str r4, [r0, #24] +1983:Src/main.c **** { + 10901 .loc 1 1983 3 is_stmt 1 view .LVU3379 +1983:Src/main.c **** { + 10902 .loc 1 1983 7 is_stmt 0 view .LVU3380 + 10903 003a FFF7FEFF bl HAL_TIM_Base_Init + 10904 .LVL968: +1983:Src/main.c **** { + 10905 .loc 1 1983 6 discriminator 1 view .LVU3381 + 10906 003e 0028 cmp r0, #0 + 10907 0040 32D1 bne .L629 +1987:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) + 10908 .loc 1 1987 3 is_stmt 1 view .LVU3382 +1987:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) + 10909 .loc 1 1987 34 is_stmt 0 view .LVU3383 + 10910 0042 4FF48053 mov r3, #4096 + 10911 0046 1293 str r3, [sp, #72] +1988:Src/main.c **** { + 10912 .loc 1 1988 3 is_stmt 1 view .LVU3384 +1988:Src/main.c **** { + 10913 .loc 1 1988 7 is_stmt 0 view .LVU3385 + 10914 0048 12A9 add r1, sp, #72 + 10915 004a 1C48 ldr r0, .L634 + 10916 004c FFF7FEFF bl HAL_TIM_ConfigClockSource + ARM GAS /tmp/ccLSPxIe.s page 603 + + + 10917 .LVL969: +1988:Src/main.c **** { + 10918 .loc 1 1988 6 discriminator 1 view .LVU3386 + 10919 0050 0028 cmp r0, #0 + 10920 0052 2BD1 bne .L630 +1992:Src/main.c **** { + 10921 .loc 1 1992 3 is_stmt 1 view .LVU3387 +1992:Src/main.c **** { + 10922 .loc 1 1992 7 is_stmt 0 view .LVU3388 + 10923 0054 1948 ldr r0, .L634 + 10924 0056 FFF7FEFF bl HAL_TIM_PWM_Init + 10925 .LVL970: +1992:Src/main.c **** { + 10926 .loc 1 1992 6 discriminator 1 view .LVU3389 + 10927 005a 48BB cbnz r0, .L631 +1996:Src/main.c **** sConfigOC.Pulse = 4; + 10928 .loc 1 1996 3 is_stmt 1 view .LVU3390 +1996:Src/main.c **** sConfigOC.Pulse = 4; + 10929 .loc 1 1996 20 is_stmt 0 view .LVU3391 + 10930 005c 6023 movs r3, #96 + 10931 005e 0B93 str r3, [sp, #44] +1997:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10932 .loc 1 1997 3 is_stmt 1 view .LVU3392 +1997:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 10933 .loc 1 1997 19 is_stmt 0 view .LVU3393 + 10934 0060 0423 movs r3, #4 + 10935 0062 0C93 str r3, [sp, #48] +1998:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10936 .loc 1 1998 3 is_stmt 1 view .LVU3394 +1998:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 10937 .loc 1 1998 24 is_stmt 0 view .LVU3395 + 10938 0064 0022 movs r2, #0 + 10939 0066 0D92 str r2, [sp, #52] +1999:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 10940 .loc 1 1999 3 is_stmt 1 view .LVU3396 +1999:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 10941 .loc 1 1999 24 is_stmt 0 view .LVU3397 + 10942 0068 0F92 str r2, [sp, #60] +2000:Src/main.c **** { + 10943 .loc 1 2000 3 is_stmt 1 view .LVU3398 +2000:Src/main.c **** { + 10944 .loc 1 2000 7 is_stmt 0 view .LVU3399 + 10945 006a 0BA9 add r1, sp, #44 + 10946 006c 1348 ldr r0, .L634 + 10947 006e FFF7FEFF bl HAL_TIM_PWM_ConfigChannel + 10948 .LVL971: +2000:Src/main.c **** { + 10949 .loc 1 2000 6 discriminator 1 view .LVU3400 + 10950 0072 F8B9 cbnz r0, .L632 +2004:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 10951 .loc 1 2004 3 is_stmt 1 view .LVU3401 +2004:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; + 10952 .loc 1 2004 40 is_stmt 0 view .LVU3402 + 10953 0074 0023 movs r3, #0 + 10954 0076 0093 str r3, [sp] +2005:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 10955 .loc 1 2005 3 is_stmt 1 view .LVU3403 + ARM GAS /tmp/ccLSPxIe.s page 604 + + +2005:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; + 10956 .loc 1 2005 41 is_stmt 0 view .LVU3404 + 10957 0078 0193 str r3, [sp, #4] +2006:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; + 10958 .loc 1 2006 3 is_stmt 1 view .LVU3405 +2006:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; + 10959 .loc 1 2006 34 is_stmt 0 view .LVU3406 + 10960 007a 0293 str r3, [sp, #8] +2007:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 10961 .loc 1 2007 3 is_stmt 1 view .LVU3407 +2007:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; + 10962 .loc 1 2007 33 is_stmt 0 view .LVU3408 + 10963 007c 0393 str r3, [sp, #12] +2008:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 10964 .loc 1 2008 3 is_stmt 1 view .LVU3409 +2008:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; + 10965 .loc 1 2008 35 is_stmt 0 view .LVU3410 + 10966 007e 0493 str r3, [sp, #16] +2009:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; + 10967 .loc 1 2009 3 is_stmt 1 view .LVU3411 +2009:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; + 10968 .loc 1 2009 38 is_stmt 0 view .LVU3412 + 10969 0080 4FF40052 mov r2, #8192 + 10970 0084 0592 str r2, [sp, #20] +2010:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; + 10971 .loc 1 2010 3 is_stmt 1 view .LVU3413 +2010:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; + 10972 .loc 1 2010 36 is_stmt 0 view .LVU3414 + 10973 0086 0693 str r3, [sp, #24] +2011:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + 10974 .loc 1 2011 3 is_stmt 1 view .LVU3415 +2011:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; + 10975 .loc 1 2011 36 is_stmt 0 view .LVU3416 + 10976 0088 0793 str r3, [sp, #28] +2012:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; + 10977 .loc 1 2012 3 is_stmt 1 view .LVU3417 +2012:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; + 10978 .loc 1 2012 39 is_stmt 0 view .LVU3418 + 10979 008a 4FF00072 mov r2, #33554432 + 10980 008e 0892 str r2, [sp, #32] +2013:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 10981 .loc 1 2013 3 is_stmt 1 view .LVU3419 +2013:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; + 10982 .loc 1 2013 37 is_stmt 0 view .LVU3420 + 10983 0090 0993 str r3, [sp, #36] +2014:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) + 10984 .loc 1 2014 3 is_stmt 1 view .LVU3421 +2014:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) + 10985 .loc 1 2014 40 is_stmt 0 view .LVU3422 + 10986 0092 0A93 str r3, [sp, #40] +2015:Src/main.c **** { + 10987 .loc 1 2015 3 is_stmt 1 view .LVU3423 +2015:Src/main.c **** { + 10988 .loc 1 2015 7 is_stmt 0 view .LVU3424 + 10989 0094 6946 mov r1, sp + 10990 0096 0948 ldr r0, .L634 + 10991 0098 FFF7FEFF bl HAL_TIMEx_ConfigBreakDeadTime + ARM GAS /tmp/ccLSPxIe.s page 605 + + + 10992 .LVL972: +2015:Src/main.c **** { + 10993 .loc 1 2015 6 discriminator 1 view .LVU3425 + 10994 009c 60B9 cbnz r0, .L633 +2022:Src/main.c **** + 10995 .loc 1 2022 3 is_stmt 1 view .LVU3426 + 10996 009e 0748 ldr r0, .L634 + 10997 00a0 FFF7FEFF bl HAL_TIM_MspPostInit + 10998 .LVL973: +2024:Src/main.c **** + 10999 .loc 1 2024 1 is_stmt 0 view .LVU3427 + 11000 00a4 16B0 add sp, sp, #88 + 11001 .LCFI110: + 11002 .cfi_remember_state + 11003 .cfi_def_cfa_offset 8 + 11004 @ sp needed + 11005 00a6 10BD pop {r4, pc} + 11006 .L629: + 11007 .LCFI111: + 11008 .cfi_restore_state +1985:Src/main.c **** } + 11009 .loc 1 1985 5 is_stmt 1 view .LVU3428 + 11010 00a8 FFF7FEFF bl Error_Handler + 11011 .LVL974: + 11012 .L630: 1990:Src/main.c **** } - 9798 .loc 1 1990 5 is_stmt 1 view .LVU3062 - 9799 0176 FFF7FEFF bl Error_Handler - 9800 .LVL900: - 9801 .L525: - 9802 017a 00BF .align 2 - 9803 .L524: - 9804 017c 00380240 .word 1073887232 - 9805 0180 00000240 .word 1073872896 - 9806 0184 00640240 .word 1073898496 - 9807 0188 00ED00E0 .word -536810240 - 9808 018c 00E100E0 .word -536813312 - 9809 .cfi_endproc - 9810 .LFE1205: - 9812 .section .text.MX_TIM10_Init,"ax",%progbits - 9813 .align 1 - 9814 .syntax unified - 9815 .thumb - 9816 .thumb_func - 9818 MX_TIM10_Init: - 9819 .LFB1201: -1792:Src/main.c **** - 9820 .loc 1 1792 1 view -0 - 9821 .cfi_startproc - 9822 @ args = 0, pretend = 0, frame = 0 - 9823 @ frame_needed = 0, uses_anonymous_args = 0 - 9824 0000 08B5 push {r3, lr} - 9825 .LCFI91: - 9826 .cfi_def_cfa_offset 8 - 9827 .cfi_offset 3, -8 - 9828 .cfi_offset 14, -4 -1801:Src/main.c **** htim10.Init.Prescaler = 183; - 9829 .loc 1 1801 3 view .LVU3064 -1801:Src/main.c **** htim10.Init.Prescaler = 183; - 9830 .loc 1 1801 19 is_stmt 0 view .LVU3065 - 9831 0002 0848 ldr r0, .L530 - 9832 0004 084B ldr r3, .L530+4 - 9833 0006 0360 str r3, [r0] - ARM GAS /tmp/ccuHnxNu.s page 575 + 11013 .loc 1 1990 5 view .LVU3429 + 11014 00ac FFF7FEFF bl Error_Handler + 11015 .LVL975: + 11016 .L631: +1994:Src/main.c **** } + 11017 .loc 1 1994 5 view .LVU3430 + 11018 00b0 FFF7FEFF bl Error_Handler + 11019 .LVL976: + 11020 .L632: +2002:Src/main.c **** } + 11021 .loc 1 2002 5 view .LVU3431 + 11022 00b4 FFF7FEFF bl Error_Handler + 11023 .LVL977: + 11024 .L633: +2017:Src/main.c **** } + 11025 .loc 1 2017 5 view .LVU3432 + 11026 00b8 FFF7FEFF bl Error_Handler + 11027 .LVL978: + 11028 .L635: + 11029 .align 2 + 11030 .L634: + 11031 00bc 00000000 .word htim1 + 11032 00c0 00000140 .word 1073807360 + 11033 .cfi_endproc + 11034 .LFE1203: + 11036 .section .text.SystemClock_Config,"ax",%progbits + 11037 .align 1 + 11038 .global SystemClock_Config + 11039 .syntax unified + 11040 .thumb + 11041 .thumb_func + ARM GAS /tmp/ccLSPxIe.s page 606 -1802:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; - 9834 .loc 1 1802 3 is_stmt 1 view .LVU3066 -1802:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; - 9835 .loc 1 1802 25 is_stmt 0 view .LVU3067 - 9836 0008 B723 movs r3, #183 - 9837 000a 4360 str r3, [r0, #4] -1803:Src/main.c **** htim10.Init.Period = 9; - 9838 .loc 1 1803 3 is_stmt 1 view .LVU3068 -1803:Src/main.c **** htim10.Init.Period = 9; - 9839 .loc 1 1803 27 is_stmt 0 view .LVU3069 - 9840 000c 0023 movs r3, #0 - 9841 000e 8360 str r3, [r0, #8] -1804:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 9842 .loc 1 1804 3 is_stmt 1 view .LVU3070 -1804:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 9843 .loc 1 1804 22 is_stmt 0 view .LVU3071 - 9844 0010 0922 movs r2, #9 - 9845 0012 C260 str r2, [r0, #12] -1805:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 9846 .loc 1 1805 3 is_stmt 1 view .LVU3072 -1805:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 9847 .loc 1 1805 29 is_stmt 0 view .LVU3073 - 9848 0014 0361 str r3, [r0, #16] -1806:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) - 9849 .loc 1 1806 3 is_stmt 1 view .LVU3074 -1806:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) - 9850 .loc 1 1806 33 is_stmt 0 view .LVU3075 - 9851 0016 8361 str r3, [r0, #24] -1807:Src/main.c **** { - 9852 .loc 1 1807 3 is_stmt 1 view .LVU3076 -1807:Src/main.c **** { - 9853 .loc 1 1807 7 is_stmt 0 view .LVU3077 - 9854 0018 FFF7FEFF bl HAL_TIM_Base_Init - 9855 .LVL901: -1807:Src/main.c **** { - 9856 .loc 1 1807 6 discriminator 1 view .LVU3078 - 9857 001c 00B9 cbnz r0, .L529 -1815:Src/main.c **** - 9858 .loc 1 1815 1 view .LVU3079 - 9859 001e 08BD pop {r3, pc} - 9860 .L529: -1809:Src/main.c **** } - 9861 .loc 1 1809 5 is_stmt 1 view .LVU3080 - 9862 0020 FFF7FEFF bl Error_Handler - 9863 .LVL902: - 9864 .L531: - 9865 .align 2 - 9866 .L530: - 9867 0024 00000000 .word htim10 - 9868 0028 00440140 .word 1073824768 - 9869 .cfi_endproc - 9870 .LFE1201: - 9872 .section .text.MX_UART8_Init,"ax",%progbits - 9873 .align 1 - 9874 .syntax unified - 9875 .thumb - 9876 .thumb_func - ARM GAS /tmp/ccuHnxNu.s page 576 + 11043 SystemClock_Config: + 11044 .LFB1187: +1145:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 11045 .loc 1 1145 1 view -0 + 11046 .cfi_startproc + 11047 @ args = 0, pretend = 0, frame = 80 + 11048 @ frame_needed = 0, uses_anonymous_args = 0 + 11049 0000 00B5 push {lr} + 11050 .LCFI112: + 11051 .cfi_def_cfa_offset 4 + 11052 .cfi_offset 14, -4 + 11053 0002 95B0 sub sp, sp, #84 + 11054 .LCFI113: + 11055 .cfi_def_cfa_offset 88 +1146:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 11056 .loc 1 1146 3 view .LVU3434 +1146:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 11057 .loc 1 1146 22 is_stmt 0 view .LVU3435 + 11058 0004 3422 movs r2, #52 + 11059 0006 0021 movs r1, #0 + 11060 0008 07A8 add r0, sp, #28 + 11061 000a FFF7FEFF bl memset + 11062 .LVL979: +1147:Src/main.c **** + 11063 .loc 1 1147 3 is_stmt 1 view .LVU3436 +1147:Src/main.c **** + 11064 .loc 1 1147 22 is_stmt 0 view .LVU3437 + 11065 000e 0023 movs r3, #0 + 11066 0010 0293 str r3, [sp, #8] + 11067 0012 0393 str r3, [sp, #12] + 11068 0014 0493 str r3, [sp, #16] + 11069 0016 0593 str r3, [sp, #20] + 11070 0018 0693 str r3, [sp, #24] +1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 11071 .loc 1 1151 3 is_stmt 1 view .LVU3438 + 11072 .LBB679: +1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 11073 .loc 1 1151 3 view .LVU3439 +1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 11074 .loc 1 1151 3 view .LVU3440 + 11075 001a 244B ldr r3, .L644 + 11076 001c 1A6C ldr r2, [r3, #64] + 11077 001e 42F08052 orr r2, r2, #268435456 + 11078 0022 1A64 str r2, [r3, #64] +1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 11079 .loc 1 1151 3 view .LVU3441 + 11080 0024 1B6C ldr r3, [r3, #64] + 11081 0026 03F08053 and r3, r3, #268435456 + 11082 002a 0093 str r3, [sp] +1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 11083 .loc 1 1151 3 view .LVU3442 + 11084 002c 009B ldr r3, [sp] + 11085 .LBE679: +1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 11086 .loc 1 1151 3 view .LVU3443 +1152:Src/main.c **** + 11087 .loc 1 1152 3 view .LVU3444 + ARM GAS /tmp/ccLSPxIe.s page 607 - 9878 MX_UART8_Init: - 9879 .LFB1204: -1938:Src/main.c **** - 9880 .loc 1 1938 1 view -0 - 9881 .cfi_startproc - 9882 @ args = 0, pretend = 0, frame = 0 - 9883 @ frame_needed = 0, uses_anonymous_args = 0 - 9884 0000 08B5 push {r3, lr} - 9885 .LCFI92: - 9886 .cfi_def_cfa_offset 8 - 9887 .cfi_offset 3, -8 - 9888 .cfi_offset 14, -4 -1947:Src/main.c **** huart8.Init.BaudRate = 115200; - 9889 .loc 1 1947 3 view .LVU3082 -1947:Src/main.c **** huart8.Init.BaudRate = 115200; - 9890 .loc 1 1947 19 is_stmt 0 view .LVU3083 - 9891 0002 0B48 ldr r0, .L536 - 9892 0004 0B4B ldr r3, .L536+4 - 9893 0006 0360 str r3, [r0] -1948:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; - 9894 .loc 1 1948 3 is_stmt 1 view .LVU3084 -1948:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; - 9895 .loc 1 1948 24 is_stmt 0 view .LVU3085 - 9896 0008 4FF4E133 mov r3, #115200 - 9897 000c 4360 str r3, [r0, #4] -1949:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; - 9898 .loc 1 1949 3 is_stmt 1 view .LVU3086 -1949:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; - 9899 .loc 1 1949 26 is_stmt 0 view .LVU3087 - 9900 000e 0023 movs r3, #0 - 9901 0010 8360 str r3, [r0, #8] -1950:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; - 9902 .loc 1 1950 3 is_stmt 1 view .LVU3088 -1950:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; - 9903 .loc 1 1950 24 is_stmt 0 view .LVU3089 - 9904 0012 C360 str r3, [r0, #12] -1951:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; - 9905 .loc 1 1951 3 is_stmt 1 view .LVU3090 -1951:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; - 9906 .loc 1 1951 22 is_stmt 0 view .LVU3091 - 9907 0014 0361 str r3, [r0, #16] -1952:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 9908 .loc 1 1952 3 is_stmt 1 view .LVU3092 -1952:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 9909 .loc 1 1952 20 is_stmt 0 view .LVU3093 - 9910 0016 0C22 movs r2, #12 - 9911 0018 4261 str r2, [r0, #20] -1953:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; - 9912 .loc 1 1953 3 is_stmt 1 view .LVU3094 -1953:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; - 9913 .loc 1 1953 25 is_stmt 0 view .LVU3095 - 9914 001a 8361 str r3, [r0, #24] -1954:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 9915 .loc 1 1954 3 is_stmt 1 view .LVU3096 -1954:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 9916 .loc 1 1954 28 is_stmt 0 view .LVU3097 - 9917 001c C361 str r3, [r0, #28] - ARM GAS /tmp/ccuHnxNu.s page 577 + 11088 .LBB680: +1152:Src/main.c **** + 11089 .loc 1 1152 3 view .LVU3445 +1152:Src/main.c **** + 11090 .loc 1 1152 3 view .LVU3446 + 11091 002e 204B ldr r3, .L644+4 + 11092 0030 1A68 ldr r2, [r3] + 11093 0032 42F44042 orr r2, r2, #49152 + 11094 0036 1A60 str r2, [r3] +1152:Src/main.c **** + 11095 .loc 1 1152 3 view .LVU3447 + 11096 0038 1B68 ldr r3, [r3] + 11097 003a 03F44043 and r3, r3, #49152 + 11098 003e 0193 str r3, [sp, #4] +1152:Src/main.c **** + 11099 .loc 1 1152 3 view .LVU3448 + 11100 0040 019B ldr r3, [sp, #4] + 11101 .LBE680: +1152:Src/main.c **** + 11102 .loc 1 1152 3 view .LVU3449 +1157:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 11103 .loc 1 1157 3 view .LVU3450 +1157:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 11104 .loc 1 1157 36 is_stmt 0 view .LVU3451 + 11105 0042 0123 movs r3, #1 + 11106 0044 0793 str r3, [sp, #28] +1158:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 11107 .loc 1 1158 3 is_stmt 1 view .LVU3452 +1158:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 11108 .loc 1 1158 30 is_stmt 0 view .LVU3453 + 11109 0046 4FF48033 mov r3, #65536 + 11110 004a 0893 str r3, [sp, #32] +1159:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 11111 .loc 1 1159 3 is_stmt 1 view .LVU3454 +1159:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 11112 .loc 1 1159 34 is_stmt 0 view .LVU3455 + 11113 004c 0223 movs r3, #2 + 11114 004e 0D93 str r3, [sp, #52] +1160:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 11115 .loc 1 1160 3 is_stmt 1 view .LVU3456 +1160:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 11116 .loc 1 1160 35 is_stmt 0 view .LVU3457 + 11117 0050 4FF48002 mov r2, #4194304 + 11118 0054 0E92 str r2, [sp, #56] +1161:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 11119 .loc 1 1161 3 is_stmt 1 view .LVU3458 +1161:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 11120 .loc 1 1161 30 is_stmt 0 view .LVU3459 + 11121 0056 1922 movs r2, #25 + 11122 0058 0F92 str r2, [sp, #60] +1162:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 11123 .loc 1 1162 3 is_stmt 1 view .LVU3460 +1162:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 11124 .loc 1 1162 30 is_stmt 0 view .LVU3461 + 11125 005a 4FF4B872 mov r2, #368 + 11126 005e 1092 str r2, [sp, #64] +1163:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + ARM GAS /tmp/ccLSPxIe.s page 608 -1955:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 9918 .loc 1 1955 3 is_stmt 1 view .LVU3098 -1955:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 9919 .loc 1 1955 30 is_stmt 0 view .LVU3099 - 9920 001e 0362 str r3, [r0, #32] -1956:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) - 9921 .loc 1 1956 3 is_stmt 1 view .LVU3100 -1956:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) - 9922 .loc 1 1956 38 is_stmt 0 view .LVU3101 - 9923 0020 4362 str r3, [r0, #36] -1957:Src/main.c **** { - 9924 .loc 1 1957 3 is_stmt 1 view .LVU3102 -1957:Src/main.c **** { - 9925 .loc 1 1957 7 is_stmt 0 view .LVU3103 - 9926 0022 FFF7FEFF bl HAL_UART_Init - 9927 .LVL903: -1957:Src/main.c **** { - 9928 .loc 1 1957 6 discriminator 1 view .LVU3104 - 9929 0026 00B9 cbnz r0, .L535 -1965:Src/main.c **** - 9930 .loc 1 1965 1 view .LVU3105 - 9931 0028 08BD pop {r3, pc} - 9932 .L535: -1959:Src/main.c **** } - 9933 .loc 1 1959 5 is_stmt 1 view .LVU3106 - 9934 002a FFF7FEFF bl Error_Handler - 9935 .LVL904: - 9936 .L537: - 9937 002e 00BF .align 2 - 9938 .L536: - 9939 0030 00000000 .word huart8 - 9940 0034 007C0040 .word 1073773568 - 9941 .cfi_endproc - 9942 .LFE1204: - 9944 .section .text.MX_TIM8_Init,"ax",%progbits - 9945 .align 1 - 9946 .syntax unified - 9947 .thumb - 9948 .thumb_func - 9950 MX_TIM8_Init: - 9951 .LFB1200: -1745:Src/main.c **** - 9952 .loc 1 1745 1 view -0 - 9953 .cfi_startproc - 9954 @ args = 0, pretend = 0, frame = 32 - 9955 @ frame_needed = 0, uses_anonymous_args = 0 - 9956 0000 00B5 push {lr} - 9957 .LCFI93: - 9958 .cfi_def_cfa_offset 4 - 9959 .cfi_offset 14, -4 - 9960 0002 89B0 sub sp, sp, #36 - 9961 .LCFI94: - 9962 .cfi_def_cfa_offset 40 -1751:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 9963 .loc 1 1751 3 view .LVU3108 -1751:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 9964 .loc 1 1751 26 is_stmt 0 view .LVU3109 - ARM GAS /tmp/ccuHnxNu.s page 578 + 11127 .loc 1 1163 3 is_stmt 1 view .LVU3462 +1163:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 11128 .loc 1 1163 30 is_stmt 0 view .LVU3463 + 11129 0060 1193 str r3, [sp, #68] +1164:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 11130 .loc 1 1164 3 is_stmt 1 view .LVU3464 +1164:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 11131 .loc 1 1164 30 is_stmt 0 view .LVU3465 + 11132 0062 0822 movs r2, #8 + 11133 0064 1292 str r2, [sp, #72] +1165:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 11134 .loc 1 1165 3 is_stmt 1 view .LVU3466 +1165:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 11135 .loc 1 1165 30 is_stmt 0 view .LVU3467 + 11136 0066 1393 str r3, [sp, #76] +1166:Src/main.c **** { + 11137 .loc 1 1166 3 is_stmt 1 view .LVU3468 +1166:Src/main.c **** { + 11138 .loc 1 1166 7 is_stmt 0 view .LVU3469 + 11139 0068 07A8 add r0, sp, #28 + 11140 006a FFF7FEFF bl HAL_RCC_OscConfig + 11141 .LVL980: +1166:Src/main.c **** { + 11142 .loc 1 1166 6 discriminator 1 view .LVU3470 + 11143 006e B0B9 cbnz r0, .L641 +1173:Src/main.c **** { + 11144 .loc 1 1173 3 is_stmt 1 view .LVU3471 +1173:Src/main.c **** { + 11145 .loc 1 1173 7 is_stmt 0 view .LVU3472 + 11146 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive + 11147 .LVL981: +1173:Src/main.c **** { + 11148 .loc 1 1173 6 discriminator 1 view .LVU3473 + 11149 0074 A8B9 cbnz r0, .L642 +1180:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 11150 .loc 1 1180 3 is_stmt 1 view .LVU3474 +1180:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 11151 .loc 1 1180 31 is_stmt 0 view .LVU3475 + 11152 0076 0F23 movs r3, #15 + 11153 0078 0293 str r3, [sp, #8] +1182:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 11154 .loc 1 1182 3 is_stmt 1 view .LVU3476 +1182:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 11155 .loc 1 1182 34 is_stmt 0 view .LVU3477 + 11156 007a 0223 movs r3, #2 + 11157 007c 0393 str r3, [sp, #12] +1183:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 11158 .loc 1 1183 3 is_stmt 1 view .LVU3478 +1183:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 11159 .loc 1 1183 35 is_stmt 0 view .LVU3479 + 11160 007e 0023 movs r3, #0 + 11161 0080 0493 str r3, [sp, #16] +1184:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 11162 .loc 1 1184 3 is_stmt 1 view .LVU3480 +1184:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 11163 .loc 1 1184 36 is_stmt 0 view .LVU3481 + 11164 0082 4FF4A053 mov r3, #5120 + ARM GAS /tmp/ccLSPxIe.s page 609 - 9965 0004 0023 movs r3, #0 - 9966 0006 0493 str r3, [sp, #16] - 9967 0008 0593 str r3, [sp, #20] - 9968 000a 0693 str r3, [sp, #24] - 9969 000c 0793 str r3, [sp, #28] -1752:Src/main.c **** - 9970 .loc 1 1752 3 is_stmt 1 view .LVU3110 -1752:Src/main.c **** - 9971 .loc 1 1752 27 is_stmt 0 view .LVU3111 - 9972 000e 0193 str r3, [sp, #4] - 9973 0010 0293 str r3, [sp, #8] - 9974 0012 0393 str r3, [sp, #12] -1757:Src/main.c **** htim8.Init.Prescaler = 0; - 9975 .loc 1 1757 3 is_stmt 1 view .LVU3112 -1757:Src/main.c **** htim8.Init.Prescaler = 0; - 9976 .loc 1 1757 18 is_stmt 0 view .LVU3113 - 9977 0014 1348 ldr r0, .L546 - 9978 0016 144A ldr r2, .L546+4 - 9979 0018 0260 str r2, [r0] -1758:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 9980 .loc 1 1758 3 is_stmt 1 view .LVU3114 -1758:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 9981 .loc 1 1758 24 is_stmt 0 view .LVU3115 - 9982 001a 4360 str r3, [r0, #4] -1759:Src/main.c **** htim8.Init.Period = 91; - 9983 .loc 1 1759 3 is_stmt 1 view .LVU3116 -1759:Src/main.c **** htim8.Init.Period = 91; - 9984 .loc 1 1759 26 is_stmt 0 view .LVU3117 - 9985 001c 8360 str r3, [r0, #8] -1760:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 9986 .loc 1 1760 3 is_stmt 1 view .LVU3118 -1760:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 9987 .loc 1 1760 21 is_stmt 0 view .LVU3119 - 9988 001e 5B22 movs r2, #91 - 9989 0020 C260 str r2, [r0, #12] -1761:Src/main.c **** htim8.Init.RepetitionCounter = 0; - 9990 .loc 1 1761 3 is_stmt 1 view .LVU3120 -1761:Src/main.c **** htim8.Init.RepetitionCounter = 0; - 9991 .loc 1 1761 28 is_stmt 0 view .LVU3121 - 9992 0022 0361 str r3, [r0, #16] -1762:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 9993 .loc 1 1762 3 is_stmt 1 view .LVU3122 -1762:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 9994 .loc 1 1762 32 is_stmt 0 view .LVU3123 - 9995 0024 4361 str r3, [r0, #20] -1763:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 9996 .loc 1 1763 3 is_stmt 1 view .LVU3124 -1763:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 9997 .loc 1 1763 32 is_stmt 0 view .LVU3125 - 9998 0026 8361 str r3, [r0, #24] -1764:Src/main.c **** { - 9999 .loc 1 1764 3 is_stmt 1 view .LVU3126 -1764:Src/main.c **** { - 10000 .loc 1 1764 7 is_stmt 0 view .LVU3127 - 10001 0028 FFF7FEFF bl HAL_TIM_Base_Init - 10002 .LVL905: -1764:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 579 + 11165 0086 0593 str r3, [sp, #20] +1185:Src/main.c **** + 11166 .loc 1 1185 3 is_stmt 1 view .LVU3482 +1185:Src/main.c **** + 11167 .loc 1 1185 36 is_stmt 0 view .LVU3483 + 11168 0088 4FF48053 mov r3, #4096 + 11169 008c 0693 str r3, [sp, #24] +1187:Src/main.c **** { + 11170 .loc 1 1187 3 is_stmt 1 view .LVU3484 +1187:Src/main.c **** { + 11171 .loc 1 1187 7 is_stmt 0 view .LVU3485 + 11172 008e 0621 movs r1, #6 + 11173 0090 02A8 add r0, sp, #8 + 11174 0092 FFF7FEFF bl HAL_RCC_ClockConfig + 11175 .LVL982: +1187:Src/main.c **** { + 11176 .loc 1 1187 6 discriminator 1 view .LVU3486 + 11177 0096 30B9 cbnz r0, .L643 +1191:Src/main.c **** + 11178 .loc 1 1191 1 view .LVU3487 + 11179 0098 15B0 add sp, sp, #84 + 11180 .LCFI114: + 11181 .cfi_remember_state + 11182 .cfi_def_cfa_offset 4 + 11183 @ sp needed + 11184 009a 5DF804FB ldr pc, [sp], #4 + 11185 .L641: + 11186 .LCFI115: + 11187 .cfi_restore_state +1168:Src/main.c **** } + 11188 .loc 1 1168 5 is_stmt 1 view .LVU3488 + 11189 009e FFF7FEFF bl Error_Handler + 11190 .LVL983: + 11191 .L642: +1175:Src/main.c **** } + 11192 .loc 1 1175 5 view .LVU3489 + 11193 00a2 FFF7FEFF bl Error_Handler + 11194 .LVL984: + 11195 .L643: +1189:Src/main.c **** } + 11196 .loc 1 1189 5 view .LVU3490 + 11197 00a6 FFF7FEFF bl Error_Handler + 11198 .LVL985: + 11199 .L645: + 11200 00aa 00BF .align 2 + 11201 .L644: + 11202 00ac 00380240 .word 1073887232 + 11203 00b0 00700040 .word 1073770496 + 11204 .cfi_endproc + 11205 .LFE1187: + 11207 .section .text.main,"ax",%progbits + 11208 .align 1 + 11209 .global main + 11210 .syntax unified + 11211 .thumb + 11212 .thumb_func + 11214 main: + ARM GAS /tmp/ccLSPxIe.s page 610 - 10003 .loc 1 1764 6 discriminator 1 view .LVU3128 - 10004 002c 98B9 cbnz r0, .L543 -1768:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 10005 .loc 1 1768 3 is_stmt 1 view .LVU3129 -1768:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 10006 .loc 1 1768 34 is_stmt 0 view .LVU3130 - 10007 002e 4FF48053 mov r3, #4096 - 10008 0032 0493 str r3, [sp, #16] -1769:Src/main.c **** { - 10009 .loc 1 1769 3 is_stmt 1 view .LVU3131 -1769:Src/main.c **** { - 10010 .loc 1 1769 7 is_stmt 0 view .LVU3132 - 10011 0034 04A9 add r1, sp, #16 - 10012 0036 0B48 ldr r0, .L546 - 10013 0038 FFF7FEFF bl HAL_TIM_ConfigClockSource - 10014 .LVL906: -1769:Src/main.c **** { - 10015 .loc 1 1769 6 discriminator 1 view .LVU3133 - 10016 003c 68B9 cbnz r0, .L544 -1773:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 10017 .loc 1 1773 3 is_stmt 1 view .LVU3134 -1773:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 10018 .loc 1 1773 37 is_stmt 0 view .LVU3135 - 10019 003e 0023 movs r3, #0 - 10020 0040 0193 str r3, [sp, #4] -1774:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 10021 .loc 1 1774 3 is_stmt 1 view .LVU3136 -1774:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 10022 .loc 1 1774 38 is_stmt 0 view .LVU3137 - 10023 0042 0293 str r3, [sp, #8] -1775:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 10024 .loc 1 1775 3 is_stmt 1 view .LVU3138 -1775:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 10025 .loc 1 1775 33 is_stmt 0 view .LVU3139 - 10026 0044 0393 str r3, [sp, #12] -1776:Src/main.c **** { - 10027 .loc 1 1776 3 is_stmt 1 view .LVU3140 -1776:Src/main.c **** { - 10028 .loc 1 1776 7 is_stmt 0 view .LVU3141 - 10029 0046 01A9 add r1, sp, #4 - 10030 0048 0648 ldr r0, .L546 - 10031 004a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization - 10032 .LVL907: -1776:Src/main.c **** { - 10033 .loc 1 1776 6 discriminator 1 view .LVU3142 - 10034 004e 30B9 cbnz r0, .L545 -1784:Src/main.c **** - 10035 .loc 1 1784 1 view .LVU3143 - 10036 0050 09B0 add sp, sp, #36 - 10037 .LCFI95: - 10038 .cfi_remember_state - 10039 .cfi_def_cfa_offset 4 - 10040 @ sp needed - 10041 0052 5DF804FB ldr pc, [sp], #4 - 10042 .L543: - 10043 .LCFI96: - 10044 .cfi_restore_state - ARM GAS /tmp/ccuHnxNu.s page 580 - - -1766:Src/main.c **** } - 10045 .loc 1 1766 5 is_stmt 1 view .LVU3144 - 10046 0056 FFF7FEFF bl Error_Handler - 10047 .LVL908: - 10048 .L544: -1771:Src/main.c **** } - 10049 .loc 1 1771 5 view .LVU3145 - 10050 005a FFF7FEFF bl Error_Handler - 10051 .LVL909: - 10052 .L545: -1778:Src/main.c **** } - 10053 .loc 1 1778 5 view .LVU3146 - 10054 005e FFF7FEFF bl Error_Handler - 10055 .LVL910: - 10056 .L547: - 10057 0062 00BF .align 2 - 10058 .L546: - 10059 0064 00000000 .word htim8 - 10060 0068 00040140 .word 1073808384 - 10061 .cfi_endproc - 10062 .LFE1200: - 10064 .section .text.MX_TIM11_Init,"ax",%progbits - 10065 .align 1 - 10066 .syntax unified - 10067 .thumb - 10068 .thumb_func - 10070 MX_TIM11_Init: - 10071 .LFB1202: -1823:Src/main.c **** - 10072 .loc 1 1823 1 view -0 - 10073 .cfi_startproc - 10074 @ args = 0, pretend = 0, frame = 32 - 10075 @ frame_needed = 0, uses_anonymous_args = 0 - 10076 0000 00B5 push {lr} - 10077 .LCFI97: - 10078 .cfi_def_cfa_offset 4 - 10079 .cfi_offset 14, -4 - 10080 0002 89B0 sub sp, sp, #36 - 10081 .LCFI98: - 10082 .cfi_def_cfa_offset 40 -1829:Src/main.c **** - 10083 .loc 1 1829 3 view .LVU3148 -1829:Src/main.c **** - 10084 .loc 1 1829 22 is_stmt 0 view .LVU3149 - 10085 0004 0023 movs r3, #0 - 10086 0006 0193 str r3, [sp, #4] - 10087 0008 0293 str r3, [sp, #8] - 10088 000a 0393 str r3, [sp, #12] - 10089 000c 0493 str r3, [sp, #16] - 10090 000e 0593 str r3, [sp, #20] - 10091 0010 0693 str r3, [sp, #24] - 10092 0012 0793 str r3, [sp, #28] -1834:Src/main.c **** htim11.Init.Prescaler = 1; - 10093 .loc 1 1834 3 is_stmt 1 view .LVU3150 -1834:Src/main.c **** htim11.Init.Prescaler = 1; - 10094 .loc 1 1834 19 is_stmt 0 view .LVU3151 - 10095 0014 1448 ldr r0, .L556 - ARM GAS /tmp/ccuHnxNu.s page 581 - - - 10096 0016 154A ldr r2, .L556+4 - 10097 0018 0260 str r2, [r0] -1835:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - 10098 .loc 1 1835 3 is_stmt 1 view .LVU3152 -1835:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - 10099 .loc 1 1835 25 is_stmt 0 view .LVU3153 - 10100 001a 0122 movs r2, #1 - 10101 001c 4260 str r2, [r0, #4] -1836:Src/main.c **** htim11.Init.Period = 91; - 10102 .loc 1 1836 3 is_stmt 1 view .LVU3154 -1836:Src/main.c **** htim11.Init.Period = 91; - 10103 .loc 1 1836 27 is_stmt 0 view .LVU3155 - 10104 001e 8360 str r3, [r0, #8] -1837:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 10105 .loc 1 1837 3 is_stmt 1 view .LVU3156 -1837:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 10106 .loc 1 1837 22 is_stmt 0 view .LVU3157 - 10107 0020 5B22 movs r2, #91 - 10108 0022 C260 str r2, [r0, #12] -1838:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 10109 .loc 1 1838 3 is_stmt 1 view .LVU3158 -1838:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 10110 .loc 1 1838 29 is_stmt 0 view .LVU3159 - 10111 0024 0361 str r3, [r0, #16] -1839:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) - 10112 .loc 1 1839 3 is_stmt 1 view .LVU3160 -1839:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) - 10113 .loc 1 1839 33 is_stmt 0 view .LVU3161 - 10114 0026 8023 movs r3, #128 - 10115 0028 8361 str r3, [r0, #24] -1840:Src/main.c **** { - 10116 .loc 1 1840 3 is_stmt 1 view .LVU3162 -1840:Src/main.c **** { - 10117 .loc 1 1840 7 is_stmt 0 view .LVU3163 - 10118 002a FFF7FEFF bl HAL_TIM_Base_Init - 10119 .LVL911: -1840:Src/main.c **** { - 10120 .loc 1 1840 6 discriminator 1 view .LVU3164 - 10121 002e A8B9 cbnz r0, .L553 -1844:Src/main.c **** { - 10122 .loc 1 1844 3 is_stmt 1 view .LVU3165 -1844:Src/main.c **** { - 10123 .loc 1 1844 7 is_stmt 0 view .LVU3166 - 10124 0030 0D48 ldr r0, .L556 - 10125 0032 FFF7FEFF bl HAL_TIM_PWM_Init - 10126 .LVL912: -1844:Src/main.c **** { - 10127 .loc 1 1844 6 discriminator 1 view .LVU3167 - 10128 0036 98B9 cbnz r0, .L554 -1848:Src/main.c **** sConfigOC.Pulse = 91; - 10129 .loc 1 1848 3 is_stmt 1 view .LVU3168 -1848:Src/main.c **** sConfigOC.Pulse = 91; - 10130 .loc 1 1848 20 is_stmt 0 view .LVU3169 - 10131 0038 6023 movs r3, #96 - 10132 003a 0193 str r3, [sp, #4] -1849:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 10133 .loc 1 1849 3 is_stmt 1 view .LVU3170 - ARM GAS /tmp/ccuHnxNu.s page 582 - - -1849:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 10134 .loc 1 1849 19 is_stmt 0 view .LVU3171 - 10135 003c 5B23 movs r3, #91 - 10136 003e 0293 str r3, [sp, #8] -1850:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 10137 .loc 1 1850 3 is_stmt 1 view .LVU3172 -1850:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 10138 .loc 1 1850 24 is_stmt 0 view .LVU3173 - 10139 0040 0022 movs r2, #0 - 10140 0042 0392 str r2, [sp, #12] -1851:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 10141 .loc 1 1851 3 is_stmt 1 view .LVU3174 -1851:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 10142 .loc 1 1851 24 is_stmt 0 view .LVU3175 - 10143 0044 0592 str r2, [sp, #20] -1852:Src/main.c **** { - 10144 .loc 1 1852 3 is_stmt 1 view .LVU3176 -1852:Src/main.c **** { - 10145 .loc 1 1852 7 is_stmt 0 view .LVU3177 - 10146 0046 01A9 add r1, sp, #4 - 10147 0048 0748 ldr r0, .L556 - 10148 004a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel - 10149 .LVL913: -1852:Src/main.c **** { - 10150 .loc 1 1852 6 discriminator 1 view .LVU3178 - 10151 004e 48B9 cbnz r0, .L555 -1859:Src/main.c **** - 10152 .loc 1 1859 3 is_stmt 1 view .LVU3179 - 10153 0050 0548 ldr r0, .L556 - 10154 0052 FFF7FEFF bl HAL_TIM_MspPostInit - 10155 .LVL914: -1861:Src/main.c **** - 10156 .loc 1 1861 1 is_stmt 0 view .LVU3180 - 10157 0056 09B0 add sp, sp, #36 - 10158 .LCFI99: - 10159 .cfi_remember_state - 10160 .cfi_def_cfa_offset 4 - 10161 @ sp needed - 10162 0058 5DF804FB ldr pc, [sp], #4 - 10163 .L553: - 10164 .LCFI100: - 10165 .cfi_restore_state -1842:Src/main.c **** } - 10166 .loc 1 1842 5 is_stmt 1 view .LVU3181 - 10167 005c FFF7FEFF bl Error_Handler - 10168 .LVL915: - 10169 .L554: -1846:Src/main.c **** } - 10170 .loc 1 1846 5 view .LVU3182 - 10171 0060 FFF7FEFF bl Error_Handler - 10172 .LVL916: - 10173 .L555: -1854:Src/main.c **** } - 10174 .loc 1 1854 5 view .LVU3183 - 10175 0064 FFF7FEFF bl Error_Handler - 10176 .LVL917: - 10177 .L557: - ARM GAS /tmp/ccuHnxNu.s page 583 - - - 10178 .align 2 - 10179 .L556: - 10180 0068 00000000 .word htim11 - 10181 006c 00480140 .word 1073825792 - 10182 .cfi_endproc - 10183 .LFE1202: - 10185 .section .text.MX_TIM4_Init,"ax",%progbits - 10186 .align 1 - 10187 .syntax unified - 10188 .thumb - 10189 .thumb_func - 10191 MX_TIM4_Init: - 10192 .LFB1196: -1573:Src/main.c **** - 10193 .loc 1 1573 1 view -0 - 10194 .cfi_startproc - 10195 @ args = 0, pretend = 0, frame = 56 - 10196 @ frame_needed = 0, uses_anonymous_args = 0 - 10197 0000 00B5 push {lr} - 10198 .LCFI101: - 10199 .cfi_def_cfa_offset 4 - 10200 .cfi_offset 14, -4 - 10201 0002 8FB0 sub sp, sp, #60 - 10202 .LCFI102: - 10203 .cfi_def_cfa_offset 64 -1579:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 10204 .loc 1 1579 3 view .LVU3185 -1579:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 10205 .loc 1 1579 26 is_stmt 0 view .LVU3186 - 10206 0004 0023 movs r3, #0 - 10207 0006 0A93 str r3, [sp, #40] - 10208 0008 0B93 str r3, [sp, #44] - 10209 000a 0C93 str r3, [sp, #48] - 10210 000c 0D93 str r3, [sp, #52] -1580:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 10211 .loc 1 1580 3 is_stmt 1 view .LVU3187 -1580:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 10212 .loc 1 1580 27 is_stmt 0 view .LVU3188 - 10213 000e 0793 str r3, [sp, #28] - 10214 0010 0893 str r3, [sp, #32] - 10215 0012 0993 str r3, [sp, #36] -1581:Src/main.c **** - 10216 .loc 1 1581 3 is_stmt 1 view .LVU3189 -1581:Src/main.c **** - 10217 .loc 1 1581 22 is_stmt 0 view .LVU3190 - 10218 0014 0093 str r3, [sp] - 10219 0016 0193 str r3, [sp, #4] - 10220 0018 0293 str r3, [sp, #8] - 10221 001a 0393 str r3, [sp, #12] - 10222 001c 0493 str r3, [sp, #16] - 10223 001e 0593 str r3, [sp, #20] - 10224 0020 0693 str r3, [sp, #24] -1586:Src/main.c **** htim4.Init.Prescaler = 0; - 10225 .loc 1 1586 3 is_stmt 1 view .LVU3191 -1586:Src/main.c **** htim4.Init.Prescaler = 0; - 10226 .loc 1 1586 18 is_stmt 0 view .LVU3192 - 10227 0022 1E48 ldr r0, .L570 - ARM GAS /tmp/ccuHnxNu.s page 584 - - - 10228 0024 1E4A ldr r2, .L570+4 - 10229 0026 0260 str r2, [r0] -1587:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 10230 .loc 1 1587 3 is_stmt 1 view .LVU3193 -1587:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 10231 .loc 1 1587 24 is_stmt 0 view .LVU3194 - 10232 0028 4360 str r3, [r0, #4] -1588:Src/main.c **** htim4.Init.Period = 45; - 10233 .loc 1 1588 3 is_stmt 1 view .LVU3195 -1588:Src/main.c **** htim4.Init.Period = 45; - 10234 .loc 1 1588 26 is_stmt 0 view .LVU3196 - 10235 002a 8360 str r3, [r0, #8] -1589:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 10236 .loc 1 1589 3 is_stmt 1 view .LVU3197 -1589:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 10237 .loc 1 1589 21 is_stmt 0 view .LVU3198 - 10238 002c 2D22 movs r2, #45 - 10239 002e C260 str r2, [r0, #12] -1590:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 10240 .loc 1 1590 3 is_stmt 1 view .LVU3199 -1590:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 10241 .loc 1 1590 28 is_stmt 0 view .LVU3200 - 10242 0030 0361 str r3, [r0, #16] -1591:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 10243 .loc 1 1591 3 is_stmt 1 view .LVU3201 -1591:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 10244 .loc 1 1591 32 is_stmt 0 view .LVU3202 - 10245 0032 8361 str r3, [r0, #24] -1592:Src/main.c **** { - 10246 .loc 1 1592 3 is_stmt 1 view .LVU3203 -1592:Src/main.c **** { - 10247 .loc 1 1592 7 is_stmt 0 view .LVU3204 - 10248 0034 FFF7FEFF bl HAL_TIM_Base_Init - 10249 .LVL918: -1592:Src/main.c **** { - 10250 .loc 1 1592 6 discriminator 1 view .LVU3205 - 10251 0038 30BB cbnz r0, .L565 -1596:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 10252 .loc 1 1596 3 is_stmt 1 view .LVU3206 -1596:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 10253 .loc 1 1596 34 is_stmt 0 view .LVU3207 - 10254 003a 4FF48053 mov r3, #4096 - 10255 003e 0A93 str r3, [sp, #40] -1597:Src/main.c **** { - 10256 .loc 1 1597 3 is_stmt 1 view .LVU3208 -1597:Src/main.c **** { - 10257 .loc 1 1597 7 is_stmt 0 view .LVU3209 - 10258 0040 0AA9 add r1, sp, #40 - 10259 0042 1648 ldr r0, .L570 - 10260 0044 FFF7FEFF bl HAL_TIM_ConfigClockSource - 10261 .LVL919: -1597:Src/main.c **** { - 10262 .loc 1 1597 6 discriminator 1 view .LVU3210 - 10263 0048 00BB cbnz r0, .L566 -1601:Src/main.c **** { - 10264 .loc 1 1601 3 is_stmt 1 view .LVU3211 -1601:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 585 - - - 10265 .loc 1 1601 7 is_stmt 0 view .LVU3212 - 10266 004a 1448 ldr r0, .L570 - 10267 004c FFF7FEFF bl HAL_TIM_PWM_Init - 10268 .LVL920: -1601:Src/main.c **** { - 10269 .loc 1 1601 6 discriminator 1 view .LVU3213 - 10270 0050 F0B9 cbnz r0, .L567 -1605:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 10271 .loc 1 1605 3 is_stmt 1 view .LVU3214 -1605:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 10272 .loc 1 1605 37 is_stmt 0 view .LVU3215 - 10273 0052 0023 movs r3, #0 - 10274 0054 0793 str r3, [sp, #28] -1606:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 10275 .loc 1 1606 3 is_stmt 1 view .LVU3216 -1606:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 10276 .loc 1 1606 33 is_stmt 0 view .LVU3217 - 10277 0056 0993 str r3, [sp, #36] -1607:Src/main.c **** { - 10278 .loc 1 1607 3 is_stmt 1 view .LVU3218 -1607:Src/main.c **** { - 10279 .loc 1 1607 7 is_stmt 0 view .LVU3219 - 10280 0058 07A9 add r1, sp, #28 - 10281 005a 1048 ldr r0, .L570 - 10282 005c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization - 10283 .LVL921: -1607:Src/main.c **** { - 10284 .loc 1 1607 6 discriminator 1 view .LVU3220 - 10285 0060 C0B9 cbnz r0, .L568 -1611:Src/main.c **** sConfigOC.Pulse = 22; - 10286 .loc 1 1611 3 is_stmt 1 view .LVU3221 -1611:Src/main.c **** sConfigOC.Pulse = 22; - 10287 .loc 1 1611 20 is_stmt 0 view .LVU3222 - 10288 0062 6023 movs r3, #96 - 10289 0064 0093 str r3, [sp] -1612:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 10290 .loc 1 1612 3 is_stmt 1 view .LVU3223 -1612:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 10291 .loc 1 1612 19 is_stmt 0 view .LVU3224 - 10292 0066 1623 movs r3, #22 - 10293 0068 0193 str r3, [sp, #4] -1613:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 10294 .loc 1 1613 3 is_stmt 1 view .LVU3225 -1613:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 10295 .loc 1 1613 24 is_stmt 0 view .LVU3226 - 10296 006a 0023 movs r3, #0 - 10297 006c 0293 str r3, [sp, #8] -1614:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 10298 .loc 1 1614 3 is_stmt 1 view .LVU3227 -1614:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 10299 .loc 1 1614 24 is_stmt 0 view .LVU3228 - 10300 006e 0493 str r3, [sp, #16] -1615:Src/main.c **** { - 10301 .loc 1 1615 3 is_stmt 1 view .LVU3229 -1615:Src/main.c **** { - 10302 .loc 1 1615 7 is_stmt 0 view .LVU3230 - 10303 0070 0822 movs r2, #8 - ARM GAS /tmp/ccuHnxNu.s page 586 - - - 10304 0072 6946 mov r1, sp - 10305 0074 0948 ldr r0, .L570 - 10306 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel - 10307 .LVL922: -1615:Src/main.c **** { - 10308 .loc 1 1615 6 discriminator 1 view .LVU3231 - 10309 007a 68B9 cbnz r0, .L569 -1622:Src/main.c **** - 10310 .loc 1 1622 3 is_stmt 1 view .LVU3232 - 10311 007c 0748 ldr r0, .L570 - 10312 007e FFF7FEFF bl HAL_TIM_MspPostInit - 10313 .LVL923: -1624:Src/main.c **** - 10314 .loc 1 1624 1 is_stmt 0 view .LVU3233 - 10315 0082 0FB0 add sp, sp, #60 - 10316 .LCFI103: - 10317 .cfi_remember_state - 10318 .cfi_def_cfa_offset 4 - 10319 @ sp needed - 10320 0084 5DF804FB ldr pc, [sp], #4 - 10321 .L565: - 10322 .LCFI104: - 10323 .cfi_restore_state -1594:Src/main.c **** } - 10324 .loc 1 1594 5 is_stmt 1 view .LVU3234 - 10325 0088 FFF7FEFF bl Error_Handler - 10326 .LVL924: - 10327 .L566: -1599:Src/main.c **** } - 10328 .loc 1 1599 5 view .LVU3235 - 10329 008c FFF7FEFF bl Error_Handler - 10330 .LVL925: - 10331 .L567: -1603:Src/main.c **** } - 10332 .loc 1 1603 5 view .LVU3236 - 10333 0090 FFF7FEFF bl Error_Handler - 10334 .LVL926: - 10335 .L568: -1609:Src/main.c **** } - 10336 .loc 1 1609 5 view .LVU3237 - 10337 0094 FFF7FEFF bl Error_Handler - 10338 .LVL927: - 10339 .L569: -1617:Src/main.c **** } - 10340 .loc 1 1617 5 view .LVU3238 - 10341 0098 FFF7FEFF bl Error_Handler - 10342 .LVL928: - 10343 .L571: - 10344 .align 2 - 10345 .L570: - 10346 009c 00000000 .word htim4 - 10347 00a0 00080040 .word 1073743872 - 10348 .cfi_endproc - 10349 .LFE1196: - 10351 .section .text.MX_TIM1_Init,"ax",%progbits - 10352 .align 1 - 10353 .syntax unified - ARM GAS /tmp/ccuHnxNu.s page 587 - - - 10354 .thumb - 10355 .thumb_func - 10357 MX_TIM1_Init: - 10358 .LFB1203: -1869:Src/main.c **** - 10359 .loc 1 1869 1 view -0 - 10360 .cfi_startproc - 10361 @ args = 0, pretend = 0, frame = 88 - 10362 @ frame_needed = 0, uses_anonymous_args = 0 - 10363 0000 10B5 push {r4, lr} - 10364 .LCFI105: - 10365 .cfi_def_cfa_offset 8 - 10366 .cfi_offset 4, -8 - 10367 .cfi_offset 14, -4 - 10368 0002 96B0 sub sp, sp, #88 - 10369 .LCFI106: - 10370 .cfi_def_cfa_offset 96 -1875:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 10371 .loc 1 1875 3 view .LVU3240 -1875:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 10372 .loc 1 1875 26 is_stmt 0 view .LVU3241 - 10373 0004 0024 movs r4, #0 - 10374 0006 1294 str r4, [sp, #72] - 10375 0008 1394 str r4, [sp, #76] - 10376 000a 1494 str r4, [sp, #80] - 10377 000c 1594 str r4, [sp, #84] -1876:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; - 10378 .loc 1 1876 3 is_stmt 1 view .LVU3242 -1876:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; - 10379 .loc 1 1876 22 is_stmt 0 view .LVU3243 - 10380 000e 0B94 str r4, [sp, #44] - 10381 0010 0C94 str r4, [sp, #48] - 10382 0012 0D94 str r4, [sp, #52] - 10383 0014 0E94 str r4, [sp, #56] - 10384 0016 0F94 str r4, [sp, #60] - 10385 0018 1094 str r4, [sp, #64] - 10386 001a 1194 str r4, [sp, #68] -1877:Src/main.c **** - 10387 .loc 1 1877 3 is_stmt 1 view .LVU3244 -1877:Src/main.c **** - 10388 .loc 1 1877 34 is_stmt 0 view .LVU3245 - 10389 001c 2C22 movs r2, #44 - 10390 001e 2146 mov r1, r4 - 10391 0020 6846 mov r0, sp - 10392 0022 FFF7FEFF bl memset - 10393 .LVL929: -1882:Src/main.c **** htim1.Init.Prescaler = 0; - 10394 .loc 1 1882 3 is_stmt 1 view .LVU3246 -1882:Src/main.c **** htim1.Init.Prescaler = 0; - 10395 .loc 1 1882 18 is_stmt 0 view .LVU3247 - 10396 0026 2548 ldr r0, .L584 - 10397 0028 254B ldr r3, .L584+4 - 10398 002a 0360 str r3, [r0] -1883:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; - 10399 .loc 1 1883 3 is_stmt 1 view .LVU3248 -1883:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; - 10400 .loc 1 1883 24 is_stmt 0 view .LVU3249 - ARM GAS /tmp/ccuHnxNu.s page 588 - - - 10401 002c 4460 str r4, [r0, #4] -1884:Src/main.c **** htim1.Init.Period = 8; - 10402 .loc 1 1884 3 is_stmt 1 view .LVU3250 -1884:Src/main.c **** htim1.Init.Period = 8; - 10403 .loc 1 1884 26 is_stmt 0 view .LVU3251 - 10404 002e 8460 str r4, [r0, #8] -1885:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 10405 .loc 1 1885 3 is_stmt 1 view .LVU3252 -1885:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 10406 .loc 1 1885 21 is_stmt 0 view .LVU3253 - 10407 0030 0823 movs r3, #8 - 10408 0032 C360 str r3, [r0, #12] -1886:Src/main.c **** htim1.Init.RepetitionCounter = 0; - 10409 .loc 1 1886 3 is_stmt 1 view .LVU3254 -1886:Src/main.c **** htim1.Init.RepetitionCounter = 0; - 10410 .loc 1 1886 28 is_stmt 0 view .LVU3255 - 10411 0034 0461 str r4, [r0, #16] -1887:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 10412 .loc 1 1887 3 is_stmt 1 view .LVU3256 -1887:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 10413 .loc 1 1887 32 is_stmt 0 view .LVU3257 - 10414 0036 4461 str r4, [r0, #20] -1888:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) - 10415 .loc 1 1888 3 is_stmt 1 view .LVU3258 -1888:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK) - 10416 .loc 1 1888 32 is_stmt 0 view .LVU3259 - 10417 0038 8461 str r4, [r0, #24] -1889:Src/main.c **** { - 10418 .loc 1 1889 3 is_stmt 1 view .LVU3260 -1889:Src/main.c **** { - 10419 .loc 1 1889 7 is_stmt 0 view .LVU3261 - 10420 003a FFF7FEFF bl HAL_TIM_Base_Init - 10421 .LVL930: -1889:Src/main.c **** { - 10422 .loc 1 1889 6 discriminator 1 view .LVU3262 - 10423 003e 0028 cmp r0, #0 - 10424 0040 32D1 bne .L579 -1893:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) - 10425 .loc 1 1893 3 is_stmt 1 view .LVU3263 -1893:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) - 10426 .loc 1 1893 34 is_stmt 0 view .LVU3264 - 10427 0042 4FF48053 mov r3, #4096 - 10428 0046 1293 str r3, [sp, #72] -1894:Src/main.c **** { - 10429 .loc 1 1894 3 is_stmt 1 view .LVU3265 -1894:Src/main.c **** { - 10430 .loc 1 1894 7 is_stmt 0 view .LVU3266 - 10431 0048 12A9 add r1, sp, #72 - 10432 004a 1C48 ldr r0, .L584 - 10433 004c FFF7FEFF bl HAL_TIM_ConfigClockSource - 10434 .LVL931: -1894:Src/main.c **** { - 10435 .loc 1 1894 6 discriminator 1 view .LVU3267 - 10436 0050 0028 cmp r0, #0 - 10437 0052 2BD1 bne .L580 -1898:Src/main.c **** { - 10438 .loc 1 1898 3 is_stmt 1 view .LVU3268 - ARM GAS /tmp/ccuHnxNu.s page 589 - - -1898:Src/main.c **** { - 10439 .loc 1 1898 7 is_stmt 0 view .LVU3269 - 10440 0054 1948 ldr r0, .L584 - 10441 0056 FFF7FEFF bl HAL_TIM_PWM_Init - 10442 .LVL932: -1898:Src/main.c **** { - 10443 .loc 1 1898 6 discriminator 1 view .LVU3270 - 10444 005a 48BB cbnz r0, .L581 -1902:Src/main.c **** sConfigOC.Pulse = 4; - 10445 .loc 1 1902 3 is_stmt 1 view .LVU3271 -1902:Src/main.c **** sConfigOC.Pulse = 4; - 10446 .loc 1 1902 20 is_stmt 0 view .LVU3272 - 10447 005c 6023 movs r3, #96 - 10448 005e 0B93 str r3, [sp, #44] -1903:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 10449 .loc 1 1903 3 is_stmt 1 view .LVU3273 -1903:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 10450 .loc 1 1903 19 is_stmt 0 view .LVU3274 - 10451 0060 0423 movs r3, #4 - 10452 0062 0C93 str r3, [sp, #48] -1904:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 10453 .loc 1 1904 3 is_stmt 1 view .LVU3275 -1904:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 10454 .loc 1 1904 24 is_stmt 0 view .LVU3276 - 10455 0064 0022 movs r2, #0 - 10456 0066 0D92 str r2, [sp, #52] -1905:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 10457 .loc 1 1905 3 is_stmt 1 view .LVU3277 -1905:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 10458 .loc 1 1905 24 is_stmt 0 view .LVU3278 - 10459 0068 0F92 str r2, [sp, #60] -1906:Src/main.c **** { - 10460 .loc 1 1906 3 is_stmt 1 view .LVU3279 -1906:Src/main.c **** { - 10461 .loc 1 1906 7 is_stmt 0 view .LVU3280 - 10462 006a 0BA9 add r1, sp, #44 - 10463 006c 1348 ldr r0, .L584 - 10464 006e FFF7FEFF bl HAL_TIM_PWM_ConfigChannel - 10465 .LVL933: -1906:Src/main.c **** { - 10466 .loc 1 1906 6 discriminator 1 view .LVU3281 - 10467 0072 F8B9 cbnz r0, .L582 -1910:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; - 10468 .loc 1 1910 3 is_stmt 1 view .LVU3282 -1910:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; - 10469 .loc 1 1910 40 is_stmt 0 view .LVU3283 - 10470 0074 0023 movs r3, #0 - 10471 0076 0093 str r3, [sp] -1911:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - 10472 .loc 1 1911 3 is_stmt 1 view .LVU3284 -1911:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; - 10473 .loc 1 1911 41 is_stmt 0 view .LVU3285 - 10474 0078 0193 str r3, [sp, #4] -1912:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; - 10475 .loc 1 1912 3 is_stmt 1 view .LVU3286 -1912:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0; - 10476 .loc 1 1912 34 is_stmt 0 view .LVU3287 - ARM GAS /tmp/ccuHnxNu.s page 590 - - - 10477 007a 0293 str r3, [sp, #8] -1913:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; - 10478 .loc 1 1913 3 is_stmt 1 view .LVU3288 -1913:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; - 10479 .loc 1 1913 33 is_stmt 0 view .LVU3289 - 10480 007c 0393 str r3, [sp, #12] -1914:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; - 10481 .loc 1 1914 3 is_stmt 1 view .LVU3290 -1914:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; - 10482 .loc 1 1914 35 is_stmt 0 view .LVU3291 - 10483 007e 0493 str r3, [sp, #16] -1915:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; - 10484 .loc 1 1915 3 is_stmt 1 view .LVU3292 -1915:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0; - 10485 .loc 1 1915 38 is_stmt 0 view .LVU3293 - 10486 0080 4FF40052 mov r2, #8192 - 10487 0084 0592 str r2, [sp, #20] -1916:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; - 10488 .loc 1 1916 3 is_stmt 1 view .LVU3294 -1916:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; - 10489 .loc 1 1916 36 is_stmt 0 view .LVU3295 - 10490 0086 0693 str r3, [sp, #24] -1917:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; - 10491 .loc 1 1917 3 is_stmt 1 view .LVU3296 -1917:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; - 10492 .loc 1 1917 36 is_stmt 0 view .LVU3297 - 10493 0088 0793 str r3, [sp, #28] -1918:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; - 10494 .loc 1 1918 3 is_stmt 1 view .LVU3298 -1918:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0; - 10495 .loc 1 1918 39 is_stmt 0 view .LVU3299 - 10496 008a 4FF00072 mov r2, #33554432 - 10497 008e 0892 str r2, [sp, #32] -1919:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - 10498 .loc 1 1919 3 is_stmt 1 view .LVU3300 -1919:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; - 10499 .loc 1 1919 37 is_stmt 0 view .LVU3301 - 10500 0090 0993 str r3, [sp, #36] -1920:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) - 10501 .loc 1 1920 3 is_stmt 1 view .LVU3302 -1920:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) - 10502 .loc 1 1920 40 is_stmt 0 view .LVU3303 - 10503 0092 0A93 str r3, [sp, #40] -1921:Src/main.c **** { - 10504 .loc 1 1921 3 is_stmt 1 view .LVU3304 -1921:Src/main.c **** { - 10505 .loc 1 1921 7 is_stmt 0 view .LVU3305 - 10506 0094 6946 mov r1, sp - 10507 0096 0948 ldr r0, .L584 - 10508 0098 FFF7FEFF bl HAL_TIMEx_ConfigBreakDeadTime - 10509 .LVL934: -1921:Src/main.c **** { - 10510 .loc 1 1921 6 discriminator 1 view .LVU3306 - 10511 009c 60B9 cbnz r0, .L583 -1928:Src/main.c **** - 10512 .loc 1 1928 3 is_stmt 1 view .LVU3307 - 10513 009e 0748 ldr r0, .L584 - ARM GAS /tmp/ccuHnxNu.s page 591 - - - 10514 00a0 FFF7FEFF bl HAL_TIM_MspPostInit - 10515 .LVL935: -1930:Src/main.c **** - 10516 .loc 1 1930 1 is_stmt 0 view .LVU3308 - 10517 00a4 16B0 add sp, sp, #88 - 10518 .LCFI107: - 10519 .cfi_remember_state - 10520 .cfi_def_cfa_offset 8 - 10521 @ sp needed - 10522 00a6 10BD pop {r4, pc} - 10523 .L579: - 10524 .LCFI108: - 10525 .cfi_restore_state -1891:Src/main.c **** } - 10526 .loc 1 1891 5 is_stmt 1 view .LVU3309 - 10527 00a8 FFF7FEFF bl Error_Handler - 10528 .LVL936: - 10529 .L580: -1896:Src/main.c **** } - 10530 .loc 1 1896 5 view .LVU3310 - 10531 00ac FFF7FEFF bl Error_Handler - 10532 .LVL937: - 10533 .L581: -1900:Src/main.c **** } - 10534 .loc 1 1900 5 view .LVU3311 - 10535 00b0 FFF7FEFF bl Error_Handler - 10536 .LVL938: - 10537 .L582: -1908:Src/main.c **** } - 10538 .loc 1 1908 5 view .LVU3312 - 10539 00b4 FFF7FEFF bl Error_Handler - 10540 .LVL939: - 10541 .L583: -1923:Src/main.c **** } - 10542 .loc 1 1923 5 view .LVU3313 - 10543 00b8 FFF7FEFF bl Error_Handler - 10544 .LVL940: - 10545 .L585: - 10546 .align 2 - 10547 .L584: - 10548 00bc 00000000 .word htim1 - 10549 00c0 00000140 .word 1073807360 - 10550 .cfi_endproc - 10551 .LFE1203: - 10553 .section .text.SystemClock_Config,"ax",%progbits - 10554 .align 1 - 10555 .global SystemClock_Config - 10556 .syntax unified - 10557 .thumb - 10558 .thumb_func - 10560 SystemClock_Config: - 10561 .LFB1187: -1051:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 10562 .loc 1 1051 1 view -0 - 10563 .cfi_startproc - 10564 @ args = 0, pretend = 0, frame = 80 - 10565 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccuHnxNu.s page 592 - - - 10566 0000 00B5 push {lr} - 10567 .LCFI109: - 10568 .cfi_def_cfa_offset 4 - 10569 .cfi_offset 14, -4 - 10570 0002 95B0 sub sp, sp, #84 - 10571 .LCFI110: - 10572 .cfi_def_cfa_offset 88 -1052:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 10573 .loc 1 1052 3 view .LVU3315 -1052:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 10574 .loc 1 1052 22 is_stmt 0 view .LVU3316 - 10575 0004 3422 movs r2, #52 - 10576 0006 0021 movs r1, #0 - 10577 0008 07A8 add r0, sp, #28 - 10578 000a FFF7FEFF bl memset - 10579 .LVL941: -1053:Src/main.c **** - 10580 .loc 1 1053 3 is_stmt 1 view .LVU3317 -1053:Src/main.c **** - 10581 .loc 1 1053 22 is_stmt 0 view .LVU3318 - 10582 000e 0023 movs r3, #0 - 10583 0010 0293 str r3, [sp, #8] - 10584 0012 0393 str r3, [sp, #12] - 10585 0014 0493 str r3, [sp, #16] - 10586 0016 0593 str r3, [sp, #20] - 10587 0018 0693 str r3, [sp, #24] -1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10588 .loc 1 1057 3 is_stmt 1 view .LVU3319 - 10589 .LBB674: -1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10590 .loc 1 1057 3 view .LVU3320 -1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10591 .loc 1 1057 3 view .LVU3321 - 10592 001a 244B ldr r3, .L594 - 10593 001c 1A6C ldr r2, [r3, #64] - 10594 001e 42F08052 orr r2, r2, #268435456 - 10595 0022 1A64 str r2, [r3, #64] -1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10596 .loc 1 1057 3 view .LVU3322 - 10597 0024 1B6C ldr r3, [r3, #64] - 10598 0026 03F08053 and r3, r3, #268435456 - 10599 002a 0093 str r3, [sp] -1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10600 .loc 1 1057 3 view .LVU3323 - 10601 002c 009B ldr r3, [sp] - 10602 .LBE674: -1057:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 10603 .loc 1 1057 3 view .LVU3324 -1058:Src/main.c **** - 10604 .loc 1 1058 3 view .LVU3325 - 10605 .LBB675: -1058:Src/main.c **** - 10606 .loc 1 1058 3 view .LVU3326 -1058:Src/main.c **** - 10607 .loc 1 1058 3 view .LVU3327 - 10608 002e 204B ldr r3, .L594+4 - 10609 0030 1A68 ldr r2, [r3] - ARM GAS /tmp/ccuHnxNu.s page 593 - - - 10610 0032 42F44042 orr r2, r2, #49152 - 10611 0036 1A60 str r2, [r3] -1058:Src/main.c **** - 10612 .loc 1 1058 3 view .LVU3328 - 10613 0038 1B68 ldr r3, [r3] - 10614 003a 03F44043 and r3, r3, #49152 - 10615 003e 0193 str r3, [sp, #4] -1058:Src/main.c **** - 10616 .loc 1 1058 3 view .LVU3329 - 10617 0040 019B ldr r3, [sp, #4] - 10618 .LBE675: -1058:Src/main.c **** - 10619 .loc 1 1058 3 view .LVU3330 -1063:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 10620 .loc 1 1063 3 view .LVU3331 -1063:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 10621 .loc 1 1063 36 is_stmt 0 view .LVU3332 - 10622 0042 0123 movs r3, #1 - 10623 0044 0793 str r3, [sp, #28] -1064:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 10624 .loc 1 1064 3 is_stmt 1 view .LVU3333 -1064:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 10625 .loc 1 1064 30 is_stmt 0 view .LVU3334 - 10626 0046 4FF48033 mov r3, #65536 - 10627 004a 0893 str r3, [sp, #32] -1065:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 10628 .loc 1 1065 3 is_stmt 1 view .LVU3335 -1065:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 10629 .loc 1 1065 34 is_stmt 0 view .LVU3336 - 10630 004c 0223 movs r3, #2 - 10631 004e 0D93 str r3, [sp, #52] -1066:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 10632 .loc 1 1066 3 is_stmt 1 view .LVU3337 -1066:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 10633 .loc 1 1066 35 is_stmt 0 view .LVU3338 - 10634 0050 4FF48002 mov r2, #4194304 - 10635 0054 0E92 str r2, [sp, #56] -1067:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 10636 .loc 1 1067 3 is_stmt 1 view .LVU3339 -1067:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 10637 .loc 1 1067 30 is_stmt 0 view .LVU3340 - 10638 0056 1922 movs r2, #25 - 10639 0058 0F92 str r2, [sp, #60] -1068:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 10640 .loc 1 1068 3 is_stmt 1 view .LVU3341 -1068:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 10641 .loc 1 1068 30 is_stmt 0 view .LVU3342 - 10642 005a 4FF4B872 mov r2, #368 - 10643 005e 1092 str r2, [sp, #64] -1069:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 10644 .loc 1 1069 3 is_stmt 1 view .LVU3343 -1069:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 10645 .loc 1 1069 30 is_stmt 0 view .LVU3344 - 10646 0060 1193 str r3, [sp, #68] -1070:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 10647 .loc 1 1070 3 is_stmt 1 view .LVU3345 -1070:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - ARM GAS /tmp/ccuHnxNu.s page 594 - - - 10648 .loc 1 1070 30 is_stmt 0 view .LVU3346 - 10649 0062 0822 movs r2, #8 - 10650 0064 1292 str r2, [sp, #72] -1071:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 10651 .loc 1 1071 3 is_stmt 1 view .LVU3347 -1071:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 10652 .loc 1 1071 30 is_stmt 0 view .LVU3348 - 10653 0066 1393 str r3, [sp, #76] -1072:Src/main.c **** { - 10654 .loc 1 1072 3 is_stmt 1 view .LVU3349 -1072:Src/main.c **** { - 10655 .loc 1 1072 7 is_stmt 0 view .LVU3350 - 10656 0068 07A8 add r0, sp, #28 - 10657 006a FFF7FEFF bl HAL_RCC_OscConfig - 10658 .LVL942: -1072:Src/main.c **** { - 10659 .loc 1 1072 6 discriminator 1 view .LVU3351 - 10660 006e B0B9 cbnz r0, .L591 -1079:Src/main.c **** { - 10661 .loc 1 1079 3 is_stmt 1 view .LVU3352 -1079:Src/main.c **** { - 10662 .loc 1 1079 7 is_stmt 0 view .LVU3353 - 10663 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive - 10664 .LVL943: -1079:Src/main.c **** { - 10665 .loc 1 1079 6 discriminator 1 view .LVU3354 - 10666 0074 A8B9 cbnz r0, .L592 -1086:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 10667 .loc 1 1086 3 is_stmt 1 view .LVU3355 -1086:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 10668 .loc 1 1086 31 is_stmt 0 view .LVU3356 - 10669 0076 0F23 movs r3, #15 - 10670 0078 0293 str r3, [sp, #8] -1088:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 10671 .loc 1 1088 3 is_stmt 1 view .LVU3357 -1088:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 10672 .loc 1 1088 34 is_stmt 0 view .LVU3358 - 10673 007a 0223 movs r3, #2 - 10674 007c 0393 str r3, [sp, #12] -1089:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 10675 .loc 1 1089 3 is_stmt 1 view .LVU3359 -1089:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 10676 .loc 1 1089 35 is_stmt 0 view .LVU3360 - 10677 007e 0023 movs r3, #0 - 10678 0080 0493 str r3, [sp, #16] -1090:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 10679 .loc 1 1090 3 is_stmt 1 view .LVU3361 -1090:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 10680 .loc 1 1090 36 is_stmt 0 view .LVU3362 - 10681 0082 4FF4A053 mov r3, #5120 - 10682 0086 0593 str r3, [sp, #20] -1091:Src/main.c **** - 10683 .loc 1 1091 3 is_stmt 1 view .LVU3363 -1091:Src/main.c **** - 10684 .loc 1 1091 36 is_stmt 0 view .LVU3364 - 10685 0088 4FF48053 mov r3, #4096 - 10686 008c 0693 str r3, [sp, #24] - ARM GAS /tmp/ccuHnxNu.s page 595 - - -1093:Src/main.c **** { - 10687 .loc 1 1093 3 is_stmt 1 view .LVU3365 -1093:Src/main.c **** { - 10688 .loc 1 1093 7 is_stmt 0 view .LVU3366 - 10689 008e 0621 movs r1, #6 - 10690 0090 02A8 add r0, sp, #8 - 10691 0092 FFF7FEFF bl HAL_RCC_ClockConfig - 10692 .LVL944: -1093:Src/main.c **** { - 10693 .loc 1 1093 6 discriminator 1 view .LVU3367 - 10694 0096 30B9 cbnz r0, .L593 -1097:Src/main.c **** - 10695 .loc 1 1097 1 view .LVU3368 - 10696 0098 15B0 add sp, sp, #84 - 10697 .LCFI111: - 10698 .cfi_remember_state - 10699 .cfi_def_cfa_offset 4 - 10700 @ sp needed - 10701 009a 5DF804FB ldr pc, [sp], #4 - 10702 .L591: - 10703 .LCFI112: - 10704 .cfi_restore_state -1074:Src/main.c **** } - 10705 .loc 1 1074 5 is_stmt 1 view .LVU3369 - 10706 009e FFF7FEFF bl Error_Handler - 10707 .LVL945: - 10708 .L592: -1081:Src/main.c **** } - 10709 .loc 1 1081 5 view .LVU3370 - 10710 00a2 FFF7FEFF bl Error_Handler - 10711 .LVL946: - 10712 .L593: -1095:Src/main.c **** } - 10713 .loc 1 1095 5 view .LVU3371 - 10714 00a6 FFF7FEFF bl Error_Handler - 10715 .LVL947: - 10716 .L595: - 10717 00aa 00BF .align 2 - 10718 .L594: - 10719 00ac 00380240 .word 1073887232 - 10720 00b0 00700040 .word 1073770496 - 10721 .cfi_endproc - 10722 .LFE1187: - 10724 .section .text.main,"ax",%progbits - 10725 .align 1 - 10726 .global main - 10727 .syntax unified - 10728 .thumb - 10729 .thumb_func - 10731 main: - 10732 .LFB1186: - 254:Src/main.c **** - 10733 .loc 1 254 1 view -0 - 10734 .cfi_startproc - 10735 @ args = 0, pretend = 0, frame = 8 - 10736 @ frame_needed = 0, uses_anonymous_args = 0 - 10737 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} - ARM GAS /tmp/ccuHnxNu.s page 596 - - - 10738 .LCFI113: - 10739 .cfi_def_cfa_offset 28 - 10740 .cfi_offset 4, -28 - 10741 .cfi_offset 5, -24 - 10742 .cfi_offset 6, -20 - 10743 .cfi_offset 7, -16 - 10744 .cfi_offset 8, -12 - 10745 .cfi_offset 9, -8 - 10746 .cfi_offset 14, -4 - 10747 0004 85B0 sub sp, sp, #20 - 10748 .LCFI114: - 10749 .cfi_def_cfa_offset 48 - 257:Src/main.c **** /* USER CODE END 1 */ - 10750 .loc 1 257 2 view .LVU3373 - 263:Src/main.c **** - 10751 .loc 1 263 3 view .LVU3374 - 10752 0006 FFF7FEFF bl HAL_Init - 10753 .LVL948: + 11215 .LFB1186: 270:Src/main.c **** - 10754 .loc 1 270 3 view .LVU3375 - 10755 000a FFF7FEFF bl SystemClock_Config - 10756 .LVL949: - 277:Src/main.c **** MX_DMA_Init(); - 10757 .loc 1 277 3 view .LVU3376 - 10758 000e FFF7FEFF bl MX_GPIO_Init - 10759 .LVL950: - 278:Src/main.c **** MX_SPI4_Init(); - 10760 .loc 1 278 3 view .LVU3377 - 10761 0012 FFF7FEFF bl MX_DMA_Init - 10762 .LVL951: - 279:Src/main.c **** MX_FATFS_Init(); - 10763 .loc 1 279 3 view .LVU3378 - 10764 0016 FFF7FEFF bl MX_SPI4_Init - 10765 .LVL952: - 280:Src/main.c **** MX_TIM2_Init(); - 10766 .loc 1 280 3 view .LVU3379 - 10767 001a FFF7FEFF bl MX_FATFS_Init - 10768 .LVL953: - 281:Src/main.c **** MX_TIM5_Init(); - 10769 .loc 1 281 3 view .LVU3380 - 10770 001e FFF7FEFF bl MX_TIM2_Init - 10771 .LVL954: - 282:Src/main.c **** MX_ADC1_Init(); - 10772 .loc 1 282 3 view .LVU3381 - 10773 0022 FFF7FEFF bl MX_TIM5_Init - 10774 .LVL955: - 283:Src/main.c **** MX_ADC3_Init(); - 10775 .loc 1 283 3 view .LVU3382 - 10776 0026 FFF7FEFF bl MX_ADC1_Init - 10777 .LVL956: - 284:Src/main.c **** MX_SPI2_Init(); - 10778 .loc 1 284 3 view .LVU3383 - 10779 002a FFF7FEFF bl MX_ADC3_Init - 10780 .LVL957: - 285:Src/main.c **** MX_SPI5_Init(); - 10781 .loc 1 285 3 view .LVU3384 - 10782 002e FFF7FEFF bl MX_SPI2_Init - ARM GAS /tmp/ccuHnxNu.s page 597 + 11216 .loc 1 270 1 view -0 + 11217 .cfi_startproc + 11218 @ args = 0, pretend = 0, frame = 16 + 11219 @ frame_needed = 0, uses_anonymous_args = 0 + 11220 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 11221 .LCFI116: + 11222 .cfi_def_cfa_offset 28 + 11223 .cfi_offset 4, -28 + 11224 .cfi_offset 5, -24 + 11225 .cfi_offset 6, -20 + 11226 .cfi_offset 7, -16 + 11227 .cfi_offset 8, -12 + 11228 .cfi_offset 9, -8 + 11229 .cfi_offset 14, -4 + 11230 0004 87B0 sub sp, sp, #28 + 11231 .LCFI117: + 11232 .cfi_def_cfa_offset 56 + 273:Src/main.c **** /* USER CODE END 1 */ + 11233 .loc 1 273 2 view .LVU3492 + 279:Src/main.c **** + 11234 .loc 1 279 3 view .LVU3493 + 11235 0006 FFF7FEFF bl HAL_Init + 11236 .LVL986: + 286:Src/main.c **** + 11237 .loc 1 286 3 view .LVU3494 + 11238 000a FFF7FEFF bl SystemClock_Config + 11239 .LVL987: + 293:Src/main.c **** MX_DMA_Init(); + 11240 .loc 1 293 3 view .LVU3495 + 11241 000e FFF7FEFF bl MX_GPIO_Init + 11242 .LVL988: + 294:Src/main.c **** MX_SPI4_Init(); + 11243 .loc 1 294 3 view .LVU3496 + 11244 0012 FFF7FEFF bl MX_DMA_Init + 11245 .LVL989: + 295:Src/main.c **** MX_FATFS_Init(); + 11246 .loc 1 295 3 view .LVU3497 + 11247 0016 FFF7FEFF bl MX_SPI4_Init + 11248 .LVL990: + 296:Src/main.c **** MX_TIM2_Init(); + 11249 .loc 1 296 3 view .LVU3498 + 11250 001a FFF7FEFF bl MX_FATFS_Init + 11251 .LVL991: + 297:Src/main.c **** MX_TIM5_Init(); + 11252 .loc 1 297 3 view .LVU3499 + 11253 001e FFF7FEFF bl MX_TIM2_Init + 11254 .LVL992: + 298:Src/main.c **** MX_ADC1_Init(); + 11255 .loc 1 298 3 view .LVU3500 + 11256 0022 FFF7FEFF bl MX_TIM5_Init + 11257 .LVL993: + 299:Src/main.c **** MX_ADC3_Init(); + 11258 .loc 1 299 3 view .LVU3501 + 11259 0026 FFF7FEFF bl MX_ADC1_Init + 11260 .LVL994: + ARM GAS /tmp/ccLSPxIe.s page 611 - 10783 .LVL958: - 286:Src/main.c **** MX_SPI6_Init(); - 10784 .loc 1 286 3 view .LVU3385 - 10785 0032 FFF7FEFF bl MX_SPI5_Init - 10786 .LVL959: - 287:Src/main.c **** MX_USART1_UART_Init(); - 10787 .loc 1 287 3 view .LVU3386 - 10788 0036 FFF7FEFF bl MX_SPI6_Init - 10789 .LVL960: - 288:Src/main.c **** MX_SDMMC1_SD_Init(); - 10790 .loc 1 288 3 view .LVU3387 - 10791 003a FFF7FEFF bl MX_USART1_UART_Init - 10792 .LVL961: - 289:Src/main.c **** MX_TIM7_Init(); - 10793 .loc 1 289 3 view .LVU3388 - 10794 003e FFF7FEFF bl MX_SDMMC1_SD_Init - 10795 .LVL962: - 290:Src/main.c **** MX_TIM6_Init(); - 10796 .loc 1 290 3 view .LVU3389 - 10797 0042 FFF7FEFF bl MX_TIM7_Init - 10798 .LVL963: - 291:Src/main.c **** MX_TIM10_Init(); - 10799 .loc 1 291 3 view .LVU3390 - 10800 0046 FFF7FEFF bl MX_TIM6_Init - 10801 .LVL964: - 292:Src/main.c **** MX_UART8_Init(); - 10802 .loc 1 292 3 view .LVU3391 - 10803 004a FFF7FEFF bl MX_TIM10_Init - 10804 .LVL965: - 293:Src/main.c **** MX_TIM8_Init(); - 10805 .loc 1 293 3 view .LVU3392 - 10806 004e FFF7FEFF bl MX_UART8_Init - 10807 .LVL966: - 294:Src/main.c **** MX_TIM11_Init(); - 10808 .loc 1 294 3 view .LVU3393 - 10809 0052 FFF7FEFF bl MX_TIM8_Init - 10810 .LVL967: - 295:Src/main.c **** MX_TIM4_Init(); - 10811 .loc 1 295 3 view .LVU3394 - 10812 0056 FFF7FEFF bl MX_TIM11_Init - 10813 .LVL968: - 296:Src/main.c **** MX_TIM1_Init(); - 10814 .loc 1 296 3 view .LVU3395 - 10815 005a FFF7FEFF bl MX_TIM4_Init - 10816 .LVL969: - 297:Src/main.c **** PA4_DAC_Init(); - 10817 .loc 1 297 3 view .LVU3396 - 10818 005e FFF7FEFF bl MX_TIM1_Init - 10819 .LVL970: - 298:Src/main.c **** /* USER CODE BEGIN 2 */ - 10820 .loc 1 298 3 view .LVU3397 - 10821 0062 FFF7FEFF bl PA4_DAC_Init - 10822 .LVL971: - 300:Src/main.c **** //HAL_TIM_Base_Start(&htim11); - 10823 .loc 1 300 2 view .LVU3398 - 10824 0066 FFF7FEFF bl Init_params - 10825 .LVL972: - ARM GAS /tmp/ccuHnxNu.s page 598 + 300:Src/main.c **** MX_SPI2_Init(); + 11261 .loc 1 300 3 view .LVU3502 + 11262 002a FFF7FEFF bl MX_ADC3_Init + 11263 .LVL995: + 301:Src/main.c **** MX_SPI5_Init(); + 11264 .loc 1 301 3 view .LVU3503 + 11265 002e FFF7FEFF bl MX_SPI2_Init + 11266 .LVL996: + 302:Src/main.c **** MX_SPI6_Init(); + 11267 .loc 1 302 3 view .LVU3504 + 11268 0032 FFF7FEFF bl MX_SPI5_Init + 11269 .LVL997: + 303:Src/main.c **** MX_USART1_UART_Init(); + 11270 .loc 1 303 3 view .LVU3505 + 11271 0036 FFF7FEFF bl MX_SPI6_Init + 11272 .LVL998: + 304:Src/main.c **** MX_SDMMC1_SD_Init(); + 11273 .loc 1 304 3 view .LVU3506 + 11274 003a FFF7FEFF bl MX_USART1_UART_Init + 11275 .LVL999: + 305:Src/main.c **** MX_TIM7_Init(); + 11276 .loc 1 305 3 view .LVU3507 + 11277 003e FFF7FEFF bl MX_SDMMC1_SD_Init + 11278 .LVL1000: + 306:Src/main.c **** MX_TIM6_Init(); + 11279 .loc 1 306 3 view .LVU3508 + 11280 0042 FFF7FEFF bl MX_TIM7_Init + 11281 .LVL1001: + 307:Src/main.c **** MX_TIM10_Init(); + 11282 .loc 1 307 3 view .LVU3509 + 11283 0046 FFF7FEFF bl MX_TIM6_Init + 11284 .LVL1002: + 308:Src/main.c **** MX_UART8_Init(); + 11285 .loc 1 308 3 view .LVU3510 + 11286 004a FFF7FEFF bl MX_TIM10_Init + 11287 .LVL1003: + 309:Src/main.c **** MX_TIM8_Init(); + 11288 .loc 1 309 3 view .LVU3511 + 11289 004e FFF7FEFF bl MX_UART8_Init + 11290 .LVL1004: + 310:Src/main.c **** MX_TIM11_Init(); + 11291 .loc 1 310 3 view .LVU3512 + 11292 0052 FFF7FEFF bl MX_TIM8_Init + 11293 .LVL1005: + 311:Src/main.c **** MX_TIM4_Init(); + 11294 .loc 1 311 3 view .LVU3513 + 11295 0056 FFF7FEFF bl MX_TIM11_Init + 11296 .LVL1006: + 312:Src/main.c **** MX_TIM1_Init(); + 11297 .loc 1 312 3 view .LVU3514 + 11298 005a FFF7FEFF bl MX_TIM4_Init + 11299 .LVL1007: + 313:Src/main.c **** PA4_DAC_Init(); + 11300 .loc 1 313 3 view .LVU3515 + 11301 005e FFF7FEFF bl MX_TIM1_Init + 11302 .LVL1008: + 314:Src/main.c **** /* USER CODE BEGIN 2 */ + ARM GAS /tmp/ccLSPxIe.s page 612 - 311:Src/main.c **** - 10826 .loc 1 311 2 view .LVU3399 - 311:Src/main.c **** - 10827 .loc 1 311 14 is_stmt 0 view .LVU3400 - 10828 006a 8A4A ldr r2, .L694 - 10829 006c 3523 movs r3, #53 - 10830 006e D362 str r3, [r2, #44] - 313:Src/main.c **** - 10831 .loc 1 313 2 is_stmt 1 view .LVU3401 - 313:Src/main.c **** - 10832 .loc 1 313 23 is_stmt 0 view .LVU3402 - 10833 0070 D36A ldr r3, [r2, #44] - 313:Src/main.c **** - 10834 .loc 1 313 30 view .LVU3403 - 10835 0072 0133 adds r3, r3, #1 - 313:Src/main.c **** - 10836 .loc 1 313 33 view .LVU3404 - 10837 0074 5B08 lsrs r3, r3, #1 - 313:Src/main.c **** - 10838 .loc 1 313 36 view .LVU3405 - 10839 0076 013B subs r3, r3, #1 - 313:Src/main.c **** - 10840 .loc 1 313 15 view .LVU3406 - 10841 0078 D363 str r3, [r2, #60] - 318:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 10842 .loc 1 318 2 is_stmt 1 view .LVU3407 - 318:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 10843 .loc 1 318 23 is_stmt 0 view .LVU3408 - 10844 007a D36A ldr r3, [r2, #44] - 318:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 10845 .loc 1 318 36 view .LVU3409 - 10846 007c 9B00 lsls r3, r3, #2 - 10847 007e 0333 adds r3, r3, #3 - 318:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 10848 .loc 1 318 15 view .LVU3410 - 10849 0080 02F5A032 add r2, r2, #81920 - 10850 0084 D362 str r3, [r2, #44] - 319:Src/main.c **** - 10851 .loc 1 319 2 is_stmt 1 view .LVU3411 - 319:Src/main.c **** - 10852 .loc 1 319 25 is_stmt 0 view .LVU3412 - 10853 0086 D36A ldr r3, [r2, #44] - 319:Src/main.c **** - 10854 .loc 1 319 32 view .LVU3413 - 10855 0088 0133 adds r3, r3, #1 - 319:Src/main.c **** - 10856 .loc 1 319 35 view .LVU3414 - 10857 008a 5B08 lsrs r3, r3, #1 - 319:Src/main.c **** - 10858 .loc 1 319 38 view .LVU3415 - 10859 008c 013B subs r3, r3, #1 - 319:Src/main.c **** - 10860 .loc 1 319 16 view .LVU3416 - 10861 008e 5363 str r3, [r2, #52] - 323:Src/main.c **** - 10862 .loc 1 323 2 is_stmt 1 view .LVU3417 - 10863 0090 0021 movs r1, #0 - ARM GAS /tmp/ccuHnxNu.s page 599 + 11303 .loc 1 314 3 view .LVU3516 + 11304 0062 FFF7FEFF bl PA4_DAC_Init + 11305 .LVL1009: + 316:Src/main.c **** //HAL_TIM_Base_Start(&htim11); + 11306 .loc 1 316 2 view .LVU3517 + 11307 0066 FFF7FEFF bl Init_params + 11308 .LVL1010: + 327:Src/main.c **** + 11309 .loc 1 327 2 view .LVU3518 + 327:Src/main.c **** + 11310 .loc 1 327 14 is_stmt 0 view .LVU3519 + 11311 006a 8D4A ldr r2, .L761 + 11312 006c 3523 movs r3, #53 + 11313 006e D362 str r3, [r2, #44] + 329:Src/main.c **** + 11314 .loc 1 329 2 is_stmt 1 view .LVU3520 + 329:Src/main.c **** + 11315 .loc 1 329 23 is_stmt 0 view .LVU3521 + 11316 0070 D36A ldr r3, [r2, #44] + 329:Src/main.c **** + 11317 .loc 1 329 30 view .LVU3522 + 11318 0072 0133 adds r3, r3, #1 + 329:Src/main.c **** + 11319 .loc 1 329 33 view .LVU3523 + 11320 0074 5B08 lsrs r3, r3, #1 + 329:Src/main.c **** + 11321 .loc 1 329 36 view .LVU3524 + 11322 0076 013B subs r3, r3, #1 + 329:Src/main.c **** + 11323 .loc 1 329 15 view .LVU3525 + 11324 0078 D363 str r3, [r2, #60] + 334:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 11325 .loc 1 334 2 is_stmt 1 view .LVU3526 + 334:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 11326 .loc 1 334 23 is_stmt 0 view .LVU3527 + 11327 007a D36A ldr r3, [r2, #44] + 334:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 11328 .loc 1 334 36 view .LVU3528 + 11329 007c 9B00 lsls r3, r3, #2 + 11330 007e 0333 adds r3, r3, #3 + 334:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 11331 .loc 1 334 15 view .LVU3529 + 11332 0080 02F5A032 add r2, r2, #81920 + 11333 0084 D362 str r3, [r2, #44] + 335:Src/main.c **** + 11334 .loc 1 335 2 is_stmt 1 view .LVU3530 + 335:Src/main.c **** + 11335 .loc 1 335 25 is_stmt 0 view .LVU3531 + 11336 0086 D36A ldr r3, [r2, #44] + 335:Src/main.c **** + 11337 .loc 1 335 32 view .LVU3532 + 11338 0088 0133 adds r3, r3, #1 + 335:Src/main.c **** + 11339 .loc 1 335 35 view .LVU3533 + 11340 008a 5B08 lsrs r3, r3, #1 + 335:Src/main.c **** + 11341 .loc 1 335 38 view .LVU3534 + ARM GAS /tmp/ccLSPxIe.s page 613 - 10864 0092 8148 ldr r0, .L694+4 - 10865 0094 FFF7FEFF bl HAL_TIM_PWM_Start - 10866 .LVL973: - 10867 0098 4CE0 b .L597 - 10868 .L682: - 337:Src/main.c **** { - 10869 .loc 1 337 85 is_stmt 0 discriminator 1 view .LVU3418 - 10870 009a 804B ldr r3, .L694+8 - 10871 009c 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 337:Src/main.c **** { - 10872 .loc 1 337 73 discriminator 1 view .LVU3419 - 10873 009e 002B cmp r3, #0 - 10874 00a0 4FD1 bne .L598 - 10875 .L599: - 10876 .LBB676: + 11342 008c 013B subs r3, r3, #1 + 335:Src/main.c **** + 11343 .loc 1 335 16 view .LVU3535 + 11344 008e 5363 str r3, [r2, #52] + 339:Src/main.c **** + 11345 .loc 1 339 2 is_stmt 1 view .LVU3536 + 11346 0090 0021 movs r1, #0 + 11347 0092 8448 ldr r0, .L761+4 + 11348 0094 FFF7FEFF bl HAL_TIM_PWM_Start + 11349 .LVL1011: + 11350 0098 4CE0 b .L647 + 11351 .L746: + 353:Src/main.c **** { + 11352 .loc 1 353 85 is_stmt 0 discriminator 1 view .LVU3537 + 11353 009a 834B ldr r3, .L761+8 + 11354 009c 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 353:Src/main.c **** { + 11355 .loc 1 353 73 discriminator 1 view .LVU3538 + 11356 009e 002B cmp r3, #0 + 11357 00a0 4FD1 bne .L648 + 11358 .L649: + 11359 .LBB681: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10877 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3420 - 10878 .LBB677: + 11360 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3539 + 11361 .LBB682: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10879 .loc 7 3073 3 discriminator 1 view .LVU3421 + 11362 .loc 7 3073 3 discriminator 1 view .LVU3540 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10880 .loc 7 3073 3 discriminator 1 view .LVU3422 + 11363 .loc 7 3073 3 discriminator 1 view .LVU3541 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10881 .loc 7 3073 3 discriminator 1 view .LVU3423 - 10882 .LVL974: - 10883 .LBB678: - 10884 .LBI678: + 11364 .loc 7 3073 3 discriminator 1 view .LVU3542 + 11365 .LVL1012: + 11366 .LBB683: + 11367 .LBI683: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 10885 .loc 8 1068 31 view .LVU3424 - 10886 .LBB679: + 11368 .loc 8 1068 31 view .LVU3543 + 11369 .LBB684: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10887 .loc 8 1070 5 view .LVU3425 + 11370 .loc 8 1070 5 view .LVU3544 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 10888 .loc 8 1072 4 view .LVU3426 - 10889 00a2 7F4A ldr r2, .L694+12 - 10890 .syntax unified - 10891 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10892 00a4 52E8003F ldrex r3, [r2] - 10893 @ 0 "" 2 - 10894 .LVL975: + 11371 .loc 8 1072 4 view .LVU3545 + 11372 00a2 824A ldr r2, .L761+12 + 11373 .syntax unified + 11374 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11375 00a4 52E8003F ldrex r3, [r2] + 11376 @ 0 "" 2 + 11377 .LVL1013: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 10895 .loc 8 1073 4 view .LVU3427 + 11378 .loc 8 1073 4 view .LVU3546 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 10896 .loc 8 1073 4 is_stmt 0 view .LVU3428 - 10897 .thumb - 10898 .syntax unified - 10899 .LBE679: - 10900 .LBE678: + 11379 .loc 8 1073 4 is_stmt 0 view .LVU3547 + 11380 .thumb + 11381 .syntax unified + 11382 .LBE684: + 11383 .LBE683: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10901 .loc 7 3073 3 discriminator 1 view .LVU3429 - 10902 00a8 43F48073 orr r3, r3, #256 - 10903 .LVL976: + 11384 .loc 7 3073 3 discriminator 1 view .LVU3548 + ARM GAS /tmp/ccLSPxIe.s page 614 + + + 11385 00a8 43F48073 orr r3, r3, #256 + 11386 .LVL1014: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10904 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3430 - 10905 .LBB680: - 10906 .LBI680: + 11387 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3549 + 11388 .LBB685: + 11389 .LBI685: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccuHnxNu.s page 600 - - - 10907 .loc 8 1119 31 view .LVU3431 - 10908 .LBB681: + 11390 .loc 8 1119 31 view .LVU3550 + 11391 .LBB686: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10909 .loc 8 1121 4 view .LVU3432 + 11392 .loc 8 1121 4 view .LVU3551 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 10910 .loc 8 1123 4 view .LVU3433 - 10911 .syntax unified - 10912 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10913 00ac 42E80031 strex r1, r3, [r2] - 10914 @ 0 "" 2 - 10915 .LVL977: - 10916 .loc 8 1124 4 view .LVU3434 - 10917 .loc 8 1124 4 is_stmt 0 view .LVU3435 - 10918 .thumb - 10919 .syntax unified - 10920 .LBE681: - 10921 .LBE680: + 11393 .loc 8 1123 4 view .LVU3552 + 11394 .syntax unified + 11395 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11396 00ac 42E80031 strex r1, r3, [r2] + 11397 @ 0 "" 2 + 11398 .LVL1015: + 11399 .loc 8 1124 4 view .LVU3553 + 11400 .loc 8 1124 4 is_stmt 0 view .LVU3554 + 11401 .thumb + 11402 .syntax unified + 11403 .LBE686: + 11404 .LBE685: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10922 .loc 7 3073 3 discriminator 1 view .LVU3436 - 10923 00b0 0029 cmp r1, #0 - 10924 00b2 F6D1 bne .L599 - 10925 .LVL978: - 10926 .L600: + 11405 .loc 7 3073 3 discriminator 1 view .LVU3555 + 11406 00b0 0029 cmp r1, #0 + 11407 00b2 F6D1 bne .L649 + 11408 .LVL1016: + 11409 .L650: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10927 .loc 7 3073 3 discriminator 1 view .LVU3437 - 10928 .LBE677: - 10929 .LBE676: - 10930 .LBB682: + 11410 .loc 7 3073 3 discriminator 1 view .LVU3556 + 11411 .LBE682: + 11412 .LBE681: + 11413 .LBB687: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10931 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3438 - 10932 .LBB683: + 11414 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3557 + 11415 .LBB688: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10933 .loc 7 3040 3 discriminator 1 view .LVU3439 + 11416 .loc 7 3040 3 discriminator 1 view .LVU3558 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10934 .loc 7 3040 3 discriminator 1 view .LVU3440 + 11417 .loc 7 3040 3 discriminator 1 view .LVU3559 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10935 .loc 7 3040 3 discriminator 1 view .LVU3441 - 10936 .LBB684: - 10937 .LBI684: + 11418 .loc 7 3040 3 discriminator 1 view .LVU3560 + 11419 .LBB689: + 11420 .LBI689: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 10938 .loc 8 1068 31 view .LVU3442 - 10939 .LBB685: + 11421 .loc 8 1068 31 view .LVU3561 + 11422 .LBB690: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10940 .loc 8 1070 5 view .LVU3443 + 11423 .loc 8 1070 5 view .LVU3562 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 10941 .loc 8 1072 4 view .LVU3444 - 10942 00b4 7A4A ldr r2, .L694+12 - 10943 .syntax unified - 10944 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10945 00b6 52E8003F ldrex r3, [r2] - 10946 @ 0 "" 2 - 10947 .LVL979: -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 10948 .loc 8 1073 4 view .LVU3445 -1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 10949 .loc 8 1073 4 is_stmt 0 view .LVU3446 - 10950 .thumb - ARM GAS /tmp/ccuHnxNu.s page 601 + 11424 .loc 8 1072 4 view .LVU3563 + 11425 00b4 7D4A ldr r2, .L761+12 + 11426 .syntax unified + 11427 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11428 00b6 52E8003F ldrex r3, [r2] + ARM GAS /tmp/ccLSPxIe.s page 615 - 10951 .syntax unified - 10952 .LBE685: - 10953 .LBE684: + 11429 @ 0 "" 2 + 11430 .LVL1017: +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 11431 .loc 8 1073 4 view .LVU3564 +1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 11432 .loc 8 1073 4 is_stmt 0 view .LVU3565 + 11433 .thumb + 11434 .syntax unified + 11435 .LBE690: + 11436 .LBE689: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10954 .loc 7 3040 3 discriminator 1 view .LVU3447 - 10955 00ba 43F02003 orr r3, r3, #32 - 10956 .LVL980: + 11437 .loc 7 3040 3 discriminator 1 view .LVU3566 + 11438 00ba 43F02003 orr r3, r3, #32 + 11439 .LVL1018: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10957 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3448 - 10958 .LBB686: - 10959 .LBI686: + 11440 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3567 + 11441 .LBB691: + 11442 .LBI691: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 10960 .loc 8 1119 31 view .LVU3449 - 10961 .LBB687: + 11443 .loc 8 1119 31 view .LVU3568 + 11444 .LBB692: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10962 .loc 8 1121 4 view .LVU3450 + 11445 .loc 8 1121 4 view .LVU3569 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 10963 .loc 8 1123 4 view .LVU3451 - 10964 .syntax unified - 10965 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10966 00be 42E80031 strex r1, r3, [r2] - 10967 @ 0 "" 2 - 10968 .LVL981: - 10969 .loc 8 1124 4 view .LVU3452 - 10970 .loc 8 1124 4 is_stmt 0 view .LVU3453 - 10971 .thumb - 10972 .syntax unified - 10973 .LBE687: - 10974 .LBE686: + 11446 .loc 8 1123 4 view .LVU3570 + 11447 .syntax unified + 11448 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11449 00be 42E80031 strex r1, r3, [r2] + 11450 @ 0 "" 2 + 11451 .LVL1019: + 11452 .loc 8 1124 4 view .LVU3571 + 11453 .loc 8 1124 4 is_stmt 0 view .LVU3572 + 11454 .thumb + 11455 .syntax unified + 11456 .LBE692: + 11457 .LBE691: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10975 .loc 7 3040 3 discriminator 1 view .LVU3454 - 10976 00c2 0029 cmp r1, #0 - 10977 00c4 F6D1 bne .L600 - 10978 .LVL982: - 10979 .L601: + 11458 .loc 7 3040 3 discriminator 1 view .LVU3573 + 11459 00c2 0029 cmp r1, #0 + 11460 00c4 F6D1 bne .L650 + 11461 .LVL1020: + 11462 .L651: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10980 .loc 7 3040 3 discriminator 1 view .LVU3455 - 10981 .LBE683: - 10982 .LBE682: - 10983 .LBB688: + 11463 .loc 7 3040 3 discriminator 1 view .LVU3574 + 11464 .LBE688: + 11465 .LBE687: + 11466 .LBB693: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10984 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3456 - 10985 .LBB689: + 11467 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3575 + 11468 .LBB694: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10986 .loc 7 3136 3 discriminator 1 view .LVU3457 + 11469 .loc 7 3136 3 discriminator 1 view .LVU3576 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10987 .loc 7 3136 3 discriminator 1 view .LVU3458 + 11470 .loc 7 3136 3 discriminator 1 view .LVU3577 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 10988 .loc 7 3136 3 discriminator 1 view .LVU3459 - 10989 .LBB690: - 10990 .LBI690: + 11471 .loc 7 3136 3 discriminator 1 view .LVU3578 + 11472 .LBB695: + ARM GAS /tmp/ccLSPxIe.s page 616 + + + 11473 .LBI695: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 10991 .loc 8 1068 31 view .LVU3460 - 10992 .LBB691: + 11474 .loc 8 1068 31 view .LVU3579 + 11475 .LBB696: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 10993 .loc 8 1070 5 view .LVU3461 + 11476 .loc 8 1070 5 view .LVU3580 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccuHnxNu.s page 602 - - - 10994 .loc 8 1072 4 view .LVU3462 - 10995 00c6 764A ldr r2, .L694+12 - 10996 00c8 02F10803 add r3, r2, #8 - 10997 .syntax unified - 10998 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 10999 00cc 53E8003F ldrex r3, [r3] - 11000 @ 0 "" 2 - 11001 .LVL983: + 11477 .loc 8 1072 4 view .LVU3581 + 11478 00c6 794A ldr r2, .L761+12 + 11479 00c8 02F10803 add r3, r2, #8 + 11480 .syntax unified + 11481 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11482 00cc 53E8003F ldrex r3, [r3] + 11483 @ 0 "" 2 + 11484 .LVL1021: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 11002 .loc 8 1073 4 view .LVU3463 + 11485 .loc 8 1073 4 view .LVU3582 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 11003 .loc 8 1073 4 is_stmt 0 view .LVU3464 - 11004 .thumb - 11005 .syntax unified - 11006 .LBE691: - 11007 .LBE690: + 11486 .loc 8 1073 4 is_stmt 0 view .LVU3583 + 11487 .thumb + 11488 .syntax unified + 11489 .LBE696: + 11490 .LBE695: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 11008 .loc 7 3136 3 discriminator 1 view .LVU3465 - 11009 00d0 43F00103 orr r3, r3, #1 - 11010 .LVL984: + 11491 .loc 7 3136 3 discriminator 1 view .LVU3584 + 11492 00d0 43F00103 orr r3, r3, #1 + 11493 .LVL1022: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 11011 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3466 - 11012 .LBB692: - 11013 .LBI692: + 11494 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3585 + 11495 .LBB697: + 11496 .LBI697: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 11014 .loc 8 1119 31 view .LVU3467 - 11015 .LBB693: + 11497 .loc 8 1119 31 view .LVU3586 + 11498 .LBB698: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 11016 .loc 8 1121 4 view .LVU3468 + 11499 .loc 8 1121 4 view .LVU3587 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 11017 .loc 8 1123 4 view .LVU3469 - 11018 00d4 0832 adds r2, r2, #8 - 11019 .syntax unified - 11020 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 11021 00d6 42E80031 strex r1, r3, [r2] - 11022 @ 0 "" 2 - 11023 .LVL985: - 11024 .loc 8 1124 4 view .LVU3470 - 11025 .loc 8 1124 4 is_stmt 0 view .LVU3471 - 11026 .thumb - 11027 .syntax unified - 11028 .LBE693: - 11029 .LBE692: + 11500 .loc 8 1123 4 view .LVU3588 + 11501 00d4 0832 adds r2, r2, #8 + 11502 .syntax unified + 11503 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11504 00d6 42E80031 strex r1, r3, [r2] + 11505 @ 0 "" 2 + 11506 .LVL1023: + 11507 .loc 8 1124 4 view .LVU3589 + 11508 .loc 8 1124 4 is_stmt 0 view .LVU3590 + 11509 .thumb + 11510 .syntax unified + 11511 .LBE698: + 11512 .LBE697: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 11030 .loc 7 3136 3 discriminator 1 view .LVU3472 - 11031 00da 0029 cmp r1, #0 - 11032 00dc F3D1 bne .L601 - 11033 .LBE689: + 11513 .loc 7 3136 3 discriminator 1 view .LVU3591 + 11514 00da 0029 cmp r1, #0 + 11515 00dc F3D1 bne .L651 + 11516 .LBE694: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 11034 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU3473 - 11035 .LVL986: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 11036 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU3474 - 11037 .LBE688: - 343:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 11038 .loc 1 343 4 is_stmt 1 view .LVU3475 - 11039 .LBB694: - ARM GAS /tmp/ccuHnxNu.s page 603 + 11517 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU3592 + ARM GAS /tmp/ccLSPxIe.s page 617 - 11040 .LBI694: + 11518 .LVL1024: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 11519 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU3593 + 11520 .LBE693: + 359:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 11521 .loc 1 359 4 is_stmt 1 view .LVU3594 + 11522 .LBB699: + 11523 .LBI699: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 11041 .loc 2 2024 22 view .LVU3476 - 11042 .LBB695: + 11524 .loc 2 2024 22 view .LVU3595 + 11525 .LBB700: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 11043 .loc 2 2026 3 view .LVU3477 + 11526 .loc 2 2026 3 view .LVU3596 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 11044 .loc 2 2028 5 view .LVU3478 + 11527 .loc 2 2028 5 view .LVU3597 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 11045 .loc 2 2028 47 is_stmt 0 view .LVU3479 - 11046 00de 714B ldr r3, .L694+16 - 11047 00e0 0022 movs r2, #0 - 11048 00e2 83F82523 strb r2, [r3, #805] - 11049 .LVL987: + 11528 .loc 2 2028 47 is_stmt 0 view .LVU3598 + 11529 00de 744B ldr r3, .L761+16 + 11530 00e0 0022 movs r2, #0 + 11531 00e2 83F82523 strb r2, [r3, #805] + 11532 .LVL1025: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 11050 .loc 2 2028 47 view .LVU3480 - 11051 .LBE695: - 11052 .LBE694: - 344:Src/main.c **** u_rx_flg = 1; - 11053 .loc 1 344 4 is_stmt 1 view .LVU3481 - 11054 .LBB696: - 11055 .LBI696: + 11533 .loc 2 2028 47 view .LVU3599 + 11534 .LBE700: + 11535 .LBE699: + 360:Src/main.c **** u_rx_flg = 1; + 11536 .loc 1 360 4 is_stmt 1 view .LVU3600 + 11537 .LBB701: + 11538 .LBI701: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 11056 .loc 2 1896 22 view .LVU3482 - 11057 .LBB697: + 11539 .loc 2 1896 22 view .LVU3601 + 11540 .LBB702: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 11058 .loc 2 1898 3 view .LVU3483 + 11541 .loc 2 1898 3 view .LVU3602 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 11059 .loc 2 1900 5 view .LVU3484 + 11542 .loc 2 1900 5 view .LVU3603 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 11060 .loc 2 1900 43 is_stmt 0 view .LVU3485 - 11061 00e6 2022 movs r2, #32 - 11062 00e8 5A60 str r2, [r3, #4] - 11063 .LVL988: + 11543 .loc 2 1900 43 is_stmt 0 view .LVU3604 + 11544 00e6 2022 movs r2, #32 + 11545 00e8 5A60 str r2, [r3, #4] + 11546 .LVL1026: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 11064 .loc 2 1900 43 view .LVU3486 - 11065 .LBE697: - 11066 .LBE696: - 345:Src/main.c **** } - 11067 .loc 1 345 4 is_stmt 1 view .LVU3487 - 345:Src/main.c **** } - 11068 .loc 1 345 13 is_stmt 0 view .LVU3488 - 11069 00ea 6C4B ldr r3, .L694+8 - 11070 00ec 0122 movs r2, #1 - 11071 00ee 1A70 strb r2, [r3] - 11072 00f0 27E0 b .L598 - 11073 .L617: - 355:Src/main.c **** task.current_param = task.min_param; - 11074 .loc 1 355 6 is_stmt 1 view .LVU3489 - 355:Src/main.c **** task.current_param = task.min_param; - 11075 .loc 1 355 20 is_stmt 0 view .LVU3490 - 11076 00f2 6D4B ldr r3, .L694+20 - 11077 00f4 0022 movs r2, #0 - 11078 00f6 1A70 strb r2, [r3] - 356:Src/main.c **** Stop_TIM10(); - 11079 .loc 1 356 6 is_stmt 1 view .LVU3491 - 356:Src/main.c **** Stop_TIM10(); - ARM GAS /tmp/ccuHnxNu.s page 604 + 11547 .loc 2 1900 43 view .LVU3605 + 11548 .LBE702: + 11549 .LBE701: + 361:Src/main.c **** } + 11550 .loc 1 361 4 is_stmt 1 view .LVU3606 + 361:Src/main.c **** } + 11551 .loc 1 361 13 is_stmt 0 view .LVU3607 + 11552 00ea 6F4B ldr r3, .L761+8 + 11553 00ec 0122 movs r2, #1 + 11554 00ee 1A70 strb r2, [r3] + 11555 00f0 27E0 b .L648 + 11556 .L669: + 371:Src/main.c **** task.current_param = task.min_param; + 11557 .loc 1 371 6 is_stmt 1 view .LVU3608 + 371:Src/main.c **** task.current_param = task.min_param; + ARM GAS /tmp/ccLSPxIe.s page 618 - 11080 .loc 1 356 31 is_stmt 0 view .LVU3492 - 11081 00f8 6C4B ldr r3, .L694+24 - 11082 00fa 5A68 ldr r2, [r3, #4] @ float - 356:Src/main.c **** Stop_TIM10(); - 11083 .loc 1 356 25 view .LVU3493 - 11084 00fc 1A61 str r2, [r3, #16] @ float - 357:Src/main.c **** break; - 11085 .loc 1 357 6 is_stmt 1 view .LVU3494 - 11086 00fe FFF7FEFF bl Stop_TIM10 - 11087 .LVL989: - 358:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 11088 .loc 1 358 5 view .LVU3495 - 11089 .L602: - 990:Src/main.c **** { - 11090 .loc 1 990 3 view .LVU3496 - 11091 0102 6B4B ldr r3, .L694+28 - 11092 0104 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 11093 0106 022B cmp r3, #2 - 11094 0108 00F01385 beq .L662 - 11095 010c 032B cmp r3, #3 - 11096 010e 00F04685 beq .L678 - 11097 0112 012B cmp r3, #1 - 11098 0114 09D1 bne .L664 - 993:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 11099 .loc 1 993 5 view .LVU3497 - 11100 0116 674C ldr r4, .L694+32 - 11101 0118 0221 movs r1, #2 - 11102 011a 2046 mov r0, r4 - 11103 011c FFF7FEFF bl USART_TX - 11104 .LVL990: - 995:Src/main.c **** State_Data[1]=0;//All OK! - 11105 .loc 1 995 5 view .LVU3498 - 995:Src/main.c **** State_Data[1]=0;//All OK! - 11106 .loc 1 995 18 is_stmt 0 view .LVU3499 - 11107 0120 0023 movs r3, #0 - 11108 0122 2370 strb r3, [r4] - 996:Src/main.c **** UART_transmission_request = NO_MESS; - 11109 .loc 1 996 5 is_stmt 1 view .LVU3500 - 996:Src/main.c **** UART_transmission_request = NO_MESS; - 11110 .loc 1 996 18 is_stmt 0 view .LVU3501 - 11111 0124 6370 strb r3, [r4, #1] - 997:Src/main.c **** break; - 11112 .loc 1 997 5 is_stmt 1 view .LVU3502 - 997:Src/main.c **** break; - 11113 .loc 1 997 31 is_stmt 0 view .LVU3503 - 11114 0126 624A ldr r2, .L694+28 - 11115 0128 1370 strb r3, [r2] - 998:Src/main.c **** case MESS_02://Transmith packet - 11116 .loc 1 998 4 is_stmt 1 view .LVU3504 - 11117 .L664: -1032:Src/main.c **** { - 11118 .loc 1 1032 5 view .LVU3505 -1032:Src/main.c **** { - 11119 .loc 1 1032 17 is_stmt 0 view .LVU3506 - 11120 012a 634B ldr r3, .L694+36 - 11121 012c 1B78 ldrb r3, [r3] @ zero_extendqisi2 -1032:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 605 + 11558 .loc 1 371 20 is_stmt 0 view .LVU3609 + 11559 00f2 704B ldr r3, .L761+20 + 11560 00f4 0022 movs r2, #0 + 11561 00f6 1A70 strb r2, [r3] + 372:Src/main.c **** Stop_TIM10(); + 11562 .loc 1 372 6 is_stmt 1 view .LVU3610 + 372:Src/main.c **** Stop_TIM10(); + 11563 .loc 1 372 31 is_stmt 0 view .LVU3611 + 11564 00f8 6F4B ldr r3, .L761+24 + 11565 00fa 5A68 ldr r2, [r3, #4] @ float + 372:Src/main.c **** Stop_TIM10(); + 11566 .loc 1 372 25 view .LVU3612 + 11567 00fc 1A61 str r2, [r3, #16] @ float + 373:Src/main.c **** break; + 11568 .loc 1 373 6 is_stmt 1 view .LVU3613 + 11569 00fe FFF7FEFF bl Stop_TIM10 + 11570 .LVL1027: + 374:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 11571 .loc 1 374 5 view .LVU3614 + 11572 .L652: +1084:Src/main.c **** { + 11573 .loc 1 1084 3 view .LVU3615 + 11574 0102 6E4B ldr r3, .L761+28 + 11575 0104 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 11576 0106 022B cmp r3, #2 + 11577 0108 00F0C085 beq .L726 + 11578 010c 032B cmp r3, #3 + 11579 010e 00F0F385 beq .L742 + 11580 0112 012B cmp r3, #1 + 11581 0114 09D1 bne .L728 +1087:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 11582 .loc 1 1087 5 view .LVU3616 + 11583 0116 6A4C ldr r4, .L761+32 + 11584 0118 0221 movs r1, #2 + 11585 011a 2046 mov r0, r4 + 11586 011c FFF7FEFF bl USART_TX + 11587 .LVL1028: +1089:Src/main.c **** State_Data[1]=0;//All OK! + 11588 .loc 1 1089 5 view .LVU3617 +1089:Src/main.c **** State_Data[1]=0;//All OK! + 11589 .loc 1 1089 18 is_stmt 0 view .LVU3618 + 11590 0120 0023 movs r3, #0 + 11591 0122 2370 strb r3, [r4] +1090:Src/main.c **** UART_transmission_request = NO_MESS; + 11592 .loc 1 1090 5 is_stmt 1 view .LVU3619 +1090:Src/main.c **** UART_transmission_request = NO_MESS; + 11593 .loc 1 1090 18 is_stmt 0 view .LVU3620 + 11594 0124 6370 strb r3, [r4, #1] +1091:Src/main.c **** break; + 11595 .loc 1 1091 5 is_stmt 1 view .LVU3621 +1091:Src/main.c **** break; + 11596 .loc 1 1091 31 is_stmt 0 view .LVU3622 + 11597 0126 654A ldr r2, .L761+28 + 11598 0128 1370 strb r3, [r2] +1092:Src/main.c **** case MESS_02://Transmith packet + 11599 .loc 1 1092 4 is_stmt 1 view .LVU3623 + 11600 .L728: + ARM GAS /tmp/ccLSPxIe.s page 619 - 11122 .loc 1 1032 8 view .LVU3507 - 11123 012e 012B cmp r3, #1 - 11124 0130 00F03785 beq .L681 - 11125 .L597: - 335:Src/main.c **** { - 11126 .loc 1 335 3 is_stmt 1 view .LVU3508 - 337:Src/main.c **** { - 11127 .loc 1 337 3 view .LVU3509 - 337:Src/main.c **** { - 11128 .loc 1 337 8 is_stmt 0 view .LVU3510 - 11129 0134 4FF48071 mov r1, #256 - 11130 0138 6048 ldr r0, .L694+40 - 11131 013a FFF7FEFF bl HAL_GPIO_ReadPin - 11132 .LVL991: - 337:Src/main.c **** { - 11133 .loc 1 337 6 discriminator 1 view .LVU3511 - 11134 013e 0128 cmp r0, #1 - 11135 0140 ABD0 beq .L682 - 11136 .L598: - 352:Src/main.c **** { - 11137 .loc 1 352 4 is_stmt 1 view .LVU3512 - 11138 0142 5F4B ldr r3, .L694+44 - 11139 0144 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 11140 0146 0D2B cmp r3, #13 - 11141 0148 DBD8 bhi .L602 - 11142 014a 01A2 adr r2, .L604 - 11143 014c 52F823F0 ldr pc, [r2, r3, lsl #2] - 11144 .p2align 2 - 11145 .L604: - 11146 0150 F3000000 .word .L617+1 - 11147 0154 89010000 .word .L616+1 - 11148 0158 F3010000 .word .L615+1 - 11149 015c 29020000 .word .L614+1 - 11150 0160 59020000 .word .L613+1 - 11151 0164 69020000 .word .L612+1 - 11152 0168 85020000 .word .L611+1 - 11153 016c ED020000 .word .L610+1 - 11154 0170 5F060000 .word .L609+1 - 11155 0174 A5060000 .word .L608+1 - 11156 0178 41040000 .word .L607+1 - 11157 017c 1D050000 .word .L606+1 - 11158 0180 6D050000 .word .L605+1 - 11159 0184 23060000 .word .L603+1 - 11160 .p2align 1 - 11161 .L616: - 360:Src/main.c **** if (CheckChecksum(COMMAND)) - 11162 .loc 1 360 6 view .LVU3513 - 360:Src/main.c **** if (CheckChecksum(COMMAND)) - 11163 .loc 1 360 18 is_stmt 0 view .LVU3514 - 11164 0188 4E4C ldr r4, .L694+48 - 11165 018a 0D21 movs r1, #13 - 11166 018c 2046 mov r0, r4 - 11167 018e FFF7FEFF bl CalculateChecksum - 11168 .LVL992: - 360:Src/main.c **** if (CheckChecksum(COMMAND)) - 11169 .loc 1 360 16 discriminator 1 view .LVU3515 - 11170 0192 4D4B ldr r3, .L694+52 - ARM GAS /tmp/ccuHnxNu.s page 606 +1126:Src/main.c **** { + 11601 .loc 1 1126 5 view .LVU3624 +1126:Src/main.c **** { + 11602 .loc 1 1126 17 is_stmt 0 view .LVU3625 + 11603 012a 664B ldr r3, .L761+36 + 11604 012c 1B78 ldrb r3, [r3] @ zero_extendqisi2 +1126:Src/main.c **** { + 11605 .loc 1 1126 8 view .LVU3626 + 11606 012e 012B cmp r3, #1 + 11607 0130 00F0E485 beq .L745 + 11608 .L647: + 351:Src/main.c **** { + 11609 .loc 1 351 3 is_stmt 1 view .LVU3627 + 353:Src/main.c **** { + 11610 .loc 1 353 3 view .LVU3628 + 353:Src/main.c **** { + 11611 .loc 1 353 8 is_stmt 0 view .LVU3629 + 11612 0134 4FF48071 mov r1, #256 + 11613 0138 6348 ldr r0, .L761+40 + 11614 013a FFF7FEFF bl HAL_GPIO_ReadPin + 11615 .LVL1029: + 353:Src/main.c **** { + 11616 .loc 1 353 6 discriminator 1 view .LVU3630 + 11617 013e 0128 cmp r0, #1 + 11618 0140 ABD0 beq .L746 + 11619 .L648: + 368:Src/main.c **** { + 11620 .loc 1 368 4 is_stmt 1 view .LVU3631 + 11621 0142 624B ldr r3, .L761+44 + 11622 0144 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 11623 0146 0F2B cmp r3, #15 + 11624 0148 DBD8 bhi .L652 + 11625 014a 01A2 adr r2, .L654 + 11626 014c 52F823F0 ldr pc, [r2, r3, lsl #2] + 11627 .p2align 2 + 11628 .L654: + 11629 0150 F3000000 .word .L669+1 + 11630 0154 91010000 .word .L668+1 + 11631 0158 FB010000 .word .L667+1 + 11632 015c 35020000 .word .L666+1 + 11633 0160 65020000 .word .L665+1 + 11634 0164 75020000 .word .L664+1 + 11635 0168 91020000 .word .L663+1 + 11636 016c F9020000 .word .L662+1 + 11637 0170 89070000 .word .L661+1 + 11638 0174 CF070000 .word .L660+1 + 11639 0178 4D040000 .word .L659+1 + 11640 017c 29050000 .word .L658+1 + 11641 0180 79050000 .word .L657+1 + 11642 0184 2F060000 .word .L656+1 + 11643 0188 6B060000 .word .L655+1 + 11644 018c 37070000 .word .L653+1 + 11645 .p2align 1 + 11646 .L668: + 376:Src/main.c **** if (CheckChecksum(COMMAND)) + 11647 .loc 1 376 6 view .LVU3632 + 376:Src/main.c **** if (CheckChecksum(COMMAND)) + ARM GAS /tmp/ccLSPxIe.s page 620 - 11171 0194 1880 strh r0, [r3] @ movhi - 361:Src/main.c **** { - 11172 .loc 1 361 6 is_stmt 1 view .LVU3516 - 361:Src/main.c **** { - 11173 .loc 1 361 10 is_stmt 0 view .LVU3517 - 11174 0196 2046 mov r0, r4 - 11175 0198 FFF7FEFF bl CheckChecksum - 11176 .LVL993: - 361:Src/main.c **** { - 11177 .loc 1 361 9 discriminator 1 view .LVU3518 - 11178 019c 70B9 cbnz r0, .L683 - 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 11179 .loc 1 374 7 is_stmt 1 view .LVU3519 - 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 11180 .loc 1 374 17 is_stmt 0 view .LVU3520 - 11181 019e 454A ldr r2, .L694+32 - 11182 01a0 1378 ldrb r3, [r2] @ zero_extendqisi2 - 374:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 11183 .loc 1 374 21 view .LVU3521 - 11184 01a2 43F00403 orr r3, r3, #4 - 11185 01a6 1370 strb r3, [r2] - 375:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 11186 .loc 1 375 7 is_stmt 1 view .LVU3522 - 375:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 11187 .loc 1 375 17 is_stmt 0 view .LVU3523 - 11188 01a8 454B ldr r3, .L694+44 - 11189 01aa 0222 movs r2, #2 - 11190 01ac 1A70 strb r2, [r3] - 376:Src/main.c **** } - 11191 .loc 1 376 7 is_stmt 1 view .LVU3524 - 376:Src/main.c **** } - 11192 .loc 1 376 21 is_stmt 0 view .LVU3525 - 11193 01ae 3E4B ldr r3, .L694+20 - 11194 01b0 0022 movs r2, #0 - 11195 01b2 1A70 strb r2, [r3] - 11196 .L619: - 378:Src/main.c **** break; - 11197 .loc 1 378 6 is_stmt 1 view .LVU3526 - 378:Src/main.c **** break; - 11198 .loc 1 378 32 is_stmt 0 view .LVU3527 - 11199 01b4 3E4B ldr r3, .L694+28 - 11200 01b6 0122 movs r2, #1 - 11201 01b8 1A70 strb r2, [r3] - 379:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 11202 .loc 1 379 5 is_stmt 1 view .LVU3528 - 11203 01ba A2E7 b .L602 - 11204 .L683: - 363:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 11205 .loc 1 363 7 view .LVU3529 - 11206 .LVL994: - 11207 .LBB698: - 11208 .LBI698: + 11648 .loc 1 376 18 is_stmt 0 view .LVU3633 + 11649 0190 4F4C ldr r4, .L761+48 + 11650 0192 0D21 movs r1, #13 + 11651 0194 2046 mov r0, r4 + 11652 0196 FFF7FEFF bl CalculateChecksum + 11653 .LVL1030: + 376:Src/main.c **** if (CheckChecksum(COMMAND)) + 11654 .loc 1 376 16 discriminator 1 view .LVU3634 + 11655 019a 4E4B ldr r3, .L761+52 + 11656 019c 1880 strh r0, [r3] @ movhi + 377:Src/main.c **** { + 11657 .loc 1 377 6 is_stmt 1 view .LVU3635 + 377:Src/main.c **** { + 11658 .loc 1 377 10 is_stmt 0 view .LVU3636 + 11659 019e 2046 mov r0, r4 + 11660 01a0 FFF7FEFF bl CheckChecksum + 11661 .LVL1031: + 377:Src/main.c **** { + 11662 .loc 1 377 9 discriminator 1 view .LVU3637 + 11663 01a4 70B9 cbnz r0, .L747 + 390:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 11664 .loc 1 390 7 is_stmt 1 view .LVU3638 + 390:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 11665 .loc 1 390 17 is_stmt 0 view .LVU3639 + 11666 01a6 464A ldr r2, .L761+32 + 11667 01a8 1378 ldrb r3, [r2] @ zero_extendqisi2 + 390:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 11668 .loc 1 390 21 view .LVU3640 + 11669 01aa 43F00403 orr r3, r3, #4 + 11670 01ae 1370 strb r3, [r2] + 391:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 11671 .loc 1 391 7 is_stmt 1 view .LVU3641 + 391:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 11672 .loc 1 391 17 is_stmt 0 view .LVU3642 + 11673 01b0 464B ldr r3, .L761+44 + 11674 01b2 0222 movs r2, #2 + 11675 01b4 1A70 strb r2, [r3] + 392:Src/main.c **** } + 11676 .loc 1 392 7 is_stmt 1 view .LVU3643 + 392:Src/main.c **** } + 11677 .loc 1 392 21 is_stmt 0 view .LVU3644 + 11678 01b6 3F4B ldr r3, .L761+20 + 11679 01b8 0022 movs r2, #0 + 11680 01ba 1A70 strb r2, [r3] + 11681 .L671: + 394:Src/main.c **** break; + 11682 .loc 1 394 6 is_stmt 1 view .LVU3645 + 394:Src/main.c **** break; + 11683 .loc 1 394 32 is_stmt 0 view .LVU3646 + 11684 01bc 3F4B ldr r3, .L761+28 + 11685 01be 0122 movs r2, #1 + 11686 01c0 1A70 strb r2, [r3] + 395:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 11687 .loc 1 395 5 is_stmt 1 view .LVU3647 + 11688 01c2 9EE7 b .L652 + 11689 .L747: + 379:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + ARM GAS /tmp/ccLSPxIe.s page 621 + + + 11690 .loc 1 379 7 view .LVU3648 + 11691 .LVL1032: + 11692 .LBB703: + 11693 .LBI703: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 11209 .loc 4 358 22 view .LVU3530 - 11210 .LBB699: + 11694 .loc 4 358 22 view .LVU3649 + 11695 .LBB704: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11211 .loc 4 360 3 view .LVU3531 - ARM GAS /tmp/ccuHnxNu.s page 607 - - - 11212 01bc 434A ldr r2, .L694+56 - 11213 01be 1368 ldr r3, [r2] - 11214 01c0 43F04003 orr r3, r3, #64 - 11215 01c4 1360 str r3, [r2] - 11216 .LVL995: + 11696 .loc 4 360 3 view .LVU3650 + 11697 01c4 444A ldr r2, .L761+56 + 11698 01c6 1368 ldr r3, [r2] + 11699 01c8 43F04003 orr r3, r3, #64 + 11700 01cc 1360 str r3, [r2] + 11701 .LVL1033: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11217 .loc 4 360 3 is_stmt 0 view .LVU3532 - 11218 .LBE699: - 11219 .LBE698: - 364:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 11220 .loc 1 364 7 is_stmt 1 view .LVU3533 - 11221 .LBB700: - 11222 .LBI700: + 11702 .loc 4 360 3 is_stmt 0 view .LVU3651 + 11703 .LBE704: + 11704 .LBE703: + 380:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 11705 .loc 1 380 7 is_stmt 1 view .LVU3652 + 11706 .LBB705: + 11707 .LBI705: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 11223 .loc 4 358 22 view .LVU3534 - 11224 .LBB701: + 11708 .loc 4 358 22 view .LVU3653 + 11709 .LBB706: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11225 .loc 4 360 3 view .LVU3535 - 11226 01c6 02F58E32 add r2, r2, #72704 - 11227 01ca 1368 ldr r3, [r2] - 11228 01cc 43F04003 orr r3, r3, #64 - 11229 01d0 1360 str r3, [r2] - 11230 .LVL996: + 11710 .loc 4 360 3 view .LVU3654 + 11711 01ce 02F58E32 add r2, r2, #72704 + 11712 01d2 1368 ldr r3, [r2] + 11713 01d4 43F04003 orr r3, r3, #64 + 11714 01d8 1360 str r3, [r2] + 11715 .LVL1034: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11231 .loc 4 360 3 is_stmt 0 view .LVU3536 - 11232 .LBE701: - 11233 .LBE700: - 365:Src/main.c **** TO6_before = TO6; - 11234 .loc 1 365 7 is_stmt 1 view .LVU3537 - 11235 01d2 3F4B ldr r3, .L694+60 - 11236 01d4 3F4A ldr r2, .L694+64 - 11237 01d6 4049 ldr r1, .L694+68 - 11238 01d8 2046 mov r0, r4 - 11239 01da FFF7FEFF bl Decode_uart - 11240 .LVL997: - 366:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 11241 .loc 1 366 7 view .LVU3538 - 366:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 11242 .loc 1 366 18 is_stmt 0 view .LVU3539 - 11243 01de 3F4B ldr r3, .L694+72 - 11244 01e0 1A68 ldr r2, [r3] - 11245 01e2 3F4B ldr r3, .L694+76 - 11246 01e4 1A60 str r2, [r3] - 369:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 11247 .loc 1 369 7 is_stmt 1 view .LVU3540 - 369:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 11248 .loc 1 369 17 is_stmt 0 view .LVU3541 - 11249 01e6 0723 movs r3, #7 - 11250 01e8 354A ldr r2, .L694+44 - 11251 01ea 1370 strb r3, [r2] - 370:Src/main.c **** } - 11252 .loc 1 370 7 is_stmt 1 view .LVU3542 - 370:Src/main.c **** } - 11253 .loc 1 370 21 is_stmt 0 view .LVU3543 - 11254 01ec 2E4A ldr r2, .L694+20 - 11255 01ee 1370 strb r3, [r2] - 11256 01f0 E0E7 b .L619 - ARM GAS /tmp/ccuHnxNu.s page 608 + 11716 .loc 4 360 3 is_stmt 0 view .LVU3655 + 11717 .LBE706: + 11718 .LBE705: + 381:Src/main.c **** TO6_before = TO6; + 11719 .loc 1 381 7 is_stmt 1 view .LVU3656 + 11720 01da 404B ldr r3, .L761+60 + 11721 01dc 404A ldr r2, .L761+64 + 11722 01de 4149 ldr r1, .L761+68 + 11723 01e0 2046 mov r0, r4 + 11724 01e2 FFF7FEFF bl Decode_uart + 11725 .LVL1035: + 382:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 11726 .loc 1 382 7 view .LVU3657 + 382:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 11727 .loc 1 382 18 is_stmt 0 view .LVU3658 + 11728 01e6 404B ldr r3, .L761+72 + 11729 01e8 1A68 ldr r2, [r3] + 11730 01ea 404B ldr r3, .L761+76 + 11731 01ec 1A60 str r2, [r3] + 385:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 11732 .loc 1 385 7 is_stmt 1 view .LVU3659 + 385:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 11733 .loc 1 385 17 is_stmt 0 view .LVU3660 + 11734 01ee 0723 movs r3, #7 + ARM GAS /tmp/ccLSPxIe.s page 622 - 11257 .L615: - 382:Src/main.c **** Stop_TIM10(); - 11258 .loc 1 382 6 is_stmt 1 view .LVU3544 - 382:Src/main.c **** Stop_TIM10(); - 11259 .loc 1 382 31 is_stmt 0 view .LVU3545 - 11260 01f2 2E4B ldr r3, .L694+24 - 11261 01f4 5A68 ldr r2, [r3, #4] @ float - 382:Src/main.c **** Stop_TIM10(); - 11262 .loc 1 382 25 view .LVU3546 - 11263 01f6 1A61 str r2, [r3, #16] @ float - 383:Src/main.c **** Init_params(); - 11264 .loc 1 383 6 is_stmt 1 view .LVU3547 - 11265 01f8 FFF7FEFF bl Stop_TIM10 - 11266 .LVL998: - 384:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 11267 .loc 1 384 6 view .LVU3548 - 11268 01fc FFF7FEFF bl Init_params - 11269 .LVL999: - 385:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 11270 .loc 1 385 6 view .LVU3549 - 11271 .LBB702: - 11272 .LBI702: + 11735 01f0 364A ldr r2, .L761+44 + 11736 01f2 1370 strb r3, [r2] + 386:Src/main.c **** } + 11737 .loc 1 386 7 is_stmt 1 view .LVU3661 + 386:Src/main.c **** } + 11738 .loc 1 386 21 is_stmt 0 view .LVU3662 + 11739 01f4 2F4A ldr r2, .L761+20 + 11740 01f6 1370 strb r3, [r2] + 11741 01f8 E0E7 b .L671 + 11742 .L667: + 398:Src/main.c **** Stop_TIM10(); + 11743 .loc 1 398 6 is_stmt 1 view .LVU3663 + 398:Src/main.c **** Stop_TIM10(); + 11744 .loc 1 398 31 is_stmt 0 view .LVU3664 + 11745 01fa 2F4B ldr r3, .L761+24 + 11746 01fc 5A68 ldr r2, [r3, #4] @ float + 398:Src/main.c **** Stop_TIM10(); + 11747 .loc 1 398 25 view .LVU3665 + 11748 01fe 1A61 str r2, [r3, #16] @ float + 399:Src/main.c **** Init_params(); + 11749 .loc 1 399 6 is_stmt 1 view .LVU3666 + 11750 0200 FFF7FEFF bl Stop_TIM10 + 11751 .LVL1036: + 400:Src/main.c **** AD9102_CancelWaveUpload(); + 11752 .loc 1 400 6 view .LVU3667 + 11753 0204 FFF7FEFF bl Init_params + 11754 .LVL1037: + 401:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 11755 .loc 1 401 6 view .LVU3668 + 11756 0208 FFF7FEFF bl AD9102_CancelWaveUpload + 11757 .LVL1038: + 402:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 11758 .loc 1 402 6 view .LVU3669 + 11759 .LBB707: + 11760 .LBI707: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 11273 .loc 4 370 22 view .LVU3550 - 11274 .LBB703: + 11761 .loc 4 370 22 view .LVU3670 + 11762 .LBB708: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11275 .loc 4 372 3 view .LVU3551 - 11276 0200 324A ldr r2, .L694+56 - 11277 0202 1368 ldr r3, [r2] - 11278 0204 23F04003 bic r3, r3, #64 - 11279 0208 1360 str r3, [r2] - 11280 .LVL1000: + 11763 .loc 4 372 3 view .LVU3671 + 11764 020c 324A ldr r2, .L761+56 + 11765 020e 1368 ldr r3, [r2] + 11766 0210 23F04003 bic r3, r3, #64 + 11767 0214 1360 str r3, [r2] + 11768 .LVL1039: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11281 .loc 4 372 3 is_stmt 0 view .LVU3552 - 11282 .LBE703: - 11283 .LBE702: - 386:Src/main.c **** CPU_state = HALT; - 11284 .loc 1 386 6 is_stmt 1 view .LVU3553 - 11285 .LBB704: - 11286 .LBI704: + 11769 .loc 4 372 3 is_stmt 0 view .LVU3672 + 11770 .LBE708: + 11771 .LBE707: + 403:Src/main.c **** CPU_state = HALT; + 11772 .loc 1 403 6 is_stmt 1 view .LVU3673 + 11773 .LBB709: + 11774 .LBI709: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 11287 .loc 4 370 22 view .LVU3554 - 11288 .LBB705: + 11775 .loc 4 370 22 view .LVU3674 + 11776 .LBB710: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11289 .loc 4 372 3 view .LVU3555 - 11290 020a 02F58E32 add r2, r2, #72704 - 11291 020e 1368 ldr r3, [r2] - 11292 0210 23F04003 bic r3, r3, #64 - 11293 0214 1360 str r3, [r2] - 11294 .LVL1001: + ARM GAS /tmp/ccLSPxIe.s page 623 + + + 11777 .loc 4 372 3 view .LVU3675 + 11778 0216 02F58E32 add r2, r2, #72704 + 11779 021a 1368 ldr r3, [r2] + 11780 021c 23F04003 bic r3, r3, #64 + 11781 0220 1360 str r3, [r2] + 11782 .LVL1040: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 11295 .loc 4 372 3 is_stmt 0 view .LVU3556 - 11296 .LBE705: - 11297 .LBE704: - 387:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 11298 .loc 1 387 6 is_stmt 1 view .LVU3557 - 387:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - ARM GAS /tmp/ccuHnxNu.s page 609 + 11783 .loc 4 372 3 is_stmt 0 view .LVU3676 + 11784 .LBE710: + 11785 .LBE709: + 404:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 11786 .loc 1 404 6 is_stmt 1 view .LVU3677 + 404:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 11787 .loc 1 404 16 is_stmt 0 view .LVU3678 + 11788 0222 0023 movs r3, #0 + 11789 0224 294A ldr r2, .L761+44 + 11790 0226 1370 strb r3, [r2] + 405:Src/main.c **** UART_transmission_request = MESS_01; + 11791 .loc 1 405 6 is_stmt 1 view .LVU3679 + 405:Src/main.c **** UART_transmission_request = MESS_01; + 11792 .loc 1 405 20 is_stmt 0 view .LVU3680 + 11793 0228 224A ldr r2, .L761+20 + 11794 022a 1370 strb r3, [r2] + 406:Src/main.c **** break; + 11795 .loc 1 406 6 is_stmt 1 view .LVU3681 + 406:Src/main.c **** break; + 11796 .loc 1 406 32 is_stmt 0 view .LVU3682 + 11797 022c 234B ldr r3, .L761+28 + 11798 022e 0122 movs r2, #1 + 11799 0230 1A70 strb r2, [r3] + 407:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 11800 .loc 1 407 5 is_stmt 1 view .LVU3683 + 11801 0232 66E7 b .L652 + 11802 .L666: + 409:Src/main.c **** State_Data[0]|=temp16&0xff; + 11803 .loc 1 409 6 view .LVU3684 + 409:Src/main.c **** State_Data[0]|=temp16&0xff; + 11804 .loc 1 409 15 is_stmt 0 view .LVU3685 + 11805 0234 2E48 ldr r0, .L761+80 + 11806 0236 FFF7FEFF bl SD_READ + 11807 .LVL1041: + 409:Src/main.c **** State_Data[0]|=temp16&0xff; + 11808 .loc 1 409 13 discriminator 1 view .LVU3686 + 11809 023a 82B2 uxth r2, r0 + 11810 023c 2D4B ldr r3, .L761+84 + 11811 023e 1A80 strh r2, [r3] @ movhi + 410:Src/main.c **** if (temp16==0) + 11812 .loc 1 410 6 is_stmt 1 view .LVU3687 + 410:Src/main.c **** if (temp16==0) + 11813 .loc 1 410 16 is_stmt 0 view .LVU3688 + 11814 0240 1F49 ldr r1, .L761+32 + 11815 0242 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 410:Src/main.c **** if (temp16==0) + 11816 .loc 1 410 19 view .LVU3689 + 11817 0244 0343 orrs r3, r3, r0 + 11818 0246 0B70 strb r3, [r1] + 411:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 624 - 11299 .loc 1 387 16 is_stmt 0 view .LVU3558 - 11300 0216 0023 movs r3, #0 - 11301 0218 294A ldr r2, .L694+44 - 11302 021a 1370 strb r3, [r2] - 388:Src/main.c **** UART_transmission_request = MESS_01; - 11303 .loc 1 388 6 is_stmt 1 view .LVU3559 - 388:Src/main.c **** UART_transmission_request = MESS_01; - 11304 .loc 1 388 20 is_stmt 0 view .LVU3560 - 11305 021c 224A ldr r2, .L694+20 - 11306 021e 1370 strb r3, [r2] - 389:Src/main.c **** break; - 11307 .loc 1 389 6 is_stmt 1 view .LVU3561 - 389:Src/main.c **** break; - 11308 .loc 1 389 32 is_stmt 0 view .LVU3562 - 11309 0220 234B ldr r3, .L694+28 - 11310 0222 0122 movs r2, #1 - 11311 0224 1A70 strb r2, [r3] - 390:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 11312 .loc 1 390 5 is_stmt 1 view .LVU3563 - 11313 0226 6CE7 b .L602 - 11314 .L614: - 392:Src/main.c **** State_Data[0]|=temp16&0xff; - 11315 .loc 1 392 6 view .LVU3564 - 392:Src/main.c **** State_Data[0]|=temp16&0xff; - 11316 .loc 1 392 15 is_stmt 0 view .LVU3565 - 11317 0228 2E48 ldr r0, .L694+80 - 11318 022a FFF7FEFF bl SD_READ - 11319 .LVL1002: - 392:Src/main.c **** State_Data[0]|=temp16&0xff; - 11320 .loc 1 392 13 discriminator 1 view .LVU3566 - 11321 022e 82B2 uxth r2, r0 - 11322 0230 2D4B ldr r3, .L694+84 - 11323 0232 1A80 strh r2, [r3] @ movhi - 393:Src/main.c **** if (temp16==0) - 11324 .loc 1 393 6 is_stmt 1 view .LVU3567 - 393:Src/main.c **** if (temp16==0) - 11325 .loc 1 393 16 is_stmt 0 view .LVU3568 - 11326 0234 1F49 ldr r1, .L694+32 - 11327 0236 0B78 ldrb r3, [r1] @ zero_extendqisi2 - 393:Src/main.c **** if (temp16==0) - 11328 .loc 1 393 19 view .LVU3569 - 11329 0238 0343 orrs r3, r3, r0 - 11330 023a 0B70 strb r3, [r1] - 394:Src/main.c **** { - 11331 .loc 1 394 6 is_stmt 1 view .LVU3570 - 394:Src/main.c **** { - 11332 .loc 1 394 9 is_stmt 0 view .LVU3571 - 11333 023c 42B9 cbnz r2, .L620 - 396:Src/main.c **** } - 11334 .loc 1 396 7 is_stmt 1 view .LVU3572 - 396:Src/main.c **** } - 11335 .loc 1 396 33 is_stmt 0 view .LVU3573 - 11336 023e 1C4B ldr r3, .L694+28 - 11337 0240 0322 movs r2, #3 - 11338 0242 1A70 strb r2, [r3] - 11339 .L621: - 402:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - ARM GAS /tmp/ccuHnxNu.s page 610 + 11819 .loc 1 411 6 is_stmt 1 view .LVU3690 + 411:Src/main.c **** { + 11820 .loc 1 411 9 is_stmt 0 view .LVU3691 + 11821 0248 42B9 cbnz r2, .L672 + 413:Src/main.c **** } + 11822 .loc 1 413 7 is_stmt 1 view .LVU3692 + 413:Src/main.c **** } + 11823 .loc 1 413 33 is_stmt 0 view .LVU3693 + 11824 024a 1C4B ldr r3, .L761+28 + 11825 024c 0322 movs r2, #3 + 11826 024e 1A70 strb r2, [r3] + 11827 .L673: + 419:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11828 .loc 1 419 6 is_stmt 1 view .LVU3694 + 419:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11829 .loc 1 419 20 is_stmt 0 view .LVU3695 + 11830 0250 0023 movs r3, #0 + 11831 0252 184A ldr r2, .L761+20 + 11832 0254 1370 strb r3, [r2] + 420:Src/main.c **** break; + 11833 .loc 1 420 6 is_stmt 1 view .LVU3696 + 420:Src/main.c **** break; + 11834 .loc 1 420 16 is_stmt 0 view .LVU3697 + 11835 0256 1D4A ldr r2, .L761+44 + 11836 0258 1370 strb r3, [r2] + 421:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 11837 .loc 1 421 5 is_stmt 1 view .LVU3698 + 11838 025a 52E7 b .L652 + 11839 .L672: + 417:Src/main.c **** } + 11840 .loc 1 417 7 view .LVU3699 + 417:Src/main.c **** } + 11841 .loc 1 417 33 is_stmt 0 view .LVU3700 + 11842 025c 174B ldr r3, .L761+28 + 11843 025e 0122 movs r2, #1 + 11844 0260 1A70 strb r2, [r3] + 11845 0262 F5E7 b .L673 + 11846 .L665: + 423:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11847 .loc 1 423 6 is_stmt 1 view .LVU3701 + 423:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11848 .loc 1 423 32 is_stmt 0 view .LVU3702 + 11849 0264 154B ldr r3, .L761+28 + 11850 0266 0222 movs r2, #2 + 11851 0268 1A70 strb r2, [r3] + 424:Src/main.c **** break; + 11852 .loc 1 424 6 is_stmt 1 view .LVU3703 + 424:Src/main.c **** break; + 11853 .loc 1 424 16 is_stmt 0 view .LVU3704 + 11854 026a 124B ldr r3, .L761+20 + 11855 026c 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 11856 026e 174B ldr r3, .L761+44 + 11857 0270 1A70 strb r2, [r3] + 425:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 11858 .loc 1 425 5 is_stmt 1 view .LVU3705 + 11859 0272 46E7 b .L652 + 11860 .L664: + ARM GAS /tmp/ccLSPxIe.s page 625 - 11340 .loc 1 402 6 is_stmt 1 view .LVU3574 - 402:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11341 .loc 1 402 20 is_stmt 0 view .LVU3575 - 11342 0244 0023 movs r3, #0 - 11343 0246 184A ldr r2, .L694+20 - 11344 0248 1370 strb r3, [r2] - 403:Src/main.c **** break; - 11345 .loc 1 403 6 is_stmt 1 view .LVU3576 - 403:Src/main.c **** break; - 11346 .loc 1 403 16 is_stmt 0 view .LVU3577 - 11347 024a 1D4A ldr r2, .L694+44 - 11348 024c 1370 strb r3, [r2] - 404:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 11349 .loc 1 404 5 is_stmt 1 view .LVU3578 - 11350 024e 58E7 b .L602 - 11351 .L620: - 400:Src/main.c **** } - 11352 .loc 1 400 7 view .LVU3579 - 400:Src/main.c **** } - 11353 .loc 1 400 33 is_stmt 0 view .LVU3580 - 11354 0250 174B ldr r3, .L694+28 - 11355 0252 0122 movs r2, #1 - 11356 0254 1A70 strb r2, [r3] - 11357 0256 F5E7 b .L621 - 11358 .L613: - 406:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11359 .loc 1 406 6 is_stmt 1 view .LVU3581 - 406:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11360 .loc 1 406 32 is_stmt 0 view .LVU3582 - 11361 0258 154B ldr r3, .L694+28 - 11362 025a 0222 movs r2, #2 - 11363 025c 1A70 strb r2, [r3] - 407:Src/main.c **** break; - 11364 .loc 1 407 6 is_stmt 1 view .LVU3583 - 407:Src/main.c **** break; - 11365 .loc 1 407 16 is_stmt 0 view .LVU3584 - 11366 025e 124B ldr r3, .L694+20 - 11367 0260 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 11368 0262 174B ldr r3, .L694+44 - 11369 0264 1A70 strb r2, [r3] - 408:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 11370 .loc 1 408 5 is_stmt 1 view .LVU3585 - 11371 0266 4CE7 b .L602 - 11372 .L612: - 410:Src/main.c **** UART_transmission_request = MESS_01; - 11373 .loc 1 410 6 view .LVU3586 - 410:Src/main.c **** UART_transmission_request = MESS_01; - 11374 .loc 1 410 21 is_stmt 0 view .LVU3587 - 11375 0268 FFF7FEFF bl SD_REMOVE - 11376 .LVL1003: - 410:Src/main.c **** UART_transmission_request = MESS_01; - 11377 .loc 1 410 16 discriminator 1 view .LVU3588 - 11378 026c 114A ldr r2, .L694+32 - 11379 026e 1378 ldrb r3, [r2] @ zero_extendqisi2 - 410:Src/main.c **** UART_transmission_request = MESS_01; - 11380 .loc 1 410 19 discriminator 1 view .LVU3589 - 11381 0270 0343 orrs r3, r3, r0 - ARM GAS /tmp/ccuHnxNu.s page 611 + 427:Src/main.c **** UART_transmission_request = MESS_01; + 11861 .loc 1 427 6 view .LVU3706 + 427:Src/main.c **** UART_transmission_request = MESS_01; + 11862 .loc 1 427 21 is_stmt 0 view .LVU3707 + 11863 0274 FFF7FEFF bl SD_REMOVE + 11864 .LVL1042: + 427:Src/main.c **** UART_transmission_request = MESS_01; + 11865 .loc 1 427 16 discriminator 1 view .LVU3708 + 11866 0278 114A ldr r2, .L761+32 + 11867 027a 1378 ldrb r3, [r2] @ zero_extendqisi2 + 427:Src/main.c **** UART_transmission_request = MESS_01; + 11868 .loc 1 427 19 discriminator 1 view .LVU3709 + 11869 027c 0343 orrs r3, r3, r0 + 11870 027e 1370 strb r3, [r2] + 428:Src/main.c **** CPU_state = CPU_state_old; + 11871 .loc 1 428 6 is_stmt 1 view .LVU3710 + 428:Src/main.c **** CPU_state = CPU_state_old; + 11872 .loc 1 428 32 is_stmt 0 view .LVU3711 + 11873 0280 0E4B ldr r3, .L761+28 + 11874 0282 0122 movs r2, #1 + 11875 0284 1A70 strb r2, [r3] + 429:Src/main.c **** break; + 11876 .loc 1 429 6 is_stmt 1 view .LVU3712 + 429:Src/main.c **** break; + 11877 .loc 1 429 16 is_stmt 0 view .LVU3713 + 11878 0286 0B4B ldr r3, .L761+20 + 11879 0288 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 11880 028a 104B ldr r3, .L761+44 + 11881 028c 1A70 strb r2, [r3] + 430:Src/main.c **** case STATE://6 - Transmith state message + 11882 .loc 1 430 5 is_stmt 1 view .LVU3714 + 11883 028e 38E7 b .L652 + 11884 .L663: + 432:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11885 .loc 1 432 6 view .LVU3715 + 432:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 11886 .loc 1 432 32 is_stmt 0 view .LVU3716 + 11887 0290 0A4B ldr r3, .L761+28 + 11888 0292 0122 movs r2, #1 + 11889 0294 1A70 strb r2, [r3] + 433:Src/main.c **** break; + 11890 .loc 1 433 6 is_stmt 1 view .LVU3717 + 433:Src/main.c **** break; + 11891 .loc 1 433 16 is_stmt 0 view .LVU3718 + 11892 0296 074B ldr r3, .L761+20 + 11893 0298 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 11894 029a 0C4B ldr r3, .L761+44 + 11895 029c 1A70 strb r2, [r3] + 434:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 11896 .loc 1 434 5 is_stmt 1 view .LVU3719 + 11897 029e 30E7 b .L652 + 11898 .L762: + 11899 .align 2 + 11900 .L761: + 11901 02a0 00080040 .word 1073743872 + 11902 02a4 00000000 .word htim1 + 11903 02a8 00000000 .word u_rx_flg + ARM GAS /tmp/ccLSPxIe.s page 626 - 11382 0272 1370 strb r3, [r2] - 411:Src/main.c **** CPU_state = CPU_state_old; - 11383 .loc 1 411 6 is_stmt 1 view .LVU3590 - 411:Src/main.c **** CPU_state = CPU_state_old; - 11384 .loc 1 411 32 is_stmt 0 view .LVU3591 - 11385 0274 0E4B ldr r3, .L694+28 - 11386 0276 0122 movs r2, #1 - 11387 0278 1A70 strb r2, [r3] - 412:Src/main.c **** break; - 11388 .loc 1 412 6 is_stmt 1 view .LVU3592 - 412:Src/main.c **** break; - 11389 .loc 1 412 16 is_stmt 0 view .LVU3593 - 11390 027a 0B4B ldr r3, .L694+20 - 11391 027c 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 11392 027e 104B ldr r3, .L694+44 - 11393 0280 1A70 strb r2, [r3] - 413:Src/main.c **** case STATE://6 - Transmith state message - 11394 .loc 1 413 5 is_stmt 1 view .LVU3594 - 11395 0282 3EE7 b .L602 - 11396 .L611: - 415:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11397 .loc 1 415 6 view .LVU3595 - 415:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 11398 .loc 1 415 32 is_stmt 0 view .LVU3596 - 11399 0284 0A4B ldr r3, .L694+28 - 11400 0286 0122 movs r2, #1 - 11401 0288 1A70 strb r2, [r3] - 416:Src/main.c **** break; - 11402 .loc 1 416 6 is_stmt 1 view .LVU3597 - 416:Src/main.c **** break; - 11403 .loc 1 416 16 is_stmt 0 view .LVU3598 - 11404 028a 074B ldr r3, .L694+20 - 11405 028c 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 11406 028e 0C4B ldr r3, .L694+44 - 11407 0290 1A70 strb r2, [r3] - 417:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 11408 .loc 1 417 5 is_stmt 1 view .LVU3599 - 11409 0292 36E7 b .L602 - 11410 .L695: - 11411 .align 2 - 11412 .L694: - 11413 0294 00080040 .word 1073743872 - 11414 0298 00000000 .word htim1 - 11415 029c 00000000 .word u_rx_flg - 11416 02a0 00100140 .word 1073811456 - 11417 02a4 00E100E0 .word -536813312 - 11418 02a8 00000000 .word CPU_state_old - 11419 02ac 00000000 .word task - 11420 02b0 00000000 .word UART_transmission_request - 11421 02b4 00000000 .word State_Data - 11422 02b8 00000000 .word flg_tmt - 11423 02bc 00000240 .word 1073872896 - 11424 02c0 00000000 .word CPU_state - 11425 02c4 00000000 .word COMMAND - 11426 02c8 00000000 .word CS_result - 11427 02cc 00380040 .word 1073756160 - 11428 02d0 00000000 .word Curr_setup - ARM GAS /tmp/ccuHnxNu.s page 612 + 11904 02ac 00100140 .word 1073811456 + 11905 02b0 00E100E0 .word -536813312 + 11906 02b4 00000000 .word CPU_state_old + 11907 02b8 00000000 .word task + 11908 02bc 00000000 .word UART_transmission_request + 11909 02c0 00000000 .word State_Data + 11910 02c4 00000000 .word flg_tmt + 11911 02c8 00000240 .word 1073872896 + 11912 02cc 00000000 .word CPU_state + 11913 02d0 00000000 .word COMMAND + 11914 02d4 00000000 .word CS_result + 11915 02d8 00380040 .word 1073756160 + 11916 02dc 00000000 .word Curr_setup + 11917 02e0 00000000 .word LD2_curr_setup + 11918 02e4 00000000 .word LD1_curr_setup + 11919 02e8 00000000 .word TO6 + 11920 02ec 00000000 .word TO6_before + 11921 02f0 00000000 .word Long_Data + 11922 02f4 00000000 .word temp16 + 11923 .L662: + 436:Src/main.c **** Stop_TIM10(); + 11924 .loc 1 436 6 view .LVU3720 + 436:Src/main.c **** Stop_TIM10(); + 11925 .loc 1 436 31 is_stmt 0 view .LVU3721 + 11926 02f8 B24B ldr r3, .L763 + 11927 02fa 5A68 ldr r2, [r3, #4] @ float + 436:Src/main.c **** Stop_TIM10(); + 11928 .loc 1 436 25 view .LVU3722 + 11929 02fc 1A61 str r2, [r3, #16] @ float + 437:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 11930 .loc 1 437 6 is_stmt 1 view .LVU3723 + 11931 02fe FFF7FEFF bl Stop_TIM10 + 11932 .LVL1043: + 438:Src/main.c **** { + 11933 .loc 1 438 6 view .LVU3724 + 438:Src/main.c **** { + 11934 .loc 1 438 13 is_stmt 0 view .LVU3725 + 11935 0302 B14B ldr r3, .L763+4 + 11936 0304 1B68 ldr r3, [r3] + 11937 0306 B14A ldr r2, .L763+8 + 11938 0308 1268 ldr r2, [r2] + 438:Src/main.c **** { + 11939 .loc 1 438 9 view .LVU3726 + 11940 030a 9342 cmp r3, r2 + 11941 030c 7FF6F9AE bls .L652 + 440:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11942 .loc 1 440 7 is_stmt 1 view .LVU3727 + 440:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11943 .loc 1 440 18 is_stmt 0 view .LVU3728 + 11944 0310 AE4A ldr r2, .L763+8 + 11945 0312 1360 str r3, [r2] + 441:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11946 .loc 1 441 7 is_stmt 1 view .LVU3729 + 441:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11947 .loc 1 441 25 is_stmt 0 view .LVU3730 + 11948 0314 0120 movs r0, #1 + 11949 0316 FFF7FEFF bl MPhD_T + ARM GAS /tmp/ccLSPxIe.s page 627 - 11429 02d4 00000000 .word LD2_curr_setup - 11430 02d8 00000000 .word LD1_curr_setup - 11431 02dc 00000000 .word TO6 - 11432 02e0 00000000 .word TO6_before - 11433 02e4 00000000 .word Long_Data - 11434 02e8 00000000 .word temp16 - 11435 .L610: - 419:Src/main.c **** Stop_TIM10(); - 11436 .loc 1 419 6 view .LVU3600 - 419:Src/main.c **** Stop_TIM10(); - 11437 .loc 1 419 31 is_stmt 0 view .LVU3601 - 11438 02ec B24B ldr r3, .L696 - 11439 02ee 5A68 ldr r2, [r3, #4] @ float - 419:Src/main.c **** Stop_TIM10(); - 11440 .loc 1 419 25 view .LVU3602 - 11441 02f0 1A61 str r2, [r3, #16] @ float - 420:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 11442 .loc 1 420 6 is_stmt 1 view .LVU3603 - 11443 02f2 FFF7FEFF bl Stop_TIM10 - 11444 .LVL1004: - 421:Src/main.c **** { - 11445 .loc 1 421 6 view .LVU3604 - 421:Src/main.c **** { - 11446 .loc 1 421 13 is_stmt 0 view .LVU3605 - 11447 02f6 B14B ldr r3, .L696+4 - 11448 02f8 1B68 ldr r3, [r3] - 11449 02fa B14A ldr r2, .L696+8 - 11450 02fc 1268 ldr r2, [r2] - 421:Src/main.c **** { - 11451 .loc 1 421 9 view .LVU3606 - 11452 02fe 9342 cmp r3, r2 - 11453 0300 7FF6FFAE bls .L602 - 423:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 11454 .loc 1 423 7 is_stmt 1 view .LVU3607 - 423:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 11455 .loc 1 423 18 is_stmt 0 view .LVU3608 - 11456 0304 AE4A ldr r2, .L696+8 - 11457 0306 1360 str r3, [r2] - 424:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 11458 .loc 1 424 7 is_stmt 1 view .LVU3609 - 424:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 11459 .loc 1 424 25 is_stmt 0 view .LVU3610 - 11460 0308 0120 movs r0, #1 - 11461 030a FFF7FEFF bl MPhD_T - 11462 .LVL1005: - 424:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 11463 .loc 1 424 23 discriminator 1 view .LVU3611 - 11464 030e AD4F ldr r7, .L696+12 - 11465 0310 3881 strh r0, [r7, #8] @ movhi - 425:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11466 .loc 1 425 7 is_stmt 1 view .LVU3612 - 425:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11467 .loc 1 425 25 is_stmt 0 view .LVU3613 - 11468 0312 0120 movs r0, #1 - 11469 0314 FFF7FEFF bl MPhD_T - 11470 .LVL1006: - 425:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - ARM GAS /tmp/ccuHnxNu.s page 613 + 11950 .LVL1044: + 441:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 11951 .loc 1 441 23 discriminator 1 view .LVU3731 + 11952 031a AD4F ldr r7, .L763+12 + 11953 031c 3881 strh r0, [r7, #8] @ movhi + 442:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11954 .loc 1 442 7 is_stmt 1 view .LVU3732 + 442:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11955 .loc 1 442 25 is_stmt 0 view .LVU3733 + 11956 031e 0120 movs r0, #1 + 11957 0320 FFF7FEFF bl MPhD_T + 11958 .LVL1045: + 442:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11959 .loc 1 442 23 discriminator 1 view .LVU3734 + 11960 0324 3881 strh r0, [r7, #8] @ movhi + 443:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11961 .loc 1 443 7 is_stmt 1 view .LVU3735 + 443:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11962 .loc 1 443 25 is_stmt 0 view .LVU3736 + 11963 0326 0220 movs r0, #2 + 11964 0328 FFF7FEFF bl MPhD_T + 11965 .LVL1046: + 443:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 11966 .loc 1 443 23 discriminator 1 view .LVU3737 + 11967 032c A94E ldr r6, .L763+16 + 11968 032e 3081 strh r0, [r6, #8] @ movhi + 444:Src/main.c **** + 11969 .loc 1 444 7 is_stmt 1 view .LVU3738 + 444:Src/main.c **** + 11970 .loc 1 444 25 is_stmt 0 view .LVU3739 + 11971 0330 0220 movs r0, #2 + 11972 0332 FFF7FEFF bl MPhD_T + 11973 .LVL1047: + 444:Src/main.c **** + 11974 .loc 1 444 23 discriminator 1 view .LVU3740 + 11975 0336 3081 strh r0, [r6, #8] @ movhi + 447:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 11976 .loc 1 447 7 is_stmt 1 view .LVU3741 + 447:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 11977 .loc 1 447 14 is_stmt 0 view .LVU3742 + 11978 0338 0320 movs r0, #3 + 11979 033a FFF7FEFF bl MPhD_T + 11980 .LVL1048: + 448:Src/main.c **** (void) MPhD_T(4); + 11981 .loc 1 448 7 is_stmt 1 view .LVU3743 + 448:Src/main.c **** (void) MPhD_T(4); + 11982 .loc 1 448 32 is_stmt 0 view .LVU3744 + 11983 033e 0320 movs r0, #3 + 11984 0340 FFF7FEFF bl MPhD_T + 11985 .LVL1049: + 448:Src/main.c **** (void) MPhD_T(4); + 11986 .loc 1 448 30 discriminator 1 view .LVU3745 + 11987 0344 3880 strh r0, [r7] @ movhi + 449:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 11988 .loc 1 449 7 is_stmt 1 view .LVU3746 + 449:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 11989 .loc 1 449 14 is_stmt 0 view .LVU3747 + ARM GAS /tmp/ccLSPxIe.s page 628 - 11471 .loc 1 425 23 discriminator 1 view .LVU3614 - 11472 0318 3881 strh r0, [r7, #8] @ movhi - 426:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11473 .loc 1 426 7 is_stmt 1 view .LVU3615 - 426:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11474 .loc 1 426 25 is_stmt 0 view .LVU3616 - 11475 031a 0220 movs r0, #2 - 11476 031c FFF7FEFF bl MPhD_T - 11477 .LVL1007: - 426:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 11478 .loc 1 426 23 discriminator 1 view .LVU3617 - 11479 0320 A94E ldr r6, .L696+16 - 11480 0322 3081 strh r0, [r6, #8] @ movhi - 427:Src/main.c **** - 11481 .loc 1 427 7 is_stmt 1 view .LVU3618 - 427:Src/main.c **** - 11482 .loc 1 427 25 is_stmt 0 view .LVU3619 - 11483 0324 0220 movs r0, #2 - 11484 0326 FFF7FEFF bl MPhD_T - 11485 .LVL1008: - 427:Src/main.c **** - 11486 .loc 1 427 23 discriminator 1 view .LVU3620 - 11487 032a 3081 strh r0, [r6, #8] @ movhi - 430:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 11488 .loc 1 430 7 is_stmt 1 view .LVU3621 - 430:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 11489 .loc 1 430 14 is_stmt 0 view .LVU3622 - 11490 032c 0320 movs r0, #3 - 11491 032e FFF7FEFF bl MPhD_T - 11492 .LVL1009: - 431:Src/main.c **** (void) MPhD_T(4); - 11493 .loc 1 431 7 is_stmt 1 view .LVU3623 - 431:Src/main.c **** (void) MPhD_T(4); - 11494 .loc 1 431 32 is_stmt 0 view .LVU3624 - 11495 0332 0320 movs r0, #3 - 11496 0334 FFF7FEFF bl MPhD_T - 11497 .LVL1010: - 431:Src/main.c **** (void) MPhD_T(4); - 11498 .loc 1 431 30 discriminator 1 view .LVU3625 - 11499 0338 3880 strh r0, [r7] @ movhi - 432:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 11500 .loc 1 432 7 is_stmt 1 view .LVU3626 - 432:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 11501 .loc 1 432 14 is_stmt 0 view .LVU3627 - 11502 033a 0420 movs r0, #4 - 11503 033c FFF7FEFF bl MPhD_T - 11504 .LVL1011: - 433:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 11505 .loc 1 433 7 is_stmt 1 view .LVU3628 - 433:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 11506 .loc 1 433 32 is_stmt 0 view .LVU3629 - 11507 0340 0420 movs r0, #4 - 11508 0342 FFF7FEFF bl MPhD_T - 11509 .LVL1012: - 433:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 11510 .loc 1 433 30 discriminator 1 view .LVU3630 - 11511 0346 3080 strh r0, [r6] @ movhi - ARM GAS /tmp/ccuHnxNu.s page 614 + 11990 0346 0420 movs r0, #4 + 11991 0348 FFF7FEFF bl MPhD_T + 11992 .LVL1050: + 450:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11993 .loc 1 450 7 is_stmt 1 view .LVU3748 + 450:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11994 .loc 1 450 32 is_stmt 0 view .LVU3749 + 11995 034c 0420 movs r0, #4 + 11996 034e FFF7FEFF bl MPhD_T + 11997 .LVL1051: + 450:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 11998 .loc 1 450 30 discriminator 1 view .LVU3750 + 11999 0352 3080 strh r0, [r6] @ movhi + 451:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 12000 .loc 1 451 7 is_stmt 1 view .LVU3751 + 451:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 12001 .loc 1 451 14 is_stmt 0 view .LVU3752 + 12002 0354 DFF8AC82 ldr r8, .L763+64 + 12003 0358 0122 movs r2, #1 + 12004 035a 3946 mov r1, r7 + 12005 035c 4046 mov r0, r8 + 12006 035e FFF7FEFF bl PID_Controller_Temp + 12007 .LVL1052: + 12008 0362 0146 mov r1, r0 + 451:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 12009 .loc 1 451 13 discriminator 1 view .LVU3753 + 12010 0364 9C4D ldr r5, .L763+20 + 12011 0366 2880 strh r0, [r5] @ movhi + 452:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 12012 .loc 1 452 7 is_stmt 1 view .LVU3754 + 12013 0368 0320 movs r0, #3 + 12014 036a FFF7FEFF bl Set_LTEC + 12015 .LVL1053: + 453:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 12016 .loc 1 453 7 view .LVU3755 + 453:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 12017 .loc 1 453 14 is_stmt 0 view .LVU3756 + 12018 036e DFF89892 ldr r9, .L763+68 + 12019 0372 0222 movs r2, #2 + 12020 0374 3146 mov r1, r6 + 12021 0376 4846 mov r0, r9 + 12022 0378 FFF7FEFF bl PID_Controller_Temp + 12023 .LVL1054: + 12024 037c 0146 mov r1, r0 + 453:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 12025 .loc 1 453 13 discriminator 1 view .LVU3757 + 12026 037e 2880 strh r0, [r5] @ movhi + 454:Src/main.c **** + 12027 .loc 1 454 7 is_stmt 1 view .LVU3758 + 12028 0380 0420 movs r0, #4 + 12029 0382 FFF7FEFF bl Set_LTEC + 12030 .LVL1055: + 456:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 12031 .loc 1 456 7 view .LVU3759 + 456:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 12032 .loc 1 456 31 is_stmt 0 view .LVU3760 + 12033 0386 3B89 ldrh r3, [r7, #8] + ARM GAS /tmp/ccLSPxIe.s page 629 - 434:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 11512 .loc 1 434 7 is_stmt 1 view .LVU3631 - 434:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 11513 .loc 1 434 14 is_stmt 0 view .LVU3632 - 11514 0348 DFF8AC82 ldr r8, .L696+64 - 11515 034c 0122 movs r2, #1 - 11516 034e 3946 mov r1, r7 - 11517 0350 4046 mov r0, r8 - 11518 0352 FFF7FEFF bl PID_Controller_Temp - 11519 .LVL1013: - 11520 0356 0146 mov r1, r0 - 434:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 11521 .loc 1 434 13 discriminator 1 view .LVU3633 - 11522 0358 9C4D ldr r5, .L696+20 - 11523 035a 2880 strh r0, [r5] @ movhi - 435:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 11524 .loc 1 435 7 is_stmt 1 view .LVU3634 - 11525 035c 0320 movs r0, #3 - 11526 035e FFF7FEFF bl Set_LTEC - 11527 .LVL1014: - 436:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 11528 .loc 1 436 7 view .LVU3635 - 436:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 11529 .loc 1 436 14 is_stmt 0 view .LVU3636 - 11530 0362 DFF89892 ldr r9, .L696+68 - 11531 0366 0222 movs r2, #2 - 11532 0368 3146 mov r1, r6 - 11533 036a 4846 mov r0, r9 - 11534 036c FFF7FEFF bl PID_Controller_Temp - 11535 .LVL1015: - 11536 0370 0146 mov r1, r0 - 436:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 11537 .loc 1 436 13 discriminator 1 view .LVU3637 - 11538 0372 2880 strh r0, [r5] @ movhi - 437:Src/main.c **** - 11539 .loc 1 437 7 is_stmt 1 view .LVU3638 - 11540 0374 0420 movs r0, #4 - 11541 0376 FFF7FEFF bl Set_LTEC - 11542 .LVL1016: - 439:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 11543 .loc 1 439 7 view .LVU3639 - 439:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 11544 .loc 1 439 31 is_stmt 0 view .LVU3640 - 11545 037a 3B89 ldrh r3, [r7, #8] - 439:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 11546 .loc 1 439 20 view .LVU3641 - 11547 037c 944C ldr r4, .L696+24 - 11548 037e 6380 strh r3, [r4, #2] @ movhi - 440:Src/main.c **** - 11549 .loc 1 440 7 is_stmt 1 view .LVU3642 - 440:Src/main.c **** - 11550 .loc 1 440 31 is_stmt 0 view .LVU3643 - 11551 0380 3389 ldrh r3, [r6, #8] - 440:Src/main.c **** - 11552 .loc 1 440 20 view .LVU3644 - 11553 0382 A380 strh r3, [r4, #4] @ movhi - 442:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - ARM GAS /tmp/ccuHnxNu.s page 615 - - - 11554 .loc 1 442 7 is_stmt 1 view .LVU3645 - 11555 0384 B8F80C10 ldrh r1, [r8, #12] - 11556 0388 0120 movs r0, #1 - 11557 038a FFF7FEFF bl Set_LTEC - 11558 .LVL1017: - 443:Src/main.c **** - 11559 .loc 1 443 7 view .LVU3646 - 11560 038e B9F80C10 ldrh r1, [r9, #12] - 11561 0392 0220 movs r0, #2 - 11562 0394 FFF7FEFF bl Set_LTEC - 11563 .LVL1018: - 447:Src/main.c **** temp16 = Get_ADC(1); - 11564 .loc 1 447 7 view .LVU3647 - 447:Src/main.c **** temp16 = Get_ADC(1); - 11565 .loc 1 447 16 is_stmt 0 view .LVU3648 - 11566 0398 0020 movs r0, #0 - 11567 039a FFF7FEFF bl Get_ADC - 11568 .LVL1019: - 447:Src/main.c **** temp16 = Get_ADC(1); - 11569 .loc 1 447 14 discriminator 1 view .LVU3649 - 11570 039e 2880 strh r0, [r5] @ movhi - 448:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 11571 .loc 1 448 7 is_stmt 1 view .LVU3650 - 448:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 11572 .loc 1 448 16 is_stmt 0 view .LVU3651 - 11573 03a0 0120 movs r0, #1 - 11574 03a2 FFF7FEFF bl Get_ADC - 11575 .LVL1020: - 448:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 11576 .loc 1 448 14 discriminator 1 view .LVU3652 - 11577 03a6 2880 strh r0, [r5] @ movhi - 449:Src/main.c **** - 11578 .loc 1 449 7 is_stmt 1 view .LVU3653 - 449:Src/main.c **** - 11579 .loc 1 449 20 is_stmt 0 view .LVU3654 - 11580 03a8 E081 strh r0, [r4, #14] @ movhi - 452:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 11581 .loc 1 452 7 is_stmt 1 view .LVU3655 - 452:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 11582 .loc 1 452 16 is_stmt 0 view .LVU3656 - 11583 03aa 0120 movs r0, #1 - 11584 03ac FFF7FEFF bl Get_ADC - 11585 .LVL1021: - 452:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 11586 .loc 1 452 14 discriminator 1 view .LVU3657 - 11587 03b0 2880 strh r0, [r5] @ movhi - 453:Src/main.c **** - 11588 .loc 1 453 7 is_stmt 1 view .LVU3658 - 453:Src/main.c **** - 11589 .loc 1 453 20 is_stmt 0 view .LVU3659 - 11590 03b2 2082 strh r0, [r4, #16] @ movhi - 456:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 11591 .loc 1 456 7 is_stmt 1 view .LVU3660 - 456:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 11592 .loc 1 456 16 is_stmt 0 view .LVU3661 - 11593 03b4 0120 movs r0, #1 - 11594 03b6 FFF7FEFF bl Get_ADC - ARM GAS /tmp/ccuHnxNu.s page 616 - - - 11595 .LVL1022: - 456:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 11596 .loc 1 456 14 discriminator 1 view .LVU3662 - 11597 03ba 2880 strh r0, [r5] @ movhi - 457:Src/main.c **** - 11598 .loc 1 457 7 is_stmt 1 view .LVU3663 - 457:Src/main.c **** - 11599 .loc 1 457 20 is_stmt 0 view .LVU3664 - 11600 03bc 6082 strh r0, [r4, #18] @ movhi - 460:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 11601 .loc 1 460 7 is_stmt 1 view .LVU3665 - 460:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 11602 .loc 1 460 16 is_stmt 0 view .LVU3666 - 11603 03be 0120 movs r0, #1 - 11604 03c0 FFF7FEFF bl Get_ADC - 11605 .LVL1023: - 460:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 11606 .loc 1 460 14 discriminator 1 view .LVU3667 - 11607 03c4 2880 strh r0, [r5] @ movhi - 461:Src/main.c **** - 11608 .loc 1 461 7 is_stmt 1 view .LVU3668 - 461:Src/main.c **** - 11609 .loc 1 461 21 is_stmt 0 view .LVU3669 - 11610 03c6 A082 strh r0, [r4, #20] @ movhi - 464:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 11611 .loc 1 464 7 is_stmt 1 view .LVU3670 - 464:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 11612 .loc 1 464 16 is_stmt 0 view .LVU3671 - 11613 03c8 0120 movs r0, #1 - 11614 03ca FFF7FEFF bl Get_ADC - 11615 .LVL1024: - 464:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 11616 .loc 1 464 14 discriminator 1 view .LVU3672 - 11617 03ce 2880 strh r0, [r5] @ movhi - 465:Src/main.c **** temp16 = Get_ADC(2); - 11618 .loc 1 465 7 is_stmt 1 view .LVU3673 - 465:Src/main.c **** temp16 = Get_ADC(2); - 11619 .loc 1 465 21 is_stmt 0 view .LVU3674 - 11620 03d0 E082 strh r0, [r4, #22] @ movhi + 456:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 12034 .loc 1 456 20 view .LVU3761 + 12035 0388 944C ldr r4, .L763+24 + 12036 038a 6380 strh r3, [r4, #2] @ movhi + 457:Src/main.c **** + 12037 .loc 1 457 7 is_stmt 1 view .LVU3762 + 457:Src/main.c **** + 12038 .loc 1 457 31 is_stmt 0 view .LVU3763 + 12039 038c 3389 ldrh r3, [r6, #8] + 457:Src/main.c **** + 12040 .loc 1 457 20 view .LVU3764 + 12041 038e A380 strh r3, [r4, #4] @ movhi + 459:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 12042 .loc 1 459 7 is_stmt 1 view .LVU3765 + 12043 0390 B8F80C10 ldrh r1, [r8, #12] + 12044 0394 0120 movs r0, #1 + 12045 0396 FFF7FEFF bl Set_LTEC + 12046 .LVL1056: + 460:Src/main.c **** + 12047 .loc 1 460 7 view .LVU3766 + 12048 039a B9F80C10 ldrh r1, [r9, #12] + 12049 039e 0220 movs r0, #2 + 12050 03a0 FFF7FEFF bl Set_LTEC + 12051 .LVL1057: + 464:Src/main.c **** temp16 = Get_ADC(1); + 12052 .loc 1 464 7 view .LVU3767 + 464:Src/main.c **** temp16 = Get_ADC(1); + 12053 .loc 1 464 16 is_stmt 0 view .LVU3768 + 12054 03a4 0020 movs r0, #0 + 12055 03a6 FFF7FEFF bl Get_ADC + 12056 .LVL1058: + 464:Src/main.c **** temp16 = Get_ADC(1); + 12057 .loc 1 464 14 discriminator 1 view .LVU3769 + 12058 03aa 2880 strh r0, [r5] @ movhi + 465:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 12059 .loc 1 465 7 is_stmt 1 view .LVU3770 + 465:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 12060 .loc 1 465 16 is_stmt 0 view .LVU3771 + 12061 03ac 0120 movs r0, #1 + 12062 03ae FFF7FEFF bl Get_ADC + 12063 .LVL1059: + 465:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 12064 .loc 1 465 14 discriminator 1 view .LVU3772 + 12065 03b2 2880 strh r0, [r5] @ movhi 466:Src/main.c **** - 11621 .loc 1 466 7 is_stmt 1 view .LVU3675 + 12066 .loc 1 466 7 is_stmt 1 view .LVU3773 466:Src/main.c **** - 11622 .loc 1 466 16 is_stmt 0 view .LVU3676 - 11623 03d2 0220 movs r0, #2 - 11624 03d4 FFF7FEFF bl Get_ADC - 11625 .LVL1025: - 466:Src/main.c **** - 11626 .loc 1 466 14 discriminator 1 view .LVU3677 - 11627 03d8 2880 strh r0, [r5] @ movhi - 469:Src/main.c **** temp16 = Get_ADC(4); - 11628 .loc 1 469 7 is_stmt 1 view .LVU3678 - 469:Src/main.c **** temp16 = Get_ADC(4); - 11629 .loc 1 469 16 is_stmt 0 view .LVU3679 - 11630 03da 0320 movs r0, #3 - 11631 03dc FFF7FEFF bl Get_ADC - 11632 .LVL1026: - 469:Src/main.c **** temp16 = Get_ADC(4); - ARM GAS /tmp/ccuHnxNu.s page 617 + 12067 .loc 1 466 20 is_stmt 0 view .LVU3774 + 12068 03b4 E081 strh r0, [r4, #14] @ movhi + 469:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 12069 .loc 1 469 7 is_stmt 1 view .LVU3775 + 469:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 12070 .loc 1 469 16 is_stmt 0 view .LVU3776 + 12071 03b6 0120 movs r0, #1 + 12072 03b8 FFF7FEFF bl Get_ADC + 12073 .LVL1060: + 469:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + ARM GAS /tmp/ccLSPxIe.s page 630 - 11633 .loc 1 469 14 discriminator 1 view .LVU3680 - 11634 03e0 2880 strh r0, [r5] @ movhi - 470:Src/main.c **** Long_Data[12] = temp16; - 11635 .loc 1 470 7 is_stmt 1 view .LVU3681 - 470:Src/main.c **** Long_Data[12] = temp16; - 11636 .loc 1 470 16 is_stmt 0 view .LVU3682 - 11637 03e2 0420 movs r0, #4 - 11638 03e4 FFF7FEFF bl Get_ADC - 11639 .LVL1027: - 470:Src/main.c **** Long_Data[12] = temp16; - 11640 .loc 1 470 14 discriminator 1 view .LVU3683 - 11641 03e8 2880 strh r0, [r5] @ movhi - 471:Src/main.c **** temp16 = Get_ADC(5); - 11642 .loc 1 471 7 is_stmt 1 view .LVU3684 - 471:Src/main.c **** temp16 = Get_ADC(5); - 11643 .loc 1 471 21 is_stmt 0 view .LVU3685 - 11644 03ea 2083 strh r0, [r4, #24] @ movhi - 472:Src/main.c **** - 11645 .loc 1 472 7 is_stmt 1 view .LVU3686 - 472:Src/main.c **** - 11646 .loc 1 472 16 is_stmt 0 view .LVU3687 - 11647 03ec 0520 movs r0, #5 - 11648 03ee FFF7FEFF bl Get_ADC - 11649 .LVL1028: - 472:Src/main.c **** - 11650 .loc 1 472 14 discriminator 1 view .LVU3688 - 11651 03f2 2880 strh r0, [r5] @ movhi - 475:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 11652 .loc 1 475 7 is_stmt 1 view .LVU3689 - 475:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 11653 .loc 1 475 16 is_stmt 0 view .LVU3690 - 11654 03f4 774B ldr r3, .L696+28 - 11655 03f6 1B68 ldr r3, [r3] - 11656 03f8 774A ldr r2, .L696+32 - 11657 03fa 1360 str r3, [r2] - 476:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 11658 .loc 1 476 7 is_stmt 1 view .LVU3691 - 476:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 11659 .loc 1 476 20 is_stmt 0 view .LVU3692 - 11660 03fc E380 strh r3, [r4, #6] @ movhi - 477:Src/main.c **** - 11661 .loc 1 477 7 is_stmt 1 view .LVU3693 - 477:Src/main.c **** - 11662 .loc 1 477 31 is_stmt 0 view .LVU3694 - 11663 03fe 1B0C lsrs r3, r3, #16 - 477:Src/main.c **** - 11664 .loc 1 477 20 view .LVU3695 - 11665 0400 2381 strh r3, [r4, #8] @ movhi - 480:Src/main.c **** - 11666 .loc 1 480 7 is_stmt 1 view .LVU3696 - 480:Src/main.c **** - 11667 .loc 1 480 31 is_stmt 0 view .LVU3697 - 11668 0402 3B88 ldrh r3, [r7] - 480:Src/main.c **** - 11669 .loc 1 480 20 view .LVU3698 - 11670 0404 6381 strh r3, [r4, #10] @ movhi - 483:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 618 + 12074 .loc 1 469 14 discriminator 1 view .LVU3777 + 12075 03bc 2880 strh r0, [r5] @ movhi + 470:Src/main.c **** + 12076 .loc 1 470 7 is_stmt 1 view .LVU3778 + 470:Src/main.c **** + 12077 .loc 1 470 20 is_stmt 0 view .LVU3779 + 12078 03be 2082 strh r0, [r4, #16] @ movhi + 473:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 12079 .loc 1 473 7 is_stmt 1 view .LVU3780 + 473:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 12080 .loc 1 473 16 is_stmt 0 view .LVU3781 + 12081 03c0 0120 movs r0, #1 + 12082 03c2 FFF7FEFF bl Get_ADC + 12083 .LVL1061: + 473:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 12084 .loc 1 473 14 discriminator 1 view .LVU3782 + 12085 03c6 2880 strh r0, [r5] @ movhi + 474:Src/main.c **** + 12086 .loc 1 474 7 is_stmt 1 view .LVU3783 + 474:Src/main.c **** + 12087 .loc 1 474 20 is_stmt 0 view .LVU3784 + 12088 03c8 6082 strh r0, [r4, #18] @ movhi + 477:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 12089 .loc 1 477 7 is_stmt 1 view .LVU3785 + 477:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 12090 .loc 1 477 16 is_stmt 0 view .LVU3786 + 12091 03ca 0120 movs r0, #1 + 12092 03cc FFF7FEFF bl Get_ADC + 12093 .LVL1062: + 477:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 12094 .loc 1 477 14 discriminator 1 view .LVU3787 + 12095 03d0 2880 strh r0, [r5] @ movhi + 478:Src/main.c **** + 12096 .loc 1 478 7 is_stmt 1 view .LVU3788 + 478:Src/main.c **** + 12097 .loc 1 478 21 is_stmt 0 view .LVU3789 + 12098 03d2 A082 strh r0, [r4, #20] @ movhi + 481:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 12099 .loc 1 481 7 is_stmt 1 view .LVU3790 + 481:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 12100 .loc 1 481 16 is_stmt 0 view .LVU3791 + 12101 03d4 0120 movs r0, #1 + 12102 03d6 FFF7FEFF bl Get_ADC + 12103 .LVL1063: + 481:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 12104 .loc 1 481 14 discriminator 1 view .LVU3792 + 12105 03da 2880 strh r0, [r5] @ movhi + 482:Src/main.c **** temp16 = Get_ADC(2); + 12106 .loc 1 482 7 is_stmt 1 view .LVU3793 + 482:Src/main.c **** temp16 = Get_ADC(2); + 12107 .loc 1 482 21 is_stmt 0 view .LVU3794 + 12108 03dc E082 strh r0, [r4, #22] @ movhi + 483:Src/main.c **** + 12109 .loc 1 483 7 is_stmt 1 view .LVU3795 + 483:Src/main.c **** + 12110 .loc 1 483 16 is_stmt 0 view .LVU3796 + 12111 03de 0220 movs r0, #2 + ARM GAS /tmp/ccLSPxIe.s page 631 - 11671 .loc 1 483 7 is_stmt 1 view .LVU3699 - 483:Src/main.c **** - 11672 .loc 1 483 31 is_stmt 0 view .LVU3700 - 11673 0406 3388 ldrh r3, [r6] - 483:Src/main.c **** - 11674 .loc 1 483 20 view .LVU3701 - 11675 0408 A381 strh r3, [r4, #12] @ movhi - 485:Src/main.c **** { - 11676 .loc 1 485 7 is_stmt 1 view .LVU3702 - 485:Src/main.c **** { - 11677 .loc 1 485 21 is_stmt 0 view .LVU3703 - 11678 040a 744B ldr r3, .L696+36 - 11679 040c DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 - 485:Src/main.c **** { - 11680 .loc 1 485 10 view .LVU3704 - 11681 040e 012B cmp r3, #1 - 11682 0410 03D0 beq .L684 - 11683 .L622: - 492:Src/main.c **** } - 11684 .loc 1 492 7 is_stmt 1 view .LVU3705 - 492:Src/main.c **** } - 11685 .loc 1 492 21 is_stmt 0 view .LVU3706 - 11686 0412 734B ldr r3, .L696+40 - 11687 0414 0722 movs r2, #7 - 11688 0416 1A70 strb r2, [r3] - 11689 0418 73E6 b .L602 - 11690 .L684: - 487:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 11691 .loc 1 487 8 is_stmt 1 view .LVU3707 - 487:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 11692 .loc 1 487 20 is_stmt 0 view .LVU3708 - 11693 041a 0234 adds r4, r4, #2 - 11694 041c 0D21 movs r1, #13 - 11695 041e 2046 mov r0, r4 - 11696 0420 FFF7FEFF bl CalculateChecksum - 11697 .LVL1029: - 11698 0424 0346 mov r3, r0 - 487:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 11699 .loc 1 487 18 discriminator 1 view .LVU3709 - 11700 0426 6F4A ldr r2, .L696+44 - 11701 0428 1080 strh r0, [r2] @ movhi - 488:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 11702 .loc 1 488 8 is_stmt 1 view .LVU3710 - 488:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 11703 .loc 1 488 27 is_stmt 0 view .LVU3711 - 11704 042a A01E subs r0, r4, #2 - 11705 042c 8383 strh r3, [r0, #28] @ movhi - 489:Src/main.c **** State_Data[0]|=temp16&0xff; - 11706 .loc 1 489 8 is_stmt 1 view .LVU3712 - 489:Src/main.c **** State_Data[0]|=temp16&0xff; - 11707 .loc 1 489 17 is_stmt 0 view .LVU3713 - 11708 042e FFF7FEFF bl SD_SAVE - 11709 .LVL1030: - 11710 0432 0346 mov r3, r0 - 489:Src/main.c **** State_Data[0]|=temp16&0xff; - 11711 .loc 1 489 15 discriminator 1 view .LVU3714 - 11712 0434 2880 strh r0, [r5] @ movhi - ARM GAS /tmp/ccuHnxNu.s page 619 + 12112 03e0 FFF7FEFF bl Get_ADC + 12113 .LVL1064: + 483:Src/main.c **** + 12114 .loc 1 483 14 discriminator 1 view .LVU3797 + 12115 03e4 2880 strh r0, [r5] @ movhi + 486:Src/main.c **** temp16 = Get_ADC(4); + 12116 .loc 1 486 7 is_stmt 1 view .LVU3798 + 486:Src/main.c **** temp16 = Get_ADC(4); + 12117 .loc 1 486 16 is_stmt 0 view .LVU3799 + 12118 03e6 0320 movs r0, #3 + 12119 03e8 FFF7FEFF bl Get_ADC + 12120 .LVL1065: + 486:Src/main.c **** temp16 = Get_ADC(4); + 12121 .loc 1 486 14 discriminator 1 view .LVU3800 + 12122 03ec 2880 strh r0, [r5] @ movhi + 487:Src/main.c **** Long_Data[12] = temp16; + 12123 .loc 1 487 7 is_stmt 1 view .LVU3801 + 487:Src/main.c **** Long_Data[12] = temp16; + 12124 .loc 1 487 16 is_stmt 0 view .LVU3802 + 12125 03ee 0420 movs r0, #4 + 12126 03f0 FFF7FEFF bl Get_ADC + 12127 .LVL1066: + 487:Src/main.c **** Long_Data[12] = temp16; + 12128 .loc 1 487 14 discriminator 1 view .LVU3803 + 12129 03f4 2880 strh r0, [r5] @ movhi + 488:Src/main.c **** temp16 = Get_ADC(5); + 12130 .loc 1 488 7 is_stmt 1 view .LVU3804 + 488:Src/main.c **** temp16 = Get_ADC(5); + 12131 .loc 1 488 21 is_stmt 0 view .LVU3805 + 12132 03f6 2083 strh r0, [r4, #24] @ movhi + 489:Src/main.c **** + 12133 .loc 1 489 7 is_stmt 1 view .LVU3806 + 489:Src/main.c **** + 12134 .loc 1 489 16 is_stmt 0 view .LVU3807 + 12135 03f8 0520 movs r0, #5 + 12136 03fa FFF7FEFF bl Get_ADC + 12137 .LVL1067: + 489:Src/main.c **** + 12138 .loc 1 489 14 discriminator 1 view .LVU3808 + 12139 03fe 2880 strh r0, [r5] @ movhi + 492:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 12140 .loc 1 492 7 is_stmt 1 view .LVU3809 + 492:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 12141 .loc 1 492 16 is_stmt 0 view .LVU3810 + 12142 0400 774B ldr r3, .L763+28 + 12143 0402 1B68 ldr r3, [r3] + 12144 0404 774A ldr r2, .L763+32 + 12145 0406 1360 str r3, [r2] + 493:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 12146 .loc 1 493 7 is_stmt 1 view .LVU3811 + 493:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 12147 .loc 1 493 20 is_stmt 0 view .LVU3812 + 12148 0408 E380 strh r3, [r4, #6] @ movhi + 494:Src/main.c **** + 12149 .loc 1 494 7 is_stmt 1 view .LVU3813 + 494:Src/main.c **** + 12150 .loc 1 494 31 is_stmt 0 view .LVU3814 + ARM GAS /tmp/ccLSPxIe.s page 632 - 490:Src/main.c **** } - 11713 .loc 1 490 8 is_stmt 1 view .LVU3715 - 490:Src/main.c **** } - 11714 .loc 1 490 18 is_stmt 0 view .LVU3716 - 11715 0436 6C49 ldr r1, .L696+48 - 11716 0438 0A78 ldrb r2, [r1] @ zero_extendqisi2 - 490:Src/main.c **** } - 11717 .loc 1 490 21 view .LVU3717 - 11718 043a 1343 orrs r3, r3, r2 - 11719 043c 0B70 strb r3, [r1] - 11720 043e E8E7 b .L622 - 11721 .L607: - 496:Src/main.c **** { - 11722 .loc 1 496 6 is_stmt 1 view .LVU3718 - 496:Src/main.c **** { - 11723 .loc 1 496 10 is_stmt 0 view .LVU3719 - 11724 0440 6A4C ldr r4, .L696+52 - 11725 0442 0321 movs r1, #3 - 11726 0444 2046 mov r0, r4 - 11727 0446 FFF7FEFF bl CalculateChecksum - 11728 .LVL1031: - 496:Src/main.c **** { - 11729 .loc 1 496 69 discriminator 1 view .LVU3720 - 11730 044a E388 ldrh r3, [r4, #6] - 496:Src/main.c **** { - 11731 .loc 1 496 9 discriminator 1 view .LVU3721 - 11732 044c 9842 cmp r0, r3 - 11733 044e 0CD0 beq .L685 - 571:Src/main.c **** } - 11734 .loc 1 571 7 is_stmt 1 view .LVU3722 - 571:Src/main.c **** } - 11735 .loc 1 571 17 is_stmt 0 view .LVU3723 - 11736 0450 654A ldr r2, .L696+48 - 11737 0452 1378 ldrb r3, [r2] @ zero_extendqisi2 - 571:Src/main.c **** } - 11738 .loc 1 571 21 view .LVU3724 - 11739 0454 43F00403 orr r3, r3, #4 - 11740 0458 1370 strb r3, [r2] - 11741 .L626: - 573:Src/main.c **** CPU_state = CPU_state_old; - 11742 .loc 1 573 6 is_stmt 1 view .LVU3725 - 573:Src/main.c **** CPU_state = CPU_state_old; - 11743 .loc 1 573 32 is_stmt 0 view .LVU3726 - 11744 045a 654B ldr r3, .L696+56 - 11745 045c 0122 movs r2, #1 - 11746 045e 1A70 strb r2, [r3] - 574:Src/main.c **** break; - 11747 .loc 1 574 6 is_stmt 1 view .LVU3727 - 574:Src/main.c **** break; - 11748 .loc 1 574 16 is_stmt 0 view .LVU3728 - 11749 0460 5F4B ldr r3, .L696+40 - 11750 0462 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 11751 0464 634B ldr r3, .L696+60 - 11752 0466 1A70 strb r2, [r3] - 575:Src/main.c **** case AD9833_CMD://11 - Configure AD9833 triangle output - 11753 .loc 1 575 5 is_stmt 1 view .LVU3729 - 11754 0468 4BE6 b .L602 - ARM GAS /tmp/ccuHnxNu.s page 620 + 12151 040a 1B0C lsrs r3, r3, #16 + 494:Src/main.c **** + 12152 .loc 1 494 20 view .LVU3815 + 12153 040c 2381 strh r3, [r4, #8] @ movhi + 497:Src/main.c **** + 12154 .loc 1 497 7 is_stmt 1 view .LVU3816 + 497:Src/main.c **** + 12155 .loc 1 497 31 is_stmt 0 view .LVU3817 + 12156 040e 3B88 ldrh r3, [r7] + 497:Src/main.c **** + 12157 .loc 1 497 20 view .LVU3818 + 12158 0410 6381 strh r3, [r4, #10] @ movhi + 500:Src/main.c **** + 12159 .loc 1 500 7 is_stmt 1 view .LVU3819 + 500:Src/main.c **** + 12160 .loc 1 500 31 is_stmt 0 view .LVU3820 + 12161 0412 3388 ldrh r3, [r6] + 500:Src/main.c **** + 12162 .loc 1 500 20 view .LVU3821 + 12163 0414 A381 strh r3, [r4, #12] @ movhi + 502:Src/main.c **** { + 12164 .loc 1 502 7 is_stmt 1 view .LVU3822 + 502:Src/main.c **** { + 12165 .loc 1 502 21 is_stmt 0 view .LVU3823 + 12166 0416 744B ldr r3, .L763+36 + 12167 0418 DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 + 502:Src/main.c **** { + 12168 .loc 1 502 10 view .LVU3824 + 12169 041a 012B cmp r3, #1 + 12170 041c 03D0 beq .L748 + 12171 .L674: + 509:Src/main.c **** } + 12172 .loc 1 509 7 is_stmt 1 view .LVU3825 + 509:Src/main.c **** } + 12173 .loc 1 509 21 is_stmt 0 view .LVU3826 + 12174 041e 734B ldr r3, .L763+40 + 12175 0420 0722 movs r2, #7 + 12176 0422 1A70 strb r2, [r3] + 12177 0424 6DE6 b .L652 + 12178 .L748: + 504:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 12179 .loc 1 504 8 is_stmt 1 view .LVU3827 + 504:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 12180 .loc 1 504 20 is_stmt 0 view .LVU3828 + 12181 0426 0234 adds r4, r4, #2 + 12182 0428 0D21 movs r1, #13 + 12183 042a 2046 mov r0, r4 + 12184 042c FFF7FEFF bl CalculateChecksum + 12185 .LVL1068: + 12186 0430 0346 mov r3, r0 + 504:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 12187 .loc 1 504 18 discriminator 1 view .LVU3829 + 12188 0432 6F4A ldr r2, .L763+44 + 12189 0434 1080 strh r0, [r2] @ movhi + 505:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 12190 .loc 1 505 8 is_stmt 1 view .LVU3830 + 505:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + ARM GAS /tmp/ccLSPxIe.s page 633 - 11755 .L685: - 11756 .LBB706: - 498:Src/main.c **** uint16_t param0 = COMMAND[1]; - 11757 .loc 1 498 7 view .LVU3730 - 498:Src/main.c **** uint16_t param0 = COMMAND[1]; - 11758 .loc 1 498 16 is_stmt 0 view .LVU3731 - 11759 046a 2388 ldrh r3, [r4] - 11760 .LVL1032: - 499:Src/main.c **** uint16_t param1 = COMMAND[2]; - 11761 .loc 1 499 7 is_stmt 1 view .LVU3732 - 499:Src/main.c **** uint16_t param1 = COMMAND[2]; - 11762 .loc 1 499 16 is_stmt 0 view .LVU3733 - 11763 046c 6188 ldrh r1, [r4, #2] - 11764 .LVL1033: - 500:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; - 11765 .loc 1 500 7 is_stmt 1 view .LVU3734 - 500:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; - 11766 .loc 1 500 16 is_stmt 0 view .LVU3735 - 11767 046e A488 ldrh r4, [r4, #4] - 11768 .LVL1034: - 501:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; - 11769 .loc 1 501 7 is_stmt 1 view .LVU3736 - 501:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; - 11770 .loc 1 501 15 is_stmt 0 view .LVU3737 - 11771 0470 03F00106 and r6, r3, #1 - 11772 .LVL1035: - 502:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; - 11773 .loc 1 502 7 is_stmt 1 view .LVU3738 - 502:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; - 11774 .loc 1 502 15 is_stmt 0 view .LVU3739 - 11775 0474 C3F34005 ubfx r5, r3, #1, #1 - 11776 .LVL1036: - 503:Src/main.c **** - 11777 .loc 1 503 7 is_stmt 1 view .LVU3740 - 505:Src/main.c **** { - 11778 .loc 1 505 7 view .LVU3741 - 505:Src/main.c **** { - 11779 .loc 1 505 10 is_stmt 0 view .LVU3742 - 11780 0478 13F0040F tst r3, #4 - 11781 047c 1FD0 beq .L624 - 11782 .LBB707: - 507:Src/main.c **** uint16_t samples; - 11783 .loc 1 507 8 is_stmt 1 view .LVU3743 - 11784 .LVL1037: - 508:Src/main.c **** uint8_t hold; - 11785 .loc 1 508 8 view .LVU3744 - 509:Src/main.c **** uint16_t amplitude; - 11786 .loc 1 509 8 view .LVU3745 - 510:Src/main.c **** - 11787 .loc 1 510 8 view .LVU3746 - 512:Src/main.c **** { - 11788 .loc 1 512 8 view .LVU3747 - 512:Src/main.c **** { - 11789 .loc 1 512 11 is_stmt 0 view .LVU3748 - 11790 047e 13F0080F tst r3, #8 - 11791 0482 05D1 bne .L669 - 520:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); - ARM GAS /tmp/ccuHnxNu.s page 621 + 12191 .loc 1 505 27 is_stmt 0 view .LVU3831 + 12192 0436 A01E subs r0, r4, #2 + 12193 0438 8383 strh r3, [r0, #28] @ movhi + 506:Src/main.c **** State_Data[0]|=temp16&0xff; + 12194 .loc 1 506 8 is_stmt 1 view .LVU3832 + 506:Src/main.c **** State_Data[0]|=temp16&0xff; + 12195 .loc 1 506 17 is_stmt 0 view .LVU3833 + 12196 043a FFF7FEFF bl SD_SAVE + 12197 .LVL1069: + 12198 043e 0346 mov r3, r0 + 506:Src/main.c **** State_Data[0]|=temp16&0xff; + 12199 .loc 1 506 15 discriminator 1 view .LVU3834 + 12200 0440 2880 strh r0, [r5] @ movhi + 507:Src/main.c **** } + 12201 .loc 1 507 8 is_stmt 1 view .LVU3835 + 507:Src/main.c **** } + 12202 .loc 1 507 18 is_stmt 0 view .LVU3836 + 12203 0442 6C49 ldr r1, .L763+48 + 12204 0444 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 507:Src/main.c **** } + 12205 .loc 1 507 21 view .LVU3837 + 12206 0446 1343 orrs r3, r3, r2 + 12207 0448 0B70 strb r3, [r1] + 12208 044a E8E7 b .L674 + 12209 .L659: + 513:Src/main.c **** { + 12210 .loc 1 513 6 is_stmt 1 view .LVU3838 + 513:Src/main.c **** { + 12211 .loc 1 513 10 is_stmt 0 view .LVU3839 + 12212 044c 6A4C ldr r4, .L763+52 + 12213 044e 0321 movs r1, #3 + 12214 0450 2046 mov r0, r4 + 12215 0452 FFF7FEFF bl CalculateChecksum + 12216 .LVL1070: + 513:Src/main.c **** { + 12217 .loc 1 513 69 discriminator 1 view .LVU3840 + 12218 0456 E388 ldrh r3, [r4, #6] + 513:Src/main.c **** { + 12219 .loc 1 513 9 discriminator 1 view .LVU3841 + 12220 0458 9842 cmp r0, r3 + 12221 045a 0CD0 beq .L749 + 588:Src/main.c **** } + 12222 .loc 1 588 7 is_stmt 1 view .LVU3842 + 588:Src/main.c **** } + 12223 .loc 1 588 17 is_stmt 0 view .LVU3843 + 12224 045c 654A ldr r2, .L763+48 + 12225 045e 1378 ldrb r3, [r2] @ zero_extendqisi2 + 588:Src/main.c **** } + 12226 .loc 1 588 21 view .LVU3844 + 12227 0460 43F00403 orr r3, r3, #4 + 12228 0464 1370 strb r3, [r2] + 12229 .L678: + 590:Src/main.c **** CPU_state = CPU_state_old; + 12230 .loc 1 590 6 is_stmt 1 view .LVU3845 + 590:Src/main.c **** CPU_state = CPU_state_old; + 12231 .loc 1 590 32 is_stmt 0 view .LVU3846 + 12232 0466 654B ldr r3, .L763+56 + ARM GAS /tmp/ccLSPxIe.s page 634 - 11792 .loc 1 520 9 is_stmt 1 view .LVU3749 - 11793 .LVL1038: - 521:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; - 11794 .loc 1 521 9 view .LVU3750 - 521:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; - 11795 .loc 1 521 14 is_stmt 0 view .LVU3751 - 11796 0484 04F00F07 and r7, r4, #15 - 11797 .LVL1039: - 522:Src/main.c **** } - 11798 .loc 1 522 9 is_stmt 1 view .LVU3752 - 520:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); - 11799 .loc 1 520 17 is_stmt 0 view .LVU3753 - 11800 0488 0C46 mov r4, r1 - 11801 .LVL1040: - 522:Src/main.c **** } - 11802 .loc 1 522 19 view .LVU3754 - 11803 048a 41F6FF71 movw r1, #8191 - 11804 .LVL1041: - 522:Src/main.c **** } - 11805 .loc 1 522 19 view .LVU3755 - 11806 048e 00E0 b .L625 - 11807 .LVL1042: - 11808 .L669: - 516:Src/main.c **** } - 11809 .loc 1 516 14 view .LVU3756 - 11810 0490 0127 movs r7, #1 - 11811 .LVL1043: - 11812 .L625: - 525:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11813 .loc 1 525 8 is_stmt 1 view .LVU3757 - 525:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11814 .loc 1 525 30 is_stmt 0 view .LVU3758 - 11815 0492 0091 str r1, [sp] - 11816 0494 2B46 mov r3, r5 - 11817 .LVL1044: - 525:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11818 .loc 1 525 30 view .LVU3759 - 11819 0496 3A46 mov r2, r7 - 11820 0498 2146 mov r1, r4 - 11821 .LVL1045: - 525:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11822 .loc 1 525 30 view .LVU3760 - 11823 049a 3046 mov r0, r6 - 11824 049c FFF7FEFF bl AD9102_ApplySram - 11825 .LVL1046: - 526:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) - 11826 .loc 1 526 8 is_stmt 1 view .LVU3761 - 526:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) - 11827 .loc 1 526 22 is_stmt 0 view .LVU3762 - 11828 04a0 514B ldr r3, .L696+48 - 11829 04a2 5870 strb r0, [r3, #1] - 527:Src/main.c **** { - 11830 .loc 1 527 8 is_stmt 1 view .LVU3763 - 527:Src/main.c **** { - 11831 .loc 1 527 12 is_stmt 0 view .LVU3764 - 11832 04a4 3B46 mov r3, r7 - 11833 04a6 2246 mov r2, r4 - ARM GAS /tmp/ccuHnxNu.s page 622 + 12233 0468 0122 movs r2, #1 + 12234 046a 1A70 strb r2, [r3] + 591:Src/main.c **** break; + 12235 .loc 1 591 6 is_stmt 1 view .LVU3847 + 591:Src/main.c **** break; + 12236 .loc 1 591 16 is_stmt 0 view .LVU3848 + 12237 046c 5F4B ldr r3, .L763+40 + 12238 046e 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 12239 0470 634B ldr r3, .L763+60 + 12240 0472 1A70 strb r2, [r3] + 592:Src/main.c **** case AD9833_CMD://11 - Configure AD9833 triangle output + 12241 .loc 1 592 5 is_stmt 1 view .LVU3849 + 12242 0474 45E6 b .L652 + 12243 .L749: + 12244 .LBB711: + 515:Src/main.c **** uint16_t param0 = COMMAND[1]; + 12245 .loc 1 515 7 view .LVU3850 + 515:Src/main.c **** uint16_t param0 = COMMAND[1]; + 12246 .loc 1 515 16 is_stmt 0 view .LVU3851 + 12247 0476 2388 ldrh r3, [r4] + 12248 .LVL1071: + 516:Src/main.c **** uint16_t param1 = COMMAND[2]; + 12249 .loc 1 516 7 is_stmt 1 view .LVU3852 + 516:Src/main.c **** uint16_t param1 = COMMAND[2]; + 12250 .loc 1 516 16 is_stmt 0 view .LVU3853 + 12251 0478 6188 ldrh r1, [r4, #2] + 12252 .LVL1072: + 517:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 12253 .loc 1 517 7 is_stmt 1 view .LVU3854 + 517:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u; + 12254 .loc 1 517 16 is_stmt 0 view .LVU3855 + 12255 047a A488 ldrh r4, [r4, #4] + 12256 .LVL1073: + 518:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 12257 .loc 1 518 7 is_stmt 1 view .LVU3856 + 518:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u; + 12258 .loc 1 518 15 is_stmt 0 view .LVU3857 + 12259 047c 03F00106 and r6, r3, #1 + 12260 .LVL1074: + 519:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; + 12261 .loc 1 519 7 is_stmt 1 view .LVU3858 + 519:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u; + 12262 .loc 1 519 15 is_stmt 0 view .LVU3859 + 12263 0480 C3F34005 ubfx r5, r3, #1, #1 + 12264 .LVL1075: + 520:Src/main.c **** + 12265 .loc 1 520 7 is_stmt 1 view .LVU3860 + 522:Src/main.c **** { + 12266 .loc 1 522 7 view .LVU3861 + 522:Src/main.c **** { + 12267 .loc 1 522 10 is_stmt 0 view .LVU3862 + 12268 0484 13F0040F tst r3, #4 + 12269 0488 1FD0 beq .L676 + 12270 .LBB712: + 524:Src/main.c **** uint16_t samples; + 12271 .loc 1 524 8 is_stmt 1 view .LVU3863 + 12272 .LVL1076: + ARM GAS /tmp/ccLSPxIe.s page 635 - 11834 04a8 3146 mov r1, r6 - 11835 04aa FFF7FEFF bl AD9102_CheckFlagsSram - 11836 .LVL1047: - 527:Src/main.c **** { - 11837 .loc 1 527 11 discriminator 1 view .LVU3765 - 11838 04ae 0028 cmp r0, #0 - 11839 04b0 D3D0 beq .L626 - 529:Src/main.c **** } - 11840 .loc 1 529 9 is_stmt 1 view .LVU3766 - 529:Src/main.c **** } - 11841 .loc 1 529 19 is_stmt 0 view .LVU3767 - 11842 04b2 4D4A ldr r2, .L696+48 - 11843 04b4 1378 ldrb r3, [r2] @ zero_extendqisi2 - 529:Src/main.c **** } - 11844 .loc 1 529 23 view .LVU3768 - 11845 04b6 63F07F03 orn r3, r3, #127 - 11846 04ba 1370 strb r3, [r2] - 11847 04bc CDE7 b .L626 - 11848 .LVL1048: - 11849 .L624: - 529:Src/main.c **** } - 11850 .loc 1 529 23 view .LVU3769 - 11851 .LBE707: - 11852 .LBB708: - 534:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 11853 .loc 1 534 8 is_stmt 1 view .LVU3770 - 534:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 11854 .loc 1 534 16 is_stmt 0 view .LVU3771 - 11855 04be 05B1 cbz r5, .L627 - 534:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); - 11856 .loc 1 534 16 discriminator 1 view .LVU3772 - 11857 04c0 0225 movs r5, #2 - 11858 .LVL1049: - 11859 .L627: - 535:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); - 11860 .loc 1 535 8 is_stmt 1 view .LVU3773 - 535:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); - 11861 .loc 1 535 16 is_stmt 0 view .LVU3774 - 11862 04c2 CFB2 uxtb r7, r1 - 11863 .LVL1050: - 536:Src/main.c **** uint16_t pat_period = param1; - 11864 .loc 1 536 8 is_stmt 1 view .LVU3775 - 536:Src/main.c **** uint16_t pat_period = param1; - 11865 .loc 1 536 16 is_stmt 0 view .LVU3776 - 11866 04c4 C1F30328 ubfx r8, r1, #8, #4 - 11867 .LVL1051: - 537:Src/main.c **** - 11868 .loc 1 537 8 is_stmt 1 view .LVU3777 - 539:Src/main.c **** { - 11869 .loc 1 539 8 view .LVU3778 - 539:Src/main.c **** { - 11870 .loc 1 539 11 is_stmt 0 view .LVU3779 - 11871 04c8 2143 orrs r1, r1, r4 - 11872 .LVL1052: - 539:Src/main.c **** { - 11873 .loc 1 539 11 view .LVU3780 - 11874 04ca 09D0 beq .L670 - ARM GAS /tmp/ccuHnxNu.s page 623 + 525:Src/main.c **** uint8_t hold; + 12273 .loc 1 525 8 view .LVU3864 + 526:Src/main.c **** uint16_t amplitude; + 12274 .loc 1 526 8 view .LVU3865 + 527:Src/main.c **** + 12275 .loc 1 527 8 view .LVU3866 + 529:Src/main.c **** { + 12276 .loc 1 529 8 view .LVU3867 + 529:Src/main.c **** { + 12277 .loc 1 529 11 is_stmt 0 view .LVU3868 + 12278 048a 13F0080F tst r3, #8 + 12279 048e 1AD1 bne .L733 + 537:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); + 12280 .loc 1 537 9 is_stmt 1 view .LVU3869 + 12281 .LVL1077: + 538:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; + 12282 .loc 1 538 9 view .LVU3870 + 538:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT; + 12283 .loc 1 538 14 is_stmt 0 view .LVU3871 + 12284 0490 04F00F07 and r7, r4, #15 + 12285 .LVL1078: + 539:Src/main.c **** } + 12286 .loc 1 539 9 is_stmt 1 view .LVU3872 + 537:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu); + 12287 .loc 1 537 17 is_stmt 0 view .LVU3873 + 12288 0494 0C46 mov r4, r1 + 12289 .LVL1079: + 539:Src/main.c **** } + 12290 .loc 1 539 19 view .LVU3874 + 12291 0496 41F6FF71 movw r1, #8191 + 12292 .LVL1080: + 12293 .L677: + 542:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 12294 .loc 1 542 8 is_stmt 1 view .LVU3875 + 542:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 12295 .loc 1 542 30 is_stmt 0 view .LVU3876 + 12296 049a 0091 str r1, [sp] + 12297 049c 2B46 mov r3, r5 + 12298 .LVL1081: + 542:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 12299 .loc 1 542 30 view .LVU3877 + 12300 049e 3A46 mov r2, r7 + 12301 04a0 2146 mov r1, r4 + 12302 .LVL1082: + 542:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 12303 .loc 1 542 30 view .LVU3878 + 12304 04a2 3046 mov r0, r6 + 12305 04a4 FFF7FEFF bl AD9102_ApplySram + 12306 .LVL1083: + 543:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) + 12307 .loc 1 543 8 is_stmt 1 view .LVU3879 + 543:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) + 12308 .loc 1 543 22 is_stmt 0 view .LVU3880 + 12309 04a8 524B ldr r3, .L763+48 + 12310 04aa 5870 strb r0, [r3, #1] + 544:Src/main.c **** { + 12311 .loc 1 544 8 is_stmt 1 view .LVU3881 + ARM GAS /tmp/ccLSPxIe.s page 636 - 547:Src/main.c **** { - 11875 .loc 1 547 9 is_stmt 1 view .LVU3781 - 547:Src/main.c **** { - 11876 .loc 1 547 12 is_stmt 0 view .LVU3782 - 11877 04cc 1FB1 cbz r7, .L671 - 551:Src/main.c **** { - 11878 .loc 1 551 14 is_stmt 1 view .LVU3783 - 551:Src/main.c **** { - 11879 .loc 1 551 17 is_stmt 0 view .LVU3784 - 11880 04ce 3F2F cmp r7, #63 - 11881 04d0 02D9 bls .L629 - 553:Src/main.c **** } - 11882 .loc 1 553 19 view .LVU3785 - 11883 04d2 3F27 movs r7, #63 - 11884 .LVL1053: - 553:Src/main.c **** } - 11885 .loc 1 553 19 view .LVU3786 - 11886 04d4 00E0 b .L629 - 11887 .LVL1054: - 11888 .L671: - 549:Src/main.c **** } - 11889 .loc 1 549 19 view .LVU3787 - 11890 04d6 0127 movs r7, #1 - 11891 .LVL1055: - 11892 .L629: - 555:Src/main.c **** { - 11893 .loc 1 555 9 is_stmt 1 view .LVU3788 - 555:Src/main.c **** { - 11894 .loc 1 555 12 is_stmt 0 view .LVU3789 - 11895 04d8 3CB9 cbnz r4, .L628 - 557:Src/main.c **** } - 11896 .loc 1 557 21 view .LVU3790 - 11897 04da 4FF6FF74 movw r4, #65535 - 11898 .LVL1056: - 557:Src/main.c **** } - 11899 .loc 1 557 21 view .LVU3791 - 11900 04de 04E0 b .L628 - 11901 .LVL1057: - 11902 .L670: - 543:Src/main.c **** } - 11903 .loc 1 543 20 view .LVU3792 - 11904 04e0 4FF6FF74 movw r4, #65535 - 11905 .LVL1058: - 542:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; - 11906 .loc 1 542 18 view .LVU3793 - 11907 04e4 4FF00208 mov r8, #2 - 11908 .LVL1059: - 541:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; - 11909 .loc 1 541 18 view .LVU3794 - 11910 04e8 0127 movs r7, #1 - 11911 .LVL1060: - 11912 .L628: - 561:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11913 .loc 1 561 8 is_stmt 1 view .LVU3795 - 561:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11914 .loc 1 561 30 is_stmt 0 view .LVU3796 - 11915 04ea 0094 str r4, [sp] - ARM GAS /tmp/ccuHnxNu.s page 624 + 544:Src/main.c **** { + 12312 .loc 1 544 12 is_stmt 0 view .LVU3882 + 12313 04ac 3B46 mov r3, r7 + 12314 04ae 2246 mov r2, r4 + 12315 04b0 3146 mov r1, r6 + 12316 04b2 FFF7FEFF bl AD9102_CheckFlagsSram + 12317 .LVL1084: + 544:Src/main.c **** { + 12318 .loc 1 544 11 discriminator 1 view .LVU3883 + 12319 04b6 0028 cmp r0, #0 + 12320 04b8 D5D0 beq .L678 + 546:Src/main.c **** } + 12321 .loc 1 546 9 is_stmt 1 view .LVU3884 + 546:Src/main.c **** } + 12322 .loc 1 546 19 is_stmt 0 view .LVU3885 + 12323 04ba 4E4A ldr r2, .L763+48 + 12324 04bc 1378 ldrb r3, [r2] @ zero_extendqisi2 + 546:Src/main.c **** } + 12325 .loc 1 546 23 view .LVU3886 + 12326 04be 63F07F03 orn r3, r3, #127 + 12327 04c2 1370 strb r3, [r2] + 12328 04c4 CFE7 b .L678 + 12329 .LVL1085: + 12330 .L733: + 533:Src/main.c **** } + 12331 .loc 1 533 14 view .LVU3887 + 12332 04c6 0127 movs r7, #1 + 12333 04c8 E7E7 b .L677 + 12334 .LVL1086: + 12335 .L676: + 533:Src/main.c **** } + 12336 .loc 1 533 14 view .LVU3888 + 12337 .LBE712: + 12338 .LBB713: + 551:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 12339 .loc 1 551 8 is_stmt 1 view .LVU3889 + 551:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 12340 .loc 1 551 16 is_stmt 0 view .LVU3890 + 12341 04ca 05B1 cbz r5, .L679 + 551:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu); + 12342 .loc 1 551 16 discriminator 1 view .LVU3891 + 12343 04cc 0225 movs r5, #2 + 12344 .LVL1087: + 12345 .L679: + 552:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 12346 .loc 1 552 8 is_stmt 1 view .LVU3892 + 552:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu); + 12347 .loc 1 552 16 is_stmt 0 view .LVU3893 + 12348 04ce CFB2 uxtb r7, r1 + 12349 .LVL1088: + 553:Src/main.c **** uint16_t pat_period = param1; + 12350 .loc 1 553 8 is_stmt 1 view .LVU3894 + 553:Src/main.c **** uint16_t pat_period = param1; + 12351 .loc 1 553 16 is_stmt 0 view .LVU3895 + 12352 04d0 C1F30328 ubfx r8, r1, #8, #4 + 12353 .LVL1089: + 554:Src/main.c **** + ARM GAS /tmp/ccLSPxIe.s page 637 - 11916 04ec 4346 mov r3, r8 - 11917 .LVL1061: - 561:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); - 11918 .loc 1 561 30 view .LVU3797 - 11919 04ee 3A46 mov r2, r7 - 11920 04f0 3146 mov r1, r6 - 11921 04f2 2846 mov r0, r5 - 11922 04f4 FFF7FEFF bl AD9102_Apply - 11923 .LVL1062: - 562:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) - 11924 .loc 1 562 8 is_stmt 1 view .LVU3798 - 562:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) - 11925 .loc 1 562 22 is_stmt 0 view .LVU3799 - 11926 04f8 3B4B ldr r3, .L696+48 - 11927 04fa 5870 strb r0, [r3, #1] - 563:Src/main.c **** { - 11928 .loc 1 563 8 is_stmt 1 view .LVU3800 - 563:Src/main.c **** { - 11929 .loc 1 563 12 is_stmt 0 view .LVU3801 - 11930 04fc 0194 str r4, [sp, #4] - 11931 04fe CDF80080 str r8, [sp] - 11932 0502 3B46 mov r3, r7 - 11933 0504 2A46 mov r2, r5 - 11934 0506 3146 mov r1, r6 - 11935 0508 FFF7FEFF bl AD9102_CheckFlags - 11936 .LVL1063: - 563:Src/main.c **** { - 11937 .loc 1 563 11 discriminator 1 view .LVU3802 - 11938 050c 0028 cmp r0, #0 - 11939 050e A4D0 beq .L626 - 565:Src/main.c **** } - 11940 .loc 1 565 9 is_stmt 1 view .LVU3803 - 565:Src/main.c **** } - 11941 .loc 1 565 19 is_stmt 0 view .LVU3804 - 11942 0510 354A ldr r2, .L696+48 - 11943 0512 1378 ldrb r3, [r2] @ zero_extendqisi2 - 565:Src/main.c **** } - 11944 .loc 1 565 23 view .LVU3805 - 11945 0514 63F07F03 orn r3, r3, #127 - 11946 0518 1370 strb r3, [r2] - 11947 051a 9EE7 b .L626 - 11948 .LVL1064: - 11949 .L606: - 565:Src/main.c **** } - 11950 .loc 1 565 23 view .LVU3806 - 11951 .LBE708: - 11952 .LBE706: - 577:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) - 11953 .loc 1 577 6 is_stmt 1 view .LVU3807 - 577:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) - 11954 .loc 1 577 20 is_stmt 0 view .LVU3808 - 11955 051c 324B ldr r3, .L696+48 - 11956 051e 0022 movs r2, #0 - 11957 0520 5A70 strb r2, [r3, #1] - 578:Src/main.c **** { - 11958 .loc 1 578 6 is_stmt 1 view .LVU3809 - 578:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 625 + 12354 .loc 1 554 8 is_stmt 1 view .LVU3896 + 556:Src/main.c **** { + 12355 .loc 1 556 8 view .LVU3897 + 556:Src/main.c **** { + 12356 .loc 1 556 11 is_stmt 0 view .LVU3898 + 12357 04d4 2143 orrs r1, r1, r4 + 12358 .LVL1090: + 556:Src/main.c **** { + 12359 .loc 1 556 11 view .LVU3899 + 12360 04d6 09D0 beq .L734 + 564:Src/main.c **** { + 12361 .loc 1 564 9 is_stmt 1 view .LVU3900 + 564:Src/main.c **** { + 12362 .loc 1 564 12 is_stmt 0 view .LVU3901 + 12363 04d8 1FB1 cbz r7, .L735 + 568:Src/main.c **** { + 12364 .loc 1 568 14 is_stmt 1 view .LVU3902 + 568:Src/main.c **** { + 12365 .loc 1 568 17 is_stmt 0 view .LVU3903 + 12366 04da 3F2F cmp r7, #63 + 12367 04dc 02D9 bls .L681 + 570:Src/main.c **** } + 12368 .loc 1 570 19 view .LVU3904 + 12369 04de 3F27 movs r7, #63 + 12370 .LVL1091: + 570:Src/main.c **** } + 12371 .loc 1 570 19 view .LVU3905 + 12372 04e0 00E0 b .L681 + 12373 .LVL1092: + 12374 .L735: + 566:Src/main.c **** } + 12375 .loc 1 566 19 view .LVU3906 + 12376 04e2 0127 movs r7, #1 + 12377 .LVL1093: + 12378 .L681: + 572:Src/main.c **** { + 12379 .loc 1 572 9 is_stmt 1 view .LVU3907 + 572:Src/main.c **** { + 12380 .loc 1 572 12 is_stmt 0 view .LVU3908 + 12381 04e4 3CB9 cbnz r4, .L680 + 574:Src/main.c **** } + 12382 .loc 1 574 21 view .LVU3909 + 12383 04e6 4FF6FF74 movw r4, #65535 + 12384 .LVL1094: + 574:Src/main.c **** } + 12385 .loc 1 574 21 view .LVU3910 + 12386 04ea 04E0 b .L680 + 12387 .LVL1095: + 12388 .L734: + 560:Src/main.c **** } + 12389 .loc 1 560 20 view .LVU3911 + 12390 04ec 4FF6FF74 movw r4, #65535 + 12391 .LVL1096: + 559:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT; + 12392 .loc 1 559 18 view .LVU3912 + 12393 04f0 4FF00208 mov r8, #2 + 12394 .LVL1097: + ARM GAS /tmp/ccLSPxIe.s page 638 - 11959 .loc 1 578 10 is_stmt 0 view .LVU3810 - 11960 0522 324C ldr r4, .L696+52 - 11961 0524 0321 movs r1, #3 - 11962 0526 2046 mov r0, r4 - 11963 0528 FFF7FEFF bl CalculateChecksum - 11964 .LVL1065: - 578:Src/main.c **** { - 11965 .loc 1 578 69 discriminator 1 view .LVU3811 - 11966 052c E388 ldrh r3, [r4, #6] - 578:Src/main.c **** { - 11967 .loc 1 578 9 discriminator 1 view .LVU3812 - 11968 052e 9842 cmp r0, r3 - 11969 0530 0CD0 beq .L686 - 591:Src/main.c **** } - 11970 .loc 1 591 7 is_stmt 1 view .LVU3813 - 591:Src/main.c **** } - 11971 .loc 1 591 17 is_stmt 0 view .LVU3814 - 11972 0532 2D4A ldr r2, .L696+48 - 11973 0534 1378 ldrb r3, [r2] @ zero_extendqisi2 - 591:Src/main.c **** } - 11974 .loc 1 591 21 view .LVU3815 - 11975 0536 43F00403 orr r3, r3, #4 - 11976 053a 1370 strb r3, [r2] - 11977 .L631: - 593:Src/main.c **** CPU_state = CPU_state_old; - 11978 .loc 1 593 6 is_stmt 1 view .LVU3816 - 593:Src/main.c **** CPU_state = CPU_state_old; - 11979 .loc 1 593 32 is_stmt 0 view .LVU3817 - 11980 053c 2C4B ldr r3, .L696+56 - 11981 053e 0122 movs r2, #1 - 11982 0540 1A70 strb r2, [r3] - 594:Src/main.c **** break; - 11983 .loc 1 594 6 is_stmt 1 view .LVU3818 - 594:Src/main.c **** break; - 11984 .loc 1 594 16 is_stmt 0 view .LVU3819 - 11985 0542 274B ldr r3, .L696+40 - 11986 0544 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 11987 0546 2B4B ldr r3, .L696+60 - 11988 0548 1A70 strb r2, [r3] - 595:Src/main.c **** case DS1809_CMD://12 - Pulse DS1809 UC/DC controls - 11989 .loc 1 595 5 is_stmt 1 view .LVU3820 - 11990 054a DAE5 b .L602 - 11991 .L686: - 11992 .LBB709: - 580:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); - 11993 .loc 1 580 7 view .LVU3821 - 580:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); - 11994 .loc 1 580 16 is_stmt 0 view .LVU3822 - 11995 054c 2088 ldrh r0, [r4] - 11996 .LVL1066: - 581:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); - 11997 .loc 1 581 7 is_stmt 1 view .LVU3823 - 581:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); - 11998 .loc 1 581 40 is_stmt 0 view .LVU3824 - 11999 054e 6388 ldrh r3, [r4, #2] - 581:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); - 12000 .loc 1 581 16 view .LVU3825 - ARM GAS /tmp/ccuHnxNu.s page 626 + 558:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT; + 12395 .loc 1 558 18 view .LVU3913 + 12396 04f4 0127 movs r7, #1 + 12397 .LVL1098: + 12398 .L680: + 578:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 12399 .loc 1 578 8 is_stmt 1 view .LVU3914 + 578:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 12400 .loc 1 578 30 is_stmt 0 view .LVU3915 + 12401 04f6 0094 str r4, [sp] + 12402 04f8 4346 mov r3, r8 + 12403 .LVL1099: + 578:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 12404 .loc 1 578 30 view .LVU3916 + 12405 04fa 3A46 mov r2, r7 + 12406 04fc 3146 mov r1, r6 + 12407 04fe 2846 mov r0, r5 + 12408 0500 FFF7FEFF bl AD9102_Apply + 12409 .LVL1100: + 579:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 12410 .loc 1 579 8 is_stmt 1 view .LVU3917 + 579:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period)) + 12411 .loc 1 579 22 is_stmt 0 view .LVU3918 + 12412 0504 3B4B ldr r3, .L763+48 + 12413 0506 5870 strb r0, [r3, #1] + 580:Src/main.c **** { + 12414 .loc 1 580 8 is_stmt 1 view .LVU3919 + 580:Src/main.c **** { + 12415 .loc 1 580 12 is_stmt 0 view .LVU3920 + 12416 0508 0194 str r4, [sp, #4] + 12417 050a CDF80080 str r8, [sp] + 12418 050e 3B46 mov r3, r7 + 12419 0510 2A46 mov r2, r5 + 12420 0512 3146 mov r1, r6 + 12421 0514 FFF7FEFF bl AD9102_CheckFlags + 12422 .LVL1101: + 580:Src/main.c **** { + 12423 .loc 1 580 11 discriminator 1 view .LVU3921 + 12424 0518 0028 cmp r0, #0 + 12425 051a A4D0 beq .L678 + 582:Src/main.c **** } + 12426 .loc 1 582 9 is_stmt 1 view .LVU3922 + 582:Src/main.c **** } + 12427 .loc 1 582 19 is_stmt 0 view .LVU3923 + 12428 051c 354A ldr r2, .L763+48 + 12429 051e 1378 ldrb r3, [r2] @ zero_extendqisi2 + 582:Src/main.c **** } + 12430 .loc 1 582 23 view .LVU3924 + 12431 0520 63F07F03 orn r3, r3, #127 + 12432 0524 1370 strb r3, [r2] + 12433 0526 9EE7 b .L678 + 12434 .LVL1102: + 12435 .L658: + 582:Src/main.c **** } + 12436 .loc 1 582 23 view .LVU3925 + 12437 .LBE713: + 12438 .LBE711: + ARM GAS /tmp/ccLSPxIe.s page 639 - 12001 0550 C3F30D03 ubfx r3, r3, #0, #14 - 12002 .LVL1067: - 582:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; - 12003 .loc 1 582 7 is_stmt 1 view .LVU3826 - 582:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; - 12004 .loc 1 582 40 is_stmt 0 view .LVU3827 - 12005 0554 A288 ldrh r2, [r4, #4] - 582:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; - 12006 .loc 1 582 16 view .LVU3828 - 12007 0556 C2F30D02 ubfx r2, r2, #0, #14 - 12008 .LVL1068: - 583:Src/main.c **** uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u; - 12009 .loc 1 583 7 is_stmt 1 view .LVU3829 - 584:Src/main.c **** uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw; - 12010 .loc 1 584 7 view .LVU3830 - 585:Src/main.c **** - 12011 .loc 1 585 7 view .LVU3831 - 587:Src/main.c **** } - 12012 .loc 1 587 7 view .LVU3832 - 12013 055a 43EA8232 orr r2, r3, r2, lsl #14 - 12014 .LVL1069: - 587:Src/main.c **** } - 12015 .loc 1 587 7 is_stmt 0 view .LVU3833 - 12016 055e C0F34001 ubfx r1, r0, #1, #1 - 12017 0562 00F00100 and r0, r0, #1 - 12018 .LVL1070: - 587:Src/main.c **** } - 12019 .loc 1 587 7 view .LVU3834 - 12020 0566 FFF7FEFF bl AD9833_Apply - 12021 .LVL1071: - 587:Src/main.c **** } - 12022 .loc 1 587 7 view .LVU3835 - 12023 .LBE709: - 12024 056a E7E7 b .L631 - 12025 .LVL1072: - 12026 .L605: - 597:Src/main.c **** { - 12027 .loc 1 597 6 is_stmt 1 view .LVU3836 - 597:Src/main.c **** { - 12028 .loc 1 597 10 is_stmt 0 view .LVU3837 - 12029 056c 1F4C ldr r4, .L696+52 - 12030 056e 0321 movs r1, #3 - 12031 0570 2046 mov r0, r4 - 12032 0572 FFF7FEFF bl CalculateChecksum - 12033 .LVL1073: - 597:Src/main.c **** { - 12034 .loc 1 597 69 discriminator 1 view .LVU3838 - 12035 0576 E388 ldrh r3, [r4, #6] - 597:Src/main.c **** { - 12036 .loc 1 597 9 discriminator 1 view .LVU3839 - 12037 0578 9842 cmp r0, r3 - 12038 057a 0CD0 beq .L687 - 632:Src/main.c **** } - 12039 .loc 1 632 7 is_stmt 1 view .LVU3840 - 632:Src/main.c **** } - 12040 .loc 1 632 17 is_stmt 0 view .LVU3841 - 12041 057c 1A4A ldr r2, .L696+48 - ARM GAS /tmp/ccuHnxNu.s page 627 + 594:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) + 12439 .loc 1 594 6 is_stmt 1 view .LVU3926 + 594:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1]) + 12440 .loc 1 594 20 is_stmt 0 view .LVU3927 + 12441 0528 324B ldr r3, .L763+48 + 12442 052a 0022 movs r2, #0 + 12443 052c 5A70 strb r2, [r3, #1] + 595:Src/main.c **** { + 12444 .loc 1 595 6 is_stmt 1 view .LVU3928 + 595:Src/main.c **** { + 12445 .loc 1 595 10 is_stmt 0 view .LVU3929 + 12446 052e 324C ldr r4, .L763+52 + 12447 0530 0321 movs r1, #3 + 12448 0532 2046 mov r0, r4 + 12449 0534 FFF7FEFF bl CalculateChecksum + 12450 .LVL1103: + 595:Src/main.c **** { + 12451 .loc 1 595 69 discriminator 1 view .LVU3930 + 12452 0538 E388 ldrh r3, [r4, #6] + 595:Src/main.c **** { + 12453 .loc 1 595 9 discriminator 1 view .LVU3931 + 12454 053a 9842 cmp r0, r3 + 12455 053c 0CD0 beq .L750 + 608:Src/main.c **** } + 12456 .loc 1 608 7 is_stmt 1 view .LVU3932 + 608:Src/main.c **** } + 12457 .loc 1 608 17 is_stmt 0 view .LVU3933 + 12458 053e 2D4A ldr r2, .L763+48 + 12459 0540 1378 ldrb r3, [r2] @ zero_extendqisi2 + 608:Src/main.c **** } + 12460 .loc 1 608 21 view .LVU3934 + 12461 0542 43F00403 orr r3, r3, #4 + 12462 0546 1370 strb r3, [r2] + 12463 .L683: + 610:Src/main.c **** CPU_state = CPU_state_old; + 12464 .loc 1 610 6 is_stmt 1 view .LVU3935 + 610:Src/main.c **** CPU_state = CPU_state_old; + 12465 .loc 1 610 32 is_stmt 0 view .LVU3936 + 12466 0548 2C4B ldr r3, .L763+56 + 12467 054a 0122 movs r2, #1 + 12468 054c 1A70 strb r2, [r3] + 611:Src/main.c **** break; + 12469 .loc 1 611 6 is_stmt 1 view .LVU3937 + 611:Src/main.c **** break; + 12470 .loc 1 611 16 is_stmt 0 view .LVU3938 + 12471 054e 274B ldr r3, .L763+40 + 12472 0550 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 12473 0552 2B4B ldr r3, .L763+60 + 12474 0554 1A70 strb r2, [r3] + 612:Src/main.c **** case DS1809_CMD://12 - Pulse DS1809 UC/DC controls + 12475 .loc 1 612 5 is_stmt 1 view .LVU3939 + 12476 0556 D4E5 b .L652 + 12477 .L750: + 12478 .LBB714: + 597:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); + 12479 .loc 1 597 7 view .LVU3940 + 597:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu); + ARM GAS /tmp/ccLSPxIe.s page 640 - 12042 057e 1378 ldrb r3, [r2] @ zero_extendqisi2 - 632:Src/main.c **** } - 12043 .loc 1 632 21 view .LVU3842 - 12044 0580 43F00403 orr r3, r3, #4 - 12045 0584 1370 strb r3, [r2] - 12046 .L634: - 634:Src/main.c **** CPU_state = CPU_state_old; - 12047 .loc 1 634 6 is_stmt 1 view .LVU3843 - 634:Src/main.c **** CPU_state = CPU_state_old; - 12048 .loc 1 634 32 is_stmt 0 view .LVU3844 - 12049 0586 1A4B ldr r3, .L696+56 - 12050 0588 0122 movs r2, #1 - 12051 058a 1A70 strb r2, [r3] - 635:Src/main.c **** break; - 12052 .loc 1 635 6 is_stmt 1 view .LVU3845 - 635:Src/main.c **** break; - 12053 .loc 1 635 16 is_stmt 0 view .LVU3846 - 12054 058c 144B ldr r3, .L696+40 - 12055 058e 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 12056 0590 184B ldr r3, .L696+60 - 12057 0592 1A70 strb r2, [r3] - 636:Src/main.c **** case STM32_DAC_CMD://13 - Set STM32 internal DAC (PA4) - 12058 .loc 1 636 5 is_stmt 1 view .LVU3847 - 12059 0594 B5E5 b .L602 - 12060 .L687: - 12061 .LBB710: - 599:Src/main.c **** uint16_t count = COMMAND[1]; - 12062 .loc 1 599 7 view .LVU3848 - 599:Src/main.c **** uint16_t count = COMMAND[1]; - 12063 .loc 1 599 16 is_stmt 0 view .LVU3849 - 12064 0596 2346 mov r3, r4 - 12065 0598 2488 ldrh r4, [r4] - 12066 .LVL1074: - 600:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; - 12067 .loc 1 600 7 is_stmt 1 view .LVU3850 - 600:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; - 12068 .loc 1 600 16 is_stmt 0 view .LVU3851 - 12069 059a 5A88 ldrh r2, [r3, #2] - 12070 .LVL1075: - 601:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; - 12071 .loc 1 601 7 is_stmt 1 view .LVU3852 - 601:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; - 12072 .loc 1 601 16 is_stmt 0 view .LVU3853 - 12073 059c 9B88 ldrh r3, [r3, #4] - 12074 .LVL1076: - 602:Src/main.c **** uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u; - 12075 .loc 1 602 7 is_stmt 1 view .LVU3854 - 603:Src/main.c **** - 12076 .loc 1 603 7 view .LVU3855 - 603:Src/main.c **** - 12077 .loc 1 603 15 is_stmt 0 view .LVU3856 - 12078 059e C4F34001 ubfx r1, r4, #1, #1 - 12079 .LVL1077: - 605:Src/main.c **** { - 12080 .loc 1 605 7 is_stmt 1 view .LVU3857 - 605:Src/main.c **** { - 12081 .loc 1 605 11 is_stmt 0 view .LVU3858 - ARM GAS /tmp/ccuHnxNu.s page 628 + 12480 .loc 1 597 16 is_stmt 0 view .LVU3941 + 12481 0558 2088 ldrh r0, [r4] + 12482 .LVL1104: + 598:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); + 12483 .loc 1 598 7 is_stmt 1 view .LVU3942 + 598:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); + 12484 .loc 1 598 40 is_stmt 0 view .LVU3943 + 12485 055a 6388 ldrh r3, [r4, #2] + 598:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu); + 12486 .loc 1 598 16 view .LVU3944 + 12487 055c C3F30D03 ubfx r3, r3, #0, #14 + 12488 .LVL1105: + 599:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; + 12489 .loc 1 599 7 is_stmt 1 view .LVU3945 + 599:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; + 12490 .loc 1 599 40 is_stmt 0 view .LVU3946 + 12491 0560 A288 ldrh r2, [r4, #4] + 599:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u; + 12492 .loc 1 599 16 view .LVU3947 + 12493 0562 C2F30D02 ubfx r2, r2, #0, #14 + 12494 .LVL1106: + 600:Src/main.c **** uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u; + 12495 .loc 1 600 7 is_stmt 1 view .LVU3948 + 601:Src/main.c **** uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw; + 12496 .loc 1 601 7 view .LVU3949 + 602:Src/main.c **** + 12497 .loc 1 602 7 view .LVU3950 + 604:Src/main.c **** } + 12498 .loc 1 604 7 view .LVU3951 + 12499 0566 43EA8232 orr r2, r3, r2, lsl #14 + 12500 .LVL1107: + 604:Src/main.c **** } + 12501 .loc 1 604 7 is_stmt 0 view .LVU3952 + 12502 056a C0F34001 ubfx r1, r0, #1, #1 + 12503 056e 00F00100 and r0, r0, #1 + 12504 .LVL1108: + 604:Src/main.c **** } + 12505 .loc 1 604 7 view .LVU3953 + 12506 0572 FFF7FEFF bl AD9833_Apply + 12507 .LVL1109: + 604:Src/main.c **** } + 12508 .loc 1 604 7 view .LVU3954 + 12509 .LBE714: + 12510 0576 E7E7 b .L683 + 12511 .LVL1110: + 12512 .L657: + 614:Src/main.c **** { + 12513 .loc 1 614 6 is_stmt 1 view .LVU3955 + 614:Src/main.c **** { + 12514 .loc 1 614 10 is_stmt 0 view .LVU3956 + 12515 0578 1F4C ldr r4, .L763+52 + 12516 057a 0321 movs r1, #3 + 12517 057c 2046 mov r0, r4 + 12518 057e FFF7FEFF bl CalculateChecksum + 12519 .LVL1111: + 614:Src/main.c **** { + 12520 .loc 1 614 69 discriminator 1 view .LVU3957 + ARM GAS /tmp/ccLSPxIe.s page 641 - 12082 05a2 04F00100 and r0, r4, #1 - 605:Src/main.c **** { - 12083 .loc 1 605 10 view .LVU3859 - 12084 05a6 0C42 tst r4, r1 - 12085 05a8 2AD0 beq .L633 - 607:Src/main.c **** } - 12086 .loc 1 607 8 is_stmt 1 view .LVU3860 - 607:Src/main.c **** } - 12087 .loc 1 607 18 is_stmt 0 view .LVU3861 - 12088 05aa 0F4A ldr r2, .L696+48 - 12089 .LVL1078: - 607:Src/main.c **** } - 12090 .loc 1 607 18 view .LVU3862 - 12091 05ac 1378 ldrb r3, [r2] @ zero_extendqisi2 - 12092 .LVL1079: - 607:Src/main.c **** } - 12093 .loc 1 607 22 view .LVU3863 - 12094 05ae 43F00403 orr r3, r3, #4 - 12095 05b2 1370 strb r3, [r2] - 12096 05b4 E7E7 b .L634 - 12097 .L697: - 12098 05b6 00BF .align 2 - 12099 .L696: - 12100 05b8 00000000 .word task - 12101 05bc 00000000 .word TO7 - 12102 05c0 00000000 .word TO7_before - 12103 05c4 00000000 .word LD1_param - 12104 05c8 00000000 .word LD2_param - 12105 05cc 00000000 .word temp16 - 12106 05d0 00000000 .word Long_Data - 12107 05d4 00000000 .word TO6 - 12108 05d8 00000000 .word TO6_stop - 12109 05dc 00000000 .word Curr_setup - 12110 05e0 00000000 .word CPU_state_old - 12111 05e4 00000000 .word CS_result - 12112 05e8 00000000 .word State_Data - 12113 05ec 00000000 .word COMMAND - 12114 05f0 00000000 .word UART_transmission_request - 12115 05f4 00000000 .word CPU_state - 12116 05f8 00000000 .word LD1_curr_setup - 12117 05fc 00000000 .word LD2_curr_setup - 12118 .LVL1080: - 12119 .L633: - 611:Src/main.c **** { - 12120 .loc 1 611 8 is_stmt 1 view .LVU3864 - 611:Src/main.c **** { - 12121 .loc 1 611 11 is_stmt 0 view .LVU3865 - 12122 0600 1AB1 cbz r2, .L674 - 615:Src/main.c **** { - 12123 .loc 1 615 8 is_stmt 1 view .LVU3866 - 615:Src/main.c **** { - 12124 .loc 1 615 11 is_stmt 0 view .LVU3867 - 12125 0602 402A cmp r2, #64 - 12126 0604 02D9 bls .L635 - 617:Src/main.c **** } - 12127 .loc 1 617 15 view .LVU3868 - 12128 0606 4022 movs r2, #64 - ARM GAS /tmp/ccuHnxNu.s page 629 + 12521 0582 E388 ldrh r3, [r4, #6] + 614:Src/main.c **** { + 12522 .loc 1 614 9 discriminator 1 view .LVU3958 + 12523 0584 9842 cmp r0, r3 + 12524 0586 0CD0 beq .L751 + 649:Src/main.c **** } + 12525 .loc 1 649 7 is_stmt 1 view .LVU3959 + 649:Src/main.c **** } + 12526 .loc 1 649 17 is_stmt 0 view .LVU3960 + 12527 0588 1A4A ldr r2, .L763+48 + 12528 058a 1378 ldrb r3, [r2] @ zero_extendqisi2 + 649:Src/main.c **** } + 12529 .loc 1 649 21 view .LVU3961 + 12530 058c 43F00403 orr r3, r3, #4 + 12531 0590 1370 strb r3, [r2] + 12532 .L686: + 651:Src/main.c **** CPU_state = CPU_state_old; + 12533 .loc 1 651 6 is_stmt 1 view .LVU3962 + 651:Src/main.c **** CPU_state = CPU_state_old; + 12534 .loc 1 651 32 is_stmt 0 view .LVU3963 + 12535 0592 1A4B ldr r3, .L763+56 + 12536 0594 0122 movs r2, #1 + 12537 0596 1A70 strb r2, [r3] + 652:Src/main.c **** break; + 12538 .loc 1 652 6 is_stmt 1 view .LVU3964 + 652:Src/main.c **** break; + 12539 .loc 1 652 16 is_stmt 0 view .LVU3965 + 12540 0598 144B ldr r3, .L763+40 + 12541 059a 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 12542 059c 184B ldr r3, .L763+60 + 12543 059e 1A70 strb r2, [r3] + 653:Src/main.c **** case STM32_DAC_CMD://13 - Set STM32 internal DAC (PA4) + 12544 .loc 1 653 5 is_stmt 1 view .LVU3966 + 12545 05a0 AFE5 b .L652 + 12546 .L751: + 12547 .LBB715: + 616:Src/main.c **** uint16_t count = COMMAND[1]; + 12548 .loc 1 616 7 view .LVU3967 + 616:Src/main.c **** uint16_t count = COMMAND[1]; + 12549 .loc 1 616 16 is_stmt 0 view .LVU3968 + 12550 05a2 2346 mov r3, r4 + 12551 05a4 2488 ldrh r4, [r4] + 12552 .LVL1112: + 617:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; + 12553 .loc 1 617 7 is_stmt 1 view .LVU3969 + 617:Src/main.c **** uint16_t pulse_ms = COMMAND[2]; + 12554 .loc 1 617 16 is_stmt 0 view .LVU3970 + 12555 05a6 5A88 ldrh r2, [r3, #2] + 12556 .LVL1113: + 618:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; + 12557 .loc 1 618 7 is_stmt 1 view .LVU3971 + 618:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u; + 12558 .loc 1 618 16 is_stmt 0 view .LVU3972 + 12559 05a8 9B88 ldrh r3, [r3, #4] + 12560 .LVL1114: + 619:Src/main.c **** uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u; + 12561 .loc 1 619 7 is_stmt 1 view .LVU3973 + ARM GAS /tmp/ccLSPxIe.s page 642 - 12129 .LVL1081: - 617:Src/main.c **** } - 12130 .loc 1 617 15 view .LVU3869 - 12131 0608 00E0 b .L635 - 12132 .LVL1082: - 12133 .L674: - 613:Src/main.c **** } - 12134 .loc 1 613 15 view .LVU3870 - 12135 060a 0122 movs r2, #1 - 12136 .LVL1083: - 12137 .L635: - 619:Src/main.c **** { - 12138 .loc 1 619 8 is_stmt 1 view .LVU3871 - 619:Src/main.c **** { - 12139 .loc 1 619 11 is_stmt 0 view .LVU3872 - 12140 060c 2BB1 cbz r3, .L676 - 623:Src/main.c **** { - 12141 .loc 1 623 8 is_stmt 1 view .LVU3873 - 623:Src/main.c **** { - 12142 .loc 1 623 11 is_stmt 0 view .LVU3874 - 12143 060e B3F5FA7F cmp r3, #500 - 12144 0612 03D9 bls .L636 - 625:Src/main.c **** } - 12145 .loc 1 625 18 view .LVU3875 - 12146 0614 4FF4FA73 mov r3, #500 - 12147 .LVL1084: - 625:Src/main.c **** } - 12148 .loc 1 625 18 view .LVU3876 - 12149 0618 00E0 b .L636 - 12150 .LVL1085: - 12151 .L676: - 621:Src/main.c **** } - 12152 .loc 1 621 18 view .LVU3877 - 12153 061a 0223 movs r3, #2 - 12154 .LVL1086: - 12155 .L636: - 627:Src/main.c **** } - 12156 .loc 1 627 8 is_stmt 1 view .LVU3878 - 12157 061c FFF7FEFF bl DS1809_Pulse - 12158 .LVL1087: - 627:Src/main.c **** } - 12159 .loc 1 627 8 is_stmt 0 view .LVU3879 - 12160 0620 B1E7 b .L634 - 12161 .LVL1088: - 12162 .L603: - 627:Src/main.c **** } - 12163 .loc 1 627 8 view .LVU3880 - 12164 .LBE710: - 638:Src/main.c **** { - 12165 .loc 1 638 6 is_stmt 1 view .LVU3881 - 638:Src/main.c **** { - 12166 .loc 1 638 10 is_stmt 0 view .LVU3882 - 12167 0622 A74C ldr r4, .L698 - 12168 0624 0321 movs r1, #3 - 12169 0626 2046 mov r0, r4 - 12170 0628 FFF7FEFF bl CalculateChecksum - 12171 .LVL1089: - ARM GAS /tmp/ccuHnxNu.s page 630 + 620:Src/main.c **** + 12562 .loc 1 620 7 view .LVU3974 + 620:Src/main.c **** + 12563 .loc 1 620 15 is_stmt 0 view .LVU3975 + 12564 05aa C4F34001 ubfx r1, r4, #1, #1 + 12565 .LVL1115: + 622:Src/main.c **** { + 12566 .loc 1 622 7 is_stmt 1 view .LVU3976 + 622:Src/main.c **** { + 12567 .loc 1 622 11 is_stmt 0 view .LVU3977 + 12568 05ae 04F00100 and r0, r4, #1 + 622:Src/main.c **** { + 12569 .loc 1 622 10 view .LVU3978 + 12570 05b2 0C42 tst r4, r1 + 12571 05b4 2AD0 beq .L685 + 624:Src/main.c **** } + 12572 .loc 1 624 8 is_stmt 1 view .LVU3979 + 624:Src/main.c **** } + 12573 .loc 1 624 18 is_stmt 0 view .LVU3980 + 12574 05b6 0F4A ldr r2, .L763+48 + 12575 .LVL1116: + 624:Src/main.c **** } + 12576 .loc 1 624 18 view .LVU3981 + 12577 05b8 1378 ldrb r3, [r2] @ zero_extendqisi2 + 12578 .LVL1117: + 624:Src/main.c **** } + 12579 .loc 1 624 22 view .LVU3982 + 12580 05ba 43F00403 orr r3, r3, #4 + 12581 05be 1370 strb r3, [r2] + 12582 05c0 E7E7 b .L686 + 12583 .L764: + 12584 05c2 00BF .align 2 + 12585 .L763: + 12586 05c4 00000000 .word task + 12587 05c8 00000000 .word TO7 + 12588 05cc 00000000 .word TO7_before + 12589 05d0 00000000 .word LD1_param + 12590 05d4 00000000 .word LD2_param + 12591 05d8 00000000 .word temp16 + 12592 05dc 00000000 .word Long_Data + 12593 05e0 00000000 .word TO6 + 12594 05e4 00000000 .word TO6_stop + 12595 05e8 00000000 .word Curr_setup + 12596 05ec 00000000 .word CPU_state_old + 12597 05f0 00000000 .word CS_result + 12598 05f4 00000000 .word State_Data + 12599 05f8 00000000 .word COMMAND + 12600 05fc 00000000 .word UART_transmission_request + 12601 0600 00000000 .word CPU_state + 12602 0604 00000000 .word LD1_curr_setup + 12603 0608 00000000 .word LD2_curr_setup + 12604 .LVL1118: + 12605 .L685: + 628:Src/main.c **** { + 12606 .loc 1 628 8 is_stmt 1 view .LVU3983 + 628:Src/main.c **** { + 12607 .loc 1 628 11 is_stmt 0 view .LVU3984 + ARM GAS /tmp/ccLSPxIe.s page 643 - 638:Src/main.c **** { - 12172 .loc 1 638 72 discriminator 1 view .LVU3883 - 12173 062c E388 ldrh r3, [r4, #6] - 638:Src/main.c **** { - 12174 .loc 1 638 9 discriminator 1 view .LVU3884 - 12175 062e 9842 cmp r0, r3 - 12176 0630 0CD0 beq .L688 - 647:Src/main.c **** } - 12177 .loc 1 647 7 is_stmt 1 view .LVU3885 - 647:Src/main.c **** } - 12178 .loc 1 647 17 is_stmt 0 view .LVU3886 - 12179 0632 A44A ldr r2, .L698+4 - 12180 0634 1378 ldrb r3, [r2] @ zero_extendqisi2 - 647:Src/main.c **** } - 12181 .loc 1 647 21 view .LVU3887 - 12182 0636 43F00403 orr r3, r3, #4 - 12183 063a 1370 strb r3, [r2] - 12184 .L638: - 649:Src/main.c **** CPU_state = CPU_state_old; - 12185 .loc 1 649 6 is_stmt 1 view .LVU3888 - 649:Src/main.c **** CPU_state = CPU_state_old; - 12186 .loc 1 649 32 is_stmt 0 view .LVU3889 - 12187 063c A24B ldr r3, .L698+8 - 12188 063e 0122 movs r2, #1 - 12189 0640 1A70 strb r2, [r3] - 650:Src/main.c **** break; - 12190 .loc 1 650 6 is_stmt 1 view .LVU3890 - 650:Src/main.c **** break; - 12191 .loc 1 650 16 is_stmt 0 view .LVU3891 - 12192 0642 A24B ldr r3, .L698+12 - 12193 0644 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 12194 0646 A24B ldr r3, .L698+16 - 12195 0648 1A70 strb r2, [r3] - 651:Src/main.c **** case DECODE_TASK: - 12196 .loc 1 651 5 is_stmt 1 view .LVU3892 - 12197 064a 5AE5 b .L602 - 12198 .L688: - 12199 .LBB711: - 640:Src/main.c **** uint16_t dac_code = (uint16_t)(COMMAND[1] & 0x0FFFu); - 12200 .loc 1 640 7 view .LVU3893 - 12201 .LVL1090: - 641:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u; - 12202 .loc 1 641 7 view .LVU3894 - 641:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u; - 12203 .loc 1 641 45 is_stmt 0 view .LVU3895 - 12204 064c 6088 ldrh r0, [r4, #2] - 12205 .LVL1091: - 642:Src/main.c **** PA4_DAC_Set(dac_code, enable); - 12206 .loc 1 642 7 is_stmt 1 view .LVU3896 - 642:Src/main.c **** PA4_DAC_Set(dac_code, enable); - 12207 .loc 1 642 61 is_stmt 0 view .LVU3897 - 12208 064e 2178 ldrb r1, [r4] @ zero_extendqisi2 - 12209 .LVL1092: - 643:Src/main.c **** } - 12210 .loc 1 643 7 is_stmt 1 view .LVU3898 - 12211 0650 01F00101 and r1, r1, #1 - 12212 .LVL1093: - ARM GAS /tmp/ccuHnxNu.s page 631 + 12608 060c 1AB1 cbz r2, .L738 + 632:Src/main.c **** { + 12609 .loc 1 632 8 is_stmt 1 view .LVU3985 + 632:Src/main.c **** { + 12610 .loc 1 632 11 is_stmt 0 view .LVU3986 + 12611 060e 402A cmp r2, #64 + 12612 0610 02D9 bls .L687 + 634:Src/main.c **** } + 12613 .loc 1 634 15 view .LVU3987 + 12614 0612 4022 movs r2, #64 + 12615 .LVL1119: + 634:Src/main.c **** } + 12616 .loc 1 634 15 view .LVU3988 + 12617 0614 00E0 b .L687 + 12618 .LVL1120: + 12619 .L738: + 630:Src/main.c **** } + 12620 .loc 1 630 15 view .LVU3989 + 12621 0616 0122 movs r2, #1 + 12622 .LVL1121: + 12623 .L687: + 636:Src/main.c **** { + 12624 .loc 1 636 8 is_stmt 1 view .LVU3990 + 636:Src/main.c **** { + 12625 .loc 1 636 11 is_stmt 0 view .LVU3991 + 12626 0618 2BB1 cbz r3, .L740 + 640:Src/main.c **** { + 12627 .loc 1 640 8 is_stmt 1 view .LVU3992 + 640:Src/main.c **** { + 12628 .loc 1 640 11 is_stmt 0 view .LVU3993 + 12629 061a B3F5FA7F cmp r3, #500 + 12630 061e 03D9 bls .L688 + 642:Src/main.c **** } + 12631 .loc 1 642 18 view .LVU3994 + 12632 0620 4FF4FA73 mov r3, #500 + 12633 .LVL1122: + 642:Src/main.c **** } + 12634 .loc 1 642 18 view .LVU3995 + 12635 0624 00E0 b .L688 + 12636 .LVL1123: + 12637 .L740: + 638:Src/main.c **** } + 12638 .loc 1 638 18 view .LVU3996 + 12639 0626 0223 movs r3, #2 + 12640 .LVL1124: + 12641 .L688: + 644:Src/main.c **** } + 12642 .loc 1 644 8 is_stmt 1 view .LVU3997 + 12643 0628 FFF7FEFF bl DS1809_Pulse + 12644 .LVL1125: + 644:Src/main.c **** } + 12645 .loc 1 644 8 is_stmt 0 view .LVU3998 + 12646 062c B1E7 b .L686 + 12647 .LVL1126: + 12648 .L656: + 644:Src/main.c **** } + 12649 .loc 1 644 8 view .LVU3999 + ARM GAS /tmp/ccLSPxIe.s page 644 - 643:Src/main.c **** } - 12213 .loc 1 643 7 is_stmt 0 view .LVU3899 - 12214 0654 C0F30B00 ubfx r0, r0, #0, #12 - 12215 .LVL1094: - 643:Src/main.c **** } - 12216 .loc 1 643 7 view .LVU3900 - 12217 0658 FFF7FEFF bl PA4_DAC_Set - 12218 .LVL1095: - 643:Src/main.c **** } - 12219 .loc 1 643 7 view .LVU3901 - 12220 .LBE711: - 12221 065c EEE7 b .L638 - 12222 .LVL1096: - 12223 .L609: - 653:Src/main.c **** { - 12224 .loc 1 653 6 is_stmt 1 view .LVU3902 - 653:Src/main.c **** { - 12225 .loc 1 653 10 is_stmt 0 view .LVU3903 - 12226 065e 9848 ldr r0, .L698 - 12227 0660 FFF7FEFF bl CheckChecksum - 12228 .LVL1097: - 653:Src/main.c **** { - 12229 .loc 1 653 9 discriminator 1 view .LVU3904 - 12230 0664 70B9 cbnz r0, .L689 - 662:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 12231 .loc 1 662 7 is_stmt 1 view .LVU3905 - 662:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 12232 .loc 1 662 17 is_stmt 0 view .LVU3906 - 12233 0666 974A ldr r2, .L698+4 - 12234 0668 1378 ldrb r3, [r2] @ zero_extendqisi2 - 662:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 12235 .loc 1 662 21 view .LVU3907 - 12236 066a 43F00403 orr r3, r3, #4 - 12237 066e 1370 strb r3, [r2] - 663:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 12238 .loc 1 663 7 is_stmt 1 view .LVU3908 - 663:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 12239 .loc 1 663 17 is_stmt 0 view .LVU3909 - 12240 0670 974B ldr r3, .L698+16 - 12241 0672 0222 movs r2, #2 - 12242 0674 1A70 strb r2, [r3] + 12650 .LBE715: + 655:Src/main.c **** { + 12651 .loc 1 655 6 is_stmt 1 view .LVU4000 + 655:Src/main.c **** { + 12652 .loc 1 655 10 is_stmt 0 view .LVU4001 + 12653 062e 7C4C ldr r4, .L765 + 12654 0630 0321 movs r1, #3 + 12655 0632 2046 mov r0, r4 + 12656 0634 FFF7FEFF bl CalculateChecksum + 12657 .LVL1127: + 655:Src/main.c **** { + 12658 .loc 1 655 72 discriminator 1 view .LVU4002 + 12659 0638 E388 ldrh r3, [r4, #6] + 655:Src/main.c **** { + 12660 .loc 1 655 9 discriminator 1 view .LVU4003 + 12661 063a 9842 cmp r0, r3 + 12662 063c 0CD0 beq .L752 664:Src/main.c **** } - 12243 .loc 1 664 7 is_stmt 1 view .LVU3910 + 12663 .loc 1 664 7 is_stmt 1 view .LVU4004 664:Src/main.c **** } - 12244 .loc 1 664 21 is_stmt 0 view .LVU3911 - 12245 0676 954B ldr r3, .L698+12 - 12246 0678 0022 movs r2, #0 - 12247 067a 1A70 strb r2, [r3] - 12248 .L640: - 666:Src/main.c **** break; - 12249 .loc 1 666 6 is_stmt 1 view .LVU3912 - 666:Src/main.c **** break; - 12250 .loc 1 666 32 is_stmt 0 view .LVU3913 - 12251 067c 924B ldr r3, .L698+8 - 12252 067e 0122 movs r2, #1 - 12253 0680 1A70 strb r2, [r3] - 667:Src/main.c **** case RUN_TASK: - ARM GAS /tmp/ccuHnxNu.s page 632 + 12664 .loc 1 664 17 is_stmt 0 view .LVU4005 + 12665 063e 794A ldr r2, .L765+4 + 12666 0640 1378 ldrb r3, [r2] @ zero_extendqisi2 + 664:Src/main.c **** } + 12667 .loc 1 664 21 view .LVU4006 + 12668 0642 43F00403 orr r3, r3, #4 + 12669 0646 1370 strb r3, [r2] + 12670 .L690: + 666:Src/main.c **** CPU_state = CPU_state_old; + 12671 .loc 1 666 6 is_stmt 1 view .LVU4007 + 666:Src/main.c **** CPU_state = CPU_state_old; + 12672 .loc 1 666 32 is_stmt 0 view .LVU4008 + 12673 0648 774B ldr r3, .L765+8 + 12674 064a 0122 movs r2, #1 + 12675 064c 1A70 strb r2, [r3] + 667:Src/main.c **** break; + 12676 .loc 1 667 6 is_stmt 1 view .LVU4009 + 667:Src/main.c **** break; + 12677 .loc 1 667 16 is_stmt 0 view .LVU4010 + 12678 064e 774B ldr r3, .L765+12 + 12679 0650 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 12680 0652 774B ldr r3, .L765+16 + 12681 0654 1A70 strb r2, [r3] + 668:Src/main.c **** case AD9102_WAVE_CTRL_CMD://14 - Control custom AD9102 SRAM upload + 12682 .loc 1 668 5 is_stmt 1 view .LVU4011 + 12683 0656 54E5 b .L652 + 12684 .L752: + 12685 .LBB716: + 657:Src/main.c **** uint16_t dac_code = (uint16_t)(COMMAND[1] & 0x0FFFu); + 12686 .loc 1 657 7 view .LVU4012 + 12687 .LVL1128: + 658:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u; + 12688 .loc 1 658 7 view .LVU4013 + 658:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u; + 12689 .loc 1 658 45 is_stmt 0 view .LVU4014 + 12690 0658 6088 ldrh r0, [r4, #2] + 12691 .LVL1129: + ARM GAS /tmp/ccLSPxIe.s page 645 - 12254 .loc 1 667 5 is_stmt 1 view .LVU3914 - 12255 0682 3EE5 b .L602 - 12256 .L689: - 655:Src/main.c **** TO6_before = TO6; - 12257 .loc 1 655 7 view .LVU3915 - 12258 0684 934B ldr r3, .L698+20 - 12259 0686 944A ldr r2, .L698+24 - 12260 0688 9449 ldr r1, .L698+28 - 12261 068a 8D48 ldr r0, .L698 - 12262 068c FFF7FEFF bl Decode_task - 12263 .LVL1098: - 656:Src/main.c **** CPU_state = RUN_TASK; - 12264 .loc 1 656 7 view .LVU3916 - 656:Src/main.c **** CPU_state = RUN_TASK; - 12265 .loc 1 656 18 is_stmt 0 view .LVU3917 - 12266 0690 934B ldr r3, .L698+32 - 12267 0692 1A68 ldr r2, [r3] - 12268 0694 934B ldr r3, .L698+36 - 12269 0696 1A60 str r2, [r3] - 657:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 12270 .loc 1 657 7 is_stmt 1 view .LVU3918 - 657:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 12271 .loc 1 657 17 is_stmt 0 view .LVU3919 - 12272 0698 0923 movs r3, #9 - 12273 069a 8D4A ldr r2, .L698+16 - 12274 069c 1370 strb r3, [r2] - 658:Src/main.c **** } - 12275 .loc 1 658 7 is_stmt 1 view .LVU3920 - 658:Src/main.c **** } - 12276 .loc 1 658 21 is_stmt 0 view .LVU3921 - 12277 069e 8B4A ldr r2, .L698+12 - 12278 06a0 1370 strb r3, [r2] - 12279 06a2 EBE7 b .L640 - 12280 .L608: - 669:Src/main.c **** { - 12281 .loc 1 669 6 is_stmt 1 view .LVU3922 - 669:Src/main.c **** { - 12282 .loc 1 669 18 is_stmt 0 view .LVU3923 - 12283 06a4 904B ldr r3, .L698+40 - 12284 06a6 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 12285 06a8 012B cmp r3, #1 - 12286 06aa 23D0 beq .L641 - 12287 06ac 022B cmp r3, #2 - 12288 06ae 00F03F81 beq .L642 - 12289 .L643: - 924:Src/main.c **** { - 12290 .loc 1 924 6 is_stmt 1 view .LVU3924 - 924:Src/main.c **** { - 12291 .loc 1 924 13 is_stmt 0 view .LVU3925 - 12292 06b2 8E4B ldr r3, .L698+44 - 12293 06b4 1B68 ldr r3, [r3] - 12294 06b6 8E4A ldr r2, .L698+48 - 12295 06b8 1268 ldr r2, [r2] - 924:Src/main.c **** { - 12296 .loc 1 924 9 view .LVU3926 - 12297 06ba 9342 cmp r3, r2 - 12298 06bc 00F2E681 bhi .L690 - ARM GAS /tmp/ccuHnxNu.s page 633 + 659:Src/main.c **** PA4_DAC_Set(dac_code, enable); + 12692 .loc 1 659 7 is_stmt 1 view .LVU4015 + 659:Src/main.c **** PA4_DAC_Set(dac_code, enable); + 12693 .loc 1 659 61 is_stmt 0 view .LVU4016 + 12694 065a 2178 ldrb r1, [r4] @ zero_extendqisi2 + 12695 .LVL1130: + 660:Src/main.c **** } + 12696 .loc 1 660 7 is_stmt 1 view .LVU4017 + 12697 065c 01F00101 and r1, r1, #1 + 12698 .LVL1131: + 660:Src/main.c **** } + 12699 .loc 1 660 7 is_stmt 0 view .LVU4018 + 12700 0660 C0F30B00 ubfx r0, r0, #0, #12 + 12701 .LVL1132: + 660:Src/main.c **** } + 12702 .loc 1 660 7 view .LVU4019 + 12703 0664 FFF7FEFF bl PA4_DAC_Set + 12704 .LVL1133: + 660:Src/main.c **** } + 12705 .loc 1 660 7 view .LVU4020 + 12706 .LBE716: + 12707 0668 EEE7 b .L690 + 12708 .LVL1134: + 12709 .L655: + 670:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_CTRL_WORDS - 1) == COMMAND[AD9102_WAVE_CTRL_WORDS - + 12710 .loc 1 670 6 is_stmt 1 view .LVU4021 + 670:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_CTRL_WORDS - 1) == COMMAND[AD9102_WAVE_CTRL_WORDS - + 12711 .loc 1 670 20 is_stmt 0 view .LVU4022 + 12712 066a 6E4B ldr r3, .L765+4 + 12713 066c 0022 movs r2, #0 + 12714 066e 5A70 strb r2, [r3, #1] + 671:Src/main.c **** { + 12715 .loc 1 671 6 is_stmt 1 view .LVU4023 + 671:Src/main.c **** { + 12716 .loc 1 671 10 is_stmt 0 view .LVU4024 + 12717 0670 6B4C ldr r4, .L765 + 12718 0672 0321 movs r1, #3 + 12719 0674 2046 mov r0, r4 + 12720 0676 FFF7FEFF bl CalculateChecksum + 12721 .LVL1135: + 671:Src/main.c **** { + 12722 .loc 1 671 75 discriminator 1 view .LVU4025 + 12723 067a E388 ldrh r3, [r4, #6] + 671:Src/main.c **** { + 12724 .loc 1 671 9 discriminator 1 view .LVU4026 + 12725 067c 9842 cmp r0, r3 + 12726 067e 0CD0 beq .L753 + 722:Src/main.c **** } + 12727 .loc 1 722 7 is_stmt 1 view .LVU4027 + 722:Src/main.c **** } + 12728 .loc 1 722 17 is_stmt 0 view .LVU4028 + 12729 0680 684A ldr r2, .L765+4 + 12730 0682 1378 ldrb r3, [r2] @ zero_extendqisi2 + 722:Src/main.c **** } + 12731 .loc 1 722 21 view .LVU4029 + 12732 0684 43F00403 orr r3, r3, #4 + 12733 0688 1370 strb r3, [r2] + ARM GAS /tmp/ccLSPxIe.s page 646 - 12299 .L660: - 976:Src/main.c **** - 12300 .loc 1 976 13 is_stmt 1 discriminator 1 view .LVU3927 - 12301 06c0 8C4B ldr r3, .L698+52 - 12302 06c2 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 12303 06c4 002B cmp r3, #0 - 12304 06c6 FBD0 beq .L660 - 978:Src/main.c **** - 12305 .loc 1 978 6 view .LVU3928 - 12306 06c8 FFF7FEFF bl Stop_TIM10 - 12307 .LVL1099: - 980:Src/main.c **** { - 12308 .loc 1 980 6 view .LVU3929 - 980:Src/main.c **** { - 12309 .loc 1 980 14 is_stmt 0 view .LVU3930 - 12310 06cc 864B ldr r3, .L698+40 - 12311 06ce DB8A ldrh r3, [r3, #22] - 980:Src/main.c **** { - 12312 .loc 1 980 9 view .LVU3931 - 12313 06d0 032B cmp r3, #3 - 12314 06d2 0BD9 bls .L661 - 982:Src/main.c **** TO10_counter = task.dt / 10; - 12315 .loc 1 982 7 is_stmt 1 view .LVU3932 - 982:Src/main.c **** TO10_counter = task.dt / 10; - 12316 .loc 1 982 26 is_stmt 0 view .LVU3933 - 12317 06d4 884B ldr r3, .L698+56 - 12318 06d6 1A68 ldr r2, [r3] - 12319 06d8 884B ldr r3, .L698+60 - 12320 06da DA60 str r2, [r3, #12] - 983:Src/main.c **** } - 12321 .loc 1 983 7 is_stmt 1 view .LVU3934 - 983:Src/main.c **** } - 12322 .loc 1 983 26 is_stmt 0 view .LVU3935 - 12323 06dc 824B ldr r3, .L698+40 - 12324 06de 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 - 983:Src/main.c **** } - 12325 .loc 1 983 30 view .LVU3936 - 12326 06e0 874A ldr r2, .L698+64 - 12327 06e2 A2FB0323 umull r2, r3, r2, r3 - 12328 06e6 DB08 lsrs r3, r3, #3 - 983:Src/main.c **** } - 12329 .loc 1 983 20 view .LVU3937 - 12330 06e8 864A ldr r2, .L698+68 - 12331 06ea 1360 str r3, [r2] - 12332 .L661: - 986:Src/main.c **** break; - 12333 .loc 1 986 6 is_stmt 1 view .LVU3938 - 986:Src/main.c **** break; - 12334 .loc 1 986 20 is_stmt 0 view .LVU3939 - 12335 06ec 774B ldr r3, .L698+12 - 12336 06ee 0922 movs r2, #9 - 12337 06f0 1A70 strb r2, [r3] - 987:Src/main.c **** } - 12338 .loc 1 987 9 is_stmt 1 view .LVU3940 - 12339 06f2 06E5 b .L602 - 12340 .L641: - 12341 .LBB712: - ARM GAS /tmp/ccuHnxNu.s page 634 + 12734 .L696: + 724:Src/main.c **** CPU_state = CPU_state_old; + 12735 .loc 1 724 6 is_stmt 1 view .LVU4030 + 724:Src/main.c **** CPU_state = CPU_state_old; + 12736 .loc 1 724 32 is_stmt 0 view .LVU4031 + 12737 068a 674B ldr r3, .L765+8 + 12738 068c 0122 movs r2, #1 + 12739 068e 1A70 strb r2, [r3] + 725:Src/main.c **** break; + 12740 .loc 1 725 6 is_stmt 1 view .LVU4032 + 725:Src/main.c **** break; + 12741 .loc 1 725 16 is_stmt 0 view .LVU4033 + 12742 0690 664B ldr r3, .L765+12 + 12743 0692 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 12744 0694 664B ldr r3, .L765+16 + 12745 0696 1A70 strb r2, [r3] + 726:Src/main.c **** case AD9102_WAVE_DATA_CMD://15 - Write custom AD9102 SRAM samples + 12746 .loc 1 726 5 is_stmt 1 view .LVU4034 + 12747 0698 33E5 b .L652 + 12748 .L753: + 12749 .LBB717: + 673:Src/main.c **** uint16_t param0 = COMMAND[1]; + 12750 .loc 1 673 7 view .LVU4035 + 673:Src/main.c **** uint16_t param0 = COMMAND[1]; + 12751 .loc 1 673 16 is_stmt 0 view .LVU4036 + 12752 069a 2288 ldrh r2, [r4] + 12753 .LVL1136: + 674:Src/main.c **** uint16_t param1 = COMMAND[2]; + 12754 .loc 1 674 7 is_stmt 1 view .LVU4037 + 674:Src/main.c **** uint16_t param1 = COMMAND[2]; + 12755 .loc 1 674 16 is_stmt 0 view .LVU4038 + 12756 069c 6088 ldrh r0, [r4, #2] + 12757 .LVL1137: + 675:Src/main.c **** + 12758 .loc 1 675 7 is_stmt 1 view .LVU4039 + 675:Src/main.c **** + 12759 .loc 1 675 16 is_stmt 0 view .LVU4040 + 12760 069e A388 ldrh r3, [r4, #4] + 12761 .LVL1138: + 677:Src/main.c **** { + 12762 .loc 1 677 7 is_stmt 1 view .LVU4041 + 12763 06a0 022A cmp r2, #2 + 12764 06a2 10D0 beq .L692 + 12765 06a4 032A cmp r2, #3 + 12766 06a6 34D0 beq .L693 + 12767 06a8 012A cmp r2, #1 + 12768 06aa 3CD1 bne .L694 + 680:Src/main.c **** { + 12769 .loc 1 680 9 view .LVU4042 + 680:Src/main.c **** { + 12770 .loc 1 680 12 is_stmt 0 view .LVU4043 + 12771 06ac 1BB9 cbnz r3, .L695 + 680:Src/main.c **** { + 12772 .loc 1 680 32 discriminator 1 view .LVU4044 + 12773 06ae FFF7FEFF bl AD9102_BeginWaveUpload + 12774 .LVL1139: + 680:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 647 - 691:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12342 .loc 1 691 7 view .LVU3941 - 691:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12343 .loc 1 691 38 is_stmt 0 view .LVU3942 - 12344 06f4 7C4B ldr r3, .L698+40 - 12345 06f6 D3ED077A vldr.32 s15, [r3, #28] - 691:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12346 .loc 1 691 7 view .LVU3943 - 12347 06fa FCEEE77A vcvt.u32.f32 s15, s15 - 12348 06fe 17EE903A vmov r3, s15 @ int - 12349 0702 99B2 uxth r1, r3 - 12350 0704 0220 movs r0, #2 - 12351 0706 FFF7FEFF bl Set_LTEC - 12352 .LVL1100: - 692:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 12353 .loc 1 692 7 is_stmt 1 view .LVU3944 - 692:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 12354 .loc 1 692 14 is_stmt 0 view .LVU3945 - 12355 070a 0320 movs r0, #3 - 12356 070c FFF7FEFF bl MPhD_T - 12357 .LVL1101: - 693:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12358 .loc 1 693 7 is_stmt 1 view .LVU3946 - 693:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12359 .loc 1 693 32 is_stmt 0 view .LVU3947 - 12360 0710 0320 movs r0, #3 - 12361 0712 FFF7FEFF bl MPhD_T - 12362 .LVL1102: - 693:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12363 .loc 1 693 30 discriminator 1 view .LVU3948 - 12364 0716 7C4C ldr r4, .L698+72 - 12365 0718 2080 strh r0, [r4] @ movhi - 694:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 12366 .loc 1 694 7 is_stmt 1 view .LVU3949 - 694:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 12367 .loc 1 694 14 is_stmt 0 view .LVU3950 - 12368 071a 0420 movs r0, #4 - 12369 071c FFF7FEFF bl MPhD_T - 12370 .LVL1103: - 695:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12371 .loc 1 695 7 is_stmt 1 view .LVU3951 - 695:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12372 .loc 1 695 32 is_stmt 0 view .LVU3952 - 12373 0720 0420 movs r0, #4 - 12374 0722 FFF7FEFF bl MPhD_T - 12375 .LVL1104: - 695:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12376 .loc 1 695 30 discriminator 1 view .LVU3953 - 12377 0726 794D ldr r5, .L698+76 - 12378 0728 2880 strh r0, [r5] @ movhi - 696:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12379 .loc 1 696 7 is_stmt 1 view .LVU3954 - 696:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12380 .loc 1 696 14 is_stmt 0 view .LVU3955 - 12381 072a 0122 movs r2, #1 - 12382 072c 2146 mov r1, r4 - 12383 072e 6B48 ldr r0, .L698+28 - ARM GAS /tmp/ccuHnxNu.s page 635 + 12775 .loc 1 680 28 discriminator 1 view .LVU4045 + 12776 06b2 0028 cmp r0, #0 + 12777 06b4 E9D1 bne .L696 + 12778 .L695: + 682:Src/main.c **** State_Data[0] |= AD9102_ERR; + 12779 .loc 1 682 10 is_stmt 1 view .LVU4046 + 12780 06b6 FFF7FEFF bl AD9102_CancelWaveUpload + 12781 .LVL1140: + 683:Src/main.c **** } + 12782 .loc 1 683 10 view .LVU4047 + 683:Src/main.c **** } + 12783 .loc 1 683 20 is_stmt 0 view .LVU4048 + 12784 06ba 5A4A ldr r2, .L765+4 + 12785 06bc 1378 ldrb r3, [r2] @ zero_extendqisi2 + 683:Src/main.c **** } + 12786 .loc 1 683 24 view .LVU4049 + 12787 06be 63F07F03 orn r3, r3, #127 + 12788 06c2 1370 strb r3, [r2] + 12789 06c4 E1E7 b .L696 + 12790 .LVL1141: + 12791 .L692: + 12792 .LBB718: + 688:Src/main.c **** uint8_t ok = 0u; + 12793 .loc 1 688 9 is_stmt 1 view .LVU4050 + 688:Src/main.c **** uint8_t ok = 0u; + 12794 .loc 1 688 18 is_stmt 0 view .LVU4051 + 12795 06c6 5B4A ldr r2, .L765+20 + 12796 .LVL1142: + 688:Src/main.c **** uint8_t ok = 0u; + 12797 .loc 1 688 18 view .LVU4052 + 12798 06c8 1488 ldrh r4, [r2] + 12799 .LVL1143: + 689:Src/main.c **** uint16_t pat_status; + 12800 .loc 1 689 9 is_stmt 1 view .LVU4053 + 689:Src/main.c **** uint16_t pat_status; + 12801 .loc 1 689 17 is_stmt 0 view .LVU4054 + 12802 06ca 0022 movs r2, #0 + 12803 06cc 8DF81720 strb r2, [sp, #23] + 690:Src/main.c **** + 12804 .loc 1 690 9 is_stmt 1 view .LVU4055 + 692:Src/main.c **** { + 12805 .loc 1 692 9 view .LVU4056 + 692:Src/main.c **** { + 12806 .loc 1 692 12 is_stmt 0 view .LVU4057 + 12807 06d0 1843 orrs r0, r0, r3 + 12808 .LVL1144: + 692:Src/main.c **** { + 12809 .loc 1 692 12 view .LVU4058 + 12810 06d2 07D0 beq .L697 + 694:Src/main.c **** State_Data[0] |= AD9102_ERR; + 12811 .loc 1 694 10 is_stmt 1 view .LVU4059 + 12812 06d4 FFF7FEFF bl AD9102_CancelWaveUpload + 12813 .LVL1145: + 695:Src/main.c **** break; + 12814 .loc 1 695 10 view .LVU4060 + 695:Src/main.c **** break; + 12815 .loc 1 695 20 is_stmt 0 view .LVU4061 + ARM GAS /tmp/ccLSPxIe.s page 648 - 12384 0730 FFF7FEFF bl PID_Controller_Temp - 12385 .LVL1105: - 12386 0734 0146 mov r1, r0 - 696:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12387 .loc 1 696 13 discriminator 1 view .LVU3956 - 12388 0736 764C ldr r4, .L698+80 - 12389 0738 2080 strh r0, [r4] @ movhi - 697:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 12390 .loc 1 697 7 is_stmt 1 view .LVU3957 - 12391 073a 0320 movs r0, #3 - 12392 073c FFF7FEFF bl Set_LTEC - 12393 .LVL1106: - 698:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12394 .loc 1 698 7 view .LVU3958 - 698:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12395 .loc 1 698 14 is_stmt 0 view .LVU3959 - 12396 0740 0222 movs r2, #2 - 12397 0742 2946 mov r1, r5 - 12398 0744 6448 ldr r0, .L698+24 - 12399 0746 FFF7FEFF bl PID_Controller_Temp - 12400 .LVL1107: - 12401 074a 0146 mov r1, r0 - 698:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12402 .loc 1 698 13 discriminator 1 view .LVU3960 - 12403 074c 2080 strh r0, [r4] @ movhi - 699:Src/main.c **** - 12404 .loc 1 699 7 is_stmt 1 view .LVU3961 - 12405 074e 0420 movs r0, #4 - 12406 0750 FFF7FEFF bl Set_LTEC - 12407 .LVL1108: - 702:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12408 .loc 1 702 7 view .LVU3962 - 12409 0754 6F4C ldr r4, .L698+84 - 12410 0756 0122 movs r2, #1 - 12411 0758 8021 movs r1, #128 - 12412 075a 2046 mov r0, r4 - 12413 075c FFF7FEFF bl HAL_GPIO_WritePin - 12414 .LVL1109: - 703:Src/main.c **** - 12415 .loc 1 703 7 view .LVU3963 - 12416 0760 0022 movs r2, #0 - 12417 0762 8021 movs r1, #128 - 12418 0764 2046 mov r0, r4 - 12419 0766 FFF7FEFF bl HAL_GPIO_WritePin - 12420 .LVL1110: - 705:Src/main.c **** if (st != HAL_OK) - 12421 .loc 1 705 7 view .LVU3964 - 705:Src/main.c **** if (st != HAL_OK) - 12422 .loc 1 705 12 is_stmt 0 view .LVU3965 - 12423 076a 6448 ldr r0, .L698+60 - 12424 076c FFF7FEFF bl HAL_TIM_Base_Start_IT - 12425 .LVL1111: - 706:Src/main.c **** while(1); - 12426 .loc 1 706 7 is_stmt 1 view .LVU3966 - 706:Src/main.c **** while(1); - 12427 .loc 1 706 10 is_stmt 0 view .LVU3967 - 12428 0770 0028 cmp r0, #0 - ARM GAS /tmp/ccuHnxNu.s page 636 + 12816 06d8 524A ldr r2, .L765+4 + 12817 06da 1378 ldrb r3, [r2] @ zero_extendqisi2 + 695:Src/main.c **** break; + 12818 .loc 1 695 24 view .LVU4062 + 12819 06dc 63F07F03 orn r3, r3, #127 + 12820 06e0 1370 strb r3, [r2] + 696:Src/main.c **** } + 12821 .loc 1 696 10 is_stmt 1 view .LVU4063 + 12822 06e2 D2E7 b .L696 + 12823 .LVL1146: + 12824 .L697: + 699:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 12825 .loc 1 699 9 view .LVU4064 + 699:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu); + 12826 .loc 1 699 22 is_stmt 0 view .LVU4065 + 12827 06e4 0DF11700 add r0, sp, #23 + 12828 06e8 FFF7FEFF bl AD9102_CommitWaveUpload + 12829 .LVL1147: + 700:Src/main.c **** if ((!ok) || AD9102_CheckFlagsSram(pat_status, 1u, samples, AD9102_SRAM_HOLD_DEFAULT)) + 12830 .loc 1 700 9 is_stmt 1 view .LVU4066 + 700:Src/main.c **** if ((!ok) || AD9102_CheckFlagsSram(pat_status, 1u, samples, AD9102_SRAM_HOLD_DEFAULT)) + 12831 .loc 1 700 23 is_stmt 0 view .LVU4067 + 12832 06ec 4D4B ldr r3, .L765+4 + 12833 06ee 5870 strb r0, [r3, #1] + 701:Src/main.c **** { + 12834 .loc 1 701 9 is_stmt 1 view .LVU4068 + 701:Src/main.c **** { + 12835 .loc 1 701 14 is_stmt 0 view .LVU4069 + 12836 06f0 9DF81730 ldrb r3, [sp, #23] @ zero_extendqisi2 + 701:Src/main.c **** { + 12837 .loc 1 701 12 view .LVU4070 + 12838 06f4 2BB9 cbnz r3, .L754 + 12839 .LVL1148: + 12840 .L698: + 703:Src/main.c **** } + 12841 .loc 1 703 10 is_stmt 1 view .LVU4071 + 703:Src/main.c **** } + 12842 .loc 1 703 20 is_stmt 0 view .LVU4072 + 12843 06f6 4B4A ldr r2, .L765+4 + 12844 06f8 1378 ldrb r3, [r2] @ zero_extendqisi2 + 703:Src/main.c **** } + 12845 .loc 1 703 24 view .LVU4073 + 12846 06fa 63F07F03 orn r3, r3, #127 + 12847 06fe 1370 strb r3, [r2] + 12848 .LBE718: + 706:Src/main.c **** case AD9102_WAVE_OPCODE_CANCEL: + 12849 .loc 1 706 8 is_stmt 1 view .LVU4074 + 12850 0700 C3E7 b .L696 + 12851 .LVL1149: + 12852 .L754: + 12853 .LBB719: + 701:Src/main.c **** { + 12854 .loc 1 701 22 is_stmt 0 discriminator 1 view .LVU4075 + 12855 0702 0123 movs r3, #1 + 12856 0704 2246 mov r2, r4 + 12857 0706 1946 mov r1, r3 + 12858 0708 FFF7FEFF bl AD9102_CheckFlagsSram + ARM GAS /tmp/ccLSPxIe.s page 649 - 12429 0772 75D1 bne .L645 - 709:Src/main.c **** uint16_t trigger_counter = 0; - 12430 .loc 1 709 7 is_stmt 1 view .LVU3968 - 12431 .LVL1112: - 710:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 12432 .loc 1 710 7 view .LVU3969 - 711:Src/main.c **** uint16_t task_sheduler = 0; - 12433 .loc 1 711 7 view .LVU3970 - 711:Src/main.c **** uint16_t task_sheduler = 0; - 12434 .loc 1 711 47 is_stmt 0 view .LVU3971 - 12435 0774 5C4B ldr r3, .L698+40 - 12436 0776 93ED027A vldr.32 s14, [r3, #8] - 711:Src/main.c **** uint16_t task_sheduler = 0; - 12437 .loc 1 711 64 view .LVU3972 - 12438 077a D3ED047A vldr.32 s15, [r3, #16] - 711:Src/main.c **** uint16_t task_sheduler = 0; - 12439 .loc 1 711 58 view .LVU3973 - 12440 077e 37EE677A vsub.f32 s14, s14, s15 - 711:Src/main.c **** uint16_t task_sheduler = 0; - 12441 .loc 1 711 84 view .LVU3974 - 12442 0782 D3ED036A vldr.32 s13, [r3, #12] - 711:Src/main.c **** uint16_t task_sheduler = 0; - 12443 .loc 1 711 79 view .LVU3975 - 12444 0786 C7EE267A vdiv.f32 s15, s14, s13 - 711:Src/main.c **** uint16_t task_sheduler = 0; - 12445 .loc 1 711 97 view .LVU3976 - 12446 078a B2EE047A vmov.f32 s14, #1.0e+1 - 12447 078e 67EE877A vmul.f32 s15, s15, s14 - 711:Src/main.c **** uint16_t task_sheduler = 0; - 12448 .loc 1 711 31 view .LVU3977 - 12449 0792 FCEEE77A vcvt.u32.f32 s15, s15 - 12450 0796 CDED037A vstr.32 s15, [sp, #12] @ int - 12451 079a 9DF80C60 ldrb r6, [sp, #12] @ zero_extendqisi2 - 12452 .LVL1113: - 712:Src/main.c **** - 12453 .loc 1 712 7 is_stmt 1 view .LVU3978 - 716:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 12454 .loc 1 716 7 view .LVU3979 - 12455 079e DFF88491 ldr r9, .L698+100 - 12456 07a2 0021 movs r1, #0 - 12457 07a4 4846 mov r0, r9 - 12458 .LVL1114: - 716:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 12459 .loc 1 716 7 is_stmt 0 view .LVU3980 - 12460 07a6 FFF7FEFF bl HAL_TIM_PWM_Stop - 12461 .LVL1115: - 717:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 12462 .loc 1 717 7 is_stmt 1 view .LVU3981 - 12463 07aa DFF87C81 ldr r8, .L698+104 - 12464 07ae 0821 movs r1, #8 - 12465 07b0 4046 mov r0, r8 - 12466 07b2 FFF7FEFF bl HAL_TIM_PWM_Stop - 12467 .LVL1116: - 718:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 12468 .loc 1 718 7 view .LVU3982 - 718:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 12469 .loc 1 718 13 is_stmt 0 view .LVU3983 - ARM GAS /tmp/ccuHnxNu.s page 637 + 12859 .LVL1150: + 701:Src/main.c **** { + 12860 .loc 1 701 19 discriminator 1 view .LVU4076 + 12861 070c 0028 cmp r0, #0 + 12862 070e BCD0 beq .L696 + 12863 0710 F1E7 b .L698 + 12864 .LVL1151: + 12865 .L693: + 701:Src/main.c **** { + 12866 .loc 1 701 19 discriminator 1 view .LVU4077 + 12867 .LBE719: + 708:Src/main.c **** { + 12868 .loc 1 708 9 is_stmt 1 view .LVU4078 + 708:Src/main.c **** { + 12869 .loc 1 708 12 is_stmt 0 view .LVU4079 + 12870 0712 1843 orrs r0, r0, r3 + 12871 .LVL1152: + 708:Src/main.c **** { + 12872 .loc 1 708 12 view .LVU4080 + 12873 0714 04D0 beq .L700 + 710:Src/main.c **** } + 12874 .loc 1 710 10 is_stmt 1 view .LVU4081 + 710:Src/main.c **** } + 12875 .loc 1 710 20 is_stmt 0 view .LVU4082 + 12876 0716 434A ldr r2, .L765+4 + 12877 .LVL1153: + 710:Src/main.c **** } + 12878 .loc 1 710 20 view .LVU4083 + 12879 0718 1378 ldrb r3, [r2] @ zero_extendqisi2 + 12880 .LVL1154: + 710:Src/main.c **** } + 12881 .loc 1 710 24 view .LVU4084 + 12882 071a 63F07F03 orn r3, r3, #127 + 12883 071e 1370 strb r3, [r2] + 12884 .L700: + 712:Src/main.c **** break; + 12885 .loc 1 712 9 is_stmt 1 view .LVU4085 + 12886 0720 FFF7FEFF bl AD9102_CancelWaveUpload + 12887 .LVL1155: + 713:Src/main.c **** default: + 12888 .loc 1 713 8 view .LVU4086 + 12889 0724 B1E7 b .L696 + 12890 .LVL1156: + 12891 .L694: + 715:Src/main.c **** State_Data[0] |= AD9102_ERR; + 12892 .loc 1 715 9 view .LVU4087 + 12893 0726 FFF7FEFF bl AD9102_CancelWaveUpload + 12894 .LVL1157: + 716:Src/main.c **** break; + 12895 .loc 1 716 9 view .LVU4088 + 716:Src/main.c **** break; + 12896 .loc 1 716 19 is_stmt 0 view .LVU4089 + 12897 072a 3E4A ldr r2, .L765+4 + 12898 072c 1378 ldrb r3, [r2] @ zero_extendqisi2 + 716:Src/main.c **** break; + 12899 .loc 1 716 23 view .LVU4090 + 12900 072e 63F07F03 orn r3, r3, #127 + ARM GAS /tmp/ccLSPxIe.s page 650 - 12470 07b6 584F ldr r7, .L698+88 - 12471 07b8 3B68 ldr r3, [r7] - 718:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 12472 .loc 1 718 20 view .LVU3984 - 12473 07ba 23F00803 bic r3, r3, #8 - 12474 07be 3B60 str r3, [r7] - 719:Src/main.c **** - 12475 .loc 1 719 7 is_stmt 1 view .LVU3985 - 719:Src/main.c **** - 12476 .loc 1 719 12 is_stmt 0 view .LVU3986 - 12477 07c0 564D ldr r5, .L698+92 - 12478 07c2 2B68 ldr r3, [r5] - 719:Src/main.c **** - 12479 .loc 1 719 19 view .LVU3987 - 12480 07c4 23F00803 bic r3, r3, #8 - 12481 07c8 2B60 str r3, [r5] - 723:Src/main.c **** TIM4 -> CNT = 0; - 12482 .loc 1 723 7 is_stmt 1 view .LVU3988 - 723:Src/main.c **** TIM4 -> CNT = 0; - 12483 .loc 1 723 20 is_stmt 0 view .LVU3989 - 12484 07ca 0024 movs r4, #0 - 12485 07cc 7C62 str r4, [r7, #36] - 724:Src/main.c **** - 12486 .loc 1 724 7 is_stmt 1 view .LVU3990 - 724:Src/main.c **** - 12487 .loc 1 724 19 is_stmt 0 view .LVU3991 - 12488 07ce 6C62 str r4, [r5, #36] - 726:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 12489 .loc 1 726 7 is_stmt 1 view .LVU3992 - 12490 07d0 2146 mov r1, r4 - 12491 07d2 4846 mov r0, r9 - 12492 07d4 FFF7FEFF bl HAL_TIM_PWM_Start - 12493 .LVL1117: - 727:Src/main.c **** //TIM4 -> CNT = 0; - 12494 .loc 1 727 7 view .LVU3993 - 12495 07d8 0821 movs r1, #8 - 12496 07da 4046 mov r0, r8 - 12497 07dc FFF7FEFF bl HAL_TIM_PWM_Start - 12498 .LVL1118: - 730:Src/main.c **** TIM11 -> CNT = 0; - 12499 .loc 1 730 7 view .LVU3994 - 730:Src/main.c **** TIM11 -> CNT = 0; - 12500 .loc 1 730 26 is_stmt 0 view .LVU3995 - 12501 07e0 EB6A ldr r3, [r5, #44] - 730:Src/main.c **** TIM11 -> CNT = 0; - 12502 .loc 1 730 33 view .LVU3996 - 12503 07e2 143B subs r3, r3, #20 - 730:Src/main.c **** TIM11 -> CNT = 0; - 12504 .loc 1 730 19 view .LVU3997 - 12505 07e4 6B62 str r3, [r5, #36] - 731:Src/main.c **** - 12506 .loc 1 731 7 is_stmt 1 view .LVU3998 - 731:Src/main.c **** - 12507 .loc 1 731 20 is_stmt 0 view .LVU3999 - 12508 07e6 7C62 str r4, [r7, #36] - 734:Src/main.c **** { - 12509 .loc 1 734 7 is_stmt 1 view .LVU4000 - ARM GAS /tmp/ccuHnxNu.s page 638 + 12901 0732 1370 strb r3, [r2] + 717:Src/main.c **** } + 12902 .loc 1 717 8 is_stmt 1 view .LVU4091 + 12903 0734 A9E7 b .L696 + 12904 .LVL1158: + 12905 .L653: + 717:Src/main.c **** } + 12906 .loc 1 717 8 is_stmt 0 view .LVU4092 + 12907 .LBE717: + 728:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_DATA_WORDS - 1) == COMMAND[AD9102_WAVE_DATA_WORDS - + 12908 .loc 1 728 6 is_stmt 1 view .LVU4093 + 728:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_DATA_WORDS - 1) == COMMAND[AD9102_WAVE_DATA_WORDS - + 12909 .loc 1 728 20 is_stmt 0 view .LVU4094 + 12910 0736 3B4B ldr r3, .L765+4 + 12911 0738 0022 movs r2, #0 + 12912 073a 5A70 strb r2, [r3, #1] + 729:Src/main.c **** { + 12913 .loc 1 729 6 is_stmt 1 view .LVU4095 + 729:Src/main.c **** { + 12914 .loc 1 729 10 is_stmt 0 view .LVU4096 + 12915 073c 384C ldr r4, .L765 + 12916 073e 0D21 movs r1, #13 + 12917 0740 2046 mov r0, r4 + 12918 0742 FFF7FEFF bl CalculateChecksum + 12919 .LVL1159: + 729:Src/main.c **** { + 12920 .loc 1 729 75 discriminator 1 view .LVU4097 + 12921 0746 638B ldrh r3, [r4, #26] + 729:Src/main.c **** { + 12922 .loc 1 729 9 discriminator 1 view .LVU4098 + 12923 0748 9842 cmp r0, r3 + 12924 074a 0ED0 beq .L755 + 740:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 12925 .loc 1 740 7 is_stmt 1 view .LVU4099 + 12926 074c FFF7FEFF bl AD9102_CancelWaveUpload + 12927 .LVL1160: + 741:Src/main.c **** } + 12928 .loc 1 741 7 view .LVU4100 + 741:Src/main.c **** } + 12929 .loc 1 741 17 is_stmt 0 view .LVU4101 + 12930 0750 344A ldr r2, .L765+4 + 12931 0752 1378 ldrb r3, [r2] @ zero_extendqisi2 + 741:Src/main.c **** } + 12932 .loc 1 741 21 view .LVU4102 + 12933 0754 43F00403 orr r3, r3, #4 + 12934 0758 1370 strb r3, [r2] + 12935 .L702: + 743:Src/main.c **** CPU_state = CPU_state_old; + 12936 .loc 1 743 6 is_stmt 1 view .LVU4103 + 743:Src/main.c **** CPU_state = CPU_state_old; + 12937 .loc 1 743 32 is_stmt 0 view .LVU4104 + 12938 075a 334B ldr r3, .L765+8 + 12939 075c 0122 movs r2, #1 + 12940 075e 1A70 strb r2, [r3] + 744:Src/main.c **** break; + 12941 .loc 1 744 6 is_stmt 1 view .LVU4105 + 744:Src/main.c **** break; + ARM GAS /tmp/ccLSPxIe.s page 651 - 710:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 12510 .loc 1 710 16 is_stmt 0 view .LVU4001 - 12511 07e8 2546 mov r5, r4 - 12512 .LVL1119: - 12513 .L647: - 734:Src/main.c **** { - 12514 .loc 1 734 33 is_stmt 1 view .LVU4002 - 734:Src/main.c **** { - 12515 .loc 1 734 18 is_stmt 0 view .LVU4003 - 12516 07ea 3F4B ldr r3, .L698+40 - 12517 07ec D3ED047A vldr.32 s15, [r3, #16] - 734:Src/main.c **** { - 12518 .loc 1 734 39 view .LVU4004 - 12519 07f0 93ED027A vldr.32 s14, [r3, #8] - 734:Src/main.c **** { - 12520 .loc 1 734 33 view .LVU4005 - 12521 07f4 F4EEC77A vcmpe.f32 s15, s14 - 12522 07f8 F1EE10FA vmrs APSR_nzcv, FPSCR - 12523 07fc 37D5 bpl .L691 - 736:Src/main.c **** { - 12524 .loc 1 736 8 is_stmt 1 view .LVU4006 - 736:Src/main.c **** { - 12525 .loc 1 736 12 is_stmt 0 view .LVU4007 - 12526 07fe 3D4B ldr r3, .L698+52 - 12527 0800 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 736:Src/main.c **** { - 12528 .loc 1 736 11 view .LVU4008 - 12529 0802 002B cmp r3, #0 - 12530 0804 F1D0 beq .L647 - 738:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 12531 .loc 1 738 9 is_stmt 1 view .LVU4009 - 12532 0806 FCEEE77A vcvt.u32.f32 s15, s15 - 12533 080a 17EE903A vmov r3, s15 @ int - 12534 080e 99B2 uxth r1, r3 - 12535 0810 0120 movs r0, #1 - 12536 0812 FFF7FEFF bl Set_LTEC - 12537 .LVL1120: - 741:Src/main.c **** TO10 = 0; - 12538 .loc 1 741 9 view .LVU4010 - 741:Src/main.c **** TO10 = 0; - 12539 .loc 1 741 13 is_stmt 0 view .LVU4011 - 12540 0816 344B ldr r3, .L698+40 - 12541 0818 D3ED047A vldr.32 s15, [r3, #16] - 741:Src/main.c **** TO10 = 0; - 12542 .loc 1 741 35 view .LVU4012 - 12543 081c 93ED037A vldr.32 s14, [r3, #12] - 741:Src/main.c **** TO10 = 0; - 12544 .loc 1 741 28 view .LVU4013 - 12545 0820 77EE877A vadd.f32 s15, s15, s14 - 12546 0824 C3ED047A vstr.32 s15, [r3, #16] - 742:Src/main.c **** TIM10_coflag = 0; - 12547 .loc 1 742 9 is_stmt 1 view .LVU4014 - 742:Src/main.c **** TIM10_coflag = 0; - 12548 .loc 1 742 14 is_stmt 0 view .LVU4015 - 12549 0828 0027 movs r7, #0 - 12550 082a 3D4B ldr r3, .L698+96 - 12551 082c 1F60 str r7, [r3] - ARM GAS /tmp/ccuHnxNu.s page 639 + 12942 .loc 1 744 16 is_stmt 0 view .LVU4106 + 12943 0760 324B ldr r3, .L765+12 + 12944 0762 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 12945 0764 324B ldr r3, .L765+16 + 12946 0766 1A70 strb r2, [r3] + 745:Src/main.c **** case DECODE_TASK: + 12947 .loc 1 745 5 is_stmt 1 view .LVU4107 + 12948 0768 CBE4 b .L652 + 12949 .L755: + 12950 .LBB720: + 731:Src/main.c **** if (!AD9102_WriteWaveUploadChunk(&COMMAND[1], chunk_count)) + 12951 .loc 1 731 7 view .LVU4108 + 731:Src/main.c **** if (!AD9102_WriteWaveUploadChunk(&COMMAND[1], chunk_count)) + 12952 .loc 1 731 16 is_stmt 0 view .LVU4109 + 12953 076a 2046 mov r0, r4 + 12954 .LVL1161: + 732:Src/main.c **** { + 12955 .loc 1 732 7 is_stmt 1 view .LVU4110 + 732:Src/main.c **** { + 12956 .loc 1 732 12 is_stmt 0 view .LVU4111 + 12957 076c 30F8021B ldrh r1, [r0], #2 + 12958 0770 FFF7FEFF bl AD9102_WriteWaveUploadChunk + 12959 .LVL1162: + 732:Src/main.c **** { + 12960 .loc 1 732 10 discriminator 1 view .LVU4112 + 12961 0774 0028 cmp r0, #0 + 12962 0776 F0D1 bne .L702 + 734:Src/main.c **** State_Data[0] |= AD9102_ERR; + 12963 .loc 1 734 8 is_stmt 1 view .LVU4113 + 12964 0778 FFF7FEFF bl AD9102_CancelWaveUpload + 12965 .LVL1163: + 735:Src/main.c **** } + 12966 .loc 1 735 8 view .LVU4114 + 735:Src/main.c **** } + 12967 .loc 1 735 18 is_stmt 0 view .LVU4115 + 12968 077c 294A ldr r2, .L765+4 + 12969 077e 1378 ldrb r3, [r2] @ zero_extendqisi2 + 735:Src/main.c **** } + 12970 .loc 1 735 22 view .LVU4116 + 12971 0780 63F07F03 orn r3, r3, #127 + 12972 0784 1370 strb r3, [r2] + 12973 0786 E8E7 b .L702 + 12974 .LVL1164: + 12975 .L661: + 735:Src/main.c **** } + 12976 .loc 1 735 22 view .LVU4117 + 12977 .LBE720: + 747:Src/main.c **** { + 12978 .loc 1 747 6 is_stmt 1 view .LVU4118 + 747:Src/main.c **** { + 12979 .loc 1 747 10 is_stmt 0 view .LVU4119 + 12980 0788 2548 ldr r0, .L765 + 12981 078a FFF7FEFF bl CheckChecksum + 12982 .LVL1165: + 747:Src/main.c **** { + 12983 .loc 1 747 9 discriminator 1 view .LVU4120 + 12984 078e 70B9 cbnz r0, .L756 + ARM GAS /tmp/ccLSPxIe.s page 652 - 743:Src/main.c **** - 12552 .loc 1 743 9 is_stmt 1 view .LVU4016 - 743:Src/main.c **** - 12553 .loc 1 743 22 is_stmt 0 view .LVU4017 - 12554 082e 314B ldr r3, .L698+52 - 12555 0830 1F70 strb r7, [r3] - 745:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 12556 .loc 1 745 9 is_stmt 1 view .LVU4018 - 12557 0832 DFF8F880 ldr r8, .L698+108 - 12558 0836 0122 movs r2, #1 - 12559 0838 4FF40071 mov r1, #512 - 12560 083c 4046 mov r0, r8 - 12561 083e FFF7FEFF bl HAL_GPIO_WritePin - 12562 .LVL1121: - 746:Src/main.c **** //* - 12563 .loc 1 746 9 view .LVU4019 - 12564 0842 3A46 mov r2, r7 - 12565 0844 4FF40071 mov r1, #512 - 12566 0848 4046 mov r0, r8 - 12567 084a FFF7FEFF bl HAL_GPIO_WritePin - 12568 .LVL1122: - 748:Src/main.c **** OUT_trigger(trigger_counter); - 12569 .loc 1 748 9 view .LVU4020 - 748:Src/main.c **** OUT_trigger(trigger_counter); - 12570 .loc 1 748 41 is_stmt 0 view .LVU4021 - 12571 084e B4FBF6F3 udiv r3, r4, r6 - 12572 0852 06FB1343 mls r3, r6, r3, r4 - 12573 0856 9BB2 uxth r3, r3 - 748:Src/main.c **** OUT_trigger(trigger_counter); - 12574 .loc 1 748 12 view .LVU4022 - 12575 0858 1BB1 cbz r3, .L692 - 12576 .L648: - 752:Src/main.c **** //*/ - 12577 .loc 1 752 9 is_stmt 1 view .LVU4023 - 12578 085a 0134 adds r4, r4, #1 - 12579 .LVL1123: - 752:Src/main.c **** //*/ - 12580 .loc 1 752 9 is_stmt 0 view .LVU4024 - 12581 085c A4B2 uxth r4, r4 - 12582 .LVL1124: - 752:Src/main.c **** //*/ - 12583 .loc 1 752 9 view .LVU4025 - 12584 085e C4E7 b .L647 - 12585 .LVL1125: - 12586 .L645: - 707:Src/main.c **** - 12587 .loc 1 707 8 is_stmt 1 view .LVU4026 - 707:Src/main.c **** - 12588 .loc 1 707 13 view .LVU4027 - 12589 0860 FEE7 b .L645 - 12590 .LVL1126: - 12591 .L692: - 749:Src/main.c **** ++trigger_counter; - 12592 .loc 1 749 10 view .LVU4028 - 12593 0862 E8B2 uxtb r0, r5 - 12594 0864 FFF7FEFF bl OUT_trigger - 12595 .LVL1127: - ARM GAS /tmp/ccuHnxNu.s page 640 + 756:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 12985 .loc 1 756 7 is_stmt 1 view .LVU4121 + 756:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 12986 .loc 1 756 17 is_stmt 0 view .LVU4122 + 12987 0790 244A ldr r2, .L765+4 + 12988 0792 1378 ldrb r3, [r2] @ zero_extendqisi2 + 756:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 12989 .loc 1 756 21 view .LVU4123 + 12990 0794 43F00403 orr r3, r3, #4 + 12991 0798 1370 strb r3, [r2] + 757:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 12992 .loc 1 757 7 is_stmt 1 view .LVU4124 + 757:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 12993 .loc 1 757 17 is_stmt 0 view .LVU4125 + 12994 079a 254B ldr r3, .L765+16 + 12995 079c 0222 movs r2, #2 + 12996 079e 1A70 strb r2, [r3] + 758:Src/main.c **** } + 12997 .loc 1 758 7 is_stmt 1 view .LVU4126 + 758:Src/main.c **** } + 12998 .loc 1 758 21 is_stmt 0 view .LVU4127 + 12999 07a0 224B ldr r3, .L765+12 + 13000 07a2 0022 movs r2, #0 + 13001 07a4 1A70 strb r2, [r3] + 13002 .L704: + 760:Src/main.c **** break; + 13003 .loc 1 760 6 is_stmt 1 view .LVU4128 + 760:Src/main.c **** break; + 13004 .loc 1 760 32 is_stmt 0 view .LVU4129 + 13005 07a6 204B ldr r3, .L765+8 + 13006 07a8 0122 movs r2, #1 + 13007 07aa 1A70 strb r2, [r3] + 761:Src/main.c **** case RUN_TASK: + 13008 .loc 1 761 5 is_stmt 1 view .LVU4130 + 13009 07ac A9E4 b .L652 + 13010 .L756: + 749:Src/main.c **** TO6_before = TO6; + 13011 .loc 1 749 7 view .LVU4131 + 13012 07ae 224B ldr r3, .L765+24 + 13013 07b0 224A ldr r2, .L765+28 + 13014 07b2 2349 ldr r1, .L765+32 + 13015 07b4 1A48 ldr r0, .L765 + 13016 07b6 FFF7FEFF bl Decode_task + 13017 .LVL1166: + 750:Src/main.c **** CPU_state = RUN_TASK; + 13018 .loc 1 750 7 view .LVU4132 + 750:Src/main.c **** CPU_state = RUN_TASK; + 13019 .loc 1 750 18 is_stmt 0 view .LVU4133 + 13020 07ba 224B ldr r3, .L765+36 + 13021 07bc 1A68 ldr r2, [r3] + 13022 07be 224B ldr r3, .L765+40 + 13023 07c0 1A60 str r2, [r3] + 751:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 13024 .loc 1 751 7 is_stmt 1 view .LVU4134 + 751:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 13025 .loc 1 751 17 is_stmt 0 view .LVU4135 + 13026 07c2 0923 movs r3, #9 + ARM GAS /tmp/ccLSPxIe.s page 653 - 750:Src/main.c **** } - 12596 .loc 1 750 10 view .LVU4029 - 12597 0868 0135 adds r5, r5, #1 - 12598 .LVL1128: - 750:Src/main.c **** } - 12599 .loc 1 750 10 is_stmt 0 view .LVU4030 - 12600 086a ADB2 uxth r5, r5 - 12601 .LVL1129: - 750:Src/main.c **** } - 12602 .loc 1 750 10 view .LVU4031 - 12603 086c F5E7 b .L648 - 12604 .L691: - 777:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 12605 .loc 1 777 7 is_stmt 1 view .LVU4032 - 777:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 12606 .loc 1 777 13 is_stmt 0 view .LVU4033 - 12607 086e 2A4A ldr r2, .L698+88 - 12608 0870 D368 ldr r3, [r2, #12] - 777:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 12609 .loc 1 777 21 view .LVU4034 - 12610 0872 43F00103 orr r3, r3, #1 - 12611 0876 D360 str r3, [r2, #12] - 787:Src/main.c **** - 12612 .loc 1 787 7 is_stmt 1 view .LVU4035 - 12613 0878 FFF7FEFF bl Stop_TIM10 - 12614 .LVL1130: - 789:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 12615 .loc 1 789 7 view .LVU4036 - 789:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 12616 .loc 1 789 32 is_stmt 0 view .LVU4037 - 12617 087c 1A4C ldr r4, .L698+40 - 12618 .LVL1131: - 789:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 12619 .loc 1 789 32 view .LVU4038 - 12620 087e D4ED017A vldr.32 s15, [r4, #4] - 789:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 12621 .loc 1 789 26 view .LVU4039 - 12622 0882 C4ED047A vstr.32 s15, [r4, #16] - 790:Src/main.c **** if (task.tau > 3) - 12623 .loc 1 790 7 is_stmt 1 view .LVU4040 - 12624 0886 FCEEE77A vcvt.u32.f32 s15, s15 - 12625 088a 17EE903A vmov r3, s15 @ int - 12626 088e 99B2 uxth r1, r3 - 12627 0890 0120 movs r0, #1 - 12628 0892 FFF7FEFF bl Set_LTEC - 12629 .LVL1132: - 791:Src/main.c **** { - 12630 .loc 1 791 7 view .LVU4041 - 791:Src/main.c **** { - 12631 .loc 1 791 15 is_stmt 0 view .LVU4042 - 12632 0896 E38A ldrh r3, [r4, #22] - 791:Src/main.c **** { - 12633 .loc 1 791 10 view .LVU4043 - 12634 0898 032B cmp r3, #3 - 12635 089a 0CD9 bls .L650 - 793:Src/main.c **** htim10.Init.Period = 9999; - 12636 .loc 1 793 8 is_stmt 1 view .LVU4044 - ARM GAS /tmp/ccuHnxNu.s page 641 + 13027 07c4 1A4A ldr r2, .L765+16 + 13028 07c6 1370 strb r3, [r2] + 752:Src/main.c **** } + 13029 .loc 1 752 7 is_stmt 1 view .LVU4136 + 752:Src/main.c **** } + 13030 .loc 1 752 21 is_stmt 0 view .LVU4137 + 13031 07c8 184A ldr r2, .L765+12 + 13032 07ca 1370 strb r3, [r2] + 13033 07cc EBE7 b .L704 + 13034 .L660: + 763:Src/main.c **** { + 13035 .loc 1 763 6 is_stmt 1 view .LVU4138 + 763:Src/main.c **** { + 13036 .loc 1 763 18 is_stmt 0 view .LVU4139 + 13037 07ce 1F4B ldr r3, .L765+44 + 13038 07d0 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 13039 07d2 012B cmp r3, #1 + 13040 07d4 4AD0 beq .L705 + 13041 07d6 022B cmp r3, #2 + 13042 07d8 00F02D81 beq .L706 + 13043 .L707: +1018:Src/main.c **** { + 13044 .loc 1 1018 6 is_stmt 1 view .LVU4140 +1018:Src/main.c **** { + 13045 .loc 1 1018 13 is_stmt 0 view .LVU4141 + 13046 07dc 1C4B ldr r3, .L765+48 + 13047 07de 1B68 ldr r3, [r3] + 13048 07e0 1C4A ldr r2, .L765+52 + 13049 07e2 1268 ldr r2, [r2] +1018:Src/main.c **** { + 13050 .loc 1 1018 9 view .LVU4142 + 13051 07e4 9342 cmp r3, r2 + 13052 07e6 00F2FE81 bhi .L757 + 13053 .L724: +1070:Src/main.c **** + 13054 .loc 1 1070 13 is_stmt 1 discriminator 1 view .LVU4143 + 13055 07ea 1B4B ldr r3, .L765+56 + 13056 07ec 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 13057 07ee 002B cmp r3, #0 + 13058 07f0 FBD0 beq .L724 +1072:Src/main.c **** + 13059 .loc 1 1072 6 view .LVU4144 + 13060 07f2 FFF7FEFF bl Stop_TIM10 + 13061 .LVL1167: +1074:Src/main.c **** { + 13062 .loc 1 1074 6 view .LVU4145 +1074:Src/main.c **** { + 13063 .loc 1 1074 14 is_stmt 0 view .LVU4146 + 13064 07f6 154B ldr r3, .L765+44 + 13065 07f8 DB8A ldrh r3, [r3, #22] +1074:Src/main.c **** { + 13066 .loc 1 1074 9 view .LVU4147 + 13067 07fa 032B cmp r3, #3 + 13068 07fc 0BD9 bls .L725 +1076:Src/main.c **** TO10_counter = task.dt / 10; + 13069 .loc 1 1076 7 is_stmt 1 view .LVU4148 +1076:Src/main.c **** TO10_counter = task.dt / 10; + ARM GAS /tmp/ccLSPxIe.s page 654 - 793:Src/main.c **** htim10.Init.Period = 9999; - 12637 .loc 1 793 34 is_stmt 0 view .LVU4045 - 12638 089c 174A ldr r2, .L698+60 - 12639 089e D068 ldr r0, [r2, #12] - 793:Src/main.c **** htim10.Init.Period = 9999; - 12640 .loc 1 793 21 view .LVU4046 - 12641 08a0 1549 ldr r1, .L698+56 - 12642 08a2 0860 str r0, [r1] - 794:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 12643 .loc 1 794 8 is_stmt 1 view .LVU4047 - 794:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 12644 .loc 1 794 27 is_stmt 0 view .LVU4048 - 12645 08a4 42F20F71 movw r1, #9999 - 12646 08a8 D160 str r1, [r2, #12] - 795:Src/main.c **** } - 12647 .loc 1 795 8 is_stmt 1 view .LVU4049 - 795:Src/main.c **** } - 12648 .loc 1 795 33 is_stmt 0 view .LVU4050 - 12649 08aa 013B subs r3, r3, #1 - 795:Src/main.c **** } - 12650 .loc 1 795 38 view .LVU4051 - 12651 08ac 6422 movs r2, #100 - 12652 08ae 02FB03F3 mul r3, r2, r3 - 795:Src/main.c **** } - 12653 .loc 1 795 21 view .LVU4052 - 12654 08b2 144A ldr r2, .L698+68 - 12655 08b4 1360 str r3, [r2] - 12656 .L650: - 797:Src/main.c **** break; - 12657 .loc 1 797 7 is_stmt 1 view .LVU4053 - 12658 08b6 1148 ldr r0, .L698+60 - 12659 08b8 FFF7FEFF bl HAL_TIM_Base_Start_IT - 12660 .LVL1133: - 798:Src/main.c **** case TT_CHANGE_CURR_2: - 12661 .loc 1 798 6 view .LVU4054 - 12662 08bc F9E6 b .L643 - 12663 .L699: - 12664 08be 00BF .align 2 - 12665 .L698: - 12666 08c0 00000000 .word COMMAND - 12667 08c4 00000000 .word State_Data - 12668 08c8 00000000 .word UART_transmission_request - 12669 08cc 00000000 .word CPU_state_old - 12670 08d0 00000000 .word CPU_state - 12671 08d4 00000000 .word Curr_setup - 12672 08d8 00000000 .word LD2_curr_setup - 12673 08dc 00000000 .word LD1_curr_setup - 12674 08e0 00000000 .word TO6 - 12675 08e4 00000000 .word TO6_before - 12676 08e8 00000000 .word task - 12677 08ec 00000000 .word TO7 - 12678 08f0 00000000 .word TO7_before - 12679 08f4 00000000 .word TIM10_coflag - 12680 08f8 00000000 .word TIM10_period - 12681 08fc 00000000 .word htim10 - 12682 0900 CDCCCCCC .word -858993459 - 12683 0904 00000000 .word TO10_counter - ARM GAS /tmp/ccuHnxNu.s page 642 + 13070 .loc 1 1076 26 is_stmt 0 view .LVU4149 + 13071 07fe 174B ldr r3, .L765+60 + 13072 0800 1A68 ldr r2, [r3] + 13073 0802 174B ldr r3, .L765+64 + 13074 0804 DA60 str r2, [r3, #12] +1077:Src/main.c **** } + 13075 .loc 1 1077 7 is_stmt 1 view .LVU4150 +1077:Src/main.c **** } + 13076 .loc 1 1077 26 is_stmt 0 view .LVU4151 + 13077 0806 114B ldr r3, .L765+44 + 13078 0808 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 +1077:Src/main.c **** } + 13079 .loc 1 1077 30 view .LVU4152 + 13080 080a 164A ldr r2, .L765+68 + 13081 080c A2FB0323 umull r2, r3, r2, r3 + 13082 0810 DB08 lsrs r3, r3, #3 +1077:Src/main.c **** } + 13083 .loc 1 1077 20 view .LVU4153 + 13084 0812 154A ldr r2, .L765+72 + 13085 0814 1360 str r3, [r2] + 13086 .L725: +1080:Src/main.c **** break; + 13087 .loc 1 1080 6 is_stmt 1 view .LVU4154 +1080:Src/main.c **** break; + 13088 .loc 1 1080 20 is_stmt 0 view .LVU4155 + 13089 0816 054B ldr r3, .L765+12 + 13090 0818 0922 movs r2, #9 + 13091 081a 1A70 strb r2, [r3] +1081:Src/main.c **** } + 13092 .loc 1 1081 9 is_stmt 1 view .LVU4156 + 13093 081c 71E4 b .L652 + 13094 .L766: + 13095 081e 00BF .align 2 + 13096 .L765: + 13097 0820 00000000 .word COMMAND + 13098 0824 00000000 .word State_Data + 13099 0828 00000000 .word UART_transmission_request + 13100 082c 00000000 .word CPU_state_old + 13101 0830 00000000 .word CPU_state + 13102 0834 00000000 .word ad9102_wave_expected_samples + 13103 0838 00000000 .word Curr_setup + 13104 083c 00000000 .word LD2_curr_setup + 13105 0840 00000000 .word LD1_curr_setup + 13106 0844 00000000 .word TO6 + 13107 0848 00000000 .word TO6_before + 13108 084c 00000000 .word task + 13109 0850 00000000 .word TO7 + 13110 0854 00000000 .word TO7_before + 13111 0858 00000000 .word TIM10_coflag + 13112 085c 00000000 .word TIM10_period + 13113 0860 00000000 .word htim10 + 13114 0864 CDCCCCCC .word -858993459 + 13115 0868 00000000 .word TO10_counter + 13116 .L705: + 13117 .LBB721: + 785:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 13118 .loc 1 785 7 view .LVU4157 + ARM GAS /tmp/ccLSPxIe.s page 655 - 12684 0908 00000000 .word LD1_param - 12685 090c 00000000 .word LD2_param - 12686 0910 00000000 .word temp16 - 12687 0914 000C0240 .word 1073875968 - 12688 0918 00480140 .word 1073825792 - 12689 091c 00080040 .word 1073743872 - 12690 0920 00000000 .word TO10 - 12691 0924 00000000 .word htim11 - 12692 0928 00000000 .word htim4 - 12693 092c 00180240 .word 1073879040 - 12694 .LVL1134: - 12695 .L642: - 802:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12696 .loc 1 802 7 view .LVU4055 - 802:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12697 .loc 1 802 38 is_stmt 0 view .LVU4056 - 12698 0930 A74B ldr r3, .L700 - 12699 0932 D3ED077A vldr.32 s15, [r3, #28] - 802:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 12700 .loc 1 802 7 view .LVU4057 - 12701 0936 FCEEE77A vcvt.u32.f32 s15, s15 - 12702 093a 17EE903A vmov r3, s15 @ int - 12703 093e 99B2 uxth r1, r3 - 12704 0940 0120 movs r0, #1 - 12705 0942 FFF7FEFF bl Set_LTEC - 12706 .LVL1135: - 803:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 12707 .loc 1 803 7 is_stmt 1 view .LVU4058 - 803:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 12708 .loc 1 803 14 is_stmt 0 view .LVU4059 - 12709 0946 0320 movs r0, #3 - 12710 0948 FFF7FEFF bl MPhD_T - 12711 .LVL1136: - 804:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12712 .loc 1 804 7 is_stmt 1 view .LVU4060 - 804:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12713 .loc 1 804 32 is_stmt 0 view .LVU4061 - 12714 094c 0320 movs r0, #3 - 12715 094e FFF7FEFF bl MPhD_T - 12716 .LVL1137: - 804:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 12717 .loc 1 804 30 discriminator 1 view .LVU4062 - 12718 0952 A04C ldr r4, .L700+4 - 12719 0954 2080 strh r0, [r4] @ movhi - 805:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 12720 .loc 1 805 7 is_stmt 1 view .LVU4063 - 805:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 12721 .loc 1 805 14 is_stmt 0 view .LVU4064 - 12722 0956 0420 movs r0, #4 - 12723 0958 FFF7FEFF bl MPhD_T - 12724 .LVL1138: - 806:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12725 .loc 1 806 7 is_stmt 1 view .LVU4065 - 806:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12726 .loc 1 806 32 is_stmt 0 view .LVU4066 - 12727 095c 0420 movs r0, #4 - 12728 095e FFF7FEFF bl MPhD_T - ARM GAS /tmp/ccuHnxNu.s page 643 + 785:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 13119 .loc 1 785 38 is_stmt 0 view .LVU4158 + 13120 086c AD4B ldr r3, .L767 + 13121 086e D3ED077A vldr.32 s15, [r3, #28] + 785:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 13122 .loc 1 785 7 view .LVU4159 + 13123 0872 FCEEE77A vcvt.u32.f32 s15, s15 + 13124 0876 17EE903A vmov r3, s15 @ int + 13125 087a 99B2 uxth r1, r3 + 13126 087c 0220 movs r0, #2 + 13127 087e FFF7FEFF bl Set_LTEC + 13128 .LVL1168: + 786:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 13129 .loc 1 786 7 is_stmt 1 view .LVU4160 + 786:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 13130 .loc 1 786 14 is_stmt 0 view .LVU4161 + 13131 0882 0320 movs r0, #3 + 13132 0884 FFF7FEFF bl MPhD_T + 13133 .LVL1169: + 787:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 13134 .loc 1 787 7 is_stmt 1 view .LVU4162 + 787:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 13135 .loc 1 787 32 is_stmt 0 view .LVU4163 + 13136 0888 0320 movs r0, #3 + 13137 088a FFF7FEFF bl MPhD_T + 13138 .LVL1170: + 787:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 13139 .loc 1 787 30 discriminator 1 view .LVU4164 + 13140 088e A64C ldr r4, .L767+4 + 13141 0890 2080 strh r0, [r4] @ movhi + 788:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 13142 .loc 1 788 7 is_stmt 1 view .LVU4165 + 788:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 13143 .loc 1 788 14 is_stmt 0 view .LVU4166 + 13144 0892 0420 movs r0, #4 + 13145 0894 FFF7FEFF bl MPhD_T + 13146 .LVL1171: + 789:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 13147 .loc 1 789 7 is_stmt 1 view .LVU4167 + 789:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 13148 .loc 1 789 32 is_stmt 0 view .LVU4168 + 13149 0898 0420 movs r0, #4 + 13150 089a FFF7FEFF bl MPhD_T + 13151 .LVL1172: + 789:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 13152 .loc 1 789 30 discriminator 1 view .LVU4169 + 13153 089e A34D ldr r5, .L767+8 + 13154 08a0 2880 strh r0, [r5] @ movhi + 790:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 13155 .loc 1 790 7 is_stmt 1 view .LVU4170 + 790:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 13156 .loc 1 790 14 is_stmt 0 view .LVU4171 + 13157 08a2 0122 movs r2, #1 + 13158 08a4 2146 mov r1, r4 + 13159 08a6 A248 ldr r0, .L767+12 + 13160 08a8 FFF7FEFF bl PID_Controller_Temp + 13161 .LVL1173: + ARM GAS /tmp/ccLSPxIe.s page 656 - 12729 .LVL1139: - 806:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 12730 .loc 1 806 30 discriminator 1 view .LVU4067 - 12731 0962 9D4D ldr r5, .L700+8 - 12732 0964 2880 strh r0, [r5] @ movhi - 807:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12733 .loc 1 807 7 is_stmt 1 view .LVU4068 - 807:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12734 .loc 1 807 14 is_stmt 0 view .LVU4069 - 12735 0966 0122 movs r2, #1 - 12736 0968 2146 mov r1, r4 - 12737 096a 9C48 ldr r0, .L700+12 - 12738 096c FFF7FEFF bl PID_Controller_Temp - 12739 .LVL1140: - 12740 0970 0146 mov r1, r0 - 807:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 12741 .loc 1 807 13 discriminator 1 view .LVU4070 - 12742 0972 9B4C ldr r4, .L700+16 - 12743 0974 2080 strh r0, [r4] @ movhi - 808:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 12744 .loc 1 808 7 is_stmt 1 view .LVU4071 - 12745 0976 0320 movs r0, #3 - 12746 0978 FFF7FEFF bl Set_LTEC - 12747 .LVL1141: - 809:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12748 .loc 1 809 7 view .LVU4072 - 809:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12749 .loc 1 809 14 is_stmt 0 view .LVU4073 - 12750 097c 0222 movs r2, #2 - 12751 097e 2946 mov r1, r5 - 12752 0980 9848 ldr r0, .L700+20 - 12753 0982 FFF7FEFF bl PID_Controller_Temp - 12754 .LVL1142: - 12755 0986 0146 mov r1, r0 - 809:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 12756 .loc 1 809 13 discriminator 1 view .LVU4074 - 12757 0988 2080 strh r0, [r4] @ movhi - 810:Src/main.c **** - 12758 .loc 1 810 7 is_stmt 1 view .LVU4075 - 12759 098a 0420 movs r0, #4 - 12760 098c FFF7FEFF bl Set_LTEC - 12761 .LVL1143: - 812:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 12762 .loc 1 812 7 view .LVU4076 - 812:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 12763 .loc 1 812 28 is_stmt 0 view .LVU4077 - 12764 0990 954B ldr r3, .L700+24 - 12765 0992 0222 movs r2, #2 - 12766 0994 1A70 strb r2, [r3] - 813:Src/main.c **** //LD_blinker.param = task.current_param; - 12767 .loc 1 813 7 is_stmt 1 view .LVU4078 - 813:Src/main.c **** //LD_blinker.param = task.current_param; - 12768 .loc 1 813 24 is_stmt 0 view .LVU4079 - 12769 0996 0022 movs r2, #0 - 12770 0998 9A72 strb r2, [r3, #10] - 815:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 12771 .loc 1 815 7 is_stmt 1 view .LVU4080 - ARM GAS /tmp/ccuHnxNu.s page 644 + 13162 08ac 0146 mov r1, r0 + 790:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 13163 .loc 1 790 13 discriminator 1 view .LVU4172 + 13164 08ae A14C ldr r4, .L767+16 + 13165 08b0 2080 strh r0, [r4] @ movhi + 791:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 13166 .loc 1 791 7 is_stmt 1 view .LVU4173 + 13167 08b2 0320 movs r0, #3 + 13168 08b4 FFF7FEFF bl Set_LTEC + 13169 .LVL1174: + 792:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 13170 .loc 1 792 7 view .LVU4174 + 792:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 13171 .loc 1 792 14 is_stmt 0 view .LVU4175 + 13172 08b8 0222 movs r2, #2 + 13173 08ba 2946 mov r1, r5 + 13174 08bc 9E48 ldr r0, .L767+20 + 13175 08be FFF7FEFF bl PID_Controller_Temp + 13176 .LVL1175: + 13177 08c2 0146 mov r1, r0 + 792:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 13178 .loc 1 792 13 discriminator 1 view .LVU4176 + 13179 08c4 2080 strh r0, [r4] @ movhi + 793:Src/main.c **** + 13180 .loc 1 793 7 is_stmt 1 view .LVU4177 + 13181 08c6 0420 movs r0, #4 + 13182 08c8 FFF7FEFF bl Set_LTEC + 13183 .LVL1176: + 796:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 13184 .loc 1 796 7 view .LVU4178 + 13185 08cc 9B4C ldr r4, .L767+24 + 13186 08ce 0122 movs r2, #1 + 13187 08d0 8021 movs r1, #128 + 13188 08d2 2046 mov r0, r4 + 13189 08d4 FFF7FEFF bl HAL_GPIO_WritePin + 13190 .LVL1177: + 797:Src/main.c **** + 13191 .loc 1 797 7 view .LVU4179 + 13192 08d8 0022 movs r2, #0 + 13193 08da 8021 movs r1, #128 + 13194 08dc 2046 mov r0, r4 + 13195 08de FFF7FEFF bl HAL_GPIO_WritePin + 13196 .LVL1178: + 799:Src/main.c **** if (st != HAL_OK) + 13197 .loc 1 799 7 view .LVU4180 + 799:Src/main.c **** if (st != HAL_OK) + 13198 .loc 1 799 12 is_stmt 0 view .LVU4181 + 13199 08e2 9748 ldr r0, .L767+28 + 13200 08e4 FFF7FEFF bl HAL_TIM_Base_Start_IT + 13201 .LVL1179: + 800:Src/main.c **** while(1); + 13202 .loc 1 800 7 is_stmt 1 view .LVU4182 + 800:Src/main.c **** while(1); + 13203 .loc 1 800 10 is_stmt 0 view .LVU4183 + 13204 08e8 0028 cmp r0, #0 + 13205 08ea 75D1 bne .L709 + 803:Src/main.c **** uint16_t trigger_counter = 0; + ARM GAS /tmp/ccLSPxIe.s page 657 - 815:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 12772 .loc 1 815 24 is_stmt 0 view .LVU4081 - 12773 099a 1A81 strh r2, [r3, #8] @ movhi - 816:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 12774 .loc 1 816 7 is_stmt 1 view .LVU4082 - 816:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 12775 .loc 1 816 24 is_stmt 0 view .LVU4083 - 12776 099c 4FF47A72 mov r2, #1000 - 12777 09a0 1A81 strh r2, [r3, #8] @ movhi - 817:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 12778 .loc 1 817 7 is_stmt 1 view .LVU4084 - 817:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 12779 .loc 1 817 30 is_stmt 0 view .LVU4085 - 12780 09a2 924A ldr r2, .L700+28 - 12781 09a4 5A60 str r2, [r3, #4] + 13206 .loc 1 803 7 is_stmt 1 view .LVU4184 + 13207 .LVL1180: + 804:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 13208 .loc 1 804 7 view .LVU4185 + 805:Src/main.c **** uint16_t task_sheduler = 0; + 13209 .loc 1 805 7 view .LVU4186 + 805:Src/main.c **** uint16_t task_sheduler = 0; + 13210 .loc 1 805 47 is_stmt 0 view .LVU4187 + 13211 08ec 8D4B ldr r3, .L767 + 13212 08ee 93ED027A vldr.32 s14, [r3, #8] + 805:Src/main.c **** uint16_t task_sheduler = 0; + 13213 .loc 1 805 64 view .LVU4188 + 13214 08f2 D3ED047A vldr.32 s15, [r3, #16] + 805:Src/main.c **** uint16_t task_sheduler = 0; + 13215 .loc 1 805 58 view .LVU4189 + 13216 08f6 37EE677A vsub.f32 s14, s14, s15 + 805:Src/main.c **** uint16_t task_sheduler = 0; + 13217 .loc 1 805 84 view .LVU4190 + 13218 08fa D3ED036A vldr.32 s13, [r3, #12] + 805:Src/main.c **** uint16_t task_sheduler = 0; + 13219 .loc 1 805 79 view .LVU4191 + 13220 08fe C7EE267A vdiv.f32 s15, s14, s13 + 805:Src/main.c **** uint16_t task_sheduler = 0; + 13221 .loc 1 805 97 view .LVU4192 + 13222 0902 B2EE047A vmov.f32 s14, #1.0e+1 + 13223 0906 67EE877A vmul.f32 s15, s15, s14 + 805:Src/main.c **** uint16_t task_sheduler = 0; + 13224 .loc 1 805 31 view .LVU4193 + 13225 090a FCEEE77A vcvt.u32.f32 s15, s15 + 13226 090e CDED037A vstr.32 s15, [sp, #12] @ int + 13227 0912 9DF80C60 ldrb r6, [sp, #12] @ zero_extendqisi2 + 13228 .LVL1181: + 806:Src/main.c **** + 13229 .loc 1 806 7 is_stmt 1 view .LVU4194 + 810:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 13230 .loc 1 810 7 view .LVU4195 + 13231 0916 DFF85492 ldr r9, .L767+72 + 13232 091a 0021 movs r1, #0 + 13233 091c 4846 mov r0, r9 + 13234 .LVL1182: + 810:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 13235 .loc 1 810 7 is_stmt 0 view .LVU4196 + 13236 091e FFF7FEFF bl HAL_TIM_PWM_Stop + 13237 .LVL1183: + 811:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 13238 .loc 1 811 7 is_stmt 1 view .LVU4197 + 13239 0922 DFF84C82 ldr r8, .L767+76 + 13240 0926 0821 movs r1, #8 + 13241 0928 4046 mov r0, r8 + 13242 092a FFF7FEFF bl HAL_TIM_PWM_Stop + 13243 .LVL1184: + 812:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 13244 .loc 1 812 7 view .LVU4198 + 812:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 13245 .loc 1 812 13 is_stmt 0 view .LVU4199 + 13246 092e 854F ldr r7, .L767+32 + 13247 0930 3B68 ldr r3, [r7] + ARM GAS /tmp/ccLSPxIe.s page 658 + + + 812:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 13248 .loc 1 812 20 view .LVU4200 + 13249 0932 23F00803 bic r3, r3, #8 + 13250 0936 3B60 str r3, [r7] + 813:Src/main.c **** + 13251 .loc 1 813 7 is_stmt 1 view .LVU4201 + 813:Src/main.c **** + 13252 .loc 1 813 12 is_stmt 0 view .LVU4202 + 13253 0938 834D ldr r5, .L767+36 + 13254 093a 2B68 ldr r3, [r5] + 813:Src/main.c **** + 13255 .loc 1 813 19 view .LVU4203 + 13256 093c 23F00803 bic r3, r3, #8 + 13257 0940 2B60 str r3, [r5] + 817:Src/main.c **** TIM4 -> CNT = 0; + 13258 .loc 1 817 7 is_stmt 1 view .LVU4204 + 817:Src/main.c **** TIM4 -> CNT = 0; + 13259 .loc 1 817 20 is_stmt 0 view .LVU4205 + 13260 0942 0024 movs r4, #0 + 13261 0944 7C62 str r4, [r7, #36] 818:Src/main.c **** - 12782 .loc 1 818 7 is_stmt 1 view .LVU4086 + 13262 .loc 1 818 7 is_stmt 1 view .LVU4206 818:Src/main.c **** - 12783 .loc 1 818 29 is_stmt 0 view .LVU4087 - 12784 09a6 8022 movs r2, #128 - 12785 09a8 5A80 strh r2, [r3, #2] @ movhi - 820:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 12786 .loc 1 820 7 is_stmt 1 view .LVU4088 - 820:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 12787 .loc 1 820 17 is_stmt 0 view .LVU4089 - 12788 09aa 914B ldr r3, .L700+32 - 12789 09ac 42F21072 movw r2, #10000 - 12790 09b0 DA62 str r2, [r3, #44] - 822:Src/main.c **** if (st != HAL_OK) - 12791 .loc 1 822 7 is_stmt 1 view .LVU4090 - 822:Src/main.c **** if (st != HAL_OK) - 12792 .loc 1 822 12 is_stmt 0 view .LVU4091 - 12793 09b2 9048 ldr r0, .L700+36 - 12794 09b4 FFF7FEFF bl HAL_TIM_Base_Start_IT - 12795 .LVL1144: - 823:Src/main.c **** while(1); - 12796 .loc 1 823 7 is_stmt 1 view .LVU4092 - 823:Src/main.c **** while(1); - 12797 .loc 1 823 10 is_stmt 0 view .LVU4093 - 12798 09b8 78BB cbnz r0, .L652 - 828:Src/main.c **** uint32_t i = 10000; while (--i){} - 12799 .loc 1 828 7 is_stmt 1 view .LVU4094 - 12800 09ba 0122 movs r2, #1 - 12801 09bc 8021 movs r1, #128 - 12802 09be 8E48 ldr r0, .L700+40 - 12803 .LVL1145: - 828:Src/main.c **** uint32_t i = 10000; while (--i){} - 12804 .loc 1 828 7 is_stmt 0 view .LVU4095 - 12805 09c0 FFF7FEFF bl HAL_GPIO_WritePin - 12806 .LVL1146: - 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12807 .loc 1 829 7 is_stmt 1 view .LVU4096 - 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12808 .loc 1 829 27 view .LVU4097 - 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12809 .loc 1 829 16 is_stmt 0 view .LVU4098 - 12810 09c4 42F21073 movw r3, #10000 - ARM GAS /tmp/ccuHnxNu.s page 645 + 13263 .loc 1 818 19 is_stmt 0 view .LVU4207 + 13264 0946 6C62 str r4, [r5, #36] + 820:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 13265 .loc 1 820 7 is_stmt 1 view .LVU4208 + 13266 0948 2146 mov r1, r4 + 13267 094a 4846 mov r0, r9 + 13268 094c FFF7FEFF bl HAL_TIM_PWM_Start + 13269 .LVL1185: + 821:Src/main.c **** //TIM4 -> CNT = 0; + 13270 .loc 1 821 7 view .LVU4209 + 13271 0950 0821 movs r1, #8 + 13272 0952 4046 mov r0, r8 + 13273 0954 FFF7FEFF bl HAL_TIM_PWM_Start + 13274 .LVL1186: + 824:Src/main.c **** TIM11 -> CNT = 0; + 13275 .loc 1 824 7 view .LVU4210 + 824:Src/main.c **** TIM11 -> CNT = 0; + 13276 .loc 1 824 26 is_stmt 0 view .LVU4211 + 13277 0958 EB6A ldr r3, [r5, #44] + 824:Src/main.c **** TIM11 -> CNT = 0; + 13278 .loc 1 824 33 view .LVU4212 + 13279 095a 143B subs r3, r3, #20 + 824:Src/main.c **** TIM11 -> CNT = 0; + 13280 .loc 1 824 19 view .LVU4213 + 13281 095c 6B62 str r3, [r5, #36] + 825:Src/main.c **** + 13282 .loc 1 825 7 is_stmt 1 view .LVU4214 + 825:Src/main.c **** + 13283 .loc 1 825 20 is_stmt 0 view .LVU4215 + 13284 095e 7C62 str r4, [r7, #36] + 828:Src/main.c **** { + 13285 .loc 1 828 7 is_stmt 1 view .LVU4216 + 804:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 13286 .loc 1 804 16 is_stmt 0 view .LVU4217 + ARM GAS /tmp/ccLSPxIe.s page 659 - 12811 .LVL1147: - 12812 .L653: - 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12813 .loc 1 829 39 is_stmt 1 discriminator 2 view .LVU4099 - 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12814 .loc 1 829 34 discriminator 2 view .LVU4100 - 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12815 .loc 1 829 34 is_stmt 0 discriminator 2 view .LVU4101 - 12816 09c8 013B subs r3, r3, #1 - 12817 .LVL1148: - 829:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 12818 .loc 1 829 34 discriminator 2 view .LVU4102 - 12819 09ca FDD1 bne .L653 - 830:Src/main.c **** LD_blinker.state = 2; - 12820 .loc 1 830 7 is_stmt 1 view .LVU4103 - 12821 09cc 0022 movs r2, #0 - 12822 09ce 8021 movs r1, #128 - 12823 09d0 8948 ldr r0, .L700+40 - 12824 09d2 FFF7FEFF bl HAL_GPIO_WritePin - 12825 .LVL1149: - 831:Src/main.c **** - 12826 .loc 1 831 7 view .LVU4104 - 831:Src/main.c **** - 12827 .loc 1 831 24 is_stmt 0 view .LVU4105 - 12828 09d6 844B ldr r3, .L700+24 - 12829 09d8 0222 movs r2, #2 - 12830 09da 9A72 strb r2, [r3, #10] - 833:Src/main.c **** if (st != HAL_OK) - 12831 .loc 1 833 7 is_stmt 1 view .LVU4106 - 833:Src/main.c **** if (st != HAL_OK) - 12832 .loc 1 833 12 is_stmt 0 view .LVU4107 - 12833 09dc 8748 ldr r0, .L700+44 - 12834 09de FFF7FEFF bl HAL_TIM_Base_Start_IT - 12835 .LVL1150: - 834:Src/main.c **** while(1); - 12836 .loc 1 834 7 is_stmt 1 view .LVU4108 - 834:Src/main.c **** while(1); - 12837 .loc 1 834 10 is_stmt 0 view .LVU4109 - 12838 09e2 D8B9 cbnz r0, .L655 - 12839 .L656: - 836:Src/main.c **** { - 12840 .loc 1 836 33 is_stmt 1 view .LVU4110 - 836:Src/main.c **** { - 12841 .loc 1 836 18 is_stmt 0 view .LVU4111 - 12842 09e4 7A4B ldr r3, .L700 - 12843 09e6 D3ED047A vldr.32 s15, [r3, #16] - 836:Src/main.c **** { - 12844 .loc 1 836 39 view .LVU4112 - 12845 09ea 93ED027A vldr.32 s14, [r3, #8] - 836:Src/main.c **** { - 12846 .loc 1 836 33 view .LVU4113 - 12847 09ee F4EEC77A vcmpe.f32 s15, s14 - 12848 09f2 F1EE10FA vmrs APSR_nzcv, FPSCR - 12849 09f6 12D5 bpl .L693 - 838:Src/main.c **** { - 12850 .loc 1 838 8 is_stmt 1 view .LVU4114 - 838:Src/main.c **** { - ARM GAS /tmp/ccuHnxNu.s page 646 + 13287 0960 2546 mov r5, r4 + 13288 .LVL1187: + 13289 .L711: + 828:Src/main.c **** { + 13290 .loc 1 828 33 is_stmt 1 view .LVU4218 + 828:Src/main.c **** { + 13291 .loc 1 828 18 is_stmt 0 view .LVU4219 + 13292 0962 704B ldr r3, .L767 + 13293 0964 D3ED047A vldr.32 s15, [r3, #16] + 828:Src/main.c **** { + 13294 .loc 1 828 39 view .LVU4220 + 13295 0968 93ED027A vldr.32 s14, [r3, #8] + 828:Src/main.c **** { + 13296 .loc 1 828 33 view .LVU4221 + 13297 096c F4EEC77A vcmpe.f32 s15, s14 + 13298 0970 F1EE10FA vmrs APSR_nzcv, FPSCR + 13299 0974 37D5 bpl .L758 + 830:Src/main.c **** { + 13300 .loc 1 830 8 is_stmt 1 view .LVU4222 + 830:Src/main.c **** { + 13301 .loc 1 830 12 is_stmt 0 view .LVU4223 + 13302 0976 754B ldr r3, .L767+40 + 13303 0978 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 830:Src/main.c **** { + 13304 .loc 1 830 11 view .LVU4224 + 13305 097a 002B cmp r3, #0 + 13306 097c F1D0 beq .L711 + 832:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 13307 .loc 1 832 9 is_stmt 1 view .LVU4225 + 13308 097e FCEEE77A vcvt.u32.f32 s15, s15 + 13309 0982 17EE903A vmov r3, s15 @ int + 13310 0986 99B2 uxth r1, r3 + 13311 0988 0120 movs r0, #1 + 13312 098a FFF7FEFF bl Set_LTEC + 13313 .LVL1188: + 835:Src/main.c **** TO10 = 0; + 13314 .loc 1 835 9 view .LVU4226 + 835:Src/main.c **** TO10 = 0; + 13315 .loc 1 835 13 is_stmt 0 view .LVU4227 + 13316 098e 654B ldr r3, .L767 + 13317 0990 D3ED047A vldr.32 s15, [r3, #16] + 835:Src/main.c **** TO10 = 0; + 13318 .loc 1 835 35 view .LVU4228 + 13319 0994 93ED037A vldr.32 s14, [r3, #12] + 835:Src/main.c **** TO10 = 0; + 13320 .loc 1 835 28 view .LVU4229 + 13321 0998 77EE877A vadd.f32 s15, s15, s14 + 13322 099c C3ED047A vstr.32 s15, [r3, #16] + 836:Src/main.c **** TIM10_coflag = 0; + 13323 .loc 1 836 9 is_stmt 1 view .LVU4230 + 836:Src/main.c **** TIM10_coflag = 0; + 13324 .loc 1 836 14 is_stmt 0 view .LVU4231 + 13325 09a0 0027 movs r7, #0 + 13326 09a2 6B4B ldr r3, .L767+44 + 13327 09a4 1F60 str r7, [r3] + 837:Src/main.c **** + 13328 .loc 1 837 9 is_stmt 1 view .LVU4232 + ARM GAS /tmp/ccLSPxIe.s page 660 - 12851 .loc 1 838 12 is_stmt 0 view .LVU4115 - 12852 09f8 814B ldr r3, .L700+48 - 12853 09fa 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 838:Src/main.c **** { - 12854 .loc 1 838 11 view .LVU4116 - 12855 09fc 002B cmp r3, #0 - 12856 09fe F1D0 beq .L656 - 843:Src/main.c **** TO10 = 0; - 12857 .loc 1 843 9 is_stmt 1 view .LVU4117 - 843:Src/main.c **** TO10 = 0; - 12858 .loc 1 843 35 is_stmt 0 view .LVU4118 - 12859 0a00 734B ldr r3, .L700 - 12860 0a02 93ED037A vldr.32 s14, [r3, #12] - 843:Src/main.c **** TO10 = 0; - 12861 .loc 1 843 28 view .LVU4119 - 12862 0a06 77EE277A vadd.f32 s15, s14, s15 - 12863 0a0a C3ED047A vstr.32 s15, [r3, #16] - 844:Src/main.c **** TIM10_coflag = 0; - 12864 .loc 1 844 9 is_stmt 1 view .LVU4120 - 844:Src/main.c **** TIM10_coflag = 0; - 12865 .loc 1 844 14 is_stmt 0 view .LVU4121 - 12866 0a0e 0023 movs r3, #0 - 12867 0a10 7C4A ldr r2, .L700+52 - 12868 0a12 1360 str r3, [r2] - 845:Src/main.c **** - 12869 .loc 1 845 9 is_stmt 1 view .LVU4122 - 845:Src/main.c **** - 12870 .loc 1 845 22 is_stmt 0 view .LVU4123 - 12871 0a14 7A4A ldr r2, .L700+48 - 12872 0a16 1370 strb r3, [r2] - 12873 0a18 E4E7 b .L656 - 12874 .LVL1151: - 12875 .L652: - 824:Src/main.c **** // */ - 12876 .loc 1 824 8 is_stmt 1 view .LVU4124 - 824:Src/main.c **** // */ - 12877 .loc 1 824 13 view .LVU4125 - 12878 0a1a FEE7 b .L652 - 12879 .LVL1152: - 12880 .L655: - 835:Src/main.c **** while (task.current_param < task.max_param) - 12881 .loc 1 835 8 view .LVU4126 - 835:Src/main.c **** while (task.current_param < task.max_param) - 12882 .loc 1 835 13 view .LVU4127 - 12883 0a1c FEE7 b .L655 - 12884 .L693: - 850:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 12885 .loc 1 850 7 view .LVU4128 - 12886 0a1e 7748 ldr r0, .L700+44 - 12887 .LVL1153: - 850:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 12888 .loc 1 850 7 is_stmt 0 view .LVU4129 - 12889 0a20 FFF7FEFF bl HAL_TIM_Base_Stop - 12890 .LVL1154: - 851:Src/main.c **** - 12891 .loc 1 851 7 is_stmt 1 view .LVU4130 - 12892 0a24 744C ldr r4, .L700+40 - ARM GAS /tmp/ccuHnxNu.s page 647 + 837:Src/main.c **** + 13329 .loc 1 837 22 is_stmt 0 view .LVU4233 + 13330 09a6 694B ldr r3, .L767+40 + 13331 09a8 1F70 strb r7, [r3] + 839:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 13332 .loc 1 839 9 is_stmt 1 view .LVU4234 + 13333 09aa DFF8C881 ldr r8, .L767+80 + 13334 09ae 0122 movs r2, #1 + 13335 09b0 4FF40071 mov r1, #512 + 13336 09b4 4046 mov r0, r8 + 13337 09b6 FFF7FEFF bl HAL_GPIO_WritePin + 13338 .LVL1189: + 840:Src/main.c **** //* + 13339 .loc 1 840 9 view .LVU4235 + 13340 09ba 3A46 mov r2, r7 + 13341 09bc 4FF40071 mov r1, #512 + 13342 09c0 4046 mov r0, r8 + 13343 09c2 FFF7FEFF bl HAL_GPIO_WritePin + 13344 .LVL1190: + 842:Src/main.c **** OUT_trigger(trigger_counter); + 13345 .loc 1 842 9 view .LVU4236 + 842:Src/main.c **** OUT_trigger(trigger_counter); + 13346 .loc 1 842 41 is_stmt 0 view .LVU4237 + 13347 09c6 B4FBF6F3 udiv r3, r4, r6 + 13348 09ca 06FB1343 mls r3, r6, r3, r4 + 13349 09ce 9BB2 uxth r3, r3 + 842:Src/main.c **** OUT_trigger(trigger_counter); + 13350 .loc 1 842 12 view .LVU4238 + 13351 09d0 1BB1 cbz r3, .L759 + 13352 .L712: + 846:Src/main.c **** //*/ + 13353 .loc 1 846 9 is_stmt 1 view .LVU4239 + 13354 09d2 0134 adds r4, r4, #1 + 13355 .LVL1191: + 846:Src/main.c **** //*/ + 13356 .loc 1 846 9 is_stmt 0 view .LVU4240 + 13357 09d4 A4B2 uxth r4, r4 + 13358 .LVL1192: + 846:Src/main.c **** //*/ + 13359 .loc 1 846 9 view .LVU4241 + 13360 09d6 C4E7 b .L711 + 13361 .LVL1193: + 13362 .L709: + 801:Src/main.c **** + 13363 .loc 1 801 8 is_stmt 1 view .LVU4242 + 801:Src/main.c **** + 13364 .loc 1 801 13 view .LVU4243 + 13365 09d8 FEE7 b .L709 + 13366 .LVL1194: + 13367 .L759: + 843:Src/main.c **** ++trigger_counter; + 13368 .loc 1 843 10 view .LVU4244 + 13369 09da E8B2 uxtb r0, r5 + 13370 09dc FFF7FEFF bl OUT_trigger + 13371 .LVL1195: + 844:Src/main.c **** } + 13372 .loc 1 844 10 view .LVU4245 + ARM GAS /tmp/ccLSPxIe.s page 661 - 12893 0a26 0122 movs r2, #1 - 12894 0a28 8021 movs r1, #128 - 12895 0a2a 2046 mov r0, r4 - 12896 0a2c FFF7FEFF bl HAL_GPIO_WritePin - 12897 .LVL1155: - 853:Src/main.c **** - 12898 .loc 1 853 7 view .LVU4131 - 12899 0a30 0022 movs r2, #0 - 12900 0a32 8021 movs r1, #128 - 12901 0a34 2046 mov r0, r4 - 12902 0a36 FFF7FEFF bl HAL_GPIO_WritePin - 12903 .LVL1156: - 855:Src/main.c **** TIM8->CNT = 0; - 12904 .loc 1 855 7 view .LVU4132 - 12905 0a3a 6E48 ldr r0, .L700+36 - 12906 0a3c FFF7FEFF bl HAL_TIM_Base_Stop_IT - 12907 .LVL1157: - 856:Src/main.c **** - 12908 .loc 1 856 7 view .LVU4133 - 856:Src/main.c **** - 12909 .loc 1 856 17 is_stmt 0 view .LVU4134 - 12910 0a40 6B4B ldr r3, .L700+32 - 12911 0a42 0022 movs r2, #0 - 12912 0a44 5A62 str r2, [r3, #36] - 858:Src/main.c **** task.current_param = task.min_param; - 12913 .loc 1 858 7 is_stmt 1 view .LVU4135 - 12914 0a46 FFF7FEFF bl Stop_TIM10 - 12915 .LVL1158: - 859:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 12916 .loc 1 859 7 view .LVU4136 - 859:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 12917 .loc 1 859 32 is_stmt 0 view .LVU4137 - 12918 0a4a 614C ldr r4, .L700 - 12919 0a4c D4ED017A vldr.32 s15, [r4, #4] - 859:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 12920 .loc 1 859 26 view .LVU4138 - 12921 0a50 C4ED047A vstr.32 s15, [r4, #16] - 860:Src/main.c **** if (task.tau > 3) - 12922 .loc 1 860 7 is_stmt 1 view .LVU4139 - 12923 0a54 FCEEE77A vcvt.u32.f32 s15, s15 - 12924 0a58 17EE903A vmov r3, s15 @ int - 12925 0a5c 99B2 uxth r1, r3 - 12926 0a5e 0220 movs r0, #2 - 12927 0a60 FFF7FEFF bl Set_LTEC - 12928 .LVL1159: - 861:Src/main.c **** { - 12929 .loc 1 861 7 view .LVU4140 - 861:Src/main.c **** { - 12930 .loc 1 861 15 is_stmt 0 view .LVU4141 - 12931 0a64 E38A ldrh r3, [r4, #22] - 861:Src/main.c **** { - 12932 .loc 1 861 10 view .LVU4142 - 12933 0a66 032B cmp r3, #3 - 12934 0a68 0CD9 bls .L658 - 863:Src/main.c **** htim10.Init.Period = 9999; - 12935 .loc 1 863 8 is_stmt 1 view .LVU4143 - 863:Src/main.c **** htim10.Init.Period = 9999; - ARM GAS /tmp/ccuHnxNu.s page 648 + 13373 09e0 0135 adds r5, r5, #1 + 13374 .LVL1196: + 844:Src/main.c **** } + 13375 .loc 1 844 10 is_stmt 0 view .LVU4246 + 13376 09e2 ADB2 uxth r5, r5 + 13377 .LVL1197: + 844:Src/main.c **** } + 13378 .loc 1 844 10 view .LVU4247 + 13379 09e4 F5E7 b .L712 + 13380 .L758: + 871:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 13381 .loc 1 871 7 is_stmt 1 view .LVU4248 + 871:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 13382 .loc 1 871 13 is_stmt 0 view .LVU4249 + 13383 09e6 574A ldr r2, .L767+32 + 13384 09e8 D368 ldr r3, [r2, #12] + 871:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 13385 .loc 1 871 21 view .LVU4250 + 13386 09ea 43F00103 orr r3, r3, #1 + 13387 09ee D360 str r3, [r2, #12] + 881:Src/main.c **** + 13388 .loc 1 881 7 is_stmt 1 view .LVU4251 + 13389 09f0 FFF7FEFF bl Stop_TIM10 + 13390 .LVL1198: + 883:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 13391 .loc 1 883 7 view .LVU4252 + 883:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 13392 .loc 1 883 32 is_stmt 0 view .LVU4253 + 13393 09f4 4B4C ldr r4, .L767 + 13394 .LVL1199: + 883:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 13395 .loc 1 883 32 view .LVU4254 + 13396 09f6 D4ED017A vldr.32 s15, [r4, #4] + 883:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 13397 .loc 1 883 26 view .LVU4255 + 13398 09fa C4ED047A vstr.32 s15, [r4, #16] + 884:Src/main.c **** if (task.tau > 3) + 13399 .loc 1 884 7 is_stmt 1 view .LVU4256 + 13400 09fe FCEEE77A vcvt.u32.f32 s15, s15 + 13401 0a02 17EE903A vmov r3, s15 @ int + 13402 0a06 99B2 uxth r1, r3 + 13403 0a08 0120 movs r0, #1 + 13404 0a0a FFF7FEFF bl Set_LTEC + 13405 .LVL1200: + 885:Src/main.c **** { + 13406 .loc 1 885 7 view .LVU4257 + 885:Src/main.c **** { + 13407 .loc 1 885 15 is_stmt 0 view .LVU4258 + 13408 0a0e E38A ldrh r3, [r4, #22] + 885:Src/main.c **** { + 13409 .loc 1 885 10 view .LVU4259 + 13410 0a10 032B cmp r3, #3 + 13411 0a12 0CD9 bls .L714 + 887:Src/main.c **** htim10.Init.Period = 9999; + 13412 .loc 1 887 8 is_stmt 1 view .LVU4260 + 887:Src/main.c **** htim10.Init.Period = 9999; + 13413 .loc 1 887 34 is_stmt 0 view .LVU4261 + ARM GAS /tmp/ccLSPxIe.s page 662 - 12936 .loc 1 863 34 is_stmt 0 view .LVU4144 - 12937 0a6a 644A ldr r2, .L700+44 - 12938 0a6c D068 ldr r0, [r2, #12] - 863:Src/main.c **** htim10.Init.Period = 9999; - 12939 .loc 1 863 21 view .LVU4145 - 12940 0a6e 6649 ldr r1, .L700+56 - 12941 0a70 0860 str r0, [r1] - 864:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 12942 .loc 1 864 8 is_stmt 1 view .LVU4146 - 864:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 12943 .loc 1 864 27 is_stmt 0 view .LVU4147 - 12944 0a72 42F20F71 movw r1, #9999 - 12945 0a76 D160 str r1, [r2, #12] - 865:Src/main.c **** } - 12946 .loc 1 865 8 is_stmt 1 view .LVU4148 - 865:Src/main.c **** } - 12947 .loc 1 865 33 is_stmt 0 view .LVU4149 - 12948 0a78 013B subs r3, r3, #1 - 865:Src/main.c **** } - 12949 .loc 1 865 38 view .LVU4150 - 12950 0a7a 6422 movs r2, #100 - 12951 0a7c 02FB03F3 mul r3, r2, r3 - 865:Src/main.c **** } - 12952 .loc 1 865 21 view .LVU4151 - 12953 0a80 624A ldr r2, .L700+60 - 12954 0a82 1360 str r3, [r2] - 12955 .L658: - 867:Src/main.c **** - 12956 .loc 1 867 7 is_stmt 1 view .LVU4152 - 12957 0a84 5D48 ldr r0, .L700+44 - 12958 0a86 FFF7FEFF bl HAL_TIM_Base_Start_IT - 12959 .LVL1160: - 915:Src/main.c **** case TT_CHANGE_TEMP_1: - 12960 .loc 1 915 6 view .LVU4153 - 12961 0a8a 12E6 b .L643 - 12962 .LVL1161: - 12963 .L690: - 915:Src/main.c **** case TT_CHANGE_TEMP_1: - 12964 .loc 1 915 6 is_stmt 0 view .LVU4154 - 12965 .LBE712: - 926:Src/main.c **** - 12966 .loc 1 926 7 is_stmt 1 view .LVU4155 - 926:Src/main.c **** - 12967 .loc 1 926 18 is_stmt 0 view .LVU4156 - 12968 0a8c 604A ldr r2, .L700+64 - 12969 0a8e 1360 str r3, [r2] - 928:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 12970 .loc 1 928 7 is_stmt 1 view .LVU4157 - 928:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 12971 .loc 1 928 25 is_stmt 0 view .LVU4158 - 12972 0a90 0120 movs r0, #1 - 12973 0a92 FFF7FEFF bl MPhD_T - 12974 .LVL1162: - 928:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 12975 .loc 1 928 23 discriminator 1 view .LVU4159 - 12976 0a96 4F4E ldr r6, .L700+4 - 12977 0a98 3081 strh r0, [r6, #8] @ movhi - ARM GAS /tmp/ccuHnxNu.s page 649 + 13414 0a14 4A4A ldr r2, .L767+28 + 13415 0a16 D068 ldr r0, [r2, #12] + 887:Src/main.c **** htim10.Init.Period = 9999; + 13416 .loc 1 887 21 view .LVU4262 + 13417 0a18 4E49 ldr r1, .L767+48 + 13418 0a1a 0860 str r0, [r1] + 888:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 13419 .loc 1 888 8 is_stmt 1 view .LVU4263 + 888:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 13420 .loc 1 888 27 is_stmt 0 view .LVU4264 + 13421 0a1c 42F20F71 movw r1, #9999 + 13422 0a20 D160 str r1, [r2, #12] + 889:Src/main.c **** } + 13423 .loc 1 889 8 is_stmt 1 view .LVU4265 + 889:Src/main.c **** } + 13424 .loc 1 889 33 is_stmt 0 view .LVU4266 + 13425 0a22 013B subs r3, r3, #1 + 889:Src/main.c **** } + 13426 .loc 1 889 38 view .LVU4267 + 13427 0a24 6422 movs r2, #100 + 13428 0a26 02FB03F3 mul r3, r2, r3 + 889:Src/main.c **** } + 13429 .loc 1 889 21 view .LVU4268 + 13430 0a2a 4B4A ldr r2, .L767+52 + 13431 0a2c 1360 str r3, [r2] + 13432 .L714: + 891:Src/main.c **** break; + 13433 .loc 1 891 7 is_stmt 1 view .LVU4269 + 13434 0a2e 4448 ldr r0, .L767+28 + 13435 0a30 FFF7FEFF bl HAL_TIM_Base_Start_IT + 13436 .LVL1201: + 892:Src/main.c **** case TT_CHANGE_CURR_2: + 13437 .loc 1 892 6 view .LVU4270 + 13438 0a34 D2E6 b .L707 + 13439 .LVL1202: + 13440 .L706: + 896:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 13441 .loc 1 896 7 view .LVU4271 + 896:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 13442 .loc 1 896 38 is_stmt 0 view .LVU4272 + 13443 0a36 3B4B ldr r3, .L767 + 13444 0a38 D3ED077A vldr.32 s15, [r3, #28] + 896:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 13445 .loc 1 896 7 view .LVU4273 + 13446 0a3c FCEEE77A vcvt.u32.f32 s15, s15 + 13447 0a40 17EE903A vmov r3, s15 @ int + 13448 0a44 99B2 uxth r1, r3 + 13449 0a46 0120 movs r0, #1 + 13450 0a48 FFF7FEFF bl Set_LTEC + 13451 .LVL1203: + 897:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 13452 .loc 1 897 7 is_stmt 1 view .LVU4274 + 897:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 13453 .loc 1 897 14 is_stmt 0 view .LVU4275 + 13454 0a4c 0320 movs r0, #3 + 13455 0a4e FFF7FEFF bl MPhD_T + 13456 .LVL1204: + ARM GAS /tmp/ccLSPxIe.s page 663 - 929:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12978 .loc 1 929 7 is_stmt 1 view .LVU4160 - 929:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12979 .loc 1 929 25 is_stmt 0 view .LVU4161 - 12980 0a9a 0120 movs r0, #1 - 12981 0a9c FFF7FEFF bl MPhD_T - 12982 .LVL1163: - 929:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12983 .loc 1 929 23 discriminator 1 view .LVU4162 - 12984 0aa0 3081 strh r0, [r6, #8] @ movhi - 930:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12985 .loc 1 930 7 is_stmt 1 view .LVU4163 - 930:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12986 .loc 1 930 25 is_stmt 0 view .LVU4164 - 12987 0aa2 0220 movs r0, #2 - 12988 0aa4 FFF7FEFF bl MPhD_T - 12989 .LVL1164: - 930:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 12990 .loc 1 930 23 discriminator 1 view .LVU4165 - 12991 0aa8 4B4F ldr r7, .L700+8 - 12992 0aaa 3881 strh r0, [r7, #8] @ movhi - 931:Src/main.c **** - 12993 .loc 1 931 7 is_stmt 1 view .LVU4166 - 931:Src/main.c **** - 12994 .loc 1 931 25 is_stmt 0 view .LVU4167 - 12995 0aac 0220 movs r0, #2 - 12996 0aae FFF7FEFF bl MPhD_T - 12997 .LVL1165: - 931:Src/main.c **** - 12998 .loc 1 931 23 discriminator 1 view .LVU4168 - 12999 0ab2 3881 strh r0, [r7, #8] @ movhi - 933:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 13000 .loc 1 933 7 is_stmt 1 view .LVU4169 - 933:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 13001 .loc 1 933 31 is_stmt 0 view .LVU4170 - 13002 0ab4 3389 ldrh r3, [r6, #8] - 933:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 13003 .loc 1 933 20 view .LVU4171 - 13004 0ab6 574C ldr r4, .L700+68 - 13005 0ab8 6380 strh r3, [r4, #2] @ movhi - 934:Src/main.c **** - 13006 .loc 1 934 7 is_stmt 1 view .LVU4172 - 934:Src/main.c **** - 13007 .loc 1 934 20 is_stmt 0 view .LVU4173 - 13008 0aba A080 strh r0, [r4, #4] @ movhi - 938:Src/main.c **** temp16 = Get_ADC(1); - 13009 .loc 1 938 7 is_stmt 1 view .LVU4174 - 938:Src/main.c **** temp16 = Get_ADC(1); - 13010 .loc 1 938 16 is_stmt 0 view .LVU4175 - 13011 0abc 0020 movs r0, #0 - 13012 0abe FFF7FEFF bl Get_ADC - 13013 .LVL1166: - 938:Src/main.c **** temp16 = Get_ADC(1); - 13014 .loc 1 938 14 discriminator 1 view .LVU4176 - 13015 0ac2 474D ldr r5, .L700+16 - 13016 0ac4 2880 strh r0, [r5] @ movhi - 939:Src/main.c **** Long_Data[7] = temp16; - ARM GAS /tmp/ccuHnxNu.s page 650 + 898:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 13457 .loc 1 898 7 is_stmt 1 view .LVU4276 + 898:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 13458 .loc 1 898 32 is_stmt 0 view .LVU4277 + 13459 0a52 0320 movs r0, #3 + 13460 0a54 FFF7FEFF bl MPhD_T + 13461 .LVL1205: + 898:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 13462 .loc 1 898 30 discriminator 1 view .LVU4278 + 13463 0a58 334C ldr r4, .L767+4 + 13464 0a5a 2080 strh r0, [r4] @ movhi + 899:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 13465 .loc 1 899 7 is_stmt 1 view .LVU4279 + 899:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 13466 .loc 1 899 14 is_stmt 0 view .LVU4280 + 13467 0a5c 0420 movs r0, #4 + 13468 0a5e FFF7FEFF bl MPhD_T + 13469 .LVL1206: + 900:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 13470 .loc 1 900 7 is_stmt 1 view .LVU4281 + 900:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 13471 .loc 1 900 32 is_stmt 0 view .LVU4282 + 13472 0a62 0420 movs r0, #4 + 13473 0a64 FFF7FEFF bl MPhD_T + 13474 .LVL1207: + 900:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 13475 .loc 1 900 30 discriminator 1 view .LVU4283 + 13476 0a68 304D ldr r5, .L767+8 + 13477 0a6a 2880 strh r0, [r5] @ movhi + 901:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 13478 .loc 1 901 7 is_stmt 1 view .LVU4284 + 901:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 13479 .loc 1 901 14 is_stmt 0 view .LVU4285 + 13480 0a6c 0122 movs r2, #1 + 13481 0a6e 2146 mov r1, r4 + 13482 0a70 2F48 ldr r0, .L767+12 + 13483 0a72 FFF7FEFF bl PID_Controller_Temp + 13484 .LVL1208: + 13485 0a76 0146 mov r1, r0 + 901:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 13486 .loc 1 901 13 discriminator 1 view .LVU4286 + 13487 0a78 2E4C ldr r4, .L767+16 + 13488 0a7a 2080 strh r0, [r4] @ movhi + 902:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 13489 .loc 1 902 7 is_stmt 1 view .LVU4287 + 13490 0a7c 0320 movs r0, #3 + 13491 0a7e FFF7FEFF bl Set_LTEC + 13492 .LVL1209: + 903:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 13493 .loc 1 903 7 view .LVU4288 + 903:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 13494 .loc 1 903 14 is_stmt 0 view .LVU4289 + 13495 0a82 0222 movs r2, #2 + 13496 0a84 2946 mov r1, r5 + 13497 0a86 2C48 ldr r0, .L767+20 + 13498 0a88 FFF7FEFF bl PID_Controller_Temp + 13499 .LVL1210: + ARM GAS /tmp/ccLSPxIe.s page 664 - 13017 .loc 1 939 7 is_stmt 1 view .LVU4177 - 939:Src/main.c **** Long_Data[7] = temp16; - 13018 .loc 1 939 16 is_stmt 0 view .LVU4178 - 13019 0ac6 0120 movs r0, #1 - 13020 0ac8 FFF7FEFF bl Get_ADC - 13021 .LVL1167: - 939:Src/main.c **** Long_Data[7] = temp16; - 13022 .loc 1 939 14 discriminator 1 view .LVU4179 - 13023 0acc 2880 strh r0, [r5] @ movhi - 940:Src/main.c **** - 13024 .loc 1 940 7 is_stmt 1 view .LVU4180 - 940:Src/main.c **** - 13025 .loc 1 940 20 is_stmt 0 view .LVU4181 - 13026 0ace E081 strh r0, [r4, #14] @ movhi - 943:Src/main.c **** Long_Data[8] = temp16; - 13027 .loc 1 943 7 is_stmt 1 view .LVU4182 - 943:Src/main.c **** Long_Data[8] = temp16; - 13028 .loc 1 943 16 is_stmt 0 view .LVU4183 - 13029 0ad0 0120 movs r0, #1 - 13030 0ad2 FFF7FEFF bl Get_ADC - 13031 .LVL1168: - 943:Src/main.c **** Long_Data[8] = temp16; - 13032 .loc 1 943 14 discriminator 1 view .LVU4184 - 13033 0ad6 2880 strh r0, [r5] @ movhi - 944:Src/main.c **** - 13034 .loc 1 944 7 is_stmt 1 view .LVU4185 - 944:Src/main.c **** - 13035 .loc 1 944 20 is_stmt 0 view .LVU4186 - 13036 0ad8 2082 strh r0, [r4, #16] @ movhi - 947:Src/main.c **** Long_Data[9] = temp16; - 13037 .loc 1 947 7 is_stmt 1 view .LVU4187 - 947:Src/main.c **** Long_Data[9] = temp16; - 13038 .loc 1 947 16 is_stmt 0 view .LVU4188 - 13039 0ada 0120 movs r0, #1 - 13040 0adc FFF7FEFF bl Get_ADC - 13041 .LVL1169: - 947:Src/main.c **** Long_Data[9] = temp16; - 13042 .loc 1 947 14 discriminator 1 view .LVU4189 - 13043 0ae0 2880 strh r0, [r5] @ movhi - 948:Src/main.c **** - 13044 .loc 1 948 7 is_stmt 1 view .LVU4190 - 948:Src/main.c **** - 13045 .loc 1 948 20 is_stmt 0 view .LVU4191 - 13046 0ae2 6082 strh r0, [r4, #18] @ movhi - 951:Src/main.c **** Long_Data[10] = temp16; - 13047 .loc 1 951 7 is_stmt 1 view .LVU4192 - 951:Src/main.c **** Long_Data[10] = temp16; - 13048 .loc 1 951 16 is_stmt 0 view .LVU4193 - 13049 0ae4 0120 movs r0, #1 - 13050 0ae6 FFF7FEFF bl Get_ADC - 13051 .LVL1170: - 951:Src/main.c **** Long_Data[10] = temp16; - 13052 .loc 1 951 14 discriminator 1 view .LVU4194 - 13053 0aea 2880 strh r0, [r5] @ movhi - 952:Src/main.c **** - 13054 .loc 1 952 7 is_stmt 1 view .LVU4195 - 952:Src/main.c **** - ARM GAS /tmp/ccuHnxNu.s page 651 + 13500 0a8c 0146 mov r1, r0 + 903:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 13501 .loc 1 903 13 discriminator 1 view .LVU4290 + 13502 0a8e 2080 strh r0, [r4] @ movhi + 904:Src/main.c **** + 13503 .loc 1 904 7 is_stmt 1 view .LVU4291 + 13504 0a90 0420 movs r0, #4 + 13505 0a92 FFF7FEFF bl Set_LTEC + 13506 .LVL1211: + 906:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 13507 .loc 1 906 7 view .LVU4292 + 906:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 13508 .loc 1 906 28 is_stmt 0 view .LVU4293 + 13509 0a96 314B ldr r3, .L767+56 + 13510 0a98 0222 movs r2, #2 + 13511 0a9a 1A70 strb r2, [r3] + 907:Src/main.c **** //LD_blinker.param = task.current_param; + 13512 .loc 1 907 7 is_stmt 1 view .LVU4294 + 907:Src/main.c **** //LD_blinker.param = task.current_param; + 13513 .loc 1 907 24 is_stmt 0 view .LVU4295 + 13514 0a9c 0022 movs r2, #0 + 13515 0a9e 9A72 strb r2, [r3, #10] + 909:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 13516 .loc 1 909 7 is_stmt 1 view .LVU4296 + 909:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 13517 .loc 1 909 24 is_stmt 0 view .LVU4297 + 13518 0aa0 1A81 strh r2, [r3, #8] @ movhi + 910:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 13519 .loc 1 910 7 is_stmt 1 view .LVU4298 + 910:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 13520 .loc 1 910 24 is_stmt 0 view .LVU4299 + 13521 0aa2 4FF47A72 mov r2, #1000 + 13522 0aa6 1A81 strh r2, [r3, #8] @ movhi + 911:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 13523 .loc 1 911 7 is_stmt 1 view .LVU4300 + 911:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 13524 .loc 1 911 30 is_stmt 0 view .LVU4301 + 13525 0aa8 2D4A ldr r2, .L767+60 + 13526 0aaa 5A60 str r2, [r3, #4] + 912:Src/main.c **** + 13527 .loc 1 912 7 is_stmt 1 view .LVU4302 + 912:Src/main.c **** + 13528 .loc 1 912 29 is_stmt 0 view .LVU4303 + 13529 0aac 8022 movs r2, #128 + 13530 0aae 5A80 strh r2, [r3, #2] @ movhi + 914:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 13531 .loc 1 914 7 is_stmt 1 view .LVU4304 + 914:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 13532 .loc 1 914 17 is_stmt 0 view .LVU4305 + 13533 0ab0 2C4B ldr r3, .L767+64 + 13534 0ab2 42F21072 movw r2, #10000 + 13535 0ab6 DA62 str r2, [r3, #44] + 916:Src/main.c **** if (st != HAL_OK) + 13536 .loc 1 916 7 is_stmt 1 view .LVU4306 + 916:Src/main.c **** if (st != HAL_OK) + 13537 .loc 1 916 12 is_stmt 0 view .LVU4307 + 13538 0ab8 2B48 ldr r0, .L767+68 + ARM GAS /tmp/ccLSPxIe.s page 665 - 13055 .loc 1 952 21 is_stmt 0 view .LVU4196 - 13056 0aec A082 strh r0, [r4, #20] @ movhi - 955:Src/main.c **** Long_Data[11] = temp16; - 13057 .loc 1 955 7 is_stmt 1 view .LVU4197 - 955:Src/main.c **** Long_Data[11] = temp16; - 13058 .loc 1 955 16 is_stmt 0 view .LVU4198 - 13059 0aee 0120 movs r0, #1 - 13060 0af0 FFF7FEFF bl Get_ADC - 13061 .LVL1171: - 955:Src/main.c **** Long_Data[11] = temp16; - 13062 .loc 1 955 14 discriminator 1 view .LVU4199 - 13063 0af4 2880 strh r0, [r5] @ movhi - 956:Src/main.c **** temp16 = Get_ADC(2); - 13064 .loc 1 956 7 is_stmt 1 view .LVU4200 - 956:Src/main.c **** temp16 = Get_ADC(2); - 13065 .loc 1 956 21 is_stmt 0 view .LVU4201 - 13066 0af6 E082 strh r0, [r4, #22] @ movhi - 957:Src/main.c **** - 13067 .loc 1 957 7 is_stmt 1 view .LVU4202 - 957:Src/main.c **** - 13068 .loc 1 957 16 is_stmt 0 view .LVU4203 - 13069 0af8 0220 movs r0, #2 - 13070 0afa FFF7FEFF bl Get_ADC - 13071 .LVL1172: - 957:Src/main.c **** - 13072 .loc 1 957 14 discriminator 1 view .LVU4204 - 13073 0afe 2880 strh r0, [r5] @ movhi - 960:Src/main.c **** temp16 = Get_ADC(4); - 13074 .loc 1 960 7 is_stmt 1 view .LVU4205 - 960:Src/main.c **** temp16 = Get_ADC(4); - 13075 .loc 1 960 16 is_stmt 0 view .LVU4206 - 13076 0b00 0320 movs r0, #3 - 13077 0b02 FFF7FEFF bl Get_ADC - 13078 .LVL1173: - 960:Src/main.c **** temp16 = Get_ADC(4); - 13079 .loc 1 960 14 discriminator 1 view .LVU4207 - 13080 0b06 2880 strh r0, [r5] @ movhi - 961:Src/main.c **** Long_Data[12] = temp16; - 13081 .loc 1 961 7 is_stmt 1 view .LVU4208 - 961:Src/main.c **** Long_Data[12] = temp16; - 13082 .loc 1 961 16 is_stmt 0 view .LVU4209 - 13083 0b08 0420 movs r0, #4 - 13084 0b0a FFF7FEFF bl Get_ADC - 13085 .LVL1174: - 961:Src/main.c **** Long_Data[12] = temp16; - 13086 .loc 1 961 14 discriminator 1 view .LVU4210 - 13087 0b0e 2880 strh r0, [r5] @ movhi - 962:Src/main.c **** temp16 = Get_ADC(5); - 13088 .loc 1 962 7 is_stmt 1 view .LVU4211 - 962:Src/main.c **** temp16 = Get_ADC(5); - 13089 .loc 1 962 21 is_stmt 0 view .LVU4212 - 13090 0b10 2083 strh r0, [r4, #24] @ movhi - 963:Src/main.c **** - 13091 .loc 1 963 7 is_stmt 1 view .LVU4213 - 963:Src/main.c **** - 13092 .loc 1 963 16 is_stmt 0 view .LVU4214 - 13093 0b12 0520 movs r0, #5 - ARM GAS /tmp/ccuHnxNu.s page 652 + 13539 0aba FFF7FEFF bl HAL_TIM_Base_Start_IT + 13540 .LVL1212: + 917:Src/main.c **** while(1); + 13541 .loc 1 917 7 is_stmt 1 view .LVU4308 + 917:Src/main.c **** while(1); + 13542 .loc 1 917 10 is_stmt 0 view .LVU4309 + 13543 0abe 78BB cbnz r0, .L716 + 922:Src/main.c **** uint32_t i = 10000; while (--i){} + 13544 .loc 1 922 7 is_stmt 1 view .LVU4310 + 13545 0ac0 0122 movs r2, #1 + 13546 0ac2 8021 movs r1, #128 + 13547 0ac4 1D48 ldr r0, .L767+24 + 13548 .LVL1213: + 922:Src/main.c **** uint32_t i = 10000; while (--i){} + 13549 .loc 1 922 7 is_stmt 0 view .LVU4311 + 13550 0ac6 FFF7FEFF bl HAL_GPIO_WritePin + 13551 .LVL1214: + 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 13552 .loc 1 923 7 is_stmt 1 view .LVU4312 + 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 13553 .loc 1 923 27 view .LVU4313 + 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 13554 .loc 1 923 16 is_stmt 0 view .LVU4314 + 13555 0aca 42F21073 movw r3, #10000 + 13556 .LVL1215: + 13557 .L717: + 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 13558 .loc 1 923 39 is_stmt 1 discriminator 2 view .LVU4315 + 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 13559 .loc 1 923 34 discriminator 2 view .LVU4316 + 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 13560 .loc 1 923 34 is_stmt 0 discriminator 2 view .LVU4317 + 13561 0ace 013B subs r3, r3, #1 + 13562 .LVL1216: + 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 13563 .loc 1 923 34 discriminator 2 view .LVU4318 + 13564 0ad0 FDD1 bne .L717 + 924:Src/main.c **** LD_blinker.state = 2; + 13565 .loc 1 924 7 is_stmt 1 view .LVU4319 + 13566 0ad2 0022 movs r2, #0 + 13567 0ad4 8021 movs r1, #128 + 13568 0ad6 1948 ldr r0, .L767+24 + 13569 0ad8 FFF7FEFF bl HAL_GPIO_WritePin + 13570 .LVL1217: + 925:Src/main.c **** + 13571 .loc 1 925 7 view .LVU4320 + 925:Src/main.c **** + 13572 .loc 1 925 24 is_stmt 0 view .LVU4321 + 13573 0adc 1F4B ldr r3, .L767+56 + 13574 0ade 0222 movs r2, #2 + 13575 0ae0 9A72 strb r2, [r3, #10] + 927:Src/main.c **** if (st != HAL_OK) + 13576 .loc 1 927 7 is_stmt 1 view .LVU4322 + 927:Src/main.c **** if (st != HAL_OK) + 13577 .loc 1 927 12 is_stmt 0 view .LVU4323 + 13578 0ae2 1748 ldr r0, .L767+28 + 13579 0ae4 FFF7FEFF bl HAL_TIM_Base_Start_IT + ARM GAS /tmp/ccLSPxIe.s page 666 - 13094 0b14 FFF7FEFF bl Get_ADC - 13095 .LVL1175: - 963:Src/main.c **** - 13096 .loc 1 963 14 discriminator 1 view .LVU4215 - 13097 0b18 2880 strh r0, [r5] @ movhi - 966:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 13098 .loc 1 966 7 is_stmt 1 view .LVU4216 - 966:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 13099 .loc 1 966 16 is_stmt 0 view .LVU4217 - 13100 0b1a 3F4B ldr r3, .L700+72 - 13101 0b1c 1B68 ldr r3, [r3] - 13102 0b1e 3F4A ldr r2, .L700+76 - 13103 0b20 1360 str r3, [r2] - 967:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 13104 .loc 1 967 7 is_stmt 1 view .LVU4218 - 967:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 13105 .loc 1 967 20 is_stmt 0 view .LVU4219 - 13106 0b22 E380 strh r3, [r4, #6] @ movhi - 968:Src/main.c **** - 13107 .loc 1 968 7 is_stmt 1 view .LVU4220 - 968:Src/main.c **** - 13108 .loc 1 968 31 is_stmt 0 view .LVU4221 - 13109 0b24 1B0C lsrs r3, r3, #16 - 968:Src/main.c **** - 13110 .loc 1 968 20 view .LVU4222 - 13111 0b26 2381 strh r3, [r4, #8] @ movhi - 971:Src/main.c **** - 13112 .loc 1 971 7 is_stmt 1 view .LVU4223 - 971:Src/main.c **** - 13113 .loc 1 971 31 is_stmt 0 view .LVU4224 - 13114 0b28 3388 ldrh r3, [r6] - 971:Src/main.c **** - 13115 .loc 1 971 20 view .LVU4225 - 13116 0b2a 6381 strh r3, [r4, #10] @ movhi - 974:Src/main.c **** } - 13117 .loc 1 974 7 is_stmt 1 view .LVU4226 - 974:Src/main.c **** } - 13118 .loc 1 974 31 is_stmt 0 view .LVU4227 - 13119 0b2c 3B88 ldrh r3, [r7] - 974:Src/main.c **** } - 13120 .loc 1 974 20 view .LVU4228 - 13121 0b2e A381 strh r3, [r4, #12] @ movhi - 13122 0b30 C6E5 b .L660 - 13123 .L662: -1002:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 13124 .loc 1 1002 5 is_stmt 1 view .LVU4229 -1002:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 13125 .loc 1 1002 17 is_stmt 0 view .LVU4230 - 13126 0b32 3B4C ldr r4, .L700+80 - 13127 0b34 0D21 movs r1, #13 - 13128 0b36 2046 mov r0, r4 - 13129 0b38 FFF7FEFF bl CalculateChecksum - 13130 .LVL1176: -1002:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 13131 .loc 1 1002 15 discriminator 1 view .LVU4231 - 13132 0b3c 394B ldr r3, .L700+84 - 13133 0b3e 1880 strh r0, [r3] @ movhi - ARM GAS /tmp/ccuHnxNu.s page 653 + 13580 .LVL1218: + 928:Src/main.c **** while(1); + 13581 .loc 1 928 7 is_stmt 1 view .LVU4324 + 928:Src/main.c **** while(1); + 13582 .loc 1 928 10 is_stmt 0 view .LVU4325 + 13583 0ae8 D8B9 cbnz r0, .L719 + 13584 .L720: + 930:Src/main.c **** { + 13585 .loc 1 930 33 is_stmt 1 view .LVU4326 + 930:Src/main.c **** { + 13586 .loc 1 930 18 is_stmt 0 view .LVU4327 + 13587 0aea 0E4B ldr r3, .L767 + 13588 0aec D3ED047A vldr.32 s15, [r3, #16] + 930:Src/main.c **** { + 13589 .loc 1 930 39 view .LVU4328 + 13590 0af0 93ED027A vldr.32 s14, [r3, #8] + 930:Src/main.c **** { + 13591 .loc 1 930 33 view .LVU4329 + 13592 0af4 F4EEC77A vcmpe.f32 s15, s14 + 13593 0af8 F1EE10FA vmrs APSR_nzcv, FPSCR + 13594 0afc 3CD5 bpl .L760 + 932:Src/main.c **** { + 13595 .loc 1 932 8 is_stmt 1 view .LVU4330 + 932:Src/main.c **** { + 13596 .loc 1 932 12 is_stmt 0 view .LVU4331 + 13597 0afe 134B ldr r3, .L767+40 + 13598 0b00 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 932:Src/main.c **** { + 13599 .loc 1 932 11 view .LVU4332 + 13600 0b02 002B cmp r3, #0 + 13601 0b04 F1D0 beq .L720 + 937:Src/main.c **** TO10 = 0; + 13602 .loc 1 937 9 is_stmt 1 view .LVU4333 + 937:Src/main.c **** TO10 = 0; + 13603 .loc 1 937 35 is_stmt 0 view .LVU4334 + 13604 0b06 074B ldr r3, .L767 + 13605 0b08 93ED037A vldr.32 s14, [r3, #12] + 937:Src/main.c **** TO10 = 0; + 13606 .loc 1 937 28 view .LVU4335 + 13607 0b0c 77EE277A vadd.f32 s15, s14, s15 + 13608 0b10 C3ED047A vstr.32 s15, [r3, #16] + 938:Src/main.c **** TIM10_coflag = 0; + 13609 .loc 1 938 9 is_stmt 1 view .LVU4336 + 938:Src/main.c **** TIM10_coflag = 0; + 13610 .loc 1 938 14 is_stmt 0 view .LVU4337 + 13611 0b14 0023 movs r3, #0 + 13612 0b16 0E4A ldr r2, .L767+44 + 13613 0b18 1360 str r3, [r2] + 939:Src/main.c **** + 13614 .loc 1 939 9 is_stmt 1 view .LVU4338 + 939:Src/main.c **** + 13615 .loc 1 939 22 is_stmt 0 view .LVU4339 + 13616 0b1a 0C4A ldr r2, .L767+40 + 13617 0b1c 1370 strb r3, [r2] + 13618 0b1e E4E7 b .L720 + 13619 .LVL1219: + 13620 .L716: + ARM GAS /tmp/ccLSPxIe.s page 667 -1003:Src/main.c **** - 13134 .loc 1 1003 5 is_stmt 1 view .LVU4232 -1003:Src/main.c **** - 13135 .loc 1 1003 24 is_stmt 0 view .LVU4233 - 13136 0b40 6083 strh r0, [r4, #26] @ movhi -1005:Src/main.c **** { - 13137 .loc 1 1005 5 is_stmt 1 view .LVU4234 - 13138 .LBB713: -1005:Src/main.c **** { - 13139 .loc 1 1005 10 view .LVU4235 - 13140 .LVL1177: -1005:Src/main.c **** { - 13141 .loc 1 1005 19 is_stmt 0 view .LVU4236 - 13142 0b42 0023 movs r3, #0 -1005:Src/main.c **** { - 13143 .loc 1 1005 5 view .LVU4237 - 13144 0b44 0BE0 b .L665 - 13145 .LVL1178: - 13146 .L666: -1007:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 13147 .loc 1 1007 6 is_stmt 1 view .LVU4238 -1007:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 13148 .loc 1 1007 33 is_stmt 0 view .LVU4239 - 13149 0b46 334A ldr r2, .L700+68 - 13150 0b48 32F81320 ldrh r2, [r2, r3, lsl #1] -1007:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 13151 .loc 1 1007 17 view .LVU4240 - 13152 0b4c 5900 lsls r1, r3, #1 -1007:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 13153 .loc 1 1007 21 view .LVU4241 - 13154 0b4e 3648 ldr r0, .L700+88 - 13155 0b50 00F81320 strb r2, [r0, r3, lsl #1] -1008:Src/main.c **** } - 13156 .loc 1 1008 6 is_stmt 1 view .LVU4242 -1008:Src/main.c **** } - 13157 .loc 1 1008 19 is_stmt 0 view .LVU4243 - 13158 0b54 0131 adds r1, r1, #1 -1008:Src/main.c **** } - 13159 .loc 1 1008 23 view .LVU4244 - 13160 0b56 120A lsrs r2, r2, #8 - 13161 0b58 4254 strb r2, [r0, r1] -1005:Src/main.c **** { - 13162 .loc 1 1005 38 is_stmt 1 discriminator 3 view .LVU4245 - 13163 0b5a 0133 adds r3, r3, #1 - 13164 .LVL1179: -1005:Src/main.c **** { - 13165 .loc 1 1005 38 is_stmt 0 discriminator 3 view .LVU4246 - 13166 0b5c 9BB2 uxth r3, r3 - 13167 .LVL1180: - 13168 .L665: -1005:Src/main.c **** { - 13169 .loc 1 1005 28 is_stmt 1 discriminator 1 view .LVU4247 - 13170 0b5e 0E2B cmp r3, #14 - 13171 0b60 F1D9 bls .L666 - 13172 .LBE713: -1015:Src/main.c **** UART_transmission_request = NO_MESS; - 13173 .loc 1 1015 5 view .LVU4248 - ARM GAS /tmp/ccuHnxNu.s page 654 + 918:Src/main.c **** // */ + 13621 .loc 1 918 8 is_stmt 1 view .LVU4340 + 918:Src/main.c **** // */ + 13622 .loc 1 918 13 view .LVU4341 + 13623 0b20 FEE7 b .L716 + 13624 .LVL1220: + 13625 .L719: + 929:Src/main.c **** while (task.current_param < task.max_param) + 13626 .loc 1 929 8 view .LVU4342 + 929:Src/main.c **** while (task.current_param < task.max_param) + 13627 .loc 1 929 13 view .LVU4343 + 13628 0b22 FEE7 b .L719 + 13629 .L768: + 13630 .align 2 + 13631 .L767: + 13632 0b24 00000000 .word task + 13633 0b28 00000000 .word LD1_param + 13634 0b2c 00000000 .word LD2_param + 13635 0b30 00000000 .word LD1_curr_setup + 13636 0b34 00000000 .word temp16 + 13637 0b38 00000000 .word LD2_curr_setup + 13638 0b3c 000C0240 .word 1073875968 + 13639 0b40 00000000 .word htim10 + 13640 0b44 00480140 .word 1073825792 + 13641 0b48 00080040 .word 1073743872 + 13642 0b4c 00000000 .word TIM10_coflag + 13643 0b50 00000000 .word TO10 + 13644 0b54 00000000 .word TIM10_period + 13645 0b58 00000000 .word TO10_counter + 13646 0b5c 00000000 .word LD_blinker + 13647 0b60 00040240 .word 1073873920 + 13648 0b64 00040140 .word 1073808384 + 13649 0b68 00000000 .word htim8 + 13650 0b6c 00000000 .word htim11 + 13651 0b70 00000000 .word htim4 + 13652 0b74 00180240 .word 1073879040 + 13653 .L760: + 944:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 13654 .loc 1 944 7 view .LVU4344 + 13655 0b78 6C48 ldr r0, .L769 + 13656 .LVL1221: + 944:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 13657 .loc 1 944 7 is_stmt 0 view .LVU4345 + 13658 0b7a FFF7FEFF bl HAL_TIM_Base_Stop + 13659 .LVL1222: + 945:Src/main.c **** + 13660 .loc 1 945 7 is_stmt 1 view .LVU4346 + 13661 0b7e 6C4C ldr r4, .L769+4 + 13662 0b80 0122 movs r2, #1 + 13663 0b82 8021 movs r1, #128 + 13664 0b84 2046 mov r0, r4 + 13665 0b86 FFF7FEFF bl HAL_GPIO_WritePin + 13666 .LVL1223: + 947:Src/main.c **** + 13667 .loc 1 947 7 view .LVU4347 + 13668 0b8a 0022 movs r2, #0 + 13669 0b8c 8021 movs r1, #128 + ARM GAS /tmp/ccLSPxIe.s page 668 - 13174 0b62 1E20 movs r0, #30 - 13175 0b64 FFF7FEFF bl USART_TX_DMA - 13176 .LVL1181: -1016:Src/main.c **** break; - 13177 .loc 1 1016 5 view .LVU4249 -1016:Src/main.c **** break; - 13178 .loc 1 1016 31 is_stmt 0 view .LVU4250 - 13179 0b68 304B ldr r3, .L700+92 - 13180 0b6a 0022 movs r2, #0 - 13181 0b6c 1A70 strb r2, [r3] -1017:Src/main.c **** case MESS_03://Transmith saved packet - 13182 .loc 1 1017 4 is_stmt 1 view .LVU4251 - 13183 0b6e FFF7DCBA b .L664 - 13184 .LVL1182: - 13185 .L667: - 13186 .LBB714: -1021:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 13187 .loc 1 1021 6 view .LVU4252 -1021:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 13188 .loc 1 1021 33 is_stmt 0 view .LVU4253 - 13189 0b72 284A ldr r2, .L700+68 - 13190 0b74 32F81320 ldrh r2, [r2, r3, lsl #1] -1021:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 13191 .loc 1 1021 17 view .LVU4254 - 13192 0b78 5900 lsls r1, r3, #1 -1021:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 13193 .loc 1 1021 21 view .LVU4255 - 13194 0b7a 2B48 ldr r0, .L700+88 - 13195 0b7c 00F81320 strb r2, [r0, r3, lsl #1] -1022:Src/main.c **** } - 13196 .loc 1 1022 6 is_stmt 1 view .LVU4256 -1022:Src/main.c **** } - 13197 .loc 1 1022 19 is_stmt 0 view .LVU4257 - 13198 0b80 0131 adds r1, r1, #1 -1022:Src/main.c **** } - 13199 .loc 1 1022 23 view .LVU4258 - 13200 0b82 120A lsrs r2, r2, #8 - 13201 0b84 4254 strb r2, [r0, r1] -1019:Src/main.c **** { - 13202 .loc 1 1019 38 is_stmt 1 discriminator 3 view .LVU4259 - 13203 0b86 0133 adds r3, r3, #1 - 13204 .LVL1183: -1019:Src/main.c **** { - 13205 .loc 1 1019 38 is_stmt 0 discriminator 3 view .LVU4260 - 13206 0b88 9BB2 uxth r3, r3 - 13207 .LVL1184: - 13208 .L663: -1019:Src/main.c **** { - 13209 .loc 1 1019 28 is_stmt 1 discriminator 1 view .LVU4261 - 13210 0b8a 0E2B cmp r3, #14 - 13211 0b8c F1D9 bls .L667 - 13212 .LBE714: -1028:Src/main.c **** UART_transmission_request = NO_MESS; - 13213 .loc 1 1028 5 view .LVU4262 - 13214 0b8e 1E20 movs r0, #30 - 13215 0b90 FFF7FEFF bl USART_TX_DMA - 13216 .LVL1185: - ARM GAS /tmp/ccuHnxNu.s page 655 + 13670 0b8e 2046 mov r0, r4 + 13671 0b90 FFF7FEFF bl HAL_GPIO_WritePin + 13672 .LVL1224: + 949:Src/main.c **** TIM8->CNT = 0; + 13673 .loc 1 949 7 view .LVU4348 + 13674 0b94 6748 ldr r0, .L769+8 + 13675 0b96 FFF7FEFF bl HAL_TIM_Base_Stop_IT + 13676 .LVL1225: + 950:Src/main.c **** + 13677 .loc 1 950 7 view .LVU4349 + 950:Src/main.c **** + 13678 .loc 1 950 17 is_stmt 0 view .LVU4350 + 13679 0b9a 674B ldr r3, .L769+12 + 13680 0b9c 0022 movs r2, #0 + 13681 0b9e 5A62 str r2, [r3, #36] + 952:Src/main.c **** task.current_param = task.min_param; + 13682 .loc 1 952 7 is_stmt 1 view .LVU4351 + 13683 0ba0 FFF7FEFF bl Stop_TIM10 + 13684 .LVL1226: + 953:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 13685 .loc 1 953 7 view .LVU4352 + 953:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 13686 .loc 1 953 32 is_stmt 0 view .LVU4353 + 13687 0ba4 654C ldr r4, .L769+16 + 13688 0ba6 D4ED017A vldr.32 s15, [r4, #4] + 953:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 13689 .loc 1 953 26 view .LVU4354 + 13690 0baa C4ED047A vstr.32 s15, [r4, #16] + 954:Src/main.c **** if (task.tau > 3) + 13691 .loc 1 954 7 is_stmt 1 view .LVU4355 + 13692 0bae FCEEE77A vcvt.u32.f32 s15, s15 + 13693 0bb2 17EE903A vmov r3, s15 @ int + 13694 0bb6 99B2 uxth r1, r3 + 13695 0bb8 0220 movs r0, #2 + 13696 0bba FFF7FEFF bl Set_LTEC + 13697 .LVL1227: + 955:Src/main.c **** { + 13698 .loc 1 955 7 view .LVU4356 + 955:Src/main.c **** { + 13699 .loc 1 955 15 is_stmt 0 view .LVU4357 + 13700 0bbe E38A ldrh r3, [r4, #22] + 955:Src/main.c **** { + 13701 .loc 1 955 10 view .LVU4358 + 13702 0bc0 032B cmp r3, #3 + 13703 0bc2 0CD9 bls .L722 + 957:Src/main.c **** htim10.Init.Period = 9999; + 13704 .loc 1 957 8 is_stmt 1 view .LVU4359 + 957:Src/main.c **** htim10.Init.Period = 9999; + 13705 .loc 1 957 34 is_stmt 0 view .LVU4360 + 13706 0bc4 594A ldr r2, .L769 + 13707 0bc6 D068 ldr r0, [r2, #12] + 957:Src/main.c **** htim10.Init.Period = 9999; + 13708 .loc 1 957 21 view .LVU4361 + 13709 0bc8 5D49 ldr r1, .L769+20 + 13710 0bca 0860 str r0, [r1] + 958:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 13711 .loc 1 958 8 is_stmt 1 view .LVU4362 + ARM GAS /tmp/ccLSPxIe.s page 669 -1029:Src/main.c **** break; - 13217 .loc 1 1029 5 view .LVU4263 -1029:Src/main.c **** break; - 13218 .loc 1 1029 31 is_stmt 0 view .LVU4264 - 13219 0b94 254B ldr r3, .L700+92 - 13220 0b96 0022 movs r2, #0 - 13221 0b98 1A70 strb r2, [r3] -1030:Src/main.c **** } - 13222 .loc 1 1030 4 is_stmt 1 view .LVU4265 - 13223 0b9a FFF7C6BA b .L664 - 13224 .LVL1186: - 13225 .L678: - 990:Src/main.c **** { - 13226 .loc 1 990 3 is_stmt 0 view .LVU4266 - 13227 0b9e 0023 movs r3, #0 - 13228 0ba0 F3E7 b .L663 - 13229 .L681: -1032:Src/main.c **** { - 13230 .loc 1 1032 28 discriminator 1 view .LVU4267 - 13231 0ba2 1D4B ldr r3, .L700+72 - 13232 0ba4 1B68 ldr r3, [r3] - 13233 0ba6 224A ldr r2, .L700+96 - 13234 0ba8 1268 ldr r2, [r2] - 13235 0baa 9B1A subs r3, r3, r2 -1032:Src/main.c **** { - 13236 .loc 1 1032 21 discriminator 1 view .LVU4268 - 13237 0bac 642B cmp r3, #100 - 13238 0bae 7FF6C1AA bls .L597 -1034:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 13239 .loc 1 1034 4 is_stmt 1 view .LVU4269 -1034:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 13240 .loc 1 1034 18 is_stmt 0 view .LVU4270 - 13241 0bb2 0022 movs r2, #0 - 13242 0bb4 1F4B ldr r3, .L700+100 - 13243 0bb6 1A80 strh r2, [r3] @ movhi -1035:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 13244 .loc 1 1035 4 is_stmt 1 view .LVU4271 -1035:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 13245 .loc 1 1035 14 is_stmt 0 view .LVU4272 - 13246 0bb8 1F49 ldr r1, .L700+104 - 13247 0bba 0B78 ldrb r3, [r1] @ zero_extendqisi2 -1035:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 13248 .loc 1 1035 18 view .LVU4273 - 13249 0bbc 43F00203 orr r3, r3, #2 - 13250 0bc0 0B70 strb r3, [r1] -1036:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 13251 .loc 1 1036 4 is_stmt 1 view .LVU4274 -1036:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 13252 .loc 1 1036 30 is_stmt 0 view .LVU4275 - 13253 0bc2 1A4B ldr r3, .L700+92 - 13254 0bc4 0121 movs r1, #1 - 13255 0bc6 1970 strb r1, [r3] -1037:Src/main.c **** } - 13256 .loc 1 1037 4 is_stmt 1 view .LVU4276 -1037:Src/main.c **** } - 13257 .loc 1 1037 12 is_stmt 0 view .LVU4277 - 13258 0bc8 1C4B ldr r3, .L700+108 - ARM GAS /tmp/ccuHnxNu.s page 656 + 958:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 13712 .loc 1 958 27 is_stmt 0 view .LVU4363 + 13713 0bcc 42F20F71 movw r1, #9999 + 13714 0bd0 D160 str r1, [r2, #12] + 959:Src/main.c **** } + 13715 .loc 1 959 8 is_stmt 1 view .LVU4364 + 959:Src/main.c **** } + 13716 .loc 1 959 33 is_stmt 0 view .LVU4365 + 13717 0bd2 013B subs r3, r3, #1 + 959:Src/main.c **** } + 13718 .loc 1 959 38 view .LVU4366 + 13719 0bd4 6422 movs r2, #100 + 13720 0bd6 02FB03F3 mul r3, r2, r3 + 959:Src/main.c **** } + 13721 .loc 1 959 21 view .LVU4367 + 13722 0bda 5A4A ldr r2, .L769+24 + 13723 0bdc 1360 str r3, [r2] + 13724 .L722: + 961:Src/main.c **** + 13725 .loc 1 961 7 is_stmt 1 view .LVU4368 + 13726 0bde 5348 ldr r0, .L769 + 13727 0be0 FFF7FEFF bl HAL_TIM_Base_Start_IT + 13728 .LVL1228: +1009:Src/main.c **** case TT_CHANGE_TEMP_1: + 13729 .loc 1 1009 6 view .LVU4369 + 13730 0be4 FAE5 b .L707 + 13731 .LVL1229: + 13732 .L757: +1009:Src/main.c **** case TT_CHANGE_TEMP_1: + 13733 .loc 1 1009 6 is_stmt 0 view .LVU4370 + 13734 .LBE721: +1020:Src/main.c **** + 13735 .loc 1 1020 7 is_stmt 1 view .LVU4371 +1020:Src/main.c **** + 13736 .loc 1 1020 18 is_stmt 0 view .LVU4372 + 13737 0be6 584A ldr r2, .L769+28 + 13738 0be8 1360 str r3, [r2] +1022:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 13739 .loc 1 1022 7 is_stmt 1 view .LVU4373 +1022:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 13740 .loc 1 1022 25 is_stmt 0 view .LVU4374 + 13741 0bea 0120 movs r0, #1 + 13742 0bec FFF7FEFF bl MPhD_T + 13743 .LVL1230: +1022:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 13744 .loc 1 1022 23 discriminator 1 view .LVU4375 + 13745 0bf0 564E ldr r6, .L769+32 + 13746 0bf2 3081 strh r0, [r6, #8] @ movhi +1023:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 13747 .loc 1 1023 7 is_stmt 1 view .LVU4376 +1023:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 13748 .loc 1 1023 25 is_stmt 0 view .LVU4377 + 13749 0bf4 0120 movs r0, #1 + 13750 0bf6 FFF7FEFF bl MPhD_T + 13751 .LVL1231: +1023:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 13752 .loc 1 1023 23 discriminator 1 view .LVU4378 + ARM GAS /tmp/ccLSPxIe.s page 670 - 13259 0bca 1A70 strb r2, [r3] - 13260 0bcc FFF7B2BA b .L597 - 13261 .L701: - 13262 .align 2 - 13263 .L700: - 13264 0bd0 00000000 .word task - 13265 0bd4 00000000 .word LD1_param - 13266 0bd8 00000000 .word LD2_param - 13267 0bdc 00000000 .word LD1_curr_setup - 13268 0be0 00000000 .word temp16 - 13269 0be4 00000000 .word LD2_curr_setup - 13270 0be8 00000000 .word LD_blinker - 13271 0bec 00040240 .word 1073873920 - 13272 0bf0 00040140 .word 1073808384 - 13273 0bf4 00000000 .word htim8 - 13274 0bf8 000C0240 .word 1073875968 - 13275 0bfc 00000000 .word htim10 - 13276 0c00 00000000 .word TIM10_coflag - 13277 0c04 00000000 .word TO10 - 13278 0c08 00000000 .word TIM10_period - 13279 0c0c 00000000 .word TO10_counter - 13280 0c10 00000000 .word TO7_before - 13281 0c14 00000000 .word Long_Data - 13282 0c18 00000000 .word TO6 - 13283 0c1c 00000000 .word TO6_stop - 13284 0c20 02000000 .word Long_Data+2 - 13285 0c24 00000000 .word CS_result - 13286 0c28 00000000 .word UART_DATA - 13287 0c2c 00000000 .word UART_transmission_request - 13288 0c30 00000000 .word TO6_uart - 13289 0c34 00000000 .word UART_rec_incr - 13290 0c38 00000000 .word State_Data - 13291 0c3c 00000000 .word flg_tmt - 13292 .cfi_endproc - 13293 .LFE1186: - 13295 .section .rodata.ad9102_example2_regval,"a" - 13296 .align 2 - 13299 ad9102_example2_regval: - 13300 0000 0000 .short 0 - 13301 0002 000E .short 3584 - 13302 0004 0000 .short 0 - 13303 0006 0000 .short 0 - 13304 0008 0000 .short 0 - 13305 000a 0000 .short 0 - 13306 000c 0000 .short 0 - 13307 000e 0040 .short 16384 - 13308 0010 0000 .short 0 - 13309 0012 0000 .short 0 - 13310 0014 0000 .short 0 - 13311 0016 0000 .short 0 - 13312 0018 001F .short 7936 - 13313 001a 0000 .short 0 - 13314 001c 0000 .short 0 - 13315 001e 0000 .short 0 - 13316 0020 0E00 .short 14 - 13317 0022 0000 .short 0 - 13318 0024 0000 .short 0 - ARM GAS /tmp/ccuHnxNu.s page 657 + 13753 0bfa 3081 strh r0, [r6, #8] @ movhi +1024:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 13754 .loc 1 1024 7 is_stmt 1 view .LVU4379 +1024:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 13755 .loc 1 1024 25 is_stmt 0 view .LVU4380 + 13756 0bfc 0220 movs r0, #2 + 13757 0bfe FFF7FEFF bl MPhD_T + 13758 .LVL1232: +1024:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 13759 .loc 1 1024 23 discriminator 1 view .LVU4381 + 13760 0c02 534F ldr r7, .L769+36 + 13761 0c04 3881 strh r0, [r7, #8] @ movhi +1025:Src/main.c **** + 13762 .loc 1 1025 7 is_stmt 1 view .LVU4382 +1025:Src/main.c **** + 13763 .loc 1 1025 25 is_stmt 0 view .LVU4383 + 13764 0c06 0220 movs r0, #2 + 13765 0c08 FFF7FEFF bl MPhD_T + 13766 .LVL1233: +1025:Src/main.c **** + 13767 .loc 1 1025 23 discriminator 1 view .LVU4384 + 13768 0c0c 3881 strh r0, [r7, #8] @ movhi +1027:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 13769 .loc 1 1027 7 is_stmt 1 view .LVU4385 +1027:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 13770 .loc 1 1027 31 is_stmt 0 view .LVU4386 + 13771 0c0e 3389 ldrh r3, [r6, #8] +1027:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 13772 .loc 1 1027 20 view .LVU4387 + 13773 0c10 504C ldr r4, .L769+40 + 13774 0c12 6380 strh r3, [r4, #2] @ movhi +1028:Src/main.c **** + 13775 .loc 1 1028 7 is_stmt 1 view .LVU4388 +1028:Src/main.c **** + 13776 .loc 1 1028 20 is_stmt 0 view .LVU4389 + 13777 0c14 A080 strh r0, [r4, #4] @ movhi +1032:Src/main.c **** temp16 = Get_ADC(1); + 13778 .loc 1 1032 7 is_stmt 1 view .LVU4390 +1032:Src/main.c **** temp16 = Get_ADC(1); + 13779 .loc 1 1032 16 is_stmt 0 view .LVU4391 + 13780 0c16 0020 movs r0, #0 + 13781 0c18 FFF7FEFF bl Get_ADC + 13782 .LVL1234: +1032:Src/main.c **** temp16 = Get_ADC(1); + 13783 .loc 1 1032 14 discriminator 1 view .LVU4392 + 13784 0c1c 4E4D ldr r5, .L769+44 + 13785 0c1e 2880 strh r0, [r5] @ movhi +1033:Src/main.c **** Long_Data[7] = temp16; + 13786 .loc 1 1033 7 is_stmt 1 view .LVU4393 +1033:Src/main.c **** Long_Data[7] = temp16; + 13787 .loc 1 1033 16 is_stmt 0 view .LVU4394 + 13788 0c20 0120 movs r0, #1 + 13789 0c22 FFF7FEFF bl Get_ADC + 13790 .LVL1235: +1033:Src/main.c **** Long_Data[7] = temp16; + 13791 .loc 1 1033 14 discriminator 1 view .LVU4395 + 13792 0c26 2880 strh r0, [r5] @ movhi + ARM GAS /tmp/ccLSPxIe.s page 671 - 13319 0026 0000 .short 0 - 13320 0028 0000 .short 0 - 13321 002a 0000 .short 0 - 13322 002c 3030 .short 12336 - 13323 002e 1101 .short 273 - 13324 0030 FFFF .short -1 - 13325 0032 0000 .short 0 - 13326 0034 0101 .short 257 - 13327 0036 0300 .short 3 - 13328 0038 0000 .short 0 - 13329 003a 0000 .short 0 - 13330 003c 0000 .short 0 - 13331 003e 0000 .short 0 - 13332 0040 0000 .short 0 - 13333 0042 0000 .short 0 - 13334 0044 0000 .short 0 - 13335 0046 0000 .short 0 - 13336 0048 0040 .short 16384 - 13337 004a 0000 .short 0 - 13338 004c 0002 .short 512 - 13339 004e 0000 .short 0 - 13340 0050 0000 .short 0 - 13341 0052 0000 .short 0 - 13342 0054 0000 .short 0 - 13343 0056 0000 .short 0 - 13344 0058 0000 .short 0 - 13345 005a 0000 .short 0 - 13346 005c 0000 .short 0 - 13347 005e 0000 .short 0 - 13348 0060 0000 .short 0 - 13349 0062 0000 .short 0 - 13350 0064 0000 .short 0 - 13351 0066 0000 .short 0 - 13352 0068 0000 .short 0 - 13353 006a 0000 .short 0 - 13354 006c 0000 .short 0 - 13355 006e 0000 .short 0 - 13356 0070 0000 .short 0 - 13357 0072 0000 .short 0 - 13358 0074 0000 .short 0 - 13359 0076 0000 .short 0 - 13360 0078 A00F .short 4000 - 13361 007a 0000 .short 0 - 13362 007c F03F .short 16368 - 13363 007e 0001 .short 256 - 13364 0080 0100 .short 1 - 13365 0082 0100 .short 1 - 13366 .section .rodata.ad9102_example4_regval,"a" - 13367 .align 2 - 13370 ad9102_example4_regval: - 13371 0000 0000 .short 0 - 13372 0002 0000 .short 0 - 13373 0004 0000 .short 0 - 13374 0006 0000 .short 0 - 13375 0008 0000 .short 0 - 13376 000a 0000 .short 0 - 13377 000c 0000 .short 0 - ARM GAS /tmp/ccuHnxNu.s page 658 +1034:Src/main.c **** + 13793 .loc 1 1034 7 is_stmt 1 view .LVU4396 +1034:Src/main.c **** + 13794 .loc 1 1034 20 is_stmt 0 view .LVU4397 + 13795 0c28 E081 strh r0, [r4, #14] @ movhi +1037:Src/main.c **** Long_Data[8] = temp16; + 13796 .loc 1 1037 7 is_stmt 1 view .LVU4398 +1037:Src/main.c **** Long_Data[8] = temp16; + 13797 .loc 1 1037 16 is_stmt 0 view .LVU4399 + 13798 0c2a 0120 movs r0, #1 + 13799 0c2c FFF7FEFF bl Get_ADC + 13800 .LVL1236: +1037:Src/main.c **** Long_Data[8] = temp16; + 13801 .loc 1 1037 14 discriminator 1 view .LVU4400 + 13802 0c30 2880 strh r0, [r5] @ movhi +1038:Src/main.c **** + 13803 .loc 1 1038 7 is_stmt 1 view .LVU4401 +1038:Src/main.c **** + 13804 .loc 1 1038 20 is_stmt 0 view .LVU4402 + 13805 0c32 2082 strh r0, [r4, #16] @ movhi +1041:Src/main.c **** Long_Data[9] = temp16; + 13806 .loc 1 1041 7 is_stmt 1 view .LVU4403 +1041:Src/main.c **** Long_Data[9] = temp16; + 13807 .loc 1 1041 16 is_stmt 0 view .LVU4404 + 13808 0c34 0120 movs r0, #1 + 13809 0c36 FFF7FEFF bl Get_ADC + 13810 .LVL1237: +1041:Src/main.c **** Long_Data[9] = temp16; + 13811 .loc 1 1041 14 discriminator 1 view .LVU4405 + 13812 0c3a 2880 strh r0, [r5] @ movhi +1042:Src/main.c **** + 13813 .loc 1 1042 7 is_stmt 1 view .LVU4406 +1042:Src/main.c **** + 13814 .loc 1 1042 20 is_stmt 0 view .LVU4407 + 13815 0c3c 6082 strh r0, [r4, #18] @ movhi +1045:Src/main.c **** Long_Data[10] = temp16; + 13816 .loc 1 1045 7 is_stmt 1 view .LVU4408 +1045:Src/main.c **** Long_Data[10] = temp16; + 13817 .loc 1 1045 16 is_stmt 0 view .LVU4409 + 13818 0c3e 0120 movs r0, #1 + 13819 0c40 FFF7FEFF bl Get_ADC + 13820 .LVL1238: +1045:Src/main.c **** Long_Data[10] = temp16; + 13821 .loc 1 1045 14 discriminator 1 view .LVU4410 + 13822 0c44 2880 strh r0, [r5] @ movhi +1046:Src/main.c **** + 13823 .loc 1 1046 7 is_stmt 1 view .LVU4411 +1046:Src/main.c **** + 13824 .loc 1 1046 21 is_stmt 0 view .LVU4412 + 13825 0c46 A082 strh r0, [r4, #20] @ movhi +1049:Src/main.c **** Long_Data[11] = temp16; + 13826 .loc 1 1049 7 is_stmt 1 view .LVU4413 +1049:Src/main.c **** Long_Data[11] = temp16; + 13827 .loc 1 1049 16 is_stmt 0 view .LVU4414 + 13828 0c48 0120 movs r0, #1 + 13829 0c4a FFF7FEFF bl Get_ADC + 13830 .LVL1239: + ARM GAS /tmp/ccLSPxIe.s page 672 - 13378 000e 0040 .short 16384 - 13379 0010 0000 .short 0 - 13380 0012 0000 .short 0 - 13381 0014 0000 .short 0 - 13382 0016 0000 .short 0 - 13383 0018 001F .short 7936 - 13384 001a 0000 .short 0 - 13385 001c 0000 .short 0 - 13386 001e 0000 .short 0 - 13387 0020 0E00 .short 14 - 13388 0022 0000 .short 0 - 13389 0024 0000 .short 0 - 13390 0026 0000 .short 0 - 13391 0028 0000 .short 0 - 13392 002a 0000 .short 0 - 13393 002c 1232 .short 12818 - 13394 002e 2101 .short 289 - 13395 0030 FFFF .short -1 - 13396 0032 0000 .short 0 - 13397 0034 0101 .short 257 - 13398 0036 0300 .short 3 - 13399 0038 0000 .short 0 - 13400 003a 0000 .short 0 - 13401 003c 0000 .short 0 - 13402 003e 0000 .short 0 - 13403 0040 0000 .short 0 - 13404 0042 0000 .short 0 - 13405 0044 0000 .short 0 - 13406 0046 0000 .short 0 - 13407 0048 0040 .short 16384 - 13408 004a 0000 .short 0 - 13409 004c 0606 .short 1542 - 13410 004e 9919 .short 6553 - 13411 0050 009A .short -26112 - 13412 0052 0000 .short 0 - 13413 0054 0000 .short 0 - 13414 0056 0000 .short 0 - 13415 0058 0000 .short 0 - 13416 005a 0000 .short 0 - 13417 005c 0000 .short 0 - 13418 005e 0000 .short 0 - 13419 0060 A00F .short 4000 - 13420 0062 0000 .short 0 - 13421 0064 0000 .short 0 - 13422 0066 0000 .short 0 - 13423 0068 0000 .short 0 - 13424 006a 0000 .short 0 - 13425 006c 0000 .short 0 - 13426 006e 0000 .short 0 - 13427 0070 0000 .short 0 - 13428 0072 0000 .short 0 - 13429 0074 0000 .short 0 - 13430 0076 0000 .short 0 - 13431 0078 0000 .short 0 - 13432 007a 0000 .short 0 - 13433 007c 0000 .short 0 - 13434 007e FF16 .short 5887 - ARM GAS /tmp/ccuHnxNu.s page 659 +1049:Src/main.c **** Long_Data[11] = temp16; + 13831 .loc 1 1049 14 discriminator 1 view .LVU4415 + 13832 0c4e 2880 strh r0, [r5] @ movhi +1050:Src/main.c **** temp16 = Get_ADC(2); + 13833 .loc 1 1050 7 is_stmt 1 view .LVU4416 +1050:Src/main.c **** temp16 = Get_ADC(2); + 13834 .loc 1 1050 21 is_stmt 0 view .LVU4417 + 13835 0c50 E082 strh r0, [r4, #22] @ movhi +1051:Src/main.c **** + 13836 .loc 1 1051 7 is_stmt 1 view .LVU4418 +1051:Src/main.c **** + 13837 .loc 1 1051 16 is_stmt 0 view .LVU4419 + 13838 0c52 0220 movs r0, #2 + 13839 0c54 FFF7FEFF bl Get_ADC + 13840 .LVL1240: +1051:Src/main.c **** + 13841 .loc 1 1051 14 discriminator 1 view .LVU4420 + 13842 0c58 2880 strh r0, [r5] @ movhi +1054:Src/main.c **** temp16 = Get_ADC(4); + 13843 .loc 1 1054 7 is_stmt 1 view .LVU4421 +1054:Src/main.c **** temp16 = Get_ADC(4); + 13844 .loc 1 1054 16 is_stmt 0 view .LVU4422 + 13845 0c5a 0320 movs r0, #3 + 13846 0c5c FFF7FEFF bl Get_ADC + 13847 .LVL1241: +1054:Src/main.c **** temp16 = Get_ADC(4); + 13848 .loc 1 1054 14 discriminator 1 view .LVU4423 + 13849 0c60 2880 strh r0, [r5] @ movhi +1055:Src/main.c **** Long_Data[12] = temp16; + 13850 .loc 1 1055 7 is_stmt 1 view .LVU4424 +1055:Src/main.c **** Long_Data[12] = temp16; + 13851 .loc 1 1055 16 is_stmt 0 view .LVU4425 + 13852 0c62 0420 movs r0, #4 + 13853 0c64 FFF7FEFF bl Get_ADC + 13854 .LVL1242: +1055:Src/main.c **** Long_Data[12] = temp16; + 13855 .loc 1 1055 14 discriminator 1 view .LVU4426 + 13856 0c68 2880 strh r0, [r5] @ movhi +1056:Src/main.c **** temp16 = Get_ADC(5); + 13857 .loc 1 1056 7 is_stmt 1 view .LVU4427 +1056:Src/main.c **** temp16 = Get_ADC(5); + 13858 .loc 1 1056 21 is_stmt 0 view .LVU4428 + 13859 0c6a 2083 strh r0, [r4, #24] @ movhi +1057:Src/main.c **** + 13860 .loc 1 1057 7 is_stmt 1 view .LVU4429 +1057:Src/main.c **** + 13861 .loc 1 1057 16 is_stmt 0 view .LVU4430 + 13862 0c6c 0520 movs r0, #5 + 13863 0c6e FFF7FEFF bl Get_ADC + 13864 .LVL1243: +1057:Src/main.c **** + 13865 .loc 1 1057 14 discriminator 1 view .LVU4431 + 13866 0c72 2880 strh r0, [r5] @ movhi +1060:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 13867 .loc 1 1060 7 is_stmt 1 view .LVU4432 +1060:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 13868 .loc 1 1060 16 is_stmt 0 view .LVU4433 + ARM GAS /tmp/ccLSPxIe.s page 673 - 13435 0080 0100 .short 1 - 13436 0082 0100 .short 1 - 13437 .section .rodata.ad9102_reg_addr,"a" - 13438 .align 2 - 13441 ad9102_reg_addr: - 13442 0000 0000 .short 0 - 13443 0002 0100 .short 1 - 13444 0004 0200 .short 2 - 13445 0006 0300 .short 3 - 13446 0008 0400 .short 4 - 13447 000a 0500 .short 5 - 13448 000c 0600 .short 6 - 13449 000e 0700 .short 7 - 13450 0010 0800 .short 8 - 13451 0012 0900 .short 9 - 13452 0014 0A00 .short 10 - 13453 0016 0B00 .short 11 - 13454 0018 0C00 .short 12 - 13455 001a 0D00 .short 13 - 13456 001c 0E00 .short 14 - 13457 001e 1F00 .short 31 - 13458 0020 2000 .short 32 - 13459 0022 2200 .short 34 - 13460 0024 2300 .short 35 - 13461 0026 2400 .short 36 - 13462 0028 2500 .short 37 - 13463 002a 2600 .short 38 - 13464 002c 2700 .short 39 - 13465 002e 2800 .short 40 - 13466 0030 2900 .short 41 - 13467 0032 2A00 .short 42 - 13468 0034 2B00 .short 43 - 13469 0036 2C00 .short 44 - 13470 0038 2D00 .short 45 - 13471 003a 2E00 .short 46 - 13472 003c 2F00 .short 47 - 13473 003e 3000 .short 48 - 13474 0040 3100 .short 49 - 13475 0042 3200 .short 50 - 13476 0044 3300 .short 51 - 13477 0046 3400 .short 52 - 13478 0048 3500 .short 53 - 13479 004a 3600 .short 54 - 13480 004c 3700 .short 55 - 13481 004e 3E00 .short 62 - 13482 0050 3F00 .short 63 - 13483 0052 4000 .short 64 - 13484 0054 4100 .short 65 - 13485 0056 4200 .short 66 - 13486 0058 4300 .short 67 - 13487 005a 4400 .short 68 - 13488 005c 4500 .short 69 - 13489 005e 4700 .short 71 - 13490 0060 5000 .short 80 - 13491 0062 5100 .short 81 - 13492 0064 5200 .short 82 - 13493 0066 5300 .short 83 - ARM GAS /tmp/ccuHnxNu.s page 660 + 13869 0c74 394B ldr r3, .L769+48 + 13870 0c76 1B68 ldr r3, [r3] + 13871 0c78 394A ldr r2, .L769+52 + 13872 0c7a 1360 str r3, [r2] +1061:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 13873 .loc 1 1061 7 is_stmt 1 view .LVU4434 +1061:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 13874 .loc 1 1061 20 is_stmt 0 view .LVU4435 + 13875 0c7c E380 strh r3, [r4, #6] @ movhi +1062:Src/main.c **** + 13876 .loc 1 1062 7 is_stmt 1 view .LVU4436 +1062:Src/main.c **** + 13877 .loc 1 1062 31 is_stmt 0 view .LVU4437 + 13878 0c7e 1B0C lsrs r3, r3, #16 +1062:Src/main.c **** + 13879 .loc 1 1062 20 view .LVU4438 + 13880 0c80 2381 strh r3, [r4, #8] @ movhi +1065:Src/main.c **** + 13881 .loc 1 1065 7 is_stmt 1 view .LVU4439 +1065:Src/main.c **** + 13882 .loc 1 1065 31 is_stmt 0 view .LVU4440 + 13883 0c82 3388 ldrh r3, [r6] +1065:Src/main.c **** + 13884 .loc 1 1065 20 view .LVU4441 + 13885 0c84 6381 strh r3, [r4, #10] @ movhi +1068:Src/main.c **** } + 13886 .loc 1 1068 7 is_stmt 1 view .LVU4442 +1068:Src/main.c **** } + 13887 .loc 1 1068 31 is_stmt 0 view .LVU4443 + 13888 0c86 3B88 ldrh r3, [r7] +1068:Src/main.c **** } + 13889 .loc 1 1068 20 view .LVU4444 + 13890 0c88 A381 strh r3, [r4, #12] @ movhi + 13891 0c8a AEE5 b .L724 + 13892 .L726: +1096:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 13893 .loc 1 1096 5 is_stmt 1 view .LVU4445 +1096:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 13894 .loc 1 1096 17 is_stmt 0 view .LVU4446 + 13895 0c8c 354C ldr r4, .L769+56 + 13896 0c8e 0D21 movs r1, #13 + 13897 0c90 2046 mov r0, r4 + 13898 0c92 FFF7FEFF bl CalculateChecksum + 13899 .LVL1244: +1096:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 13900 .loc 1 1096 15 discriminator 1 view .LVU4447 + 13901 0c96 344B ldr r3, .L769+60 + 13902 0c98 1880 strh r0, [r3] @ movhi +1097:Src/main.c **** + 13903 .loc 1 1097 5 is_stmt 1 view .LVU4448 +1097:Src/main.c **** + 13904 .loc 1 1097 24 is_stmt 0 view .LVU4449 + 13905 0c9a 6083 strh r0, [r4, #26] @ movhi +1099:Src/main.c **** { + 13906 .loc 1 1099 5 is_stmt 1 view .LVU4450 + 13907 .LBB722: +1099:Src/main.c **** { + ARM GAS /tmp/ccLSPxIe.s page 674 - 13494 0068 5400 .short 84 - 13495 006a 5500 .short 85 - 13496 006c 5600 .short 86 - 13497 006e 5700 .short 87 - 13498 0070 5800 .short 88 - 13499 0072 5900 .short 89 - 13500 0074 5A00 .short 90 - 13501 0076 5B00 .short 91 - 13502 0078 5C00 .short 92 - 13503 007a 5D00 .short 93 - 13504 007c 5E00 .short 94 - 13505 007e 5F00 .short 95 - 13506 0080 1E00 .short 30 - 13507 0082 1D00 .short 29 - 13508 .global task - 13509 .section .bss.task,"aw",%nobits - 13510 .align 2 - 13513 task: - 13514 0000 00000000 .space 52 - 13514 00000000 - 13514 00000000 - 13514 00000000 - 13514 00000000 - 13515 .global LD_blinker - 13516 .section .bss.LD_blinker,"aw",%nobits - 13517 .align 2 - 13520 LD_blinker: - 13521 0000 00000000 .space 12 - 13521 00000000 - 13521 00000000 - 13522 .global LD2_param - 13523 .section .bss.LD2_param,"aw",%nobits - 13524 .align 2 - 13527 LD2_param: - 13528 0000 00000000 .space 12 - 13528 00000000 - 13528 00000000 - 13529 .global LD1_param - 13530 .section .bss.LD1_param,"aw",%nobits - 13531 .align 2 - 13534 LD1_param: - 13535 0000 00000000 .space 12 - 13535 00000000 - 13535 00000000 - 13536 .global Def_setup - 13537 .section .bss.Def_setup,"aw",%nobits - 13538 .align 2 - 13541 Def_setup: - 13542 0000 00000000 .space 18 - 13542 00000000 - 13542 00000000 - 13542 00000000 - 13542 0000 - 13543 .global Curr_setup - 13544 .section .bss.Curr_setup,"aw",%nobits - 13545 .align 2 - 13548 Curr_setup: - ARM GAS /tmp/ccuHnxNu.s page 661 + 13908 .loc 1 1099 10 view .LVU4451 + 13909 .LVL1245: +1099:Src/main.c **** { + 13910 .loc 1 1099 19 is_stmt 0 view .LVU4452 + 13911 0c9c 0023 movs r3, #0 +1099:Src/main.c **** { + 13912 .loc 1 1099 5 view .LVU4453 + 13913 0c9e 0BE0 b .L729 + 13914 .LVL1246: + 13915 .L730: +1101:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13916 .loc 1 1101 6 is_stmt 1 view .LVU4454 +1101:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13917 .loc 1 1101 33 is_stmt 0 view .LVU4455 + 13918 0ca0 2C4A ldr r2, .L769+40 + 13919 0ca2 32F81320 ldrh r2, [r2, r3, lsl #1] +1101:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13920 .loc 1 1101 17 view .LVU4456 + 13921 0ca6 5900 lsls r1, r3, #1 +1101:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13922 .loc 1 1101 21 view .LVU4457 + 13923 0ca8 3048 ldr r0, .L769+64 + 13924 0caa 00F81320 strb r2, [r0, r3, lsl #1] +1102:Src/main.c **** } + 13925 .loc 1 1102 6 is_stmt 1 view .LVU4458 +1102:Src/main.c **** } + 13926 .loc 1 1102 19 is_stmt 0 view .LVU4459 + 13927 0cae 0131 adds r1, r1, #1 +1102:Src/main.c **** } + 13928 .loc 1 1102 23 view .LVU4460 + 13929 0cb0 120A lsrs r2, r2, #8 + 13930 0cb2 4254 strb r2, [r0, r1] +1099:Src/main.c **** { + 13931 .loc 1 1099 38 is_stmt 1 discriminator 3 view .LVU4461 + 13932 0cb4 0133 adds r3, r3, #1 + 13933 .LVL1247: +1099:Src/main.c **** { + 13934 .loc 1 1099 38 is_stmt 0 discriminator 3 view .LVU4462 + 13935 0cb6 9BB2 uxth r3, r3 + 13936 .LVL1248: + 13937 .L729: +1099:Src/main.c **** { + 13938 .loc 1 1099 28 is_stmt 1 discriminator 1 view .LVU4463 + 13939 0cb8 0E2B cmp r3, #14 + 13940 0cba F1D9 bls .L730 + 13941 .LBE722: +1109:Src/main.c **** UART_transmission_request = NO_MESS; + 13942 .loc 1 1109 5 view .LVU4464 + 13943 0cbc 1E20 movs r0, #30 + 13944 0cbe FFF7FEFF bl USART_TX_DMA + 13945 .LVL1249: +1110:Src/main.c **** break; + 13946 .loc 1 1110 5 view .LVU4465 +1110:Src/main.c **** break; + 13947 .loc 1 1110 31 is_stmt 0 view .LVU4466 + 13948 0cc2 2B4B ldr r3, .L769+68 + 13949 0cc4 0022 movs r2, #0 + ARM GAS /tmp/ccLSPxIe.s page 675 - 13549 0000 00000000 .space 18 - 13549 00000000 - 13549 00000000 - 13549 00000000 - 13549 0000 - 13550 .global LD2_def_setup - 13551 .section .bss.LD2_def_setup,"aw",%nobits - 13552 .align 2 - 13555 LD2_def_setup: - 13556 0000 00000000 .space 16 - 13556 00000000 - 13556 00000000 - 13556 00000000 - 13557 .global LD1_def_setup - 13558 .section .bss.LD1_def_setup,"aw",%nobits - 13559 .align 2 - 13562 LD1_def_setup: - 13563 0000 00000000 .space 16 - 13563 00000000 - 13563 00000000 - 13563 00000000 - 13564 .global LD2_curr_setup - 13565 .section .bss.LD2_curr_setup,"aw",%nobits - 13566 .align 2 - 13569 LD2_curr_setup: - 13570 0000 00000000 .space 16 - 13570 00000000 - 13570 00000000 - 13570 00000000 - 13571 .global LD1_curr_setup - 13572 .section .bss.LD1_curr_setup,"aw",%nobits - 13573 .align 2 - 13576 LD1_curr_setup: - 13577 0000 00000000 .space 16 - 13577 00000000 - 13577 00000000 - 13577 00000000 - 13578 .global sizeoffile - 13579 .section .bss.sizeoffile,"aw",%nobits - 13580 .align 2 - 13583 sizeoffile: - 13584 0000 00000000 .space 4 - 13585 .global fgoto - 13586 .section .bss.fgoto,"aw",%nobits - 13587 .align 2 - 13590 fgoto: - 13591 0000 00000000 .space 4 - 13592 .global test - 13593 .section .bss.test,"aw",%nobits - 13594 .align 2 - 13597 test: - 13598 0000 00000000 .space 4 - 13599 .global fresult - 13600 .section .bss.fresult,"aw",%nobits - 13603 fresult: - 13604 0000 00 .space 1 - 13605 .global COMMAND - ARM GAS /tmp/ccuHnxNu.s page 662 + 13950 0cc6 1A70 strb r2, [r3] +1111:Src/main.c **** case MESS_03://Transmith saved packet + 13951 .loc 1 1111 4 is_stmt 1 view .LVU4467 + 13952 0cc8 FFF72FBA b .L728 + 13953 .LVL1250: + 13954 .L731: + 13955 .LBB723: +1115:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13956 .loc 1 1115 6 view .LVU4468 +1115:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13957 .loc 1 1115 33 is_stmt 0 view .LVU4469 + 13958 0ccc 214A ldr r2, .L769+40 + 13959 0cce 32F81320 ldrh r2, [r2, r3, lsl #1] +1115:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13960 .loc 1 1115 17 view .LVU4470 + 13961 0cd2 5900 lsls r1, r3, #1 +1115:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 13962 .loc 1 1115 21 view .LVU4471 + 13963 0cd4 2548 ldr r0, .L769+64 + 13964 0cd6 00F81320 strb r2, [r0, r3, lsl #1] +1116:Src/main.c **** } + 13965 .loc 1 1116 6 is_stmt 1 view .LVU4472 +1116:Src/main.c **** } + 13966 .loc 1 1116 19 is_stmt 0 view .LVU4473 + 13967 0cda 0131 adds r1, r1, #1 +1116:Src/main.c **** } + 13968 .loc 1 1116 23 view .LVU4474 + 13969 0cdc 120A lsrs r2, r2, #8 + 13970 0cde 4254 strb r2, [r0, r1] +1113:Src/main.c **** { + 13971 .loc 1 1113 38 is_stmt 1 discriminator 3 view .LVU4475 + 13972 0ce0 0133 adds r3, r3, #1 + 13973 .LVL1251: +1113:Src/main.c **** { + 13974 .loc 1 1113 38 is_stmt 0 discriminator 3 view .LVU4476 + 13975 0ce2 9BB2 uxth r3, r3 + 13976 .LVL1252: + 13977 .L727: +1113:Src/main.c **** { + 13978 .loc 1 1113 28 is_stmt 1 discriminator 1 view .LVU4477 + 13979 0ce4 0E2B cmp r3, #14 + 13980 0ce6 F1D9 bls .L731 + 13981 .LBE723: +1122:Src/main.c **** UART_transmission_request = NO_MESS; + 13982 .loc 1 1122 5 view .LVU4478 + 13983 0ce8 1E20 movs r0, #30 + 13984 0cea FFF7FEFF bl USART_TX_DMA + 13985 .LVL1253: +1123:Src/main.c **** break; + 13986 .loc 1 1123 5 view .LVU4479 +1123:Src/main.c **** break; + 13987 .loc 1 1123 31 is_stmt 0 view .LVU4480 + 13988 0cee 204B ldr r3, .L769+68 + 13989 0cf0 0022 movs r2, #0 + 13990 0cf2 1A70 strb r2, [r3] +1124:Src/main.c **** } + 13991 .loc 1 1124 4 is_stmt 1 view .LVU4481 + ARM GAS /tmp/ccLSPxIe.s page 676 - 13606 .section .bss.COMMAND,"aw",%nobits - 13607 .align 2 - 13610 COMMAND: - 13611 0000 00000000 .space 30 - 13611 00000000 - 13611 00000000 - 13611 00000000 - 13611 00000000 - 13612 .global Long_Data - 13613 .section .bss.Long_Data,"aw",%nobits - 13614 .align 2 - 13617 Long_Data: - 13618 0000 00000000 .space 30 - 13618 00000000 - 13618 00000000 - 13618 00000000 - 13618 00000000 - 13619 .global temp16 - 13620 .section .bss.temp16,"aw",%nobits - 13621 .align 1 - 13624 temp16: - 13625 0000 0000 .space 2 - 13626 .global CS_result - 13627 .section .bss.CS_result,"aw",%nobits - 13628 .align 1 - 13631 CS_result: - 13632 0000 0000 .space 2 - 13633 .global UART_header - 13634 .section .bss.UART_header,"aw",%nobits - 13635 .align 1 - 13638 UART_header: - 13639 0000 0000 .space 2 - 13640 .global UART_rec_incr - 13641 .section .bss.UART_rec_incr,"aw",%nobits - 13642 .align 1 - 13645 UART_rec_incr: - 13646 0000 0000 .space 2 - 13647 .global TIM10_coflag - 13648 .section .bss.TIM10_coflag,"aw",%nobits - 13651 TIM10_coflag: - 13652 0000 00 .space 1 - 13653 .global u_rx_flg - 13654 .section .bss.u_rx_flg,"aw",%nobits - 13657 u_rx_flg: - 13658 0000 00 .space 1 - 13659 .global u_tx_flg - 13660 .section .bss.u_tx_flg,"aw",%nobits - 13663 u_tx_flg: - 13664 0000 00 .space 1 - 13665 .global flg_tmt - 13666 .section .bss.flg_tmt,"aw",%nobits - 13669 flg_tmt: - 13670 0000 00 .space 1 - 13671 .global UART_DATA - 13672 .section .bss.UART_DATA,"aw",%nobits - 13673 .align 2 - 13676 UART_DATA: - ARM GAS /tmp/ccuHnxNu.s page 663 + 13992 0cf4 FFF719BA b .L728 + 13993 .LVL1254: + 13994 .L742: +1084:Src/main.c **** { + 13995 .loc 1 1084 3 is_stmt 0 view .LVU4482 + 13996 0cf8 0023 movs r3, #0 + 13997 0cfa F3E7 b .L727 + 13998 .L745: +1126:Src/main.c **** { + 13999 .loc 1 1126 28 discriminator 1 view .LVU4483 + 14000 0cfc 174B ldr r3, .L769+48 + 14001 0cfe 1B68 ldr r3, [r3] + 14002 0d00 1C4A ldr r2, .L769+72 + 14003 0d02 1268 ldr r2, [r2] + 14004 0d04 9B1A subs r3, r3, r2 +1126:Src/main.c **** { + 14005 .loc 1 1126 21 discriminator 1 view .LVU4484 + 14006 0d06 642B cmp r3, #100 + 14007 0d08 7FF614AA bls .L647 +1128:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 14008 .loc 1 1128 4 is_stmt 1 view .LVU4485 +1128:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 14009 .loc 1 1128 18 is_stmt 0 view .LVU4486 + 14010 0d0c 0022 movs r2, #0 + 14011 0d0e 1A4B ldr r3, .L769+76 + 14012 0d10 1A80 strh r2, [r3] @ movhi +1129:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 14013 .loc 1 1129 4 is_stmt 1 view .LVU4487 +1129:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 14014 .loc 1 1129 14 is_stmt 0 view .LVU4488 + 14015 0d12 1A49 ldr r1, .L769+80 + 14016 0d14 0B78 ldrb r3, [r1] @ zero_extendqisi2 +1129:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 14017 .loc 1 1129 18 view .LVU4489 + 14018 0d16 43F00203 orr r3, r3, #2 + 14019 0d1a 0B70 strb r3, [r1] +1130:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 14020 .loc 1 1130 4 is_stmt 1 view .LVU4490 +1130:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 14021 .loc 1 1130 30 is_stmt 0 view .LVU4491 + 14022 0d1c 144B ldr r3, .L769+68 + 14023 0d1e 0121 movs r1, #1 + 14024 0d20 1970 strb r1, [r3] +1131:Src/main.c **** } + 14025 .loc 1 1131 4 is_stmt 1 view .LVU4492 +1131:Src/main.c **** } + 14026 .loc 1 1131 12 is_stmt 0 view .LVU4493 + 14027 0d22 174B ldr r3, .L769+84 + 14028 0d24 1A70 strb r2, [r3] + 14029 0d26 FFF705BA b .L647 + 14030 .L770: + 14031 0d2a 00BF .align 2 + 14032 .L769: + 14033 0d2c 00000000 .word htim10 + 14034 0d30 000C0240 .word 1073875968 + 14035 0d34 00000000 .word htim8 + 14036 0d38 00040140 .word 1073808384 + ARM GAS /tmp/ccLSPxIe.s page 677 - 13677 0000 00000000 .space 30 - 13677 00000000 - 13677 00000000 - 13677 00000000 - 13677 00000000 - 13678 .global State_Data - 13679 .section .bss.State_Data,"aw",%nobits - 13680 .align 2 - 13683 State_Data: - 13684 0000 0000 .space 2 - 13685 .global UART_transmission_request - 13686 .section .bss.UART_transmission_request,"aw",%nobits - 13689 UART_transmission_request: - 13690 0000 00 .space 1 - 13691 .global CPU_state_old - 13692 .section .bss.CPU_state_old,"aw",%nobits - 13695 CPU_state_old: - 13696 0000 00 .space 1 - 13697 .global CPU_state - 13698 .section .bss.CPU_state,"aw",%nobits - 13701 CPU_state: - 13702 0000 00 .space 1 - 13703 .global uart_buf - 13704 .section .bss.uart_buf,"aw",%nobits - 13707 uart_buf: - 13708 0000 00 .space 1 - 13709 .global TIM10_period - 13710 .section .bss.TIM10_period,"aw",%nobits - 13711 .align 2 - 13714 TIM10_period: - 13715 0000 00000000 .space 4 - 13716 .global TO10_counter - 13717 .section .bss.TO10_counter,"aw",%nobits - 13718 .align 2 - 13721 TO10_counter: - 13722 0000 00000000 .space 4 - 13723 .global TO10 - 13724 .section .bss.TO10,"aw",%nobits - 13725 .align 2 - 13728 TO10: - 13729 0000 00000000 .space 4 - 13730 .global TO7_PID - 13731 .section .bss.TO7_PID,"aw",%nobits - 13732 .align 2 - 13735 TO7_PID: - 13736 0000 00000000 .space 4 - 13737 .global TO7_before - 13738 .section .bss.TO7_before,"aw",%nobits - 13739 .align 2 - 13742 TO7_before: - 13743 0000 00000000 .space 4 - 13744 .global TO7 - 13745 .section .bss.TO7,"aw",%nobits - 13746 .align 2 - 13749 TO7: - 13750 0000 00000000 .space 4 - 13751 .global temp32 - ARM GAS /tmp/ccuHnxNu.s page 664 + 14037 0d3c 00000000 .word task + 14038 0d40 00000000 .word TIM10_period + 14039 0d44 00000000 .word TO10_counter + 14040 0d48 00000000 .word TO7_before + 14041 0d4c 00000000 .word LD1_param + 14042 0d50 00000000 .word LD2_param + 14043 0d54 00000000 .word Long_Data + 14044 0d58 00000000 .word temp16 + 14045 0d5c 00000000 .word TO6 + 14046 0d60 00000000 .word TO6_stop + 14047 0d64 02000000 .word Long_Data+2 + 14048 0d68 00000000 .word CS_result + 14049 0d6c 00000000 .word UART_DATA + 14050 0d70 00000000 .word UART_transmission_request + 14051 0d74 00000000 .word TO6_uart + 14052 0d78 00000000 .word UART_rec_incr + 14053 0d7c 00000000 .word State_Data + 14054 0d80 00000000 .word flg_tmt + 14055 .cfi_endproc + 14056 .LFE1186: + 14058 .section .bss.ad9102_wave_written_samples,"aw",%nobits + 14059 .align 1 + 14062 ad9102_wave_written_samples: + 14063 0000 0000 .space 2 + 14064 .section .bss.ad9102_wave_expected_samples,"aw",%nobits + 14065 .align 1 + 14068 ad9102_wave_expected_samples: + 14069 0000 0000 .space 2 + 14070 .section .bss.ad9102_wave_upload_active,"aw",%nobits + 14073 ad9102_wave_upload_active: + 14074 0000 00 .space 1 + 14075 .section .rodata.ad9102_example2_regval,"a" + 14076 .align 2 + 14079 ad9102_example2_regval: + 14080 0000 0000 .short 0 + 14081 0002 000E .short 3584 + 14082 0004 0000 .short 0 + 14083 0006 0000 .short 0 + 14084 0008 0000 .short 0 + 14085 000a 0000 .short 0 + 14086 000c 0000 .short 0 + 14087 000e 0040 .short 16384 + 14088 0010 0000 .short 0 + 14089 0012 0000 .short 0 + 14090 0014 0000 .short 0 + 14091 0016 0000 .short 0 + 14092 0018 001F .short 7936 + 14093 001a 0000 .short 0 + 14094 001c 0000 .short 0 + 14095 001e 0000 .short 0 + 14096 0020 0E00 .short 14 + 14097 0022 0000 .short 0 + 14098 0024 0000 .short 0 + 14099 0026 0000 .short 0 + 14100 0028 0000 .short 0 + 14101 002a 0000 .short 0 + 14102 002c 3030 .short 12336 + ARM GAS /tmp/ccLSPxIe.s page 678 - 13752 .section .bss.temp32,"aw",%nobits - 13753 .align 2 - 13756 temp32: - 13757 0000 00000000 .space 4 - 13758 .global SD_SLIDE - 13759 .section .bss.SD_SLIDE,"aw",%nobits - 13760 .align 2 - 13763 SD_SLIDE: - 13764 0000 00000000 .space 4 - 13765 .global SD_SEEK - 13766 .section .bss.SD_SEEK,"aw",%nobits - 13767 .align 2 - 13770 SD_SEEK: - 13771 0000 00000000 .space 4 - 13772 .global TO6_uart - 13773 .section .bss.TO6_uart,"aw",%nobits - 13774 .align 2 - 13777 TO6_uart: - 13778 0000 00000000 .space 4 - 13779 .global TO6_stop - 13780 .section .bss.TO6_stop,"aw",%nobits - 13781 .align 2 - 13784 TO6_stop: - 13785 0000 00000000 .space 4 - 13786 .global TO6_before - 13787 .section .bss.TO6_before,"aw",%nobits - 13788 .align 2 - 13791 TO6_before: - 13792 0000 00000000 .space 4 - 13793 .global TO6 - 13794 .section .bss.TO6,"aw",%nobits - 13795 .align 2 - 13798 TO6: - 13799 0000 00000000 .space 4 - 13800 .global huart8 - 13801 .section .bss.huart8,"aw",%nobits - 13802 .align 2 - 13805 huart8: - 13806 0000 00000000 .space 136 - 13806 00000000 - 13806 00000000 - 13806 00000000 - 13806 00000000 - 13807 .global htim11 - 13808 .section .bss.htim11,"aw",%nobits - 13809 .align 2 - 13812 htim11: - 13813 0000 00000000 .space 76 - 13813 00000000 - 13813 00000000 - 13813 00000000 - 13813 00000000 - 13814 .global htim10 - 13815 .section .bss.htim10,"aw",%nobits - 13816 .align 2 - 13819 htim10: - 13820 0000 00000000 .space 76 - ARM GAS /tmp/ccuHnxNu.s page 665 + 14103 002e 1101 .short 273 + 14104 0030 FFFF .short -1 + 14105 0032 0000 .short 0 + 14106 0034 0101 .short 257 + 14107 0036 0300 .short 3 + 14108 0038 0000 .short 0 + 14109 003a 0000 .short 0 + 14110 003c 0000 .short 0 + 14111 003e 0000 .short 0 + 14112 0040 0000 .short 0 + 14113 0042 0000 .short 0 + 14114 0044 0000 .short 0 + 14115 0046 0000 .short 0 + 14116 0048 0040 .short 16384 + 14117 004a 0000 .short 0 + 14118 004c 0002 .short 512 + 14119 004e 0000 .short 0 + 14120 0050 0000 .short 0 + 14121 0052 0000 .short 0 + 14122 0054 0000 .short 0 + 14123 0056 0000 .short 0 + 14124 0058 0000 .short 0 + 14125 005a 0000 .short 0 + 14126 005c 0000 .short 0 + 14127 005e 0000 .short 0 + 14128 0060 0000 .short 0 + 14129 0062 0000 .short 0 + 14130 0064 0000 .short 0 + 14131 0066 0000 .short 0 + 14132 0068 0000 .short 0 + 14133 006a 0000 .short 0 + 14134 006c 0000 .short 0 + 14135 006e 0000 .short 0 + 14136 0070 0000 .short 0 + 14137 0072 0000 .short 0 + 14138 0074 0000 .short 0 + 14139 0076 0000 .short 0 + 14140 0078 A00F .short 4000 + 14141 007a 0000 .short 0 + 14142 007c F03F .short 16368 + 14143 007e 0001 .short 256 + 14144 0080 0100 .short 1 + 14145 0082 0100 .short 1 + 14146 .section .rodata.ad9102_example4_regval,"a" + 14147 .align 2 + 14150 ad9102_example4_regval: + 14151 0000 0000 .short 0 + 14152 0002 0000 .short 0 + 14153 0004 0000 .short 0 + 14154 0006 0000 .short 0 + 14155 0008 0000 .short 0 + 14156 000a 0000 .short 0 + 14157 000c 0000 .short 0 + 14158 000e 0040 .short 16384 + 14159 0010 0000 .short 0 + 14160 0012 0000 .short 0 + 14161 0014 0000 .short 0 + ARM GAS /tmp/ccLSPxIe.s page 679 - 13820 00000000 - 13820 00000000 - 13820 00000000 - 13820 00000000 - 13821 .global htim1 - 13822 .section .bss.htim1,"aw",%nobits - 13823 .align 2 - 13826 htim1: - 13827 0000 00000000 .space 76 - 13827 00000000 - 13827 00000000 - 13827 00000000 - 13827 00000000 - 13828 .global htim8 - 13829 .section .bss.htim8,"aw",%nobits - 13830 .align 2 - 13833 htim8: - 13834 0000 00000000 .space 76 - 13834 00000000 - 13834 00000000 - 13834 00000000 - 13834 00000000 - 13835 .global htim4 - 13836 .section .bss.htim4,"aw",%nobits - 13837 .align 2 - 13840 htim4: - 13841 0000 00000000 .space 76 - 13841 00000000 - 13841 00000000 - 13841 00000000 - 13841 00000000 - 13842 .global hsd1 - 13843 .section .bss.hsd1,"aw",%nobits - 13844 .align 2 - 13847 hsd1: - 13848 0000 00000000 .space 132 - 13848 00000000 - 13848 00000000 - 13848 00000000 - 13848 00000000 - 13849 .global hadc3 - 13850 .section .bss.hadc3,"aw",%nobits - 13851 .align 2 - 13854 hadc3: - 13855 0000 00000000 .space 72 - 13855 00000000 - 13855 00000000 - 13855 00000000 - 13855 00000000 - 13856 .global hadc1 - 13857 .section .bss.hadc1,"aw",%nobits - 13858 .align 2 - 13861 hadc1: - 13862 0000 00000000 .space 72 - 13862 00000000 - 13862 00000000 - 13862 00000000 - ARM GAS /tmp/ccuHnxNu.s page 666 + 14162 0016 0000 .short 0 + 14163 0018 001F .short 7936 + 14164 001a 0000 .short 0 + 14165 001c 0000 .short 0 + 14166 001e 0000 .short 0 + 14167 0020 0E00 .short 14 + 14168 0022 0000 .short 0 + 14169 0024 0000 .short 0 + 14170 0026 0000 .short 0 + 14171 0028 0000 .short 0 + 14172 002a 0000 .short 0 + 14173 002c 1232 .short 12818 + 14174 002e 2101 .short 289 + 14175 0030 FFFF .short -1 + 14176 0032 0000 .short 0 + 14177 0034 0101 .short 257 + 14178 0036 0300 .short 3 + 14179 0038 0000 .short 0 + 14180 003a 0000 .short 0 + 14181 003c 0000 .short 0 + 14182 003e 0000 .short 0 + 14183 0040 0000 .short 0 + 14184 0042 0000 .short 0 + 14185 0044 0000 .short 0 + 14186 0046 0000 .short 0 + 14187 0048 0040 .short 16384 + 14188 004a 0000 .short 0 + 14189 004c 0606 .short 1542 + 14190 004e 9919 .short 6553 + 14191 0050 009A .short -26112 + 14192 0052 0000 .short 0 + 14193 0054 0000 .short 0 + 14194 0056 0000 .short 0 + 14195 0058 0000 .short 0 + 14196 005a 0000 .short 0 + 14197 005c 0000 .short 0 + 14198 005e 0000 .short 0 + 14199 0060 A00F .short 4000 + 14200 0062 0000 .short 0 + 14201 0064 0000 .short 0 + 14202 0066 0000 .short 0 + 14203 0068 0000 .short 0 + 14204 006a 0000 .short 0 + 14205 006c 0000 .short 0 + 14206 006e 0000 .short 0 + 14207 0070 0000 .short 0 + 14208 0072 0000 .short 0 + 14209 0074 0000 .short 0 + 14210 0076 0000 .short 0 + 14211 0078 0000 .short 0 + 14212 007a 0000 .short 0 + 14213 007c 0000 .short 0 + 14214 007e FF16 .short 5887 + 14215 0080 0100 .short 1 + 14216 0082 0100 .short 1 + 14217 .section .rodata.ad9102_reg_addr,"a" + 14218 .align 2 + ARM GAS /tmp/ccLSPxIe.s page 680 - 13862 00000000 - 13863 .text - 13864 .Letext0: - 13865 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" - 13866 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 13867 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - 13868 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" - 13869 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" - 13870 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" - 13871 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" - 13872 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" - 13873 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" - 13874 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" - 13875 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" - 13876 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" - 13877 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" - 13878 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - 13879 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h" - 13880 .file 24 "Inc/main.h" - 13881 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h" - 13882 .file 26 "Inc/File_Handling.h" - 13883 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" - 13884 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - 13885 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h" - 13886 .file 30 "Inc/fatfs.h" - 13887 .file 31 "" - ARM GAS /tmp/ccuHnxNu.s page 667 + 14221 ad9102_reg_addr: + 14222 0000 0000 .short 0 + 14223 0002 0100 .short 1 + 14224 0004 0200 .short 2 + 14225 0006 0300 .short 3 + 14226 0008 0400 .short 4 + 14227 000a 0500 .short 5 + 14228 000c 0600 .short 6 + 14229 000e 0700 .short 7 + 14230 0010 0800 .short 8 + 14231 0012 0900 .short 9 + 14232 0014 0A00 .short 10 + 14233 0016 0B00 .short 11 + 14234 0018 0C00 .short 12 + 14235 001a 0D00 .short 13 + 14236 001c 0E00 .short 14 + 14237 001e 1F00 .short 31 + 14238 0020 2000 .short 32 + 14239 0022 2200 .short 34 + 14240 0024 2300 .short 35 + 14241 0026 2400 .short 36 + 14242 0028 2500 .short 37 + 14243 002a 2600 .short 38 + 14244 002c 2700 .short 39 + 14245 002e 2800 .short 40 + 14246 0030 2900 .short 41 + 14247 0032 2A00 .short 42 + 14248 0034 2B00 .short 43 + 14249 0036 2C00 .short 44 + 14250 0038 2D00 .short 45 + 14251 003a 2E00 .short 46 + 14252 003c 2F00 .short 47 + 14253 003e 3000 .short 48 + 14254 0040 3100 .short 49 + 14255 0042 3200 .short 50 + 14256 0044 3300 .short 51 + 14257 0046 3400 .short 52 + 14258 0048 3500 .short 53 + 14259 004a 3600 .short 54 + 14260 004c 3700 .short 55 + 14261 004e 3E00 .short 62 + 14262 0050 3F00 .short 63 + 14263 0052 4000 .short 64 + 14264 0054 4100 .short 65 + 14265 0056 4200 .short 66 + 14266 0058 4300 .short 67 + 14267 005a 4400 .short 68 + 14268 005c 4500 .short 69 + 14269 005e 4700 .short 71 + 14270 0060 5000 .short 80 + 14271 0062 5100 .short 81 + 14272 0064 5200 .short 82 + 14273 0066 5300 .short 83 + 14274 0068 5400 .short 84 + 14275 006a 5500 .short 85 + 14276 006c 5600 .short 86 + 14277 006e 5700 .short 87 + ARM GAS /tmp/ccLSPxIe.s page 681 + + + 14278 0070 5800 .short 88 + 14279 0072 5900 .short 89 + 14280 0074 5A00 .short 90 + 14281 0076 5B00 .short 91 + 14282 0078 5C00 .short 92 + 14283 007a 5D00 .short 93 + 14284 007c 5E00 .short 94 + 14285 007e 5F00 .short 95 + 14286 0080 1E00 .short 30 + 14287 0082 1D00 .short 29 + 14288 .global task + 14289 .section .bss.task,"aw",%nobits + 14290 .align 2 + 14293 task: + 14294 0000 00000000 .space 52 + 14294 00000000 + 14294 00000000 + 14294 00000000 + 14294 00000000 + 14295 .global LD_blinker + 14296 .section .bss.LD_blinker,"aw",%nobits + 14297 .align 2 + 14300 LD_blinker: + 14301 0000 00000000 .space 12 + 14301 00000000 + 14301 00000000 + 14302 .global LD2_param + 14303 .section .bss.LD2_param,"aw",%nobits + 14304 .align 2 + 14307 LD2_param: + 14308 0000 00000000 .space 12 + 14308 00000000 + 14308 00000000 + 14309 .global LD1_param + 14310 .section .bss.LD1_param,"aw",%nobits + 14311 .align 2 + 14314 LD1_param: + 14315 0000 00000000 .space 12 + 14315 00000000 + 14315 00000000 + 14316 .global Def_setup + 14317 .section .bss.Def_setup,"aw",%nobits + 14318 .align 2 + 14321 Def_setup: + 14322 0000 00000000 .space 18 + 14322 00000000 + 14322 00000000 + 14322 00000000 + 14322 0000 + 14323 .global Curr_setup + 14324 .section .bss.Curr_setup,"aw",%nobits + 14325 .align 2 + 14328 Curr_setup: + 14329 0000 00000000 .space 18 + 14329 00000000 + 14329 00000000 + 14329 00000000 + ARM GAS /tmp/ccLSPxIe.s page 682 + + + 14329 0000 + 14330 .global LD2_def_setup + 14331 .section .bss.LD2_def_setup,"aw",%nobits + 14332 .align 2 + 14335 LD2_def_setup: + 14336 0000 00000000 .space 16 + 14336 00000000 + 14336 00000000 + 14336 00000000 + 14337 .global LD1_def_setup + 14338 .section .bss.LD1_def_setup,"aw",%nobits + 14339 .align 2 + 14342 LD1_def_setup: + 14343 0000 00000000 .space 16 + 14343 00000000 + 14343 00000000 + 14343 00000000 + 14344 .global LD2_curr_setup + 14345 .section .bss.LD2_curr_setup,"aw",%nobits + 14346 .align 2 + 14349 LD2_curr_setup: + 14350 0000 00000000 .space 16 + 14350 00000000 + 14350 00000000 + 14350 00000000 + 14351 .global LD1_curr_setup + 14352 .section .bss.LD1_curr_setup,"aw",%nobits + 14353 .align 2 + 14356 LD1_curr_setup: + 14357 0000 00000000 .space 16 + 14357 00000000 + 14357 00000000 + 14357 00000000 + 14358 .global sizeoffile + 14359 .section .bss.sizeoffile,"aw",%nobits + 14360 .align 2 + 14363 sizeoffile: + 14364 0000 00000000 .space 4 + 14365 .global fgoto + 14366 .section .bss.fgoto,"aw",%nobits + 14367 .align 2 + 14370 fgoto: + 14371 0000 00000000 .space 4 + 14372 .global test + 14373 .section .bss.test,"aw",%nobits + 14374 .align 2 + 14377 test: + 14378 0000 00000000 .space 4 + 14379 .global fresult + 14380 .section .bss.fresult,"aw",%nobits + 14383 fresult: + 14384 0000 00 .space 1 + 14385 .global COMMAND + 14386 .section .bss.COMMAND,"aw",%nobits + 14387 .align 2 + 14390 COMMAND: + 14391 0000 00000000 .space 30 + ARM GAS /tmp/ccLSPxIe.s page 683 + + + 14391 00000000 + 14391 00000000 + 14391 00000000 + 14391 00000000 + 14392 .global Long_Data + 14393 .section .bss.Long_Data,"aw",%nobits + 14394 .align 2 + 14397 Long_Data: + 14398 0000 00000000 .space 30 + 14398 00000000 + 14398 00000000 + 14398 00000000 + 14398 00000000 + 14399 .global temp16 + 14400 .section .bss.temp16,"aw",%nobits + 14401 .align 1 + 14404 temp16: + 14405 0000 0000 .space 2 + 14406 .global CS_result + 14407 .section .bss.CS_result,"aw",%nobits + 14408 .align 1 + 14411 CS_result: + 14412 0000 0000 .space 2 + 14413 .global UART_header + 14414 .section .bss.UART_header,"aw",%nobits + 14415 .align 1 + 14418 UART_header: + 14419 0000 0000 .space 2 + 14420 .global UART_rec_incr + 14421 .section .bss.UART_rec_incr,"aw",%nobits + 14422 .align 1 + 14425 UART_rec_incr: + 14426 0000 0000 .space 2 + 14427 .global TIM10_coflag + 14428 .section .bss.TIM10_coflag,"aw",%nobits + 14431 TIM10_coflag: + 14432 0000 00 .space 1 + 14433 .global u_rx_flg + 14434 .section .bss.u_rx_flg,"aw",%nobits + 14437 u_rx_flg: + 14438 0000 00 .space 1 + 14439 .global u_tx_flg + 14440 .section .bss.u_tx_flg,"aw",%nobits + 14443 u_tx_flg: + 14444 0000 00 .space 1 + 14445 .global flg_tmt + 14446 .section .bss.flg_tmt,"aw",%nobits + 14449 flg_tmt: + 14450 0000 00 .space 1 + 14451 .global UART_DATA + 14452 .section .bss.UART_DATA,"aw",%nobits + 14453 .align 2 + 14456 UART_DATA: + 14457 0000 00000000 .space 30 + 14457 00000000 + 14457 00000000 + 14457 00000000 + ARM GAS /tmp/ccLSPxIe.s page 684 + + + 14457 00000000 + 14458 .global State_Data + 14459 .section .bss.State_Data,"aw",%nobits + 14460 .align 2 + 14463 State_Data: + 14464 0000 0000 .space 2 + 14465 .global UART_transmission_request + 14466 .section .bss.UART_transmission_request,"aw",%nobits + 14469 UART_transmission_request: + 14470 0000 00 .space 1 + 14471 .global CPU_state_old + 14472 .section .bss.CPU_state_old,"aw",%nobits + 14475 CPU_state_old: + 14476 0000 00 .space 1 + 14477 .global CPU_state + 14478 .section .bss.CPU_state,"aw",%nobits + 14481 CPU_state: + 14482 0000 00 .space 1 + 14483 .global uart_buf + 14484 .section .bss.uart_buf,"aw",%nobits + 14487 uart_buf: + 14488 0000 00 .space 1 + 14489 .global TIM10_period + 14490 .section .bss.TIM10_period,"aw",%nobits + 14491 .align 2 + 14494 TIM10_period: + 14495 0000 00000000 .space 4 + 14496 .global TO10_counter + 14497 .section .bss.TO10_counter,"aw",%nobits + 14498 .align 2 + 14501 TO10_counter: + 14502 0000 00000000 .space 4 + 14503 .global TO10 + 14504 .section .bss.TO10,"aw",%nobits + 14505 .align 2 + 14508 TO10: + 14509 0000 00000000 .space 4 + 14510 .global TO7_PID + 14511 .section .bss.TO7_PID,"aw",%nobits + 14512 .align 2 + 14515 TO7_PID: + 14516 0000 00000000 .space 4 + 14517 .global TO7_before + 14518 .section .bss.TO7_before,"aw",%nobits + 14519 .align 2 + 14522 TO7_before: + 14523 0000 00000000 .space 4 + 14524 .global TO7 + 14525 .section .bss.TO7,"aw",%nobits + 14526 .align 2 + 14529 TO7: + 14530 0000 00000000 .space 4 + 14531 .global temp32 + 14532 .section .bss.temp32,"aw",%nobits + 14533 .align 2 + 14536 temp32: + 14537 0000 00000000 .space 4 + ARM GAS /tmp/ccLSPxIe.s page 685 + + + 14538 .global SD_SLIDE + 14539 .section .bss.SD_SLIDE,"aw",%nobits + 14540 .align 2 + 14543 SD_SLIDE: + 14544 0000 00000000 .space 4 + 14545 .global SD_SEEK + 14546 .section .bss.SD_SEEK,"aw",%nobits + 14547 .align 2 + 14550 SD_SEEK: + 14551 0000 00000000 .space 4 + 14552 .global TO6_uart + 14553 .section .bss.TO6_uart,"aw",%nobits + 14554 .align 2 + 14557 TO6_uart: + 14558 0000 00000000 .space 4 + 14559 .global TO6_stop + 14560 .section .bss.TO6_stop,"aw",%nobits + 14561 .align 2 + 14564 TO6_stop: + 14565 0000 00000000 .space 4 + 14566 .global TO6_before + 14567 .section .bss.TO6_before,"aw",%nobits + 14568 .align 2 + 14571 TO6_before: + 14572 0000 00000000 .space 4 + 14573 .global TO6 + 14574 .section .bss.TO6,"aw",%nobits + 14575 .align 2 + 14578 TO6: + 14579 0000 00000000 .space 4 + 14580 .global huart8 + 14581 .section .bss.huart8,"aw",%nobits + 14582 .align 2 + 14585 huart8: + 14586 0000 00000000 .space 136 + 14586 00000000 + 14586 00000000 + 14586 00000000 + 14586 00000000 + 14587 .global htim11 + 14588 .section .bss.htim11,"aw",%nobits + 14589 .align 2 + 14592 htim11: + 14593 0000 00000000 .space 76 + 14593 00000000 + 14593 00000000 + 14593 00000000 + 14593 00000000 + 14594 .global htim10 + 14595 .section .bss.htim10,"aw",%nobits + 14596 .align 2 + 14599 htim10: + 14600 0000 00000000 .space 76 + 14600 00000000 + 14600 00000000 + 14600 00000000 + 14600 00000000 + ARM GAS /tmp/ccLSPxIe.s page 686 + + + 14601 .global htim1 + 14602 .section .bss.htim1,"aw",%nobits + 14603 .align 2 + 14606 htim1: + 14607 0000 00000000 .space 76 + 14607 00000000 + 14607 00000000 + 14607 00000000 + 14607 00000000 + 14608 .global htim8 + 14609 .section .bss.htim8,"aw",%nobits + 14610 .align 2 + 14613 htim8: + 14614 0000 00000000 .space 76 + 14614 00000000 + 14614 00000000 + 14614 00000000 + 14614 00000000 + 14615 .global htim4 + 14616 .section .bss.htim4,"aw",%nobits + 14617 .align 2 + 14620 htim4: + 14621 0000 00000000 .space 76 + 14621 00000000 + 14621 00000000 + 14621 00000000 + 14621 00000000 + 14622 .global hsd1 + 14623 .section .bss.hsd1,"aw",%nobits + 14624 .align 2 + 14627 hsd1: + 14628 0000 00000000 .space 132 + 14628 00000000 + 14628 00000000 + 14628 00000000 + 14628 00000000 + 14629 .global hadc3 + 14630 .section .bss.hadc3,"aw",%nobits + 14631 .align 2 + 14634 hadc3: + 14635 0000 00000000 .space 72 + 14635 00000000 + 14635 00000000 + 14635 00000000 + 14635 00000000 + 14636 .global hadc1 + 14637 .section .bss.hadc1,"aw",%nobits + 14638 .align 2 + 14641 hadc1: + 14642 0000 00000000 .space 72 + 14642 00000000 + 14642 00000000 + 14642 00000000 + 14642 00000000 + 14643 .text + 14644 .Letext0: + 14645 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" + ARM GAS /tmp/ccLSPxIe.s page 687 + + + 14646 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 14647 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" + 14648 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" + 14649 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" + 14650 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" + 14651 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" + 14652 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" + 14653 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" + 14654 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" + 14655 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" + 14656 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" + 14657 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" + 14658 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" + 14659 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h" + 14660 .file 24 "Inc/main.h" + 14661 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h" + 14662 .file 26 "Inc/File_Handling.h" + 14663 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" + 14664 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" + 14665 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h" + 14666 .file 30 "Inc/fatfs.h" + 14667 .file 31 "" + ARM GAS /tmp/ccLSPxIe.s page 688 DEFINED SYMBOLS *ABS*:00000000 main.c - /tmp/ccuHnxNu.s:20 .text.NVIC_EncodePriority:00000000 $t - /tmp/ccuHnxNu.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority - /tmp/ccuHnxNu.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t - /tmp/ccuHnxNu.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init - /tmp/ccuHnxNu.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d - /tmp/ccuHnxNu.s:13847 .bss.hsd1:00000000 hsd1 - /tmp/ccuHnxNu.s:137 .text.MX_DMA_Init:00000000 $t - /tmp/ccuHnxNu.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init - /tmp/ccuHnxNu.s:238 .text.MX_DMA_Init:0000003c $d - /tmp/ccuHnxNu.s:245 .text.Decode_task:00000000 $t - /tmp/ccuHnxNu.s:250 .text.Decode_task:00000000 Decode_task - /tmp/ccuHnxNu.s:527 .text.Decode_task:00000150 $d - /tmp/ccuHnxNu.s:13513 .bss.task:00000000 task - /tmp/ccuHnxNu.s:13721 .bss.TO10_counter:00000000 TO10_counter - /tmp/ccuHnxNu.s:537 .text.SPI2_SetMode:00000000 $t - /tmp/ccuHnxNu.s:542 .text.SPI2_SetMode:00000000 SPI2_SetMode - /tmp/ccuHnxNu.s:650 .text.SPI2_SetMode:00000040 $d - /tmp/ccuHnxNu.s:655 .text.PA4_DAC_Set:00000000 $t - /tmp/ccuHnxNu.s:660 .text.PA4_DAC_Set:00000000 PA4_DAC_Set - /tmp/ccuHnxNu.s:704 .text.PA4_DAC_Set:00000028 $d - /tmp/ccuHnxNu.s:709 .text.PID_Controller_Temp:00000000 $t - /tmp/ccuHnxNu.s:714 .text.PID_Controller_Temp:00000000 PID_Controller_Temp - /tmp/ccuHnxNu.s:883 .text.PID_Controller_Temp:000000cc $d - /tmp/ccuHnxNu.s:13749 .bss.TO7:00000000 TO7 - /tmp/ccuHnxNu.s:13735 .bss.TO7_PID:00000000 TO7_PID - /tmp/ccuHnxNu.s:893 .text.AD9102_WriteReg:00000000 $t - /tmp/ccuHnxNu.s:898 .text.AD9102_WriteReg:00000000 AD9102_WriteReg - /tmp/ccuHnxNu.s:1161 .text.AD9102_WriteReg:000000c8 $d - /tmp/ccuHnxNu.s:1168 .text.AD9102_WriteRegTable:00000000 $t - /tmp/ccuHnxNu.s:1173 .text.AD9102_WriteRegTable:00000000 AD9102_WriteRegTable - /tmp/ccuHnxNu.s:1224 .text.AD9102_WriteRegTable:00000024 $d - /tmp/ccuHnxNu.s:13441 .rodata.ad9102_reg_addr:00000000 ad9102_reg_addr - /tmp/ccuHnxNu.s:1229 .text.AD9102_LoadSramRamp:00000000 $t - /tmp/ccuHnxNu.s:1234 .text.AD9102_LoadSramRamp:00000000 AD9102_LoadSramRamp - /tmp/ccuHnxNu.s:1518 .text.AD9102_LoadSramRamp:000000d4 $d - /tmp/ccuHnxNu.s:1523 .text.AD9102_Init:00000000 $t - /tmp/ccuHnxNu.s:1528 .text.AD9102_Init:00000000 AD9102_Init - /tmp/ccuHnxNu.s:1609 .text.AD9102_Init:00000064 $d - /tmp/ccuHnxNu.s:13370 .rodata.ad9102_example4_regval:00000000 ad9102_example4_regval - /tmp/ccuHnxNu.s:1617 .text.AD9102_ReadReg:00000000 $t - /tmp/ccuHnxNu.s:1622 .text.AD9102_ReadReg:00000000 AD9102_ReadReg - /tmp/ccuHnxNu.s:1894 .text.AD9102_ReadReg:000000c8 $d - /tmp/ccuHnxNu.s:1901 .text.AD9102_CheckFlagsSram:00000000 $t - /tmp/ccuHnxNu.s:1906 .text.AD9102_CheckFlagsSram:00000000 AD9102_CheckFlagsSram - /tmp/ccuHnxNu.s:2204 .text.AD9102_CheckFlags:00000000 $t - /tmp/ccuHnxNu.s:2209 .text.AD9102_CheckFlags:00000000 AD9102_CheckFlags - /tmp/ccuHnxNu.s:2439 .text.AD9102_ApplySram:00000000 $t - /tmp/ccuHnxNu.s:2444 .text.AD9102_ApplySram:00000000 AD9102_ApplySram - /tmp/ccuHnxNu.s:2708 .text.AD9102_ApplySram:0000013c $d - /tmp/ccuHnxNu.s:13299 .rodata.ad9102_example2_regval:00000000 ad9102_example2_regval - /tmp/ccuHnxNu.s:2714 .text.AD9102_Apply:00000000 $t - /tmp/ccuHnxNu.s:2719 .text.AD9102_Apply:00000000 AD9102_Apply - /tmp/ccuHnxNu.s:2890 .text.AD9102_Apply:000000b4 $d - /tmp/ccuHnxNu.s:2895 .text.AD9833_WriteWord:00000000 $t - /tmp/ccuHnxNu.s:2900 .text.AD9833_WriteWord:00000000 AD9833_WriteWord - ARM GAS /tmp/ccuHnxNu.s page 668 + /tmp/ccLSPxIe.s:20 .text.NVIC_EncodePriority:00000000 $t + /tmp/ccLSPxIe.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority + /tmp/ccLSPxIe.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t + /tmp/ccLSPxIe.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init + /tmp/ccLSPxIe.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d + /tmp/ccLSPxIe.s:14627 .bss.hsd1:00000000 hsd1 + /tmp/ccLSPxIe.s:137 .text.MX_DMA_Init:00000000 $t + /tmp/ccLSPxIe.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init + /tmp/ccLSPxIe.s:238 .text.MX_DMA_Init:0000003c $d + /tmp/ccLSPxIe.s:245 .text.Decode_task:00000000 $t + /tmp/ccLSPxIe.s:250 .text.Decode_task:00000000 Decode_task + /tmp/ccLSPxIe.s:527 .text.Decode_task:00000150 $d + /tmp/ccLSPxIe.s:14293 .bss.task:00000000 task + /tmp/ccLSPxIe.s:14501 .bss.TO10_counter:00000000 TO10_counter + /tmp/ccLSPxIe.s:537 .text.SPI2_SetMode:00000000 $t + /tmp/ccLSPxIe.s:542 .text.SPI2_SetMode:00000000 SPI2_SetMode + /tmp/ccLSPxIe.s:650 .text.SPI2_SetMode:00000040 $d + /tmp/ccLSPxIe.s:655 .text.PA4_DAC_Set:00000000 $t + /tmp/ccLSPxIe.s:660 .text.PA4_DAC_Set:00000000 PA4_DAC_Set + /tmp/ccLSPxIe.s:704 .text.PA4_DAC_Set:00000028 $d + /tmp/ccLSPxIe.s:709 .text.AD9102_ResetWaveUploadState:00000000 $t + /tmp/ccLSPxIe.s:714 .text.AD9102_ResetWaveUploadState:00000000 AD9102_ResetWaveUploadState + /tmp/ccLSPxIe.s:739 .text.AD9102_ResetWaveUploadState:00000010 $d + /tmp/ccLSPxIe.s:14073 .bss.ad9102_wave_upload_active:00000000 ad9102_wave_upload_active + /tmp/ccLSPxIe.s:14068 .bss.ad9102_wave_expected_samples:00000000 ad9102_wave_expected_samples + /tmp/ccLSPxIe.s:14062 .bss.ad9102_wave_written_samples:00000000 ad9102_wave_written_samples + /tmp/ccLSPxIe.s:746 .text.PID_Controller_Temp:00000000 $t + /tmp/ccLSPxIe.s:751 .text.PID_Controller_Temp:00000000 PID_Controller_Temp + /tmp/ccLSPxIe.s:920 .text.PID_Controller_Temp:000000cc $d + /tmp/ccLSPxIe.s:14529 .bss.TO7:00000000 TO7 + /tmp/ccLSPxIe.s:14515 .bss.TO7_PID:00000000 TO7_PID + /tmp/ccLSPxIe.s:930 .text.AD9102_WriteReg:00000000 $t + /tmp/ccLSPxIe.s:935 .text.AD9102_WriteReg:00000000 AD9102_WriteReg + /tmp/ccLSPxIe.s:1198 .text.AD9102_WriteReg:000000c8 $d + /tmp/ccLSPxIe.s:1205 .text.AD9102_WriteRegTable:00000000 $t + /tmp/ccLSPxIe.s:1210 .text.AD9102_WriteRegTable:00000000 AD9102_WriteRegTable + /tmp/ccLSPxIe.s:1261 .text.AD9102_WriteRegTable:00000024 $d + /tmp/ccLSPxIe.s:14221 .rodata.ad9102_reg_addr:00000000 ad9102_reg_addr + /tmp/ccLSPxIe.s:1266 .text.AD9102_LoadSramRamp:00000000 $t + /tmp/ccLSPxIe.s:1271 .text.AD9102_LoadSramRamp:00000000 AD9102_LoadSramRamp + /tmp/ccLSPxIe.s:1555 .text.AD9102_LoadSramRamp:000000d4 $d + /tmp/ccLSPxIe.s:1560 .text.AD9102_WriteWaveUploadChunk:00000000 $t + /tmp/ccLSPxIe.s:1565 .text.AD9102_WriteWaveUploadChunk:00000000 AD9102_WriteWaveUploadChunk + /tmp/ccLSPxIe.s:1695 .text.AD9102_WriteWaveUploadChunk:0000006c $d + /tmp/ccLSPxIe.s:1704 .text.AD9102_Init:00000000 $t + /tmp/ccLSPxIe.s:1709 .text.AD9102_Init:00000000 AD9102_Init + /tmp/ccLSPxIe.s:1790 .text.AD9102_Init:00000064 $d + /tmp/ccLSPxIe.s:14150 .rodata.ad9102_example4_regval:00000000 ad9102_example4_regval + /tmp/ccLSPxIe.s:1798 .text.AD9102_StartOutput:00000000 $t + /tmp/ccLSPxIe.s:1803 .text.AD9102_StartOutput:00000000 AD9102_StartOutput + /tmp/ccLSPxIe.s:1867 .text.AD9102_StartOutput:00000048 $d + /tmp/ccLSPxIe.s:1872 .text.AD9102_StopOutput:00000000 $t + /tmp/ccLSPxIe.s:1877 .text.AD9102_StopOutput:00000000 AD9102_StopOutput + /tmp/ccLSPxIe.s:1904 .text.AD9102_StopOutput:00000018 $d + /tmp/ccLSPxIe.s:1909 .text.AD9102_ConfigureSramPlayback:00000000 $t + ARM GAS /tmp/ccLSPxIe.s page 689 - /tmp/ccuHnxNu.s:3048 .text.AD9833_WriteWord:00000088 $d - /tmp/ccuHnxNu.s:3055 .text.AD9833_Apply:00000000 $t - /tmp/ccuHnxNu.s:3060 .text.AD9833_Apply:00000000 AD9833_Apply - /tmp/ccuHnxNu.s:3145 .text.OUT_trigger:00000000 $t - /tmp/ccuHnxNu.s:3150 .text.OUT_trigger:00000000 OUT_trigger - /tmp/ccuHnxNu.s:3168 .text.OUT_trigger:0000000a $d - /tmp/ccuHnxNu.s:3178 .text.OUT_trigger:00000014 $t - /tmp/ccuHnxNu.s:3374 .text.OUT_trigger:0000011c $d - /tmp/ccuHnxNu.s:3380 .text.MPhD_T:00000000 $t - /tmp/ccuHnxNu.s:3385 .text.MPhD_T:00000000 MPhD_T - /tmp/ccuHnxNu.s:3469 .text.MPhD_T:00000056 $d - /tmp/ccuHnxNu.s:3473 .text.MPhD_T:0000005a $t - /tmp/ccuHnxNu.s:4016 .text.MPhD_T:00000210 $d - /tmp/ccuHnxNu.s:4026 .text.Stop_TIM10:00000000 $t - /tmp/ccuHnxNu.s:4031 .text.Stop_TIM10:00000000 Stop_TIM10 - /tmp/ccuHnxNu.s:4060 .text.Stop_TIM10:00000014 $d - /tmp/ccuHnxNu.s:13819 .bss.htim10:00000000 htim10 - /tmp/ccuHnxNu.s:13651 .bss.TIM10_coflag:00000000 TIM10_coflag - /tmp/ccuHnxNu.s:13728 .bss.TO10:00000000 TO10 - /tmp/ccuHnxNu.s:4067 .text.MX_GPIO_Init:00000000 $t - /tmp/ccuHnxNu.s:4072 .text.MX_GPIO_Init:00000000 MX_GPIO_Init - /tmp/ccuHnxNu.s:4570 .text.MX_GPIO_Init:00000274 $d - /tmp/ccuHnxNu.s:4582 .text.PA4_DAC_Init:00000000 $t - /tmp/ccuHnxNu.s:4587 .text.PA4_DAC_Init:00000000 PA4_DAC_Init - /tmp/ccuHnxNu.s:4674 .text.PA4_DAC_Init:00000058 $d - /tmp/ccuHnxNu.s:4682 .text.MX_SPI4_Init:00000000 $t - /tmp/ccuHnxNu.s:4687 .text.MX_SPI4_Init:00000000 MX_SPI4_Init - /tmp/ccuHnxNu.s:4892 .text.MX_SPI4_Init:000000c8 $d - /tmp/ccuHnxNu.s:4899 .text.MX_SPI2_Init:00000000 $t - /tmp/ccuHnxNu.s:4904 .text.MX_SPI2_Init:00000000 MX_SPI2_Init - /tmp/ccuHnxNu.s:5132 .text.MX_SPI2_Init:000000dc $d - /tmp/ccuHnxNu.s:5139 .text.MX_SPI5_Init:00000000 $t - /tmp/ccuHnxNu.s:5144 .text.MX_SPI5_Init:00000000 MX_SPI5_Init - /tmp/ccuHnxNu.s:5349 .text.MX_SPI5_Init:000000c4 $d - /tmp/ccuHnxNu.s:5356 .text.MX_SPI6_Init:00000000 $t - /tmp/ccuHnxNu.s:5361 .text.MX_SPI6_Init:00000000 MX_SPI6_Init - /tmp/ccuHnxNu.s:5566 .text.MX_SPI6_Init:000000c4 $d - /tmp/ccuHnxNu.s:5573 .text.MX_TIM2_Init:00000000 $t - /tmp/ccuHnxNu.s:5578 .text.MX_TIM2_Init:00000000 MX_TIM2_Init - /tmp/ccuHnxNu.s:5756 .text.MX_TIM2_Init:00000088 $d - /tmp/ccuHnxNu.s:5765 .text.MX_TIM5_Init:00000000 $t - /tmp/ccuHnxNu.s:5770 .text.MX_TIM5_Init:00000000 MX_TIM5_Init - /tmp/ccuHnxNu.s:5947 .text.MX_TIM5_Init:00000084 $d - /tmp/ccuHnxNu.s:5956 .text.MX_TIM7_Init:00000000 $t - /tmp/ccuHnxNu.s:5961 .text.MX_TIM7_Init:00000000 MX_TIM7_Init - /tmp/ccuHnxNu.s:6122 .text.MX_TIM7_Init:0000007c $d - /tmp/ccuHnxNu.s:6130 .text.MX_TIM6_Init:00000000 $t - /tmp/ccuHnxNu.s:6135 .text.MX_TIM6_Init:00000000 MX_TIM6_Init - /tmp/ccuHnxNu.s:6296 .text.MX_TIM6_Init:0000007c $d - /tmp/ccuHnxNu.s:6304 .rodata.Init_params.str1.4:00000000 $d - /tmp/ccuHnxNu.s:6311 .text.Init_params:00000000 $t - /tmp/ccuHnxNu.s:6316 .text.Init_params:00000000 Init_params - /tmp/ccuHnxNu.s:6959 .text.Init_params:00000294 $d - /tmp/ccuHnxNu.s:13798 .bss.TO6:00000000 TO6 - /tmp/ccuHnxNu.s:13742 .bss.TO7_before:00000000 TO7_before - /tmp/ccuHnxNu.s:13791 .bss.TO6_before:00000000 TO6_before - /tmp/ccuHnxNu.s:13777 .bss.TO6_uart:00000000 TO6_uart - ARM GAS /tmp/ccuHnxNu.s page 669 + /tmp/ccLSPxIe.s:1914 .text.AD9102_ConfigureSramPlayback:00000000 AD9102_ConfigureSramPlayback + /tmp/ccLSPxIe.s:2065 .text.AD9102_ConfigureSramPlayback:000000b0 $d + /tmp/ccLSPxIe.s:14079 .rodata.ad9102_example2_regval:00000000 ad9102_example2_regval + /tmp/ccLSPxIe.s:2070 .text.AD9102_BeginWaveUpload:00000000 $t + /tmp/ccLSPxIe.s:2075 .text.AD9102_BeginWaveUpload:00000000 AD9102_BeginWaveUpload + /tmp/ccLSPxIe.s:2140 .text.AD9102_BeginWaveUpload:00000040 $d + /tmp/ccLSPxIe.s:2147 .text.AD9102_CancelWaveUpload:00000000 $t + /tmp/ccLSPxIe.s:2152 .text.AD9102_CancelWaveUpload:00000000 AD9102_CancelWaveUpload + /tmp/ccLSPxIe.s:2183 .text.AD9102_CancelWaveUpload:00000014 $d + /tmp/ccLSPxIe.s:2188 .text.AD9102_ReadReg:00000000 $t + /tmp/ccLSPxIe.s:2193 .text.AD9102_ReadReg:00000000 AD9102_ReadReg + /tmp/ccLSPxIe.s:2465 .text.AD9102_ReadReg:000000c8 $d + /tmp/ccLSPxIe.s:2472 .text.AD9102_ApplySram:00000000 $t + /tmp/ccLSPxIe.s:2477 .text.AD9102_ApplySram:00000000 AD9102_ApplySram + /tmp/ccLSPxIe.s:2594 .text.AD9102_Apply:00000000 $t + /tmp/ccLSPxIe.s:2599 .text.AD9102_Apply:00000000 AD9102_Apply + /tmp/ccLSPxIe.s:2715 .text.AD9102_CheckFlags:00000000 $t + /tmp/ccLSPxIe.s:2720 .text.AD9102_CheckFlags:00000000 AD9102_CheckFlags + /tmp/ccLSPxIe.s:2950 .text.AD9102_CommitWaveUpload:00000000 $t + /tmp/ccLSPxIe.s:2955 .text.AD9102_CommitWaveUpload:00000000 AD9102_CommitWaveUpload + /tmp/ccLSPxIe.s:3068 .text.AD9102_CommitWaveUpload:00000074 $d + /tmp/ccLSPxIe.s:3075 .text.AD9102_CheckFlagsSram:00000000 $t + /tmp/ccLSPxIe.s:3080 .text.AD9102_CheckFlagsSram:00000000 AD9102_CheckFlagsSram + /tmp/ccLSPxIe.s:3378 .text.AD9833_WriteWord:00000000 $t + /tmp/ccLSPxIe.s:3383 .text.AD9833_WriteWord:00000000 AD9833_WriteWord + /tmp/ccLSPxIe.s:3531 .text.AD9833_WriteWord:00000088 $d + /tmp/ccLSPxIe.s:3538 .text.AD9833_Apply:00000000 $t + /tmp/ccLSPxIe.s:3543 .text.AD9833_Apply:00000000 AD9833_Apply + /tmp/ccLSPxIe.s:3628 .text.OUT_trigger:00000000 $t + /tmp/ccLSPxIe.s:3633 .text.OUT_trigger:00000000 OUT_trigger + /tmp/ccLSPxIe.s:3651 .text.OUT_trigger:0000000a $d + /tmp/ccLSPxIe.s:3661 .text.OUT_trigger:00000014 $t + /tmp/ccLSPxIe.s:3857 .text.OUT_trigger:0000011c $d + /tmp/ccLSPxIe.s:3863 .text.MPhD_T:00000000 $t + /tmp/ccLSPxIe.s:3868 .text.MPhD_T:00000000 MPhD_T + /tmp/ccLSPxIe.s:3952 .text.MPhD_T:00000056 $d + /tmp/ccLSPxIe.s:3956 .text.MPhD_T:0000005a $t + /tmp/ccLSPxIe.s:4499 .text.MPhD_T:00000210 $d + /tmp/ccLSPxIe.s:4509 .text.Stop_TIM10:00000000 $t + /tmp/ccLSPxIe.s:4514 .text.Stop_TIM10:00000000 Stop_TIM10 + /tmp/ccLSPxIe.s:4543 .text.Stop_TIM10:00000014 $d + /tmp/ccLSPxIe.s:14599 .bss.htim10:00000000 htim10 + /tmp/ccLSPxIe.s:14431 .bss.TIM10_coflag:00000000 TIM10_coflag + /tmp/ccLSPxIe.s:14508 .bss.TO10:00000000 TO10 + /tmp/ccLSPxIe.s:4550 .text.MX_GPIO_Init:00000000 $t + /tmp/ccLSPxIe.s:4555 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/ccLSPxIe.s:5053 .text.MX_GPIO_Init:00000274 $d + /tmp/ccLSPxIe.s:5065 .text.PA4_DAC_Init:00000000 $t + /tmp/ccLSPxIe.s:5070 .text.PA4_DAC_Init:00000000 PA4_DAC_Init + /tmp/ccLSPxIe.s:5157 .text.PA4_DAC_Init:00000058 $d + /tmp/ccLSPxIe.s:5165 .text.MX_SPI4_Init:00000000 $t + /tmp/ccLSPxIe.s:5170 .text.MX_SPI4_Init:00000000 MX_SPI4_Init + /tmp/ccLSPxIe.s:5375 .text.MX_SPI4_Init:000000c8 $d + /tmp/ccLSPxIe.s:5382 .text.MX_SPI2_Init:00000000 $t + /tmp/ccLSPxIe.s:5387 .text.MX_SPI2_Init:00000000 MX_SPI2_Init + /tmp/ccLSPxIe.s:5615 .text.MX_SPI2_Init:000000dc $d + /tmp/ccLSPxIe.s:5622 .text.MX_SPI5_Init:00000000 $t + ARM GAS /tmp/ccLSPxIe.s page 690 - /tmp/ccuHnxNu.s:13669 .bss.flg_tmt:00000000 flg_tmt - /tmp/ccuHnxNu.s:13645 .bss.UART_rec_incr:00000000 UART_rec_incr - /tmp/ccuHnxNu.s:13590 .bss.fgoto:00000000 fgoto - /tmp/ccuHnxNu.s:13583 .bss.sizeoffile:00000000 sizeoffile - /tmp/ccuHnxNu.s:13663 .bss.u_tx_flg:00000000 u_tx_flg - /tmp/ccuHnxNu.s:13657 .bss.u_rx_flg:00000000 u_rx_flg - /tmp/ccuHnxNu.s:13617 .bss.Long_Data:00000000 Long_Data - /tmp/ccuHnxNu.s:13541 .bss.Def_setup:00000000 Def_setup - /tmp/ccuHnxNu.s:13562 .bss.LD1_def_setup:00000000 LD1_def_setup - /tmp/ccuHnxNu.s:13555 .bss.LD2_def_setup:00000000 LD2_def_setup - /tmp/ccuHnxNu.s:13548 .bss.Curr_setup:00000000 Curr_setup - /tmp/ccuHnxNu.s:13576 .bss.LD1_curr_setup:00000000 LD1_curr_setup - /tmp/ccuHnxNu.s:13569 .bss.LD2_curr_setup:00000000 LD2_curr_setup - /tmp/ccuHnxNu.s:13676 .bss.UART_DATA:00000000 UART_DATA - /tmp/ccuHnxNu.s:13770 .bss.SD_SEEK:00000000 SD_SEEK - /tmp/ccuHnxNu.s:13763 .bss.SD_SLIDE:00000000 SD_SLIDE - /tmp/ccuHnxNu.s:13597 .bss.test:00000000 test - /tmp/ccuHnxNu.s:13701 .bss.CPU_state:00000000 CPU_state - /tmp/ccuHnxNu.s:13610 .bss.COMMAND:00000000 COMMAND - /tmp/ccuHnxNu.s:6998 .text.DS1809_Pulse:00000000 $t - /tmp/ccuHnxNu.s:7003 .text.DS1809_Pulse:00000000 DS1809_Pulse - /tmp/ccuHnxNu.s:7112 .text.DS1809_Pulse:00000068 $d - /tmp/ccuHnxNu.s:7117 .text.Get_ADC:00000000 $t - /tmp/ccuHnxNu.s:7122 .text.Get_ADC:00000000 Get_ADC - /tmp/ccuHnxNu.s:7142 .text.Get_ADC:0000000c $d - /tmp/ccuHnxNu.s:7148 .text.Get_ADC:00000012 $t - /tmp/ccuHnxNu.s:7246 .text.Get_ADC:00000068 $d - /tmp/ccuHnxNu.s:13861 .bss.hadc1:00000000 hadc1 - /tmp/ccuHnxNu.s:13854 .bss.hadc3:00000000 hadc3 - /tmp/ccuHnxNu.s:7252 .text.Set_LTEC:00000000 $t - /tmp/ccuHnxNu.s:7258 .text.Set_LTEC:00000000 Set_LTEC - /tmp/ccuHnxNu.s:7292 .text.Set_LTEC:00000018 $d - /tmp/ccuHnxNu.s:7297 .text.Set_LTEC:0000001c $t - /tmp/ccuHnxNu.s:7713 .text.Set_LTEC:00000168 $d - /tmp/ccuHnxNu.s:7723 .text.Decode_uart:00000000 $t - /tmp/ccuHnxNu.s:7728 .text.Decode_uart:00000000 Decode_uart - /tmp/ccuHnxNu.s:8291 .text.Decode_uart:000002cc $d - /tmp/ccuHnxNu.s:8306 .text.Advanced_Controller_Temp:00000000 $t - /tmp/ccuHnxNu.s:8312 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp - /tmp/ccuHnxNu.s:8481 .text.Advanced_Controller_Temp:000000cc $d - /tmp/ccuHnxNu.s:8491 .text.CalculateChecksum:00000000 $t - /tmp/ccuHnxNu.s:8497 .text.CalculateChecksum:00000000 CalculateChecksum - /tmp/ccuHnxNu.s:8542 .text.CheckChecksum:00000000 $t - /tmp/ccuHnxNu.s:8548 .text.CheckChecksum:00000000 CheckChecksum - /tmp/ccuHnxNu.s:8610 .text.CheckChecksum:0000003c $d - /tmp/ccuHnxNu.s:13638 .bss.UART_header:00000000 UART_header - /tmp/ccuHnxNu.s:13631 .bss.CS_result:00000000 CS_result - /tmp/ccuHnxNu.s:8617 .rodata.SD_SAVE.str1.4:00000000 $d - /tmp/ccuHnxNu.s:8621 .text.SD_SAVE:00000000 $t - /tmp/ccuHnxNu.s:8627 .text.SD_SAVE:00000000 SD_SAVE - /tmp/ccuHnxNu.s:8696 .text.SD_SAVE:00000030 $d - /tmp/ccuHnxNu.s:8703 .text.SD_READ:00000000 $t - /tmp/ccuHnxNu.s:8709 .text.SD_READ:00000000 SD_READ - /tmp/ccuHnxNu.s:8787 .text.SD_READ:0000003c $d - /tmp/ccuHnxNu.s:8795 .text.SD_REMOVE:00000000 $t - /tmp/ccuHnxNu.s:8801 .text.SD_REMOVE:00000000 SD_REMOVE - /tmp/ccuHnxNu.s:8869 .text.SD_REMOVE:00000034 $d - ARM GAS /tmp/ccuHnxNu.s page 670 + /tmp/ccLSPxIe.s:5627 .text.MX_SPI5_Init:00000000 MX_SPI5_Init + /tmp/ccLSPxIe.s:5832 .text.MX_SPI5_Init:000000c4 $d + /tmp/ccLSPxIe.s:5839 .text.MX_SPI6_Init:00000000 $t + /tmp/ccLSPxIe.s:5844 .text.MX_SPI6_Init:00000000 MX_SPI6_Init + /tmp/ccLSPxIe.s:6049 .text.MX_SPI6_Init:000000c4 $d + /tmp/ccLSPxIe.s:6056 .text.MX_TIM2_Init:00000000 $t + /tmp/ccLSPxIe.s:6061 .text.MX_TIM2_Init:00000000 MX_TIM2_Init + /tmp/ccLSPxIe.s:6239 .text.MX_TIM2_Init:00000088 $d + /tmp/ccLSPxIe.s:6248 .text.MX_TIM5_Init:00000000 $t + /tmp/ccLSPxIe.s:6253 .text.MX_TIM5_Init:00000000 MX_TIM5_Init + /tmp/ccLSPxIe.s:6430 .text.MX_TIM5_Init:00000084 $d + /tmp/ccLSPxIe.s:6439 .text.MX_TIM7_Init:00000000 $t + /tmp/ccLSPxIe.s:6444 .text.MX_TIM7_Init:00000000 MX_TIM7_Init + /tmp/ccLSPxIe.s:6605 .text.MX_TIM7_Init:0000007c $d + /tmp/ccLSPxIe.s:6613 .text.MX_TIM6_Init:00000000 $t + /tmp/ccLSPxIe.s:6618 .text.MX_TIM6_Init:00000000 MX_TIM6_Init + /tmp/ccLSPxIe.s:6779 .text.MX_TIM6_Init:0000007c $d + /tmp/ccLSPxIe.s:6787 .rodata.Init_params.str1.4:00000000 $d + /tmp/ccLSPxIe.s:6794 .text.Init_params:00000000 $t + /tmp/ccLSPxIe.s:6799 .text.Init_params:00000000 Init_params + /tmp/ccLSPxIe.s:7442 .text.Init_params:00000294 $d + /tmp/ccLSPxIe.s:14578 .bss.TO6:00000000 TO6 + /tmp/ccLSPxIe.s:14522 .bss.TO7_before:00000000 TO7_before + /tmp/ccLSPxIe.s:14571 .bss.TO6_before:00000000 TO6_before + /tmp/ccLSPxIe.s:14557 .bss.TO6_uart:00000000 TO6_uart + /tmp/ccLSPxIe.s:14449 .bss.flg_tmt:00000000 flg_tmt + /tmp/ccLSPxIe.s:14425 .bss.UART_rec_incr:00000000 UART_rec_incr + /tmp/ccLSPxIe.s:14370 .bss.fgoto:00000000 fgoto + /tmp/ccLSPxIe.s:14363 .bss.sizeoffile:00000000 sizeoffile + /tmp/ccLSPxIe.s:14443 .bss.u_tx_flg:00000000 u_tx_flg + /tmp/ccLSPxIe.s:14437 .bss.u_rx_flg:00000000 u_rx_flg + /tmp/ccLSPxIe.s:14397 .bss.Long_Data:00000000 Long_Data + /tmp/ccLSPxIe.s:14321 .bss.Def_setup:00000000 Def_setup + /tmp/ccLSPxIe.s:14342 .bss.LD1_def_setup:00000000 LD1_def_setup + /tmp/ccLSPxIe.s:14335 .bss.LD2_def_setup:00000000 LD2_def_setup + /tmp/ccLSPxIe.s:14328 .bss.Curr_setup:00000000 Curr_setup + /tmp/ccLSPxIe.s:14356 .bss.LD1_curr_setup:00000000 LD1_curr_setup + /tmp/ccLSPxIe.s:14349 .bss.LD2_curr_setup:00000000 LD2_curr_setup + /tmp/ccLSPxIe.s:14456 .bss.UART_DATA:00000000 UART_DATA + /tmp/ccLSPxIe.s:14550 .bss.SD_SEEK:00000000 SD_SEEK + /tmp/ccLSPxIe.s:14543 .bss.SD_SLIDE:00000000 SD_SLIDE + /tmp/ccLSPxIe.s:14377 .bss.test:00000000 test + /tmp/ccLSPxIe.s:14481 .bss.CPU_state:00000000 CPU_state + /tmp/ccLSPxIe.s:14390 .bss.COMMAND:00000000 COMMAND + /tmp/ccLSPxIe.s:7481 .text.DS1809_Pulse:00000000 $t + /tmp/ccLSPxIe.s:7486 .text.DS1809_Pulse:00000000 DS1809_Pulse + /tmp/ccLSPxIe.s:7595 .text.DS1809_Pulse:00000068 $d + /tmp/ccLSPxIe.s:7600 .text.Get_ADC:00000000 $t + /tmp/ccLSPxIe.s:7605 .text.Get_ADC:00000000 Get_ADC + /tmp/ccLSPxIe.s:7625 .text.Get_ADC:0000000c $d + /tmp/ccLSPxIe.s:7631 .text.Get_ADC:00000012 $t + /tmp/ccLSPxIe.s:7729 .text.Get_ADC:00000068 $d + /tmp/ccLSPxIe.s:14641 .bss.hadc1:00000000 hadc1 + /tmp/ccLSPxIe.s:14634 .bss.hadc3:00000000 hadc3 + /tmp/ccLSPxIe.s:7735 .text.Set_LTEC:00000000 $t + /tmp/ccLSPxIe.s:7741 .text.Set_LTEC:00000000 Set_LTEC + /tmp/ccLSPxIe.s:7775 .text.Set_LTEC:00000018 $d + ARM GAS /tmp/ccLSPxIe.s page 691 - /tmp/ccuHnxNu.s:8876 .text.USART_TX:00000000 $t - /tmp/ccuHnxNu.s:8882 .text.USART_TX:00000000 USART_TX - /tmp/ccuHnxNu.s:8957 .text.USART_TX:00000028 $d - /tmp/ccuHnxNu.s:8962 .text.USART_TX_DMA:00000000 $t - /tmp/ccuHnxNu.s:8968 .text.USART_TX_DMA:00000000 USART_TX_DMA - /tmp/ccuHnxNu.s:9037 .text.USART_TX_DMA:00000038 $d - /tmp/ccuHnxNu.s:9043 .text.Error_Handler:00000000 $t - /tmp/ccuHnxNu.s:9049 .text.Error_Handler:00000000 Error_Handler - /tmp/ccuHnxNu.s:9080 .text.MX_ADC1_Init:00000000 $t - /tmp/ccuHnxNu.s:9085 .text.MX_ADC1_Init:00000000 MX_ADC1_Init - /tmp/ccuHnxNu.s:9274 .text.MX_ADC1_Init:000000bc $d - /tmp/ccuHnxNu.s:9281 .text.MX_ADC3_Init:00000000 $t - /tmp/ccuHnxNu.s:9286 .text.MX_ADC3_Init:00000000 MX_ADC3_Init - /tmp/ccuHnxNu.s:9393 .text.MX_ADC3_Init:00000060 $d - /tmp/ccuHnxNu.s:9400 .text.MX_USART1_UART_Init:00000000 $t - /tmp/ccuHnxNu.s:9405 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init - /tmp/ccuHnxNu.s:9804 .text.MX_USART1_UART_Init:0000017c $d - /tmp/ccuHnxNu.s:9813 .text.MX_TIM10_Init:00000000 $t - /tmp/ccuHnxNu.s:9818 .text.MX_TIM10_Init:00000000 MX_TIM10_Init - /tmp/ccuHnxNu.s:9867 .text.MX_TIM10_Init:00000024 $d - /tmp/ccuHnxNu.s:9873 .text.MX_UART8_Init:00000000 $t - /tmp/ccuHnxNu.s:9878 .text.MX_UART8_Init:00000000 MX_UART8_Init - /tmp/ccuHnxNu.s:9939 .text.MX_UART8_Init:00000030 $d - /tmp/ccuHnxNu.s:13805 .bss.huart8:00000000 huart8 - /tmp/ccuHnxNu.s:9945 .text.MX_TIM8_Init:00000000 $t - /tmp/ccuHnxNu.s:9950 .text.MX_TIM8_Init:00000000 MX_TIM8_Init - /tmp/ccuHnxNu.s:10059 .text.MX_TIM8_Init:00000064 $d - /tmp/ccuHnxNu.s:13833 .bss.htim8:00000000 htim8 - /tmp/ccuHnxNu.s:10065 .text.MX_TIM11_Init:00000000 $t - /tmp/ccuHnxNu.s:10070 .text.MX_TIM11_Init:00000000 MX_TIM11_Init - /tmp/ccuHnxNu.s:10180 .text.MX_TIM11_Init:00000068 $d - /tmp/ccuHnxNu.s:13812 .bss.htim11:00000000 htim11 - /tmp/ccuHnxNu.s:10186 .text.MX_TIM4_Init:00000000 $t - /tmp/ccuHnxNu.s:10191 .text.MX_TIM4_Init:00000000 MX_TIM4_Init - /tmp/ccuHnxNu.s:10346 .text.MX_TIM4_Init:0000009c $d - /tmp/ccuHnxNu.s:13840 .bss.htim4:00000000 htim4 - /tmp/ccuHnxNu.s:10352 .text.MX_TIM1_Init:00000000 $t - /tmp/ccuHnxNu.s:10357 .text.MX_TIM1_Init:00000000 MX_TIM1_Init - /tmp/ccuHnxNu.s:10548 .text.MX_TIM1_Init:000000bc $d - /tmp/ccuHnxNu.s:13826 .bss.htim1:00000000 htim1 - /tmp/ccuHnxNu.s:10554 .text.SystemClock_Config:00000000 $t - /tmp/ccuHnxNu.s:10560 .text.SystemClock_Config:00000000 SystemClock_Config - /tmp/ccuHnxNu.s:10719 .text.SystemClock_Config:000000ac $d - /tmp/ccuHnxNu.s:10725 .text.main:00000000 $t - /tmp/ccuHnxNu.s:10731 .text.main:00000000 main - /tmp/ccuHnxNu.s:11146 .text.main:00000150 $d - /tmp/ccuHnxNu.s:11160 .text.main:00000188 $t - /tmp/ccuHnxNu.s:11413 .text.main:00000294 $d - /tmp/ccuHnxNu.s:13695 .bss.CPU_state_old:00000000 CPU_state_old - /tmp/ccuHnxNu.s:13689 .bss.UART_transmission_request:00000000 UART_transmission_request - /tmp/ccuHnxNu.s:13683 .bss.State_Data:00000000 State_Data - /tmp/ccuHnxNu.s:13624 .bss.temp16:00000000 temp16 - /tmp/ccuHnxNu.s:11438 .text.main:000002ec $t - /tmp/ccuHnxNu.s:12100 .text.main:000005b8 $d - /tmp/ccuHnxNu.s:13534 .bss.LD1_param:00000000 LD1_param - /tmp/ccuHnxNu.s:13527 .bss.LD2_param:00000000 LD2_param - /tmp/ccuHnxNu.s:13784 .bss.TO6_stop:00000000 TO6_stop - ARM GAS /tmp/ccuHnxNu.s page 671 + /tmp/ccLSPxIe.s:7780 .text.Set_LTEC:0000001c $t + /tmp/ccLSPxIe.s:8196 .text.Set_LTEC:00000168 $d + /tmp/ccLSPxIe.s:8206 .text.Decode_uart:00000000 $t + /tmp/ccLSPxIe.s:8211 .text.Decode_uart:00000000 Decode_uart + /tmp/ccLSPxIe.s:8774 .text.Decode_uart:000002cc $d + /tmp/ccLSPxIe.s:8789 .text.Advanced_Controller_Temp:00000000 $t + /tmp/ccLSPxIe.s:8795 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp + /tmp/ccLSPxIe.s:8964 .text.Advanced_Controller_Temp:000000cc $d + /tmp/ccLSPxIe.s:8974 .text.CalculateChecksum:00000000 $t + /tmp/ccLSPxIe.s:8980 .text.CalculateChecksum:00000000 CalculateChecksum + /tmp/ccLSPxIe.s:9025 .text.CheckChecksum:00000000 $t + /tmp/ccLSPxIe.s:9031 .text.CheckChecksum:00000000 CheckChecksum + /tmp/ccLSPxIe.s:9093 .text.CheckChecksum:0000003c $d + /tmp/ccLSPxIe.s:14418 .bss.UART_header:00000000 UART_header + /tmp/ccLSPxIe.s:14411 .bss.CS_result:00000000 CS_result + /tmp/ccLSPxIe.s:9100 .rodata.SD_SAVE.str1.4:00000000 $d + /tmp/ccLSPxIe.s:9104 .text.SD_SAVE:00000000 $t + /tmp/ccLSPxIe.s:9110 .text.SD_SAVE:00000000 SD_SAVE + /tmp/ccLSPxIe.s:9179 .text.SD_SAVE:00000030 $d + /tmp/ccLSPxIe.s:9186 .text.SD_READ:00000000 $t + /tmp/ccLSPxIe.s:9192 .text.SD_READ:00000000 SD_READ + /tmp/ccLSPxIe.s:9270 .text.SD_READ:0000003c $d + /tmp/ccLSPxIe.s:9278 .text.SD_REMOVE:00000000 $t + /tmp/ccLSPxIe.s:9284 .text.SD_REMOVE:00000000 SD_REMOVE + /tmp/ccLSPxIe.s:9352 .text.SD_REMOVE:00000034 $d + /tmp/ccLSPxIe.s:9359 .text.USART_TX:00000000 $t + /tmp/ccLSPxIe.s:9365 .text.USART_TX:00000000 USART_TX + /tmp/ccLSPxIe.s:9440 .text.USART_TX:00000028 $d + /tmp/ccLSPxIe.s:9445 .text.USART_TX_DMA:00000000 $t + /tmp/ccLSPxIe.s:9451 .text.USART_TX_DMA:00000000 USART_TX_DMA + /tmp/ccLSPxIe.s:9520 .text.USART_TX_DMA:00000038 $d + /tmp/ccLSPxIe.s:9526 .text.Error_Handler:00000000 $t + /tmp/ccLSPxIe.s:9532 .text.Error_Handler:00000000 Error_Handler + /tmp/ccLSPxIe.s:9563 .text.MX_ADC1_Init:00000000 $t + /tmp/ccLSPxIe.s:9568 .text.MX_ADC1_Init:00000000 MX_ADC1_Init + /tmp/ccLSPxIe.s:9757 .text.MX_ADC1_Init:000000bc $d + /tmp/ccLSPxIe.s:9764 .text.MX_ADC3_Init:00000000 $t + /tmp/ccLSPxIe.s:9769 .text.MX_ADC3_Init:00000000 MX_ADC3_Init + /tmp/ccLSPxIe.s:9876 .text.MX_ADC3_Init:00000060 $d + /tmp/ccLSPxIe.s:9883 .text.MX_USART1_UART_Init:00000000 $t + /tmp/ccLSPxIe.s:9888 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init + /tmp/ccLSPxIe.s:10287 .text.MX_USART1_UART_Init:0000017c $d + /tmp/ccLSPxIe.s:10296 .text.MX_TIM10_Init:00000000 $t + /tmp/ccLSPxIe.s:10301 .text.MX_TIM10_Init:00000000 MX_TIM10_Init + /tmp/ccLSPxIe.s:10350 .text.MX_TIM10_Init:00000024 $d + /tmp/ccLSPxIe.s:10356 .text.MX_UART8_Init:00000000 $t + /tmp/ccLSPxIe.s:10361 .text.MX_UART8_Init:00000000 MX_UART8_Init + /tmp/ccLSPxIe.s:10422 .text.MX_UART8_Init:00000030 $d + /tmp/ccLSPxIe.s:14585 .bss.huart8:00000000 huart8 + /tmp/ccLSPxIe.s:10428 .text.MX_TIM8_Init:00000000 $t + /tmp/ccLSPxIe.s:10433 .text.MX_TIM8_Init:00000000 MX_TIM8_Init + /tmp/ccLSPxIe.s:10542 .text.MX_TIM8_Init:00000064 $d + /tmp/ccLSPxIe.s:14613 .bss.htim8:00000000 htim8 + /tmp/ccLSPxIe.s:10548 .text.MX_TIM11_Init:00000000 $t + /tmp/ccLSPxIe.s:10553 .text.MX_TIM11_Init:00000000 MX_TIM11_Init + /tmp/ccLSPxIe.s:10663 .text.MX_TIM11_Init:00000068 $d + /tmp/ccLSPxIe.s:14592 .bss.htim11:00000000 htim11 + ARM GAS /tmp/ccLSPxIe.s page 692 - /tmp/ccuHnxNu.s:12122 .text.main:00000600 $t - /tmp/ccuHnxNu.s:12666 .text.main:000008c0 $d - /tmp/ccuHnxNu.s:13714 .bss.TIM10_period:00000000 TIM10_period - /tmp/ccuHnxNu.s:12698 .text.main:00000930 $t - /tmp/ccuHnxNu.s:13264 .text.main:00000bd0 $d - /tmp/ccuHnxNu.s:13520 .bss.LD_blinker:00000000 LD_blinker - /tmp/ccuHnxNu.s:13296 .rodata.ad9102_example2_regval:00000000 $d - /tmp/ccuHnxNu.s:13367 .rodata.ad9102_example4_regval:00000000 $d - /tmp/ccuHnxNu.s:13438 .rodata.ad9102_reg_addr:00000000 $d - /tmp/ccuHnxNu.s:13510 .bss.task:00000000 $d - /tmp/ccuHnxNu.s:13517 .bss.LD_blinker:00000000 $d - /tmp/ccuHnxNu.s:13524 .bss.LD2_param:00000000 $d - /tmp/ccuHnxNu.s:13531 .bss.LD1_param:00000000 $d - /tmp/ccuHnxNu.s:13538 .bss.Def_setup:00000000 $d - /tmp/ccuHnxNu.s:13545 .bss.Curr_setup:00000000 $d - /tmp/ccuHnxNu.s:13552 .bss.LD2_def_setup:00000000 $d - /tmp/ccuHnxNu.s:13559 .bss.LD1_def_setup:00000000 $d - /tmp/ccuHnxNu.s:13566 .bss.LD2_curr_setup:00000000 $d - /tmp/ccuHnxNu.s:13573 .bss.LD1_curr_setup:00000000 $d - /tmp/ccuHnxNu.s:13580 .bss.sizeoffile:00000000 $d - /tmp/ccuHnxNu.s:13587 .bss.fgoto:00000000 $d - /tmp/ccuHnxNu.s:13594 .bss.test:00000000 $d - /tmp/ccuHnxNu.s:13603 .bss.fresult:00000000 fresult - /tmp/ccuHnxNu.s:13604 .bss.fresult:00000000 $d - /tmp/ccuHnxNu.s:13607 .bss.COMMAND:00000000 $d - /tmp/ccuHnxNu.s:13614 .bss.Long_Data:00000000 $d - /tmp/ccuHnxNu.s:13621 .bss.temp16:00000000 $d - /tmp/ccuHnxNu.s:13628 .bss.CS_result:00000000 $d - /tmp/ccuHnxNu.s:13635 .bss.UART_header:00000000 $d - /tmp/ccuHnxNu.s:13642 .bss.UART_rec_incr:00000000 $d - /tmp/ccuHnxNu.s:13652 .bss.TIM10_coflag:00000000 $d - /tmp/ccuHnxNu.s:13658 .bss.u_rx_flg:00000000 $d - /tmp/ccuHnxNu.s:13664 .bss.u_tx_flg:00000000 $d - /tmp/ccuHnxNu.s:13670 .bss.flg_tmt:00000000 $d - /tmp/ccuHnxNu.s:13673 .bss.UART_DATA:00000000 $d - /tmp/ccuHnxNu.s:13680 .bss.State_Data:00000000 $d - /tmp/ccuHnxNu.s:13690 .bss.UART_transmission_request:00000000 $d - /tmp/ccuHnxNu.s:13696 .bss.CPU_state_old:00000000 $d - /tmp/ccuHnxNu.s:13702 .bss.CPU_state:00000000 $d - /tmp/ccuHnxNu.s:13707 .bss.uart_buf:00000000 uart_buf - /tmp/ccuHnxNu.s:13708 .bss.uart_buf:00000000 $d - /tmp/ccuHnxNu.s:13711 .bss.TIM10_period:00000000 $d - /tmp/ccuHnxNu.s:13718 .bss.TO10_counter:00000000 $d - /tmp/ccuHnxNu.s:13725 .bss.TO10:00000000 $d - /tmp/ccuHnxNu.s:13732 .bss.TO7_PID:00000000 $d - /tmp/ccuHnxNu.s:13739 .bss.TO7_before:00000000 $d - /tmp/ccuHnxNu.s:13746 .bss.TO7:00000000 $d - /tmp/ccuHnxNu.s:13756 .bss.temp32:00000000 temp32 - /tmp/ccuHnxNu.s:13753 .bss.temp32:00000000 $d - /tmp/ccuHnxNu.s:13760 .bss.SD_SLIDE:00000000 $d - /tmp/ccuHnxNu.s:13767 .bss.SD_SEEK:00000000 $d - /tmp/ccuHnxNu.s:13774 .bss.TO6_uart:00000000 $d - /tmp/ccuHnxNu.s:13781 .bss.TO6_stop:00000000 $d - /tmp/ccuHnxNu.s:13788 .bss.TO6_before:00000000 $d - /tmp/ccuHnxNu.s:13795 .bss.TO6:00000000 $d - /tmp/ccuHnxNu.s:13802 .bss.huart8:00000000 $d - /tmp/ccuHnxNu.s:13809 .bss.htim11:00000000 $d - ARM GAS /tmp/ccuHnxNu.s page 672 + /tmp/ccLSPxIe.s:10669 .text.MX_TIM4_Init:00000000 $t + /tmp/ccLSPxIe.s:10674 .text.MX_TIM4_Init:00000000 MX_TIM4_Init + /tmp/ccLSPxIe.s:10829 .text.MX_TIM4_Init:0000009c $d + /tmp/ccLSPxIe.s:14620 .bss.htim4:00000000 htim4 + /tmp/ccLSPxIe.s:10835 .text.MX_TIM1_Init:00000000 $t + /tmp/ccLSPxIe.s:10840 .text.MX_TIM1_Init:00000000 MX_TIM1_Init + /tmp/ccLSPxIe.s:11031 .text.MX_TIM1_Init:000000bc $d + /tmp/ccLSPxIe.s:14606 .bss.htim1:00000000 htim1 + /tmp/ccLSPxIe.s:11037 .text.SystemClock_Config:00000000 $t + /tmp/ccLSPxIe.s:11043 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/ccLSPxIe.s:11202 .text.SystemClock_Config:000000ac $d + /tmp/ccLSPxIe.s:11208 .text.main:00000000 $t + /tmp/ccLSPxIe.s:11214 .text.main:00000000 main + /tmp/ccLSPxIe.s:11629 .text.main:00000150 $d + /tmp/ccLSPxIe.s:11645 .text.main:00000190 $t + /tmp/ccLSPxIe.s:11901 .text.main:000002a0 $d + /tmp/ccLSPxIe.s:14475 .bss.CPU_state_old:00000000 CPU_state_old + /tmp/ccLSPxIe.s:14469 .bss.UART_transmission_request:00000000 UART_transmission_request + /tmp/ccLSPxIe.s:14463 .bss.State_Data:00000000 State_Data + /tmp/ccLSPxIe.s:14404 .bss.temp16:00000000 temp16 + /tmp/ccLSPxIe.s:11926 .text.main:000002f8 $t + /tmp/ccLSPxIe.s:12586 .text.main:000005c4 $d + /tmp/ccLSPxIe.s:14314 .bss.LD1_param:00000000 LD1_param + /tmp/ccLSPxIe.s:14307 .bss.LD2_param:00000000 LD2_param + /tmp/ccLSPxIe.s:14564 .bss.TO6_stop:00000000 TO6_stop + /tmp/ccLSPxIe.s:12608 .text.main:0000060c $t + /tmp/ccLSPxIe.s:13097 .text.main:00000820 $d + /tmp/ccLSPxIe.s:14494 .bss.TIM10_period:00000000 TIM10_period + /tmp/ccLSPxIe.s:13120 .text.main:0000086c $t + /tmp/ccLSPxIe.s:13632 .text.main:00000b24 $d + /tmp/ccLSPxIe.s:14300 .bss.LD_blinker:00000000 LD_blinker + /tmp/ccLSPxIe.s:13655 .text.main:00000b78 $t + /tmp/ccLSPxIe.s:14033 .text.main:00000d2c $d + /tmp/ccLSPxIe.s:14059 .bss.ad9102_wave_written_samples:00000000 $d + /tmp/ccLSPxIe.s:14065 .bss.ad9102_wave_expected_samples:00000000 $d + /tmp/ccLSPxIe.s:14074 .bss.ad9102_wave_upload_active:00000000 $d + /tmp/ccLSPxIe.s:14076 .rodata.ad9102_example2_regval:00000000 $d + /tmp/ccLSPxIe.s:14147 .rodata.ad9102_example4_regval:00000000 $d + /tmp/ccLSPxIe.s:14218 .rodata.ad9102_reg_addr:00000000 $d + /tmp/ccLSPxIe.s:14290 .bss.task:00000000 $d + /tmp/ccLSPxIe.s:14297 .bss.LD_blinker:00000000 $d + /tmp/ccLSPxIe.s:14304 .bss.LD2_param:00000000 $d + /tmp/ccLSPxIe.s:14311 .bss.LD1_param:00000000 $d + /tmp/ccLSPxIe.s:14318 .bss.Def_setup:00000000 $d + /tmp/ccLSPxIe.s:14325 .bss.Curr_setup:00000000 $d + /tmp/ccLSPxIe.s:14332 .bss.LD2_def_setup:00000000 $d + /tmp/ccLSPxIe.s:14339 .bss.LD1_def_setup:00000000 $d + /tmp/ccLSPxIe.s:14346 .bss.LD2_curr_setup:00000000 $d + /tmp/ccLSPxIe.s:14353 .bss.LD1_curr_setup:00000000 $d + /tmp/ccLSPxIe.s:14360 .bss.sizeoffile:00000000 $d + /tmp/ccLSPxIe.s:14367 .bss.fgoto:00000000 $d + /tmp/ccLSPxIe.s:14374 .bss.test:00000000 $d + /tmp/ccLSPxIe.s:14383 .bss.fresult:00000000 fresult + /tmp/ccLSPxIe.s:14384 .bss.fresult:00000000 $d + /tmp/ccLSPxIe.s:14387 .bss.COMMAND:00000000 $d + /tmp/ccLSPxIe.s:14394 .bss.Long_Data:00000000 $d + /tmp/ccLSPxIe.s:14401 .bss.temp16:00000000 $d + ARM GAS /tmp/ccLSPxIe.s page 693 - /tmp/ccuHnxNu.s:13816 .bss.htim10:00000000 $d - /tmp/ccuHnxNu.s:13823 .bss.htim1:00000000 $d - /tmp/ccuHnxNu.s:13830 .bss.htim8:00000000 $d - /tmp/ccuHnxNu.s:13837 .bss.htim4:00000000 $d - /tmp/ccuHnxNu.s:13844 .bss.hsd1:00000000 $d - /tmp/ccuHnxNu.s:13851 .bss.hadc3:00000000 $d - /tmp/ccuHnxNu.s:13858 .bss.hadc1:00000000 $d + /tmp/ccLSPxIe.s:14408 .bss.CS_result:00000000 $d + /tmp/ccLSPxIe.s:14415 .bss.UART_header:00000000 $d + /tmp/ccLSPxIe.s:14422 .bss.UART_rec_incr:00000000 $d + /tmp/ccLSPxIe.s:14432 .bss.TIM10_coflag:00000000 $d + /tmp/ccLSPxIe.s:14438 .bss.u_rx_flg:00000000 $d + /tmp/ccLSPxIe.s:14444 .bss.u_tx_flg:00000000 $d + /tmp/ccLSPxIe.s:14450 .bss.flg_tmt:00000000 $d + /tmp/ccLSPxIe.s:14453 .bss.UART_DATA:00000000 $d + /tmp/ccLSPxIe.s:14460 .bss.State_Data:00000000 $d + /tmp/ccLSPxIe.s:14470 .bss.UART_transmission_request:00000000 $d + /tmp/ccLSPxIe.s:14476 .bss.CPU_state_old:00000000 $d + /tmp/ccLSPxIe.s:14482 .bss.CPU_state:00000000 $d + /tmp/ccLSPxIe.s:14487 .bss.uart_buf:00000000 uart_buf + /tmp/ccLSPxIe.s:14488 .bss.uart_buf:00000000 $d + /tmp/ccLSPxIe.s:14491 .bss.TIM10_period:00000000 $d + /tmp/ccLSPxIe.s:14498 .bss.TO10_counter:00000000 $d + /tmp/ccLSPxIe.s:14505 .bss.TO10:00000000 $d + /tmp/ccLSPxIe.s:14512 .bss.TO7_PID:00000000 $d + /tmp/ccLSPxIe.s:14519 .bss.TO7_before:00000000 $d + /tmp/ccLSPxIe.s:14526 .bss.TO7:00000000 $d + /tmp/ccLSPxIe.s:14536 .bss.temp32:00000000 temp32 + /tmp/ccLSPxIe.s:14533 .bss.temp32:00000000 $d + /tmp/ccLSPxIe.s:14540 .bss.SD_SLIDE:00000000 $d + /tmp/ccLSPxIe.s:14547 .bss.SD_SEEK:00000000 $d + /tmp/ccLSPxIe.s:14554 .bss.TO6_uart:00000000 $d + /tmp/ccLSPxIe.s:14561 .bss.TO6_stop:00000000 $d + /tmp/ccLSPxIe.s:14568 .bss.TO6_before:00000000 $d + /tmp/ccLSPxIe.s:14575 .bss.TO6:00000000 $d + /tmp/ccLSPxIe.s:14582 .bss.huart8:00000000 $d + /tmp/ccLSPxIe.s:14589 .bss.htim11:00000000 $d + /tmp/ccLSPxIe.s:14596 .bss.htim10:00000000 $d + /tmp/ccLSPxIe.s:14603 .bss.htim1:00000000 $d + /tmp/ccLSPxIe.s:14610 .bss.htim8:00000000 $d + /tmp/ccLSPxIe.s:14617 .bss.htim4:00000000 $d + /tmp/ccLSPxIe.s:14624 .bss.hsd1:00000000 $d + /tmp/ccLSPxIe.s:14631 .bss.hadc3:00000000 $d + /tmp/ccLSPxIe.s:14638 .bss.hadc1:00000000 $d UNDEFINED SYMBOLS HAL_GPIO_WritePin @@ -40257,6 +41543,9 @@ HAL_ADC_GetValue HAL_ADC_Stop Remove_File Create_File + ARM GAS /tmp/ccLSPxIe.s page 694 + + Write_File_byte Update_File_byte HAL_ADC_Init diff --git a/build/main.o b/build/main.o index cae79cc89e9c403acc76052707fff3fe4b5ad515..ff0949820b0ddd2bd95c9e9520bf54ec39fecbdf 100644 GIT binary patch literal 187412 zcmd?Sd3aPs_CH*8Z{MUlw>#b3{aK2r43KSX2g4 zn?((-K;nuEt^@9%IN~zm?u?=!ItuE*xWx^OY{r%Mb86`{$jtZq{NCUD*UR(Ny>&k4 zRMn|dr%u(adple{bYzTk&h$UdN>~TQnD;q@SXQ+VC}Eq}Ta2w|ZRu>|59!|LesE=# zyinif@|s=K%Cfe-+^xRt;PIJ1d)va_Fn((^^Jnw-!f!H-!QU9{w074oEV8?mv9!AM z5qWV|I4OQxe0#ipADhx;%A_fQ!rP`ao+z3r=TWwP@#DU_ymM>zC5*g={BzBH36nST zm7cl}r?bNB*v7p^=-`jPA7p&vI;(DRd(4a$-WE3>7p)91qHGu2$^OlDE_&Q(GTOM2 z*Jw1ov^Q!@68D60o49W@wu?K<$(tqkIg`Xak#n24Z_L>)?yN9xw%`{|68A*mZQ{PM zaJ#s(%Dg#(UpZ;cqIm=A@){R4rSD$Wt9|#`^IzV@=f9Lf8S{;$9XxY>4Jd!Fr+1%t z$z8ijPQ7Zkb?&dbU%O-zO5M@!3gun6kfifuO=eyghhQwLE`Pey7R_>P_Kk3+N7|yM6VIs2n_k#v82;K|oO0aAuI&<6a$8Ku z)e1R``U`9Ti$1Ds(lJ|sA5YCO>pwaPr3%c3lT@{LFdO3H7f zQmo=hyUEp*pT7k*G!OiB(BM7i&%JMG@WW-hjQMH1mmS-_`^y7UfwZ&!oK>$&L*RK8u7$teBqDW@K4gCKWsZ&G@@cY+q}B z-5m>ABv0`8VZ1=yN7GrvIbu0q-R&snJz}{uloNW6HALG3p2xVmj41OWVf-7{r^S3R zR^;BZ;lUO!TMvzI6}R?AzK%^7z-jJ}cHK#!J$+Suye%a~t||65DAMKeeC1 zg9aZsc#$jIO~!|!-aC0=HPV2cYx0(^i+>{*;=@8seA zt-N=iZ8N&9ST}I3>lbrx^Dle$=I1%6vG}7Wa4p(?>$;_E={nc`jnTw9t=IiE`P(XD za~SKpWAh9*@BPNMmYRRO%X_`HjUT&W9V`3y=8n2PY~_WUTdlh7t} zQ5X#ely~rEV<%t9t0?x8ceHQi;Q9o&ChV0`svkVuRoI;BVpGxtPeo)o&Tb=$*087; zBECzxEFs4atAj=U*fRMon_?bXFY0oy*Ortuav|Ya^wd+d7orSxr`($-LP28t+Te{A}m##ZqP}*jV&)36iUl-%D7-Jtj z@cZoM8omu-;-_`gm{%H;)~$&hqjLS%QY|u;JpWbOLZW_bZC`K2vSNW)H!&7xKT)vugmPos z2}SUyBCE}`?qi>?E3U2LW?P#H4+#|1*6zs(OW!GtNzVx@e}Sg{Lp`RW#da}b?XBop zJ?7}LEcC4aeXD+)3GZ1H()DUt4-DK*&kRI-vV#Dq(jqZ zfc4+Pi@NOFcRAb4ih}zxFQB`>?Sw44_gu?YI&D0QZ9!hNfc`{osUe>9`o~3H_G98u z!j<>0Wks^TtA)gpHqOk)VaXd<5qbLnSkk=~t9fG{{B+>jE{J!$%-j|f5ifmnhb>$f z5v&+Gu7~Ap^3`=|qImwt8I@X+@~rp2HuFeX<41?YK55y-Vl=zP{<~HGH@?)zNZZ$V zR;(>Mjkj2BS(fV;Yk$|Z>k&;xzRPdqgYH{b#P3^2_8zu{7b|-gD|;6!dlz?Kn=h?h ztgT&P3TqdqSi4wS`}uZPh2$kIUMy|H*0N$5Wmb{xi)EaGKRQzWisV?p8|Lul$68tO zdNC%h7z;~}>NZNwxRR7zhRj?0*_o+45uL|M9*bljad+SqaUtV~y8}z@4%k>3;W5@U zx3MpvI8Jlhiv6?!k@w^i_a)}NwAYsw+n0#FwD-D7JR=N=3jHd?RnFo1ebFe5yS3rO z*Z_gk{H@tzr2h+j^so1nI3Mo#inUozxbJawr<^(K(!nD|f2PRtVwa@y{^ySsJeI=K z`L@<7S#E4fIhFskwOp1<;W3qeueDf~8=O*3<-%xz`7%>FnFO@1H}l>x?JWXh;>y@?Em@l zU$7&fz2`iEQ=ZMb=npat-ORFMU~jX{IQD`E&O^(zmg_#Cyw0c8duGRuH8NHCjBAV7 zqkhP%_P3rkJOfV^Q6nRMm@ZRJ678Q<_sR4})|DV?j1%o8+vu=HN^5l~tqnUuYqdvg zEgBvu+8QX@dZV@fVJ)TfGNrA)DQ%S>p{<@rY>VpZCR*z*T3g;)fY$VQrur*OX)8CS zt(+sY<@*n9C8oGUTb5|+)K=_K{qTzbQZm1DrncvaAWGzY6Pnjsn zPplW^$I7@Q^O8eSFV5<~*_4#Lk|&wV1`iXX6O4G8Gg^4DeWPcM>;d}H0PIGxxW?K@ zN+Gg8ZiSc;Z?k8O#OhL{#t1#@_qEkh{dTgZ`h8;>I_i?W^P*gKB%@ijC^7V%N}^5K zfS3ze#qXUCEPTcjg|h0*=$B! z&E^{URFhWMWqR6(jA&l`_PG0TvFE0C84}JWe*XU8L0Yd?JYG_W9rkLm`zSJ6I$G^j zH)&?gJ~nRBv`I4!+;ywuztpPVWX)_PtS}y}7n?WMx0&uu?f!(-GyUd*(Z(8WV+Ou? zqu@|)ZtmbD8r;qG`xe29_4^tdFg7=OTM$3y_?m-}%;u~Xe@l8KyE$W|dyS024LGy$ zn+81`2`wtv9dX~~t_`U3@Kc%Oh|EZ_cPqp9p@BJ(lW0%O0 zW0%O${iLWy{S1kICL(_vx%`xoOU(IyH*){0{*dn@PXBNE!&HA*vOgU&fP67@SbyB` z#Qf2|Z_~N-Me1*=Cw6cS8=V_DBF-N@@qg7HhWSY41K5N&!ibk z`gXxNabYZc$T@K?&WQ`m`nJTlJe)eupYsTI&ITfY+3afJYk-UWBJQ?!mAG+aVS*LTh)<0_7{4dpJo@(7b6;h#tk*tnXBAb6 zWutEdbtTgEqgrsi0_nQC?bB;;p1vLD>U7VGoBIe)lrF>Hoqt#^R7RXZX5wlh1s^zjFz#s zC5dzEUT)tQI(Nj&?XQGb(Tuu+xJaW5V{Ww@DvTvm?yP#+za-Qir!eMM_>T75#ZD}t zc4DWEqSA6zD2(xB&Pe9ql}ffS7E-mO?Pq6+{nQj0mv*!dTh5caIKde#IWjMIJ~A)& zPb4i{6=>=nP3`x>>THOI{FGMI^0_SWjpzNsnd5mc?*dQq*ZDD|D%|;sEmQaJJ}+ALs3^aHias z?NrvpDgKb5{&!j5&$qBXUu{vA>H9UPU7I<|%2U18R6}^GdGHL!?jC3q5wV%BSNxL9xOSbt~}>%*b+WS%>Fh z{vog2-#V1uqZAGi9DWGr1pPK-uzZ5#@H?G@=Zrl@)GFGWb+pLiLHLJbaTctF-L%TYDt9H9oEsKGu$4fOu!3bMD_ zX9-^;pQHUc)^&=#bgtS7XPl4GnRc9qAC)bYu(o#-WlglYM;gnTUfvru8^k?f-Yf1K z&CkT0Igwd{?=*;e!ns%6H#(n*JBvhS3x1?Q+!K*|#eHMsGjV5CkvW22)iCGWrh$ov znyM1#F8yrbL-gJiZw}9%f7h;S#Cz4(@y74lBuZ~lU&s5!GJ4Z0gL4j>Yj*G1SI`pLW-AMzOTn)GC!y;7-yin zJ+`CWyL_0~>Ep>e@kTpilA>I6+JKR;|=e3@A;NUD%oM?CC$jWSrd;`YutwD~Eog-vjNm-er6F0Zu zb685|&et(T#M8t;M*k?jlHW5*p}`p+LVyuZrTssG~JE1XAUX{P@ znws{H=-pN(PW)-V)Ldh2K5@^*cexYv@r92d&Bw{|NG$K;8DTyMT_mFpgj2EC7OMVd0PDq=_AHl)r`I3V%^lCKWr7>PGBAP;q3`4`(=w) z?BDc`Z)^K=p$qnA;R}qH+n-}{Hz)UkT`&k2sDG)icHgCuP;u46o{4E=7AeKO+)#4j0@of*ab)+P$ z9^z5XSk|Ha2n-9P^utW{!argWdcg}{O6kS)4OwWnqYu(gLWi|2+A5T7(SGR3$62`d z@;=M^F0WYLZ+YeNs^vYGmn<(`-fMZ;^77@&3eDA|ag@%GM2?k2+wM$^p>qW6v&A_A z?)v1j8Z|3R^hy)^k!DntEH?Zy+`>?(NR4+PE8tm;?!hSqV#6smfxf~ z1C&3sjl(I|RC)>^FDPu=Xw=~3T+=leWt}hFw`_Jto+a}*+vzC3Z{xTQnT<6v{}$?{ zXN9*y1xI+24B|<$*bEg;f=~Uss&{jrmcA_&E#64K=E|0;7S|7nA+G&R)xA5;qxLPU zmCv=k%zNVz@g-0sUM*Vot4{dPpf5Zx&z=y?!a?iL2RaPHRqAv&9i! zR*RW(s%WuRwRsEPSS7~0nq6yTB$&QIeA$5c#noA2#RktGJX^&!7xw3(Ejc4~i-BRe z@MvC0^HR2!h{ztU-k|4C9CPPX%tKaauCP|{HR)nD4%;9-`UowOO@>i>II*X*+-7gH z5503Ydzy7bknMLH)(x#wPkX1>w&GdpXGU|z8ubmyvvU1xLx0mzNBSDS&|u?+IA&NU zXvd(PtJz(6PE5}5=^LbuS%0twje-~n($P)l2RGsTC#S_}3AE&@Hw&39bf%fzQjX|6 zU920$!-_GsL*h%~?#Rn=*OVbsmZ(ToxrKDiY0gh zYlXc=?sVJHiw-MbPL8uy(Ad}GS=zku@9Ek871^+C&I+el*8jNp{$n+w8%`w=hsb;D_pKUlQMvJH&1qpn=uxpD_Yc;G zFVcBZBco@(+N&NkM9Xs+$ko+OT!TN@i9W`&U(VpyL}@c!?Ob zkvkWQ)vtcbq7mchL<4URarH1s>vNTji$5pOLU&w?C>#OGJQzOx#H zmb~Pl%~OGAm3{Ofzh_)~q-`%eVL2A8UyzP67&{Z`LZszLKOrqmXY3uMQ7*bCHe)UO&>OS{{u(lH5r&ZitO==GC^jOs6qcXF&TCL?2ENJ-V}XNb+rsZjS)>&5g-8+6-dU}E zMBf*!>s^6*}kC<<0AiuV`bf)Lu4v zWY#*3nL@?}&kx>!)(k=8>(qH(&=su|8(>oTkIpvm{jVkuy&KU(X!^$Bzx-R5?EPAN z54Cng&h+M*%MbkY=%Y9#l;7VxQa@m!%nev5znfSyxbIOWS627UPMbR`Z;PufE8QEz zx0JKk^0L^mIPI4wd*kXRHV%vx#`+1HvXb{Vk4EhcZI@$Cywl2iwzgVpjpBFKy|~vb z3D2~9`;W5uw3-8Cwf?h9=`WQsHp)b8b0$Le4*|$YQI@jxp6Nx zviLfO?AF@a{ji$yk~QUtngXaPh?*YzA`&ZVn$)zi=@pcBp}e=I*XFFGbn9WyO#j8@ z|3_Bd+GsChTeJ{1D=b?}-+|CqxIfRq*Od{{dTr~1!?gZ$Qjd#;))zx-q{azf#GAtN zcpK*%_u8VzyIao}7CiT`8m1>}I9t?k7HU9htoov`Dc*E%lhMn++3Z!lnfDsBC10#~ ztmNx0q|GFhl;i*J)>B6Wnpoj=?VUrxTKRq1xFq-8R^Jbug$|=I&UdtTt|;4p??P1B zms@$HFxEwR)pMJFXbsl7HrFQkvfp$)K8dYq9Vq%TAQ`J0uDPWqQ+(G}4JjF^t3-b) z(I2G7H$M->D%y>Fs)?1fi5?)XDlNWhEfz7gaYIqEe6fg{g(A|2L|tn>FRUvZ5gDE* zWDDs_e8hAQzUX!uDe8XP+Fh(sBR11|)_Y+A=5~RIY;4c(3-iIl)1=T6-)mlNmf717 zkEeI8+aAxZ%fGbKhT4oD_HU?k&%nsVHwM> zs2_+G(rpfmFUF|><;vo$Xu;H(Q^P8zYsqhC1O}cvb-~o)SR;Dvnolk3UmP6${)J*J ze%Rb$3mM1HRI;Y{ZNbYZ$9kSy*FAntUH8Tv?Qbj;r&zP3F2~}H3sdt!>?H8wZ z<+}W}9B1;cwEo`umHeLls7KcAZ#{X$R`IO0HBSClH}XB4VZMUe4{!f7c!hV{h!LBo zj~?#EJIkzDTjG4+v_b>l&STERhX`A~`{lsHMp9~@I+9g~jbw!y$-ZjL`W!Nn>NgHC zJ(B%|?=$=&CvPF%>f+ja#H2XhqbADh@FsQk_Nnr$aNe^t;_}>&-mvn4zipw@L%H+s zj#_S;-C4Bw;fBmVjKiS!9W@T=@C>qfPyDh5HjiYYuU^ck&tXTLq5P+R`fP}vu~PRb zsq!uZXN2IV{tFt>nL?|XNA%dU1@CN%G2&_U%p;7KoI7&7PQiGc_J{F8e2kA5HU0d> zMC9cd{Rw**nbUij@!03c+6FAFS~>>%kW~r!&Fp9zvk-aA|J^;uF^EgYKqI;5sKTCO zAod)OesNSXo>pV;8(+*K_RjJVl{j5Ig;fk=xbuEF88s8+JJ}z$$uGFeM1(x}W8Y`O zO1Ahv%7&C|muFaHFZQQ0KCaB0R(AP;z=L=$z>YQ#JK9=&*a>Ug+IBkfra{%Ad; zVxb=M!^bprd=JYThtWqMGgGi=GT&Y1QkfMM+5F%^JZ*9_DVEGck^5gXrsY>?C#IP~XJ)xy900I;NC|WiT6` zJNQ^86bZ3H7GXuKnDt;i@tej{)(fvo%2{vLhxKI@c-dXas#rBUiuGqlv*XzbEXoG6 z8di%RMGR#pvN3Ed8^^}83G5{HCw4NM$WCFC*r{wXJB^*r&S2eGS62OiHld40I^$<8 zlY23CYZ=2C^`Yt;?)0<4GPrxS4>wnOeFbht`fGWNnHKkAcs%{Y&9%3LvDvOu!IW`=ew>q_c(5WI=0PDPvu%+o5Nk zl|T*o*6~oYzhWot@2C#Ja-I@bb4Fc(K(| z$XE~SC+OVMYAwKfYpW7Zz@^sZLB@Jny#07Bm0S0AW30Ee7Ml058X(!%+6l{4 zSSO>!epVxFQfVb%&nl}4tyEk0p{GY#Kjkyl-ztaxM_V7jCIhT8T#vCX!?+x4HK5l6 zt!L57Agc;JJ;HO%%(C%dGPH29bbrt%1 zx^*>bIKxWs%~;$z9i^sNyKTlAtPEVIS$#8b5@AI!m(Q|pfS;ai-3CpjTdzWgbF4yK zXIL9BrsrDoAUV_e5UrdC-%e|Ts%d}2n0Qv3Lt%uphX7<02g{%UKGDsDb<#FNIHM$Z zJV7q28jTokYald9i^G*N`UKG+OCJfgn=WZ*;F8g=3wclaR6^;J)-?pQy36&*r_UpF z2`-pco-i7BS?8QTmu0vzjr+N0kqge<1LDSCc+LtCc=uqZ!$!txo^!LHL-rSRUnBWu zB*E?JRNaG8z>KWo_9Il{p`?Ui=M(U7Qo^v0qPh1-Qo^*0N#fC@glX@g2=G`^!e#d* ziN|@)U(h^Sae0T2Va8gX^SYoDY4$NBu#V@vC4jbc`w6nw6Fi5y3q=cu6Ba=|20_-g5ziRqu=9>sUH6r-mvvlH#LZ2X$MKvupm_LNsVm!%Rw?jJPVZ(Tx zdnz&P_EiXQ#@~6)Qs89G<1v$re@LZ_h|7+8K){lqHcgMT9Yh{u zJI}dD$d9qVAiI3TbCwA@F1_tzo^zw1=h`n|#u=aJ^7Fj46VU&EX?lTuG7a($Negc* zMqn~_N(Ifx5^e{{lm4xNCN6#LQ=W4_nlK~Ra_K0aX^DjLwa;<5)5(5itqT+$uCk{vN4Z@KLG+fL$8c>9U&;2#wtu_#Ao=@Vy4Ua@lW^!?kJPJD2?%dDsscXmi=? z$R+k@V4uq#MT+g^Ij@TDx4Z0@$)@|X#4^k7M7`awffma?*$3c&25zzJXUUI#)WGeQ zU4!suv}<4$icl**>F(cW+5O2Cf7TMKEjjhbvBlK0Svt)qAI+qbHOQI!MC8*65S&?> zV>0&?;t(J>*JzH5xi29O0b(MPBZwvxO~Wqe$&ycY5Ok)b-`BLo{OMRXjbFI=jgAU? zG?O#mY2@6P;G!^gUBt^C<9W?95Nkos_;JkhMz#pX5tdUst{?OKU6C%3mCW-GMY2)>{`IaL6&UaXHJew35aP|=SwjzU0JCW}wvcQQWLU=YSGL$n66UwtikwrNp ziF{X)CC+cysCl+3vfMFfy?RfP6;3*l?<=y}sf4R}{;9|TPCb@w&j*Se#;v+?kWNFX9c|0GR>9A#BfM+=ORKQof2!)DnyhC27(%D#6mFgfX9)y7 zcXQ8Qbg%E#V$6O6;mvcOrd{4KgHg@>ns(ab*E0`K4$k`8Z zlb(LhPQw#G#DfQ7(tfJTG5a>GmY&Zv?E=4&c|O;)+rEqVUuYUed60bMOT+v-)!X9P zWq6|48VS$-UW+li3)!|!(=OYh>F|T5-QL>aPz_5h z!oHK*|3%Z)_HK$IziN7b*bjPs)9nqi*N|`huK7{>40ycfpr(h272Cs1)!s0BDfv7% zm3xe_U!j?4XnKNu0@0?XCyKqJ$7QPiO}76@{kJqfZqF+Rou=t&V(s>%>-MJGZA7Mh_he}KdG-T%!136UFE%BoV!iZuHGoaY!zAI;05&CC$)uSYz^3G5 z07acRImbdx7ueSlf03p`_H1&7#k&3? zyP3MWMAId9I(7!0D>Pkhcd7(^r7n*!IAJjJT&3x1?{ErGO904;$FwvOYH*4A@;`c3@bbBe}+^R{heKNwH=Qd6I?LlbJvr^LmyAX|eZr60s zK1joOho%ecm&oVu)HFiUmjv8pnopskz;w?urpH25lv+Ng<&>7sYuaW1NX7o9X}7(e z=E@72#sde`-l$2xcj$?rU(|HKKCS}dFKIex*Ao4*rVDI~y7`KxL*Cla6PV{!O&58` zjIU*$*EC%M??nBtYr5P!jz;?pO;^~9uxs}GUDMU}RYd%rcv$uahD>fRPjPq1&I>fhD$M0+LCTQxly z3kMd2_cR>`U5Oo%rl&D~C9OOknC4`7RG{3m%k*qYj@tKHPK{cdrfDImLd4g!+gn3s z+oNf(eIG3>do}I1pCTvUr|E!q+*ru(*L2W3oQC;;rVHdG`%%*&?>O?_c1;&~ClLLU zrc0QAH_nbcKbvL_w0Bb%#7_EqWW+2onTg-J;n~=}hiAY>)<5Ci%(@C{ahBE%%e#HQ zNzz(u4ev){Jw7FvXrQYfVn>-5gOOd}>+Q)#gU*KleSN)hEo9CC z6!29l(&a3{Qs_HMk#1)xkpmRzb*?9Jpd$TFGm*zDGT_`oT@F^Y6K*Ah8Fk#1)Rk&_hZWof%$a^LAjS5$-=8$9c&#wXBY z-I8R^kh>yM(6gks59^t_Ek|G2}V617uEAq}RC` zAt3WqMf%ad5a`p50@Rxw$m-*H7nz(f=bX>7DwGg&`e10YsubyRZbTf->aR$*GXQ!MTYY6`dl+}(+3bXcM!c!cBowH6f|3!LK_$xdw zBfL3rjFw-=73QSD?0y|rTuvOS`*p)^=R}y@uN(F{pTf@m6SN*q4#vn|qsV~hl7FZo zgASvzBNSQS?1u^cqZAo(#$p8h+Q3E5N(2zUHgJj4h`H<67A~>3WqpA?Al^J(42STaXS@U1bSjnmmJg@u{-yrC zAe_;#z5kl-lqb*o6*JU-T{kioMU^1Jvj2u|6vT~4weut4CmJLU4S`IvXko< zT+<#QP5xpKl3kHK!1D^Yvk=$Y{G>UAu%4;9VemzWPBOe(B^Jo7(EC;9BiC|u2 zzghUC5FQ{rD0@>_de9)@LD}yp;iwqc>@A8Mf&rp4It&)7PD`T@^^q|U6?Jmao0jZg zPKBoe;n?W~oQ`Q+59iJ4n8v>&5aj5g^g8EbvgLGy%lqKcImvLz(u#?W z8E>IgHQAg>ehC`2<{@@4>q7Vzw+6sWhBXg>Y2AwcyR2(5%9eEt)K9bijWNw)X$x?3 z1{#ALQR!6t~>D0TI->G9*2v zLimEy6uL?@R4shLxms}tI7ed@aIOtYKN{rxD+}cHii|q>L@o=FHI2xSoZ9h2n6o0Z z1IxYwpdtUgvKZ?SS?yzcT}IH84yM1xs6v9t1|1ooPxJ1nNCMQ+qw(oB8B4AfK{yTQ9S(DTLlg=8L$%@(kudO9Qitmhf&y~GV?+=k>ak`9Hk&po za#L;D-oV$MTdCSK_+H>!@kl~`w4Vy@Ql!iIjynFmBHegxiis9DU{0lasCb|}ki|V` zVp*_5tRw+P(=NM&#w=IUZhI3|-C5IKI~~Cy&_&aJ`&!JPK)$8}Hmd~P zRntLx0hzhGrVH#{G$>(BhwP8xF@cDti|m7B_+m}tx$HWuw}GDAe2_XrUC5KqVS(P9 z-w)Ed6C=m08!!soIv-cVqVpuv8i@if=5L}3@uwIshHN?&(B+Ted>fTN0W*hLd*O}T z^1+Sq?sE}2!*SgFE0rN3U8a_EA39)tfl8UR0IM9go-Y<w`vLcG`)^)mkyGRjHZ>`ulS890r5cm!id zYegW=dlCUJuxUdPn8JI|WJ5TyX$KaV%6m|Abn3aY9CQQknJ(l*Htje9XYw9u!LVt| z5jczYSO=Aj$Z@ts&7IAA^c3>P+kME(r}G|z1UyFwz+! z;yF2u`MyMTRE3}|mQFkYQa$QnI=viu|IcKzrQAFV6=sKW`*=13b?(C4&g}>rk782f z>aC*7xfn|4c5D}Z!o z(wKXSIT}i2m*k%ASwJCnmkBVg=ZkX(Mm|?B5iaL-Qf|89x}Cn%o?a8Y&KsnheiZdP z9xP3{vz2hb*^WgxS8pbQ&T9x2x$_ja!1+6IFHvO384aW6UarU@mUbD|<=lnl$IvzH z7|hY!hjM74NN~}J($`$++PmtjQ4IR7B?>?k;2kmJOfmHY3m zaz&dU)~wvml<-970?fSJFO={krw_a!w^eZ`J0H?ueck6i=bFLC*bM?4#)QJG`DwhdR0FU1*SJL4huG0rD(r=;Sg%_-BMrD8NmE z@>jrR)B1Fx7pHE2Npxak)2gSlOI$~JK7pun6h_viA4ui%o2$d!ccZLpuo`!_SWjFr zMS7h+n0l@{Mf!6_j~~xm+P?#0BDwUlPtf_;1!27%E^s_BnM*r%$nl|5F74QGuqup( zYle9oR1~j$e?mq~UN>`pjePzN^x5j&iEwlb!Y%=LEma_!2S4xez7|?y~8jfr3RCfh4$Fk=%I_ zrU-toNW&S7SsH9pr0IMHZGt~2(&co)Ivw1jNXxk$?hxFo$TVk=4RW6%)17=G_bbxv z%*4bB9#EvmX@ri!9~GJ5yxk9EyCQ987ThrSlOny&JMggJ&x-Up1F=j7e^nlp>6{K< z4gRJ`oQd2=Y8^DcLkj_akn@b=5FqUFSo?z}*M4Z<;|A^GHZf@}{szMuv^4FuFDFZ+ zX?ZU`S93LB>*SA7Yi@4tfo%icU`XVrdZI&J-T{&M;6S~d^hvI zi7i9W&&{zYU9b~|mAj;14$pcOkY%AUZgs-dur9?An%4CcJDC4tgtuUjTem{0>wTEa z)xkWTvk~grpJ6u?Ea2Hx0qr+V$^hM!XKE!TAVdVaY1(bSLREFwwAT(`)d_|)?e|Wb z%YtE^DP1Svojc`17A)kMaw>PSpM-M;BU&6UjA+D*G+kg%#cm;3tm%;LCL8t8bdh}v zxnfUEm)PHsx0PtR+`gOmrJAl_en$HC!k!HMgYA2By9BNvyWNNTb+><~q3z3kQcuH< zA{YcKxI@A;)VGt~{WKq+Wl*;(xmWfx14{yZ0^mQ5y3?Oqn_${buEA88yZ2#=rQHNy z>T-N0LGEF=sE6Y&|IDNvob@ND$E=MQQ*Om9gtmr|h&2i8ZkpxA<~!ZG z5uWO{rXetTtYa|98P>UobGCH`7F4hGk{2nT1$O^QQ((4gE5OV z^a(+i9Rh73=<-9Lo=}%34uK9}PsA4<0?or*=8FUQa9mY=_X+j=8NV`vwnMtbi(o2# zWmYP59O-yvekzm;!|^MNQ=wG|GyKZFsnCO@*OdcOp-12W{K}dX2ud6cXhaIs?Q$}~ zmG!BR4VUCso|+2%h;^7>IV}|`ghTNwXQV&4AA+OWjt|Y5m<)lL2 zU`+W{-BO|92nzhF-YJle^4~x=u?BJ0El7sHYS?yCSB}0A@xf<=NLSWvkZ9}V-#SFP zeSw(9ubQ4xakqbw|6DaI6*^UDbV(`%XMofdsnBD^fSNLB4(i@bMtI^)T~eWyA%c3O zLXVJHn);41POyt*eN`-ExsdHV<5X@sObpuIVSC|U@MlD`fnF__ok*^z^3U$R(3%}l> z#aY*NE9N-AzI!S(ordRz99mqo)Hbr;4P8^AtH@Z(yYxxv<7qUY&2Cx{R6*Yybk5yR z4gFx|ZbwC-T=Lr+I}TA$@|#9LE-3#cyQLh}K^m0r9Q^1ny0qP?PI!u%iLWj5+EuTvSiK%8C^h5036 z1i~eZDT)Lvy+aZNmJ1RG&Rlv!j}g zKLqj>7NCN6(>OngKp|eld&3d(N=5cB}HsHK&Wnsew-m(MZMMc!8U>maD2L)>u?U6v$ru{nYOkt(E(y^Ee0pCU=7Y!?o3u~eN_^q5l!FkxtO)ZDu}EZ3 z(n1@w5ICnpd+UrGrNf8B;jn)f%Axos1jI1E0At~5w3N_qBqT28Q9_75A?oC!N7yhQ zf&!hNHI--y1iH}fs0-yFL=P$v{x5{atR3l`4@>eX2R^;W4D;)tZeWf!*>n<8CYy+1 z3p8rZq7)8_v%npibGPQ`srOGhy_~Jt&uTW5X+y!RZ{T9v2^7jw$mv2aJK@D=BQ9lq zoh9CV^7cbSpy^6P(ZKDx+Rpuzrn1#yz89A1))RFX@+{1sf(>dId+_^FIiHi2#&O5y z8+*A+8J~voJwp!=1R#0k7iXEQr=t{lBriO)(%FnqEksKL(b&f0IEaUMkqaC&Pz5=XK0P2u> z&jZnb%oHS6zW5#~Ylsq58K0764n!lp9|r4E0GA;3z6-=kWNsy51&FoCJch*jG^0W) zXozbCa(rr*+50iTZ-V$cQtx{}{2Q4aNYu3#;M9Da>KX+b>RQ17{LBjv7GQ`F$;XI} zj>{68fZrhX6H>)F=TBpNLY8=3i*N)1r1B+q%HA6ty+1k2_cit7X0RqhW)c$XbIu)z zN65%4)L?vKmeuiD#Ag)1XDV1RT_z)XX1F~cwBq)k>FPMBIRIU_ThhwwS zD0T(E_AoZPj=J`~lKb7EPE6!p3?Mx5- zoNgS_2&9UJIgG!PX_LS;Nc6=ktn)nL5C3bXhtsx-{tZLA6M4QT+16h(!_?MmK>vnR znT7?2Z^#rAB-4clMWoU~lp}-6-r-l0-yzQPxO^1BAY?q}r+c0VHM8S)gQ zqhHMz;Dq}D^08&-Uw9r>aSrKrE%-~2DmTF!c(WXv?Eu~-@VF4bmP|JtH{kcB_`NAW zItbx6O0WVzF9J{O3h*Xbd>VksNLW^Am)yxk``do}ihdB8c$nt5LXMvT-;tV6%;{c98lA6zyN?s4(S^|aU=SgrifO`lO znx8L=e+=L~B-Vc>g^7Wg*-2k%1e%TIlb?JXBDpZ(z|1fyG74xvq>B2JCNO@S^o43f z^FBybqM6Z7CLkgp(BE+U_L(}%w~h3N#Zp;PMe(A|tBkmurhHRV3?nIA)= z-hIIeX24^RSb2|C7&akD*PAH!iO);FWA1$nSd|c}Ai)79iUB~4%jo(qpV^CqasZEn zzz9*>=XWu-Q3%oXHOhVJOCL{yKZ11@gr*5W(r>pAq-#6nzV(?4NRaePKCxQtmgOcPI&x{S2&*__@B)Z@v)R z2$KKqGiQ(x*{=Wsc_dU$`rRgk=(>t>MrL|536lNjhj!IMko0>^2-0;kp=_Dw|_e&x8AxNH?X=X$rMEWg(z#>r_>6ZpC z#kX;|lE3nt%=9V}B>nD$(Cs8x<;R7#p??C4d>$X?8&QN;GlStaj#sd%0wwb2q)0%E z7)qpCiQJwPIkXmR7r+q>y^s_+v=)d=S0X#4h@7cV#7(V$KUeV&9>#YmEjB8C_rans z$?}4a@?k0pX|Ec1ip2|1e+79H2RQ%E-uu*%BV&9RdK7ZWwk9KidlrS?WteC79H>J_YaK zl`$ROmijtVc%zfqedvDfN;Nq^pRN zfAP6))JkP%;;9TtDAfa*A|#Q%-u*rsppY-7D+0V zK?NCI1C)Ex=f#Ir(o!El=zSqbN{R3*u7gPMIiGg{3DWTW0HN=NASo3SHPUqi<(~Js zp4Cd(IBcQc3<#w{$aF&*NWvG^cWckL@cv9&%Az?n#umvseLD)&YY1EB9~E4R7;_LAU>0A3*Q*De6dB=}DN z?-5APw!B<|y8wJmV1OiRCFsk>LXK2v_5&DG`z-(=0?!Hn93v&C0yrJ1;(~MWxbDlK z4qXX4fm8)K)-oQCgC`2(>V=S?*$RR)6e+1I6ofzGQ?8&}C1kkctm*-UJ)*Imtm-L+ zy{NGgRz*RET6kY$rL2k~24P=GjMuZOj}`Q*7CVhqeW@@%#*JdU`*c>iM`404!*D+V zefbCYE1lF;`bSIRT6CBHHe3()2i`Io#GiofN0P(+f%gO|(k%yDQl#pu=^5$+?|1_L z1Yit-50Py@@SaKFG5}2kzFH{2iwWEUU=x92Xg=^>O%3e_@B@-`jBQ@AY3}48Dj`Y7 z*e<~`0Hp*9$M{HsQ2@siC>-Ns37!mKJb}V7K9S(X04^l(1+>O@N$^?#S0f1@X!8mm zxF7UgNaAUQOy2$RYn-_5%_gCfagf?uK?~RaDNEk-Cl9%acpM{DpKXm5rFqda5{i#NGG65 zb{f>He6JU{Gri&+;_cvEPh9f965_7IDDyd9@kzr^;QWZhq62W5h*U}6O7Y7jyA!IU zPn~3$gajJ^OhH1Oh%0PCvd-&di}bepBI1`e;WG43Vx(Pj6B{u$G87WF8pUY-jHb1^ znw4(ukd+wp?SD}p=u(#Azm1T(26gkkqcKn-;*@!N(CDoN`Vf+I>N4*D0>1|E8G#}U zm3fB|Sd4`sA4!IxGOzI81pqE0P=ui}ukhb>03Jm;&W~oNB6-kiWht#-{iN;R1NU7d z8B{7I_%(o5q^d!xPdAT}-tO)xHXk{N2168Ut!5pqCj#sujP|DHln`ews)N-8r&V)G z!Er5TEe5MPUGWY|9GR`GDjE`juR;P)#6M zj)}N>8bk+qRRx1`v~>UBv`p}n@kxMHKoMX_JsuNi4dvcSdMh{t;2@+*v3)RQpq&q3 z9x-Uiq!AUT!lc`aN!_XjfJY9qO+&J0RZ)fSk+|VLO);pqR3Hs1h)8%ktD2;+ZW808 zNVXpvL}n9FWg0Tn@Ucn&QDp`oG8pThPSg5dcE=Jq59oDJobQLYjF|tj2NAIr=p#tg zweT5~5kce=0Pi3jA4fR~9=mK2JVqii3_&`c>Z{yDv-W%2?hYTl66hi%Is4meG5hHc z9Nb5snEgLU@I?SGAPs^UM7MG4{#J_GmQx6pYQJSyP#9wvqIRl< zhMYWM5CG{eG&UqZ2`L$}VY||DFx2eUvzV2v>5XD5Z5e={ghUJ#aWb)NZ>3#D?acss z7Lr_8R@y^oV$#Q6O-OPw-C>JW|0Mt$2^16aPFoz6eFWfrq$&zPoiRqgNaf@!CXB7& zu3>|yyVRHD#OXfvka<{vwL1cp{{Me`8P2bfYc{=_;-v&sYue_pa`wqjkNSz?Y} zh^FQ%&Qi^xIci)4&LYLRTXOUat-4y_&*&19QG&J=D->g^W@rarr5N99#_1^GntOS5 z5i4D-cr>wmvxNsJ;ubrT#LtV){B zi-0abs$NCY=2E+soc9?3Pa;LrP%eZ-Q~Gi_rS}2<4yjaI28Q#_W&Mh1lCeUBYD`S} z)K)#vIwX0JGFiI+^#CqHs%SV5Lw1^+D1~_1>V_mY zA*V}lEPzo+<)5y?K{#6B;tEqUekT4X$OJrn?+0rZWG+CGhtI?|@CQgSEs*%xws{H( z(&6Ma5Lzk(tyS`!jUnFLU{J8-urn5sU=XbPAw&;=@(|~AV&jjJ%4L+FXB#h)ARSG- z0HNoR#3{gg$h?arPXXxvJP?Q66rBxmcym5gbb+1m4HZ9T750pf{tii=DkYFH7+q;v z@i}&ebCOcX9m0};Bo(@e*y70icFN7Qjd3JM3Kc>qgd`LifJ}d+!xW-I7NhF}NcLZSr5-CoKxb(aeBA7$3C=pr1p=`{dl81Xj_hZy- zc@M%%LID0gQ9J7~ws@1h8t8pU)nXrfjC~Y&@cRJXL6ROkP<*o%IO- zk0A+Xr8&vzPXN%5weTQsr+)(dg|mJNnVm?|S&3~3p+O`#)Hc&jh9EiXuMqlK2wJP; zIin#?8{s>QkFYcPk{~&2r$RhhB1zwf6PwX>8s+M2<9re%->85P{RBk##!zHxkq+~X zvrx!jbZw;KqwI{EsW|z@8IV2=NjmEyWDG{vYmxX^J7c3(=+6+kSP0S?+AYKuSMoSM z&NdEeg_97!m&8kq->4pZn(6fziHS5xr`c18(CPAK#eq&FhTU{5|61uNAD3&11? zYmoSne2@l-M6OJVBm=wl!C^{dO;Y4gC;MOc;3C8$9#TFy6ZLI}-u%~75IHYwAWk9e zA@B#4+0S5e1Gon%>P1a7_!QX-Wn}*p z_;#c!JuBy+X*ps1Vm|R|nv+<#^_*-uTws6_AeSYBtv_5q)PUua!fq5&f0qK{0eOtV zKIycq$QA4zXS<7mhv(Yu5GFdqgTKWb~LZ|8d5;%p_>8?fiGzjTvaU9^YtI1}3 zEGxO4_Hw^w$i3Wj6sNzn$Dc#_A^nSy`#r;u!XPB39h)QPa;^`WBAlmfKB6|WfndMY{~bp0$tj5+;!tQko@ z&3~4G|J4M~>HuCMFxw?68A`8M4XFJyz{<{~{}&lzhj}vcqmU|Q&bb&{a|zxF;C2Gf zBXG9_p8&8HNsKV5aSjsHrUMFb#z)wt3cCmx4K!iP6*d>xu?l-YVy4YDveF?6q{=Qv zzU1GuWqVt7y#>f?XqVFjtrolgw=;Uu*nJ1|OC%XwH)n|5aW6PvH>7fF6-EPP4RIv{ z^6eQJ#gj4lDeBP=+Al(qQ4eE-QKPF^tUt;yrjZ~;y%i8zh9rW_Uy!*U>98OZM?r(p zmG;g2lZ=e(sQ59f@GuAI7m(zaEYyel!9rK%K|N+n9+)&CUX?ifUG58Y_@KhX|Kc!y zRIP&KT*S9fH<|G8@->QId>B6@CuHfBijT6XyIjG>OsYLD7hT$@MnhN>6X_<{shUn0 zz=@D|(PxI+kgD?n0_;zq8%w7PNi1q;21cTPw43EGWu&cxMq*K;Ki|<8318M=6(1H}8t(BDgv+LNpyN|0akH!{*2snmW5eh;Bt zB-n>uZWB9YN&ZKMDVAdo7K(IQELh1_T=)~ppmRZlf%Ci1z!M4iLLa0}sGFWh{+jW} zCz3YscbIRf7uc-i2a2+nWTbIwqzKnj$P_~m+N_U)?`Tejo{W5bm# zugF?$W6YIoZMG%Lwk*jT5Man~>_Aq;cWC^W)?oVukMj3ud~pDuVeHoBAJF(U$?z!usK#&e<4vdbXEgSUiCC0L%X9MtaFgk5N7ZPjJr}3Pg*)UJu8CjcN&Le80;V&`}=E++lYtuIo zxCnp+1j-vBYtt_$mv#VJ5lU{$1DEybndEi=03M6OZWiAWne{dd+dP=2RwEyVuoyTM zfV@ud5+M$zi4b1_^dmQ@_`^xYQ83W{s)WW2KIU?~Wq~rRqK?Ezm6f z#ihs;7T9oco&Yb=B=5K+x)xL==HILdvfCUHT^H$`I_c0P^IQ@mDCtF-U~N1>F)M*3 zUZn|kx&&?|;zmGnhbH-|OQI{m!+GIxmnQhJOQ2e!hXYtV2?}ca-(3pDg6c3zUjUXz zcHhxh3#NiDdK+M#H4e8+`$HE1_6cA-Ydp~hONRyVjg!+{7#%zp4m{UeIuU3dpk0?7 z&9~inQhBRF>!aJ$B_QBY#zsY8mZBL}`lpwo^EIX? z0mI!b%KjynsavlzyWF8k?sZ9Yy<%DzMh7(a$2E7{66tymYRu6D%tM-K1kOOUH(*NG ztA12dD6FnhED_7QSu1n7SEf&nm2=`X|i)a2Lw|QjQrnX zzWEjsru^Q^)R}3at3f{ZZJ@S*s8tBB88!@}L-KowglDCN?jzw>fw~w(7rGpY4#}3$ z5fYxA7W$3D@hc$uvdfX^kip+ylJIkBp>UVx_&pGPR|xqA1<@h-eUXH1Y1SeVejcbN zK=c@byg~6hBz`NU4t@=14y6=-UuCKGG;0e>{T!%|LG<53_!Z=c4$1H9Bq1t$5vZp@_Adx?>yh~%Nc@52^0y*K z+K~Lx{hQrs*7sQIYM@MPL4V3p7a=nNnQ;h4KGjazko-oGGS5x3USKJzonN9W6hf+< zXe{LMI|IQy58vND7lc&%3J}!_VHkZp3uyJr<3DCknsqt}^MGmx(H4Zc6Og$Oi3?b2 z;nUzDwCVsFO5Dg2Id>YyS3qzROQaz4BP8x;<|7pN0}{Vu=8wpX!PF)W0r8hvkE?evdA z@USL$N)w27)SM{zr!@W@Ki+Zd@SiVh{OBIl`U}`R?;P428eOQ-!XCw`9E< z;y!#Rq&jb##yi?`%4cf)^%^hA^Qz~x${FGwjdnWExp~Ob_$M{q5zkrveWbEcjv$GLE1kwS9I~s>SUyYwtHMHTZcOgLkdJchOfn=(~U>stzI4>y*C6LEjBD zQD-CMy69^i^u0h61&p!8MPKKj4+2fpZiE&W{Y3|T2xy{iM7YF7U+4+2AL_zAG|1lpLEM4Z8JSQEUY3A8aEa`3;@_)mg(#~5GG=*im@|6T07 zQ0fY&IAF>Dg>9k4kq9%wRE%P+~lOO~4aO)C{pVFt=ugmXoT_w-evVyW8fqS~%an+xT!$)-s z`ECWvU#9T5ADS3~^4DNf^RJGMwu6S-ySHl|(#fH{)kY~jF){ZiVD@Ruzi5o=cb2(V zWBwxnb68_63@{p#>TH&IR%51Uj3>eC8grV)C}+zuyk($lYZ5SHF_MWnF99<{V?M7j z(x1{&`XH7W))?ss!Em`x%#Sq2lbY`>67#R|WoGwk44sXmaWXSz9kJnIdbP`04&%I~ z2!JE~SXL~?GK%iYl;4R=4WwG912uOQP)~vINra_mArr#W|Cx7U4Meh#{7zSo=5o|z3=a~?LztEWss>crHE{3=ywZ@u!YC#6o{ z+uYXPgO^tSI0FQeQz!G4ba>NC^55Kt1s(;E-&IV_O0}v6Aj(HT@v9Bn5SFGu5!T-Q zmnhYdE@bd`6HClVwT4)Ns`~<{`R1Oe&f2>VCF<|Q3qYik-}{)VOtlWN#1K&b0P5Qj z=5`@-KN8<(<}75MK;kh3BfkVnV8M|59wv+GRO@51I18vhfav!uwF;R}kobt13S@A) z44=3riwD4v1w-=tBv~v?waPJD&iy@5`5>BuF!woRs*$K<<}qZ>L}CMik^if&!z_da zf9X%n<*C+XWbpw|gCOc>ssBLc8YHe_=0#-oBXI|Uk$($vEEtmC*T|wS)jC2JKLzRm z5FKKv`;d7Gi6@!)CNi%faTLMGZ(&YY@b^8ks86+0hCp}~Q1~aQ#$Q?LLS!Z)Gag}X zFERy43{ zgOP2N?$@Xf5>eC(-AERE1nR)b*_n>mB!1~)j$oW!(!KRYjQ0)23&3;M*TY4#R@>A%AQ{c(gV8e5rFx%3-j)s7-B!PkosQAq%~0} zYj0O|&s5~^OBv6P^U`-s8H4=yQ>M1(is!jhDx<<))UsaeYfEar+R8r(?Ee%HMxI1G z2N|M$w(yj$E_ZZwwmjuv)87u% zC$9msbvDYlO*cwcffrjh(+`%`;jo?TMy>+|RAx&vNr=`sY zcpA*qyaf#8^+-y0U65OzTec__qy@Sx?q!TBmM!1qSjl|PN=8S4S&(wlR}qKyo-NOr z$@}#HZ#iqsPPf6sZMifNozC|26Ejm2kY}rt_0q<3KqZOII)UeO5ZO%Aa$X1U7bxdr z7edbEDM)3djQ`n8%GH)X4pU(kDDXeC@XMx}*(ug-sBvx{P(MS#pCT+RMkcg(lX7b$ zQ=iwsd~KNHQ`7; zb7vv50*P8F^$9#4X+!c0<21~vDb}qll>x$b5N#o$I6Hc%`+y2~sM%)&&F|o#7sYR3 z3_^}s&rJufqY>ql*cBIpkJ*gDr@G?J$g#TO?T9t~A_&2*_#q13k8sSccsG)?D*)~% zA9lsBz~c!7>55m8cm*M8SG*UoZf7aZF#iprKMP@!uJ|}&9U&pRBI`74pCK6eNxI^b zi1iT(*%fm@Gz&qxVhIxEQYuMT{3T*dgTkaM&IHj061rVc2GnQjiWg=;^FPsDaVuE# zgO54xQl~499J4Ea5wY&25bTP(QSbo5F}vdNOf#EgVsG3j!R|4>IH$E5}-T2*$;NyaRX}v@;iQ{I*U#({iq)-WzJRy%Q=O; z5s&1epwV2Y4w!QaGtmrp1~6iD72?%za1u8=iCdk-KAkXTEyxCgv$SRieuvj9Ew=CuoO-EAc*c`DVp}3vcc6l%%{FP%wwBc8iJfqsxOF0!P1Zg56o@_qBeUaj^x(;?XIf-D4=P~;PTed| zkLa7_yDpV`V<9s5TSD?#5vv9A$-Obpt`#Hbdt+=(%C-XO)Qx>LOU#K_ds%|_#w$Qw z%M#pHz}+-T9NLfVU((6%513jNv3|i4&jQs7>K25#zd&XO5<>_^{xal98^nvt!9P%7S}gofmHqEMq{$0v2KvBQ{}x@j^V zdusgZ=}yaY<;6EpKAe1;BagG&EL2xC5dg`@PNc2McB*~e7+f7sTu5I~fE z6r5f~IJVN?w5W^6Bm`WcVv0^MirDvakr!@$o^w~(vL`bUitccalQdD{s zh$=|vD*Xzek|=#MXm}4dtkG(pbuad=OEHHF>VX8*NUFX%49(u5RsAfAp9K-j*p-f| zzZs|MZy#IL2W)Hc=g}bU{oDdhHzOQd)py(0`7A;Ez6aEIvqVtU_d+bwd(QimZGD?1 zsOlr2K8zr$egTQ+5tOPAA)y}nK8%$4v~4}bQdIT(AbO94uB!hNs3fXx0}WN34t)^q zQ?+B-(-Tm$DQ^<1o<0_0tkbG~9Wh^nte z;%Wq?YSM+x!&#yMX&*epY6zS^nr{;*pk z)yEpI^Rrg(c(cZT^n-Pcr5z|kKiPic7@0Dd%f6{ug*e`nHPq~ z^K-w}-g_@~&$r%7#mQ0mOT+qEA0OrwfLkTPzqsh#4jK>h7} zbCi640N^(S%3Ii#3RqA9r-)D*Ms565!Upsjg;vk*m0(I}JUN4RfRuQ@5ybo+j3+zE zDZ7veWtf!cgAJhFj&R}^QMH)ETGh!lsI~$@y?U`u0lNX{Bv4+xSg(M)0k{Z3nZpLv z$=?Uyy9A0kY*fHk0eG1}dGX`SP!><&kHe4}gAk(_e1pX(yA!E`2yVn&p}JI6G0-hS zD3NzQyA^OF0ILa<*M-hizykp6M=0V8Nav~Q|AhRzgz*KW9t9g!g$WrUmXG@Q)*MuV zR2RY@-P-pmp7TIg!XU5c+^B%70a!tx42GK&*F6ASf)FDg9*Qu^ZbNE83f2_YgZ4u- z(EOTWa0qk<$Uw&3oeDU!8eM{*#@*Ky@MZw6LRg$?;<*(0$oRN7G?wq1@Z(FbB2@6z z{_lmxa8QQ!wkUhLPtkk~{GSnG&qEq{tN$$|_z8hq!A`tVi!nPBVrttr_2C(wrGT%9 z-3RiIS0nL&W)RB*F*(KN=!8*rE>c$^O#Bk~RAr&5zflc1sRpe=C>;crpCK3p3f2l+ zj9uiG?@7foB|ICv>?V}ID2(#cEOAjWlr3SnCJ(?o1-ue~O986KF;O zoS}ff1K=eD9u~aa65~r-3N%9L9@NP*mBUIR6W@Wj3Lt(j^F9qKHA=77pnvv2w`$Py z8U#;&hX%drf$j$AJ*@jrxIr51?fZ-0;faJppr8OzMPZ`0!@5vqd?60!MvBOfRkF}p zT?myw4-lXG4=RwjEgY=a%@U~QRgJzW2^vRBUk93B!9L)x5-&ES;eBg>f38c(Lw}w& zF3^YbH}3r2!8ka1AhtjbLj?+8NFBay<6mZAlR6x3PEWf0EmsL^wZ*)hJ45n z_(wE;OA%o zEk|XV+$h_Zi5UmsPLR|>z$1%e!u{XG)D zLr@20?`ACqfA4il@u2L7Aou`54$6*QhV6L-IVd|5iRlQqmTjO6NIZgIwwvJ-zYI}3 zDe9mPvuFsJ7|SDws4Qbk$p?^1c_qVo-Vt>TXjYS!XL`>=q8mYp`VbPP!QaCOEG1`p zcZ1*(1QGQ%ByL3zQNN1>zqf{K8DEH|m@gxk9cK6lMI8-b&14^D(G+BkpvYka5tU_Z zDftvqDN8b~%TZFa`tP9mHG+uxCnVlQP@+D|S`7Zapi7CUsmt+E0t69tDiToy5%n}A z<|E*eGdC2|5@BCM%Iq}5AF*2Qkk*5&4ncNEHzTo$<>br_X+v^$;tiJSGQ-nw7a%*N z7l3Go5b~A1BbeNH?ViXd*=ZuX- zf=BdYFi0?3!-UsS=8?gLD`V@uL#mey19teKgz1T(Iqk(`uwi!m` z!obIwEgGFflj9D<=rhU|OGSb$iLv8l*~e3F4==>|P{qk9u@hkaM}$}iZcv&v2?jv9~F8fc;Y%G~ENepg{{g&`}Lq zp+OMhEe$$HgP_{?HRyZ|f*${>L04$de0=&4%WK--KPZrAf8{`2a5|<8h0qpKx=z#o zDnO6w7TSu@Yw?IZ8u4j7Vqrv;n0ULiUsnxQyELLW90PkSkK-)W{igEyaq(M)3pb$nisb1C~bV;TLz3YJ{ z1H>K=?^8VvQ<0Dh=A=fi`H+b`64Dn>6TZ4T8eE zG-#g&!BqM+=(`#OQ@I5on#!XJBaDg2TfZe53ZirelgMjf^)f zZa&xT%#*DA6TB7NXtU-=##{mGG-`+7f~>+YD0wVaQ5J@Ml*M69`EU`-nV{@;Dd(F$ z%F|3u`62vfO6w?4-b6}HOUTCl458|}zy%rke5O(V#}km7Gis9jlP>E?mwL{qWs-@c z3Vs7OE>`?28kv$mO8);TUWI)j8{$7X6|kcxpein6R8>b$C}&kGS8Z?Yk(Z)a8nhi# zKwF*(S}r3MZFy#yj}|K!P5Zkn(0-Z$TCU?1?WY-we6(0YYTCz61?|hE<$tJAwD<;| zj~2@@MO$Ax3$z{Sy1_hHsOUS=YuR9WTk=GVHcT|CJi!b@4?)kQWOG`@7k%7 zMWOku$*3KLWq|$BXdwAWwT}Pt0@+38G$KEmjojDSc0Q$5$ggKsDCFZTSxF=x{3>K+ z<{3oR{R;*kaPprK@%-{+?WZVTv17VI z^n{&D7LB2K@iGRGTkSAkR6+X&Aa=nW@YMw!4-CyPkPOI{s(a8ORl!si(UziJp zQvOf$FU)01mEVJ6!v{$Ds!MsmTp*Oa7+b)}CtZyC@&e>8Hg)5;^i=A*Sn)M#XJa}E z_mdS@x(eBEmMGa9X8_qjWSNWXFpCxPn^7#!i_?MZByuzi0oetTnE=frql6eA=0Ae1 zJw*B`r02_dihhcpeu}2AJrz9?DWk>neLqE6mbQ?bjoS5?7b1U11(Gk}DdZngHS&@| zAotQzc$!!t_u7j*nfBVXRAJpi6NKfG=wOh!LTS1W11XYChCH^e7-st! zW-Eq9?P6F-B$aOSa+fkST<%q!8eS#V0K3 z^tvt#Nf3(TGirChYee?37*AfSV*9KLueNTSRe{G9( zZ6@`z*xIOy9Xb)YEEa2Vi)HzXW%-L`ImOnq?pNuYc+Oqb_G;)1Psmq8V)}Iv@_#iX z|3=lQy$aS6xu3;&!d?}--(T#0f3f?WVl!CVl`O`0I#sbNLnU5qSB5G?B?Z*om7zvy zTRlIx5ZM~iBZO}jsG?g#%e@bvg{nNtb&7ADn9;hB{2N%K zc1u2r*(`RGTg(pmdf5)?q5WGp!pOTEay$U3DtOmC&8y&DbE$~3pazx`nvkjl$HpH)8cHhWRV85yT% zm=G#F%dkdGJ^_=QBxvE|0Z|0CAV`^SFiM>vQJQ9!if1F)W`+$qTQSNwK@~%`HhUqg z5#Ir`QWahSPB6{dY}Pp{7rY8l)o4lB*p||DN?|}J>eEzH+?q7t zWPh>6nIRNB1t2Oyq*b7(pNcfO1?J*RsSkW+X4YoMM7*g5h6bas0^`KGODjM{nHK~) z45kMe#IP=%;ZjOfW6ZJUlJu`sN_{h@7{%F*=AlZP;0+lY?e);stOB%L_2f)^HX8I1 zO+WkUJtmB<7@C}O%^uSTrSGjoYfiO&T_1}4uo7mNKLuoQtl0x|ZB(gg3X;&^_AS5- z?D4vbXIZ*vaj;dj*#S9Aw7${eTBov7M|Mgv4|V7!x&-r+vUF6nz^|0J>P`!AgTxEn zhOLb#t+LY7gB1iMUNp~B%Na~hh7My8*-+{(%Yfd;nq*U+VXg&oF(c-eC={G%Ku-{( zvcPSn?nt%H!o`loWSo`+8Zk1Bw$Kt6LrLH~z2S{HY&p@qy6)Xp7G8K?RE&?QD zv;e_BrkJOKwVuhvk49Esv<}{C`*cW*UxbGxe{m|~!zwNDQ4L2Fxb`E5dKr-p{dAT#U$F$V0RLTm;X+{38m@$mOQd00l1U{s01W%;+FO*tqDiu3@GQDFh?(Q3xdT zwF>c72qEK!l@3hBnTUE7W_2Ip8+4knQo;FQBm>ue`4T&zZK$UQDV4*0ZvnAQgs1pGm(;Q}k#YdJ(Ifuuk?Aj8{L-JO*v35U_cOsa^ zT0YYw6C^<<7ZAv*0F0!Q#cXdBfioE6QUrLGC5Whbf*I3s06d6jrv@{=LV>SAbe#q> z{;2}Lis&^BX8fK4e~9QK4Q70*G@@x0qDBN($@m-vZbQ_e!HmDEzz-mLNP`(auE0+r zdPaj8+oBbBGBSd{v&!8rU-6)N8(t$--;YB1wh75HsL?`SY%o*@M_BlX#fqG85)3S5MU zHpeO%*C{X~ewc`0#=8|5?Bp^<`Z}c9w+jvL?m(@*RC|1Gsu`pN#*EI=nL$R> zKwFYB-am&WH~g1U_nyp@RhLqaukyoS;*4KExh3RO8!Pu?Oi}DJy7C}~I_2n&Zwfx@ z10^YK`zm*U@#L0}vlm!-u;uKZ9EFKfF1skEF+s7G0;)RCSGfaZbfM1&@ikg z+3^=k98u{!i9ru|QHbSKI*;*K4QJWl#ZiiJ%ZP-gah5~xj6?q|xK|c?4Io~_NR?Y3 zD2LI;6^Tb5OsUe1jOHQ0BpJE46diOHHZo`vc31{zL&cN?v|uxIhjW_sU1=P6Q~_(FT$(T0Dp1 z#l=kE;xOt(fIy5`JY?)`_8PmEZC3rbmm|`>wj)I{=))oLsRjsKq`3rv_l%4cy^m#a zpsPkQucw5?#YK#tRp~s&&uciMz?Fj>6u?N41SMCrc)kRpHH^s1G}b#TrNc(FBvr1F z5&aMp$B6Yvxe@N#fHqXgCPuUaXp0ejrQbxDKU<;k8@MPSdPn5d4GZ9zVGn~Q%$PJ7 zS@_l0B*Y3xne{alu>$%mZH^1v;LtHHLbx6Q+I6%Qu(Tz>DPF8!Uz-pspw9sjM?@C_ z&4aP(hh~Q}!GOA#-#pF*6dq@yi*yreAT}_faht|EMx+-lV{>n0524D6cTqEZvopgx zHbMWup*c@jH!skveU=Z1dntb6Zwdf}tuUez{kFn9wt~K8#OW@naP&tQLyQ#7dPd~v=qs77^Q2TGBUQ?^ z70Shn4vkvjB7^ZY2v9Mj>kzPRyL6ZdRlFIgxT_I)f^pB%gQ#C6cOv?NN*+S=fJ#1u z=wX$_ukT{bdl15y0!|rbigkwJ)lM0{5vfOA91`wjisYn*_MAenLZ?Jvytt)wf>ly> z$jyjNuu*$)-Y}CL3d4wuHO8sKhF~DP8JPPNAtN?Y6Eexhf;l6KuQ5ou*Dj8fVC&1c?h;KWE4;5OQ|v& z1G5mxJTf^vF1WaX&+;SsMWgs$C*+xc`2&0VABm}>UVt%SZ2Uw3d+bOn9o=EEgpQxPRxqX2vW^=M zIBH@<5-0?}aTiw&&@-bbg40W!Aek>g2zV0ePBDw?kOe?2QPhkMNOBz`Meg%Plve4A zaag6pj4M?-i?P-r!S3ZRHyO}ljh|TxPo2hH>BvJbjHXI*9V5~^+V(#h1z2CI+#0Xk z+CaIuJr&BzD}ulxTs1JJ(?VA;ViUw>nNXqxx`-@jQjDKf=>(HfLP=vt;H1$5`z?0 z9P4!mG!@3{5MWG)#c?OyGUwLW&HQhBy@1M`cYu)?Tc8M4^wHYBEqdu(1Ci~VF z9x$HV`~R_t7;1uJG9F`!QfP3#*}((GlY9RWHXZ{GjwhG62YFc7M8bm?4Gnh1s7sRT z8Ij&Gv1E5=&PMtguiUyoxe=F>s=h|A+=f6oy}O3$<1STBP7)|N*9OXAt?2i$98tVD zTv(FE#W;ol)iNqa5O2?fV#!_)To_>H@!Bafv4BhpFd=}z#F7!FV1$KbgrR5P@-@a|=}s3O!w8B{@nJ|29d^0^Hyo^q+Q#>&8IcK~4lhLx zn7*hJMM96GuP9;#40M*iD{ck}RLaWYu2kfqJVsYZvY8R-9b5O?kl!t`%c>D*M~vA4 zaASU**q^l_JU%AGQTHpU}^-pQ6f$ZbSLsH?nNiYD(buxa@ zU`CYMX=SqY)GQ%g!^kCt{rE|#WHL!6386VjF$(UJBnq-*l7xf-v55^e48naf&Oz3( z@t}+(BsP%=p(RN%gwiL(mjMVJD&{0{Sfyog%pRecF&@-#MDFD;$LBQhUce|dNvNt{EG_B=&d+3^Y1G(BR&N4GiN>%0d+H?cKv9Sa4&x^@c9;dfpM2gyL3)M z$-IUUNrY|OFmOo2NMLos$R$-y(p`W!q{;&{F>*;UV+9P?JjNx)=j*GTU}PD6poH$D;WMWek>l};|j}nR|Mv9`@!RXEig)A$+UqBK?xB&rTF;Yq& z3W?Hh1;8?f!oy7HOvIl_mCQaxmM%A8_o+w=#B(Z>HO$28Dl>MNiMLfI zXPAliRA&4z6CbF|#9=0mNDmB68lD9;vXNjtX~gb`;zrcp9iW%11i$kTIJ+?}N5JgH zXbFOx>ttdn0^s1)!ysyPKQgi^l=WlTcRI>7{vG@Dd3F}|j!2syh0j8cQ-gfjTZP2urL5^@jYBR5Qv zGWfQG(07o5&sqIi@Sq7T652^|^xnTZOr$4m6d@5q=!_&7Oxl3*n228{4;s%2EfVU5 zD1r8t!vL2c_?xaNDphT>s9KWMBY>Oa$;G)?x1xn6@Zm0xR^=T!#ttoIb?Aa}do+&Z z4xN+t^9v*6csj0%k(Q$neUQ~ME`9|r9Nq(g2!BCL>3(j6+Daaa+M}pF7Mw$ zg^eYZ{^u&Qfal@|4pouzmp~3{%Sc`7`UCHuI|aa`Ptul&Y*Rnj12b#!*99~P{;z9jf9B3jJa-bjL zombc=jROz1$$=*FA&u_3dgZj} zq5@-so{YW#HskFkVeSKn2Wtah@1HA?x!=)y|4k_#gOV`<;Ux>C%X&Z z0)hArChkJOcuQq`#6ci-uOwW=k!%133eIADwn~Q?_h~pH_ww_|2b2}MNXdIG(UM9X zjf!>_<8>-6Cr)}a9FcqZ>+rXB7bs9)l<{>c?bhx6n;LXT)U{u=Qdt1vK%Y9x7SQ@F zqa1YA2m!G7pJmu{!8J%5h?SQ7?!el2OAw+tU1l|SLyv%9Wn2KOZPY0&*@l=-lLQeWqhkjC+TWD^m7|>{6?3!w1Gx@ zVDG=Buo0PoMsz_4)zf~5s9NAs)kmNi0Lg)D^&C^gnDc zag`8W9A^9t2Z7kVl5i3GVquOd#`{z{)hXnSD*t?Z994&mdS8>BG3AGP|GNVddYyj; zJr_0iix7UbIna1&QmWzMr*@$6)TE?61>pbyqJ|#hh)T0`xQykzC%F z@WHUc--r_6s}cM<^Zq@C-y%FH``v%6*89g8@fcSA_Y1rvnZN

    B%;-#0|a^(?N;- zm}5zN7)Vhu6VD=yq~dgJACnO;@4u7yeUSGb8iE4fixP(rsK|K%feC#$2?n4MRs1|~ zA}|xLBaAGte@^gh!tZY$L3u9hf&x2G3cN7jg-H7xLOcc_@DN!f*7hM@qFKQwGTxxl zVa9sqort7+jl^R=DA-QM-%x3Ou|!UU`P&cBh;rNp92EDw!NeUxcyXBVK?i}@y^>fs z-*Y$kv3k_F&?VFfeuVhsG@0g~NA!Y9^3%1CAYk(6r)GEI)$hPMKo#DJ%I-kGjU}UR zBj8nZ;vPZrBZXmP;e!+!qpNkJT|nO^lxrAi9@Hm!Jf|>>G!J5uUHo+QEkfPQNb^BT z_`IPojNU?kEW|MR4gwx#G14^<<6XOv<>%)UjtE@=#FGfvzGB2?@^DQ_Ug`8l| zY2)Tl`lp{x5{$zb3t+j(g}P(WVit82nW>AK0(JE1k~uX5$%5Rk(Y$%E$HzI{;S3o0 zK8~PC{N--|m_35M5k{o+Jx|3Qw+nRl3{|6uUR_3e0E-Az{31(ulZi zoDP7`MZhjPBNiR2%v+gV+6Q@QA9y!lY!i#H8ab0XY1paJF^o{Lx3@{nI^-!>$cYg< z1zh6`m^K}NBUCCDCFOYoM((g9Ti__dw;%-n_dvj~w5E)^fINhN5{xoI2c1wLCUc}% zBct&ihRIVE#$n^d2f*b4Vc5h-Gen0;l6y)}Eu$F-x)YgH41N2tWJIxTJhSrYiZ$H> zl%ik5h*T+{3MdFx2ymw`5O3*;2ulFCO-l7){NVX9Go*#Gm6;3FU*v3HHzDw3FvMY! z1z7LRW}JLpxqTq{9s<<+2%<+-lF_dbwDlcD@=Y&0HU$qY5KxBEGz3jJ1IgJ6<5l5L z-2pDDx&~JF3<72pM!GsS&Q~3?tS(2GHZaoF5#v=C7)DNo``yZ#SQ%?T*E-yhBF#b8`MbB^_Q=2CsNds>E8BcvVWQJ&I_7Oz8oaIv!v}ypF_* zf*TETQB;S5LOLYDb(eavlHav|5&?ccYvwRh3{Wwi>!8@Rd z4U9S>zDw=jP0lflpn?>5KPBaLJ6^a{3{5(BVoS{57QC(cwKGoDVzr+|+r#>G0vI1Pe5S z%LXni{1?X;uRIm~pK+q~@c*ZAvS|gEFS9W6L*~b$PQX_zjgR z!l8lw!k+HUg`Hcr6t?zno!h&uw|#DV>*nsl;?jbWg5tt%T`Bpl>~3r8Y2VS>-#$>- z+|}LR*3!`0KX^gm($>MH1BC++*x1_I-CKbF1c(1=zOBE#Wy{vn3c5H$3=D29E$N`F zJv}X(hXw#eqXW=^zV0N@!S1a|plw@QlR$?CAdZ4>**efY(1KPW>s7x10ssIHI561O z-Ah{B$GK8CC`Z(;)}EHO_6~ppvJ%|CWlKvtc_qUn19$dyZ%YPG(h~A-ZKLD?=1|-~ z+t#fKaFP$S#ZwcSM0W%axmt2t&R#*2;+X*I$t_*mg=M1AL6yLpE$!}UZ&}{j+t$tF|M1RP_Vhq`+P=XUohe;E$hreUK?F>t<;WkyW= zBj{W^Q{uwx9QzccCKLd;(auM5Yt#sZP3EWCCr7gD?8XB7ZjvUb&lLKt-( z&j-@M(MmJzF~YLUo}gIUCrX@aPuB4`jnCEj@rcdRkR9Omb{4pmge`l#b@+TFbF$AA zS<_<_I}#0>5$nNG_{X63Bk* zaf&jS`|MnTltC`cK^9%ZR8?P&SD%OTQ%=pc*#+6rs68tZwL{tV6lBN6?Cb)2Mg*n* z2EgUeZ8Pugjn7@@zb`wO@zyXIaCEn z1$G8Y*4tqKQzDD)Gz>^Pvrvl6lO|IIW(4M9MNYLdfDVlg$p549O8&xZVp&5Z8jTcn zc1ce^(39BHk7TRP`;eZ1j%P8QUBnt4wP!O$>Pgn)eJ-a;v6&KaItNFa zLIpn~fEXkw6hpdk5Cz6%Qwj7jVE86JOl+q{#@I`wf?Ru!$NoW&eYLPJ750b0o>X8j z0AXLGxF|7m{X+iSR9Ye_bJ@$SfA4@7EdaW}WXKa7bomFP1n06Ms zi~Ty)o`xn`{rrJXIFao|Y(`3=afbcOMAg}4+BB9(oKe0I>YX9!6F6u}BGE{>uZnal z1CDPL_=fWM!)XpR+Yu|%v`0Y<8>0g;D=y#klJ3r9+HtwkfYWuEwe{DN52K7sXE*-~ABosI@X^Jrb1 z&CSS)c+I~&K@T%Kin?shHzhKpb&?XyEwGnEa|L!*soRNGk<6D?gv*VYAc{~I71`PL zI%KT6L1n%XYd|-gV(I>YFj=P5cQPf*rFVd&T?Lr1PmCgUUewO8G73Ve0gv!~I{L!S zjWhtRLqY|15xCN{PGxM`QxTb9x#G+fD^}1>Lzw{%H`0F=b^>>N7E(MCD1IG_=PJfQ z$9%iiVlI?H7axK(F!oz;D3T|z)S~EQ5X`g}fM7Hgpyq;U=sT*vP;*e!p~&hLg&Q|+ zM1vr9Oqz{V9eUCpWt|_5TWS4LO%PlXpu5uRq0r1I$iQ}9Vd0AUz?8u$#F_S%@y45?AF5dgyB_hWt5^0@qL9n#51PuKo0<=h5>zetJ)i^3!ld+D~T% z{PbO(kMg^~=SFma?+nEI=`Z4c6pZAjZ}ZsuUEtBAE^tIY{WXt^U&xn66!JejA-P_` z$het8%0!}O2t7^RSJJF5V1)-o}A2?Atfy>ou z#Ie*2WvR*mJ0|TQVa6DwJEH}5Y98dCDOM|9x_HHzlHmjpnlFRfEQ96DiF5kj(N2G( zy9UDOp$D`uQW&4W`Ykxy6Y-ylVslZSnpKLC%{l{^B^VYP>$!}KoaogvIj){x>(=e% zT@2)<$D!v9VGKDjM-0cq>0q6)9!WKRoyKPRH8F})QIS0jq|200p~$px(&Y5hfwIy# z&A=m)PL1OD&wu!M;67+1t=@d!$?x<*4y*Gswk|DMR_!iAd(devPi-Ne33gd~4nr;noa^yXM ziQ%7N^%lf=kB^=G0^7PNvH??Ih%VGBq?@vuqYlWL_L)<4WU|pliDRV9NKV{D`{+r! z4HK?i#wQHJ4dtQVm$6n;~&ar^%^H31z*3B}t-Ool@<~a>pK=?p`0mC2ux6>c^KB z3~l^uP5ijS*TgGMOwz=C$(#7<@tSyruZbT!O}sMD#E+6TaicWx$@nIsT?fZRhdyK1 zz3Fe)&B@wzUGjFlcf5AJuQ*HBU3;SLx(_=1U3bliBX`|HN!oQ}O!Tvwdw5 zD>b4_0~|!Ib06yv6#mZ=xK$jNLxK!W-3f@1g!8JoVm^`EUppJU7m9TGj3Gy_Vhg1qxB<&vspdAWc9eygxuJ{zvpX_i z1C@FM;!Lf99kNA#HOw^W7X6QY?pUyZ;;a_+grB5p(s8cM#VqN#Qwa&^O~+d= zNGl?BoNvCFN~bm6`s#%s$RP|j&ToXxxH0=2pNb?`+OOo%Lz3qj-^KkKAACGLlG47L zptKcQX@w&z&CzSF?E559TKxzeF=7En%eihrZVmk1TK?)zN23wzwG^f0=lxp#4zwJ6 zK=abbrun!*Zb`I!-=#{+k7FGRf<)82AG=@9Gc4`*{`WP_+kK{aRGa1tyBtNrH2=|# zSK2;oc#dG2RA(}sov&1O?MNzn|Ffv9D^9D&9nI(H(R@5RE7ZQ}GmhpLr4?#4e?3jv z+3kLny`G@5-%w@qbT!>FNFNu=Ok!W(538q>?~88?Je|De68&^?x0U?qh{vaR$05x_E_hqoL(+!0Eyhu>bT^zaW! z^l)@UJ-A+8>ET+X2l3kI4AH|wbj#Adi1o7}1$)y6yII4YaCL(rbZF3w+Z?`nRDvG% zjiiU)X+1n54k@6ALzilMc*abwhwoq-<1 zclgv$u=O5jmKja~)nBlfl0zfhF~A`*_a~fcpJF|NhY=WV;hc>)U6P_tm)tLp%FIZC zko-4D!Z|r*K7u{!Sz3e-5Yf{VYR?WOz+>XdB7=ne0H#hs4=R|9#wRrFW979(_$%PG zNZ05IKbMe6)@A+J4awnC#5&AM)}81dYnd={Tp;Qf<2W^_7!pLZHr3FGhtQGTPJF? z&WfIuDEZqSYro_-98dBeBuM^?WRkz)vG+@U$8jVNPfeoa-+R3LqTYTyQNNQQ>NCki z{Wp)jU(|p6pAq$WkC$K6Zyit6{RyJJluXpeJ@$T44<1|8(5S$WKA5eBS=R&(PaMkN z3<8gWlzzm4(J?yq|B)kioEj%d8?$Aa)M?zWbJJ;p#*`u*joD}5tR?*~4l?;5@+9iB zK{(;#S-5aWUUQCkQJanhkD*$Qk+ae|0$3|;Lm0Qn&VvN0mO%kq{uf9YUo#-+iW(48`^e^sta2P2v z89hEP?i}k&XrwHz@#K%}(Bu`ep8aM!S1oES{K6!)#(kqpU>m?XVtsjn0)9ym>id9q zCgBM!RBM*SJ?{JyDze65QGSy3<;`S+li+VmiRRd8S#d^q4>qc>fuVMHH`#QTv=z0F zQl_{0a@}2FXE&JVRq0Q7oSHkRJTuR{-lEt0F@?@CH+MJLT_^M4?0mU>V==B{z2a)Y zEX(OSfM+I|D)cTl}USOqpe{qBGO5Rp~Ruy_1>i@T>Fi|(o2CYv=su_K3 zMx5w3WuaTllMGSm}G|8#sa<(D%o30y#(BAHSWUM%8m_15|E1 z4`6Kb7W1J&imx^e4{N$NeXuWU*eyJ>q3Pa8S7i_TVAx<2e*fu%?bWcKUEq~{7ISL=vLHY#X{Ge@B|qvb_8XXWM9=tiRudO`0 zH&v_31=Gjn+0(VA95E9#g_k=-Q@yd$`Ej%OC;rXZFO1L`&J)1+&hR;7`s}=*FUZr+ z*9%=A?f4%@4S{yd#H7emY1pDDSrB&`X^+}g4XU+FKVrDxZ&t5cuabHMwYpSvY@U{r zXqRa22C^%aIXgDy#6H{E05Z3&n`5OV^Ws~3fcEQ58XI*hhjj0M?r&~wQe!GfZcOS# zyiBjE)t|Xp$`qBCD70s5gI22bCN^hHpiH&QeP*R5yj(f(PG_J@8iyn`AGa^mtgbC( zV?k-j0&8^qsoM{^S?N6Ia`bnu^I#umJtnwo59RgBv@)DEOPM>@IC#f9s@Qv^?#e}N z&GhV_hBZ^Ke2U_@J1ZZj^?30Dt<*~zGmk@{J2u}MRS-8+zZk-ra54Pt{P~5+E<03& zv;DG-7{W;6G>Vrna-()$)W$KqP-MEmm{SKB=h0W!wSSzfb>sJbzk~DBviDo&+uD6By3oJDND$-(8G$gzf~_v-63zo8uu2~ zx6f7c>t(VFPp)Vu=RV**!CpM)-re$`khoLT?Er9p!7Rx~C6S1gUMJoo0=ws0`9vI3 z##~_Ir2y*@8-jlAOd0ds3g#M|d%&dQjg4(hRqv9f(&DWDz95z(4_4g$W{eIy5}G+l zO3E!K4zHphZ~XKwbP8U^iOP-x-jPg!5PT59m}j>mup~MVZaAmlE>ku{Wn)X;FF@HG z^-%a+j5%5Apr|zt$KfezN@QgmH!CydYb4BA7;cine1#C|I7KmRaTx*@Rr}dg5j_%H z;7Eo0Yu|k_DR{?#*C0v6o68hX&}l~^m9CyiLVc!8)~E*I=ajaw?}1WOfanabRfag@iMI`d`O4=FgA{da+>;Ur8HI5)^Up{lr= zk5MQE{i)8% zXE{}<{Rv-3W$PX)lHC{BQ7Re-%fK^hsxvfuydYAcHul*(A%q(Led}?J2EYThj=g>_Qh0}EFBh`HcgB+4a1kq89q*= zg=doCREJ+G_N>);fRmJ)-oQHfNby9MD`|0*pJrQbr(#|}J=*RuGO!D))O<{xWE7|o zKcd~i-W|K+AV{Yeb?kpNZ;vlR;FTgl$vnf<4~{Mcp;v~nSyuesCuv8rbl9+IZ5UUd5nd1vAidYO=LOG!C&c! zjk<>N0Eb)*;1PPGRJM*Ma|8!_0$M*WMy;pf{dC4D*67fwc!&}y>^jp~x0b7=;UrmB z{f%n3iem5u=smbx3diQllSk!IsFgtW*y}X)a89qRl(puGhj3R>YW8rmew+O})>{9& zEvj%si(y4GlEu;nS$WgyxW>i?IR`MFg+`F$I(<(I$%Ti$GoXEZ%tC(kjDlXW zv1P4pnE3Pv$5;NQvT44uxN+K0pk^v-PJum+oy})cYOPN0bO&SkC`pYD#uyEuVm!0s z$FZ7gSGF{)U)j<$xUJ7XrnsnO%eIc5)=vCe(%P2V-tNJs!TzBwgGNJt_qP7-!3&o4 zZyV}s-YUc;EwznndX3f1%UYH;sq|WYX{w~EXWN$Zn%aBXw+wb~>oo?dw)J*&cNz_~ z#Vw812J3CAZfR<+Xs&6gT-&tKXl(60�(Ay|}2PrK+oa%Xv#7!9Y`g>sF(tzkgf5 z`j%3AztK=%-&9e%O2-X4UZdkihX>_0Rxe%JRMXtjTv6FlRkgBlr_{Twp>}o4dNicH zp}W_pXVCx`0TPAGQ8qGVaTL)X6Hq>uxZKDPnApqF4tXu&dS5&TUY_6#`s#jK&pwGZ$ z>pa~FRjV4d^|Z2!q(hcB`C3-hu(oA@b+v5kX*25UTh=yJG(t7~t-S+Vy9ZhALPG@K zGSuJS-aFXR*GlC#uNHe4>K%mcNmbj6&#ny`8#>ziD>iTIAFOKa>Dk=6WRwg=0-!Q)#w}Q8E9|WIv|a$>g(~^>WrI;s^;2tH7!-k zD^{(lsc$JYmewv^-Q0zbz;#j0L->wb@q(5?qp_)`aa~Pyv9V@tMYRkojv8MVYIC9n zRu63P4LT?bWGzkYgDcy&ZtK6Gse4yDMw5)LZA1NA+V#MqM7p#C!FTb*xS*+8bhc5^ zwtZ=P>)=p-y9^F7fCWl<-5B!i9WBL1M}PbIEjzaLw;2`7E34{PRCjOhZbQ#Q42oUd zJ;3gA`b3Ri42PQ4Yn#~|aTkuhVX?KV)>YJ_{)URiij_6ZHI0TyP6~Vut-TM`D$82A zf&5{}9Jck_IxD4tY-@dWOV!%O#+K%ql?~F{Rb8#Uz3n}0rBhSW$_CgTe@l$MZ9Cfg zF~*F_?!ndll)bhJ^)~OM#ftXWM=Q7CV}Yxy-0=dFZSCzu%cw&c25>UEQ<|z*t^^R0 zIrZ@?arjbShcVFI*~`zfVH_Aut=;in51MIN*@}ktt3Gkc)73(}0SwcP4G<1(+>GzU zod;o?nj32>RnuZym4{~m6BL?|}YMA<}pRd?b4Kl!k=3d=_ zk24lm47GJ{Q;y4B7LYlnW>wnhn95doT@I0!+Ge9cc_!Mvu^xV@zP+~-23%FKs{HK9WF<3$tO5qMbocbMVi<_uS--w|nJVUtUMvGv!&>`?dL93!7a~w& z|Dfstjt~wrU!T^TW~^&o-Ds>@S6hX7j3dffA{q64_`qawTx;2{#Rh*%=q#PS)6+NM z^UxOqTekJWN`|%#anZD0JQXKD5niUA|nTk96of&o?4Sk)k2y;6B~STlUKsME;;F8hpz9KaMxYRRN7Gn|+UnDDQe^1ij)mq3~mqB? zq)Vl99iJ3j>9otDm32cEvi2dJtUIOYSUWXTiM>))3WRC6QKn%`d@>u?Y-n~?7&WUZ zD(h>E0W7#%I<^iPYx~fO_7?eu?B)ypFUsx&&dTwR|Nk{JZ7OLYAxug|rJ5E+XquU7 zv`sUkk~A$dt<$2J773wEk|aq&mXegULI@#QzLtdSA!L{RYyG`H*Y!GQ&bj&i{{P>3 z)I87Uy6)?~uY14l>%Px9I@?d3XveCO;`EVYhELHsShHcR7^^{cZb7di&6&1QTV4Ju zXXBe%QTgz)@kQloZmCfa-+gR2U5(_IjLx)WR9NU6uszg{wT4#PXhKHpY9dGNb+ws8 z^C&NOhP4sf_0F?B+|PS?xR@xj)4o>0c~eWu%H1f??wQ}oE-nlmI&-zZW|pc|HPKo^szgSpgqE)zC^b{o7>gc#&+OM-HwO~*1+ljWssb#Uvp`h5tB4vm>NR-r5CncF>F zmG{edD?-4*4w<(4I_qp;fCnFamxoh{h% z8QKu+G%zDqe`7rtI$n=0AE@qwv;5h|6-+KE(bj0)9)7b3M>AJ2bwq5^{yM;RADRJq zneB_RGqY?hyKcj$7U$b+*kQysi)`)0)`#yV@qfyuPOyft+Qnn6+2Q}T_kTO-+QOg4 zxWdb@CS3Q-LhG!tgLG)n#jd-;p*_B+&dSSH|BMY2R*@C(2fDtTP%N;j#jbzDQ8H{> zy=}4B1#l-FdisvA)`rXX7hz!|?OBkkB|dh<6u-m=3@@Fk^QP8h$&B*E#u59cwY2Rx zqr-wakOr|dLl=!YXr|kWwwh?E6^7miHtBH2v8iX4>JU0XeFA>#@Yl}%2++BR)~lVh zC+XNvBO-nd$tozw>FwM2Cx?|77MiwMTOf8pRMCN?6Ls_=kSa4H{j$0bFDv((bo>P6 z7h$-nO*$LK7H{HWEiRcjX@af|%6)In)H0V_nAJxID7I?HhnwWwAU^;Bk{22`!lm_ z!B6vBy%u4tCyx!xx>MDA=Z_fL*zD-QHCM$cKwHYhVmm_>mz1i-6B^up)V2+2!$>^! z+m@7FQab#69eeGdl`u)J9PI)q-XgYkyFYg88hvVMc{r-HajfLN;WX$Q{xf2Gi|;a> zu7z4&GBMs`szZO@euZiz+vzCV#jEUhiP*_qhr~X%OZqNd-=FI*1^m9AQ4|}>T8ipP z%1Nwx!c}L#t$)S(`G`@iGSXZ1Q#49V zz~QZQv2U|crg+rUiT-^&&FN<_tN~Y|=B%B`V`mG$J!%beF{>_^8GgI)%{4oS`jdpV z-~QHV)?d4x{u;mm}>TA6mNif!FG*tL%wS^8!5t!OB*u~Lt| z1qFH5q1tD(HYn>s>lC|fP;vO2FnmUlb_z~8+B9RQ99u3p zDPI{!kBaS(y1P(tzK&-Te9dTWsaKGW@yUhp;?|YqJMVS1HKoMP41USku~lc$k`dOr z3YQH1vV6{26DP#3PyA_6yJd2VEi}ul1F}F(0DrEu#h7^f&ej4{^VQC&)~%>M0QJuL zxyq!Y6kp-oynV*}H*2QWa zrCHs3=yF2$2mJAdmW;LYbb;XK!K!Q>ykqps8){tWZ|LaG>Z>MX&u#^(x4)Jyw_jjU zU#9P>4c*m!hEE(m+ArHMcHbD(5kXs$KPLU7S!!3qg=$aO<#XG_qh_otT}KM_efpl@ z*mkJS_9^A*@oOXv89SnPD;Yg@V#N{N_t(a*qO|o!FA;QH(gqZ3U07EpEz#JSxKG*S zyh&x{Nt-Dw+4(sid#P?NwmQC<3vwJS=0L`ptPhrXx6LGf)V%wlYNomx~LZo&D> z%??HC#|*POurNPYOVsWN^l6)PW2c~}uI;izlPZke)+OC5)|RwR&;i}^+xWk2{of2X zqiB-vrnM?+MfDq~JzT3x{T6<8X^n?*#aq_lu%ch}85wSiW|fX_A8n*%m5lWBUvU#P zzH641BwS;Jv$3Y3*^b>#qdQEAcKivG<)&6_Q;xRTZO7BVx*V&xHi_;1{{C?CcFy#y z>1Qj622z;mzOHxd-cxL9p<6Pxlf<{k#J(R(Oz0NN%E=vI9sZiDPDO?JJ&LmW>CB_U zBG*abZbSSwgKuQ1RX2P>Y-Hht>~q*fouV4FR-C{XZ6Ytjl{AsCB;+iPE1+i%_@KK=Ih7g&8?jbu z>{>Q-soDj*T~#H|UD(3I)tCJ~mhT`+-g~XjQ5(KhCbr;gM`itH6>w0Co$TT}Phr+S zlX9G2Eya_j+U?1Ny0Xh#U(SGVLy9F@G_`H}_#+LWbkZ5bs=^v)H;Og&3$2?gsb5^@ zI-AEn1>L%jRi9|AdRD;Sw2gJ=YDBtds94vbRiiB^*7r~nzns^KvO8oIJAXJ>^&DP0 zD(Qe_cMY=oWXHB`e=pFc|Bp+N-UT_~NHNm75dE&e?6FsdTva&vVp+?Q#<8^^#@o1K z^AKBW*2SRT0^?k1ZMbkXQjnLO+g<0=aMa}ykbYTy#~D#FO1C9l&seQ`7wR18kIueo zbO>pS^{$kiS)>Jh=GzUD@TpdEXf^fdw$paVh9!AXt7Z4SD zd{)+sJf{PVPGZ^Wbhi%v0n{p7gW1hc-AA`$hMq>yUZjC^H5wbpo~dB(u-(CL^!YPv zImMQhhHn=izOdiPMJx!Vw~wd$8}RCa_Sd<(Z8JXk@ItqT?pN9UdVhsxQ_CBeukOXL zo7m-?|J6IYN@b5y_i5XV-o6`EX7~nH#cIp4dm0J5BgrO;tx{kjP!6|SB%MC?Xm#o^2@@c;SzjRwuo)rf85I+6RP zOQvlVHcw%fE_3nch{6%wuTAT&jBVc>9>P`_>oM?~S~w>3_Ln)f#1hW+b|oHLi1BVt zr{_j8^@I=iFyaHy4oPTrSQl4^$SMq*ftH(X1_{f6155evv8ArSeljrHUDsQu_i*KJ zHL~R!Rz^6XC8znNtvQZw5O#D7hoDf)%rf1K^Q+hjhEZq`JIAvPWaj6`ZU|ZGzjQgr zmMrZR-$`XxW(hOJA*WlmuEcB?wq}^-J61AJ9l2_dYI&+wwqfgBUsPy!)cyX^F|z2a zU1Qhht~)&r!%I0gSf7G{K-q;GGeFIr}nc9@J zn(R~`YvaeyoUA@w(OOfX@E^?~tw7z8Qtwo2e)80}&HSIFCYFE3!_SEC_uwYpjIgoA zjtAk}WUT7(+f1-3$xGk)w0R7!{n~B)s$<6Gh=liV3+#ea3 ziq4yfP2cD(^n$bWj6gwwIxuZ(wIful-_1HHbSc|!)F@x;{HYV;d%G=OdSI-DXU8kQ zdHQFb^8H;SyWg6lP81zfb)Db`;d-U@m`M{#T9-_nGHLSg*4ZUxnzhRa9pSo{ z;agm6p|)WpUHHW=J4z-N7tr7etuG3c6zS5cqTJ`1H`77I1cR;u^YnK`Fdzn z`)BBV4A;!Q<6HIdecw{YYibnc{1gCY*}?7>j~JSuN8oEo?BeOOyYry`Dlv}r1y z7xnM#u9ICbg+;2(1m}5cXT)!S@)dv zmBz1)Vn>*qzWvVX(Nmoh`8hhGl$Q%JqmSzvjeHWJsNp1EOwNPJO`Q8J0~;W`sD1vRo|W)K*KK5 ziU{Y*?5x84-W3fjo@P$yreICmZ52ITW(z@Gmi9=!-Mj0fO4{Fc6_2UdF5%B^W7LhT z)_mys?5T@zJ6icCyJ=!)7qsovrgKraLi1hX8KK6y5Dm`>_32~lNUg=>jW3Hcl=YbZ zvngwrq@lqXzYP{|8D$hC?w8ixKRI;lg??neJNtc8&*SIz;o>QFgwIv~tUtut=Jk)O zaeLHRI}cs^e#!g3+IV}#)>pX5(&>P0B6dCbkJgzz*<$x=*ob_Kx8nGs`S!g^sv|pr zmXXdy+zHm%Io7Q5_r2^%H=8=Q?(G8}W#N*TQ;rT$**Sf4wbf*2^*c*vB|RRRaFyhG zWM!R_-n?yxQ`*|EpX(u}wyiQwh~5^n-=40i|9|VHk5bL5Rr6qXs3r2UAF9r*RcWz) z1ljxj2nS*u#=?X{A}k*zW|?bxfO-Xz8i72E&V zYoFd|Jaba#rlb~Cf9C00F0)2r9d`Tt+Lu+DlQuV1HBQWH9`fc?nwvJy@)F0p$LBS; ztje6qb1ThDn;$JZBT_bTyyZSm%SZD)LGzuM*E=DvD6&j!`kI%^qSM+GnO5Suu<_;E z{Hy+n={C*SxDwNMhjc%D;{1+Ndbe5)=2V$md0wUYX$zvuW3n%oygY2(#9n*!rdzEh za}JtYZC=&+RTfmfywbw7D>RnOT5VEGs@H1Ltwz#vn62Tpc;f3Naa?t^ZT!!1UG&d! zEsKmRalZQcdL_?S;__$`wnM)>64z6@et|u)eu-t${q(|mO04%XmH8j_9+uW2rIzg< ziFF$j#$(gYtkrx>t!j#GnApqKRb-uH)*6;Nw3aHGINbh!A8u@PxL5vtxO4wshD)sf zDvi(YdshGS)UGxIiTNv%@-O!DmzcjODgT21U-{`O6MLnn+44!htlFHabF0j&JipR{ zw9BL0ZK(#1EW@PzBy87V|4Cf`v;B5av3;h;CMtjR>-qma-G4hS)l3+NO)GJm>ZzDz znUvloAw98vy?uH`{SwF3HK9!6G+Qb?F}C3n<4TGX*UwJH9KRc+_N`v4lJ?=m{L+N{ zF(KPES6b|~#P7#R`(9?P{VAzis@H0uQ6ZAFt2vn%XrCkgl}Y>uJ4-Z`;FC`&X}3EmKuan*U9H7(b3dslEO=jyVV0w%0Iu z>&&dxDYLB#4lmKuBrc_y-c~+2r&S+U<>0D)4oa5h+KeG)y@r zlysF0Dc+=cLk@5$* zuFA3U)~-lZzLn3j1phiH_Qsp0xl5kk8m_l;Z18OTPgTB^@2dadWlN*tm8QKWxqMA` zwz93fZO5s~xAM*PKfG$j-gwj8!IAO@yAtJCd0S?w%D3{h^*_80c9-zZhDmXkx*LdX z&88^#p`>^=Q6SA75}Dp1Znv^*T>JDtRrxl(7xh294vD?-rnx$i@^##PfzDExZnkz44~G!z1MncWo&@Lqnu0-^!Q9OC276XK&Kn5s~soxIUCG zSAMGUt$eW!>|aN?v#oM^h550+6|XdRRAhWdxyg*Lw+2g9zKySEyvR}UclIXD9UUou zw7ZP*VS75-mv0a+b#(k)D1U6E{ITv@%5TyDsoJ}3`uE059qaB-nxD(!Irb*aHHwU{ zk$Wy_ej54lb&Z#56n|%L(p=+6`NnQ9wozL~449ZjQf)=o}!cGRwTrMVL#!=K<9Fua|IQk9?hN^>nD!?$q9 zGkn;7TOK`VaXHZ3X#Phu9l$nmai%{*&ERj6YqbD&NLGAYLjAKR6+_{Ms5eyiSh2@us=X zk@0tS%VXo$5UI+y@)h;%94UWlr2MJw7RuW-MXEd1moJY`|I|qN(<0?hb9YmIjGz8# zzWktgsng=`>`j_GBU1hh_Xy>8D?e5FR{x6q2VF3*>@Z8f~|VsE@@ zE`j_0^7$2sMHO#-{;ZThp~+v~)N!g`nHCP&Iob{A2;rSemi zZ{?fBOW9sm@k(=3BIT#JMU=N?nyP#&U$K2msVJ;>X==G7&wsgFnKb|9zI?@6FOQU; z7AZf?-9h7Jp}N(%g(l`5A6A;9N zlz&=7q$=OaSFHb;k@B-5!R2jZtB&L zyW*|hrRn`By~puZZL?isUbf%cd{)$Nc zib($Tk^Ji;`70y&D&b({%w)`+ame5NAm5cU-3$FYa;n;Dl+vh&8>~(uZ`s2 z5y`(JlD{sJzb=x0XC(j5NdEdr{`yG%U6K5|BKaF4`4wj#8!*jnjO1^Ol)pQYe|IGR zo=E;Zk^Flj`S(Wh?~CN$7ssk?885`fJk+@qV?iY#AiNvEL@r+1(NhDqpiEkh_>Zqsn=A?L? zTb~r)<2EP78{IbIFuymt9mLketK+VByOV~$+P$3=FL9qFm0#t)Ns4c9zYrhe$9JuM z^jmNAvTN)*ZlS9|Y|FBayV4zz6fbhkl7_#+WhCWa^=NK8uw9Ark)`i4Tdl#Y27572Ejs>3>}}*mWju;Nu~#7qQi+uCD*jrhM2Q zR=AR+_&PU<;k)?Zhq>v*wm;R?_4~!dU42~aE+=m3<56yDQvPUnGqJ6&x^Ar7s5thr zZDeaCekBrr5s80|#MP_D#uk=G17d4A*Kzl`V_|L-*v3)E-QtRq;??dV;;_Bk>@H7=m%AmzHGTQZ-O8kRfxDeJ?5}sbjY;wCZY#0P zm2D5NMB)#L!}#aBuOj(>5r_I;A_7G38H_`Xl{L5GU*+aI; zALVc2zbMh3diIZbCVd(x@jF9ePx$Hq``8B+@=NsOY{iFB!^5Zl`&;c2bN=yt#fh2G zZ|3;74}(M=4UJVP_JNb|sA%-daVXR~@vDjxM^rH{;pOUMGG_phly7J-|w( z{_%0oFrC=EnuXF2T4H2hbnwDF(DX`^S=?P*&7RoQ;%ij^@TeABBQpRP!YJvDDLtoN!| znECjWZG*E3_lbSkNI~)!uO)m9i9V|3YtDyA?UP#xZ~fAaeflT)vxDIaU=zMaE&g2z z@$W6K_#j-xmoeJMT`E2@n*6!ngs;npe07Hnm+-Z2z9#;IgRzfyn*Pgu{P(U^e8e#J zNnBer;p>a+oqe*x9~}I`w&Tc z^Xd1eSP+hqiQm5P@1IW4<`_mDFKt_A#V0ate7@2?pD*#TL>r8WBz!KDod1sxSJ|%A zDZZD*KSLWEttI@k{x-qHFJs{=jg0sgIcvJ1VA6*w!>;>p-w|X}v}g169b%!JuhhSP zsya5T|7a9L`_E`tM(kLY@I8Bpa}&1R_*U+}kl!!W@_+mOOy2|uA4s*&MC)@Gws-Mi z+W4m&;@?G~1*2mnA83e8l|z@#r*`a$rG`(|`R}iYfBkqYFMhC#f5O}jCjL9mtrq&o z7SEeqk>c;|Setr~8dRx^Qe3flWr}Z`rPc}0mZ$312krVIRS##qXzH2sSInzY{Bxw$ z>xbw6tLw%?6Q!Hk_yitmp1^a0ho|`Gzbu|Zx{cT3GqF_K^e3B|Zn>#?Si8{1uSt5X zU%_I#eyQFnJjZ9_>20wbM7|&2VHM?L^=Zg(zP!d`mm5~ju5aV>q4D;#ILqmdb;uur zqtNcGS-EL=5za&F8MpjZcst%JQ|pE0Y~#1(TwNEd>1L1coSc>Gs@Ue=ma8oftB)-o zYYyA+wM><_`Lgut7Hc8JmeX+-YyP_76KHL4E8pGJ^zuw?AOlQ2?&0UNFg(*{P&J zbH;Z%o{7tGJ#N9&)KHH~R{m;^YfCwikHe1G69?cp>}K`W@P2)0 zp$)V6x)j~94sI}2iT{e_59Z1g z=hw$6IzAE)F>grm&qr2QWoBD^V~X?7{oRz}Rw%af>?-r-6leGFQ&*?B+s#{2+&c5t z6t}^=P1~(`dy3m+u1RqZnVPvr%{x-u6Xv=U_q2IuihoWoRXd42i`o=V|G;8(WT+uASBo{~+yzhfQnzaTn~$Wp zbjw#ITACWaR)KdW&cP+P3fJKm*pl__=SS&{ z#ZCAS+Ih~lTfbjuI=wAj;~hl4KMrbq!)!Qh*S_A%IZnQ0pA6CPI^O#2R~~2EkB*=I zxcIV;GZw3S0~_uY=3lWb@6@I2Z?Cf4mEOkEcd`Fz_)b>tHTJvRv?DZ}-|wW~e`T?i zd!6y9oZoM?QTzS%&6LnS+>;WH>l%KTjhAxf7%Tr4>r>@zJ=%2r^3Ztva?tdrS-Qq| zk*V=5FjamL`u$n)GU63z%O~}1=2y$l9}hGgKYmSTfDNbVOf)rqU+x_pe=XK@{-4(8 zyR^eKopDzFecCl2=saZc-jvY3RXuODSgyq?=0}u&Pv>`wFXp;LfjN{On{`*qgUsnDCwfAj1)Q3V&F||MD$yAr( zw^MTv@emw_#W)5_aWaO~jvn)p+pd-_JPz-pX-Q=gU`Y_)VO5bzFSc z;teTouc`CzK64}IVYLgsvRIY%$6XzN{c(4{mao#SzV`fg^{LLKV{^>FQ?M)c#J)Jx zJYLsn=A*hEBEFP(Ij+XFrXI_<8y`Y@4${(J#5Zs+?#J)&H*8r+<+f}4Fn8#9L43P8 z$hrH?60M)g@*G|7nmYKjH&t$mS?b(H#P)2X^=s@j)t-9MRD0?b^K&hCQzu)yZ=0&+ z_^zqty4Te5-e-QPp|?@etl_H3usyNRj!u=|Tv|CXlavyG|wXm9GexRa^n(8bjJbTu`9*`}6PPgC1x zZ&S-X&(v}+G_~9Znb+tzZhocXzp3-j81qUU&!umlnA(mP;xe@Rjh4R7JYM%vO>L*! zh<6h2HkYKh_i>;3wT_bq$!~Oi!rrEiPldS9)cCfTD!(1yH77auovGz!$4VQnjj8eW zB<^dfeuX#`i*bsndS7I!`~u>o#9K{`Z-=Sr@4>!Er)DV%b};K?XJD% zd;)jii?|E-;QP1_zrgSCXZ!JF&odsJRE>Sa0HIQ ziCB&^aW-nz`TA?Rqzn>{Ul0HCq4<=VJ2ET&C2(|k$65{jqA|bVK)3ud<(z8-?66JQ#RbucoLq0 z!|*(OAAiOwl|%XZ*c1ogD4d4#a5=8UEw}^Uz)$gKtfF?1)we!2#f~@tN8=2%=hm#; zO1ujn#sA>@_$@lMldN1FJPzAoHlBr}a5^r)>v26kf-mBG_znJzwbgF1={LeR@HDkU zEZy2K<~cYH&&LJ08K1`2@FP5cc7w;pcL*MXU2r&_hnL{hcnjW#PvWciAs)aKwFhi^ zb+9cC#OXL6*Wu&%GJb&HqIF!`c&$BQcER3g?FUO=gsbo|+=rFy{H);)!&9*rj>ik| z3cLaD!bk80d5J|s-{7;KH1 zI0(n!3S5T|;ZEFx`|($-Ry$0m0rtc}I0k3n0$h)O;~{Dw*>XA-TjLp+hx73|+<|Z4 zr`S=~L^i(eH~>fCG+d6G@fmy_tJDkQITt73OZXR7Iy4Md1CPfRn1Nlf0MEuEEWuKo zhl}tUT!#|dq!*19ghvRv82`7qPC0>Kq)~&sg~c)*Cj)49vtlEW(L+Auhrja6LYZJMm5Y z4FAM~PYm@q8e3sk%)ud8inH)aT!|a;0el!A#~t_@euxJ!rA4Su9c+YoI1DG_Y+Qn? z@m_oq_uzi~6|1#mePe6P##|hO6R{j;;%uCUi*PBfz?<-PT#xtS7JL-9<4$}DcjMdm zA%2a&n_E+yzM{^z*J_!1ZlNA=Bl8M9$3WcPRA*&p;vS~@>3b6oHs4KgMZ^OMjiaewnFJzqdvY%WW2V~MAmy8keXc%i9I+N+3fG{0AW zJMq1y?#pc^e#+GSx}C&tnCk5PlK8*oXL^pHwN$+unz}#Hh`6OUl2XWp6OHWEK#>VDA^#4nk;Z}b}RhoH|uD7BGzyF`unqEh^Lwdr??A4(H%) z_!z#6zu^%b!+4rtJM3b<>0DRrj|1@>EHSklCz|IwHwCAemudeXzS7k3>snL8-(>D~ z?pEAtYWQvVEb0HjSMekAKgDnH2mI62c+*Y}R>cOU#@`T+#}hCEJ7QN;G3~=jIY$j~j6-`P)rR?`87^=U&4%P1W;5^1miN zfIpL-+BpnY1#6fZPc!Ufsvf5k_cM1mH;i}!`4^a~#{zSwzGo7bn5xH0^4Ait$9qVB zg!plM+SGXV;sI0j_=ULIDT-B(BTNm~)KvaSrs{F3`J{7aU~kd~nX1naoQW6VVqA*X zn;PF*^C{=nl3- zy&G|N>_z%O;&X5q>7~SzaVqJT5YNShq%S94i5p4ZYHo9G8*V56Me_F$zl$G|{s*x= z0BiGC+0^{iAwCR`B)uu|iP)O-Q;E;OY|`_H3vn>%qs@Dq8;_I7pNp5{O1uegGgWSr zsrKep;@!9(|4aVg#I;Y;@M@3NH&wn3W@CTy2br4x60^*?u{goh^0^G><8oYyH=8Pd z7x6v#kg4%)!|nJQ`ETNfq<@BA;veMO7xh~`s+$^LZBx&QG$Q?YY)yU#?2KoU-xmjw zJ`_h_8Tr%k64K}66}XE0)wrJYdrj5rNz$Lem&tz}-@-4*{|0|0{Vz;CBg}6-Q}cf~ zHX^+lw!kjrcf~VF&ofo8;iQ+~B=V=?`M8k$#khj>oA6eAfcyvXNz$Li7w}#3_u?0% ze`l&*DP6<-RmMY1t>?q=2t1MeldwJM192wah)>{NbeUni>DU#E@FKhkx8eKvCm!7` zjOSES+kLjVS)UKY-lo>q2pomuO$|St_yU|w`Xb^bc)h9d-i){5Ch{M`?WFI-7x6vv zKg2Ka8~g=-$I4k@dNuG6OgA+@P4Fbr+hZrpCBF|2B>h|*j#J2=h8N>yxCocvN>j^W zHQtV!$$uE1BKeQ`>V_bEH0xf;~-bFZtvTB_4sJNiQRwj)?l#^$8A zC+>tju{ZWNwH%9aIxfVU@P6EZZ{yeam#KQxI8zRA?hveJYP}q7D*puHR+vHh>BQZz z2k8aG191rHV~9)fJkl>Dz69r)s?Sw;Cq9R}@Du#jR6Tz+)wlBpx?YMkAJt9e*C##_ zk0reYacgW(dRO9X%r!OsJ~)i@VjOF#-7wMA^k$NN5ne|6Rm9ie3es;UUWXe=f0+0& z+)nyS#JliK(my8t48Jl}ub;?I>8)7Hr83%Q9xT6}sd^tvdSg7n)O@$X3{%6MPJTD+ zL3#o4Kpbjn{G-V)BYiqvXlndd2@~t|1``rwS0OJ7vfM;!;d$MoSTGYriNdDi|}ew!{11J3$8U){vO

    t* zq=rl(mbzL*_V=o4cACdldu2in1&f|}B}!46K+@QuV6nogXxwlhN=RdM5j)KPQSFTv z`3MWnq!iETpeQpyG9O{VqiLaa0G=c84!4hYq>BWE2Ul=F!#kqbAejJHuy{RA>7*!q zKr#U?X`})`8Hm=NIDQKo&FwW_S&OfO#Kt}i?pLHHlJa#>KCNx(jF&!;jN?>LKLUFL zNFq?Uaw@2lT&V;w78EIR^i5Fzwj7}hXM#lYE`z{QP$xQB^P>6Ink@DX|Fy0;G4?4pMwVo`2L$W^!6GwIF47Kh6m47b=qZ`%7% zRF?rB22n1%PaMIT`GSeMtxWr1ieP9wE@P0im1(bBhj5GuP$f{<%Ct9-t!)6;g2>ia z6Dy=g=WN2tscwq08zilqw+$nY-cLkFfTWcRHnFKc?vCg{WMy9M2=_?5Ca~Yy%j&#uYG4q*Gx<|Cjejyl_gD)Q z_r=J*c$EOb<9kz9quQ&dI`AX&)v0mNJUmrs-k#dPF7mpEbj=%9afO}hkC$5zG&eld zn7p4FYmK!n*8T9{u@r#KR2dQL8fz*QeG|})AZTXQ(K?NFVx4t$4eTF$eqIZ^db1jbbPv= zo~(AFpjW{BmlO!7ryzURiy$lO)7fIap`LzK?WuR*bIq~(A?$e`-k|HB3lKNux->;u z1HuA14WvK2LFjL2NKd#B0v`_t-2Vciq3`62%;A8xcZ|!teWU*3us5K8YbL9B|3>nl zq%j7kYm@l<#l~s!Xue=cA;Hr_aL$4B4P?o#L$;L%6y~6 zK@>;itgh@aK5UkEis+qJ%p&|>!My;IalB#{;n!v=%4m@E?tjg~yUPH6Bv5$ws#$pF z$ilS?!W%W5+hi8b6#^Ja;2Zq2SsAjS9yg0O)XRW>1YuLe&W>;DL~WRFZre_ia5yDq z1DxFlLc-B}b6=`c8PHK6>1e)r7{&KCfQ=yOQ=#-JayUM)fuv7G(x)N-IRw5zjuuOh zADJDYIz#y7+2Q44tyFWe-aHX(5pBb6=KI_4pKwdIUpI3vU9<}eqavz*2%{FhZNX|R zm<}DhsLzRE5A)@7s79OSq>R`???siSwz$I)_nZ*`E&W>Jt~7~8+X_?z$+#;`qR~d? z;6({Ub?r8{Ky4Sym(11QrFI)r$+6BO@t+7FskhrWg7UQkz%~L!gYGs?psV^CfG-FX zr|JjBp46asaOivkk}dF8qi6vfPs*KKfT9KV7)1+o0T>PHSk6832C;lzK2P7{(~Y9V zmV!AKgqlAy&!NKQSLbC@v(9tGi@Pt_D1wSAzy~alT+$(z+yr1Ffn~h={LaaLwjf7W z{M!=u27J8-J{v?wttjFZf6*`<3!w$Vvdibk4?pV#@r4N_OSjKY?8#1}vC}|Q@(B+YuswWdi<-|* zbjt7Go&!lWpPxwT$}zaBL8v%q3q#^XjidZ}P>qk4D9T?zGT|NkM2%0Bf&oIDgBLc+ zqwh;SOl;xh+Gs?9QpaBcwj z0VLO+V-RaMmE(E>VeQ&Qoz)mCU$w|1&yNCwNa%0i{t7}-_biIX2bX^@(wi;9AgW$F z4o3wD0#Qv4BsaNfu-w}QL)+e_-+%ZYwfn1=GPtFB*VVSY9Zko;0ky5;Xm6KP09*`t z?Crx%F(}53CfeK1#VKqO&tFV`*DoFunnrXFP? z>o^!9*q!zeo%vs)M%&NWck|OmA z3)dQo)m+w3+gq%@q}3Oze%gf5>I*DOV`J2pSe~|lh7v8k1VfefT?vFIX+28ST=n7# z?U7P-lzMfAb_64f)uPM5-J~_p@V2(MOueFBT&ewetU6o0x>D;}uD+<=T&W!_S7$Rt zOCP7sVPW~sxl zOe>|KS=&s*ChZmt`?c(8REB4@=ckFtFJX!Z`cKEOSX)lR9_{3G#M4j9ug7eXwtjrPVF0G&3vfmfK@lTKWII=X^lk`}cX??{I$aa^CHn^L^vFQ`Sx2 zTGvOhZO=y6rxi^#DN0p{@<0Dni@85os?mHs!=RdZFa~C7ra|@j#!ft+aSjX?pGIHe zSw;pais5PgSz13fpI=GK4EWgsU?&S$3iE0|n>Cmhq(`wnye)lXz-1DC-JtU<*8BL2 z>4VjiKKyjLhjDJs$RGN)4@3@jiww6Or1?L)=cBD3(ER=Gd8+keAAVcLV3y7IWqA4; z;l1HVH?zdrMZzC-&&#aGeE6k|#16#|@Mi{t1yTB$Sp_^bKERHuielS};1vJj2_*{a zVLiky5^Jv&EL$$ZW{BT-U!NXjp8>3|0lasSAjK8|Cz$P@ltEjP5i2PM23em3!xfmp zdUI$&pP?+5bhaX0itSZA7~%>5V}xNa7=4mVN!B2!+n)!Gep#Wiv0>rN9a?d zJuei~WPNI}ufwvYRDEi*ALNeANYeQLD7jGUN9>Qjr|i2g9A=u?~hd7hNzVLm)RYZTkWZ_P?@)FLu- zoi5ydnF#!9wO< z|L#^0GMjW6qdg8KGvBXIEl}B)9Tznf{b7Do2Nk=4+}qWo;tJiE6Yrgfjy3PqL8skD zOTVN~!|Z;1VvdIe@L4&d*n50?PB!!9KjcKR7H-b<%s!12nok<0Bfmb+;L*ovzG8JD zrS?ZCpg((@eSie7>QkfDMT;<|&n?!M$p=IC+-42OQDOG!o;wuZvHb4bnDEgEhuJbk zqb8&BXjB+7D!%XY4|Ah(P6ASF3uuqpI`Fru_)en&j%9{9@X2^59>H?QAo_Pkdz5pMrv@^^#YyeHLHLUH_TeU2P`cCaW@0Q7O3oHo1iB7cw3HA!>~Cl%-!&;B zG?O&O5U+uFxp+Y1F#mE=B71||@?zOOJ_66@cvW5++sU`)jUMx`6Dhda6HOg=KS%>b zoIsfYjw6s2dk4~VwMX>Jdw|{qDN(QSz{#;O+#kGpPpS|tl%kDN^cP5-C(-CKUNbqa z|Lcg6C40t@C|y6}K@oRLutew=x!wG!$#G#$WRZ>47lhQ?RDB`>79#_cnzQ|az{51GakP%_| zC29Ff0G|>l+UW8H^Ih@?Q0LB@RTNI}Bm+{wk1wLX~0FM)R2aZj)LxTGOybi)eG7H-+`m{ekTo_v*Y|p;d_FSo9 zMg&*MjHqF=1jhp$3zD|yNw5S!5lD%i!E=h@9KvXVJFnYe-dW@vB&;M#h0h_})ng?| zf@cBzEUd(Y@;8fOQ-qnXBYMnG+}}iqHwLVRfqK`vtJL!u^^Cb8a zfKvpDT1=MUK0rkVtrQVm);BBQY zDe;f+WRi%-790S=vfD~iBx_rE60z1HCA@scNrP8iBgr6b zvJa%z#i=oD7>}5y2lJ3fn5sl&>mb(zc59I@;9TqyVhj{@(unQsA+Bw=|=R!zE zk7xofs31GDD|9=bgpBE79;V)U=fCV!gm?S%PDrmmllYMeSDkB zo={;RHYAe_r^4Cc)b>C4@fW5KRgVPmAErl25hWy@M7{<4m@X1oIaK}G&I>DbH%JmdDLPBc4v%o!v;24P&u#FkD#(b#5KK+8NkBQ8{K z2ImM$P9+L41q7q~{EX{{AENH*{F{M+5TXwHM(9&Rb~;lj$Yap@Hq2=@m$ zh5I)|;Qa~YK192IkTaiFDs(H#2oSBbqpC!`VBwdmB0GfM!XQ!YF<4_1tz$=i*}|Yw z(yIedPM|QhC`i1>?E&xvfy?NiSrkw|Ii-X3J`dh!WCXTf%bn6_f?enAeoQQz^Sy*76A7Wc!)b@I@3i0!UC%}po#rZY>-TVD^R>1r(CBfBSA6& zE@`9+Km~}_ZkV}?#c)TRN7mwt0I{);gZnwDiKKiHP)KWA`{Sh#B;)upU^Icl0VEM9 zT=_DfoLs2}FdY;ja&#;pxi?2B!&d>Kd2fTj8qjrgvKB=1-E}!^4ga;yGe=}0Enos= z!7oNpEw>AO19ps*g=4a^v;tlr-fS(EcnD%>mfT;ES0g5sQgirxq zFIV0T;89Rqmz8(a7oh%!>pkgW)h8XIhr?r0Zb-;gcRRA_&BGpt%Nz{1*g{V^Mp9H~ z03HTWE)yFju_nH}LARCd7*7#Qh{t6NlD4uP)mspbDFLbk3R~HZHnR0B!23aD>+^;x z>Cq{>u=3>~MR^q@t$b_GB9C4fjE(?FE8p40rhX?8(SgXy(#A>dNW3Pn%YEeaz6>YA z$s_=0DZ17CM58n0c7M$O=pzoMv>}Qz4&)uS$M=TmjD_>YCQpb+&F((Jk$b?s4di}~ z-`8|shl4)Qy8L_3oIDjxF%)144iC4`?D7{$EdyEtlHPXti-X~I0E-Cxn!M=ppGkW; za2T=ya$hF!sQ)MezX7nFz-qGqb7~>P_ssI(hk%b}#i_>}{Lfj3*f{?FY~5qcU)&dy zN8wch1dp%I-hgUvnB&Ap=FT~B&^$axXkMAq#$M#jb9K#2HgScWO2*4A2%6jHwvX6E zEx6g%8|!=U;Fc7Co2W7(*3C9?K0XF?2MC%u&9qK?vshg>5TUck zHkulR72rD9NrzwV-`1FdHS$vd4yQt|=C{n7P%5-O^%FiG1n)JFY>ZF+YED8fb}Rsp z{7mWc6SeICu$(|2kyQyk0bmP(PVQ-`mX*HMPgHu|I7Mj!xo2|Tl7SzYK5fy{ljA1} zdKS$8NCDqg3UYX>2(r30ofYuyt@Ks3ztzcR@_)Bxu-QDUP1ir=D{jgyX^OHLgaz{2 zNPkhA(BIycp0GCvAs_a=_60;k-^mx5!@j-m7_aj_?fQ$u0pH}FOeXQ&ur@qYTBwy+^`_owAt2XYTCB}ybi(wRBWp_4*vr1D}mzYjEPoJ zvg8T4HbLH>f+-()Rxka4bOVrTLT}__7jX6gKeB)VJ-5IqZ}+Q~9CD~J3&%W&;)qx{ zkd^SPg`U}>cOJHg@P7sOJCKayVT%aAF9)K+>mT=~Ki+{J;j1K9xwHN&w^$cq5%wr4r;HEecn^ z3*=`Og;k2RQY|C&<_Tw0Xd4c)T-$#Cf?Klv23dyn^x5~m5LN#cMk9RNh1FOf9XfbX zUmU~o_}ax(qsJDfOj<_oMb+lsxWf?l;zg(I)5NMF~W8 z9kirK{UU&OF45nmUNwp1r~hR9Cjv<7y=t07`Fa7svjmC;ebrP?SM_-S9}_4})z?fz zsX_n5p>qr*Ti^|oXaO8g%AffFMGNdVi53_DFdEdal1DBb$D(=VQhkrNm_&=M0dolm zHDABfslw%*OLM7NmpbFc-4|#QK}8ke2P}|W(kYjG48RTo2lB*a{YR{_B1dO^dK32~ ze7y=j8%Ia2DB@Wk(J=jrp#{RSYnR1Oe9i|#`~Id`hLqQV&vy4{?(-3+@ZCUf7Mg)V zC%YMod<)E1GmJ$c@*OSy#B@_ww~|nR`VJ~r~Co# zDUek28bwm?n1;I=go<-^Q&7C9ag=cg)%cS#MR^`16W-S-YTQ*01_*JEzo}gwl^+?z znL48a_Yg=f@R30rF$V#>0wTYT-87K3amxz*V`ia2gwr-1KXZVj+CqZ}=MsSLL2~WI z2C;TWC9WqB)^1$UU;WjO-?<`Eo*zX9ksXAgbOt14ji2 z0#O}KBzHu|c)7O?hTgqBl@5W6>b2EN8Q)#Ki)!!QK2M?t)!vSyyoE{$UlPdISA^GRUy*`I1uU0?AlCyk=~uDo0-Tu4u)`c zs1HOJ{FkT+x2W6_3s`sl2e1r&(<;i*1FK@(CrnWDXT1rA@5=Wx0lHW3Ilk)WSN2^Q z$KG_LCN{M+HzYPT)Ym3X&MhcOEUK-a)l$&ZvY=(&th(yrg)`?jv^Un)HB`6P*4MTt zW;e`hXs=z+(q3I~eTMecIOe(ajeNH6jeK>pQQK6i+O+x-^%P6fa!b{G?Zq+xJ4)4i zSd*4KRo%*3wWBmF(Uwlbuu^lCVYp3usZ7mh>ose+ny)(U&??H+DQegq+AfT&K>Hmq zJFMkaVCd2|SEy$-OBD>?GhLmlhTW;DmFk0P)ScQxmFglEtGQ;Vi&>JkfrinVwF*O; z)>#GR_p~E4gQ;o^UHcAHt6wp8Lfc*o<~i*=235IB%b1Df9d~IPX^gr{JBbknhtvs6 zkJmxCRr{T0+qAZN%=T*s>M=W^B{yJpT3bs)l6I7a94)R9LxHxm5h7*Ud79N|={I0# z(l*f0rF~7q32jIdhTF7G8lKUP(D0%bJqyErt&N5x?EnpeNDqN+K^@p`?XFQ z4r@nfIHyI=qjGSqeV&N_0H%l|pasKYS}hHywP#xpRgD(cirIQ?DGfE+K^o3!t~NCu ynVQh1_G4SMS#9b7RA2)QFKRE*FkJhZh9=G0E_g#Qgym$YN-2IW>Hf#`KmHE_iBBp3 diff --git a/build/stm32f7xx_hal_tim_ex.lst b/build/stm32f7xx_hal_tim_ex.lst index 37c9b78..a0648bc 100644 --- a/build/stm32f7xx_hal_tim_ex.lst +++ b/build/stm32f7xx_hal_tim_ex.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cc3heCqB.s page 1 +ARM GAS /tmp/cc6Nb46Q.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** [..] 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** The Timer Extended features include: 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** (#) Complementary outputs with programmable dead-time for : - ARM GAS /tmp/cc3heCqB.s page 2 + ARM GAS /tmp/cc6Nb46Q.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** (++) Output Compare @@ -118,7 +118,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */ 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /** @defgroup TIMEx TIMEx - ARM GAS /tmp/cc3heCqB.s page 3 + ARM GAS /tmp/cc6Nb46Q.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @brief TIM Extended HAL module driver @@ -178,7 +178,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the TIM handle allocation */ 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (htim == NULL) 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 4 + ARM GAS /tmp/cc6Nb46Q.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** return HAL_ERROR; @@ -238,7 +238,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS; - ARM GAS /tmp/cc3heCqB.s page 5 + ARM GAS /tmp/cc6Nb46Q.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; @@ -298,7 +298,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->HallSensor_MspDeInitCallback(htim); 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #else 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - ARM GAS /tmp/cc3heCqB.s page 6 + ARM GAS /tmp/cc6Nb46Q.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_TIMEx_HallSensor_MspDeInit(htim); @@ -358,7 +358,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @retval HAL status 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */ 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) - ARM GAS /tmp/cc3heCqB.s page 7 + ARM GAS /tmp/cc6Nb46Q.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the parameters */ 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); - ARM GAS /tmp/cc3heCqB.s page 8 + ARM GAS /tmp/cc6Nb46Q.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -478,7 +478,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - ARM GAS /tmp/cc3heCqB.s page 9 + ARM GAS /tmp/cc6Nb46Q.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -538,7 +538,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from TIM peripheral to memory. 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @retval HAL status 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */ - ARM GAS /tmp/cc3heCqB.s page 10 + ARM GAS /tmp/cc6Nb46Q.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t @@ -598,7 +598,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - ARM GAS /tmp/cc3heCqB.s page 11 + ARM GAS /tmp/cc6Nb46Q.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) @@ -658,7 +658,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** ============================================================================== 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** ##### Timer Complementary Output Compare functions ##### 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** ============================================================================== - ARM GAS /tmp/cc3heCqB.s page 12 + ARM GAS /tmp/cc6Nb46Q.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** [..] @@ -718,7 +718,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** else 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 13 + ARM GAS /tmp/cc6Nb46Q.s page 13 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); @@ -778,7 +778,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the parameters */ 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - ARM GAS /tmp/cc3heCqB.s page 14 + ARM GAS /tmp/cc6Nb46Q.s page 14 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -838,7 +838,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); - ARM GAS /tmp/cc3heCqB.s page 15 + ARM GAS /tmp/cc6Nb46Q.s page 15 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } @@ -898,7 +898,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** default: 828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** status = HAL_ERROR; 829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break; - ARM GAS /tmp/cc3heCqB.s page 16 + ARM GAS /tmp/cc6Nb46Q.s page 16 830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } @@ -958,7 +958,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 17 + ARM GAS /tmp/cc6Nb46Q.s page 17 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U)) @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break; 943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } - ARM GAS /tmp/cc3heCqB.s page 18 + ARM GAS /tmp/cc6Nb46Q.s page 18 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /** 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation in DMA mode 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * on the complementary output. - ARM GAS /tmp/cc3heCqB.s page 19 + ARM GAS /tmp/cc6Nb46Q.s page 19 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Disable the Peripheral */ 1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim); 1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 20 + ARM GAS /tmp/cc6Nb46Q.s page 20 1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */ 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 21 + ARM GAS /tmp/cc6Nb46Q.s page 21 1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Enable the complementary PWM output */ @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /** 1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @brief Starts the PWM signal generation in interrupt mode on the - ARM GAS /tmp/cc3heCqB.s page 22 + ARM GAS /tmp/cc6Nb46Q.s page 22 1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * complementary output. @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (status == HAL_OK) 1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Enable the TIM Break interrupt */ - ARM GAS /tmp/cc3heCqB.s page 23 + ARM GAS /tmp/cc6Nb46Q.s page 23 1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** case TIM_CHANNEL_2: 1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 24 + ARM GAS /tmp/cc6Nb46Q.s page 24 1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 interrupt */ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @retval HAL status 1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */ 1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_ - ARM GAS /tmp/cc3heCqB.s page 25 + ARM GAS /tmp/cc6Nb46Q.s page 25 1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** uint16_t Length) @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */ 1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt; 1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; - ARM GAS /tmp/cc3heCqB.s page 26 + ARM GAS /tmp/cc6Nb46Q.s page 26 1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim); - ARM GAS /tmp/cc3heCqB.s page 27 + ARM GAS /tmp/cc6Nb46Q.s page 27 1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** default: - ARM GAS /tmp/cc3heCqB.s page 28 + ARM GAS /tmp/cc6Nb46Q.s page 28 1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** status = HAL_ERROR; @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected 1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @retval HAL status 1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */ - ARM GAS /tmp/cc3heCqB.s page 29 + ARM GAS /tmp/cc6Nb46Q.s page 29 1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); 1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Disable the complementary One Pulse output channel and the Input Capture channel */ - ARM GAS /tmp/cc3heCqB.s page 30 + ARM GAS /tmp/cc6Nb46Q.s page 30 1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 31 + ARM GAS /tmp/cc6Nb46Q.s page 31 1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 interrupt */ @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); - ARM GAS /tmp/cc3heCqB.s page 32 + ARM GAS /tmp/cc6Nb46Q.s page 32 1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the parameters */ 1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); - ARM GAS /tmp/cc3heCqB.s page 33 + ARM GAS /tmp/cc6Nb46Q.s page 33 1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the parameters */ 1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); 1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - ARM GAS /tmp/cc3heCqB.s page 34 + ARM GAS /tmp/cc6Nb46Q.s page 34 1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the parameters */ 1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); 1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - ARM GAS /tmp/cc3heCqB.s page 35 + ARM GAS /tmp/cc6Nb46Q.s page 35 1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check input state */ 1968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_LOCK(htim); 1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 36 + ARM GAS /tmp/cc6Nb46Q.s page 36 1970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Change the handler state */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @note Interrupts can be generated when an active level is detected on the 2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * break input, the break 2 input or the system break input. Break 2026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. - ARM GAS /tmp/cc3heCqB.s page 37 + ARM GAS /tmp/cc6Nb46Q.s page 37 2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @retval HAL status @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #if defined(TIM_BREAK_INPUT_SUPPORT) 2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 38 + ARM GAS /tmp/cc6Nb46Q.s page 38 2084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /** @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** bkin_polarity_bitpos = 0U; 2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break; 2140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } - ARM GAS /tmp/cc3heCqB.s page 39 + ARM GAS /tmp/cc6Nb46Q.s page 39 2141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #endif /* DFSDM1_Channel0 */ @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Set TIMx_AF2 */ 2196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->AF2 = tmporx; 2197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break; - ARM GAS /tmp/cc3heCqB.s page 40 + ARM GAS /tmp/cc6Nb46Q.s page 40 2198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @param Channels specifies the reference signal(s) the OC5REF is combined with. 2253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * This parameter can be any combination of the following values: 2254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC - ARM GAS /tmp/cc3heCqB.s page 41 + ARM GAS /tmp/cc6Nb46Q.s page 41 2255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */ 2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) 2311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 42 + ARM GAS /tmp/cc6Nb46Q.s page 42 2312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */ @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 2368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @brief Extended Peripheral State functions - ARM GAS /tmp/cc3heCqB.s page 43 + ARM GAS /tmp/cc6Nb46Q.s page 43 2369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @{ 2424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */ 2425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 44 + ARM GAS /tmp/cc6Nb46Q.s page 44 2426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /** @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 2481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 2482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } - ARM GAS /tmp/cc3heCqB.s page 45 + ARM GAS /tmp/cc6Nb46Q.s page 45 2483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); 2538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 2539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** else - ARM GAS /tmp/cc3heCqB.s page 46 + ARM GAS /tmp/cc6Nb46Q.s page 46 2540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2574:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Set or reset the CCxNE Bit */ 2575:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0xFU)); /* 0xFU = 15 bits max shift */ 48 .loc 1 2575 3 is_stmt 1 view .LVU8 - ARM GAS /tmp/cc3heCqB.s page 47 + ARM GAS /tmp/cc6Nb46Q.s page 47 49 .loc 1 2575 7 is_stmt 0 view .LVU9 @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 94 .loc 1 2529 11 view .LVU22 95 000c 8342 cmp r3, r0 96 000e 0DD0 beq .L8 - ARM GAS /tmp/cc3heCqB.s page 48 + ARM GAS /tmp/cc6Nb46Q.s page 48 2534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2536:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); 136 .loc 1 2536 5 view .LVU38 2536:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); - ARM GAS /tmp/cc3heCqB.s page 49 + ARM GAS /tmp/cc6Nb46Q.s page 49 137 .loc 1 2536 19 is_stmt 0 view .LVU39 @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2492:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 182 .loc 1 2492 8 is_stmt 1 view .LVU51 2492:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 50 + ARM GAS /tmp/cc6Nb46Q.s page 50 183 .loc 1 2492 30 is_stmt 0 view .LVU52 @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 222 0036 2377 strb r3, [r4, #28] 2487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 223 .loc 1 2487 5 is_stmt 1 view .LVU68 - ARM GAS /tmp/cc3heCqB.s page 51 + ARM GAS /tmp/cc6Nb46Q.s page 51 2487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 268 0000 7047 bx lr 269 .cfi_endproc 270 .LFE143: - ARM GAS /tmp/cc3heCqB.s page 52 + ARM GAS /tmp/cc6Nb46Q.s page 52 272 .section .text.HAL_TIMEx_HallSensor_Init,"ax",%progbits @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 313 .loc 1 159 11 is_stmt 0 view .LVU95 314 000c 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 - ARM GAS /tmp/cc3heCqB.s page 53 + ARM GAS /tmp/cc6Nb46Q.s page 53 159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 353 .loc 1 192 25 view .LVU111 354 0040 0B43 orrs r3, r3, r1 355 0042 9361 str r3, [r2, #24] - ARM GAS /tmp/cc3heCqB.s page 54 + ARM GAS /tmp/cc6Nb46Q.s page 54 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 392 .loc 1 203 17 view .LVU130 393 006e 9368 ldr r3, [r2, #8] - ARM GAS /tmp/cc3heCqB.s page 55 + ARM GAS /tmp/cc6Nb46Q.s page 55 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 429 0092 2268 ldr r2, [r4] 218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF; 430 .loc 1 218 17 view .LVU150 - ARM GAS /tmp/cc3heCqB.s page 56 + ARM GAS /tmp/cc6Nb46Q.s page 56 431 0094 5368 ldr r3, [r2, #4] @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 469 .L27: 470 .LCFI5: 471 .cfi_restore_state - ARM GAS /tmp/cc3heCqB.s page 57 + ARM GAS /tmp/cc6Nb46Q.s page 57 162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -3418,7 +3418,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 519 .LFE144: 521 .section .text.HAL_TIMEx_HallSensor_DeInit,"ax",%progbits 522 .align 1 - ARM GAS /tmp/cc3heCqB.s page 58 + ARM GAS /tmp/cc6Nb46Q.s page 58 523 .global HAL_TIMEx_HallSensor_DeInit @@ -3478,7 +3478,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 567 .LVL26: 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 568 .loc 1 260 3 is_stmt 0 view .LVU187 - ARM GAS /tmp/cc3heCqB.s page 59 + ARM GAS /tmp/cc6Nb46Q.s page 59 569 002a FFF7FEFF bl HAL_TIMEx_HallSensor_MspDeInit @@ -3538,7 +3538,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 610 @ frame_needed = 0, uses_anonymous_args = 0 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** uint32_t tmpsmcr; 611 .loc 1 317 1 is_stmt 0 view .LVU203 - ARM GAS /tmp/cc3heCqB.s page 60 + ARM GAS /tmp/cc6Nb46Q.s page 60 612 0000 10B5 push {r4, lr} @@ -3598,7 +3598,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 652 .LVL34: 331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 653 .loc 1 331 7 view .LVU218 - ARM GAS /tmp/cc3heCqB.s page 61 + ARM GAS /tmp/cc6Nb46Q.s page 61 654 002a 0128 cmp r0, #1 @@ -3658,7 +3658,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 695 006a 15D0 beq .L36 348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 696 .loc 1 348 7 discriminator 3 view .LVU232 - ARM GAS /tmp/cc3heCqB.s page 62 + ARM GAS /tmp/cc6Nb46Q.s page 62 697 006c 02F58062 add r2, r2, #1024 @@ -3718,7 +3718,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 739 .loc 1 362 10 view .LVU245 740 00b0 0020 movs r0, #0 - ARM GAS /tmp/cc3heCqB.s page 63 + ARM GAS /tmp/cc6Nb46Q.s page 63 741 00b2 00E0 b .L35 @@ -3778,7 +3778,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 790 0002 0446 mov r4, r0 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 791 .loc 1 373 3 is_stmt 1 view .LVU253 - ARM GAS /tmp/cc3heCqB.s page 64 + ARM GAS /tmp/cc6Nb46Q.s page 64 378:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -3838,7 +3838,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 832 .cfi_endproc 833 .LFE146: 835 .section .text.HAL_TIMEx_HallSensor_Start_IT,"ax",%progbits - ARM GAS /tmp/cc3heCqB.s page 65 + ARM GAS /tmp/cc6Nb46Q.s page 65 836 .align 1 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 410:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) 878 .loc 1 410 6 is_stmt 0 view .LVU281 879 001a 012A cmp r2, #1 - ARM GAS /tmp/cc3heCqB.s page 66 + ARM GAS /tmp/cc6Nb46Q.s page 66 880 001c 08BF it eq @@ -3958,7 +3958,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 433:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 922 .loc 1 433 3 is_stmt 1 view .LVU294 433:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 67 + ARM GAS /tmp/cc6Nb46Q.s page 67 923 .loc 1 433 7 is_stmt 0 view .LVU295 @@ -4018,7 +4018,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 966 .loc 1 435 13 view .LVU307 967 00a4 0A4A ldr r2, .L55+4 - ARM GAS /tmp/cc3heCqB.s page 68 + ARM GAS /tmp/cc6Nb46Q.s page 68 968 00a6 0A40 ands r2, r2, r1 @@ -4078,7 +4078,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1013 .section .text.HAL_TIMEx_HallSensor_Stop_IT,"ax",%progbits 1014 .align 1 1015 .global HAL_TIMEx_HallSensor_Stop_IT - ARM GAS /tmp/cc3heCqB.s page 69 + ARM GAS /tmp/cc6Nb46Q.s page 69 1016 .syntax unified @@ -4138,7 +4138,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1061 002e 1A68 ldr r2, [r3] 1062 0030 22F00102 bic r2, r2, #1 1063 0034 1A60 str r2, [r3] - ARM GAS /tmp/cc3heCqB.s page 70 + ARM GAS /tmp/cc6Nb46Q.s page 70 1064 .L58: @@ -4198,7 +4198,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 491:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA 1108 .loc 1 491 31 is_stmt 0 view .LVU340 1109 0004 90F83EC0 ldrb ip, [r0, #62] @ zero_extendqisi2 - ARM GAS /tmp/cc3heCqB.s page 71 + ARM GAS /tmp/cc6Nb46Q.s page 71 1110 0008 5FFA8CFC uxtb ip, ip @@ -4258,7 +4258,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1150 .loc 1 513 7 view .LVU354 1151 003c 84F84430 strb r3, [r4, #68] 524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 72 + ARM GAS /tmp/cc6Nb46Q.s page 72 1152 .loc 1 524 3 view .LVU355 @@ -4318,7 +4318,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1191 .LVL80: 533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 1192 .loc 1 533 6 discriminator 1 view .LVU371 - ARM GAS /tmp/cc3heCqB.s page 73 + ARM GAS /tmp/cc6Nb46Q.s page 73 1193 006a 0028 cmp r0, #0 @@ -4378,7 +4378,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1236 00bc 1A60 str r2, [r3] 1237 00be 0FE0 b .L61 1238 .L62: - ARM GAS /tmp/cc3heCqB.s page 74 + ARM GAS /tmp/cc6Nb46Q.s page 74 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) @@ -4438,7 +4438,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1281 .L70: 1282 00e8 00000000 .word TIM_DMACaptureCplt 1283 00ec 00000000 .word TIM_DMACaptureHalfCplt - ARM GAS /tmp/cc3heCqB.s page 75 + ARM GAS /tmp/cc6Nb46Q.s page 75 1284 00f0 00000000 .word TIM_DMAError @@ -4498,7 +4498,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 581:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 1331 .loc 1 581 3 view .LVU404 1332 001e 2368 ldr r3, [r4] - ARM GAS /tmp/cc3heCqB.s page 76 + ARM GAS /tmp/cc6Nb46Q.s page 76 1333 0020 196A ldr r1, [r3, #32] @@ -4558,7 +4558,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1379 .cfi_offset 4, -8 1380 .cfi_offset 14, -4 1381 0002 0446 mov r4, r0 - ARM GAS /tmp/cc3heCqB.s page 77 + ARM GAS /tmp/cc6Nb46Q.s page 77 628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -4618,7 +4618,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1422 0032 43F40043 orr r3, r3, #32768 1423 0036 5364 str r3, [r2, #68] 649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 78 + ARM GAS /tmp/cc6Nb46Q.s page 78 1424 .loc 1 649 3 view .LVU429 @@ -4678,7 +4678,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1467 0082 0429 cmp r1, #4 1468 0084 08D0 beq .L90 634:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 79 + ARM GAS /tmp/cc6Nb46Q.s page 79 1469 .loc 1 634 46 discriminator 5 view .LVU441 @@ -4738,7 +4738,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1513 00ca ABE7 b .L82 1514 .L93: 640:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 80 + ARM GAS /tmp/cc6Nb46Q.s page 80 1515 .loc 1 640 3 discriminator 6 view .LVU452 @@ -4798,7 +4798,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1558 .L94: 1559 00f8 00000140 .word 1073807360 1560 00fc 07000100 .word 65543 - ARM GAS /tmp/cc3heCqB.s page 81 + ARM GAS /tmp/cc6Nb46Q.s page 81 1561 .cfi_endproc @@ -4858,7 +4858,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1608 .loc 1 686 3 discriminator 3 view .LVU472 1609 0024 5A6C ldr r2, [r3, #68] 1610 0026 22F40042 bic r2, r2, #32768 - ARM GAS /tmp/cc3heCqB.s page 82 + ARM GAS /tmp/cc6Nb46Q.s page 82 1611 002a 5A64 str r2, [r3, #68] @@ -4918,7 +4918,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1652 0060 84F84730 strb r3, [r4, #71] 1653 0064 F5E7 b .L100 1654 .L104: - ARM GAS /tmp/cc3heCqB.s page 83 + ARM GAS /tmp/cc6Nb46Q.s page 83 692:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -4978,7 +4978,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1700 000a 94F84430 ldrb r3, [r4, #68] @ zero_extendqisi2 1701 000e DBB2 uxtb r3, r3 718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 84 + ARM GAS /tmp/cc6Nb46Q.s page 84 1702 .loc 1 718 46 discriminator 1 view .LVU497 @@ -5038,7 +5038,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1744 0048 43F40043 orr r3, r3, #32768 1745 004c 5364 str r3, [r2, #68] 767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 85 + ARM GAS /tmp/cc6Nb46Q.s page 85 1746 .loc 1 767 5 view .LVU510 @@ -5098,7 +5098,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 1790 .loc 1 718 46 discriminator 5 view .LVU521 1791 009c 0829 cmp r1, #8 - ARM GAS /tmp/cc3heCqB.s page 86 + ARM GAS /tmp/cc6Nb46Q.s page 86 1792 009e 0DD0 beq .L126 @@ -5158,7 +5158,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1836 00e4 0120 movs r0, #1 1837 .LVL115: 726:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 87 + ARM GAS /tmp/cc6Nb46Q.s page 87 1838 .loc 1 726 3 is_stmt 0 view .LVU532 @@ -5218,7 +5218,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1878 .loc 1 770 7 is_stmt 1 view .LVU546 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 1879 .loc 1 770 10 is_stmt 0 view .LVU547 - ARM GAS /tmp/cc3heCqB.s page 88 + ARM GAS /tmp/cc6Nb46Q.s page 88 1880 0112 062A cmp r2, #6 @@ -5278,7 +5278,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1929 .LCFI17: 1930 .cfi_def_cfa_offset 16 1931 .cfi_offset 3, -16 - ARM GAS /tmp/cc3heCqB.s page 89 + ARM GAS /tmp/cc6Nb46Q.s page 89 1932 .cfi_offset 4, -12 @@ -5338,7 +5338,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1972 .loc 1 839 5 is_stmt 1 view .LVU568 839:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 1973 .loc 1 839 8 is_stmt 0 view .LVU569 - ARM GAS /tmp/cc3heCqB.s page 90 + ARM GAS /tmp/cc6Nb46Q.s page 90 1974 002a 40F24442 movw r2, #1092 @@ -5398,7 +5398,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2017 0074 1A60 str r2, [r3] 2018 .L138: 848:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 91 + ARM GAS /tmp/cc6Nb46Q.s page 91 2019 .loc 1 848 5 discriminator 5 view .LVU581 @@ -5458,7 +5458,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2060 00a4 84F84730 strb r3, [r4, #71] 2061 00a8 0020 movs r0, #0 2062 00aa E9E7 b .L134 - ARM GAS /tmp/cc3heCqB.s page 92 + ARM GAS /tmp/cc6Nb46Q.s page 92 2063 .L144: @@ -5518,7 +5518,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2111 .loc 1 875 3 view .LVU602 878:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 2112 .loc 1 878 3 view .LVU603 - ARM GAS /tmp/cc3heCqB.s page 93 + ARM GAS /tmp/cc6Nb46Q.s page 93 881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { @@ -5578,7 +5578,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2153 003a 18BF it ne 2154 003c BCF1000F cmpne ip, #0 2155 0040 00F0E080 beq .L167 - ARM GAS /tmp/cc3heCqB.s page 94 + ARM GAS /tmp/cc6Nb46Q.s page 94 893:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } @@ -5638,7 +5638,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2193 .loc 1 913 10 discriminator 1 view .LVU634 2194 006e 0028 cmp r0, #0 2195 0070 40F0CA80 bne .L169 - ARM GAS /tmp/cc3heCqB.s page 95 + ARM GAS /tmp/cc6Nb46Q.s page 95 920:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break; @@ -5698,7 +5698,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2238 00c4 9342 cmp r3, r2 2239 00c6 00F08B80 beq .L163 980:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 96 + ARM GAS /tmp/cc6Nb46Q.s page 96 2240 .loc 1 980 9 discriminator 5 view .LVU647 @@ -5758,7 +5758,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2284 010e 0120 moveq r0, #1 2285 0110 83E7 b .L148 2286 .LVL146: - ARM GAS /tmp/cc3heCqB.s page 97 + ARM GAS /tmp/cc6Nb46Q.s page 97 2287 .L175: @@ -5818,7 +5818,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2330 .LVL151: 2331 .L177: 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 98 + ARM GAS /tmp/cc6Nb46Q.s page 98 2332 .loc 1 885 12 discriminator 7 view .LVU669 @@ -5878,7 +5878,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2374 .loc 1 927 52 view .LVU681 2375 0184 D163 str r1, [r2, #60] 928:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 99 + ARM GAS /tmp/cc6Nb46Q.s page 99 2376 .loc 1 928 7 is_stmt 1 view .LVU682 @@ -5938,7 +5938,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2415 .loc 1 948 7 view .LVU697 948:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; 2416 .loc 1 948 17 is_stmt 0 view .LVU698 - ARM GAS /tmp/cc3heCqB.s page 100 + ARM GAS /tmp/cc6Nb46Q.s page 100 2417 01b4 E26A ldr r2, [r4, #44] @@ -5998,7 +5998,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2455 .loc 1 982 7 view .LVU714 982:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 2456 .loc 1 982 31 is_stmt 0 view .LVU715 - ARM GAS /tmp/cc3heCqB.s page 101 + ARM GAS /tmp/cc6Nb46Q.s page 101 2457 01e0 9968 ldr r1, [r3, #8] @@ -6058,7 +6058,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2500 .loc 1 938 16 view .LVU726 2501 020c 0120 movs r0, #1 2502 020e F8E7 b .L151 - ARM GAS /tmp/cc3heCqB.s page 102 + ARM GAS /tmp/cc6Nb46Q.s page 102 2503 .L171: @@ -6118,7 +6118,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2552 0008 34D0 beq .L183 2553 000a 0829 cmp r1, #8 2554 000c 3BD0 beq .L184 - ARM GAS /tmp/cc3heCqB.s page 103 + ARM GAS /tmp/cc6Nb46Q.s page 103 2555 000e 0029 cmp r1, #0 @@ -6178,7 +6178,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2596 .loc 1 1056 5 view .LVU746 1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 2597 .loc 1 1056 5 view .LVU747 - ARM GAS /tmp/cc3heCqB.s page 104 + ARM GAS /tmp/cc6Nb46Q.s page 104 2598 004a 2368 ldr r3, [r4] @@ -6238,7 +6238,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1047:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 2640 .loc 1 1047 3 view .LVU760 2641 0084 CDE7 b .L186 - ARM GAS /tmp/cc3heCqB.s page 105 + ARM GAS /tmp/cc6Nb46Q.s page 105 2642 .LVL175: @@ -6298,7 +6298,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1016:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 2685 .loc 1 1016 3 view .LVU772 2686 00be 0120 movs r0, #1 - ARM GAS /tmp/cc3heCqB.s page 106 + ARM GAS /tmp/cc6Nb46Q.s page 106 2687 .LVL179: @@ -6358,7 +6358,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2732 0016 002B cmp r3, #0 2733 0018 6AD1 bne .L208 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 107 + ARM GAS /tmp/cc6Nb46Q.s page 107 2734 .loc 1 1113 3 is_stmt 1 view .LVU784 @@ -6418,7 +6418,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 2777 .loc 1 1122 7 discriminator 4 view .LVU796 2778 005e 02F57842 add r2, r2, #63488 - ARM GAS /tmp/cc3heCqB.s page 108 + ARM GAS /tmp/cc6Nb46Q.s page 108 2779 0062 9342 cmp r3, r2 @@ -6478,7 +6478,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2822 .loc 1 1107 7 discriminator 7 view .LVU807 2823 00a6 94F84630 ldrb r3, [r4, #70] @ zero_extendqisi2 2824 00aa DBB2 uxtb r3, r3 - ARM GAS /tmp/cc3heCqB.s page 109 + ARM GAS /tmp/cc6Nb46Q.s page 109 1107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { @@ -6538,7 +6538,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2867 00e4 1A68 ldr r2, [r3] 2868 .LVL188: 1127:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } - ARM GAS /tmp/cc3heCqB.s page 110 + ARM GAS /tmp/cc6Nb46Q.s page 110 2869 .loc 1 1127 7 is_stmt 0 view .LVU820 @@ -6598,7 +6598,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2919 0004 0D46 mov r5, r1 1152:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 2920 .loc 1 1152 3 is_stmt 1 view .LVU827 - ARM GAS /tmp/cc3heCqB.s page 111 + ARM GAS /tmp/cc6Nb46Q.s page 111 1155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -6658,7 +6658,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2963 .loc 1 1161 3 discriminator 5 view .LVU839 1164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 2964 .loc 1 1164 3 view .LVU840 - ARM GAS /tmp/cc3heCqB.s page 112 + ARM GAS /tmp/cc6Nb46Q.s page 112 2965 004a 25B9 cbnz r5, .L220 @@ -6718,7 +6718,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3012 @ frame_needed = 0, uses_anonymous_args = 0 1182:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK; 3013 .loc 1 1182 1 is_stmt 0 view .LVU850 - ARM GAS /tmp/cc3heCqB.s page 113 + ARM GAS /tmp/cc6Nb46Q.s page 113 3014 0000 10B5 push {r4, lr} @@ -6778,7 +6778,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 3055 .loc 1 1204 7 view .LVU864 1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 114 + ARM GAS /tmp/cc6Nb46Q.s page 114 3056 .loc 1 1226 3 view .LVU865 @@ -6838,7 +6838,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 3099 .loc 1 1238 9 discriminator 4 view .LVU877 3100 0074 02F57842 add r2, r2, #63488 - ARM GAS /tmp/cc3heCqB.s page 115 + ARM GAS /tmp/cc6Nb46Q.s page 115 3101 0078 9342 cmp r3, r2 @@ -6898,7 +6898,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3145 00c0 DBB2 uxtb r3, r3 1190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 3146 .loc 1 1190 46 discriminator 7 view .LVU888 - ARM GAS /tmp/cc3heCqB.s page 116 + ARM GAS /tmp/cc6Nb46Q.s page 116 3147 00c2 013B subs r3, r3, #1 @@ -6958,7 +6958,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3190 00fc 84F84630 strb r3, [r4, #70] 1198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 3191 .loc 1 1198 3 is_stmt 1 view .LVU900 - ARM GAS /tmp/cc3heCqB.s page 117 + ARM GAS /tmp/cc6Nb46Q.s page 117 3192 .L238: @@ -7018,7 +7018,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 3234 .loc 1 1254 1 view .LVU913 3235 012c 0020 movs r0, #0 - ARM GAS /tmp/cc3heCqB.s page 118 + ARM GAS /tmp/cc6Nb46Q.s page 118 3236 012e FCE7 b .L232 @@ -7078,7 +7078,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 3285 .loc 1 1281 7 view .LVU921 1303:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 119 + ARM GAS /tmp/cc6Nb46Q.s page 119 3286 .loc 1 1303 3 view .LVU922 @@ -7138,7 +7138,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3327 004e 03D1 bne .L258 1316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 3328 .loc 1 1316 5 discriminator 3 view .LVU936 - ARM GAS /tmp/cc3heCqB.s page 120 + ARM GAS /tmp/cc6Nb46Q.s page 120 3329 0050 5A6C ldr r2, [r3, #68] @@ -7198,7 +7198,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1303:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 3371 .loc 1 1303 3 view .LVU949 3372 008c C6E7 b .L256 - ARM GAS /tmp/cc3heCqB.s page 121 + ARM GAS /tmp/cc6Nb46Q.s page 121 3373 .L254: @@ -7258,7 +7258,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3418 .align 1 3419 .global HAL_TIMEx_PWMN_Start_DMA 3420 .syntax unified - ARM GAS /tmp/cc3heCqB.s page 122 + ARM GAS /tmp/cc6Nb46Q.s page 122 3421 .thumb @@ -7318,7 +7318,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3464 .loc 1 1356 8 is_stmt 1 view .LVU971 1356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 3465 .loc 1 1356 51 is_stmt 0 view .LVU972 - ARM GAS /tmp/cc3heCqB.s page 123 + ARM GAS /tmp/cc6Nb46Q.s page 123 3466 0020 002D cmp r5, #0 @@ -7378,7 +7378,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3505 .loc 1 1378 17 is_stmt 0 view .LVU987 3506 0056 626A ldr r2, [r4, #36] 1378:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 124 + ARM GAS /tmp/cc6Nb46Q.s page 124 3507 .loc 1 1378 56 view .LVU988 @@ -7438,7 +7438,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 3548 .loc 1 1451 9 is_stmt 0 view .LVU1002 3549 0092 2368 ldr r3, [r4] - ARM GAS /tmp/cc3heCqB.s page 125 + ARM GAS /tmp/cc6Nb46Q.s page 125 1451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { @@ -7498,7 +7498,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 3594 .loc 1 1352 7 discriminator 8 view .LVU1013 3595 00f2 90F84700 ldrb r0, [r0, #71] @ zero_extendqisi2 - ARM GAS /tmp/cc3heCqB.s page 126 + ARM GAS /tmp/cc6Nb46Q.s page 126 3596 .LVL231: @@ -7558,7 +7558,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3639 012a 94F84720 ldrb r2, [r4, #71] @ zero_extendqisi2 3640 .LVL236: 1356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 127 + ARM GAS /tmp/cc6Nb46Q.s page 127 3641 .loc 1 1356 12 discriminator 8 view .LVU1025 @@ -7618,7 +7618,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { 3685 .loc 1 1372 3 is_stmt 1 view .LVU1036 3686 0168 042D cmp r5, #4 - ARM GAS /tmp/cc3heCqB.s page 128 + ARM GAS /tmp/cc6Nb46Q.s page 128 3687 016a 09D0 beq .L280 @@ -7678,7 +7678,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3726 0198 A06A ldr r0, [r4, #40] 3727 019a FFF7FEFF bl HAL_DMA_Start_IT 3728 .LVL242: - ARM GAS /tmp/cc3heCqB.s page 129 + ARM GAS /tmp/cc6Nb46Q.s page 129 1405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** Length) != HAL_OK) @@ -7738,7 +7738,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** Length) != HAL_OK) 3767 .loc 1 1426 7 is_stmt 1 view .LVU1068 1426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** Length) != HAL_OK) - ARM GAS /tmp/cc3heCqB.s page 130 + ARM GAS /tmp/cc6Nb46Q.s page 130 3768 .loc 1 1426 88 is_stmt 0 view .LVU1069 @@ -7798,7 +7798,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 3810 .loc 1 1354 12 view .LVU1082 3811 01fc 0220 movs r0, #2 - ARM GAS /tmp/cc3heCqB.s page 131 + ARM GAS /tmp/cc6Nb46Q.s page 131 3812 01fe 00E0 b .L272 @@ -7858,7 +7858,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3860 .thumb_func 3862 HAL_TIMEx_PWMN_Stop_DMA: 3863 .LVL254: - ARM GAS /tmp/cc3heCqB.s page 132 + ARM GAS /tmp/cc6Nb46Q.s page 132 3864 .LFB162: @@ -7918,7 +7918,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3906 0024 2946 mov r1, r5 3907 0026 2068 ldr r0, [r4] 3908 0028 FFF7FEFF bl TIM_CCxNChannelCmd - ARM GAS /tmp/cc3heCqB.s page 133 + ARM GAS /tmp/cc6Nb46Q.s page 133 3909 .LVL258: @@ -7978,7 +7978,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3951 0070 0020 movs r0, #0 3952 .L306: 3953 .LVL259: - ARM GAS /tmp/cc3heCqB.s page 134 + ARM GAS /tmp/cc6Nb46Q.s page 134 1534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } @@ -8038,7 +8038,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 3993 0098 042D cmp r5, #4 3994 009a 06D0 beq .L315 1530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } - ARM GAS /tmp/cc3heCqB.s page 135 + ARM GAS /tmp/cc6Nb46Q.s page 135 3995 .loc 1 1530 5 discriminator 4 view .LVU1129 @@ -8098,7 +8098,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4044 .cfi_offset 4, -12 4045 .cfi_offset 5, -8 4046 .cfi_offset 14, -4 - ARM GAS /tmp/cc3heCqB.s page 136 + ARM GAS /tmp/cc6Nb46Q.s page 136 4047 0002 0446 mov r4, r0 @@ -8158,7 +8158,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4085 .loc 1 1586 41 view .LVU1152 4086 002c 013B subs r3, r3, #1 4087 .LVL275: - ARM GAS /tmp/cc3heCqB.s page 137 + ARM GAS /tmp/cc6Nb46Q.s page 137 1586:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { @@ -8218,7 +8218,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1605:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 4129 .loc 1 1605 10 is_stmt 0 view .LVU1166 4130 006a 0020 movs r0, #0 - ARM GAS /tmp/cc3heCqB.s page 138 + ARM GAS /tmp/cc6Nb46Q.s page 138 4131 006c 02E0 b .L319 @@ -8278,7 +8278,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 4179 .loc 1 1622 77 is_stmt 0 view .LVU1175 4180 0004 0029 cmp r1, #0 - ARM GAS /tmp/cc3heCqB.s page 139 + ARM GAS /tmp/cc6Nb46Q.s page 139 4181 0006 32D1 bne .L328 @@ -8338,7 +8338,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4223 0042 1142 tst r1, r2 4224 0044 08D1 bne .L327 1635:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 140 + ARM GAS /tmp/cc6Nb46Q.s page 140 4225 .loc 1 1635 3 discriminator 1 view .LVU1188 @@ -8398,7 +8398,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1660:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; 4271 .loc 1 1660 1 is_stmt 0 view .LVU1199 4272 0000 38B5 push {r3, r4, r5, lr} - ARM GAS /tmp/cc3heCqB.s page 141 + ARM GAS /tmp/cc6Nb46Q.s page 141 4273 .LCFI28: @@ -8458,7 +8458,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1671:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) 4313 .loc 1 1671 6 is_stmt 0 view .LVU1214 4314 0026 012A cmp r2, #1 - ARM GAS /tmp/cc3heCqB.s page 142 + ARM GAS /tmp/cc6Nb46Q.s page 142 4315 0028 08BF it eq @@ -8518,7 +8518,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1692:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); 4357 .loc 1 1692 3 view .LVU1227 4358 0068 FFF7FEFF bl TIM_CCxNChannelCmd - ARM GAS /tmp/cc3heCqB.s page 143 + ARM GAS /tmp/cc6Nb46Q.s page 143 4359 .LVL305: @@ -8578,7 +8578,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4406 .LVL312: 4407 .LFB166: 1715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; - ARM GAS /tmp/cc3heCqB.s page 144 + ARM GAS /tmp/cc6Nb46Q.s page 144 4408 .loc 1 1715 1 is_stmt 1 view -0 @@ -8638,7 +8638,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4452 .LVL316: 1732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 4453 .loc 1 1732 3 view .LVU1248 - ARM GAS /tmp/cc3heCqB.s page 145 + ARM GAS /tmp/cc6Nb46Q.s page 145 1732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -8698,7 +8698,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 4496 .loc 1 1741 3 view .LVU1261 4497 007a 84F84530 strb r3, [r4, #69] - ARM GAS /tmp/cc3heCqB.s page 146 + ARM GAS /tmp/cc6Nb46Q.s page 146 1744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } @@ -8758,7 +8758,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4542 000c 0120 movs r0, #1 4543 000e 83F83C00 strb r0, [r3, #60] 1801:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 147 + ARM GAS /tmp/cc6Nb46Q.s page 147 4544 .loc 1 1801 3 discriminator 2 view .LVU1274 @@ -8818,7 +8818,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4582 003a 1868 ldr r0, [r3] 1814:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; 4583 .loc 1 1814 17 view .LVU1291 - ARM GAS /tmp/cc3heCqB.s page 148 + ARM GAS /tmp/cc6Nb46Q.s page 148 4584 003c 4168 ldr r1, [r0, #4] @@ -8878,7 +8878,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 4625 .loc 1 1826 1 view .LVU1305 4626 006c 3029 cmp r1, #48 - ARM GAS /tmp/cc3heCqB.s page 149 + ARM GAS /tmp/cc6Nb46Q.s page 149 4627 006e DFD1 bne .L347 @@ -8938,7 +8938,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4672 000c 0120 movs r0, #1 4673 000e 83F83C00 strb r0, [r3, #60] 1857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 150 + ARM GAS /tmp/cc6Nb46Q.s page 150 4674 .loc 1 1857 3 discriminator 2 view .LVU1317 @@ -8998,7 +8998,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4712 003a 1868 ldr r0, [r3] 1870:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; 4713 .loc 1 1870 17 view .LVU1334 - ARM GAS /tmp/cc3heCqB.s page 151 + ARM GAS /tmp/cc6Nb46Q.s page 151 4714 003c 4168 ldr r1, [r0, #4] @@ -9058,7 +9058,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 4755 .loc 1 1882 1 view .LVU1348 4756 006c 3029 cmp r1, #48 - ARM GAS /tmp/cc3heCqB.s page 152 + ARM GAS /tmp/cc6Nb46Q.s page 152 4757 006e DFD1 bne .L357 @@ -9118,7 +9118,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4802 000c 0120 movs r0, #1 4803 000e 83F83C00 strb r0, [r3, #60] 1914:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 153 + ARM GAS /tmp/cc6Nb46Q.s page 153 4804 .loc 1 1914 3 discriminator 2 view .LVU1360 @@ -9178,7 +9178,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4842 003a 1868 ldr r0, [r3] 1927:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource; 4843 .loc 1 1927 17 view .LVU1377 - ARM GAS /tmp/cc3heCqB.s page 154 + ARM GAS /tmp/cc6Nb46Q.s page 154 4844 003c 4168 ldr r1, [r0, #4] @@ -9238,7 +9238,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4881 .loc 1 1941 3 view .LVU1394 4882 0068 1968 ldr r1, [r3] 4883 006a CA68 ldr r2, [r1, #12] - ARM GAS /tmp/cc3heCqB.s page 155 + ARM GAS /tmp/cc6Nb46Q.s page 155 4884 006c 42F40052 orr r2, r2, #8192 @@ -9298,7 +9298,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 4932 .LVL333: 4933 .LFB170: 1958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** uint32_t tmpcr2; - ARM GAS /tmp/cc3heCqB.s page 156 + ARM GAS /tmp/cc6Nb46Q.s page 156 4934 .loc 1 1958 1 is_stmt 1 view -0 @@ -9358,7 +9358,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 1977:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 4972 .loc 1 1977 11 is_stmt 0 view .LVU1420 4973 001c 9468 ldr r4, [r2, #8] - ARM GAS /tmp/cc3heCqB.s page 157 + ARM GAS /tmp/cc6Nb46Q.s page 157 4974 .LVL335: @@ -9418,7 +9418,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5011 003e 1648 ldr r0, .L385 5012 .LVL340: 1999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** { - ARM GAS /tmp/cc3heCqB.s page 158 + ARM GAS /tmp/cc6Nb46Q.s page 158 5013 .loc 1 1999 6 view .LVU1438 @@ -9478,7 +9478,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2007:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } 5055 .loc 1 2007 26 is_stmt 0 view .LVU1451 5056 0082 9160 str r1, [r2, #8] - ARM GAS /tmp/cc3heCqB.s page 159 + ARM GAS /tmp/cc6Nb46Q.s page 159 5057 .LVL344: @@ -9538,7 +9538,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5103 .cfi_startproc 5104 @ args = 0, pretend = 0, frame = 0 5105 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/cc3heCqB.s page 160 + ARM GAS /tmp/cc6Nb46Q.s page 160 5106 @ link register save eliminated. @@ -9598,7 +9598,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2054:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); 5142 .loc 1 2054 3 view .LVU1480 5143 001a 0343 orrs r3, r3, r0 - ARM GAS /tmp/cc3heCqB.s page 161 + ARM GAS /tmp/cc6Nb46Q.s page 161 5144 .LVL351: @@ -9658,7 +9658,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5184 .loc 1 2059 3 is_stmt 0 view .LVU1494 5185 0040 886A ldr r0, [r1, #40] 5186 .LVL365: - ARM GAS /tmp/cc3heCqB.s page 162 + ARM GAS /tmp/cc6Nb46Q.s page 162 2059:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos)); @@ -9718,7 +9718,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5226 006c 2343 orrs r3, r3, r4 5227 .LVL374: 2072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** } - ARM GAS /tmp/cc3heCqB.s page 163 + ARM GAS /tmp/cc6Nb46Q.s page 163 5228 .loc 1 2072 5 is_stmt 1 view .LVU1510 @@ -9778,7 +9778,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5272 .syntax unified 5273 .thumb 5274 .thumb_func - ARM GAS /tmp/cc3heCqB.s page 164 + ARM GAS /tmp/cc6Nb46Q.s page 164 5276 HAL_TIMEx_ConfigBreakInput: @@ -9838,7 +9838,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5312 .cfi_offset 7, -8 5313 .cfi_offset 14, -4 2120:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 165 + ARM GAS /tmp/cc6Nb46Q.s page 165 5314 .loc 1 2120 3 is_stmt 1 discriminator 2 view .LVU1540 @@ -9898,7 +9898,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** bkin_enable_bitpos = 0U; 5356 .loc 1 2146 26 view .LVU1553 5357 0048 E646 mov lr, ip - ARM GAS /tmp/cc3heCqB.s page 166 + ARM GAS /tmp/cc6Nb46Q.s page 166 2145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** bkin_polarity_mask = 0U; @@ -9958,7 +9958,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5396 006c 5140 eors r1, r1, r2 5397 .LVL391: 5398 .L403: - ARM GAS /tmp/cc3heCqB.s page 167 + ARM GAS /tmp/cc6Nb46Q.s page 167 2174:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break; @@ -10018,7 +10018,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5435 .loc 1 2188 7 is_stmt 1 view .LVU1587 2188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #endif /* DFSDM1_Channel0 */ 5436 .loc 1 2188 10 is_stmt 0 view .LVU1588 - ARM GAS /tmp/cc3heCqB.s page 168 + ARM GAS /tmp/cc6Nb46Q.s page 168 5437 0088 0828 cmp r0, #8 @@ -10078,7 +10078,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5480 .syntax unified 5481 .thumb 5482 .thumb_func - ARM GAS /tmp/cc3heCqB.s page 169 + ARM GAS /tmp/cc6Nb46Q.s page 169 5484 HAL_TIMEx_RemapConfig: @@ -10138,7 +10138,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5520 .loc 1 2246 10 view .LVU1618 5521 001e 7047 bx lr 5522 .LVL403: - ARM GAS /tmp/cc3heCqB.s page 170 + ARM GAS /tmp/cc6Nb46Q.s page 170 5523 .L414: @@ -10198,7 +10198,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** 5567 .loc 1 2272 3 is_stmt 1 view .LVU1631 2272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 171 + ARM GAS /tmp/cc6Nb46Q.s page 171 5568 .loc 1 2272 7 is_stmt 0 view .LVU1632 @@ -10258,7 +10258,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5606 .loc 1 2283 1 view .LVU1648 5607 003c 7047 bx lr 5608 .cfi_endproc - ARM GAS /tmp/cc3heCqB.s page 172 + ARM GAS /tmp/cc6Nb46Q.s page 172 5609 .LFE174: @@ -10318,7 +10318,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5658 0004 0123 movs r3, #1 5659 0006 80F83D30 strb r3, [r0, #61] 2441:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ - ARM GAS /tmp/cc3heCqB.s page 173 + ARM GAS /tmp/cc6Nb46Q.s page 173 5660 .loc 1 2441 3 is_stmt 1 view .LVU1658 @@ -10378,7 +10378,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5710 .loc 1 2452 22 is_stmt 0 view .LVU1666 5711 0002 806B ldr r0, [r0, #56] 5712 .LVL415: - ARM GAS /tmp/cc3heCqB.s page 174 + ARM GAS /tmp/cc6Nb46Q.s page 174 2455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** @@ -10438,7 +10438,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 2362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /** 5762 .loc 1 2362 1 is_stmt 0 view .LVU1676 5763 0000 7047 bx lr - ARM GAS /tmp/cc3heCqB.s page 175 + ARM GAS /tmp/cc6Nb46Q.s page 175 5764 .cfi_endproc @@ -10498,7 +10498,7 @@ ARM GAS /tmp/cc3heCqB.s page 1 5812 0002 90F84400 ldrb r0, [r0, #68] @ zero_extendqisi2 5813 .LVL422: 2409:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** - ARM GAS /tmp/cc3heCqB.s page 176 + ARM GAS /tmp/cc6Nb46Q.s page 176 5814 .loc 1 2409 19 discriminator 1 view .LVU1687 @@ -10558,120 +10558,120 @@ ARM GAS /tmp/cc3heCqB.s page 1 5859 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" 5860 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" 5861 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" - ARM GAS /tmp/cc3heCqB.s page 177 + ARM GAS /tmp/cc6Nb46Q.s page 177 - ARM GAS /tmp/cc3heCqB.s page 178 + ARM GAS /tmp/cc6Nb46Q.s page 178 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_tim_ex.c - /tmp/cc3heCqB.s:20 .text.TIM_CCxNChannelCmd:00000000 $t - /tmp/cc3heCqB.s:25 .text.TIM_CCxNChannelCmd:00000000 TIM_CCxNChannelCmd - /tmp/cc3heCqB.s:63 .text.TIM_DMAErrorCCxN:00000000 $t - /tmp/cc3heCqB.s:68 .text.TIM_DMAErrorCCxN:00000000 TIM_DMAErrorCCxN - /tmp/cc3heCqB.s:148 .text.TIM_DMADelayPulseNCplt:00000000 $t - /tmp/cc3heCqB.s:153 .text.TIM_DMADelayPulseNCplt:00000000 TIM_DMADelayPulseNCplt - /tmp/cc3heCqB.s:252 .text.HAL_TIMEx_HallSensor_MspInit:00000000 $t - /tmp/cc3heCqB.s:258 .text.HAL_TIMEx_HallSensor_MspInit:00000000 HAL_TIMEx_HallSensor_MspInit - /tmp/cc3heCqB.s:273 .text.HAL_TIMEx_HallSensor_Init:00000000 $t - /tmp/cc3heCqB.s:279 .text.HAL_TIMEx_HallSensor_Init:00000000 HAL_TIMEx_HallSensor_Init - /tmp/cc3heCqB.s:496 .text.HAL_TIMEx_HallSensor_Init:000000d4 $d - /tmp/cc3heCqB.s:501 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 $t - /tmp/cc3heCqB.s:507 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 HAL_TIMEx_HallSensor_MspDeInit - /tmp/cc3heCqB.s:522 .text.HAL_TIMEx_HallSensor_DeInit:00000000 $t - /tmp/cc3heCqB.s:528 .text.HAL_TIMEx_HallSensor_DeInit:00000000 HAL_TIMEx_HallSensor_DeInit - /tmp/cc3heCqB.s:598 .text.HAL_TIMEx_HallSensor_Start:00000000 $t - /tmp/cc3heCqB.s:604 .text.HAL_TIMEx_HallSensor_Start:00000000 HAL_TIMEx_HallSensor_Start - /tmp/cc3heCqB.s:765 .text.HAL_TIMEx_HallSensor_Start:000000c0 $d - /tmp/cc3heCqB.s:771 .text.HAL_TIMEx_HallSensor_Stop:00000000 $t - /tmp/cc3heCqB.s:777 .text.HAL_TIMEx_HallSensor_Stop:00000000 HAL_TIMEx_HallSensor_Stop - /tmp/cc3heCqB.s:836 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 $t - /tmp/cc3heCqB.s:842 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 HAL_TIMEx_HallSensor_Start_IT - /tmp/cc3heCqB.s:1008 .text.HAL_TIMEx_HallSensor_Start_IT:000000cc $d - /tmp/cc3heCqB.s:1014 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 $t - /tmp/cc3heCqB.s:1020 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 HAL_TIMEx_HallSensor_Stop_IT - /tmp/cc3heCqB.s:1084 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 $t - /tmp/cc3heCqB.s:1090 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 HAL_TIMEx_HallSensor_Start_DMA - /tmp/cc3heCqB.s:1282 .text.HAL_TIMEx_HallSensor_Start_DMA:000000e8 $d - /tmp/cc3heCqB.s:1291 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 $t - /tmp/cc3heCqB.s:1297 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 HAL_TIMEx_HallSensor_Stop_DMA - /tmp/cc3heCqB.s:1362 .text.HAL_TIMEx_OCN_Start:00000000 $t - /tmp/cc3heCqB.s:1368 .text.HAL_TIMEx_OCN_Start:00000000 HAL_TIMEx_OCN_Start - /tmp/cc3heCqB.s:1559 .text.HAL_TIMEx_OCN_Start:000000f8 $d - /tmp/cc3heCqB.s:1565 .text.HAL_TIMEx_OCN_Stop:00000000 $t - /tmp/cc3heCqB.s:1571 .text.HAL_TIMEx_OCN_Stop:00000000 HAL_TIMEx_OCN_Stop - /tmp/cc3heCqB.s:1668 .text.HAL_TIMEx_OCN_Start_IT:00000000 $t - /tmp/cc3heCqB.s:1674 .text.HAL_TIMEx_OCN_Start_IT:00000000 HAL_TIMEx_OCN_Start_IT - /tmp/cc3heCqB.s:1908 .text.HAL_TIMEx_OCN_Start_IT:00000130 $d - /tmp/cc3heCqB.s:1914 .text.HAL_TIMEx_OCN_Stop_IT:00000000 $t - /tmp/cc3heCqB.s:1920 .text.HAL_TIMEx_OCN_Stop_IT:00000000 HAL_TIMEx_OCN_Stop_IT - /tmp/cc3heCqB.s:2086 .text.HAL_TIMEx_OCN_Start_DMA:00000000 $t - /tmp/cc3heCqB.s:2092 .text.HAL_TIMEx_OCN_Start_DMA:00000000 HAL_TIMEx_OCN_Start_DMA - /tmp/cc3heCqB.s:2515 .text.HAL_TIMEx_OCN_Start_DMA:00000218 $d - /tmp/cc3heCqB.s:2524 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 $t - /tmp/cc3heCqB.s:2530 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 HAL_TIMEx_OCN_Stop_DMA - /tmp/cc3heCqB.s:2694 .text.HAL_TIMEx_PWMN_Start:00000000 $t - /tmp/cc3heCqB.s:2700 .text.HAL_TIMEx_PWMN_Start:00000000 HAL_TIMEx_PWMN_Start - /tmp/cc3heCqB.s:2891 .text.HAL_TIMEx_PWMN_Start:000000f8 $d - /tmp/cc3heCqB.s:2897 .text.HAL_TIMEx_PWMN_Stop:00000000 $t - /tmp/cc3heCqB.s:2903 .text.HAL_TIMEx_PWMN_Stop:00000000 HAL_TIMEx_PWMN_Stop - /tmp/cc3heCqB.s:3000 .text.HAL_TIMEx_PWMN_Start_IT:00000000 $t - /tmp/cc3heCqB.s:3006 .text.HAL_TIMEx_PWMN_Start_IT:00000000 HAL_TIMEx_PWMN_Start_IT - /tmp/cc3heCqB.s:3240 .text.HAL_TIMEx_PWMN_Start_IT:00000130 $d - /tmp/cc3heCqB.s:3246 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 $t - /tmp/cc3heCqB.s:3252 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 HAL_TIMEx_PWMN_Stop_IT - ARM GAS /tmp/cc3heCqB.s page 179 + /tmp/cc6Nb46Q.s:20 .text.TIM_CCxNChannelCmd:00000000 $t + /tmp/cc6Nb46Q.s:25 .text.TIM_CCxNChannelCmd:00000000 TIM_CCxNChannelCmd + /tmp/cc6Nb46Q.s:63 .text.TIM_DMAErrorCCxN:00000000 $t + /tmp/cc6Nb46Q.s:68 .text.TIM_DMAErrorCCxN:00000000 TIM_DMAErrorCCxN + /tmp/cc6Nb46Q.s:148 .text.TIM_DMADelayPulseNCplt:00000000 $t + /tmp/cc6Nb46Q.s:153 .text.TIM_DMADelayPulseNCplt:00000000 TIM_DMADelayPulseNCplt + /tmp/cc6Nb46Q.s:252 .text.HAL_TIMEx_HallSensor_MspInit:00000000 $t + /tmp/cc6Nb46Q.s:258 .text.HAL_TIMEx_HallSensor_MspInit:00000000 HAL_TIMEx_HallSensor_MspInit + /tmp/cc6Nb46Q.s:273 .text.HAL_TIMEx_HallSensor_Init:00000000 $t + /tmp/cc6Nb46Q.s:279 .text.HAL_TIMEx_HallSensor_Init:00000000 HAL_TIMEx_HallSensor_Init + /tmp/cc6Nb46Q.s:496 .text.HAL_TIMEx_HallSensor_Init:000000d4 $d + /tmp/cc6Nb46Q.s:501 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 $t + /tmp/cc6Nb46Q.s:507 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 HAL_TIMEx_HallSensor_MspDeInit + /tmp/cc6Nb46Q.s:522 .text.HAL_TIMEx_HallSensor_DeInit:00000000 $t + /tmp/cc6Nb46Q.s:528 .text.HAL_TIMEx_HallSensor_DeInit:00000000 HAL_TIMEx_HallSensor_DeInit + /tmp/cc6Nb46Q.s:598 .text.HAL_TIMEx_HallSensor_Start:00000000 $t + /tmp/cc6Nb46Q.s:604 .text.HAL_TIMEx_HallSensor_Start:00000000 HAL_TIMEx_HallSensor_Start + /tmp/cc6Nb46Q.s:765 .text.HAL_TIMEx_HallSensor_Start:000000c0 $d + /tmp/cc6Nb46Q.s:771 .text.HAL_TIMEx_HallSensor_Stop:00000000 $t + /tmp/cc6Nb46Q.s:777 .text.HAL_TIMEx_HallSensor_Stop:00000000 HAL_TIMEx_HallSensor_Stop + /tmp/cc6Nb46Q.s:836 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 $t + /tmp/cc6Nb46Q.s:842 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 HAL_TIMEx_HallSensor_Start_IT + /tmp/cc6Nb46Q.s:1008 .text.HAL_TIMEx_HallSensor_Start_IT:000000cc $d + /tmp/cc6Nb46Q.s:1014 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 $t + /tmp/cc6Nb46Q.s:1020 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 HAL_TIMEx_HallSensor_Stop_IT + /tmp/cc6Nb46Q.s:1084 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 $t + /tmp/cc6Nb46Q.s:1090 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 HAL_TIMEx_HallSensor_Start_DMA + /tmp/cc6Nb46Q.s:1282 .text.HAL_TIMEx_HallSensor_Start_DMA:000000e8 $d + /tmp/cc6Nb46Q.s:1291 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 $t + /tmp/cc6Nb46Q.s:1297 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 HAL_TIMEx_HallSensor_Stop_DMA + /tmp/cc6Nb46Q.s:1362 .text.HAL_TIMEx_OCN_Start:00000000 $t + /tmp/cc6Nb46Q.s:1368 .text.HAL_TIMEx_OCN_Start:00000000 HAL_TIMEx_OCN_Start + /tmp/cc6Nb46Q.s:1559 .text.HAL_TIMEx_OCN_Start:000000f8 $d + /tmp/cc6Nb46Q.s:1565 .text.HAL_TIMEx_OCN_Stop:00000000 $t + /tmp/cc6Nb46Q.s:1571 .text.HAL_TIMEx_OCN_Stop:00000000 HAL_TIMEx_OCN_Stop + /tmp/cc6Nb46Q.s:1668 .text.HAL_TIMEx_OCN_Start_IT:00000000 $t + /tmp/cc6Nb46Q.s:1674 .text.HAL_TIMEx_OCN_Start_IT:00000000 HAL_TIMEx_OCN_Start_IT + /tmp/cc6Nb46Q.s:1908 .text.HAL_TIMEx_OCN_Start_IT:00000130 $d + /tmp/cc6Nb46Q.s:1914 .text.HAL_TIMEx_OCN_Stop_IT:00000000 $t + /tmp/cc6Nb46Q.s:1920 .text.HAL_TIMEx_OCN_Stop_IT:00000000 HAL_TIMEx_OCN_Stop_IT + /tmp/cc6Nb46Q.s:2086 .text.HAL_TIMEx_OCN_Start_DMA:00000000 $t + /tmp/cc6Nb46Q.s:2092 .text.HAL_TIMEx_OCN_Start_DMA:00000000 HAL_TIMEx_OCN_Start_DMA + /tmp/cc6Nb46Q.s:2515 .text.HAL_TIMEx_OCN_Start_DMA:00000218 $d + /tmp/cc6Nb46Q.s:2524 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 $t + /tmp/cc6Nb46Q.s:2530 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 HAL_TIMEx_OCN_Stop_DMA + /tmp/cc6Nb46Q.s:2694 .text.HAL_TIMEx_PWMN_Start:00000000 $t + /tmp/cc6Nb46Q.s:2700 .text.HAL_TIMEx_PWMN_Start:00000000 HAL_TIMEx_PWMN_Start + /tmp/cc6Nb46Q.s:2891 .text.HAL_TIMEx_PWMN_Start:000000f8 $d + /tmp/cc6Nb46Q.s:2897 .text.HAL_TIMEx_PWMN_Stop:00000000 $t + /tmp/cc6Nb46Q.s:2903 .text.HAL_TIMEx_PWMN_Stop:00000000 HAL_TIMEx_PWMN_Stop + /tmp/cc6Nb46Q.s:3000 .text.HAL_TIMEx_PWMN_Start_IT:00000000 $t + /tmp/cc6Nb46Q.s:3006 .text.HAL_TIMEx_PWMN_Start_IT:00000000 HAL_TIMEx_PWMN_Start_IT + /tmp/cc6Nb46Q.s:3240 .text.HAL_TIMEx_PWMN_Start_IT:00000130 $d + /tmp/cc6Nb46Q.s:3246 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 $t + /tmp/cc6Nb46Q.s:3252 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 HAL_TIMEx_PWMN_Stop_IT + ARM GAS /tmp/cc6Nb46Q.s page 179 - /tmp/cc3heCqB.s:3418 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 $t - /tmp/cc3heCqB.s:3424 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 HAL_TIMEx_PWMN_Start_DMA - /tmp/cc3heCqB.s:3847 .text.HAL_TIMEx_PWMN_Start_DMA:00000218 $d - /tmp/cc3heCqB.s:3856 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 $t - /tmp/cc3heCqB.s:3862 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 HAL_TIMEx_PWMN_Stop_DMA - /tmp/cc3heCqB.s:4026 .text.HAL_TIMEx_OnePulseN_Start:00000000 $t - /tmp/cc3heCqB.s:4032 .text.HAL_TIMEx_OnePulseN_Start:00000000 HAL_TIMEx_OnePulseN_Start - /tmp/cc3heCqB.s:4156 .text.HAL_TIMEx_OnePulseN_Stop:00000000 $t - /tmp/cc3heCqB.s:4162 .text.HAL_TIMEx_OnePulseN_Stop:00000000 HAL_TIMEx_OnePulseN_Stop - /tmp/cc3heCqB.s:4258 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 $t - /tmp/cc3heCqB.s:4264 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 HAL_TIMEx_OnePulseN_Start_IT - /tmp/cc3heCqB.s:4399 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 $t - /tmp/cc3heCqB.s:4405 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 HAL_TIMEx_OnePulseN_Stop_IT - /tmp/cc3heCqB.s:4511 .text.HAL_TIMEx_ConfigCommutEvent:00000000 $t - /tmp/cc3heCqB.s:4517 .text.HAL_TIMEx_ConfigCommutEvent:00000000 HAL_TIMEx_ConfigCommutEvent - /tmp/cc3heCqB.s:4641 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 $t - /tmp/cc3heCqB.s:4647 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 HAL_TIMEx_ConfigCommutEvent_IT - /tmp/cc3heCqB.s:4771 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 $t - /tmp/cc3heCqB.s:4777 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 HAL_TIMEx_ConfigCommutEvent_DMA - /tmp/cc3heCqB.s:4918 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000088 $d - /tmp/cc3heCqB.s:5639 .text.TIMEx_DMACommutationCplt:00000000 TIMEx_DMACommutationCplt - /tmp/cc3heCqB.s:5696 .text.TIMEx_DMACommutationHalfCplt:00000000 TIMEx_DMACommutationHalfCplt - /tmp/cc3heCqB.s:4925 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 $t - /tmp/cc3heCqB.s:4931 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 HAL_TIMEx_MasterConfigSynchronization - /tmp/cc3heCqB.s:5087 .text.HAL_TIMEx_MasterConfigSynchronization:00000098 $d - /tmp/cc3heCqB.s:5093 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 $t - /tmp/cc3heCqB.s:5099 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 HAL_TIMEx_ConfigBreakDeadTime - /tmp/cc3heCqB.s:5264 .text.HAL_TIMEx_ConfigBreakDeadTime:00000088 $d - /tmp/cc3heCqB.s:5270 .text.HAL_TIMEx_ConfigBreakInput:00000000 $t - /tmp/cc3heCqB.s:5276 .text.HAL_TIMEx_ConfigBreakInput:00000000 HAL_TIMEx_ConfigBreakInput - /tmp/cc3heCqB.s:5478 .text.HAL_TIMEx_RemapConfig:00000000 $t - /tmp/cc3heCqB.s:5484 .text.HAL_TIMEx_RemapConfig:00000000 HAL_TIMEx_RemapConfig - /tmp/cc3heCqB.s:5533 .text.HAL_TIMEx_GroupChannel5:00000000 $t - /tmp/cc3heCqB.s:5539 .text.HAL_TIMEx_GroupChannel5:00000000 HAL_TIMEx_GroupChannel5 - /tmp/cc3heCqB.s:5612 .text.HAL_TIMEx_CommutCallback:00000000 $t - /tmp/cc3heCqB.s:5618 .text.HAL_TIMEx_CommutCallback:00000000 HAL_TIMEx_CommutCallback - /tmp/cc3heCqB.s:5633 .text.TIMEx_DMACommutationCplt:00000000 $t - /tmp/cc3heCqB.s:5669 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 $t - /tmp/cc3heCqB.s:5675 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 HAL_TIMEx_CommutHalfCpltCallback - /tmp/cc3heCqB.s:5690 .text.TIMEx_DMACommutationHalfCplt:00000000 $t - /tmp/cc3heCqB.s:5726 .text.HAL_TIMEx_BreakCallback:00000000 $t - /tmp/cc3heCqB.s:5732 .text.HAL_TIMEx_BreakCallback:00000000 HAL_TIMEx_BreakCallback - /tmp/cc3heCqB.s:5747 .text.HAL_TIMEx_Break2Callback:00000000 $t - /tmp/cc3heCqB.s:5753 .text.HAL_TIMEx_Break2Callback:00000000 HAL_TIMEx_Break2Callback - /tmp/cc3heCqB.s:5768 .text.HAL_TIMEx_HallSensor_GetState:00000000 $t - /tmp/cc3heCqB.s:5774 .text.HAL_TIMEx_HallSensor_GetState:00000000 HAL_TIMEx_HallSensor_GetState - /tmp/cc3heCqB.s:5792 .text.HAL_TIMEx_GetChannelNState:00000000 $t - /tmp/cc3heCqB.s:5798 .text.HAL_TIMEx_GetChannelNState:00000000 HAL_TIMEx_GetChannelNState + /tmp/cc6Nb46Q.s:3418 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 $t + /tmp/cc6Nb46Q.s:3424 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 HAL_TIMEx_PWMN_Start_DMA + /tmp/cc6Nb46Q.s:3847 .text.HAL_TIMEx_PWMN_Start_DMA:00000218 $d + /tmp/cc6Nb46Q.s:3856 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 $t + /tmp/cc6Nb46Q.s:3862 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 HAL_TIMEx_PWMN_Stop_DMA + /tmp/cc6Nb46Q.s:4026 .text.HAL_TIMEx_OnePulseN_Start:00000000 $t + /tmp/cc6Nb46Q.s:4032 .text.HAL_TIMEx_OnePulseN_Start:00000000 HAL_TIMEx_OnePulseN_Start + /tmp/cc6Nb46Q.s:4156 .text.HAL_TIMEx_OnePulseN_Stop:00000000 $t + /tmp/cc6Nb46Q.s:4162 .text.HAL_TIMEx_OnePulseN_Stop:00000000 HAL_TIMEx_OnePulseN_Stop + /tmp/cc6Nb46Q.s:4258 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 $t + /tmp/cc6Nb46Q.s:4264 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 HAL_TIMEx_OnePulseN_Start_IT + /tmp/cc6Nb46Q.s:4399 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 $t + /tmp/cc6Nb46Q.s:4405 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 HAL_TIMEx_OnePulseN_Stop_IT + /tmp/cc6Nb46Q.s:4511 .text.HAL_TIMEx_ConfigCommutEvent:00000000 $t + /tmp/cc6Nb46Q.s:4517 .text.HAL_TIMEx_ConfigCommutEvent:00000000 HAL_TIMEx_ConfigCommutEvent + /tmp/cc6Nb46Q.s:4641 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 $t + /tmp/cc6Nb46Q.s:4647 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 HAL_TIMEx_ConfigCommutEvent_IT + /tmp/cc6Nb46Q.s:4771 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 $t + /tmp/cc6Nb46Q.s:4777 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 HAL_TIMEx_ConfigCommutEvent_DMA + /tmp/cc6Nb46Q.s:4918 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000088 $d + /tmp/cc6Nb46Q.s:5639 .text.TIMEx_DMACommutationCplt:00000000 TIMEx_DMACommutationCplt + /tmp/cc6Nb46Q.s:5696 .text.TIMEx_DMACommutationHalfCplt:00000000 TIMEx_DMACommutationHalfCplt + /tmp/cc6Nb46Q.s:4925 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 $t + /tmp/cc6Nb46Q.s:4931 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 HAL_TIMEx_MasterConfigSynchronization + /tmp/cc6Nb46Q.s:5087 .text.HAL_TIMEx_MasterConfigSynchronization:00000098 $d + /tmp/cc6Nb46Q.s:5093 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 $t + /tmp/cc6Nb46Q.s:5099 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 HAL_TIMEx_ConfigBreakDeadTime + /tmp/cc6Nb46Q.s:5264 .text.HAL_TIMEx_ConfigBreakDeadTime:00000088 $d + /tmp/cc6Nb46Q.s:5270 .text.HAL_TIMEx_ConfigBreakInput:00000000 $t + /tmp/cc6Nb46Q.s:5276 .text.HAL_TIMEx_ConfigBreakInput:00000000 HAL_TIMEx_ConfigBreakInput + /tmp/cc6Nb46Q.s:5478 .text.HAL_TIMEx_RemapConfig:00000000 $t + /tmp/cc6Nb46Q.s:5484 .text.HAL_TIMEx_RemapConfig:00000000 HAL_TIMEx_RemapConfig + /tmp/cc6Nb46Q.s:5533 .text.HAL_TIMEx_GroupChannel5:00000000 $t + /tmp/cc6Nb46Q.s:5539 .text.HAL_TIMEx_GroupChannel5:00000000 HAL_TIMEx_GroupChannel5 + /tmp/cc6Nb46Q.s:5612 .text.HAL_TIMEx_CommutCallback:00000000 $t + /tmp/cc6Nb46Q.s:5618 .text.HAL_TIMEx_CommutCallback:00000000 HAL_TIMEx_CommutCallback + /tmp/cc6Nb46Q.s:5633 .text.TIMEx_DMACommutationCplt:00000000 $t + /tmp/cc6Nb46Q.s:5669 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 $t + /tmp/cc6Nb46Q.s:5675 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 HAL_TIMEx_CommutHalfCpltCallback + /tmp/cc6Nb46Q.s:5690 .text.TIMEx_DMACommutationHalfCplt:00000000 $t + /tmp/cc6Nb46Q.s:5726 .text.HAL_TIMEx_BreakCallback:00000000 $t + /tmp/cc6Nb46Q.s:5732 .text.HAL_TIMEx_BreakCallback:00000000 HAL_TIMEx_BreakCallback + /tmp/cc6Nb46Q.s:5747 .text.HAL_TIMEx_Break2Callback:00000000 $t + /tmp/cc6Nb46Q.s:5753 .text.HAL_TIMEx_Break2Callback:00000000 HAL_TIMEx_Break2Callback + /tmp/cc6Nb46Q.s:5768 .text.HAL_TIMEx_HallSensor_GetState:00000000 $t + /tmp/cc6Nb46Q.s:5774 .text.HAL_TIMEx_HallSensor_GetState:00000000 HAL_TIMEx_HallSensor_GetState + /tmp/cc6Nb46Q.s:5792 .text.HAL_TIMEx_GetChannelNState:00000000 $t + /tmp/cc6Nb46Q.s:5798 .text.HAL_TIMEx_GetChannelNState:00000000 HAL_TIMEx_GetChannelNState UNDEFINED SYMBOLS HAL_TIM_ErrorCallback @@ -10681,7 +10681,7 @@ TIM_TI1_SetConfig TIM_OC2_SetConfig TIM_CCxChannelCmd HAL_DMA_Start_IT - ARM GAS /tmp/cc3heCqB.s page 180 + ARM GAS /tmp/cc6Nb46Q.s page 180 TIM_DMACaptureCplt diff --git a/build/stm32f7xx_hal_tim_ex.o b/build/stm32f7xx_hal_tim_ex.o index cffa83ddedf5533b864bc92417fcb36429340370..92659242ce49974342ff3a486d7316b29237507f 100644 GIT binary patch delta 3023 zcmX|D32+nV75?AuN~<*sE8|NtLXs_6K4dIg@)0t|<}eM|#ty|0j({=52Uko@fE+YT z8&XOMsm&XsP|CPKT^#77Kn-SqE=j+0sQTrh~8u25yAO$bR+7uo3n_U#fQTSTRYVp}fL!(m%v>KsQk zA!Jn{QHi@k(EENIbY;N1c+C}rZ{q}a1dd~s+YfPUc9%ms?sGRJcaJB--^s~Ok%JWQ zXiM;xyK~|&OaC|~t<>&}$1RyfP=Ni!CA^%uY+4g#6XO@mZW2H>DA&gcF;0c0B(&v% zN`>iRDof~RNCEmg9A5X4L>BUh9oJ8CZC_xpeglwR$Vk9eCZ~|&gkpQKHcT%@ALXz| z^$qMC5XM33&0c0f#n?b5_Nf+h7~i1?_DT!t#tCY{UTs0Aah_7!XIe1Tcu5h3!am!= zE@RmQQrBA0W1OU-?ei??H@+N)5swFwvEGxveJ&k{&{xq3fIcya+nPDINb(Gp^B9XV$SC&;!682XC8SQb==o(AHQ>7FH$V~9xt~n1r*~W2f^=qi%eK* zOwtMVcxUm!2FeWQ0-gf;icIGR41vnz!umXJ{y^4DQ#i*s&LIw3u--V!+CB?DY@FfZ z4tWzt-ekPOy&v%=ro7ll!EKXkA3a7{)naP`!qBNiHD*D@I7MrymRrzaT%ic+gBH|{ zzfg8{ngyLkJ{!-mV5*S!VYWAK`yQ%EZL*|_ahAGLAF-gr*uwdiT2MDqXkh9J3p$NI zF!MDTNOW{X6J zs3wEuFSIcEsVQSv(S|sD+8B0dSv;DIF|2C`D6;Av!%poIZJs)545w;u;2NJVdYFsK z8k739r?`~B7!GQGMYdppWoAh@{h8@k1bAr2xuZVrhw+s?GzbC13q2jR5pp<~C2D zLKQuixI>>#+^H`i?$@`FR*0l}e8r!>oi|ur3AtZz=77+6h1C`a{gx936pe4Lx(Y%Z zoj)u6tX~be!zT7?yyI#sgc3_$sqvDlZ4f#_c2Z!P_8Ff+JA_;mM+#JFHjdW;p(!S= zk+iEgJ8NClc^b8&WbEXOgXHBXwV-0WLlrwJEa)&QodoZ1sgRf9=UHy&U8=-Ub3epC zF(bP;wwcQbYIcCzlrWWkz4&%+2^_<_xvj7qAIn?rJ;ufZ zs%bopMn08@=Dd$45`rQ8dtNhK!|MEIaAP0w|KPp+IpD=P1v`mfDo9O_^6Z|q`~E_SsjWozI`xzgyAh&+3#PpGoBr=<&Vf&?$Ja2Ks7RNKm0 z$nrEPengZQ+YFmIwq+SYJVN9=RKS$ z#9ksYt|@Ly%;AP?mh{CWAwDFcIlNX}3+HiMNh~pqcG=8sOcr9)Gd7KOxs9iBl!VU{ zC8p6Km+~}@dxeM-CAwQHo85igCqx4grN)vIiM~8?9aoj_Coz+`bl!yhdJ=T7Fo2Io zd9!~IwWe`FG7J76DL=UH^`>NIc_B-P?-Eg#;b)2usT_GFF_T|_=}w|l_c?Vpk0WfrF6P#G_(TwVb0VNv-v z(@o#1gzt@z5T6iHigV?u^b7AwIT`P*D1dDkuGkMx;)RNmG?nk|?hc6t^KPCHgG2>y zzB=xKyvA2&?0haMd)E5S)$3~3Y+18uP3Pkx($Tr0HPX7dt8-&Zq^5P#x+gj}p4!{p z20z4};YRo|zCXMbeu_(OZ^eHM>v;8c4P3^okw)q20CtTuNFNU1>-6|^04I(%NH+&? z)o25*998i2Xgz(B;HyR`#rec5@euJEyg|GkXWVIo9oR#hGTdpz?mG&W-mQnz_^rE* za25xNpU13wjnY>yW7oX~@Zh<7jZoN|3>2!jg?N4MN$7(|e>oqZ8sLd|j|5v`TU?Xj z->@ToTZXOD&DY~y3N%1!{G37_JL1VUdNjpbY!HTq_#PVspeTOQ2Dz{}KE#i+aj-+K k?NXd>D3-jG5}$4dCn)jxB$aL+jz4XO5WEmSWQUCZ1Iw~Tc>n+a delta 3080 zcmX|D4RBP|6~5=axBK>mN8UpIcEhr}$!<2;Y{(|r{17GyNWuVt{1gHR{)B~Wl7&EQ zsnW|-4B+~;TEf&*u zea~`SVN8@IG8Nk^7(Ks&=WQ7JS9$h zgaQPQL+QY;?cLMO$z(l~uvRHkl5tyRAY@+U(mvUdXUDaFg8Vo zHDom9f=rF6mDCnfPtyjd7kGMg7Fk3lT4d~+VcWSw=}ml;sfHj#_D(tsB2b;@9_GN7uxMT42=8qlg;pwi~~229m{ zC9wi#USMFG7NvpB^#*ikf1;+%4F+^;l8Qlx11fQ;!@qMC9SBn&q7wksoy5ml&e>9{ zsJ^5gqdF!g-sI&r2@-WIRgkhGWn63SwdPT@wwlki$HkxdT+dT3^Ij((S@1~OO$)(a zItz7Js`*ud{mxo`u%0r_8s;pZt56S~t>vLKvtVg6AAWzi7#WeGjHc{>Pc=ftdjOVPqE5?7Ht==x5j{~mPLfg z4;s*_eaPW@1Ey*>xO0aAZA^TExRy7F=ZFl`e3~^`mB*Cb^q_U{qMuKtQSm*e7pn0K zXJ*(+hbT`2Bc3Uh6ep)7u%vv-)2Ah{MG10hG7?x-hAFdbPhhL^G2J|QMgpfQqZoC$ zN{;fTvJzIea*(&;Nno$?3D1&~zyZ=eWnRJUjoajPU*SkUOqpx5DqZ906bal2{$$Gw1-Hjq(Vd8YPA2 z>jd8{9oGrUHC&LjvE~9%Z7EKioOYO^ETsmNw0~2_mI?z}v^Ju|a`%=pF^XSg*{v#N zwA9^A@g-(t7lnSx+wm%9fC<`8<%&&{N@%gc8Qyvx-%F$X@jV-a@X_phGcx(!YQD$W zN^RjsVFMqIWiNphSmtrVbX@82!b05Palu90@3H4RNoNG6q*PR+{z&CU{juCWu=Rgmx@n*sZZuPDteb!qFod`MH;>hWM zIk+n)09|-ArxjYz>RSP4u-%sr1K95iO_!-*7_~I;y6^+$g}>uPUoE6#X6~YS2kBU# z$g&*i(zZ}n^(3yD^xc3GOB(;!^H1|3ZXDpAA&buEH8Nb}#>@Cpt{;Z*Y;G}}z}vYI z*obX;4>(V7=T~Ljxtb`iBq5%kB}RPkDPGQNg>P}LzZG(Eko0Z5<6i^?xG4WA(*MX$ zO`pfPd)(}LpAtprcw0$aUc8m>hd0q1SOQPuLjfLgGQdObDKJ8O@sLB)85<;_kc|aA zWT0RPoWd&wp>+KiPMdT(CQ}&u4~c6g=FfV3g}zl|YUE7W(&&^(90zDls4;bMdxnIZ>x$arJlqiVmcE+7*i{nZ;q9V&xPViNLvc1bM7_E;ld(xh zf{hNbowM-@8J{GHv(YJ*ayAY-8HWs5H~YB~gN=6uz2R?Z^OL(#e-rd7KhI+9X%eb3UeZoHw1xuk6WkLr zc<2!p^NRbj8S5n>x6x1uyohq?N?3pomWJl(XZ;zh_$!Ti$-~$=lK6C=L4;4|_cE46 z;?ghpwfIMU0~y-6aUPy8ZG}g%xNI@KpF7Gz0o|=H?)IY`#(GFx`rYma{cit;48z>$ z#Y<)UqKf7Da2*TFf1Iwz*2H6P_!#?~gi8FmJeB^#yI4-n&s5~YZVXiHgP-BM6~$?3 z{Jq`NDG)Iq<}r4jB>!I{Q)cHirPOwHuisb~-4=Z~+P#@IhkGKM@xV~VNYhgtNmaql z?oE+kd!#KKY*^gf5?mH;i*`46c5mt499`eKeCxW0BR%cm^^w+|a9g-1xG=Ig(i7g& z-P77!JAdSZ{=Rm22czRn`09j;?~HfBC>Bp_hyUU5L=$|66BA8>G>rAP8U=M2pQ9yp z7_ZUd7{)o1jZlZZlTGy9xq_5+|?IywdYplP+)9t&%(~XgC8>j?IG0+QxuMspInitCallback == NULL) 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 7 + ARM GAS /tmp/ccsprDvq.s page 7 318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->MspInitCallback = HAL_UART_MspInit; @@ -418,7 +418,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check UART instance */ 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance)); 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 8 + ARM GAS /tmp/ccsprDvq.s page 8 375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_RESET) @@ -478,7 +478,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /** 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @brief Initialize the LIN mode according to the specified 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * parameters in the UART_InitTypeDef and creates the associated handle. - ARM GAS /tmp/ccQxTlMj.s page 9 + ARM GAS /tmp/ccsprDvq.s page 9 432:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param huart UART handle. @@ -538,7 +538,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** __HAL_UART_DISABLE(huart); 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Perform advanced settings configuration */ - ARM GAS /tmp/ccQxTlMj.s page 10 + ARM GAS /tmp/ccsprDvq.s page 10 489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* For some items, configuration requires to be done prior TE and RE bits are set */ @@ -598,7 +598,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_ERROR; 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 11 + ARM GAS /tmp/ccsprDvq.s page 11 546:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check the wake up method parameter */ @@ -658,7 +658,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod); 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** __HAL_UART_ENABLE(huart); - ARM GAS /tmp/ccQxTlMj.s page 12 + ARM GAS /tmp/ccsprDvq.s page 12 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @brief Initialize the UART MSP. 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param huart UART handle. 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval None - ARM GAS /tmp/ccQxTlMj.s page 13 + ARM GAS /tmp/ccsprDvq.s page 13 660:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** */ @@ -778,7 +778,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (pCallback == NULL) 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 14 + ARM GAS /tmp/ccsprDvq.s page 14 717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK; @@ -838,7 +838,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** case HAL_UART_MSPDEINIT_CB_ID : 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->MspDeInitCallback = pCallback; 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** break; - ARM GAS /tmp/ccQxTlMj.s page 15 + ARM GAS /tmp/ccsprDvq.s page 15 774:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -898,7 +898,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID 829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID 830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID - ARM GAS /tmp/ccQxTlMj.s page 16 + ARM GAS /tmp/ccsprDvq.s page 16 831:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval HAL status @@ -958,7 +958,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** break; 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** case HAL_UART_MSPDEINIT_CB_ID : - ARM GAS /tmp/ccQxTlMj.s page 17 + ARM GAS /tmp/ccsprDvq.s page 17 888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDe @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_ERROR; 943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 18 + ARM GAS /tmp/ccsprDvq.s page 18 945:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->RxState == HAL_UART_STATE_READY) @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (#) There are two mode of transfer: 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) Blocking mode: The communication is performed in polling mode. 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** The HAL status of all data processing is returned by the same function - ARM GAS /tmp/ccQxTlMj.s page 19 + ARM GAS /tmp/ccsprDvq.s page 19 1002:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** after finishing transfer. @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (#) In Non-Blocking mode transfers, possible errors are split into 2 categories. 1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** Errors are handled as follows : - ARM GAS /tmp/ccQxTlMj.s page 20 + ARM GAS /tmp/ccsprDvq.s page 20 1059:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but er @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata8bits = NULL; - ARM GAS /tmp/ccQxTlMj.s page 21 + ARM GAS /tmp/ccsprDvq.s page 21 1116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata16bits = (const uint16_t *) pData; @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements). 1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be received. 1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param Timeout Timeout duration. - ARM GAS /tmp/ccQxTlMj.s page 22 + ARM GAS /tmp/ccsprDvq.s page 22 1173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval HAL status @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask); 1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata16bits++; 1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } - ARM GAS /tmp/ccQxTlMj.s page 23 + ARM GAS /tmp/ccsprDvq.s page 23 1230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** else @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->TxISR = UART_TxISR_8BIT; 1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 24 + ARM GAS /tmp/ccsprDvq.s page 24 1287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Enable the Transmit Data Register Empty interrupt */ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param huart UART handle. 1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements). 1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be sent. - ARM GAS /tmp/ccQxTlMj.s page 25 + ARM GAS /tmp/ccsprDvq.s page 25 1344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval HAL status @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** else 1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_BUSY; - ARM GAS /tmp/ccQxTlMj.s page 26 + ARM GAS /tmp/ccsprDvq.s page 26 1401:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX)) 1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Disable the UART DMA Tx request */ - ARM GAS /tmp/ccQxTlMj.s page 27 + ARM GAS /tmp/ccsprDvq.s page 27 1458:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* The Lock is not implemented on this API to allow the user application 1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() 1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback: - ARM GAS /tmp/ccQxTlMj.s page 28 + ARM GAS /tmp/ccsprDvq.s page 28 1515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_OK; 1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } - ARM GAS /tmp/ccQxTlMj.s page 29 + ARM GAS /tmp/ccsprDvq.s page 29 1572:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Disable the UART DMA Rx request if enabled */ 1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 30 + ARM GAS /tmp/ccsprDvq.s page 30 1629:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Disable TXEIE and TCIE interrupts */ 1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); - ARM GAS /tmp/ccQxTlMj.s page 31 + ARM GAS /tmp/ccsprDvq.s page 31 1686:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ 1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - ARM GAS /tmp/ccQxTlMj.s page 32 + ARM GAS /tmp/ccsprDvq.s page 32 1743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - Set handle State to READY 1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - At abort completion, call user abort complete callback 1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be - ARM GAS /tmp/ccQxTlMj.s page 33 + ARM GAS /tmp/ccsprDvq.s page 33 1800:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * considered as completed only when user abort complete callback is executed (not when ex @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ 1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->hdmatx != NULL) 1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 34 + ARM GAS /tmp/ccsprDvq.s page 34 1857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* UART Tx DMA Abort callback has already been initialised : @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Clear the Error flags in the ICR register */ 1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF 1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 35 + ARM GAS /tmp/ccsprDvq.s page 35 1914:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Abort DMA TX */ 1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK) 1970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 36 + ARM GAS /tmp/ccsprDvq.s page 36 1971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * This procedure performs following operations : 2026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - Disable UART Interrupts (Rx) 2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - Disable the DMA transfer in the peripheral register (if enabled) - ARM GAS /tmp/ccQxTlMj.s page 37 + ARM GAS /tmp/ccsprDvq.s page 37 2028:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode) @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; 2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 2084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 38 + ARM GAS /tmp/ccsprDvq.s page 38 2085:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* As no DMA to be aborted, call directly user Abort complete callback */ @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (errorflags == 0U) 2140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 2141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* UART in mode Receiver ---------------------------------------------------*/ - ARM GAS /tmp/ccQxTlMj.s page 39 + ARM GAS /tmp/ccsprDvq.s page 39 2142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (((isrflags & USART_ISR_RXNE) != 0U) @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 2197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_RTO; 2198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } - ARM GAS /tmp/ccQxTlMj.s page 40 + ARM GAS /tmp/ccsprDvq.s page 40 2199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #else 2254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call legacy weak error callback*/ 2255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** HAL_UART_ErrorCallback(huart); - ARM GAS /tmp/ccQxTlMj.s page 41 + ARM GAS /tmp/ccsprDvq.s page 41 2256:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxXferCount = nb_remaining_rx_data; 2311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 2312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* In Normal mode, end DMA xfer and HAL UART Rx process*/ - ARM GAS /tmp/ccQxTlMj.s page 42 + ARM GAS /tmp/ccsprDvq.s page 42 2313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->hdmarx->Init.Mode != DMA_CIRCULAR) @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxISR = NULL; 2368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 2369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - ARM GAS /tmp/ccQxTlMj.s page 43 + ARM GAS /tmp/ccsprDvq.s page 43 2370:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return; 2425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 2426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 44 + ARM GAS /tmp/ccsprDvq.s page 44 2427:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ 2482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** UNUSED(huart); 2483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 45 + ARM GAS /tmp/ccsprDvq.s page 45 2484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* NOTE: This function should not be modified, when the callback is needed, @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** */ 2539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** __weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart) 2540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 46 + ARM GAS /tmp/ccsprDvq.s page 46 2541:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2595:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** [..] 2596:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** This subsection provides a set of functions allowing to control the UART. 2597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) HAL_UART_ReceiverTimeout_Config() API allows to configure the receiver timeout value on th - ARM GAS /tmp/ccQxTlMj.s page 47 + ARM GAS /tmp/ccsprDvq.s page 47 2598:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) HAL_UART_EnableReceiverTimeout() API enables the receiver timeout feature @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2652:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** else 2653:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 2654:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_BUSY; - ARM GAS /tmp/ccQxTlMj.s page 48 + ARM GAS /tmp/ccsprDvq.s page 48 2655:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2709:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /** 2710:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @brief Disable UART mute mode (does not mean the UART actually exits mute mode 2711:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * as it may not have been in mute mode at this very moment). - ARM GAS /tmp/ccQxTlMj.s page 49 + ARM GAS /tmp/ccsprDvq.s page 49 2712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param huart UART handle. @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2766:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval HAL status. 2767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** */ 2768:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart) - ARM GAS /tmp/ccQxTlMj.s page 50 + ARM GAS /tmp/ccsprDvq.s page 50 2769:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** This subsection provides functions allowing to : 2824:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) Return the UART handle state. 2825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) Return the UART handle error code - ARM GAS /tmp/ccQxTlMj.s page 51 + ARM GAS /tmp/ccsprDvq.s page 51 2826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2880:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltC 2881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallb 2882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallba - ARM GAS /tmp/ccQxTlMj.s page 52 + ARM GAS /tmp/ccsprDvq.s page 52 2883:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCa @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2937:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Configure 2938:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - UART HardWare Flow Control: set CTSE and RTSE bits according 2939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * to huart->Init.HwFlowCtl value - ARM GAS /tmp/ccQxTlMj.s page 53 + ARM GAS /tmp/ccsprDvq.s page 53 2940:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - one-bit sampling method versus three samples' majority rule according @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** switch (clocksource) 2995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 2996:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** case UART_CLOCKSOURCE_PCLK1: - ARM GAS /tmp/ccQxTlMj.s page 54 + ARM GAS /tmp/ccsprDvq.s page 54 2997:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pclk = HAL_RCC_GetPCLK1Freq(); @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3051:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) 3052:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 3053:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); - ARM GAS /tmp/ccQxTlMj.s page 55 + ARM GAS /tmp/ccsprDvq.s page 55 3054:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 3109:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); 3110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - ARM GAS /tmp/ccQxTlMj.s page 56 + ARM GAS /tmp/ccsprDvq.s page 56 3111:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 3166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 3167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* USART_ISR_REACK */ - ARM GAS /tmp/ccQxTlMj.s page 57 + ARM GAS /tmp/ccsprDvq.s page 57 3168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_ERROR; 3223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 3224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) - ARM GAS /tmp/ccQxTlMj.s page 58 + ARM GAS /tmp/ccsprDvq.s page 58 3225:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** else 3280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 3281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxISR = UART_RxISR_8BIT; - ARM GAS /tmp/ccQxTlMj.s page 59 + ARM GAS /tmp/ccsprDvq.s page 59 3282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY; 3337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 3338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_ERROR; - ARM GAS /tmp/ccQxTlMj.s page 60 + ARM GAS /tmp/ccsprDvq.s page 60 3339:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * - ARM GAS /tmp/ccQxTlMj.s page 61 + ARM GAS /tmp/ccsprDvq.s page 61 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) - ARM GAS /tmp/ccQxTlMj.s page 62 + ARM GAS /tmp/ccsprDvq.s page 62 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts - ARM GAS /tmp/ccQxTlMj.s page 63 + ARM GAS /tmp/ccsprDvq.s page 63 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccQxTlMj.s page 64 + ARM GAS /tmp/ccsprDvq.s page 64 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccQxTlMj.s page 65 + ARM GAS /tmp/ccsprDvq.s page 65 240:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccQxTlMj.s page 66 + ARM GAS /tmp/ccsprDvq.s page 66 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. - ARM GAS /tmp/ccQxTlMj.s page 67 + ARM GAS /tmp/ccsprDvq.s page 67 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask - ARM GAS /tmp/ccQxTlMj.s page 68 + ARM GAS /tmp/ccsprDvq.s page 68 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccQxTlMj.s page 69 + ARM GAS /tmp/ccsprDvq.s page 69 468:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. - ARM GAS /tmp/ccQxTlMj.s page 70 + ARM GAS /tmp/ccsprDvq.s page 70 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 579:Drivers/CMSIS/Include/cmsis_gcc.h **** 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) - ARM GAS /tmp/ccQxTlMj.s page 71 + ARM GAS /tmp/ccsprDvq.s page 71 582:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccQxTlMj.s page 72 + ARM GAS /tmp/ccsprDvq.s page 72 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) - ARM GAS /tmp/ccQxTlMj.s page 73 + ARM GAS /tmp/ccsprDvq.s page 73 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); - ARM GAS /tmp/ccQxTlMj.s page 74 + ARM GAS /tmp/ccsprDvq.s page 74 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } 808:Drivers/CMSIS/Include/cmsis_gcc.h **** 809:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccQxTlMj.s page 75 + ARM GAS /tmp/ccsprDvq.s page 75 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) - ARM GAS /tmp/ccQxTlMj.s page 76 + ARM GAS /tmp/ccsprDvq.s page 76 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 922:Drivers/CMSIS/Include/cmsis_gcc.h **** 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); - ARM GAS /tmp/ccQxTlMj.s page 77 + ARM GAS /tmp/ccsprDvq.s page 77 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccQxTlMj.s page 78 + ARM GAS /tmp/ccsprDvq.s page 78 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccQxTlMj.s page 79 + ARM GAS /tmp/ccsprDvq.s page 79 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 62 .loc 1 3367 3 is_stmt 1 discriminator 1 view .LVU11 63 .LBB417: 64 .LBI417: - ARM GAS /tmp/ccQxTlMj.s page 80 + ARM GAS /tmp/ccsprDvq.s page 80 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 69 .syntax unified 70 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 71 000a 42E80031 strex r1, r3, [r2] - ARM GAS /tmp/ccQxTlMj.s page 81 + ARM GAS /tmp/ccsprDvq.s page 81 72 @ 0 "" 2 @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 112 .LBB419: 113 .loc 1 3382 3 discriminator 1 view .LVU25 114 .loc 1 3382 3 discriminator 1 view .LVU26 - ARM GAS /tmp/ccQxTlMj.s page 82 + ARM GAS /tmp/ccsprDvq.s page 82 115 .loc 1 3382 3 discriminator 1 view .LVU27 @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 161 .loc 1 3382 3 discriminator 1 view .LVU41 162 .LBE419: 163 .loc 1 3382 3 is_stmt 1 discriminator 2 view .LVU42 - ARM GAS /tmp/ccQxTlMj.s page 83 + ARM GAS /tmp/ccsprDvq.s page 83 3383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 207 @ 0 "" 2 208 .LVL17: 209 .loc 2 1124 4 is_stmt 1 view .LVU59 - ARM GAS /tmp/ccQxTlMj.s page 84 + ARM GAS /tmp/ccsprDvq.s page 84 210 .loc 2 1124 4 is_stmt 0 view .LVU60 @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 247 .loc 1 3388 5 discriminator 1 view .LVU77 248 003e 0268 ldr r2, [r0] - ARM GAS /tmp/ccQxTlMj.s page 85 + ARM GAS /tmp/ccsprDvq.s page 85 249 .LVL19: @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 292 .LBE429: 293 .cfi_endproc 294 .LFE192: - ARM GAS /tmp/ccQxTlMj.s page 86 + ARM GAS /tmp/ccsprDvq.s page 86 296 .section .text.UART_TxISR_8BIT,"ax",%progbits @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call registered Tx Half complete callback*/ 3445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->TxHalfCpltCallback(huart); 3446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #else - ARM GAS /tmp/ccQxTlMj.s page 87 + ARM GAS /tmp/ccsprDvq.s page 87 3447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call legacy weak Tx Half complete callback*/ @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 3502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* In other cases : use Rx Complete callback */ 3503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) - ARM GAS /tmp/ccQxTlMj.s page 88 + ARM GAS /tmp/ccsprDvq.s page 88 3504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call registered Rx complete callback*/ @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); 3559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 3560:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** const HAL_UART_StateTypeDef gstate = huart->gState; - ARM GAS /tmp/ccQxTlMj.s page 89 + ARM GAS /tmp/ccsprDvq.s page 89 3561:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState; @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * Abort still ongoing for Rx DMA Handle. 3616:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param hdma DMA handle. 3617:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval None - ARM GAS /tmp/ccQxTlMj.s page 90 + ARM GAS /tmp/ccsprDvq.s page 90 3618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** */ @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 3673:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = NULL; 3674:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 91 + ARM GAS /tmp/ccsprDvq.s page 91 3675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check if an Abort process is still ongoing */ @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3729:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY; 3730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 3731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Call user Abort complete callback */ - ARM GAS /tmp/ccQxTlMj.s page 92 + ARM GAS /tmp/ccsprDvq.s page 92 3732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 307 @ args = 0, pretend = 0, frame = 0 308 @ frame_needed = 0, uses_anonymous_args = 0 309 @ link register save eliminated. - ARM GAS /tmp/ccQxTlMj.s page 93 + ARM GAS /tmp/ccsprDvq.s page 93 3784:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check that a Tx process is ongoing */ @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 337 .LBB436: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 338 .loc 2 1070 5 view .LVU104 - ARM GAS /tmp/ccQxTlMj.s page 94 + ARM GAS /tmp/ccsprDvq.s page 94 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 381 .LBB439: 3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 382 .loc 1 3793 7 discriminator 1 view .LVU119 - ARM GAS /tmp/ccQxTlMj.s page 95 + ARM GAS /tmp/ccsprDvq.s page 95 3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 425 .loc 1 3793 7 discriminator 1 view .LVU134 426 0030 0029 cmp r1, #0 - ARM GAS /tmp/ccQxTlMj.s page 96 + ARM GAS /tmp/ccsprDvq.s page 96 427 0032 F6D1 bne .L12 @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3804:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /** 3805:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @brief TX interrupt handler for 9 bits data word length. 3806:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @note Function is called under interruption only, once - ARM GAS /tmp/ccQxTlMj.s page 97 + ARM GAS /tmp/ccsprDvq.s page 97 3807:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * interruptions have been enabled by HAL_UART_Transmit_IT(). @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3821:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 493 .loc 1 3821 7 is_stmt 1 discriminator 1 view .LVU157 494 .LBB444: - ARM GAS /tmp/ccQxTlMj.s page 98 + ARM GAS /tmp/ccsprDvq.s page 98 3821:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 536 .LBE448: 537 .LBE447: 3821:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 99 + ARM GAS /tmp/ccsprDvq.s page 99 538 .loc 1 3821 7 discriminator 1 view .LVU173 @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 578 .loc 2 1121 4 view .LVU188 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccQxTlMj.s page 100 + ARM GAS /tmp/ccsprDvq.s page 100 579 .loc 2 1123 4 view .LVU189 @@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 620 .loc 1 3831 7 is_stmt 1 view .LVU204 3831:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 621 .loc 1 3831 12 is_stmt 0 view .LVU205 - ARM GAS /tmp/ccQxTlMj.s page 101 + ARM GAS /tmp/ccsprDvq.s page 101 622 0048 B0F85230 ldrh r3, [r0, #82] @@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 673 .LFE147: 675 .section .text.HAL_UART_DeInit,"ax",%progbits 676 .align 1 - ARM GAS /tmp/ccQxTlMj.s page 102 + ARM GAS /tmp/ccsprDvq.s page 102 677 .global HAL_UART_DeInit @@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 719 001a 0368 ldr r3, [r0] 630:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->Instance->CR3 = 0x0U; 720 .loc 1 630 24 view .LVU227 - ARM GAS /tmp/ccQxTlMj.s page 103 + ARM GAS /tmp/ccsprDvq.s page 103 721 001c 5C60 str r4, [r3, #4] @@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 755 .L24: 756 .LCFI1: 757 .cfi_def_cfa_offset 0 - ARM GAS /tmp/ccQxTlMj.s page 104 + ARM GAS /tmp/ccsprDvq.s page 104 758 .cfi_restore 3 @@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 802 0010 A0F85020 strh r2, [r0, #80] @ movhi 1271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->TxISR = NULL; 803 .loc 1 1271 5 is_stmt 1 view .LVU260 - ARM GAS /tmp/ccQxTlMj.s page 105 + ARM GAS /tmp/ccsprDvq.s page 105 1271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->TxISR = NULL; @@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 841 .loc 2 1070 5 view .LVU278 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccQxTlMj.s page 106 + ARM GAS /tmp/ccsprDvq.s page 106 842 .loc 2 1072 4 view .LVU279 @@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 886 .L36: 1290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 887 .loc 1 1290 12 view .LVU292 - ARM GAS /tmp/ccQxTlMj.s page 107 + ARM GAS /tmp/ccsprDvq.s page 107 888 .LBE459: @@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 934 .loc 1 1347 1 is_stmt 0 view .LVU302 935 0000 1346 mov r3, r2 1349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 108 + ARM GAS /tmp/ccsprDvq.s page 108 936 .loc 1 1349 3 is_stmt 1 view .LVU303 @@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 974 .loc 1 1363 14 is_stmt 0 view .LVU320 975 0028 026F ldr r2, [r0, #112] - ARM GAS /tmp/ccQxTlMj.s page 109 + ARM GAS /tmp/ccsprDvq.s page 109 1363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { @@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1013 .LVL70: 1378:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 1014 .loc 1 1378 10 discriminator 1 view .LVU338 - ARM GAS /tmp/ccQxTlMj.s page 110 + ARM GAS /tmp/ccsprDvq.s page 110 1015 004e 30B1 cbz r0, .L41 @@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1054 .LVL73: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1055 .loc 2 1073 4 is_stmt 1 view .LVU354 - ARM GAS /tmp/ccQxTlMj.s page 111 + ARM GAS /tmp/ccsprDvq.s page 111 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1100 .cfi_restore 14 1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 1101 .loc 1 1400 12 view .LVU367 - ARM GAS /tmp/ccQxTlMj.s page 112 + ARM GAS /tmp/ccsprDvq.s page 112 1102 0080 0220 movs r0, #2 @@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1150 .loc 1 1452 3 is_stmt 1 view .LVU375 1452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 1151 .loc 1 1452 31 is_stmt 0 view .LVU376 - ARM GAS /tmp/ccQxTlMj.s page 113 + ARM GAS /tmp/ccsprDvq.s page 113 1152 0004 D0F88040 ldr r4, [r0, #128] @@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1192 .LVL88: 1193 .L53: 1194 .LCFI7: - ARM GAS /tmp/ccQxTlMj.s page 114 + ARM GAS /tmp/ccsprDvq.s page 114 1195 .cfi_restore_state @@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1234 .LVL93: 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1235 .loc 2 1123 4 is_stmt 0 view .LVU406 - ARM GAS /tmp/ccQxTlMj.s page 115 + ARM GAS /tmp/ccsprDvq.s page 115 1236 .syntax unified @@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 1279 .loc 1 1464 5 discriminator 1 view .LVU420 1280 004c 23F48073 bic r3, r3, #256 - ARM GAS /tmp/ccQxTlMj.s page 116 + ARM GAS /tmp/ccsprDvq.s page 116 1281 .LVL98: @@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1321 005a 02F10803 add r3, r2, #8 1322 .LVL102: 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccQxTlMj.s page 117 + ARM GAS /tmp/ccsprDvq.s page 117 1323 .loc 2 1072 4 is_stmt 0 view .LVU437 @@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1366 .loc 1 1465 5 is_stmt 1 discriminator 2 view .LVU450 1468:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 1367 .loc 1 1468 5 discriminator 1 view .LVU451 - ARM GAS /tmp/ccQxTlMj.s page 118 + ARM GAS /tmp/ccsprDvq.s page 118 1368 .LBB480: @@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1407 .syntax unified 1408 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1409 0080 42E80031 strex r1, r3, [r2] - ARM GAS /tmp/ccQxTlMj.s page 119 + ARM GAS /tmp/ccsprDvq.s page 119 1410 @ 0 "" 2 @@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1456 .loc 1 1499 5 is_stmt 1 discriminator 2 view .LVU478 1502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 1457 .loc 1 1502 3 view .LVU479 - ARM GAS /tmp/ccQxTlMj.s page 120 + ARM GAS /tmp/ccsprDvq.s page 120 1503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1498 .loc 2 1119 31 view .LVU494 1499 .LBB489: - ARM GAS /tmp/ccQxTlMj.s page 121 + ARM GAS /tmp/ccsprDvq.s page 121 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1541 .LBB491: 1542 .LBI491: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccQxTlMj.s page 122 + ARM GAS /tmp/ccsprDvq.s page 122 1543 .loc 2 1068 31 view .LVU510 @@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 1586 .loc 1 1494 7 is_stmt 1 discriminator 2 view .LVU524 1496:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 123 + ARM GAS /tmp/ccsprDvq.s page 123 1587 .loc 1 1496 5 discriminator 1 view .LVU525 @@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1626 .loc 2 1123 4 is_stmt 0 view .LVU540 1627 .syntax unified 1628 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - ARM GAS /tmp/ccQxTlMj.s page 124 + ARM GAS /tmp/ccsprDvq.s page 124 1629 0058 42E80031 strex r1, r3, [r2] @@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1670 .syntax unified 1671 .LBE502: 1672 .LBE501: - ARM GAS /tmp/ccQxTlMj.s page 125 + ARM GAS /tmp/ccsprDvq.s page 125 1499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1720 0000 38B5 push {r3, r4, r5, lr} 1721 .LCFI8: 1722 .cfi_def_cfa_offset 16 - ARM GAS /tmp/ccQxTlMj.s page 126 + ARM GAS /tmp/ccsprDvq.s page 126 1723 .cfi_offset 3, -16 @@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1763 .loc 1 1526 5 is_stmt 1 discriminator 1 view .LVU580 1764 .LBB505: 1526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 127 + ARM GAS /tmp/ccsprDvq.s page 127 1765 .loc 1 1526 5 discriminator 1 view .LVU581 @@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1805 003a 42E80031 strex r1, r3, [r2] 1806 @ 0 "" 2 1807 .LVL152: - ARM GAS /tmp/ccQxTlMj.s page 128 + ARM GAS /tmp/ccsprDvq.s page 128 1808 .loc 2 1124 4 is_stmt 1 view .LVU596 @@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1848 005e 1023 movs r3, #16 1849 0060 C4F88430 str r3, [r4, #132] 1538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } - ARM GAS /tmp/ccQxTlMj.s page 129 + ARM GAS /tmp/ccsprDvq.s page 129 1850 .loc 1 1538 11 is_stmt 1 view .LVU612 @@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1890 .LBB514: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 1891 .loc 2 1121 4 view .LVU627 - ARM GAS /tmp/ccQxTlMj.s page 130 + ARM GAS /tmp/ccsprDvq.s page 130 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 1933 .loc 1 1557 13 is_stmt 0 view .LVU643 1934 0094 606F ldr r0, [r4, #116] - ARM GAS /tmp/ccQxTlMj.s page 131 + ARM GAS /tmp/ccsprDvq.s page 131 1935 0096 FFF7FEFF bl HAL_DMA_GetError @@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 1981 .loc 1 1588 3 is_stmt 1 discriminator 1 view .LVU654 1982 .LBB515: - ARM GAS /tmp/ccQxTlMj.s page 132 + ARM GAS /tmp/ccsprDvq.s page 132 1588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); @@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2024 .LBE519: 2025 .LBE518: 1588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - ARM GAS /tmp/ccQxTlMj.s page 133 + ARM GAS /tmp/ccsprDvq.s page 133 2026 .loc 1 1588 3 discriminator 1 view .LVU670 @@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2066 .LBI523: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2067 .loc 2 1119 31 view .LVU685 - ARM GAS /tmp/ccQxTlMj.s page 134 + ARM GAS /tmp/ccsprDvq.s page 134 2068 .LBB524: @@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 2109 .loc 1 1601 5 discriminator 1 view .LVU701 1601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 135 + ARM GAS /tmp/ccsprDvq.s page 135 2110 .loc 1 1601 5 discriminator 1 view .LVU702 @@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2151 .LVL186: 2152 .loc 2 1124 4 is_stmt 1 view .LVU716 2153 .loc 2 1124 4 is_stmt 0 view .LVU717 - ARM GAS /tmp/ccQxTlMj.s page 136 + ARM GAS /tmp/ccsprDvq.s page 136 2154 .thumb @@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2193 .loc 1 1627 5 is_stmt 1 discriminator 1 view .LVU732 2194 .LBB530: 1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 137 + ARM GAS /tmp/ccsprDvq.s page 137 2195 .loc 1 1627 5 discriminator 1 view .LVU733 @@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2235 0082 42E80031 strex r1, r3, [r2] 2236 @ 0 "" 2 2237 .LVL196: - ARM GAS /tmp/ccQxTlMj.s page 138 + ARM GAS /tmp/ccsprDvq.s page 138 2238 .loc 2 1124 4 is_stmt 1 view .LVU748 @@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2277 00a6 0F22 movs r2, #15 2278 00a8 1A62 str r2, [r3, #32] 1658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 139 + ARM GAS /tmp/ccsprDvq.s page 139 2279 .loc 1 1658 3 view .LVU765 @@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2316 .syntax unified 2317 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2318 00c6 52E8003F ldrex r3, [r2] - ARM GAS /tmp/ccQxTlMj.s page 140 + ARM GAS /tmp/ccsprDvq.s page 140 2319 @ 0 "" 2 @@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2361 .loc 1 1612 12 discriminator 1 view .LVU796 2362 00de 2028 cmp r0, #32 2363 00e0 C2D1 bne .L85 - ARM GAS /tmp/ccQxTlMj.s page 141 + ARM GAS /tmp/ccsprDvq.s page 141 1615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2407 .loc 1 1683 1 is_stmt 0 view .LVU809 2408 0000 10B5 push {r4, lr} 2409 .LCFI10: - ARM GAS /tmp/ccQxTlMj.s page 142 + ARM GAS /tmp/ccsprDvq.s page 142 2410 .cfi_def_cfa_offset 8 @@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2450 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2451 000e 42E80031 strex r1, r3, [r2] 2452 @ 0 "" 2 - ARM GAS /tmp/ccQxTlMj.s page 143 + ARM GAS /tmp/ccsprDvq.s page 143 2453 .LVL213: @@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2493 0026 53E8003F ldrex r3, [r3] 2494 @ 0 "" 2 2495 .LVL217: - ARM GAS /tmp/ccQxTlMj.s page 144 + ARM GAS /tmp/ccsprDvq.s page 144 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 2537 .loc 1 1698 7 is_stmt 1 view .LVU855 1698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 145 + ARM GAS /tmp/ccsprDvq.s page 145 2538 .loc 1 1698 40 is_stmt 0 view .LVU856 @@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2577 0060 C4F88430 str r3, [r4, #132] 1707:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 2578 .loc 1 1707 11 is_stmt 1 view .LVU872 - ARM GAS /tmp/ccQxTlMj.s page 146 + ARM GAS /tmp/ccsprDvq.s page 146 1707:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2625 .loc 2 1073 4 view .LVU883 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccQxTlMj.s page 147 + ARM GAS /tmp/ccsprDvq.s page 147 2626 .loc 2 1073 4 is_stmt 0 view .LVU884 @@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2668 .LBI556: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2669 .loc 2 1068 31 view .LVU899 - ARM GAS /tmp/ccQxTlMj.s page 148 + ARM GAS /tmp/ccsprDvq.s page 148 2670 .LBB557: @@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2712 002a 0029 cmp r1, #0 2713 002c F3D1 bne .L102 2714 .LBE555: - ARM GAS /tmp/ccQxTlMj.s page 149 + ARM GAS /tmp/ccsprDvq.s page 149 1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2753 .LVL242: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2754 .loc 2 1073 4 is_stmt 1 view .LVU930 - ARM GAS /tmp/ccQxTlMj.s page 150 + ARM GAS /tmp/ccsprDvq.s page 150 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 2796 .loc 1 1758 40 is_stmt 0 view .LVU946 2797 005a 0022 movs r2, #0 - ARM GAS /tmp/ccQxTlMj.s page 151 + ARM GAS /tmp/ccsprDvq.s page 151 2798 005c 1A65 str r2, [r3, #80] @@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2837 .LBB565: 1744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 2838 .loc 1 1744 5 discriminator 1 view .LVU962 - ARM GAS /tmp/ccQxTlMj.s page 152 + ARM GAS /tmp/ccsprDvq.s page 152 1744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 2881 .loc 1 1744 5 discriminator 1 view .LVU977 2882 0094 0029 cmp r1, #0 - ARM GAS /tmp/ccQxTlMj.s page 153 + ARM GAS /tmp/ccsprDvq.s page 153 2883 0096 F6D1 bne .L104 @@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2929 .section .text.UART_DMATransmitCplt,"ax",%progbits 2930 .align 1 2931 .syntax unified - ARM GAS /tmp/ccQxTlMj.s page 154 + ARM GAS /tmp/ccsprDvq.s page 154 2932 .thumb @@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2973 .loc 2 1068 31 view .LVU1002 2974 .LBB572: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccQxTlMj.s page 155 + ARM GAS /tmp/ccsprDvq.s page 155 2975 .loc 2 1070 5 view .LVU1003 @@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3018 .LVL267: 3019 .L114: 3416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 156 + ARM GAS /tmp/ccsprDvq.s page 156 3020 .loc 1 3416 5 discriminator 1 view .LVU1017 @@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3059 0034 42E80030 strex r0, r3, [r2] 3060 @ 0 "" 2 3061 .LVL271: - ARM GAS /tmp/ccQxTlMj.s page 157 + ARM GAS /tmp/ccsprDvq.s page 157 3062 .loc 2 1124 4 view .LVU1033 @@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3102 .LVL276: 3103 .loc 1 3844 1 is_stmt 0 view .LVU1042 3104 0000 08B5 push {r3, lr} - ARM GAS /tmp/ccQxTlMj.s page 158 + ARM GAS /tmp/ccsprDvq.s page 158 3105 .LCFI13: @@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3149 .loc 2 1124 4 view .LVU1057 3150 .loc 2 1124 4 is_stmt 0 view .LVU1058 3151 .thumb - ARM GAS /tmp/ccQxTlMj.s page 159 + ARM GAS /tmp/ccsprDvq.s page 159 3152 .syntax unified @@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3192 @ link register save eliminated. 2452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 3193 .loc 1 2452 3 view .LVU1069 - ARM GAS /tmp/ccQxTlMj.s page 160 + ARM GAS /tmp/ccsprDvq.s page 160 2457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3244 @ frame_needed = 0, uses_anonymous_args = 0 3245 @ link register save eliminated. 2467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 161 + ARM GAS /tmp/ccsprDvq.s page 161 3246 .loc 1 2467 3 view .LVU1078 @@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3298 .thumb_func 3300 UART_DMAError: 3301 .LVL291: - ARM GAS /tmp/ccQxTlMj.s page 162 + ARM GAS /tmp/ccsprDvq.s page 162 3302 .LFB197: @@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3342 001a 9B68 ldr r3, [r3, #8] 3572:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX)) 3343 .loc 1 3572 6 view .LVU1100 - ARM GAS /tmp/ccQxTlMj.s page 163 + ARM GAS /tmp/ccsprDvq.s page 163 3344 001c 13F0400F tst r3, #64 @@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3384 .LVL300: 3385 0054 E7E7 b .L128 3386 .cfi_endproc - ARM GAS /tmp/ccQxTlMj.s page 164 + ARM GAS /tmp/ccsprDvq.s page 164 3387 .LFE197: @@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3435 .LVL304: 3436 .LFB169: 2510:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */ - ARM GAS /tmp/ccQxTlMj.s page 165 + ARM GAS /tmp/ccsprDvq.s page 165 3437 .loc 1 2510 1 is_stmt 1 view -0 @@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3483 .loc 2 1068 31 view .LVU1135 3484 .LBB587: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccQxTlMj.s page 166 + ARM GAS /tmp/ccsprDvq.s page 166 3485 .loc 2 1070 5 view .LVU1136 @@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3527 .loc 1 1809 3 discriminator 1 view .LVU1150 3528 .LBB590: 1809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 167 + ARM GAS /tmp/ccsprDvq.s page 167 3529 .loc 1 1809 3 discriminator 1 view .LVU1151 @@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3569 0026 42E80031 strex r1, r3, [r2] 3570 @ 0 "" 2 3571 .LVL317: - ARM GAS /tmp/ccQxTlMj.s page 168 + ARM GAS /tmp/ccsprDvq.s page 168 3572 .loc 2 1124 4 is_stmt 1 view .LVU1166 @@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3610 .loc 1 1834 12 is_stmt 0 view .LVU1183 3611 0046 636F ldr r3, [r4, #116] 1834:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 169 + ARM GAS /tmp/ccsprDvq.s page 169 3612 .loc 1 1834 6 view .LVU1184 @@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3650 .syntax unified 3651 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 3652 0068 53E8003F ldrex r3, [r3] - ARM GAS /tmp/ccQxTlMj.s page 170 + ARM GAS /tmp/ccsprDvq.s page 170 3653 @ 0 "" 2 @@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 3695 .loc 1 1855 8 view .LVU1215 3696 007e 0028 cmp r0, #0 - ARM GAS /tmp/ccQxTlMj.s page 171 + ARM GAS /tmp/ccsprDvq.s page 171 3697 0080 4BD0 beq .L151 @@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3735 .thumb 3736 .syntax unified 3737 .LBE602: - ARM GAS /tmp/ccQxTlMj.s page 172 + ARM GAS /tmp/ccsprDvq.s page 172 3738 .LBE601: @@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3780 .loc 1 1805 12 view .LVU1245 3781 00b2 0125 movs r5, #1 3782 .LVL333: - ARM GAS /tmp/ccQxTlMj.s page 173 + ARM GAS /tmp/ccsprDvq.s page 173 3783 .L144: @@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3822 .loc 1 1876 5 is_stmt 1 discriminator 1 view .LVU1260 3823 .LBB608: 3824 .LBI608: - ARM GAS /tmp/ccQxTlMj.s page 174 + ARM GAS /tmp/ccsprDvq.s page 174 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3864 00e4 1A65 str r2, [r3, #80] 1888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 3865 .loc 1 1888 9 is_stmt 1 view .LVU1278 - ARM GAS /tmp/ccQxTlMj.s page 175 + ARM GAS /tmp/ccsprDvq.s page 175 3866 .LVL341: @@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1921:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 3902 .loc 1 1921 26 is_stmt 0 view .LVU1297 3903 0110 2366 str r3, [r4, #96] - ARM GAS /tmp/ccQxTlMj.s page 176 + ARM GAS /tmp/ccsprDvq.s page 176 1929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ @@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3951 .LCFI18: 3952 .cfi_def_cfa_offset 8 3953 .cfi_offset 3, -8 - ARM GAS /tmp/ccQxTlMj.s page 177 + ARM GAS /tmp/ccsprDvq.s page 177 3954 .cfi_offset 14, -4 @@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3695:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 3990 .loc 1 3695 3 view .LVU1325 3991 0026 0168 ldr r1, [r0] - ARM GAS /tmp/ccQxTlMj.s page 178 + ARM GAS /tmp/ccsprDvq.s page 178 3992 0028 8A69 ldr r2, [r1, #24] @@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4036 .LVL351: 3623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 4037 .loc 1 3623 3 is_stmt 1 view .LVU1338 - ARM GAS /tmp/ccQxTlMj.s page 179 + ARM GAS /tmp/ccsprDvq.s page 179 3623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4073 .loc 1 3647 18 is_stmt 0 view .LVU1357 4074 002a C0F88020 str r2, [r0, #128] 3648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 180 + ARM GAS /tmp/ccsprDvq.s page 180 4075 .loc 1 3648 3 is_stmt 1 view .LVU1358 @@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4125 .cfi_def_cfa_offset 8 4126 .cfi_offset 4, -8 4127 .cfi_offset 14, -4 - ARM GAS /tmp/ccQxTlMj.s page 181 + ARM GAS /tmp/ccsprDvq.s page 181 4128 0002 0446 mov r4, r0 @@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4168 .LVL358: 4169 .loc 2 1124 4 view .LVU1381 4170 .loc 2 1124 4 is_stmt 0 view .LVU1382 - ARM GAS /tmp/ccQxTlMj.s page 182 + ARM GAS /tmp/ccsprDvq.s page 182 4171 .thumb @@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } 4211 .loc 2 1073 4 is_stmt 1 view .LVU1397 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccQxTlMj.s page 183 + ARM GAS /tmp/ccsprDvq.s page 183 4212 .loc 2 1073 4 is_stmt 0 view .LVU1398 @@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4253 .loc 1 1966 40 is_stmt 0 view .LVU1413 4254 003c 0F4A ldr r2, .L171 4255 003e 1A65 str r2, [r3, #80] - ARM GAS /tmp/ccQxTlMj.s page 184 + ARM GAS /tmp/ccsprDvq.s page 184 1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { @@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4294 .LVL373: 4295 .L166: 1999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 185 + ARM GAS /tmp/ccsprDvq.s page 185 4296 .loc 1 1999 5 is_stmt 1 view .LVU1430 @@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4340 .loc 1 3722 1 is_stmt 0 view .LVU1442 4341 0000 08B5 push {r3, lr} 4342 .LCFI21: - ARM GAS /tmp/ccQxTlMj.s page 186 + ARM GAS /tmp/ccsprDvq.s page 186 4343 .cfi_def_cfa_offset 8 @@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4389 .global HAL_UART_AbortReceive_IT 4390 .syntax unified 4391 .thumb - ARM GAS /tmp/ccQxTlMj.s page 187 + ARM GAS /tmp/ccsprDvq.s page 187 4392 .thumb_func @@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4435 .LVL384: 2038:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 4436 .loc 1 2038 3 is_stmt 1 discriminator 1 view .LVU1466 - ARM GAS /tmp/ccQxTlMj.s page 188 + ARM GAS /tmp/ccsprDvq.s page 188 4437 .LBB623: @@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4477 .loc 2 1072 4 is_stmt 0 view .LVU1482 4478 .syntax unified 4479 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - ARM GAS /tmp/ccQxTlMj.s page 189 + ARM GAS /tmp/ccsprDvq.s page 189 4480 001c 53E8003F ldrex r3, [r3] @@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2042:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 4522 .loc 1 2042 6 view .LVU1497 4523 0030 012B cmp r3, #1 - ARM GAS /tmp/ccQxTlMj.s page 190 + ARM GAS /tmp/ccsprDvq.s page 190 4524 0032 1CD0 beq .L180 @@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4563 0048 23F04003 bic r3, r3, #64 4564 .LVL397: 2051:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 191 + ARM GAS /tmp/ccsprDvq.s page 191 4565 .loc 1 2051 5 is_stmt 1 discriminator 1 view .LVU1513 @@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4605 .loc 1 2061 11 view .LVU1529 4606 0060 FFF7FEFF bl HAL_DMA_Abort_IT 4607 .LVL402: - ARM GAS /tmp/ccQxTlMj.s page 192 + ARM GAS /tmp/ccsprDvq.s page 192 2061:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { @@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4647 .LVL407: 2044:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 4648 .loc 1 2044 5 is_stmt 1 discriminator 1 view .LVU1545 - ARM GAS /tmp/ccQxTlMj.s page 193 + ARM GAS /tmp/ccsprDvq.s page 193 4649 .LBB638: @@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 4691 .loc 1 2082 22 is_stmt 0 view .LVU1560 4692 009a 2022 movs r2, #32 - ARM GAS /tmp/ccQxTlMj.s page 194 + ARM GAS /tmp/ccsprDvq.s page 194 4693 009c C4F88020 str r2, [r4, #128] @@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 4731 .loc 1 2121 1 is_stmt 0 view .LVU1577 4732 00c4 0020 movs r0, #0 - ARM GAS /tmp/ccQxTlMj.s page 195 + ARM GAS /tmp/ccsprDvq.s page 195 4733 00c6 10BD pop {r4, pc} @@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4779 .loc 1 3762 3 view .LVU1587 3762:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 4780 .loc 1 3762 18 is_stmt 0 view .LVU1588 - ARM GAS /tmp/ccQxTlMj.s page 196 + ARM GAS /tmp/ccsprDvq.s page 196 4781 001a 2023 movs r3, #32 @@ -11758,7 +11758,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3868:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) 3869:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 4825 .loc 1 3869 1 is_stmt 1 view -0 - ARM GAS /tmp/ccQxTlMj.s page 197 + ARM GAS /tmp/ccsprDvq.s page 197 4826 .cfi_startproc @@ -11818,7 +11818,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3904:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 3905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check current reception Mode : 3906:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** If Reception till IDLE event has been selected : */ - ARM GAS /tmp/ccQxTlMj.s page 198 + ARM GAS /tmp/ccsprDvq.s page 198 3907:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) @@ -11878,7 +11878,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); 4859 .loc 1 3876 5 is_stmt 1 view .LVU1608 3876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask); - ARM GAS /tmp/ccQxTlMj.s page 199 + ARM GAS /tmp/ccsprDvq.s page 199 4860 .loc 1 3876 25 is_stmt 0 view .LVU1609 @@ -11938,7 +11938,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4899 .LBB640: 3884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 4900 .loc 1 3884 7 discriminator 1 view .LVU1625 - ARM GAS /tmp/ccQxTlMj.s page 200 + ARM GAS /tmp/ccsprDvq.s page 200 3884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -11998,7 +11998,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 4943 .loc 1 3884 7 discriminator 1 view .LVU1640 4944 0052 0029 cmp r1, #0 - ARM GAS /tmp/ccQxTlMj.s page 201 + ARM GAS /tmp/ccsprDvq.s page 201 4945 0054 F6D1 bne .L194 @@ -12058,7 +12058,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4984 .loc 2 1119 31 view .LVU1655 4985 .LBB649: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccQxTlMj.s page 202 + ARM GAS /tmp/ccsprDvq.s page 202 4986 .loc 2 1121 4 view .LVU1656 @@ -12118,7 +12118,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5026 0082 08D0 beq .L196 5027 .L197: 3902:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } - ARM GAS /tmp/ccQxTlMj.s page 203 + ARM GAS /tmp/ccsprDvq.s page 203 5028 .loc 1 3902 9 is_stmt 1 discriminator 1 view .LVU1673 @@ -12178,7 +12178,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5069 .thumb 5070 .syntax unified 5071 .LBE654: - ARM GAS /tmp/ccQxTlMj.s page 204 + ARM GAS /tmp/ccsprDvq.s page 204 5072 .LBE653: @@ -12238,7 +12238,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5110 .loc 2 1073 4 view .LVU1704 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } 5111 .loc 2 1073 4 is_stmt 0 view .LVU1705 - ARM GAS /tmp/ccQxTlMj.s page 205 + ARM GAS /tmp/ccsprDvq.s page 205 5112 .thumb @@ -12298,7 +12298,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5154 .L200: 3926:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ 5155 .loc 1 3926 9 view .LVU1720 - ARM GAS /tmp/ccQxTlMj.s page 206 + ARM GAS /tmp/ccsprDvq.s page 206 5156 00c0 B0F85810 ldrh r1, [r0, #88] @@ -12358,7 +12358,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3961:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 3962:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check that a Rx process is ongoing */ 3963:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->RxState == HAL_UART_STATE_BUSY_RX) - ARM GAS /tmp/ccQxTlMj.s page 207 + ARM GAS /tmp/ccsprDvq.s page 207 5196 .loc 1 3963 3 view .LVU1730 @@ -12418,7 +12418,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 4012:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call registered Rx Event callback*/ 4013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxEventCallback(huart, huart->RxXferSize); 4014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #else - ARM GAS /tmp/ccQxTlMj.s page 208 + ARM GAS /tmp/ccsprDvq.s page 208 4015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call legacy weak Rx Event callback*/ @@ -12478,7 +12478,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5227 .LVL461: 3967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->pRxBuffPtr += 2U; 5228 .loc 1 3967 10 view .LVU1742 - ARM GAS /tmp/ccQxTlMj.s page 209 + ARM GAS /tmp/ccsprDvq.s page 209 5229 0022 0B80 strh r3, [r1] @ movhi @@ -12538,7 +12538,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5267 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 5268 0044 52E8003F ldrex r3, [r2] 5269 @ 0 "" 2 - ARM GAS /tmp/ccQxTlMj.s page 210 + ARM GAS /tmp/ccsprDvq.s page 210 5270 .LVL464: @@ -12598,7 +12598,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5310 .loc 1 3977 7 discriminator 1 view .LVU1774 5311 0054 0268 ldr r2, [r0] 5312 .LVL468: - ARM GAS /tmp/ccQxTlMj.s page 211 + ARM GAS /tmp/ccsprDvq.s page 211 5313 .LBB666: @@ -12658,7 +12658,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5355 .LBE669: 5356 .LBE668: 3977:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 212 + ARM GAS /tmp/ccsprDvq.s page 212 5357 .loc 1 3977 7 discriminator 1 view .LVU1789 @@ -12718,7 +12718,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5394 .loc 2 1070 5 view .LVU1806 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5395 .loc 2 1072 4 view .LVU1807 - ARM GAS /tmp/ccQxTlMj.s page 213 + ARM GAS /tmp/ccsprDvq.s page 213 5396 .syntax unified @@ -12778,7 +12778,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5438 0094 036E ldr r3, [r0, #96] 3997:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 5439 .loc 1 3997 10 view .LVU1822 - ARM GAS /tmp/ccQxTlMj.s page 214 + ARM GAS /tmp/ccsprDvq.s page 214 5440 0096 012B cmp r3, #1 @@ -12838,7 +12838,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5479 .loc 2 1121 4 view .LVU1837 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 5480 .loc 2 1123 4 view .LVU1838 - ARM GAS /tmp/ccQxTlMj.s page 215 + ARM GAS /tmp/ccsprDvq.s page 215 5481 .syntax unified @@ -12898,7 +12898,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5524 .LFE207: 5526 .section .text.UART_DMARxHalfCplt,"ax",%progbits 5527 .align 1 - ARM GAS /tmp/ccQxTlMj.s page 216 + ARM GAS /tmp/ccsprDvq.s page 216 5528 .syntax unified @@ -12958,7 +12958,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 5570 .loc 1 3535 5 view .LVU1865 5571 0018 4908 lsrs r1, r1, #1 - ARM GAS /tmp/ccQxTlMj.s page 217 + ARM GAS /tmp/ccsprDvq.s page 217 5572 001a FFF7FEFF bl HAL_UARTEx_RxEventCallback @@ -13018,7 +13018,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 5617 .loc 1 3467 5 discriminator 1 view .LVU1877 3467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - ARM GAS /tmp/ccQxTlMj.s page 218 + ARM GAS /tmp/ccsprDvq.s page 218 5618 .loc 1 3467 5 discriminator 1 view .LVU1878 @@ -13078,7 +13078,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5660 .loc 1 3467 5 discriminator 1 view .LVU1892 5661 0022 0029 cmp r1, #0 5662 0024 F6D1 bne .L222 - ARM GAS /tmp/ccQxTlMj.s page 219 + ARM GAS /tmp/ccsprDvq.s page 219 5663 .LVL500: @@ -13138,7 +13138,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5702 .LBB689: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 5703 .loc 2 1121 4 view .LVU1908 - ARM GAS /tmp/ccQxTlMj.s page 220 + ARM GAS /tmp/ccsprDvq.s page 220 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -13198,7 +13198,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5745 0044 53E8003F ldrex r3, [r3] 5746 @ 0 "" 2 5747 .LVL510: - ARM GAS /tmp/ccQxTlMj.s page 221 + ARM GAS /tmp/ccsprDvq.s page 221 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -13258,7 +13258,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 5789 .loc 1 3478 5 is_stmt 1 view .LVU1939 3478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 222 + ARM GAS /tmp/ccsprDvq.s page 222 5790 .loc 1 3478 14 is_stmt 0 view .LVU1940 @@ -13318,7 +13318,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5828 .loc 2 1072 4 view .LVU1956 5829 .syntax unified 5830 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - ARM GAS /tmp/ccQxTlMj.s page 223 + ARM GAS /tmp/ccsprDvq.s page 223 5831 0074 52E8003F ldrex r3, [r2] @@ -13378,7 +13378,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5874 008e EFE7 b .L220 5875 .cfi_endproc 5876 .LFE195: - ARM GAS /tmp/ccQxTlMj.s page 224 + ARM GAS /tmp/ccsprDvq.s page 224 5878 .section .text.HAL_UARTEx_WakeupCallback,"ax",%progbits @@ -13438,7 +13438,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5927 .LVL526: 2131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** uint32_t cr3its = READ_REG(huart->Instance->CR3); 5928 .loc 1 2131 3 is_stmt 1 view .LVU1978 - ARM GAS /tmp/ccQxTlMj.s page 225 + ARM GAS /tmp/ccsprDvq.s page 225 2131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** uint32_t cr3its = READ_REG(huart->Instance->CR3); @@ -13498,7 +13498,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 5966 .L232: 2155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))) 5967 .loc 1 2155 7 is_stmt 0 view .LVU1996 - ARM GAS /tmp/ccQxTlMj.s page 226 + ARM GAS /tmp/ccsprDvq.s page 226 5968 002c 10F00105 ands r5, r0, #1 @@ -13558,7 +13558,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6008 006a 70BD pop {r4, r5, r6, pc} 6009 .LVL534: 6010 .L236: - ARM GAS /tmp/ccQxTlMj.s page 227 + ARM GAS /tmp/ccsprDvq.s page 227 2159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { @@ -13618,7 +13618,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6048 .loc 1 2175 8 is_stmt 0 view .LVU2027 6049 00a0 13F0040F tst r3, #4 6050 00a4 09D0 beq .L239 - ARM GAS /tmp/ccQxTlMj.s page 228 + ARM GAS /tmp/ccsprDvq.s page 228 2175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { @@ -13678,7 +13678,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6089 .loc 1 2193 45 discriminator 1 view .LVU2043 6090 00de 11F0806F tst r1, #67108864 6091 00e2 09D0 beq .L242 - ARM GAS /tmp/ccQxTlMj.s page 229 + ARM GAS /tmp/ccsprDvq.s page 229 2195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -13738,7 +13738,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6130 .LVL538: 2219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) 6131 .loc 1 2219 7 is_stmt 1 view .LVU2060 - ARM GAS /tmp/ccQxTlMj.s page 230 + ARM GAS /tmp/ccsprDvq.s page 230 2219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) @@ -13798,7 +13798,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6171 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 6172 013e 53E8003F ldrex r3, [r3] 6173 @ 0 "" 2 - ARM GAS /tmp/ccQxTlMj.s page 231 + ARM GAS /tmp/ccsprDvq.s page 231 6174 .LVL542: @@ -13858,7 +13858,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6215 0152 53B1 cbz r3, .L249 2238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 6216 .loc 1 2238 13 is_stmt 1 view .LVU2091 - ARM GAS /tmp/ccQxTlMj.s page 232 + ARM GAS /tmp/ccsprDvq.s page 232 2238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -13918,7 +13918,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6258 0180 0023 movs r3, #0 6259 0182 C4F88430 str r3, [r4, #132] 2286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 233 + ARM GAS /tmp/ccsprDvq.s page 233 6260 .loc 1 2286 5 is_stmt 1 view .LVU2105 @@ -13978,7 +13978,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6300 01ba 7FF656AF bls .L231 2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 6301 .loc 1 2310 9 is_stmt 1 view .LVU2120 - ARM GAS /tmp/ccQxTlMj.s page 234 + ARM GAS /tmp/ccsprDvq.s page 234 2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -14038,7 +14038,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6341 .LBI709: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { 6342 .loc 2 1119 31 view .LVU2136 - ARM GAS /tmp/ccQxTlMj.s page 235 + ARM GAS /tmp/ccsprDvq.s page 235 6343 .LBB710: @@ -14098,7 +14098,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6384 @ 0 "" 2 6385 .LVL566: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccQxTlMj.s page 236 + ARM GAS /tmp/ccsprDvq.s page 236 6386 .loc 2 1073 4 is_stmt 1 view .LVU2152 @@ -14158,7 +14158,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6427 .loc 1 2321 11 discriminator 1 view .LVU2167 2321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 6428 .loc 1 2321 11 discriminator 1 view .LVU2168 - ARM GAS /tmp/ccQxTlMj.s page 237 + ARM GAS /tmp/ccsprDvq.s page 237 6429 01f4 2268 ldr r2, [r4] @@ -14218,7 +14218,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6471 .thumb 6472 .syntax unified 6473 .LBE720: - ARM GAS /tmp/ccQxTlMj.s page 238 + ARM GAS /tmp/ccsprDvq.s page 238 6474 .LBE719: @@ -14278,7 +14278,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6512 .thumb 6513 .syntax unified 6514 .LBE723: - ARM GAS /tmp/ccQxTlMj.s page 239 + ARM GAS /tmp/ccsprDvq.s page 239 6515 .LBE722: @@ -14338,7 +14338,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6555 .loc 1 2342 49 is_stmt 0 view .LVU2214 6556 0232 B4F85810 ldrh r1, [r4, #88] 2342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ - ARM GAS /tmp/ccQxTlMj.s page 240 + ARM GAS /tmp/ccsprDvq.s page 240 6557 .loc 1 2342 69 view .LVU2215 @@ -14398,7 +14398,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6598 .loc 1 2357 9 discriminator 1 view .LVU2228 2357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 6599 .loc 1 2357 9 discriminator 1 view .LVU2229 - ARM GAS /tmp/ccQxTlMj.s page 241 + ARM GAS /tmp/ccsprDvq.s page 241 2357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -14458,7 +14458,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6642 0276 0028 cmp r0, #0 6643 0278 F6D1 bne .L259 6644 .LVL594: - ARM GAS /tmp/ccQxTlMj.s page 242 + ARM GAS /tmp/ccsprDvq.s page 242 6645 .L260: @@ -14518,7 +14518,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 6684 .loc 2 1121 4 view .LVU2259 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccQxTlMj.s page 243 + ARM GAS /tmp/ccsprDvq.s page 243 6685 .loc 2 1123 4 view .LVU2260 @@ -14578,7 +14578,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6725 .LVL602: 6726 .LBB738: 6727 .LBI738: - ARM GAS /tmp/ccQxTlMj.s page 244 + ARM GAS /tmp/ccsprDvq.s page 244 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -14638,7 +14638,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6769 .loc 1 2373 9 view .LVU2291 2373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 6770 .loc 1 2373 28 is_stmt 0 view .LVU2292 - ARM GAS /tmp/ccQxTlMj.s page 245 + ARM GAS /tmp/ccsprDvq.s page 245 6771 02b0 0223 movs r3, #2 @@ -14698,7 +14698,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6811 02d4 9847 blx r3 6812 .LVL615: 2417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } - ARM GAS /tmp/ccQxTlMj.s page 246 + ARM GAS /tmp/ccsprDvq.s page 246 6813 .loc 1 2417 5 is_stmt 1 view .LVU2307 @@ -14758,7 +14758,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6863 .syntax unified 6864 .thumb 6865 .thumb_func - ARM GAS /tmp/ccQxTlMj.s page 247 + ARM GAS /tmp/ccsprDvq.s page 247 6867 HAL_UART_EnableReceiverTimeout: @@ -14818,7 +14818,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6906 0028 80F87830 strb r3, [r0, #120] 2648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 6907 .loc 1 2648 5 view .LVU2330 - ARM GAS /tmp/ccQxTlMj.s page 248 + ARM GAS /tmp/ccsprDvq.s page 248 2650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -14878,7 +14878,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6952 .loc 1 2669 5 is_stmt 1 view .LVU2342 2669:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 6953 .loc 1 2669 5 view .LVU2343 - ARM GAS /tmp/ccQxTlMj.s page 249 + ARM GAS /tmp/ccsprDvq.s page 249 6954 0006 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2 @@ -14938,7 +14938,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 6993 .L280: 2669:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 6994 .loc 1 2669 5 discriminator 1 view .LVU2359 - ARM GAS /tmp/ccQxTlMj.s page 250 + ARM GAS /tmp/ccsprDvq.s page 250 6995 0034 0220 movs r0, #2 @@ -14998,7 +14998,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7046 0006 1DD0 beq .L286 2747:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY; 7047 .loc 1 2747 3 discriminator 2 view .LVU2367 - ARM GAS /tmp/ccQxTlMj.s page 251 + ARM GAS /tmp/ccsprDvq.s page 251 7048 0008 0123 movs r3, #1 @@ -15058,7 +15058,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7087 .LBB746: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 7088 .loc 2 1121 4 view .LVU2383 - ARM GAS /tmp/ccQxTlMj.s page 252 + ARM GAS /tmp/ccsprDvq.s page 252 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -15118,7 +15118,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7130 .syntax unified 7131 .LBE749: 7132 .LBE748: - ARM GAS /tmp/ccQxTlMj.s page 253 + ARM GAS /tmp/ccsprDvq.s page 253 2754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -15178,7 +15178,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7172 0040 1846 mov r0, r3 7173 .LVL644: 2760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } - ARM GAS /tmp/ccQxTlMj.s page 254 + ARM GAS /tmp/ccsprDvq.s page 254 7174 .loc 1 2760 10 view .LVU2416 @@ -15238,7 +15238,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7218 .loc 1 2774 3 discriminator 1 view .LVU2428 2774:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 7219 .loc 1 2774 3 discriminator 1 view .LVU2429 - ARM GAS /tmp/ccQxTlMj.s page 255 + ARM GAS /tmp/ccsprDvq.s page 255 7220 0012 0268 ldr r2, [r0] @@ -15298,7 +15298,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7263 .LVL652: 7264 .L290: 2774:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 256 + ARM GAS /tmp/ccsprDvq.s page 256 7265 .loc 1 2774 3 discriminator 1 view .LVU2443 @@ -15358,7 +15358,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7304 002e 42E80031 strex r1, r3, [r2] 7305 @ 0 "" 2 7306 .LVL656: - ARM GAS /tmp/ccQxTlMj.s page 257 + ARM GAS /tmp/ccsprDvq.s page 257 7307 .loc 2 1124 4 view .LVU2459 @@ -15418,7 +15418,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7349 .thumb 7350 .thumb_func 7352 HAL_LIN_SendBreak: - ARM GAS /tmp/ccQxTlMj.s page 258 + ARM GAS /tmp/ccsprDvq.s page 258 7353 .LVL661: @@ -15478,7 +15478,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7391 .LVL662: 2808:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 7392 .loc 1 2808 10 view .LVU2490 - ARM GAS /tmp/ccQxTlMj.s page 259 + ARM GAS /tmp/ccsprDvq.s page 259 7393 0028 7047 bx lr @@ -15538,7 +15538,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7438 .section .text.HAL_UART_GetError,"ax",%progbits 7439 .align 1 7440 .global HAL_UART_GetError - ARM GAS /tmp/ccQxTlMj.s page 260 + ARM GAS /tmp/ccsprDvq.s page 260 7441 .syntax unified @@ -15598,7 +15598,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7487 .loc 1 2907 3 view .LVU2513 7488 .LVL672: 2908:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 261 + ARM GAS /tmp/ccsprDvq.s page 261 7489 .loc 1 2908 3 view .LVU2514 @@ -15658,7 +15658,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7524 001e 2268 ldr r2, [r4] 7525 0020 5368 ldr r3, [r2, #4] 7526 .LVL675: - ARM GAS /tmp/ccQxTlMj.s page 262 + ARM GAS /tmp/ccsprDvq.s page 262 2934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -15718,7 +15718,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 7568 .loc 1 2949 3 discriminator 23 view .LVU2547 7569 0058 854A ldr r2, .L384+20 - ARM GAS /tmp/ccQxTlMj.s page 263 + ARM GAS /tmp/ccsprDvq.s page 263 7570 005a 9342 cmp r3, r2 @@ -15778,7 +15778,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7614 009c 00F23881 bhi .L369 7615 00a0 DFE813F0 tbh [pc, r3, lsl #1] 7616 .L332: - ARM GAS /tmp/ccQxTlMj.s page 264 + ARM GAS /tmp/ccsprDvq.s page 264 7617 00a4 1401 .2byte (.L336-.L332)/2 @@ -15838,7 +15838,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7661 00d7 0D .byte (.L306-.L308)/2 7662 00d8 09 .byte (.L309-.L308)/2 7663 00d9 0D .byte (.L306-.L308)/2 - ARM GAS /tmp/ccQxTlMj.s page 265 + ARM GAS /tmp/ccsprDvq.s page 265 7664 00da 0D .byte (.L306-.L308)/2 @@ -15898,7 +15898,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7708 0108 72D1 bne .L342 2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 7709 .loc 1 2949 3 is_stmt 0 discriminator 19 view .LVU2578 - ARM GAS /tmp/ccQxTlMj.s page 266 + ARM GAS /tmp/ccsprDvq.s page 266 7710 010a 0423 movs r3, #4 @@ -15958,7 +15958,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7756 .L316: 2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 7757 .loc 1 2949 3 discriminator 29 view .LVU2587 - ARM GAS /tmp/ccQxTlMj.s page 267 + ARM GAS /tmp/ccsprDvq.s page 267 7758 015a B3F5407F cmp r3, #768 @@ -16018,7 +16018,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 7804 .loc 1 2949 3 discriminator 49 view .LVU2596 7805 01b4 0823 movs r3, #8 - ARM GAS /tmp/ccQxTlMj.s page 268 + ARM GAS /tmp/ccsprDvq.s page 268 7806 01b6 6BE7 b .L302 @@ -16078,7 +16078,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7851 .L344: 2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 7852 .loc 1 2949 3 discriminator 27 view .LVU2606 - ARM GAS /tmp/ccQxTlMj.s page 269 + ARM GAS /tmp/ccsprDvq.s page 269 7853 01f8 0223 movs r3, #2 @@ -16138,7 +16138,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7898 0228 0223 movs r3, #2 7899 022a 31E7 b .L302 7900 .L357: - ARM GAS /tmp/ccQxTlMj.s page 270 + ARM GAS /tmp/ccsprDvq.s page 270 2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -16198,7 +16198,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 7949 0268 00480040 .word 1073760256 7950 026c 004C0040 .word 1073761280 7951 0270 00500040 .word 1073762304 - ARM GAS /tmp/ccQxTlMj.s page 271 + ARM GAS /tmp/ccsprDvq.s page 271 7952 0274 00140140 .word 1073812480 @@ -16258,7 +16258,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2983:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->Instance->BRR = brrtemp; 7991 .loc 1 2983 20 is_stmt 0 view .LVU2637 7992 02aa C3F34203 ubfx r3, r3, #1, #3 - ARM GAS /tmp/ccQxTlMj.s page 272 + ARM GAS /tmp/ccsprDvq.s page 272 7993 .LVL693: @@ -16318,7 +16318,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8033 .LVL700: 2998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** case UART_CLOCKSOURCE_PCLK2: 8034 .loc 1 2998 9 is_stmt 1 view .LVU2652 - ARM GAS /tmp/ccQxTlMj.s page 273 + ARM GAS /tmp/ccsprDvq.s page 273 8035 .L337: @@ -16378,7 +16378,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8074 .loc 1 3006 9 view .LVU2667 3006:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** break; 8075 .loc 1 3006 16 is_stmt 0 view .LVU2668 - ARM GAS /tmp/ccQxTlMj.s page 274 + ARM GAS /tmp/ccsprDvq.s page 274 8076 02f8 FFF7FEFF bl HAL_RCC_GetSysClockFreq @@ -16438,7 +16438,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8119 .loc 1 3034 3 is_stmt 1 view .LVU2679 3034:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->TxISR = NULL; 8120 .loc 1 3034 16 is_stmt 0 view .LVU2680 - ARM GAS /tmp/ccQxTlMj.s page 275 + ARM GAS /tmp/ccsprDvq.s page 275 8121 031a 0023 movs r3, #0 @@ -16498,7 +16498,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8165 0010 416B ldr r1, [r0, #52] 8166 0012 0B43 orrs r3, r3, r1 8167 0014 5360 str r3, [r2, #4] - ARM GAS /tmp/ccQxTlMj.s page 276 + ARM GAS /tmp/ccsprDvq.s page 276 8168 .L389: @@ -16558,7 +16558,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8207 004a 0268 ldr r2, [r0] 8208 004c 5368 ldr r3, [r2, #4] 8209 004e 23F48023 bic r3, r3, #262144 - ARM GAS /tmp/ccQxTlMj.s page 277 + ARM GAS /tmp/ccsprDvq.s page 277 8210 0052 016B ldr r1, [r0, #48] @@ -16618,7 +16618,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8250 .loc 1 3095 5 is_stmt 1 view .LVU2721 3096:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); 8251 .loc 1 3096 5 view .LVU2722 - ARM GAS /tmp/ccQxTlMj.s page 278 + ARM GAS /tmp/ccsprDvq.s page 278 3097:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* set auto Baudrate detection parameters if detection is enabled */ @@ -16678,7 +16678,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8294 .LFE186: 8296 .section .text.UART_WaitOnFlagUntilTimeout,"ax",%progbits 8297 .align 1 - ARM GAS /tmp/ccQxTlMj.s page 279 + ARM GAS /tmp/ccsprDvq.s page 279 8298 .global UART_WaitOnFlagUntilTimeout @@ -16738,7 +16738,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8344 0022 B8F1FF3F cmp r8, #-1 8345 0026 F3D0 beq .L400 3199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 280 + ARM GAS /tmp/ccsprDvq.s page 280 8346 .loc 1 3199 7 is_stmt 1 view .LVU2744 @@ -16798,7 +16798,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8385 0062 D5D0 beq .L400 3227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 8386 .loc 1 3227 11 is_stmt 1 view .LVU2760 - ARM GAS /tmp/ccQxTlMj.s page 281 + ARM GAS /tmp/ccsprDvq.s page 281 8387 0064 4FF40062 mov r2, #2048 @@ -16858,7 +16858,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8424 0094 0120 movs r0, #1 8425 0096 00E0 b .L401 8426 .L407: - ARM GAS /tmp/ccQxTlMj.s page 282 + ARM GAS /tmp/ccsprDvq.s page 282 3244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -16918,7 +16918,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8474 .loc 1 1096 3 view .LVU2786 1096:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 8475 .loc 1 1096 12 is_stmt 0 view .LVU2787 - ARM GAS /tmp/ccQxTlMj.s page 283 + ARM GAS /tmp/ccsprDvq.s page 283 8476 0008 C36F ldr r3, [r0, #124] @@ -16978,7 +16978,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8515 .loc 1 1110 5 is_stmt 1 view .LVU2802 1110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 8516 .loc 1 1110 24 is_stmt 0 view .LVU2803 - ARM GAS /tmp/ccQxTlMj.s page 284 + ARM GAS /tmp/ccsprDvq.s page 284 8517 0034 A4F85280 strh r8, [r4, #82] @ movhi @@ -17038,7 +17038,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8555 005e C3F30803 ubfx r3, r3, #0, #9 1135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata16bits++; 8556 .loc 1 1135 30 view .LVU2820 - ARM GAS /tmp/ccQxTlMj.s page 285 + ARM GAS /tmp/ccsprDvq.s page 285 8557 0062 9362 str r3, [r2, #40] @@ -17098,7 +17098,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata8bits++; 8597 .loc 1 1140 14 view .LVU2835 8598 0094 2368 ldr r3, [r4] - ARM GAS /tmp/ccQxTlMj.s page 286 + ARM GAS /tmp/ccsprDvq.s page 286 1140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata8bits++; @@ -17158,7 +17158,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8638 00b8 E367 str r3, [r4, #124] 1150:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 8639 .loc 1 1150 7 is_stmt 1 view .LVU2851 - ARM GAS /tmp/ccQxTlMj.s page 287 + ARM GAS /tmp/ccsprDvq.s page 287 1150:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -17218,7 +17218,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1178:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** uint16_t uhMask; 8689 .loc 1 1178 3 view .LVU2859 1179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** uint32_t tickstart; - ARM GAS /tmp/ccQxTlMj.s page 288 + ARM GAS /tmp/ccsprDvq.s page 288 8690 .loc 1 1179 3 view .LVU2860 @@ -17278,7 +17278,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8728 .loc 1 1195 5 is_stmt 1 view .LVU2876 1195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 8729 .loc 1 1195 17 is_stmt 0 view .LVU2877 - ARM GAS /tmp/ccQxTlMj.s page 289 + ARM GAS /tmp/ccsprDvq.s page 289 8730 0030 FFF7FEFF bl HAL_GetTick @@ -17338,7 +17338,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8770 006a 7F22 movs r2, #127 8771 006c A4F85C20 strh r2, [r4, #92] @ movhi 8772 0070 05E0 b .L433 - ARM GAS /tmp/ccQxTlMj.s page 290 + ARM GAS /tmp/ccsprDvq.s page 290 8773 .L434: @@ -17398,7 +17398,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8813 .loc 1 1213 19 view .LVU2905 8814 00a6 4FF00009 mov r9, #0 8815 00aa 15E0 b .L439 - ARM GAS /tmp/ccQxTlMj.s page 291 + ARM GAS /tmp/ccsprDvq.s page 291 8816 .L447: @@ -17458,7 +17458,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8853 .loc 1 1235 25 view .LVU2922 8854 00d0 013A subs r2, r2, #1 8855 00d2 92B2 uxth r2, r2 - ARM GAS /tmp/ccQxTlMj.s page 292 + ARM GAS /tmp/ccsprDvq.s page 292 8856 00d4 A4F85A20 strh r2, [r4, #90] @ movhi @@ -17518,7 +17518,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 8895 .loc 1 1239 5 is_stmt 1 view .LVU2938 1239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 293 + ARM GAS /tmp/ccsprDvq.s page 293 8896 .loc 1 1239 20 is_stmt 0 view .LVU2939 @@ -17578,7 +17578,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 8944 .loc 1 3121 3 is_stmt 1 view .LVU2947 3124:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 8945 .loc 1 3124 3 view .LVU2948 - ARM GAS /tmp/ccQxTlMj.s page 294 + ARM GAS /tmp/ccsprDvq.s page 294 3124:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -17638,7 +17638,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; 8983 .loc 1 3172 24 is_stmt 0 view .LVU2966 8984 002e 0020 movs r0, #0 - ARM GAS /tmp/ccQxTlMj.s page 295 + ARM GAS /tmp/ccsprDvq.s page 295 8985 0030 2066 str r0, [r4, #96] @@ -17698,7 +17698,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9025 .loc 1 3136 7 discriminator 1 view .LVU2980 3136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 9026 .loc 1 3136 7 discriminator 1 view .LVU2981 - ARM GAS /tmp/ccQxTlMj.s page 296 + ARM GAS /tmp/ccsprDvq.s page 296 9027 0054 2268 ldr r2, [r4] @@ -17758,7 +17758,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9070 .LBE762: 3136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 9071 .loc 1 3136 7 is_stmt 1 discriminator 2 view .LVU2995 - ARM GAS /tmp/ccQxTlMj.s page 297 + ARM GAS /tmp/ccsprDvq.s page 297 3138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** @@ -17818,7 +17818,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9111 .LBI768: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { 9112 .loc 2 1068 31 view .LVU3011 - ARM GAS /tmp/ccQxTlMj.s page 298 + ARM GAS /tmp/ccsprDvq.s page 298 9113 .LBB769: @@ -17878,7 +17878,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9155 .loc 1 3156 7 is_stmt 1 discriminator 2 view .LVU3025 3157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 9156 .loc 1 3157 7 discriminator 1 view .LVU3026 - ARM GAS /tmp/ccQxTlMj.s page 299 + ARM GAS /tmp/ccsprDvq.s page 299 9157 .LBB772: @@ -17938,7 +17938,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9196 .syntax unified 9197 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 9198 00ae 42E80031 strex r1, r3, [r2] - ARM GAS /tmp/ccQxTlMj.s page 300 + ARM GAS /tmp/ccsprDvq.s page 300 9199 @ 0 "" 2 @@ -17998,7 +17998,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 9244 .loc 1 292 3 view .LVU3055 292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 301 + ARM GAS /tmp/ccsprDvq.s page 301 9245 .loc 1 292 6 is_stmt 0 view .LVU3056 @@ -18058,7 +18058,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 9284 .loc 1 341 6 discriminator 1 view .LVU3072 9285 0022 0128 cmp r0, #1 - ARM GAS /tmp/ccQxTlMj.s page 302 + ARM GAS /tmp/ccsprDvq.s page 302 9286 0024 11D0 beq .L466 @@ -18118,7 +18118,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9329 .cfi_def_cfa_offset 0 9330 .cfi_restore 4 9331 .cfi_restore 14 - ARM GAS /tmp/ccQxTlMj.s page 303 + ARM GAS /tmp/ccsprDvq.s page 303 294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -18178,7 +18178,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9376 000e E367 str r3, [r4, #124] 398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 9377 .loc 1 398 3 is_stmt 1 view .LVU3096 - ARM GAS /tmp/ccQxTlMj.s page 304 + ARM GAS /tmp/ccsprDvq.s page 304 9378 0010 2268 ldr r2, [r4] @@ -18238,7 +18238,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9420 .LVL801: 9421 .L477: 426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 305 + ARM GAS /tmp/ccsprDvq.s page 305 9422 .loc 1 426 1 view .LVU3109 @@ -18298,7 +18298,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { 9469 .loc 1 442 6 is_stmt 0 view .LVU3119 9470 0000 0028 cmp r0, #0 - ARM GAS /tmp/ccQxTlMj.s page 306 + ARM GAS /tmp/ccsprDvq.s page 306 9471 0002 40D0 beq .L491 @@ -18358,7 +18358,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9510 0024 23F00103 bic r3, r3, #1 9511 0028 1360 str r3, [r2] 490:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 307 + ARM GAS /tmp/ccsprDvq.s page 307 9512 .loc 1 490 3 view .LVU3135 @@ -18418,7 +18418,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9554 006c 2046 mov r0, r4 9555 006e FFF7FEFF bl UART_CheckIdleState 9556 .LVL810: - ARM GAS /tmp/ccQxTlMj.s page 308 + ARM GAS /tmp/ccsprDvq.s page 308 9557 .L488: @@ -18478,7 +18478,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9601 008c F1E7 b .L488 9602 .LVL818: 9603 .L493: - ARM GAS /tmp/ccQxTlMj.s page 309 + ARM GAS /tmp/ccsprDvq.s page 309 460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } @@ -18538,7 +18538,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9649 .loc 1 570 3 is_stmt 1 view .LVU3168 570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 9650 .loc 1 570 17 is_stmt 0 view .LVU3169 - ARM GAS /tmp/ccQxTlMj.s page 310 + ARM GAS /tmp/ccsprDvq.s page 310 9651 0010 2423 movs r3, #36 @@ -18598,7 +18598,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 9693 .loc 1 602 3 view .LVU3182 9694 0052 2268 ldr r2, [r4] - ARM GAS /tmp/ccQxTlMj.s page 311 + ARM GAS /tmp/ccsprDvq.s page 311 9695 0054 1368 ldr r3, [r2] @@ -18658,7 +18658,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9739 0086 0120 movs r0, #1 9740 .LVL828: 606:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 312 + ARM GAS /tmp/ccsprDvq.s page 312 9741 .loc 1 606 1 view .LVU3193 @@ -18718,7 +18718,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9785 0014 0268 ldr r2, [r0] 9786 .LVL830: 9787 .LBB778: - ARM GAS /tmp/ccQxTlMj.s page 313 + ARM GAS /tmp/ccsprDvq.s page 313 9788 .LBI778: @@ -18778,7 +18778,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 2704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 9830 .loc 1 2704 3 view .LVU3220 2704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 314 + ARM GAS /tmp/ccsprDvq.s page 314 9831 .loc 1 2704 17 is_stmt 0 view .LVU3221 @@ -18838,7 +18838,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9877 0008 12D0 beq .L521 2717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 9878 .loc 1 2717 3 discriminator 2 view .LVU3232 - ARM GAS /tmp/ccQxTlMj.s page 315 + ARM GAS /tmp/ccsprDvq.s page 315 9879 000a 0123 movs r3, #1 @@ -18898,7 +18898,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9918 .LBB786: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 9919 .loc 2 1121 4 view .LVU3248 - ARM GAS /tmp/ccQxTlMj.s page 316 + ARM GAS /tmp/ccsprDvq.s page 316 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -18958,7 +18958,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 9964 .thumb 9965 .thumb_func 9967 UART_Start_Receive_IT: - ARM GAS /tmp/ccQxTlMj.s page 317 + ARM GAS /tmp/ccsprDvq.s page 317 9968 .LVL847: @@ -19018,7 +19018,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10006 .loc 1 3266 3 discriminator 3 view .LVU3277 10007 0028 40F2FF13 movw r3, #511 10008 002c A0F85C30 strh r3, [r0, #92] @ movhi - ARM GAS /tmp/ccQxTlMj.s page 318 + ARM GAS /tmp/ccsprDvq.s page 318 10009 0030 0DE0 b .L526 @@ -19078,7 +19078,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10049 .LBB789: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 10050 .loc 2 1070 5 view .LVU3292 - ARM GAS /tmp/ccQxTlMj.s page 319 + ARM GAS /tmp/ccsprDvq.s page 319 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -19138,7 +19138,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 10094 .loc 1 3272 3 is_stmt 1 discriminator 2 view .LVU3306 3275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 320 + ARM GAS /tmp/ccsprDvq.s page 320 10095 .loc 1 3275 3 view .LVU3307 @@ -19198,7 +19198,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10133 .loc 2 1073 4 is_stmt 0 view .LVU3323 10134 .thumb 10135 .syntax unified - ARM GAS /tmp/ccQxTlMj.s page 321 + ARM GAS /tmp/ccsprDvq.s page 321 10136 .LBE794: @@ -19258,7 +19258,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 10178 .loc 1 3266 3 discriminator 11 view .LVU3338 10179 009c 7F23 movs r3, #127 - ARM GAS /tmp/ccQxTlMj.s page 322 + ARM GAS /tmp/ccsprDvq.s page 322 10180 009e A0F85C30 strh r3, [r0, #92] @ movhi @@ -19318,7 +19318,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10220 .thumb 10221 .syntax unified 10222 .LBE799: - ARM GAS /tmp/ccQxTlMj.s page 323 + ARM GAS /tmp/ccsprDvq.s page 323 10223 .LBE798: @@ -19378,7 +19378,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 1309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check that a Rx process is not already ongoing */ 10272 .loc 1 1309 1 is_stmt 0 view .LVU3362 10273 0000 38B5 push {r3, r4, r5, lr} - ARM GAS /tmp/ccQxTlMj.s page 324 + ARM GAS /tmp/ccsprDvq.s page 324 10274 .LCFI52: @@ -19438,7 +19438,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10313 .loc 2 1068 31 view .LVU3377 10314 .LBB804: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccQxTlMj.s page 325 + ARM GAS /tmp/ccsprDvq.s page 325 10315 .loc 2 1070 5 view .LVU3378 @@ -19498,7 +19498,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10357 .loc 1 1328 5 view .LVU3392 1328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** } 10358 .loc 1 1328 13 is_stmt 0 view .LVU3393 - ARM GAS /tmp/ccQxTlMj.s page 326 + ARM GAS /tmp/ccsprDvq.s page 326 10359 0032 FFF7FEFF bl UART_Start_Receive_IT @@ -19558,7 +19558,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 3310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 10406 .loc 1 3310 3 is_stmt 1 view .LVU3403 3310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 327 + ARM GAS /tmp/ccsprDvq.s page 327 10407 .loc 1 3310 21 is_stmt 0 view .LVU3404 @@ -19618,7 +19618,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10443 .loc 1 3327 5 is_stmt 1 view .LVU3422 3327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 10444 .loc 1 3327 10 is_stmt 0 view .LVU3423 - ARM GAS /tmp/ccQxTlMj.s page 328 + ARM GAS /tmp/ccsprDvq.s page 328 10445 002c 426F ldr r2, [r0, #116] @@ -19678,7 +19678,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10483 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 10484 0046 52E8003F ldrex r3, [r2] 10485 @ 0 "" 2 - ARM GAS /tmp/ccQxTlMj.s page 329 + ARM GAS /tmp/ccsprDvq.s page 329 10486 .LVL886: @@ -19738,7 +19738,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10526 .loc 1 3349 3 discriminator 1 view .LVU3455 10527 0056 2268 ldr r2, [r4] 10528 .LVL890: - ARM GAS /tmp/ccQxTlMj.s page 330 + ARM GAS /tmp/ccsprDvq.s page 330 10529 .LBB813: @@ -19798,7 +19798,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10571 .LBE816: 10572 .LBE815: 3349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** - ARM GAS /tmp/ccQxTlMj.s page 331 + ARM GAS /tmp/ccsprDvq.s page 331 10573 .loc 1 3349 3 discriminator 1 view .LVU3470 @@ -19858,7 +19858,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10613 .LBI820: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { 10614 .loc 2 1119 31 view .LVU3485 - ARM GAS /tmp/ccQxTlMj.s page 332 + ARM GAS /tmp/ccsprDvq.s page 332 10615 .LBB821: @@ -19918,7 +19918,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10657 009a 00BF .align 2 10658 .L558: 10659 009c 00000000 .word UART_DMAReceiveCplt - ARM GAS /tmp/ccQxTlMj.s page 333 + ARM GAS /tmp/ccsprDvq.s page 333 10660 00a0 00000000 .word UART_DMARxHalfCplt @@ -19978,7 +19978,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10705 0016 0368 ldr r3, [r0] 10706 0018 5B68 ldr r3, [r3, #4] 1430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** { - ARM GAS /tmp/ccQxTlMj.s page 334 + ARM GAS /tmp/ccsprDvq.s page 334 10707 .loc 1 1430 8 view .LVU3511 @@ -20038,7 +20038,7 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10747 002a 44E80035 strex r5, r3, [r4] 10748 @ 0 "" 2 10749 .LVL909: - ARM GAS /tmp/ccQxTlMj.s page 335 + ARM GAS /tmp/ccsprDvq.s page 335 10750 .loc 2 1124 4 view .LVU3526 @@ -20098,175 +20098,175 @@ ARM GAS /tmp/ccQxTlMj.s page 1 10795 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" 10796 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" 10797 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/ccQxTlMj.s page 336 + ARM GAS /tmp/ccsprDvq.s page 336 - ARM GAS /tmp/ccQxTlMj.s page 337 + ARM GAS /tmp/ccsprDvq.s page 337 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_uart.c - /tmp/ccQxTlMj.s:20 .text.UART_EndTxTransfer:00000000 $t - /tmp/ccQxTlMj.s:25 .text.UART_EndTxTransfer:00000000 UART_EndTxTransfer - /tmp/ccQxTlMj.s:97 .text.UART_EndRxTransfer:00000000 $t - /tmp/ccQxTlMj.s:102 .text.UART_EndRxTransfer:00000000 UART_EndRxTransfer - /tmp/ccQxTlMj.s:297 .text.UART_TxISR_8BIT:00000000 $t - /tmp/ccQxTlMj.s:302 .text.UART_TxISR_8BIT:00000000 UART_TxISR_8BIT - /tmp/ccQxTlMj.s:462 .text.UART_TxISR_16BIT:00000000 $t - /tmp/ccQxTlMj.s:467 .text.UART_TxISR_16BIT:00000000 UART_TxISR_16BIT - /tmp/ccQxTlMj.s:634 .text.HAL_UART_MspInit:00000000 $t - /tmp/ccQxTlMj.s:640 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit - /tmp/ccQxTlMj.s:655 .text.HAL_UART_MspDeInit:00000000 $t - /tmp/ccQxTlMj.s:661 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit - /tmp/ccQxTlMj.s:676 .text.HAL_UART_DeInit:00000000 $t - /tmp/ccQxTlMj.s:682 .text.HAL_UART_DeInit:00000000 HAL_UART_DeInit - /tmp/ccQxTlMj.s:771 .text.HAL_UART_Transmit_IT:00000000 $t - /tmp/ccQxTlMj.s:777 .text.HAL_UART_Transmit_IT:00000000 HAL_UART_Transmit_IT - /tmp/ccQxTlMj.s:915 .text.HAL_UART_Transmit_IT:0000005c $d - /tmp/ccQxTlMj.s:921 .text.HAL_UART_Transmit_DMA:00000000 $t - /tmp/ccQxTlMj.s:927 .text.HAL_UART_Transmit_DMA:00000000 HAL_UART_Transmit_DMA - /tmp/ccQxTlMj.s:1120 .text.HAL_UART_Transmit_DMA:00000088 $d - /tmp/ccQxTlMj.s:2935 .text.UART_DMATransmitCplt:00000000 UART_DMATransmitCplt - /tmp/ccQxTlMj.s:3205 .text.UART_DMATxHalfCplt:00000000 UART_DMATxHalfCplt - /tmp/ccQxTlMj.s:3300 .text.UART_DMAError:00000000 UART_DMAError - /tmp/ccQxTlMj.s:1127 .text.HAL_UART_DMAPause:00000000 $t - /tmp/ccQxTlMj.s:1133 .text.HAL_UART_DMAPause:00000000 HAL_UART_DMAPause - /tmp/ccQxTlMj.s:1427 .text.HAL_UART_DMAResume:00000000 $t - /tmp/ccQxTlMj.s:1433 .text.HAL_UART_DMAResume:00000000 HAL_UART_DMAResume - /tmp/ccQxTlMj.s:1706 .text.HAL_UART_DMAStop:00000000 $t - /tmp/ccQxTlMj.s:1712 .text.HAL_UART_DMAStop:00000000 HAL_UART_DMAStop - /tmp/ccQxTlMj.s:1960 .text.HAL_UART_Abort:00000000 $t - /tmp/ccQxTlMj.s:1966 .text.HAL_UART_Abort:00000000 HAL_UART_Abort - /tmp/ccQxTlMj.s:2394 .text.HAL_UART_AbortTransmit:00000000 $t - /tmp/ccQxTlMj.s:2400 .text.HAL_UART_AbortTransmit:00000000 HAL_UART_AbortTransmit - /tmp/ccQxTlMj.s:2586 .text.HAL_UART_AbortReceive:00000000 $t - /tmp/ccQxTlMj.s:2592 .text.HAL_UART_AbortReceive:00000000 HAL_UART_AbortReceive - /tmp/ccQxTlMj.s:2909 .text.HAL_UART_TxCpltCallback:00000000 $t - /tmp/ccQxTlMj.s:2915 .text.HAL_UART_TxCpltCallback:00000000 HAL_UART_TxCpltCallback - /tmp/ccQxTlMj.s:2930 .text.UART_DMATransmitCplt:00000000 $t - /tmp/ccQxTlMj.s:3091 .text.UART_EndTransmit_IT:00000000 $t - /tmp/ccQxTlMj.s:3096 .text.UART_EndTransmit_IT:00000000 UART_EndTransmit_IT - /tmp/ccQxTlMj.s:3179 .text.HAL_UART_TxHalfCpltCallback:00000000 $t - /tmp/ccQxTlMj.s:3185 .text.HAL_UART_TxHalfCpltCallback:00000000 HAL_UART_TxHalfCpltCallback - /tmp/ccQxTlMj.s:3200 .text.UART_DMATxHalfCplt:00000000 $t - /tmp/ccQxTlMj.s:3232 .text.HAL_UART_RxCpltCallback:00000000 $t - /tmp/ccQxTlMj.s:3238 .text.HAL_UART_RxCpltCallback:00000000 HAL_UART_RxCpltCallback - /tmp/ccQxTlMj.s:3253 .text.HAL_UART_RxHalfCpltCallback:00000000 $t - /tmp/ccQxTlMj.s:3259 .text.HAL_UART_RxHalfCpltCallback:00000000 HAL_UART_RxHalfCpltCallback - /tmp/ccQxTlMj.s:3274 .text.HAL_UART_ErrorCallback:00000000 $t - /tmp/ccQxTlMj.s:3280 .text.HAL_UART_ErrorCallback:00000000 HAL_UART_ErrorCallback - /tmp/ccQxTlMj.s:3295 .text.UART_DMAError:00000000 $t - /tmp/ccQxTlMj.s:3390 .text.UART_DMAAbortOnError:00000000 $t - /tmp/ccQxTlMj.s:3395 .text.UART_DMAAbortOnError:00000000 UART_DMAAbortOnError - /tmp/ccQxTlMj.s:3428 .text.HAL_UART_AbortCpltCallback:00000000 $t - /tmp/ccQxTlMj.s:3434 .text.HAL_UART_AbortCpltCallback:00000000 HAL_UART_AbortCpltCallback - /tmp/ccQxTlMj.s:3449 .text.HAL_UART_Abort_IT:00000000 $t - ARM GAS /tmp/ccQxTlMj.s page 338 + /tmp/ccsprDvq.s:20 .text.UART_EndTxTransfer:00000000 $t + /tmp/ccsprDvq.s:25 .text.UART_EndTxTransfer:00000000 UART_EndTxTransfer + /tmp/ccsprDvq.s:97 .text.UART_EndRxTransfer:00000000 $t + /tmp/ccsprDvq.s:102 .text.UART_EndRxTransfer:00000000 UART_EndRxTransfer + /tmp/ccsprDvq.s:297 .text.UART_TxISR_8BIT:00000000 $t + /tmp/ccsprDvq.s:302 .text.UART_TxISR_8BIT:00000000 UART_TxISR_8BIT + /tmp/ccsprDvq.s:462 .text.UART_TxISR_16BIT:00000000 $t + /tmp/ccsprDvq.s:467 .text.UART_TxISR_16BIT:00000000 UART_TxISR_16BIT + /tmp/ccsprDvq.s:634 .text.HAL_UART_MspInit:00000000 $t + /tmp/ccsprDvq.s:640 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit + /tmp/ccsprDvq.s:655 .text.HAL_UART_MspDeInit:00000000 $t + /tmp/ccsprDvq.s:661 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit + /tmp/ccsprDvq.s:676 .text.HAL_UART_DeInit:00000000 $t + /tmp/ccsprDvq.s:682 .text.HAL_UART_DeInit:00000000 HAL_UART_DeInit + /tmp/ccsprDvq.s:771 .text.HAL_UART_Transmit_IT:00000000 $t + /tmp/ccsprDvq.s:777 .text.HAL_UART_Transmit_IT:00000000 HAL_UART_Transmit_IT + /tmp/ccsprDvq.s:915 .text.HAL_UART_Transmit_IT:0000005c $d + /tmp/ccsprDvq.s:921 .text.HAL_UART_Transmit_DMA:00000000 $t + /tmp/ccsprDvq.s:927 .text.HAL_UART_Transmit_DMA:00000000 HAL_UART_Transmit_DMA + /tmp/ccsprDvq.s:1120 .text.HAL_UART_Transmit_DMA:00000088 $d + /tmp/ccsprDvq.s:2935 .text.UART_DMATransmitCplt:00000000 UART_DMATransmitCplt + /tmp/ccsprDvq.s:3205 .text.UART_DMATxHalfCplt:00000000 UART_DMATxHalfCplt + /tmp/ccsprDvq.s:3300 .text.UART_DMAError:00000000 UART_DMAError + /tmp/ccsprDvq.s:1127 .text.HAL_UART_DMAPause:00000000 $t + /tmp/ccsprDvq.s:1133 .text.HAL_UART_DMAPause:00000000 HAL_UART_DMAPause + /tmp/ccsprDvq.s:1427 .text.HAL_UART_DMAResume:00000000 $t + /tmp/ccsprDvq.s:1433 .text.HAL_UART_DMAResume:00000000 HAL_UART_DMAResume + /tmp/ccsprDvq.s:1706 .text.HAL_UART_DMAStop:00000000 $t + /tmp/ccsprDvq.s:1712 .text.HAL_UART_DMAStop:00000000 HAL_UART_DMAStop + /tmp/ccsprDvq.s:1960 .text.HAL_UART_Abort:00000000 $t + /tmp/ccsprDvq.s:1966 .text.HAL_UART_Abort:00000000 HAL_UART_Abort + /tmp/ccsprDvq.s:2394 .text.HAL_UART_AbortTransmit:00000000 $t + /tmp/ccsprDvq.s:2400 .text.HAL_UART_AbortTransmit:00000000 HAL_UART_AbortTransmit + /tmp/ccsprDvq.s:2586 .text.HAL_UART_AbortReceive:00000000 $t + /tmp/ccsprDvq.s:2592 .text.HAL_UART_AbortReceive:00000000 HAL_UART_AbortReceive + /tmp/ccsprDvq.s:2909 .text.HAL_UART_TxCpltCallback:00000000 $t + /tmp/ccsprDvq.s:2915 .text.HAL_UART_TxCpltCallback:00000000 HAL_UART_TxCpltCallback + /tmp/ccsprDvq.s:2930 .text.UART_DMATransmitCplt:00000000 $t + /tmp/ccsprDvq.s:3091 .text.UART_EndTransmit_IT:00000000 $t + /tmp/ccsprDvq.s:3096 .text.UART_EndTransmit_IT:00000000 UART_EndTransmit_IT + /tmp/ccsprDvq.s:3179 .text.HAL_UART_TxHalfCpltCallback:00000000 $t + /tmp/ccsprDvq.s:3185 .text.HAL_UART_TxHalfCpltCallback:00000000 HAL_UART_TxHalfCpltCallback + /tmp/ccsprDvq.s:3200 .text.UART_DMATxHalfCplt:00000000 $t + /tmp/ccsprDvq.s:3232 .text.HAL_UART_RxCpltCallback:00000000 $t + /tmp/ccsprDvq.s:3238 .text.HAL_UART_RxCpltCallback:00000000 HAL_UART_RxCpltCallback + /tmp/ccsprDvq.s:3253 .text.HAL_UART_RxHalfCpltCallback:00000000 $t + /tmp/ccsprDvq.s:3259 .text.HAL_UART_RxHalfCpltCallback:00000000 HAL_UART_RxHalfCpltCallback + /tmp/ccsprDvq.s:3274 .text.HAL_UART_ErrorCallback:00000000 $t + /tmp/ccsprDvq.s:3280 .text.HAL_UART_ErrorCallback:00000000 HAL_UART_ErrorCallback + /tmp/ccsprDvq.s:3295 .text.UART_DMAError:00000000 $t + /tmp/ccsprDvq.s:3390 .text.UART_DMAAbortOnError:00000000 $t + /tmp/ccsprDvq.s:3395 .text.UART_DMAAbortOnError:00000000 UART_DMAAbortOnError + /tmp/ccsprDvq.s:3428 .text.HAL_UART_AbortCpltCallback:00000000 $t + /tmp/ccsprDvq.s:3434 .text.HAL_UART_AbortCpltCallback:00000000 HAL_UART_AbortCpltCallback + /tmp/ccsprDvq.s:3449 .text.HAL_UART_Abort_IT:00000000 $t + ARM GAS /tmp/ccsprDvq.s page 338 - /tmp/ccQxTlMj.s:3455 .text.HAL_UART_Abort_IT:00000000 HAL_UART_Abort_IT - /tmp/ccQxTlMj.s:3931 .text.HAL_UART_Abort_IT:00000128 $d - /tmp/ccQxTlMj.s:4020 .text.UART_DMATxAbortCallback:00000000 UART_DMATxAbortCallback - /tmp/ccQxTlMj.s:3942 .text.UART_DMARxAbortCallback:00000000 UART_DMARxAbortCallback - /tmp/ccQxTlMj.s:3937 .text.UART_DMARxAbortCallback:00000000 $t - /tmp/ccQxTlMj.s:4015 .text.UART_DMATxAbortCallback:00000000 $t - /tmp/ccQxTlMj.s:4088 .text.HAL_UART_AbortTransmitCpltCallback:00000000 $t - /tmp/ccQxTlMj.s:4094 .text.HAL_UART_AbortTransmitCpltCallback:00000000 HAL_UART_AbortTransmitCpltCallback - /tmp/ccQxTlMj.s:4109 .text.HAL_UART_AbortTransmit_IT:00000000 $t - /tmp/ccQxTlMj.s:4115 .text.HAL_UART_AbortTransmit_IT:00000000 HAL_UART_AbortTransmit_IT - /tmp/ccQxTlMj.s:4323 .text.HAL_UART_AbortTransmit_IT:0000007c $d - /tmp/ccQxTlMj.s:4333 .text.UART_DMATxOnlyAbortCallback:00000000 UART_DMATxOnlyAbortCallback - /tmp/ccQxTlMj.s:4328 .text.UART_DMATxOnlyAbortCallback:00000000 $t - /tmp/ccQxTlMj.s:4367 .text.HAL_UART_AbortReceiveCpltCallback:00000000 $t - /tmp/ccQxTlMj.s:4373 .text.HAL_UART_AbortReceiveCpltCallback:00000000 HAL_UART_AbortReceiveCpltCallback - /tmp/ccQxTlMj.s:4388 .text.HAL_UART_AbortReceive_IT:00000000 $t - /tmp/ccQxTlMj.s:4394 .text.HAL_UART_AbortReceive_IT:00000000 HAL_UART_AbortReceive_IT - /tmp/ccQxTlMj.s:4739 .text.HAL_UART_AbortReceive_IT:000000c8 $d - /tmp/ccQxTlMj.s:4749 .text.UART_DMARxOnlyAbortCallback:00000000 UART_DMARxOnlyAbortCallback - /tmp/ccQxTlMj.s:4744 .text.UART_DMARxOnlyAbortCallback:00000000 $t - /tmp/ccQxTlMj.s:4795 .text.HAL_UARTEx_RxEventCallback:00000000 $t - /tmp/ccQxTlMj.s:4801 .text.HAL_UARTEx_RxEventCallback:00000000 HAL_UARTEx_RxEventCallback - /tmp/ccQxTlMj.s:4817 .text.UART_RxISR_8BIT:00000000 $t - /tmp/ccQxTlMj.s:4822 .text.UART_RxISR_8BIT:00000000 UART_RxISR_8BIT - /tmp/ccQxTlMj.s:5172 .text.UART_RxISR_16BIT:00000000 $t - /tmp/ccQxTlMj.s:5177 .text.UART_RxISR_16BIT:00000000 UART_RxISR_16BIT - /tmp/ccQxTlMj.s:5527 .text.UART_DMARxHalfCplt:00000000 $t - /tmp/ccQxTlMj.s:5532 .text.UART_DMARxHalfCplt:00000000 UART_DMARxHalfCplt - /tmp/ccQxTlMj.s:5580 .text.UART_DMAReceiveCplt:00000000 $t - /tmp/ccQxTlMj.s:5585 .text.UART_DMAReceiveCplt:00000000 UART_DMAReceiveCplt - /tmp/ccQxTlMj.s:5879 .text.HAL_UARTEx_WakeupCallback:00000000 $t - /tmp/ccQxTlMj.s:5885 .text.HAL_UARTEx_WakeupCallback:00000000 HAL_UARTEx_WakeupCallback - /tmp/ccQxTlMj.s:5900 .text.HAL_UART_IRQHandler:00000000 $t - /tmp/ccQxTlMj.s:5906 .text.HAL_UART_IRQHandler:00000000 HAL_UART_IRQHandler - /tmp/ccQxTlMj.s:6828 .text.HAL_UART_IRQHandler:000002e0 $d - /tmp/ccQxTlMj.s:6834 .text.HAL_UART_ReceiverTimeout_Config:00000000 $t - /tmp/ccQxTlMj.s:6840 .text.HAL_UART_ReceiverTimeout_Config:00000000 HAL_UART_ReceiverTimeout_Config - /tmp/ccQxTlMj.s:6861 .text.HAL_UART_EnableReceiverTimeout:00000000 $t - /tmp/ccQxTlMj.s:6867 .text.HAL_UART_EnableReceiverTimeout:00000000 HAL_UART_EnableReceiverTimeout - /tmp/ccQxTlMj.s:6932 .text.HAL_UART_DisableReceiverTimeout:00000000 $t - /tmp/ccQxTlMj.s:6938 .text.HAL_UART_DisableReceiverTimeout:00000000 HAL_UART_DisableReceiverTimeout - /tmp/ccQxTlMj.s:7003 .text.HAL_MultiProcessor_EnterMuteMode:00000000 $t - /tmp/ccQxTlMj.s:7009 .text.HAL_MultiProcessor_EnterMuteMode:00000000 HAL_MultiProcessor_EnterMuteMode - /tmp/ccQxTlMj.s:7028 .text.HAL_HalfDuplex_EnableTransmitter:00000000 $t - /tmp/ccQxTlMj.s:7034 .text.HAL_HalfDuplex_EnableTransmitter:00000000 HAL_HalfDuplex_EnableTransmitter - /tmp/ccQxTlMj.s:7187 .text.HAL_HalfDuplex_EnableReceiver:00000000 $t - /tmp/ccQxTlMj.s:7193 .text.HAL_HalfDuplex_EnableReceiver:00000000 HAL_HalfDuplex_EnableReceiver - /tmp/ccQxTlMj.s:7346 .text.HAL_LIN_SendBreak:00000000 $t - /tmp/ccQxTlMj.s:7352 .text.HAL_LIN_SendBreak:00000000 HAL_LIN_SendBreak - /tmp/ccQxTlMj.s:7405 .text.HAL_UART_GetState:00000000 $t - /tmp/ccQxTlMj.s:7411 .text.HAL_UART_GetState:00000000 HAL_UART_GetState - /tmp/ccQxTlMj.s:7439 .text.HAL_UART_GetError:00000000 $t - /tmp/ccQxTlMj.s:7445 .text.HAL_UART_GetError:00000000 HAL_UART_GetError - /tmp/ccQxTlMj.s:7463 .text.UART_SetConfig:00000000 $t - /tmp/ccQxTlMj.s:7469 .text.UART_SetConfig:00000000 UART_SetConfig - /tmp/ccQxTlMj.s:7596 .text.UART_SetConfig:0000008a $d - /tmp/ccQxTlMj.s:7600 .text.UART_SetConfig:0000008e $t - ARM GAS /tmp/ccQxTlMj.s page 339 + /tmp/ccsprDvq.s:3455 .text.HAL_UART_Abort_IT:00000000 HAL_UART_Abort_IT + /tmp/ccsprDvq.s:3931 .text.HAL_UART_Abort_IT:00000128 $d + /tmp/ccsprDvq.s:4020 .text.UART_DMATxAbortCallback:00000000 UART_DMATxAbortCallback + /tmp/ccsprDvq.s:3942 .text.UART_DMARxAbortCallback:00000000 UART_DMARxAbortCallback + /tmp/ccsprDvq.s:3937 .text.UART_DMARxAbortCallback:00000000 $t + /tmp/ccsprDvq.s:4015 .text.UART_DMATxAbortCallback:00000000 $t + /tmp/ccsprDvq.s:4088 .text.HAL_UART_AbortTransmitCpltCallback:00000000 $t + /tmp/ccsprDvq.s:4094 .text.HAL_UART_AbortTransmitCpltCallback:00000000 HAL_UART_AbortTransmitCpltCallback + /tmp/ccsprDvq.s:4109 .text.HAL_UART_AbortTransmit_IT:00000000 $t + /tmp/ccsprDvq.s:4115 .text.HAL_UART_AbortTransmit_IT:00000000 HAL_UART_AbortTransmit_IT + /tmp/ccsprDvq.s:4323 .text.HAL_UART_AbortTransmit_IT:0000007c $d + /tmp/ccsprDvq.s:4333 .text.UART_DMATxOnlyAbortCallback:00000000 UART_DMATxOnlyAbortCallback + /tmp/ccsprDvq.s:4328 .text.UART_DMATxOnlyAbortCallback:00000000 $t + /tmp/ccsprDvq.s:4367 .text.HAL_UART_AbortReceiveCpltCallback:00000000 $t + /tmp/ccsprDvq.s:4373 .text.HAL_UART_AbortReceiveCpltCallback:00000000 HAL_UART_AbortReceiveCpltCallback + /tmp/ccsprDvq.s:4388 .text.HAL_UART_AbortReceive_IT:00000000 $t + /tmp/ccsprDvq.s:4394 .text.HAL_UART_AbortReceive_IT:00000000 HAL_UART_AbortReceive_IT + /tmp/ccsprDvq.s:4739 .text.HAL_UART_AbortReceive_IT:000000c8 $d + /tmp/ccsprDvq.s:4749 .text.UART_DMARxOnlyAbortCallback:00000000 UART_DMARxOnlyAbortCallback + /tmp/ccsprDvq.s:4744 .text.UART_DMARxOnlyAbortCallback:00000000 $t + /tmp/ccsprDvq.s:4795 .text.HAL_UARTEx_RxEventCallback:00000000 $t + /tmp/ccsprDvq.s:4801 .text.HAL_UARTEx_RxEventCallback:00000000 HAL_UARTEx_RxEventCallback + /tmp/ccsprDvq.s:4817 .text.UART_RxISR_8BIT:00000000 $t + /tmp/ccsprDvq.s:4822 .text.UART_RxISR_8BIT:00000000 UART_RxISR_8BIT + /tmp/ccsprDvq.s:5172 .text.UART_RxISR_16BIT:00000000 $t + /tmp/ccsprDvq.s:5177 .text.UART_RxISR_16BIT:00000000 UART_RxISR_16BIT + /tmp/ccsprDvq.s:5527 .text.UART_DMARxHalfCplt:00000000 $t + /tmp/ccsprDvq.s:5532 .text.UART_DMARxHalfCplt:00000000 UART_DMARxHalfCplt + /tmp/ccsprDvq.s:5580 .text.UART_DMAReceiveCplt:00000000 $t + /tmp/ccsprDvq.s:5585 .text.UART_DMAReceiveCplt:00000000 UART_DMAReceiveCplt + /tmp/ccsprDvq.s:5879 .text.HAL_UARTEx_WakeupCallback:00000000 $t + /tmp/ccsprDvq.s:5885 .text.HAL_UARTEx_WakeupCallback:00000000 HAL_UARTEx_WakeupCallback + /tmp/ccsprDvq.s:5900 .text.HAL_UART_IRQHandler:00000000 $t + /tmp/ccsprDvq.s:5906 .text.HAL_UART_IRQHandler:00000000 HAL_UART_IRQHandler + /tmp/ccsprDvq.s:6828 .text.HAL_UART_IRQHandler:000002e0 $d + /tmp/ccsprDvq.s:6834 .text.HAL_UART_ReceiverTimeout_Config:00000000 $t + /tmp/ccsprDvq.s:6840 .text.HAL_UART_ReceiverTimeout_Config:00000000 HAL_UART_ReceiverTimeout_Config + /tmp/ccsprDvq.s:6861 .text.HAL_UART_EnableReceiverTimeout:00000000 $t + /tmp/ccsprDvq.s:6867 .text.HAL_UART_EnableReceiverTimeout:00000000 HAL_UART_EnableReceiverTimeout + /tmp/ccsprDvq.s:6932 .text.HAL_UART_DisableReceiverTimeout:00000000 $t + /tmp/ccsprDvq.s:6938 .text.HAL_UART_DisableReceiverTimeout:00000000 HAL_UART_DisableReceiverTimeout + /tmp/ccsprDvq.s:7003 .text.HAL_MultiProcessor_EnterMuteMode:00000000 $t + /tmp/ccsprDvq.s:7009 .text.HAL_MultiProcessor_EnterMuteMode:00000000 HAL_MultiProcessor_EnterMuteMode + /tmp/ccsprDvq.s:7028 .text.HAL_HalfDuplex_EnableTransmitter:00000000 $t + /tmp/ccsprDvq.s:7034 .text.HAL_HalfDuplex_EnableTransmitter:00000000 HAL_HalfDuplex_EnableTransmitter + /tmp/ccsprDvq.s:7187 .text.HAL_HalfDuplex_EnableReceiver:00000000 $t + /tmp/ccsprDvq.s:7193 .text.HAL_HalfDuplex_EnableReceiver:00000000 HAL_HalfDuplex_EnableReceiver + /tmp/ccsprDvq.s:7346 .text.HAL_LIN_SendBreak:00000000 $t + /tmp/ccsprDvq.s:7352 .text.HAL_LIN_SendBreak:00000000 HAL_LIN_SendBreak + /tmp/ccsprDvq.s:7405 .text.HAL_UART_GetState:00000000 $t + /tmp/ccsprDvq.s:7411 .text.HAL_UART_GetState:00000000 HAL_UART_GetState + /tmp/ccsprDvq.s:7439 .text.HAL_UART_GetError:00000000 $t + /tmp/ccsprDvq.s:7445 .text.HAL_UART_GetError:00000000 HAL_UART_GetError + /tmp/ccsprDvq.s:7463 .text.UART_SetConfig:00000000 $t + /tmp/ccsprDvq.s:7469 .text.UART_SetConfig:00000000 UART_SetConfig + /tmp/ccsprDvq.s:7596 .text.UART_SetConfig:0000008a $d + /tmp/ccsprDvq.s:7600 .text.UART_SetConfig:0000008e $t + ARM GAS /tmp/ccsprDvq.s page 339 - /tmp/ccQxTlMj.s:7617 .text.UART_SetConfig:000000a4 $d - /tmp/ccQxTlMj.s:7627 .text.UART_SetConfig:000000b6 $t - /tmp/ccQxTlMj.s:7658 .text.UART_SetConfig:000000d4 $d - /tmp/ccQxTlMj.s:7933 .text.UART_SetConfig:00000250 $d - /tmp/ccQxTlMj.s:7946 .text.UART_SetConfig:0000025c $d - /tmp/ccQxTlMj.s:7959 .text.UART_SetConfig:00000284 $t - /tmp/ccQxTlMj.s:8134 .text.UART_SetConfig:00000324 $d - /tmp/ccQxTlMj.s:8139 .text.UART_AdvFeatureConfig:00000000 $t - /tmp/ccQxTlMj.s:8145 .text.UART_AdvFeatureConfig:00000000 UART_AdvFeatureConfig - /tmp/ccQxTlMj.s:8297 .text.UART_WaitOnFlagUntilTimeout:00000000 $t - /tmp/ccQxTlMj.s:8303 .text.UART_WaitOnFlagUntilTimeout:00000000 UART_WaitOnFlagUntilTimeout - /tmp/ccQxTlMj.s:8444 .text.HAL_UART_Transmit:00000000 $t - /tmp/ccQxTlMj.s:8450 .text.HAL_UART_Transmit:00000000 HAL_UART_Transmit - /tmp/ccQxTlMj.s:8660 .text.HAL_UART_Receive:00000000 $t - /tmp/ccQxTlMj.s:8666 .text.HAL_UART_Receive:00000000 HAL_UART_Receive - /tmp/ccQxTlMj.s:8920 .text.UART_CheckIdleState:00000000 $t - /tmp/ccQxTlMj.s:8926 .text.UART_CheckIdleState:00000000 UART_CheckIdleState - /tmp/ccQxTlMj.s:9231 .text.HAL_UART_Init:00000000 $t - /tmp/ccQxTlMj.s:9237 .text.HAL_UART_Init:00000000 HAL_UART_Init - /tmp/ccQxTlMj.s:9341 .text.HAL_HalfDuplex_Init:00000000 $t - /tmp/ccQxTlMj.s:9347 .text.HAL_HalfDuplex_Init:00000000 HAL_HalfDuplex_Init - /tmp/ccQxTlMj.s:9455 .text.HAL_LIN_Init:00000000 $t - /tmp/ccQxTlMj.s:9461 .text.HAL_LIN_Init:00000000 HAL_LIN_Init - /tmp/ccQxTlMj.s:9613 .text.HAL_MultiProcessor_Init:00000000 $t - /tmp/ccQxTlMj.s:9619 .text.HAL_MultiProcessor_Init:00000000 HAL_MultiProcessor_Init - /tmp/ccQxTlMj.s:9747 .text.HAL_MultiProcessor_EnableMuteMode:00000000 $t - /tmp/ccQxTlMj.s:9753 .text.HAL_MultiProcessor_EnableMuteMode:00000000 HAL_MultiProcessor_EnableMuteMode - /tmp/ccQxTlMj.s:9854 .text.HAL_MultiProcessor_DisableMuteMode:00000000 $t - /tmp/ccQxTlMj.s:9860 .text.HAL_MultiProcessor_DisableMuteMode:00000000 HAL_MultiProcessor_DisableMuteMode - /tmp/ccQxTlMj.s:9961 .text.UART_Start_Receive_IT:00000000 $t - /tmp/ccQxTlMj.s:9967 .text.UART_Start_Receive_IT:00000000 UART_Start_Receive_IT - /tmp/ccQxTlMj.s:10252 .text.UART_Start_Receive_IT:000000cc $d - /tmp/ccQxTlMj.s:10259 .text.HAL_UART_Receive_IT:00000000 $t - /tmp/ccQxTlMj.s:10265 .text.HAL_UART_Receive_IT:00000000 HAL_UART_Receive_IT - /tmp/ccQxTlMj.s:10382 .text.UART_Start_Receive_DMA:00000000 $t - /tmp/ccQxTlMj.s:10388 .text.UART_Start_Receive_DMA:00000000 UART_Start_Receive_DMA - /tmp/ccQxTlMj.s:10659 .text.UART_Start_Receive_DMA:0000009c $d - /tmp/ccQxTlMj.s:10666 .text.HAL_UART_Receive_DMA:00000000 $t - /tmp/ccQxTlMj.s:10672 .text.HAL_UART_Receive_DMA:00000000 HAL_UART_Receive_DMA - /tmp/ccQxTlMj.s:7671 .text.UART_SetConfig:000000e1 $d - /tmp/ccQxTlMj.s:7671 .text.UART_SetConfig:000000e2 $t - /tmp/ccQxTlMj.s:7942 .text.UART_SetConfig:00000259 $d - /tmp/ccQxTlMj.s:7942 .text.UART_SetConfig:0000025a $t + /tmp/ccsprDvq.s:7617 .text.UART_SetConfig:000000a4 $d + /tmp/ccsprDvq.s:7627 .text.UART_SetConfig:000000b6 $t + /tmp/ccsprDvq.s:7658 .text.UART_SetConfig:000000d4 $d + /tmp/ccsprDvq.s:7933 .text.UART_SetConfig:00000250 $d + /tmp/ccsprDvq.s:7946 .text.UART_SetConfig:0000025c $d + /tmp/ccsprDvq.s:7959 .text.UART_SetConfig:00000284 $t + /tmp/ccsprDvq.s:8134 .text.UART_SetConfig:00000324 $d + /tmp/ccsprDvq.s:8139 .text.UART_AdvFeatureConfig:00000000 $t + /tmp/ccsprDvq.s:8145 .text.UART_AdvFeatureConfig:00000000 UART_AdvFeatureConfig + /tmp/ccsprDvq.s:8297 .text.UART_WaitOnFlagUntilTimeout:00000000 $t + /tmp/ccsprDvq.s:8303 .text.UART_WaitOnFlagUntilTimeout:00000000 UART_WaitOnFlagUntilTimeout + /tmp/ccsprDvq.s:8444 .text.HAL_UART_Transmit:00000000 $t + /tmp/ccsprDvq.s:8450 .text.HAL_UART_Transmit:00000000 HAL_UART_Transmit + /tmp/ccsprDvq.s:8660 .text.HAL_UART_Receive:00000000 $t + /tmp/ccsprDvq.s:8666 .text.HAL_UART_Receive:00000000 HAL_UART_Receive + /tmp/ccsprDvq.s:8920 .text.UART_CheckIdleState:00000000 $t + /tmp/ccsprDvq.s:8926 .text.UART_CheckIdleState:00000000 UART_CheckIdleState + /tmp/ccsprDvq.s:9231 .text.HAL_UART_Init:00000000 $t + /tmp/ccsprDvq.s:9237 .text.HAL_UART_Init:00000000 HAL_UART_Init + /tmp/ccsprDvq.s:9341 .text.HAL_HalfDuplex_Init:00000000 $t + /tmp/ccsprDvq.s:9347 .text.HAL_HalfDuplex_Init:00000000 HAL_HalfDuplex_Init + /tmp/ccsprDvq.s:9455 .text.HAL_LIN_Init:00000000 $t + /tmp/ccsprDvq.s:9461 .text.HAL_LIN_Init:00000000 HAL_LIN_Init + /tmp/ccsprDvq.s:9613 .text.HAL_MultiProcessor_Init:00000000 $t + /tmp/ccsprDvq.s:9619 .text.HAL_MultiProcessor_Init:00000000 HAL_MultiProcessor_Init + /tmp/ccsprDvq.s:9747 .text.HAL_MultiProcessor_EnableMuteMode:00000000 $t + /tmp/ccsprDvq.s:9753 .text.HAL_MultiProcessor_EnableMuteMode:00000000 HAL_MultiProcessor_EnableMuteMode + /tmp/ccsprDvq.s:9854 .text.HAL_MultiProcessor_DisableMuteMode:00000000 $t + /tmp/ccsprDvq.s:9860 .text.HAL_MultiProcessor_DisableMuteMode:00000000 HAL_MultiProcessor_DisableMuteMode + /tmp/ccsprDvq.s:9961 .text.UART_Start_Receive_IT:00000000 $t + /tmp/ccsprDvq.s:9967 .text.UART_Start_Receive_IT:00000000 UART_Start_Receive_IT + /tmp/ccsprDvq.s:10252 .text.UART_Start_Receive_IT:000000cc $d + /tmp/ccsprDvq.s:10259 .text.HAL_UART_Receive_IT:00000000 $t + /tmp/ccsprDvq.s:10265 .text.HAL_UART_Receive_IT:00000000 HAL_UART_Receive_IT + /tmp/ccsprDvq.s:10382 .text.UART_Start_Receive_DMA:00000000 $t + /tmp/ccsprDvq.s:10388 .text.UART_Start_Receive_DMA:00000000 UART_Start_Receive_DMA + /tmp/ccsprDvq.s:10659 .text.UART_Start_Receive_DMA:0000009c $d + /tmp/ccsprDvq.s:10666 .text.HAL_UART_Receive_DMA:00000000 $t + /tmp/ccsprDvq.s:10672 .text.HAL_UART_Receive_DMA:00000000 HAL_UART_Receive_DMA + /tmp/ccsprDvq.s:7671 .text.UART_SetConfig:000000e1 $d + /tmp/ccsprDvq.s:7671 .text.UART_SetConfig:000000e2 $t + /tmp/ccsprDvq.s:7942 .text.UART_SetConfig:00000259 $d + /tmp/ccsprDvq.s:7942 .text.UART_SetConfig:0000025a $t UNDEFINED SYMBOLS HAL_DMA_Start_IT diff --git a/build/stm32f7xx_hal_uart.o b/build/stm32f7xx_hal_uart.o index a8eaff49694aaa3ae3b88f0a8537ebab995a548c..712e7a520f00a0981659bb95fbfc43cd4dcb074f 100644 GIT binary patch delta 4443 zcmZ8k33L=y7OhuZO*-jxlOiEx>FUl32{hS&Krj$ULc)>+f+4~HLJ%-O7FJ;d1x6V} z8Pt5RL{I@m4~Po1XEF>7j-v;+;E19Q;EZHgWCrS&a2<=zWd+y|Emu)h}~Nw)d?$cX6=cS;Q&w$v~|S{FJX(zPmeO*_D^k-8cdIXT?Aw#Q19t{fit@q)cZIUr+CflO`IAE_8 zie$6g4tBmTPI!HZ&FG?Hvso#RcE&JEu~{jNbJmJfpHEJ5iV|N&lAn!XK^F_05uBOR z+-yr;Le6R8IbULm&XL_gcqKWfa)#}Lz%wL;Zx=^=Q|YoOOql3d&eor7w%_3}T_ME% zx38yu@a_J)*qaa+6^n*ghIUTK=+pRId8*mlXbn%&pS zbFtW8$D_k9xPcQxRzy6H?A2zD_LPr*%gK^DPfSYk(>vnnB#o|$Hdd=HgrDhX>bTQEDj~<(OxwG3tCyae<|J)IscUp`|9M zSGk_WmYO2j_KB4#nVr|cqvZYqPjbJ7pR&6Vja1wUI^%Hbd{_7wTT?uXH*>VlI&ib> zGvT|#Y&@QDd>QdKlxLii<13AS8|Q>$aD3w#i9K?%qBgR-L*8EvHANl9bsW*&H^^n` zKiTuYJ+nD}@(A@;&h$IaqlP+Coy)Cm)j~fpPPj__R4hyN(;vmoRKM?YV2%r6M+`@G z>NXB@QTxDP&Q#wJzoh!r5_b1VL-#gy$@Qr4Omo}2@Sc^V&-j6V^df4EZxJKA zq(>KXd*`pVCW{|(tm^i0 zX81kKdmfEg4bdh94i*&2i_fETbi&!r7@AM4MBho}o5t7vgfokG(Fmz4_2x#7a+>1@ zrj&*|zcwD=OP#qe=8tmbGXGtmyCB*Y9)0R8sjxgwXETg1LZoigL)>KlfwW=4Ud@{XlPfn&i$eJW^UN9M)VsRd!ONFZ)l%ea5sL%ynUA+B_o*Q+o8tQG(vj$ zFgDyp%`~Xu&7ob*9G|^ogAWr(f4FPIGIN7%ShvMSG9w%roXq$XNg4yuCUPf6I*hxt z0>DBBPjKjaP4GN`|1en1EvPcV`%@*U0-{}209Kn|3xK^0?!bi8eI_^@_iGr$+ef@P z>{V(Gj4WFxQ%&G}#d;a%`cx$@Ltty=D>CJYiYiv>tL6~i46UP}G*w5@hk=gOSvI^s zOUAHy%9z(>EUs~*NltN#2gmbWTQ)w&M*GBHCVI__ebR2Uyx<;5>J2g9eHZM;yKf$V zISkeZsHTa0|KMytwBMerIdgT7$~^$d`tI0%9^Oqngy9?|+B*H;@wt3=1zmV~c)d<*Xgz@KqziUCe4=KzAH zF*SPH;e-fI*mDOJex>RXfDcp{)QIU!O`U!QvlTJJ_&sBHLL6T`UAbLnG+s|H3;|d+ zg10r*8M)M@k4ob|H@fm5PuBIJcw@gs3Z}vEoRb_39j`7~PV};2(teRib@;`T!&JK&630_e0@%5Hoa< z63L%b4*(d;pb@%QiR8cV8v(3kaDrG+KZjlwZS}F^jO+fY-1FA#WpP<+B}L z{GZI&;gZxI691Ao&@ic2s}rVXx_u5!;B17Q^6zEeJWMgR)HY6{rQ*{@ zTpDo(zZZ-0nf$wMX3hN#I9Yju;xj(?Yzy&elM`b%plt4A&VFPD`!Kfj7y$orjpAa9 z6shnv>$#H&{-6Vs?^o_I`GIb;Hm;A#tZl5Hk~wAG?8ccjnZ;A)%$VCaQ_qVfPjicl zvYon|L($DMVyS#TrRcj((s1(Yq2FW4*T;NMFVi^v25T$zA*Zlx)7SE{M?Zav=2MGa za~j$~eaC5cRfS<1-ETjdg^1^ur*&l08Jm= zM&Y{u9M#ceeeF4zAJL2rxug6}+ zQl?MirApt0MX$XIa?~|=TBMJ;hIn=Qfoldi@kcD<^jW-Y)8G4%y2)+r_47Ycl6*8) z?{J+ulS9wDPF?5&y#|XtB7vkFeO3ZR>Km?81QqK$*t%LjgeB(65t0sKR)hbHZxAT| E2gOT|KL7v# delta 4486 zcmZ8k2~ZSg7Vg*6Fatd^P788Q&oG=KBbSO|Kq4Rra!C+1;sJu9A}DHNRyRhYWn8VS z@*6uwjAEjeZn7SeT{nqqHkGqnwPJ-m)NCS&2LftDR7~9LzSrHOMyg)_{l0g<|NZ|o zKi)FF-fP?(0Y4sbt+dxV%pB)8fa5~AU;ptY<4}R)c)=I|xbViAR$RbTVxh%1hdAEH zSHwl|iKNBkv&G19hJ1P?hKxaXLNz`Ncl;R0anQ!%D$&#_8mH{aKzfG4cTk{k<-hix(*~Q8P9~ zy#!)9+vapd&!xy#FT4rFG|F&*7uXD(`6YJ2IR`#r*%7nslS%rM!SF14vlxN;@6!sI zxQEuw>_kLZ;5GE83w-0?c@i98JrN<(#-PC0Z74&;D^GY#NeYWr}8T5`XTUy6&* zetZl(jT1P_xWV>1W-qO$Xd9jM&PQ?5I93zshPCYXkurS7-i?%tyQqR4uA{2LcD*ahg3v+ltsSpSHxyfq6ODOlSnW$Rp;723v*X#1*V6z$AFYL?F;^gS>e zAFr6cw*3`#)qOJkL#B6ipKu#Y|FV~(4Id>)S-9b*bBFLjRzY$ z6&o797dOoKA|Ie0I#`TBf+z$R0xMeL((E0WJ}ezz!F!hD&d>w@U?dT?|I*7m? z0ylbA4%yDz+py_i(0xUsFFR%l^^%%M%Fs{4|A`X;PJ+{P3 z2se_!=ek0Lu8u*gL}?1+u-9XeFvR(kbj`WhI)ZHXB22#|D2h*Y zOnU*{z$J@TS|w)QfikEG!rIlGFIf`F$`21JAjxWTuULYqxf2m6B`||FqtoIH$62XI zpq9W)wkNe1HnAU5_3BPohLNj}Q1~G!w6cg{aVcxi23G3{Y{mpkICsz->P=v^WjI+S zB03mJZuKl5ww{NCmNeaMljgP`bLc}tx5;S^*vLw~3dI(+@cFojHAv`TRayzaes*SL zD71PyN1lW54`_#@^(^R{fOfcFRwv+_^n);&tsm_OQj704kD=ll12}FzQuqwdhocAc zn(PB}CdsZ2!agFQ?0&{g;LnMyYmBU^JZH`!l@<*0DpL3wCTES|`%P?mRyIg%ca|O| z$@~=Qy^f98iXa9Q+K56wwE(f49#(rD~2i^*gKW!w-jQX?mc+VMk8 zZZOXL_HYE>jHSXzf0CF+`X3?sK9c+b9firFdfnYY;1+>LsX0?bI)`jqwi8}tf6k7F zB6cym2%6c@92r{Kgd976#lYs}*b`L8gT$P#F-nnxEt+AbG!_JB?M-%!#P3V zVPE9PA*xlUe>$bJ7lk{KxCAh;2jt%qmYWTDRHlz3X2rNF7^oT?@>jd0)_a6q%X45V zru<9zyq^C9KF^L1fcUydPW0pAn+}Lv2+JiXyA+(jw?ZuKNAqF)WA~+oFH&Do^Y6~fu%TK6ObIE*t-+n zhV`EEq8&V>cy5%m^0==XC*m-84o-ZFhiX<*LCnI6C4e_W$0TH0Dg#0B45~~v;Qg65 zmBe*Z_w%?|s-^(nXJK=v)2ywVo@#(?>@Tw%+F)PtQCpt%6vvH3((b;SKI+}K41pyC zW_qBy1)MFE?H4|ePT+6!(b+bh4xr~~O*3D3hi2=*V@kh6rGr@rmQU~=(*r*0x#&dn zdn7IBAGDzMr#UVR34=D)HS>7mcFd*v>H}d08&rQP;uku;*^dRF&$!oe5v(bu01W1l zYS6s%5f^F8?2oCUU#>C_!PzCMs%<{0#?0@+vt?VLzAyMNqKigP5gyeUgxAv>1qc?E zky%TFnoC3cq<-3IMVLz`tG^I$Y$SOof!hTOeW}>7<{%{bDrNnKV0jBuDn=lmK=oIA zhoF8DtVCcrfk})ta)zD*wMhcyYg{LEFp>u=) z`lOnTz%&BY(78eY{ld2)u${mpwtV3dSju`9hE}QL{x(1S;o0NpSM)Xh*N5IS(R=n@ z<5P9jA+UvR#gweA9_K25Q>Z5j{ti9#-E}0~6Wb zn{a4Y7rvLW;zjh{u&8>*7`&YLnSxXO+%v4ePn*3b3ux3wO7V1X1dBdNY=VO`Rky4vcb;)1e@r1I+8c}->Y zO-q{^=gpq^%(9v#b7b=nNx2HUV6AfYDst~Bu1;LqmBqANQa_3t=FJ| z7e*?47kti}M=B?~poEVesf2aIbIQeT5R|RmP(;qV(WJizO)`3*0mB^VL62*d`#tD! zld||aa_=Y~Uq|jeCH)3+pDG(@X;;qCa!HB5NwJT$-NbFdq^I6OcBOLm7W(~LFZy-& zLat)FjUkuzV#wpl$Gxh#bQ_mGr5YDLFkLx%8%mVjeW)h%p_|Qj@T~&hph{`$L(N*{ z7A;Gav3GD;scfO8Rq3GRZ6)O{M%}6$xQkq^a-Wv9O2Iu`+Li71Ab}6GDWBhiNZu5t tblrnkNLHkNh=U#_ot9BbH7yOw23n3QM{o(Te*;`Q9&7KP`niJ4{{f~AmoNYT diff --git a/build/stm32f7xx_hal_uart_ex.lst b/build/stm32f7xx_hal_uart_ex.lst index ebeb78d..ad27562 100644 --- a/build/stm32f7xx_hal_uart_ex.lst +++ b/build/stm32f7xx_hal_uart_ex.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cc5ct5Ve.s page 1 +ARM GAS /tmp/ccvzLe3h.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (#) For the UART RS485 Driver Enable mode, initialize the UART registers 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** by calling the HAL_RS485Ex_Init() API. - ARM GAS /tmp/cc5ct5Ve.s page 2 + ARM GAS /tmp/ccvzLe3h.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (++) Stop Bit 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (++) Parity: If the parity is enabled, then the MSB bit of the data written 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** in the data register is transmitted but is changed by the parity bit. - ARM GAS /tmp/cc5ct5Ve.s page 3 + ARM GAS /tmp/ccvzLe3h.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (++) Hardware flow control @@ -178,7 +178,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @param DeassertionTime Driver Enable deassertion time: 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * 5-bit value defining the time between the end of the last stop bit, in a 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * transmitted message, and the de-activation of the DE (Driver Enable) signal. - ARM GAS /tmp/cc5ct5Ve.s page 4 + ARM GAS /tmp/ccvzLe3h.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the @@ -238,7 +238,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** UART_AdvFeatureConfig(huart); - ARM GAS /tmp/cc5ct5Ve.s page 5 + ARM GAS /tmp/ccvzLe3h.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } @@ -298,7 +298,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (#) Compared to standard reception services which only consider number of received 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** data elements as reception completion criteria, these functions also consider additional ev 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** as triggers for updating reception status to caller : - ARM GAS /tmp/cc5ct5Ve.s page 6 + ARM GAS /tmp/ccvzLe3h.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (+) Detection of inactivity period (RX line has not been active for a given period). @@ -358,7 +358,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /** - ARM GAS /tmp/cc5ct5Ve.s page 7 + ARM GAS /tmp/ccvzLe3h.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @brief Disable UART Clock when in Stop Mode. @@ -418,7 +418,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* TEACK and/or REACK to check before moving huart->gState to Ready */ 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** return (UART_CheckIdleState(huart)); 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } - ARM GAS /tmp/cc5ct5Ve.s page 8 + ARM GAS /tmp/ccvzLe3h.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** @@ -478,7 +478,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* Initialize the UART State */ 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_READY; - ARM GAS /tmp/cc5ct5Ve.s page 9 + ARM GAS /tmp/ccvzLe3h.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } @@ -538,7 +538,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * of uint16_t available through pData. - ARM GAS /tmp/cc5ct5Ve.s page 10 + ARM GAS /tmp/ccvzLe3h.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @param huart UART handle. @@ -598,7 +598,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* as long as data have to be received */ 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** while (huart->RxXferCount > 0U) 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { - ARM GAS /tmp/cc5ct5Ve.s page 11 + ARM GAS /tmp/ccvzLe3h.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* Check if IDLE flag is set */ @@ -658,7 +658,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** else 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** return HAL_BUSY; - ARM GAS /tmp/cc5ct5Ve.s page 12 + ARM GAS /tmp/ccvzLe3h.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } @@ -718,7 +718,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** - ARM GAS /tmp/cc5ct5Ve.s page 13 + ARM GAS /tmp/ccvzLe3h.s page 13 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /** @@ -778,7 +778,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** else 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { - ARM GAS /tmp/cc5ct5Ve.s page 14 + ARM GAS /tmp/ccvzLe3h.s page 14 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** return HAL_BUSY; @@ -838,7 +838,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { 28 .loc 1 770 1 view -0 29 .cfi_startproc - ARM GAS /tmp/cc5ct5Ve.s page 15 + ARM GAS /tmp/ccvzLe3h.s page 15 30 @ args = 0, pretend = 0, frame = 8 @@ -898,7 +898,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** 77 .loc 1 153 3 view .LVU7 156:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { - ARM GAS /tmp/cc5ct5Ve.s page 16 + ARM GAS /tmp/ccvzLe3h.s page 16 78 .loc 1 156 3 view .LVU8 @@ -958,7 +958,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 118 .loc 1 200 26 is_stmt 0 view .LVU22 119 0020 636A ldr r3, [r4, #36] 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { - ARM GAS /tmp/cc5ct5Ve.s page 17 + ARM GAS /tmp/ccvzLe3h.s page 17 120 .loc 1 200 6 view .LVU23 @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 162 005a 43F00103 orr r3, r3, #1 163 005e 1360 str r3, [r2] 226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } - ARM GAS /tmp/cc5ct5Ve.s page 18 + ARM GAS /tmp/ccvzLe3h.s page 18 164 .loc 1 226 3 is_stmt 1 view .LVU36 @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 210 .thumb 211 .thumb_func 213 HAL_UARTEx_EnableClockStopMode: - ARM GAS /tmp/cc5ct5Ve.s page 19 + ARM GAS /tmp/ccvzLe3h.s page 19 214 .LVL15: @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and - ARM GAS /tmp/cc5ct5Ve.s page 20 + ARM GAS /tmp/ccvzLe3h.s page 20 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE - ARM GAS /tmp/cc5ct5Ve.s page 21 + ARM GAS /tmp/ccvzLe3h.s page 21 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/cc5ct5Ve.s page 22 + ARM GAS /tmp/ccvzLe3h.s page 22 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/cc5ct5Ve.s page 23 + ARM GAS /tmp/ccvzLe3h.s page 23 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - ARM GAS /tmp/cc5ct5Ve.s page 24 + ARM GAS /tmp/ccvzLe3h.s page 24 250:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 304:Drivers/CMSIS/Include/cmsis_gcc.h **** 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/cc5ct5Ve.s page 25 + ARM GAS /tmp/ccvzLe3h.s page 25 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } 363:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cc5ct5Ve.s page 26 + ARM GAS /tmp/ccvzLe3h.s page 26 364:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) - ARM GAS /tmp/cc5ct5Ve.s page 27 + ARM GAS /tmp/ccvzLe3h.s page 27 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/cc5ct5Ve.s page 28 + ARM GAS /tmp/ccvzLe3h.s page 28 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } 534:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cc5ct5Ve.s page 29 + ARM GAS /tmp/ccvzLe3h.s page 29 535:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/cc5ct5Ve.s page 30 + ARM GAS /tmp/ccvzLe3h.s page 30 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } 647:Drivers/CMSIS/Include/cmsis_gcc.h **** 648:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cc5ct5Ve.s page 31 + ARM GAS /tmp/ccvzLe3h.s page 31 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI - ARM GAS /tmp/cc5ct5Ve.s page 32 + ARM GAS /tmp/ccvzLe3h.s page 32 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 760:Drivers/CMSIS/Include/cmsis_gcc.h **** 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR - ARM GAS /tmp/cc5ct5Ve.s page 33 + ARM GAS /tmp/ccvzLe3h.s page 33 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 818:Drivers/CMSIS/Include/cmsis_gcc.h **** 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. - ARM GAS /tmp/cc5ct5Ve.s page 34 + ARM GAS /tmp/ccvzLe3h.s page 34 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/cc5ct5Ve.s page 35 + ARM GAS /tmp/ccvzLe3h.s page 35 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/cc5ct5Ve.s page 36 + ARM GAS /tmp/ccvzLe3h.s page 36 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ - ARM GAS /tmp/cc5ct5Ve.s page 37 + ARM GAS /tmp/ccvzLe3h.s page 37 991:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/cc5ct5Ve.s page 38 + ARM GAS /tmp/ccvzLe3h.s page 38 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** 1077:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit) - ARM GAS /tmp/cc5ct5Ve.s page 39 + ARM GAS /tmp/ccvzLe3h.s page 39 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values. @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 274 001e 42E80031 strex r1, r3, [r2] 275 @ 0 "" 2 276 .LVL21: - ARM GAS /tmp/cc5ct5Ve.s page 40 + ARM GAS /tmp/ccvzLe3h.s page 40 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* Process Locked */ 321 .loc 1 322 1 is_stmt 1 view -0 322 .cfi_startproc - ARM GAS /tmp/cc5ct5Ve.s page 41 + ARM GAS /tmp/ccvzLe3h.s page 41 323 @ args = 0, pretend = 0, frame = 0 @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** 363 .loc 1 327 3 discriminator 1 view .LVU95 364 0018 23F40003 bic r3, r3, #8388608 - ARM GAS /tmp/cc5ct5Ve.s page 42 + ARM GAS /tmp/ccvzLe3h.s page 42 365 .LVL30: @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 405 .LVL35: 406 .L21: 324:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** - ARM GAS /tmp/cc5ct5Ve.s page 43 + ARM GAS /tmp/ccvzLe3h.s page 43 407 .loc 1 324 3 discriminator 1 view .LVU112 @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 452 0014 1868 ldr r0, [r3] 453 0016 4268 ldr r2, [r0, #4] 454 0018 22F01002 bic r2, r2, #16 - ARM GAS /tmp/cc5ct5Ve.s page 44 + ARM GAS /tmp/ccvzLe3h.s page 44 455 001c 1143 orrs r1, r1, r2 @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 502 .cfi_def_cfa_offset 8 503 .cfi_offset 4, -8 504 .cfi_offset 14, -4 - ARM GAS /tmp/cc5ct5Ve.s page 45 + ARM GAS /tmp/ccvzLe3h.s page 45 505 0002 84B0 sub sp, sp, #16 @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 545 .L31: 417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** 546 .loc 1 417 3 is_stmt 1 view .LVU147 - ARM GAS /tmp/cc5ct5Ve.s page 46 + ARM GAS /tmp/ccvzLe3h.s page 46 547 0038 2268 ldr r2, [r4] @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** 590 .loc 1 434 3 is_stmt 1 view .LVU159 434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** - ARM GAS /tmp/cc5ct5Ve.s page 47 + ARM GAS /tmp/ccvzLe3h.s page 47 591 .loc 1 434 3 view .LVU160 @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 638 0008 0123 movs r3, #1 639 000a 80F87830 strb r3, [r0, #120] 640 .L39: - ARM GAS /tmp/cc5ct5Ve.s page 48 + ARM GAS /tmp/ccvzLe3h.s page 48 448:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 680 .LVL61: 681 .loc 2 1124 4 view .LVU185 682 .loc 2 1124 4 is_stmt 0 view .LVU186 - ARM GAS /tmp/cc5ct5Ve.s page 49 + ARM GAS /tmp/ccvzLe3h.s page 49 683 .thumb @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 727 @ args = 0, pretend = 0, frame = 0 728 @ frame_needed = 0, uses_anonymous_args = 0 729 @ link register save eliminated. - ARM GAS /tmp/cc5ct5Ve.s page 50 + ARM GAS /tmp/ccvzLe3h.s page 50 467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 769 .LBI50: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { 770 .loc 2 1119 31 view .LVU214 - ARM GAS /tmp/cc5ct5Ve.s page 51 + ARM GAS /tmp/ccvzLe3h.s page 51 771 .LBB51: @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 813 .section .text.HAL_UARTEx_ReceiveToIdle,"ax",%progbits 814 .align 1 815 .global HAL_UARTEx_ReceiveToIdle - ARM GAS /tmp/cc5ct5Ve.s page 52 + ARM GAS /tmp/ccvzLe3h.s page 52 816 .syntax unified @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 860 001e 01D1 bne .L68 509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } 861 .loc 1 509 15 view .LVU241 - ARM GAS /tmp/cc5ct5Ve.s page 53 + ARM GAS /tmp/ccvzLe3h.s page 53 862 0020 0120 movs r0, #1 @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 898 .loc 1 524 5 is_stmt 1 view .LVU259 524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** uhMask = huart->Mask; 899 .loc 1 524 5 view .LVU260 - ARM GAS /tmp/cc5ct5Ve.s page 54 + ARM GAS /tmp/ccvzLe3h.s page 54 900 0044 A368 ldr r3, [r4, #8] @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 942 .LVL82: 528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { 943 .loc 1 528 5 is_stmt 1 view .LVU273 - ARM GAS /tmp/cc5ct5Ve.s page 55 + ARM GAS /tmp/ccvzLe3h.s page 55 528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 984 .loc 1 530 19 view .LVU287 985 00b8 0027 movs r7, #0 986 .LVL86: - ARM GAS /tmp/cc5ct5Ve.s page 56 + ARM GAS /tmp/ccvzLe3h.s page 56 530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** pdata16bits = (uint16_t *) pData; @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 1024 00e0 013B subs r3, r3, #1 1025 00e2 9BB2 uxth r3, r3 1026 00e4 A4F85A30 strh r3, [r4, #90] @ movhi - ARM GAS /tmp/cc5ct5Ve.s page 57 + ARM GAS /tmp/ccvzLe3h.s page 57 1027 .L57: @@ -3418,7 +3418,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 1064 .loc 1 565 12 is_stmt 0 view .LVU321 1065 0114 002F cmp r7, #0 1066 0116 D8D0 beq .L75 - ARM GAS /tmp/cc5ct5Ve.s page 58 + ARM GAS /tmp/ccvzLe3h.s page 58 572:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** pdata8bits++; @@ -3478,7 +3478,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 593:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */ 1104 .loc 1 593 19 is_stmt 0 view .LVU339 1105 0140 B4F85830 ldrh r3, [r4, #88] - ARM GAS /tmp/cc5ct5Ve.s page 59 + ARM GAS /tmp/ccvzLe3h.s page 59 593:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */ @@ -3538,7 +3538,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { 1149 .loc 1 624 12 is_stmt 0 view .LVU353 1150 0000 D0F88030 ldr r3, [r0, #128] - ARM GAS /tmp/cc5ct5Ve.s page 60 + ARM GAS /tmp/ccvzLe3h.s page 60 624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** { @@ -3598,7 +3598,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 1190 .loc 1 637 8 view .LVU368 1191 0026 012B cmp r3, #1 1192 0028 01D0 beq .L88 - ARM GAS /tmp/cc5ct5Ve.s page 61 + ARM GAS /tmp/ccvzLe3h.s page 61 648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } @@ -3658,7 +3658,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 640:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** } 1233 .loc 1 640 7 is_stmt 1 discriminator 1 view .LVU383 1234 .LBB55: - ARM GAS /tmp/cc5ct5Ve.s page 62 + ARM GAS /tmp/ccvzLe3h.s page 62 1235 .LBI55: @@ -3718,7 +3718,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 1283 .LVL105: 1284 .LFB150: 677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** HAL_StatusTypeDef status; - ARM GAS /tmp/cc5ct5Ve.s page 63 + ARM GAS /tmp/ccvzLe3h.s page 63 1285 .loc 1 677 1 is_stmt 1 view -0 @@ -3778,7 +3778,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 1325 .loc 1 692 5 is_stmt 1 view .LVU408 692:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** 1326 .loc 1 692 15 is_stmt 0 view .LVU409 - ARM GAS /tmp/cc5ct5Ve.s page 64 + ARM GAS /tmp/ccvzLe3h.s page 64 1327 0020 FFF7FEFF bl UART_Start_Receive_DMA @@ -3838,7 +3838,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 1365 .syntax unified 1366 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1367 003a 52E8003F ldrex r3, [r2] - ARM GAS /tmp/cc5ct5Ve.s page 65 + ARM GAS /tmp/ccvzLe3h.s page 65 1368 @ 0 "" 2 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** 1412 .loc 1 718 1 view .LVU438 1413 004e 7047 bx lr - ARM GAS /tmp/cc5ct5Ve.s page 66 + ARM GAS /tmp/ccvzLe3h.s page 66 1414 .cfi_endproc @@ -3939,35 +3939,35 @@ ARM GAS /tmp/cc5ct5Ve.s page 1 1448 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" 1449 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h" 1450 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/cc5ct5Ve.s page 67 + ARM GAS /tmp/ccvzLe3h.s page 67 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_uart_ex.c - /tmp/cc5ct5Ve.s:20 .text.UARTEx_Wakeup_AddressConfig:00000000 $t - /tmp/cc5ct5Ve.s:25 .text.UARTEx_Wakeup_AddressConfig:00000000 UARTEx_Wakeup_AddressConfig - /tmp/cc5ct5Ve.s:64 .text.HAL_RS485Ex_Init:00000000 $t - /tmp/cc5ct5Ve.s:70 .text.HAL_RS485Ex_Init:00000000 HAL_RS485Ex_Init - /tmp/cc5ct5Ve.s:207 .text.HAL_UARTEx_EnableClockStopMode:00000000 $t - /tmp/cc5ct5Ve.s:213 .text.HAL_UARTEx_EnableClockStopMode:00000000 HAL_UARTEx_EnableClockStopMode - /tmp/cc5ct5Ve.s:312 .text.HAL_UARTEx_DisableClockStopMode:00000000 $t - /tmp/cc5ct5Ve.s:318 .text.HAL_UARTEx_DisableClockStopMode:00000000 HAL_UARTEx_DisableClockStopMode - /tmp/cc5ct5Ve.s:416 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 $t - /tmp/cc5ct5Ve.s:422 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 HAL_MultiProcessorEx_AddressLength_Set - /tmp/cc5ct5Ve.s:486 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 $t - /tmp/cc5ct5Ve.s:492 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 HAL_UARTEx_StopModeWakeUpSourceConfig - /tmp/cc5ct5Ve.s:618 .text.HAL_UARTEx_EnableStopMode:00000000 $t - /tmp/cc5ct5Ve.s:624 .text.HAL_UARTEx_EnableStopMode:00000000 HAL_UARTEx_EnableStopMode - /tmp/cc5ct5Ve.s:716 .text.HAL_UARTEx_DisableStopMode:00000000 $t - /tmp/cc5ct5Ve.s:722 .text.HAL_UARTEx_DisableStopMode:00000000 HAL_UARTEx_DisableStopMode - /tmp/cc5ct5Ve.s:814 .text.HAL_UARTEx_ReceiveToIdle:00000000 $t - /tmp/cc5ct5Ve.s:820 .text.HAL_UARTEx_ReceiveToIdle:00000000 HAL_UARTEx_ReceiveToIdle - /tmp/cc5ct5Ve.s:1134 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 $t - /tmp/cc5ct5Ve.s:1140 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 HAL_UARTEx_ReceiveToIdle_IT - /tmp/cc5ct5Ve.s:1276 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 $t - /tmp/cc5ct5Ve.s:1282 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 HAL_UARTEx_ReceiveToIdle_DMA - /tmp/cc5ct5Ve.s:1418 .text.HAL_UARTEx_GetRxEventType:00000000 $t - /tmp/cc5ct5Ve.s:1424 .text.HAL_UARTEx_GetRxEventType:00000000 HAL_UARTEx_GetRxEventType + /tmp/ccvzLe3h.s:20 .text.UARTEx_Wakeup_AddressConfig:00000000 $t + /tmp/ccvzLe3h.s:25 .text.UARTEx_Wakeup_AddressConfig:00000000 UARTEx_Wakeup_AddressConfig + /tmp/ccvzLe3h.s:64 .text.HAL_RS485Ex_Init:00000000 $t + /tmp/ccvzLe3h.s:70 .text.HAL_RS485Ex_Init:00000000 HAL_RS485Ex_Init + /tmp/ccvzLe3h.s:207 .text.HAL_UARTEx_EnableClockStopMode:00000000 $t + /tmp/ccvzLe3h.s:213 .text.HAL_UARTEx_EnableClockStopMode:00000000 HAL_UARTEx_EnableClockStopMode + /tmp/ccvzLe3h.s:312 .text.HAL_UARTEx_DisableClockStopMode:00000000 $t + /tmp/ccvzLe3h.s:318 .text.HAL_UARTEx_DisableClockStopMode:00000000 HAL_UARTEx_DisableClockStopMode + /tmp/ccvzLe3h.s:416 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 $t + /tmp/ccvzLe3h.s:422 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 HAL_MultiProcessorEx_AddressLength_Set + /tmp/ccvzLe3h.s:486 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 $t + /tmp/ccvzLe3h.s:492 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 HAL_UARTEx_StopModeWakeUpSourceConfig + /tmp/ccvzLe3h.s:618 .text.HAL_UARTEx_EnableStopMode:00000000 $t + /tmp/ccvzLe3h.s:624 .text.HAL_UARTEx_EnableStopMode:00000000 HAL_UARTEx_EnableStopMode + /tmp/ccvzLe3h.s:716 .text.HAL_UARTEx_DisableStopMode:00000000 $t + /tmp/ccvzLe3h.s:722 .text.HAL_UARTEx_DisableStopMode:00000000 HAL_UARTEx_DisableStopMode + /tmp/ccvzLe3h.s:814 .text.HAL_UARTEx_ReceiveToIdle:00000000 $t + /tmp/ccvzLe3h.s:820 .text.HAL_UARTEx_ReceiveToIdle:00000000 HAL_UARTEx_ReceiveToIdle + /tmp/ccvzLe3h.s:1134 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 $t + /tmp/ccvzLe3h.s:1140 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 HAL_UARTEx_ReceiveToIdle_IT + /tmp/ccvzLe3h.s:1276 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 $t + /tmp/ccvzLe3h.s:1282 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 HAL_UARTEx_ReceiveToIdle_DMA + /tmp/ccvzLe3h.s:1418 .text.HAL_UARTEx_GetRxEventType:00000000 $t + /tmp/ccvzLe3h.s:1424 .text.HAL_UARTEx_GetRxEventType:00000000 HAL_UARTEx_GetRxEventType UNDEFINED SYMBOLS UART_SetConfig diff --git a/build/stm32f7xx_hal_uart_ex.o b/build/stm32f7xx_hal_uart_ex.o index 32e4fa312e8134191b8d2be8acf2f6c50c971407..cf4bb2c090dfef544e6cd8d79dad84e4165b1433 100644 GIT binary patch delta 236 zcmaEJn(@eK#t90HF&h;-*qEMkOkT})l+k8#A^Ubl?a7)PUW`JUOE}V)7*9;T%_Ymo zGWjQ0Iny7G$wk~Xf?qfo7&tAtqZk+%n3UNVn6GU9&%KS4QDyQrQGG_0&Cf*nmHARj zi}DK+^<7envrF;|Hfvi(sx$p@nB0~yk5Oi_YN9_-b!p;!poOAI{)|48Q-Ng2<{IISX0<0006b1^@&6v;PaW2?0!#wiPb{Ota<{4U+yZ**^NX=7hgbz*a6a%N#;WnXe(WMOhIM`dnha$$6Da$itG zLbC%oStkM{L6cr!o&iLY{a{Z4Op{Gvp8;f(?O{&=bdx<|PXTCR1, TIM_CR1_UDIS); 1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccqZqdXP.s page 40 + ARM GAS /tmp/ccMf3LkY.s page 40 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode) 1417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccqZqdXP.s page 41 + ARM GAS /tmp/ccMf3LkY.s page 41 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx) 1474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccqZqdXP.s page 42 + ARM GAS /tmp/ccMf3LkY.s page 42 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t counter_mode; @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 - ARM GAS /tmp/ccqZqdXP.s page 43 + ARM GAS /tmp/ccMf3LkY.s page 43 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetDirection 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccqZqdXP.s page 44 + ARM GAS /tmp/ccMf3LkY.s page 44 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_UP @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 1644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. 1645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccqZqdXP.s page 45 + ARM GAS /tmp/ccMf3LkY.s page 45 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx) 1701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); - ARM GAS /tmp/ccqZqdXP.s page 46 + ARM GAS /tmp/ccMf3LkY.s page 46 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx) 1758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL); - ARM GAS /tmp/ccqZqdXP.s page 47 + ARM GAS /tmp/ccMf3LkY.s page 47 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_1 1815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_2 1816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_3 - ARM GAS /tmp/ccqZqdXP.s page 48 + ARM GAS /tmp/ccMf3LkY.s page 48 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 1872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 - ARM GAS /tmp/ccqZqdXP.s page 49 + ARM GAS /tmp/ccMf3LkY.s page 49 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_ConfigOutput\n 1929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_ConfigOutput\n 1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_ConfigOutput\n - ARM GAS /tmp/ccqZqdXP.s page 50 + ARM GAS /tmp/ccMf3LkY.s page 50 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_ConfigOutput\n @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE 1986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1 1987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2 - ARM GAS /tmp/ccqZqdXP.s page 51 + ARM GAS /tmp/ccMf3LkY.s page 51 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1 @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the polarity of an output channel. 2044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n - ARM GAS /tmp/ccqZqdXP.s page 52 + ARM GAS /tmp/ccMf3LkY.s page 52 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_SetPolarity\n @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW 2100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) - ARM GAS /tmp/ccqZqdXP.s page 53 + ARM GAS /tmp/ccMf3LkY.s page 53 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N - ARM GAS /tmp/ccqZqdXP.s page 54 + ARM GAS /tmp/ccMf3LkY.s page 54 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 - ARM GAS /tmp/ccqZqdXP.s page 55 + ARM GAS /tmp/ccMf3LkY.s page 55 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 56 + ARM GAS /tmp/ccMf3LkY.s page 56 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]; 2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); 2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccqZqdXP.s page 57 + ARM GAS /tmp/ccMf3LkY.s page 57 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccqZqdXP.s page 58 + ARM GAS /tmp/ccMf3LkY.s page 58 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates clearing the output channel on an external event is enabled for the output ch @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 59 + ARM GAS /tmp/ccMf3LkY.s page 59 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccqZqdXP.s page 60 + ARM GAS /tmp/ccMf3LkY.s page 60 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 5 (TIMx_CCR5). @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); - ARM GAS /tmp/ccqZqdXP.s page 61 + ARM GAS /tmp/ccMf3LkY.s page 61 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx) 2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccqZqdXP.s page 62 + ARM GAS /tmp/ccMf3LkY.s page 62 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR6)); @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 - ARM GAS /tmp/ccqZqdXP.s page 63 + ARM GAS /tmp/ccMf3LkY.s page 63 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccqZqdXP.s page 64 + ARM GAS /tmp/ccMf3LkY.s page 64 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) 2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccqZqdXP.s page 65 + ARM GAS /tmp/ccMf3LkY.s page 65 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 - ARM GAS /tmp/ccqZqdXP.s page 66 + ARM GAS /tmp/ccMf3LkY.s page 66 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n 2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n 2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n - ARM GAS /tmp/ccqZqdXP.s page 67 + ARM GAS /tmp/ccMf3LkY.s page 67 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_GetPolarity\n @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 68 + ARM GAS /tmp/ccMf3LkY.s page 68 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx) @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 4. 3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF 3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check - ARM GAS /tmp/ccqZqdXP.s page 69 + ARM GAS /tmp/ccMf3LkY.s page 69 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) 3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); - ARM GAS /tmp/ccqZqdXP.s page 70 + ARM GAS /tmp/ccMf3LkY.s page 70 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput 3126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TimerSynchronization This parameter can be one of the following values: - ARM GAS /tmp/ccqZqdXP.s page 71 + ARM GAS /tmp/ccMf3LkY.s page 71 3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_RESET @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_GATED 3183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_TRIGGER 3184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER - ARM GAS /tmp/ccqZqdXP.s page 72 + ARM GAS /tmp/ccMf3LkY.s page 72 3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled. - ARM GAS /tmp/ccqZqdXP.s page 73 + ARM GAS /tmp/ccMf3LkY.s page 73 3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration - ARM GAS /tmp/ccqZqdXP.s page 74 + ARM GAS /tmp/ccMf3LkY.s page 74 3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8 3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 75 + ARM GAS /tmp/ccMf3LkY.s page 75 3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity, @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6 3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8 3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5 - ARM GAS /tmp/ccqZqdXP.s page 76 + ARM GAS /tmp/ccMf3LkY.s page 76 3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6 @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled. - ARM GAS /tmp/ccqZqdXP.s page 77 + ARM GAS /tmp/ccMf3LkY.s page 77 3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT) 3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input. - ARM GAS /tmp/ccqZqdXP.s page 78 + ARM GAS /tmp/ccMf3LkY.s page 78 3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN 3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2 3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values: - ARM GAS /tmp/ccqZqdXP.s page 79 + ARM GAS /tmp/ccMf3LkY.s page 79 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values: 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS - ARM GAS /tmp/ccqZqdXP.s page 80 + ARM GAS /tmp/ccMf3LkY.s page 80 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO 3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI 3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE - ARM GAS /tmp/ccqZqdXP.s page 81 + ARM GAS /tmp/ccMf3LkY.s page 81 3698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_RTC @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 511 .LBE59: 512 .LBE58: 384:Src/stm32f7xx_it.c **** { - ARM GAS /tmp/ccqZqdXP.s page 82 + ARM GAS /tmp/ccMf3LkY.s page 82 385:Src/stm32f7xx_it.c **** LL_TIM_ClearFlag_UPDATE(TIM6); @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 393:Src/stm32f7xx_it.c **** 394:Src/stm32f7xx_it.c **** /** 395:Src/stm32f7xx_it.c **** * @brief This function handles TIM7 global interrupt. - ARM GAS /tmp/ccqZqdXP.s page 83 + ARM GAS /tmp/ccMf3LkY.s page 83 396:Src/stm32f7xx_it.c **** */ @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 597 0016 0133 adds r3, r3, #1 598 0018 1360 str r3, [r2] 599 .L44: - ARM GAS /tmp/ccqZqdXP.s page 84 + ARM GAS /tmp/ccMf3LkY.s page 84 407:Src/stm32f7xx_it.c **** //1 ms or 1000 Hz @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 626 .cfi_def_cfa_offset 4 627 .cfi_offset 4, -4 437:Src/stm32f7xx_it.c **** uart_buf = LL_USART_ReceiveData8(USART1); - ARM GAS /tmp/ccqZqdXP.s page 85 + ARM GAS /tmp/ccMf3LkY.s page 85 628 .loc 1 437 5 view .LVU105 @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private macros ------------------------------------------------------------*/ 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER) - ARM GAS /tmp/ccqZqdXP.s page 86 + ARM GAS /tmp/ccMf3LkY.s page 86 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Private_Macros USART Private Macros @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8. 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_OVERSA - ARM GAS /tmp/ccqZqdXP.s page 87 + ARM GAS /tmp/ccMf3LkY.s page 87 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_PECF USART_ICR_PECF /*!< Parity error cle - ARM GAS /tmp/ccqZqdXP.s page 88 + ARM GAS /tmp/ccMf3LkY.s page 88 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_FECF USART_ICR_FECF /*!< Framing error cl @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT) 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TCBGT USART_ISR_TCBGT /*!< Transmission com 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */ - ARM GAS /tmp/ccqZqdXP.s page 89 + ARM GAS /tmp/ccMf3LkY.s page 89 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute - ARM GAS /tmp/ccqZqdXP.s page 90 + ARM GAS /tmp/ccMf3LkY.s page 90 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK - ARM GAS /tmp/ccqZqdXP.s page 91 + ARM GAS /tmp/ccMf3LkY.s page 91 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCL @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/rece 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/rece - ARM GAS /tmp/ccqZqdXP.s page 92 + ARM GAS /tmp/ccMf3LkY.s page 92 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 93 + ARM GAS /tmp/ccMf3LkY.s page 93 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Register value 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) - ARM GAS /tmp/ccqZqdXP.s page 94 + ARM GAS /tmp/ccMf3LkY.s page 94 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccqZqdXP.s page 95 + ARM GAS /tmp/ccMf3LkY.s page 95 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART Disable (all USART prescalers and outputs are disabled) @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if USART is enabled in STOP Mode (able to wake up MCU from Stop mode or not) 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccqZqdXP.s page 96 + ARM GAS /tmp/ccMf3LkY.s page 96 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx) 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE); - ARM GAS /tmp/ccqZqdXP.s page 97 + ARM GAS /tmp/ccMf3LkY.s page 97 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return enabled/disabled states of Transmitter and Receiver 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RE LL_USART_GetTransferDirection\n 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 TE LL_USART_GetTransferDirection - ARM GAS /tmp/ccqZqdXP.s page 98 + ARM GAS /tmp/ccMf3LkY.s page 98 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method) 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccqZqdXP.s page 99 + ARM GAS /tmp/ccMf3LkY.s page 99 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method); @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_MME); 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccqZqdXP.s page 100 + ARM GAS /tmp/ccMf3LkY.s page 100 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param LastBitClockPulse This parameter can be one of the following values: - ARM GAS /tmp/ccqZqdXP.s page 101 + ARM GAS /tmp/ccMf3LkY.s page 101 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT @@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccqZqdXP.s page 102 + ARM GAS /tmp/ccMf3LkY.s page 102 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode @@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCP 1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccqZqdXP.s page 103 + ARM GAS /tmp/ccMf3LkY.s page 103 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccqZqdXP.s page 104 + ARM GAS /tmp/ccMf3LkY.s page 104 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve the length of the stop bits @@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXRX_SWAPPED 1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 105 + ARM GAS /tmp/ccMf3LkY.s page 105 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig) @@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod) 1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod); - ARM GAS /tmp/ccqZqdXP.s page 106 + ARM GAS /tmp/ccMf3LkY.s page 106 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder) 1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccqZqdXP.s page 107 + ARM GAS /tmp/ccMf3LkY.s page 107 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder); @@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL); 1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccqZqdXP.s page 108 + ARM GAS /tmp/ccMf3LkY.s page 108 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN); 1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccqZqdXP.s page 109 + ARM GAS /tmp/ccMf3LkY.s page 109 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) - ARM GAS /tmp/ccqZqdXP.s page 110 + ARM GAS /tmp/ccMf3LkY.s page 110 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ADDM7 LL_USART_GetNodeAddressLen @@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl 1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccqZqdXP.s page 111 + ARM GAS /tmp/ccMf3LkY.s page 111 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable One bit sampling method 1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp - ARM GAS /tmp/ccqZqdXP.s page 112 + ARM GAS /tmp/ccMf3LkY.s page 112 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits) 1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccqZqdXP.s page 113 + ARM GAS /tmp/ccMf3LkY.s page 113 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. @@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if (OverSampling == LL_USART_OVERSAMPLING_8) 1647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate)); - ARM GAS /tmp/ccqZqdXP.s page 114 + ARM GAS /tmp/ccMf3LkY.s page 114 1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrtemp = usartdiv & 0xFFF0U; @@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR RTO LL_USART_SetRxTimeout 1704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Timeout Value between Min_Data=0x00 and Max_Data=0x00FFFFFF - ARM GAS /tmp/ccqZqdXP.s page 115 + ARM GAS /tmp/ccMf3LkY.s page 115 1706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 116 + ARM GAS /tmp/ccMf3LkY.s page 116 1763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx) @@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_IRDA_POWER_NORMAL 1818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE 1819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 117 + ARM GAS /tmp/ccMf3LkY.s page 117 1820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(const USART_TypeDef *USARTx) @@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Smartcard NACK transmission - ARM GAS /tmp/ccqZqdXP.s page 118 + ARM GAS /tmp/ccMf3LkY.s page 118 1877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard 1932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccqZqdXP.s page 119 + ARM GAS /tmp/ccMf3LkY.s page 119 1934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Smartcard prescaler value, used for dividing the USART clock 1989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * source to provide the SMARTCARD Clock (5 bits value) 1990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not - ARM GAS /tmp/ccqZqdXP.s page 120 + ARM GAS /tmp/ccMf3LkY.s page 120 1991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. @@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx) 2047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccqZqdXP.s page 121 + ARM GAS /tmp/ccMf3LkY.s page 121 2048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_HDSEL); @@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return LIN Break Detection Length 2103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. - ARM GAS /tmp/ccqZqdXP.s page 122 + ARM GAS /tmp/ccMf3LkY.s page 122 2105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen @@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature 2160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 2161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 123 + ARM GAS /tmp/ccMf3LkY.s page 123 2162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Driver Enable (DE) Mode - ARM GAS /tmp/ccqZqdXP.s page 124 + ARM GAS /tmp/ccMf3LkY.s page 124 2219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not @@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Driver Enable Polarity 2274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance. - ARM GAS /tmp/ccqZqdXP.s page 125 + ARM GAS /tmp/ccMf3LkY.s page 125 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DEP LL_USART_GetDESignalPolarity @@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Synchronous Mode 2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In Synchronous mode, the following bits must be kept cleared: - ARM GAS /tmp/ccqZqdXP.s page 126 + ARM GAS /tmp/ccMf3LkY.s page 126 2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, @@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using 2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n - ARM GAS /tmp/ccqZqdXP.s page 127 + ARM GAS /tmp/ccMf3LkY.s page 127 2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigLINMode\n @@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN)); 2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Half Duplex mode */ 2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_HDSEL); - ARM GAS /tmp/ccqZqdXP.s page 128 + ARM GAS /tmp/ccMf3LkY.s page 128 2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not 2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. 2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : - ARM GAS /tmp/ccqZqdXP.s page 129 + ARM GAS /tmp/ccMf3LkY.s page 129 2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function @@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 130 + ARM GAS /tmp/ccMf3LkY.s page 130 2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx) @@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 131 + ARM GAS /tmp/ccMf3LkY.s page 131 2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx) @@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 132 + ARM GAS /tmp/ccMf3LkY.s page 132 2675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx) @@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Auto-Baud Rate Error Flag is set or not - ARM GAS /tmp/ccqZqdXP.s page 133 + ARM GAS /tmp/ccMf3LkY.s page 133 2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or @@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL); 2787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccqZqdXP.s page 134 + ARM GAS /tmp/ccMf3LkY.s page 134 2789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not 2845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TCBGT LL_USART_IsActiveFlag_TCBGT - ARM GAS /tmp/ccqZqdXP.s page 135 + ARM GAS /tmp/ccMf3LkY.s page 135 2846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear IDLE line detected Flag 2901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR IDLECF LL_USART_ClearFlag_IDLE 2902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccqZqdXP.s page 136 + ARM GAS /tmp/ccMf3LkY.s page 136 2903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_CTSCF); 2959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccqZqdXP.s page 137 + ARM GAS /tmp/ccMf3LkY.s page 137 2960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 3015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccqZqdXP.s page 138 + ARM GAS /tmp/ccMf3LkY.s page 138 3017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_IT_Management IT_Management @@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx) 3072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE); - ARM GAS /tmp/ccqZqdXP.s page 139 + ARM GAS /tmp/ccMf3LkY.s page 139 3074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 0: Interrupt is inhibited 3129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register. 3130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR - ARM GAS /tmp/ccqZqdXP.s page 140 + ARM GAS /tmp/ccMf3LkY.s page 140 3131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable IDLE Interrupt 3187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE - ARM GAS /tmp/ccqZqdXP.s page 141 + ARM GAS /tmp/ccMf3LkY.s page 141 3188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 CMIE LL_USART_DisableIT_CM 3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccqZqdXP.s page 142 + ARM GAS /tmp/ccMf3LkY.s page 142 3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); 3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccqZqdXP.s page 143 + ARM GAS /tmp/ccMf3LkY.s page 143 3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL); 3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccqZqdXP.s page 144 + ARM GAS /tmp/ccMf3LkY.s page 144 3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccqZqdXP.s page 145 + ARM GAS /tmp/ccMf3LkY.s page 145 3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receiver Timeout Interrupt is enabled or disabled. @@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx) 3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccqZqdXP.s page 146 + ARM GAS /tmp/ccMf3LkY.s page 146 3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL); @@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable DMA Mode for reception - ARM GAS /tmp/ccqZqdXP.s page 147 + ARM GAS /tmp/ccMf3LkY.s page 147 3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX @@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Disabling on Reception Error 3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DDRE LL_USART_EnableDMADeactOnRxErr 3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccqZqdXP.s page 148 + ARM GAS /tmp/ccMf3LkY.s page 148 3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return data_reg_addr; 3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccqZqdXP.s page 149 + ARM GAS /tmp/ccMf3LkY.s page 149 3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -8902,7 +8902,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 3660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU); 635 .loc 3 3660 3 view .LVU107 636 .loc 3 3660 20 is_stmt 0 view .LVU108 - 637 0002 9D4B ldr r3, .L106 + 637 0002 9A4B ldr r3, .L116 638 0004 5A6A ldr r2, [r3, #36] 639 .loc 3 3660 10 view .LVU109 640 0006 D2B2 uxtb r2, r2 @@ -8911,51 +8911,51 @@ ARM GAS /tmp/ccqZqdXP.s page 1 643 .LBE67: 644 .LBE66: 645 .loc 1 437 14 discriminator 1 view .LVU111 - 646 0008 9C4B ldr r3, .L106+4 + 646 0008 994B ldr r3, .L116+4 647 000a 1A70 strb r2, [r3] 438:Src/stm32f7xx_it.c **** switch (UART_rec_incr) 648 .loc 1 438 5 is_stmt 1 view .LVU112 - 649 000c 9C4B ldr r3, .L106+8 + 649 000c 994B ldr r3, .L116+8 650 000e 1B88 ldrh r3, [r3] 651 0010 1F2B cmp r3, #31 - 652 0012 00F2DC81 bhi .L49 + 652 0012 00F22B82 bhi .L49 653 0016 DFE813F0 tbh [pc, r3, lsl #1] 654 .L51: 655 001a 2000 .2byte (.L55-.L51)/2 656 001c 2F00 .2byte (.L54-.L51)/2 - 657 001e DA01 .2byte (.L49-.L51)/2 - 658 0020 DA01 .2byte (.L49-.L51)/2 - 659 0022 DA01 .2byte (.L49-.L51)/2 - 660 0024 DA01 .2byte (.L49-.L51)/2 - 661 0026 DA01 .2byte (.L49-.L51)/2 - 662 0028 DA01 .2byte (.L49-.L51)/2 - 663 002a DA01 .2byte (.L49-.L51)/2 - 664 002c B700 .2byte (.L53-.L51)/2 - 665 002e DA01 .2byte (.L49-.L51)/2 - 666 0030 DA01 .2byte (.L49-.L51)/2 - 667 0032 DA01 .2byte (.L49-.L51)/2 - 668 0034 DA01 .2byte (.L49-.L51)/2 - 669 0036 DA01 .2byte (.L49-.L51)/2 - 670 0038 DA01 .2byte (.L49-.L51)/2 - 671 003a DA01 .2byte (.L49-.L51)/2 - ARM GAS /tmp/ccqZqdXP.s page 150 + 657 001e 2902 .2byte (.L49-.L51)/2 + 658 0020 2902 .2byte (.L49-.L51)/2 + 659 0022 2902 .2byte (.L49-.L51)/2 + 660 0024 2902 .2byte (.L49-.L51)/2 + 661 0026 2902 .2byte (.L49-.L51)/2 + 662 0028 2902 .2byte (.L49-.L51)/2 + 663 002a 2902 .2byte (.L49-.L51)/2 + 664 002c C700 .2byte (.L53-.L51)/2 + 665 002e 2902 .2byte (.L49-.L51)/2 + 666 0030 2902 .2byte (.L49-.L51)/2 + 667 0032 2902 .2byte (.L49-.L51)/2 + 668 0034 2902 .2byte (.L49-.L51)/2 + 669 0036 2902 .2byte (.L49-.L51)/2 + 670 0038 2902 .2byte (.L49-.L51)/2 + 671 003a 2902 .2byte (.L49-.L51)/2 + ARM GAS /tmp/ccMf3LkY.s page 150 - 672 003c DA01 .2byte (.L49-.L51)/2 - 673 003e DA01 .2byte (.L49-.L51)/2 - 674 0040 DA01 .2byte (.L49-.L51)/2 - 675 0042 DA01 .2byte (.L49-.L51)/2 - 676 0044 DA01 .2byte (.L49-.L51)/2 - 677 0046 DA01 .2byte (.L49-.L51)/2 - 678 0048 DA01 .2byte (.L49-.L51)/2 - 679 004a DA01 .2byte (.L49-.L51)/2 - 680 004c DA01 .2byte (.L49-.L51)/2 - 681 004e DA01 .2byte (.L49-.L51)/2 - 682 0050 DA01 .2byte (.L49-.L51)/2 - 683 0052 DA01 .2byte (.L49-.L51)/2 - 684 0054 6601 .2byte (.L52-.L51)/2 - 685 0056 DA01 .2byte (.L49-.L51)/2 - 686 0058 A001 .2byte (.L50-.L51)/2 + 672 003c 2902 .2byte (.L49-.L51)/2 + 673 003e 2902 .2byte (.L49-.L51)/2 + 674 0040 2902 .2byte (.L49-.L51)/2 + 675 0042 2902 .2byte (.L49-.L51)/2 + 676 0044 2902 .2byte (.L49-.L51)/2 + 677 0046 2902 .2byte (.L49-.L51)/2 + 678 0048 2902 .2byte (.L49-.L51)/2 + 679 004a 2902 .2byte (.L49-.L51)/2 + 680 004c 2902 .2byte (.L49-.L51)/2 + 681 004e 2902 .2byte (.L49-.L51)/2 + 682 0050 2902 .2byte (.L49-.L51)/2 + 683 0052 2902 .2byte (.L49-.L51)/2 + 684 0054 9601 .2byte (.L52-.L51)/2 + 685 0056 2902 .2byte (.L49-.L51)/2 + 686 0058 EF01 .2byte (.L50-.L51)/2 687 .p2align 1 688 .L55: 439:Src/stm32f7xx_it.c **** { @@ -8963,26 +8963,26 @@ ARM GAS /tmp/ccqZqdXP.s page 1 441:Src/stm32f7xx_it.c **** TO6_uart = TO6;//Save the time of start rec. command 689 .loc 1 441 9 view .LVU113 690 .loc 1 441 18 is_stmt 0 view .LVU114 - 691 005a 8A49 ldr r1, .L106+12 + 691 005a 8749 ldr r1, .L116+12 692 005c 0868 ldr r0, [r1] - 693 005e 8A49 ldr r1, .L106+16 + 693 005e 8749 ldr r1, .L116+16 694 0060 0860 str r0, [r1] 442:Src/stm32f7xx_it.c **** flg_tmt = 1;//Set the timeout flag 695 .loc 1 442 9 is_stmt 1 view .LVU115 696 .loc 1 442 17 is_stmt 0 view .LVU116 - 697 0062 8A49 ldr r1, .L106+20 + 697 0062 8749 ldr r1, .L116+20 698 0064 0120 movs r0, #1 699 0066 0870 strb r0, [r1] 443:Src/stm32f7xx_it.c **** UART_header = uart_buf; 700 .loc 1 443 9 is_stmt 1 view .LVU117 701 .loc 1 443 21 is_stmt 0 view .LVU118 - 702 0068 8949 ldr r1, .L106+24 + 702 0068 8649 ldr r1, .L116+24 703 006a 0A80 strh r2, [r1] @ movhi 444:Src/stm32f7xx_it.c **** UART_rec_incr++; 704 .loc 1 444 9 is_stmt 1 view .LVU119 705 .loc 1 444 22 is_stmt 0 view .LVU120 706 006c 0344 add r3, r3, r0 - 707 006e 844A ldr r2, .L106+8 + 707 006e 814A ldr r2, .L116+8 708 0070 1380 strh r3, [r2] @ movhi 445:Src/stm32f7xx_it.c **** break; 709 .loc 1 445 5 is_stmt 1 view .LVU121 @@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccqZqdXP.s page 1 454:Src/stm32f7xx_it.c **** UART_rec_incr = 0; 455:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag 456:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; - ARM GAS /tmp/ccqZqdXP.s page 151 + ARM GAS /tmp/ccMf3LkY.s page 151 457:Src/stm32f7xx_it.c **** break; @@ -9037,129 +9037,158 @@ ARM GAS /tmp/ccqZqdXP.s page 1 490:Src/stm32f7xx_it.c **** case STM32_DAC_CMD_HEADER: // STM32 internal DAC command 491:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting! 492:Src/stm32f7xx_it.c **** break; - 493:Src/stm32f7xx_it.c **** default: //error decoding header - 494:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 495:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 496:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; - 497:Src/stm32f7xx_it.c **** //CPU_state = HALT; - 498:Src/stm32f7xx_it.c **** State_Data[0] |= UART_ERR; - 499:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 500:Src/stm32f7xx_it.c **** break; - 501:Src/stm32f7xx_it.c **** } - 502:Src/stm32f7xx_it.c **** break; - 503:Src/stm32f7xx_it.c **** - 504:Src/stm32f7xx_it.c **** case (AD9102_CMD_8 - 1): - 505:Src/stm32f7xx_it.c **** if (UART_header == AD9102_CMD_HEADER) - 506:Src/stm32f7xx_it.c **** { - 507:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) - 508:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 509:Src/stm32f7xx_it.c **** else - 510:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - 511:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; - 512:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 513:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - ARM GAS /tmp/ccqZqdXP.s page 152 + 493:Src/stm32f7xx_it.c **** case AD9102_WAVE_CTRL_HEADER: // AD9102 custom waveform control command + 494:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting! + 495:Src/stm32f7xx_it.c **** break; + 496:Src/stm32f7xx_it.c **** case AD9102_WAVE_DATA_HEADER: // AD9102 custom waveform data packet + 497:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting! + 498:Src/stm32f7xx_it.c **** break; + 499:Src/stm32f7xx_it.c **** default: //error decoding header + 500:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 501:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 502:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; + 503:Src/stm32f7xx_it.c **** //CPU_state = HALT; + 504:Src/stm32f7xx_it.c **** State_Data[0] |= UART_ERR; + 505:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 506:Src/stm32f7xx_it.c **** break; + 507:Src/stm32f7xx_it.c **** } + 508:Src/stm32f7xx_it.c **** break; + 509:Src/stm32f7xx_it.c **** + 510:Src/stm32f7xx_it.c **** case (AD9102_CMD_8 - 1): + 511:Src/stm32f7xx_it.c **** if (UART_header == AD9102_CMD_HEADER) + 512:Src/stm32f7xx_it.c **** { + 513:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + ARM GAS /tmp/ccMf3LkY.s page 152 - 514:Src/stm32f7xx_it.c **** } - 515:Src/stm32f7xx_it.c **** else if (UART_header == AD9833_CMD_HEADER) - 516:Src/stm32f7xx_it.c **** { - 517:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) - 518:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 519:Src/stm32f7xx_it.c **** else - 520:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - 521:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; - 522:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 523:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 524:Src/stm32f7xx_it.c **** } - 525:Src/stm32f7xx_it.c **** else if (UART_header == DS1809_CMD_HEADER) - 526:Src/stm32f7xx_it.c **** { - 527:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) - 528:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 529:Src/stm32f7xx_it.c **** else - 530:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - 531:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; - 532:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 533:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 534:Src/stm32f7xx_it.c **** } - 535:Src/stm32f7xx_it.c **** else if (UART_header == STM32_DAC_CMD_HEADER) - 536:Src/stm32f7xx_it.c **** { - 537:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) - 538:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 539:Src/stm32f7xx_it.c **** else - 540:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - 541:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; - 542:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 543:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 544:Src/stm32f7xx_it.c **** } - 545:Src/stm32f7xx_it.c **** else - 546:Src/stm32f7xx_it.c **** { - 547:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 548:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 549:Src/stm32f7xx_it.c **** else - 550:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 551:Src/stm32f7xx_it.c **** UART_rec_incr++; - 552:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 553:Src/stm32f7xx_it.c **** } - 554:Src/stm32f7xx_it.c **** break; - 555:Src/stm32f7xx_it.c **** - 556:Src/stm32f7xx_it.c **** case (CL_8 - 1): - 557:Src/stm32f7xx_it.c **** if (UART_header == 0x1111) - 558:Src/stm32f7xx_it.c **** { - 559:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) - 560:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 561:Src/stm32f7xx_it.c **** else - 562:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); - 563:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 564:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 565:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 566:Src/stm32f7xx_it.c **** } - 567:Src/stm32f7xx_it.c **** else - 568:Src/stm32f7xx_it.c **** { - 569:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 570:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - ARM GAS /tmp/ccqZqdXP.s page 153 + 514:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 515:Src/stm32f7xx_it.c **** else + 516:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 517:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 518:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 519:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 520:Src/stm32f7xx_it.c **** } + 521:Src/stm32f7xx_it.c **** else if (UART_header == AD9833_CMD_HEADER) + 522:Src/stm32f7xx_it.c **** { + 523:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 524:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 525:Src/stm32f7xx_it.c **** else + 526:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 527:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; + 528:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 529:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 530:Src/stm32f7xx_it.c **** } + 531:Src/stm32f7xx_it.c **** else if (UART_header == DS1809_CMD_HEADER) + 532:Src/stm32f7xx_it.c **** { + 533:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 534:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 535:Src/stm32f7xx_it.c **** else + 536:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 537:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; + 538:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 539:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 540:Src/stm32f7xx_it.c **** } + 541:Src/stm32f7xx_it.c **** else if (UART_header == STM32_DAC_CMD_HEADER) + 542:Src/stm32f7xx_it.c **** { + 543:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 544:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 545:Src/stm32f7xx_it.c **** else + 546:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 547:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; + 548:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 549:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 550:Src/stm32f7xx_it.c **** } + 551:Src/stm32f7xx_it.c **** else if (UART_header == AD9102_WAVE_CTRL_HEADER) + 552:Src/stm32f7xx_it.c **** { + 553:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 554:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 555:Src/stm32f7xx_it.c **** else + 556:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 557:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_CTRL_CMD; + 558:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 559:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 560:Src/stm32f7xx_it.c **** } + 561:Src/stm32f7xx_it.c **** else + 562:Src/stm32f7xx_it.c **** { + 563:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 564:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 565:Src/stm32f7xx_it.c **** else + 566:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 567:Src/stm32f7xx_it.c **** UART_rec_incr++; + 568:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 569:Src/stm32f7xx_it.c **** } + 570:Src/stm32f7xx_it.c **** break; + ARM GAS /tmp/ccMf3LkY.s page 153 - 571:Src/stm32f7xx_it.c **** else - 572:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 573:Src/stm32f7xx_it.c **** UART_rec_incr++; - 574:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 575:Src/stm32f7xx_it.c **** } - 576:Src/stm32f7xx_it.c **** break; - 577:Src/stm32f7xx_it.c **** case (TSK_8 - 1): - 578:Src/stm32f7xx_it.c **** if (UART_header == 0x7777) - 579:Src/stm32f7xx_it.c **** { - 580:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 581:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 582:Src/stm32f7xx_it.c **** else - 583:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 584:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 585:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 586:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 587:Src/stm32f7xx_it.c **** } - 588:Src/stm32f7xx_it.c **** else - 589:Src/stm32f7xx_it.c **** { - 590:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 591:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 592:Src/stm32f7xx_it.c **** else - 593:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 594:Src/stm32f7xx_it.c **** UART_rec_incr++; - 595:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 596:Src/stm32f7xx_it.c **** } - 597:Src/stm32f7xx_it.c **** break; - 598:Src/stm32f7xx_it.c **** default: - 599:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) - 600:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 601:Src/stm32f7xx_it.c **** else - 602:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); - 603:Src/stm32f7xx_it.c **** UART_rec_incr++; - 604:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 605:Src/stm32f7xx_it.c **** break; - 606:Src/stm32f7xx_it.c **** } - 607:Src/stm32f7xx_it.c **** // HAL_UART_Receive_IT(&huart1, &uart_buf, 1); - 608:Src/stm32f7xx_it.c **** } - 711 .loc 1 608 1 is_stmt 0 view .LVU122 + 571:Src/stm32f7xx_it.c **** + 572:Src/stm32f7xx_it.c **** case (CL_8 - 1): + 573:Src/stm32f7xx_it.c **** if (UART_header == 0x1111) + 574:Src/stm32f7xx_it.c **** { + 575:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 576:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 577:Src/stm32f7xx_it.c **** else + 578:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 579:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 580:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 581:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 582:Src/stm32f7xx_it.c **** } + 583:Src/stm32f7xx_it.c **** else if (UART_header == AD9102_WAVE_DATA_HEADER) + 584:Src/stm32f7xx_it.c **** { + 585:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0) + 586:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 587:Src/stm32f7xx_it.c **** else + 588:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf); + 589:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_DATA_CMD; + 590:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 591:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 592:Src/stm32f7xx_it.c **** } + 593:Src/stm32f7xx_it.c **** else + 594:Src/stm32f7xx_it.c **** { + 595:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 596:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 597:Src/stm32f7xx_it.c **** else + 598:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 599:Src/stm32f7xx_it.c **** UART_rec_incr++; + 600:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 601:Src/stm32f7xx_it.c **** } + 602:Src/stm32f7xx_it.c **** break; + 603:Src/stm32f7xx_it.c **** case (TSK_8 - 1): + 604:Src/stm32f7xx_it.c **** if (UART_header == 0x7777) + 605:Src/stm32f7xx_it.c **** { + 606:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 607:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 608:Src/stm32f7xx_it.c **** else + 609:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 610:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 611:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 612:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 613:Src/stm32f7xx_it.c **** } + 614:Src/stm32f7xx_it.c **** else + 615:Src/stm32f7xx_it.c **** { + 616:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 617:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 618:Src/stm32f7xx_it.c **** else + 619:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 620:Src/stm32f7xx_it.c **** UART_rec_incr++; + 621:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 622:Src/stm32f7xx_it.c **** } + 623:Src/stm32f7xx_it.c **** break; + 624:Src/stm32f7xx_it.c **** default: + 625:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0) + 626:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 627:Src/stm32f7xx_it.c **** else + ARM GAS /tmp/ccMf3LkY.s page 154 + + + 628:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf); + 629:Src/stm32f7xx_it.c **** UART_rec_incr++; + 630:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 631:Src/stm32f7xx_it.c **** break; + 632:Src/stm32f7xx_it.c **** } + 633:Src/stm32f7xx_it.c **** // HAL_UART_Receive_IT(&huart1, &uart_buf, 1); + 634:Src/stm32f7xx_it.c **** } + 711 .loc 1 634 1 is_stmt 0 view .LVU122 712 0072 5DF8044B ldr r4, [sp], #4 713 .LCFI7: 714 .cfi_remember_state @@ -9173,1174 +9202,1332 @@ ARM GAS /tmp/ccqZqdXP.s page 1 721 .loc 1 447 9 is_stmt 1 view .LVU123 447:Src/stm32f7xx_it.c **** switch (UART_header) 722 .loc 1 447 21 is_stmt 0 view .LVU124 - 723 0078 8549 ldr r1, .L106+24 + 723 0078 8249 ldr r1, .L116+24 724 007a 0B88 ldrh r3, [r1] 725 007c 03EB0223 add r3, r3, r2, lsl #8 726 0080 9BB2 uxth r3, r3 727 0082 0B80 strh r3, [r1] @ movhi - ARM GAS /tmp/ccqZqdXP.s page 154 - - 448:Src/stm32f7xx_it.c **** { 728 .loc 1 448 9 is_stmt 1 view .LVU125 - 729 0084 46F26662 movw r2, #26214 + 729 0084 47F27772 movw r2, #30583 730 0088 9342 cmp r3, r2 - 731 008a 5AD0 beq .L57 - 732 008c 10D9 bls .L99 - 733 008e 49F69912 movw r2, #39321 + 731 008a 6BD0 beq .L57 + 732 008c 14D9 bls .L107 + 733 008e 4BF6BB32 movw r2, #48059 734 0092 9342 cmp r3, r2 - 735 0094 62D0 beq .L66 - 736 0096 32D8 bhi .L67 - 737 0098 47F27772 movw r2, #30583 + 735 0094 72D0 beq .L67 + 736 0096 35D8 bhi .L68 + 737 0098 49F69912 movw r2, #39321 738 009c 9342 cmp r3, r2 - 739 009e 59D0 beq .L68 - 740 00a0 48F68802 movw r2, #34952 + 739 009e 65D0 beq .L69 + 740 00a0 4AF6AA22 movw r2, #43690 741 00a4 9342 cmp r3, r2 - 742 00a6 61D1 bne .L63 + 742 00a6 65D0 beq .L70 + 743 00a8 48F68802 movw r2, #34952 + 744 00ac 9342 cmp r3, r2 + 745 00ae 6DD1 bne .L64 482:Src/stm32f7xx_it.c **** break; - 743 .loc 1 482 13 view .LVU126 + 746 .loc 1 482 13 view .LVU126 482:Src/stm32f7xx_it.c **** break; - 744 .loc 1 482 27 is_stmt 0 view .LVU127 - 745 00a8 754B ldr r3, .L106+8 - 746 00aa 0222 movs r2, #2 - 747 00ac 1A80 strh r2, [r3] @ movhi + 747 .loc 1 482 27 is_stmt 0 view .LVU127 + 748 00b0 704B ldr r3, .L116+8 + 749 00b2 0222 movs r2, #2 + 750 00b4 1A80 strh r2, [r3] @ movhi 483:Src/stm32f7xx_it.c **** case AD9833_CMD_HEADER: // AD9833 command - 748 .loc 1 483 9 is_stmt 1 view .LVU128 - 749 00ae E0E7 b .L48 - 750 .L99: - 751 00b0 43F23332 movw r2, #13107 - 752 00b4 9342 cmp r3, r2 - 753 00b6 32D0 beq .L59 - 754 00b8 10D8 bhi .L60 - 755 00ba 41F21112 movw r2, #4369 - 756 00be 9342 cmp r3, r2 - 757 00c0 29D0 beq .L61 + 751 .loc 1 483 9 is_stmt 1 view .LVU128 + 752 00b6 DCE7 b .L48 + 753 .L107: + 754 00b8 44F24442 movw r2, #17476 + ARM GAS /tmp/ccMf3LkY.s page 155 + + + 755 00bc 9342 cmp r3, r2 + 756 00be 3FD0 beq .L59 + 757 00c0 0FD8 bhi .L60 758 00c2 42F22222 movw r2, #8738 759 00c6 9342 cmp r3, r2 - 760 00c8 50D1 bne .L63 - 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 761 .loc 1 454 13 view .LVU129 - 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 762 .loc 1 454 27 is_stmt 0 view .LVU130 - 763 00ca 0023 movs r3, #0 - 764 00cc 6C4A ldr r2, .L106+8 - 765 00ce 1380 strh r3, [r2] @ movhi - 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; - 766 .loc 1 455 13 is_stmt 1 view .LVU131 - 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; - 767 .loc 1 455 21 is_stmt 0 view .LVU132 - 768 00d0 6E4A ldr r2, .L106+20 - 769 00d2 1370 strb r3, [r2] - 456:Src/stm32f7xx_it.c **** break; - 770 .loc 1 456 13 is_stmt 1 view .LVU133 - 456:Src/stm32f7xx_it.c **** break; - 771 .loc 1 456 23 is_stmt 0 view .LVU134 - 772 00d4 6F4B ldr r3, .L106+28 - 773 00d6 0222 movs r2, #2 - 774 00d8 1A70 strb r2, [r3] - ARM GAS /tmp/ccqZqdXP.s page 155 - - - 457:Src/stm32f7xx_it.c **** case 0x3333: //Transmith saved DATA - 775 .loc 1 457 9 is_stmt 1 view .LVU135 - 776 00da CAE7 b .L48 - 777 .L60: - 778 00dc 44F24442 movw r2, #17476 - 779 00e0 9342 cmp r3, r2 - 780 00e2 25D0 beq .L64 - 781 00e4 45F25552 movw r2, #21845 - 782 00e8 9342 cmp r3, r2 - 783 00ea 3FD1 bne .L63 - 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 784 .loc 1 469 13 view .LVU136 - 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 785 .loc 1 469 27 is_stmt 0 view .LVU137 - 786 00ec 0023 movs r3, #0 - 787 00ee 644A ldr r2, .L106+8 - 788 00f0 1380 strh r3, [r2] @ movhi - 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; - 789 .loc 1 470 13 is_stmt 1 view .LVU138 - 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; - 790 .loc 1 470 21 is_stmt 0 view .LVU139 - 791 00f2 664A ldr r2, .L106+20 - 792 00f4 1370 strb r3, [r2] - 471:Src/stm32f7xx_it.c **** break; - 793 .loc 1 471 13 is_stmt 1 view .LVU140 - 471:Src/stm32f7xx_it.c **** break; - 794 .loc 1 471 23 is_stmt 0 view .LVU141 - 795 00f6 674B ldr r3, .L106+28 - 796 00f8 0522 movs r2, #5 - 797 00fa 1A70 strb r2, [r3] - 472:Src/stm32f7xx_it.c **** case 0x6666: //Request state - 798 .loc 1 472 9 is_stmt 1 view .LVU142 - 799 00fc B9E7 b .L48 - 800 .L67: - 801 00fe 4AF6AA22 movw r2, #43690 - 802 0102 9342 cmp r3, r2 - 803 0104 2ED0 beq .L70 - 804 0106 4BF6BB32 movw r2, #48059 - 805 010a 9342 cmp r3, r2 - 806 010c 2ED1 bne .L63 - 491:Src/stm32f7xx_it.c **** break; - 807 .loc 1 491 13 view .LVU143 - 491:Src/stm32f7xx_it.c **** break; - 808 .loc 1 491 27 is_stmt 0 view .LVU144 - 809 010e 5C4B ldr r3, .L106+8 - 810 0110 0222 movs r2, #2 - 811 0112 1A80 strh r2, [r3] @ movhi - 492:Src/stm32f7xx_it.c **** default: //error decoding header - 812 .loc 1 492 9 is_stmt 1 view .LVU145 - 813 0114 ADE7 b .L48 - 814 .L61: + 760 00c8 28D0 beq .L61 + 761 00ca 43F23332 movw r2, #13107 + 762 00ce 9342 cmp r3, r2 + 763 00d0 2DD0 beq .L62 + 764 00d2 41F21112 movw r2, #4369 + 765 00d6 9342 cmp r3, r2 + 766 00d8 58D1 bne .L64 451:Src/stm32f7xx_it.c **** break; - 815 .loc 1 451 13 view .LVU146 + 767 .loc 1 451 13 view .LVU129 451:Src/stm32f7xx_it.c **** break; - 816 .loc 1 451 27 is_stmt 0 view .LVU147 - 817 0116 5A4B ldr r3, .L106+8 - 818 0118 0222 movs r2, #2 - ARM GAS /tmp/ccqZqdXP.s page 156 - - - 819 011a 1A80 strh r2, [r3] @ movhi + 768 .loc 1 451 27 is_stmt 0 view .LVU130 + 769 00da 664B ldr r3, .L116+8 + 770 00dc 0222 movs r2, #2 + 771 00de 1A80 strh r2, [r3] @ movhi 452:Src/stm32f7xx_it.c **** case 0x2222: //Back to default - 820 .loc 1 452 9 is_stmt 1 view .LVU148 - 821 011c A9E7 b .L48 - 822 .L59: - 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 823 .loc 1 459 13 view .LVU149 - 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 824 .loc 1 459 27 is_stmt 0 view .LVU150 - 825 011e 0023 movs r3, #0 - 826 0120 574A ldr r2, .L106+8 - 827 0122 1380 strh r3, [r2] @ movhi - 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE; - 828 .loc 1 460 13 is_stmt 1 view .LVU151 - 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE; - 829 .loc 1 460 21 is_stmt 0 view .LVU152 - 830 0124 594A ldr r2, .L106+20 - 831 0126 1370 strb r3, [r2] - 461:Src/stm32f7xx_it.c **** break; - 832 .loc 1 461 13 is_stmt 1 view .LVU153 - 461:Src/stm32f7xx_it.c **** break; - 833 .loc 1 461 23 is_stmt 0 view .LVU154 - 834 0128 5A4B ldr r3, .L106+28 - 835 012a 0322 movs r2, #3 - 836 012c 1A70 strb r2, [r3] - 462:Src/stm32f7xx_it.c **** case 0x4444: //Received packet - 837 .loc 1 462 9 is_stmt 1 view .LVU155 - 838 012e A0E7 b .L48 - 839 .L64: - 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 840 .loc 1 464 13 view .LVU156 - 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 841 .loc 1 464 27 is_stmt 0 view .LVU157 - 842 0130 0023 movs r3, #0 - 843 0132 534A ldr r2, .L106+8 - 844 0134 1380 strh r3, [r2] @ movhi - 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE; - 845 .loc 1 465 13 is_stmt 1 view .LVU158 - 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE; - 846 .loc 1 465 21 is_stmt 0 view .LVU159 - 847 0136 554A ldr r2, .L106+20 - 848 0138 1370 strb r3, [r2] - 466:Src/stm32f7xx_it.c **** break; - 849 .loc 1 466 13 is_stmt 1 view .LVU160 - 466:Src/stm32f7xx_it.c **** break; - 850 .loc 1 466 23 is_stmt 0 view .LVU161 - 851 013a 564B ldr r3, .L106+28 - 852 013c 0422 movs r2, #4 - 853 013e 1A70 strb r2, [r3] - 467:Src/stm32f7xx_it.c **** case 0x5555: //Erase saved DATA - 854 .loc 1 467 9 is_stmt 1 view .LVU162 - 855 0140 97E7 b .L48 - 856 .L57: + 772 .loc 1 452 9 is_stmt 1 view .LVU131 + 773 00e0 C7E7 b .L48 + 774 .L60: + 775 00e2 45F25552 movw r2, #21845 + 776 00e6 9342 cmp r3, r2 + 777 00e8 33D0 beq .L65 + 778 00ea 46F26662 movw r2, #26214 + 779 00ee 9342 cmp r3, r2 + 780 00f0 4CD1 bne .L64 474:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 857 .loc 1 474 13 view .LVU163 + 781 .loc 1 474 13 view .LVU132 474:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 858 .loc 1 474 27 is_stmt 0 view .LVU164 - ARM GAS /tmp/ccqZqdXP.s page 157 - - - 859 0142 0023 movs r3, #0 - 860 0144 4E4A ldr r2, .L106+8 - 861 0146 1380 strh r3, [r2] @ movhi + 782 .loc 1 474 27 is_stmt 0 view .LVU133 + 783 00f2 0023 movs r3, #0 + 784 00f4 5F4A ldr r2, .L116+8 + 785 00f6 1380 strh r3, [r2] @ movhi 475:Src/stm32f7xx_it.c **** CPU_state = STATE; - 862 .loc 1 475 13 is_stmt 1 view .LVU165 + 786 .loc 1 475 13 is_stmt 1 view .LVU134 475:Src/stm32f7xx_it.c **** CPU_state = STATE; - 863 .loc 1 475 21 is_stmt 0 view .LVU166 - 864 0148 504A ldr r2, .L106+20 - 865 014a 1370 strb r3, [r2] + 787 .loc 1 475 21 is_stmt 0 view .LVU135 + 788 00f8 614A ldr r2, .L116+20 + 789 00fa 1370 strb r3, [r2] 476:Src/stm32f7xx_it.c **** break; - 866 .loc 1 476 13 is_stmt 1 view .LVU167 + 790 .loc 1 476 13 is_stmt 1 view .LVU136 476:Src/stm32f7xx_it.c **** break; - 867 .loc 1 476 23 is_stmt 0 view .LVU168 - 868 014c 514B ldr r3, .L106+28 - 869 014e 0622 movs r2, #6 - 870 0150 1A70 strb r2, [r3] + 791 .loc 1 476 23 is_stmt 0 view .LVU137 + 792 00fc 624B ldr r3, .L116+28 + 793 00fe 0622 movs r2, #6 + 794 0100 1A70 strb r2, [r3] 477:Src/stm32f7xx_it.c **** case 0x7777: - 871 .loc 1 477 9 is_stmt 1 view .LVU169 - 872 0152 8EE7 b .L48 - 873 .L68: + 795 .loc 1 477 9 is_stmt 1 view .LVU138 + 796 0102 B6E7 b .L48 + 797 .L68: + 798 0104 4CF6CC42 movw r2, #52428 + 799 0108 9342 cmp r3, r2 + 800 010a 3BD0 beq .L72 + 801 010c 4DF6DD52 movw r2, #56797 + ARM GAS /tmp/ccMf3LkY.s page 156 + + + 802 0110 9342 cmp r3, r2 + 803 0112 3BD1 bne .L64 + 497:Src/stm32f7xx_it.c **** break; + 804 .loc 1 497 13 view .LVU139 + 497:Src/stm32f7xx_it.c **** break; + 805 .loc 1 497 27 is_stmt 0 view .LVU140 + 806 0114 574B ldr r3, .L116+8 + 807 0116 0222 movs r2, #2 + 808 0118 1A80 strh r2, [r3] @ movhi + 498:Src/stm32f7xx_it.c **** default: //error decoding header + 809 .loc 1 498 9 is_stmt 1 view .LVU141 + 810 011a AAE7 b .L48 + 811 .L61: + 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 812 .loc 1 454 13 view .LVU142 + 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 813 .loc 1 454 27 is_stmt 0 view .LVU143 + 814 011c 0023 movs r3, #0 + 815 011e 554A ldr r2, .L116+8 + 816 0120 1380 strh r3, [r2] @ movhi + 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; + 817 .loc 1 455 13 is_stmt 1 view .LVU144 + 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE; + 818 .loc 1 455 21 is_stmt 0 view .LVU145 + 819 0122 574A ldr r2, .L116+20 + 820 0124 1370 strb r3, [r2] + 456:Src/stm32f7xx_it.c **** break; + 821 .loc 1 456 13 is_stmt 1 view .LVU146 + 456:Src/stm32f7xx_it.c **** break; + 822 .loc 1 456 23 is_stmt 0 view .LVU147 + 823 0126 584B ldr r3, .L116+28 + 824 0128 0222 movs r2, #2 + 825 012a 1A70 strb r2, [r3] + 457:Src/stm32f7xx_it.c **** case 0x3333: //Transmith saved DATA + 826 .loc 1 457 9 is_stmt 1 view .LVU148 + 827 012c A1E7 b .L48 + 828 .L62: + 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 829 .loc 1 459 13 view .LVU149 + 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 830 .loc 1 459 27 is_stmt 0 view .LVU150 + 831 012e 0023 movs r3, #0 + 832 0130 504A ldr r2, .L116+8 + 833 0132 1380 strh r3, [r2] @ movhi + 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE; + 834 .loc 1 460 13 is_stmt 1 view .LVU151 + 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE; + 835 .loc 1 460 21 is_stmt 0 view .LVU152 + 836 0134 524A ldr r2, .L116+20 + 837 0136 1370 strb r3, [r2] + 461:Src/stm32f7xx_it.c **** break; + 838 .loc 1 461 13 is_stmt 1 view .LVU153 + 461:Src/stm32f7xx_it.c **** break; + 839 .loc 1 461 23 is_stmt 0 view .LVU154 + 840 0138 534B ldr r3, .L116+28 + 841 013a 0322 movs r2, #3 + 842 013c 1A70 strb r2, [r3] + ARM GAS /tmp/ccMf3LkY.s page 157 + + + 462:Src/stm32f7xx_it.c **** case 0x4444: //Received packet + 843 .loc 1 462 9 is_stmt 1 view .LVU155 + 844 013e 98E7 b .L48 + 845 .L59: + 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 846 .loc 1 464 13 view .LVU156 + 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 847 .loc 1 464 27 is_stmt 0 view .LVU157 + 848 0140 0023 movs r3, #0 + 849 0142 4C4A ldr r2, .L116+8 + 850 0144 1380 strh r3, [r2] @ movhi + 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE; + 851 .loc 1 465 13 is_stmt 1 view .LVU158 + 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE; + 852 .loc 1 465 21 is_stmt 0 view .LVU159 + 853 0146 4E4A ldr r2, .L116+20 + 854 0148 1370 strb r3, [r2] + 466:Src/stm32f7xx_it.c **** break; + 855 .loc 1 466 13 is_stmt 1 view .LVU160 + 466:Src/stm32f7xx_it.c **** break; + 856 .loc 1 466 23 is_stmt 0 view .LVU161 + 857 014a 4F4B ldr r3, .L116+28 + 858 014c 0422 movs r2, #4 + 859 014e 1A70 strb r2, [r3] + 467:Src/stm32f7xx_it.c **** case 0x5555: //Erase saved DATA + 860 .loc 1 467 9 is_stmt 1 view .LVU162 + 861 0150 8FE7 b .L48 + 862 .L65: + 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 863 .loc 1 469 13 view .LVU163 + 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 864 .loc 1 469 27 is_stmt 0 view .LVU164 + 865 0152 0023 movs r3, #0 + 866 0154 474A ldr r2, .L116+8 + 867 0156 1380 strh r3, [r2] @ movhi + 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; + 868 .loc 1 470 13 is_stmt 1 view .LVU165 + 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE; + 869 .loc 1 470 21 is_stmt 0 view .LVU166 + 870 0158 494A ldr r2, .L116+20 + 871 015a 1370 strb r3, [r2] + 471:Src/stm32f7xx_it.c **** break; + 872 .loc 1 471 13 is_stmt 1 view .LVU167 + 471:Src/stm32f7xx_it.c **** break; + 873 .loc 1 471 23 is_stmt 0 view .LVU168 + 874 015c 4A4B ldr r3, .L116+28 + 875 015e 0522 movs r2, #5 + 876 0160 1A70 strb r2, [r3] + 472:Src/stm32f7xx_it.c **** case 0x6666: //Request state + 877 .loc 1 472 9 is_stmt 1 view .LVU169 + 878 0162 86E7 b .L48 + 879 .L57: 479:Src/stm32f7xx_it.c **** break; - 874 .loc 1 479 13 view .LVU170 + 880 .loc 1 479 13 view .LVU170 479:Src/stm32f7xx_it.c **** break; - 875 .loc 1 479 27 is_stmt 0 view .LVU171 - 876 0154 4A4B ldr r3, .L106+8 - 877 0156 0222 movs r2, #2 - 878 0158 1A80 strh r2, [r3] @ movhi + 881 .loc 1 479 27 is_stmt 0 view .LVU171 + 882 0164 434B ldr r3, .L116+8 + ARM GAS /tmp/ccMf3LkY.s page 158 + + + 883 0166 0222 movs r2, #2 + 884 0168 1A80 strh r2, [r3] @ movhi 480:Src/stm32f7xx_it.c **** case AD9102_CMD_HEADER: // AD9102 command - 879 .loc 1 480 13 is_stmt 1 view .LVU172 - 880 015a 8AE7 b .L48 - 881 .L66: + 885 .loc 1 480 13 is_stmt 1 view .LVU172 + 886 016a 82E7 b .L48 + 887 .L69: 485:Src/stm32f7xx_it.c **** break; - 882 .loc 1 485 13 view .LVU173 + 888 .loc 1 485 13 view .LVU173 485:Src/stm32f7xx_it.c **** break; - 883 .loc 1 485 27 is_stmt 0 view .LVU174 - 884 015c 484B ldr r3, .L106+8 - 885 015e 0222 movs r2, #2 - 886 0160 1A80 strh r2, [r3] @ movhi + 889 .loc 1 485 27 is_stmt 0 view .LVU174 + 890 016c 414B ldr r3, .L116+8 + 891 016e 0222 movs r2, #2 + 892 0170 1A80 strh r2, [r3] @ movhi 486:Src/stm32f7xx_it.c **** case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command - 887 .loc 1 486 9 is_stmt 1 view .LVU175 - 888 0162 86E7 b .L48 - 889 .L70: + 893 .loc 1 486 9 is_stmt 1 view .LVU175 + 894 0172 7EE7 b .L48 + 895 .L70: 488:Src/stm32f7xx_it.c **** break; - 890 .loc 1 488 13 view .LVU176 + 896 .loc 1 488 13 view .LVU176 488:Src/stm32f7xx_it.c **** break; - 891 .loc 1 488 27 is_stmt 0 view .LVU177 - 892 0164 464B ldr r3, .L106+8 - 893 0166 0222 movs r2, #2 - 894 0168 1A80 strh r2, [r3] @ movhi + 897 .loc 1 488 27 is_stmt 0 view .LVU177 + 898 0174 3F4B ldr r3, .L116+8 + 899 0176 0222 movs r2, #2 + 900 0178 1A80 strh r2, [r3] @ movhi 489:Src/stm32f7xx_it.c **** case STM32_DAC_CMD_HEADER: // STM32 internal DAC command - 895 .loc 1 489 9 is_stmt 1 view .LVU178 - 896 016a 82E7 b .L48 - 897 .L63: - 494:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 898 .loc 1 494 13 view .LVU179 - 494:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 899 .loc 1 494 27 is_stmt 0 view .LVU180 - ARM GAS /tmp/ccqZqdXP.s page 158 + 901 .loc 1 489 9 is_stmt 1 view .LVU178 + 902 017a 7AE7 b .L48 + 903 .L67: + 491:Src/stm32f7xx_it.c **** break; + 904 .loc 1 491 13 view .LVU179 + 491:Src/stm32f7xx_it.c **** break; + 905 .loc 1 491 27 is_stmt 0 view .LVU180 + 906 017c 3D4B ldr r3, .L116+8 + 907 017e 0222 movs r2, #2 + 908 0180 1A80 strh r2, [r3] @ movhi + 492:Src/stm32f7xx_it.c **** case AD9102_WAVE_CTRL_HEADER: // AD9102 custom waveform control command + 909 .loc 1 492 9 is_stmt 1 view .LVU181 + 910 0182 76E7 b .L48 + 911 .L72: + 494:Src/stm32f7xx_it.c **** break; + 912 .loc 1 494 13 view .LVU182 + 494:Src/stm32f7xx_it.c **** break; + 913 .loc 1 494 27 is_stmt 0 view .LVU183 + 914 0184 3B4B ldr r3, .L116+8 + 915 0186 0222 movs r2, #2 + 916 0188 1A80 strh r2, [r3] @ movhi + 495:Src/stm32f7xx_it.c **** case AD9102_WAVE_DATA_HEADER: // AD9102 custom waveform data packet + 917 .loc 1 495 9 is_stmt 1 view .LVU184 + 918 018a 72E7 b .L48 + 919 .L64: + 500:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 920 .loc 1 500 13 view .LVU185 + 500:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 921 .loc 1 500 27 is_stmt 0 view .LVU186 + 922 018c 0023 movs r3, #0 + 923 018e 394A ldr r2, .L116+8 + 924 0190 1380 strh r3, [r2] @ movhi + ARM GAS /tmp/ccMf3LkY.s page 159 - 900 016c 0023 movs r3, #0 - 901 016e 444A ldr r2, .L106+8 - 902 0170 1380 strh r3, [r2] @ movhi - 495:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; - 903 .loc 1 495 13 is_stmt 1 view .LVU181 - 495:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; - 904 .loc 1 495 21 is_stmt 0 view .LVU182 - 905 0172 464A ldr r2, .L106+20 - 906 0174 1370 strb r3, [r2] - 498:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 907 .loc 1 498 13 is_stmt 1 view .LVU183 - 498:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 908 .loc 1 498 23 is_stmt 0 view .LVU184 - 909 0176 484A ldr r2, .L106+32 - 910 0178 1378 ldrb r3, [r2] @ zero_extendqisi2 - 498:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! - 911 .loc 1 498 27 view .LVU185 - 912 017a 43F00203 orr r3, r3, #2 - 913 017e 1370 strb r3, [r2] - 499:Src/stm32f7xx_it.c **** break; - 914 .loc 1 499 13 is_stmt 1 view .LVU186 - 499:Src/stm32f7xx_it.c **** break; - 915 .loc 1 499 23 is_stmt 0 view .LVU187 - 916 0180 444B ldr r3, .L106+28 - 917 0182 0222 movs r2, #2 - 918 0184 1A70 strb r2, [r3] - 500:Src/stm32f7xx_it.c **** } - 919 .loc 1 500 9 is_stmt 1 view .LVU188 - 920 0186 74E7 b .L48 - 921 .L53: - 505:Src/stm32f7xx_it.c **** { - 922 .loc 1 505 9 view .LVU189 - 505:Src/stm32f7xx_it.c **** { - 923 .loc 1 505 25 is_stmt 0 view .LVU190 - 924 0188 4149 ldr r1, .L106+24 - 925 018a 0988 ldrh r1, [r1] - 505:Src/stm32f7xx_it.c **** { - 926 .loc 1 505 12 view .LVU191 - 927 018c 48F68800 movw r0, #34952 - 928 0190 8142 cmp r1, r0 - 929 0192 1FD0 beq .L100 - 515:Src/stm32f7xx_it.c **** { - 930 .loc 1 515 14 is_stmt 1 view .LVU192 - 515:Src/stm32f7xx_it.c **** { - 931 .loc 1 515 17 is_stmt 0 view .LVU193 - 932 0194 49F69910 movw r0, #39321 - 933 0198 8142 cmp r1, r0 - 934 019a 36D0 beq .L101 - 525:Src/stm32f7xx_it.c **** { - 935 .loc 1 525 14 is_stmt 1 view .LVU194 - 525:Src/stm32f7xx_it.c **** { - 936 .loc 1 525 17 is_stmt 0 view .LVU195 - 937 019c 4AF6AA20 movw r0, #43690 - 938 01a0 8142 cmp r1, r0 - 939 01a2 4DD0 beq .L102 - 535:Src/stm32f7xx_it.c **** { - 940 .loc 1 535 14 is_stmt 1 view .LVU196 - ARM GAS /tmp/ccqZqdXP.s page 159 + 501:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; + 925 .loc 1 501 13 is_stmt 1 view .LVU187 + 501:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01; + 926 .loc 1 501 21 is_stmt 0 view .LVU188 + 927 0192 3B4A ldr r2, .L116+20 + 928 0194 1370 strb r3, [r2] + 504:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 929 .loc 1 504 13 is_stmt 1 view .LVU189 + 504:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 930 .loc 1 504 23 is_stmt 0 view .LVU190 + 931 0196 3D4A ldr r2, .L116+32 + 932 0198 1378 ldrb r3, [r2] @ zero_extendqisi2 + 504:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state! + 933 .loc 1 504 27 view .LVU191 + 934 019a 43F00203 orr r3, r3, #2 + 935 019e 1370 strb r3, [r2] + 505:Src/stm32f7xx_it.c **** break; + 936 .loc 1 505 13 is_stmt 1 view .LVU192 + 505:Src/stm32f7xx_it.c **** break; + 937 .loc 1 505 23 is_stmt 0 view .LVU193 + 938 01a0 394B ldr r3, .L116+28 + 939 01a2 0222 movs r2, #2 + 940 01a4 1A70 strb r2, [r3] + 506:Src/stm32f7xx_it.c **** } + 941 .loc 1 506 9 is_stmt 1 view .LVU194 + 942 01a6 64E7 b .L48 + 943 .L53: + 511:Src/stm32f7xx_it.c **** { + 944 .loc 1 511 9 view .LVU195 + 511:Src/stm32f7xx_it.c **** { + 945 .loc 1 511 25 is_stmt 0 view .LVU196 + 946 01a8 3649 ldr r1, .L116+24 + 947 01aa 0988 ldrh r1, [r1] + 511:Src/stm32f7xx_it.c **** { + 948 .loc 1 511 12 view .LVU197 + 949 01ac 48F68800 movw r0, #34952 + 950 01b0 8142 cmp r1, r0 + 951 01b2 25D0 beq .L108 + 521:Src/stm32f7xx_it.c **** { + 952 .loc 1 521 14 is_stmt 1 view .LVU198 + 521:Src/stm32f7xx_it.c **** { + 953 .loc 1 521 17 is_stmt 0 view .LVU199 + 954 01b4 49F69910 movw r0, #39321 + 955 01b8 8142 cmp r1, r0 + 956 01ba 3CD0 beq .L109 + 531:Src/stm32f7xx_it.c **** { + 957 .loc 1 531 14 is_stmt 1 view .LVU200 + 531:Src/stm32f7xx_it.c **** { + 958 .loc 1 531 17 is_stmt 0 view .LVU201 + 959 01bc 4AF6AA20 movw r0, #43690 + 960 01c0 8142 cmp r1, r0 + 961 01c2 69D0 beq .L110 + 541:Src/stm32f7xx_it.c **** { + 962 .loc 1 541 14 is_stmt 1 view .LVU202 + 541:Src/stm32f7xx_it.c **** { + 963 .loc 1 541 17 is_stmt 0 view .LVU203 + 964 01c4 4BF6BB30 movw r0, #48059 + ARM GAS /tmp/ccMf3LkY.s page 160 - 535:Src/stm32f7xx_it.c **** { - 941 .loc 1 535 17 is_stmt 0 view .LVU197 - 942 01a4 4BF6BB30 movw r0, #48059 - 943 01a8 8142 cmp r1, r0 - 944 01aa 7BD0 beq .L103 - 547:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 945 .loc 1 547 13 is_stmt 1 view .LVU198 - 547:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 946 .loc 1 547 16 is_stmt 0 view .LVU199 - 947 01ac 13F0010F tst r3, #1 - 948 01b0 00F09380 beq .L84 - 548:Src/stm32f7xx_it.c **** else - 949 .loc 1 548 17 is_stmt 1 view .LVU200 - 548:Src/stm32f7xx_it.c **** else - 950 .loc 1 548 24 is_stmt 0 view .LVU201 - 951 01b4 5908 lsrs r1, r3, #1 - 952 01b6 0139 subs r1, r1, #1 - 953 01b8 384C ldr r4, .L106+36 - 954 01ba 34F81100 ldrh r0, [r4, r1, lsl #1] - 548:Src/stm32f7xx_it.c **** else - 955 .loc 1 548 47 view .LVU202 - 956 01be 00EB0222 add r2, r0, r2, lsl #8 - 957 01c2 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - 958 .L85: - 551:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 959 .loc 1 551 13 is_stmt 1 view .LVU203 - 551:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 960 .loc 1 551 26 is_stmt 0 view .LVU204 - 961 01c6 0133 adds r3, r3, #1 - 962 01c8 2D4A ldr r2, .L106+8 - 963 01ca 1380 strh r3, [r2] @ movhi - 552:Src/stm32f7xx_it.c **** } - 964 .loc 1 552 13 is_stmt 1 view .LVU205 - 552:Src/stm32f7xx_it.c **** } - 965 .loc 1 552 39 is_stmt 0 view .LVU206 - 966 01cc 344B ldr r3, .L106+40 - 967 01ce 0022 movs r2, #0 - 968 01d0 1A70 strb r2, [r3] - 969 01d2 4EE7 b .L48 - 970 .L100: - 507:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 971 .loc 1 507 13 is_stmt 1 view .LVU207 - 507:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 972 .loc 1 507 16 is_stmt 0 view .LVU208 - 973 01d4 13F0010F tst r3, #1 - 974 01d8 11D0 beq .L73 - 508:Src/stm32f7xx_it.c **** else - 975 .loc 1 508 17 is_stmt 1 view .LVU209 - 508:Src/stm32f7xx_it.c **** else - 976 .loc 1 508 24 is_stmt 0 view .LVU210 - 977 01da 5B08 lsrs r3, r3, #1 - 978 01dc 013B subs r3, r3, #1 - 979 01de 2F48 ldr r0, .L106+36 - 980 01e0 30F81310 ldrh r1, [r0, r3, lsl #1] - 508:Src/stm32f7xx_it.c **** else - 981 .loc 1 508 51 view .LVU211 - 982 01e4 01EB0222 add r2, r1, r2, lsl #8 - ARM GAS /tmp/ccqZqdXP.s page 160 + 965 01c8 8142 cmp r1, r0 + 966 01ca 00F08080 beq .L111 + 551:Src/stm32f7xx_it.c **** { + 967 .loc 1 551 14 is_stmt 1 view .LVU204 + 551:Src/stm32f7xx_it.c **** { + 968 .loc 1 551 17 is_stmt 0 view .LVU205 + 969 01ce 4CF6CC40 movw r0, #52428 + 970 01d2 8142 cmp r1, r0 + 971 01d4 00F09680 beq .L112 + 563:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 972 .loc 1 563 13 is_stmt 1 view .LVU206 + 563:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 973 .loc 1 563 16 is_stmt 0 view .LVU207 + 974 01d8 13F0010F tst r3, #1 + 975 01dc 00F0AD80 beq .L89 + 564:Src/stm32f7xx_it.c **** else + 976 .loc 1 564 17 is_stmt 1 view .LVU208 + 564:Src/stm32f7xx_it.c **** else + 977 .loc 1 564 24 is_stmt 0 view .LVU209 + 978 01e0 5908 lsrs r1, r3, #1 + 979 01e2 0139 subs r1, r1, #1 + 980 01e4 2A4C ldr r4, .L116+36 + 981 01e6 34F81100 ldrh r0, [r4, r1, lsl #1] + 564:Src/stm32f7xx_it.c **** else + 982 .loc 1 564 47 view .LVU210 + 983 01ea 00EB0222 add r2, r0, r2, lsl #8 + 984 01ee 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 985 .L90: + 567:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 986 .loc 1 567 13 is_stmt 1 view .LVU211 + 567:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 987 .loc 1 567 26 is_stmt 0 view .LVU212 + 988 01f2 0133 adds r3, r3, #1 + 989 01f4 1F4A ldr r2, .L116+8 + 990 01f6 1380 strh r3, [r2] @ movhi + 568:Src/stm32f7xx_it.c **** } + 991 .loc 1 568 13 is_stmt 1 view .LVU213 + 568:Src/stm32f7xx_it.c **** } + 992 .loc 1 568 39 is_stmt 0 view .LVU214 + 993 01f8 264B ldr r3, .L116+40 + 994 01fa 0022 movs r2, #0 + 995 01fc 1A70 strb r2, [r3] + 996 01fe 38E7 b .L48 + 997 .L108: + 513:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 998 .loc 1 513 13 is_stmt 1 view .LVU215 + 513:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 999 .loc 1 513 16 is_stmt 0 view .LVU216 + 1000 0200 13F0010F tst r3, #1 + 1001 0204 11D0 beq .L75 + 514:Src/stm32f7xx_it.c **** else + 1002 .loc 1 514 17 is_stmt 1 view .LVU217 + 514:Src/stm32f7xx_it.c **** else + 1003 .loc 1 514 24 is_stmt 0 view .LVU218 + 1004 0206 5B08 lsrs r3, r3, #1 + 1005 0208 013B subs r3, r3, #1 + 1006 020a 2148 ldr r0, .L116+36 + ARM GAS /tmp/ccMf3LkY.s page 161 - 983 01e8 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 984 .L74: - 511:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 985 .loc 1 511 13 is_stmt 1 view .LVU212 - 511:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 986 .loc 1 511 23 is_stmt 0 view .LVU213 - 987 01ec 294B ldr r3, .L106+28 - 988 01ee 0A22 movs r2, #10 - 989 01f0 1A70 strb r2, [r3] - 512:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 990 .loc 1 512 13 is_stmt 1 view .LVU214 - 512:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 991 .loc 1 512 27 is_stmt 0 view .LVU215 - 992 01f2 0023 movs r3, #0 - 993 01f4 224A ldr r2, .L106+8 - 994 01f6 1380 strh r3, [r2] @ movhi - 513:Src/stm32f7xx_it.c **** } - 995 .loc 1 513 13 is_stmt 1 view .LVU216 - 513:Src/stm32f7xx_it.c **** } - 996 .loc 1 513 21 is_stmt 0 view .LVU217 - 997 01f8 244A ldr r2, .L106+20 - 998 01fa 1370 strb r3, [r2] - 999 01fc 39E7 b .L48 - 1000 .L73: - 510:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; - 1001 .loc 1 510 17 is_stmt 1 view .LVU218 - 510:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; - 1002 .loc 1 510 40 is_stmt 0 view .LVU219 - 1003 01fe 5B08 lsrs r3, r3, #1 - 510:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; - 1004 .loc 1 510 46 view .LVU220 - 1005 0200 013B subs r3, r3, #1 - 510:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; - 1006 .loc 1 510 51 view .LVU221 - 1007 0202 2649 ldr r1, .L106+36 - 1008 0204 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 1009 0208 F0E7 b .L74 - 1010 .L101: - 517:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1011 .loc 1 517 13 is_stmt 1 view .LVU222 - 517:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1012 .loc 1 517 16 is_stmt 0 view .LVU223 - 1013 020a 13F0010F tst r3, #1 - 1014 020e 11D0 beq .L76 - 518:Src/stm32f7xx_it.c **** else - 1015 .loc 1 518 17 is_stmt 1 view .LVU224 - 518:Src/stm32f7xx_it.c **** else - 1016 .loc 1 518 24 is_stmt 0 view .LVU225 - 1017 0210 5B08 lsrs r3, r3, #1 - 1018 0212 013B subs r3, r3, #1 - 1019 0214 2148 ldr r0, .L106+36 - 1020 0216 30F81310 ldrh r1, [r0, r3, lsl #1] - 518:Src/stm32f7xx_it.c **** else - 1021 .loc 1 518 51 view .LVU226 - 1022 021a 01EB0222 add r2, r1, r2, lsl #8 - 1023 021e 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 1024 .L77: - ARM GAS /tmp/ccqZqdXP.s page 161 + 1007 020c 30F81310 ldrh r1, [r0, r3, lsl #1] + 514:Src/stm32f7xx_it.c **** else + 1008 .loc 1 514 51 view .LVU219 + 1009 0210 01EB0222 add r2, r1, r2, lsl #8 + 1010 0214 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1011 .L76: + 517:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1012 .loc 1 517 13 is_stmt 1 view .LVU220 + 517:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1013 .loc 1 517 23 is_stmt 0 view .LVU221 + 1014 0218 1B4B ldr r3, .L116+28 + 1015 021a 0A22 movs r2, #10 + 1016 021c 1A70 strb r2, [r3] + 518:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1017 .loc 1 518 13 is_stmt 1 view .LVU222 + 518:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1018 .loc 1 518 27 is_stmt 0 view .LVU223 + 1019 021e 0023 movs r3, #0 + 1020 0220 144A ldr r2, .L116+8 + 1021 0222 1380 strh r3, [r2] @ movhi + 519:Src/stm32f7xx_it.c **** } + 1022 .loc 1 519 13 is_stmt 1 view .LVU224 + 519:Src/stm32f7xx_it.c **** } + 1023 .loc 1 519 21 is_stmt 0 view .LVU225 + 1024 0224 164A ldr r2, .L116+20 + 1025 0226 1370 strb r3, [r2] + 1026 0228 23E7 b .L48 + 1027 .L75: + 516:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 1028 .loc 1 516 17 is_stmt 1 view .LVU226 + 516:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 1029 .loc 1 516 40 is_stmt 0 view .LVU227 + 1030 022a 5B08 lsrs r3, r3, #1 + 516:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 1031 .loc 1 516 46 view .LVU228 + 1032 022c 013B subs r3, r3, #1 + 516:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD; + 1033 .loc 1 516 51 view .LVU229 + 1034 022e 1849 ldr r1, .L116+36 + 1035 0230 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1036 0234 F0E7 b .L76 + 1037 .L109: + 523:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1038 .loc 1 523 13 is_stmt 1 view .LVU230 + 523:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1039 .loc 1 523 16 is_stmt 0 view .LVU231 + 1040 0236 13F0010F tst r3, #1 + 1041 023a 11D0 beq .L78 + 524:Src/stm32f7xx_it.c **** else + 1042 .loc 1 524 17 is_stmt 1 view .LVU232 + 524:Src/stm32f7xx_it.c **** else + 1043 .loc 1 524 24 is_stmt 0 view .LVU233 + 1044 023c 5B08 lsrs r3, r3, #1 + 1045 023e 013B subs r3, r3, #1 + 1046 0240 1348 ldr r0, .L116+36 + 1047 0242 30F81310 ldrh r1, [r0, r3, lsl #1] + 524:Src/stm32f7xx_it.c **** else + ARM GAS /tmp/ccMf3LkY.s page 162 - 521:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1025 .loc 1 521 13 is_stmt 1 view .LVU227 - 521:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1026 .loc 1 521 23 is_stmt 0 view .LVU228 - 1027 0222 1C4B ldr r3, .L106+28 - 1028 0224 0B22 movs r2, #11 - 1029 0226 1A70 strb r2, [r3] - 522:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1030 .loc 1 522 13 is_stmt 1 view .LVU229 - 522:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1031 .loc 1 522 27 is_stmt 0 view .LVU230 - 1032 0228 0023 movs r3, #0 - 1033 022a 154A ldr r2, .L106+8 - 1034 022c 1380 strh r3, [r2] @ movhi - 523:Src/stm32f7xx_it.c **** } - 1035 .loc 1 523 13 is_stmt 1 view .LVU231 - 523:Src/stm32f7xx_it.c **** } - 1036 .loc 1 523 21 is_stmt 0 view .LVU232 - 1037 022e 174A ldr r2, .L106+20 - 1038 0230 1370 strb r3, [r2] - 1039 0232 1EE7 b .L48 - 1040 .L76: - 520:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; - 1041 .loc 1 520 17 is_stmt 1 view .LVU233 - 520:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; - 1042 .loc 1 520 40 is_stmt 0 view .LVU234 - 1043 0234 5B08 lsrs r3, r3, #1 - 520:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; - 1044 .loc 1 520 46 view .LVU235 - 1045 0236 013B subs r3, r3, #1 - 520:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; - 1046 .loc 1 520 51 view .LVU236 - 1047 0238 1849 ldr r1, .L106+36 - 1048 023a 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 1049 023e F0E7 b .L77 - 1050 .L102: - 527:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1051 .loc 1 527 13 is_stmt 1 view .LVU237 - 527:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1052 .loc 1 527 16 is_stmt 0 view .LVU238 - 1053 0240 13F0010F tst r3, #1 - 1054 0244 11D0 beq .L79 - 528:Src/stm32f7xx_it.c **** else - 1055 .loc 1 528 17 is_stmt 1 view .LVU239 - 528:Src/stm32f7xx_it.c **** else - 1056 .loc 1 528 24 is_stmt 0 view .LVU240 - 1057 0246 5B08 lsrs r3, r3, #1 - 1058 0248 013B subs r3, r3, #1 - 1059 024a 1448 ldr r0, .L106+36 - 1060 024c 30F81310 ldrh r1, [r0, r3, lsl #1] - 528:Src/stm32f7xx_it.c **** else - 1061 .loc 1 528 51 view .LVU241 - 1062 0250 01EB0222 add r2, r1, r2, lsl #8 - 1063 0254 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 1064 .L80: - 531:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1065 .loc 1 531 13 is_stmt 1 view .LVU242 - ARM GAS /tmp/ccqZqdXP.s page 162 + 1048 .loc 1 524 51 view .LVU234 + 1049 0246 01EB0222 add r2, r1, r2, lsl #8 + 1050 024a 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1051 .L79: + 527:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1052 .loc 1 527 13 is_stmt 1 view .LVU235 + 527:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1053 .loc 1 527 23 is_stmt 0 view .LVU236 + 1054 024e 0E4B ldr r3, .L116+28 + 1055 0250 0B22 movs r2, #11 + 1056 0252 1A70 strb r2, [r3] + 528:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1057 .loc 1 528 13 is_stmt 1 view .LVU237 + 528:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1058 .loc 1 528 27 is_stmt 0 view .LVU238 + 1059 0254 0023 movs r3, #0 + 1060 0256 074A ldr r2, .L116+8 + 1061 0258 1380 strh r3, [r2] @ movhi + 529:Src/stm32f7xx_it.c **** } + 1062 .loc 1 529 13 is_stmt 1 view .LVU239 + 529:Src/stm32f7xx_it.c **** } + 1063 .loc 1 529 21 is_stmt 0 view .LVU240 + 1064 025a 094A ldr r2, .L116+20 + 1065 025c 1370 strb r3, [r2] + 1066 025e 08E7 b .L48 + 1067 .L78: + 526:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; + 1068 .loc 1 526 17 is_stmt 1 view .LVU241 + 526:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; + 1069 .loc 1 526 40 is_stmt 0 view .LVU242 + 1070 0260 5B08 lsrs r3, r3, #1 + 526:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; + 1071 .loc 1 526 46 view .LVU243 + 1072 0262 013B subs r3, r3, #1 + 526:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD; + 1073 .loc 1 526 51 view .LVU244 + 1074 0264 0A49 ldr r1, .L116+36 + 1075 0266 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1076 026a F0E7 b .L79 + 1077 .L117: + 1078 .align 2 + 1079 .L116: + 1080 026c 00100140 .word 1073811456 + 1081 0270 00000000 .word uart_buf + 1082 0274 00000000 .word UART_rec_incr + 1083 0278 00000000 .word TO6 + 1084 027c 00000000 .word TO6_uart + 1085 0280 00000000 .word flg_tmt + 1086 0284 00000000 .word UART_header + 1087 0288 00000000 .word CPU_state + 1088 028c 00000000 .word State_Data + 1089 0290 00000000 .word COMMAND + 1090 0294 00000000 .word UART_transmission_request + 1091 .L110: + 533:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1092 .loc 1 533 13 is_stmt 1 view .LVU245 + 533:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + ARM GAS /tmp/ccMf3LkY.s page 163 - 531:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1066 .loc 1 531 23 is_stmt 0 view .LVU243 - 1067 0258 0E4B ldr r3, .L106+28 - 1068 025a 0C22 movs r2, #12 - 1069 025c 1A70 strb r2, [r3] - 532:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1070 .loc 1 532 13 is_stmt 1 view .LVU244 - 532:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1071 .loc 1 532 27 is_stmt 0 view .LVU245 - 1072 025e 0023 movs r3, #0 - 1073 0260 074A ldr r2, .L106+8 - 1074 0262 1380 strh r3, [r2] @ movhi - 533:Src/stm32f7xx_it.c **** } - 1075 .loc 1 533 13 is_stmt 1 view .LVU246 - 533:Src/stm32f7xx_it.c **** } - 1076 .loc 1 533 21 is_stmt 0 view .LVU247 - 1077 0264 094A ldr r2, .L106+20 - 1078 0266 1370 strb r3, [r2] - 1079 0268 03E7 b .L48 - 1080 .L79: - 530:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; - 1081 .loc 1 530 17 is_stmt 1 view .LVU248 - 530:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; - 1082 .loc 1 530 40 is_stmt 0 view .LVU249 - 1083 026a 5B08 lsrs r3, r3, #1 - 530:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; - 1084 .loc 1 530 46 view .LVU250 - 1085 026c 013B subs r3, r3, #1 - 530:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; - 1086 .loc 1 530 51 view .LVU251 - 1087 026e 0B49 ldr r1, .L106+36 - 1088 0270 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 1089 0274 F0E7 b .L80 - 1090 .L107: - 1091 0276 00BF .align 2 - 1092 .L106: - 1093 0278 00100140 .word 1073811456 - 1094 027c 00000000 .word uart_buf - 1095 0280 00000000 .word UART_rec_incr - 1096 0284 00000000 .word TO6 - 1097 0288 00000000 .word TO6_uart - 1098 028c 00000000 .word flg_tmt - 1099 0290 00000000 .word UART_header - 1100 0294 00000000 .word CPU_state - 1101 0298 00000000 .word State_Data - 1102 029c 00000000 .word COMMAND - 1103 02a0 00000000 .word UART_transmission_request - 1104 .L103: - 537:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1105 .loc 1 537 13 is_stmt 1 view .LVU252 - 537:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1106 .loc 1 537 16 is_stmt 0 view .LVU253 - 1107 02a4 13F0010F tst r3, #1 - 1108 02a8 11D0 beq .L82 - 538:Src/stm32f7xx_it.c **** else - 1109 .loc 1 538 17 is_stmt 1 view .LVU254 - 538:Src/stm32f7xx_it.c **** else - ARM GAS /tmp/ccqZqdXP.s page 163 + 1093 .loc 1 533 16 is_stmt 0 view .LVU246 + 1094 0298 13F0010F tst r3, #1 + 1095 029c 11D0 beq .L81 + 534:Src/stm32f7xx_it.c **** else + 1096 .loc 1 534 17 is_stmt 1 view .LVU247 + 534:Src/stm32f7xx_it.c **** else + 1097 .loc 1 534 24 is_stmt 0 view .LVU248 + 1098 029e 5B08 lsrs r3, r3, #1 + 1099 02a0 013B subs r3, r3, #1 + 1100 02a2 7F48 ldr r0, .L118 + 1101 02a4 30F81310 ldrh r1, [r0, r3, lsl #1] + 534:Src/stm32f7xx_it.c **** else + 1102 .loc 1 534 51 view .LVU249 + 1103 02a8 01EB0222 add r2, r1, r2, lsl #8 + 1104 02ac 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1105 .L82: + 537:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1106 .loc 1 537 13 is_stmt 1 view .LVU250 + 537:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1107 .loc 1 537 23 is_stmt 0 view .LVU251 + 1108 02b0 7C4B ldr r3, .L118+4 + 1109 02b2 0C22 movs r2, #12 + 1110 02b4 1A70 strb r2, [r3] + 538:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1111 .loc 1 538 13 is_stmt 1 view .LVU252 + 538:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1112 .loc 1 538 27 is_stmt 0 view .LVU253 + 1113 02b6 0023 movs r3, #0 + 1114 02b8 7B4A ldr r2, .L118+8 + 1115 02ba 1380 strh r3, [r2] @ movhi + 539:Src/stm32f7xx_it.c **** } + 1116 .loc 1 539 13 is_stmt 1 view .LVU254 + 539:Src/stm32f7xx_it.c **** } + 1117 .loc 1 539 21 is_stmt 0 view .LVU255 + 1118 02bc 7B4A ldr r2, .L118+12 + 1119 02be 1370 strb r3, [r2] + 1120 02c0 D7E6 b .L48 + 1121 .L81: + 536:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; + 1122 .loc 1 536 17 is_stmt 1 view .LVU256 + 536:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; + 1123 .loc 1 536 40 is_stmt 0 view .LVU257 + 1124 02c2 5B08 lsrs r3, r3, #1 + 536:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; + 1125 .loc 1 536 46 view .LVU258 + 1126 02c4 013B subs r3, r3, #1 + 536:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD; + 1127 .loc 1 536 51 view .LVU259 + 1128 02c6 7649 ldr r1, .L118 + 1129 02c8 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1130 02cc F0E7 b .L82 + 1131 .L111: + 543:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1132 .loc 1 543 13 is_stmt 1 view .LVU260 + 543:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1133 .loc 1 543 16 is_stmt 0 view .LVU261 + 1134 02ce 13F0010F tst r3, #1 + ARM GAS /tmp/ccMf3LkY.s page 164 - 1110 .loc 1 538 24 is_stmt 0 view .LVU255 - 1111 02aa 5B08 lsrs r3, r3, #1 - 1112 02ac 013B subs r3, r3, #1 - 1113 02ae 5448 ldr r0, .L108 - 1114 02b0 30F81310 ldrh r1, [r0, r3, lsl #1] - 538:Src/stm32f7xx_it.c **** else - 1115 .loc 1 538 51 view .LVU256 - 1116 02b4 01EB0222 add r2, r1, r2, lsl #8 - 1117 02b8 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 1118 .L83: - 541:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1119 .loc 1 541 13 is_stmt 1 view .LVU257 - 541:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1120 .loc 1 541 23 is_stmt 0 view .LVU258 - 1121 02bc 514B ldr r3, .L108+4 - 1122 02be 0D22 movs r2, #13 - 1123 02c0 1A70 strb r2, [r3] - 542:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1124 .loc 1 542 13 is_stmt 1 view .LVU259 - 542:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1125 .loc 1 542 27 is_stmt 0 view .LVU260 - 1126 02c2 0023 movs r3, #0 - 1127 02c4 504A ldr r2, .L108+8 - 1128 02c6 1380 strh r3, [r2] @ movhi - 543:Src/stm32f7xx_it.c **** } - 1129 .loc 1 543 13 is_stmt 1 view .LVU261 - 543:Src/stm32f7xx_it.c **** } - 1130 .loc 1 543 21 is_stmt 0 view .LVU262 - 1131 02c8 504A ldr r2, .L108+12 - 1132 02ca 1370 strb r3, [r2] - 1133 02cc D1E6 b .L48 - 1134 .L82: - 540:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; - 1135 .loc 1 540 17 is_stmt 1 view .LVU263 - 540:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; - 1136 .loc 1 540 40 is_stmt 0 view .LVU264 - 1137 02ce 5B08 lsrs r3, r3, #1 - 540:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; - 1138 .loc 1 540 46 view .LVU265 - 1139 02d0 013B subs r3, r3, #1 - 540:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; - 1140 .loc 1 540 51 view .LVU266 - 1141 02d2 4B49 ldr r1, .L108 - 1142 02d4 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 1143 02d8 F0E7 b .L83 - 1144 .L84: - 550:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1145 .loc 1 550 17 is_stmt 1 view .LVU267 - 550:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1146 .loc 1 550 39 is_stmt 0 view .LVU268 - 1147 02da 5908 lsrs r1, r3, #1 - 550:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1148 .loc 1 550 43 view .LVU269 - 1149 02dc 0139 subs r1, r1, #1 - 550:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1150 .loc 1 550 47 view .LVU270 - 1151 02de 4848 ldr r0, .L108 - ARM GAS /tmp/ccqZqdXP.s page 164 + 1135 02d2 11D0 beq .L84 + 544:Src/stm32f7xx_it.c **** else + 1136 .loc 1 544 17 is_stmt 1 view .LVU262 + 544:Src/stm32f7xx_it.c **** else + 1137 .loc 1 544 24 is_stmt 0 view .LVU263 + 1138 02d4 5B08 lsrs r3, r3, #1 + 1139 02d6 013B subs r3, r3, #1 + 1140 02d8 7148 ldr r0, .L118 + 1141 02da 30F81310 ldrh r1, [r0, r3, lsl #1] + 544:Src/stm32f7xx_it.c **** else + 1142 .loc 1 544 51 view .LVU264 + 1143 02de 01EB0222 add r2, r1, r2, lsl #8 + 1144 02e2 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1145 .L85: + 547:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1146 .loc 1 547 13 is_stmt 1 view .LVU265 + 547:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1147 .loc 1 547 23 is_stmt 0 view .LVU266 + 1148 02e6 6F4B ldr r3, .L118+4 + 1149 02e8 0D22 movs r2, #13 + 1150 02ea 1A70 strb r2, [r3] + 548:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1151 .loc 1 548 13 is_stmt 1 view .LVU267 + 548:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1152 .loc 1 548 27 is_stmt 0 view .LVU268 + 1153 02ec 0023 movs r3, #0 + 1154 02ee 6E4A ldr r2, .L118+8 + 1155 02f0 1380 strh r3, [r2] @ movhi + 549:Src/stm32f7xx_it.c **** } + 1156 .loc 1 549 13 is_stmt 1 view .LVU269 + 549:Src/stm32f7xx_it.c **** } + 1157 .loc 1 549 21 is_stmt 0 view .LVU270 + 1158 02f2 6E4A ldr r2, .L118+12 + 1159 02f4 1370 strb r3, [r2] + 1160 02f6 BCE6 b .L48 + 1161 .L84: + 546:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; + 1162 .loc 1 546 17 is_stmt 1 view .LVU271 + 546:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; + 1163 .loc 1 546 40 is_stmt 0 view .LVU272 + 1164 02f8 5B08 lsrs r3, r3, #1 + 546:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; + 1165 .loc 1 546 46 view .LVU273 + 1166 02fa 013B subs r3, r3, #1 + 546:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD; + 1167 .loc 1 546 51 view .LVU274 + 1168 02fc 6849 ldr r1, .L118 + 1169 02fe 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1170 0302 F0E7 b .L85 + 1171 .L112: + 553:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1172 .loc 1 553 13 is_stmt 1 view .LVU275 + 553:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1173 .loc 1 553 16 is_stmt 0 view .LVU276 + 1174 0304 13F0010F tst r3, #1 + 1175 0308 11D0 beq .L87 + 554:Src/stm32f7xx_it.c **** else + ARM GAS /tmp/ccMf3LkY.s page 165 - 1152 02e0 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 1153 02e4 6FE7 b .L85 - 1154 .L52: - 557:Src/stm32f7xx_it.c **** { - 1155 .loc 1 557 9 is_stmt 1 view .LVU271 - 557:Src/stm32f7xx_it.c **** { - 1156 .loc 1 557 25 is_stmt 0 view .LVU272 - 1157 02e6 4A49 ldr r1, .L108+16 - 1158 02e8 0888 ldrh r0, [r1] - 557:Src/stm32f7xx_it.c **** { - 1159 .loc 1 557 12 view .LVU273 - 1160 02ea 41F21111 movw r1, #4369 - 1161 02ee 8842 cmp r0, r1 - 1162 02f0 12D0 beq .L104 - 569:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1163 .loc 1 569 13 is_stmt 1 view .LVU274 - 569:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1164 .loc 1 569 16 is_stmt 0 view .LVU275 - 1165 02f2 13F0010F tst r3, #1 - 1166 02f6 2AD0 beq .L89 - 570:Src/stm32f7xx_it.c **** else - 1167 .loc 1 570 17 is_stmt 1 view .LVU276 - 570:Src/stm32f7xx_it.c **** else - 1168 .loc 1 570 24 is_stmt 0 view .LVU277 - 1169 02f8 5908 lsrs r1, r3, #1 - 1170 02fa 0139 subs r1, r1, #1 - 1171 02fc 404C ldr r4, .L108 - 1172 02fe 34F81100 ldrh r0, [r4, r1, lsl #1] - 570:Src/stm32f7xx_it.c **** else - 1173 .loc 1 570 47 view .LVU278 - 1174 0302 00EB0222 add r2, r0, r2, lsl #8 - 1175 0306 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - 1176 .L90: - 573:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1177 .loc 1 573 12 is_stmt 1 view .LVU279 - 573:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1178 .loc 1 573 25 is_stmt 0 view .LVU280 - 1179 030a 0133 adds r3, r3, #1 - 1180 030c 3E4A ldr r2, .L108+8 - 1181 030e 1380 strh r3, [r2] @ movhi - 574:Src/stm32f7xx_it.c **** } - 1182 .loc 1 574 12 is_stmt 1 view .LVU281 - 574:Src/stm32f7xx_it.c **** } - 1183 .loc 1 574 38 is_stmt 0 view .LVU282 - 1184 0310 404B ldr r3, .L108+20 - 1185 0312 0022 movs r2, #0 - 1186 0314 1A70 strb r2, [r3] - 1187 0316 ACE6 b .L48 - 1188 .L104: - 559:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1189 .loc 1 559 13 is_stmt 1 view .LVU283 - 559:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; - 1190 .loc 1 559 16 is_stmt 0 view .LVU284 - 1191 0318 13F0010F tst r3, #1 - 1192 031c 11D0 beq .L87 - 560:Src/stm32f7xx_it.c **** else - 1193 .loc 1 560 17 is_stmt 1 view .LVU285 - ARM GAS /tmp/ccqZqdXP.s page 165 + 1176 .loc 1 554 17 is_stmt 1 view .LVU277 + 554:Src/stm32f7xx_it.c **** else + 1177 .loc 1 554 24 is_stmt 0 view .LVU278 + 1178 030a 5B08 lsrs r3, r3, #1 + 1179 030c 013B subs r3, r3, #1 + 1180 030e 6448 ldr r0, .L118 + 1181 0310 30F81310 ldrh r1, [r0, r3, lsl #1] + 554:Src/stm32f7xx_it.c **** else + 1182 .loc 1 554 51 view .LVU279 + 1183 0314 01EB0222 add r2, r1, r2, lsl #8 + 1184 0318 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1185 .L88: + 557:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1186 .loc 1 557 13 is_stmt 1 view .LVU280 + 557:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1187 .loc 1 557 23 is_stmt 0 view .LVU281 + 1188 031c 614B ldr r3, .L118+4 + 1189 031e 0E22 movs r2, #14 + 1190 0320 1A70 strb r2, [r3] + 558:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1191 .loc 1 558 13 is_stmt 1 view .LVU282 + 558:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1192 .loc 1 558 27 is_stmt 0 view .LVU283 + 1193 0322 0023 movs r3, #0 + 1194 0324 604A ldr r2, .L118+8 + 1195 0326 1380 strh r3, [r2] @ movhi + 559:Src/stm32f7xx_it.c **** } + 1196 .loc 1 559 13 is_stmt 1 view .LVU284 + 559:Src/stm32f7xx_it.c **** } + 1197 .loc 1 559 21 is_stmt 0 view .LVU285 + 1198 0328 604A ldr r2, .L118+12 + 1199 032a 1370 strb r3, [r2] + 1200 032c A1E6 b .L48 + 1201 .L87: + 556:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_CTRL_CMD; + 1202 .loc 1 556 17 is_stmt 1 view .LVU286 + 556:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_CTRL_CMD; + 1203 .loc 1 556 40 is_stmt 0 view .LVU287 + 1204 032e 5B08 lsrs r3, r3, #1 + 556:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_CTRL_CMD; + 1205 .loc 1 556 46 view .LVU288 + 1206 0330 013B subs r3, r3, #1 + 556:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_CTRL_CMD; + 1207 .loc 1 556 51 view .LVU289 + 1208 0332 5B49 ldr r1, .L118 + 1209 0334 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1210 0338 F0E7 b .L88 + 1211 .L89: + 566:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1212 .loc 1 566 17 is_stmt 1 view .LVU290 + 566:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1213 .loc 1 566 39 is_stmt 0 view .LVU291 + 1214 033a 5908 lsrs r1, r3, #1 + 566:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1215 .loc 1 566 43 view .LVU292 + 1216 033c 0139 subs r1, r1, #1 + 566:Src/stm32f7xx_it.c **** UART_rec_incr++; + ARM GAS /tmp/ccMf3LkY.s page 166 - 560:Src/stm32f7xx_it.c **** else - 1194 .loc 1 560 24 is_stmt 0 view .LVU286 - 1195 031e 5B08 lsrs r3, r3, #1 - 1196 0320 013B subs r3, r3, #1 - 1197 0322 3748 ldr r0, .L108 - 1198 0324 30F81310 ldrh r1, [r0, r3, lsl #1] - 560:Src/stm32f7xx_it.c **** else - 1199 .loc 1 560 51 view .LVU287 - 1200 0328 01EB0222 add r2, r1, r2, lsl #8 - 1201 032c 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 1202 .L88: - 563:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1203 .loc 1 563 13 is_stmt 1 view .LVU288 - 563:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1204 .loc 1 563 23 is_stmt 0 view .LVU289 - 1205 0330 344B ldr r3, .L108+4 - 1206 0332 0122 movs r2, #1 - 1207 0334 1A70 strb r2, [r3] - 564:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1208 .loc 1 564 13 is_stmt 1 view .LVU290 - 564:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1209 .loc 1 564 27 is_stmt 0 view .LVU291 - 1210 0336 0023 movs r3, #0 - 1211 0338 334A ldr r2, .L108+8 - 1212 033a 1380 strh r3, [r2] @ movhi - 565:Src/stm32f7xx_it.c **** } - 1213 .loc 1 565 13 is_stmt 1 view .LVU292 - 565:Src/stm32f7xx_it.c **** } - 1214 .loc 1 565 21 is_stmt 0 view .LVU293 - 1215 033c 334A ldr r2, .L108+12 - 1216 033e 1370 strb r3, [r2] - 1217 0340 97E6 b .L48 - 1218 .L87: - 562:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 1219 .loc 1 562 17 is_stmt 1 view .LVU294 - 562:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 1220 .loc 1 562 40 is_stmt 0 view .LVU295 - 1221 0342 5B08 lsrs r3, r3, #1 - 562:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 1222 .loc 1 562 46 view .LVU296 - 1223 0344 013B subs r3, r3, #1 - 562:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; - 1224 .loc 1 562 51 view .LVU297 - 1225 0346 2E49 ldr r1, .L108 - 1226 0348 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 1227 034c F0E7 b .L88 - 1228 .L89: - 572:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1229 .loc 1 572 17 is_stmt 1 view .LVU298 - 572:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1230 .loc 1 572 39 is_stmt 0 view .LVU299 - 1231 034e 5908 lsrs r1, r3, #1 - 572:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1232 .loc 1 572 43 view .LVU300 - 1233 0350 0139 subs r1, r1, #1 - 572:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1234 .loc 1 572 47 view .LVU301 - ARM GAS /tmp/ccqZqdXP.s page 166 + 1217 .loc 1 566 47 view .LVU293 + 1218 033e 5848 ldr r0, .L118 + 1219 0340 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1220 0344 55E7 b .L90 + 1221 .L52: + 573:Src/stm32f7xx_it.c **** { + 1222 .loc 1 573 9 is_stmt 1 view .LVU294 + 573:Src/stm32f7xx_it.c **** { + 1223 .loc 1 573 25 is_stmt 0 view .LVU295 + 1224 0346 5A49 ldr r1, .L118+16 + 1225 0348 0988 ldrh r1, [r1] + 573:Src/stm32f7xx_it.c **** { + 1226 .loc 1 573 12 view .LVU296 + 1227 034a 41F21110 movw r0, #4369 + 1228 034e 8142 cmp r1, r0 + 1229 0350 16D0 beq .L113 + 583:Src/stm32f7xx_it.c **** { + 1230 .loc 1 583 14 is_stmt 1 view .LVU297 + 583:Src/stm32f7xx_it.c **** { + 1231 .loc 1 583 17 is_stmt 0 view .LVU298 + 1232 0352 4DF6DD50 movw r0, #56797 + 1233 0356 8142 cmp r1, r0 + 1234 0358 2DD0 beq .L114 + 595:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1235 .loc 1 595 13 is_stmt 1 view .LVU299 + 595:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1236 .loc 1 595 16 is_stmt 0 view .LVU300 + 1237 035a 13F0010F tst r3, #1 + 1238 035e 45D0 beq .L97 + 596:Src/stm32f7xx_it.c **** else + 1239 .loc 1 596 17 is_stmt 1 view .LVU301 + 596:Src/stm32f7xx_it.c **** else + 1240 .loc 1 596 24 is_stmt 0 view .LVU302 + 1241 0360 5908 lsrs r1, r3, #1 + 1242 0362 0139 subs r1, r1, #1 + 1243 0364 4E4C ldr r4, .L118 + 1244 0366 34F81100 ldrh r0, [r4, r1, lsl #1] + 596:Src/stm32f7xx_it.c **** else + 1245 .loc 1 596 47 view .LVU303 + 1246 036a 00EB0222 add r2, r0, r2, lsl #8 + 1247 036e 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 1248 .L98: + 599:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1249 .loc 1 599 12 is_stmt 1 view .LVU304 + 599:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1250 .loc 1 599 25 is_stmt 0 view .LVU305 + 1251 0372 0133 adds r3, r3, #1 + 1252 0374 4C4A ldr r2, .L118+8 + 1253 0376 1380 strh r3, [r2] @ movhi + 600:Src/stm32f7xx_it.c **** } + 1254 .loc 1 600 12 is_stmt 1 view .LVU306 + 600:Src/stm32f7xx_it.c **** } + 1255 .loc 1 600 38 is_stmt 0 view .LVU307 + 1256 0378 4E4B ldr r3, .L118+20 + 1257 037a 0022 movs r2, #0 + 1258 037c 1A70 strb r2, [r3] + 1259 037e 78E6 b .L48 + ARM GAS /tmp/ccMf3LkY.s page 167 - 1235 0352 2B48 ldr r0, .L108 - 1236 0354 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 1237 0358 D7E7 b .L90 - 1238 .L50: - 578:Src/stm32f7xx_it.c **** { - 1239 .loc 1 578 9 is_stmt 1 view .LVU302 - 578:Src/stm32f7xx_it.c **** { - 1240 .loc 1 578 25 is_stmt 0 view .LVU303 - 1241 035a 2D49 ldr r1, .L108+16 - 1242 035c 0888 ldrh r0, [r1] - 578:Src/stm32f7xx_it.c **** { - 1243 .loc 1 578 12 view .LVU304 - 1244 035e 47F27771 movw r1, #30583 - 1245 0362 8842 cmp r0, r1 - 1246 0364 12D0 beq .L105 - 590:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1247 .loc 1 590 13 is_stmt 1 view .LVU305 - 590:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1248 .loc 1 590 16 is_stmt 0 view .LVU306 - 1249 0366 13F0010F tst r3, #1 - 1250 036a 2AD0 beq .L94 - 591:Src/stm32f7xx_it.c **** else - 1251 .loc 1 591 17 is_stmt 1 view .LVU307 - 591:Src/stm32f7xx_it.c **** else - 1252 .loc 1 591 24 is_stmt 0 view .LVU308 - 1253 036c 5908 lsrs r1, r3, #1 - 1254 036e 0139 subs r1, r1, #1 - 1255 0370 234C ldr r4, .L108 - 1256 0372 34F81100 ldrh r0, [r4, r1, lsl #1] - 591:Src/stm32f7xx_it.c **** else - 1257 .loc 1 591 47 view .LVU309 - 1258 0376 00EB0222 add r2, r0, r2, lsl #8 - 1259 037a 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - 1260 .L95: - 594:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1261 .loc 1 594 13 is_stmt 1 view .LVU310 - 594:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1262 .loc 1 594 26 is_stmt 0 view .LVU311 - 1263 037e 0133 adds r3, r3, #1 - 1264 0380 214A ldr r2, .L108+8 - 1265 0382 1380 strh r3, [r2] @ movhi - 595:Src/stm32f7xx_it.c **** } - 1266 .loc 1 595 13 is_stmt 1 view .LVU312 - 595:Src/stm32f7xx_it.c **** } - 1267 .loc 1 595 39 is_stmt 0 view .LVU313 - 1268 0384 234B ldr r3, .L108+20 - 1269 0386 0022 movs r2, #0 - 1270 0388 1A70 strb r2, [r3] - 1271 038a 72E6 b .L48 - 1272 .L105: - 580:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1273 .loc 1 580 13 is_stmt 1 view .LVU314 - 580:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1274 .loc 1 580 16 is_stmt 0 view .LVU315 - 1275 038c 13F0010F tst r3, #1 - 1276 0390 11D0 beq .L92 - 581:Src/stm32f7xx_it.c **** else - ARM GAS /tmp/ccqZqdXP.s page 167 + 1260 .L113: + 575:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1261 .loc 1 575 13 is_stmt 1 view .LVU308 + 575:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1262 .loc 1 575 16 is_stmt 0 view .LVU309 + 1263 0380 13F0010F tst r3, #1 + 1264 0384 11D0 beq .L92 + 576:Src/stm32f7xx_it.c **** else + 1265 .loc 1 576 17 is_stmt 1 view .LVU310 + 576:Src/stm32f7xx_it.c **** else + 1266 .loc 1 576 24 is_stmt 0 view .LVU311 + 1267 0386 5B08 lsrs r3, r3, #1 + 1268 0388 013B subs r3, r3, #1 + 1269 038a 4548 ldr r0, .L118 + 1270 038c 30F81310 ldrh r1, [r0, r3, lsl #1] + 576:Src/stm32f7xx_it.c **** else + 1271 .loc 1 576 51 view .LVU312 + 1272 0390 01EB0222 add r2, r1, r2, lsl #8 + 1273 0394 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1274 .L93: + 579:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1275 .loc 1 579 13 is_stmt 1 view .LVU313 + 579:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1276 .loc 1 579 23 is_stmt 0 view .LVU314 + 1277 0398 424B ldr r3, .L118+4 + 1278 039a 0122 movs r2, #1 + 1279 039c 1A70 strb r2, [r3] + 580:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1280 .loc 1 580 13 is_stmt 1 view .LVU315 + 580:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1281 .loc 1 580 27 is_stmt 0 view .LVU316 + 1282 039e 0023 movs r3, #0 + 1283 03a0 414A ldr r2, .L118+8 + 1284 03a2 1380 strh r3, [r2] @ movhi + 581:Src/stm32f7xx_it.c **** } + 1285 .loc 1 581 13 is_stmt 1 view .LVU317 + 581:Src/stm32f7xx_it.c **** } + 1286 .loc 1 581 21 is_stmt 0 view .LVU318 + 1287 03a4 414A ldr r2, .L118+12 + 1288 03a6 1370 strb r3, [r2] + 1289 03a8 63E6 b .L48 + 1290 .L92: + 578:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1291 .loc 1 578 17 is_stmt 1 view .LVU319 + 578:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1292 .loc 1 578 40 is_stmt 0 view .LVU320 + 1293 03aa 5B08 lsrs r3, r3, #1 + 578:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1294 .loc 1 578 46 view .LVU321 + 1295 03ac 013B subs r3, r3, #1 + 578:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE; + 1296 .loc 1 578 51 view .LVU322 + 1297 03ae 3C49 ldr r1, .L118 + 1298 03b0 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1299 03b4 F0E7 b .L93 + 1300 .L114: + 585:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + ARM GAS /tmp/ccMf3LkY.s page 168 - 1277 .loc 1 581 16 is_stmt 1 view .LVU316 - 581:Src/stm32f7xx_it.c **** else - 1278 .loc 1 581 23 is_stmt 0 view .LVU317 - 1279 0392 5B08 lsrs r3, r3, #1 - 1280 0394 013B subs r3, r3, #1 - 1281 0396 1A48 ldr r0, .L108 - 1282 0398 30F81310 ldrh r1, [r0, r3, lsl #1] - 581:Src/stm32f7xx_it.c **** else - 1283 .loc 1 581 46 view .LVU318 - 1284 039c 01EB0222 add r2, r1, r2, lsl #8 - 1285 03a0 20F81320 strh r2, [r0, r3, lsl #1] @ movhi - 1286 .L93: - 584:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1287 .loc 1 584 13 is_stmt 1 view .LVU319 - 584:Src/stm32f7xx_it.c **** UART_rec_incr = 0; - 1288 .loc 1 584 23 is_stmt 0 view .LVU320 - 1289 03a4 174B ldr r3, .L108+4 - 1290 03a6 0822 movs r2, #8 - 1291 03a8 1A70 strb r2, [r3] - 585:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1292 .loc 1 585 13 is_stmt 1 view .LVU321 - 585:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag - 1293 .loc 1 585 27 is_stmt 0 view .LVU322 - 1294 03aa 0023 movs r3, #0 - 1295 03ac 164A ldr r2, .L108+8 - 1296 03ae 1380 strh r3, [r2] @ movhi - 586:Src/stm32f7xx_it.c **** } - 1297 .loc 1 586 13 is_stmt 1 view .LVU323 - 586:Src/stm32f7xx_it.c **** } - 1298 .loc 1 586 21 is_stmt 0 view .LVU324 - 1299 03b0 164A ldr r2, .L108+12 - 1300 03b2 1370 strb r3, [r2] - 1301 03b4 5DE6 b .L48 - 1302 .L92: - 583:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1303 .loc 1 583 17 is_stmt 1 view .LVU325 - 583:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1304 .loc 1 583 39 is_stmt 0 view .LVU326 - 1305 03b6 5B08 lsrs r3, r3, #1 - 583:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1306 .loc 1 583 43 view .LVU327 - 1307 03b8 013B subs r3, r3, #1 - 583:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; - 1308 .loc 1 583 47 view .LVU328 - 1309 03ba 1149 ldr r1, .L108 - 1310 03bc 21F81320 strh r2, [r1, r3, lsl #1] @ movhi - 1311 03c0 F0E7 b .L93 - 1312 .L94: - 593:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1313 .loc 1 593 17 is_stmt 1 view .LVU329 - 593:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1314 .loc 1 593 39 is_stmt 0 view .LVU330 - 1315 03c2 5908 lsrs r1, r3, #1 - 593:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1316 .loc 1 593 43 view .LVU331 - 1317 03c4 0139 subs r1, r1, #1 - 593:Src/stm32f7xx_it.c **** UART_rec_incr++; - ARM GAS /tmp/ccqZqdXP.s page 168 + 1301 .loc 1 585 13 is_stmt 1 view .LVU323 + 585:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8; + 1302 .loc 1 585 16 is_stmt 0 view .LVU324 + 1303 03b6 13F0010F tst r3, #1 + 1304 03ba 11D0 beq .L95 + 586:Src/stm32f7xx_it.c **** else + 1305 .loc 1 586 17 is_stmt 1 view .LVU325 + 586:Src/stm32f7xx_it.c **** else + 1306 .loc 1 586 24 is_stmt 0 view .LVU326 + 1307 03bc 5B08 lsrs r3, r3, #1 + 1308 03be 013B subs r3, r3, #1 + 1309 03c0 3748 ldr r0, .L118 + 1310 03c2 30F81310 ldrh r1, [r0, r3, lsl #1] + 586:Src/stm32f7xx_it.c **** else + 1311 .loc 1 586 51 view .LVU327 + 1312 03c6 01EB0222 add r2, r1, r2, lsl #8 + 1313 03ca 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1314 .L96: + 589:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1315 .loc 1 589 13 is_stmt 1 view .LVU328 + 589:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1316 .loc 1 589 23 is_stmt 0 view .LVU329 + 1317 03ce 354B ldr r3, .L118+4 + 1318 03d0 0F22 movs r2, #15 + 1319 03d2 1A70 strb r2, [r3] + 590:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1320 .loc 1 590 13 is_stmt 1 view .LVU330 + 590:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1321 .loc 1 590 27 is_stmt 0 view .LVU331 + 1322 03d4 0023 movs r3, #0 + 1323 03d6 344A ldr r2, .L118+8 + 1324 03d8 1380 strh r3, [r2] @ movhi + 591:Src/stm32f7xx_it.c **** } + 1325 .loc 1 591 13 is_stmt 1 view .LVU332 + 591:Src/stm32f7xx_it.c **** } + 1326 .loc 1 591 21 is_stmt 0 view .LVU333 + 1327 03da 344A ldr r2, .L118+12 + 1328 03dc 1370 strb r3, [r2] + 1329 03de 48E6 b .L48 + 1330 .L95: + 588:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_DATA_CMD; + 1331 .loc 1 588 17 is_stmt 1 view .LVU334 + 588:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_DATA_CMD; + 1332 .loc 1 588 40 is_stmt 0 view .LVU335 + 1333 03e0 5B08 lsrs r3, r3, #1 + 588:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_DATA_CMD; + 1334 .loc 1 588 46 view .LVU336 + 1335 03e2 013B subs r3, r3, #1 + 588:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_DATA_CMD; + 1336 .loc 1 588 51 view .LVU337 + 1337 03e4 2E49 ldr r1, .L118 + 1338 03e6 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1339 03ea F0E7 b .L96 + 1340 .L97: + 598:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1341 .loc 1 598 17 is_stmt 1 view .LVU338 + 598:Src/stm32f7xx_it.c **** UART_rec_incr++; + ARM GAS /tmp/ccMf3LkY.s page 169 - 1318 .loc 1 593 47 view .LVU332 - 1319 03c6 0E48 ldr r0, .L108 - 1320 03c8 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 1321 03cc D7E7 b .L95 - 1322 .L49: - 599:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1323 .loc 1 599 9 is_stmt 1 view .LVU333 - 599:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; - 1324 .loc 1 599 12 is_stmt 0 view .LVU334 - 1325 03ce 13F0010F tst r3, #1 - 1326 03d2 0FD0 beq .L96 - 600:Src/stm32f7xx_it.c **** else - 1327 .loc 1 600 13 is_stmt 1 view .LVU335 - 600:Src/stm32f7xx_it.c **** else - 1328 .loc 1 600 20 is_stmt 0 view .LVU336 - 1329 03d4 5908 lsrs r1, r3, #1 - 1330 03d6 0139 subs r1, r1, #1 - 1331 03d8 094C ldr r4, .L108 - 1332 03da 34F81100 ldrh r0, [r4, r1, lsl #1] - 600:Src/stm32f7xx_it.c **** else - 1333 .loc 1 600 43 view .LVU337 - 1334 03de 00EB0222 add r2, r0, r2, lsl #8 - 1335 03e2 24F81120 strh r2, [r4, r1, lsl #1] @ movhi - 1336 .L97: - 603:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1337 .loc 1 603 9 is_stmt 1 view .LVU338 - 603:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; - 1338 .loc 1 603 22 is_stmt 0 view .LVU339 - 1339 03e6 0133 adds r3, r3, #1 - 1340 03e8 074A ldr r2, .L108+8 - 1341 03ea 1380 strh r3, [r2] @ movhi - 604:Src/stm32f7xx_it.c **** break; - 1342 .loc 1 604 9 is_stmt 1 view .LVU340 - 604:Src/stm32f7xx_it.c **** break; - 1343 .loc 1 604 35 is_stmt 0 view .LVU341 - 1344 03ec 094B ldr r3, .L108+20 - 1345 03ee 0022 movs r2, #0 - 1346 03f0 1A70 strb r2, [r3] - 605:Src/stm32f7xx_it.c **** } - 1347 .loc 1 605 5 is_stmt 1 view .LVU342 - 1348 .loc 1 608 1 is_stmt 0 view .LVU343 - 1349 03f2 3EE6 b .L48 - 1350 .L96: - 602:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1351 .loc 1 602 13 is_stmt 1 view .LVU344 - 602:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1352 .loc 1 602 35 is_stmt 0 view .LVU345 - 1353 03f4 5908 lsrs r1, r3, #1 - 602:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1354 .loc 1 602 39 view .LVU346 - 1355 03f6 0139 subs r1, r1, #1 - 602:Src/stm32f7xx_it.c **** UART_rec_incr++; - 1356 .loc 1 602 43 view .LVU347 - 1357 03f8 0148 ldr r0, .L108 - 1358 03fa 20F81120 strh r2, [r0, r1, lsl #1] @ movhi - 1359 03fe F2E7 b .L97 - 1360 .L109: - ARM GAS /tmp/ccqZqdXP.s page 169 + 1342 .loc 1 598 39 is_stmt 0 view .LVU339 + 1343 03ec 5908 lsrs r1, r3, #1 + 598:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1344 .loc 1 598 43 view .LVU340 + 1345 03ee 0139 subs r1, r1, #1 + 598:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1346 .loc 1 598 47 view .LVU341 + 1347 03f0 2B48 ldr r0, .L118 + 1348 03f2 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1349 03f6 BCE7 b .L98 + 1350 .L50: + 604:Src/stm32f7xx_it.c **** { + 1351 .loc 1 604 9 is_stmt 1 view .LVU342 + 604:Src/stm32f7xx_it.c **** { + 1352 .loc 1 604 25 is_stmt 0 view .LVU343 + 1353 03f8 2D49 ldr r1, .L118+16 + 1354 03fa 0888 ldrh r0, [r1] + 604:Src/stm32f7xx_it.c **** { + 1355 .loc 1 604 12 view .LVU344 + 1356 03fc 47F27771 movw r1, #30583 + 1357 0400 8842 cmp r0, r1 + 1358 0402 12D0 beq .L115 + 616:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1359 .loc 1 616 13 is_stmt 1 view .LVU345 + 616:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1360 .loc 1 616 16 is_stmt 0 view .LVU346 + 1361 0404 13F0010F tst r3, #1 + 1362 0408 2AD0 beq .L102 + 617:Src/stm32f7xx_it.c **** else + 1363 .loc 1 617 17 is_stmt 1 view .LVU347 + 617:Src/stm32f7xx_it.c **** else + 1364 .loc 1 617 24 is_stmt 0 view .LVU348 + 1365 040a 5908 lsrs r1, r3, #1 + 1366 040c 0139 subs r1, r1, #1 + 1367 040e 244C ldr r4, .L118 + 1368 0410 34F81100 ldrh r0, [r4, r1, lsl #1] + 617:Src/stm32f7xx_it.c **** else + 1369 .loc 1 617 47 view .LVU349 + 1370 0414 00EB0222 add r2, r0, r2, lsl #8 + 1371 0418 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 1372 .L103: + 620:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1373 .loc 1 620 13 is_stmt 1 view .LVU350 + 620:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1374 .loc 1 620 26 is_stmt 0 view .LVU351 + 1375 041c 0133 adds r3, r3, #1 + 1376 041e 224A ldr r2, .L118+8 + 1377 0420 1380 strh r3, [r2] @ movhi + 621:Src/stm32f7xx_it.c **** } + 1378 .loc 1 621 13 is_stmt 1 view .LVU352 + 621:Src/stm32f7xx_it.c **** } + 1379 .loc 1 621 39 is_stmt 0 view .LVU353 + 1380 0422 244B ldr r3, .L118+20 + 1381 0424 0022 movs r2, #0 + 1382 0426 1A70 strb r2, [r3] + 1383 0428 23E6 b .L48 + 1384 .L115: + ARM GAS /tmp/ccMf3LkY.s page 170 - 1361 .align 2 - 1362 .L108: - 1363 0400 00000000 .word COMMAND - 1364 0404 00000000 .word CPU_state - 1365 0408 00000000 .word UART_rec_incr - 1366 040c 00000000 .word flg_tmt - 1367 0410 00000000 .word UART_header - 1368 0414 00000000 .word UART_transmission_request - 1369 .cfi_endproc - 1370 .LFE1202: - 1372 .section .text.USART1_IRQHandler,"ax",%progbits - 1373 .align 1 - 1374 .global USART1_IRQHandler - 1375 .syntax unified - 1376 .thumb - 1377 .thumb_func - 1379 USART1_IRQHandler: - 1380 .LFB1196: + 606:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1385 .loc 1 606 13 is_stmt 1 view .LVU354 + 606:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1386 .loc 1 606 16 is_stmt 0 view .LVU355 + 1387 042a 13F0010F tst r3, #1 + 1388 042e 11D0 beq .L100 + 607:Src/stm32f7xx_it.c **** else + 1389 .loc 1 607 16 is_stmt 1 view .LVU356 + 607:Src/stm32f7xx_it.c **** else + 1390 .loc 1 607 23 is_stmt 0 view .LVU357 + 1391 0430 5B08 lsrs r3, r3, #1 + 1392 0432 013B subs r3, r3, #1 + 1393 0434 1A48 ldr r0, .L118 + 1394 0436 30F81310 ldrh r1, [r0, r3, lsl #1] + 607:Src/stm32f7xx_it.c **** else + 1395 .loc 1 607 46 view .LVU358 + 1396 043a 01EB0222 add r2, r1, r2, lsl #8 + 1397 043e 20F81320 strh r2, [r0, r3, lsl #1] @ movhi + 1398 .L101: + 610:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1399 .loc 1 610 13 is_stmt 1 view .LVU359 + 610:Src/stm32f7xx_it.c **** UART_rec_incr = 0; + 1400 .loc 1 610 23 is_stmt 0 view .LVU360 + 1401 0442 184B ldr r3, .L118+4 + 1402 0444 0822 movs r2, #8 + 1403 0446 1A70 strb r2, [r3] + 611:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1404 .loc 1 611 13 is_stmt 1 view .LVU361 + 611:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag + 1405 .loc 1 611 27 is_stmt 0 view .LVU362 + 1406 0448 0023 movs r3, #0 + 1407 044a 174A ldr r2, .L118+8 + 1408 044c 1380 strh r3, [r2] @ movhi + 612:Src/stm32f7xx_it.c **** } + 1409 .loc 1 612 13 is_stmt 1 view .LVU363 + 612:Src/stm32f7xx_it.c **** } + 1410 .loc 1 612 21 is_stmt 0 view .LVU364 + 1411 044e 174A ldr r2, .L118+12 + 1412 0450 1370 strb r3, [r2] + 1413 0452 0EE6 b .L48 + 1414 .L100: + 609:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1415 .loc 1 609 17 is_stmt 1 view .LVU365 + 609:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1416 .loc 1 609 39 is_stmt 0 view .LVU366 + 1417 0454 5B08 lsrs r3, r3, #1 + 609:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1418 .loc 1 609 43 view .LVU367 + 1419 0456 013B subs r3, r3, #1 + 609:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK; + 1420 .loc 1 609 47 view .LVU368 + 1421 0458 1149 ldr r1, .L118 + 1422 045a 21F81320 strh r2, [r1, r3, lsl #1] @ movhi + 1423 045e F0E7 b .L101 + 1424 .L102: + 619:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1425 .loc 1 619 17 is_stmt 1 view .LVU369 + ARM GAS /tmp/ccMf3LkY.s page 171 + + + 619:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1426 .loc 1 619 39 is_stmt 0 view .LVU370 + 1427 0460 5908 lsrs r1, r3, #1 + 619:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1428 .loc 1 619 43 view .LVU371 + 1429 0462 0139 subs r1, r1, #1 + 619:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1430 .loc 1 619 47 view .LVU372 + 1431 0464 0E48 ldr r0, .L118 + 1432 0466 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1433 046a D7E7 b .L103 + 1434 .L49: + 625:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1435 .loc 1 625 9 is_stmt 1 view .LVU373 + 625:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8; + 1436 .loc 1 625 12 is_stmt 0 view .LVU374 + 1437 046c 13F0010F tst r3, #1 + 1438 0470 0FD0 beq .L104 + 626:Src/stm32f7xx_it.c **** else + 1439 .loc 1 626 13 is_stmt 1 view .LVU375 + 626:Src/stm32f7xx_it.c **** else + 1440 .loc 1 626 20 is_stmt 0 view .LVU376 + 1441 0472 5908 lsrs r1, r3, #1 + 1442 0474 0139 subs r1, r1, #1 + 1443 0476 0A4C ldr r4, .L118 + 1444 0478 34F81100 ldrh r0, [r4, r1, lsl #1] + 626:Src/stm32f7xx_it.c **** else + 1445 .loc 1 626 43 view .LVU377 + 1446 047c 00EB0222 add r2, r0, r2, lsl #8 + 1447 0480 24F81120 strh r2, [r4, r1, lsl #1] @ movhi + 1448 .L105: + 629:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1449 .loc 1 629 9 is_stmt 1 view .LVU378 + 629:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS; + 1450 .loc 1 629 22 is_stmt 0 view .LVU379 + 1451 0484 0133 adds r3, r3, #1 + 1452 0486 084A ldr r2, .L118+8 + 1453 0488 1380 strh r3, [r2] @ movhi + 630:Src/stm32f7xx_it.c **** break; + 1454 .loc 1 630 9 is_stmt 1 view .LVU380 + 630:Src/stm32f7xx_it.c **** break; + 1455 .loc 1 630 35 is_stmt 0 view .LVU381 + 1456 048a 0A4B ldr r3, .L118+20 + 1457 048c 0022 movs r2, #0 + 1458 048e 1A70 strb r2, [r3] + 631:Src/stm32f7xx_it.c **** } + 1459 .loc 1 631 5 is_stmt 1 view .LVU382 + 1460 .loc 1 634 1 is_stmt 0 view .LVU383 + 1461 0490 EFE5 b .L48 + 1462 .L104: + 628:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1463 .loc 1 628 13 is_stmt 1 view .LVU384 + 628:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1464 .loc 1 628 35 is_stmt 0 view .LVU385 + 1465 0492 5908 lsrs r1, r3, #1 + 628:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1466 .loc 1 628 39 view .LVU386 + ARM GAS /tmp/ccMf3LkY.s page 172 + + + 1467 0494 0139 subs r1, r1, #1 + 628:Src/stm32f7xx_it.c **** UART_rec_incr++; + 1468 .loc 1 628 43 view .LVU387 + 1469 0496 0248 ldr r0, .L118 + 1470 0498 20F81120 strh r2, [r0, r1, lsl #1] @ movhi + 1471 049c F2E7 b .L105 + 1472 .L119: + 1473 049e 00BF .align 2 + 1474 .L118: + 1475 04a0 00000000 .word COMMAND + 1476 04a4 00000000 .word CPU_state + 1477 04a8 00000000 .word UART_rec_incr + 1478 04ac 00000000 .word flg_tmt + 1479 04b0 00000000 .word UART_header + 1480 04b4 00000000 .word UART_transmission_request + 1481 .cfi_endproc + 1482 .LFE1202: + 1484 .section .text.USART1_IRQHandler,"ax",%progbits + 1485 .align 1 + 1486 .global USART1_IRQHandler + 1487 .syntax unified + 1488 .thumb + 1489 .thumb_func + 1491 USART1_IRQHandler: + 1492 .LFB1196: 277:Src/stm32f7xx_it.c **** /* USER CODE BEGIN USART1_IRQn 0 */ - 1381 .loc 1 277 1 is_stmt 1 view -0 - 1382 .cfi_startproc - 1383 @ args = 0, pretend = 0, frame = 8 - 1384 @ frame_needed = 0, uses_anonymous_args = 0 - 1385 0000 00B5 push {lr} - 1386 .LCFI9: - 1387 .cfi_def_cfa_offset 4 - 1388 .cfi_offset 14, -4 - 1389 0002 83B0 sub sp, sp, #12 - 1390 .LCFI10: - 1391 .cfi_def_cfa_offset 16 + 1493 .loc 1 277 1 is_stmt 1 view -0 + 1494 .cfi_startproc + 1495 @ args = 0, pretend = 0, frame = 8 + 1496 @ frame_needed = 0, uses_anonymous_args = 0 + 1497 0000 00B5 push {lr} + 1498 .LCFI9: + 1499 .cfi_def_cfa_offset 4 + 1500 .cfi_offset 14, -4 + 1501 0002 83B0 sub sp, sp, #12 + 1502 .LCFI10: + 1503 .cfi_def_cfa_offset 16 279:Src/stm32f7xx_it.c **** if(LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1)) - 1392 .loc 1 279 3 view .LVU349 + 1504 .loc 1 279 3 view .LVU389 280:Src/stm32f7xx_it.c **** { - 1393 .loc 1 280 3 view .LVU350 - 1394 .LVL19: - 1395 .LBB68: - 1396 .LBI68: + 1505 .loc 1 280 3 view .LVU390 + 1506 .LVL19: + 1507 .LBB68: + 1508 .LBI68: 2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1397 .loc 3 2640 26 view .LVU351 - 1398 .LBB69: + 1509 .loc 3 2640 26 view .LVU391 + 1510 .LBB69: 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1399 .loc 3 2642 3 view .LVU352 + 1511 .loc 3 2642 3 view .LVU392 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1400 .loc 3 2642 12 is_stmt 0 view .LVU353 - 1401 0004 304B ldr r3, .L126 - 1402 0006 DB69 ldr r3, [r3, #28] + 1512 .loc 3 2642 12 is_stmt 0 view .LVU393 + 1513 0004 304B ldr r3, .L136 + 1514 0006 DB69 ldr r3, [r3, #28] 2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1403 .loc 3 2642 77 view .LVU354 - 1404 0008 13F0200F tst r3, #32 - 1405 000c 07D0 beq .L111 - 1406 .LVL20: -2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1407 .loc 3 2642 77 view .LVU355 - 1408 .LBE69: - 1409 .LBE68: - 1410 .LBB70: - 1411 .LBI70: - ARM GAS /tmp/ccqZqdXP.s page 170 + 1515 .loc 3 2642 77 view .LVU394 + 1516 0008 13F0200F tst r3, #32 + 1517 000c 07D0 beq .L121 + ARM GAS /tmp/ccMf3LkY.s page 173 + 1518 .LVL20: +2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 1519 .loc 3 2642 77 view .LVU395 + 1520 .LBE69: + 1521 .LBE68: + 1522 .LBB70: + 1523 .LBI70: 3366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1412 .loc 3 3366 26 is_stmt 1 view .LVU356 - 1413 .LBB71: + 1524 .loc 3 3366 26 is_stmt 1 view .LVU396 + 1525 .LBB71: 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1414 .loc 3 3368 3 view .LVU357 + 1526 .loc 3 3368 3 view .LVU397 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1415 .loc 3 3368 12 is_stmt 0 view .LVU358 - 1416 000e 2E4B ldr r3, .L126 - 1417 0010 1B68 ldr r3, [r3] + 1527 .loc 3 3368 12 is_stmt 0 view .LVU398 + 1528 000e 2E4B ldr r3, .L136 + 1529 0010 1B68 ldr r3, [r3] 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1418 .loc 3 3368 80 view .LVU359 - 1419 0012 13F0200F tst r3, #32 - 1420 0016 02D0 beq .L111 - 1421 .LVL21: + 1530 .loc 3 3368 80 view .LVU399 + 1531 0012 13F0200F tst r3, #32 + 1532 0016 02D0 beq .L121 + 1533 .LVL21: 3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1422 .loc 3 3368 80 view .LVU360 - 1423 .LBE71: - 1424 .LBE70: + 1534 .loc 3 3368 80 view .LVU400 + 1535 .LBE71: + 1536 .LBE70: 282:Src/stm32f7xx_it.c **** } - 1425 .loc 1 282 5 is_stmt 1 view .LVU361 - 1426 0018 FFF7FEFF bl UART_RxCpltCallback - 1427 .LVL22: - 1428 001c 33E0 b .L110 - 1429 .L111: + 1537 .loc 1 282 5 is_stmt 1 view .LVU401 + 1538 0018 FFF7FEFF bl UART_RxCpltCallback + 1539 .LVL22: + 1540 001c 33E0 b .L120 + 1541 .L121: 286:Src/stm32f7xx_it.c **** { - 1430 .loc 1 286 5 view .LVU362 - 1431 .LVL23: - 1432 .LBB72: - 1433 .LBI72: + 1542 .loc 1 286 5 view .LVU402 + 1543 .LVL23: + 1544 .LBB72: + 1545 .LBI72: 2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1434 .loc 3 2618 26 view .LVU363 - 1435 .LBB73: + 1546 .loc 3 2618 26 view .LVU403 + 1547 .LBB73: 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1436 .loc 3 2620 3 view .LVU364 + 1548 .loc 3 2620 3 view .LVU404 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1437 .loc 3 2620 12 is_stmt 0 view .LVU365 - 1438 001e 2A4B ldr r3, .L126 - 1439 0020 DB69 ldr r3, [r3, #28] + 1549 .loc 3 2620 12 is_stmt 0 view .LVU405 + 1550 001e 2A4B ldr r3, .L136 + 1551 0020 DB69 ldr r3, [r3, #28] 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1440 .loc 3 2620 75 view .LVU366 - 1441 0022 13F0080F tst r3, #8 - 1442 0026 25D1 bne .L113 - 1443 .LVL24: + 1552 .loc 3 2620 75 view .LVU406 + 1553 0022 13F0080F tst r3, #8 + 1554 0026 25D1 bne .L123 + 1555 .LVL24: 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1444 .loc 3 2620 75 view .LVU367 - 1445 .LBE73: - 1446 .LBE72: + 1556 .loc 3 2620 75 view .LVU407 + 1557 .LBE73: + 1558 .LBE72: 291:Src/stm32f7xx_it.c **** { - 1447 .loc 1 291 10 is_stmt 1 view .LVU368 - 1448 .LBB74: - 1449 .LBI74: + 1559 .loc 1 291 10 is_stmt 1 view .LVU408 + 1560 .LBB74: + ARM GAS /tmp/ccMf3LkY.s page 174 + + + 1561 .LBI74: 2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1450 .loc 3 2596 26 view .LVU369 - 1451 .LBB75: + 1562 .loc 3 2596 26 view .LVU409 + 1563 .LBB75: 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1452 .loc 3 2598 3 view .LVU370 + 1564 .loc 3 2598 3 view .LVU410 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccqZqdXP.s page 171 - - - 1453 .loc 3 2598 12 is_stmt 0 view .LVU371 - 1454 0028 274B ldr r3, .L126 - 1455 002a DB69 ldr r3, [r3, #28] + 1565 .loc 3 2598 12 is_stmt 0 view .LVU411 + 1566 0028 274B ldr r3, .L136 + 1567 002a DB69 ldr r3, [r3, #28] 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1456 .loc 3 2598 73 view .LVU372 - 1457 002c 13F0020F tst r3, #2 - 1458 0030 2CD1 bne .L114 - 1459 .LVL25: + 1568 .loc 3 2598 73 view .LVU412 + 1569 002c 13F0020F tst r3, #2 + 1570 0030 2CD1 bne .L124 + 1571 .LVL25: 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1460 .loc 3 2598 73 view .LVU373 - 1461 .LBE75: - 1462 .LBE74: + 1572 .loc 3 2598 73 view .LVU413 + 1573 .LBE75: + 1574 .LBE74: 296:Src/stm32f7xx_it.c **** { - 1463 .loc 1 296 10 is_stmt 1 view .LVU374 - 1464 .LBB76: - 1465 .LBI76: + 1575 .loc 1 296 10 is_stmt 1 view .LVU414 + 1576 .LBB76: + 1577 .LBI76: 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1466 .loc 3 2607 26 view .LVU375 - 1467 .LBB77: + 1578 .loc 3 2607 26 view .LVU415 + 1579 .LBB77: 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1468 .loc 3 2609 3 view .LVU376 + 1580 .loc 3 2609 3 view .LVU416 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1469 .loc 3 2609 12 is_stmt 0 view .LVU377 - 1470 0032 254B ldr r3, .L126 - 1471 0034 DB69 ldr r3, [r3, #28] + 1581 .loc 3 2609 12 is_stmt 0 view .LVU417 + 1582 0032 254B ldr r3, .L136 + 1583 0034 DB69 ldr r3, [r3, #28] 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1472 .loc 3 2609 73 view .LVU378 - 1473 0036 13F0040F tst r3, #4 - 1474 003a 31D1 bne .L116 - 1475 .LVL26: + 1584 .loc 3 2609 73 view .LVU418 + 1585 0036 13F0040F tst r3, #4 + 1586 003a 31D1 bne .L126 + 1587 .LVL26: 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1476 .loc 3 2609 73 view .LVU379 - 1477 .LBE77: - 1478 .LBE76: + 1588 .loc 3 2609 73 view .LVU419 + 1589 .LBE77: + 1590 .LBE76: 301:Src/stm32f7xx_it.c **** { - 1479 .loc 1 301 10 is_stmt 1 view .LVU380 - 1480 .LBB78: - 1481 .LBI78: + 1591 .loc 1 301 10 is_stmt 1 view .LVU420 + 1592 .LBB78: + 1593 .LBI78: 2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1482 .loc 3 2585 26 view .LVU381 - 1483 .LBB79: + 1594 .loc 3 2585 26 view .LVU421 + 1595 .LBB79: 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1484 .loc 3 2587 3 view .LVU382 + 1596 .loc 3 2587 3 view .LVU422 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1485 .loc 3 2587 12 is_stmt 0 view .LVU383 - 1486 003c 224B ldr r3, .L126 - 1487 003e DB69 ldr r3, [r3, #28] + 1597 .loc 3 2587 12 is_stmt 0 view .LVU423 + 1598 003c 224B ldr r3, .L136 + 1599 003e DB69 ldr r3, [r3, #28] 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1488 .loc 3 2587 73 view .LVU384 - 1489 0040 13F0010F tst r3, #1 - 1490 0044 36D1 bne .L118 - 1491 .LVL27: + 1600 .loc 3 2587 73 view .LVU424 + 1601 0040 13F0010F tst r3, #1 + ARM GAS /tmp/ccMf3LkY.s page 175 + + + 1602 0044 36D1 bne .L128 + 1603 .LVL27: 2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1492 .loc 3 2587 73 view .LVU385 - 1493 .LBE79: - 1494 .LBE78: + 1604 .loc 3 2587 73 view .LVU425 + 1605 .LBE79: + 1606 .LBE78: 308:Src/stm32f7xx_it.c **** { - ARM GAS /tmp/ccqZqdXP.s page 172 - - - 1495 .loc 1 308 7 is_stmt 1 view .LVU386 - 1496 .LBB80: - 1497 .LBI80: + 1607 .loc 1 308 7 is_stmt 1 view .LVU426 + 1608 .LBB80: + 1609 .LBI80: 2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1498 .loc 3 2651 26 view .LVU387 - 1499 .LBB81: + 1610 .loc 3 2651 26 view .LVU427 + 1611 .LBB81: 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1500 .loc 3 2653 3 view .LVU388 + 1612 .loc 3 2653 3 view .LVU428 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1501 .loc 3 2653 12 is_stmt 0 view .LVU389 - 1502 0046 214B ldr r3, .L126+4 - 1503 0048 DB69 ldr r3, [r3, #28] + 1613 .loc 3 2653 12 is_stmt 0 view .LVU429 + 1614 0046 214B ldr r3, .L136+4 + 1615 0048 DB69 ldr r3, [r3, #28] 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1504 .loc 3 2653 73 view .LVU390 - 1505 004a 13F0400F tst r3, #64 - 1506 004e 1AD0 beq .L110 - 1507 .LVL28: + 1616 .loc 3 2653 73 view .LVU430 + 1617 004a 13F0400F tst r3, #64 + 1618 004e 1AD0 beq .L120 + 1619 .LVL28: 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1508 .loc 3 2653 73 view .LVU391 - 1509 .LBE81: - 1510 .LBE80: - 1511 .LBB82: - 1512 .LBI82: + 1620 .loc 3 2653 73 view .LVU431 + 1621 .LBE81: + 1622 .LBE80: + 1623 .LBB82: + 1624 .LBI82: 3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1513 .loc 3 3377 26 is_stmt 1 view .LVU392 - 1514 .LBB83: + 1625 .loc 3 3377 26 is_stmt 1 view .LVU432 + 1626 .LBB83: 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1515 .loc 3 3379 3 view .LVU393 + 1627 .loc 3 3379 3 view .LVU433 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1516 .loc 3 3379 12 is_stmt 0 view .LVU394 - 1517 0050 1E4B ldr r3, .L126+4 - 1518 0052 1B68 ldr r3, [r3] + 1628 .loc 3 3379 12 is_stmt 0 view .LVU434 + 1629 0050 1E4B ldr r3, .L136+4 + 1630 0052 1B68 ldr r3, [r3] 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1519 .loc 3 3379 77 view .LVU395 - 1520 0054 13F0400F tst r3, #64 - 1521 0058 15D0 beq .L110 - 1522 .LVL29: + 1631 .loc 3 3379 77 view .LVU435 + 1632 0054 13F0400F tst r3, #64 + 1633 0058 15D0 beq .L120 + 1634 .LVL29: 3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1523 .loc 3 3379 77 view .LVU396 - 1524 .LBE83: - 1525 .LBE82: + 1635 .loc 3 3379 77 view .LVU436 + 1636 .LBE83: + 1637 .LBE82: 310:Src/stm32f7xx_it.c **** //test_counter += 1; - 1526 .loc 1 310 9 is_stmt 1 view .LVU397 - 1527 .LBB84: - 1528 .LBI84: + 1638 .loc 1 310 9 is_stmt 1 view .LVU437 + 1639 .LBB84: + 1640 .LBI84: 2916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1529 .loc 3 2916 22 view .LVU398 - 1530 .LBB85: + 1641 .loc 3 2916 22 view .LVU438 + 1642 .LBB85: 2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1531 .loc 3 2918 3 view .LVU399 - 1532 005a 1B4B ldr r3, .L126 - 1533 005c 4022 movs r2, #64 - 1534 005e 1A62 str r2, [r3, #32] - 1535 .LVL30: -2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1536 .loc 3 2918 3 is_stmt 0 view .LVU400 - 1537 .LBE85: - ARM GAS /tmp/ccqZqdXP.s page 173 + 1643 .loc 3 2918 3 view .LVU439 + ARM GAS /tmp/ccMf3LkY.s page 176 - 1538 .LBE84: + 1644 005a 1B4B ldr r3, .L136 + 1645 005c 4022 movs r2, #64 + 1646 005e 1A62 str r2, [r3, #32] + 1647 .LVL30: +2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 1648 .loc 3 2918 3 is_stmt 0 view .LVU440 + 1649 .LBE85: + 1650 .LBE84: 313:Src/stm32f7xx_it.c **** //UART_transmission_busy = 0; - 1539 .loc 1 313 9 is_stmt 1 view .LVU401 - 1540 .LBB86: - 1541 .LBI86: + 1651 .loc 1 313 9 is_stmt 1 view .LVU441 + 1652 .LBB86: + 1653 .LBI86: 3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1542 .loc 3 3213 22 view .LVU402 - 1543 .L121: + 1654 .loc 3 3213 22 view .LVU442 + 1655 .L131: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1544 .loc 3 3215 3 discriminator 1 view .LVU403 - 1545 .LBB87: + 1656 .loc 3 3215 3 discriminator 1 view .LVU443 + 1657 .LBB87: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1546 .loc 3 3215 3 discriminator 1 view .LVU404 + 1658 .loc 3 3215 3 discriminator 1 view .LVU444 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1547 .loc 3 3215 3 discriminator 1 view .LVU405 + 1659 .loc 3 3215 3 discriminator 1 view .LVU445 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1548 .loc 3 3215 3 discriminator 1 view .LVU406 - 1549 .LBB88: - 1550 .LBI88: - 1551 .file 4 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1660 .loc 3 3215 3 discriminator 1 view .LVU446 + 1661 .LBB88: + 1662 .LBI88: + 1663 .file 4 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file @@ -10371,6 +10558,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + ARM GAS /tmp/ccMf3LkY.s page 177 + + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10378,9 +10568,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccqZqdXP.s page 174 - - 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM @@ -10431,6 +10618,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + ARM GAS /tmp/ccMf3LkY.s page 178 + + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; @@ -10438,9 +10628,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE - ARM GAS /tmp/ccqZqdXP.s page 175 - - 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" @@ -10491,6 +10678,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccMf3LkY.s page 179 + + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register @@ -10498,9 +10688,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) - ARM GAS /tmp/ccqZqdXP.s page 176 - - 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10551,6 +10738,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + ARM GAS /tmp/ccMf3LkY.s page 180 + + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -10558,9 +10748,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 208:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccqZqdXP.s page 177 - - 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -10611,6 +10798,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + ARM GAS /tmp/ccMf3LkY.s page 181 + + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -10618,9 +10808,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 265:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccqZqdXP.s page 178 - - 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -10671,6 +10858,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccMf3LkY.s page 182 + + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -10678,9 +10868,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccqZqdXP.s page 179 - - 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10731,6 +10918,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + ARM GAS /tmp/ccMf3LkY.s page 183 + + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 375:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10738,9 +10928,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. - ARM GAS /tmp/ccqZqdXP.s page 180 - - 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) @@ -10791,6 +10978,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccMf3LkY.s page 184 + + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ @@ -10798,9 +10988,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. - ARM GAS /tmp/ccqZqdXP.s page 181 - - 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) @@ -10851,6 +11038,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccMf3LkY.s page 185 + + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set @@ -10858,9 +11048,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); - ARM GAS /tmp/ccqZqdXP.s page 182 - - 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** 496:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -10911,6 +11098,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccMf3LkY.s page 186 + + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 545:Drivers/CMSIS/Include/cmsis_gcc.h **** 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); @@ -10918,9 +11108,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 550:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccqZqdXP.s page 183 - - 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask @@ -10971,6 +11158,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + ARM GAS /tmp/ccMf3LkY.s page 187 + + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -10978,9 +11168,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) - ARM GAS /tmp/ccqZqdXP.s page 184 - - 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 610:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11031,6 +11218,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccMf3LkY.s page 188 + + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) @@ -11038,9 +11228,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); - ARM GAS /tmp/ccqZqdXP.s page 185 - - 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -11091,6 +11278,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccMf3LkY.s page 189 + + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit @@ -11098,9 +11288,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccqZqdXP.s page 186 - - 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -11151,6 +11338,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + ARM GAS /tmp/ccMf3LkY.s page 190 + + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); @@ -11158,9 +11348,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 777:Drivers/CMSIS/Include/cmsis_gcc.h **** 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); - ARM GAS /tmp/ccqZqdXP.s page 187 - - 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else @@ -11211,6 +11398,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + ARM GAS /tmp/ccMf3LkY.s page 191 + + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 831:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11218,9 +11408,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 188 - - 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 837:Drivers/CMSIS/Include/cmsis_gcc.h **** 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -11271,6 +11458,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before + ARM GAS /tmp/ccMf3LkY.s page 192 + + 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) @@ -11278,9 +11468,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } 892:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccqZqdXP.s page 189 - - 893:Drivers/CMSIS/Include/cmsis_gcc.h **** 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) @@ -11331,6 +11518,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 940:Drivers/CMSIS/Include/cmsis_gcc.h **** 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + ARM GAS /tmp/ccMf3LkY.s page 193 + + 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } 945:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11338,9 +11528,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v - ARM GAS /tmp/ccqZqdXP.s page 190 - - 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value @@ -11391,6 +11578,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ + ARM GAS /tmp/ccMf3LkY.s page 194 + + 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1002:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -11398,9 +11588,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros - ARM GAS /tmp/ccqZqdXP.s page 191 - - 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value @@ -11451,6 +11638,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); + ARM GAS /tmp/ccMf3LkY.s page 195 + + 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ 1059:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -11458,43 +11648,40 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) - ARM GAS /tmp/ccqZqdXP.s page 192 - - 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) - 1552 .loc 4 1068 31 view .LVU407 - 1553 .LBB89: + 1664 .loc 4 1068 31 view .LVU447 + 1665 .LBB89: 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 1554 .loc 4 1070 5 view .LVU408 + 1666 .loc 4 1070 5 view .LVU448 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); - 1555 .loc 4 1072 4 view .LVU409 - 1556 0060 194A ldr r2, .L126 - 1557 .syntax unified - 1558 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 1559 0062 52E8003F ldrex r3, [r2] - 1560 @ 0 "" 2 - 1561 .LVL31: + 1667 .loc 4 1072 4 view .LVU449 + 1668 0060 194A ldr r2, .L136 + 1669 .syntax unified + 1670 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1671 0062 52E8003F ldrex r3, [r2] + 1672 @ 0 "" 2 + 1673 .LVL31: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 1562 .loc 4 1073 4 view .LVU410 - 1563 .loc 4 1073 4 is_stmt 0 view .LVU411 - 1564 .thumb - 1565 .syntax unified - 1566 .LBE89: - 1567 .LBE88: + 1674 .loc 4 1073 4 view .LVU450 + 1675 .loc 4 1073 4 is_stmt 0 view .LVU451 + 1676 .thumb + 1677 .syntax unified + 1678 .LBE89: + 1679 .LBE88: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1568 .loc 3 3215 3 discriminator 1 view .LVU412 - 1569 0066 23F04003 bic r3, r3, #64 - 1570 .LVL32: + 1680 .loc 3 3215 3 discriminator 1 view .LVU452 + 1681 0066 23F04003 bic r3, r3, #64 + 1682 .LVL32: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1571 .loc 3 3215 3 is_stmt 1 discriminator 1 view .LVU413 - 1572 .LBB90: - 1573 .LBI90: + 1683 .loc 3 3215 3 is_stmt 1 discriminator 1 view .LVU453 + 1684 .LBB90: + 1685 .LBI90: 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11511,6 +11698,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + ARM GAS /tmp/ccMf3LkY.s page 196 + + 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -11518,9 +11708,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1094:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1095:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit) 1096:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values. - ARM GAS /tmp/ccqZqdXP.s page 193 - - 1097:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1098:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1099:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded @@ -11544,180 +11731,180 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) - 1574 .loc 4 1119 31 view .LVU414 - 1575 .LBB91: + 1686 .loc 4 1119 31 view .LVU454 + 1687 .LBB91: 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - 1576 .loc 4 1121 4 view .LVU415 + 1688 .loc 4 1121 4 view .LVU455 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); - 1577 .loc 4 1123 4 view .LVU416 - 1578 .syntax unified - 1579 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 1580 006a 42E80031 strex r1, r3, [r2] - 1581 @ 0 "" 2 - 1582 .LVL33: + 1689 .loc 4 1123 4 view .LVU456 + 1690 .syntax unified + 1691 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1692 006a 42E80031 strex r1, r3, [r2] + 1693 @ 0 "" 2 + 1694 .LVL33: 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 1583 .loc 4 1124 4 view .LVU417 - 1584 .loc 4 1124 4 is_stmt 0 view .LVU418 - 1585 .thumb - 1586 .syntax unified - 1587 .LBE91: - 1588 .LBE90: + 1695 .loc 4 1124 4 view .LVU457 + 1696 .loc 4 1124 4 is_stmt 0 view .LVU458 + 1697 .thumb + 1698 .syntax unified + 1699 .LBE91: + 1700 .LBE90: 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1589 .loc 3 3215 3 discriminator 1 view .LVU419 - 1590 006e 0029 cmp r1, #0 - 1591 0070 F6D1 bne .L121 - 1592 0072 08E0 b .L110 - 1593 .LVL34: - 1594 .L113: + 1701 .loc 3 3215 3 discriminator 1 view .LVU459 + 1702 006e 0029 cmp r1, #0 + 1703 0070 F6D1 bne .L131 + 1704 0072 08E0 b .L120 + 1705 .LVL34: + 1706 .L123: + ARM GAS /tmp/ccMf3LkY.s page 197 + + 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 1595 .loc 3 3215 3 discriminator 1 view .LVU420 - 1596 .LBE87: - 1597 .LBE86: + 1707 .loc 3 3215 3 discriminator 1 view .LVU460 + 1708 .LBE87: + 1709 .LBE86: 289:Src/stm32f7xx_it.c **** } - 1598 .loc 1 289 7 is_stmt 1 view .LVU421 - 1599 .LBB92: - ARM GAS /tmp/ccqZqdXP.s page 194 - - - 1600 .LBI92: + 1710 .loc 1 289 7 is_stmt 1 view .LVU461 + 1711 .LBB92: + 1712 .LBI92: 3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1601 .loc 3 3658 25 view .LVU422 - 1602 .LBB93: - 1603 .loc 3 3660 3 view .LVU423 - 1604 .loc 3 3660 20 is_stmt 0 view .LVU424 - 1605 0074 144B ldr r3, .L126 - 1606 0076 5B6A ldr r3, [r3, #36] - 1607 .LVL35: - 1608 .loc 3 3660 20 view .LVU425 - 1609 .LBE93: - 1610 .LBE92: + 1713 .loc 3 3658 25 view .LVU462 + 1714 .LBB93: + 1715 .loc 3 3660 3 view .LVU463 + 1716 .loc 3 3660 20 is_stmt 0 view .LVU464 + 1717 0074 144B ldr r3, .L136 + 1718 0076 5B6A ldr r3, [r3, #36] + 1719 .LVL35: + 1720 .loc 3 3660 20 view .LVU465 + 1721 .LBE93: + 1722 .LBE92: 289:Src/stm32f7xx_it.c **** } - 1611 .loc 1 289 11 discriminator 1 view .LVU426 - 1612 0078 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1613 007c 52FA83F3 uxtab r3, r2, r3 - 1614 0080 DBB2 uxtb r3, r3 - 1615 0082 8DF80730 strb r3, [sp, #7] - 1616 .L110: + 1723 .loc 1 289 11 discriminator 1 view .LVU466 + 1724 0078 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1725 007c 52FA83F3 uxtab r3, r2, r3 + 1726 0080 DBB2 uxtb r3, r3 + 1727 0082 8DF80730 strb r3, [sp, #7] + 1728 .L120: 323:Src/stm32f7xx_it.c **** - 1617 .loc 1 323 1 view .LVU427 - 1618 0086 03B0 add sp, sp, #12 - 1619 .LCFI11: - 1620 .cfi_remember_state - 1621 .cfi_def_cfa_offset 4 - 1622 @ sp needed - 1623 0088 5DF804FB ldr pc, [sp], #4 - 1624 .LVL36: - 1625 .L114: - 1626 .LCFI12: - 1627 .cfi_restore_state + 1729 .loc 1 323 1 view .LVU467 + 1730 0086 03B0 add sp, sp, #12 + 1731 .LCFI11: + 1732 .cfi_remember_state + 1733 .cfi_def_cfa_offset 4 + 1734 @ sp needed + 1735 0088 5DF804FB ldr pc, [sp], #4 + 1736 .LVL36: + 1737 .L124: + 1738 .LCFI12: + 1739 .cfi_restore_state 294:Src/stm32f7xx_it.c **** } - 1628 .loc 1 294 7 is_stmt 1 view .LVU428 - 1629 .LBB94: - 1630 .LBI94: + 1740 .loc 1 294 7 is_stmt 1 view .LVU468 + 1741 .LBB94: + 1742 .LBI94: 3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1631 .loc 3 3658 25 view .LVU429 - 1632 .LBB95: - 1633 .loc 3 3660 3 view .LVU430 - 1634 .loc 3 3660 20 is_stmt 0 view .LVU431 - 1635 008c 0E4B ldr r3, .L126 - 1636 008e 5B6A ldr r3, [r3, #36] - 1637 .LVL37: - 1638 .loc 3 3660 20 view .LVU432 - 1639 .LBE95: - 1640 .LBE94: + 1743 .loc 3 3658 25 view .LVU469 + 1744 .LBB95: + 1745 .loc 3 3660 3 view .LVU470 + 1746 .loc 3 3660 20 is_stmt 0 view .LVU471 + 1747 008c 0E4B ldr r3, .L136 + 1748 008e 5B6A ldr r3, [r3, #36] + 1749 .LVL37: + 1750 .loc 3 3660 20 view .LVU472 + 1751 .LBE95: + 1752 .LBE94: 294:Src/stm32f7xx_it.c **** } - 1641 .loc 1 294 11 discriminator 1 view .LVU433 - 1642 0090 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1643 0094 52FA83F3 uxtab r3, r2, r3 - 1644 0098 DBB2 uxtb r3, r3 - 1645 009a 8DF80730 strb r3, [sp, #7] - 1646 009e F2E7 b .L110 - 1647 .LVL38: - 1648 .L116: + 1753 .loc 1 294 11 discriminator 1 view .LVU473 + 1754 0090 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1755 0094 52FA83F3 uxtab r3, r2, r3 + ARM GAS /tmp/ccMf3LkY.s page 198 + + + 1756 0098 DBB2 uxtb r3, r3 + 1757 009a 8DF80730 strb r3, [sp, #7] + 1758 009e F2E7 b .L120 + 1759 .LVL38: + 1760 .L126: 299:Src/stm32f7xx_it.c **** } - 1649 .loc 1 299 7 is_stmt 1 view .LVU434 - ARM GAS /tmp/ccqZqdXP.s page 195 - - - 1650 .LBB96: - 1651 .LBI96: + 1761 .loc 1 299 7 is_stmt 1 view .LVU474 + 1762 .LBB96: + 1763 .LBI96: 3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1652 .loc 3 3658 25 view .LVU435 - 1653 .LBB97: - 1654 .loc 3 3660 3 view .LVU436 - 1655 .loc 3 3660 20 is_stmt 0 view .LVU437 - 1656 00a0 094B ldr r3, .L126 - 1657 00a2 5B6A ldr r3, [r3, #36] - 1658 .LVL39: - 1659 .loc 3 3660 20 view .LVU438 - 1660 .LBE97: - 1661 .LBE96: + 1764 .loc 3 3658 25 view .LVU475 + 1765 .LBB97: + 1766 .loc 3 3660 3 view .LVU476 + 1767 .loc 3 3660 20 is_stmt 0 view .LVU477 + 1768 00a0 094B ldr r3, .L136 + 1769 00a2 5B6A ldr r3, [r3, #36] + 1770 .LVL39: + 1771 .loc 3 3660 20 view .LVU478 + 1772 .LBE97: + 1773 .LBE96: 299:Src/stm32f7xx_it.c **** } - 1662 .loc 1 299 11 discriminator 1 view .LVU439 - 1663 00a4 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1664 00a8 52FA83F3 uxtab r3, r2, r3 - 1665 00ac DBB2 uxtb r3, r3 - 1666 00ae 8DF80730 strb r3, [sp, #7] - 1667 00b2 E8E7 b .L110 - 1668 .LVL40: - 1669 .L118: + 1774 .loc 1 299 11 discriminator 1 view .LVU479 + 1775 00a4 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1776 00a8 52FA83F3 uxtab r3, r2, r3 + 1777 00ac DBB2 uxtb r3, r3 + 1778 00ae 8DF80730 strb r3, [sp, #7] + 1779 00b2 E8E7 b .L120 + 1780 .LVL40: + 1781 .L128: 304:Src/stm32f7xx_it.c **** } - 1670 .loc 1 304 7 is_stmt 1 view .LVU440 - 1671 .LBB98: - 1672 .LBI98: + 1782 .loc 1 304 7 is_stmt 1 view .LVU480 + 1783 .LBB98: + 1784 .LBI98: 3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - 1673 .loc 3 3658 25 view .LVU441 - 1674 .LBB99: - 1675 .loc 3 3660 3 view .LVU442 - 1676 .loc 3 3660 20 is_stmt 0 view .LVU443 - 1677 00b4 044B ldr r3, .L126 - 1678 00b6 5B6A ldr r3, [r3, #36] - 1679 .LVL41: - 1680 .loc 3 3660 20 view .LVU444 - 1681 .LBE99: - 1682 .LBE98: + 1785 .loc 3 3658 25 view .LVU481 + 1786 .LBB99: + 1787 .loc 3 3660 3 view .LVU482 + 1788 .loc 3 3660 20 is_stmt 0 view .LVU483 + 1789 00b4 044B ldr r3, .L136 + 1790 00b6 5B6A ldr r3, [r3, #36] + 1791 .LVL41: + 1792 .loc 3 3660 20 view .LVU484 + 1793 .LBE99: + 1794 .LBE98: 304:Src/stm32f7xx_it.c **** } - 1683 .loc 1 304 11 discriminator 1 view .LVU445 - 1684 00b8 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 - 1685 00bc 52FA83F3 uxtab r3, r2, r3 - 1686 00c0 DBB2 uxtb r3, r3 - 1687 00c2 8DF80730 strb r3, [sp, #7] - 1688 00c6 DEE7 b .L110 - 1689 .L127: - 1690 .align 2 - 1691 .L126: - 1692 00c8 00100140 .word 1073811456 - 1693 00cc 00140140 .word 1073812480 - 1694 .cfi_endproc - 1695 .LFE1196: - 1697 .section .text.DMA2_Stream7_TransferComplete,"ax",%progbits - 1698 .align 1 - 1699 .global DMA2_Stream7_TransferComplete - 1700 .syntax unified - 1701 .thumb - 1702 .thumb_func - ARM GAS /tmp/ccqZqdXP.s page 196 + 1795 .loc 1 304 11 discriminator 1 view .LVU485 + 1796 00b8 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2 + 1797 00bc 52FA83F3 uxtab r3, r2, r3 + 1798 00c0 DBB2 uxtb r3, r3 + 1799 00c2 8DF80730 strb r3, [sp, #7] + 1800 00c6 DEE7 b .L120 + 1801 .L137: + 1802 .align 2 + 1803 .L136: + 1804 00c8 00100140 .word 1073811456 + 1805 00cc 00140140 .word 1073812480 + 1806 .cfi_endproc + ARM GAS /tmp/ccMf3LkY.s page 199 - 1704 DMA2_Stream7_TransferComplete: - 1705 .LFB1203: - 609:Src/stm32f7xx_it.c **** - 610:Src/stm32f7xx_it.c **** //----------------------------------------------- - 611:Src/stm32f7xx_it.c **** void DMA2_Stream7_TransferComplete(void) - 612:Src/stm32f7xx_it.c **** { - 1706 .loc 1 612 1 is_stmt 1 view -0 - 1707 .cfi_startproc - 1708 @ args = 0, pretend = 0, frame = 0 - 1709 @ frame_needed = 0, uses_anonymous_args = 0 - 1710 @ link register save eliminated. - 613:Src/stm32f7xx_it.c **** LL_DMA_ClearFlag_TC7(DMA2); - 1711 .loc 1 613 3 view .LVU447 - 1712 .LVL42: - 1713 .LBB100: - 1714 .LBI100: - 1715 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" + 1807 .LFE1196: + 1809 .section .text.DMA2_Stream7_TransferComplete,"ax",%progbits + 1810 .align 1 + 1811 .global DMA2_Stream7_TransferComplete + 1812 .syntax unified + 1813 .thumb + 1814 .thumb_func + 1816 DMA2_Stream7_TransferComplete: + 1817 .LFB1203: + 635:Src/stm32f7xx_it.c **** + 636:Src/stm32f7xx_it.c **** //----------------------------------------------- + 637:Src/stm32f7xx_it.c **** void DMA2_Stream7_TransferComplete(void) + 638:Src/stm32f7xx_it.c **** { + 1818 .loc 1 638 1 is_stmt 1 view -0 + 1819 .cfi_startproc + 1820 @ args = 0, pretend = 0, frame = 0 + 1821 @ frame_needed = 0, uses_anonymous_args = 0 + 1822 @ link register save eliminated. + 639:Src/stm32f7xx_it.c **** LL_DMA_ClearFlag_TC7(DMA2); + 1823 .loc 1 639 3 view .LVU487 + 1824 .LVL42: + 1825 .LBB100: + 1826 .LBI100: + 1827 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @file stm32f7xx_ll_dma.h @@ -11751,6 +11938,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccMf3LkY.s page 200 + + 34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined (DMA1) || defined (DMA2) 35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL DMA @@ -11758,9 +11948,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Private types -------------------------------------------------------------*/ - ARM GAS /tmp/ccqZqdXP.s page 197 - - 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Private_Variables DMA Private Variables 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ @@ -11811,6 +11998,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** or as Destination base address in case of memory to memory 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter must be a value between Min_Data = 0 and Max + ARM GAS /tmp/ccMf3LkY.s page 201 + + 91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t Direction; /*!< Specifies if the data will be transferred from memory to pe 93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** from memory to memory or from peripheral to memory. @@ -11818,9 +12008,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccqZqdXP.s page 198 - - 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t Mode; /*!< Specifies the normal or circular operation mode. 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MODE 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The circular buffer mode cannot be used if the memory @@ -11871,6 +12058,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t FIFOMode; /*!< Specifies if the FIFO mode or Direct mode will be used for 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_FIFOMODE + ARM GAS /tmp/ccMf3LkY.s page 202 + + 148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The Direct mode (FIFO mode disabled) cannot be used i 149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** memory-to-memory data transfer is configured on the selecte 150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -11878,9 +12068,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t FIFOThreshold; /*!< Specifies the FIFO threshold level. 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_FIFOTHRESHO - ARM GAS /tmp/ccqZqdXP.s page 199 - - 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -11931,6 +12118,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direc 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_SxCR_DIR_0 /*!< Memory to peripheral direc + ARM GAS /tmp/ccMf3LkY.s page 203 + + 205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_SxCR_DIR_1 /*!< Memory to memory direction 206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} @@ -11938,9 +12128,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MODE MODE 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ - ARM GAS /tmp/ccqZqdXP.s page 200 - - 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_NORMAL 0x00000000U /*!< Normal Mode 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_CIRCULAR DMA_SxCR_CIRC /*!< Circular Mode @@ -11991,6 +12178,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment : By 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_HALFWORD DMA_SxCR_MSIZE_0 /*!< Memory data alignment : Ha + ARM GAS /tmp/ccMf3LkY.s page 204 + + 262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_WORD DMA_SxCR_MSIZE_1 /*!< Memory data alignment : Wo 263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} @@ -11998,9 +12188,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_OFFSETSIZE OFFSETSIZE 268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ - ARM GAS /tmp/ccqZqdXP.s page 201 - - 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_OFFSETSIZE_PSIZE 0x00000000U /*!< Peripheral increment offse 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_OFFSETSIZE_FIXEDTO4 DMA_SxCR_PINCOS /*!< Peripheral increment offse @@ -12051,6 +12238,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC4 DMA_SxCR_MBURST_0 /*!< Memory burst 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC8 DMA_SxCR_MBURST_1 /*!< Memory burst 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC16 (DMA_SxCR_MBURST_0 | DMA_SxCR_MBURST_1) /*!< Memory burst + ARM GAS /tmp/ccMf3LkY.s page 205 + + 319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -12058,9 +12248,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PBURST PBURST 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 202 - - 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_SINGLE 0x00000000U /*!< Peripheral b 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC4 DMA_SxCR_PBURST_0 /*!< Peripheral b 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC8 DMA_SxCR_PBURST_1 /*!< Peripheral b @@ -12111,6 +12298,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccMf3LkY.s page 206 + + 376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -12118,9 +12308,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Exported macro ------------------------------------------------------------*/ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Exported_Macros DMA Exported Macros 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ - ARM GAS /tmp/ccqZqdXP.s page 203 - - 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros @@ -12171,6 +12358,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream2)) ? LL_DMA_STREAM_2 : \ 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream3)) ? LL_DMA_STREAM_3 : \ 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream3)) ? LL_DMA_STREAM_3 : \ + ARM GAS /tmp/ccMf3LkY.s page 207 + + 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream4)) ? LL_DMA_STREAM_4 : \ 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream4)) ? LL_DMA_STREAM_4 : \ 435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream5)) ? LL_DMA_STREAM_5 : \ @@ -12178,9 +12368,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream6)) ? LL_DMA_STREAM_6 : \ 438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream6)) ? LL_DMA_STREAM_6 : \ 439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** LL_DMA_STREAM_7) - ARM GAS /tmp/ccqZqdXP.s page 204 - - 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Convert DMA Instance DMAx and LL_DMA_STREAM_y into DMAx_Streamy @@ -12231,6 +12418,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccMf3LkY.s page 208 + + 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -12238,9 +12428,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 205 - - 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableStream(DMA_TypeDef *DMAx, uint32_t Stream) 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA @@ -12291,6 +12478,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_ConfigTransfer\n 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR CIRC LL_DMA_ConfigTransfer\n 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PINC LL_DMA_ConfigTransfer\n + ARM GAS /tmp/ccMf3LkY.s page 209 + + 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR MINC LL_DMA_ConfigTransfer\n 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PSIZE LL_DMA_ConfigTransfer\n 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR MSIZE LL_DMA_ConfigTransfer\n @@ -12298,9 +12488,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PFCTRL LL_DMA_ConfigTransfer 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: - ARM GAS /tmp/ccqZqdXP.s page 206 - - 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -12351,6 +12538,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccMf3LkY.s page 210 + + 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Data transfer direction (read from peripheral or from memory). 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_GetDataTransferDirection 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -12358,9 +12548,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccqZqdXP.s page 207 - - 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -12411,6 +12598,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 + ARM GAS /tmp/ccMf3LkY.s page 211 + + 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 @@ -12418,9 +12608,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_CIRCULAR - ARM GAS /tmp/ccqZqdXP.s page 208 - - 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_PFCTRL 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Stream) @@ -12471,6 +12658,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream) 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- + ARM GAS /tmp/ccMf3LkY.s page 212 + + 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -12478,9 +12668,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MINC LL_DMA_SetMemoryIncMode 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: - ARM GAS /tmp/ccqZqdXP.s page 209 - - 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -12531,6 +12718,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 + ARM GAS /tmp/ccMf3LkY.s page 213 + + 775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 @@ -12538,9 +12728,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_BYTE 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_HALFWORD 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_WORD - ARM GAS /tmp/ccqZqdXP.s page 210 - - 782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size) @@ -12591,6 +12778,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size) + ARM GAS /tmp/ccMf3LkY.s page 214 + + 832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -12598,9 +12788,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory size. 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR MSIZE LL_DMA_GetMemorySize - ARM GAS /tmp/ccqZqdXP.s page 211 - - 839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -12651,6 +12838,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 + ARM GAS /tmp/ccMf3LkY.s page 215 + + 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -12658,9 +12848,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccqZqdXP.s page 212 - - 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_PSIZE 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_OFFSETSIZE_FIXEDTO4 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -12711,6 +12898,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH + ARM GAS /tmp/ccMf3LkY.s page 216 + + 946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetStreamPriorityLevel(DMA_TypeDef *DMAx, uint32_t Stream) @@ -12718,9 +12908,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccqZqdXP.s page 213 - - 953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Number of data to transfer. 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll NDTR NDT LL_DMA_SetDataLength @@ -12771,6 +12958,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CHSEL LL_DMA_SetChannelSelection 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: + ARM GAS /tmp/ccMf3LkY.s page 217 + + 1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -12778,9 +12968,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 - ARM GAS /tmp/ccqZqdXP.s page 214 - - 1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_0 @@ -12831,6 +13018,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_8 (*) + ARM GAS /tmp/ccMf3LkY.s page 218 + + 1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_9 (*) 1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_10 (*) 1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_11 (*) @@ -12838,9 +13028,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_13 (*) 1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_14 (*) 1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_15 (*) - ARM GAS /tmp/ccqZqdXP.s page 215 - - 1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * 1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * (*) value not defined in all devices. 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -12891,6 +13078,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_SINGLE 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC4 1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC8 + ARM GAS /tmp/ccMf3LkY.s page 219 + + 1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC16 1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream) @@ -12898,9 +13088,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccqZqdXP.s page 216 - - 1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Peripheral burst transfer configuration. 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PBURST LL_DMA_SetPeriphBurstxfer @@ -12951,6 +13138,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccMf3LkY.s page 220 + + 1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Current target (only in double buffer mode) to Memory 1 or Memory 0. 1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CT LL_DMA_SetCurrentTargetMem 1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -12958,9 +13148,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccqZqdXP.s page 217 - - 1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -13011,6 +13198,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 + ARM GAS /tmp/ccMf3LkY.s page 221 + + 1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableDoubleBufferMode(DMA_TypeDef *DMAx, uint32_t Stream) @@ -13018,9 +13208,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA 1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccqZqdXP.s page 218 - - 1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable the double buffer mode. 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DBM LL_DMA_DisableDoubleBufferMode @@ -13071,6 +13258,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable Fifo mode. 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR DMDIS LL_DMA_DisableFifoMode 1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccMf3LkY.s page 222 + + 1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -13078,9 +13268,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccqZqdXP.s page 219 - - 1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -13131,6 +13318,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetFIFOThreshold(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Threshold + ARM GAS /tmp/ccMf3LkY.s page 223 + + 1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, 1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -13138,9 +13328,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get FIFO threshold. 1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_GetFIFOThreshold - ARM GAS /tmp/ccqZqdXP.s page 220 - - 1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 @@ -13191,6 +13378,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccMf3LkY.s page 224 + + 1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure the Source and Destination addresses. 1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA stream is enabled. @@ -13198,9 +13388,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * PAR PA LL_DMA_ConfigAddresses 1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: - ARM GAS /tmp/ccqZqdXP.s page 221 - - 1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -13251,6 +13438,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccMf3LkY.s page 225 + + 1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd 1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR, @@ -13258,9 +13448,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Peripheral address. - ARM GAS /tmp/ccqZqdXP.s page 222 - - 1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_SetPeriphAddress 1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. @@ -13311,6 +13498,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 + ARM GAS /tmp/ccMf3LkY.s page 226 + + 1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -13318,9 +13508,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF - ARM GAS /tmp/ccqZqdXP.s page 223 - - 1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef* DMAx, uint32_t Stream) 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -13371,6 +13558,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd 1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR + ARM GAS /tmp/ccMf3LkY.s page 227 + + 1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -13378,9 +13568,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_GetM2MSrcAddress 1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. 1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccqZqdXP.s page 224 - - 1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -13431,6 +13618,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 + ARM GAS /tmp/ccMf3LkY.s page 228 + + 1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Address Between 0 to 0xFFFFFFFF 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -13438,9 +13628,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR, 1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccqZqdXP.s page 225 - - 1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory 1 address (used in case of Double buffer mode). @@ -13491,6 +13678,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF1)==(DMA_LISR_HTIF1)); 1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccMf3LkY.s page 229 + + 1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 half transfer flag. @@ -13498,9 +13688,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccqZqdXP.s page 226 - - 1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx) 1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF2)==(DMA_LISR_HTIF2)); @@ -13551,6 +13738,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccMf3LkY.s page 230 + + 1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 half transfer flag. 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF7 LL_DMA_IsActiveFlag_HT7 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -13558,9 +13748,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx) 1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccqZqdXP.s page 227 - - 1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF7)==(DMA_HISR_HTIF7)); 1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -13611,6 +13798,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 transfer complete flag. 1800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF4 LL_DMA_IsActiveFlag_TC4 + ARM GAS /tmp/ccMf3LkY.s page 231 + + 1801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -13618,9 +13808,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF4)==(DMA_HISR_TCIF4)); 1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccqZqdXP.s page 228 - - 1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 transfer complete flag. @@ -13671,6 +13858,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF1 LL_DMA_IsActiveFlag_TE1 1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). + ARM GAS /tmp/ccMf3LkY.s page 232 + + 1858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx) 1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -13678,9 +13868,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccqZqdXP.s page 229 - - 1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 transfer error flag. 1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF2 LL_DMA_IsActiveFlag_TE2 1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -13731,6 +13918,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccMf3LkY.s page 233 + + 1915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF6)==(DMA_HISR_TEIF6)); 1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -13738,9 +13928,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 transfer error flag. 1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF7 LL_DMA_IsActiveFlag_TE7 - ARM GAS /tmp/ccqZqdXP.s page 230 - - 1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -13791,6 +13978,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME3(DMA_TypeDef *DMAx) 1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF3)==(DMA_LISR_DMEIF3)); + ARM GAS /tmp/ccMf3LkY.s page 234 + + 1972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -13798,9 +13988,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF4 LL_DMA_IsActiveFlag_DME4 1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccqZqdXP.s page 231 - - 1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME4(DMA_TypeDef *DMAx) 1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -13851,6 +14038,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF0)==(DMA_LISR_FEIF0)); 2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccMf3LkY.s page 235 + + 2029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 FIFO error flag. 2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF1 LL_DMA_IsActiveFlag_FE1 @@ -13858,9 +14048,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE1(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccqZqdXP.s page 232 - - 2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF1)==(DMA_LISR_FEIF1)); 2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -13911,6 +14098,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 FIFO error flag. + ARM GAS /tmp/ccMf3LkY.s page 236 + + 2086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR FEIF6 LL_DMA_IsActiveFlag_FE6 2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). @@ -13918,9 +14108,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE6(DMA_TypeDef *DMAx) 2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF6)==(DMA_HISR_FEIF6)); - ARM GAS /tmp/ccqZqdXP.s page 233 - - 2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -13971,6 +14158,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 half transfer flag. 2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CHTIF3 LL_DMA_ClearFlag_HT3 2142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccMf3LkY.s page 237 + + 2143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx) @@ -13978,9 +14168,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF3); 2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccqZqdXP.s page 234 - - 2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 half transfer flag. 2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF4 LL_DMA_ClearFlag_HT4 @@ -14031,6 +14218,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccMf3LkY.s page 238 + + 2200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC0(DMA_TypeDef *DMAx) 2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF0); @@ -14038,9 +14228,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 transfer complete flag. - ARM GAS /tmp/ccqZqdXP.s page 235 - - 2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF1 LL_DMA_ClearFlag_TC1 2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -14091,6 +14278,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx) 2256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccMf3LkY.s page 239 + + 2257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF5); 2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -14098,9 +14288,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 transfer complete flag. 2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF6 LL_DMA_ClearFlag_TC6 2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccqZqdXP.s page 236 - - 2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx) @@ -14115,102 +14302,105 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx) - 1716 .loc 5 2277 22 view .LVU448 - 1717 .LBB101: + 1828 .loc 5 2277 22 view .LVU488 + 1829 .LBB101: 2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7); - 1718 .loc 5 2279 3 view .LVU449 - 1719 0000 024B ldr r3, .L129 - 1720 0002 4FF00062 mov r2, #134217728 - 1721 0006 DA60 str r2, [r3, #12] - 1722 .LVL43: - 1723 .loc 5 2279 3 is_stmt 0 view .LVU450 - 1724 .LBE101: - 1725 .LBE100: - 614:Src/stm32f7xx_it.c **** } - 1726 .loc 1 614 1 view .LVU451 - 1727 0008 7047 bx lr - 1728 .L130: - 1729 000a 00BF .align 2 - 1730 .L129: - 1731 000c 00640240 .word 1073898496 - 1732 .cfi_endproc - 1733 .LFE1203: - 1735 .section .text.DMA2_Stream7_IRQHandler,"ax",%progbits - 1736 .align 1 - 1737 .global DMA2_Stream7_IRQHandler - 1738 .syntax unified - 1739 .thumb - 1740 .thumb_func - 1742 DMA2_Stream7_IRQHandler: - 1743 .LFB1201: + 1830 .loc 5 2279 3 view .LVU489 + 1831 0000 024B ldr r3, .L139 + 1832 0002 4FF00062 mov r2, #134217728 + 1833 0006 DA60 str r2, [r3, #12] + 1834 .LVL43: + 1835 .loc 5 2279 3 is_stmt 0 view .LVU490 + 1836 .LBE101: + 1837 .LBE100: + 640:Src/stm32f7xx_it.c **** } + 1838 .loc 1 640 1 view .LVU491 + 1839 0008 7047 bx lr + 1840 .L140: + 1841 000a 00BF .align 2 + 1842 .L139: + 1843 000c 00640240 .word 1073898496 + 1844 .cfi_endproc + 1845 .LFE1203: + 1847 .section .text.DMA2_Stream7_IRQHandler,"ax",%progbits + 1848 .align 1 + 1849 .global DMA2_Stream7_IRQHandler + 1850 .syntax unified + 1851 .thumb + 1852 .thumb_func + 1854 DMA2_Stream7_IRQHandler: + 1855 .LFB1201: 417:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */ - 1744 .loc 1 417 1 is_stmt 1 view -0 - 1745 .cfi_startproc - 1746 @ args = 0, pretend = 0, frame = 0 - 1747 @ frame_needed = 0, uses_anonymous_args = 0 - 1748 0000 08B5 push {r3, lr} - 1749 .LCFI13: - 1750 .cfi_def_cfa_offset 8 - 1751 .cfi_offset 3, -8 - 1752 .cfi_offset 14, -4 + 1856 .loc 1 417 1 is_stmt 1 view -0 + 1857 .cfi_startproc + 1858 @ args = 0, pretend = 0, frame = 0 + 1859 @ frame_needed = 0, uses_anonymous_args = 0 + 1860 0000 08B5 push {r3, lr} + 1861 .LCFI13: + ARM GAS /tmp/ccMf3LkY.s page 240 + + + 1862 .cfi_def_cfa_offset 8 + 1863 .cfi_offset 3, -8 + 1864 .cfi_offset 14, -4 419:Src/stm32f7xx_it.c **** { - 1753 .loc 1 419 3 view .LVU453 - 1754 .LVL44: - 1755 .LBB102: - ARM GAS /tmp/ccqZqdXP.s page 237 - - - 1756 .LBI102: + 1865 .loc 1 419 3 view .LVU493 + 1866 .LVL44: + 1867 .LBB102: + 1868 .LBI102: 1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 1757 .loc 5 1837 26 view .LVU454 - 1758 .LBB103: + 1869 .loc 5 1837 26 view .LVU494 + 1870 .LBB103: 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1759 .loc 5 1839 3 view .LVU455 + 1871 .loc 5 1839 3 view .LVU495 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1760 .loc 5 1839 11 is_stmt 0 view .LVU456 - 1761 0002 0A4B ldr r3, .L136 - 1762 0004 5B68 ldr r3, [r3, #4] - 1763 .LVL45: + 1872 .loc 5 1839 11 is_stmt 0 view .LVU496 + 1873 0002 0A4B ldr r3, .L146 + 1874 0004 5B68 ldr r3, [r3, #4] + 1875 .LVL45: 1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1764 .loc 5 1839 11 view .LVU457 - 1765 .LBE103: - 1766 .LBE102: + 1876 .loc 5 1839 11 view .LVU497 + 1877 .LBE103: + 1878 .LBE102: 419:Src/stm32f7xx_it.c **** { - 1767 .loc 1 419 5 discriminator 1 view .LVU458 - 1768 0006 13F0006F tst r3, #134217728 - 1769 000a 09D1 bne .L135 + 1879 .loc 1 419 5 discriminator 1 view .LVU498 + 1880 0006 13F0006F tst r3, #134217728 + 1881 000a 09D1 bne .L145 424:Src/stm32f7xx_it.c **** { - 1770 .loc 1 424 8 is_stmt 1 view .LVU459 - 1771 .LVL46: - 1772 .LBB104: - 1773 .LBI104: + 1882 .loc 1 424 8 is_stmt 1 view .LVU499 + 1883 .LVL46: + 1884 .LBB104: + 1885 .LBI104: 1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - 1774 .loc 5 1925 26 view .LVU460 - 1775 .LBB105: + 1886 .loc 5 1925 26 view .LVU500 + 1887 .LBB105: 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1776 .loc 5 1927 3 view .LVU461 + 1888 .loc 5 1927 3 view .LVU501 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1777 .loc 5 1927 11 is_stmt 0 view .LVU462 - 1778 000c 074B ldr r3, .L136 - 1779 000e 5B68 ldr r3, [r3, #4] - 1780 .LVL47: + 1889 .loc 5 1927 11 is_stmt 0 view .LVU502 + 1890 000c 074B ldr r3, .L146 + 1891 000e 5B68 ldr r3, [r3, #4] + 1892 .LVL47: 1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - 1781 .loc 5 1927 11 view .LVU463 - 1782 .LBE105: - 1783 .LBE104: + 1893 .loc 5 1927 11 view .LVU503 + 1894 .LBE105: + 1895 .LBE104: 424:Src/stm32f7xx_it.c **** { - 1784 .loc 1 424 10 discriminator 1 view .LVU464 - 1785 0010 13F0007F tst r3, #33554432 - 1786 0014 03D0 beq .L131 + 1896 .loc 1 424 10 discriminator 1 view .LVU504 + 1897 0010 13F0007F tst r3, #33554432 + 1898 0014 03D0 beq .L141 426:Src/stm32f7xx_it.c **** } - 1787 .loc 1 426 5 is_stmt 1 view .LVU465 - 1788 .LVL48: - 1789 .LBB106: - 1790 .LBI106: + 1899 .loc 1 426 5 is_stmt 1 view .LVU505 + 1900 .LVL48: + 1901 .LBB106: + 1902 .LBI106: 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccMf3LkY.s page 241 + + 2283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 transfer error flag. 2284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF0 LL_DMA_ClearFlag_TE0 2285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -14218,9 +14408,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE0(DMA_TypeDef *DMAx) 2289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccqZqdXP.s page 238 - - 2290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF0); 2291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -14271,6 +14458,9 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 transfer error flag. 2339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF5 LL_DMA_ClearFlag_TE5 + ARM GAS /tmp/ccMf3LkY.s page 242 + + 2340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -14278,9 +14468,6 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF5); 2346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccqZqdXP.s page 239 - - 2347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 transfer error flag. @@ -14300,122 +14487,122 @@ ARM GAS /tmp/ccqZqdXP.s page 1 2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx) - 1791 .loc 5 2365 22 view .LVU466 - 1792 .LBB107: + 1903 .loc 5 2365 22 view .LVU506 + 1904 .LBB107: 2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7); - 1793 .loc 5 2367 3 view .LVU467 - 1794 0016 054B ldr r3, .L136 - 1795 0018 4FF00072 mov r2, #33554432 - 1796 001c DA60 str r2, [r3, #12] - 1797 .LVL49: - 1798 .L131: - 1799 .loc 5 2367 3 is_stmt 0 view .LVU468 - 1800 .LBE107: - 1801 .LBE106: + 1905 .loc 5 2367 3 view .LVU507 + 1906 0016 054B ldr r3, .L146 + 1907 0018 4FF00072 mov r2, #33554432 + 1908 001c DA60 str r2, [r3, #12] + 1909 .LVL49: + 1910 .L141: + 1911 .loc 5 2367 3 is_stmt 0 view .LVU508 + 1912 .LBE107: + 1913 .LBE106: 432:Src/stm32f7xx_it.c **** - 1802 .loc 1 432 1 view .LVU469 - 1803 001e 08BD pop {r3, pc} - 1804 .L135: + 1914 .loc 1 432 1 view .LVU509 + 1915 001e 08BD pop {r3, pc} + 1916 .L145: 421:Src/stm32f7xx_it.c **** u_tx_flg = 0;//indicate that transfer compete - 1805 .loc 1 421 5 is_stmt 1 view .LVU470 - 1806 0020 FFF7FEFF bl DMA2_Stream7_TransferComplete - 1807 .LVL50: + 1917 .loc 1 421 5 is_stmt 1 view .LVU510 + 1918 0020 FFF7FEFF bl DMA2_Stream7_TransferComplete + 1919 .LVL50: 422:Src/stm32f7xx_it.c **** } - 1808 .loc 1 422 5 view .LVU471 + 1920 .loc 1 422 5 view .LVU511 422:Src/stm32f7xx_it.c **** } - 1809 .loc 1 422 14 is_stmt 0 view .LVU472 - 1810 0024 024B ldr r3, .L136+4 - 1811 0026 0022 movs r2, #0 - 1812 0028 1A70 strb r2, [r3] - 1813 002a F8E7 b .L131 - 1814 .L137: - 1815 .align 2 - 1816 .L136: - 1817 002c 00640240 .word 1073898496 - 1818 0030 00000000 .word u_tx_flg - 1819 .cfi_endproc - 1820 .LFE1201: - 1822 .text - 1823 .Letext0: - ARM GAS /tmp/ccqZqdXP.s page 240 + 1921 .loc 1 422 14 is_stmt 0 view .LVU512 + 1922 0024 024B ldr r3, .L146+4 + 1923 0026 0022 movs r2, #0 + 1924 0028 1A70 strb r2, [r3] + 1925 002a F8E7 b .L141 + 1926 .L147: + 1927 .align 2 + ARM GAS /tmp/ccMf3LkY.s page 243 - 1824 .file 6 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 1825 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" - 1826 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - 1827 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" - 1828 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" - 1829 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" - 1830 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" - 1831 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" - 1832 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - 1833 .file 15 "Inc/main.h" - 1834 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/ccqZqdXP.s page 241 + 1928 .L146: + 1929 002c 00640240 .word 1073898496 + 1930 0030 00000000 .word u_tx_flg + 1931 .cfi_endproc + 1932 .LFE1201: + 1934 .text + 1935 .Letext0: + 1936 .file 6 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 1937 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" + 1938 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" + 1939 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" + 1940 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" + 1941 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" + 1942 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" + 1943 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" + 1944 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" + 1945 .file 15 "Inc/main.h" + 1946 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" + ARM GAS /tmp/ccMf3LkY.s page 244 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_it.c - /tmp/ccqZqdXP.s:20 .text.NMI_Handler:00000000 $t - /tmp/ccqZqdXP.s:26 .text.NMI_Handler:00000000 NMI_Handler - /tmp/ccqZqdXP.s:43 .text.HardFault_Handler:00000000 $t - /tmp/ccqZqdXP.s:49 .text.HardFault_Handler:00000000 HardFault_Handler - /tmp/ccqZqdXP.s:66 .text.MemManage_Handler:00000000 $t - /tmp/ccqZqdXP.s:72 .text.MemManage_Handler:00000000 MemManage_Handler - /tmp/ccqZqdXP.s:89 .text.BusFault_Handler:00000000 $t - /tmp/ccqZqdXP.s:95 .text.BusFault_Handler:00000000 BusFault_Handler - /tmp/ccqZqdXP.s:112 .text.UsageFault_Handler:00000000 $t - /tmp/ccqZqdXP.s:118 .text.UsageFault_Handler:00000000 UsageFault_Handler - /tmp/ccqZqdXP.s:135 .text.SVC_Handler:00000000 $t - /tmp/ccqZqdXP.s:141 .text.SVC_Handler:00000000 SVC_Handler - /tmp/ccqZqdXP.s:154 .text.DebugMon_Handler:00000000 $t - /tmp/ccqZqdXP.s:160 .text.DebugMon_Handler:00000000 DebugMon_Handler - /tmp/ccqZqdXP.s:173 .text.PendSV_Handler:00000000 $t - /tmp/ccqZqdXP.s:179 .text.PendSV_Handler:00000000 PendSV_Handler - /tmp/ccqZqdXP.s:192 .text.SysTick_Handler:00000000 $t - /tmp/ccqZqdXP.s:198 .text.SysTick_Handler:00000000 SysTick_Handler - /tmp/ccqZqdXP.s:218 .text.ADC_IRQHandler:00000000 $t - /tmp/ccqZqdXP.s:224 .text.ADC_IRQHandler:00000000 ADC_IRQHandler - /tmp/ccqZqdXP.s:248 .text.ADC_IRQHandler:00000010 $d - /tmp/ccqZqdXP.s:254 .text.TIM1_UP_TIM10_IRQHandler:00000000 $t - /tmp/ccqZqdXP.s:260 .text.TIM1_UP_TIM10_IRQHandler:00000000 TIM1_UP_TIM10_IRQHandler - /tmp/ccqZqdXP.s:301 .text.TIM1_UP_TIM10_IRQHandler:00000024 $d - /tmp/ccqZqdXP.s:309 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 $t - /tmp/ccqZqdXP.s:315 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 TIM1_TRG_COM_TIM11_IRQHandler - /tmp/ccqZqdXP.s:355 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000028 $d - /tmp/ccqZqdXP.s:362 .text.TIM2_IRQHandler:00000000 $t - /tmp/ccqZqdXP.s:368 .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler - /tmp/ccqZqdXP.s:381 .text.TIM8_UP_TIM13_IRQHandler:00000000 $t - /tmp/ccqZqdXP.s:387 .text.TIM8_UP_TIM13_IRQHandler:00000000 TIM8_UP_TIM13_IRQHandler - /tmp/ccqZqdXP.s:453 .text.TIM8_UP_TIM13_IRQHandler:00000048 $d - /tmp/ccqZqdXP.s:459 .text.TIM5_IRQHandler:00000000 $t - /tmp/ccqZqdXP.s:465 .text.TIM5_IRQHandler:00000000 TIM5_IRQHandler - /tmp/ccqZqdXP.s:478 .text.TIM6_DAC_IRQHandler:00000000 $t - /tmp/ccqZqdXP.s:484 .text.TIM6_DAC_IRQHandler:00000000 TIM6_DAC_IRQHandler - /tmp/ccqZqdXP.s:543 .text.TIM6_DAC_IRQHandler:00000028 $d - /tmp/ccqZqdXP.s:550 .text.TIM7_IRQHandler:00000000 $t - /tmp/ccqZqdXP.s:556 .text.TIM7_IRQHandler:00000000 TIM7_IRQHandler - /tmp/ccqZqdXP.s:605 .text.TIM7_IRQHandler:0000001c $d - /tmp/ccqZqdXP.s:611 .text.UART_RxCpltCallback:00000000 $t - /tmp/ccqZqdXP.s:617 .text.UART_RxCpltCallback:00000000 UART_RxCpltCallback - /tmp/ccqZqdXP.s:655 .text.UART_RxCpltCallback:0000001a $d - /tmp/ccqZqdXP.s:687 .text.UART_RxCpltCallback:0000005a $t - /tmp/ccqZqdXP.s:1093 .text.UART_RxCpltCallback:00000278 $d - /tmp/ccqZqdXP.s:1107 .text.UART_RxCpltCallback:000002a4 $t - /tmp/ccqZqdXP.s:1363 .text.UART_RxCpltCallback:00000400 $d - /tmp/ccqZqdXP.s:1373 .text.USART1_IRQHandler:00000000 $t - /tmp/ccqZqdXP.s:1379 .text.USART1_IRQHandler:00000000 USART1_IRQHandler - /tmp/ccqZqdXP.s:1692 .text.USART1_IRQHandler:000000c8 $d - /tmp/ccqZqdXP.s:1698 .text.DMA2_Stream7_TransferComplete:00000000 $t - /tmp/ccqZqdXP.s:1704 .text.DMA2_Stream7_TransferComplete:00000000 DMA2_Stream7_TransferComplete - /tmp/ccqZqdXP.s:1731 .text.DMA2_Stream7_TransferComplete:0000000c $d - /tmp/ccqZqdXP.s:1736 .text.DMA2_Stream7_IRQHandler:00000000 $t - /tmp/ccqZqdXP.s:1742 .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler - ARM GAS /tmp/ccqZqdXP.s page 242 + /tmp/ccMf3LkY.s:20 .text.NMI_Handler:00000000 $t + /tmp/ccMf3LkY.s:26 .text.NMI_Handler:00000000 NMI_Handler + /tmp/ccMf3LkY.s:43 .text.HardFault_Handler:00000000 $t + /tmp/ccMf3LkY.s:49 .text.HardFault_Handler:00000000 HardFault_Handler + /tmp/ccMf3LkY.s:66 .text.MemManage_Handler:00000000 $t + /tmp/ccMf3LkY.s:72 .text.MemManage_Handler:00000000 MemManage_Handler + /tmp/ccMf3LkY.s:89 .text.BusFault_Handler:00000000 $t + /tmp/ccMf3LkY.s:95 .text.BusFault_Handler:00000000 BusFault_Handler + /tmp/ccMf3LkY.s:112 .text.UsageFault_Handler:00000000 $t + /tmp/ccMf3LkY.s:118 .text.UsageFault_Handler:00000000 UsageFault_Handler + /tmp/ccMf3LkY.s:135 .text.SVC_Handler:00000000 $t + /tmp/ccMf3LkY.s:141 .text.SVC_Handler:00000000 SVC_Handler + /tmp/ccMf3LkY.s:154 .text.DebugMon_Handler:00000000 $t + /tmp/ccMf3LkY.s:160 .text.DebugMon_Handler:00000000 DebugMon_Handler + /tmp/ccMf3LkY.s:173 .text.PendSV_Handler:00000000 $t + /tmp/ccMf3LkY.s:179 .text.PendSV_Handler:00000000 PendSV_Handler + /tmp/ccMf3LkY.s:192 .text.SysTick_Handler:00000000 $t + /tmp/ccMf3LkY.s:198 .text.SysTick_Handler:00000000 SysTick_Handler + /tmp/ccMf3LkY.s:218 .text.ADC_IRQHandler:00000000 $t + /tmp/ccMf3LkY.s:224 .text.ADC_IRQHandler:00000000 ADC_IRQHandler + /tmp/ccMf3LkY.s:248 .text.ADC_IRQHandler:00000010 $d + /tmp/ccMf3LkY.s:254 .text.TIM1_UP_TIM10_IRQHandler:00000000 $t + /tmp/ccMf3LkY.s:260 .text.TIM1_UP_TIM10_IRQHandler:00000000 TIM1_UP_TIM10_IRQHandler + /tmp/ccMf3LkY.s:301 .text.TIM1_UP_TIM10_IRQHandler:00000024 $d + /tmp/ccMf3LkY.s:309 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 $t + /tmp/ccMf3LkY.s:315 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 TIM1_TRG_COM_TIM11_IRQHandler + /tmp/ccMf3LkY.s:355 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000028 $d + /tmp/ccMf3LkY.s:362 .text.TIM2_IRQHandler:00000000 $t + /tmp/ccMf3LkY.s:368 .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler + /tmp/ccMf3LkY.s:381 .text.TIM8_UP_TIM13_IRQHandler:00000000 $t + /tmp/ccMf3LkY.s:387 .text.TIM8_UP_TIM13_IRQHandler:00000000 TIM8_UP_TIM13_IRQHandler + /tmp/ccMf3LkY.s:453 .text.TIM8_UP_TIM13_IRQHandler:00000048 $d + /tmp/ccMf3LkY.s:459 .text.TIM5_IRQHandler:00000000 $t + /tmp/ccMf3LkY.s:465 .text.TIM5_IRQHandler:00000000 TIM5_IRQHandler + /tmp/ccMf3LkY.s:478 .text.TIM6_DAC_IRQHandler:00000000 $t + /tmp/ccMf3LkY.s:484 .text.TIM6_DAC_IRQHandler:00000000 TIM6_DAC_IRQHandler + /tmp/ccMf3LkY.s:543 .text.TIM6_DAC_IRQHandler:00000028 $d + /tmp/ccMf3LkY.s:550 .text.TIM7_IRQHandler:00000000 $t + /tmp/ccMf3LkY.s:556 .text.TIM7_IRQHandler:00000000 TIM7_IRQHandler + /tmp/ccMf3LkY.s:605 .text.TIM7_IRQHandler:0000001c $d + /tmp/ccMf3LkY.s:611 .text.UART_RxCpltCallback:00000000 $t + /tmp/ccMf3LkY.s:617 .text.UART_RxCpltCallback:00000000 UART_RxCpltCallback + /tmp/ccMf3LkY.s:655 .text.UART_RxCpltCallback:0000001a $d + /tmp/ccMf3LkY.s:687 .text.UART_RxCpltCallback:0000005a $t + /tmp/ccMf3LkY.s:1080 .text.UART_RxCpltCallback:0000026c $d + /tmp/ccMf3LkY.s:1094 .text.UART_RxCpltCallback:00000298 $t + /tmp/ccMf3LkY.s:1475 .text.UART_RxCpltCallback:000004a0 $d + /tmp/ccMf3LkY.s:1485 .text.USART1_IRQHandler:00000000 $t + /tmp/ccMf3LkY.s:1491 .text.USART1_IRQHandler:00000000 USART1_IRQHandler + /tmp/ccMf3LkY.s:1804 .text.USART1_IRQHandler:000000c8 $d + /tmp/ccMf3LkY.s:1810 .text.DMA2_Stream7_TransferComplete:00000000 $t + /tmp/ccMf3LkY.s:1816 .text.DMA2_Stream7_TransferComplete:00000000 DMA2_Stream7_TransferComplete + /tmp/ccMf3LkY.s:1843 .text.DMA2_Stream7_TransferComplete:0000000c $d + /tmp/ccMf3LkY.s:1848 .text.DMA2_Stream7_IRQHandler:00000000 $t + /tmp/ccMf3LkY.s:1854 .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler + ARM GAS /tmp/ccMf3LkY.s page 245 - /tmp/ccqZqdXP.s:1817 .text.DMA2_Stream7_IRQHandler:0000002c $d + /tmp/ccMf3LkY.s:1929 .text.DMA2_Stream7_IRQHandler:0000002c $d UNDEFINED SYMBOLS HAL_IncTick diff --git a/build/stm32f7xx_it.o b/build/stm32f7xx_it.o index 6dbfb41c56ee5d8f252db06a0e219fe1e2de90c1..d68e2102ddb556391a7206341cb7c061756d91f9 100644 GIT binary patch delta 5866 zcmZXY33OCN7KW={FLbuf(jhz0oeoV%$V!L?$N&jQlEx5&D2i-hhb%2(LOU&ExNLooj&jAbc#GN(761+V^`Ui z$1WeQmjjKjnMs%%kU$a|F+H^r&4*@3EyJJN|27uyY0)^Nh-HPTaBKMIcS8eOK! zMg*eYE9**!A~R6lH5j=$fl*zt$eeUyj#eHEj_I0MtI7rkuIrjpr^?2i5bkMM#*8Y5 zug+^t_ow*w2ghAJj$*?C*I)b?(qSiV)~P#!!aWhvn<1S<9^V#tYT&7bXM)!R&qjF0 z!BY*-c&{0rHSmmurxKnjuLYi!!E#-1S#XqQOK^ndJ;741;m6f92Zw3LBBYiebr@1h zs~k(pI}MY=S3)u0tYC3vSUYw>w3YP_V0U8L%7)YKINQqR2e5DXZDpdfwH22#l1A%W z9i1{-bna@s#U@L##uatP3UR?m&*+YI%EA3Gi^nTaH~ZQk31b73ZE~2aBEQ=aBO!Bk zJDjQBa0rAu9^wQn$*p#q67wBbXzbnyt?30#7&NvZ)d{b3A-^*yV&q8m$~?D3ro3Th9s{|&yWZ$n$NBZEbgrEt18(L4cC>vI!jw%=#AjZ>cM-f^L$Db(4{U9t{ zmyo)rb<6ECVkrrqKxjK0+t7r&78d4%kovwf+954ZkZ=YQ26<>>YLrFAMo zx>PesHGfCK2+TM-xL-`0| zKSK3`Rvw2%aYOgCe(9D`m#E}vgc7ii@wAujr(sdp&^=w1%#=|B91tExC?BF+E&Ku& zg$>`C@F5}zJ`=VGW>2*PDW@JM0Hwt2p6Zry1z9f%zcc6 z0fbs0TB?QFNTaZ!`{^VsmSJy@a413>{ZOsf%Ab)(aYOfuNm(Mpmg5<4*`eGE(KBdS zsW3=KitIEP$Kib)&D}dW6zQeoa}YPJi8Pf{g$#r~f#x(?b^(n4VembgUpU{v7A$~R z>b{ZFT;IYSW5Vr4a|K~!VUUTIEs;M0gHkm7x#{($)fl>8f{}Dd`!1SSzv7V9l2i-n zwUzqiT}vasN7_&JC>x=w|3$f3E2-Z~qikvaxkuOz(aK+h`?Qey12oE)_Dnp~dhW*{ z+DyWXG<0;Fi2-sqPCVHwbW*9eQ=PI=b*5%WrFy4j$XC?Rv>bU(%}YBz=Q&(h-asq% zvC2N044j!(n7LlOqo#tW6nQ6nCVB}%vVy3wT9%uMv)AP55zws-2|Q7iT9CgPhqdW} z$OLK1RuA>bmKEw~AE%$*yO3~lctxmEDNcD)O*l_QuTe-)6J8Y(RN-n&Lwf}DQiKFU z!$VW$4#W#;%Igu(>lG5@^-Qsf){+6iLVY>(x`Y%NJ&OHwnaMpR=wJ*9l6wSIn8SF; z&a2EL!2~>Aa8;0jeJjBv`7^O^#u_`Wx>g1HrumylSc${OQW|zG84w;sUVbOkma{ep z>3|PO&e}qf+*nLzS<#Cpqo0b9U`4MHx<>9x*b+-lkAR-@qy znl|0h@mZlax+A~rHrjv(%Kv6^)#HYR{?hb^!^X>OoO5Dx$Ms`pnxNiORc`kC=&`_Y zvzWM0h$TdvRdie$^+L1~8-!R+#9`D=O;_X8Gg}4aSaofn=N`!7Z5p{PG zQRf*V>g*#f5*>Gp59{UMgM+}hMu=ybM~EZvqsDxTST4jVVvZ0WGEZ~-3%0*u{+DTv z3DvPNV~D7eOdKjipAh}R#ezHz3}Kcqt2kcGoW%aA%sS>B9KVa%#{N~z`=QA6aEgWCQY-j&tL`?iNvA+> zhwc9`e`dzvON8|OnfXLaP(m!iuOf345p}#ApT_>#al)^K^Vx9^3tO1&>|f1%koh>r zpJeV~|8vY2n8!IDV1B^`TOzq%#MxzmQqX9LsSp zb0YgEGp8|qeikfdws2rMvz@t#vz9rHI0E;7W@sSlnLg&-%zK%CBo+y= zhN+laiCDmP=3e$6V7|zFljA3tA8J4D|0gUs%e=^fADCu*LD9tFOgpn55fi(a1KD3h z#9L5GbP6$w>1F=}Vjm%HCi*d$Oal~}%>f?~1(py~@O!{)B|>)}+v|wXJwn8n$``okTnj-!d<;--?eoI^DvV@kHp;h&cb9 z%q;d75~GADW{zZkMS{TlA0fmza)38+U@8$`dv(lu_Ae&ldvXbL8T;=e;zMRNa|8Q# zFb^|NFi$hP68uQS$_2KM7|k5S9LB6<-o{+Oyq9@D^HJtb=1a^snP-?^G9~?^OHa&9 zXBIQZFefnUn9a-;OvT*B+{Zk|e3yBi`5iOazy}{KAc5JRS=g~+>M2X?G5jwIdiZzY z%alG7PIWZQnrk&Sj#noaR2!SeE6>7e^Nr zfkKRpP?u6Jv1-uRN|I%zx}uABGiu1(?W=1t)~?fr{I=h2nloN}FUi&F8W?D_B2 zOYEMpp6xm4wOOvIw%>>{b4|5$+nevHPH59BSA|?{)6ZMN&0|(qC${T9Y2J;-uEe&{ zopWZXU|omvi|VdN(^PO)N7<1vor_vk@Y;^5u69iYZ#c9tta-BAzKxFT98{))WgX5V zS9hjDJD?-j>G7yw?IGcvkMxZpS923-oA*a6J1c`KnBOs~bMgcg905fG6my`M8@58R zCmQN9cA&GrBi!`{()tfwXAbj1w9e$SQQ@76F4v+nIg`pwrlOOV#wI?^Ql7oquC!AcWSek`8)MB$Gy&`UK&!+@`~`0rC`oeqK$#Nk-N)f_+T_(BUpvsOSXKQ-y z&G4EY@(Pcf?LZ(RWBoHNLS&ON37Oo>Gh$LndNaYx(wVy+-brvwK%oQ=#R)a7x69ap zF5bsDyV=EtxO`gLY7xnO0g-iZtfgMwC9tq841|hiEw{_W#iUz{$aXlMK@r{xSQt-8 zs`^o5hqP`cT@@nl!0|SU$jcMzOz(b`X?PF4=X#TiSDAo@RMPe{^|7PRQ8>P&usa79 zg*B?uP~=0>np>jCy=X*rFQf)rJ`^ctNN(=tYRap zmkTpfrjJKRyMK|l7R$!t6B<=`s6u8++Y+S6tw-eVnCbiGY~RC7%rI4$Iq5Fj zLb@Y}9E0XtQ`drC=8jWUNV(>{mC0vG_&y>T*uiw# zMehT!D6COM3zCI0Im-pzHber@_)XnEU{P43YBcFeWb)Odiy{)zgdwU-VJS?CYgE;e zuv{kGM8Y5<4baRobz8A6GfY)oOy|F!bgv?^0-9x}E)BgXtWhynpx=~!CY5@vPh4>~s`P_4e?1E?~N|A*|eWyqqRdZ1E`;zoh zN|2Z(#CMQj6h>J z3jVzGKGSS9surWjTef=2s`b?HNyl5=x<-Av5c7W*Zl*X@Td7ej z9no%KJ2ZFwuG>vvs$Qc;Ksr+JAvOno3YyKN%gaIak-9CXOiotM=H$tx>J!x4)h{_E z@?(|T_kiOGETMFO4I376R6e0D^vxPUpXZosVDcD>3x6R_P~DfDEf>Pl>1o9TzT|3C z5ZH_(SHCwYL+WX2V!vWps*HYagWjN+a9ToDEYonD)p~6LXQEdkCa6sa#RMUo!urr| z0e!?{f}shqq5K2zn(3w80(w_sg3|6G?xwlqLEtiHOP~IjA`c2Ru)k{*9cVFER(Gcm zvTBbxcwQNJ(4`acA%Uxk417maAZ?%?Cz5ub1M93%_w>&(rjW222Zwcd{17rA+=G6B zGf-Pk*de5oIVL$_k4gNg7|gmljt8S7J|B>|k?o16B_SE)?PMh&b21%9=qGx$FzpSs{dT=^=IpP(t2Va-L<|)aB2@_0maqZ z{yg=eKMjmm$Nd?~SsJz`+w`Q6npf(T6V@fmo&{8xvcCLnf<**T6LGjYR%BwlF>}Jh2W9;Z>^Dv@^DJz&XLn;iQiQ| zspl@Hm)rcyF~147_ONmG2oc#*Rj)&B9Xrxu&`G7?{cj`QEW|1zPLOuue0;qUZ^3Iz z#2N7*u_<zvlR9w$C!pF*Ro_kB#XdB2RDPP$BxnXo&tSDB(aE zb1-uZ$HUCY?5|^9&urrOt<2@@zk_)fa|6dWnlyyi!hz?BnBmLBA|duL_cISNKVu#z zVy8|qJK6tl<^`r5w*k^6G1G|{r!Ubcz{yDsFrNj3*dD?h#=M5(o#C%-KK!X}PIk1Q55#q1Ry+q9XBeuV1b}{2|F(7>ovw(;J0>pA5%9%rm z$P?uF6!uR`6NV|A!H#AYE?}-;|DDXcnU8RM6Z0ANKgWEL`8LP*F+XAdXUxNCMr@|1 zSa6!z#exgW-SY!%hj4rtb2R(I%yG<_1`8UPjU2d@xro`$@wLo{ z*}swbBy%UncQgOS{&$%lFpqHDILeI^9Qc9R$^I_pZ|t|E$5w1-W)ZO?eVIOH5wo0F zE<^=$I5R{Xf#+WnYlx}LY0L)Zjm!naav_#5mowK9F@Xn|o7lgFxsCY>$6sgeGyQn} zAF|+M=GQDZ#yrjbv&?f$8!kOGa01gwEXT=4#9NR@bmRWUEMxyrVqYPyBpPT0sewde zIWU!o1T%=)Lew+o5}|8hdl?bBRYcq?+L>#K&^^rdlgu4N=ywrOUO_Ra@j5xsVIL9Y zAQ8gDL_GJem?zl(GZAONS>^@y>$sh1IRE3AsYK+-BH~`rms!C6(hPz3KT(K5_D>_?LO6qY6Z>0;xR)$su3-QD%x%oqnC~;c$S}|mGmNsMi|N94lHbD& zFh?@SGaHz#%+*ZAe1^H3`2q8v%u@z8x|s2}aM8ehnU^t#GOL->ne&-TnfEd`GXKJS zlX;MNl$rGdH~z;=!tWIGnMJ;saoCz#Y=?;tbt*2JbWOM-vUm1en^sw)issj7V{6n> zV1A9-4?I|-vTwOf+ghU@0FKtEgvJ`}bd9QOEW)*Kb)#4NSB=`y=+hpws!xFhKNi){ax}z<;p6`mxD}|CmW_F3{FquZA}JWTmHW^%St6LG5qx rS&w7G%T&uKm$J7ywaiMD-RjfY!z$S7%iK3xi1WB$b^p=NWcvF*cqyVq diff --git a/build/stm32f7xx_ll_dma.lst b/build/stm32f7xx_ll_dma.lst index 301eb07..5c43fa2 100644 --- a/build/stm32f7xx_ll_dma.lst +++ b/build/stm32f7xx_ll_dma.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccMRPLCc.s page 1 +ARM GAS /tmp/cccCOnvd.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /** @addtogroup STM32F7xx_LL_Driver 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** * @{ - ARM GAS /tmp/ccMRPLCc.s page 2 + ARM GAS /tmp/cccCOnvd.s page 2 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** */ @@ -118,7 +118,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** ((__VALUE__) == LL_DMA_CHANNEL_14) || \ 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** ((__VALUE__) == LL_DMA_CHANNEL_15)) 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** - ARM GAS /tmp/ccMRPLCc.s page 3 + ARM GAS /tmp/cccCOnvd.s page 3 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** #else @@ -178,7 +178,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** ((BURST) == LL_DMA_PBURST_INC16)) 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /** - ARM GAS /tmp/ccMRPLCc.s page 4 + ARM GAS /tmp/cccCOnvd.s page 4 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** * @} @@ -238,7 +238,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 42 .LCFI0: 43 .cfi_def_cfa_offset 8 44 .cfi_offset 4, -8 - ARM GAS /tmp/ccMRPLCc.s page 5 + ARM GAS /tmp/cccCOnvd.s page 5 45 .cfi_offset 14, -4 @@ -298,7 +298,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #ifdef __cplusplus 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** extern "C" { 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif - ARM GAS /tmp/ccMRPLCc.s page 6 + ARM GAS /tmp/cccCOnvd.s page 6 26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** typedef struct 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t PeriphOrM2MSrcAddress; /*!< Specifies the peripheral base address for DMA transfer - ARM GAS /tmp/ccMRPLCc.s page 7 + ARM GAS /tmp/cccCOnvd.s page 7 83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** or as Source base address in case of memory to memory trans @@ -418,7 +418,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_CHANNEL 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct - ARM GAS /tmp/ccMRPLCc.s page 8 + ARM GAS /tmp/cccCOnvd.s page 8 140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -478,7 +478,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_7 0x00000007U 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_ALL 0xFFFF0000U 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccMRPLCc.s page 9 + ARM GAS /tmp/cccCOnvd.s page 9 197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} @@ -538,7 +538,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_HALFWORD DMA_SxCR_PSIZE_0 /*!< Peripheral data alignment 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_WORD DMA_SxCR_PSIZE_1 /*!< Peripheral data alignment 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccMRPLCc.s page 10 + ARM GAS /tmp/cccCOnvd.s page 10 254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} @@ -598,7 +598,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccMRPLCc.s page 11 + ARM GAS /tmp/cccCOnvd.s page 11 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -658,7 +658,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_CURRENTTARGETMEM CURRENTTARGETMEM - ARM GAS /tmp/ccMRPLCc.s page 12 + ARM GAS /tmp/cccCOnvd.s page 12 368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ @@ -718,7 +718,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval LL_DMA_CHANNEL_y 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __LL_DMA_GET_STREAM(__STREAM_INSTANCE__) \ - ARM GAS /tmp/ccMRPLCc.s page 13 + ARM GAS /tmp/cccCOnvd.s page 13 425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream0)) ? LL_DMA_STREAM_0 : \ @@ -778,7 +778,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_Configuration Configuration 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccMRPLCc.s page 14 + ARM GAS /tmp/cccCOnvd.s page 14 482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -838,7 +838,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 64 .loc 1 213 34 is_stmt 0 view .LVU12 65 001a 664B ldr r3, .L38+4 66 001c C31A subs r3, r0, r3 - ARM GAS /tmp/ccMRPLCc.s page 15 + ARM GAS /tmp/cccCOnvd.s page 15 67 001e 18BF it ne @@ -898,7 +898,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 121 008c 0122 movne r2, #1 122 008e 53EA0204 orrs r4, r3, r2 123 0092 5AD0 beq .L26 - ARM GAS /tmp/ccMRPLCc.s page 16 + ARM GAS /tmp/cccCOnvd.s page 16 124 .loc 1 213 34 discriminator 21 view .LVU24 @@ -958,7 +958,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /* Reset DMAx_Streamy memory address register */ 225:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** LL_DMA_WriteReg(tmp, M0AR, 0U); 226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** - ARM GAS /tmp/ccMRPLCc.s page 17 + ARM GAS /tmp/cccCOnvd.s page 17 227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /* Reset DMAx_Streamy memory address register */ @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** 282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** return status; 163 .loc 1 282 3 is_stmt 1 view .LVU34 - ARM GAS /tmp/ccMRPLCc.s page 18 + ARM GAS /tmp/cccCOnvd.s page 18 283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** } @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @addtogroup STM32F7xx_LL_Driver 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ - ARM GAS /tmp/ccMRPLCc.s page 19 + ARM GAS /tmp/cccCOnvd.s page 19 48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_FLITF RCC_AHB1LPENR_FLITFLPEN 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM2 RCC_AHB1LPENR_SRAM2LPEN - ARM GAS /tmp/ccMRPLCc.s page 20 + ARM GAS /tmp/cccCOnvd.s page 20 105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPDIFRX) - ARM GAS /tmp/ccMRPLCc.s page 21 + ARM GAS /tmp/cccCOnvd.s page 21 162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPDIFRX RCC_APB1ENR_SPDIFRXEN @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI5 RCC_APB2ENR_SPI5EN 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPI6) 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI6 RCC_APB2ENR_SPI6EN - ARM GAS /tmp/ccMRPLCc.s page 22 + ARM GAS /tmp/cccCOnvd.s page 22 219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* SPI6 */ @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock\n 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_EnableClock\n - ARM GAS /tmp/ccMRPLCc.s page 23 + ARM GAS /tmp/cccCOnvd.s page 23 276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_EnableClock\n @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_IsEnabledClock\n 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_IsEnabledClock\n - ARM GAS /tmp/ccMRPLCc.s page 24 + ARM GAS /tmp/cccCOnvd.s page 24 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_IsEnabledClock\n @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_DisableClock\n 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_DisableClock\n 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_DisableClock\n - ARM GAS /tmp/ccMRPLCc.s page 25 + ARM GAS /tmp/cccCOnvd.s page 25 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_DisableClock\n @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ForceReset\n 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ForceReset\n 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ForceReset\n - ARM GAS /tmp/ccMRPLCc.s page 26 + ARM GAS /tmp/cccCOnvd.s page 26 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR CRCRST LL_AHB1_GRP1_ForceReset\n @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIODRST LL_AHB1_GRP1_ReleaseReset\n 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOERST LL_AHB1_GRP1_ReleaseReset\n 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOFRST LL_AHB1_GRP1_ReleaseReset\n - ARM GAS /tmp/ccMRPLCc.s page 27 + ARM GAS /tmp/cccCOnvd.s page 27 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ReleaseReset\n @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 201 .loc 3 526 1 view .LVU45 202 00de 7047 bx lr 203 .LVL8: - ARM GAS /tmp/ccMRPLCc.s page 28 + ARM GAS /tmp/cccCOnvd.s page 28 204 .L37: @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 249 .LBE42: 250 .LBE43: 213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** - ARM GAS /tmp/ccMRPLCc.s page 29 + ARM GAS /tmp/cccCOnvd.s page 29 251 .loc 1 213 11 discriminator 2 view .LVU58 @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR CIRC LL_DMA_ConfigTransfer\n 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PINC LL_DMA_ConfigTransfer\n 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR MINC LL_DMA_ConfigTransfer\n - ARM GAS /tmp/ccMRPLCc.s page 30 + ARM GAS /tmp/cccCOnvd.s page 30 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PSIZE LL_DMA_ConfigTransfer\n @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Data transfer direction (read from peripheral or from memory). - ARM GAS /tmp/ccMRPLCc.s page 31 + ARM GAS /tmp/cccCOnvd.s page 31 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_GetDataTransferDirection @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 - ARM GAS /tmp/ccMRPLCc.s page 32 + ARM GAS /tmp/cccCOnvd.s page 32 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccMRPLCc.s page 33 + ARM GAS /tmp/cccCOnvd.s page 33 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccMRPLCc.s page 34 + ARM GAS /tmp/cccCOnvd.s page 34 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size) 832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccMRPLCc.s page 35 + ARM GAS /tmp/cccCOnvd.s page 35 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccMRPLCc.s page 36 + ARM GAS /tmp/cccCOnvd.s page 36 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH 946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH - ARM GAS /tmp/ccMRPLCc.s page 37 + ARM GAS /tmp/cccCOnvd.s page 37 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 - ARM GAS /tmp/ccMRPLCc.s page 38 + ARM GAS /tmp/cccCOnvd.s page 38 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 295 0123 37 .byte (.L9-.L7)/2 296 0124 3C .byte (.L8-.L7)/2 297 0125 41 .byte (.L6-.L7)/2 - ARM GAS /tmp/ccMRPLCc.s page 39 + ARM GAS /tmp/cccCOnvd.s page 39 298 .LVL17: @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 341 .loc 1 213 34 discriminator 24 view .LVU81 342 014e 264B ldr r3, .L38+56 343 0150 D3E7 b .L5 - ARM GAS /tmp/ccMRPLCc.s page 40 + ARM GAS /tmp/cccCOnvd.s page 40 344 .L28: @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 385 0174 8360 str r3, [r0, #8] 179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** 386 .loc 1 179 15 view .LVU96 - ARM GAS /tmp/ccMRPLCc.s page 41 + ARM GAS /tmp/cccCOnvd.s page 41 387 0176 0020 movs r0, #0 @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** } 427 .loc 1 269 20 is_stmt 0 view .LVU111 428 0196 4FF47C13 mov r3, #4128768 - ARM GAS /tmp/ccMRPLCc.s page 42 + ARM GAS /tmp/cccCOnvd.s page 42 429 019a C360 str r3, [r0, #12] @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 477 .LBE47: 478 .cfi_endproc 479 .LFE320: - ARM GAS /tmp/ccMRPLCc.s page 43 + ARM GAS /tmp/cccCOnvd.s page 43 481 .section .text.LL_DMA_Init,"ax",%progbits @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** assert_param(IS_LL_DMA_MEMORYINCMODE(DMA_InitStruct->MemoryOrM2MDstIncMode)); 506 .loc 1 314 3 view .LVU126 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** assert_param(IS_LL_DMA_PERIPHDATASIZE(DMA_InitStruct->PeriphOrM2MSrcDataSize)); - ARM GAS /tmp/ccMRPLCc.s page 44 + ARM GAS /tmp/cccCOnvd.s page 44 507 .loc 1 315 3 view .LVU127 @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 529 000c 5469 ldr r4, [r2, #20] 344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** DMA_InitStruct->PeriphOrM2MSrcIncMode | \ 530 .loc 1 344 65 view .LVU144 - ARM GAS /tmp/ccMRPLCc.s page 45 + ARM GAS /tmp/cccCOnvd.s page 45 531 000e 2343 orrs r3, r3, r4 @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** { 353:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /*---------------------------- DMAx SxFCR Configuration ------------------------ 354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** * Configure DMAx_Streamy: fifo mode and fifo threshold with parameters : - ARM GAS /tmp/ccMRPLCc.s page 46 + ARM GAS /tmp/cccCOnvd.s page 46 355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** * - FIFOMode: DMA_SxFCR_DMDIS bit @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccMRPLCc.s page 47 + ARM GAS /tmp/cccCOnvd.s page 47 1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Pburst This parameter can be one of the following values: 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PBURST_SINGLE 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PBURST_INC4 - ARM GAS /tmp/ccMRPLCc.s page 48 + ARM GAS /tmp/cccCOnvd.s page 48 1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PBURST_INC8 @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccMRPLCc.s page 49 + ARM GAS /tmp/cccCOnvd.s page 49 1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Current target (only in double buffer mode) to Memory 1 or Memory 0. @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableDoubleBufferMode(DMA_TypeDef *DMAx, uint32_t Stream) - ARM GAS /tmp/ccMRPLCc.s page 50 + ARM GAS /tmp/cccCOnvd.s page 50 1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/ccMRPLCc.s page 51 + ARM GAS /tmp/cccCOnvd.s page 51 1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccMRPLCc.s page 52 + ARM GAS /tmp/cccCOnvd.s page 52 1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetFIFOThreshold(DMA_TypeDef *DMAx, uint32_t Stream) @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 592 .LVL44: 593 .LBB52: 594 .LBI52: - ARM GAS /tmp/ccMRPLCc.s page 53 + ARM GAS /tmp/cccCOnvd.s page 53 1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 628 005c 5368 ldr r3, [r2, #4] 629 .LVL50: 630 .LBB56: - ARM GAS /tmp/ccMRPLCc.s page 54 + ARM GAS /tmp/cccCOnvd.s page 54 631 .LBI56: @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 - ARM GAS /tmp/ccMRPLCc.s page 55 + ARM GAS /tmp/cccCOnvd.s page 55 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 651 .LBE59: 652 .LBE58: 384:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** - ARM GAS /tmp/ccMRPLCc.s page 56 + ARM GAS /tmp/cccCOnvd.s page 56 385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /*--------------------------- DMAx SxNDTR Configuration ------------------------- @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 688 .LVL60: 1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 689 .loc 2 1034 3 view .LVU192 - ARM GAS /tmp/ccMRPLCc.s page 57 + ARM GAS /tmp/cccCOnvd.s page 57 690 .LBE63: @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccMRPLCc.s page 1 731 0006 8360 str r3, [r0, #8] 411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** DMA_InitStruct->Mode = LL_DMA_MODE_NORMAL; 732 .loc 1 411 3 is_stmt 1 view .LVU203 - ARM GAS /tmp/ccMRPLCc.s page 58 + ARM GAS /tmp/cccCOnvd.s page 58 733 .loc 1 411 42 is_stmt 0 view .LVU204 @@ -3478,29 +3478,29 @@ ARM GAS /tmp/ccMRPLCc.s page 1 778 0000 10284058 .ascii "\020(@Xp\210\240\270" 778 7088A0B8 779 .text - ARM GAS /tmp/ccMRPLCc.s page 59 + ARM GAS /tmp/cccCOnvd.s page 59 780 .Letext0: 781 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 782 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 783 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - ARM GAS /tmp/ccMRPLCc.s page 60 + ARM GAS /tmp/cccCOnvd.s page 60 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_ll_dma.c - /tmp/ccMRPLCc.s:20 .text.LL_DMA_DeInit:00000000 $t - /tmp/ccMRPLCc.s:26 .text.LL_DMA_DeInit:00000000 LL_DMA_DeInit - /tmp/ccMRPLCc.s:290 .text.LL_DMA_DeInit:0000011e $d - /tmp/ccMRPLCc.s:299 .text.LL_DMA_DeInit:00000126 $t - /tmp/ccMRPLCc.s:458 .text.LL_DMA_DeInit:000001b0 $d - /tmp/ccMRPLCc.s:777 .rodata.STREAM_OFFSET_TAB:00000000 STREAM_OFFSET_TAB - /tmp/ccMRPLCc.s:482 .text.LL_DMA_Init:00000000 $t - /tmp/ccMRPLCc.s:488 .text.LL_DMA_Init:00000000 LL_DMA_Init - /tmp/ccMRPLCc.s:701 .text.LL_DMA_Init:00000090 $d - /tmp/ccMRPLCc.s:708 .text.LL_DMA_StructInit:00000000 $t - /tmp/ccMRPLCc.s:714 .text.LL_DMA_StructInit:00000000 LL_DMA_StructInit - /tmp/ccMRPLCc.s:774 .rodata.STREAM_OFFSET_TAB:00000000 $d + /tmp/cccCOnvd.s:20 .text.LL_DMA_DeInit:00000000 $t + /tmp/cccCOnvd.s:26 .text.LL_DMA_DeInit:00000000 LL_DMA_DeInit + /tmp/cccCOnvd.s:290 .text.LL_DMA_DeInit:0000011e $d + /tmp/cccCOnvd.s:299 .text.LL_DMA_DeInit:00000126 $t + /tmp/cccCOnvd.s:458 .text.LL_DMA_DeInit:000001b0 $d + /tmp/cccCOnvd.s:777 .rodata.STREAM_OFFSET_TAB:00000000 STREAM_OFFSET_TAB + /tmp/cccCOnvd.s:482 .text.LL_DMA_Init:00000000 $t + /tmp/cccCOnvd.s:488 .text.LL_DMA_Init:00000000 LL_DMA_Init + /tmp/cccCOnvd.s:701 .text.LL_DMA_Init:00000090 $d + /tmp/cccCOnvd.s:708 .text.LL_DMA_StructInit:00000000 $t + /tmp/cccCOnvd.s:714 .text.LL_DMA_StructInit:00000000 LL_DMA_StructInit + /tmp/cccCOnvd.s:774 .rodata.STREAM_OFFSET_TAB:00000000 $d NO UNDEFINED SYMBOLS diff --git a/build/stm32f7xx_ll_dma.o b/build/stm32f7xx_ll_dma.o index 42d12258b88c193b56ac1c1104d4ac3f18b46163..4f684bc95ab30f33d58b47b788cc0c794a6b87da 100644 GIT binary patch delta 989 zcmYk4Ur5tY6vywmzu#|LyFbO*TC;@drde5Rv$;RHBG7P}ZV^QWib<_ML@Ju3go)H% zqKE7xXh*5_I{)Tir17Wp1$~4SpI2 z6(SDAzqoBI+w)E_gaOSvvP0VZF>IpZrd0hkst$=o8j6-NxIy@&o+){km>@Hzfs%jb zQL!R#s2M+c008x4>Ut?S~%&`X(ofuiUw3oUWjABWn|gW1x6i;!GaHOc|Bx zS!IKcH$yu`7zYzI&zPGQA7)TOo!PrFV|MUW6}MVy94RUDLyf#KLF))DM|Zl@Qp>@L z<5oYU@T0XHZl{;5TL5&-hzLB#h`yZ?C-h*UG~j8iSsHlCaZ=w!iT8SaIGY$$Te68( z`NteoJ0vjoysT+d9iW`CQdJZ6NO)kvOpwBZ1wpbH$i~M7+p0gwXGJ-wE%dE&>L`!o z)Y2)+W7$hqIW8AeKq~DhjM?y|tJ3bh&~rKIO%C++^mch0lKq#i^z`C=S7~~|RqLSf z+ky$0!mi*$c!UtTN^vNZ;A=HFABuw=OTq~{x)`p8H#i>lz!=VjtKb!WruZ5+MXJDw ceu^!4ieeN;BUR3C`>4n4(B)HUxVeq}17I|@MF0Q* delta 1068 zcmZ9KUr19?9LLW&_ug&nT+OL1|AEVCrWSK+>V_*U3!SB#X6Qq*rkg3Gi*2S5Wstq} z5ZMn!Uy6c+AcI&vNIe7@5kzkVGi#s@oz#wNz!5Nc16E{b z{zW{eL@}Uv2+m4gdI6qE#U>Rs${aPF7bUC87hz4RqpxANT+B*kXp;|(-$n=JD@#jc zJ}!7gV}r5L+d-67ja9xZEWc@-#X~~>UE^H7D(Y(*=kZFxKbR@mowbO!h*sCNx}}7h zgy5%^DCKPwd4riIlRfX`H^Hgc#@mGIw`Swv6GHVzJJrDTqK!?B5AtrICsNv_nWGs| zsFc2@pBIQa)3}pY3O`BXZr&^EvXpN7IJSwSQWQ;af;R}(X&mCGK-Ssl8F1?CtXzSU zx>ouM9_q^IV_4EP(Kle#*V9iB(AS4Ap*OpxroPCo>?MJ-X{^qEgg0T=)9B28A#g5@ zE+X9#>U+{UrgP{7Mmj}x*gPR6xY#*D^RctsY1q`8S)l^k3=Z?WklCq2ywQj2FfQ|S zB4DUt)B#gQJDrE;#_jY$V%fNrQYUP3H+=_gwGa!()Y?p8z!FM}FtB=IR;|FoQ?=2R zER4xVl7&|BV~)u^0!YcKIMXDXsnll_r?5xFy)$}*dDxdxixwlvcsHY<>X*2dhoRbl zvr4Hw%$-sTCl6~*zNAosm5fq4pD<@Oo4RZRk)g1yKO73$TD|^GTSqW781WB8;*sIO zzQECu-dH%=AM6VUqQOuwYHJD)hoixGBpUEH9{5j;nLsSkA0G`y!_ZT_BatYsG2`@> zYkYJO+_g98OL$v5im|=U$BOpAt-3bqft5NRruMt4=oc7rS?K~yy2|MXSitxhKDx@4 r1}h;BXt(Bo#hpdtV0V`*p)x|cleyFGth`(&UO72K@#SzLine_0_31); - ARM GAS /tmp/ccsXZQ1q.s page 5 + ARM GAS /tmp/ccVndrET.s page 5 108 .loc 1 124 11 is_stmt 1 view .LVU25 @@ -298,7 +298,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** */ 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #endif /*USE_FULL_LL_DRIVER*/ 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** /* Exported types ------------------------------------------------------------*/ - ARM GAS /tmp/ccsXZQ1q.s page 6 + ARM GAS /tmp/ccVndrET.s page 6 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #if defined(USE_FULL_LL_DRIVER) @@ -358,7 +358,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */ 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #endif 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */ - ARM GAS /tmp/ccsXZQ1q.s page 7 + ARM GAS /tmp/ccVndrET.s page 7 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #if defined(EXTI_IMR_IM20) @@ -418,7 +418,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** /** 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @} 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** */ - ARM GAS /tmp/ccsXZQ1q.s page 8 + ARM GAS /tmp/ccVndrET.s page 8 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** @@ -478,7 +478,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** /* Exported functions --------------------------------------------------------*/ 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions - ARM GAS /tmp/ccsXZQ1q.s page 9 + ARM GAS /tmp/ccVndrET.s page 9 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @{ @@ -538,7 +538,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @param ExtiLine This parameter can be one of the following values: 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_0 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_1 - ARM GAS /tmp/ccsXZQ1q.s page 10 + ARM GAS /tmp/ccVndrET.s page 10 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_2 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_13 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_14 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_15 - ARM GAS /tmp/ccsXZQ1q.s page 11 + ARM GAS /tmp/ccVndrET.s page 11 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_16 @@ -658,7 +658,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_22 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_23 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_24(*) - ARM GAS /tmp/ccsXZQ1q.s page 12 + ARM GAS /tmp/ccVndrET.s page 12 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_ALL_0_31 @@ -718,7 +718,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 118 0022 24EA0202 bic r2, r4, r2 119 .LVL4: 120 .loc 2 443 3 is_stmt 0 view .LVU28 - ARM GAS /tmp/ccsXZQ1q.s page 13 + ARM GAS /tmp/ccVndrET.s page 13 121 0026 4A60 str r2, [r1, #4] @@ -778,7 +778,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** switch (EXTI_InitStruct->Trigger) 151 .loc 1 145 9 is_stmt 1 view .LVU39 152 0036 022A cmp r2, #2 - ARM GAS /tmp/ccsXZQ1q.s page 14 + ARM GAS /tmp/ccVndrET.s page 14 153 0038 25D0 beq .L10 @@ -838,7 +838,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** } 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** - ARM GAS /tmp/ccsXZQ1q.s page 15 + ARM GAS /tmp/ccVndrET.s page 15 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** @@ -898,7 +898,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @note The configurable wakeup lines are edge-triggered. No glitch must be 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * generated on these lines. If a rising edge on a configurable interrupt 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * line occurs during a write operation in the EXTI_RTSR register, the - ARM GAS /tmp/ccsXZQ1q.s page 16 + ARM GAS /tmp/ccVndrET.s page 16 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * pending bit is not set. @@ -958,7 +958,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_12 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_13 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_14 - ARM GAS /tmp/ccsXZQ1q.s page 17 + ARM GAS /tmp/ccVndrET.s page 17 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_15 @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_20 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_21 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_22 - ARM GAS /tmp/ccsXZQ1q.s page 18 + ARM GAS /tmp/ccVndrET.s page 18 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @note Please check each device line mapping for EXTI Line availability @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 170 .LVL10: 171 .loc 2 704 3 is_stmt 0 view .LVU43 172 .LBE35: - ARM GAS /tmp/ccsXZQ1q.s page 19 + ARM GAS /tmp/ccVndrET.s page 19 173 .LBE34: @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** } 214 .loc 2 311 3 view .LVU56 215 .LBE41: - ARM GAS /tmp/ccsXZQ1q.s page 20 + ARM GAS /tmp/ccVndrET.s page 20 216 .LBE40: @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 257 0074 0A60 str r2, [r1] 258 .LVL22: 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** } - ARM GAS /tmp/ccsXZQ1q.s page 21 + ARM GAS /tmp/ccVndrET.s page 21 259 .loc 2 269 3 view .LVU70 @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** { 300 .loc 2 575 22 view .LVU82 301 .LBB53: - ARM GAS /tmp/ccsXZQ1q.s page 22 + ARM GAS /tmp/ccVndrET.s page 22 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** { 343 .loc 2 532 22 view .LVU94 344 .LBB59: - ARM GAS /tmp/ccsXZQ1q.s page 23 + ARM GAS /tmp/ccVndrET.s page 23 534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** } 169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** } 170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** /* DISABLE LineCommand */ - ARM GAS /tmp/ccsXZQ1q.s page 24 + ARM GAS /tmp/ccVndrET.s page 24 171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** else @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 422 .cfi_def_cfa_offset 0 423 00ca 7047 bx lr 424 .LVL44: - ARM GAS /tmp/ccsXZQ1q.s page 25 + ARM GAS /tmp/ccVndrET.s page 25 425 .L12: @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 467 .loc 1 189 3 is_stmt 1 view .LVU125 468 .loc 1 189 35 is_stmt 0 view .LVU126 469 0006 4371 strb r3, [r0, #5] - ARM GAS /tmp/ccsXZQ1q.s page 26 + ARM GAS /tmp/ccVndrET.s page 26 190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING; @@ -1516,18 +1516,18 @@ ARM GAS /tmp/ccsXZQ1q.s page 1 481 .file 3 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 482 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 483 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - ARM GAS /tmp/ccsXZQ1q.s page 27 + ARM GAS /tmp/ccVndrET.s page 27 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_ll_exti.c - /tmp/ccsXZQ1q.s:20 .text.LL_EXTI_DeInit:00000000 $t - /tmp/ccsXZQ1q.s:26 .text.LL_EXTI_DeInit:00000000 LL_EXTI_DeInit - /tmp/ccsXZQ1q.s:54 .text.LL_EXTI_DeInit:00000018 $d - /tmp/ccsXZQ1q.s:59 .text.LL_EXTI_Init:00000000 $t - /tmp/ccsXZQ1q.s:65 .text.LL_EXTI_Init:00000000 LL_EXTI_Init - /tmp/ccsXZQ1q.s:441 .text.LL_EXTI_Init:000000d4 $d - /tmp/ccsXZQ1q.s:446 .text.LL_EXTI_StructInit:00000000 $t - /tmp/ccsXZQ1q.s:452 .text.LL_EXTI_StructInit:00000000 LL_EXTI_StructInit + /tmp/ccVndrET.s:20 .text.LL_EXTI_DeInit:00000000 $t + /tmp/ccVndrET.s:26 .text.LL_EXTI_DeInit:00000000 LL_EXTI_DeInit + /tmp/ccVndrET.s:54 .text.LL_EXTI_DeInit:00000018 $d + /tmp/ccVndrET.s:59 .text.LL_EXTI_Init:00000000 $t + /tmp/ccVndrET.s:65 .text.LL_EXTI_Init:00000000 LL_EXTI_Init + /tmp/ccVndrET.s:441 .text.LL_EXTI_Init:000000d4 $d + /tmp/ccVndrET.s:446 .text.LL_EXTI_StructInit:00000000 $t + /tmp/ccVndrET.s:452 .text.LL_EXTI_StructInit:00000000 LL_EXTI_StructInit NO UNDEFINED SYMBOLS diff --git a/build/stm32f7xx_ll_exti.o b/build/stm32f7xx_ll_exti.o index 35fedecf04df63cc4e15bbc0cf893121449c8f72..83ad3bd91945f266d3da50e0a86bbf43c753becd 100644 GIT binary patch delta 870 zcmYk4O=uHQ5XaxVeVg4j*(Ob@G_}=i0;aV!xiqzfY9tywC?u!{J(L(Vk|^zlHqv^~ z_0qF}XP}4TMSCb%P$Nh#(t_Z{n@|e9=%ol+1jU}6*(K2jnVJ9m=HtDvKe8XP^$5Iu zZJJ=8WsLdqoUsvwu_YA$AFgW$z!(?W7joeFgoT`|&&dh(9XVaipi>MoiT(n%bI?bq zoNF`alpP}D;YUcsEMcKt#Jnoh%3Muu!I=31rHJ$12Sj7K{sue5a9jIyP4@6(@I)r~ zfW3;f%o{}uOxeX)T~icP-5Sttbse&(yr-P9X&i)QX%y;9D9LhksG2{~J1ye56X=$C{?+&cPqzl(+X^LP#ZC^J96AnDGNzhBs zeTNrP4q(tMdM3J>KmDeXOqQ+LQnGY^-l`Up=SvIsYF0IQxp=!`<;zyhnycI@DJfKgEumPd3AP6hO58SEl0p)Q5kH{D z-nF76d)$Nsu1&svf*4UhKh{4UI1B%$xbm{Ab>>Z&E)}^$>i1 zsq0XCz!-CFaK9^xi_E7745NrI3(;V2L9@>pvT2^}aAbgWi z-dFpDwaj@FEimOc={!>ubPhYvZ1EgY7&-5vVb1%w6qc<~*$d?`IsokcYDdhqdd7wx$nl?ORM0Lvy zK4RouLIcexogu?~Dvj%gDk?(W0W^@F?Y3hutTN`edh#RGGlL+3Z(x!Hmb`SW-xz;o zjXA~3YbFV${|WUYquIUFSjby^FDUaU*_WbaTRdqE?6p4eD#2O@uJTiD_>MZ01lKz- zxeLFLP7lE*!J4Jp!%wzbQ}m&lfb>(RwFzTwc$rqK6a3kMbx5=!kZzoyPwcK6hfxde z3lek^Y~RBPaSJeL7`D-_@mRiGG-Hcq&WN2olbMU1H*$q?CSR_WONE8(?A7@zW@XV> zFtZgSXH;TSX34A=)p8}9nVgXC{r!zKudXz{`}^InAw}pKY|7cg-iAL 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event - ARM GAS /tmp/ccZKwQMo.s page 24 + ARM GAS /tmp/ccBN2W7T.s page 24 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } 911:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccZKwQMo.s page 25 + ARM GAS /tmp/ccBN2W7T.s page 25 912:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula - ARM GAS /tmp/ccZKwQMo.s page 26 + ARM GAS /tmp/ccBN2W7T.s page 26 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 65 .LVL3: 66 .LBB78: 67 .LBI78: - ARM GAS /tmp/ccZKwQMo.s page 27 + ARM GAS /tmp/ccBN2W7T.s page 27 981:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_4 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_5 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_6 - ARM GAS /tmp/ccZKwQMo.s page 28 + ARM GAS /tmp/ccBN2W7T.s page 28 435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_7 @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 108 @ frame_needed = 0, uses_anonymous_args = 0 109 .loc 2 485 1 is_stmt 0 view .LVU18 110 0000 00B5 push {lr} - ARM GAS /tmp/ccZKwQMo.s page 29 + ARM GAS /tmp/ccBN2W7T.s page 29 111 .LCFI1: @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 158 .loc 2 486 3 discriminator 4 view .LVU31 159 0020 B1FA81F1 clz r1, r1 160 0024 4900 lsls r1, r1, #1 - ARM GAS /tmp/ccZKwQMo.s page 30 + ARM GAS /tmp/ccBN2W7T.s page 30 161 0026 8A40 lsls r2, r2, r1 @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @note Possible values are from AF0 to AF15 depending on target. 525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @note Warning: only one pin can be passed as parameter. 526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7 - ARM GAS /tmp/ccZKwQMo.s page 31 + ARM GAS /tmp/ccBN2W7T.s page 31 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @param GPIOx GPIO Port @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 199 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 200 0004 91FAA1FC rbit ip, r1 201 @ 0 "" 2 - ARM GAS /tmp/ccZKwQMo.s page 32 + ARM GAS /tmp/ccBN2W7T.s page 32 202 .LVL14: @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 253 .LVL18: 254 .LFB151: 561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** - ARM GAS /tmp/ccZKwQMo.s page 33 + ARM GAS /tmp/ccBN2W7T.s page 33 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** /** @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_AF_1 617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_AF_2 618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_AF_3 - ARM GAS /tmp/ccZKwQMo.s page 34 + ARM GAS /tmp/ccBN2W7T.s page 34 619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_AF_4 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 289 0016 0EFA0CFC lsl ip, lr, ip 290 001a 23EA0C03 bic r3, r3, ip 291 .LVL21: - ARM GAS /tmp/ccZKwQMo.s page 35 + ARM GAS /tmp/ccBN2W7T.s page 35 292 .LBB90: @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 340 .loc 2 275 3 is_stmt 1 view .LVU70 341 0002 0368 ldr r3, [r0] 342 .LVL25: - ARM GAS /tmp/ccZKwQMo.s page 36 + ARM GAS /tmp/ccBN2W7T.s page 36 343 .LBB92: @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** } 389 .loc 2 275 3 discriminator 4 view .LVU83 390 0028 1343 orrs r3, r3, r2 - ARM GAS /tmp/ccZKwQMo.s page 37 + ARM GAS /tmp/ccBN2W7T.s page 37 391 002a 0360 str r3, [r0] @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 40:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** /* Private variables ---------------------------------------------------------*/ 41:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** /* Private constants ---------------------------------------------------------*/ 42:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** /* Private macros ------------------------------------------------------------*/ - ARM GAS /tmp/ccZKwQMo.s page 38 + ARM GAS /tmp/ccBN2W7T.s page 38 43:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** /** @addtogroup GPIO_LL_Private_Macros @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 97:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** * @brief De-initialize GPIO registers (Registers restored to their default values). 98:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** * @param GPIOx GPIO Port 99:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** * @retval An ErrorStatus enumeration value: - ARM GAS /tmp/ccZKwQMo.s page 39 + ARM GAS /tmp/ccBN2W7T.s page 39 100:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** * - SUCCESS: GPIO registers are de-initialized @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 433 0016 3AD0 beq .L27 128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** { 129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOD); - ARM GAS /tmp/ccZKwQMo.s page 40 + ARM GAS /tmp/ccBN2W7T.s page 40 130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOD); @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 455 .loc 1 162 11 is_stmt 0 view .LVU105 456 0030 4F4B ldr r3, .L35+32 457 0032 9842 cmp r0, r3 - ARM GAS /tmp/ccZKwQMo.s page 41 + ARM GAS /tmp/ccBN2W7T.s page 41 458 0034 67D0 beq .L32 @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 5:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Header file of BUS LL module. 6:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @verbatim - ARM GAS /tmp/ccZKwQMo.s page 42 + ARM GAS /tmp/ccBN2W7T.s page 42 8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ##### RCC Limitations ##### @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 62:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Constants BUS Exported Constants 63:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ - ARM GAS /tmp/ccZKwQMo.s page 43 + ARM GAS /tmp/ccBN2W7T.s page 43 65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(CRYP) 120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB2_GRP1_PERIPH_CRYP RCC_AHB2ENR_CRYPEN 121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* CRYP */ - ARM GAS /tmp/ccZKwQMo.s page 44 + ARM GAS /tmp/ccBN2W7T.s page 44 122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(AES) @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CAN2 RCC_APB1ENR_CAN2EN 177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* CAN2 */ 178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(CAN3) - ARM GAS /tmp/ccZKwQMo.s page 45 + ARM GAS /tmp/ccBN2W7T.s page 45 179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CAN3 RCC_APB1ENR_CAN3EN @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* MDIOS */ 234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(USB_HS_PHYC) 235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_OTGPHYC RCC_APB2ENR_OTGPHYCEN - ARM GAS /tmp/ccZKwQMo.s page 46 + ARM GAS /tmp/ccBN2W7T.s page 46 236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* USB_HS_PHYC */ @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI 291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) 292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) - ARM GAS /tmp/ccZKwQMo.s page 47 + ARM GAS /tmp/ccBN2W7T.s page 47 293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD 348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE 349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF - ARM GAS /tmp/ccZKwQMo.s page 48 + ARM GAS /tmp/ccBN2W7T.s page 48 350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE - ARM GAS /tmp/ccZKwQMo.s page 49 + ARM GAS /tmp/ccBN2W7T.s page 49 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI - ARM GAS /tmp/ccZKwQMo.s page 50 + ARM GAS /tmp/ccBN2W7T.s page 50 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC 505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD - ARM GAS /tmp/ccZKwQMo.s page 51 + ARM GAS /tmp/ccBN2W7T.s page 51 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 524 0062 1A69 ldr r2, [r3, #16] 525 0064 42F00202 orr r2, r2, #2 526 0068 1A61 str r2, [r3, #16] - ARM GAS /tmp/ccZKwQMo.s page 52 + ARM GAS /tmp/ccBN2W7T.s page 52 527 .LVL37: @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 570 .loc 1 124 5 is_stmt 1 view .LVU139 571 .LBB110: 572 .LBI110: - ARM GAS /tmp/ccZKwQMo.s page 53 + ARM GAS /tmp/ccBN2W7T.s page 53 523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 616 009c 22F00802 bic r2, r2, #8 617 00a0 1A61 str r2, [r3, #16] 618 .LVL46: - ARM GAS /tmp/ccZKwQMo.s page 54 + ARM GAS /tmp/ccBN2W7T.s page 54 525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 662 00ba 0020 movs r0, #0 663 .LVL51: 664 .LBB125: - ARM GAS /tmp/ccZKwQMo.s page 55 + ARM GAS /tmp/ccBN2W7T.s page 55 665 .LBB124: @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 710 .LBE130: 711 .LBE131: 150:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOG); - ARM GAS /tmp/ccZKwQMo.s page 56 + ARM GAS /tmp/ccBN2W7T.s page 56 712 .loc 1 150 5 is_stmt 1 view .LVU179 @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 756 .loc 4 478 3 view .LVU192 757 00ee 03F5E053 add r3, r3, #7168 - ARM GAS /tmp/ccZKwQMo.s page 57 + ARM GAS /tmp/ccBN2W7T.s page 57 758 00f2 1A69 ldr r2, [r3, #16] @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 802 .LBE145: 803 .LBE144: 165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** } - ARM GAS /tmp/ccZKwQMo.s page 58 + ARM GAS /tmp/ccBN2W7T.s page 58 804 .loc 1 165 5 is_stmt 1 view .LVU205 @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 848 .loc 4 525 3 view .LVU218 849 012a 1A69 ldr r2, [r3, #16] - ARM GAS /tmp/ccZKwQMo.s page 59 + ARM GAS /tmp/ccBN2W7T.s page 59 850 012c 22F40072 bic r2, r2, #512 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 894 .LBE158: 105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** 895 .loc 1 105 15 view .LVU231 - ARM GAS /tmp/ccZKwQMo.s page 60 + ARM GAS /tmp/ccBN2W7T.s page 60 896 014a 0020 movs r0, #0 @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 940 .cfi_offset 4, -20 941 .cfi_offset 5, -16 942 .cfi_offset 6, -12 - ARM GAS /tmp/ccZKwQMo.s page 61 + ARM GAS /tmp/ccBN2W7T.s page 61 943 .cfi_offset 7, -8 @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 979 .loc 1 215 9 is_stmt 0 view .LVU250 980 0010 19E0 b .L38 981 .LVL81: - ARM GAS /tmp/ccZKwQMo.s page 62 + ARM GAS /tmp/ccBN2W7T.s page 62 982 .L46: @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 1012 .LBE165: 1013 .LBE164: 235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** } - ARM GAS /tmp/ccZKwQMo.s page 63 + ARM GAS /tmp/ccBN2W7T.s page 63 236:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 1040 .loc 1 218 56 is_stmt 0 view .LVU268 1041 004e 0122 movs r2, #1 1042 0050 AA40 lsls r2, r2, r5 - ARM GAS /tmp/ccZKwQMo.s page 64 + ARM GAS /tmp/ccBN2W7T.s page 64 1043 .LVL89: @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 1081 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1082 006e 94FAA4F3 rbit r3, r4 1083 @ 0 "" 2 - ARM GAS /tmp/ccZKwQMo.s page 65 + ARM GAS /tmp/ccBN2W7T.s page 65 1084 .LVL93: @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccZKwQMo.s page 1 1124 .cfi_startproc 1125 @ args = 0, pretend = 0, frame = 0 1126 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccZKwQMo.s page 66 + ARM GAS /tmp/ccBN2W7T.s page 66 1127 @ link register save eliminated. @@ -3940,27 +3940,27 @@ ARM GAS /tmp/ccZKwQMo.s page 1 1156 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 1157 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 1158 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - ARM GAS /tmp/ccZKwQMo.s page 67 + ARM GAS /tmp/ccBN2W7T.s page 67 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_ll_gpio.c - /tmp/ccZKwQMo.s:20 .text.LL_GPIO_SetPinSpeed:00000000 $t - /tmp/ccZKwQMo.s:25 .text.LL_GPIO_SetPinSpeed:00000000 LL_GPIO_SetPinSpeed - /tmp/ccZKwQMo.s:97 .text.LL_GPIO_SetPinPull:00000000 $t - /tmp/ccZKwQMo.s:102 .text.LL_GPIO_SetPinPull:00000000 LL_GPIO_SetPinPull - /tmp/ccZKwQMo.s:172 .text.LL_GPIO_SetAFPin_0_7:00000000 $t - /tmp/ccZKwQMo.s:177 .text.LL_GPIO_SetAFPin_0_7:00000000 LL_GPIO_SetAFPin_0_7 - /tmp/ccZKwQMo.s:247 .text.LL_GPIO_SetAFPin_8_15:00000000 $t - /tmp/ccZKwQMo.s:252 .text.LL_GPIO_SetAFPin_8_15:00000000 LL_GPIO_SetAFPin_8_15 - /tmp/ccZKwQMo.s:323 .text.LL_GPIO_SetPinMode:00000000 $t - /tmp/ccZKwQMo.s:328 .text.LL_GPIO_SetPinMode:00000000 LL_GPIO_SetPinMode - /tmp/ccZKwQMo.s:398 .text.LL_GPIO_DeInit:00000000 $t - /tmp/ccZKwQMo.s:404 .text.LL_GPIO_DeInit:00000000 LL_GPIO_DeInit - /tmp/ccZKwQMo.s:905 .text.LL_GPIO_DeInit:00000150 $d - /tmp/ccZKwQMo.s:922 .text.LL_GPIO_Init:00000000 $t - /tmp/ccZKwQMo.s:928 .text.LL_GPIO_Init:00000000 LL_GPIO_Init - /tmp/ccZKwQMo.s:1114 .text.LL_GPIO_StructInit:00000000 $t - /tmp/ccZKwQMo.s:1120 .text.LL_GPIO_StructInit:00000000 LL_GPIO_StructInit + /tmp/ccBN2W7T.s:20 .text.LL_GPIO_SetPinSpeed:00000000 $t + /tmp/ccBN2W7T.s:25 .text.LL_GPIO_SetPinSpeed:00000000 LL_GPIO_SetPinSpeed + /tmp/ccBN2W7T.s:97 .text.LL_GPIO_SetPinPull:00000000 $t + /tmp/ccBN2W7T.s:102 .text.LL_GPIO_SetPinPull:00000000 LL_GPIO_SetPinPull + /tmp/ccBN2W7T.s:172 .text.LL_GPIO_SetAFPin_0_7:00000000 $t + /tmp/ccBN2W7T.s:177 .text.LL_GPIO_SetAFPin_0_7:00000000 LL_GPIO_SetAFPin_0_7 + /tmp/ccBN2W7T.s:247 .text.LL_GPIO_SetAFPin_8_15:00000000 $t + /tmp/ccBN2W7T.s:252 .text.LL_GPIO_SetAFPin_8_15:00000000 LL_GPIO_SetAFPin_8_15 + /tmp/ccBN2W7T.s:323 .text.LL_GPIO_SetPinMode:00000000 $t + /tmp/ccBN2W7T.s:328 .text.LL_GPIO_SetPinMode:00000000 LL_GPIO_SetPinMode + /tmp/ccBN2W7T.s:398 .text.LL_GPIO_DeInit:00000000 $t + /tmp/ccBN2W7T.s:404 .text.LL_GPIO_DeInit:00000000 LL_GPIO_DeInit + /tmp/ccBN2W7T.s:905 .text.LL_GPIO_DeInit:00000150 $d + /tmp/ccBN2W7T.s:922 .text.LL_GPIO_Init:00000000 $t + /tmp/ccBN2W7T.s:928 .text.LL_GPIO_Init:00000000 LL_GPIO_Init + /tmp/ccBN2W7T.s:1114 .text.LL_GPIO_StructInit:00000000 $t + /tmp/ccBN2W7T.s:1120 .text.LL_GPIO_StructInit:00000000 LL_GPIO_StructInit NO UNDEFINED SYMBOLS diff --git a/build/stm32f7xx_ll_gpio.o b/build/stm32f7xx_ll_gpio.o index 6482396b4e9fe08608ff348efae1875ebdaddaef..1f0616de8acd79c39522e1d985dcd2e2daa0531c 100644 GIT binary patch delta 713 zcmYjMOK1~O6n*#2FC+O%+9ndrgw#%GrDIFgF0@6+qE4cfF0__{RSY(?O&X(UXwi*< zp>EU*b|LCQ1gkF8EQ}z63oU}(xR462#Fa)+w2OkG_azNDaPNEPzH{cB`)CoIMYv*s z^EhTn)_aLDcZe~jamHLgm;XNQ(o!_$vNk6UPzUj%WE$&4<6L_{GwB31r7wJeRPqcp z;$Fqq(tTLQf^5KDye4mhJ6M&i-XdA4KY5@eXmP*pkW~HE#6f*tystHJNdLq!tPH>i zjw%+Y=qS;^ZXx;Gq$G7eR+T7U<@iC_+OtLIWhqdP5g*rY2&_mOeiQmzfz>8HskdW7 zwV)eE)gE|`3+ln431TqMBz0g?nYPp(N@YUaC9e|lhWMb~CNt(cl+7`|&)slh{+!?> zH=yhvLqppRPw;@Y3#Rar*4L62zg$jyRTyh03xld<3Rg4}Rw`@SF=!A@bqc~gayn1d z`l6E62P9tOxa97S)N_=0E4?t*OO+xn9NEO!<~06s$H_0|nd6@UZ+XIy#;Qk*K6XZ4GxR&j*yZ}xVspyeIM_c+ CmXjR- delta 792 zcmZ8dT}V@582;Yx{CQ+^$MR=_P0b^JL(`EZ40xYNEC)$ zWWAw8R2O+sQe^DLE+Z%+yohcpx+sV)DhVks`+2|3L3H4K-t&Cl^L)?Cn_htB1(M^ZU6^Di8PhR5JTX03G;!MJ~%C^Q1;g_Z2>=^E2`cuIbX)|w7|0%ed=TZG2 zdQ}tpa6oN@PdKX{>P(Y@+2;s>Ni(zz?Y=Zaj2Flalw9QGd-ZaeF-Isi&Um{mm&A;D zq4950*_c9?RtN8}TiXqY(^_+BN<8`8`&D7Ah9X>4rHHGV2R1SrS{QPIk)1+tmvYZg zm3_{{^frl?NO;fIQu#n+O!6|iVXTQNNLuJGWNb?cf7#rWS8YGXTRGmcS3n9^?BeLX zeV+c4MYk&lh5shx{0-z^)5xE;W&QOIH%wu#W41_4%KKoCn523Qzc_Z0-(|RAKI1pO zmG_&Y@iEIBwxSWUyDN0m?2SZY@z7{I6(5fcg^!#*k+c%Sks&Lbh(sd^^MEyOB_gSK zA{^S+@t>GZ!pZn>Y9f-b(DXKBE_ROaZABw!@RB;*9;{Wa)id@mdpH<0oHhFyyOdp` KSR}0=*Vtdf#<5-i diff --git a/build/stm32f7xx_ll_rcc.lst b/build/stm32f7xx_ll_rcc.lst index b0ef13f..f479f61 100644 --- a/build/stm32f7xx_ll_rcc.lst +++ b/build/stm32f7xx_ll_rcc.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cc42qbQx.s page 1 +ARM GAS /tmp/cct9WEL1.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** */ 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** #if defined(RCC) - ARM GAS /tmp/cc42qbQx.s page 2 + ARM GAS /tmp/cct9WEL1.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** #define IS_LL_RCC_I2S_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_I2S1_CLKSOURCE)) 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** - ARM GAS /tmp/cc42qbQx.s page 3 + ARM GAS /tmp/cct9WEL1.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** #if defined(CEC) @@ -178,7 +178,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /** @addtogroup RCC_LL_EF_Init 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @{ 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** */ - ARM GAS /tmp/cc42qbQx.s page 4 + ARM GAS /tmp/cct9WEL1.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** @@ -238,7 +238,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 20:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define __STM32F7xx_LL_RCC_H 21:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #ifdef __cplusplus - ARM GAS /tmp/cc42qbQx.s page 5 + ARM GAS /tmp/cct9WEL1.s page 5 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** extern "C" { @@ -298,7 +298,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 77:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** uint32_t SYSCLK_Frequency; /*!< SYSCLK clock frequency */ 78:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** uint32_t HCLK_Frequency; /*!< HCLK clock frequency */ 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** uint32_t PCLK1_Frequency; /*!< PCLK1 clock frequency */ - ARM GAS /tmp/cc42qbQx.s page 6 + ARM GAS /tmp/cct9WEL1.s page 6 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** uint32_t PCLK2_Frequency; /*!< PCLK2 clock frequency */ @@ -358,7 +358,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines 135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Flags defines which can be used with LL_RCC_WriteReg function 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ - ARM GAS /tmp/cc42qbQx.s page 7 + ARM GAS /tmp/cct9WEL1.s page 7 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -418,7 +418,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_LOW 0x00000000U /*!< Xtal mode lower driving cap 192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_MEDIUMHIGH RCC_BDCR_LSEDRV_0 /*!< Xtal mode medium high drivi 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_MEDIUMLOW RCC_BDCR_LSEDRV_1 /*!< Xtal mode medium low drivin - ARM GAS /tmp/cc42qbQx.s page 8 + ARM GAS /tmp/cct9WEL1.s page 8 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_HIGH RCC_BDCR_LSEDRV /*!< Xtal mode higher driving ca @@ -478,7 +478,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_1 RCC_CFGR_PPRE2_DIV1 /*!< HCLK not divided */ 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_2 RCC_CFGR_PPRE2_DIV2 /*!< HCLK divided by 2 */ - ARM GAS /tmp/cc42qbQx.s page 9 + ARM GAS /tmp/cct9WEL1.s page 9 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */ @@ -538,7 +538,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_HSE_DIV_13 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_0) 306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_HSE_DIV_14 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1) 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_HSE_DIV_15 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1| - ARM GAS /tmp/cc42qbQx.s page 10 + ARM GAS /tmp/cct9WEL1.s page 10 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_HSE_DIV_16 RCC_CFGR_RTCPRE_4 /*!< HSE clock divided by 16 */ @@ -598,7 +598,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_UARTx_CLKSOURCE Peripheral UART clock source selection 363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ 364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ - ARM GAS /tmp/cc42qbQx.s page 11 + ARM GAS /tmp/cct9WEL1.s page 11 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_UART4_CLKSOURCE_PCLK1 (uint32_t)((RCC_DCKCFGR2_UART4SEL << 16U) | 0x00000000U) @@ -658,7 +658,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SAI1_CLKSOURCE_PLLSAI (uint32_t)(RCC_DCKCFGR1_SAI1SEL | 0x00000000U) 421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SAI1_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR1_SAI1SEL | (RCC_DCKCFGR1_SAI1SEL_ - ARM GAS /tmp/cc42qbQx.s page 12 + ARM GAS /tmp/cct9WEL1.s page 12 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SAI1_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR1_SAI1SEL | (RCC_DCKCFGR1_SAI1SEL_ @@ -718,7 +718,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* DSI */ 477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(CEC) - ARM GAS /tmp/cc42qbQx.s page 13 + ARM GAS /tmp/cct9WEL1.s page 13 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_CEC_CLKSOURCE Peripheral CEC clock source selection @@ -778,7 +778,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_USART6_CLKSOURCE RCC_DCKCFGR2_USART6SEL /*!< USART6 Clock source selectio 534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @} - ARM GAS /tmp/cc42qbQx.s page 14 + ARM GAS /tmp/cct9WEL1.s page 14 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -838,7 +838,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_CK48M Peripheral CK48M get clock source 591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ 592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ - ARM GAS /tmp/cc42qbQx.s page 15 + ARM GAS /tmp/cct9WEL1.s page 15 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_CK48M_CLKSOURCE RCC_DCKCFGR2_CK48MSEL /*!< CK48M Domain clock source sel @@ -898,7 +898,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* DFSDM1_Channel0 */ 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(DSI) - ARM GAS /tmp/cc42qbQx.s page 16 + ARM GAS /tmp/cct9WEL1.s page 16 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_DSI Peripheral DSI get clock source @@ -958,7 +958,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @} 706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ - ARM GAS /tmp/cc42qbQx.s page 17 + ARM GAS /tmp/cct9WEL1.s page 17 707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_52 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_P 762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_53 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_P 763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_54 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_P - ARM GAS /tmp/cc42qbQx.s page 18 + ARM GAS /tmp/cct9WEL1.s page 18 764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_55 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_P @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_14 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_ 819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_15 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_ 820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** - ARM GAS /tmp/cc42qbQx.s page 19 + ARM GAS /tmp/cct9WEL1.s page 19 821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @} @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SDIVQ_DIV_19 (RCC_DCKCFGR1_PLLI2SDIVQ_4 | RCC_DCKCFGR1_PLLI2SDIVQ_1) 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SDIVQ_DIV_20 (RCC_DCKCFGR1_PLLI2SDIVQ_4 | RCC_DCKCFGR1_PLLI2SDIVQ_1 | 877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SDIVQ_DIV_21 (RCC_DCKCFGR1_PLLI2SDIVQ_4 | RCC_DCKCFGR1_PLLI2SDIVQ_2) - ARM GAS /tmp/cc42qbQx.s page 20 + ARM GAS /tmp/cct9WEL1.s page 20 878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SDIVQ_DIV_22 (RCC_DCKCFGR1_PLLI2SDIVQ_4 | RCC_DCKCFGR1_PLLI2SDIVQ_2 | @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIQ_DIV_12 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2) 933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIQ_DIV_13 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RC 934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIQ_DIV_14 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RC - ARM GAS /tmp/cc42qbQx.s page 21 + ARM GAS /tmp/cct9WEL1.s page 21 935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIQ_DIV_15 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RC @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @} 991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ - ARM GAS /tmp/cc42qbQx.s page 22 + ARM GAS /tmp/cct9WEL1.s page 22 992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* RCC_PLLSAICFGR_PLLSAIR */ @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @} 1047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 1048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/cc42qbQx.s page 23 + ARM GAS /tmp/cct9WEL1.s page 23 1049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_46 1104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_47 1105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_48 - ARM GAS /tmp/cc42qbQx.s page 24 + ARM GAS /tmp/cct9WEL1.s page 24 1106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_49 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_24 1161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_25 1162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_26 - ARM GAS /tmp/cc42qbQx.s page 25 + ARM GAS /tmp/cct9WEL1.s page 25 1163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 1218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLQ__) ((__INPUTFREQ__) 1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** ((__PLLQ__) >> RCC_PLLCFGR_PLLQ_Pos )) - ARM GAS /tmp/cc42qbQx.s page 26 + ARM GAS /tmp/cct9WEL1.s page 26 1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_48 1275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_49 1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_50 - ARM GAS /tmp/cc42qbQx.s page 27 + ARM GAS /tmp/cct9WEL1.s page 27 1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_51 @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_23 1332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_24 1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_25 - ARM GAS /tmp/cc42qbQx.s page 28 + ARM GAS /tmp/cct9WEL1.s page 28 1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_26 @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param __PLLSAIDIVQ__ This parameter can be one of the following values: 1389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_1 1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_2 - ARM GAS /tmp/cc42qbQx.s page 29 + ARM GAS /tmp/cct9WEL1.s page 29 1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_3 @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_15 1446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_16 1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_17 - ARM GAS /tmp/cc42qbQx.s page 30 + ARM GAS /tmp/cct9WEL1.s page 30 1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_18 @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLSAI_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLSAIN__, __PLLSAIP__) (((__INPUT 1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** ((((__PLLSAIP__) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U ) * 2U)) 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/cc42qbQx.s page 31 + ARM GAS /tmp/cct9WEL1.s page 31 1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(LTDC) @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_49 1560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_50 1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_51 - ARM GAS /tmp/cc42qbQx.s page 32 + ARM GAS /tmp/cct9WEL1.s page 32 1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_52 @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_19 1617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_20 1618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_21 - ARM GAS /tmp/cc42qbQx.s page 33 + ARM GAS /tmp/cct9WEL1.s page 33 1619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_22 @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_12 1674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_13 1675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_14 - ARM GAS /tmp/cc42qbQx.s page 34 + ARM GAS /tmp/cct9WEL1.s page 34 1676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_15 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_10 1731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_11 1732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_12 - ARM GAS /tmp/cc42qbQx.s page 35 + ARM GAS /tmp/cct9WEL1.s page 35 1733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_13 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SP_DIV_4 1788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SP_DIV_6 1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SP_DIV_8 - ARM GAS /tmp/cc42qbQx.s page 36 + ARM GAS /tmp/cct9WEL1.s page 36 1790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval PLLI2S clock frequency (in Hz) @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_44 1845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_45 1846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_46 - ARM GAS /tmp/cc42qbQx.s page 37 + ARM GAS /tmp/cct9WEL1.s page 37 1847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_47 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_APB1_DIV_8 1902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_APB1_DIV_16 1903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval PCLK1 clock frequency (in Hz) - ARM GAS /tmp/cc42qbQx.s page 38 + ARM GAS /tmp/cct9WEL1.s page 38 1904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Disable HSE external oscillator (HSE Bypass) 1959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll CR HSEBYP LL_RCC_HSE_DisableBypass 1960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval None - ARM GAS /tmp/cc42qbQx.s page 39 + ARM GAS /tmp/cct9WEL1.s page 39 1961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 43 .loc 2 2012 3 view .LVU4 44 0002 224A ldr r2, .L7 45 0004 1368 ldr r3, [r2] - ARM GAS /tmp/cc42qbQx.s page 40 + ARM GAS /tmp/cct9WEL1.s page 40 46 0006 43F00103 orr r3, r3, #1 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 176:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* Read CR register */ 177:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** vl_mask = LL_RCC_ReadReg(CR); - ARM GAS /tmp/cc42qbQx.s page 41 + ARM GAS /tmp/cct9WEL1.s page 41 71 .loc 1 177 3 view .LVU13 @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 90 .loc 2 2058 3 view .LVU20 91 002c 1A68 ldr r2, [r3] 92 002e 22F0F802 bic r2, r2, #248 - ARM GAS /tmp/cc42qbQx.s page 42 + ARM GAS /tmp/cct9WEL1.s page 42 93 0032 42F08002 orr r2, r2, #128 @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); 2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/cc42qbQx.s page 43 + ARM GAS /tmp/cct9WEL1.s page 43 2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void) 2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { - ARM GAS /tmp/cc42qbQx.s page 44 + ARM GAS /tmp/cct9WEL1.s page 44 2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** return (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == (RCC_BDCR_LSERDY)); @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE 2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL 2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval None - ARM GAS /tmp/cc42qbQx.s page 45 + ARM GAS /tmp/cct9WEL1.s page 45 2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Set APB2 prescaler - ARM GAS /tmp/cc42qbQx.s page 46 + ARM GAS /tmp/cct9WEL1.s page 46 2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll CFGR PPRE2 LL_RCC_SetAPB2Prescaler @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_APB2_DIV_4 2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_APB2_DIV_8 2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_APB2_DIV_16 - ARM GAS /tmp/cc42qbQx.s page 47 + ARM GAS /tmp/cct9WEL1.s page 47 2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure USARTx clock source - ARM GAS /tmp/cc42qbQx.s page 48 + ARM GAS /tmp/cct9WEL1.s page 48 2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR2 USART1SEL LL_RCC_SetUSARTClockSource\n @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { 2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** MODIFY_REG(RCC->DCKCFGR2, (UARTxSource >> 16U), (UARTxSource & 0x0000FFFFU)); 2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } - ARM GAS /tmp/cc42qbQx.s page 49 + ARM GAS /tmp/cct9WEL1.s page 49 2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLI2S 2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SAI2_CLKSOURCE_PIN 2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLSRC (*) - ARM GAS /tmp/cc42qbQx.s page 50 + ARM GAS /tmp/cct9WEL1.s page 50 2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure USB clock source 2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR2 CK48MSEL LL_RCC_SetUSBClockSource 2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param USBxSource This parameter can be one of the following values: - ARM GAS /tmp/cc42qbQx.s page 51 + ARM GAS /tmp/cct9WEL1.s page 51 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_USB_CLKSOURCE_PLL @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure DFSDM Audio clock source 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR1 ADFSDM1SEL LL_RCC_SetDFSDMAudioClockSource 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param Source This parameter can be one of the following values: - ARM GAS /tmp/cc42qbQx.s page 52 + ARM GAS /tmp/cct9WEL1.s page 52 2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE_SAI1 @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** return (uint32_t)(READ_BIT(RCC->DCKCFGR2, USARTx) | (USARTx << 16U)); 2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/cc42qbQx.s page 53 + ARM GAS /tmp/cct9WEL1.s page 53 2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI 2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C4_CLKSOURCE_PCLK1 (*) 2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C4_CLKSOURCE_SYSCLK (*) - ARM GAS /tmp/cc42qbQx.s page 54 + ARM GAS /tmp/cct9WEL1.s page 54 2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C4_CLKSOURCE_HSI (*) @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SDMMC1_CLKSOURCE 2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SDMMC1_CLKSOURCE (*) 2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/cc42qbQx.s page 55 + ARM GAS /tmp/cct9WEL1.s page 55 2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SDMMC1_CLKSOURCE_PLL48CLK @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(CEC) 2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Get CEC Clock Source - ARM GAS /tmp/cc42qbQx.s page 56 + ARM GAS /tmp/cct9WEL1.s page 56 2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR2 CECSEL LL_RCC_GetCECClockSource @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* DFSDM1_Channel0 */ 2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/cc42qbQx.s page 57 + ARM GAS /tmp/cct9WEL1.s page 57 2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(DSI) @@ -3418,7 +3418,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** - ARM GAS /tmp/cc42qbQx.s page 58 + ARM GAS /tmp/cct9WEL1.s page 58 2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Enable RTC @@ -3478,7 +3478,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_2 3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_3 3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_4 - ARM GAS /tmp/cc42qbQx.s page 59 + ARM GAS /tmp/cct9WEL1.s page 59 3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_5 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_17 3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_18 3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_19 - ARM GAS /tmp/cc42qbQx.s page 60 + ARM GAS /tmp/cct9WEL1.s page 60 3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_20 @@ -3598,7 +3598,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 3123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_PLL PLL 3124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ - ARM GAS /tmp/cc42qbQx.s page 61 + ARM GAS /tmp/cct9WEL1.s page 61 3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -3658,7 +3658,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 3158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 3159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure PLL used for SYSCLK Domain - ARM GAS /tmp/cc42qbQx.s page 62 + ARM GAS /tmp/cct9WEL1.s page 62 3160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @note PLL Source and PLLM Divider can be written only when PLL, @@ -3718,7 +3718,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_45 3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_46 3216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_47 - ARM GAS /tmp/cc42qbQx.s page 63 + ARM GAS /tmp/cct9WEL1.s page 63 3217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_48 @@ -3778,7 +3778,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_12 3272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_13 3273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_14 - ARM GAS /tmp/cc42qbQx.s page 64 + ARM GAS /tmp/cct9WEL1.s page 64 3274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_15 @@ -3838,7 +3838,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_5 3329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_6 3330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_7 - ARM GAS /tmp/cc42qbQx.s page 65 + ARM GAS /tmp/cct9WEL1.s page 65 3331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_8 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_25 3386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_26 3387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27 - ARM GAS /tmp/cc42qbQx.s page 66 + ARM GAS /tmp/cct9WEL1.s page 66 3388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_28 @@ -3958,7 +3958,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure PLL clock source 3443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_SetMainSource 3444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLSource This parameter can be one of the following values: - ARM GAS /tmp/cc42qbQx.s page 67 + ARM GAS /tmp/cct9WEL1.s page 67 3445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSOURCE_HSI @@ -4018,7 +4018,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_6 3500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_7 3501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_8 - ARM GAS /tmp/cc42qbQx.s page 68 + ARM GAS /tmp/cct9WEL1.s page 68 3502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_9 @@ -4078,7 +4078,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_20 3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_21 3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_22 - ARM GAS /tmp/cc42qbQx.s page 69 + ARM GAS /tmp/cct9WEL1.s page 69 3559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_23 @@ -4138,7 +4138,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param Inc Between Min_Data=0 and Max_Data=32767 3614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param Sel This parameter can be one of the following values: 3615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SPREAD_SELECT_CENTER - ARM GAS /tmp/cc42qbQx.s page 70 + ARM GAS /tmp/cct9WEL1.s page 70 3616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SPREAD_SELECT_DOWN @@ -4198,7 +4198,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll SSCGR SSCGEN LL_RCC_PLL_SpreadSpectrum_Disable 3671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval None 3672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ - ARM GAS /tmp/cc42qbQx.s page 71 + ARM GAS /tmp/cct9WEL1.s page 71 3673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL_SpreadSpectrum_Disable(void) @@ -4258,7 +4258,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* Wait for PLLSAI READY bit to be reset */ 197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** while(LL_RCC_PLLSAI_IsReady() != 0U) - ARM GAS /tmp/cc42qbQx.s page 72 + ARM GAS /tmp/cct9WEL1.s page 72 198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {} @@ -4318,7 +4318,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_33 3763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_34 3764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_35 - ARM GAS /tmp/cc42qbQx.s page 73 + ARM GAS /tmp/cct9WEL1.s page 73 3765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_36 @@ -4378,7 +4378,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_10 3820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_11 3821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_12 - ARM GAS /tmp/cc42qbQx.s page 74 + ARM GAS /tmp/cct9WEL1.s page 74 3822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_13 @@ -4438,7 +4438,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_12 3877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_13 3878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_14 - ARM GAS /tmp/cc42qbQx.s page 75 + ARM GAS /tmp/cct9WEL1.s page 75 3879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_15 @@ -4498,7 +4498,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SP_DIV_8 3934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval None 3935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ - ARM GAS /tmp/cc42qbQx.s page 76 + ARM GAS /tmp/cct9WEL1.s page 76 3936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SPDIFRX(uint32_t Source, uint32_t PLLM, uint32_t PL @@ -4558,7 +4558,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_35 3991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_36 3992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_37 - ARM GAS /tmp/cc42qbQx.s page 77 + ARM GAS /tmp/cct9WEL1.s page 77 3993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_38 @@ -4618,7 +4618,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll PLLI2SCFGR PLLI2SQ LL_RCC_PLLI2S_GetQ 4048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval Returned value can be one of the following values: 4049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_2 - ARM GAS /tmp/cc42qbQx.s page 78 + ARM GAS /tmp/cct9WEL1.s page 78 4050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_3 @@ -4678,7 +4678,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Get I2SPLL division factor for PLLI2SDIVQ 4105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @note used PLLSAI1CLK, PLLSAI2CLK selected (SAI1 and SAI2 clock) 4106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR1 PLLI2SDIVQ LL_RCC_PLLI2S_GetDIVQ - ARM GAS /tmp/cc42qbQx.s page 79 + ARM GAS /tmp/cct9WEL1.s page 79 4107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval Returned value can be one of the following values: @@ -4738,7 +4738,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** SET_BIT(RCC->CR, RCC_CR_PLLSAION); 4162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 4163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/cc42qbQx.s page 80 + ARM GAS /tmp/cct9WEL1.s page 80 4164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @@ -4798,7 +4798,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 160 006c DA60 str r2, [r3, #12] 211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* Clear all interrupt flags */ - ARM GAS /tmp/cc42qbQx.s page 81 + ARM GAS /tmp/cct9WEL1.s page 81 213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CIR @@ -4858,7 +4858,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * and different peripheral clocks available on the device. 231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(**) 232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(***) - ARM GAS /tmp/cc42qbQx.s page 82 + ARM GAS /tmp/cct9WEL1.s page 82 233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(***) @@ -4918,7 +4918,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** assert_param(IS_LL_RCC_USART_CLKSOURCE(USARTxSource)); 288:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 289:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** if (USARTxSource == LL_RCC_USART1_CLKSOURCE) - ARM GAS /tmp/cc42qbQx.s page 83 + ARM GAS /tmp/cct9WEL1.s page 83 290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { @@ -4978,7 +4978,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; 345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } 346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } - ARM GAS /tmp/cc42qbQx.s page 84 + ARM GAS /tmp/cct9WEL1.s page 84 347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** else if (USARTxSource == LL_RCC_USART6_CLKSOURCE) @@ -5038,7 +5038,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 401:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_USART3_CLKSOURCE_PCLK1: /* USART3 Clock is PCLK1 */ 402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** default: 403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); - ARM GAS /tmp/cc42qbQx.s page 85 + ARM GAS /tmp/cct9WEL1.s page 85 404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; @@ -5098,7 +5098,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 458:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { 459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* UART5CLK clock frequency */ 460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** switch (LL_RCC_GetUARTClockSource(UARTxSource)) - ARM GAS /tmp/cc42qbQx.s page 86 + ARM GAS /tmp/cct9WEL1.s page 86 461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { @@ -5158,7 +5158,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** else 516:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { 517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** if (UARTxSource == LL_RCC_UART8_CLKSOURCE) - ARM GAS /tmp/cc42qbQx.s page 87 + ARM GAS /tmp/cct9WEL1.s page 87 518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { @@ -5218,7 +5218,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 572:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** switch (LL_RCC_GetI2CClockSource(I2CxSource)) 573:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { 574:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_I2C1_CLKSOURCE_SYSCLK: /* I2C1 Clock is System Clock */ - ARM GAS /tmp/cc42qbQx.s page 88 + ARM GAS /tmp/cct9WEL1.s page 88 575:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** i2c_frequency = RCC_GetSystemClockFreq(); @@ -5278,7 +5278,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 629:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_I2C3_CLKSOURCE_PCLK1: /* I2C3 Clock is PCLK1 */ 630:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** default: 631:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq())); - ARM GAS /tmp/cc42qbQx.s page 89 + ARM GAS /tmp/cct9WEL1.s page 89 632:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; @@ -5338,7 +5338,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 686:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { 687:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* I2S1 CLK clock frequency */ 688:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** switch (LL_RCC_GetI2SClockSource(I2SxSource)) - ARM GAS /tmp/cc42qbQx.s page 90 + ARM GAS /tmp/cct9WEL1.s page 90 689:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { @@ -5398,7 +5398,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** lptim_frequency = LSE_VALUE; 744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } 745:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; - ARM GAS /tmp/cc42qbQx.s page 91 + ARM GAS /tmp/cct9WEL1.s page 91 746:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** @@ -5458,7 +5458,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 800:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; 801:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_PLLSOURCE_HSI: /* HSI clock used as SAI1 clock source */ - ARM GAS /tmp/cc42qbQx.s page 92 + ARM GAS /tmp/cct9WEL1.s page 92 803:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** default: @@ -5518,7 +5518,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } 858:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; 859:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } - ARM GAS /tmp/cc42qbQx.s page 93 + ARM GAS /tmp/cct9WEL1.s page 93 860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; @@ -5578,7 +5578,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 914:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } 915:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; 916:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** - ARM GAS /tmp/cc42qbQx.s page 94 + ARM GAS /tmp/cct9WEL1.s page 94 917:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_SDMMC1_CLKSOURCE_SYSCLK: /* PLL clock used as SDMMC1 clock source */ @@ -5638,7 +5638,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* Check parameter */ 972:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** assert_param(IS_LL_RCC_RNG_CLKSOURCE(RNGxSource)); 973:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** - ARM GAS /tmp/cc42qbQx.s page 95 + ARM GAS /tmp/cct9WEL1.s page 95 974:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* RNGCLK clock frequency */ @@ -5698,7 +5698,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 213 .loc 2 2849 21 is_stmt 0 view .LVU56 214 0000 0A4B ldr r3, .L15 - ARM GAS /tmp/cc42qbQx.s page 96 + ARM GAS /tmp/cct9WEL1.s page 96 215 0002 D3F89030 ldr r3, [r3, #144] @@ -5758,7 +5758,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { 245 .loc 1 1023 7 is_stmt 1 view .LVU66 246 .LBB250: - ARM GAS /tmp/cc42qbQx.s page 97 + ARM GAS /tmp/cct9WEL1.s page 97 247 .LBI250: @@ -5818,7 +5818,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1037:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @arg @ref LL_RCC_USB_CLKSOURCE 1038:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @retval USB clock frequency (in Hz) 1039:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** */ - ARM GAS /tmp/cc42qbQx.s page 98 + ARM GAS /tmp/cct9WEL1.s page 98 1040:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource) @@ -5878,7 +5878,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1094:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } 1095:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 1096:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** return dfsdm_frequency; - ARM GAS /tmp/cc42qbQx.s page 99 + ARM GAS /tmp/cct9WEL1.s page 99 1097:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } @@ -5938,7 +5938,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { 1152:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** dsi_frequency = RCC_PLL_GetFreqDomain_DSI(); 1153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } - ARM GAS /tmp/cc42qbQx.s page 100 + ARM GAS /tmp/cct9WEL1.s page 100 1154:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; @@ -5998,7 +5998,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1208:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } 1209:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 1210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** return spdifrx_frequency; - ARM GAS /tmp/cc42qbQx.s page 101 + ARM GAS /tmp/cct9WEL1.s page 101 1211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } @@ -6058,7 +6058,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 290 .cfi_startproc 291 @ args = 0, pretend = 0, frame = 0 292 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/cc42qbQx.s page 102 + ARM GAS /tmp/cct9WEL1.s page 102 293 @ link register save eliminated. @@ -6118,7 +6118,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 335 @ frame_needed = 0, uses_anonymous_args = 0 336 @ link register save eliminated. 1275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* PCLK1 clock frequency */ - ARM GAS /tmp/cc42qbQx.s page 103 + ARM GAS /tmp/cct9WEL1.s page 103 1276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler()); @@ -6178,7 +6178,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* PCLK2 clock frequency */ 1287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler()); 380 .loc 1 1287 3 view .LVU93 - ARM GAS /tmp/cc42qbQx.s page 104 + ARM GAS /tmp/cct9WEL1.s page 104 381 .LBB256: @@ -6238,7 +6238,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1298:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN 1299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** SYSCLK = PLL_VCO / PLLP 1300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** */ - ARM GAS /tmp/cc42qbQx.s page 105 + ARM GAS /tmp/cct9WEL1.s page 105 1301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** pllsource = LL_RCC_PLL_GetMainSource(); @@ -6298,7 +6298,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 453 .LVL19: 3603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 454 .loc 2 3603 21 view .LVU114 - ARM GAS /tmp/cc42qbQx.s page 106 + ARM GAS /tmp/cct9WEL1.s page 106 455 000e 5A68 ldr r2, [r3, #4] @@ -6358,7 +6358,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 498 0036 00BF .align 2 499 .L29: 500 0038 00380240 .word 1073887232 - ARM GAS /tmp/cc42qbQx.s page 107 + ARM GAS /tmp/cct9WEL1.s page 107 501 003c 0024F400 .word 16000000 @@ -6418,7 +6418,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 547 .LVL23: 1247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 548 .loc 1 1247 7 is_stmt 1 view .LVU138 - ARM GAS /tmp/cc42qbQx.s page 108 + ARM GAS /tmp/cct9WEL1.s page 108 549 .L31: @@ -6478,7 +6478,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 596 0004 FFF7FEFF bl RCC_GetSystemClockFreq 597 .LVL27: 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** - ARM GAS /tmp/cc42qbQx.s page 109 + ARM GAS /tmp/cct9WEL1.s page 109 598 .loc 1 260 32 discriminator 1 view .LVU148 @@ -6538,7 +6538,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 641 .LCFI4: 642 .cfi_def_cfa_offset 8 643 .cfi_offset 3, -8 - ARM GAS /tmp/cc42qbQx.s page 110 + ARM GAS /tmp/cct9WEL1.s page 110 644 .cfi_offset 14, -4 @@ -6598,7 +6598,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 682 .loc 2 2666 10 view .LVU178 683 0020 43EA0043 orr r3, r3, r0, lsl #16 - ARM GAS /tmp/cc42qbQx.s page 111 + ARM GAS /tmp/cct9WEL1.s page 111 684 .LVL35: @@ -6658,7 +6658,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { 726 .loc 1 306 9 is_stmt 1 view .LVU191 727 .LBB272: - ARM GAS /tmp/cc42qbQx.s page 112 + ARM GAS /tmp/cct9WEL1.s page 112 728 .LBI272: @@ -6718,7 +6718,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 767 .loc 2 2666 21 is_stmt 0 view .LVU206 768 0068 3D4B ldr r3, .L71 769 006a D3F89030 ldr r3, [r3, #144] - ARM GAS /tmp/cc42qbQx.s page 113 + ARM GAS /tmp/cct9WEL1.s page 113 770 006e 0340 ands r3, r3, r0 @@ -6778,7 +6778,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 811 0096 3448 ldr r0, .L71+8 812 0098 BDE7 b .L40 813 .LVL50: - ARM GAS /tmp/cc42qbQx.s page 114 + ARM GAS /tmp/cct9WEL1.s page 114 814 .L48: @@ -6838,7 +6838,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 854 .LBB281: 2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 855 .loc 2 2666 3 view .LVU234 - ARM GAS /tmp/cc42qbQx.s page 115 + ARM GAS /tmp/cct9WEL1.s page 115 2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } @@ -6898,7 +6898,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 897 00e2 10F00200 ands r0, r0, #2 898 00e6 96D0 beq .L40 359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } - ARM GAS /tmp/cc42qbQx.s page 116 + ARM GAS /tmp/cct9WEL1.s page 116 899 .loc 1 359 27 view .LVU248 @@ -6958,7 +6958,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 940 .LBB286: 941 .LBI286: 2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { - ARM GAS /tmp/cc42qbQx.s page 117 + ARM GAS /tmp/cct9WEL1.s page 117 942 .loc 2 2664 26 view .LVU262 @@ -7018,7 +7018,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 983 .LBE289: 984 .LBE288: 388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { - ARM GAS /tmp/cc42qbQx.s page 118 + ARM GAS /tmp/cct9WEL1.s page 118 985 .loc 1 388 14 discriminator 1 view .LVU276 @@ -7078,7 +7078,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1025 0158 FFF7FEFF bl RCC_GetPCLK1ClockFreq 1026 .LVL78: 404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } - ARM GAS /tmp/cc42qbQx.s page 119 + ARM GAS /tmp/cct9WEL1.s page 119 1027 .loc 1 404 11 is_stmt 1 view .LVU291 @@ -7138,7 +7138,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1073 .loc 1 486 11 is_stmt 0 view .LVU301 1074 000c B0F5405F cmp r0, #12288 1075 0010 55D0 beq .L102 - ARM GAS /tmp/cc42qbQx.s page 120 + ARM GAS /tmp/cct9WEL1.s page 120 517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { @@ -7198,7 +7198,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 1117 .loc 1 435 9 is_stmt 1 view .LVU315 1118 003e ECE7 b .L73 - ARM GAS /tmp/cc42qbQx.s page 121 + ARM GAS /tmp/cct9WEL1.s page 121 1119 .LVL85: @@ -7258,7 +7258,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1159 0058 4FF40040 mov r0, #32768 1160 005c DDE7 b .L73 1161 .LVL89: - ARM GAS /tmp/cc42qbQx.s page 122 + ARM GAS /tmp/cct9WEL1.s page 122 1162 .L77: @@ -7318,7 +7318,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 463:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; 1203 .loc 1 463 26 is_stmt 0 view .LVU343 1204 008c FFF7FEFF bl RCC_GetSystemClockFreq - ARM GAS /tmp/cc42qbQx.s page 123 + ARM GAS /tmp/cct9WEL1.s page 123 1205 .LVL95: @@ -7378,7 +7378,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1245 00a4 10F00200 ands r0, r0, #2 1246 00a8 B7D0 beq .L73 476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } - ARM GAS /tmp/cc42qbQx.s page 124 + ARM GAS /tmp/cct9WEL1.s page 124 1247 .loc 1 476 26 view .LVU358 @@ -7438,7 +7438,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1289 00da 9342 cmp r3, r2 1290 00dc 11D1 bne .L86 492:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; - ARM GAS /tmp/cc42qbQx.s page 125 + ARM GAS /tmp/cct9WEL1.s page 125 1291 .loc 1 492 9 is_stmt 1 view .LVU371 @@ -7498,7 +7498,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1331 .LBE309: 1332 .LBE308: 503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { - ARM GAS /tmp/cc42qbQx.s page 126 + ARM GAS /tmp/cct9WEL1.s page 126 1333 .loc 1 503 12 discriminator 1 view .LVU386 @@ -7558,7 +7558,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1374 0120 09D0 beq .L87 1375 0122 B3F1C02F cmp r3, #-1073692672 1376 0126 0ED0 beq .L88 - ARM GAS /tmp/cc42qbQx.s page 127 + ARM GAS /tmp/cct9WEL1.s page 127 1377 0128 A2F58042 sub r2, r2, #16384 @@ -7618,7 +7618,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1417 0148 186F ldr r0, [r3, #112] 1418 .LVL121: 2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } - ARM GAS /tmp/cc42qbQx.s page 128 + ARM GAS /tmp/cct9WEL1.s page 128 1419 .loc 2 2156 11 view .LVU414 @@ -7678,7 +7678,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1466 .LFB299: 563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** uint32_t i2c_frequency = LL_RCC_PERIPH_FREQUENCY_NO; 1467 .loc 1 563 1 view -0 - ARM GAS /tmp/cc42qbQx.s page 129 + ARM GAS /tmp/cct9WEL1.s page 129 1468 .cfi_startproc @@ -7738,7 +7738,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1507 .loc 2 2730 26 view .LVU439 1508 .LBB317: 2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } - ARM GAS /tmp/cc42qbQx.s page 130 + ARM GAS /tmp/cct9WEL1.s page 130 1509 .loc 2 2732 3 view .LVU440 @@ -7798,7 +7798,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1550 .LBB318: 1551 .LBI318: 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { - ARM GAS /tmp/cc42qbQx.s page 131 + ARM GAS /tmp/cct9WEL1.s page 131 1552 .loc 2 2030 26 view .LVU454 @@ -7858,7 +7858,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1593 0070 FFF7FEFF bl RCC_GetSystemClockFreq 1594 .LVL140: 609:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; - ARM GAS /tmp/cc42qbQx.s page 132 + ARM GAS /tmp/cct9WEL1.s page 132 1595 .loc 1 609 25 discriminator 1 view .LVU468 @@ -7918,7 +7918,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1636 .LBB325: 2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 1637 .loc 2 2732 3 view .LVU482 - ARM GAS /tmp/cc42qbQx.s page 133 + ARM GAS /tmp/cct9WEL1.s page 133 2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } @@ -7978,7 +7978,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1679 .LBI326: 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { 1680 .loc 2 2030 26 view .LVU496 - ARM GAS /tmp/cc42qbQx.s page 134 + ARM GAS /tmp/cct9WEL1.s page 134 1681 .LBB327: @@ -8038,7 +8038,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1722 .LVL156: 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; 1723 .loc 1 656 27 discriminator 1 view .LVU510 - ARM GAS /tmp/cc42qbQx.s page 135 + ARM GAS /tmp/cct9WEL1.s page 135 1724 00e8 FFF7FEFF bl RCC_GetHCLKClockFreq @@ -8098,7 +8098,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1765 010c 01000300 .word 196609 1766 0110 0024F400 .word 16000000 1767 0114 04000C00 .word 786436 - ARM GAS /tmp/cc42qbQx.s page 136 + ARM GAS /tmp/cct9WEL1.s page 136 1768 0118 10003000 .word 3145744 @@ -8158,7 +8158,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 1813 .loc 2 2748 21 is_stmt 0 view .LVU535 1814 000c 154B ldr r3, .L153 - ARM GAS /tmp/cc42qbQx.s page 137 + ARM GAS /tmp/cct9WEL1.s page 137 1815 000e D3F89030 ldr r3, [r3, #144] @@ -8218,7 +8218,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 1856 .loc 2 2032 11 is_stmt 0 view .LVU549 1857 0038 0A4B ldr r3, .L153 - ARM GAS /tmp/cc42qbQx.s page 138 + ARM GAS /tmp/cct9WEL1.s page 138 1858 003a 1868 ldr r0, [r3] @@ -8278,7 +8278,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1898 .LVL175: 749:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; 1899 .loc 1 749 27 discriminator 1 view .LVU564 - ARM GAS /tmp/cc42qbQx.s page 139 + ARM GAS /tmp/cct9WEL1.s page 139 1900 005a FFF7FEFF bl RCC_GetHCLKClockFreq @@ -8338,7 +8338,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 1946 .loc 2 2893 21 is_stmt 0 view .LVU575 1947 0002 084B ldr r3, .L160 - ARM GAS /tmp/cc42qbQx.s page 140 + ARM GAS /tmp/cct9WEL1.s page 140 1948 0004 D3F88C30 ldr r3, [r3, #140] @@ -8398,7 +8398,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1990 .global RCC_PLL_GetFreqDomain_48M 1991 .syntax unified 1992 .thumb - ARM GAS /tmp/cc42qbQx.s page 141 + ARM GAS /tmp/cct9WEL1.s page 141 1993 .thumb_func @@ -8458,7 +8458,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; 1339:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ - ARM GAS /tmp/cc42qbQx.s page 142 + ARM GAS /tmp/cct9WEL1.s page 142 1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** pllinputfreq = HSE_VALUE; @@ -8518,7 +8518,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2060 0022 5068 ldr r0, [r2, #4] 2061 .LBE349: 2062 .LBE348: - ARM GAS /tmp/cc42qbQx.s page 143 + ARM GAS /tmp/cct9WEL1.s page 143 2063 .loc 1 1348 10 discriminator 3 view .LVU613 @@ -8578,7 +8578,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** default: 1374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** pllinputfreq = HSI_VALUE; 1375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; - ARM GAS /tmp/cc42qbQx.s page 144 + ARM GAS /tmp/cct9WEL1.s page 144 1376:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } @@ -8638,7 +8638,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2119 .L168: 2120 .LVL194: 1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; - ARM GAS /tmp/cc42qbQx.s page 145 + ARM GAS /tmp/cct9WEL1.s page 145 1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** @@ -8698,7 +8698,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_6 4204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_7 4205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_8 - ARM GAS /tmp/cc42qbQx.s page 146 + ARM GAS /tmp/cct9WEL1.s page 146 4206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_9 @@ -8758,7 +8758,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_63 4261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLN Between 50 and 432 4262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLQ This parameter can be one of the following values: - ARM GAS /tmp/cc42qbQx.s page 147 + ARM GAS /tmp/cct9WEL1.s page 147 4263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIQ_DIV_2 @@ -8818,7 +8818,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 4318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 4319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** - ARM GAS /tmp/cc42qbQx.s page 148 + ARM GAS /tmp/cct9WEL1.s page 148 4320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure PLLSAI used for 48Mhz domain clock @@ -8878,7 +8878,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_43 4375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_44 4376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_45 - ARM GAS /tmp/cc42qbQx.s page 149 + ARM GAS /tmp/cct9WEL1.s page 149 4377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_46 @@ -8938,7 +8938,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_8 4432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_9 4433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_10 - ARM GAS /tmp/cc42qbQx.s page 150 + ARM GAS /tmp/cct9WEL1.s page 150 4434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_11 @@ -8998,7 +8998,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLR This parameter can be one of the following values: 4489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIR_DIV_2 4490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIR_DIV_3 - ARM GAS /tmp/cc42qbQx.s page 151 + ARM GAS /tmp/cct9WEL1.s page 151 4491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIR_DIV_4 @@ -9058,7 +9058,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIQ_DIV_10 4533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIQ_DIV_11 4534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIQ_DIV_12 - ARM GAS /tmp/cc42qbQx.s page 152 + ARM GAS /tmp/cct9WEL1.s page 152 4535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIQ_DIV_13 @@ -9118,7 +9118,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 4578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 4579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Get SAIPLL division factor for PLLSAIDIVQ 4580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @note used PLLSAI1CLK, PLLSAI2CLK selected (SAI1 and SAI2 clock) - ARM GAS /tmp/cc42qbQx.s page 153 + ARM GAS /tmp/cct9WEL1.s page 153 4581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR1 PLLSAIDIVQ LL_RCC_PLLSAI_GetDIVQ @@ -9178,7 +9178,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2178 .L169: 1402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; 2179 .loc 1 1402 20 view .LVU647 - ARM GAS /tmp/cc42qbQx.s page 154 + ARM GAS /tmp/cct9WEL1.s page 154 2180 003e 0348 ldr r0, .L170+8 @@ -9238,7 +9238,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 2219 .loc 2 3463 10 view .LVU655 2220 .LBE361: - ARM GAS /tmp/cc42qbQx.s page 155 + ARM GAS /tmp/cct9WEL1.s page 155 2221 .LBE360: @@ -9298,7 +9298,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2251 .loc 2 4517 21 is_stmt 0 view .LVU667 2252 0018 D3F88820 ldr r2, [r3, #136] 4517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } - ARM GAS /tmp/cc42qbQx.s page 156 + ARM GAS /tmp/cct9WEL1.s page 156 2253 .loc 2 4517 10 view .LVU668 @@ -9358,7 +9358,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2302 @ frame_needed = 0, uses_anonymous_args = 0 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** uint32_t sdmmc_frequency = LL_RCC_PERIPH_FREQUENCY_NO; 2303 .loc 1 886 1 is_stmt 0 view .LVU677 - ARM GAS /tmp/cc42qbQx.s page 157 + ARM GAS /tmp/cct9WEL1.s page 157 2304 0000 08B5 push {r3, lr} @@ -9418,7 +9418,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2343 .loc 2 2806 21 is_stmt 0 view .LVU692 2344 001a 1D4B ldr r3, .L186 2345 001c D3F89030 ldr r3, [r3, #144] - ARM GAS /tmp/cc42qbQx.s page 158 + ARM GAS /tmp/cct9WEL1.s page 158 2346 .LVL209: @@ -9478,7 +9478,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2386 .LVL212: 2792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 2387 .loc 2 2792 10 view .LVU707 - ARM GAS /tmp/cc42qbQx.s page 159 + ARM GAS /tmp/cct9WEL1.s page 159 2388 .LBE375: @@ -9538,7 +9538,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2428 0062 14E0 b .L177 2429 .LVL216: 2430 .L180: - ARM GAS /tmp/cc42qbQx.s page 160 + ARM GAS /tmp/cct9WEL1.s page 160 909:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { @@ -9598,7 +9598,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2470 .LBE383: 2471 .LBE382: 941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { - ARM GAS /tmp/cc42qbQx.s page 161 + ARM GAS /tmp/cct9WEL1.s page 161 2472 .loc 1 941 17 discriminator 1 view .LVU737 @@ -9658,7 +9658,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2518 .cfi_offset 14, -4 969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 2519 .loc 1 969 3 is_stmt 1 view .LVU748 - ARM GAS /tmp/cc42qbQx.s page 162 + ARM GAS /tmp/cct9WEL1.s page 162 2520 .LVL225: @@ -9718,7 +9718,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 980:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } 2560 .loc 1 980 9 is_stmt 1 view .LVU763 980:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } - ARM GAS /tmp/cc42qbQx.s page 163 + ARM GAS /tmp/cct9WEL1.s page 163 2561 .loc 1 980 25 is_stmt 0 view .LVU764 @@ -9778,7 +9778,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2606 .LVL234: 2607 .LFB306: 1041:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO; - ARM GAS /tmp/cc42qbQx.s page 164 + ARM GAS /tmp/cct9WEL1.s page 164 2608 .loc 1 1041 1 is_stmt 1 view -0 @@ -9838,7 +9838,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2648 .LBE393: 2649 .LBE392: 1051:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { - ARM GAS /tmp/cc42qbQx.s page 165 + ARM GAS /tmp/cct9WEL1.s page 165 2650 .loc 1 1051 10 discriminator 1 view .LVU791 @@ -9898,7 +9898,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2690 .L201: 2691 002e 00BF .align 2 2692 .L200: - ARM GAS /tmp/cc42qbQx.s page 166 + ARM GAS /tmp/cct9WEL1.s page 166 2693 0030 00380240 .word 1073887232 @@ -9958,7 +9958,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2728 .loc 1 1458 3 is_stmt 1 view .LVU814 2729 0008 DBB9 cbnz r3, .L204 1459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { - ARM GAS /tmp/cc42qbQx.s page 167 + ARM GAS /tmp/cct9WEL1.s page 167 1460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLLSAI clock source */ @@ -10018,7 +10018,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2763 0020 03FB00F0 mul r0, r3, r0 2764 .LBB402: 2765 .LBI402: - ARM GAS /tmp/cc42qbQx.s page 168 + ARM GAS /tmp/cct9WEL1.s page 168 4557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { @@ -10078,7 +10078,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2798 0046 00BF .align 2 2799 .L205: 2800 0048 00380240 .word 1073887232 - ARM GAS /tmp/cc42qbQx.s page 169 + ARM GAS /tmp/cct9WEL1.s page 169 2801 004c 0024F400 .word 16000000 @@ -10138,7 +10138,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2847 .L207: 1187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** #endif /* LTDC */ 2848 .loc 1 1187 1 view .LVU847 - ARM GAS /tmp/cc42qbQx.s page 170 + ARM GAS /tmp/cct9WEL1.s page 170 2849 000c 08BD pop {r3, pc} @@ -10198,7 +10198,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2886 .LBB409: 3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 2887 .loc 2 3463 3 view .LVU856 - ARM GAS /tmp/cc42qbQx.s page 171 + ARM GAS /tmp/cct9WEL1.s page 171 3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } @@ -10258,7 +10258,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2919 .LVL260: 2920 .LBB412: 2921 .LBI412: - ARM GAS /tmp/cc42qbQx.s page 172 + ARM GAS /tmp/cct9WEL1.s page 172 4040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { @@ -10318,7 +10318,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 2962 .loc 1 1497 20 view .LVU883 2963 003e 0348 ldr r0, .L216+8 2964 0040 E4E7 b .L214 - ARM GAS /tmp/cc42qbQx.s page 173 + ARM GAS /tmp/cct9WEL1.s page 173 2965 .L217: @@ -10378,7 +10378,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3011 .LVL265: 3012 .L239: 775:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { - ARM GAS /tmp/cc42qbQx.s page 174 + ARM GAS /tmp/cct9WEL1.s page 174 3013 .loc 1 775 5 is_stmt 1 view .LVU894 @@ -10438,7 +10438,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3054 .loc 1 787 27 is_stmt 0 view .LVU907 3055 003c FFF7FEFF bl RCC_PLLI2S_GetFreqDomain_SAI 3056 .LVL267: - ARM GAS /tmp/cc42qbQx.s page 175 + ARM GAS /tmp/cct9WEL1.s page 175 787:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } @@ -10498,7 +10498,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3098 .loc 1 775 5 discriminator 1 view .LVU920 3099 0064 0020 movs r0, #0 3100 0066 D3E7 b .L218 - ARM GAS /tmp/cc42qbQx.s page 176 + ARM GAS /tmp/cct9WEL1.s page 176 3101 .L222: @@ -10558,7 +10558,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3141 .LVL271: 3142 .L240: 825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { - ARM GAS /tmp/cc42qbQx.s page 177 + ARM GAS /tmp/cct9WEL1.s page 177 3143 .loc 1 825 7 is_stmt 1 view .LVU935 @@ -10618,7 +10618,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3184 .loc 1 837 27 is_stmt 0 view .LVU948 3185 00b0 FFF7FEFF bl RCC_PLLI2S_GetFreqDomain_SAI 3186 .LVL273: - ARM GAS /tmp/cc42qbQx.s page 178 + ARM GAS /tmp/cct9WEL1.s page 178 837:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } @@ -10678,7 +10678,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3228 .loc 1 825 7 discriminator 1 view .LVU961 3229 00d8 0020 movs r0, #0 3230 00da 99E7 b .L218 - ARM GAS /tmp/cc42qbQx.s page 179 + ARM GAS /tmp/cct9WEL1.s page 179 3231 .L227: @@ -10738,7 +10738,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 872:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } 3271 .loc 1 872 3 is_stmt 1 view .LVU976 872:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } - ARM GAS /tmp/cc42qbQx.s page 180 + ARM GAS /tmp/cct9WEL1.s page 180 3272 .loc 1 872 10 is_stmt 0 view .LVU977 @@ -10798,7 +10798,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3320 .loc 2 2877 26 view .LVU985 3321 .LBB443: 2879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } - ARM GAS /tmp/cc42qbQx.s page 181 + ARM GAS /tmp/cct9WEL1.s page 181 3322 .loc 2 2879 3 view .LVU986 @@ -10858,7 +10858,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3362 .LFE308: 3364 .section .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX,"ax",%progbits 3365 .align 1 - ARM GAS /tmp/cc42qbQx.s page 182 + ARM GAS /tmp/cct9WEL1.s page 182 3366 .global RCC_PLLI2S_GetFreqDomain_SPDIFRX @@ -10918,7 +10918,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3397 .loc 1 1525 20 is_stmt 0 view .LVU1010 3398 000a 0D48 ldr r0, .L256+4 3399 .L254: - ARM GAS /tmp/cc42qbQx.s page 183 + ARM GAS /tmp/cct9WEL1.s page 183 3400 .LVL289: @@ -10978,7 +10978,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3433 .LBI450: 4097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { 3434 .loc 2 4097 26 is_stmt 1 view .LVU1023 - ARM GAS /tmp/cc42qbQx.s page 184 + ARM GAS /tmp/cct9WEL1.s page 184 3435 .LBB451: @@ -11038,7 +11038,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3483 .LVL294: 1203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 3484 .loc 1 1203 3 view .LVU1032 - ARM GAS /tmp/cc42qbQx.s page 185 + ARM GAS /tmp/cct9WEL1.s page 185 1205:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { @@ -11098,7 +11098,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** #endif /* SPDIFRX */ 1541:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** 1542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /** - ARM GAS /tmp/cc42qbQx.s page 186 + ARM GAS /tmp/cct9WEL1.s page 186 1543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @brief Return PLLI2S clock frequency used for I2S domain @@ -11158,7 +11158,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 1566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** return __LL_RCC_CALC_PLLI2S_I2S_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(), 3557 .loc 1 1566 3 is_stmt 1 view .LVU1053 3558 .LBB456: - ARM GAS /tmp/cc42qbQx.s page 187 + ARM GAS /tmp/cct9WEL1.s page 187 3559 .LBI456: @@ -11218,7 +11218,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3600 .LVL303: 3601 .L266: 1563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break; - ARM GAS /tmp/cc42qbQx.s page 188 + ARM GAS /tmp/cct9WEL1.s page 188 3602 .loc 1 1563 20 view .LVU1069 @@ -11278,7 +11278,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 688:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** { 3649 .loc 1 688 5 is_stmt 1 view .LVU1079 3650 .LVL308: - ARM GAS /tmp/cc42qbQx.s page 189 + ARM GAS /tmp/cct9WEL1.s page 189 3651 .LBB462: @@ -11338,7 +11338,7 @@ ARM GAS /tmp/cc42qbQx.s page 1 3691 .LVL313: 693:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** } 3692 .loc 1 693 27 view .LVU1094 - ARM GAS /tmp/cc42qbQx.s page 190 + ARM GAS /tmp/cct9WEL1.s page 190 3693 0024 FBE7 b .L269 @@ -11370,99 +11370,99 @@ ARM GAS /tmp/cc42qbQx.s page 1 3719 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h" 3720 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 3721 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - ARM GAS /tmp/cc42qbQx.s page 191 + ARM GAS /tmp/cct9WEL1.s page 191 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_ll_rcc.c - /tmp/cc42qbQx.s:20 .text.LL_RCC_DeInit:00000000 $t - /tmp/cc42qbQx.s:26 .text.LL_RCC_DeInit:00000000 LL_RCC_DeInit - /tmp/cc42qbQx.s:184 .text.LL_RCC_DeInit:0000008c $d - /tmp/cc42qbQx.s:191 .text.LL_RCC_GetCECClockFreq:00000000 $t - /tmp/cc42qbQx.s:197 .text.LL_RCC_GetCECClockFreq:00000000 LL_RCC_GetCECClockFreq - /tmp/cc42qbQx.s:275 .text.LL_RCC_GetCECClockFreq:0000002c $d - /tmp/cc42qbQx.s:280 .text.RCC_GetHCLKClockFreq:00000000 $t - /tmp/cc42qbQx.s:286 .text.RCC_GetHCLKClockFreq:00000000 RCC_GetHCLKClockFreq - /tmp/cc42qbQx.s:317 .text.RCC_GetHCLKClockFreq:00000010 $d - /tmp/cc42qbQx.s:323 .text.RCC_GetPCLK1ClockFreq:00000000 $t - /tmp/cc42qbQx.s:329 .text.RCC_GetPCLK1ClockFreq:00000000 RCC_GetPCLK1ClockFreq - /tmp/cc42qbQx.s:360 .text.RCC_GetPCLK1ClockFreq:00000010 $d - /tmp/cc42qbQx.s:366 .text.RCC_GetPCLK2ClockFreq:00000000 $t - /tmp/cc42qbQx.s:372 .text.RCC_GetPCLK2ClockFreq:00000000 RCC_GetPCLK2ClockFreq - /tmp/cc42qbQx.s:403 .text.RCC_GetPCLK2ClockFreq:00000010 $d - /tmp/cc42qbQx.s:409 .text.RCC_PLL_GetFreqDomain_SYS:00000000 $t - /tmp/cc42qbQx.s:415 .text.RCC_PLL_GetFreqDomain_SYS:00000000 RCC_PLL_GetFreqDomain_SYS - /tmp/cc42qbQx.s:500 .text.RCC_PLL_GetFreqDomain_SYS:00000038 $d - /tmp/cc42qbQx.s:507 .text.RCC_GetSystemClockFreq:00000000 $t - /tmp/cc42qbQx.s:513 .text.RCC_GetSystemClockFreq:00000000 RCC_GetSystemClockFreq - /tmp/cc42qbQx.s:567 .text.RCC_GetSystemClockFreq:00000020 $d - /tmp/cc42qbQx.s:574 .text.LL_RCC_GetSystemClocksFreq:00000000 $t - /tmp/cc42qbQx.s:580 .text.LL_RCC_GetSystemClocksFreq:00000000 LL_RCC_GetSystemClocksFreq - /tmp/cc42qbQx.s:626 .text.LL_RCC_GetUSARTClockFreq:00000000 $t - /tmp/cc42qbQx.s:632 .text.LL_RCC_GetUSARTClockFreq:00000000 LL_RCC_GetUSARTClockFreq - /tmp/cc42qbQx.s:1032 .text.LL_RCC_GetUSARTClockFreq:00000160 $d - /tmp/cc42qbQx.s:1042 .text.LL_RCC_GetUARTClockFreq:00000000 $t - /tmp/cc42qbQx.s:1048 .text.LL_RCC_GetUARTClockFreq:00000000 LL_RCC_GetUARTClockFreq - /tmp/cc42qbQx.s:1448 .text.LL_RCC_GetUARTClockFreq:00000168 $d - /tmp/cc42qbQx.s:1458 .text.LL_RCC_GetI2CClockFreq:00000000 $t - /tmp/cc42qbQx.s:1464 .text.LL_RCC_GetI2CClockFreq:00000000 LL_RCC_GetI2CClockFreq - /tmp/cc42qbQx.s:1764 .text.LL_RCC_GetI2CClockFreq:00000108 $d - /tmp/cc42qbQx.s:1774 .text.LL_RCC_GetLPTIMClockFreq:00000000 $t - /tmp/cc42qbQx.s:1780 .text.LL_RCC_GetLPTIMClockFreq:00000000 LL_RCC_GetLPTIMClockFreq - /tmp/cc42qbQx.s:1912 .text.LL_RCC_GetLPTIMClockFreq:00000064 $d - /tmp/cc42qbQx.s:1918 .text.LL_RCC_GetDFSDMClockFreq:00000000 $t - /tmp/cc42qbQx.s:1924 .text.LL_RCC_GetDFSDMClockFreq:00000000 LL_RCC_GetDFSDMClockFreq - /tmp/cc42qbQx.s:1984 .text.LL_RCC_GetDFSDMClockFreq:00000024 $d - /tmp/cc42qbQx.s:1989 .text.RCC_PLL_GetFreqDomain_48M:00000000 $t - /tmp/cc42qbQx.s:1995 .text.RCC_PLL_GetFreqDomain_48M:00000000 RCC_PLL_GetFreqDomain_48M - /tmp/cc42qbQx.s:2078 .text.RCC_PLL_GetFreqDomain_48M:00000034 $d - /tmp/cc42qbQx.s:2085 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000000 $t - /tmp/cc42qbQx.s:2091 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000000 RCC_PLLSAI_GetFreqDomain_SAI - /tmp/cc42qbQx.s:2185 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000044 $d - /tmp/cc42qbQx.s:2192 .text.RCC_PLLSAI_GetFreqDomain_48M:00000000 $t - /tmp/cc42qbQx.s:2198 .text.RCC_PLLSAI_GetFreqDomain_48M:00000000 RCC_PLLSAI_GetFreqDomain_48M - /tmp/cc42qbQx.s:2283 .text.RCC_PLLSAI_GetFreqDomain_48M:0000003c $d - /tmp/cc42qbQx.s:2290 .text.LL_RCC_GetSDMMCClockFreq:00000000 $t - /tmp/cc42qbQx.s:2296 .text.LL_RCC_GetSDMMCClockFreq:00000000 LL_RCC_GetSDMMCClockFreq - /tmp/cc42qbQx.s:2495 .text.LL_RCC_GetSDMMCClockFreq:00000090 $d - /tmp/cc42qbQx.s:2500 .text.LL_RCC_GetRNGClockFreq:00000000 $t - /tmp/cc42qbQx.s:2506 .text.LL_RCC_GetRNGClockFreq:00000000 LL_RCC_GetRNGClockFreq - /tmp/cc42qbQx.s:2594 .text.LL_RCC_GetRNGClockFreq:00000030 $d - /tmp/cc42qbQx.s:2599 .text.LL_RCC_GetUSBClockFreq:00000000 $t - /tmp/cc42qbQx.s:2605 .text.LL_RCC_GetUSBClockFreq:00000000 LL_RCC_GetUSBClockFreq - ARM GAS /tmp/cc42qbQx.s page 192 + /tmp/cct9WEL1.s:20 .text.LL_RCC_DeInit:00000000 $t + /tmp/cct9WEL1.s:26 .text.LL_RCC_DeInit:00000000 LL_RCC_DeInit + /tmp/cct9WEL1.s:184 .text.LL_RCC_DeInit:0000008c $d + /tmp/cct9WEL1.s:191 .text.LL_RCC_GetCECClockFreq:00000000 $t + /tmp/cct9WEL1.s:197 .text.LL_RCC_GetCECClockFreq:00000000 LL_RCC_GetCECClockFreq + /tmp/cct9WEL1.s:275 .text.LL_RCC_GetCECClockFreq:0000002c $d + /tmp/cct9WEL1.s:280 .text.RCC_GetHCLKClockFreq:00000000 $t + /tmp/cct9WEL1.s:286 .text.RCC_GetHCLKClockFreq:00000000 RCC_GetHCLKClockFreq + /tmp/cct9WEL1.s:317 .text.RCC_GetHCLKClockFreq:00000010 $d + /tmp/cct9WEL1.s:323 .text.RCC_GetPCLK1ClockFreq:00000000 $t + /tmp/cct9WEL1.s:329 .text.RCC_GetPCLK1ClockFreq:00000000 RCC_GetPCLK1ClockFreq + /tmp/cct9WEL1.s:360 .text.RCC_GetPCLK1ClockFreq:00000010 $d + /tmp/cct9WEL1.s:366 .text.RCC_GetPCLK2ClockFreq:00000000 $t + /tmp/cct9WEL1.s:372 .text.RCC_GetPCLK2ClockFreq:00000000 RCC_GetPCLK2ClockFreq + /tmp/cct9WEL1.s:403 .text.RCC_GetPCLK2ClockFreq:00000010 $d + /tmp/cct9WEL1.s:409 .text.RCC_PLL_GetFreqDomain_SYS:00000000 $t + /tmp/cct9WEL1.s:415 .text.RCC_PLL_GetFreqDomain_SYS:00000000 RCC_PLL_GetFreqDomain_SYS + /tmp/cct9WEL1.s:500 .text.RCC_PLL_GetFreqDomain_SYS:00000038 $d + /tmp/cct9WEL1.s:507 .text.RCC_GetSystemClockFreq:00000000 $t + /tmp/cct9WEL1.s:513 .text.RCC_GetSystemClockFreq:00000000 RCC_GetSystemClockFreq + /tmp/cct9WEL1.s:567 .text.RCC_GetSystemClockFreq:00000020 $d + /tmp/cct9WEL1.s:574 .text.LL_RCC_GetSystemClocksFreq:00000000 $t + /tmp/cct9WEL1.s:580 .text.LL_RCC_GetSystemClocksFreq:00000000 LL_RCC_GetSystemClocksFreq + /tmp/cct9WEL1.s:626 .text.LL_RCC_GetUSARTClockFreq:00000000 $t + /tmp/cct9WEL1.s:632 .text.LL_RCC_GetUSARTClockFreq:00000000 LL_RCC_GetUSARTClockFreq + /tmp/cct9WEL1.s:1032 .text.LL_RCC_GetUSARTClockFreq:00000160 $d + /tmp/cct9WEL1.s:1042 .text.LL_RCC_GetUARTClockFreq:00000000 $t + /tmp/cct9WEL1.s:1048 .text.LL_RCC_GetUARTClockFreq:00000000 LL_RCC_GetUARTClockFreq + /tmp/cct9WEL1.s:1448 .text.LL_RCC_GetUARTClockFreq:00000168 $d + /tmp/cct9WEL1.s:1458 .text.LL_RCC_GetI2CClockFreq:00000000 $t + /tmp/cct9WEL1.s:1464 .text.LL_RCC_GetI2CClockFreq:00000000 LL_RCC_GetI2CClockFreq + /tmp/cct9WEL1.s:1764 .text.LL_RCC_GetI2CClockFreq:00000108 $d + /tmp/cct9WEL1.s:1774 .text.LL_RCC_GetLPTIMClockFreq:00000000 $t + /tmp/cct9WEL1.s:1780 .text.LL_RCC_GetLPTIMClockFreq:00000000 LL_RCC_GetLPTIMClockFreq + /tmp/cct9WEL1.s:1912 .text.LL_RCC_GetLPTIMClockFreq:00000064 $d + /tmp/cct9WEL1.s:1918 .text.LL_RCC_GetDFSDMClockFreq:00000000 $t + /tmp/cct9WEL1.s:1924 .text.LL_RCC_GetDFSDMClockFreq:00000000 LL_RCC_GetDFSDMClockFreq + /tmp/cct9WEL1.s:1984 .text.LL_RCC_GetDFSDMClockFreq:00000024 $d + /tmp/cct9WEL1.s:1989 .text.RCC_PLL_GetFreqDomain_48M:00000000 $t + /tmp/cct9WEL1.s:1995 .text.RCC_PLL_GetFreqDomain_48M:00000000 RCC_PLL_GetFreqDomain_48M + /tmp/cct9WEL1.s:2078 .text.RCC_PLL_GetFreqDomain_48M:00000034 $d + /tmp/cct9WEL1.s:2085 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000000 $t + /tmp/cct9WEL1.s:2091 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000000 RCC_PLLSAI_GetFreqDomain_SAI + /tmp/cct9WEL1.s:2185 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000044 $d + /tmp/cct9WEL1.s:2192 .text.RCC_PLLSAI_GetFreqDomain_48M:00000000 $t + /tmp/cct9WEL1.s:2198 .text.RCC_PLLSAI_GetFreqDomain_48M:00000000 RCC_PLLSAI_GetFreqDomain_48M + /tmp/cct9WEL1.s:2283 .text.RCC_PLLSAI_GetFreqDomain_48M:0000003c $d + /tmp/cct9WEL1.s:2290 .text.LL_RCC_GetSDMMCClockFreq:00000000 $t + /tmp/cct9WEL1.s:2296 .text.LL_RCC_GetSDMMCClockFreq:00000000 LL_RCC_GetSDMMCClockFreq + /tmp/cct9WEL1.s:2495 .text.LL_RCC_GetSDMMCClockFreq:00000090 $d + /tmp/cct9WEL1.s:2500 .text.LL_RCC_GetRNGClockFreq:00000000 $t + /tmp/cct9WEL1.s:2506 .text.LL_RCC_GetRNGClockFreq:00000000 LL_RCC_GetRNGClockFreq + /tmp/cct9WEL1.s:2594 .text.LL_RCC_GetRNGClockFreq:00000030 $d + /tmp/cct9WEL1.s:2599 .text.LL_RCC_GetUSBClockFreq:00000000 $t + /tmp/cct9WEL1.s:2605 .text.LL_RCC_GetUSBClockFreq:00000000 LL_RCC_GetUSBClockFreq + ARM GAS /tmp/cct9WEL1.s page 192 - /tmp/cc42qbQx.s:2693 .text.LL_RCC_GetUSBClockFreq:00000030 $d - /tmp/cc42qbQx.s:2698 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000000 $t - /tmp/cc42qbQx.s:2704 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000000 RCC_PLLSAI_GetFreqDomain_LTDC - /tmp/cc42qbQx.s:2800 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000048 $d - /tmp/cc42qbQx.s:3714 .rodata.aRCC_PLLSAIDIVRPrescTable:00000000 aRCC_PLLSAIDIVRPrescTable - /tmp/cc42qbQx.s:2808 .text.LL_RCC_GetLTDCClockFreq:00000000 $t - /tmp/cc42qbQx.s:2814 .text.LL_RCC_GetLTDCClockFreq:00000000 LL_RCC_GetLTDCClockFreq - /tmp/cc42qbQx.s:2862 .text.LL_RCC_GetLTDCClockFreq:00000014 $d - /tmp/cc42qbQx.s:2867 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000000 $t - /tmp/cc42qbQx.s:2873 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000000 RCC_PLLI2S_GetFreqDomain_SAI - /tmp/cc42qbQx.s:2968 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000044 $d - /tmp/cc42qbQx.s:2975 .text.LL_RCC_GetSAIClockFreq:00000000 $t - /tmp/cc42qbQx.s:2981 .text.LL_RCC_GetSAIClockFreq:00000000 LL_RCC_GetSAIClockFreq - /tmp/cc42qbQx.s:3286 .text.LL_RCC_GetSAIClockFreq:00000108 $d - /tmp/cc42qbQx.s:3295 .text.LL_RCC_GetDFSDMAudioClockFreq:00000000 $t - /tmp/cc42qbQx.s:3301 .text.LL_RCC_GetDFSDMAudioClockFreq:00000000 LL_RCC_GetDFSDMAudioClockFreq - /tmp/cc42qbQx.s:3360 .text.LL_RCC_GetDFSDMAudioClockFreq:00000020 $d - /tmp/cc42qbQx.s:3365 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:00000000 $t - /tmp/cc42qbQx.s:3371 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:00000000 RCC_PLLI2S_GetFreqDomain_SPDIFRX - /tmp/cc42qbQx.s:3456 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:0000003c $d - /tmp/cc42qbQx.s:3463 .text.LL_RCC_GetSPDIFRXClockFreq:00000000 $t - /tmp/cc42qbQx.s:3469 .text.LL_RCC_GetSPDIFRXClockFreq:00000000 LL_RCC_GetSPDIFRXClockFreq - /tmp/cc42qbQx.s:3517 .text.LL_RCC_GetSPDIFRXClockFreq:00000014 $d - /tmp/cc42qbQx.s:3522 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000000 $t - /tmp/cc42qbQx.s:3528 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000000 RCC_PLLI2S_GetFreqDomain_I2S - /tmp/cc42qbQx.s:3610 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000038 $d - /tmp/cc42qbQx.s:3617 .text.LL_RCC_GetI2SClockFreq:00000000 $t - /tmp/cc42qbQx.s:3623 .text.LL_RCC_GetI2SClockFreq:00000000 LL_RCC_GetI2SClockFreq - /tmp/cc42qbQx.s:3705 .text.LL_RCC_GetI2SClockFreq:0000002c $d - /tmp/cc42qbQx.s:3711 .rodata.aRCC_PLLSAIDIVRPrescTable:00000000 $d + /tmp/cct9WEL1.s:2693 .text.LL_RCC_GetUSBClockFreq:00000030 $d + /tmp/cct9WEL1.s:2698 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000000 $t + /tmp/cct9WEL1.s:2704 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000000 RCC_PLLSAI_GetFreqDomain_LTDC + /tmp/cct9WEL1.s:2800 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000048 $d + /tmp/cct9WEL1.s:3714 .rodata.aRCC_PLLSAIDIVRPrescTable:00000000 aRCC_PLLSAIDIVRPrescTable + /tmp/cct9WEL1.s:2808 .text.LL_RCC_GetLTDCClockFreq:00000000 $t + /tmp/cct9WEL1.s:2814 .text.LL_RCC_GetLTDCClockFreq:00000000 LL_RCC_GetLTDCClockFreq + /tmp/cct9WEL1.s:2862 .text.LL_RCC_GetLTDCClockFreq:00000014 $d + /tmp/cct9WEL1.s:2867 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000000 $t + /tmp/cct9WEL1.s:2873 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000000 RCC_PLLI2S_GetFreqDomain_SAI + /tmp/cct9WEL1.s:2968 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000044 $d + /tmp/cct9WEL1.s:2975 .text.LL_RCC_GetSAIClockFreq:00000000 $t + /tmp/cct9WEL1.s:2981 .text.LL_RCC_GetSAIClockFreq:00000000 LL_RCC_GetSAIClockFreq + /tmp/cct9WEL1.s:3286 .text.LL_RCC_GetSAIClockFreq:00000108 $d + /tmp/cct9WEL1.s:3295 .text.LL_RCC_GetDFSDMAudioClockFreq:00000000 $t + /tmp/cct9WEL1.s:3301 .text.LL_RCC_GetDFSDMAudioClockFreq:00000000 LL_RCC_GetDFSDMAudioClockFreq + /tmp/cct9WEL1.s:3360 .text.LL_RCC_GetDFSDMAudioClockFreq:00000020 $d + /tmp/cct9WEL1.s:3365 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:00000000 $t + /tmp/cct9WEL1.s:3371 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:00000000 RCC_PLLI2S_GetFreqDomain_SPDIFRX + /tmp/cct9WEL1.s:3456 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:0000003c $d + /tmp/cct9WEL1.s:3463 .text.LL_RCC_GetSPDIFRXClockFreq:00000000 $t + /tmp/cct9WEL1.s:3469 .text.LL_RCC_GetSPDIFRXClockFreq:00000000 LL_RCC_GetSPDIFRXClockFreq + /tmp/cct9WEL1.s:3517 .text.LL_RCC_GetSPDIFRXClockFreq:00000014 $d + /tmp/cct9WEL1.s:3522 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000000 $t + /tmp/cct9WEL1.s:3528 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000000 RCC_PLLI2S_GetFreqDomain_I2S + /tmp/cct9WEL1.s:3610 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000038 $d + /tmp/cct9WEL1.s:3617 .text.LL_RCC_GetI2SClockFreq:00000000 $t + /tmp/cct9WEL1.s:3623 .text.LL_RCC_GetI2SClockFreq:00000000 LL_RCC_GetI2SClockFreq + /tmp/cct9WEL1.s:3705 .text.LL_RCC_GetI2SClockFreq:0000002c $d + /tmp/cct9WEL1.s:3711 .rodata.aRCC_PLLSAIDIVRPrescTable:00000000 $d UNDEFINED SYMBOLS AHBPrescTable diff --git a/build/stm32f7xx_ll_rcc.o b/build/stm32f7xx_ll_rcc.o index 5ab837b5349ff3eaa0b4658dd49e7f7089728164..424cc1aef454ae11b34c9fa7583d06c091396972 100644 GIT binary patch delta 2385 zcmZ8h3rti;6n!&qAN$xHU>DY9`C}Kv3I#uq*7zyER;kDWVxx@|Q4p{Zh=ACSZfk8y zjHcLI8?4b5Ym7Ex)Kx(gV{98tYg09*QCg$cMkU5y{o;rA-rb#T(wEGjl2DBNHiW55>+is$&^+HxZqwLOG% z&4MpA6Su4Bjw)0z%)*H?J&Rb}I2*UBu^2|pjQSWo+EQ{Gj4z`-2o9Um*m<~aE^rsA z=)1$ME6MFNh+$OJ?n4jTYe~_(b~0iiZ^Nsl=J$jE4A`#IJ~x zwEwvbI9c2x{;>3Ci&I!1?H`HV`QkU)ps4E|d zI0Z1M{tV{{Jh!50(m!83rUZf{t`b8O&*+cmcGij^64WK3(VRC6OCBt7vry^8CV9Z+ z;ym%qKELYxkclRWAf#b66I~P{L>k(dm`Ftqm4>xUq?pkVrdo68-c@HiQ$h+z#j2{; z&=P87Rrm_p$ptyDO|_FtF}0%Lb)xCaaiMB z@35sMlwz^iErW^C>FIIc;42h%6YFf>3ipsd9}-72*|!jLw;`Q~v6!L*hs^^!N0ixf zs5W03QpweU<}b)K1|sZPECdSd6Id#&uvf8j@TYfek6geu!n=|2_Q{w$vlzzE##YpC zz+syJU6CJPI%6E;*;i2RSj-;62}ivBFCzD=Uh)kr`4t?t4tVC+WWRv{S&N!RI=xu$ zeK>5hGYuvrWhbm6#jPRUw!=)64jey3qD_fb6iWzv zp7gc*D5lCC;nCg;Q=K~q>H+u@_2mVt^xh%(O8{OVcsKw%34R-ZDt;AwmPPLUl=}9i z0Q{ML%FF_Ll65{D486&zmi@Hf9V$0e!-M2W?y*>I{z-^5zCqtciSWaua)L9=emFHo zQIhj~rm1vyO40~IQzW4xK$v3A^ARFRKV1?&B*Fl;ADSi;!L1}sqdXEMqmvk$Nj1U8 zP?9c@ghdjL6JZ)|MUz)TNjgTUb4j>DgcW!-Xz~+Qk=}iiKMg}H65ga@+&8)XdCaEI z{HkOm6JsVF^Qy^Ds3O5LlJGhaHqc$3G5KS36TMdwYKU-+&ebawHj%=2lF&v3hX!3K z31O=!_!`p`U&YGd_mo8UA+kAw<-K$e3=Y7v6#9uSy<@3_o&el~oy*$;a1y1uSi(^Q zB&F+irsl-q8LV_HU7zF)?kuGv-!eu=`1&=ak;nr^Bs+6G>qc+O3eK6HJFc+!wW3nb z)VH^2o~sKl@sPs8iqgEiiu~$=`nqO_t4U7JsBKtMol)Jgw4t#wBfq-oo#uwdjMB=g zx`yJ~hUSL)x`h?RdASu$4U3vvE0=n*Yv#{nC!lk`i=BeI`(6B83*;VH#xJ!%?|~wI zy#-7MidOb2fXoGyP}o{qJ|qchC9Gx%dBD z+eOnu(Ub-YcBd!X0y0|DWTB>MO;(!z_Xvx5256cv%-IILAgZgNmoP0dv(dDdk;UYs zmp+2F>)GxKieOBjNq}V#vxIpvZPj~PXzJhjRq~kX*lm~xlRXL#*|Oj&w%Q5;r8@a; z3da(5dkxvmM);P(7F&Knsb>01VJXj$a?@>v?ebGfVY;KRQ#Mh2Q=7tWc{qyj-@*|} z@Ab$c#&?xJEg*lOI!yPJ!6%P1;UD2x7ZTK6x;Wr{nCgq)xdx8##kihGigkbBY*cSP3$hn;feQYe4$>nB#Ou9-q7JZ2~Q(h@&`k{VG{v z%}_zFsO^wV_akl&-_p2!)Ckb@jbw@1p(oHwSd3Lz6Wf2>E|MsUWXBom``m6@Lz*-Z3MiEbLsqqx1(MAs

    Pp|vY<27H7I6H{DIQ}JLodh*6bieF2^ z`6TX4Tm;*(r@Jp~!l~{#a34>)Q(Tfx4NmAG@}Jc5%QT!{V7vPr*9}St^Ytu_(@g!| zL&KR8+}U{~q#3OHq4=*t5B**YPCUgyCBA@;WGCbWyCqivEWx#&6qt)UJm0#$qwugz zgwma)dwrOO^Lbp?Whz|58(mUdtsJ9o2jN7FrUhv@UkQ3sS^yT}#Z;$Av<2^`wgF7S zYw0Pj^VCsDf{;j?Q`1f)5dUs4y{kh&H1_iiPklhjU~5e1+EFFi1{z-`l1)p}G`j=W z`!)xTQK`ZmpAlke>l z5%@L#l);X>GAu$`u{ooc{Q&O|#HtPRuq|V7pg*-+ERRvfV*WP9%P{nnGaP3N!=cHV zmNBNoG?dRy^L1vFs|aNgLar^pgOJSevlU?}6E4v8BhwHj1TT)-a)t1D;ic(M;ILXL;5d7IBE_&5AIK32m&aSw**lA(drWEQ3SIz0+Cpb#qce$9>JLXYzS7k-ejXYrB6iAf~XetTaErY-D9Y z&FuQ%Q`0t?qVvX%=u=oSs<<@x)69!vNKSR_ii8FRMwT(*VdJlsk;H!i DeT~GN diff --git a/build/stm32f7xx_ll_sdmmc.lst b/build/stm32f7xx_ll_sdmmc.lst index e815942..72bc278 100644 --- a/build/stm32f7xx_ll_sdmmc.lst +++ b/build/stm32f7xx_ll_sdmmc.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccPSMkLq.s page 1 +ARM GAS /tmp/cc7d48pz.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the AHB 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** devices. - ARM GAS /tmp/ccPSMkLq.s page 2 + ARM GAS /tmp/cc7d48pz.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMC_GetCommandResponse() and SDMMC_GetResponse() functions. First, user has 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** to fill the command structure (pointer to SDMMC_CmdInitTypeDef) according 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** to the selected command to be sent. - ARM GAS /tmp/ccPSMkLq.s page 3 + ARM GAS /tmp/cc7d48pz.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** The parameters that should be filled are: @@ -178,7 +178,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** (#) Use the SDMMC flags/interrupts to check the transfer status. 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** *** Command management operations *** - ARM GAS /tmp/ccPSMkLq.s page 4 + ARM GAS /tmp/cc7d48pz.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** ===================================== @@ -238,7 +238,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /** 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @brief Initializes the SDMMC according to the specified 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * parameters in the SDMMC_InitTypeDef and create the associated handle. - ARM GAS /tmp/ccPSMkLq.s page 5 + ARM GAS /tmp/cc7d48pz.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base @@ -298,7 +298,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @retval HAL status 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */ - ARM GAS /tmp/ccPSMkLq.s page 6 + ARM GAS /tmp/cc7d48pz.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx) @@ -358,7 +358,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @retval HAL status 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */ - ARM GAS /tmp/ccPSMkLq.s page 7 + ARM GAS /tmp/cc7d48pz.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx) @@ -418,7 +418,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /** 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @brief Return the command index of last command for which response received - ARM GAS /tmp/ccPSMkLq.s page 8 + ARM GAS /tmp/cc7d48pz.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base @@ -478,7 +478,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* Set the SDMMC DataLength value */ 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMCx->DLEN = Data->DataLength; - ARM GAS /tmp/ccPSMkLq.s page 9 + ARM GAS /tmp/cc7d48pz.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -538,7 +538,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /** 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @} 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */ - ARM GAS /tmp/ccPSMkLq.s page 10 + ARM GAS /tmp/cc7d48pz.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -598,7 +598,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - ARM GAS /tmp/ccPSMkLq.s page 11 + ARM GAS /tmp/cc7d48pz.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -658,7 +658,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /** 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @brief Send the Write Multi Block command and check the response - ARM GAS /tmp/ccPSMkLq.s page 12 + ARM GAS /tmp/cc7d48pz.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base @@ -718,7 +718,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t errorstate; 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* Set Block Size for Card */ - ARM GAS /tmp/ccPSMkLq.s page 13 + ARM GAS /tmp/cc7d48pz.s page 13 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Argument = (uint32_t)EndAdd; @@ -778,7 +778,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* Check for error conditions */ 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE_GRP_END, SDMMC_CMDTIMEOUT); - ARM GAS /tmp/ccPSMkLq.s page 14 + ARM GAS /tmp/cc7d48pz.s page 14 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -838,7 +838,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param addr: Address of the card to be selected 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @retval HAL status - ARM GAS /tmp/ccPSMkLq.s page 15 + ARM GAS /tmp/cc7d48pz.s page 15 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */ @@ -898,7 +898,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* Argument: - [31:12]: Reserved (shall be set to '0') 828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V) 829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - [7:0]: Check Pattern (recommended 0xAA) */ - ARM GAS /tmp/ccPSMkLq.s page 16 + ARM GAS /tmp/cc7d48pz.s page 16 830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* CMD Response: R7 */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | Argument; 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND; - ARM GAS /tmp/ccPSMkLq.s page 17 + ARM GAS /tmp/cc7d48pz.s page 17 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_APP_SEND_SCR, SDMMC_CMDTIMEOUT); 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return errorstate; - ARM GAS /tmp/ccPSMkLq.s page 18 + ARM GAS /tmp/cc7d48pz.s page 18 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param pRCA: Card RCA 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @retval HAL status 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */ - ARM GAS /tmp/ccPSMkLq.s page 19 + ARM GAS /tmp/cc7d48pz.s page 19 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t SDMMC_CmdSetRelAdd(SDMMC_TypeDef *SDMMCx, uint16_t *pRCA) @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Argument = Argument; 1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS; - ARM GAS /tmp/ccPSMkLq.s page 20 + ARM GAS /tmp/cc7d48pz.s page 20 1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** errorstate = SDMMC_GetCmdResp3(SDMMCx); 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return errorstate; - ARM GAS /tmp/ccPSMkLq.s page 21 + ARM GAS /tmp/cc7d48pz.s page 21 1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @} 1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */ 1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - ARM GAS /tmp/ccPSMkLq.s page 22 + ARM GAS /tmp/cc7d48pz.s page 22 1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /** @defgroup HAL_SDMMC_LL_Group5 Responses management functions @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* Clear all the static flags */ 1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS); - ARM GAS /tmp/ccPSMkLq.s page 23 + ARM GAS /tmp/cc7d48pz.s page 23 1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR) 1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** { 1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return SDMMC_ERROR_CC_ERR; - ARM GAS /tmp/ccPSMkLq.s page 24 + ARM GAS /tmp/cc7d48pz.s page 24 1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) || 1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** ((sta_reg & SDMMC_FLAG_CMDACT) != 0U )); 1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - ARM GAS /tmp/ccPSMkLq.s page 25 + ARM GAS /tmp/cc7d48pz.s page 25 1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT)) @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } 1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return SDMMC_ERROR_NONE; - ARM GAS /tmp/ccPSMkLq.s page 26 + ARM GAS /tmp/cc7d48pz.s page 26 1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* We have received response, retrieve it. */ 1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** response_r1 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1); - ARM GAS /tmp/ccPSMkLq.s page 27 + ARM GAS /tmp/cc7d48pz.s page 27 1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return SDMMC_ERROR_CMD_CRC_FAIL; 1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } - ARM GAS /tmp/ccPSMkLq.s page 28 + ARM GAS /tmp/cc7d48pz.s page 28 1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** else @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1550:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** { 1551:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** if (count-- == 0U) 46 .loc 1 1551 5 view .LVU5 - ARM GAS /tmp/ccPSMkLq.s page 29 + ARM GAS /tmp/cc7d48pz.s page 29 47 0014 1A46 mov r2, r3 @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 90 .thumb_func 92 SDMMC_Init: 93 .LVL7: - ARM GAS /tmp/ccPSMkLq.s page 30 + ARM GAS /tmp/cc7d48pz.s page 30 94 .LFB141: @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 130 0018 1343 orrs r3, r3, r2 226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** ); 131 .loc 1 226 18 view .LVU36 - ARM GAS /tmp/ccPSMkLq.s page 31 + ARM GAS /tmp/cc7d48pz.s page 31 132 001a 069A ldr r2, [sp, #24] @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 179 .loc 1 264 1 view .LVU46 180 0004 7047 bx lr - ARM GAS /tmp/ccPSMkLq.s page 32 + ARM GAS /tmp/cc7d48pz.s page 32 181 .cfi_endproc @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 229 .loc 1 307 17 is_stmt 0 view .LVU56 230 0000 0323 movs r3, #3 231 0002 0360 str r3, [r0] - ARM GAS /tmp/ccPSMkLq.s page 33 + ARM GAS /tmp/cc7d48pz.s page 33 309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL); 280 .loc 1 335 1 is_stmt 1 view -0 281 .cfi_startproc - ARM GAS /tmp/ccPSMkLq.s page 34 + ARM GAS /tmp/cc7d48pz.s page 34 282 @ args = 0, pretend = 0, frame = 0 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 323 .loc 1 362 31 view .LVU82 324 0006 8A68 ldr r2, [r1, #8] 361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** Command->Response |\ - ARM GAS /tmp/ccPSMkLq.s page 35 + ARM GAS /tmp/cc7d48pz.s page 35 325 .loc 1 361 50 view .LVU83 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 369 .loc 1 379 26 is_stmt 0 view .LVU95 370 0000 0069 ldr r0, [r0, #16] 371 .LVL28: - ARM GAS /tmp/ccPSMkLq.s page 36 + ARM GAS /tmp/cc7d48pz.s page 36 380:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 420 @ args = 0, pretend = 0, frame = 0 421 @ frame_needed = 0, uses_anonymous_args = 0 422 @ link register save eliminated. - ARM GAS /tmp/ccPSMkLq.s page 37 + ARM GAS /tmp/cc7d48pz.s page 37 417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 456 0016 C26A ldr r2, [r0, #44] 457 0018 22F0F702 bic r2, r2, #247 458 001c 1343 orrs r3, r3, r2 - ARM GAS /tmp/ccPSMkLq.s page 38 + ARM GAS /tmp/cc7d48pz.s page 38 459 .LVL34: @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 508 @ args = 0, pretend = 0, frame = 0 509 @ frame_needed = 0, uses_anonymous_args = 0 510 @ link register save eliminated. - ARM GAS /tmp/ccPSMkLq.s page 39 + ARM GAS /tmp/cc7d48pz.s page 39 462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMC_CmdInitTypeDef sdmmc_cmdinit; 560 .loc 1 799 1 is_stmt 1 view -0 561 .cfi_startproc - ARM GAS /tmp/ccPSMkLq.s page 40 + ARM GAS /tmp/cc7d48pz.s page 40 562 @ args = 0, pretend = 0, frame = 24 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 599 .loc 1 811 16 is_stmt 0 view .LVU162 600 001c 2046 mov r0, r4 601 001e FFF7FEFF bl SDMMC_GetCmdError - ARM GAS /tmp/ccPSMkLq.s page 41 + ARM GAS /tmp/cc7d48pz.s page 41 602 .LVL45: @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 648 0010 5B0A lsrs r3, r3, #9 1198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 649 .loc 1 1198 12 view .LVU173 - ARM GAS /tmp/ccPSMkLq.s page 42 + ARM GAS /tmp/cc7d48pz.s page 42 650 0012 03FB02F2 mul r2, r3, r2 @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 688 .loc 1 1218 5 is_stmt 0 view .LVU189 689 003e A063 str r0, [r4, #56] 1220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } - ARM GAS /tmp/ccPSMkLq.s page 43 + ARM GAS /tmp/cc7d48pz.s page 43 690 .loc 1 1220 5 is_stmt 1 view .LVU190 @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 730 .LVL59: 1239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** { 731 .loc 1 1239 3 is_stmt 1 view .LVU205 - ARM GAS /tmp/ccPSMkLq.s page 44 + ARM GAS /tmp/cc7d48pz.s page 44 1239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** { @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** { 768 .loc 1 1271 10 is_stmt 0 view .LVU224 769 0092 13F4000F tst r3, #8388608 - ARM GAS /tmp/ccPSMkLq.s page 45 + ARM GAS /tmp/cc7d48pz.s page 45 770 0096 36D1 bne .L39 @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 806 00cc 36D1 bne .L48 1311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** { 807 .loc 1 1311 8 is_stmt 1 view .LVU243 - ARM GAS /tmp/ccPSMkLq.s page 46 + ARM GAS /tmp/cc7d48pz.s page 46 1311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** { @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 851 .L39: 1273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } 852 .loc 1 1273 12 view .LVU255 - ARM GAS /tmp/ccPSMkLq.s page 47 + ARM GAS /tmp/cc7d48pz.s page 47 853 0106 4FF48050 mov r0, #4096 @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 897 .L53: 898 0148 00000000 .word SystemCoreClock 899 014c D34D6210 .word 274877907 - ARM GAS /tmp/ccPSMkLq.s page 48 + ARM GAS /tmp/cc7d48pz.s page 48 900 0150 08E0FFFD .word -33562616 @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 944 0010 0023 movs r3, #0 945 0012 0493 str r3, [sp, #16] 519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); - ARM GAS /tmp/ccPSMkLq.s page 49 + ARM GAS /tmp/cc7d48pz.s page 49 946 .loc 1 519 3 is_stmt 1 view .LVU278 @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 991 .LCFI9: 992 .cfi_def_cfa_offset 12 993 .cfi_offset 4, -12 - ARM GAS /tmp/ccPSMkLq.s page 50 + ARM GAS /tmp/cc7d48pz.s page 50 994 .cfi_offset 5, -8 @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1031 0024 2946 mov r1, r5 1032 0026 2046 mov r0, r4 1033 0028 FFF7FEFF bl SDMMC_GetCmdResp1 - ARM GAS /tmp/ccPSMkLq.s page 51 + ARM GAS /tmp/cc7d48pz.s page 51 1034 .LVL71: @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1079 000a 0295 str r5, [sp, #8] 565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; 1080 .loc 1 565 3 is_stmt 1 view .LVU318 - ARM GAS /tmp/ccPSMkLq.s page 52 + ARM GAS /tmp/cc7d48pz.s page 52 565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1124 SDMMC_CmdWriteSingleBlock: 1125 .LVL76: 1126 .LFB157: - ARM GAS /tmp/ccPSMkLq.s page 53 + ARM GAS /tmp/cc7d48pz.s page 53 582:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMC_CmdInitTypeDef sdmmc_cmdinit; @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1165 001a 01A9 add r1, sp, #4 1166 .LVL77: 592:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - ARM GAS /tmp/ccPSMkLq.s page 54 + ARM GAS /tmp/cc7d48pz.s page 54 1167 .loc 1 592 9 view .LVU348 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1214 .loc 1 608 3 view .LVU357 611:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK; 1215 .loc 1 611 3 view .LVU358 - ARM GAS /tmp/ccPSMkLq.s page 55 + ARM GAS /tmp/cc7d48pz.s page 55 611:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK; @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1254 002e 30BD pop {r4, r5, pc} 622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 1255 .loc 1 622 1 view .LVU375 - ARM GAS /tmp/ccPSMkLq.s page 56 + ARM GAS /tmp/cc7d48pz.s page 56 1256 .cfi_endproc @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1300 0012 0493 str r3, [sp, #16] 639:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); 1301 .loc 1 639 3 is_stmt 1 view .LVU388 - ARM GAS /tmp/ccPSMkLq.s page 57 + ARM GAS /tmp/cc7d48pz.s page 57 639:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit); @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1347 .cfi_def_cfa_offset 12 1348 .cfi_offset 4, -12 1349 .cfi_offset 5, -8 - ARM GAS /tmp/ccPSMkLq.s page 58 + ARM GAS /tmp/cc7d48pz.s page 58 1350 .cfi_offset 14, -4 @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1387 0026 2046 mov r0, r4 1388 0028 FFF7FEFF bl SDMMC_GetCmdResp1 1389 .LVL91: - ARM GAS /tmp/ccPSMkLq.s page 59 + ARM GAS /tmp/cc7d48pz.s page 59 669:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; 1435 .loc 1 685 3 is_stmt 1 view .LVU428 685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - ARM GAS /tmp/ccPSMkLq.s page 60 + ARM GAS /tmp/cc7d48pz.s page 60 1436 .loc 1 685 34 is_stmt 0 view .LVU429 @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1480 .LVL96: 1481 .LFB162: 702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMC_CmdInitTypeDef sdmmc_cmdinit; - ARM GAS /tmp/ccPSMkLq.s page 61 + ARM GAS /tmp/cc7d48pz.s page 61 1482 .loc 1 702 1 is_stmt 1 view -0 @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1521 .LVL97: 712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 1522 .loc 1 712 9 view .LVU458 - ARM GAS /tmp/ccPSMkLq.s page 62 + ARM GAS /tmp/cc7d48pz.s page 62 1523 001c FFF7FEFF bl SDMMC_SendCommand @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE; 1570 .loc 1 731 3 view .LVU468 731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE; - ARM GAS /tmp/ccPSMkLq.s page 63 + ARM GAS /tmp/cc7d48pz.s page 63 1571 .loc 1 731 34 is_stmt 0 view .LVU469 @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1610 .LFE163: 1612 .section .text.SDMMC_CmdStopTransfer,"ax",%progbits 1613 .align 1 - ARM GAS /tmp/ccPSMkLq.s page 64 + ARM GAS /tmp/cc7d48pz.s page 64 1614 .global SDMMC_CmdStopTransfer @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1655 .loc 1 759 34 is_stmt 0 view .LVU498 1656 0014 4FF48063 mov r3, #1024 1657 0018 0593 str r3, [sp, #20] - ARM GAS /tmp/ccPSMkLq.s page 65 + ARM GAS /tmp/cc7d48pz.s page 65 760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1705 .cfi_offset 5, -8 1706 .cfi_offset 14, -4 1707 0002 87B0 sub sp, sp, #28 - ARM GAS /tmp/ccPSMkLq.s page 66 + ARM GAS /tmp/cc7d48pz.s page 66 1708 .LCFI40: @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 791:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 1745 .loc 1 791 1 is_stmt 0 view .LVU525 1746 002c 07B0 add sp, sp, #28 - ARM GAS /tmp/ccPSMkLq.s page 67 + ARM GAS /tmp/cc7d48pz.s page 67 1747 .LCFI41: @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1792 000e 0393 str r3, [sp, #12] 860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; 1793 .loc 1 860 3 is_stmt 1 view .LVU537 - ARM GAS /tmp/ccPSMkLq.s page 68 + ARM GAS /tmp/cc7d48pz.s page 68 860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1838 @ args = 0, pretend = 0, frame = 24 1839 @ frame_needed = 0, uses_anonymous_args = 0 905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMC_CmdInitTypeDef sdmmc_cmdinit; - ARM GAS /tmp/ccPSMkLq.s page 69 + ARM GAS /tmp/cc7d48pz.s page 69 1840 .loc 1 905 1 is_stmt 0 view .LVU550 @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 917:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 1879 .loc 1 917 3 is_stmt 1 view .LVU566 917:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - ARM GAS /tmp/ccPSMkLq.s page 70 + ARM GAS /tmp/cc7d48pz.s page 70 1880 .loc 1 917 16 is_stmt 0 view .LVU567 @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1927 0008 0193 str r3, [sp, #4] 934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; 1928 .loc 1 934 3 is_stmt 1 view .LVU577 - ARM GAS /tmp/ccPSMkLq.s page 71 + ARM GAS /tmp/cc7d48pz.s page 71 934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1970 .thumb 1971 .thumb_func 1973 SDMMC_CmdSetRelAddMmc: - ARM GAS /tmp/ccPSMkLq.s page 72 + ARM GAS /tmp/cc7d48pz.s page 72 1974 .LVL121: @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2013 0016 4FF48063 mov r3, #1024 2014 001a 0593 str r3, [sp, #20] 1037:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - ARM GAS /tmp/ccPSMkLq.s page 73 + ARM GAS /tmp/cc7d48pz.s page 73 2015 .loc 1 1037 3 is_stmt 1 view .LVU607 @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1053:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t errorstate; 2063 .loc 1 1053 3 is_stmt 1 view .LVU616 1054:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - ARM GAS /tmp/ccPSMkLq.s page 74 + ARM GAS /tmp/cc7d48pz.s page 74 2064 .loc 1 1054 3 view .LVU617 @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2101 .LCFI56: 2102 .cfi_def_cfa_offset 12 2103 @ sp needed - ARM GAS /tmp/ccPSMkLq.s page 75 + ARM GAS /tmp/cc7d48pz.s page 75 2104 002e 30BD pop {r4, r5, pc} @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2148 .loc 1 1082 3 is_stmt 1 view .LVU646 1082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; 2149 .loc 1 1082 34 is_stmt 0 view .LVU647 - ARM GAS /tmp/ccPSMkLq.s page 76 + ARM GAS /tmp/cc7d48pz.s page 76 2150 0012 0493 str r3, [sp, #16] @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2195 .cfi_def_cfa_offset 12 2196 .cfi_offset 4, -12 2197 .cfi_offset 5, -8 - ARM GAS /tmp/ccPSMkLq.s page 77 + ARM GAS /tmp/cc7d48pz.s page 77 2198 .cfi_offset 14, -4 @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2235 0026 2046 mov r0, r4 2236 0028 FFF7FEFF bl SDMMC_GetCmdResp1 2237 .LVL135: - ARM GAS /tmp/ccPSMkLq.s page 78 + ARM GAS /tmp/cc7d48pz.s page 78 1140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; 2283 .loc 1 1157 3 is_stmt 1 view .LVU687 1157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO; - ARM GAS /tmp/ccPSMkLq.s page 79 + ARM GAS /tmp/cc7d48pz.s page 79 2284 .loc 1 1157 34 is_stmt 0 view .LVU688 @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2328 .LVL140: 2329 .LFB182: 1327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t sta_reg; - ARM GAS /tmp/ccPSMkLq.s page 80 + ARM GAS /tmp/cc7d48pz.s page 80 2330 .loc 1 1327 1 is_stmt 1 view -0 @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2369 .loc 1 1343 7 is_stmt 0 view .LVU716 2370 002a 4B6B ldr r3, [r1, #52] 2371 .LVL144: - ARM GAS /tmp/ccPSMkLq.s page 81 + ARM GAS /tmp/cc7d48pz.s page 81 1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** { @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2410 .loc 1 1363 1 view .LVU732 2411 0050 7047 bx lr 2412 .L106: - ARM GAS /tmp/ccPSMkLq.s page 82 + ARM GAS /tmp/cc7d48pz.s page 82 2413 0052 00BF .align 2 @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2458 .loc 1 960 3 is_stmt 1 view .LVU743 960:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; 2459 .loc 1 960 34 is_stmt 0 view .LVU744 - ARM GAS /tmp/ccPSMkLq.s page 83 + ARM GAS /tmp/cc7d48pz.s page 83 2460 0012 0493 str r3, [sp, #16] @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2505 .cfi_offset 14, -4 2506 0002 86B0 sub sp, sp, #24 2507 .LCFI70: - ARM GAS /tmp/ccPSMkLq.s page 84 + ARM GAS /tmp/cc7d48pz.s page 84 2508 .cfi_def_cfa_offset 32 @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 993:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 2544 .loc 1 993 1 is_stmt 0 view .LVU774 2545 0026 06B0 add sp, sp, #24 - ARM GAS /tmp/ccPSMkLq.s page 85 + ARM GAS /tmp/cc7d48pz.s page 85 2546 .LCFI71: @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2591 001a 82B1 cbz r2, .L115 1383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) || 2592 .loc 1 1383 5 is_stmt 1 view .LVU786 - ARM GAS /tmp/ccPSMkLq.s page 86 + ARM GAS /tmp/cc7d48pz.s page 86 1383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) || @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2632 .L118: 2633 .align 2 2634 .L117: - ARM GAS /tmp/ccPSMkLq.s page 87 + ARM GAS /tmp/cc7d48pz.s page 87 2635 0044 00000000 .word SystemCoreClock @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; 2680 .loc 1 888 3 is_stmt 1 view .LVU813 888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE; - ARM GAS /tmp/ccPSMkLq.s page 88 + ARM GAS /tmp/cc7d48pz.s page 88 2681 .loc 1 888 34 is_stmt 0 view .LVU814 @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2726 .loc 1 1100 1 is_stmt 1 view -0 2727 .cfi_startproc 2728 @ args = 0, pretend = 0, frame = 24 - ARM GAS /tmp/ccPSMkLq.s page 89 + ARM GAS /tmp/cc7d48pz.s page 89 2729 @ frame_needed = 0, uses_anonymous_args = 0 @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2767 .LVL173: 1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 2768 .loc 1 1112 3 is_stmt 1 view .LVU842 - ARM GAS /tmp/ccPSMkLq.s page 90 + ARM GAS /tmp/cc7d48pz.s page 90 1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2815 0008 234B ldr r3, .L139 2816 000a 1B68 ldr r3, [r3] 2817 000c 234A ldr r2, .L139+4 - ARM GAS /tmp/ccPSMkLq.s page 91 + ARM GAS /tmp/cc7d48pz.s page 91 2818 .LVL176: @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2856 003a 13F0010F tst r3, #1 2857 003e 05D0 beq .L129 1437:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - ARM GAS /tmp/ccPSMkLq.s page 92 + ARM GAS /tmp/cc7d48pz.s page 92 2858 .loc 1 1437 5 is_stmt 1 view .LVU869 @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 2897 .loc 1 1456 17 is_stmt 0 view .LVU885 2898 005e 0021 movs r1, #0 - ARM GAS /tmp/ccPSMkLq.s page 93 + ARM GAS /tmp/cc7d48pz.s page 93 2899 0060 2846 mov r0, r5 @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 2938 008a F8BD pop {r3, r4, r5, r6, r7, pc} 2939 .LVL193: 2940 .L133: - ARM GAS /tmp/ccPSMkLq.s page 94 + ARM GAS /tmp/cc7d48pz.s page 94 1466:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** } @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 1008:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; 2989 .loc 1 1008 3 is_stmt 1 view .LVU909 1008:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT; - ARM GAS /tmp/ccPSMkLq.s page 95 + ARM GAS /tmp/cc7d48pz.s page 95 2990 .loc 1 1008 34 is_stmt 0 view .LVU910 @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 3031 .global SDMMC_GetCmdResp7 3032 .syntax unified 3033 .thumb - ARM GAS /tmp/ccPSMkLq.s page 96 + ARM GAS /tmp/cc7d48pz.s page 96 3034 .thumb_func @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 3075 0024 12F4006F tst r2, #2048 3076 0028 F5D1 bne .L145 1500:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** { - ARM GAS /tmp/ccPSMkLq.s page 97 + ARM GAS /tmp/cc7d48pz.s page 97 3077 .loc 1 1500 3 is_stmt 1 view .LVU939 @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 3115 004e 7047 bx lr 3116 .LVL207: 3117 .L150: - ARM GAS /tmp/ccPSMkLq.s page 98 + ARM GAS /tmp/cc7d48pz.s page 98 1510:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t errorstate; 3166 .loc 1 823 3 is_stmt 1 view .LVU964 824:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - ARM GAS /tmp/ccPSMkLq.s page 99 + ARM GAS /tmp/cc7d48pz.s page 99 3167 .loc 1 824 3 view .LVU965 @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccPSMkLq.s page 1 842:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** 3205 .loc 1 842 1 view .LVU982 3206 .cfi_endproc - ARM GAS /tmp/ccPSMkLq.s page 100 + ARM GAS /tmp/cc7d48pz.s page 100 3207 .LFE167: @@ -5949,115 +5949,115 @@ ARM GAS /tmp/ccPSMkLq.s page 1 3213 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" 3214 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" 3215 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h" - ARM GAS /tmp/ccPSMkLq.s page 101 + ARM GAS /tmp/cc7d48pz.s page 101 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_ll_sdmmc.c - /tmp/ccPSMkLq.s:20 .text.SDMMC_GetCmdError:00000000 $t - /tmp/ccPSMkLq.s:25 .text.SDMMC_GetCmdError:00000000 SDMMC_GetCmdError - /tmp/ccPSMkLq.s:80 .text.SDMMC_GetCmdError:00000030 $d - /tmp/ccPSMkLq.s:86 .text.SDMMC_Init:00000000 $t - /tmp/ccPSMkLq.s:92 .text.SDMMC_Init:00000000 SDMMC_Init - /tmp/ccPSMkLq.s:156 .text.SDMMC_Init:00000030 $d - /tmp/ccPSMkLq.s:161 .text.SDMMC_ReadFIFO:00000000 $t - /tmp/ccPSMkLq.s:167 .text.SDMMC_ReadFIFO:00000000 SDMMC_ReadFIFO - /tmp/ccPSMkLq.s:185 .text.SDMMC_WriteFIFO:00000000 $t - /tmp/ccPSMkLq.s:191 .text.SDMMC_WriteFIFO:00000000 SDMMC_WriteFIFO - /tmp/ccPSMkLq.s:214 .text.SDMMC_PowerState_ON:00000000 $t - /tmp/ccPSMkLq.s:220 .text.SDMMC_PowerState_ON:00000000 SDMMC_PowerState_ON - /tmp/ccPSMkLq.s:242 .text.SDMMC_PowerState_OFF:00000000 $t - /tmp/ccPSMkLq.s:248 .text.SDMMC_PowerState_OFF:00000000 SDMMC_PowerState_OFF - /tmp/ccPSMkLq.s:271 .text.SDMMC_GetPowerState:00000000 $t - /tmp/ccPSMkLq.s:277 .text.SDMMC_GetPowerState:00000000 SDMMC_GetPowerState - /tmp/ccPSMkLq.s:296 .text.SDMMC_SendCommand:00000000 $t - /tmp/ccPSMkLq.s:302 .text.SDMMC_SendCommand:00000000 SDMMC_SendCommand - /tmp/ccPSMkLq.s:354 .text.SDMMC_GetCommandResponse:00000000 $t - /tmp/ccPSMkLq.s:360 .text.SDMMC_GetCommandResponse:00000000 SDMMC_GetCommandResponse - /tmp/ccPSMkLq.s:379 .text.SDMMC_GetResponse:00000000 $t - /tmp/ccPSMkLq.s:385 .text.SDMMC_GetResponse:00000000 SDMMC_GetResponse - /tmp/ccPSMkLq.s:409 .text.SDMMC_ConfigData:00000000 $t - /tmp/ccPSMkLq.s:415 .text.SDMMC_ConfigData:00000000 SDMMC_ConfigData - /tmp/ccPSMkLq.s:473 .text.SDMMC_GetDataCounter:00000000 $t - /tmp/ccPSMkLq.s:479 .text.SDMMC_GetDataCounter:00000000 SDMMC_GetDataCounter - /tmp/ccPSMkLq.s:497 .text.SDMMC_GetFIFOCount:00000000 $t - /tmp/ccPSMkLq.s:503 .text.SDMMC_GetFIFOCount:00000000 SDMMC_GetFIFOCount - /tmp/ccPSMkLq.s:521 .text.SDMMC_SetSDMMCReadWaitMode:00000000 $t - /tmp/ccPSMkLq.s:527 .text.SDMMC_SetSDMMCReadWaitMode:00000000 SDMMC_SetSDMMCReadWaitMode - /tmp/ccPSMkLq.s:551 .text.SDMMC_CmdGoIdleState:00000000 $t - /tmp/ccPSMkLq.s:557 .text.SDMMC_CmdGoIdleState:00000000 SDMMC_CmdGoIdleState - /tmp/ccPSMkLq.s:615 .text.SDMMC_GetCmdResp1:00000000 $t - /tmp/ccPSMkLq.s:621 .text.SDMMC_GetCmdResp1:00000000 SDMMC_GetCmdResp1 - /tmp/ccPSMkLq.s:898 .text.SDMMC_GetCmdResp1:00000148 $d - /tmp/ccPSMkLq.s:905 .text.SDMMC_CmdBlockLength:00000000 $t - /tmp/ccPSMkLq.s:911 .text.SDMMC_CmdBlockLength:00000000 SDMMC_CmdBlockLength - /tmp/ccPSMkLq.s:976 .text.SDMMC_CmdReadSingleBlock:00000000 $t - /tmp/ccPSMkLq.s:982 .text.SDMMC_CmdReadSingleBlock:00000000 SDMMC_CmdReadSingleBlock - /tmp/ccPSMkLq.s:1047 .text.SDMMC_CmdReadMultiBlock:00000000 $t - /tmp/ccPSMkLq.s:1053 .text.SDMMC_CmdReadMultiBlock:00000000 SDMMC_CmdReadMultiBlock - /tmp/ccPSMkLq.s:1118 .text.SDMMC_CmdWriteSingleBlock:00000000 $t - /tmp/ccPSMkLq.s:1124 .text.SDMMC_CmdWriteSingleBlock:00000000 SDMMC_CmdWriteSingleBlock - /tmp/ccPSMkLq.s:1189 .text.SDMMC_CmdWriteMultiBlock:00000000 $t - /tmp/ccPSMkLq.s:1195 .text.SDMMC_CmdWriteMultiBlock:00000000 SDMMC_CmdWriteMultiBlock - /tmp/ccPSMkLq.s:1260 .text.SDMMC_CmdSDEraseStartAdd:00000000 $t - /tmp/ccPSMkLq.s:1266 .text.SDMMC_CmdSDEraseStartAdd:00000000 SDMMC_CmdSDEraseStartAdd - /tmp/ccPSMkLq.s:1331 .text.SDMMC_CmdSDEraseEndAdd:00000000 $t - /tmp/ccPSMkLq.s:1337 .text.SDMMC_CmdSDEraseEndAdd:00000000 SDMMC_CmdSDEraseEndAdd - /tmp/ccPSMkLq.s:1402 .text.SDMMC_CmdEraseStartAdd:00000000 $t - /tmp/ccPSMkLq.s:1408 .text.SDMMC_CmdEraseStartAdd:00000000 SDMMC_CmdEraseStartAdd - /tmp/ccPSMkLq.s:1473 .text.SDMMC_CmdEraseEndAdd:00000000 $t - /tmp/ccPSMkLq.s:1479 .text.SDMMC_CmdEraseEndAdd:00000000 SDMMC_CmdEraseEndAdd - /tmp/ccPSMkLq.s:1544 .text.SDMMC_CmdErase:00000000 $t - /tmp/ccPSMkLq.s:1550 .text.SDMMC_CmdErase:00000000 SDMMC_CmdErase - ARM GAS /tmp/ccPSMkLq.s page 102 + /tmp/cc7d48pz.s:20 .text.SDMMC_GetCmdError:00000000 $t + /tmp/cc7d48pz.s:25 .text.SDMMC_GetCmdError:00000000 SDMMC_GetCmdError + /tmp/cc7d48pz.s:80 .text.SDMMC_GetCmdError:00000030 $d + /tmp/cc7d48pz.s:86 .text.SDMMC_Init:00000000 $t + /tmp/cc7d48pz.s:92 .text.SDMMC_Init:00000000 SDMMC_Init + /tmp/cc7d48pz.s:156 .text.SDMMC_Init:00000030 $d + /tmp/cc7d48pz.s:161 .text.SDMMC_ReadFIFO:00000000 $t + /tmp/cc7d48pz.s:167 .text.SDMMC_ReadFIFO:00000000 SDMMC_ReadFIFO + /tmp/cc7d48pz.s:185 .text.SDMMC_WriteFIFO:00000000 $t + /tmp/cc7d48pz.s:191 .text.SDMMC_WriteFIFO:00000000 SDMMC_WriteFIFO + /tmp/cc7d48pz.s:214 .text.SDMMC_PowerState_ON:00000000 $t + /tmp/cc7d48pz.s:220 .text.SDMMC_PowerState_ON:00000000 SDMMC_PowerState_ON + /tmp/cc7d48pz.s:242 .text.SDMMC_PowerState_OFF:00000000 $t + /tmp/cc7d48pz.s:248 .text.SDMMC_PowerState_OFF:00000000 SDMMC_PowerState_OFF + /tmp/cc7d48pz.s:271 .text.SDMMC_GetPowerState:00000000 $t + /tmp/cc7d48pz.s:277 .text.SDMMC_GetPowerState:00000000 SDMMC_GetPowerState + /tmp/cc7d48pz.s:296 .text.SDMMC_SendCommand:00000000 $t + /tmp/cc7d48pz.s:302 .text.SDMMC_SendCommand:00000000 SDMMC_SendCommand + /tmp/cc7d48pz.s:354 .text.SDMMC_GetCommandResponse:00000000 $t + /tmp/cc7d48pz.s:360 .text.SDMMC_GetCommandResponse:00000000 SDMMC_GetCommandResponse + /tmp/cc7d48pz.s:379 .text.SDMMC_GetResponse:00000000 $t + /tmp/cc7d48pz.s:385 .text.SDMMC_GetResponse:00000000 SDMMC_GetResponse + /tmp/cc7d48pz.s:409 .text.SDMMC_ConfigData:00000000 $t + /tmp/cc7d48pz.s:415 .text.SDMMC_ConfigData:00000000 SDMMC_ConfigData + /tmp/cc7d48pz.s:473 .text.SDMMC_GetDataCounter:00000000 $t + /tmp/cc7d48pz.s:479 .text.SDMMC_GetDataCounter:00000000 SDMMC_GetDataCounter + /tmp/cc7d48pz.s:497 .text.SDMMC_GetFIFOCount:00000000 $t + /tmp/cc7d48pz.s:503 .text.SDMMC_GetFIFOCount:00000000 SDMMC_GetFIFOCount + /tmp/cc7d48pz.s:521 .text.SDMMC_SetSDMMCReadWaitMode:00000000 $t + /tmp/cc7d48pz.s:527 .text.SDMMC_SetSDMMCReadWaitMode:00000000 SDMMC_SetSDMMCReadWaitMode + /tmp/cc7d48pz.s:551 .text.SDMMC_CmdGoIdleState:00000000 $t + /tmp/cc7d48pz.s:557 .text.SDMMC_CmdGoIdleState:00000000 SDMMC_CmdGoIdleState + /tmp/cc7d48pz.s:615 .text.SDMMC_GetCmdResp1:00000000 $t + /tmp/cc7d48pz.s:621 .text.SDMMC_GetCmdResp1:00000000 SDMMC_GetCmdResp1 + /tmp/cc7d48pz.s:898 .text.SDMMC_GetCmdResp1:00000148 $d + /tmp/cc7d48pz.s:905 .text.SDMMC_CmdBlockLength:00000000 $t + /tmp/cc7d48pz.s:911 .text.SDMMC_CmdBlockLength:00000000 SDMMC_CmdBlockLength + /tmp/cc7d48pz.s:976 .text.SDMMC_CmdReadSingleBlock:00000000 $t + /tmp/cc7d48pz.s:982 .text.SDMMC_CmdReadSingleBlock:00000000 SDMMC_CmdReadSingleBlock + /tmp/cc7d48pz.s:1047 .text.SDMMC_CmdReadMultiBlock:00000000 $t + /tmp/cc7d48pz.s:1053 .text.SDMMC_CmdReadMultiBlock:00000000 SDMMC_CmdReadMultiBlock + /tmp/cc7d48pz.s:1118 .text.SDMMC_CmdWriteSingleBlock:00000000 $t + /tmp/cc7d48pz.s:1124 .text.SDMMC_CmdWriteSingleBlock:00000000 SDMMC_CmdWriteSingleBlock + /tmp/cc7d48pz.s:1189 .text.SDMMC_CmdWriteMultiBlock:00000000 $t + /tmp/cc7d48pz.s:1195 .text.SDMMC_CmdWriteMultiBlock:00000000 SDMMC_CmdWriteMultiBlock + /tmp/cc7d48pz.s:1260 .text.SDMMC_CmdSDEraseStartAdd:00000000 $t + /tmp/cc7d48pz.s:1266 .text.SDMMC_CmdSDEraseStartAdd:00000000 SDMMC_CmdSDEraseStartAdd + /tmp/cc7d48pz.s:1331 .text.SDMMC_CmdSDEraseEndAdd:00000000 $t + /tmp/cc7d48pz.s:1337 .text.SDMMC_CmdSDEraseEndAdd:00000000 SDMMC_CmdSDEraseEndAdd + /tmp/cc7d48pz.s:1402 .text.SDMMC_CmdEraseStartAdd:00000000 $t + /tmp/cc7d48pz.s:1408 .text.SDMMC_CmdEraseStartAdd:00000000 SDMMC_CmdEraseStartAdd + /tmp/cc7d48pz.s:1473 .text.SDMMC_CmdEraseEndAdd:00000000 $t + /tmp/cc7d48pz.s:1479 .text.SDMMC_CmdEraseEndAdd:00000000 SDMMC_CmdEraseEndAdd + /tmp/cc7d48pz.s:1544 .text.SDMMC_CmdErase:00000000 $t + /tmp/cc7d48pz.s:1550 .text.SDMMC_CmdErase:00000000 SDMMC_CmdErase + ARM GAS /tmp/cc7d48pz.s page 102 - /tmp/ccPSMkLq.s:1613 .text.SDMMC_CmdStopTransfer:00000000 $t - /tmp/ccPSMkLq.s:1619 .text.SDMMC_CmdStopTransfer:00000000 SDMMC_CmdStopTransfer - /tmp/ccPSMkLq.s:1682 .text.SDMMC_CmdStopTransfer:00000030 $d - /tmp/ccPSMkLq.s:1687 .text.SDMMC_CmdSelDesel:00000000 $t - /tmp/ccPSMkLq.s:1693 .text.SDMMC_CmdSelDesel:00000000 SDMMC_CmdSelDesel - /tmp/ccPSMkLq.s:1756 .text.SDMMC_CmdAppCommand:00000000 $t - /tmp/ccPSMkLq.s:1762 .text.SDMMC_CmdAppCommand:00000000 SDMMC_CmdAppCommand - /tmp/ccPSMkLq.s:1827 .text.SDMMC_CmdBusWidth:00000000 $t - /tmp/ccPSMkLq.s:1833 .text.SDMMC_CmdBusWidth:00000000 SDMMC_CmdBusWidth - /tmp/ccPSMkLq.s:1898 .text.SDMMC_CmdSendSCR:00000000 $t - /tmp/ccPSMkLq.s:1904 .text.SDMMC_CmdSendSCR:00000000 SDMMC_CmdSendSCR - /tmp/ccPSMkLq.s:1967 .text.SDMMC_CmdSetRelAddMmc:00000000 $t - /tmp/ccPSMkLq.s:1973 .text.SDMMC_CmdSetRelAddMmc:00000000 SDMMC_CmdSetRelAddMmc - /tmp/ccPSMkLq.s:2039 .text.SDMMC_CmdSendStatus:00000000 $t - /tmp/ccPSMkLq.s:2045 .text.SDMMC_CmdSendStatus:00000000 SDMMC_CmdSendStatus - /tmp/ccPSMkLq.s:2110 .text.SDMMC_CmdStatusRegister:00000000 $t - /tmp/ccPSMkLq.s:2116 .text.SDMMC_CmdStatusRegister:00000000 SDMMC_CmdStatusRegister - /tmp/ccPSMkLq.s:2179 .text.SDMMC_CmdSwitch:00000000 $t - /tmp/ccPSMkLq.s:2185 .text.SDMMC_CmdSwitch:00000000 SDMMC_CmdSwitch - /tmp/ccPSMkLq.s:2250 .text.SDMMC_CmdSendEXTCSD:00000000 $t - /tmp/ccPSMkLq.s:2256 .text.SDMMC_CmdSendEXTCSD:00000000 SDMMC_CmdSendEXTCSD - /tmp/ccPSMkLq.s:2321 .text.SDMMC_GetCmdResp2:00000000 $t - /tmp/ccPSMkLq.s:2327 .text.SDMMC_GetCmdResp2:00000000 SDMMC_GetCmdResp2 - /tmp/ccPSMkLq.s:2415 .text.SDMMC_GetCmdResp2:00000054 $d - /tmp/ccPSMkLq.s:2421 .text.SDMMC_CmdSendCID:00000000 $t - /tmp/ccPSMkLq.s:2427 .text.SDMMC_CmdSendCID:00000000 SDMMC_CmdSendCID - /tmp/ccPSMkLq.s:2487 .text.SDMMC_CmdSendCSD:00000000 $t - /tmp/ccPSMkLq.s:2493 .text.SDMMC_CmdSendCSD:00000000 SDMMC_CmdSendCSD - /tmp/ccPSMkLq.s:2555 .text.SDMMC_GetCmdResp3:00000000 $t - /tmp/ccPSMkLq.s:2561 .text.SDMMC_GetCmdResp3:00000000 SDMMC_GetCmdResp3 - /tmp/ccPSMkLq.s:2635 .text.SDMMC_GetCmdResp3:00000044 $d - /tmp/ccPSMkLq.s:2641 .text.SDMMC_CmdAppOperCommand:00000000 $t - /tmp/ccPSMkLq.s:2647 .text.SDMMC_CmdAppOperCommand:00000000 SDMMC_CmdAppOperCommand - /tmp/ccPSMkLq.s:2712 .text.SDMMC_CmdAppOperCommand:00000030 $d - /tmp/ccPSMkLq.s:2717 .text.SDMMC_CmdOpCondition:00000000 $t - /tmp/ccPSMkLq.s:2723 .text.SDMMC_CmdOpCondition:00000000 SDMMC_CmdOpCondition - /tmp/ccPSMkLq.s:2785 .text.SDMMC_GetCmdResp6:00000000 $t - /tmp/ccPSMkLq.s:2791 .text.SDMMC_GetCmdResp6:00000000 SDMMC_GetCmdResp6 - /tmp/ccPSMkLq.s:2951 .text.SDMMC_GetCmdResp6:00000098 $d - /tmp/ccPSMkLq.s:2957 .text.SDMMC_CmdSetRelAdd:00000000 $t - /tmp/ccPSMkLq.s:2963 .text.SDMMC_CmdSetRelAdd:00000000 SDMMC_CmdSetRelAdd - /tmp/ccPSMkLq.s:3030 .text.SDMMC_GetCmdResp7:00000000 $t - /tmp/ccPSMkLq.s:3036 .text.SDMMC_GetCmdResp7:00000000 SDMMC_GetCmdResp7 - /tmp/ccPSMkLq.s:3137 .text.SDMMC_GetCmdResp7:0000005c $d - /tmp/ccPSMkLq.s:3143 .text.SDMMC_CmdOperCond:00000000 $t - /tmp/ccPSMkLq.s:3149 .text.SDMMC_CmdOperCond:00000000 SDMMC_CmdOperCond + /tmp/cc7d48pz.s:1613 .text.SDMMC_CmdStopTransfer:00000000 $t + /tmp/cc7d48pz.s:1619 .text.SDMMC_CmdStopTransfer:00000000 SDMMC_CmdStopTransfer + /tmp/cc7d48pz.s:1682 .text.SDMMC_CmdStopTransfer:00000030 $d + /tmp/cc7d48pz.s:1687 .text.SDMMC_CmdSelDesel:00000000 $t + /tmp/cc7d48pz.s:1693 .text.SDMMC_CmdSelDesel:00000000 SDMMC_CmdSelDesel + /tmp/cc7d48pz.s:1756 .text.SDMMC_CmdAppCommand:00000000 $t + /tmp/cc7d48pz.s:1762 .text.SDMMC_CmdAppCommand:00000000 SDMMC_CmdAppCommand + /tmp/cc7d48pz.s:1827 .text.SDMMC_CmdBusWidth:00000000 $t + /tmp/cc7d48pz.s:1833 .text.SDMMC_CmdBusWidth:00000000 SDMMC_CmdBusWidth + /tmp/cc7d48pz.s:1898 .text.SDMMC_CmdSendSCR:00000000 $t + /tmp/cc7d48pz.s:1904 .text.SDMMC_CmdSendSCR:00000000 SDMMC_CmdSendSCR + /tmp/cc7d48pz.s:1967 .text.SDMMC_CmdSetRelAddMmc:00000000 $t + /tmp/cc7d48pz.s:1973 .text.SDMMC_CmdSetRelAddMmc:00000000 SDMMC_CmdSetRelAddMmc + /tmp/cc7d48pz.s:2039 .text.SDMMC_CmdSendStatus:00000000 $t + /tmp/cc7d48pz.s:2045 .text.SDMMC_CmdSendStatus:00000000 SDMMC_CmdSendStatus + /tmp/cc7d48pz.s:2110 .text.SDMMC_CmdStatusRegister:00000000 $t + /tmp/cc7d48pz.s:2116 .text.SDMMC_CmdStatusRegister:00000000 SDMMC_CmdStatusRegister + /tmp/cc7d48pz.s:2179 .text.SDMMC_CmdSwitch:00000000 $t + /tmp/cc7d48pz.s:2185 .text.SDMMC_CmdSwitch:00000000 SDMMC_CmdSwitch + /tmp/cc7d48pz.s:2250 .text.SDMMC_CmdSendEXTCSD:00000000 $t + /tmp/cc7d48pz.s:2256 .text.SDMMC_CmdSendEXTCSD:00000000 SDMMC_CmdSendEXTCSD + /tmp/cc7d48pz.s:2321 .text.SDMMC_GetCmdResp2:00000000 $t + /tmp/cc7d48pz.s:2327 .text.SDMMC_GetCmdResp2:00000000 SDMMC_GetCmdResp2 + /tmp/cc7d48pz.s:2415 .text.SDMMC_GetCmdResp2:00000054 $d + /tmp/cc7d48pz.s:2421 .text.SDMMC_CmdSendCID:00000000 $t + /tmp/cc7d48pz.s:2427 .text.SDMMC_CmdSendCID:00000000 SDMMC_CmdSendCID + /tmp/cc7d48pz.s:2487 .text.SDMMC_CmdSendCSD:00000000 $t + /tmp/cc7d48pz.s:2493 .text.SDMMC_CmdSendCSD:00000000 SDMMC_CmdSendCSD + /tmp/cc7d48pz.s:2555 .text.SDMMC_GetCmdResp3:00000000 $t + /tmp/cc7d48pz.s:2561 .text.SDMMC_GetCmdResp3:00000000 SDMMC_GetCmdResp3 + /tmp/cc7d48pz.s:2635 .text.SDMMC_GetCmdResp3:00000044 $d + /tmp/cc7d48pz.s:2641 .text.SDMMC_CmdAppOperCommand:00000000 $t + /tmp/cc7d48pz.s:2647 .text.SDMMC_CmdAppOperCommand:00000000 SDMMC_CmdAppOperCommand + /tmp/cc7d48pz.s:2712 .text.SDMMC_CmdAppOperCommand:00000030 $d + /tmp/cc7d48pz.s:2717 .text.SDMMC_CmdOpCondition:00000000 $t + /tmp/cc7d48pz.s:2723 .text.SDMMC_CmdOpCondition:00000000 SDMMC_CmdOpCondition + /tmp/cc7d48pz.s:2785 .text.SDMMC_GetCmdResp6:00000000 $t + /tmp/cc7d48pz.s:2791 .text.SDMMC_GetCmdResp6:00000000 SDMMC_GetCmdResp6 + /tmp/cc7d48pz.s:2951 .text.SDMMC_GetCmdResp6:00000098 $d + /tmp/cc7d48pz.s:2957 .text.SDMMC_CmdSetRelAdd:00000000 $t + /tmp/cc7d48pz.s:2963 .text.SDMMC_CmdSetRelAdd:00000000 SDMMC_CmdSetRelAdd + /tmp/cc7d48pz.s:3030 .text.SDMMC_GetCmdResp7:00000000 $t + /tmp/cc7d48pz.s:3036 .text.SDMMC_GetCmdResp7:00000000 SDMMC_GetCmdResp7 + /tmp/cc7d48pz.s:3137 .text.SDMMC_GetCmdResp7:0000005c $d + /tmp/cc7d48pz.s:3143 .text.SDMMC_CmdOperCond:00000000 $t + /tmp/cc7d48pz.s:3149 .text.SDMMC_CmdOperCond:00000000 SDMMC_CmdOperCond UNDEFINED SYMBOLS SystemCoreClock diff --git a/build/stm32f7xx_ll_sdmmc.o b/build/stm32f7xx_ll_sdmmc.o index f354821531f54a54df0cac13b0cd57fd4dc6ff9b..486141d665a1b7d21504debd1124489af577dae7 100644 GIT binary patch delta 2030 zcmZ8h4@{J082_H{`;LEiaQDISaRNsiut51MBB(`aou&)#a54)=6xOX)7T`(Y|@e70pil8uG%zaX620OoYT!T=ajiNmuvmr?>;KK?Rnq#dEVdidw%cp zzW1G&kateV-I=ntW0`4dH+WTTdlcN+rW>Q}Kp9J= z>Dsifg*(@D9oo}8Va=)R5-C12C~4Et6U$Q5RkaC`vdna2v@7V6rPg$9S|2a9<&c%v z*b0irAkotF&(<~Jt~OnVc0=&AnXXe(cJoiRV$xZO&!-Js9Pie3An1Eb{uh|n<2cQ* zbNxredY z7XfTf$fw2p)g+)O0+7;?AT zYck&hiq@)eBrZt&N?;0ZnQG8yr_SVXQWxuvAocPG4ztXw>QvE%8^B$IIlK5c0O?$! znSkfjA^{M$y%`3;Yg&Lpd`8PaPj6~L8t1x16P%_N3h)6G{8SX};_k#?rZ^zU|4~*7 zWr;Bew#FICvXVB^QSM6;jHi>jXfszkO~!M|G{M*&D@m;|Fm^fvG>dOJ1voZ2fbvbr zV!bUnNQF$gSZC@7B6rxVOc&_~t&-FWL;5AX6M%*k(Tlc}AnoRxDIz7t6`&9KZI@VY zbp>Wt3(--^qwU-uk6^$dL`SxbJGzYMuP~>DbEotm|LBw!y3a+af@^VVPejUb*=S^= zU6S5_IWO@2)F2+@>uCbkm9~*Cb3(d#?5%Q%(0vT0Mn$;`{7iZ<^G)=WTIEMI@{(LCSZs-s6a#bKn=j80nL~&U zL^3Nfg4Do$8A9yoi~|^(9}{Cr=4S;)$~aYulyq>oVD30PO&TYkc#gD0(kWHE#W5cA zBt>0IG31g*r*GNiaf7GaQx@sd$7Gb=3yxiaCxzF0@+r(AkNMx)L`K(Rbv$pFdxEcc zo^=@-+R3=?HiUyP6m91@S%Ut>tojJVN5&JiLP0bPkdu5i%Uy2dS5k#ILpe4|BbzHk zH%chU_(B3M;n_;^T8WfY;|QK?o!mSt+g)l9ILPSu1|+Y8xi5+)ILP}P&}c%UD!QT5 zMZu~Xt>}pGe3GrF8GqIv{w-Ao>@Q%UOg;Q#_8%qcf<+7b;qPizs|kVDU{iBLu{W^# zt(K-{ZmLZWch~N$mM=Air}Zt9M zBx_&#sfrsg*6|?5My5l4dY6}A+`{`Y?%{hFLp*Q5Psg|i;}~BZ@XME0a_OK?zP*w= zFg;w!=LdacW6xnfz8$MDq69{i2pc8Bem-&7#>c{5c7$zg8}jlinCmbPU=9s=cMRG1 zA>8UAmA%7NG{il_e)@*5VjSb?BYy54R=IPe13@z)XyeKvXqh}74w3~jOVgcNs{I80T~O0J(5IZ3RkeGrXHZ= z2-AHel}BON=Q&Ho{=UdhOMF)BgM2#jMJt&|;)vl-?* zfogjkXPLj@vr)dnE+|mi744*6JIlOLp!O(QyB;qvKNRuXiWVm%dKQ~I!nwqpKQ$8M zG2tWxshPAAht_xDBc zW`q`PScJ2T(5B7g2j+~jZK9;yNJ?66IKrhysA?0UWSJ30XtyvW({dxUXvcY}C4<6v zvn4nGOGq>|{&V!B2sas_P5Vjkv>2gXQr_V!mVDA!iO!)nI6vCu(14(?O*yBqZpC#r zz~WEwDgf5;-ssd2V0#Eq2_0UT-OCrFvmJk73e;xO>GQD9f}xgTs;G*qV+``DP;DO$ zyF!3{F*&q=KYt9!3jwmBzy$-tZvd2VlGW(`sjADnfx}BMbT79W-A}4|_oKM>VHj#V ztd(i4K+)@J6p05Ce+4iFuS}Jgvt47d*=ZX)YytX^ciW6MtJQ2Vg}cDrhS|6Ac>of) zKr;Y~)I0&$ho{>E1E5ax(->dUQZdtUEkIYfI@SOut5XH|1R8!Knr`FH*g%?7D3kxA ztPsj#Bam#4(v_vh?V^6}iW7_@aXV=zSJ(~4@0BTnu{BbXnqgpUv-@c}-?IyFWV|2k z8{@@(Z+w8Vm>goC<~R|0!wt$bQGU`aNk?HQzv*ZLpf*9wq9q|f7kNBElteiF)X5D_ zvF~vDix&yeVak)^{5Tp(zfFh^9qVuO1G3j)c8N0+_oIF|v59`?yd=T3Bx!$0%6VBI z`4@igE1@xj^VXhgL(P-6+pa38WpsOsQFZQd5?O zWTstc;<1!nG>5BQ2FnV$P_S5HB`E@C|AjkUf#O4WMwncDh~QDRCEt=5&Pg)`!7yNbtn+R(B4a;cmC_+iE9$>X8n7-Z0k$ z-*V4!>Ka-}f9@8f128mg;+g4!{-yMlAxJstpQsrM!eM}%<8RYlC3<}sm5Mu*;Gi&c zxI#>$fa3K3kbq10Y$f@1iIgP$3T}^socxT(Rj3o#NT2u)6mNmKu81Mn$U7fs3?Wt( z({Rug!K&(`*dF5f$m2+UB*5SO+o}lIt6-rtEja3VSP;Bi8Bj~s`0Hx(mn^KP%zvS_ zuD-EiZDUhoL;dQSrOm50`2%ZeSNm%MwRN?D{Q3R{f1tLhF;G)6XErZho}$iMIM2ru zuXuv(%UddBb$w9oS|;-!-4?Fv_R1;ixvRUJiuliNA9;DsMIs1ikbDXZMSit^Gb;d)C5Z{a!RpJnN&I zTo3;%55rG#AHB1LPENR, Periphs); 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** - ARM GAS /tmp/cczBZbME.s page 18 + ARM GAS /tmp/ccVg7Rz4.s page 18 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cczBZbME.s page 1 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. - ARM GAS /tmp/cczBZbME.s page 19 + ARM GAS /tmp/ccVg7Rz4.s page 19 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0). @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cczBZbME.s page 1 775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs) 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { - ARM GAS /tmp/cczBZbME.s page 20 + ARM GAS /tmp/ccVg7Rz4.s page 20 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2RSTR, Periphs); @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cczBZbME.s page 1 832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2LPENR, Periphs); 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs); - ARM GAS /tmp/cczBZbME.s page 21 + ARM GAS /tmp/ccVg7Rz4.s page 21 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cczBZbME.s page 1 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** - ARM GAS /tmp/cczBZbME.s page 22 + ARM GAS /tmp/ccVg7Rz4.s page 22 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cczBZbME.s page 1 946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI - ARM GAS /tmp/cczBZbME.s page 23 + ARM GAS /tmp/ccVg7Rz4.s page 23 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB1 peripherals clock. 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n 1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n - ARM GAS /tmp/cczBZbME.s page 24 + ARM GAS /tmp/ccVg7Rz4.s page 24 1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_EnableClock\n @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) 1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) 1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR - ARM GAS /tmp/cczBZbME.s page 25 + ARM GAS /tmp/ccVg7Rz4.s page 25 1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 - ARM GAS /tmp/cczBZbME.s page 26 + ARM GAS /tmp/ccVg7Rz4.s page 26 1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n 1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n 1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_DisableClock\n - ARM GAS /tmp/cczBZbME.s page 27 + ARM GAS /tmp/ccVg7Rz4.s page 27 1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_DisableClock\n @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n 1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ForceReset\n 1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ForceReset\n - ARM GAS /tmp/cczBZbME.s page 28 + ARM GAS /tmp/ccVg7Rz4.s page 28 1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ForceReset\n @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7 1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8 - ARM GAS /tmp/cczBZbME.s page 29 + ARM GAS /tmp/ccVg7Rz4.s page 29 1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) 1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 - ARM GAS /tmp/cczBZbME.s page 30 + ARM GAS /tmp/ccVg7Rz4.s page 30 1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_EnableClockLowPower\n 1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_EnableClockLowPower\n 1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR RTCLPEN LL_APB1_GRP1_EnableClockLowPower - ARM GAS /tmp/cczBZbME.s page 31 + ARM GAS /tmp/ccVg7Rz4.s page 31 1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM13LPEN LL_APB1_GRP1_DisableClockLowPower\n 1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM14LPEN LL_APB1_GRP1_DisableClockLowPower\n 1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_DisableClockLowPower\n - ARM GAS /tmp/cczBZbME.s page 32 + ARM GAS /tmp/ccVg7Rz4.s page 32 1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR WWDGLPEN LL_APB1_GRP1_DisableClockLowPower\n @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ - ARM GAS /tmp/cczBZbME.s page 33 + ARM GAS /tmp/ccVg7Rz4.s page 33 1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClockLowPower(uint32_t Periphs) @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) - ARM GAS /tmp/cczBZbME.s page 34 + ARM GAS /tmp/ccVg7Rz4.s page 34 1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC1 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC2 (*) 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 - ARM GAS /tmp/cczBZbME.s page 35 + ARM GAS /tmp/ccVg7Rz4.s page 35 1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 - ARM GAS /tmp/cczBZbME.s page 36 + ARM GAS /tmp/ccVg7Rz4.s page 36 1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC1 @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART6 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC - ARM GAS /tmp/cczBZbME.s page 37 + ARM GAS /tmp/ccVg7Rz4.s page 37 1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC1 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR TIM10RST LL_APB2_GRP1_ReleaseReset\n 1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR TIM11RST LL_APB2_GRP1_ReleaseReset\n 1788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR SPI5RST LL_APB2_GRP1_ReleaseReset\n - ARM GAS /tmp/cczBZbME.s page 38 + ARM GAS /tmp/ccVg7Rz4.s page 38 1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR SPI6RST LL_APB2_GRP1_ReleaseReset\n @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cczBZbME.s page 1 119 .LVL11: 149:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** } 120 .loc 1 149 12 view .LVU29 - ARM GAS /tmp/cczBZbME.s page 39 + ARM GAS /tmp/ccVg7Rz4.s page 39 121 0040 E3E7 b .L2 @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cczBZbME.s page 1 162 .loc 2 1297 3 view .LVU42 163 005a 02F5FE32 add r2, r2, #130048 164 005e 116A ldr r1, [r2, #32] - ARM GAS /tmp/cczBZbME.s page 40 + ARM GAS /tmp/ccVg7Rz4.s page 40 165 0060 41F40041 orr r1, r1, #32768 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 207 .loc 2 1825 22 view .LVU55 208 .LBB49: - ARM GAS /tmp/cczBZbME.s page 41 + ARM GAS /tmp/ccVg7Rz4.s page 41 209 .loc 2 1827 3 view .LVU56 @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cczBZbME.s page 1 253 00a0 BFE7 b .L6 254 .LVL24: 255 .L14: - ARM GAS /tmp/cczBZbME.s page 42 + ARM GAS /tmp/ccVg7Rz4.s page 42 204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cczBZbME.s page 1 302 .section .text.LL_SPI_Init,"ax",%progbits 303 .align 1 304 .global LL_SPI_Init - ARM GAS /tmp/cczBZbME.s page 43 + ARM GAS /tmp/ccVg7Rz4.s page 43 305 .syntax unified @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cczBZbME.s page 1 332 .LBB58: 333 .LBI58: 334 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h" - ARM GAS /tmp/cczBZbME.s page 44 + ARM GAS /tmp/ccVg7Rz4.s page 44 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cczBZbME.s page 1 55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t TransferDirection; /*!< Specifies the SPI unidirectional or bidirectional data mod 56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_TRANSFER_M 57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/cczBZbME.s page 45 + ARM GAS /tmp/ccVg7Rz4.s page 45 58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cczBZbME.s page 1 112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported constants --------------------------------------------------------*/ 114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_Exported_Constants SPI Exported Constants - ARM GAS /tmp/cczBZbME.s page 46 + ARM GAS /tmp/ccVg7Rz4.s page 46 115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cczBZbME.s page 1 169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_POLARITY Clock Polarity - ARM GAS /tmp/cczBZbME.s page 47 + ARM GAS /tmp/ccVg7Rz4.s page 47 172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cczBZbME.s page 1 226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_DATAWIDTH_4BIT (SPI_CR2_DS_0 | SPI_CR2_DS_1) - ARM GAS /tmp/cczBZbME.s page 48 + ARM GAS /tmp/ccVg7Rz4.s page 48 229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_DATAWIDTH_5BIT (SPI_CR2_DS_2) @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cczBZbME.s page 1 283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_TX_FIFO TX FIFO Level - ARM GAS /tmp/cczBZbME.s page 49 + ARM GAS /tmp/ccVg7Rz4.s page 49 286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cczBZbME.s page 1 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/cczBZbME.s page 50 + ARM GAS /tmp/ccVg7Rz4.s page 50 343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported functions --------------------------------------------------------*/ @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cczBZbME.s page 1 347 .LCFI0: 348 .cfi_def_cfa_offset 4 349 .cfi_offset 4, -4 - ARM GAS /tmp/cczBZbME.s page 51 + ARM GAS /tmp/ccVg7Rz4.s page 51 350 .LVL30: @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cczBZbME.s page 1 379 003c B1F816C0 ldrh ip, [r1, #22] 380 0040 40EA0C00 orr r0, r0, ip 381 0044 0243 orrs r2, r2, r0 - ARM GAS /tmp/cczBZbME.s page 52 + ARM GAS /tmp/ccVg7Rz4.s page 52 382 0046 5A60 str r2, [r3, #4] @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cczBZbME.s page 1 420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Standard This parameter can be one of the following values: 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PROTOCOL_MOTOROLA - ARM GAS /tmp/cczBZbME.s page 53 + ARM GAS /tmp/ccVg7Rz4.s page 53 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PROTOCOL_TI @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cczBZbME.s page 1 477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CPOL LL_SPI_SetClockPolarity 478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param ClockPolarity This parameter can be one of the following values: - ARM GAS /tmp/cczBZbME.s page 54 + ARM GAS /tmp/ccVg7Rz4.s page 54 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_POLARITY_LOW @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cczBZbME.s page 1 534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128 535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/cczBZbME.s page 55 + ARM GAS /tmp/ccVg7Rz4.s page 55 537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx) @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cczBZbME.s page 1 591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get transfer direction mode 592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 RXONLY LL_SPI_GetTransferDirection\n 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIMODE LL_SPI_GetTransferDirection\n - ARM GAS /tmp/cczBZbME.s page 56 + ARM GAS /tmp/ccVg7Rz4.s page 56 594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIOE LL_SPI_GetTransferDirection @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cczBZbME.s page 1 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_15BIT 649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_16BIT 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/cczBZbME.s page 57 + ARM GAS /tmp/ccVg7Rz4.s page 57 651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx) @@ -3418,7 +3418,7 @@ ARM GAS /tmp/cczBZbME.s page 1 414 .loc 1 290 3 is_stmt 1 view .LVU114 415 0062 DA69 ldr r2, [r3, #28] 416 0064 22F40062 bic r2, r2, #2048 - ARM GAS /tmp/cczBZbME.s page 58 + ARM GAS /tmp/ccVg7Rz4.s page 58 417 0068 DA61 str r2, [r3, #28] @@ -3478,7 +3478,7 @@ ARM GAS /tmp/cczBZbME.s page 1 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/cczBZbME.s page 59 + ARM GAS /tmp/ccVg7Rz4.s page 59 704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable CRC @@ -3538,7 +3538,7 @@ ARM GAS /tmp/cczBZbME.s page 1 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CRCNEXT LL_SPI_SetCRCNext 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None - ARM GAS /tmp/cczBZbME.s page 60 + ARM GAS /tmp/ccVg7Rz4.s page 60 761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -3598,7 +3598,7 @@ ARM GAS /tmp/cczBZbME.s page 1 467 .L28: 468 .align 2 469 .L27: - ARM GAS /tmp/cczBZbME.s page 61 + ARM GAS /tmp/ccVg7Rz4.s page 61 470 0084 4000FFFF .word -65472 @@ -3658,7 +3658,7 @@ ARM GAS /tmp/cczBZbME.s page 1 309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** SPI_InitStruct->BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2; 510 .loc 1 309 3 is_stmt 1 view .LVU142 511 .loc 1 309 37 is_stmt 0 view .LVU143 - ARM GAS /tmp/cczBZbME.s page 62 + ARM GAS /tmp/ccVg7Rz4.s page 62 512 0012 8361 str r3, [r0, #24] @@ -3718,7 +3718,7 @@ ARM GAS /tmp/cczBZbME.s page 1 340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** SPI_I2SCFGR_I2SCFG | SPI_I2SCFGR_I2SMOD ) 341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** 342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** #define I2S_I2SPR_CLEAR_MASK 0x0002U - ARM GAS /tmp/cczBZbME.s page 63 + ARM GAS /tmp/ccVg7Rz4.s page 63 343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /** @@ -3778,7 +3778,7 @@ ARM GAS /tmp/cczBZbME.s page 1 397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * @brief De-initialize the SPI/I2S registers to their default reset values. 398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * @param SPIx SPI Instance 399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * @retval An ErrorStatus enumeration value: - ARM GAS /tmp/cczBZbME.s page 64 + ARM GAS /tmp/ccVg7Rz4.s page 64 400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * - SUCCESS: SPI registers are de-initialized @@ -3838,7 +3838,7 @@ ARM GAS /tmp/cczBZbME.s page 1 574 .cfi_def_cfa_offset 24 575 .cfi_offset 3, -24 576 .cfi_offset 4, -20 - ARM GAS /tmp/cczBZbME.s page 65 + ARM GAS /tmp/ccVg7Rz4.s page 65 577 .cfi_offset 5, -16 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/cczBZbME.s page 1 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx) - ARM GAS /tmp/cczBZbME.s page 66 + ARM GAS /tmp/ccVg7Rz4.s page 66 797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -3958,7 +3958,7 @@ ARM GAS /tmp/cczBZbME.s page 1 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U); 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (Ssm | Ssoe); 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/cczBZbME.s page 67 + ARM GAS /tmp/ccVg7Rz4.s page 67 854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -4018,7 +4018,7 @@ ARM GAS /tmp/cczBZbME.s page 1 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/cczBZbME.s page 68 + ARM GAS /tmp/ccVg7Rz4.s page 68 911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if Tx buffer is empty @@ -4078,7 +4078,7 @@ ARM GAS /tmp/cczBZbME.s page 1 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx) - ARM GAS /tmp/cczBZbME.s page 69 + ARM GAS /tmp/ccVg7Rz4.s page 69 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -4138,7 +4138,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/cczBZbME.s page 70 + ARM GAS /tmp/ccVg7Rz4.s page 70 1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear mode fault error flag @@ -4198,7 +4198,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable error interrupt 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR - ARM GAS /tmp/cczBZbME.s page 71 + ARM GAS /tmp/ccVg7Rz4.s page 71 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR @@ -4258,7 +4258,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable Tx buffer empty interrupt 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXEIE LL_SPI_DisableIT_TXE - ARM GAS /tmp/cczBZbME.s page 72 + ARM GAS /tmp/ccVg7Rz4.s page 72 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance @@ -4318,7 +4318,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx) 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/cczBZbME.s page 73 + ARM GAS /tmp/ccVg7Rz4.s page 73 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN); @@ -4378,7 +4378,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL); 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - ARM GAS /tmp/cczBZbME.s page 74 + ARM GAS /tmp/ccVg7Rz4.s page 74 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -4438,7 +4438,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get the data register address used for DMA transfer - ARM GAS /tmp/cczBZbME.s page 75 + ARM GAS /tmp/ccVg7Rz4.s page 75 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_DMA_GetRegAddr @@ -4498,7 +4498,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/cczBZbME.s page 76 + ARM GAS /tmp/ccVg7Rz4.s page 76 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write 16-Bits in the data register @@ -4558,7 +4558,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief I2S Init structure definition 1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/cczBZbME.s page 77 + ARM GAS /tmp/ccVg7Rz4.s page 77 1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -4618,7 +4618,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_SR_RXNE LL_SPI_SR_RXNE /*!< Rx buffer not empty flag 1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_SR_TXE LL_SPI_SR_TXE /*!< Tx buffer empty flag 1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_SR_BSY LL_SPI_SR_BSY /*!< Busy flag - ARM GAS /tmp/cczBZbME.s page 78 + ARM GAS /tmp/ccVg7Rz4.s page 78 1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_SR_UDR SPI_SR_UDR /*!< Underrun flag @@ -4678,7 +4678,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0) /*!< Slave 1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1) /*!< Maste 1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_MODE_MASTER_RX (SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1) /*!< Maste - ARM GAS /tmp/cczBZbME.s page 79 + ARM GAS /tmp/ccVg7Rz4.s page 79 1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -4738,7 +4738,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** - ARM GAS /tmp/cczBZbME.s page 80 + ARM GAS /tmp/ccVg7Rz4.s page 80 1595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write a value in I2S register @@ -4798,7 +4798,7 @@ ARM GAS /tmp/cczBZbME.s page 1 1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SE); 1650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/cczBZbME.s page 81 + ARM GAS /tmp/ccVg7Rz4.s page 81 1652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -4858,7 +4858,7 @@ ARM GAS /tmp/cczBZbME.s page 1 452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** 453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /*---------------------------- SPIx I2SPR Configuration ---------------------- 454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * Configure SPIx I2SPR with parameters: - ARM GAS /tmp/cczBZbME.s page 82 + ARM GAS /tmp/ccVg7Rz4.s page 82 455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * - MCLKOutput: SPI_I2SPR_MCKOE bit @@ -4918,7 +4918,7 @@ ARM GAS /tmp/cczBZbME.s page 1 480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** { 481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /* MCLK output is enabled */ 482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** tmp = (((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U); - ARM GAS /tmp/cczBZbME.s page 83 + ARM GAS /tmp/ccVg7Rz4.s page 83 483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** } @@ -4978,7 +4978,7 @@ ARM GAS /tmp/cczBZbME.s page 1 692 006a 1202 lsls r2, r2, #8 693 .LVL56: 694 .L34: - ARM GAS /tmp/cczBZbME.s page 84 + ARM GAS /tmp/ccVg7Rz4.s page 84 501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** } @@ -5038,7 +5038,7 @@ ARM GAS /tmp/cczBZbME.s page 1 729 0084 000A lsrs r0, r0, #8 730 .LVL63: 482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** } - ARM GAS /tmp/cczBZbME.s page 85 + ARM GAS /tmp/ccVg7Rz4.s page 85 731 .loc 1 482 40 view .LVU220 @@ -5098,7 +5098,7 @@ ARM GAS /tmp/cczBZbME.s page 1 778 .LVL70: 779 .LFB456: 518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** - ARM GAS /tmp/cczBZbME.s page 86 + ARM GAS /tmp/ccVg7Rz4.s page 86 519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /** @@ -5158,7 +5158,7 @@ ARM GAS /tmp/cczBZbME.s page 1 535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** 536:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /** 537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * @brief Set linear and parity prescaler. - ARM GAS /tmp/cczBZbME.s page 87 + ARM GAS /tmp/ccVg7Rz4.s page 87 538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * @note To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n @@ -5206,28 +5206,28 @@ ARM GAS /tmp/cczBZbME.s page 1 844 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 845 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" 846 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - ARM GAS /tmp/cczBZbME.s page 88 + ARM GAS /tmp/ccVg7Rz4.s page 88 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_ll_spi.c - /tmp/cczBZbME.s:20 .text.LL_SPI_DeInit:00000000 $t - /tmp/cczBZbME.s:26 .text.LL_SPI_DeInit:00000000 LL_SPI_DeInit - /tmp/cczBZbME.s:292 .text.LL_SPI_DeInit:000000b8 $d - /tmp/cczBZbME.s:303 .text.LL_SPI_Init:00000000 $t - /tmp/cczBZbME.s:309 .text.LL_SPI_Init:00000000 LL_SPI_Init - /tmp/cczBZbME.s:470 .text.LL_SPI_Init:00000084 $d - /tmp/cczBZbME.s:476 .text.LL_SPI_StructInit:00000000 $t - /tmp/cczBZbME.s:482 .text.LL_SPI_StructInit:00000000 LL_SPI_StructInit - /tmp/cczBZbME.s:529 .text.LL_I2S_DeInit:00000000 $t - /tmp/cczBZbME.s:535 .text.LL_I2S_DeInit:00000000 LL_I2S_DeInit - /tmp/cczBZbME.s:558 .text.LL_I2S_Init:00000000 $t - /tmp/cczBZbME.s:564 .text.LL_I2S_Init:00000000 LL_I2S_Init - /tmp/cczBZbME.s:765 .text.LL_I2S_Init:000000a4 $d - /tmp/cczBZbME.s:771 .text.LL_I2S_StructInit:00000000 $t - /tmp/cczBZbME.s:777 .text.LL_I2S_StructInit:00000000 LL_I2S_StructInit - /tmp/cczBZbME.s:811 .text.LL_I2S_ConfigPrescaler:00000000 $t - /tmp/cczBZbME.s:817 .text.LL_I2S_ConfigPrescaler:00000000 LL_I2S_ConfigPrescaler + /tmp/ccVg7Rz4.s:20 .text.LL_SPI_DeInit:00000000 $t + /tmp/ccVg7Rz4.s:26 .text.LL_SPI_DeInit:00000000 LL_SPI_DeInit + /tmp/ccVg7Rz4.s:292 .text.LL_SPI_DeInit:000000b8 $d + /tmp/ccVg7Rz4.s:303 .text.LL_SPI_Init:00000000 $t + /tmp/ccVg7Rz4.s:309 .text.LL_SPI_Init:00000000 LL_SPI_Init + /tmp/ccVg7Rz4.s:470 .text.LL_SPI_Init:00000084 $d + /tmp/ccVg7Rz4.s:476 .text.LL_SPI_StructInit:00000000 $t + /tmp/ccVg7Rz4.s:482 .text.LL_SPI_StructInit:00000000 LL_SPI_StructInit + /tmp/ccVg7Rz4.s:529 .text.LL_I2S_DeInit:00000000 $t + /tmp/ccVg7Rz4.s:535 .text.LL_I2S_DeInit:00000000 LL_I2S_DeInit + /tmp/ccVg7Rz4.s:558 .text.LL_I2S_Init:00000000 $t + /tmp/ccVg7Rz4.s:564 .text.LL_I2S_Init:00000000 LL_I2S_Init + /tmp/ccVg7Rz4.s:765 .text.LL_I2S_Init:000000a4 $d + /tmp/ccVg7Rz4.s:771 .text.LL_I2S_StructInit:00000000 $t + /tmp/ccVg7Rz4.s:777 .text.LL_I2S_StructInit:00000000 LL_I2S_StructInit + /tmp/ccVg7Rz4.s:811 .text.LL_I2S_ConfigPrescaler:00000000 $t + /tmp/ccVg7Rz4.s:817 .text.LL_I2S_ConfigPrescaler:00000000 LL_I2S_ConfigPrescaler UNDEFINED SYMBOLS LL_RCC_GetI2SClockFreq diff --git a/build/stm32f7xx_ll_spi.o b/build/stm32f7xx_ll_spi.o index a2eb649a4004cfe90d626826d06c42878d2f56e8..bfd961466f4935b9ca25a0fb411cafc53b7d1e44 100644 GIT binary patch delta 1068 zcmX|;TS!z<6o&WZTxQ&7@{HNk#N?=_%Sh(rL>G0&gzQRDq7Q{WjFlCH8l?z@7LjFv zkt`}RG>f8$po=~v6hzTOba~ODhXR9&UJANFK~`%`a~jxd^Zn~z|2pT)p?$CRp2+2O zH}hJB`lT^ujbL#EoEK9vn+0P+GyCY`#uj)e3WHM+xT<8q}sOMWKPF{>2Xna*YUVK%5n>I;`^)F}0(%Nx}t>T5E+ zuP$GCISRUKNUBrx^oGk@)pfY9MfnJP(Te#Vn5lR9+bE*Xb=YbU?&{(EwKUi7sv(sm z*MQ5p%&LLk`t%YVZEVsVT*{ej!OOTN_oG#Kw9iPH5xLO24n1};7P;8^_g$FngDPW& zT|?rEv}oCfp~EN)+c++3(_+XjB}}F<*RF*}#;htI4TA2*sS)~DdtKJl0~#7|*`rny zUv$}0&xo(OY^xerYR0nfV~SZ6c!S}Z&^-2J{z*co8RJ=S+jPV`0k6#lgk_#`z6}m~ zs(BDzc$!dI?wuF9jAOiz8~ECc<=_$RjQdT-0v|Ov?p@$ykzssxQfI6m_n*X*|1qUi zkd0S4L3ryOh>c@|clvlA-t-&8Ls`BI#`01joe>H-iL*!XIKiRejJKTU!Wk=+GlBcX z2P44cO7s_W)9?plF@1OznF^y;N%>|Rl6#HmoJ4tnY!r*q63S(f4kANh#*_a|LzYpq zpcdBnLiozteFZ#gsK@u%55wVDc63K`V?(r|b$9cw`eQ5!=o27c76gv~uLBQZzsn$6f?N~=rQ;>RLrN(BA_1}Mb% delta 1125 zcmZ8fX-HI26u$S}_ukBSXX;ILHfZb3l{6hTqp52N}~pwJH~2wEXX>zrv`KYDP_<@?U}edpc#-rHT>yAP-H z?&}#l6ggdE%sHYm_L;+JC28U@g)v37J*1862jH=iozjdzyuqU8rL;0^D7F~_sXLG$ zDwI?KRU$V}MMnFoxc8I5Ysf*=Yu_xKD7WGa?Yo7i$a8Q*_$OT@*H6XW8*}+2Q{k(~ z?Yu+unBwk;(Pi>8?%KFzULjnkA@{_v!6*3y0)uc&PgM2z*iV_$ipK?REE4#7RqG$R}`5OUsOs zuh(Kdaxba+ES%1qZ7{A)EzUt1n{XG0awej<>6b(&N)@}h5|293Ckh;^QDbbxA_|>< z?}Zr!P^qUHZA31QlTPCbbm-Y>MQ9f_anfVd6ReBFbfXKN>N6?}$OxJhCr5CWIBsE8 zek4<$h3#@1;jcVAel$?Lb`b7TL?qW;syKBBzEajIg#QF$tV`7BFbgH z^MrJP8PESUbx}&qtS(sP^5Bs-yRvx6z!BFo_j>=9aI@)eG($oE>Xm_N|Jq=vDIC}m zj)q&B8fvR{)NeNRUS$kc8RH%4275ff_C<_+9W z`;@{1aJhI5-vDF9{k#r(OImpmB$ck=7r?|i3b(NC1g&fie*k%9UOpSvmCfSS(2n&Q hoWuGHUSORI-(yVb{8>}d3mFT=z7^dJ-uT~*{Q;0#*);$F diff --git a/build/stm32f7xx_ll_tim.lst b/build/stm32f7xx_ll_tim.lst index 909c510..91a60ee 100644 --- a/build/stm32f7xx_ll_tim.lst +++ b/build/stm32f7xx_ll_tim.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccqfGNRw.s page 1 +ARM GAS /tmp/ccNvm23w.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /** @addtogroup STM32F7xx_LL_Driver 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @{ - ARM GAS /tmp/ccqfGNRw.s page 2 + ARM GAS /tmp/ccNvm23w.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** */ @@ -118,7 +118,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV2) \ 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV4) \ 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV8)) - ARM GAS /tmp/ccqfGNRw.s page 3 + ARM GAS /tmp/ccNvm23w.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_BREAK_FILTER_FDIV8_N6) \ 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_BREAK_FILTER_FDIV8_N8) \ 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_BREAK_FILTER_FDIV16_N5) \ - ARM GAS /tmp/ccqfGNRw.s page 4 + ARM GAS /tmp/ccNvm23w.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_BREAK_FILTER_FDIV16_N6) \ @@ -238,7 +238,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Exported functions --------------------------------------------------------*/ 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /** @addtogroup TIM_LL_Exported_Functions 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @{ - ARM GAS /tmp/ccqfGNRw.s page 5 + ARM GAS /tmp/ccNvm23w.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** */ @@ -298,7 +298,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6); 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6); 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** } - ARM GAS /tmp/ccqfGNRw.s page 6 + ARM GAS /tmp/ccNvm23w.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** #endif /* TIM6 */ @@ -358,7 +358,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM14); 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** } 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** #endif /* TIM14 */ - ARM GAS /tmp/ccqfGNRw.s page 7 + ARM GAS /tmp/ccNvm23w.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** else @@ -418,7 +418,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** } 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Write to TIMx CR1 */ - ARM GAS /tmp/ccqfGNRw.s page 8 + ARM GAS /tmp/ccNvm23w.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR1, tmpcr1); @@ -478,7 +478,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - SUCCESS: TIMx output channel is initialized 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - ERROR: TIMx output channel is not initialized 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** */ - ARM GAS /tmp/ccqfGNRw.s page 9 + ARM GAS /tmp/ccNvm23w.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC @@ -538,7 +538,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH4 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * structure) - ARM GAS /tmp/ccqfGNRw.s page 10 + ARM GAS /tmp/ccNvm23w.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: @@ -598,7 +598,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - ERROR: not applicable - ARM GAS /tmp/ccqfGNRw.s page 11 + ARM GAS /tmp/ccNvm23w.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** */ @@ -658,7 +658,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** return SUCCESS; 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** } 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** - ARM GAS /tmp/ccqfGNRw.s page 12 + ARM GAS /tmp/ccNvm23w.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Get the TIMx CCMR1 register value */ - ARM GAS /tmp/ccqfGNRw.s page 13 + ARM GAS /tmp/ccNvm23w.s page 13 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); @@ -778,7 +778,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * to their default values. 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * data structure) - ARM GAS /tmp/ccqfGNRw.s page 14 + ARM GAS /tmp/ccNvm23w.s page 14 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @retval None @@ -838,7 +838,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); - ARM GAS /tmp/ccqfGNRw.s page 15 + ARM GAS /tmp/ccNvm23w.s page 15 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); @@ -898,7 +898,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 38 .cfi_offset 5, -8 39 .cfi_offset 6, -4 817:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** uint32_t tmpccmr1; - ARM GAS /tmp/ccqfGNRw.s page 16 + ARM GAS /tmp/ccNvm23w.s page 16 40 .loc 1 817 3 is_stmt 1 view .LVU2 @@ -958,7 +958,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 68 .LVL4: 69 .loc 1 843 3 is_stmt 0 view .LVU18 70 0016 2C43 orrs r4, r4, r5 - ARM GAS /tmp/ccqfGNRw.s page 17 + ARM GAS /tmp/ccNvm23w.s page 17 71 .LVL5: @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 106 003e 23F00403 bic r3, r3, #4 107 .LVL12: 108 .loc 1 862 5 is_stmt 0 view .LVU32 - ARM GAS /tmp/ccqfGNRw.s page 18 + ARM GAS /tmp/ccNvm23w.s page 18 109 0042 8D68 ldr r5, [r1, #8] @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Copyright (c) 2017 STMicroelectronics. 10:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * All rights reserved. 11:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - ARM GAS /tmp/ccqfGNRw.s page 19 + ARM GAS /tmp/ccNvm23w.s page 19 12:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * This software is licensed under terms that can be found in the LICENSE file @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 6: OC4M, OC4FE, OC4PE */ 67:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 7: OC5M, OC5FE, OC5PE */ 68:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U /* 8: OC6M, OC6FE, OC6PE */ - ARM GAS /tmp/ccqfGNRw.s page 20 + ARM GAS /tmp/ccNvm23w.s page 20 69:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }; @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIMx_AF1_BKINP TIM1_AF1_BKINP /*!< BRK BKIN input polarity */ 124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* TIM_BREAK_INPUT_SUPPORT */ 125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccqfGNRw.s page 21 + ARM GAS /tmp/ccNvm23w.s page 21 126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Remap mask definitions */ @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 - ARM GAS /tmp/ccqfGNRw.s page 22 + ARM GAS /tmp/ccNvm23w.s page 22 183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval none @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - the number of half PWM period in center-aligned mode 238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** GP timers: this parameter must be a number between Min_Data = 0x 239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Max_Data = 0xFF. - ARM GAS /tmp/ccqfGNRw.s page 23 + ARM GAS /tmp/ccNvm23w.s page 23 240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Advanced timers: this parameter must be a number between Min_Dat @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. 296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. - ARM GAS /tmp/ccqfGNRw.s page 24 + ARM GAS /tmp/ccNvm23w.s page 24 297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source 353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. - ARM GAS /tmp/ccqfGNRw.s page 25 + ARM GAS /tmp/ccNvm23w.s page 25 354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. 409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Prescaler must be set to get a maximum counter period longer th 410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** time interval between 2 consecutive changes on the Hall inputs. - ARM GAS /tmp/ccqfGNRw.s page 26 + ARM GAS /tmp/ccNvm23w.s page 26 411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetDeadTime() 467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccqfGNRw.s page 27 + ARM GAS /tmp/ccNvm23w.s page 27 468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve 523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ 524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccqfGNRw.s page 28 + ARM GAS /tmp/ccNvm23w.s page 28 525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK2_ENABLE Break2 Enable 580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccqfGNRw.s page 29 + ARM GAS /tmp/ccNvm23w.s page 29 582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_DISABLE 0x00000000U /*!< Break2 function disabled */ @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /*!< Counter used as downcounte 637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_0 /*!< The counter counts up and 638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_1 /*!< The counter counts up and - ARM GAS /tmp/ccqfGNRw.s page 30 + ARM GAS /tmp/ccNvm23w.s page 30 639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /*!< The counter counts up and @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1 - ARM GAS /tmp/ccqfGNRw.s page 31 + ARM GAS /tmp/ccNvm23w.s page 31 696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1N TIM_CCER_CC1NE /*!< Timer complementary output ch @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_HIGH 0x00000000U /*!< OCxactive high*/ - ARM GAS /tmp/ccqfGNRw.s page 32 + ARM GAS /tmp/ccNvm23w.s page 32 753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/ @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV2_N8 ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_0) << 16U) 808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV4_N6 ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1) << 16U) 809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV4_N8 ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC - ARM GAS /tmp/ccqfGNRw.s page 33 + ARM GAS /tmp/ccNvm23w.s page 33 810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV8_N6 (TIM_CCMR1_IC1F_3 << 16U) @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccqfGNRw.s page 34 + ARM GAS /tmp/ccNvm23w.s page 34 867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TRGO2 Trigger Output 2 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_POLARITY_INVERTED TIM_SMCR_ETP /*!< ETR is inverted, active 922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} - ARM GAS /tmp/ccqfGNRw.s page 35 + ARM GAS /tmp/ccNvm23w.s page 35 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV2_N8 0x00050000U /*!< fSAMPLING=fDTS/2, N=8 */ 979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV4_N6 0x00060000U /*!< fSAMPLING=fDTS/4, N=6 */ 980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV4_N8 0x00070000U /*!< fSAMPLING=fDTS/4, N=8 */ - ARM GAS /tmp/ccqfGNRw.s page 36 + ARM GAS /tmp/ccNvm23w.s page 36 981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV8_N6 0x00080000U /*!< fSAMPLING=fDTS/8, N=6 */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSR_DISABLE 0x00000000U /*!< When inactive, OCx/OCxN - ARM GAS /tmp/ccqfGNRw.s page 37 + ARM GAS /tmp/ccNvm23w.s page 37 1038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSR_ENABLE TIM_BDTR_OSSR /*!< When inactive, OC/OCN o @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_BDTR (TIM_DCR_DBA_4 | TIM_DCR_DBA_0) 1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_OR (TIM_DCR_DBA_4 | TIM_DCR_DBA_2) 1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR3 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0) - ARM GAS /tmp/ccqfGNRw.s page 38 + ARM GAS /tmp/ccNvm23w.s page 38 1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR5 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1) @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccqfGNRw.s page 39 + ARM GAS /tmp/ccNvm23w.s page 39 1152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (READ_BIT((__CNT__), TIM_CNT_UIFCPY) >> TIM_CNT_UIFCPY_Pos) 1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccqfGNRw.s page 40 + ARM GAS /tmp/ccNvm23w.s page 40 1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested de @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \ 1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ 1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) - ARM GAS /tmp/ccqfGNRw.s page 41 + ARM GAS /tmp/ccNvm23w.s page 41 1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_DisableCounter 1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccqfGNRw.s page 42 + ARM GAS /tmp/ccNvm23w.s page 42 1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Counter overflow/underflow 1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Setting the UG bit 1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Update generation through the slave mode controller - ARM GAS /tmp/ccqfGNRw.s page 43 + ARM GAS /tmp/ccNvm23w.s page 43 1380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the timer counter counting mode. 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to - ARM GAS /tmp/ccqfGNRw.s page 44 + ARM GAS /tmp/ccNvm23w.s page 44 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx) - ARM GAS /tmp/ccqfGNRw.s page 45 + ARM GAS /tmp/ccNvm23w.s page 45 1494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 1549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 1550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 - ARM GAS /tmp/ccqfGNRw.s page 46 + ARM GAS /tmp/ccNvm23w.s page 46 1551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Prescaler between Min_Data=0 and Max_Data=65535 1606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 1607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccqfGNRw.s page 47 + ARM GAS /tmp/ccNvm23w.s page 47 1608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler) @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter) 1664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccqfGNRw.s page 48 + ARM GAS /tmp/ccNvm23w.s page 48 1665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->RCR, RepetitionCounter); @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration 1720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 1721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccqfGNRw.s page 49 + ARM GAS /tmp/ccNvm23w.s page 49 1722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccqfGNRw.s page 50 + ARM GAS /tmp/ccNvm23w.s page 50 1779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger of the capture/compare DMA request. @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_EnableChannel\n 1834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_EnableChannel 1835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccqfGNRw.s page 51 + ARM GAS /tmp/ccNvm23w.s page 51 1836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_IsEnabledChannel\n 1891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_IsEnabledChannel\n 1892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_IsEnabledChannel - ARM GAS /tmp/ccqfGNRw.s page 52 + ARM GAS /tmp/ccNvm23w.s page 52 1893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW 1948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH 1949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccqfGNRw.s page 53 + ARM GAS /tmp/ccNvm23w.s page 53 1950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the output compare mode of an output channel. 2005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n 2006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_GetMode\n - ARM GAS /tmp/ccqfGNRw.s page 54 + ARM GAS /tmp/ccNvm23w.s page 54 2007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_GetMode\n @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 - ARM GAS /tmp/ccqfGNRw.s page 55 + ARM GAS /tmp/ccNvm23w.s page 55 2064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values: @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_SetIdleState\n 2119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_SetIdleState\n 2120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS5 LL_TIM_OC_SetIdleState\n - ARM GAS /tmp/ccqfGNRw.s page 56 + ARM GAS /tmp/ccNvm23w.s page 56 2121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_SetIdleState @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable fast mode for the output channel. - ARM GAS /tmp/ccqfGNRw.s page 57 + ARM GAS /tmp/ccNvm23w.s page 57 2178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Acts only if the channel is configured in PWM1 or PWM2 mode. @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n 2233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n 2234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n - ARM GAS /tmp/ccqfGNRw.s page 58 + ARM GAS /tmp/ccNvm23w.s page 58 2235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_IsEnabledFast\n @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 - ARM GAS /tmp/ccqfGNRw.s page 59 + ARM GAS /tmp/ccNvm23w.s page 59 2292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 - ARM GAS /tmp/ccqfGNRw.s page 60 + ARM GAS /tmp/ccNvm23w.s page 60 2349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 - ARM GAS /tmp/ccqfGNRw.s page 61 + ARM GAS /tmp/ccNvm23w.s page 61 2406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 883:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** return SUCCESS; 149 .loc 1 883 3 view .LVU46 - ARM GAS /tmp/ccqfGNRw.s page 62 + ARM GAS /tmp/ccNvm23w.s page 62 884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** } @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 193 .loc 1 896 3 is_stmt 1 view .LVU52 897:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** uint32_t tmpccer; 194 .loc 1 897 3 view .LVU53 - ARM GAS /tmp/ccqfGNRw.s page 63 + ARM GAS /tmp/ccNvm23w.s page 63 898:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** uint32_t tmpcr2; @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 224 .LVL27: 923:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 924:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Set the Output Compare Polarity */ - ARM GAS /tmp/ccqfGNRw.s page 64 + ARM GAS /tmp/ccNvm23w.s page 64 925:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC2P, TIM_OCInitStruct->OCPolarity << 4U); @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 262 .loc 1 941 5 is_stmt 0 view .LVU83 263 0048 8D68 ldr r5, [r1, #8] 264 .loc 1 941 5 view .LVU84 - ARM GAS /tmp/ccqfGNRw.s page 65 + ARM GAS /tmp/ccNvm23w.s page 65 265 004a 43EA8513 orr r3, r3, r5, lsl #6 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccqfGNRw.s page 66 + ARM GAS /tmp/ccNvm23w.s page 66 2460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 3 configuration data structure 969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized - ARM GAS /tmp/ccqfGNRw.s page 67 + ARM GAS /tmp/ccNvm23w.s page 67 971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - ERROR: not applicable @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Get the TIMx CCMR2 register value */ 995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); 366 .loc 1 995 3 is_stmt 1 view .LVU116 - ARM GAS /tmp/ccqfGNRw.s page 68 + ARM GAS /tmp/ccNvm23w.s page 68 367 .loc 1 995 12 is_stmt 0 view .LVU117 @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); 404 .loc 1 1013 5 view .LVU130 1014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); - ARM GAS /tmp/ccqfGNRw.s page 69 + ARM GAS /tmp/ccNvm23w.s page 69 405 .loc 1 1014 5 view .LVU131 @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 440 0062 C461 str r4, [r0, #28] 1034:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 1035:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Set the Capture Compare Register value */ - ARM GAS /tmp/ccqfGNRw.s page 70 + ARM GAS /tmp/ccNvm23w.s page 70 1036:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_TIM_OC_SetCompareCH3(TIMx, TIM_OCInitStruct->CompareValue); @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 471 .L15: 472 .align 2 473 .L14: - ARM GAS /tmp/ccqfGNRw.s page 71 + ARM GAS /tmp/ccNvm23w.s page 71 474 0070 8CFFFEFF .word -65652 @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1065:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E); 508 .loc 1 1065 3 view .LVU163 509 0002 036A ldr r3, [r0, #32] - ARM GAS /tmp/ccqfGNRw.s page 72 + ARM GAS /tmp/ccNvm23w.s page 72 510 0004 23F48053 bic r3, r3, #4096 @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 543 .loc 1 1086 3 is_stmt 0 view .LVU176 544 0028 4D68 ldr r5, [r1, #4] 545 .loc 1 1086 3 view .LVU177 - ARM GAS /tmp/ccqfGNRw.s page 73 + ARM GAS /tmp/ccNvm23w.s page 73 546 002a 43EA0533 orr r3, r3, r5, lsl #12 @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance. 2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4 2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccqfGNRw.s page 74 + ARM GAS /tmp/ccNvm23w.s page 74 2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @brief Configure the TIMx output channel 5. 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @param TIMx Timer Instance 1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 5 configuration data structure - ARM GAS /tmp/ccqfGNRw.s page 75 + ARM GAS /tmp/ccNvm23w.s page 75 1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 646 000c 446D ldr r4, [r0, #84] 647 .LVL84: 1140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** - ARM GAS /tmp/ccqfGNRw.s page 76 + ARM GAS /tmp/ccNvm23w.s page 76 1141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Select the Output Compare Mode */ @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 686 0042 4460 str r4, [r0, #4] 687 .L22: 1157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** - ARM GAS /tmp/ccqfGNRw.s page 77 + ARM GAS /tmp/ccNvm23w.s page 77 1158:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** } @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 715 .LCFI9: 716 .cfi_restore 5 717 .cfi_restore 4 - ARM GAS /tmp/ccqfGNRw.s page 78 + ARM GAS /tmp/ccNvm23w.s page 78 718 .cfi_def_cfa_offset 0 @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); 755 .loc 1 1190 3 view .LVU241 1191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); - ARM GAS /tmp/ccqfGNRw.s page 79 + ARM GAS /tmp/ccNvm23w.s page 79 756 .loc 1 1191 3 view .LVU242 @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 1211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) 792 .loc 1 1211 3 is_stmt 1 view .LVU255 - ARM GAS /tmp/ccqfGNRw.s page 80 + ARM GAS /tmp/ccNvm23w.s page 80 793 .loc 1 1211 6 is_stmt 0 view .LVU256 @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 820 004a C265 str r2, [r0, #92] 821 .LVL105: 822 .loc 2 2525 3 is_stmt 0 view .LVU265 - ARM GAS /tmp/ccqfGNRw.s page 81 + ARM GAS /tmp/ccNvm23w.s page 81 823 .LBE93: @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 862 0000 10B4 push {r4} 863 .LCFI12: 864 .cfi_def_cfa_offset 4 - ARM GAS /tmp/ccqfGNRw.s page 82 + ARM GAS /tmp/ccNvm23w.s page 82 865 .cfi_offset 4, -4 @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 897 .LVL108: 898 .loc 1 1263 1 view .LVU284 899 0032 5DF8044B ldr r4, [sp], #4 - ARM GAS /tmp/ccqfGNRw.s page 83 + ARM GAS /tmp/ccNvm23w.s page 83 900 .LCFI13: @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 936 0008 0362 str r3, [r0, #32] 1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Select the Input and set the filter and the prescaler value */ - ARM GAS /tmp/ccqfGNRw.s page 84 + ARM GAS /tmp/ccNvm23w.s page 84 1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(TIMx->CCMR1, @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1303:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 1304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - ERROR: not applicable 1305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** */ - ARM GAS /tmp/ccqfGNRw.s page 85 + ARM GAS /tmp/ccNvm23w.s page 85 1306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** static ErrorStatus IC3Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1011 0028 43EA0223 orr r3, r3, r2, lsl #8 1012 002c 43F48073 orr r3, r3, #256 1013 0030 0362 str r3, [r0, #32] - ARM GAS /tmp/ccqfGNRw.s page 86 + ARM GAS /tmp/ccNvm23w.s page 86 1325:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** (TIM_CCER_CC3P | TIM_CCER_CC3NP), @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1049 .loc 1 1345 3 view .LVU320 1346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter)); 1050 .loc 1 1346 3 view .LVU321 - ARM GAS /tmp/ccqfGNRw.s page 87 + ARM GAS /tmp/ccNvm23w.s page 87 1347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1090 .syntax unified 1091 .thumb 1092 .thumb_func - ARM GAS /tmp/ccqfGNRw.s page 88 + ARM GAS /tmp/ccNvm23w.s page 88 1094 LL_TIM_DeInit: @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 262:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** { 1133 .loc 1 262 8 is_stmt 1 view .LVU345 262:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** { - ARM GAS /tmp/ccqfGNRw.s page 89 + ARM GAS /tmp/ccNvm23w.s page 89 1134 .loc 1 262 11 is_stmt 0 view .LVU346 @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1173 .loc 1 319 12 view .LVU361 1174 005c 0120 movs r0, #1 1175 .LVL116: - ARM GAS /tmp/ccqfGNRw.s page 90 + ARM GAS /tmp/ccNvm23w.s page 90 322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** } @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/ 44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #include "stm32f7xx.h" 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** - ARM GAS /tmp/ccqfGNRw.s page 91 + ARM GAS /tmp/ccNvm23w.s page 91 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @addtogroup STM32F7xx_LL_Driver @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGHSULPI RCC_AHB1ENR_OTGHSULPIEN 101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_AXI RCC_AHB1LPENR_AXILPEN 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_FLITF RCC_AHB1LPENR_FLITFLPEN - ARM GAS /tmp/ccqfGNRw.s page 92 + ARM GAS /tmp/ccNvm23w.s page 92 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPTIM1 RCC_APB1ENR_LPTIM1EN 158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN - ARM GAS /tmp/ccqfGNRw.s page 93 + ARM GAS /tmp/ccNvm23w.s page 93 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM10 RCC_APB2ENR_TIM10EN 215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM11 RCC_APB2ENR_TIM11EN 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI5 RCC_APB2ENR_SPI5EN - ARM GAS /tmp/ccqfGNRw.s page 94 + ARM GAS /tmp/ccNvm23w.s page 94 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPI6) @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_EnableClock\n 272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_EnableClock\n 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock\n - ARM GAS /tmp/ccqfGNRw.s page 95 + ARM GAS /tmp/ccNvm23w.s page 95 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOIEN LL_AHB1_GRP1_IsEnabledClock\n 329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_IsEnabledClock\n 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_IsEnabledClock\n - ARM GAS /tmp/ccqfGNRw.s page 96 + ARM GAS /tmp/ccNvm23w.s page 96 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOHEN LL_AHB1_GRP1_DisableClock\n 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOIEN LL_AHB1_GRP1_DisableClock\n 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_DisableClock\n - ARM GAS /tmp/ccqfGNRw.s page 97 + ARM GAS /tmp/ccNvm23w.s page 97 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_DisableClock\n @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ForceReset\n 443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ForceReset\n 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ForceReset\n - ARM GAS /tmp/ccqfGNRw.s page 98 + ARM GAS /tmp/ccNvm23w.s page 98 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ForceReset\n @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ReleaseReset 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL - ARM GAS /tmp/ccqfGNRw.s page 99 + ARM GAS /tmp/ccNvm23w.s page 99 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_EnableClockLowPower 557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA - ARM GAS /tmp/ccqfGNRw.s page 100 + ARM GAS /tmp/ccNvm23w.s page 100 559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB @@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_DisableClockLowPower\n 614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_DisableClockLowPower\n 615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_DisableClockLowPower\n - ARM GAS /tmp/ccqfGNRw.s page 101 + ARM GAS /tmp/ccNvm23w.s page 101 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n @@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** - ARM GAS /tmp/ccqfGNRw.s page 102 + ARM GAS /tmp/ccNvm23w.s page 102 673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB2 peripherals clock. @@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB2 peripherals clock. - ARM GAS /tmp/ccqfGNRw.s page 103 + ARM GAS /tmp/ccNvm23w.s page 103 730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_DisableClock\n @@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR JPEGRST LL_AHB2_GRP1_ReleaseReset\n 785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR CRYPRST LL_AHB2_GRP1_ReleaseReset\n 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset\n - ARM GAS /tmp/ccqfGNRw.s page 104 + ARM GAS /tmp/ccNvm23w.s page 104 787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR HASHRST LL_AHB2_GRP1_ReleaseReset\n @@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR JPEGLPEN LL_AHB2_GRP1_DisableClockLowPower\n 842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_DisableClockLowPower\n 843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR AESLPEN LL_AHB2_GRP1_DisableClockLowPower\n - ARM GAS /tmp/ccqfGNRw.s page 105 + ARM GAS /tmp/ccNvm23w.s page 105 844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR HASHLPEN LL_AHB2_GRP1_DisableClockLowPower\n @@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI 899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. - ARM GAS /tmp/ccqfGNRw.s page 106 + ARM GAS /tmp/ccNvm23w.s page 106 901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0). @@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3RSTR, Periphs); 956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** - ARM GAS /tmp/ccqfGNRw.s page 107 + ARM GAS /tmp/ccNvm23w.s page 107 958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_EnableClock\n 1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_EnableClock\n 1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock\n - ARM GAS /tmp/ccqfGNRw.s page 108 + ARM GAS /tmp/ccNvm23w.s page 108 1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n @@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) - ARM GAS /tmp/ccqfGNRw.s page 109 + ARM GAS /tmp/ccNvm23w.s page 109 1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) 1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 - ARM GAS /tmp/ccqfGNRw.s page 110 + ARM GAS /tmp/ccNvm23w.s page 110 1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 @@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_DisableClock\n 1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART7EN LL_APB1_GRP1_DisableClock\n 1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART8EN LL_APB1_GRP1_DisableClock\n - ARM GAS /tmp/ccqfGNRw.s page 111 + ARM GAS /tmp/ccNvm23w.s page 111 1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR RTCEN LL_APB1_GRP1_DisableClock @@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ForceReset\n 1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ForceReset\n 1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ForceReset\n - ARM GAS /tmp/ccqfGNRw.s page 112 + ARM GAS /tmp/ccNvm23w.s page 112 1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ForceReset\n @@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1RSTR, Periphs); 1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** - ARM GAS /tmp/ccqfGNRw.s page 113 + ARM GAS /tmp/ccNvm23w.s page 113 1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*) 1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) - ARM GAS /tmp/ccqfGNRw.s page 114 + ARM GAS /tmp/ccNvm23w.s page 114 1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) @@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 - ARM GAS /tmp/ccqfGNRw.s page 115 + ARM GAS /tmp/ccNvm23w.s page 115 1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 @@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART4LPEN LL_APB1_GRP1_DisableClockLowPower\n 1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART5LPEN LL_APB1_GRP1_DisableClockLowPower\n 1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C1LPEN LL_APB1_GRP1_DisableClockLowPower\n - ARM GAS /tmp/ccqfGNRw.s page 116 + ARM GAS /tmp/ccNvm23w.s page 116 1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C2LPEN LL_APB1_GRP1_DisableClockLowPower\n @@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @} 1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** - ARM GAS /tmp/ccqfGNRw.s page 117 + ARM GAS /tmp/ccNvm23w.s page 117 1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2 @@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_OTGPHYC (*) 1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. - ARM GAS /tmp/ccqfGNRw.s page 118 + ARM GAS /tmp/ccNvm23w.s page 118 1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None @@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) 1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 - ARM GAS /tmp/ccqfGNRw.s page 119 + ARM GAS /tmp/ccNvm23w.s page 119 1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*) @@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 - ARM GAS /tmp/ccqfGNRw.s page 120 + ARM GAS /tmp/ccNvm23w.s page 120 1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) @@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 - ARM GAS /tmp/ccqfGNRw.s page 121 + ARM GAS /tmp/ccNvm23w.s page 121 1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) @@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR MDIORST LL_APB2_GRP1_ReleaseReset\n 1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR OTGPHYCRST LL_APB2_GRP1_ReleaseReset 1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: - ARM GAS /tmp/ccqfGNRw.s page 122 + ARM GAS /tmp/ccNvm23w.s page 122 1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ALL @@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2); 1221 .loc 1 230 5 is_stmt 1 view .LVU375 1222 .LBB100: - ARM GAS /tmp/ccqfGNRw.s page 123 + ARM GAS /tmp/ccNvm23w.s page 123 1223 .LBI100: @@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 1265 .loc 3 1297 3 view .LVU388 1266 008e 03F50D33 add r3, r3, #144384 - ARM GAS /tmp/ccqfGNRw.s page 124 + ARM GAS /tmp/ccNvm23w.s page 124 1267 0092 1A6A ldr r2, [r3, #32] @@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 1310 .loc 3 1297 3 is_stmt 0 view .LVU400 1311 .LBE113: - ARM GAS /tmp/ccqfGNRw.s page 125 + ARM GAS /tmp/ccNvm23w.s page 125 1312 .LBE112: @@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1354 .LBI120: 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1355 .loc 3 1367 22 view .LVU413 - ARM GAS /tmp/ccqfGNRw.s page 126 + ARM GAS /tmp/ccNvm23w.s page 126 1356 .LBB121: @@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1398 00e4 22F01002 bic r2, r2, #16 1399 00e8 1A62 str r2, [r3, #32] 1400 .LVL139: - ARM GAS /tmp/ccqfGNRw.s page 127 + ARM GAS /tmp/ccNvm23w.s page 127 1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } @@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 1443 .loc 1 218 15 view .LVU438 1444 0102 0020 movs r0, #0 - ARM GAS /tmp/ccqfGNRw.s page 128 + ARM GAS /tmp/ccNvm23w.s page 128 1445 .LVL144: @@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1488 011c 7047 bx lr 1489 .LVL149: 1490 .L63: - ARM GAS /tmp/ccqfGNRw.s page 129 + ARM GAS /tmp/ccNvm23w.s page 129 1491 .loc 3 1828 1 view .LVU451 @@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1535 .LBI148: 1768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1536 .loc 3 1768 22 view .LVU464 - ARM GAS /tmp/ccqfGNRw.s page 130 + ARM GAS /tmp/ccNvm23w.s page 130 1537 .LBB149: @@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1581 0158 5A62 str r2, [r3, #36] 1582 .LVL158: 1770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - ARM GAS /tmp/ccqfGNRw.s page 131 + ARM GAS /tmp/ccNvm23w.s page 131 1583 .loc 3 1770 3 is_stmt 0 view .LVU477 @@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1627 .LBI162: 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1628 .loc 3 1367 22 view .LVU490 - ARM GAS /tmp/ccqfGNRw.s page 132 + ARM GAS /tmp/ccNvm23w.s page 132 1629 .LBB163: @@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1671 018c 22F08002 bic r2, r2, #128 1672 0190 1A62 str r2, [r3, #32] 1673 .LVL167: - ARM GAS /tmp/ccqfGNRw.s page 133 + ARM GAS /tmp/ccNvm23w.s page 133 1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } @@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 1716 .loc 1 218 15 view .LVU515 1717 01aa 0020 movs r0, #0 - ARM GAS /tmp/ccqfGNRw.s page 134 + ARM GAS /tmp/ccNvm23w.s page 134 1718 .LVL172: @@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1767 .loc 1 336 3 is_stmt 1 view .LVU522 336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; 1768 .loc 1 336 37 is_stmt 0 view .LVU523 - ARM GAS /tmp/ccqfGNRw.s page 135 + ARM GAS /tmp/ccNvm23w.s page 135 1769 0006 4FF0FF32 mov r2, #-1 @@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1811 .loc 1 361 3 is_stmt 1 view .LVU537 361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** { 1812 .loc 1 361 7 is_stmt 0 view .LVU538 - ARM GAS /tmp/ccqfGNRw.s page 136 + ARM GAS /tmp/ccNvm23w.s page 136 1813 0004 3B4A ldr r2, .L81 @@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1859 0058 274A ldr r2, .L81+4 1860 005a 9042 cmp r0, r2 1861 005c 14BF ite ne - ARM GAS /tmp/ccqfGNRw.s page 137 + ARM GAS /tmp/ccNvm23w.s page 137 1862 005e 0022 movne r2, #0 @@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1911 00c0 23F4407C bic ip, r3, #768 1912 00c4 CB68 ldr r3, [r1, #12] 1913 .LVL178: - ARM GAS /tmp/ccqfGNRw.s page 138 + ARM GAS /tmp/ccNvm23w.s page 138 370:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** } @@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1954 00dc 4EF00103 orreq r3, lr, #1 1955 .LVL184: 382:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** { - ARM GAS /tmp/ccqfGNRw.s page 139 + ARM GAS /tmp/ccNvm23w.s page 139 1956 .loc 1 382 6 view .LVU566 @@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccqfGNRw.s page 140 + ARM GAS /tmp/ccNvm23w.s page 140 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); @@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx) - ARM GAS /tmp/ccqfGNRw.s page 141 + ARM GAS /tmp/ccNvm23w.s page 141 2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 - ARM GAS /tmp/ccqfGNRw.s page 142 + ARM GAS /tmp/ccNvm23w.s page 142 2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 @@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 - ARM GAS /tmp/ccqfGNRw.s page 143 + ARM GAS /tmp/ccNvm23w.s page 143 2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: @@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8 2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) - ARM GAS /tmp/ccqfGNRw.s page 144 + ARM GAS /tmp/ccNvm23w.s page 144 2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccqfGNRw.s page 145 + ARM GAS /tmp/ccNvm23w.s page 145 2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 @@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current input channel polarity. 2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n 2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n - ARM GAS /tmp/ccqfGNRw.s page 146 + ARM GAS /tmp/ccNvm23w.s page 146 2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n @@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination 2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccqfGNRw.s page 147 + ARM GAS /tmp/ccNvm23w.s page 147 2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 4. 3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF - ARM GAS /tmp/ccqfGNRw.s page 148 + ARM GAS /tmp/ccNvm23w.s page 148 3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check @@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) 3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccqfGNRw.s page 149 + ARM GAS /tmp/ccNvm23w.s page 149 3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); @@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance can operate as a master timer. 3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput 3126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccqfGNRw.s page 150 + ARM GAS /tmp/ccNvm23w.s page 150 3127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TimerSynchronization This parameter can be one of the following values: @@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_RESET 3182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_GATED 3183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_TRIGGER - ARM GAS /tmp/ccqfGNRw.s page 151 + ARM GAS /tmp/ccNvm23w.s page 151 3184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER @@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccqfGNRw.s page 152 + ARM GAS /tmp/ccNvm23w.s page 152 3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled. @@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccqfGNRw.s page 153 + ARM GAS /tmp/ccNvm23w.s page 153 3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration @@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N6 3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8 3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccqfGNRw.s page 154 + ARM GAS /tmp/ccNvm23w.s page 154 3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N5 3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6 3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8 - ARM GAS /tmp/ccqfGNRw.s page 155 + ARM GAS /tmp/ccNvm23w.s page 155 3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5 @@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccqfGNRw.s page 156 + ARM GAS /tmp/ccNvm23w.s page 156 3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled. @@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT) 3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccqfGNRw.s page 157 + ARM GAS /tmp/ccNvm23w.s page 157 3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input. @@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values: 3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN 3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2 - ARM GAS /tmp/ccqfGNRw.s page 158 + ARM GAS /tmp/ccNvm23w.s page 158 3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values: @@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (*) value not defined in all devices 3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values: 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER - ARM GAS /tmp/ccqfGNRw.s page 159 + ARM GAS /tmp/ccNvm23w.s page 159 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS @@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * 3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO 3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI - ARM GAS /tmp/ccqfGNRw.s page 160 + ARM GAS /tmp/ccNvm23w.s page 160 3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE @@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF)); 3752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccqfGNRw.s page 161 + ARM GAS /tmp/ccNvm23w.s page 161 3754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 interrupt flag (CC4F). - ARM GAS /tmp/ccqfGNRw.s page 162 + ARM GAS /tmp/ccNvm23w.s page 162 3811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4 @@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 6 interrupt flag (CC6F) is set (Capture/Compare 6 inte 3866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC6IF LL_TIM_IsActiveFlag_CC6 3867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccqfGNRw.s page 163 + ARM GAS /tmp/ccNvm23w.s page 163 3868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). @@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccqfGNRw.s page 164 + ARM GAS /tmp/ccNvm23w.s page 164 3925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx) @@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 3979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 3980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx) - ARM GAS /tmp/ccqfGNRw.s page 165 + ARM GAS /tmp/ccNvm23w.s page 165 3982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 4036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 4037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 4038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) - ARM GAS /tmp/ccqfGNRw.s page 166 + ARM GAS /tmp/ccNvm23w.s page 166 4039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 4093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 4094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccqfGNRw.s page 167 + ARM GAS /tmp/ccNvm23w.s page 167 4096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update interrupt (UIE). @@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 4150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable capture/compare 2 interrupt (CC2IE). 4152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DIER CC2IE LL_TIM_EnableIT_CC2 - ARM GAS /tmp/ccqfGNRw.s page 168 + ARM GAS /tmp/ccNvm23w.s page 168 4153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 4207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DIER CC3IE LL_TIM_IsEnabledIT_CC3 4208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 4209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccqfGNRw.s page 169 + ARM GAS /tmp/ccNvm23w.s page 169 4210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 4264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 4265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 4266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx) - ARM GAS /tmp/ccqfGNRw.s page 170 + ARM GAS /tmp/ccNvm23w.s page 170 4267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 4321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx) 4322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 4323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_BIE); - ARM GAS /tmp/ccqfGNRw.s page 171 + ARM GAS /tmp/ccNvm23w.s page 171 4324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 4378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the update DMA request (UDE) is enabled. 4379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DIER UDE LL_TIM_IsEnabledDMAReq_UPDATE 4380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccqfGNRw.s page 172 + ARM GAS /tmp/ccNvm23w.s page 172 4381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). @@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 4435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 4436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 4437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccqfGNRw.s page 173 + ARM GAS /tmp/ccNvm23w.s page 173 4438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx) @@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 4492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 4493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx) 4494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccqfGNRw.s page 174 + ARM GAS /tmp/ccNvm23w.s page 174 4495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC4DE); @@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 4549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 4550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL); 4551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccqfGNRw.s page 175 + ARM GAS /tmp/ccNvm23w.s page 175 4552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 1980 00e8 43F00103 orr r3, r3, #1 1981 00ec 4361 str r3, [r0, #20] 1982 .LVL187: - ARM GAS /tmp/ccqfGNRw.s page 176 + ARM GAS /tmp/ccNvm23w.s page 176 1983 .loc 2 4601 3 is_stmt 0 view .LVU575 @@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2029 0006 8360 str r3, [r0, #8] 408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH; 2030 .loc 1 408 3 is_stmt 1 view .LVU586 - ARM GAS /tmp/ccqfGNRw.s page 177 + ARM GAS /tmp/ccNvm23w.s page 177 408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH; @@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** { 2074 .loc 1 435 3 view .LVU600 2075 0006 B3F5805F cmp r3, #4096 - ARM GAS /tmp/ccqfGNRw.s page 178 + ARM GAS /tmp/ccNvm23w.s page 178 2076 000a 1DD0 beq .L85 @@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** { 2118 .loc 1 435 3 view .LVU613 2119 003a F1E7 b .L90 - ARM GAS /tmp/ccqfGNRw.s page 179 + ARM GAS /tmp/ccNvm23w.s page 179 2120 .LVL199: @@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2164 .LFB383: 470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Set the default configuration */ 2165 .loc 1 470 1 view -0 - ARM GAS /tmp/ccqfGNRw.s page 180 + ARM GAS /tmp/ccNvm23w.s page 180 2166 .cfi_startproc @@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2211 .LVL209: 494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 2212 .loc 1 494 3 is_stmt 1 view .LVU638 - ARM GAS /tmp/ccqfGNRw.s page 181 + ARM GAS /tmp/ccNvm23w.s page 181 496:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** { @@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2254 .loc 1 499 7 is_stmt 1 view .LVU651 499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** break; 2255 .loc 1 499 16 is_stmt 0 view .LVU652 - ARM GAS /tmp/ccqfGNRw.s page 182 + ARM GAS /tmp/ccNvm23w.s page 182 2256 0030 FFF7FEFF bl IC1Config @@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2299 0008 4FF48032 mov r2, #65536 2300 000c 8260 str r2, [r0, #8] 529:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1; - ARM GAS /tmp/ccqfGNRw.s page 183 + ARM GAS /tmp/ccNvm23w.s page 183 2301 .loc 1 529 3 is_stmt 1 view .LVU666 @@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2343 .cfi_offset 4, -8 2344 .cfi_offset 5, -4 548:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** uint32_t tmpccer; - ARM GAS /tmp/ccqfGNRw.s page 184 + ARM GAS /tmp/ccNvm23w.s page 184 2345 .loc 1 548 3 is_stmt 1 view .LVU681 @@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2377 0012 4B89 ldrh r3, [r1, #10] 574:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U); 2378 .loc 1 574 12 view .LVU704 - ARM GAS /tmp/ccqfGNRw.s page 185 + ARM GAS /tmp/ccNvm23w.s page 185 2379 0014 1343 orrs r3, r3, r2 @@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2415 .loc 1 585 3 is_stmt 1 view .LVU722 585:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity); 2416 .loc 1 585 11 is_stmt 0 view .LVU723 - ARM GAS /tmp/ccqfGNRw.s page 186 + ARM GAS /tmp/ccNvm23w.s page 186 2417 0034 24F0AA04 bic r4, r4, #170 @@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2456 0052 8361 str r3, [r0, #24] 597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 2457 .loc 1 597 3 view .LVU739 - ARM GAS /tmp/ccqfGNRw.s page 187 + ARM GAS /tmp/ccNvm23w.s page 187 2458 0054 0262 str r2, [r0, #32] @@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** } 2503 .loc 1 615 47 is_stmt 0 view .LVU751 2504 0008 C360 str r3, [r0, #12] - ARM GAS /tmp/ccqfGNRw.s page 188 + ARM GAS /tmp/ccNvm23w.s page 188 616:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** @@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2546 .loc 1 656 3 is_stmt 1 view .LVU766 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** 2547 .loc 1 656 10 is_stmt 0 view .LVU767 - ARM GAS /tmp/ccqfGNRw.s page 189 + ARM GAS /tmp/ccNvm23w.s page 189 2548 000a 4568 ldr r5, [r0, #4] @@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2584 .LVL251: 681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U); 2585 .loc 1 681 3 is_stmt 1 view .LVU786 - ARM GAS /tmp/ccqfGNRw.s page 190 + ARM GAS /tmp/ccNvm23w.s page 190 681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U); @@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2622 .loc 1 697 3 view .LVU804 2623 0046 8460 str r4, [r0, #8] 700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** - ARM GAS /tmp/ccqfGNRw.s page 191 + ARM GAS /tmp/ccNvm23w.s page 191 2624 .loc 1 700 3 view .LVU805 @@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2669 .thumb_func 2671 LL_TIM_BDTR_StructInit: 2672 .LVL263: - ARM GAS /tmp/ccqfGNRw.s page 192 + ARM GAS /tmp/ccNvm23w.s page 192 2673 .LFB389: @@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2707 .loc 1 730 3 is_stmt 1 view .LVU835 730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** TIM_BDTRInitStruct->AutomaticOutput = LL_TIM_AUTOMATICOUTPUT_DISABLE; 2708 .loc 1 730 39 is_stmt 0 view .LVU836 - ARM GAS /tmp/ccqfGNRw.s page 193 + ARM GAS /tmp/ccNvm23w.s page 193 2709 0014 0362 str r3, [r0, #32] @@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2749 .loc 1 770 3 view .LVU852 2750 0002 0B7B ldrb r3, [r1, #12] @ zero_extendqisi2 2751 .LVL266: - ARM GAS /tmp/ccqfGNRw.s page 194 + ARM GAS /tmp/ccNvm23w.s page 194 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); @@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2792 .loc 1 775 3 is_stmt 1 view .LVU866 2793 0028 23F48043 bic r3, r3, #16384 2794 .LVL280: - ARM GAS /tmp/ccqfGNRw.s page 195 + ARM GAS /tmp/ccNvm23w.s page 195 775:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter); @@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2834 .loc 1 786 5 view .LVU881 2835 0052 1343 orrs r3, r3, r2 2836 .LVL290: - ARM GAS /tmp/ccqfGNRw.s page 196 + ARM GAS /tmp/ccNvm23w.s page 196 787:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** } @@ -11742,70 +11742,70 @@ ARM GAS /tmp/ccqfGNRw.s page 1 2869 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 2870 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 2871 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - ARM GAS /tmp/ccqfGNRw.s page 197 + ARM GAS /tmp/ccNvm23w.s page 197 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_ll_tim.c - /tmp/ccqfGNRw.s:20 .text.OC1Config:00000000 $t - /tmp/ccqfGNRw.s:25 .text.OC1Config:00000000 OC1Config - /tmp/ccqfGNRw.s:166 .text.OC1Config:0000006c $d - /tmp/ccqfGNRw.s:173 .text.OC2Config:00000000 $t - /tmp/ccqfGNRw.s:178 .text.OC2Config:00000000 OC2Config - /tmp/ccqfGNRw.s:320 .text.OC2Config:00000074 $d - /tmp/ccqfGNRw.s:327 .text.OC3Config:00000000 $t - /tmp/ccqfGNRw.s:332 .text.OC3Config:00000000 OC3Config - /tmp/ccqfGNRw.s:474 .text.OC3Config:00000070 $d - /tmp/ccqfGNRw.s:481 .text.OC4Config:00000000 $t - /tmp/ccqfGNRw.s:486 .text.OC4Config:00000000 OC4Config - /tmp/ccqfGNRw.s:602 .text.OC4Config:00000054 $d - /tmp/ccqfGNRw.s:609 .text.OC5Config:00000000 $t - /tmp/ccqfGNRw.s:614 .text.OC5Config:00000000 OC5Config - /tmp/ccqfGNRw.s:723 .text.OC5Config:00000054 $d - /tmp/ccqfGNRw.s:730 .text.OC6Config:00000000 $t - /tmp/ccqfGNRw.s:735 .text.OC6Config:00000000 OC6Config - /tmp/ccqfGNRw.s:841 .text.OC6Config:00000054 $d - /tmp/ccqfGNRw.s:848 .text.IC1Config:00000000 $t - /tmp/ccqfGNRw.s:853 .text.IC1Config:00000000 IC1Config - /tmp/ccqfGNRw.s:908 .text.IC2Config:00000000 $t - /tmp/ccqfGNRw.s:913 .text.IC2Config:00000000 IC2Config - /tmp/ccqfGNRw.s:968 .text.IC3Config:00000000 $t - /tmp/ccqfGNRw.s:973 .text.IC3Config:00000000 IC3Config - /tmp/ccqfGNRw.s:1028 .text.IC4Config:00000000 $t - /tmp/ccqfGNRw.s:1033 .text.IC4Config:00000000 IC4Config - /tmp/ccqfGNRw.s:1088 .text.LL_TIM_DeInit:00000000 $t - /tmp/ccqfGNRw.s:1094 .text.LL_TIM_DeInit:00000000 LL_TIM_DeInit - /tmp/ccqfGNRw.s:1726 .text.LL_TIM_DeInit:000001b0 $d - /tmp/ccqfGNRw.s:1746 .text.LL_TIM_StructInit:00000000 $t - /tmp/ccqfGNRw.s:1752 .text.LL_TIM_StructInit:00000000 LL_TIM_StructInit - /tmp/ccqfGNRw.s:1783 .text.LL_TIM_Init:00000000 $t - /tmp/ccqfGNRw.s:1789 .text.LL_TIM_Init:00000000 LL_TIM_Init - /tmp/ccqfGNRw.s:1995 .text.LL_TIM_Init:000000f4 $d - /tmp/ccqfGNRw.s:2006 .text.LL_TIM_OC_StructInit:00000000 $t - /tmp/ccqfGNRw.s:2012 .text.LL_TIM_OC_StructInit:00000000 LL_TIM_OC_StructInit - /tmp/ccqfGNRw.s:2051 .text.LL_TIM_OC_Init:00000000 $t - /tmp/ccqfGNRw.s:2057 .text.LL_TIM_OC_Init:00000000 LL_TIM_OC_Init - /tmp/ccqfGNRw.s:2156 .text.LL_TIM_IC_StructInit:00000000 $t - /tmp/ccqfGNRw.s:2162 .text.LL_TIM_IC_StructInit:00000000 LL_TIM_IC_StructInit - /tmp/ccqfGNRw.s:2190 .text.LL_TIM_IC_Init:00000000 $t - /tmp/ccqfGNRw.s:2196 .text.LL_TIM_IC_Init:00000000 LL_TIM_IC_Init - /tmp/ccqfGNRw.s:2275 .text.LL_TIM_ENCODER_StructInit:00000000 $t - /tmp/ccqfGNRw.s:2281 .text.LL_TIM_ENCODER_StructInit:00000000 LL_TIM_ENCODER_StructInit - /tmp/ccqfGNRw.s:2325 .text.LL_TIM_ENCODER_Init:00000000 $t - /tmp/ccqfGNRw.s:2331 .text.LL_TIM_ENCODER_Init:00000000 LL_TIM_ENCODER_Init - /tmp/ccqfGNRw.s:2473 .text.LL_TIM_ENCODER_Init:0000005c $d - /tmp/ccqfGNRw.s:2478 .text.LL_TIM_HALLSENSOR_StructInit:00000000 $t - /tmp/ccqfGNRw.s:2484 .text.LL_TIM_HALLSENSOR_StructInit:00000000 LL_TIM_HALLSENSOR_StructInit - /tmp/ccqfGNRw.s:2511 .text.LL_TIM_HALLSENSOR_Init:00000000 $t - /tmp/ccqfGNRw.s:2517 .text.LL_TIM_HALLSENSOR_Init:00000000 LL_TIM_HALLSENSOR_Init - /tmp/ccqfGNRw.s:2659 .text.LL_TIM_HALLSENSOR_Init:00000058 $d - /tmp/ccqfGNRw.s:2665 .text.LL_TIM_BDTR_StructInit:00000000 $t - /tmp/ccqfGNRw.s:2671 .text.LL_TIM_BDTR_StructInit:00000000 LL_TIM_BDTR_StructInit - /tmp/ccqfGNRw.s:2719 .text.LL_TIM_BDTR_Init:00000000 $t - ARM GAS /tmp/ccqfGNRw.s page 198 + /tmp/ccNvm23w.s:20 .text.OC1Config:00000000 $t + /tmp/ccNvm23w.s:25 .text.OC1Config:00000000 OC1Config + /tmp/ccNvm23w.s:166 .text.OC1Config:0000006c $d + /tmp/ccNvm23w.s:173 .text.OC2Config:00000000 $t + /tmp/ccNvm23w.s:178 .text.OC2Config:00000000 OC2Config + /tmp/ccNvm23w.s:320 .text.OC2Config:00000074 $d + /tmp/ccNvm23w.s:327 .text.OC3Config:00000000 $t + /tmp/ccNvm23w.s:332 .text.OC3Config:00000000 OC3Config + /tmp/ccNvm23w.s:474 .text.OC3Config:00000070 $d + /tmp/ccNvm23w.s:481 .text.OC4Config:00000000 $t + /tmp/ccNvm23w.s:486 .text.OC4Config:00000000 OC4Config + /tmp/ccNvm23w.s:602 .text.OC4Config:00000054 $d + /tmp/ccNvm23w.s:609 .text.OC5Config:00000000 $t + /tmp/ccNvm23w.s:614 .text.OC5Config:00000000 OC5Config + /tmp/ccNvm23w.s:723 .text.OC5Config:00000054 $d + /tmp/ccNvm23w.s:730 .text.OC6Config:00000000 $t + /tmp/ccNvm23w.s:735 .text.OC6Config:00000000 OC6Config + /tmp/ccNvm23w.s:841 .text.OC6Config:00000054 $d + /tmp/ccNvm23w.s:848 .text.IC1Config:00000000 $t + /tmp/ccNvm23w.s:853 .text.IC1Config:00000000 IC1Config + /tmp/ccNvm23w.s:908 .text.IC2Config:00000000 $t + /tmp/ccNvm23w.s:913 .text.IC2Config:00000000 IC2Config + /tmp/ccNvm23w.s:968 .text.IC3Config:00000000 $t + /tmp/ccNvm23w.s:973 .text.IC3Config:00000000 IC3Config + /tmp/ccNvm23w.s:1028 .text.IC4Config:00000000 $t + /tmp/ccNvm23w.s:1033 .text.IC4Config:00000000 IC4Config + /tmp/ccNvm23w.s:1088 .text.LL_TIM_DeInit:00000000 $t + /tmp/ccNvm23w.s:1094 .text.LL_TIM_DeInit:00000000 LL_TIM_DeInit + /tmp/ccNvm23w.s:1726 .text.LL_TIM_DeInit:000001b0 $d + /tmp/ccNvm23w.s:1746 .text.LL_TIM_StructInit:00000000 $t + /tmp/ccNvm23w.s:1752 .text.LL_TIM_StructInit:00000000 LL_TIM_StructInit + /tmp/ccNvm23w.s:1783 .text.LL_TIM_Init:00000000 $t + /tmp/ccNvm23w.s:1789 .text.LL_TIM_Init:00000000 LL_TIM_Init + /tmp/ccNvm23w.s:1995 .text.LL_TIM_Init:000000f4 $d + /tmp/ccNvm23w.s:2006 .text.LL_TIM_OC_StructInit:00000000 $t + /tmp/ccNvm23w.s:2012 .text.LL_TIM_OC_StructInit:00000000 LL_TIM_OC_StructInit + /tmp/ccNvm23w.s:2051 .text.LL_TIM_OC_Init:00000000 $t + /tmp/ccNvm23w.s:2057 .text.LL_TIM_OC_Init:00000000 LL_TIM_OC_Init + /tmp/ccNvm23w.s:2156 .text.LL_TIM_IC_StructInit:00000000 $t + /tmp/ccNvm23w.s:2162 .text.LL_TIM_IC_StructInit:00000000 LL_TIM_IC_StructInit + /tmp/ccNvm23w.s:2190 .text.LL_TIM_IC_Init:00000000 $t + /tmp/ccNvm23w.s:2196 .text.LL_TIM_IC_Init:00000000 LL_TIM_IC_Init + /tmp/ccNvm23w.s:2275 .text.LL_TIM_ENCODER_StructInit:00000000 $t + /tmp/ccNvm23w.s:2281 .text.LL_TIM_ENCODER_StructInit:00000000 LL_TIM_ENCODER_StructInit + /tmp/ccNvm23w.s:2325 .text.LL_TIM_ENCODER_Init:00000000 $t + /tmp/ccNvm23w.s:2331 .text.LL_TIM_ENCODER_Init:00000000 LL_TIM_ENCODER_Init + /tmp/ccNvm23w.s:2473 .text.LL_TIM_ENCODER_Init:0000005c $d + /tmp/ccNvm23w.s:2478 .text.LL_TIM_HALLSENSOR_StructInit:00000000 $t + /tmp/ccNvm23w.s:2484 .text.LL_TIM_HALLSENSOR_StructInit:00000000 LL_TIM_HALLSENSOR_StructInit + /tmp/ccNvm23w.s:2511 .text.LL_TIM_HALLSENSOR_Init:00000000 $t + /tmp/ccNvm23w.s:2517 .text.LL_TIM_HALLSENSOR_Init:00000000 LL_TIM_HALLSENSOR_Init + /tmp/ccNvm23w.s:2659 .text.LL_TIM_HALLSENSOR_Init:00000058 $d + /tmp/ccNvm23w.s:2665 .text.LL_TIM_BDTR_StructInit:00000000 $t + /tmp/ccNvm23w.s:2671 .text.LL_TIM_BDTR_StructInit:00000000 LL_TIM_BDTR_StructInit + /tmp/ccNvm23w.s:2719 .text.LL_TIM_BDTR_Init:00000000 $t + ARM GAS /tmp/ccNvm23w.s page 198 - /tmp/ccqfGNRw.s:2725 .text.LL_TIM_BDTR_Init:00000000 LL_TIM_BDTR_Init - /tmp/ccqfGNRw.s:2862 .text.LL_TIM_BDTR_Init:00000068 $d + /tmp/ccNvm23w.s:2725 .text.LL_TIM_BDTR_Init:00000000 LL_TIM_BDTR_Init + /tmp/ccNvm23w.s:2862 .text.LL_TIM_BDTR_Init:00000068 $d NO UNDEFINED SYMBOLS diff --git a/build/stm32f7xx_ll_tim.o b/build/stm32f7xx_ll_tim.o index d209220ec49baef8581d73bb9382bb4656d64c75..a8b6d5507ef75c5d6c76af745d456b90adbdcc61 100644 GIT binary patch delta 3222 zcmYjTeNa@_6~Fhs_jccMAF!W~U3OVmS3sijVWASm573E3L03~XZQ3YR6oPRbKT2#y zHzpY|4oQvIjv19KnV3n;w2+i>nn^QSZ6}E~#HJrpQf8Wt{X^*3s!5GtOw)7T+q;FC z^OoN^zu!6Mo^#*A8yDD97ub;!O5ToL(Nia!gc$4K;iZHmz^48%-5FqnFx5GUAJnl2 z2#jg(Y3S6hAkww1@S$AL2~jJ9n?bHV1P?~_lfY685UMqyZgeqcuL7=82e@iOKLMAf z@5g}Z>=WItTF<{!aNT5{!|05wJSyIE6{kK#?-$bR=KYXT`;WwaP9UFlTjC(Ehq~IA z%wwgFNBB3Wza!%%{4?lRn~-=qZ$kbg^YmF&XK?BQd{@S+Q~WTDNBc@TYPkyw-jleV zw_t*=Wx)o%6#4&^@x^=sMUew)!lwqR_Vk}O) zUy29wicLRL1Gfo`IF3iD^Tl@;)z_QS(d!tT1}!5Y0I*v7pKlklUM zoY4$c`THo;CD!>_I2Fs2*x(-{_R|JgikD*LLP_xRGngPIaggu8c)7$8VmK5L%fD}0 z7Yu>TmwuIB#Kesf>wH2NkLS-%)!{k6C*3N)2A70wlvwB0h_^^=@Vj`tZ4$fraV)b_ zVn46L^FASQkS{>}eu*R812baJN?f86qev4o-Gxn7BS&R`*o9w`ShWlHORV!sO!T_M z1~KM}9{0@D^VrWh=~np`9M1<5>--wZhAFqc|KbKejs5+FX11TldvG3qmwY$Bj^iGe z*v}n!{?8>2@@=U9O5(`3`Ce>5Wtshz@OP1rEAez`CVV!yah9*#i}**ad7_w%uI-H`P*&PuwotX1sK6$Fi;Kn zGpgS!mg);|kAs2gn*RZMPE-am75CfPU%?!I2?p991~S?Mwl)SUDF6fQ$v`{wPfhIK zG&8h0Hf<#=9RKV9ZI!u76>k=_&bbWpqivZ|kiaU{0Af2+8*4&96L242ffI#jTvP-z^P0vg zv33_UwiV33T>K!2i|h%uhPUGpcqVTolQ-msyvxOnV4c0J>$CzB9EA!$2J=5B=7lQg zL9sdXU78T*LZP7bQv8|DVV+DA$6;V0Iw)?0qKmBo4B9yscnK*2^FN1g!62>2@ALIO zLKcAe$6%7+e6%iykOn^?)4|MxqP4Iq?1FcL9;NoI!EFuTYbX~O6MrnMgB`oVae7wF z4u8h-ogyz%MTf+~NF-oYAE|t&fRI}zA!os22Zxf8T6M)uXi|weO{$DSw0suK0^t4F z5-EEL9?F;lf)m-`m}9OTd>+Q3tk)nI2wF<8g(tVnWae7qK<0U5-pMl0Pi3B$%%_n#fXrA(o?>7sb3ig5OChxnsVlP7zNyqcNnL}? zUS#gcGJB^odnL0LcEVD)g>;sga#%wwxBdl4Iab=I->o$QbrVuAWvQDS_12);;dO)9 zGK)Hc;bxkVX>X<3G1p?X41F-IwYsvZBl&oHRr{Wu$sKJ~OWSvK?N08fTGO_6!FZu`eB`uZdUE<@6(Q gDP7J+j)~9HWi%*4{pGYpG{Un%bi%V)yx3pxKcdSUe*gdg delta 3259 zcmY*b4RBP|6~6brx0~JEmt=omb~l@3Hw$cjAU`xnfHe(2g3o%4O?oO|wlZ};H|c7B4Lh|tnsM&EWA{aJ))wQzaeK}ahl|My{ztbc%usabC@ zxKaDJ5HZ`+HgwuX5IJls;iim$T&)arf?nMY7e*Zez*7DOLA55>hc1?NuL3T`4zAkZ z55Z+~9KnE^wO8~xYu&$9!F83nkD)WB@{Qs*&SK*fdOw$57vB%P*uIe1$3K8Nwrdgx zxQ_Ts<~CEu!u)O2UzhO+AA^=`HzZ!fBgmg;?qRcPDKB#ZzA59?2JeFL*ltNjE&mh+ zwA z#qv4Q@i^sMvAahcbb zRG{h=OT}UVUW54e5{LQMcClHzzvcioI4RwAydUwK5-0d!#DA2yfqTTXR?KGYVqRP3 zK8nG2WN;@R6f1M8X{YGQDeis_VkCD5^hJp>0K>EYLirIO=1_M6%2ToBtTrG`!xu+2 zd~p!RGtBBkZPgH9Rz)^Vr7iG?VcC zn4HlxR{66ibV%&rkHM-~uEZKYgV;wCvJ}4tyT(G2;NydsAS!WyH(+ORiNi#DkBMkr zd5M4_ur<=J@{^c&t;7x;kJ!l{Fr?ua=v{BfSd@#^H<4;2WRLA~x zJxyC~(OO``H-G_ci@u4rh^O?TCFV@#nAx5Vd+Y)87eX>R$6B*<;l5RWmx>v^pdgNm ze2d`;BqRjJ4#Uv^ioZ~}^L5%MO7n{rn+Xk8gQw`WM#v2?{}`SggWb#X%!CoqlV4^H z?Gfu_K9fU;0MiS_&+?m>KMnJv?dejGz$}#jv6ZQvtwTUt;XIy$6$N3nWr6g(N?0Y< z?t#YkfcZk=z5s6IV4%669+$w=dBf?vK^No=iMhZEYqPGM5v!XM>)k)~vy84&W;&=f5ES99jW;>@0{;A(j>V zo&D1;a>G^h2~i&o`_1apl^5~}`AjF|MX>1Tcq&}0HoXN+D$y*RDl-s`--hY{S7A$J z$tk!fvvvsH$OLEYE3M#tFb-vh4TAoFsTBW;6c}cLJX@MWfy1u5fwKiU*ayIG;v~tE z!}wBKtU+)f6I`sV!eIO(AV93qDs>*3WHU}+{v^Ykajr3$=5N)E^Dc{NoIvUnQl~Q1 zsfE-jN$p4GMPy#jFfT4-UX;uSkU5IXXi%~-d#*2Cilu}vnm z^c~!aMr2yM(r904vdYI_D`~DC-?06XlC%DyR7cN-?(cRV=uYh$ckcLDNmO;E_9m-# zCp+7#nm4!JUA3*fvpdz=l{%Q(*WJ;!{m_F4lD)gzJCbd^?VattRhyFglD+K*Q@w4i z>(`0W?cwp8yK>jk4~6q|A9L*YPVs{?TUg);@&1_>+9=9K zD(IWyo{<=x5(6V~`h_?*0&koji^-8Cv_X6Zu7e_YHV%K()}DCR3, USART_CR3_UCESM); 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccci4zB8.s page 13 + ARM GAS /tmp/ccI996jB.s page 13 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -778,7 +778,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE); 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccci4zB8.s page 14 + ARM GAS /tmp/ccI996jB.s page 14 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -838,7 +838,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Parity configuration (enabled/disabled and parity mode if enabled) 770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PS LL_USART_GetParity\n 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 PCE LL_USART_GetParity - ARM GAS /tmp/ccci4zB8.s page 15 + ARM GAS /tmp/ccI996jB.s page 15 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -898,7 +898,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits) 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 M0 LL_USART_GetDataWidth\n - ARM GAS /tmp/ccci4zB8.s page 16 + ARM GAS /tmp/ccI996jB.s page 16 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M1 LL_USART_GetDataWidth @@ -958,7 +958,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling) 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling); - ARM GAS /tmp/ccci4zB8.s page 17 + ARM GAS /tmp/ccI996jB.s page 17 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_1EDGE 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccci4zB8.s page 18 + ARM GAS /tmp/ccI996jB.s page 18 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance. 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : - ARM GAS /tmp/ccci4zB8.s page 19 + ARM GAS /tmp/ccI996jB.s page 19 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccci4zB8.s page 20 + ARM GAS /tmp/ccI996jB.s page 20 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx) @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_EVEN 1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_ODD 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param StopBits This parameter can be one of the following values: - ARM GAS /tmp/ccci4zB8.s page 21 + ARM GAS /tmp/ccI996jB.s page 21 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_0_5 @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve RX pin active level logic configuration 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RXINV LL_USART_GetRXPinLevel - ARM GAS /tmp/ccci4zB8.s page 22 + ARM GAS /tmp/ccI996jB.s page 22 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve Binary data configuration 1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 DATAINV LL_USART_GetBinaryDataLogic 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccci4zB8.s page 23 + ARM GAS /tmp/ccI996jB.s page 23 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Auto Baud-Rate Detection 1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance. - ARM GAS /tmp/ccci4zB8.s page 24 + ARM GAS /tmp/ccI996jB.s page 24 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABREN LL_USART_DisableAutoBaudRate @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE)); 1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccci4zB8.s page 25 + ARM GAS /tmp/ccI996jB.s page 25 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_ - ARM GAS /tmp/ccci4zB8.s page 26 + ARM GAS /tmp/ccI996jB.s page 26 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx) 1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); - ARM GAS /tmp/ccci4zB8.s page 27 + ARM GAS /tmp/ccI996jB.s page 27 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_NONE 1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_RTS - ARM GAS /tmp/ccci4zB8.s page 28 + ARM GAS /tmp/ccI996jB.s page 28 1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_CTS @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 OVRDIS LL_USART_DisableOverrunDetect 1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccci4zB8.s page 29 + ARM GAS /tmp/ccI996jB.s page 29 1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure USART BRR register for achieving expected Baud Rate value. 1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Compute and set USARTDIV value in BRR Register (full BRR content) - ARM GAS /tmp/ccci4zB8.s page 30 + ARM GAS /tmp/ccI996jB.s page 30 1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 52 .L4: 1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrtemp = usartdiv & 0xFFF0U; 53 .loc 2 1648 5 is_stmt 1 view .LVU10 - ARM GAS /tmp/ccci4zB8.s page 31 + ARM GAS /tmp/ccI996jB.s page 31 1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrtemp = usartdiv & 0xFFF0U; @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 12:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * This software is licensed under terms that can be found in the LICENSE file 13:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * in the root directory of this software component. 14:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * If no LICENSE file comes with this software, it is provided AS-IS. - ARM GAS /tmp/ccci4zB8.s page 32 + ARM GAS /tmp/ccI996jB.s page 32 15:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 69:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** || ((__VALUE__) == LL_USART_DIRECTION_TX) \ 70:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** || ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) 71:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** - ARM GAS /tmp/ccci4zB8.s page 33 + ARM GAS /tmp/ccI996jB.s page 33 72:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 126:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** */ 127:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx) 128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** { - ARM GAS /tmp/ccci4zB8.s page 34 + ARM GAS /tmp/ccI996jB.s page 34 90 .loc 1 128 1 is_stmt 1 view -0 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 114 0012 3B4B ldr r3, .L23+12 115 0014 9842 cmp r0, r3 116 0016 31D0 beq .L18 - ARM GAS /tmp/ccci4zB8.s page 35 + ARM GAS /tmp/ccI996jB.s page 35 159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** { @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8); 194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** /* Release reset of UART clock */ - ARM GAS /tmp/ccci4zB8.s page 36 + ARM GAS /tmp/ccI996jB.s page 36 196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8); @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Define to prevent recursive inclusion -------------------------------------*/ - ARM GAS /tmp/ccci4zB8.s page 37 + ARM GAS /tmp/ccI996jB.s page 37 36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #ifndef __STM32F7xx_LL_BUS_H @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(DMA2D) 91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA2D RCC_AHB1ENR_DMA2DEN 92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* DMA2D */ - ARM GAS /tmp/ccci4zB8.s page 38 + ARM GAS /tmp/ccI996jB.s page 38 93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(ETH) @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_ALL 0xFFFFFFFFU 148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN 149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1ENR_TIM3EN - ARM GAS /tmp/ccci4zB8.s page 39 + ARM GAS /tmp/ccI996jB.s page 39 150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR_TIM4EN @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC2 RCC_APB2ENR_ADC2EN 205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC3 RCC_APB2ENR_ADC3EN 206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SDMMC1 RCC_APB2ENR_SDMMC1EN - ARM GAS /tmp/ccci4zB8.s page 40 + ARM GAS /tmp/ccI996jB.s page 40 207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SDMMC2) @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIODEN LL_AHB1_GRP1_EnableClock\n 262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOEEN LL_AHB1_GRP1_EnableClock\n 263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOFEN LL_AHB1_GRP1_EnableClock\n - ARM GAS /tmp/ccci4zB8.s page 41 + ARM GAS /tmp/ccI996jB.s page 41 264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOGEN LL_AHB1_GRP1_EnableClock\n @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB1 peripheral clock is enabled or not 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_IsEnabledClock\n - ARM GAS /tmp/ccci4zB8.s page 42 + ARM GAS /tmp/ccI996jB.s page 42 321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_IsEnabledClock\n @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB1 peripherals clock. - ARM GAS /tmp/ccci4zB8.s page 43 + ARM GAS /tmp/ccI996jB.s page 43 378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_DisableClock\n @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** - ARM GAS /tmp/ccci4zB8.s page 44 + ARM GAS /tmp/ccI996jB.s page 44 435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB1 peripherals reset. @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ReleaseReset\n 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ReleaseReset\n 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ReleaseReset\n - ARM GAS /tmp/ccci4zB8.s page 45 + ARM GAS /tmp/ccI996jB.s page 45 492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ReleaseReset\n @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DTCMRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_EnableClockLowPower\n - ARM GAS /tmp/ccci4zB8.s page 46 + ARM GAS /tmp/ccI996jB.s page 46 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_EnableClockLowPower\n @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_DisableClockLowPower\n 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_DisableClockLowPower\n 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_DisableClockLowPower\n - ARM GAS /tmp/ccci4zB8.s page 47 + ARM GAS /tmp/ccI996jB.s page 47 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_DisableClockLowPower\n @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB1LPENR, Periphs); 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - ARM GAS /tmp/ccci4zB8.s page 48 + ARM GAS /tmp/ccI996jB.s page 48 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * - ARM GAS /tmp/ccci4zB8.s page 49 + ARM GAS /tmp/ccI996jB.s page 49 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs) - ARM GAS /tmp/ccci4zB8.s page 50 + ARM GAS /tmp/ccI996jB.s page 50 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; 832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2LPENR, Periphs); 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - ARM GAS /tmp/ccci4zB8.s page 51 + ARM GAS /tmp/ccI996jB.s page 51 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs); @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB3ENR, Periphs); 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - ARM GAS /tmp/ccci4zB8.s page 52 + ARM GAS /tmp/ccI996jB.s page 52 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) - ARM GAS /tmp/ccci4zB8.s page 53 + ARM GAS /tmp/ccI996jB.s page 53 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB1 peripherals clock. 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n - ARM GAS /tmp/ccci4zB8.s page 54 + ARM GAS /tmp/ccI996jB.s page 54 1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) 1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) - ARM GAS /tmp/ccci4zB8.s page 55 + ARM GAS /tmp/ccI996jB.s page 55 1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 - ARM GAS /tmp/ccci4zB8.s page 56 + ARM GAS /tmp/ccI996jB.s page 56 1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_DisableClock\n 1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n 1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n - ARM GAS /tmp/ccci4zB8.s page 57 + ARM GAS /tmp/ccI996jB.s page 57 1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_DisableClock\n @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ForceReset\n 1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n 1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ForceReset\n - ARM GAS /tmp/ccci4zB8.s page 58 + ARM GAS /tmp/ccI996jB.s page 58 1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ForceReset\n @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7 - ARM GAS /tmp/ccci4zB8.s page 59 + ARM GAS /tmp/ccI996jB.s page 59 1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) - ARM GAS /tmp/ccci4zB8.s page 60 + ARM GAS /tmp/ccI996jB.s page 60 1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR DACLPEN LL_APB1_GRP1_EnableClockLowPower\n 1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_EnableClockLowPower\n 1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_EnableClockLowPower\n - ARM GAS /tmp/ccci4zB8.s page 61 + ARM GAS /tmp/ccI996jB.s page 61 1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR RTCLPEN LL_APB1_GRP1_EnableClockLowPower @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM12LPEN LL_APB1_GRP1_DisableClockLowPower\n 1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM13LPEN LL_APB1_GRP1_DisableClockLowPower\n 1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM14LPEN LL_APB1_GRP1_DisableClockLowPower\n - ARM GAS /tmp/ccci4zB8.s page 62 + ARM GAS /tmp/ccI996jB.s page 62 1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_DisableClockLowPower\n @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None - ARM GAS /tmp/ccci4zB8.s page 63 + ARM GAS /tmp/ccI996jB.s page 63 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 - ARM GAS /tmp/ccci4zB8.s page 64 + ARM GAS /tmp/ccI996jB.s page 64 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC1 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC2 (*) - ARM GAS /tmp/ccci4zB8.s page 65 + ARM GAS /tmp/ccI996jB.s page 65 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART6 1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 - ARM GAS /tmp/ccci4zB8.s page 66 + ARM GAS /tmp/ccI996jB.s page 66 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART6 - ARM GAS /tmp/ccci4zB8.s page 67 + ARM GAS /tmp/ccI996jB.s page 67 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR TIM9RST LL_APB2_GRP1_ReleaseReset\n 1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR TIM10RST LL_APB2_GRP1_ReleaseReset\n 1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR TIM11RST LL_APB2_GRP1_ReleaseReset\n - ARM GAS /tmp/ccci4zB8.s page 68 + ARM GAS /tmp/ccI996jB.s page 68 1788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR SPI5RST LL_APB2_GRP1_ReleaseReset\n @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 176 .LBB49: 177 .LBB48: 1828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - ARM GAS /tmp/ccci4zB8.s page 69 + ARM GAS /tmp/ccI996jB.s page 69 178 .loc 3 1828 1 view .LVU51 @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 221 .loc 3 1370 1 view .LVU63 222 .LBE54: 223 .LBE55: - ARM GAS /tmp/ccci4zB8.s page 70 + ARM GAS /tmp/ccI996jB.s page 70 153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 266 .loc 3 1295 22 view .LVU76 267 .LBB63: - ARM GAS /tmp/ccci4zB8.s page 71 + ARM GAS /tmp/ccI996jB.s page 71 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 310 009a 42F48012 orr r2, r2, #1048576 311 009e 1A62 str r2, [r3, #32] 312 .LVL27: - ARM GAS /tmp/ccci4zB8.s page 72 + ARM GAS /tmp/ccI996jB.s page 72 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 180:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** } 355 .loc 1 180 5 is_stmt 1 view .LVU101 356 .LBB76: - ARM GAS /tmp/ccci4zB8.s page 73 + ARM GAS /tmp/ccI996jB.s page 73 357 .LBI76: @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 400 00d0 1A6A ldr r2, [r3, #32] 401 00d2 22F08042 bic r2, r2, #1073741824 402 00d6 1A62 str r2, [r3, #32] - ARM GAS /tmp/ccci4zB8.s page 74 + ARM GAS /tmp/ccI996jB.s page 74 403 .LVL36: @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 445 .LBE88: 129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** 446 .loc 1 129 15 view .LVU127 - ARM GAS /tmp/ccci4zB8.s page 75 + ARM GAS /tmp/ccI996jB.s page 75 447 00f0 0020 movs r0, #0 @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 485 .LCFI0: 486 .cfi_def_cfa_offset 16 487 .cfi_offset 3, -16 - ARM GAS /tmp/ccci4zB8.s page 76 + ARM GAS /tmp/ccI996jB.s page 76 488 .cfi_offset 4, -12 @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 240:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters 241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value 242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity - ARM GAS /tmp/ccci4zB8.s page 77 + ARM GAS /tmp/ccI996jB.s page 77 243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->Transfe @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** /*---------------------------- USART CR3 Configuration --------------------- 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * Configure USARTx CR3 (Hardware Flow Control) with parameters: 261:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to - ARM GAS /tmp/ccci4zB8.s page 78 + ARM GAS /tmp/ccI996jB.s page 78 262:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * USART_InitStruct->HardwareFlowControl value. @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** { 279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE); 280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** } - ARM GAS /tmp/ccci4zB8.s page 79 + ARM GAS /tmp/ccI996jB.s page 79 281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** else if (USARTx == UART4) @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 620 .loc 1 271 19 is_stmt 0 view .LVU180 621 0072 0320 movs r0, #3 622 .LVL54: - ARM GAS /tmp/ccci4zB8.s page 80 + ARM GAS /tmp/ccI996jB.s page 80 271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** } @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 654 .loc 1 279 19 is_stmt 0 view .LVU194 655 008a 3020 movs r0, #48 656 .LVL61: - ARM GAS /tmp/ccci4zB8.s page 81 + ARM GAS /tmp/ccI996jB.s page 81 279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** } @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** } 697 .loc 1 295 7 is_stmt 1 view .LVU209 295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** } - ARM GAS /tmp/ccci4zB8.s page 82 + ARM GAS /tmp/ccI996jB.s page 82 698 .loc 1 295 19 is_stmt 0 view .LVU210 @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** /* Check BRR is greater than or equal to 16d */ 320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR)); 737 .loc 1 320 7 is_stmt 1 view .LVU222 - ARM GAS /tmp/ccci4zB8.s page 83 + ARM GAS /tmp/ccI996jB.s page 83 321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** } @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 776 @ frame_needed = 0, uses_anonymous_args = 0 777 @ link register save eliminated. 337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** /* Set USART_InitStruct fields to default values */ - ARM GAS /tmp/ccci4zB8.s page 84 + ARM GAS /tmp/ccI996jB.s page 84 338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE; @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * that contains the Clock configuration information for the specified USART peripheral. 356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * @retval An ErrorStatus enumeration value: 357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - SUCCESS: USART registers related to Clock settings are initialized according - ARM GAS /tmp/ccci4zB8.s page 85 + ARM GAS /tmp/ccI996jB.s page 85 358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * to USART_ClockInitStruct content @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 379:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** LL_USART_DisableSCLKOutput(USARTx); 845 .loc 1 379 7 is_stmt 1 view .LVU256 846 .LVL88: - ARM GAS /tmp/ccci4zB8.s page 86 + ARM GAS /tmp/ccI996jB.s page 86 847 .LBB100: @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->Cloc 395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->Cloc 396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->Last - ARM GAS /tmp/ccci4zB8.s page 87 + ARM GAS /tmp/ccI996jB.s page 87 397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** */ @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccci4zB8.s page 1 917 .syntax unified 918 .thumb 919 .thumb_func - ARM GAS /tmp/ccci4zB8.s page 88 + ARM GAS /tmp/ccI996jB.s page 88 921 LL_USART_ClockStructInit: @@ -5270,25 +5270,25 @@ ARM GAS /tmp/ccci4zB8.s page 1 950 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 951 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" 952 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - ARM GAS /tmp/ccci4zB8.s page 89 + ARM GAS /tmp/ccI996jB.s page 89 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_ll_usart.c - /tmp/ccci4zB8.s:20 .text.LL_USART_SetBaudRate:00000000 $t - /tmp/ccci4zB8.s:25 .text.LL_USART_SetBaudRate:00000000 LL_USART_SetBaudRate - /tmp/ccci4zB8.s:81 .text.LL_USART_DeInit:00000000 $t - /tmp/ccci4zB8.s:87 .text.LL_USART_DeInit:00000000 LL_USART_DeInit - /tmp/ccci4zB8.s:456 .text.LL_USART_DeInit:000000f4 $d - /tmp/ccci4zB8.s:470 .text.LL_USART_Init:00000000 $t - /tmp/ccci4zB8.s:476 .text.LL_USART_Init:00000000 LL_USART_Init - /tmp/ccci4zB8.s:751 .text.LL_USART_Init:000000d8 $d - /tmp/ccci4zB8.s:764 .text.LL_USART_StructInit:00000000 $t - /tmp/ccci4zB8.s:770 .text.LL_USART_StructInit:00000000 LL_USART_StructInit - /tmp/ccci4zB8.s:808 .text.LL_USART_ClockInit:00000000 $t - /tmp/ccci4zB8.s:814 .text.LL_USART_ClockInit:00000000 LL_USART_ClockInit - /tmp/ccci4zB8.s:915 .text.LL_USART_ClockStructInit:00000000 $t - /tmp/ccci4zB8.s:921 .text.LL_USART_ClockStructInit:00000000 LL_USART_ClockStructInit + /tmp/ccI996jB.s:20 .text.LL_USART_SetBaudRate:00000000 $t + /tmp/ccI996jB.s:25 .text.LL_USART_SetBaudRate:00000000 LL_USART_SetBaudRate + /tmp/ccI996jB.s:81 .text.LL_USART_DeInit:00000000 $t + /tmp/ccI996jB.s:87 .text.LL_USART_DeInit:00000000 LL_USART_DeInit + /tmp/ccI996jB.s:456 .text.LL_USART_DeInit:000000f4 $d + /tmp/ccI996jB.s:470 .text.LL_USART_Init:00000000 $t + /tmp/ccI996jB.s:476 .text.LL_USART_Init:00000000 LL_USART_Init + /tmp/ccI996jB.s:751 .text.LL_USART_Init:000000d8 $d + /tmp/ccI996jB.s:764 .text.LL_USART_StructInit:00000000 $t + /tmp/ccI996jB.s:770 .text.LL_USART_StructInit:00000000 LL_USART_StructInit + /tmp/ccI996jB.s:808 .text.LL_USART_ClockInit:00000000 $t + /tmp/ccI996jB.s:814 .text.LL_USART_ClockInit:00000000 LL_USART_ClockInit + /tmp/ccI996jB.s:915 .text.LL_USART_ClockStructInit:00000000 $t + /tmp/ccI996jB.s:921 .text.LL_USART_ClockStructInit:00000000 LL_USART_ClockStructInit UNDEFINED SYMBOLS LL_RCC_GetUSARTClockFreq diff --git a/build/stm32f7xx_ll_usart.o b/build/stm32f7xx_ll_usart.o index 6d6703cf23f0a44b34431a4b3d2fd411a23d7a41..9961600901c28b7eed02a75eacbb5581195f53a2 100644 GIT binary patch delta 819 zcmY+AT}V@57{}k|J?HGqoo#LHqphY(T<*+pYZ;|Q!;e8(H0z>*qM~pmnN3Wy8%^nE ziAC^;U6lqAK}d-iR2Bq^cM{=+7e*xn3f@TBmr*_MQ7=01yyyIRe*gdTyk|ZOqglAM z5qbvm-*A0NX3V->Vr(~OY>NH=a9Mp!eQs7;&?1%iW5h@o2$tjiRzf*fTS!T_@rbmC z|KivuMdPysDPOp=O8^B9Z9wR+tJO*i8T@X_g?{v?rH*f+)v?l&o!xjsO%_kk zN@~ygGg|d*K=WFy}@%<-&B)B)xiwJWrLU3+Hs|oyu4*Ez(UDv=1e6ngIH6 z&=T+%rmI`)EsV_(E7l}n#&VW}2diy?yme%eW=&p@9ucEIr|Bej7#oKV<273ubm1$T zf0Ib!b*7zSJ{?soDc$gtJ+jxZ#pQBg)7|23arw}4 z`bS!ZyJZ?Zr%}@&-OD5^vWjLkUvKN07JN@?Gc+bo~Pxk*VSU delta 867 zcmY+CUr1AN6vuz(ckg!BuCp!Y+G=Vx%em4q6Vp&pCz$=2>wolbOgGaa2TQRR%ZSLr zAUIYpt=@v@C9{Gkt)S2c5s4xntVn!FSoBa@QCR19)rT&ed+#~F&-Z)I?|1LZZb){+ zl~wSxFZ%^|yL61D9FZ84Ib-AO|BK7YJDD+VP!edAHaIR2BlQZ{=jb4mb0tBU^bGe( zwS2XNx1<7}nJT((+;T|(F0=ZUM7r;bxmCSGj=Gt}+^&w}oaD7k3e_)eNoXp!x*jWJ zFC?*5&azw;4u2OFHR>$hl(S$I2jwizWc(->aHEV%bp;ly@HR>dE~nIc7|>-en-W!% zq)jBbxNd`GJ(vTK5#ob^M{vfMHBmO3az!1iBWMWXl6Q ztkmSs(nv~y?G>%bTsD}~;1M|}+-d^h0W-8<6>lsJzT&8|1rDLZkO>|vG2}rpHW(r+ z!^A*6=s{q13f{@Up=Zn%#7_nre88WEj64td!i47yJ$i{eMv)m5%89^hg|TZiNDoC; zaeu{PQ#RRL}-!$5Tawqc^W9!Bs>^*R_thu;OavD}{vV;H6T nAH3|()$MmPR*2b^X*l9HLl3^E+JuL(=UUBKW2Ud1U$gul_8Gh5 diff --git a/build/stm32f7xx_ll_utils.lst b/build/stm32f7xx_ll_utils.lst index 56b8018..7f1dcca 100644 --- a/build/stm32f7xx_ll_utils.lst +++ b/build/stm32f7xx_ll_utils.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccTd4L28.s page 1 +ARM GAS /tmp/ccqw5Uyy.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /** @addtogroup STM32F7xx_LL_Driver 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * @{ 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** */ - ARM GAS /tmp/ccTd4L28.s page 2 + ARM GAS /tmp/ccqw5Uyy.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ - ARM GAS /tmp/ccTd4L28.s page 3 + ARM GAS /tmp/ccqw5Uyy.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ @@ -178,7 +178,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_PLLM_DIV_41) \ 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_PLLM_DIV_42) \ 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_PLLM_DIV_43) \ - ARM GAS /tmp/ccTd4L28.s page 4 + ARM GAS /tmp/ccqw5Uyy.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_PLLM_DIV_44) \ @@ -238,7 +238,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /* Exported functions --------------------------------------------------------*/ 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /** @addtogroup UTILS_LL_Exported_Functions - ARM GAS /tmp/ccTd4L28.s page 5 + ARM GAS /tmp/ccqw5Uyy.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * @{ @@ -298,7 +298,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** */ 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /** @addtogroup UTILS_EF_SYSTEM - ARM GAS /tmp/ccTd4L28.s page 6 + ARM GAS /tmp/ccqw5Uyy.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * @brief System Configuration functions @@ -358,7 +358,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** SystemCoreClock = HCLKFrequency; 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** } 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** - ARM GAS /tmp/ccTd4L28.s page 7 + ARM GAS /tmp/ccqw5Uyy.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /** @@ -418,7 +418,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** { 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /* 60 < HCLK <= 90 => 2WS (3 CPU cycles) */ 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** latency = LL_FLASH_LATENCY_2; - ARM GAS /tmp/ccTd4L28.s page 8 + ARM GAS /tmp/ccqw5Uyy.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** } @@ -478,7 +478,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** } 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** else if(HCLK_Frequency > UTILS_SCALE3_LATENCY2_FREQ) 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** { - ARM GAS /tmp/ccTd4L28.s page 9 + ARM GAS /tmp/ccqw5Uyy.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /* 60 < HCLK <= 90 => 2WS (3 CPU cycles) */ @@ -538,7 +538,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * - SUCCESS: Max frequency configuration done 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * - ERROR: Max frequency configuration not done 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** */ - ARM GAS /tmp/ccTd4L28.s page 10 + ARM GAS /tmp/ccqw5Uyy.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, @@ -598,7 +598,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * @retval An ErrorStatus enumeration value: 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * - SUCCESS: Max frequency configuration done 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * - ERROR: Max frequency configuration not done - ARM GAS /tmp/ccTd4L28.s page 11 + ARM GAS /tmp/ccqw5Uyy.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** */ @@ -658,7 +658,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /** 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * @} 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** */ - ARM GAS /tmp/ccTd4L28.s page 12 + ARM GAS /tmp/ccqw5Uyy.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 51 .loc 1 632 11 view .LVU13 52 0010 03FB00F0 mul r0, r3, r0 53 .LVL2: - ARM GAS /tmp/ccTd4L28.s page 13 + ARM GAS /tmp/ccqw5Uyy.s page 13 633:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** assert_param(IS_LL_UTILS_PLLVCO_OUTPUT(pllfreq)); @@ -778,7 +778,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 89 .LBB54: 90 .LBI54: 91 .file 2 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - ARM GAS /tmp/ccTd4L28.s page 14 + ARM GAS /tmp/ccqw5Uyy.s page 14 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @@ -838,7 +838,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_Private_Macros RCC Private Macros 56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ 57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ - ARM GAS /tmp/ccTd4L28.s page 15 + ARM GAS /tmp/ccqw5Uyy.s page 15 58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @@ -898,7 +898,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LSE_VALUE 32768U /*!< Value of the LSE oscillator in Hz */ 113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* LSE_VALUE */ 114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/ccTd4L28.s page 16 + ARM GAS /tmp/ccqw5Uyy.s page 16 115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if !defined (LSI_VALUE) @@ -958,7 +958,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @} 171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ - ARM GAS /tmp/ccTd4L28.s page 17 + ARM GAS /tmp/ccqw5Uyy.s page 17 172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_16 RCC_CFGR_HPRE_DIV16 /*!< SYSCLK divided by 16 */ 227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_64 RCC_CFGR_HPRE_DIV64 /*!< SYSCLK divided by 64 */ 228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */ - ARM GAS /tmp/ccTd4L28.s page 18 + ARM GAS /tmp/ccqw5Uyy.s page 18 229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_256 RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */ @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_3 (uint32_t)(RCC_CFGR_MCO2PRE|((RCC_CFGR_MCO2PRE_2|RCC_CFG 284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_4 (uint32_t)(RCC_CFGR_MCO2PRE|((RCC_CFGR_MCO2PRE_2|RCC_CFG 285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_5 (uint32_t)(RCC_CFGR_MCO2PRE|(RCC_CFGR_MCO2PRE >> 16U)) - ARM GAS /tmp/ccTd4L28.s page 19 + ARM GAS /tmp/ccqw5Uyy.s page 19 286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_USART1_CLKSOURCE_PCLK2 (uint32_t)((RCC_DCKCFGR2_USART1SEL << 16U) | 0x00000000U - ARM GAS /tmp/ccTd4L28.s page 20 + ARM GAS /tmp/ccqw5Uyy.s page 20 343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_USART1_CLKSOURCE_SYSCLK (uint32_t)((RCC_DCKCFGR2_USART1SEL << 16U) | RCC_DCKCFGR @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(I2C4) 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_I2C4_CLKSOURCE_PCLK1 (uint32_t)(RCC_DCKCFGR2_I2C4SEL|0x00000000U) /*!< PCLK1 399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_I2C4_CLKSOURCE_SYSCLK (uint32_t)(RCC_DCKCFGR2_I2C4SEL|(RCC_DCKCFGR2_I2C4SEL_0 - ARM GAS /tmp/ccTd4L28.s page 21 + ARM GAS /tmp/ccqw5Uyy.s page 21 400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_I2C4_CLKSOURCE_HSI (uint32_t)(RCC_DCKCFGR2_I2C4SEL|(RCC_DCKCFGR2_I2C4SEL_1 @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @} 456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ - ARM GAS /tmp/ccTd4L28.s page 22 + ARM GAS /tmp/ccqw5Uyy.s page 22 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_DFSDM1_AUDIO_CLKSOURCE_SAI1 0x00000000U /*!< SAI1 clock used as D 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_DFSDM1_AUDIO_CLKSOURCE_SAI2 RCC_DCKCFGR1_ADFSDM1SEL /*!< SAI2 clock used as D 513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** - ARM GAS /tmp/ccTd4L28.s page 23 + ARM GAS /tmp/ccqw5Uyy.s page 23 514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @} @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_SAIx Peripheral SAI get clock source - ARM GAS /tmp/ccTd4L28.s page 24 + ARM GAS /tmp/ccqw5Uyy.s page 24 571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ 626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE RCC_CFGR_I2SSRC /*!< I2S Clock source selection */ - ARM GAS /tmp/ccTd4L28.s page 25 + ARM GAS /tmp/ccqw5Uyy.s page 25 628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_NONE 0x00000000U /*!< No clock used as RTC clock 683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_LSE RCC_BDCR_RTCSEL_0 /*!< LSE oscillator clock used a 684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_LSI RCC_BDCR_RTCSEL_1 /*!< LSI oscillator clock used a - ARM GAS /tmp/ccTd4L28.s page 26 + ARM GAS /tmp/ccqw5Uyy.s page 26 685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_HSE RCC_BDCR_RTCSEL /*!< HSE oscillator clock divide @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_30 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_P 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_31 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_P 741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_32 (RCC_PLLCFGR_PLLM_5) /*!< PLL, PLLI2S and PLLSAI divisio - ARM GAS /tmp/ccTd4L28.s page 27 + ARM GAS /tmp/ccqw5Uyy.s page 27 742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_33 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_4 RCC_PLLCFGR_PLLP_0 /*!< Main PLL division factor for 797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_6 RCC_PLLCFGR_PLLP_1 /*!< Main PLL division factor for 798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_8 (RCC_PLLCFGR_PLLP_1 | RCC_PLLCFGR_PLLP_0) /*!< Main PL - ARM GAS /tmp/ccTd4L28.s page 28 + ARM GAS /tmp/ccqw5Uyy.s page 28 799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLLI2SDIVQ PLLI2SDIVQ division factor (PLLI2SDIVQ) 855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ - ARM GAS /tmp/ccTd4L28.s page 29 + ARM GAS /tmp/ccqw5Uyy.s page 29 856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SP_DIV_2 0x00000000U /*!< PLLI2S division factor for PL 911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SP_DIV_4 RCC_PLLI2SCFGR_PLLI2SP_0 /*!< PLLI2S division fact 912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SP_DIV_6 RCC_PLLI2SCFGR_PLLI2SP_1 /*!< PLLI2S division fact - ARM GAS /tmp/ccTd4L28.s page 30 + ARM GAS /tmp/ccqw5Uyy.s page 30 913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SP_DIV_8 (RCC_PLLI2SCFGR_PLLI2SP_1 | RCC_PLLI2SCFGR_PLLI2SP_0) @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIDIVQ_DIV_25 (RCC_DCKCFGR1_PLLSAIDIVQ_4 | RCC_DCKCFGR1_PLLSAIDIVQ_3) 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIDIVQ_DIV_26 (RCC_DCKCFGR1_PLLSAIDIVQ_4 | RCC_DCKCFGR1_PLLSAIDIVQ_3 | 969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIDIVQ_DIV_27 (RCC_DCKCFGR1_PLLSAIDIVQ_4 | RCC_DCKCFGR1_PLLSAIDIVQ_3 | - ARM GAS /tmp/ccTd4L28.s page 31 + ARM GAS /tmp/ccqw5Uyy.s page 31 970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIDIVQ_DIV_28 (RCC_DCKCFGR1_PLLSAIDIVQ_4 | RCC_DCKCFGR1_PLLSAIDIVQ_3 | @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ 1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/ccTd4L28.s page 32 + ARM GAS /tmp/ccqw5Uyy.s page 32 1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_24 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_25 1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_26 - ARM GAS /tmp/ccTd4L28.s page 33 + ARM GAS /tmp/ccqw5Uyy.s page 33 1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27 @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_2 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_3 1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_4 - ARM GAS /tmp/ccTd4L28.s page 34 + ARM GAS /tmp/ccqw5Uyy.s page 34 1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_5 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_59 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_60 1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_61 - ARM GAS /tmp/ccTd4L28.s page 35 + ARM GAS /tmp/ccqw5Uyy.s page 35 1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_62 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_26 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27 1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_28 - ARM GAS /tmp/ccTd4L28.s page 36 + ARM GAS /tmp/ccqw5Uyy.s page 36 1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_29 @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param __PLLM__ This parameter can be one of the following values: 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_2 1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_3 - ARM GAS /tmp/ccTd4L28.s page 37 + ARM GAS /tmp/ccqw5Uyy.s page 37 1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_4 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_58 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_59 1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_60 - ARM GAS /tmp/ccTd4L28.s page 38 + ARM GAS /tmp/ccqw5Uyy.s page 38 1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_61 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLSAI_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLSAIN__, __PLLSAIQ__, __PLLSAIDI 1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** (((__PLLSAIQ__) >> RCC_PLLSAICFGR_PLLSAIQ_Pos) * (((__PLLSAIDIVQ__) >> RCC_DCKCF 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/ccTd4L28.s page 39 + ARM GAS /tmp/ccqw5Uyy.s page 39 1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_50 1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_51 1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_52 - ARM GAS /tmp/ccTd4L28.s page 40 + ARM GAS /tmp/ccqw5Uyy.s page 40 1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_53 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27 1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_28 1539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_29 - ARM GAS /tmp/ccTd4L28.s page 41 + ARM GAS /tmp/ccqw5Uyy.s page 41 1540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_30 @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Helper macro to calculate the PLLI2S frequency used for SAI1 and SAI2 domains 1595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @note ex: @ref __LL_RCC_CALC_PLLI2S_SAI_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (), 1596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @ref LL_RCC_PLLI2S_GetN (), @ref LL_RCC_PLLI2S_GetQ (), @ref LL_RCC_PLLI2S_GetDIVQ - ARM GAS /tmp/ccTd4L28.s page 42 + ARM GAS /tmp/ccqw5Uyy.s page 42 1597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI) @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_54 1652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_55 1653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_56 - ARM GAS /tmp/ccTd4L28.s page 43 + ARM GAS /tmp/ccqw5Uyy.s page 43 1654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_57 @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_31 1709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_32 1710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval PLLI2S clock frequency (in Hz) - ARM GAS /tmp/ccTd4L28.s page 44 + ARM GAS /tmp/ccqw5Uyy.s page 44 1711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_45 1766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_46 1767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_47 - ARM GAS /tmp/ccTd4L28.s page 45 + ARM GAS /tmp/ccqw5Uyy.s page 45 1768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_48 @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_22 1823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_23 1824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_24 - ARM GAS /tmp/ccTd4L28.s page 46 + ARM GAS /tmp/ccqw5Uyy.s page 46 1825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_25 @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param __SYSCLKFREQ__ SYSCLK frequency (based on HSE/HSI/PLLCLK) 1880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param __AHBPRESCALER__ This parameter can be one of the following values: 1881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYSCLK_DIV_1 - ARM GAS /tmp/ccTd4L28.s page 47 + ARM GAS /tmp/ccqw5Uyy.s page 47 1882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYSCLK_DIV_2 @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 1937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 1938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Enable the Clock Security System. - ARM GAS /tmp/ccTd4L28.s page 48 + ARM GAS /tmp/ccqw5Uyy.s page 48 1939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll CR CSSON LL_RCC_HSE_EnableCSS @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { 1994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** return (READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY)); 1995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } - ARM GAS /tmp/ccTd4L28.s page 49 + ARM GAS /tmp/ccqw5Uyy.s page 49 1996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @note Default value is 16, which, when added to the HSICAL value, 2051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * should trim the HSI to 16 MHz +/- 1 % 2052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll CR HSITRIM LL_RCC_HSI_SetCalibTrimming - ARM GAS /tmp/ccTd4L28.s page 50 + ARM GAS /tmp/ccqw5Uyy.s page 50 2053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param Value Between Min_Data = 0 and Max_Data = 31 @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 2108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 2109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** - ARM GAS /tmp/ccTd4L28.s page 51 + ARM GAS /tmp/ccqw5Uyy.s page 51 2110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Disable external clock source (LSE bypass). @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ 2165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 2166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/ccTd4L28.s page 52 + ARM GAS /tmp/ccqw5Uyy.s page 52 2167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll CFGR SWS LL_RCC_GetSysClkSource 2222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval Returned value can be one of the following values: 2223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI - ARM GAS /tmp/ccTd4L28.s page 53 + ARM GAS /tmp/ccqw5Uyy.s page 53 2224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler) 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { - ARM GAS /tmp/ccTd4L28.s page 54 + ARM GAS /tmp/ccqw5Uyy.s page 54 2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler); @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 2336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 2337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_MCO MCO - ARM GAS /tmp/ccTd4L28.s page 55 + ARM GAS /tmp/ccqw5Uyy.s page 55 2338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{ @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_USART1_CLKSOURCE_LSE 2393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_USART2_CLKSOURCE_PCLK1 2394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_USART2_CLKSOURCE_SYSCLK - ARM GAS /tmp/ccTd4L28.s page 56 + ARM GAS /tmp/ccqw5Uyy.s page 56 2395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_USART2_CLKSOURCE_HSI @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C1_CLKSOURCE_PCLK1 2450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK 2451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI - ARM GAS /tmp/ccTd4L28.s page 57 + ARM GAS /tmp/ccqw5Uyy.s page 57 2452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C2_CLKSOURCE_PCLK1 @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 2507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 2508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure SDMMC clock source - ARM GAS /tmp/ccTd4L28.s page 58 + ARM GAS /tmp/ccqw5Uyy.s page 58 2509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR2 SDMMC1SEL LL_RCC_SetSDMMCClockSource\n @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 2564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(CEC) 2565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** - ARM GAS /tmp/ccTd4L28.s page 59 + ARM GAS /tmp/ccqw5Uyy.s page 59 2566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure CEC clock source @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 2621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 2622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure DFSDM Kernel clock source - ARM GAS /tmp/ccTd4L28.s page 60 + ARM GAS /tmp/ccqw5Uyy.s page 60 2623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR1 DFSDM1SEL LL_RCC_SetDFSDMClockSource @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_UART5_CLKSOURCE 2678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_UART7_CLKSOURCE 2679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_UART8_CLKSOURCE - ARM GAS /tmp/ccTd4L28.s page 61 + ARM GAS /tmp/ccqw5Uyy.s page 61 2680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval Returned value can be one of the following values: @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 2735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 2736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Get LPTIMx clock source - ARM GAS /tmp/ccTd4L28.s page 62 + ARM GAS /tmp/ccqw5Uyy.s page 62 2737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR2 LPTIM1SEL LL_RCC_GetLPTIMClockSource @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { 2792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** return (uint32_t)(READ_BIT(RCC->DCKCFGR2, SDMMCx) >> 16U | SDMMCx); 2793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } - ARM GAS /tmp/ccTd4L28.s page 63 + ARM GAS /tmp/ccqw5Uyy.s page 63 2794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { 2849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** return (uint32_t)(READ_BIT(RCC->DCKCFGR2, CECx)); 2850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } - ARM GAS /tmp/ccTd4L28.s page 64 + ARM GAS /tmp/ccqw5Uyy.s page 64 2851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* CEC */ @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_DSI_CLKSOURCE_PLL 2906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ 2907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetDSIClockSource(uint32_t DSIx) - ARM GAS /tmp/ccTd4L28.s page 65 + ARM GAS /tmp/ccqw5Uyy.s page 65 2908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 2962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 2963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 2964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Disable RTC - ARM GAS /tmp/ccTd4L28.s page 66 + ARM GAS /tmp/ccqw5Uyy.s page 66 2965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll BDCR RTCEN LL_RCC_DisableRTC @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_13 3020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_14 3021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_15 - ARM GAS /tmp/ccTd4L28.s page 67 + ARM GAS /tmp/ccqw5Uyy.s page 67 3022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_16 @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_28 3077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_29 3078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_30 - ARM GAS /tmp/ccTd4L28.s page 68 + ARM GAS /tmp/ccqw5Uyy.s page 68 3079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_31 @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { 3134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** SET_BIT(RCC->CR, RCC_CR_PLLON); 3135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } - ARM GAS /tmp/ccTd4L28.s page 69 + ARM GAS /tmp/ccqw5Uyy.s page 69 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_SYS\n 3165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_SYS\n 3166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * PLLCFGR PLLP LL_RCC_PLL_ConfigDomain_SYS - ARM GAS /tmp/ccTd4L28.s page 70 + ARM GAS /tmp/ccqw5Uyy.s page 70 3167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param Source This parameter can be one of the following values: @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_52 3222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_53 3223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_54 - ARM GAS /tmp/ccTd4L28.s page 71 + ARM GAS /tmp/ccqw5Uyy.s page 71 3224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_55 @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_19 3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_20 3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_21 - ARM GAS /tmp/ccTd4L28.s page 72 + ARM GAS /tmp/ccqw5Uyy.s page 72 3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_22 @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_12 3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_13 3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_14 - ARM GAS /tmp/ccTd4L28.s page 73 + ARM GAS /tmp/ccqw5Uyy.s page 73 3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_15 @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_32 3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_33 3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_34 - ARM GAS /tmp/ccTd4L28.s page 74 + ARM GAS /tmp/ccqw5Uyy.s page 74 3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_35 @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL_SetMainSource(uint32_t PLLSource) 3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { 3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PLLSource); - ARM GAS /tmp/ccTd4L28.s page 75 + ARM GAS /tmp/ccqw5Uyy.s page 75 3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_13 3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_14 3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_15 - ARM GAS /tmp/ccTd4L28.s page 76 + ARM GAS /tmp/ccqw5Uyy.s page 76 3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27 3564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_28 3565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_29 - ARM GAS /tmp/ccTd4L28.s page 77 + ARM GAS /tmp/ccqw5Uyy.s page 77 3566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_30 @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { 3621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** MODIFY_REG(RCC->SSCGR, RCC_SSCGR_MODPER | RCC_SSCGR_INCSTEP | RCC_SSCGR_SPREADSEL, Mod | (Inc << 3622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } - ARM GAS /tmp/ccTd4L28.s page 78 + ARM GAS /tmp/ccqw5Uyy.s page 78 3623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** 3678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** 3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @} - ARM GAS /tmp/ccTd4L28.s page 79 + ARM GAS /tmp/ccqw5Uyy.s page 79 3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */ @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_5 3735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_6 3736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_7 - ARM GAS /tmp/ccTd4L28.s page 80 + ARM GAS /tmp/ccqw5Uyy.s page 80 3737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_8 @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_62 3792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_63 3793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLN Between 50 and 432 - ARM GAS /tmp/ccTd4L28.s page 81 + ARM GAS /tmp/ccqw5Uyy.s page 81 3794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLQ This parameter can be one of the following values: @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** MODIFY_REG(RCC->DCKCFGR1, RCC_DCKCFGR1_PLLI2SDIVQ, PLLDIVQ); 3849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 3850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** - ARM GAS /tmp/ccTd4L28.s page 82 + ARM GAS /tmp/ccqw5Uyy.s page 82 3851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(SPDIFRX) @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_41 3906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_42 3907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_43 - ARM GAS /tmp/ccTd4L28.s page 83 + ARM GAS /tmp/ccqw5Uyy.s page 83 3908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_44 @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 3962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_7 3963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_8 3964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_9 - ARM GAS /tmp/ccTd4L28.s page 84 + ARM GAS /tmp/ccqw5Uyy.s page 84 3965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_10 @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 4019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLN Between 50 and 432 4020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLR This parameter can be one of the following values: 4021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_2 - ARM GAS /tmp/ccTd4L28.s page 85 + ARM GAS /tmp/ccqw5Uyy.s page 85 4022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_3 @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 4076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_4 4077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_5 4078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_6 - ARM GAS /tmp/ccTd4L28.s page 86 + ARM GAS /tmp/ccqw5Uyy.s page 86 4079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_7 @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 4133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_26 4134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_27 4135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_28 - ARM GAS /tmp/ccTd4L28.s page 87 + ARM GAS /tmp/ccqw5Uyy.s page 87 4136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_29 @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 118 .loc 1 660 5 discriminator 1 view .LVU35 119 0010 13F0005F tst r3, #536870912 120 0014 00D0 beq .L4 - ARM GAS /tmp/ccTd4L28.s page 88 + ARM GAS /tmp/ccqw5Uyy.s page 88 661:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** { @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 160 .global LL_Init1msTick 161 .syntax unified 162 .thumb - ARM GAS /tmp/ccTd4L28.s page 89 + ARM GAS /tmp/ccqw5Uyy.s page 89 163 .thumb_func @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** #include "stm32f7xx.h" 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** /** @addtogroup STM32F7xx_LL_Driver - ARM GAS /tmp/ccTd4L28.s page 90 + ARM GAS /tmp/ccqw5Uyy.s page 90 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** * @{ @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** This feature can be modified afterwards using unitary function - ARM GAS /tmp/ccTd4L28.s page 91 + ARM GAS /tmp/ccqw5Uyy.s page 91 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** @ref LL_RCC_PLL_ConfigDomain_SYS(). */ @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** /** 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** * @} 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** */ - ARM GAS /tmp/ccTd4L28.s page 92 + ARM GAS /tmp/ccqw5Uyy.s page 92 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U)))); 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** } 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** - ARM GAS /tmp/ccTd4L28.s page 93 + ARM GAS /tmp/ccqw5Uyy.s page 93 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** /** @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 185 0008 013B subs r3, r3, #1 186 .loc 3 259 18 view .LVU52 187 000a 4FF0E022 mov r2, #-536813568 - ARM GAS /tmp/ccTd4L28.s page 94 + ARM GAS /tmp/ccqw5Uyy.s page 94 188 000e 5361 str r3, [r2, #20] @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 235 .loc 1 238 3 is_stmt 1 view .LVU64 238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** 236 .loc 1 238 4 is_stmt 0 view .LVU65 - ARM GAS /tmp/ccTd4L28.s page 95 + ARM GAS /tmp/ccqw5Uyy.s page 95 237 000a 019B ldr r3, [sp, #4] @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 281 .LFB407: 312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /* HCLK clock frequency */ 282 .loc 1 312 1 is_stmt 1 view -0 - ARM GAS /tmp/ccTd4L28.s page 96 + ARM GAS /tmp/ccqw5Uyy.s page 96 283 .cfi_startproc @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 328 0008 0246 mov r2, r0 340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** { 329 .loc 1 340 5 is_stmt 1 view .LVU90 - ARM GAS /tmp/ccTd4L28.s page 97 + ARM GAS /tmp/ccqw5Uyy.s page 97 330 .LBB62: @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** * @{ 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** */ 54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** #define LL_PWR_CR1_CSBF PWR_CR1_CSBF /*!< Clear standby flag */ - ARM GAS /tmp/ccTd4L28.s page 98 + ARM GAS /tmp/ccqw5Uyy.s page 98 55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** */ 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** 111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode - ARM GAS /tmp/ccTd4L28.s page 99 + ARM GAS /tmp/ccqw5Uyy.s page 99 112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** * @{ @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** 168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** /** - ARM GAS /tmp/ccTd4L28.s page 100 + ARM GAS /tmp/ccqw5Uyy.s page 100 169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** * @brief Read a value in PWR register @@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** __STATIC_INLINE uint32_t LL_PWR_IsEnabledUnderDriveMode(void) 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** { 225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** return (READ_BIT(PWR->CR1, PWR_CR1_UDEN) == (PWR_CR1_UDEN)); - ARM GAS /tmp/ccTd4L28.s page 101 + ARM GAS /tmp/ccqw5Uyy.s page 101 226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** } @@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** * @rmtoll CR1 ODEN LL_PWR_IsEnabledOverDriveMode 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** * @retval State of bit (1 or 0). 282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** */ - ARM GAS /tmp/ccTd4L28.s page 102 + ARM GAS /tmp/ccqw5Uyy.s page 102 283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** __STATIC_INLINE uint32_t LL_PWR_IsEnabledOverDriveMode(void) @@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 354 001a 1B68 ldr r3, [r3] 355 .loc 4 312 10 view .LVU100 356 001c 03F44043 and r3, r3, #49152 - ARM GAS /tmp/ccTd4L28.s page 103 + ARM GAS /tmp/ccqw5Uyy.s page 103 357 .LBE65: @@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 396 0042 3F4B ldr r3, .L56 397 0044 1868 ldr r0, [r3] 398 .LVL19: - ARM GAS /tmp/ccTd4L28.s page 104 + ARM GAS /tmp/ccqw5Uyy.s page 104 285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** } @@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 439 007a A242 cmp r2, r4 440 007c 94BF ite ls 441 007e 0021 movls r1, #0 - ARM GAS /tmp/ccTd4L28.s page 105 + ARM GAS /tmp/ccqw5Uyy.s page 105 442 0080 03F00101 andhi r1, r3, #1 @@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 482 .loc 1 392 14 is_stmt 0 view .LVU143 483 00b6 234B ldr r3, .L56+4 484 00b8 9842 cmp r0, r3 - ARM GAS /tmp/ccTd4L28.s page 106 + ARM GAS /tmp/ccqw5Uyy.s page 106 485 00ba 14D8 bhi .L40 @@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 525 .loc 1 368 17 view .LVU157 526 00dc 0CE0 b .L28 527 .LVL31: - ARM GAS /tmp/ccTd4L28.s page 107 + ARM GAS /tmp/ccqw5Uyy.s page 107 528 .L37: @@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 570 .L44: 422:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** } 571 .loc 1 422 17 view .LVU170 - ARM GAS /tmp/ccTd4L28.s page 108 + ARM GAS /tmp/ccqw5Uyy.s page 108 572 00f6 0420 movs r0, #4 @@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** */ 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #if defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) - ARM GAS /tmp/ccTd4L28.s page 109 + ARM GAS /tmp/ccqw5Uyy.s page 109 48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** @@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_SYSCFG_PMC_ETHRMII (uint32_t)SYSCFG_PMC_MII_RMII_SEL /*!< 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** /** - ARM GAS /tmp/ccTd4L28.s page 110 + ARM GAS /tmp/ccqw5Uyy.s page 110 105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @} @@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @{ 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** */ 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_SYSCFG_EXTI_LINE0 (0x000FU << 16U | 0U) /*!< EXTI_POSITION_0 | EXTICR[0] - ARM GAS /tmp/ccTd4L28.s page 111 + ARM GAS /tmp/ccqw5Uyy.s page 111 162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_SYSCFG_EXTI_LINE1 (0x00F0U << 16U | 0U) /*!< EXTI_POSITION_4 | EXTICR[0] @@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @{ 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** */ 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP /*!< TIM2 counter - ARM GAS /tmp/ccTd4L28.s page 112 + ARM GAS /tmp/ccqw5Uyy.s page 112 219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP /*!< TIM3 counter @@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH ten wait states */ 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH eleven wait states * 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH twelve wait states * - ARM GAS /tmp/ccTd4L28.s page 113 + ARM GAS /tmp/ccqw5Uyy.s page 113 276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH thirteen wait states @@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** { 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** SET_BIT(SYSCFG->CMPCR, SYSCFG_CMPCR_CMP_PD); 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** } - ARM GAS /tmp/ccTd4L28.s page 114 + ARM GAS /tmp/ccqw5Uyy.s page 114 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** @@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @rmtoll SYSCFG_PMC MII_RMII_SEL LL_SYSCFG_GetPHYInterface 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @retval Returned value can be one of the following values: 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_PMC_ETHMII - ARM GAS /tmp/ccTd4L28.s page 115 + ARM GAS /tmp/ccqw5Uyy.s page 115 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_PMC_ETHRMII @@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @retval None 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** */ 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** __STATIC_INLINE void LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus) - ARM GAS /tmp/ccTd4L28.s page 116 + ARM GAS /tmp/ccqw5Uyy.s page 116 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** { @@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_EXTI_LINE6 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_EXTI_LINE7 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_EXTI_LINE8 - ARM GAS /tmp/ccTd4L28.s page 117 + ARM GAS /tmp/ccqw5Uyy.s page 117 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_EXTI_LINE9 @@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** } 559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #if defined(SYSCFG_CBR_CLL) - ARM GAS /tmp/ccTd4L28.s page 118 + ARM GAS /tmp/ccqw5Uyy.s page 118 561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** /** @@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @retval Values between Min_Data=0x00 and Max_Data=0xFFFF 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** */ 617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** __STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void) - ARM GAS /tmp/ccTd4L28.s page 119 + ARM GAS /tmp/ccqw5Uyy.s page 119 618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** { @@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** /** 673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @brief Disable the Debug Module during STANDBY mode 674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_DisableDBGStandbyMode - ARM GAS /tmp/ccTd4L28.s page 120 + ARM GAS /tmp/ccqw5Uyy.s page 120 675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @retval None @@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n 730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_I2C1_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n 731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_I2C2_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n - ARM GAS /tmp/ccTd4L28.s page 121 + ARM GAS /tmp/ccqw5Uyy.s page 121 732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_I2C3_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n @@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_CAN1_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n 787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_CAN2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n 788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_CAN3_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph - ARM GAS /tmp/ccTd4L28.s page 122 + ARM GAS /tmp/ccqw5Uyy.s page 122 789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @param Periphs This parameter can be a combination of the following values: @@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB2_FZ DBG_TIM8_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n 844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB2_FZ DBG_TIM9_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n 845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB2_FZ DBG_TIM10_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n - ARM GAS /tmp/ccTd4L28.s page 123 + ARM GAS /tmp/ccqw5Uyy.s page 123 846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB2_FZ DBG_TIM11_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph @@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 586 00fa 1368 ldr r3, [r2] 587 00fc 23F00F03 bic r3, r3, #15 588 0100 0343 orrs r3, r3, r0 - ARM GAS /tmp/ccTd4L28.s page 124 + ARM GAS /tmp/ccqw5Uyy.s page 124 589 0102 1360 str r3, [r2] @@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 613 .LBE71: 614 .LBE70: 456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** } while ((getlatency != latency) && (timeout > 0)); - ARM GAS /tmp/ccTd4L28.s page 125 + ARM GAS /tmp/ccqw5Uyy.s page 125 615 .loc 1 456 7 is_stmt 1 view .LVU186 @@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 657 .loc 1 432 17 view .LVU198 658 012e 0220 movs r0, #2 659 .LVL54: - ARM GAS /tmp/ccTd4L28.s page 126 + ARM GAS /tmp/ccqw5Uyy.s page 126 432:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** } @@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 707 .thumb 708 .thumb_func 710 UTILS_EnablePLLAndSwitchSystem: - ARM GAS /tmp/ccTd4L28.s page 127 + ARM GAS /tmp/ccqw5Uyy.s page 127 711 .LVL61: @@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 741 .loc 1 696 3 is_stmt 1 view .LVU217 742 .loc 1 696 22 is_stmt 0 view .LVU218 743 0012 244B ldr r3, .L70+4 - ARM GAS /tmp/ccTd4L28.s page 128 + ARM GAS /tmp/ccqw5Uyy.s page 128 744 0014 1B68 ldr r3, [r3] @@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 777 .LBE74: 707:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** { 778 .loc 1 707 33 discriminator 1 view .LVU230 - ARM GAS /tmp/ccTd4L28.s page 129 + ARM GAS /tmp/ccqw5Uyy.s page 129 779 002a 13F0007F tst r3, #33554432 @@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 817 .loc 1 715 37 discriminator 1 view .LVU242 818 .LBB80: 819 .LBI80: - ARM GAS /tmp/ccTd4L28.s page 130 + ARM GAS /tmp/ccqw5Uyy.s page 130 2227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** { @@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 859 .loc 2 2281 3 view .LVU255 860 0066 9968 ldr r1, [r3, #8] 861 0068 21F46041 bic r1, r1, #57344 - ARM GAS /tmp/ccTd4L28.s page 131 + ARM GAS /tmp/ccqw5Uyy.s page 131 862 006c 0A43 orrs r2, r2, r1 @@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 894 .loc 1 699 14 view .LVU267 895 0080 FFF7FEFF bl LL_SetFlashLatency 896 .LVL78: - ARM GAS /tmp/ccTd4L28.s page 132 + ARM GAS /tmp/ccqw5Uyy.s page 132 703:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** { @@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 945 .LCFI8: 946 .cfi_def_cfa_offset 24 947 .cfi_offset 3, -24 - ARM GAS /tmp/ccTd4L28.s page 133 + ARM GAS /tmp/ccqw5Uyy.s page 133 948 .cfi_offset 4, -20 @@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 988 .LBB89: 2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** } 989 .loc 2 2012 3 view .LVU290 - ARM GAS /tmp/ccTd4L28.s page 134 + ARM GAS /tmp/ccqw5Uyy.s page 134 990 001e 0F4A ldr r2, .L78+4 @@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1032 .loc 2 3243 3 view .LVU302 1033 0044 0A43 orrs r2, r2, r1 1034 .LVL90: - ARM GAS /tmp/ccTd4L28.s page 135 + ARM GAS /tmp/ccqw5Uyy.s page 135 3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLP); @@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1082 .cfi_def_cfa_offset 24 1083 .cfi_offset 3, -24 1084 .cfi_offset 4, -20 - ARM GAS /tmp/ccTd4L28.s page 136 + ARM GAS /tmp/ccqw5Uyy.s page 136 1085 .cfi_offset 5, -16 @@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** { 1125 .loc 1 566 7 is_stmt 1 view .LVU326 566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** { - ARM GAS /tmp/ccTd4L28.s page 137 + ARM GAS /tmp/ccqw5Uyy.s page 137 1126 .loc 1 566 9 is_stmt 0 view .LVU327 @@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 577:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** { 1168 .loc 1 577 35 discriminator 1 view .LVU340 1169 0040 12F4003F tst r2, #131072 - ARM GAS /tmp/ccTd4L28.s page 138 + ARM GAS /tmp/ccqw5Uyy.s page 138 1170 0044 FAD0 beq .L85 @@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccTd4L28.s page 1 1212 .LVL105: 1213 .L88: 568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** } - ARM GAS /tmp/ccTd4L28.s page 139 + ARM GAS /tmp/ccqw5Uyy.s page 139 1214 .loc 1 568 9 is_stmt 1 view .LVU353 @@ -8320,36 +8320,36 @@ ARM GAS /tmp/ccTd4L28.s page 1 1246 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h" 1247 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 1248 .file 10 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - ARM GAS /tmp/ccTd4L28.s page 140 + ARM GAS /tmp/ccqw5Uyy.s page 140 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_ll_utils.c - /tmp/ccTd4L28.s:20 .text.UTILS_GetPLLOutputFrequency:00000000 $t - /tmp/ccTd4L28.s:25 .text.UTILS_GetPLLOutputFrequency:00000000 UTILS_GetPLLOutputFrequency - /tmp/ccTd4L28.s:74 .text.UTILS_PLL_IsBusy:00000000 $t - /tmp/ccTd4L28.s:79 .text.UTILS_PLL_IsBusy:00000000 UTILS_PLL_IsBusy - /tmp/ccTd4L28.s:154 .text.UTILS_PLL_IsBusy:0000002c $d - /tmp/ccTd4L28.s:159 .text.LL_Init1msTick:00000000 $t - /tmp/ccTd4L28.s:165 .text.LL_Init1msTick:00000000 LL_Init1msTick - /tmp/ccTd4L28.s:206 .text.LL_Init1msTick:0000001c $d - /tmp/ccTd4L28.s:211 .text.LL_mDelay:00000000 $t - /tmp/ccTd4L28.s:217 .text.LL_mDelay:00000000 LL_mDelay - /tmp/ccTd4L28.s:273 .text.LL_SetSystemCoreClock:00000000 $t - /tmp/ccTd4L28.s:279 .text.LL_SetSystemCoreClock:00000000 LL_SetSystemCoreClock - /tmp/ccTd4L28.s:296 .text.LL_SetSystemCoreClock:00000008 $d - /tmp/ccTd4L28.s:301 .text.LL_SetFlashLatency:00000000 $t - /tmp/ccTd4L28.s:307 .text.LL_SetFlashLatency:00000000 LL_SetFlashLatency - /tmp/ccTd4L28.s:693 .text.LL_SetFlashLatency:00000140 $d - /tmp/ccTd4L28.s:705 .text.UTILS_EnablePLLAndSwitchSystem:00000000 $t - /tmp/ccTd4L28.s:710 .text.UTILS_EnablePLLAndSwitchSystem:00000000 UTILS_EnablePLLAndSwitchSystem - /tmp/ccTd4L28.s:923 .text.UTILS_EnablePLLAndSwitchSystem:000000a0 $d - /tmp/ccTd4L28.s:930 .text.LL_PLL_ConfigSystemClock_HSI:00000000 $t - /tmp/ccTd4L28.s:936 .text.LL_PLL_ConfigSystemClock_HSI:00000000 LL_PLL_ConfigSystemClock_HSI - /tmp/ccTd4L28.s:1059 .text.LL_PLL_ConfigSystemClock_HSI:00000058 $d - /tmp/ccTd4L28.s:1066 .text.LL_PLL_ConfigSystemClock_HSE:00000000 $t - /tmp/ccTd4L28.s:1072 .text.LL_PLL_ConfigSystemClock_HSE:00000000 LL_PLL_ConfigSystemClock_HSE - /tmp/ccTd4L28.s:1237 .text.LL_PLL_ConfigSystemClock_HSE:0000007c $d + /tmp/ccqw5Uyy.s:20 .text.UTILS_GetPLLOutputFrequency:00000000 $t + /tmp/ccqw5Uyy.s:25 .text.UTILS_GetPLLOutputFrequency:00000000 UTILS_GetPLLOutputFrequency + /tmp/ccqw5Uyy.s:74 .text.UTILS_PLL_IsBusy:00000000 $t + /tmp/ccqw5Uyy.s:79 .text.UTILS_PLL_IsBusy:00000000 UTILS_PLL_IsBusy + /tmp/ccqw5Uyy.s:154 .text.UTILS_PLL_IsBusy:0000002c $d + /tmp/ccqw5Uyy.s:159 .text.LL_Init1msTick:00000000 $t + /tmp/ccqw5Uyy.s:165 .text.LL_Init1msTick:00000000 LL_Init1msTick + /tmp/ccqw5Uyy.s:206 .text.LL_Init1msTick:0000001c $d + /tmp/ccqw5Uyy.s:211 .text.LL_mDelay:00000000 $t + /tmp/ccqw5Uyy.s:217 .text.LL_mDelay:00000000 LL_mDelay + /tmp/ccqw5Uyy.s:273 .text.LL_SetSystemCoreClock:00000000 $t + /tmp/ccqw5Uyy.s:279 .text.LL_SetSystemCoreClock:00000000 LL_SetSystemCoreClock + /tmp/ccqw5Uyy.s:296 .text.LL_SetSystemCoreClock:00000008 $d + /tmp/ccqw5Uyy.s:301 .text.LL_SetFlashLatency:00000000 $t + /tmp/ccqw5Uyy.s:307 .text.LL_SetFlashLatency:00000000 LL_SetFlashLatency + /tmp/ccqw5Uyy.s:693 .text.LL_SetFlashLatency:00000140 $d + /tmp/ccqw5Uyy.s:705 .text.UTILS_EnablePLLAndSwitchSystem:00000000 $t + /tmp/ccqw5Uyy.s:710 .text.UTILS_EnablePLLAndSwitchSystem:00000000 UTILS_EnablePLLAndSwitchSystem + /tmp/ccqw5Uyy.s:923 .text.UTILS_EnablePLLAndSwitchSystem:000000a0 $d + /tmp/ccqw5Uyy.s:930 .text.LL_PLL_ConfigSystemClock_HSI:00000000 $t + /tmp/ccqw5Uyy.s:936 .text.LL_PLL_ConfigSystemClock_HSI:00000000 LL_PLL_ConfigSystemClock_HSI + /tmp/ccqw5Uyy.s:1059 .text.LL_PLL_ConfigSystemClock_HSI:00000058 $d + /tmp/ccqw5Uyy.s:1066 .text.LL_PLL_ConfigSystemClock_HSE:00000000 $t + /tmp/ccqw5Uyy.s:1072 .text.LL_PLL_ConfigSystemClock_HSE:00000000 LL_PLL_ConfigSystemClock_HSE + /tmp/ccqw5Uyy.s:1237 .text.LL_PLL_ConfigSystemClock_HSE:0000007c $d UNDEFINED SYMBOLS SystemCoreClock diff --git a/build/stm32f7xx_ll_utils.o b/build/stm32f7xx_ll_utils.o index ce9c3dccf8ee0b19fd7e2edec8708be2b5e01abc..bdd5d61a721675e216a2edfde2d818939b6a70dc 100644 GIT binary patch delta 201 zcmaDdpK;H8#t90HG8+|tvM@SMmS$~bG@rbXRi4pi@!;1=HhHI?GGp=NyMF4db95OP-b_~X z7M?8QFTl8CvaY{6Ylj{KgVE%RUc!@efMRv>n{!fg*`+Z delta 237 zcmdlppYh3j#t90HE*lkpvM^>&mS$~bjGw%aRh}_r@^7^nQ`{yt$yl^M<(9|k`E@c`l~Z;n5+vVpG*$* YS7#D2nq23vCQ;zQz;Ka~0S;hH0BJo+TL1t6 diff --git a/build/syscall.lst b/build/syscall.lst index 71fc871..91d701b 100644 --- a/build/syscall.lst +++ b/build/syscall.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccbQTdB1.s page 1 +ARM GAS /tmp/ccgbe2El.s page 1 1 .cpu cortex-m7 @@ -24,7 +24,7 @@ ARM GAS /tmp/ccbQTdB1.s page 1 21 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 22 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 23 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - ARM GAS /tmp/ccbQTdB1.s page 2 + ARM GAS /tmp/ccgbe2El.s page 2 DEFINED SYMBOLS diff --git a/build/syscalls.lst b/build/syscalls.lst index 4dc1f54..0b0109f 100644 --- a/build/syscalls.lst +++ b/build/syscalls.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccEcvKCS.s page 1 +ARM GAS /tmp/ccdCmhrK.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 29:Src/syscalls.c **** #include 30:Src/syscalls.c **** #include 31:Src/syscalls.c **** #include - ARM GAS /tmp/ccEcvKCS.s page 2 + ARM GAS /tmp/ccdCmhrK.s page 2 32:Src/syscalls.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 66 _kill: 67 .LVL0: 68 .LFB27: - ARM GAS /tmp/ccEcvKCS.s page 3 + ARM GAS /tmp/ccdCmhrK.s page 3 52:Src/syscalls.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 114 .cfi_offset 14, -4 63:Src/syscalls.c **** _kill(status, -1); 115 .loc 1 63 3 is_stmt 1 view .LVU15 - ARM GAS /tmp/ccEcvKCS.s page 4 + ARM GAS /tmp/ccdCmhrK.s page 4 116 0002 4FF0FF31 mov r1, #-1 @@ -238,7 +238,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 161 .loc 1 74 5 is_stmt 1 view .LVU26 162 .loc 1 74 14 is_stmt 0 view .LVU27 163 000a FFF7FEFF bl __io_getchar - ARM GAS /tmp/ccEcvKCS.s page 5 + ARM GAS /tmp/ccdCmhrK.s page 5 164 .LVL7: @@ -298,7 +298,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 211 0002 0C46 mov r4, r1 212 0004 1646 mov r6, r2 82:Src/syscalls.c **** (void)file; - ARM GAS /tmp/ccEcvKCS.s page 6 + ARM GAS /tmp/ccdCmhrK.s page 6 213 .loc 1 82 3 is_stmt 1 view .LVU38 @@ -358,7 +358,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 256 .cfi_startproc 257 @ args = 0, pretend = 0, frame = 0 258 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccEcvKCS.s page 7 + ARM GAS /tmp/ccdCmhrK.s page 7 259 @ link register save eliminated. @@ -418,7 +418,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 306 _isatty: 307 .LVL22: 308 .LFB33: - ARM GAS /tmp/ccEcvKCS.s page 8 + ARM GAS /tmp/ccdCmhrK.s page 8 105:Src/syscalls.c **** @@ -478,7 +478,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 352 .align 1 353 .global _open 354 .syntax unified - ARM GAS /tmp/ccEcvKCS.s page 9 + ARM GAS /tmp/ccdCmhrK.s page 9 355 .thumb @@ -538,7 +538,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 401 .cfi_startproc 402 @ args = 0, pretend = 0, frame = 0 403 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccEcvKCS.s page 10 + ARM GAS /tmp/ccdCmhrK.s page 10 404 .loc 1 129 1 is_stmt 0 view .LVU83 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 139:Src/syscalls.c **** return -1; 451 .loc 1 139 3 is_stmt 1 view .LVU94 140:Src/syscalls.c **** } - ARM GAS /tmp/ccEcvKCS.s page 11 + ARM GAS /tmp/ccdCmhrK.s page 11 452 .loc 1 140 1 is_stmt 0 view .LVU95 @@ -658,7 +658,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 499 .loc 1 151 3 view .LVU103 500 .loc 1 151 15 is_stmt 0 view .LVU104 501 0000 4FF40053 mov r3, #8192 - ARM GAS /tmp/ccEcvKCS.s page 12 + ARM GAS /tmp/ccdCmhrK.s page 12 502 0004 4B60 str r3, [r1, #4] @@ -718,7 +718,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 549 .global _fork 550 .syntax unified 551 .thumb - ARM GAS /tmp/ccEcvKCS.s page 13 + ARM GAS /tmp/ccdCmhrK.s page 13 552 .thumb_func @@ -778,7 +778,7 @@ ARM GAS /tmp/ccEcvKCS.s page 1 172:Src/syscalls.c **** (void)argv; 599 .loc 1 172 3 view .LVU124 173:Src/syscalls.c **** (void)env; - ARM GAS /tmp/ccEcvKCS.s page 14 + ARM GAS /tmp/ccdCmhrK.s page 14 600 .loc 1 173 3 view .LVU125 @@ -819,51 +819,51 @@ ARM GAS /tmp/ccEcvKCS.s page 1 637 .file 7 "/usr/include/newlib/sys/stat.h" 638 .file 8 "/usr/include/newlib/sys/times.h" 639 .file 9 "/usr/include/newlib/sys/errno.h" - ARM GAS /tmp/ccEcvKCS.s page 15 + ARM GAS /tmp/ccdCmhrK.s page 15 DEFINED SYMBOLS *ABS*:00000000 syscalls.c - /tmp/ccEcvKCS.s:20 .text.initialise_monitor_handles:00000000 $t - /tmp/ccEcvKCS.s:26 .text.initialise_monitor_handles:00000000 initialise_monitor_handles - /tmp/ccEcvKCS.s:39 .text._getpid:00000000 $t - /tmp/ccEcvKCS.s:45 .text._getpid:00000000 _getpid - /tmp/ccEcvKCS.s:60 .text._kill:00000000 $t - /tmp/ccEcvKCS.s:66 .text._kill:00000000 _kill - /tmp/ccEcvKCS.s:95 .text._exit:00000000 $t - /tmp/ccEcvKCS.s:101 .text._exit:00000000 _exit - /tmp/ccEcvKCS.s:128 .text._read:00000000 $t - /tmp/ccEcvKCS.s:134 .text._read:00000000 _read - /tmp/ccEcvKCS.s:190 .text._write:00000000 $t - /tmp/ccEcvKCS.s:196 .text._write:00000000 _write - /tmp/ccEcvKCS.s:246 .text._close:00000000 $t - /tmp/ccEcvKCS.s:252 .text._close:00000000 _close - /tmp/ccEcvKCS.s:271 .text._fstat:00000000 $t - /tmp/ccEcvKCS.s:277 .text._fstat:00000000 _fstat - /tmp/ccEcvKCS.s:300 .text._isatty:00000000 $t - /tmp/ccEcvKCS.s:306 .text._isatty:00000000 _isatty - /tmp/ccEcvKCS.s:325 .text._lseek:00000000 $t - /tmp/ccEcvKCS.s:331 .text._lseek:00000000 _lseek - /tmp/ccEcvKCS.s:352 .text._open:00000000 $t - /tmp/ccEcvKCS.s:358 .text._open:00000000 _open - /tmp/ccEcvKCS.s:391 .text._wait:00000000 $t - /tmp/ccEcvKCS.s:397 .text._wait:00000000 _wait - /tmp/ccEcvKCS.s:425 .text._unlink:00000000 $t - /tmp/ccEcvKCS.s:431 .text._unlink:00000000 _unlink - /tmp/ccEcvKCS.s:459 .text._times:00000000 $t - /tmp/ccEcvKCS.s:465 .text._times:00000000 _times - /tmp/ccEcvKCS.s:484 .text._stat:00000000 $t - /tmp/ccEcvKCS.s:490 .text._stat:00000000 _stat - /tmp/ccEcvKCS.s:513 .text._link:00000000 $t - /tmp/ccEcvKCS.s:519 .text._link:00000000 _link - /tmp/ccEcvKCS.s:548 .text._fork:00000000 $t - /tmp/ccEcvKCS.s:554 .text._fork:00000000 _fork - /tmp/ccEcvKCS.s:579 .text._execve:00000000 $t - /tmp/ccEcvKCS.s:585 .text._execve:00000000 _execve - /tmp/ccEcvKCS.s:619 .data.environ:00000000 environ - /tmp/ccEcvKCS.s:616 .data.environ:00000000 $d - /tmp/ccEcvKCS.s:626 .bss.__env:00000000 __env - /tmp/ccEcvKCS.s:623 .bss.__env:00000000 $d + /tmp/ccdCmhrK.s:20 .text.initialise_monitor_handles:00000000 $t + /tmp/ccdCmhrK.s:26 .text.initialise_monitor_handles:00000000 initialise_monitor_handles + /tmp/ccdCmhrK.s:39 .text._getpid:00000000 $t + /tmp/ccdCmhrK.s:45 .text._getpid:00000000 _getpid + /tmp/ccdCmhrK.s:60 .text._kill:00000000 $t + /tmp/ccdCmhrK.s:66 .text._kill:00000000 _kill + /tmp/ccdCmhrK.s:95 .text._exit:00000000 $t + /tmp/ccdCmhrK.s:101 .text._exit:00000000 _exit + /tmp/ccdCmhrK.s:128 .text._read:00000000 $t + /tmp/ccdCmhrK.s:134 .text._read:00000000 _read + /tmp/ccdCmhrK.s:190 .text._write:00000000 $t + /tmp/ccdCmhrK.s:196 .text._write:00000000 _write + /tmp/ccdCmhrK.s:246 .text._close:00000000 $t + /tmp/ccdCmhrK.s:252 .text._close:00000000 _close + /tmp/ccdCmhrK.s:271 .text._fstat:00000000 $t + /tmp/ccdCmhrK.s:277 .text._fstat:00000000 _fstat + /tmp/ccdCmhrK.s:300 .text._isatty:00000000 $t + /tmp/ccdCmhrK.s:306 .text._isatty:00000000 _isatty + /tmp/ccdCmhrK.s:325 .text._lseek:00000000 $t + /tmp/ccdCmhrK.s:331 .text._lseek:00000000 _lseek + /tmp/ccdCmhrK.s:352 .text._open:00000000 $t + /tmp/ccdCmhrK.s:358 .text._open:00000000 _open + /tmp/ccdCmhrK.s:391 .text._wait:00000000 $t + /tmp/ccdCmhrK.s:397 .text._wait:00000000 _wait + /tmp/ccdCmhrK.s:425 .text._unlink:00000000 $t + /tmp/ccdCmhrK.s:431 .text._unlink:00000000 _unlink + /tmp/ccdCmhrK.s:459 .text._times:00000000 $t + /tmp/ccdCmhrK.s:465 .text._times:00000000 _times + /tmp/ccdCmhrK.s:484 .text._stat:00000000 $t + /tmp/ccdCmhrK.s:490 .text._stat:00000000 _stat + /tmp/ccdCmhrK.s:513 .text._link:00000000 $t + /tmp/ccdCmhrK.s:519 .text._link:00000000 _link + /tmp/ccdCmhrK.s:548 .text._fork:00000000 $t + /tmp/ccdCmhrK.s:554 .text._fork:00000000 _fork + /tmp/ccdCmhrK.s:579 .text._execve:00000000 $t + /tmp/ccdCmhrK.s:585 .text._execve:00000000 _execve + /tmp/ccdCmhrK.s:619 .data.environ:00000000 environ + /tmp/ccdCmhrK.s:616 .data.environ:00000000 $d + /tmp/ccdCmhrK.s:626 .bss.__env:00000000 __env + /tmp/ccdCmhrK.s:623 .bss.__env:00000000 $d UNDEFINED SYMBOLS __errno diff --git a/build/syscalls.o b/build/syscalls.o index f6f1e5ff99089f4c3cf75939dd9a2f039ca59cbf..cbad49d2ef08e8ce61fb9dede986e930f5f78b66 100644 GIT binary patch delta 809 zcmXv~O-NKx6u#%apZlDiqmDV6O>dr!KWWoU;;1uWv`7m|9LPl!g#9?0rSnD|$*4$( zT0}&3tVOnH7f}*o&>|6u7E(e51<@iSY9WNR=m%u_Id{wl?|k3+&Ue3a-AAzcBJ;^jp)Xfy6ShP{G-0jk}D24UQyn=*HN@%%xDbu5QEzwh`E=cS=08Vk$i5byvOD&0f)UH7uBDxS-! zy-H@#7SWHDO3*({DWcqUDl6uTCF!Xt^k>@=u^0Q5V1A4Agv{Mpu~l5daS}}mH$1K* zS&@luTu_cx-y$ajOc5iVH!@@_MzC<`NG~lETg_{$D$J0&<=e@p3 zcd^^YKiO#2wec@DCJDaVI8BhTC*2V*fQl9MarD)hI8r}~y@Yl{Gfokv2+fFzGY!oU zM6K}zMDPsNhxns04xQK%jq^+pZ$#U`ho7Sx=^G1T0oaN4u_{R60jl@$JXMC{R3rF? V>T3KQt16ibGxmpm!pgHk{{ap_qm%#u delta 850 zcmXX?YeBJOPi_vFbbPGbD{fcP7Dex`cZ_@ zgnm3eH$LR^-@6xFKeMF|LZQ5zh4@>`r{SR@yNWl+0yKIcc!eKE9xSNYodWUdY?j@uue#)t9 z&EteL#0@M|N}UtbA_^=g6K0yom$Jm}Ovo%Tg2$E8v;k?BS@$H&Ch-I($*iVw!)EDD zm`q&41?A|*X-b0I3a9B&&`OD9$yf^9rWh3bAEdxOJf${p&T(3;fY10#Ert?wYOi4{ z{?HCUIqudSu!0diFC(2=;6%Dk1#Q$Gq%Y$oj_ZeE7+3Td)S)RxVGdV>1I97O=pa61 z_^IQ8aTb=Qs*;W+2Rwb|K-kk8?g@FC8(Z2vt)ZTX+0tjm&1j^%vu&trFdXX*b%#4+ zp`K98vnw18$3k&4*4eUSJI-e2+WO7t5m%2n)YTtmgYnKt)SUW~nVO4DUhCDWdR+8c zv4t>DW5o%=(HiU2Qk4~Oo(#iV57pT0y#)dM?hQgc*3|@|2`|#wj_+%R;UMm>9fo;) zRU3p+%<~0#!Dfv5_EPk@Zxj891)m#CO!gPSb@bBt77zK0wBj7bDzT!{jyL^jR5D3k Vz{S{`gtzEV)0RDq{lzo2_J8mcx7q*z diff --git a/build/sysmem.lst b/build/sysmem.lst index 4deb6d4..602dc69 100644 --- a/build/sysmem.lst +++ b/build/sysmem.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccTZCPY8.s page 1 +ARM GAS /tmp/cczKmYcs.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccTZCPY8.s page 1 28:Src/sysmem.c **** * Pointer to the current high watermark of the heap usage 29:Src/sysmem.c **** */ 30:Src/sysmem.c **** static uint8_t *__sbrk_heap_end = NULL; - ARM GAS /tmp/ccTZCPY8.s page 2 + ARM GAS /tmp/cczKmYcs.s page 2 31:Src/sysmem.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccTZCPY8.s page 1 62:Src/sysmem.c **** /* Initialize heap end at first call */ 63:Src/sysmem.c **** if (NULL == __sbrk_heap_end) 51 .loc 1 63 3 view .LVU9 - ARM GAS /tmp/ccTZCPY8.s page 3 + ARM GAS /tmp/cczKmYcs.s page 3 52 .loc 1 63 12 is_stmt 0 view .LVU10 @@ -178,7 +178,7 @@ ARM GAS /tmp/ccTZCPY8.s page 1 88 0026 F2E7 b .L2 89 .LVL8: 90 .L7: - ARM GAS /tmp/ccTZCPY8.s page 4 + ARM GAS /tmp/cczKmYcs.s page 4 71:Src/sysmem.c **** return (void *)-1; @@ -213,16 +213,16 @@ ARM GAS /tmp/ccTZCPY8.s page 1 119 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stddef.h" 120 .file 3 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 121 .file 4 "/usr/include/newlib/sys/errno.h" - ARM GAS /tmp/ccTZCPY8.s page 5 + ARM GAS /tmp/cczKmYcs.s page 5 DEFINED SYMBOLS *ABS*:00000000 sysmem.c - /tmp/ccTZCPY8.s:20 .text._sbrk:00000000 $t - /tmp/ccTZCPY8.s:26 .text._sbrk:00000000 _sbrk - /tmp/ccTZCPY8.s:104 .text._sbrk:00000038 $d - /tmp/ccTZCPY8.s:115 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end - /tmp/ccTZCPY8.s:112 .bss.__sbrk_heap_end:00000000 $d + /tmp/cczKmYcs.s:20 .text._sbrk:00000000 $t + /tmp/cczKmYcs.s:26 .text._sbrk:00000000 _sbrk + /tmp/cczKmYcs.s:104 .text._sbrk:00000038 $d + /tmp/cczKmYcs.s:115 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end + /tmp/cczKmYcs.s:112 .bss.__sbrk_heap_end:00000000 $d UNDEFINED SYMBOLS __errno diff --git a/build/sysmem.o b/build/sysmem.o index d7e21ef65bb4909cebdd72ac26165a3f1df09ecb..ee79caf8a28034c74f2f665f3c27103accf05faa 100644 GIT binary patch delta 350 zcmZ3Y@JD`v0@EAriArf)?2HTyJokXagvp9L!V{Nj*Y5#xm>Ahsfhmp?3_ulF}> ziJcF`V`2RXrr5)Q6e|l8BgbtZgXI8_VAhj}2U2X^Ab}4c0Tan;kiZ-u!Ttb9FvBL|B)nBF!yl2KOl8j#IsDsBg)w18Lvh+<Hv_{95Dx$n Cu1V$q delta 396 zcmew(zeHhz0+R^OM5Qz?eMSZb9yTThhD(z_atlvfs$KsCD8j_Zb_q;z%wPcWm{|XS zcueekARY_rNifA84y0IFm>4-$0~st6fCRIiL_CmU>jnuN0122#R)YlQ015UDK!Qt-St>UnaBi`7^O_PY&brV-n$>yo^taNtkK!B|as_Ws|@1sWV=fEX%LX nB*Q(~jbDxN$K+gobw-`ZQ-S1}$$R7+y>c>= tmp; 99 .loc 1 245 3 is_stmt 1 view .LVU19 100 .loc 1 245 19 is_stmt 0 view .LVU20 - ARM GAS /tmp/ccZPj2qA.s page 7 + ARM GAS /tmp/ccndRLUa.s page 7 101 0026 1A4A ldr r2, .L11+4 @@ -418,7 +418,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1 140 004a B3FBF2F3 udiv r3, r3, r2 226:Src/system_stm32f7xx.c **** } 141 .loc 1 226 44 view .LVU36 - ARM GAS /tmp/ccZPj2qA.s page 8 + ARM GAS /tmp/ccndRLUa.s page 8 142 004e 0F4A ldr r2, .L11 @@ -478,7 +478,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1 180 .loc 1 231 44 view .LVU52 181 0076 054A ldr r2, .L11 182 .LVL17: - ARM GAS /tmp/ccZPj2qA.s page 9 + ARM GAS /tmp/ccndRLUa.s page 9 231:Src/system_stm32f7xx.c **** } @@ -538,7 +538,7 @@ ARM GAS /tmp/ccZPj2qA.s page 1 230 .section .data.SystemCoreClock,"aw" 231 .align 2 234 SystemCoreClock: - ARM GAS /tmp/ccZPj2qA.s page 10 + ARM GAS /tmp/ccndRLUa.s page 10 235 0000 0024F400 .word 16000000 @@ -548,22 +548,22 @@ ARM GAS /tmp/ccZPj2qA.s page 1 239 .file 3 "Drivers/CMSIS/Include/core_cm7.h" 240 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h" 241 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" - ARM GAS /tmp/ccZPj2qA.s page 11 + ARM GAS /tmp/ccndRLUa.s page 11 DEFINED SYMBOLS *ABS*:00000000 system_stm32f7xx.c - /tmp/ccZPj2qA.s:20 .text.SystemInit:00000000 $t - /tmp/ccZPj2qA.s:26 .text.SystemInit:00000000 SystemInit - /tmp/ccZPj2qA.s:45 .text.SystemInit:00000010 $d - /tmp/ccZPj2qA.s:50 .text.SystemCoreClockUpdate:00000000 $t - /tmp/ccZPj2qA.s:56 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate - /tmp/ccZPj2qA.s:206 .text.SystemCoreClockUpdate:0000008c $d - /tmp/ccZPj2qA.s:234 .data.SystemCoreClock:00000000 SystemCoreClock - /tmp/ccZPj2qA.s:226 .rodata.AHBPrescTable:00000000 AHBPrescTable - /tmp/ccZPj2qA.s:219 .rodata.APBPrescTable:00000000 APBPrescTable - /tmp/ccZPj2qA.s:216 .rodata.APBPrescTable:00000000 $d - /tmp/ccZPj2qA.s:223 .rodata.AHBPrescTable:00000000 $d - /tmp/ccZPj2qA.s:231 .data.SystemCoreClock:00000000 $d + /tmp/ccndRLUa.s:20 .text.SystemInit:00000000 $t + /tmp/ccndRLUa.s:26 .text.SystemInit:00000000 SystemInit + /tmp/ccndRLUa.s:45 .text.SystemInit:00000010 $d + /tmp/ccndRLUa.s:50 .text.SystemCoreClockUpdate:00000000 $t + /tmp/ccndRLUa.s:56 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate + /tmp/ccndRLUa.s:206 .text.SystemCoreClockUpdate:0000008c $d + /tmp/ccndRLUa.s:234 .data.SystemCoreClock:00000000 SystemCoreClock + /tmp/ccndRLUa.s:226 .rodata.AHBPrescTable:00000000 AHBPrescTable + /tmp/ccndRLUa.s:219 .rodata.APBPrescTable:00000000 APBPrescTable + /tmp/ccndRLUa.s:216 .rodata.APBPrescTable:00000000 $d + /tmp/ccndRLUa.s:223 .rodata.AHBPrescTable:00000000 $d + /tmp/ccndRLUa.s:231 .data.SystemCoreClock:00000000 $d NO UNDEFINED SYMBOLS diff --git a/build/system_stm32f7xx.o b/build/system_stm32f7xx.o index 1a544bce35f6261cdc5212807b07660594bb9e31..9b5b3c1b00148e28716fa04c8a4deb1c9516fbe8 100644 GIT binary patch delta 815 zcmZXRT}TvB6vyY>J0FK?kr^~C(%E6L72F&*DhLd>&7dB_r57I(bki*t(J^;b2*QN0 z9(piN4-y;HOAx&nLSgt&P$Wk71tlt!5q&@uwgJ5vC}-jyxzW{VfR^)8eJ8TDm){FxB`5 zbQNmM7AboIR-XuDA;d0P0M~jXr2H9JOJXw?D#Jyfa#rEwr1+&Tj^L2&U-^A47E?2` zov<+R*FLSoPcrNcSOHar#c(&}geoXib6|xFG=T%Mp9gDyp>M@8T43(3!*YkWV4W7n z3fnoQ7MZCGUf4 z8Y&X3fkjW%dALY7wMjD~kha3i^s97-WC(p z{`igtapld14cBRpVeg!kK9!s4!Vhi6df99IUwSKc$=!6nZ$~kq^G1!F&|RYz4$@~M z4$V}JE_Bi{jFcpVAErxWT$@-;Vp$!O!+o%Id=ATXYAmXB-43rS<)-?2y`H4okjivs zy&m^yvOVo3I=rmcoo;JM9Ei7Myc5}hWN&IbQ*q9IXZ v^g`5Da_nkw=!hMHNjhbR*$0!Z*xR9p9@t?hrZ1u%A~PuKUQtIV87%z^x)`jp delta 851 zcmZWmT}V_x6uxKX{v1n_d&wU{_j*}u1o;K`kUMB}8QC>aMvDy0xiE1ojZ< zLy&R`42*gzeDTGo9(ph+$|Q<}G8M{*FenQDeX5zY`_#Z3=6vV-zBzN|ZOul_U=jQt za(+2uTv0N6MQ8-&zr{dbph~FBni56Ej0UDCJVr^#%kzsPLt{x4bX7}qb}39Xav9x* zauq^&Y@>kIP5%X@U!{35KhO=ePh9woS+9_lXqpl`ZueiYxM z{qYos#glUl8z!mRu&Wg5rgAfp{?JA|D}6Nn&%GIM%DV35F%%Q(H_GLN9vKzTL5oI6 z^i_&35S_-doL-@aS2@zIRqT^uTN5;b2Ou;)i-mg7ZBKT@-L`lv>ehuL4es%1ERl?~ zC%clJiPokQ-7Od5skUfqyeSopMN{sPcxOBn?MkMaB8Ng$kzGLRJBr7TWna#M8JaA3 z0gE(Lco8Nj!&eUxIwfK|jfyxxo4!&AQ?c!buN1ZeEYqTty&Hz

    t~4c{5N;W;?j zRJrp_wQVlMOH7UT3i7Wbz5!R0zJd5&+)VnD#LwXKq`yJ@Hhy4gy5E`V_x^*pa{rK? zj;G=PoQwrL#D2Y9>ph2 zjqiElk1(|$3}3@+sPi8-Aia^VG|8L^7!Z6;NrlwaH>ti$W zTVMy$PsKAZkNiR$N_sJl!Sl(#5a*MAC0>oUlD`)3!3S`MsrtT%ui%H|e}dnV{uBNe ztDhC-yB0PuHNIo;IBZA$$=DUMaiFPk=i+djLjE+IP5L}sh&PabGp-^1G2Dx3Y7^OX znqqfT>#?8N%((&_XlgqdPW}Yq^KcsJmlDszD@ebN_y*j7_u|8*ruR5Lg}ce$gCCK; zAHTvs$xj&=>RH3o`0C(c*p&Peu|4Uh;OW?p`~n<;!?4WM_|L}+aWVNzaTV#e;#z!= z{73K^(qF)raWDD%@M}DPl?H`+*k@_2KDF>zQ|qfSoM zV`_Zg;g48JZ3#=Sh6kG}e+2Q-cpT{`5oh4ZrlxZ$o=JLNEFircuf;9+Jid>Anwox< z!LotcIe56K^v0&@+YDQh-UV~aOY~dZ*vHiH1IZsv`gklSeJ=6kxRmtUh#w=~VUBa| zd3?##`1g>%k9a?RP5OU{|HRaDR8I3#%T)QgcsS{eiJM_3?1Fu;KMpWeuW@)0F2y_W zAyd+A3-DrGME(-I&eU>UZFX|*c3emP{lr`FB|L!jbPZwUI$(EG&t2pbkHbsx zR#Vfv%bcL=4}8GX`g@H0=ZOD0-JMnJPw-Rr|=ShFf z+^X{lzC->e4#4wqB|eI8C12h z-bwyOe310V@JZZ7{u{WL^iS~%{GI&2@t`qbz7D~9*u>QQHOIEt0nae+a4rXPaWMHq zaSZ7baSC2W{(QWe^y}~j+(7=l_%P{@;SSQD$Ja=I3*WUcB9yimVEjf+ez|K;SbC4D_UK>9Pp&*3i8_Yv>M1Ei--4AZHK zwM|X`IO3+*n)FQK9PCT_FydmIK>EeRm*FDPZzSG^@8h3%^rTR)({L!x!d3VfzK4I} zF_T02({U(XimPx7zJgz1rSn4hW3UtEV=2zV)wmUR<2R<3=PzbW=YGe(O|8#^r-bx+ zcsMpUmERIiCp{Z`;#qhO7U5)5<;(FxyacZ>RiCTzT3k#1dc2qPXH3no^Ptd2*Sn!jVQIkv9wwV0-L@ znV5t9OpWI(JR8T6KM|+n1vm#6;8IiLS%Ir?Bl-8?R@{a=O_h5Ici{*434V^hnOgsU zVby6Nu7QV{8sAZPEVd!PJ)TZ_Hul7`$v+oIlRg2@!%NAZhl@zxfKTGP_zTvV9_rTu zJDA%4Pd7i;_a|a^Q}dZeJlxdhQAQJ=XR6#x^S}B&Fuc@Mxkco!!VUPCso~$lZ_Ib~ zJ#@sCXN0(pso{6^Q`7Bf-l*Rxz&uma z9Zdd2(#vrMUT$i*EAeL1*WjJF1s}yH@KsagU&r_HBmBx#y}rkvvFZh(Tn#+T)Nn`P zvDk+E_INt!+1L}$CjVRUyiFuUyJMU5%M3$ z=SY7UU&DRm@5cl96aHqEN4DSQC#nRjv`XAiXVi!0zOqiG`#O z#-TWg{4$({vvHxR<+B8r;TrPq#QSjzK4Gfd4tyTpA^!vXg!I3${>3V%^>VEFlXH!+ znW_11OMWKy$Kj@ipJM9smotbjC%%?=E%658$B3UJew+A9;y;K}XNU3Ez(et9Y>I76 z)xWcOt*#3((^UO?kzYi5368~?riQx+myo_3SK=MG5%0t8rpoWYm+>`x&s4oW#?SCq z^8dgpmxSSJVr^_>YW&AzYtlPlXFQYqzBmxi!4gyT7>|>1Hu-b#O1v6xFjejrT!UN4 z--=I={x*JZYQ6k!UajBX#k5NmYkm$km47s5m>RAVcELWThVPHXq>saicrp2x;d0Vf z;cC2({LQ!xx8sYZ>ah#oz|YA45)Y7G`?4^68_dJersi+5d8K|Q24|R>pG(PKig%E| z5%0t8riR~vZ;}21evCho|0~v*6Q)}S55uOW#&;sN!;>-7RDFA3FC0StFdRktTwINh z;4V}1|BgA=xexGTQ`7&N{6Dd-hOyxqU_)$WYWTL8P5PPG7mLUriPK1*g|qQ$@~_34 z@K)Sl>i_+?1)nulj~DP&(!awR^Fq0%c$%sC?`~eM=k2hssqqXVe+*to{$)5HSC|@p z72ZSoW_%c*C;uh+OZ9RK3q5{}NnE{&KvT^!tc6<2KS?A^sNA7KZ86#HQF9J7JcodgYl;%M}Nis@DWO z52uko6E8DW{wngX!4;(6PP`5`lKwF9W4N94mxy=ao1}kC{26{l`me-)V9FI?J}P4^ zQ}sL2)chQSjY)4!+zvaDo=w~n`;dM%@wqsH^ohh%aJs4Gc_VJcZTOU_dcAC_Ua#RE z()SVX$FE8MFY%w4x+sjNmZ|a7#luN&Oxz4xnyS~?I2SL+rKak2ld19DiVxs}xD#K* zS51|BkN89Ul=Sb3f5zWQuc~vAO{WIdHdVhP@fd7oYW(d?4SzCrA-yMYZ|qO{xx~Zq zJe-Pi@p4>jYWgd16|ONg{rgN!e=}|+eFyRL_%iA55PyLCOpX5={2qTdHU6rL!}x1p zZBywDiPQ0T(%TYuz*Ee*`hF4e`;lINqe(9#o{qCj)oU(ZkDKr@+<`CSTlgM+YO229 zn_5mk9 z+<|Z5SNNx??+K~3B$R7}8K%B3B#U?ePQ_)o##BGkUBpl0d-x01R@>C-)fls|7-!%m zxD3~rHh$u5_$uzhU$FYpFrA}J%~wm}GceDz??E9h$GN8Zv92KAh%e(_Q}y_i_!r_o zi5p&{e9hmf*xS_j@`=yEiFkpj@m)$h53e`1o!p4Gk$wkmC4C$2B>hGF2tUPdO^xpd z{Dbt=WlC3ltKi|LhC2$IU~|kcHGC)Rg1O}P!2viJN8)HKGc}&+cqLwqD^1noCcK06 zjd&k!Cw~XNjIZH)rl#{Teuh7i|0|~G8qua#8Eau(JjT>`j>Asa1#?W5&&7Pw2jLK$ zK>m3+6EDIArlzwPm*UOj--a9TUVIoI!{38Br+(!O(+)4VY_%?owU*S*q z7goJ4%y(@(0*}KM*d9;A?${3p;cy&>WjG7x;$plGSL2}}Q14?f z19MFs|ME>8@6IvxeNMy4ABSZ)3$HZwy;Ro_ufjF>5Wax#;{mL6y~=AlIvh{L({Kn* z!o_$CZo+5rZTuSD$}s+V*c3ZsZ!E$oI2UiidrZyeX5yFdGjunE=^TL>*b57>#MJW} zsn#}U{JPr;rz z5KFKeFTtzuCcFzD#+~>&evCh3rCUNh>R}^ngQsI39E=n3LR^R|@DALJPvb895Wm6S zvD&SnK8Imr%)m3S4-UbxI1T6EHMkl#;v@JxzKQ$rdrY}4)Tb66g(qMq%)xvdhLdm> zUXIt{T6_SXz?bkn`~rW$%D0DlHNfMs9d^ThI0VPx`8W@k;ca*?Zo?PM%6dKoUo+KS zc#r(giND70N&k!3o{6*JtC~6v)gwL}8`r<<@cQ!v(?Y6?N8&MR1a8 z!y~Yz`J}!_3{S>WF&_t@{m!NhKLW?%1e}I5@d~^OZ!(|K_eJ7*yc>7m^Y|*hj-TM? z_#OU;wX|c}`0HXLv#~yhjIFROcE-~%2XpaU9FAkK6c^zVybf=`yYL>|f?M%z^uJG~ zdVWIuIsSmZ;9qFRYMZb6cqF#L_SglxVo&Ui#W)5hVHsY47vnr!h}WCjoVyX%;GK9M zZpO#(NqimO!o9c;D^&^OuZD+UJ#384@FdK@eDuGsrFx!AJRHa4B%FpbaWO8%b+`dH z;Y0WYK8^3@8C!HDSnLyu=zouel4**cEU3-3wvQd9Dsvy z1dhT9cpm!SQ`7Reka!OI-&a%m65?fe1Kx~x;9Yn>ZozG6zc*{k{W<&(zK(C)2gaSpD;n{X38gfHPP+>c*jYK>68D%cRy zu_K;>dFX$~R`WZKcp}ch1$YzQid#%I{DUBYU~4=XPsMK79s6QFo{i^X368~?co8nc6?i9Z#Ha9Cd=Edw zU(o+fpVm*ET4BBq!=`v5cExNQj6<;;XW(L7inrk%_!vHkZ=(M_Kh@^|@lROekWjxv zFdduVDR?^OnrHm;5eL!({LtUit}(4uEsm?F1#PN;BNH48>o7GK>RU&f!|*LYb2%BR|?1Ejf2lm2z9Doz>JoLXusOiljz6|H%b$A1Az^RDH9E&&0ks0!QHlJP+sLLR^Z=@kYD_?=y!uw;3P9 zC-FJ_55A6X;fMGM{ulqmN_E5dtKl(t9G-x!uswFd0XP_kV+oexWL$#F@CLjY*W!BI zires2^uG(KWlzG4n=Za2P*d+}%d4O0#c!&k5FCc1aXem%^YBW%8du;d z+<^DuGx!|7g1hk@`~ZK)zp?6JVSa1ik!BlxuM;-K6Y+HHhPl`WN8l)&fal>1oP{fJ z72bw-;5OWj&*Mw@I=+P;;ivdFrqvJgRUK>LVR!_lV-swFtuY&WVm=PQVOWf_a5m1z zD{v_;#|P2>?x)tncH$lQD!z{I;$Hj`zs2A1FRXlcSPlo_q1XVA#m0CFo{qh+ACAFN zoQ@aZDqM~JcSSW{cM<#F7gfBK_(^;QU&L4NO?(GG!cXzP_$StH5a#ztY=p<-Ntl7B zV>isjJ~$Fb;|!dISD0t(`&jWhyaDgS&G;xjfzRR#_&NIDKh=1DB>olu#@Jh42K4*>ocUTqQNPHh|#z*l9 zd=Edw{rDCBfWKhXqr&uRU|p<_P4Pr*iyg2x=HWm*2a9nGPQo&rhYRs)ycXBudVCU} z!9C`g&b^EKa6h_+A-@vVz(ep@Y>X%3N!Z=Y(ev$?j{|TVPQ4UD99v=+Gt;@Q*b{r>5VM88haAUXDPD^6 z@JhTISKun#irerRd=6j1-S{K^itd{$2JggsaT7j@PvEoo0`9^$@O}IUKgX}}NBkAtv0?ryVGTS4kHeZ;uUxmuE9I;aeNAQ;~xA5zsG9nq5d`TIBbfYunXqn04&AHILB870OZ*m(Z4{>07+YX#?1-meCgxxt?2m(R2#&qb5xvP%cR!C@8w* zvI&9QnrtvwP^f4H)S{(aDzqS|RHTX!U>xI6ePo_V*^k zu$+_muzd5*Jp0W1&b;rtw`6B89z*Z4c)Ksc?_+mN#cUji5iG=sI2nJ5b8#6i$MyIo z{?&ZW^Zt%|@eA}Wk8f{*XXCke5q=;0Vj5;*e;kU#unJ@NQ@jr!#2L5@m*YxYjc?$3 z{1o@%SNKo-4v%BY&hhr1g&j>jhwFr0up8cBPSthCus;sM;dmQHun=p^arztx@5B3X zJ}$(ixC~#wmADb##t-ph^sl?D{e4Nf`4#c~x5RVsJWRsQcs<^Px8WTa#Zs)o82%LR z!v}E&{sy1KmAD$;G>i2;ruYH=C+^3Cco>gj^DE=`Z;4$o8GGaPn1R_i7;|wXj>bYP z!8)9TkK-JC2A{)q_$S<9>b-znxDWSZE6vrmy)|Bd7h?+c!a z8<*n>T#c{dN4O2Y#($xIU25e$r%Sxvoy@-aeE_@`Q?MW2h}k$0N15gN92uinii`0n zT#hSnE!N{(_#S?OpWzqy75)!4zdBxzGw~ekh@G$tcEdDG$No47??C^$*=lDo<#Biq z-ir_5bexY1aVajtHTW8Cz(3+P6Z+TXR{nvM zqgaYn7{h1rd3*`|>vJp5ddhF&d-x%4$DQ~&9>D*?|Hjkw+}+xL2DZVr*bzHnS4_q} zcmrnP0Q@nIz`L*jYs^>l_<;A}{Wuq&z$fu(d>LQIdfbSA!%uK8eu2laS+{sS{OgRX zKCLPD!y7RR2jGu!1m1-OI36pp4kzIQI2|9yIrv*#g3ECQzKpNqo45%-#E)?&?#2Un z2%BH4|xba57HCx%dRWh%ez=_#W=UJ$MxV zjTa`z+tVJe!=5-0hu~dUfOR+tAHm1)8GH_3!?pN6euV!(|9ay(uFbBC*Y9+^7%#yT z?1h6c2cuYu{`JL`_dd#V@dIXixcr@_#ni3*y8aUO!hV>6**Fx3;q7=A{se3B=QtA=;$nOWU&go4 zzmB=;wTJTOcnrNB@p_++7hyN-j#)SWZ^yeZhIKdtAH_wu6kowNa5HYfz4!%sJ>&Ik zf$gvZCSwmAfP?WaEWjAn;iLFCF2!Z|3ci6`a4UX+Utx>Xczs)8d+dnaF%|pcAk4=o zPBcH)?^odiI34Gk-|78fdlKeb1JA_^ z@N#pHuE&knVNc9759s??Fb9X@9T>q99FH}4H~!pQ=y@~ompB)Hi%al1d;!Tl9|auN7W`mtrsMhl4N&qgaZQ&BdNK6{q7P_$!=`i}5L3jj!T6_&$D$d+|Fw zj&1tH_um$~Vlt*<7T%6`VYNBm^CsZE_%ob=kK!EsH7>^$xE|lckMVE#75)?b>)UJp zXX-VW)#FmU9D89u%)#Lp#ZvUIW3N2-Q=V&n>v>P$5_|?3VF~;`(^G6}G{)*bzHnPwaz(FbDH7ig)8r@iF`r{?2^F^L~#n;mf!V|Ag=22e=#e z;W6}Xi08ckFUG6!TFk`$c!&9b=S8pt$72oNjZ<(M`q#PF{r&6Q%ja4D2du}9_*eWp zeuGD_b(-okUDr#;cGv+sV;4-pUf3T8VFU}Y7AN9N`~^ORzr)wf9iF!i|AOz}N4O1l z;T}AIhp^d=%C}A5?}+E%dDtF1;uUx`reH73HjnG|KK>X-;GLL{22$ZMYM6<5B!Kw!A66|FiHsQ-8O7A?5a%gq`skQ*k#_&cq+# zP#j?@ZWQG^u?WXvrKz}|Q=W;B;~ZRQDsD05r*Jv0z}2SWUZwm;d=od}`=;VPq5K&h z!DD#Z&5F}`Is@BcJG|6Xo|`ED5OZ)i-fk)`O1Ts#;5|6iRNSvA{|0}DzsFUk;$Ek` z4!7cV{0#qrNAMV)m##c&--UQ7UXEQc8PhQfN8l)|z-pX`lX04%zJc`Y;;`eW9s@-SdRd@~dz}|QxX5au*^%zV!7jI+z9h4(jjN|YprtV)$c_Pln zdH7pgg3sdf_!7R1Yq1{RGPR%gD1V5%aUUMVe`CvRjt^dfm*SPC@}^Nv#{oDPhvRKH z28(b!R^o#=10TmZxDXfPGF*;-#0|I!-^E?H2M^#OJoA=#yU)Rk@e;fYuf*%HC;kYB z;;nc)=3^8quo{1kGx2epgTKWkxC+g@ED%oKi=Mp@G86p(=Z)>j3aP7 zR^k+#hQG$&;0w4C>v1D)!yWi9JdCXd#OvD{FT*Rb58i--F&7K47$@RnoQ1RTS$rPr zaU=d6KgIttPxrk4#^wX#<(Bw;`~hBpS7U!1gv0PwEXHwoAKs5M@KO8?K8dUGRa}p6 z;#S;_2k;Qu?-*M9S~@+Ir#AE2m|EY?Y~^`Lrrw9{Vrrw_KK4J)*2{PQ_b$@S4xXpO z!yi=PfdadEPSf zR?k~uj`F-U=4j7bYeqb8qgkl$t2K)~Z>u@Z^LCo$p104e(RIeniJo`FoUH$v$*KDN zLh}K=PBf>h{ia@5Cz*P^-^JAX7v0VI`rd1Eq35NWi`9Pf8D00xd`|5*Ur_tam(+gq z6}8`dL+v-$sr}{#wck`DW|?oP{pP!Bzxlq}Z*Ech&5zZ7bDP?4?oj*9U24C%N9{L1 zSNqKaYQK3%?Ki(w`_1p{An4z5wcqr#(pGin`#NMR%IX6C`gW*O?w6CWGwLq>dYx+D zzNnY0et7^6#$3$9F{bWZgk!M`>u?fI!D%?l)Ontb^Kbz!!{xXFSK(T$$Bps_dp__6UM{c$x}pT}ES zwlSxAUR!KuYToI9Nv7tX&e+A&Jk$-lo0^YOv9GClDGk%j`8xkNz+9;FkGbYzoqrr@ zs=toLF{b9PA{=XK9xKBtQ}bC2>rBmSlW>Zu`E43LWUkZs$62Q4yV*F;)F4}ci%iXb zOL3X0d2l(dFf|{p!Zqd=oqt?wYJRN8jpjC;f81>D(D}!$<}RIo+-Yk5+>QH8&7=GA zpsD%v8$4oaUOk51X)0@eZGo-K?{xmLjd@(>AKRIpz7H7tnHv9(m>TzgGd14*?@`e> z@7GdgjqguPjqA>5NR8)Q^K$hs-N(l7>t{-h+vBFj>)mHdjnm7N%f@Gsd86koF*6iz zY8+;tBQ^eJnHqO%OpUim=Sq#Uf10B_?{?M2##POEQsZgAS*UtmAT@sczwgty@&Ep= zT)&@rq1J1he62d$xMvyqPAH7Kl2Cj5zo8nQu&zY{Uk}MpHJ*0 z=j-#N%j81OD_5JXKac7x)sMea+pYiJ)LJE z@zC6;$88-e>woJ_^}8!mISyPOaBmlco-n-w(P`R(1UTkVZM( z)HxeTS*OB(9H^okGnH%#Gj)(gQXXxp-^M7{nd-m(yrcUsv$Fc}TDJT1 ziTd+S%KrSIe(jHc#rxx5{o5bcD*NMlqUP<>lt<<6=48#Yl*gD;HLfU6G1dQpeloy#AKWi!1 zn;J(uDepElo{msHW@=ouJzZLRO^vUP5f(l{GQd9=As^8@8FbA#tip*+ph_?t(0 zfvIu0it-v$%e3QV?$Gg~oNn$?{V122 zdsIKl(@c%$d6XBJ8rS~!7%AUtR@V65%J%K1#`zJ-$IS1v|1+fR-#o7UQ%*NE{=MXy ziRH2U0vW50JJ$Uai|T5Z$wm3Gd@s46rp8OQ70E+y9he!(t|+W5isn|AR#unBCVI)$ z(X#l~AtNKhvxW@GOc9ZR6{SiL+?F*YBfK^%YN;Zz{F?FXVR-Jq9+BbE*buE}Rc=OV zBr7A+)&>%0Wc5qw-Xk(BS`&@kmOmjnqN=Pizi4^65`RwT2sB34~lRu-*} z7IN0`BonJmI|CDJPtCl&ownD9Js2Vv!$BDIS zM|CWxHda-epv}W$l~t$Orp6YRmef{9tzNlh`4bEB3lr@1htZPKipIK~T&>Lfio$5w z{}nMTnqQRgpk-85l})tWpPbd-bn@!VvC+cux0L1U!m}qGpUleg^3uQ=P7u*>?~`}h zw`b3Ye|m4LtS&n7uC^&$pPUhSkyv$UNlCOi5IiJzY*r*Mu)izw5 z2j+ykxa+;4^K4@!cVKEbI=;F`;?=zpukM{-wJMh=iB=~{qSbv8CuzuCX;VS6H6l`# zuX9^tb4E&XYTy6_HU`#a4NvLYy*toj1)< zfmWC2msa=>Gs*cy{;YntCiKYNnwDeHib#!S*RrUl20ad)5D=}aiWbJy5l$IV>pv(& z@(W|76Rh{e&o?`X*7=EhM5?1D6Y|SWu{re=n{}s1eo>K5o>eRU2xdPG&WaS2l~#sXoObHgVqQwzCfYs_z$$~R$tE+?M!C5^bMJI*~&Pq9XRgXyFN%u@SXS#@E8HLQ8Awx2Ts=NCwsjMi8WVvSqddM%Y zO6eWnlsQ~Ssqt=pZyc+~2X_$s71hzgNNGhO$0go13oDB??Z=bUMyl%~#bphpSfHfU zkytsk^0Q@S=;L9(UjAc#pkn^!Sap6yO?hceO=)F?>h_b`h6ZNlj)>IQ(}YN6nI01S z!|qm55zRM|g4*JEDPGa4sGjc-o|lu-JyKX%TM={Zvo%EL^oi(6M`NKNT3lJp0nf|n z6W?IRu4j+<&o;>n9+;*1!>VGX?Ce4A{=Fmd$922G9f(e4ZB3E8TYgbtPgd$jt+i(`MbU!V5}nOr^`H39`2_{l(Fwt= z8tcKL9yKaTY#2A*|Kv3qIXYJHjCz3ak_+|lAFa@dZ@gEr9)1**F>FY3eoT+n1-0tE zdWqQNMKAyD*{?lK_ZPjCJYmtxE`RBy|1C~0fBYpJXWMMKO1DgABX+@k-_)GggF>3y$V&HQ?7QduuW{5Y#uv2MZr&Qp1SZf#TmZ-u7#;kLni8H$Vp> zOY7X?>bF=cf^iQk&W@>DT-<7{2*#~ZTn85fr4GW)KI=v+OX9nBhHH5L-|^N+IajfB+lA9ER^qI zbx!LWZgKS+8p_vM`H~c5?Y&qxSHHSYz7`tDHb&gy^2I{=vXn1fL6)z*ZZ6-Wp?r19 zH(1-<;_}T1<(n3$pUo*Q-*cgS^~#s1|2-4Rw^aGu_~;nO_vcW)oyxb$RgO3-ZV2UD zrF>(x-rB3THXG{qRVd$V4emtk{UVgF!)JQ0jeMN~`OejNP-w$^x>NaV9J$3Ezq1t= z?0NRl_{SaA6EqO{V0^rz9)E`w!1}}{pFTWzS+vB zw;lcZT_s)pqM>}f)u^g?3jcqXFF%y8Uik))@9IFlNuhjCE8o@x`Rske;PGp{yD^{M zE^VmayimR=XL;U~Kt6XqW{2|SDc=~y+4;CuH`m@*LixP2^*4@o!dbN0U;ZPMZ)2QC?LR=gvW@8N$mK7YB9xK`4xTM#@SBlTdFXg;V8 z<(sX1NxHw)?`GXxd+qbCV7_i`=ui&#jax! z-0x`Zcb*bhKh4$6;_SFYLixJuNko~}yT#?ZBb4tOU4W&#f-Ijtwra>XA(U@{@>RKH z#96UAl&`a%2w1%=U!HEZU#s6kp?t0Nq-Ba72o{U8Wm+g-ERathqc!BS>v9D9!NdAo z);{xci_14Rl&@a-k~n_$cw=!^zZXOKrgcjEy#4o~e7nDF?Dw|^@@)>~8++M_&vRT= z_lM%9C~koAxJ8@&WnXB&-)O%{+G5A~PTefd+F>u|?6|o8w^8}dvh^$$XWK6!PEQa0 zWsBm{_}Os#y;yO<{?}F?XuAF~hB({rwV`}%E>HYC@#;{%EamH~`&&B-0{LzZDulVSHBxV`6dPO6)D)_tbRG6d<&GXn@dKV6$?Uf8&9#{yF&Y2rTyA|tQ{q~x&79L z^0n&Rcx)A>&(`A0BcZs~irdIG!}8fOJ+$A~wBNB>Z~Gmmo7?ZwP`)k7muNm%6w256 zK;z?<#k+j3hVrFf5&xY)h4_oB-|A4l!OG{(Z-pXVKD$ng^+VVHHeZ?ee0&tjH%<98 zMf>fw`N-uv6v}r@`E0*#arHY8%C{hpuUf$_-SH5)RvGY42kgsnjUz;xaj9%N_;@X=U%GXUV=*B3>^400)+M5%~ zw@UfywcRZ)-=I*whn3Iuzk3wy@)d{j)m@$Vb!b5--#5zV`pcw1zWYP@x^>lKg}w2@ z;_7!_C||d)n|TM%h`0A%#k%_0^?+Kbd>Z%n{|=g;4L2@dXky&^3F55(xW)Z^P;vIN z%WwOg=7OYa$GNI=FfLUGB~e^*C~nOu;%-q~u)S$|QlFY&zxMlD;kecb;>I*FuCj@7 z_a=xtKf!(M1aWN=g7xRyF;;q&Hl1oPSN z;f3Q|-?TXQbH@a6dWzMsxZGWv7}qaBoErm{)cu^@#JIdB#zmVLSC=5p9Sf_U`*}ta zt z6XV`b5ciOE02X&{b|i=!?1H3=`@D&9-!?JMUR;IyOQQXr-Nd+y62whQ(2k@8aRU;> zUDL$4>lGIq*EY`kKHZqmZL{mM>CkxTZ0c}W&#%VCpI_pG9kvzqq&+ z#JTlL6=&C=bc^lRmgR~Io{zNOt8&`7N!$Lco2%dJiqqk0e5vztvxfI3ERSoi88}T| ys^Zf1LDXAXKT{hmpFMxGeFhG{7u(v*yU13uxP11RXD}}9#pd2Ss*77(-2VbYxn%tS literal 178364 zcmd?Sd3aPs_CH*8Z{MW5Z+Ftk?LZR(bkcz&BtS?aq9B9>nk8XJMMMpYh=3Xvm5E!k zDYya&?hA?=>L8$uB08cl>NqZdIwPP1u0a_fvS?g+Kc|*XgE-&s^ZUK;UoX#7x9gnq zsj5?_PMuor1#TEn9p#)e{fD!B)nzFxT{GRfZpUmHKzD+UueQU4_nq5D$$iYU&lB$x2 zWY(~paW(hW?5Y`lluc+eVcdjZ&bY+*@O=6|M9%%Gm+7mwm?e&R=URHk!DR zS!*nQ{YbenPW;A6tTyJbj$_jiui!emAG@62B}bbC!_jj1#}HoO{LZ z=A2#Pmz8AB7V?sDv**w4S(RBke{u4`rJb7(UQ)N^0Iz#JfimihB`q?ut^!n`^NR-u zUh~j_{PS-*Xifj+;2YPxi&76XyTX}Q&LecDtSPDPwFD};j^ErObJz8|dFT9jan3^r zLUorMyb0}l>t2g=70dX4lX^j`QX>n@(y;Y%dgIznm@G5)X8nZ9nySoir_wU zpyRYR4<=2!`rzYr+Yaz)4;{#Rv-z z7^^d11d{6BbD-6<)A9T3!N$5~q^n_V%C|na)Vuar-3>{*hkn0z^xYM%Pw_i~@2xmo z6E-><+hXgBUq+8$9i*BcFeCJzw<;L>DT?$4I0Jib@WIbhESBw#lCSfe;YVZriU!5= zBRh+HfwukjytqvnVMk^QIg4ZuSw1zr$w;-fkIQ-vn(-Y@^k`$-st4w=NT!hSlVriF z-BVe_Ib}J2)%_^vJ7u{floNW6G(_7yU%}YAjB@5f!Wh?XNQ(NSEZ4oaM{_V>Rh2de zndnd1qwAlkIQl^?;qj+=Lu#~Dl; z=la<^QvdVeBW*Js)Yx(Nb9mWDGM`ttEZO^u8Zr{jWx*bZn-6?LB^+;+nKiD>*hf z<=H_sO1$3K%kSf*6z6D^nm^!>`h~P2+b2<~KAzo9^quNr6Ox2XML%h8H|$M+VE4d= z@}sQ(|KvrT{|~(=OL)Vny(r_qcoB>Eht$tIwHGBt> zN^{xT|8A8Bnv09uaU*y0d#>txZr(b6pCfypt9zdw5gO+v^gdVie(V5PB{$yl+|xxLpQQfgE{yk& z<-UpNh@Mq0Seq2>fL`Utve)^dyx_#~ELoS@8RMA~AJ3c@b(EN!VOU3NFCNg8W<4A= znoO=N; zId<7{3@5Z-vfjg&te4}cXKO|DjA&TI@*dC0nHv(V^OI&Zi|~4DFYN!PHH{}m1d8iy zf-OqP=qEg3fsQk>R#V8a*AlUmVn8wC4l5Y4EpuJp&KTt!jB*ZZGTCyrV}1FzhAZv~ z8SN@752t5K8)QeN1$4h(X$}QW?6+($;}3grazvB*drr{5_>~j2=R$g@k@W7l!4+lM zaz3{oDkDOE!fGh<)-iT*qD-_hQp#8)?UbvSPsAhef@|(DS9*(ef`L7CD^a_FBke1i>Dmz;YZ8MX*IDn4vh8`e9Yc? z6^D)Ff5X268$9{W$9wj%CdZkyTkUv55)dwp70Ja!ZUA>`3StZ^tod{-S9J3Oxh#O z6@1FGnOFS|GpW5LuEGtFgyPEhY3ap{;HSZ55rOt-MpVMRm0ot#uHsEo;m|YkE8r{goxOm66a^`YGD- z|3O=^2`i#W4(P zxg|IO#R(Wm%aa7htvGHYd3mznl!Jq_Elxr1diQ;Mnm?JB6CHl^tqJ8KM(kQtvF`HSMOOZc~uFh5kk-5N1H0Cemh>%@S`IpwbUhh=R>))h__z0D0%2Rl|-Ae z1W%vX5wqTm zxa!T-a@U_!)n;na5N~;A&HXj*wb&)&ERFgZ63)p#9XfuT)~n@f^K)8jmTNS$ zwA#69+>DB&Y}B~P<7OE6)vc2MQmX-z)wBCxh0$oeqq$;ulj(l9IS{k*lJCkIW~|mW zW{{gJgoJu?SBoSz$z4DE=zLgl_|e))7@HNo2E>oq{`ycPr9QPG(2yKStM^vBSIZbY z3HJv9b5afcy78M%)|{vMMfSv;|L=Y3MwUDps}PpNukI7gQtFeT`b0VpZ!*vyU(C#N z-DP!3zB7BMu{vLQT&&WlCmAHvr#o9D><=Vv^emyL@O#?X_M4aDy;{U2Y4E-6yF^6x&9OeyrMzs@j82V0b zJA-B{>DvZ(mO0Vv6YeZCaA%oi4sVK$%ES$5-RwW(G-x0KnDwp(z8ZY7U&L=E-JD@f zs<~&X7qk4{nsK0O4cwgy{=GFxEpuMod6sYYvF2BQJASfmSwc6gLP9sU&@FTd-Gb1q z#Kerp4Q<8YfYNRFQQvIRE~T2Qc^bj|jG2*|N2YqKobpv-zSf$PYE}vUDybRyveJwB zSox{+$`pFRXN6wUXIq^@uXN~jI`m@befi1Gs(y#l(lcWZRI!|0^LEu{&di*jIeXmf zaWn6oxog(0nVGZ3&ANBixY~PbGiz52?HpTCofBg@(`qKxJXP~ZP5rR@qc87EWvOp` z(#(oWV@rpv0CgkM?L!;zT!eI6)vl=(xZB-@J6`(DtTB(pCjFilEd8MQ#W39hZ^7^I zCN>dw|4nSxuA1wH7~i?g(fe56O8Aqzq+%cI&I*ofpIb#GDw+bKgv`5sSGslxB*kXa zX0yDIH7$%yuiDbQIXr#HmgcQtmOHH~t45?@IZ?OT4dp~*DmP^~?O$SQkCPJ(DE^-2 z`^8QyrgmZ%45iX?Rmh3*c+QCD;FSuS6Ai0cl8&({Vm~!O#-%;YgO>65E>1}LNr}wM zosZ1R{S%>OtAd-jM^pQ~Y;~W&v*m7N#5!8xU)k5Zpa6E*8ZLkxHizpPsh6@QmVaQo zzBdllgw_>Q@tn-sFB;oNGNXBe^ThroQXQ_5cgNux7IDMVlHgt6==%it>HqZ~_&W<= z?>^Zmr@Hbfum8{N>9jx1z+gaCr+m&UyeFN&iHjc9L_PViA>^!jN2y9@vR(_E< zrJL^b)>)n8oktk=lIhix)yY-vUt;TzHp*MuaP&~4ytfTUzissV4!5^ao?61u-HqYs z&IJ3?dDkB`^Fy!V4tyK$Z5DM!+pZ@6fQxVB>OMsJ#BkBG1C8R$)vroWEN4j7eRv;Z zq`J1R$GMn)%u9|n4xsz~oc=<>PmuK0xAy(y36jI_bPk>~@(fX{Xm6&xFT;%pFeR$B z(o?k7RkT)giq`Vb8t(Pzq&_l7)zJPFHM9{mgicX|gBl)}HOzEW4e6(-!7pmCPf-KC zr&vVxR{JdBYvgmZzr?yuvDd=wax2`WK8x6yS;Mo}$d>Y1(~el-Vp`oJwS|kf94R*^ ziQkyHO8jm%zYxF7iOdvoXOj4hIjh9)X6Fm>%Oa6kLLQkUeq)hU;&*f83-QZJBeR9P zbkgkUi+jbMUR)ZRzT}H}Pt!Xh;E3}E zFw;-s7>7!xYrF0XaLb$KVb$T;=L@d5+nI2# zECWQOju1BjVPua|h;a5Wk&9f@cH^+BYifp7ZK|1sd{x!#nyRYjYA6Ddeo=wq`8OQx z^sLPHt_syK(Cwey)9hO|NbK}+@{YaL%$TGo*FL8p`bSimsFP4Xe@$_wP|%mcA7k11 zB0od=pb-cf^uiK6ZyG~1HV5$(-gPJEjh9>n;_p1alH3V7ueYX z>xyG#j&9uCLe60+nY&!a6cJBjy%_zW_)31yD24lZ{}t)Y@P}gS{~z9~E{w9pJmT8h zyV(hkDCebZ*WXgnyt{T_U_(k(+r_kBs;{uN4Lp4Hton-7?J0O8;?K<%ev(`jiY3!K zOT4)WzRJQpjPrK*7j0uQBK|}NR}bhec5sXZ5XX78SB#2#9pUA;P`fUEa^gzx!^y!V%7JwpqpQh8Y)@}-3}^0xY0(npN9u8H*E*)635ugDvC zSyOVgT({&?)`9ipggS1GvK-&u(v8VgyDxRHOZ#yfkNnU$Z@gJ`&qQ9beEq}$-+dt7 z<6|B7SG7fq_<6fe?BDc`?}O%-!&e+h#n%8^nqOveHz)UkTzfRt&we5 zv=%pq^>`;*Z`KzMDjZ_qoK#*?QL~^1-aTQ#gjjR9c+132gXc}$Qe$Pm2D-SoVuHBe z$nU=0LuK(6B^hVIOQUUt{mVDG!8O3WG%DY|x;Gi%n1Ul`*0zmaa9n~T*YLYH+Td7% zBdu1m(GuU8P+O-;!s=mO&KXNRu^+)f!GwO8@m>Um%ttSH&g%)in7T0)?Y8tm`bqet zwnbYxvMt&VJ-?P^cUjhTS+`}y%epTsSys9%Z(07bf@PhT6)r1Uwlv3lk~A)-J0y`~ z`Q=Ry#zxRR0`}SB9s$4l=CkG8P4A=;iDu`i`;wKoFDbZ-<#ui;Y)I}@bZ7a{yp~&& zNqM+6Ss5$1i=;(&YDrJ!4^5+R%QcZs0ptZaO`DAh+?;E=0;8<+IY*byYRR*B9(Ow} z<&SP2)q>evA@lE`UOFqh6V5utNiu|!WJfccGY&rWS!tL0t_|H9iW_{9?)4=Nr46p{ zV*Opm7MFEtxsN)!v{IgHJDaO&BI2u*NKKizml7V=a_0vB)#qLJ2KOL$m09ybq!PR6 z1vQ?W*K26ZMTw2>SHv$3V1K&5wg=h3l0Fi>1z2BB1@K!Ym=h}}o={4@*Si*b=nYFS zPh9m@eNuh0nk|m-vP#U9^F@o5s?EFc#ws@2Rqt9YBf->-^q!IC7gu+Q#Tz}p^K8Tc z`s2d>T(l)i=oW*6GT_lXhvubhEf$eId~&0nKQ(COe9S|ZV=lLr^VP{>HV)b-J^B1ySU2eUv-jCk7>pk^4BFOgJ4{DFrsi$2MY+JmE`suCru2$bzY?A9|6Z)Hs zI+9lhga(^8)?kLUf_4nrx$50Hmqz6bpSn@%nEE?w&?v;m%}w_QcjEphy}@Y+He{$b z3n>kBrYwy-_3h{FzJJ7_c627 zIJUB+g*$o@%a-pYtM|sl>NkA*4MRrJjRxKx$oq`%x7SGyZe=y+s)U;lo^bOq6DJNt zs0c-<8De$J+j|+ELTYDJjhmV&d}lh^F|g})7MXZP7x6;R_DiY_brQwdqIOd4M4Z|u z0mp$jeG%+CQ|`NY{?pqo0^eV_`(ysdsOCu15qQE9ELca73Jk{1L%I}c5z+yqi;@_7 z45^=sv33??mmx(!53Ba87KdVQBzF+C8wU(==2kYjOs950l>x2$2;KXLo;=c68Gj3C z9J{?le+AgLs_&5U!Lo+F@G+#C=PR*=u) z*q-KR=JT90qU9n^@#y_S^J5aZr}^&XMoxEi3gXdxRkGKThU!VN(j}{6FE;xEvek{q zsqb;cnIu0Z`T4QEO0WD_c)sS<#B(d-xxMpcdEL5h4doVCs?Mv?`>WCCFJf(dk$Jrq zPnuV{c-6c)RlDnWp}B2#RWinO_SZ(4_DC~&#gIU3W%~sSXcSHKV8&qYTn8SouW?$n zsr>ef#dlZuw&DH0^4N>Ts9uCoorF=X`Z}_B!s18iw4a2NzU4HzQafyOn%wwa($$oj z?2F<%znOUFpU0LJM$g18zr4{KSv9t{S2QQuUD%c7f3R&RTA0*y1LnlLjn+D&T6%B9S3h%H^zF|adNYN38!Az6_h`PTsTb&1 z#pVA;QRcdGe8*HSzGEs}N8f(X7otDS#uuUy(t2Iv6DMi?Xk3p+gw~HhYoyw7U)3zm zp39p!-+aUtJwDiYw}=|G8}Evjxl6=_6(Wu;7v=kWRbSOGq+#%F0$Y!Wg;e8-+=h5^ z3)23^r6Tf1wo#PsJMVUQ@9kplvcq4`yA?8=k+zYpH&*Sw*(|hoE=C=Tt9I4QuWEbU zO+y~}*^KOV-w1!dy2=C3PWtNFst*n%*Zm^DFh291^>W4}&hBfg!zaw|KVdd=>_Vms z9eMOB$R*yu{f4}i;Za@Y3Vgv4)9Xh(Cs8c_%I)K;>T#>|!2ws@>9~9P;DCv5s5{lI zKj;#7P^8zp2TXjm?yJE!2FqCdYlUm)xwB<_89TfeqPE-YRdWtbuaqmSVY$~%oG~$5 z#TkvT)J-{&oKOpT9qn^s`fW-}<)eIPQkGHvZPQPk#S<+Mm}SYwSGa z1F`4-poYdPv-(5arENv+C%69v#?iO4^^k2-GX}fy?ksiY_8Q)6a*ly-je{6Tc_aPf z*J@AwKYIBe1N3+ICm`s|Py6P?b%+2Vqx^}Jd`H?V(RWs!2-??A;&V48Nj+`Ma zzOzEi4~D-NkvR|VGx1zLWLyp2AjXze;T__vT@#mzdgg8-AG=-T>D?ml_3L)JH(Me& z3sK9xvu+akk2lu+ZsgNHnx{s7HhhsrIS+ro0iztb7S^r9tosrp_gmxDqJ}xA^ykZk zY&ykAai*GZiqVuaOOEDbjOLWzjV5+hH5Z7Q(!Z`jUfOdwR$ZCXt8W!nW?5U$d8JFv z#mc!dCcn!aNcL4L+y9%ZWM9OYzR*anlBHNBdtsG)>Dq!$dSf&&?5)&?!L^) zg*SZv+EXm2gW7{t;`pv&X=4l zR~?d)?rFpBjn^PD)Yc#WIo?X@z@fg0yI+eXv1Eh}5A!k`uj>6Q1&V}O4vVl{){%8$ zdHB0w1*|i!`ioc>)|GW*#duL$!b({gJB{^Vr?Wn+FDqyLSOu%ZUpN@R2C@-sBpby> zvoY*!b`Cq2jb-PtaqN6Ho?XB$WEZjatR1U-M4QmXuWE%M9#z2D;?6MCN!lCkQKZ&>f8Q>Cvuxcab;;nZVUe+ECv%EL3+ zDue=VD-uSF*4-E{uayJ5ZEfuY{jEbC8S`8Fa~VsqDm}OcwA!HlfORigPqQ9_zoc7l zXE5eihfpeL^~N*9+5}BnS+^kH+WJojVcU8#pRqR9EzmR58jl*sjP;tiu7E(5!qsbFFj1?`Ykh%~&Uk;~h?`l2N7Ju=@S`W(og#HST8{T)2%(QNl&X3&oitE7?(4xD06 zV*L{%Qf0l2I;*WD;D=g2;fy-WD#3V-ur7cnjI??JIm#+Q+0oX1JjYlrJkPfJ!w%@#H;n%I))=%q-g+FGUtryV{$6M;N7;+4@1aADH3g+6 zSP$5YO|mw68Jlc1!+IB6h3y%eVoktEU1AM}CR43Iam(?4M7;dX`5hVLD zAl|Man2;q`L+qwUQUxB~?rq3>k|z?E9!VX^am(7=j(qZ5;x5Dk(<&{D#$DE>m(O8d zSBmi%_soY0?5=`q+CAU|> zs>aiCgkh%<-AXx~EX0zjzkV_aRVtXRCH;b? zPiOwIkW(WA zV6GVd)O2q<2QFy*i>FiEG9u;ng9d&-*8Lr1KSubSny$9Lg7+G`c=}ZWKf->C?6RAu zFBNo+^tMlUI?Wj)GRJ-sGtT%_m!Ipa9E1MieCwz}-= zh|#DSZ@Hv9?voucBk#Cu3vtc(Mz^xfWuK7`#rq09c3Y`P(v1JO>=B4L#&??0| z5RzN8#Kqj#kc1dwB9kMCCKOG>F6i-6PIeG;N!_y00O&>jqdEQDB!8pRwD@S!_p1&*71+s*B-d3dBc?#8g{-H>p zvzEwr6d7>tLpb%ktH_}9Fp=*mGUPl#%ClXOx#`tJ?oedD zGXmkr^MN9ZoU@7iP?5#XI3hn%WSR33Vw>lmitOq1!IJ6umm+&Rl|+85$Z}^8kvkRH z-x*5eE=3MX?+-0@E2^3$`LS4fJ~5MF%V1B>VD2flu>nIU^i*+$Vs;6f(o?NzmpwTj z^iWN^?PFNTJ;OBZv(F*B4A*qPot)^ymeM5y(Q z(R8l;A52!y*_zI`yCF1s&e3#{T}Je|nlAQ{KaAC684CQbatmfuf z_zea;Pjk<4vGJV(G{>SH0^@Cgn7QywA-FZ@~<=vqg;#S)$_Gs{+;S=@EkBa<*CZE z4`~>)v&ptins(V^5lcPaY1-|p91L|2YuabuhDF(PMAHHLH`M7ls_CG885T{?F-?cW zqU-tINTaQg5y`UKCPV&%mWS;dv8nJhYdY6XCeQ!TNc-GP_>J4ExvAV^ggu*P zrlILE_Cbt|$JF##v3K;iOx3^f_P?qBmX_DpmlT3d()47pc6*X_dsFRyl6$$eyw+Dq zQ`MvCIbtREcr|{m{W*mzTgt_zYkKZMz_piA-E|U3JIq|_%r%;J`TC6-$UN6-8qPAbKl5CtX`lTz z9Rsd6)8q~{V4sd4>$ySGLHjJCW10@xv&cE-X*$b3o8s)?3XqGL{jkwx^ME+$PJ@;K((7HKbyh#-!XtroY`Zhho|U@plPL&u|1kIoa>j z4HJ#YeV3+PB7WbkNw<$e&OMs+*+~d{o_jSNu=mrPyie0Xdpr5?{hAKh2Wc1|&~%pl zBKiD-nnp zvnB(+0Rut5rs<%a+70m6H65}uh~A>2 zPSpRVri*-|Xtdwbbg}KHW#;diF0<2#ep}N$?bby9L({$OETZ4hbh&+uyyaa@_xJUu z`rp&^Ap2IDJ@0F}+BY2HZJHcmx25iF*Yp@Wo2uWT>9KYvqCe2|cq|-P5I)p&4d@c= zkTgA+1r|{#{FiBtherjAJO@nAyYW#wq;YE0nlw!dNhu<}rro{@GTUKI`|PV|QXSEB zz`mHA{HUgbzELBAKc?xBZ!it>_nOXl;J#kDAVBffNd%KbdAa zw0Bb%#7_DUGGZ2)%*5Z*!r9nI$bO0pv83Hl+&{p0keUzphj=DIjxQC!tX3fA zEGPmwLXj@#8Y0Ii((TM9a-1T4Ea_FatN%iy9V$YNlRO)!#^=yu|Hbhdw-9-0yvBbJ zc}2X&O+?OVsqsaGE&tWV6;$I=|FxcF@Ly*x%;UgIxhv3YGseOzfcNeKA9&9 zBNB8*VQb^RNr7{nDg+4sEsD%{&LQ#+MHV^!T#(BZS?u(r{;g1Cne#{(JkJiT(!_S?=t^cHIB4BKtdIsAG>Ra*(qMVbK4CBCDOUE+C&$Im01y z`d?RMt&`&c`8P$*aXv1N~I!$=_9JESxU4OO)}h6v81u^`;^MFv>XB1DXo3ymz) zn-)y%>e+!z`iM&}XQ{;s#GD=&+SF1-x|~Z8M^k$!((U{Qo}GGzB7M%KXfL(5BGJHK z(Sy`J=5?r7g_+d;{6|pMZY(>@8i;Fc*!daQIdz~(C!)0CK(S{Ff|N5AE*8*ng*l%C z6VP$R?Ez}yXJix#n@Vk%r?SQKStd=E^)*Td-QI&_X%cVoD? zbp{;Kuw3v~)9Q%4%gV;_32&b6fWGa<$4c3F2z>)yH7jVL`ec+Z3lqb*I zj~N=ctvwlwqRN|y)qy+OQxG>IWzJog?15$NQv~=lCmVAiP~YK4LH2aK)Twr*vcK~j8R$Mm4szB|RSzh#+G&T83_PUB5zd!rKk#sSd22Jq zX^-_Pu&TXWEXF$R;DLe16gi%?a?y#swJXGvp-CHhfagHTR<57%O!@|#z!L^>(u&i1 zdOij1oQFEo^c-VOAzDn+bIj$Kuu_^Hd$%(b9-5}d-shZ)t!tVd?0^#^@W{Al?1uf* z^y(3E&PTLKJJ+H08K*wy0t|MV9_+BQ87q9+g{o|>^FC=cQIYx1#nkS_sw_NX2qJab zG@}DLkQPXr?db*^3m;FrQk7xO&FFsG)rxdE(=qkZ>J;gA@?rP11&YL4Ru5lGTWFAp z(gvly?pZ@Ml8>bQEr;^jN7CNRCbN-`6u|sxf6tbKQ|1(6UZnja=Xn9{DLg3c-E8SW zy@dy*y|2LKVqnv@E3!WZi0~1>u0;P`)-wdLCP4ipYbnMwl_eG8$LVGCh9sG4NDE`|X$$Af zgb!fk^={`o#2x3N_z55Lx6K_SPo#8GXTbQuFrl$ z3~$(Zml}wLWlwUQB$Cco(tKxa1mr>`EpjpuL7f}J(o>3sFF1?CH;IPIgfBQZD``(> z7ku5hHCy^oZ|62dBIkBRmOF2gQI>|unnt95dgbW;%vm1ZgWemF$?27YK{hCI4%~+h znn~AU@#jA}$NI(R9G>MTTmt>7c!%7<4;LhwO{U%pEkHWgnwK$<}n( z{skTyjA%O7UISkYcGNV^Wh**?k;l!as58`sOu0@6yKw#(NUH#*Vb)#nJZ@b@K5K2m zBsZ-w7#9}{oK6*%a`S3nlc|6%e+K6}sr=jG0OddrZtcNz#k)^GS^F$*zCdLNq{~!t z?$1G)22{!{TK2j1w_H)?GX$^TKyL1*G6d3PhH`!$m01DHa%&BqhSe4!*JW)(-few@ zXTUNLNyAn>+6Og{jB++NJD^;!I(Py1aLjg_f=RH3=Me!fuxUdPoWMKLWJ5TyX$KaZ z$U9MUbnE$kA?QgwFInKjHtjfq7xPYP!LVt|5uCz1t%u4+MiL0_C8oQcq#9cDe51Dxlb1~ehMS40TJiqB5P``!a~fqjF#;J?S3-` zEAI|C*BK!7*)!<;2_4E9p`;<_F)v6RAP~WC$F3#gJaZV7NXyT-&~q(D*4bu)S)=ER zQwKC?F;_{m zoGg-FqsXvxP8j43ip*t6bMisYGe3c@Nw*^IWjviu3q|r`=$teO_RQEK8TSz5dD81W z$#@EkjGxii;*1XhKfqSG#0c-okf-HY){58BDrFb%GllRR{^dT zi&Vy^S@d0o5gFn9iOjPn>vBPk5^Gk*XYJ&QHb$&j8DA*ySm!4i=&uxboYMn-lhLT8 zjPb z%0=%&Lp&7LSj2s!G(R5WQGLSxO^l0YN{v8w($)(Re zA?H;WzVn9pYA9TM^%7xZHuXQ0u;) zy`aSLzqNJ{={~Ld$2Fz%erw$iw{v|mNZk*gxEyFbT7d)NHlVe>eF(CoJ?Kd5@#eK? zCM`Ymg_myHopms2=qsBJ4HPVnz=WZ%70I2xFh!_Qk%m)@SsL1>NYl9-6F&5fB3;f~ zK9Juk(sCY!JB0QtGRfHw!-W2$$YkejA`d9i?aYaQJg7*IGZ*#=9a5y%Sy>FSNs+cQ z6K)v#PLVz*2caZ%Sdo6GGnUEFQRPu7&J_4+=$ImLC-Mxb^@I5zvO*yAqqise#vG*JC}nU`b~j-_)^W4j$Kn=7&XMWc^GC5`a%Zx-UOh1 zBc^G{#dY2GO_*IFi+fb%;`LZ4Nz2_VuphgHkei#;D4lf&Hp+5?6!P-a&0ty2gN1Dh zo`$s%qi0%gQ`lgEDlCVg0Jj=|YWGY>d=VK+=joeZ4tqm4h=M$gDxj@KdoSn=o}!f) zkLVC;rD?ZaN>#Piw9o#5gAQpr;F~;$h1&2G=`}&$oC#O5P$o~2v$&PL6n+_MtKlJg z4K`DuEKO(GY2+#GG#$40Q|xW8>0EmnLU^cyrt|G9$>n)hJm8&-u=I&oGyOO?vAGPU|LM(SB9_n1&=AS9ML0Q#s4Q5>-25>8& zhV>RWru8xfXR8#|S(XP&Zj$wHczm+;0H%T4O2(x3SXW|@z1BEXV_WMnJU(lt58=hS z9Yd319Y8+Ss)u3$%a46!nzb1CbgLZR=dh%K0JYg~jzQ`6^Jtqp$9W0cJZ{18VBJKl zD^Fnk6;OV4x{ZZTqb6b$_@A79n5vpJl~{Eru;|4Rzvcwioluuwdje}PRt0|D39Nq* z>xN)kEI_LI4r7M*V0^xpc0#(v>tQNBKQ)mx027bTZ=1+!2gC9C9TQnklG^jTC9-}c zz2^5!WG#UQ@c9)9EGTh0SVIz6?QcR1;q!+lvOXny%|AbpH6Qy5K7Vo|%YsAk`O^|v z$3=^C6Iq#XOTNHEUZ=Z#CZ;oA;3Tr%#hCI1?Gste4B(VIH{|XKvmLJaAPp2#2 z1%o~UOVuqPZUhJcX~)|47j2!}+yZI88_|+4n3_;=`%Lnm1v3*_eS}8WB(mTPKrKpS zy?{LwU+ASdsC(BHt@DL#5?QOr@fLPUWGyALEbN}Z5)*lgRy~Ea7tXWrjOVC6<=gFO ztQJ-!vi?r2MIM@x8np>?jNfRjNKooS8kn0>>9b^w8b_#`S|zd$(bQRz-WP#Kqe=+1 zBqxz&MTk|B$QnkDyrf?u>pUD-_{|Qj%et;XK4Nu9WYyB}+>%a$Wxp34QE_sLAhe(}JK1`e&naW_LC8{h0emF^;V(v32CjS`%N|Fq}t2_CO-%M{0d_ z0w(q} zafF|XppdmAiStZi3V1I6Bo!9`1s*P3rh)`LVAwWv5NdNe^bsGg;~(Ih2dy(REH3=$ ze8SNK>JA4ymq#%_Gb>az3x8h?AbT)KnGpqf;*^lXq)ZnD*{mTbI}od2W_KmnnIPy3 zFUm|;Y8@tlP%E3aK~-(@xUz3rDJ0_28aZf9p}v)C7Cbe=C&SdC3fQGYqhSAXy4m>2 zt;(OHC2d4b4SZ6VMrs&bD0r7fUZs(cG{N25cGNno(2_QkL+g);;?KkBgQiC{^imu| zIe;z@pk{P4<9kbib`gjkkW*a9=Jiy`G_Au=x)Mmf!fZ+2oZ=TR`FWc%l%(Tx8_J>h zNQA#^UVwn;f6}L_KZ8K@fSlfvX7jn^jEl8TT}X1_v6KUd-Z*6Q=dlGz8>d0nYY-%U zIEQsny3*kRlF-di8_J>hyLnXn>M(W+wUz?CP9X7kOM>V-pjIwAhi3C?JX>!v74!f> zX`j=Easbh3Bf?)okW1Z@jC-)tw48E~)62+geks%q&ekUDLLhPwNCwhYt5!<}CP*M= z!3VTtik9f9SAd8aoTbGvErv2pD46;!TbNFB3^jRC#Fm~dPp>n=7B?*fcZKJU(yN>aK9=P=C z_6V`Sh(CEliplclP=HyZjaG ze}MQqQkQigK0}6X3#e;9W0%RVP+fy}iLQNyR=eSd0D%aRe1z!e6)9pl{}reok%}+9 zd@|!RQ^d(A!Vv_Jit6u`y*FBVKPSb%hWhb1MB{-Ohs3(hMGwd?9js(1hd-rceTvH$NVYKtJj@nG;e2KbkNz4Pqs1h_ zS-SIW9;nkbLC0#KQs9ET=NUNC**+m|O+*Q}U6G{X#ZvKcV2nU21yCry{}hUcAS1;M z)Y8&=X%X18?Byo1(O2}KGato=u>#a}vdXPoiQt?JGK1GTv{;1L-(c)V1O^F(^(tI>E0g8W`$UZ@F#O{+7KaDR9L%VPM zUQRurKU6(U&hckzQ-9;{M5ZnRARnpQjEgU)B0Z=CA6a}UkcJ=?Pnym6 zfBZH9Zb72YR$-k%h(G*8zlYOSnEnhxdJuX3LcFaH{n^yk8{qyGspMnq1^7SxVuGX~ zGWn1Sa!`&8Dtm{&>Ufk6OluN4@g)%1fbz+`(2I|PLfoB*3&1@O>2yxhc8!0`G%)$d z!ppC`jL1t#w_71!h*a`2?GxAf#cbFG#tvc*pl$g&znd-&T4B))B9+jU2463k#b9(M z<^oJf{+uj68I18rSXOAi+sZ{d)$aUUOaOl6Nt)jS9B&Wbk(yuW??IY>1TNj$NzJeH zpO>ilmHx{~b9&eH3ougi#j@#9U=Bf&nlF(`(%&e$m6$^Fn<9&a=>t*73y(o! zMW@}5VG}@l-buNie7?5{I0&K=fM}1vdZwe;N)ofV^!(Xp9wJaS*wp|G5w#t;4^dix z==lcaj{A~BeE>{CZBqc6EP$lnK>?&^Gv(ZVvmXITzZgK*3n1zDlK|4wMGoWj`=$|) z^t%_Jy9p@tOCd2^N^sk6-a#PJkG@Y{FKQ$G=x>N~@hqWSsz3Qft>1e9y(566AFYX8 zJSS5wl|r{dxdYCV-^h8v;nrZIsLRoAU@r_8S4vFaad}b_gInKcQS_ zzwarn-!y=x5>V*(wE%7={R;i&`&z$+0L&M)k$y?=QheZsC;2Py=1*?c`aKBH{RAux z;6dBaw&l|2@rAunjtOFV8Gc6bVpf`^AbsMHpoSO(a^#;x2&p$~ndIvL;BT@B_oJx-R*C_dGiE^bK#4joFXNh9n zd@(B^KcMPmppzr4RAXoGR@gA{$9+kt1TZ}R0`K5I4A9~2abIf+Z(oA@Po%PIA_Cu$ z7Wxq=8%2@aUdg7eF5gASornuXy$* z;7*^f9|39jz60ox0FqKsQ6oKvP;Qsc6(b;7%Eq~qZuf;!VPx7P^`hbP;h%b!3RR2Z z^gM@hpZI*MwL)hC-4jWkFScTMUxNs~%uC?P6dZ~nB>(30^>x*GXHS5vc6Wf5rdfb63cz^sGf;7A7PdW;Wf}#1>12N4j9U<;U z)BJvL??fv5YmQ)6QjrhAc#oJ*w-?N@giH@$@j)s()I~7G*7`Cq=)2Ss@$Mxm_eS*I z{wZSq#RcR*$$SlrSBW{i4VZ%@^PgaRNX&D|H3m!O0WiKH<|QF8Yb4X325&it>EntwOY`zr>0cD@M$OA-r4(eSg?lxxfR$3jAl{!Pj}K?1 zpD5OA8g>CI{aW!p(!2{xZdaWj(e0qh4!&Bs7Lgd|QYWcqvC8g$`S z>VqRuVSEZOOTo~pJ}E64KdAm^iPdG}1As~&E| z=M2-HJlgI|uJ{7D&ml>t9c}j_r`-+4N5m9PJK7#b$h1~?tAW&~2$j+HY#{2Qd##J@ z0Lf2>tQ!)}O>p9a@OgfTZI?hY7u?H{N9`Ip(S#f zWEKO^9;xKl4q!fFi)*guz<8FJ59NTlN-{qK<5Q&GSmIa^>XmFMfb=q3y#LJrHyNon zMVviDAwA21bdD`PN0|jlEtM&;R)Hw)`Qfg7u zdAn@!JID@^ynr@BG>RB4*PPg9jE!9Uh<6c+fiL~1j1_Ea!Ri@{fANsE2YCq*>qVek z6jNyS%QYs??nI+E0^C7JGK}TfJ&E}s7L%w2BZOKwd7|~s!$CGr0bAmOe>Pix4@v~ug@G5AsY-IE<@Nr9l~bF zD=MpP`ESQGa~2Fx#nTq+&Q>OE=-D{FTOdfdoIf19X$+6SG4qLK#wW#BL0iFWkLNA zvZqj%Q@Jv?Bg6&N;(OrIhiLK${F_&-bN(zCAI#!OmtlcB?iCxGhrxURNd^-pm&t8l zyn|Hq-Tip4gjTqC!laBR+sV(Oqg`CMEouVhAdA^V?`-Mk2}c z8~xMi;(C%i&Jf4$%c*#p?Y)$W(<%2dpr<2Ag<=9oPg;L@hV5Oh6{5f8vq%6*p*u+| zo~VQIR<^NSEA%ix4lDx`WPhv(-3PHS$ z?TuiF#Z}&ZfW9GMX$l^6^6VwOh8Ig$E`{fbS#hD{V`jLFa>%f(;z!(E(U{W2nHPun zG(;axqYCn991^cZKyaAbsvvUuoha^(IrBW4;k&(Zc_e2wX~h|Ij&|1FUhxhx58Mb+ znOM(udru<|9s>q_#3?=aQ|ZAEf^j2~^x%I>4=%xqMgI(;a8{a`oYAv{a$k9q$B%*G z$XO=IeEdlO>9S#n0MZk3yiD?X*AS2{8&&{RFM#A5 zH6#|#$&@?bH4YGvob_3N{){AiV=FSRBc0?MQ&7lY^sJ@ghrHfaXQKo;>%W2i1W7vU zd;z5Atpq&c_4XwoDbx(m_X0=?-A!Wgga`*AuW>yANul&GzD-0D3gscw5$Pm_9%Q5t zJ)cD4-+R4JXodQPv3w!P>ss=`S0SQ^t$i>HLUORrCI3`DNP|QW3;u9Y0M|Y^NI~-B zkQ1Hkf8m2;xlpw}VEQ2x4C z97+y>@eMIK5GY+mzM7YfcYH|YJ|=JZD86s?iXGbo@Xtev&&tE`z68XS<7G4_u`k7B z5%zGPo3w`l^i%+HSu$AJ$pBFUmPrb`^!3yr2{5iivm+F5d<(CDf+`&KY(S-0ge$8|id$kbBl!MmFOkS^h03!XH${r=s{vK=EE< zaq{Yui`+`DL!Yx4%O>{;KnfN!NqEG9@DZ<}k6i@DzaR|L#-*#Yw1yQ#Avsc}JHdo4 zQ76LACJX~#q!bti*kMwj$9d?0&~=d<^H2`v0g~L6FY@9)N5Fm?jDEyCO1)X+9Y8O~ z=7I4iq>>J#|4lON{1c3Kkcwx_z8YWhNoKnU-drFRUq;NODnJnfNsKV5u@4=B?Zp|0 z>`S~~6z?kFXrPG~KqA~6@Mvs_*HQ9Jn{8$V{S}iyS0kVQlm`mds;)PHGXU*!nxJK3 z4`1ueqp_O~?!`zlxXzNnbu}0dAc-4ts@cH5*Nh;H#IN;wA4S6=$ov4zF(i3Ij;ax4 z=y@UKuJamS5RigQ8myIyB!WyQWO9*C3Nke)WH5S8L*h4hy*|_>qFy=B!Ux1R2-JsM zBy?3?v0}z#q6qnMf60fx%T-Q?4?UwMpCm6=s~|ZSm0x(0T$is<@<&gShvkGUxKYWW zQ{whhh%uA;JrhKiCaTfs4=_!njPV!@Iy^xVA@3TGevU;dqiY^8dl2&`Fcu(*MGYlk zB>IE-hc5}dN!`zfk!Vp{3(OiMRz$B^Nok|a)8l4p2Lu^cZ3;6?)Be@wxHpREi!2gFM7 zdH4c2N+zhTNY&%z;paSW8yQIEw7gTi0x~&PE(1P58zMc_RGeG^*F6g27Lb;=Z9Ns@ zxl9J(V1D zt&ftgJxQ+Lg$_~jZKsl>Jf@JSzv(2o9)KxI9zYm@9pd^4Im#n0it@!L$-`<&=8hL{_{*g#D2RsIj21yswIVC+RIc_aelj~*Y@R*;XkEl4;t(|7v$o9X)G9Hm4v zX2xL%`KrmNODJ)UM<~$>*mNYR$~jV%p2VOeR5?egG7gM$h$&P#N2+oy7;}-ND(6X6 z=pW&`7fGyB^wr`%C=El!*9y8LrMIPIe$NCga~l|%kzDNh0MHgLJPDu-4MbN}#jrRc z9xn8|yK)7&A`Vflpeb=69HRisyL`?^@@*WUm?Xhu$tOC&!x9GbdrH?JI zP*M@3@#+$6`buM{aQ#Tn)g(NUZ4Kz3L7~+yt!! zi~r&_+!td9^(#c51GHBF@3{|~JctePe35{^x{dAxd=jEx0QxCjBZ&=hWwe!mzqyTZ zy2e(xqzodlBC3(ZhIqb1z~gRXfv&L_psoTqcO_0Z0!YtK2$a!{||d_0$*2ge|>HvtYV5yHHb2Ab*NhzwGv@!WDV5!_0&Q6x1 z+V2I?*MyL2CmIWR{GLq0Su>ogNJzCm0iwr+Fz*i7IMDjb2RH25Gn_*tEC=dk5WR%3 z>SSczM&d1&TKgh+2(9%TvMg~-ABdLSju{zK@jQf83y@ih1iz!WY6dc0NbF+f9hANi ziR+p912Xp`aW4Yg7X+Y}C;>aJHumCIXGz%~?>6YxFk1bi;71JpVuR;hNNxZ)Lkhuu zLvUl5fh@rUeVsvn!=U$>^7M>CaI+zJ+7QTQRAzBO-(k>yh@k1d1bvS|&+gaOX=zS+ zf_}iDiw)YVo&He>9ySCmhCsBVbE4p%Hu&K%9?kbA_ZJNQ;|6~zn-@Gm^c#czT3Yc9 zsGqBtHw^x%aB;Br@UfV7-tP_Gli$PV8vLvaL(LDW=d{YcUuDo<=XsllFSve1UPe!P@2uL|TJ1yJcuGcwu*OgW!QEL%)`{>g>^xZ%cRgdriAHC8;e+6iw zxCy<(N3ZhG_X17S5W?U4=pqk&KhQ)SKzPAN7klVKKoj)|gg^V}5)b`tpozK*;kW^> zVWoDR*Pb2-4+~bzU%2|FKBqYyI5(olVb;yctplvR!_m)W-!eLqy5e@_Zm#!6wD(A zbCtnpXS2*R26Nk#dR{S@2Mk7?Ez5ArK&hXef|-YrOw4blU`{reIEFaQS^862N*}~B zCm4)$q+qz*CuXg|1XA;jGh*7(%bYr7Fky|8nYH4JE=sm}q$FS;EhAvgWjlXp;m zc)W>LR)UJ|E(HDkS-L*I(Z+o&(As}94xh3Ug4qvdE#gOkVh0=5v;JMyLcWLV9K8R^ zYQElJKa{nEFB8L?Ua|7+TezqMP=1@4dLqktgrdwq+g}Ci-y_s6K*l+E#}%qN(#7Nm zeHTkSndQ9B5>#EH7@9>8)j0=mLy7aS6uN_S@_QdsFK0PtUW^jg0JQ|vixE~`g3M|p z%9yzjnR+BPBUme|P@V;2^7{x`{4&egPZk#f)diy62&>+Q%=?kJl$lm!4kB>_g0=E{ zV90_o`F#p0`;{!`@5tgcp!j)%FR|1wkm2VZzQfFO$ovF}A0t>RpP$4d2*QHD^r!Z3 zvK(s^gzg=%PZ0f)rQQPF40Kf%!m58m=0qfpN3d3Y9yu0_$?q?bvVWW9)R4tfK%E7m zGg<08$h08Q#LWH3bR)3`!CEO1<`kf@CV2d z9h2V?5+<^p9E{FYF9P)qdc!=HeIu4|AUY90=LC4G{8|8? z0`Ob~#&p$&k!^ABBB+U}DC&i7eFI-y)nw}@77YRz7$NBJ*8 zm{G-h%hp!Z`d0wo5C*g4!9G2{KOe|1gpoK8LK%L7;(KARlxg%P^4mbduUz~xo#b-p z!px>hd7R0soxzu+&MYJW4~9J>#0pd6?T zC|HS5y8)Tl!CmUsNTwe~zm(Ww+XoB%DJe{3uYjg6I|@T!9?X`rH|< z(f)^o^Lr8|fw~_=_aUr06PYKFcw9=&M2@sE`2{g<+9#ZaP}r))K)np2mq;kijvlHM zD0Y*MYIv1XDILFH0>cp~#x3Mn@d9*ZUmNO*cfiN~=lxz+eC&u_abv={i$bs~)`0nH zgd=vvCo^{iz<(qkc10t2)FVh&bRv;L$k-J(C7i_&RJvjxi1rF$hOYSQgi}L8cEt@K z`j`-A=!)AD&ZQ(|S9}RXUqq0u_gT#X#n+0QfTUVOLav$2kbn z72A;LK*-n?g9+#JEX7eV2%?LGkX^A0CG@d3`Z)WNg!2>$*%jA-=qe#>Lyl-n_V|@i zu`l7o(ezbAK-~_a+YnZDB6B|y_em*sVA`m-G~ujcDR$sfAbOIeIF?>U;w34?4&(@m z$?pNA?EML64@`C62wJAOmz_9vpv0Mi}kfu}zMc<#6rNX}BHg^@Ug0+?QUQy45| z@ahU|Q>L)~bR-uAZT4EL{3=jz3Of*{u#)uJ;?-~T5;u7Xny#R3GYM2Q92uC#SoXn;T@OJW{X@3Pg?m-aK{tgm< zkC4%{XC|BjEJf4)F^GO7gf#67P(mL+#z`LL=!Ekn64JDP2cmxyLYg+wG5H-O;ev$o zFC?UCyJuomh9IVW91`-0vXwM#(#GVMy<{&;IP;+}F>QX2sFbB>+I2{5Lax>4s%MdT z1BurWtd-l4BW+B6A7ZILy3R05bptgQ!*Di-qI`CMYvzvw#ToSA253f(5@OkS2M!vN zJ;T=wT26ej4_cR4OS5+^!EH~2e=0NnR7(Cic>B=gya7u82G)P}l_90CfG~C|I#!i_ zZJN?Qd}O76)OFfFfTmIDd%&p^;mAt=nCpCyC8+fGgZfgIIHJ;Z87UJqSIBv+MH94C<^YsOeNa z5QkbfJVy3utWLfxY3`DejlBOF=P&93t*OHkFTKz%w( zL{)t+#Il3?yrZsjGUO9g*MPbTK~%jHiR}og>O)BAP2Y!Ee#~`RScemh0oJ`QF zJyp+vs#r3Fx&@p$7EYUjI+cx>+6x<>Tm%W9H@&bNG<^7U#SfrX`)&i}4zdC=+uvi~ z;MSaFe?7jKpGL%sF~(SEPS4uDzXiZIyJSl(lhwV9Cn403lSU8>^Y4?z`t!OLC} zU%)S|;!wVN(K6(Zk1x0wdFSB0SNhMl7L!`;^%cg=y*}Q|D+0G_gk~ST)I;NDp1dl= z>1_~bvB_jGy{)#&hfs19hgBc&(N=OCuswj4-;6{h5_c(*(y;IvD+z|$#xHn@drZRG zWWOIGVM!=oUjtJ1FrK8BjNyZXww=#^%vlNG8idLV<2d7X(SGzy*^?z8ea)7~ zX7&R+icoet$nAeu;3EJ$K;Y*Id|iRdVM6%`W%8i^pX@n&2KHtEZX!_L8Gl28UkBhz z1b!$F#otump8)tBLgf_@5R7j9S@CdS6Mm_`LVi z4v%1+`ZZATLpU4(q~HSp#9cxqQ)ue2?9s&#dO=Kto{tLh5X$7e)P)Kx0$>G!@?Pp9 z1$F^&0fF*<{IM$E=K=UD0!8Rj1^ym@-y)R1g&O(B^Rq^1aau+&6&m+v;T#~Pb!sj| zg+wUhq(mPyf|egn{_|hCyg4Fp47x}dxP@b=Y?lpumc|+#|3Y=2~SBjvmze>4Q15k;OBp*H#VO744 z)b%-*^~?>RO`$vOe^dtJpu3O^KCukIM-})G01ps&Rt&($6!<0p|4!hH69If&fyY)u zPY8SfZoMNKtwQ!Jgz}s$eNON-v;?MZ<2~fL0P*X6?)3^P$0t1vXi)$vFrd>72;S>t z1F8%_s{!Jt9Cs;5XA&Bn3?|-X-vEktA@Nwiy51D}RC*!WXd6ZBFoo_8YT5-5?`1!x zAgKTk3mjkxRCA$0|1tv_k4ugK&2RGlIb0>4W(1fY@m=sSQ3akxrN;&R0|rrS5c22) zck#~w!LRVvg-dWCmA_~(yVHv-$W{$ZD1y@RpT4p&p9<6BIU4z_8t}~q|3C&j{ZDxx z2>3e26NX>{hIScX{DN=!%}7w?zYHq;HbByT1$i_6#u-XE_v2~`sJam#TE{X2f_1bR z(3${rz5&%45UgXj0i7R!MgXF9T%n*0)^QmqDC)t0^|hwZ-=r7vt>Z>h=+U62LjbXT zKMxnO%D)RR^?cZXy$@dmcJr*ED8!iLQYeiArtp$sz1C2`U*RfWj)BZCL$^f1{1hW= z98z$)nXWVFk7Yokt_?u*L&|qWm?rt@M(NouB&e>36_25E>U99I!8{Laba^m!E=!hQs+aumpqBP_U43I0}--`PsNZgNLci8dofUvF} zz?$tL%(@-O{1yd%gCGxovP@h`-i=h2o$DMxNqP9wu0cP5P9FX|4w+*S^x@C1uojEI z_nK1j@Mj4KiV)=C&w3;_Bgn&_DJ0&9fNOIvWT2RjBG_B)_`pGkx|gC}9m1@;2AOdb z8AT9LS;m!;-$E+u#hK3OC@G?T1T-H)5K%ve#Agvy)Q6C;E&e`&z)~XWArL%(Afo;d ziKh`n)L$X-3j|!7=RgLE`2vEy&5kep1VlXnz?#!Tm~|_Wc?U(_Mi5b1#+8y!BbBuw z*Ll_x^_V1PJ_HfURyuu0oJgzgv;Gh2`Y#HEH!pfZwpx4m-Y=rFiQ14G?`@2>BY? zw{6PD-$$9c$j+K1A>Ryt97K=$gha=LNWPOfU}rt<5xxYX7ln|o<$($u`ODV_><`$9 zKa!BI<-G%VAF5lO;ZTfaDf#5yE+ zikqxNqGkk%Y9zRoPi{nlcOH}VNbuHPvKa~9bxpP*!N+Wp+mPU$&E&aA@Md=M0wj3H zBe@$1-WpH#Ai2D0cHMw8e*kk2hPid5LyS zSjl%lPT7*|X=w?+2hNX~KW}7l&@$i$0On`elW!m)t-;6PWp=YaB~9jByvTs^15kkh zonk;}?P&(IE&%asK%6O?3)~OkYDHKhp3ks z5N4$>7|;Q;iM0bLb-+2av{^kdk2|C$;!2VeSIx7IZXh4kt=r;zG3P7(L&}aa9 z*ML4~K#(hewFqmx#emQOvkmCW288}zWIzuY5c<0UAi9|!D=6r1elnT=o8mWy77u~n zWI${Pb{z<9)>m?SSDHd$5@R#_;Joi9K(mat$M!E2QI+Lhxn|f+h!qm z+U&*h?|z)0`_!k+-Xxiqu<-zX$3Do~cop1m*2>xP?-227=1+0xQvYlrU@y-?Ra}5* zRWHw~WL3>Adpif@B^{Oq?VU?NTbT=5E&-LcGIxE57OM|Kd(B+X9-awWuECV{@XU1~ zTCD#J?V-~^`vPhCzb=&ag_+V^BLkLFO53#M6wvnMmK~%sbhn!`kg0(VD1bs z5GgHl=bpE(9Aski3<$yA2 zAon@8op%it`MKOGMQ+99?^YAZ8Y+gw!vL2AN6u9Pfqa>R zgdaQ5k}un56WPH3H4dCn<@@F!_ZTU8TT&?>v)2mcg~thQld7@+<0pO(DfuY`rM$;p zBb47!oP1)$YMQ$Wl$YD4aa=Yk_2tUfs?Wuo5FaHgu2K~_YL}_(=faHQJw)=QGe!2; zrHbUIhZ3bZK<*{7_;|^#k<8ohA;75+3*v`iGW8FW{&>>!Wih2cJ|{$fyrHju9sBph zdRjc+KU2!}GuD!`RbP%iPW&PpNWK)N$X{d|WGgy5agdh6r&|?y&|MeEbkMD%3LB0= zmx1tH$()F8KxSAnbTG(Vqnh3ax0%QzLq0~W4D-Sa^OT`g{{);*BAafL|EEVOv*VRP z)!FeTseu3U8-y2V1rNgd65pro@Cj)x_I*d1(;!;>z9XI9@b4JRAQZ=E)n5s(k+_Y; z_$06vyUnQzYP-#8mD;ikgmAak_Cd5gaSn^|8DuSXPPn#nOl=(tgm9-8n|Um9b6Jc} zKWnkM;bL>c#pXJuSc-MOMCZikuC>@pv9kjqUy6z8H|$&_gz~Qyt@<-zEs1Zk7@zpo zV&4oG`)0V4DYwOH0?KX5w?WKkTTK2nq*dQ`I*Pe0cBfy=jfHyIjhUf+ zcnK)~$RYQnPx(jt%%Fll+8afbHM1c~Y+<$vZsDp#D5}K{Po7#l3q1(5%*JhiHY2S5 z^=tu(Xa?<1>eq0AfuPw<~APoLQH*ZsyrD&zfmNsQ3!YnY{!Pmn#Wc_yRzb zpbi9CXIPA~PnKwgVFpK-lV{I#LFX!?nX|MQvUPcDAzv;4*@{=dEZeTjW1X`L!K)Zm z&5?wQCsRzFQW&370_&N9jPnd9h^(CQOkF-8-xM&i%+Ir(*KJ>Ty&>n* z)l%On$6KX&ZT6vRm*5>Uce>l5trbORx%T8K_%}SDPZ;`BKXR1~qbr3bPrL3a+lu8J ztVU~2cSBttOZ;s$%y8xLAWLJ-9$4j~N<&kWfd*dyj&K9}5~EPaU*{Dqjkc;TFCu4| z(Ra8+xhFfNSdBVN6MdFvWMt{7YE4)vY1N$>;RcD<`VHHfP_44kv!WG5Bwn{VP|Mj& zFM$p#X4+d5EV(|S0aQ>q6WuV+Chi;(S=I)H;P@&msMO&#p*o@!aH*MzJ|YPYYoHxV zd$v|Y0eWMRuOwp!7ZNSCBp^k z^0Y|vOo-bORtVg4SW*&N))oU25eaDH(5T4$(1zJk1t4-^frtYw+`vU#plLWey-<-{ z1^BhCRz@2Ta;$%M{$!o{X62h)^XL`)2gR7hB~3asVdYv~u?;>Z_}_^hw=+ZB0&JLD z0G-MW%R>uO6q*s#9{h8~bb2G61-n7RwlKncgyi`i#%ns&LNwltnq+(ef^D@iDnP(n zZ&yw-p~ZPLDp&9?6l@KFsWGtP9)R? zf)N{%!CZ)lLyl{7txSnT1F7xXwr;T1sBJWj9hmhcOL@Oz=-vOaSP*z6wIcvG$`=vUooUS z$NaFS|F7O}{Qp+(?BwZ&98goPd_d5Rj5wM+d#3?2zf{qTO488GmnoXjx->NN6^dq* zOhYqYuV_X)($LJGt7t~M)6mR!DVh-*9hMx~(6tz8wgt^BLPWWd+=hs?9KnVQVxr5r zpqg@VV4*0Z^Cj8As22eq)1G94#iy4_ox>ASc54~tA$f<{+Ik0)cOuxk0q{7YeFn_<8U~BpVeykv__s(BgFG5ng2e^|jsnIz5U_4w zbS?tHj7Jsx6+~Y%V8*mXP&0bmfEmA};NK&9)qojiqjFF)(vLKhOfp`s;1Wc%IabNI zUcrp`86ASfKNnsV7i6$TR(cq5?Nd7;WZAS;iOvs1TaV1$OrE`eh+F0G^yT)sSk zG#_q3x`c5;)5{spGjNuTUL2(uw~R<=TjzQ7-Z%_z!Gp3mYXI>UMp|xrq#Q;YS0n*_ zG^M567_CNtNiy=c6VghyXXhXfuK|$Wg(V z--QsGsdYO`P3hO@f#pSiqQIS!m!Fe;Acu^9twich1Sr(g29iEnJcsh)VkUBN7!4sn zAVw@6vkrCyjor#NYd;?3i1e?$NRbTs@JK?c0Rk6ku0Y_Pk+IT;Se8b*ie{C`yq;Eg z3FBupy`1rL2979lRq3Z%^D zT8dbKAxk^W2k!9b7?&V?90A((v=y=s-r- zBVbK=5=3#x_?In`lN#Fd3c-NA5|M%Gmof=fN!cMcBR0WB?WM~nne0&vBQiD^ zuMQW2f$%0^?o&cWY@{J%l8ps(Mvn&=r2K0?QkNlQSr=P5htF9&$qcoYWsNBSX}K_} z%V6|FV%~2pC$7RwKC9gjIUdB$I0tvlbC8A4F{W4o%*Q=x$9i zx(5LVi*4Ckv$6!l7`2v&vT2mCZAPrzLm_D{mZoSR z@<8fKX>n=Q#{lA#$~dlRK8_=wx&VC9ZAjm4;EZXWgd>`A5eOqEeK0Ozd%O3Oxke_grkg-F=pNHMT{(G3I5q+I)*GW7}k_=k_$TMk`dLK$*=%6ms+6=jYk1O z?=kYrr45Y?1}S{#f$I_2c*gYgFeXO3B-utI>_H#}<52;(GrCNYZ3hrtg+L0%x-4&J zbPEDpA&ro(h7^qN5wL&PC~c<523DK2)oaq+z#wP*Y59ylofPV+6(BD|NY{Gsf3T)v z*wl^;Wo&6Rn;cr~1;D9{s1c6MsTgX4V=^6M2mekoY}3>f)s#*i{QJms42ZpnRN?{T zGf$W_G}slRK1pt8M0(G}GH)fc+?Jr+wn({YCqXSI6QI_&BT~*BZlLMwJNS?U_)P?Dfc%gPfU~R%$YgW+mQyz_EgKHe<3u zdIe)LCLED}8CvNW?xBER1q>6&Q}J;~Q84Ls0gf(M z6Sa+x*D@j#Ks{bc4w$*96D6U?F;@X%1x7k6+!Z&01S(}^X;(J#P${DiOR|Fz={;Ky z+fdjovdfYPv?Ips0JuU%=Ss5e0z|tINWpjj0Thh(O43(U@P8lEM{VdIJ%)!rYash{ z@|aY3VFnC9a-D!*G?)>k_F9=~J+(qew=nWaVLxF~Dw#|&NkV9TMvTHkk`#a}lO(}E zOq|+K%VMdJjHh`_rpQP_Vy7}8^e>wXPyih&<|J`k({aY^5tU*U2*yGC748MzUSKaU z?$fkS=Ot9;EsRJaY|~84BaI`0)d?e?RGp;10P#rG1GF>pNikzZ1{c29GwmhD7wW5h zVB}aMu}LPb)l7VniJLT&kaLbZHIqHb#3P!?ktcbc)=cgs6EA3H_9PQjJy_43Wa3rL z%$sC_$Kt@`Pcp$fz{o6^Wa2c5O-ejkPUe7Xq!CfR6gYK?i6VPXjmE#I+Y7K;ocR-o3SUS3ts?%_zouSM!X8c_bf!Mz?a1lqc0~9E@g7Nv9jx!!Ha76wU z=CKk`R_G%oAGE|sDs{9e?Fz=*G%Yv$2MipMe}(G^w{|}$P+tM#>ox7y9sExVbVz}3 zzq(Rc1L8=Zddn8jhApEKbV-B=IQTad?78R~qzlBVrLa5kpi}8dyAL590}xs^MRU@} z@2%BgFM9MwukjTW{5K9XIsiu-9bK$>%?no<{0j~-?}$qeH#*GeNR7Tql~KU>7ENd9 z>X^0GZ^+RbUFOq98XbW3{I(C(u@SkEMi8n!9d<|_bSk~qXfBdbRIcDZj!dPeRUAM_ z$FN`q%aAd34R9F!4_i!pSO_nVGrr41Aoi~eT*SUun4^mEZJN&Z3I(Go`eX~o&$NRo zW;KSI?2V}~H2BazCiMF740<6LkBSgswRzBVYEtU(2vd8|bZS!4o}zF70MVhxIH74- z&OD5?xK}2gMu46cA(AWjY&IBHg&R=@d=eq7v*26$VT%Z$?Dz0fjloy+(=n|4zb^2G zOaez-XCT}361RpPSdB^?#vDoFM}QO+Gw}?bi>Rq=DciNH*}f-t?n;W;6&iLk$U6y>?Fiwf*PDe&5e7b5Mm2O7P_Uhh@6vRf@#C6)Pdsh~Efn`0|691Z z$#;4DcBJq35QzONgN4hJa~pC+k`kZLB=~jLFCbu=-v#%z8v#jv6ZByOB>4@`f}FH< zfEFG=Wj7;WW65X|0dE2m$4@-}UNMZ`3^1nJNHhfW$Ax+eqZ=jJ!RQkTWn{Qh)8zhy zVi+0j#7uXMfb2Rc(ZPtUAt`<(skL;3Y9WTTynujPU5s8tFlCs0Suu=E{YZtbab)?C zYdn<|f+D#Oh({1`?8S)c;Zsj#%gaxiWQN@4supjG`xS;WAFm4W&GGmG7AD7;Hwt_l0f#7zOz%;dtR33($Qggw zr`R4)_=k?#I*$fBs>65+4kd0CMq3!s3^1ZXJnsPHt3uEkK&e_)f8=2rEbxJNMyR(l zdKMwua%ej@#U`24Qocya@^K(uLBKwR(Qgpuc%|4!Gu~Q0NuU;{mypZrEev=dX+=jh zCUP-m7BCE{@GanHid}_Tivt0GdKAp4AHfVoPZr!#HHfrxpmPDf00GDFj97G@jt#ZH z8E-6~@kX@MS%lTdLw}1Wy&63miIoP2qtvWNo`sd5ShH8ax59{x(}Q?IWn)!SxqQqj zob+UiJj-w^gy5&n)2vL}d>fEoK|l#caQ@VZxCtb)rC1xIoB+e*iHcDs;osZA*$mcLJsKTNsfl3seyW*%m*tex5K8 zcgup_#n0jFkWwQUKez$S3~8ZkHFJS_2&^Me_uF#}cuXF=4>72C0R+hL>N^BiKR3dXxWGLT`YL$2! ziIu|lwG`E(ppYI(bitr6WbsSak0Zd}%spk2DF$>UqbCsLWS)s1DLlOm{ATn<1TtrQ zJ_3p}x&T3nGtsMXueiqip7e(m!RR^!DZs=h6&@7$3X+`mLqj-j-wD9o2wdERk4`L` zP=*k>ZIcI=cIo5+CPZ%8BxMMlk;AhC@TdTNt9ES)_AP{T#+FSeLx{0$lgA?&$OBA> z+_Fi^5SGJ!27ng?7?Oj6J&gc4((V}$$`E2~3y+^>AP+Dha?2(uLr9L`L(gIJ3ZU2? z1pYJlzH_WDg*E>Wftc`K2cQ_d7sAvs-Uph~%Rq7#LeM9LD>W@nj5zPY z_(v1z8RR~dcWXF&x78z!JX5d^(C`gk=2=HbT|qf6?%|yo`Q^;r-=JJuK+hBu|;k+J;hJrE}QOy1-F zipkURd3iApEqL9cksJ*&dA-ROn7L)Z8_rc4fU#nT!fHCRGbC-dC*Tnamctfs9ASyxlFv5)pUOh+(df&Pu0I2B2zu9kq^~jI z+7SGgNWW^rYauvK(|KdgyMgBMVf=sXR<+^T$^VIV`@KzE4y?dPjM@J=dlvs86?-4S zZXexaB}e=Bc8`t~*EF@)wHMb7?HQQp>h_`S9ZltB8_(RgFSWU>ub( zZSEZE8t5PD1qi5sqY)spmeMOC@yI2kK5K{^n7mvBN<;v9L ze0r{(uw5rn=;lgXoR{yOh}6O&0C&18ksK_rVsV@KrS1udyn45-$UULZwHw_*AY#t` z`dAF3F5vn63~+StbBwTD?=DoPegR^;JmyBY-8dKA%Hoc@z`0`- z$^5)?Mb?}Oik&Ek+X?4|SvDHA*!hPmNZ>9`*l{E%w)3D}1Qh<4Z%YqRZoXTZunXMc zf(nu(oFbN7;5?-zfj&Kf5|G2W*S2FbBBH#RM`gtlh530dUg>vB3fu)n%pWng43xzM z?tG<;=H5G(C}orjbCAWE;}Hvpuk;`C~#wW?(xXZuW<8<+>;Y1 z{TBdEDso{MMTv1!N`(1K`Q#O#-moAZ*RU*v6``iT0G2O?H>cjUi(_*m9r{u}x-%~x zhv|G~NKA*Lpti`^#;=aCfm`5QFSx`Gm_;n%yl$ZH7$_`|;HwSz1qIg|@Mi_Q*!g6L zzh`^DGezDWWZlBwcCMXg$KnwwzdoN*x-LY^twdF&?i?gzi4p;ESSFC4$r0M@CGE~JgV-R(v0?0Tt| zN9=in104K}X_T~*|+EOKYEWTP7gFe`D6I|GBv%`KK9tECxi zmYskJIEmBUnLx+pMCAY3e3idAk66}_C@4sj^!7>b-69$kzu@=YEAzDX4iEU+MK@iQ zXZL}FbFuB7L-&<%<`lT6GDYge&fP%3PtXpk#SY5EjXXQs7Am+70aQSOVlj?a$5CK@ z9+g190fryLCqLcn#4+v$si4q3Ent6Zz&?e?3LWn~oslCj<6jA^$C-km$AEf>>6hvnCg4XRUX$Y?WLC+no(gZlahmD=y*>afRqA8^h*gne0v|aL<5c78y3qrOHDY#S_jfo1;Y-z?h3+ z%;b8qxX#myI3+ERA(#!BX{S!2%A5A`5(O0%?nz{oaH_~77Se))-sb#=IZZ8`b27(u z9OIk=G>$xLizmuVttHd8Wi=*h8^f-mz@5cAmVg8M>vYDpyA+WP4h`ovG&HdDW4V#Of5!||(+mug{6vvIP~VWj7#*nB z<>^5Ed1Rp8Wd`bqKTzjJ2I{qek%q^>Thoq#r>2a7uODFyyoGv=9|(_uYv=q$1NCsg zB`oCOX@z_&5R#J+`so1*DV{`YHh$`l0q3xMAIl`4IJPg6bG}UZIYnl2`pHbY7hRZF z6iY<<@Vkq2{7!J`R-g+B8fOeMgBNq{5X11(5xQLBnI#2F0MsGs4ck~kk=a;=;J>hd zUG{Pio#LJY4l`+srS2jmR|3tdiX$vzi54!&fa6?Mf)yM{bJiiPwLk(+VT5K*9z%OA zP~C=7anid@V`EXqM9kO~(=&4a8|GxtaXgh#s6C!HQLwG^vdMwPp>osB!-nP#M~ zo?l<6x<7bS-LH4g0-u@N!BQQhr|H~qH_WDjO59~2-L%T6aoK!T<5@sCGw214_Oz!& zk)h-=A@CHbO?c0W^t3Zo7gIGz8r4q1Y2A^wt@yH0%!Eh-?=SJplG9M=Jz5;wDKkgu zdp17!uHuHBJ9jqhq`RvCgIG~wXXCk2Ip(xpK(lRG^*Ee0oPOIah3#N#v9Q9W6~Sk6 z-hivx*H<(jHEZP)W^zFB#RAD`&GM%GVzeYczw zam%;J9&O6{>6e%|xyr)mOIts^IDrO6)=z((GyVGMx`2Jy?Y$26Q`b+NoeI)i+Xv0` zv|bm~Gf#vD%4G$MQIf~aq34Cp@{(9-CW_auZ*3IbiqaM@e{J+t z=sKTF?0`Fq(Z@Q)>_?}gzymqU-gBy+Om?~`afFne$WPlj|KeEFad~+x*qeuS!!d4sqKu3buG%=yDS+pR>(NmRHs5_1jXuzr?X;Jm4vu`5eB zA702M1QP$zXLD{-p_~sb#43i|B69UgwcpVRl+&0$AAWEy7e#sOs0Xhsn%Mc?n)pJv ziJ#5XMBReOpa?hd@X?z1t56ef@tXMSNE1Juv57mSiQhGtrvEBeY zM4`9S@d%3lM+y8Yj>=(*3|`$+5Yq`4RAG)MkH(?6*|fj%Xw5sS3{wcax&xIO-5<41 z_^swxUc_Q<=ebd_n}^EzB;A&5SU6I0rURZMLZA z8Vy_`$FjeInPxne{nQn<5?mq#jp6{q=eD86G}J$-Z%#a?9|iDzcT zvdInXvQReR$hXRItb>+#y!F6&y<1=mnFpOLs2lF}?s1YYHgTa_Xz)DCf&}!Y3!Fpy z*os6w=bOi}bj$kY`#l&AjIWQ|X=C;+o`h#s+Lz_PIm21@4{TN1*QL6=sY?3+w&q^L z)H)iB(u${7ny1&o>6F%(#`CBJJS`Xc1^=gL`OT1)KWw!8z-1vV|C5t`EPr@<)4Y2+ z(|pF5=H1ho=8t{T^c;kzk^c=%^FO2&YMR$(t7#qzo96dnn$de156zs`G=FVT-5E^t zlUJ%~{u+ya5KJ}An_=&2nnzGtUmD3#$MXedJRi-{ivP0l{H>7E{?RDyKlX<#?K(GI zX@92DR-0=2#kbupwwXa$KXUY*)DL518M!C*mCMaNsTZ8gH>D;o)4NhX*Rpz7%G{K= z>vG%NKx^>Fvih@P&%f=AyYN>H(v%*$tJStZ-lh1)gMDCJVPDP-V9$&x?4#ICDIL7p zTcdW2ch!TH$iJ{iR11%av1QQ0-^Nu7ugXA-XyM~m7%jXL%dCYDT&`O9Pc0kK!nJUp z>TlAu;Cp%1!mq{8>d?3uu9cd(Eu@G4ZuIcI5bOa1`;xC4=;5bhcG`CR%T!ZT4{wY8 zWYELauIk~gse1USr-yr|(ZfF(J$yZb9)38j9x!XMt+$8T|F5R~;xO|QVj2e~R44!9 zw;yf2Ydn1>yLM_@C#UQ47fhdjZ)#h=>9zGo)3o(&)7ED)wDqe;YpdS=)xQ3=Y3p6u zE@|t}Out?e?$^WU*XT<7(PL!Y#1j`ThcqrWcgccSZ$lNEvx8#2&w-sfZzu2+Q}3!3 zo7+`hT*{Mm?nik)gttacl)dd{`NjQY#IhMLsDbihgRe&#wJ5P)g_8bhIqJKhRVxPY=u$_URCo5G+0BIp) zvGXsZI0?z8an)l!a_&T*IP>)^JCWppRl?jqcmo*Tprr+=$(Ho)oY;AF@6MgQPR@?2 zCwhB(clP$`ontwy<*i!hM4oRIqbi(He`jBjaKzFVX6t+w7R=peg8JHl8&ajhcm}f- z$m(4&+$_t*c_`?>;gWh?`;(*xfZ`xqfvnoH3kfl3V)c>P<`HvX*UN!p?j^<(%P+jh zbq3^MHRcRfh^~WMicX0+H!bsG9mWn0jX9igPYp+(_JX3cBj)E8dnabDdkN04*cRM8 zqbhh@=nNI$Flq*Xya6xgW^8Yv>n=6KF3t+26cQOJXLyuQ@kK@Hhm&70CwA-gHb*Sc z%7e7TZaJ29tIi%lYLbhd)J}TmfNr@=&ctuI_DLf zH&yZ<1gyi7fAwgRe`bp0xO+ZT@_z`}hb4dTD3ZsQW>E5@0k5#AhmI!d$ES$;hfJa# z3fPB5ee{1s)CU7zVNw6#Xrf*{Mbx)5iTc%meOS~V99h)Z?8uOQcAgHizJ(l(xMk1T z10Dq_aX>tVaOPC}|KuSnPK%4Bjd?Ofnl$$6JaAfQFy%-WRJdp3**f}PJmwOD$ZgU0 z2H|9n8|A_wbItkUMO``;+!{J0khPNG>H4J@}pihk&KaVvR6i%&6Gu z#`=$pJ}=<4RGvPDxel8r^lH&&fgj17s*80gL{Or<0EGNCo`Kk^9ueC zedy}f{zGG;F)mqo_tGga2|R_zyGTyr1o_2HNNOH)R;-LuCjJ8wmht`x_A|l_=Wh8} z7CemkbUBwSp{bPjGI>OY=VW9(x%9^rac)ag*EQ^kr^7?AZy+a_j1jm>)`fa85Y)%~#-SJpwd4 zfR7!E{)A%f^=UUcZ^W$;XFe9>$2o89VF^6<`=KQT`R=0lZd$i|Ju=+1)T zx?GmUbUnbQOd<2R{4Yk^E7+%v6;4i(Gb8v*8-jOp&-7kZ7#yYlPf_7i-DnR)RH)4u zVKdT1zaI}r;W%E)Tw{(Qd(AmgvpoNYZsBcmv$>(eua;xJUr%?;_emV{@!9lWkAio` zGtpVznW%RI!#}R~?Z&esbB>pO$HO~$p7!v*MTV8xMc>E~^t{;_%hRd(x--6UrjDxn z_25&soKIq8a~paapTaOlLNDhi?0X^D-x}EKA=vc>c844X>v7VHGqmhKg^=>)j(y&Jl(=0FTUZlstH4McS$8Ve~WJdMGf% z*K;PGGw=?li+zDS=i*yik*lV=KYd$xkainpt@g6s__4qb>HRD{`Jsa`cQlQK2j-(X zkTtjN;zLzOZzw;_R(Yd+r%_^+?>IffRfk$AM^&ttD^DulyW!@=p|_to{5 zYS@8$YVez6iolp*4-85WvkO$`=s`X8p%%6$_dl^@B52eo6(rcG8>aVD=oIA zt$xqVVizvQn=#t@Qzb4ml?2n8w<1teUGLwi(&?_yJw?i`Hzr+Z_=QGZ#8P$^m6xq? z=A=K4dn;Eho&)jpccFJfAJ2F!^j9A0_0}6Xy%o!Pf2Q&9o_EwZxRoBUky8Tur(vC9 z);%R@+`V;=*LpmXk5-%UY%k{!=&v}#nO&4NRR7Es;W_ZPXPi-->2hNw4xR|+5h5Qn z=8Z)>o?lqtE-!HL_+2buohp2_lU3+A;ofctL#Xe**n}iUC^3?+=O%Q zd|BtFpZb0o58=qE@A}Z8?$dLG%$)kZ01}+~7KaG_S_y<>!bydg%F0&`i=WKI`RftR zd|o__^E-GEnk#W_$BTF`luPO0M_B)M*a#gys=i^akQt#Tm36pP&r98*qiXCcoKIh< z^Xox+etBUI?d04C+;4FP&$s1nlp82i)9Jbw0Pc5VI1**QC!Cym@g51RthrJ?7LQtE zE^v!6iM_>*!)MQxG0$UQuE2TzOFC|9TxY4iH<(R}a~|7YkuNt?#G1Ib!su`lv1N;; zq-;0w6g3L+h+B3U6|g>MR)L&0;ElK}2*Dc=jQOlz0+vJv!o%h)>@ay4I*Usm-jc{l zERe%df1v`%!d|H=E76q3$H}b-HLqCT2I482@`4_4CxQ=-K=Hb?qHZvibNNr*&=pa1 zPaJHjLz`hzkP>gZk%&9WEKtx}Clb}Zg5_ug_^c%c)hhhF(k>1=P>L-VW#R2Pu_nLb zG(yS}0mWA73!&PHdRJ>kJw&NAYSC53LUN_*)3SPVe>&_k8Qkm|*2_Z#;Zb-bupGNz z#hTU&nV&DLl-%CaA_@Z9--2}})VV4~o{DDNp%rPX|d zLRsifl~>1%G;vwb@K92FJ%>Z!3^9Q0M6HyaM@{r#Sn1l7F-OQ8RZuoYBS$614(*KN zs+O1?I=rY|=lfQXH@>{_6gHYH=Wnir0~U>F)3dRE z>k*QmWOLoTrI-bHf|D(8D`3vTONH668m@OKKHt`xX@tZX5|=Csi|T<|$XbbDSrs9O zi{J9A;y>pd#}4nEebqW>2>BQFp$Bn{D$}tpX1R3TORD>O>r={wfp;s>f)D zpVU#lKC>cc9Yv292WsR>1alfS7bNj6XQHT{J>}pr{EU6I>?l>7=T)KS5}}^TGhI|7 zr!Fw0Y%~t0fxFaHXYAAkg2;y2*llyDwrr@484ozGvPgglyc+=_v3a79yxScys2N8Q za-ty5U4?>_4l@|zL=lW2Xm{ZIu?1r<9@Y1c7kHk%K?(#jgoC$|I0V4`ustrb8eE<} zC-1DrYeJ3k>YWRzv!D{LYdJ0%p8#vAN5N9*_ZhI!EZpkli_M^^NL-!Sv&mbD;F0DB z6)g4k02_9A%om>1tFOYdAk~_cD8*d`OxNy)3U^(R+fn4U6uF&6?um5Ry$j?m0BH_h z4rd`6IOdluyg#H)MVI@SXBwKMIaqAr?kBY#I7z3^##G}h!jM4mQ!3m-T82u3748yd8_ZbN;R^KCeJ+>Nx$r27<+!zp(oQ=L5n&t7X$9*EfsZ+k$BL#Kotz3e z8OBWoN?UxjSSBo<7RlWXIy-P@>t!ay5)kjQvwzqLv2_dn*YrW9>~*P3ZUR}I#`**= z;ap;K)bb#LcwLR?!*fB;os_5m&2bpxAmberEX(9wOPpZJg9QAQuGnd6sFd#WI22-* zpQb;`<=k=!??*@b0(!rwf_l%!i?fWg@LCJ+^!J_XEt)EId9qlh_PZHZWeKxZJf^~(&zwF!gu9I=L;HBgUVaPQCF~3Il8e()U9I!B1s;>&I`ci3 zoe?UFRr`)2G(o|d0V!iFjRC`BNM{TNl zYx_>Ct#jxit15X`X-QeCrmuU?MH?Z(So>(_pjA6MIy|Z$ZRsAhS{obNtLmCf+-l-2 zCT{b1P;RSb2B>GvT8dvr?xk2ZB^OP{I#j- zwgxJt)U+*$qT8x!tYr7@iQcAR@P#ze>WS3ozEsaZueGtQwtZ`3hqbADJXMvfvG(-z zrn*N*t?JS4&Wp<0$2-UI2_#{&)#})n>>Tg(#B3by>|!I^I-$>vZKwM6he6QiTuL*uEDPU^R#MY?=qXdLP#RoxIi;WTdT=;@jX9qQaY&@BdGwbj(5IxZdQ zPImWLn=jcoFnmeP_<&~)HJzhfbwfSF9zk6)mE6c4tx>MS6XU5NA>PV{we73ji&l`@ zDNYC7t+ z)uw7TS2Z`+Hm1t0jddGaI{NTIsXnTC0^ejRU6UHO+S+T|w$&y}tu0%tk}`5QFhX5u z%!wLk8QT*YS5OwnQtjR2P2GdTqnEb#@9)NdkpVP3F}kPQj2%j3N_!A|V@r$+nyN!* zTUA|qH+FZ9PmFep{fhytQRVexRCo8JO0AyJ?u%2G43BnMRhz488XJ=Rd;7c4^ALk# zC;P|PU0$E)5XEq)ZQ0tv=7>k|^bL!xYu;AXi27Tr+NzprJ8Ii3k(?Cxv{Ls7s#VKs z+Cly>WRA?n;ofR#AlurQOx0{{YfE+1HnmD`*YtG`4RsH&m0nHlO|7s!{+3xI!*x|#ftXWM@_@{@K{TYKVD$6okP878FeVb0Di=DN_(=Y2|!5Z z)yFSR;j3Rg)>wb<5I^;VabUG~_NO~GXeQOviH449pLpfzO(EVGhUv~$2!}TA#y6)f zg0Sr!ZM9WRslYj@#?TMec=zB)=^7X(JqE-pRY9RTPxBV+t-K8O)|9MkF&?*S0xqe0 z0Io!a@Am$#@jk1m1oi;w_643mG(SE#GTPk>chm&uP7`f}qi*cp+dW{lb=0J);9Uld zdc^b84Rv+zvzm90w)E7f+dxD4i8r`)aoXrqV`3v_g1}7CJ+`NF0Bzm8u^m>~T3r@0 zw21R>ZEM*C!)dB(-b5E!*S=jWk7`XDd8N}K$^;>^$TWj?^>jtgm=3XqLYKCotEj{9 zENDh+%|LhODCekDN6nd53Z{Zje)SKf2D=Bxy5S9AW3Anz{Ud#7c-XGsjathsb-XPT z<0BJdankYSW!6~t9^;hJ-=)U)8||t?>mO3%U`queo!Y*QK3co2r+0XK*s7iwgB@Vn z=^yo`;F12WQ46LN6hqVC`bQw=a2GMiuhsDxs{RaROEt*Ij@o&$2VZzAt(xfSA6Ad$ zPx)kyX;({o9aG&2cgwMns_U>?)g{sBt?h6~jom}Nu-uxe=JHf~O|6z}+lOgd?9)t3 zWF=FA%sXB=_#|CvTGQBxr51n7=n}n-GLtmntD*R@J;OsViHYF}u7384KjIW8l8UN5 z?R2Lws=IqfI|n>3TsKyQh11?{wXhwvTraFGFV}Sobwxt@1k4(ovW@Dnrh;!trXgho z0M{7ULUJQKUTJD$V~25o;HImEu&oZlp4C!0f@_=GWVDF+v~_oOarso=T5A-p>oPbo zZz+bP7VsB(9c@+3?HlO~z1nnXV6}CRbdUFQp;%)ki@K0$v3nlKPxDbj3-ike!s)mmMhdr%9;NKIQ!t9a;Y z_0TX-_+QVH)870hP`f)r>eVrhFHLIi4i66E+k#eI*`D$=lQGU<;36v6ET}vB2Qgn= zI<%*66wAu}ow8EKl-k%*)4=7Q-$^BE(_FS$O{MVb;$CDS9PTf%2XWfL8Vka6$#ces-;^NpsX9JkaY~{WDO}z$2zFBMy!&mQV^!pHknc} zm&wdpyQ9NfEz~wwRX5gJV^}<=dIra>ts`hfcS^o3x%*Pg+!I4|Kiypgd-^&@F|DE* zT#-c#+e*laPdU<*tpe$#*WM67n-rzb~Db} zn$38Zy^X)P5})0%Ln}*eZd=QZ0wXxcI*iw<0j!XQxT=8=Whw;pOLvGyabcD2W9wTs zf(L)gfpHv9k8yyy#0~7ZC@o@Ta!2{A&qtg3y2eIHj{>L{x)Ac7G3T}3v zk(tg@Z&?zl#tqXYgqBF@L zmm<2AG#dleo;4zlL&gK`O?Qj6UA^7b#>T4l&8i3}olb+!MmNvF*_*f5#(az&IhNki zTC~(CyRN3Ls>^BpFRlflMdTV zllC_f#L3 z)jfa}i!O_WHSJ_#%*d}(H?1YvJAF8+)PQA+bTvWy)D_aMs3IN)BMSL5r?!q!lUgJ)4@h7SxoUS)ku*FDNT1 zD=#f6IjdmR;GU6*_4o=qJkP4ZGm#(fn;6`UxCii_k-cZE>MC8sEEg%O@X7b}SYLGk z&^fxNZ#@n!_MX|jYVh=)k)p1Vf>piv>%ynsdsdYdtZG572g|h1RoG**8Dq%zObkid zhgtZ9Jr`NsSaNc<^}N2=9D330A#w7tPx@Y#RCI>o>|vu@cu2JcLkK_R;aRkVWxqQwO^Uoq}Vnk+yx+Sp2t+;~)(uLL!W14l+3CaA4nlDUP@XMKZG@!YQ0N zh#u+ii}M6W4$HA48ttZs7tPT}Vm9pF%@vR?>sx9Bvvp|D+e657hM^Z-Rq4`+2Y&6H zdv*ClHHQ6g5(>l;lXD}F@vs}mX{fZaZXp0eUI z=NHf#4=~hQw+}!vY0VxUY4TvQX5%I-`EedEKE>SD;93lec$v2;G7nVy@YQ@Q67Z`B z%Qekd=54NShupH?9p`^fz}cZ3jq34mQ|C};ujp2}%i;|l0hT0wXUfu%JJt@Y3%JEC z4SPoK=o+2^XN_|5>e(ROM z;j!_E{ppI$I6B>x5bsIBqBK+Nesoo0%wG;P%q8EgV+ z8Iet(05FHs7O@ZS=k`uqPt+glaZkq%-)OXno?%X;#`WHo?ETJ2;ha#LyS<~W4jScA zdsAuTj!FAwY_yWP22$?qOYi2PIb__nv8}{v!f&bkmRb8!!*UEt5z$dC+cA{UT{uLL z?m~|%FMlbl{saGdV~^fatQojyb^5BRrhAXHKePx6FR0C~#T)a=+T0QH%r$)>%~1pq zu@?$94Bk+d`=?P`hTKr4tjE|9W<{e7YqlD_8#i8UdfMj=1mEhoLGmn!z|c8VO>Nya z9-5<;wW*G_O{tm|Oe64dX7i#a_Wn`5tctMI>Kyd=>CH(TTJW~t*huG)E;0P6DA)ql zaSIrnM*Y8(-3gqHRUj9o$+vWDzS_F=}pj?SMQp})QL7xgY0F6csl@c8w!hxB=$rVCjy-d-w_NJTEk0ca0*8-*6G?ZiQqPL@ zlqTuexurFDnb2+HlCFt*F;5m^9hks`)0K|-SfeQ$sH97)oF>QA_;*p1v9l$%SAV^S zmuOg7ef1(qb9eJbHk&#{+x9O}I(Tc}wNA3x*Fj;9%Q7up3?75qt#Fdd%Cdv9FWqTc zy=GUr*ccc*J!rRgHUrm5*^CG0wL27%B`9!$-zj)5Ei+2*CMB%MZo^Z%eSGI68y~&s zUZX)|U>UYI%(VaiI!CDAG|C-NchqZhcH6?}vG%#F3~+6^4OKX9lAQ$ z%Z<^4bUFp5mDDd4tRK^;Tw5lDl$Q>c+q=|qZP%V;%3Y7{NjEQCbC7#GdQ;n;I%(e; zw}_VOc5b7t=UMhOQ+oQy8YR~yOO&i{uTP34?NL#}Y^$L+3lgo8?7!r&p;W@*jgAm| zWY;yh1a5DHdG$3T*lGX(HR($WD5H#a`7ma=l-!D6=1wB~;fZPGf3z z?cB>AKi7y#bi2@QY7*@LbeglE+T}^^Yszi2j_#&`R!)4uG|^6lQy!@ixKEd`Iny)m ze?O!mRZGe#gf8QQ+d0nxotvy zdv2mrEYUt)PoD!5F?fy9$io#8@)!&^2Z9wi-bi$Gq1TtncxItn3}m|LVvuMWuwm)f zzH7W`s_*FXUMs6FyLWfGu0y2L*X^#|4lQY!o!T98ZHrk#f}1uvbsrYiUUxxn*YuTrUpmBTL2Q z_F3TJrNF0>!Lm}pPo;yO$^<{jbwS#e3w|nZq8imm*kRiZq#W)$OS<(X>4Qpv8DwWb z^})UMj-RV8d!MFqR$<3q9@0|-CnENdoj}XT8ufHNmA<$SCFMp|m$v=n=A7N3Mnwl_ zk1ky-bKcYU8jT}l!I7DwJ9fR2s_Ry8KgrCJb5T7oh|!y8Ne+HwcFBz$xqwuRHwxM# zG5cSV11kIUgB=ljX@YxUgWRGOSo_@rnY!@VMbmpXS6eS3B8Cl~bo>zi$+m6lN7`*nWZ!;)IiIjF z>nUHIl02UneA-9*n7A9VHUw^{Mn=m6l(J&FD}(M7*j|*D;j!1HMcFKKv&}B2iLbq~ z3zhbAQ%!bfvUsyQi|ZR(!su}o2Td$>f$NfbR4E&K-G4Ta{ikeD%FC5Zxo2UQ;kNFm zH0h}r>wcZSuBWkjb3)JQWP$H1Hv#n?g}sa8y+)h(+K=0vdJnerIY|5XB_B!}IZO?% zrZV%(w`Kdr(MiJNk@l0`ywOu1cQ+&WK(0H$vU{lpjpO7xp{ZU|E~9jemqVjiWA~AX zo=dP#tafo*8og+ymnws2If0ExRKrHiYSos@3DHrq(daApJvzGUuCj}f4F?ah$V%ZZ zzqkVoSy=S|gQcIHzPpev=j?Lc5pU#1h}>RkDr-xv7}5^`U<&@Gr zO4Fc$&LcVQOSu%eZ!pwX2^z zeqN^mr$K>@cpbTFYPaILc>U|VTA%Edm4_?qcFNl;sKFx-onP*BNp_Yj6M-|se;sG( z!ykIPgoVf+yC!TxWW4S5AsI$i0+~j#yWxha?0EwRNcOgqJ`ARP=MK1jWudP-xn-{+ z+n~s(hIM4AiLBA6ne2Gvp~yt%JEm5R8Wq9|mMBx9guXafp7SYDv}7UgT`7HIv%a?b zANiB71`P{Klh$O`LjLp}uMuI%rt3?PwO-&auYAZB2*ld*&(@0wOW!IiS(0wVN#lsH zR3UGNCGAF}v`O5}A`;sbxzbJ@nG7?*r}vI+i)-nRX0UdCBE-orC4uAeeY(oG%Sz@NTT zzIs^RajD0rnvim0ib=^QC!6A*DzzfQiieB{4a-~onI!df82)GdPOiR=L*Oscc0cF1 zl;cxONIo&yB>!aF?Sdh1hKA*oZifddiaX_BL|7U(RU*Q&h13rXOB3--lIb(o)=8Ll ziKmag_r7{qws9%OC!dgPqJNT(Yi216{N;7?(@ulL(>z>W0-Sh$ByJNfjb&br^-j0B z(&m3mhj#ulzA#yGw2BCKFsSSpFNPT)`Hk7w8;!rFzj36lX$T<^wz*X!!7 zcjCY6z5f4FFY)j%k?z@LT8BS8q?(RE;{1Xn`H^<~66dES$q)Vil@FITfxmEhgLU<= z@Uf|qE=fs-AzmtbreTu#ukUwf9FiP2zqQk@Cc`)=L~GlQ{AGIU+IJ!E7N7L&K8E zx|uj1pC}*a(x#x41^#B*^*qVC7ZG;D7qUGxESq#H$@uHA1=gv=<5E6R`Tyv5!7lVW zao){WyWK0;?LYEw+wR(YwUBDALb#L#{tn59;IiE=q)BL4D%t8Joj%)a9ovnTA@%;< zjcPJ+tB3t-J6AlSgfwj5Ngj$Yz5?f4NQu(DI25?2~CwTS!Q1r-?RQ~zUO?| zeK~!(e0gL#djAp^B{RSOlQ=K0H%=VNi{9-U&4Xoref4{yKfk=QURK>if60uFt9C{A znIZa4`$T_!d9Qua`pL};lGplq zCHd$6QU*R){U)`ieQHxpGTL7E&mof6_Kmf`{-q9lu=-`}lJ@@@Q(rP#JyQOKNM74l zlYj0{r$)k`U)GwW?bDc7C9UmsIS!G$wl66E+@CB6iT?a1t*3oj(@FB${+j#?k-WD5 zQvSKWw1E#+ze(q5pUw=HjJ7`||3W0M?T^Sm_m?j4!Rj{|Jnb`>$&%6bI?N%G*Y-Lu z-CqW?j8Ef4pLv7G;WwE)-OFU&v-ONQD~3p3yQjnE{xStVSp6o8r+pT4Kr%W!{p4SW zGJr3 z(e7xIo$@b4@;d#t1)J#Fn(*g0xjpT3n_6fsVD50@@@|(h*_Jz%x zwAW+E5Xo!%e!>11_OvhRXL zKcbcGU$MXkt6#E7m$wpT8|`mMjS$Ie`-{O=8YTSsO({?NQf5Ex^%ylo^4j81ut}-l zC;i|zWjyW6nBz&>m+`bO<7r>c)4rU!K>H<9GsKj$?I#6Wl?#5-4}SBCr~NDD2JII} zK1A|5{JO5XzgGeutbS9`)4rm4K>KM@BSiAreps+o#o#CX;5U^$?JFC3U4vcUUHi(O z_LV*DtJ-`*Vbz3>w)@pQ-LGcS(fx2abOG0Mz#Ti~bR|t{3w*OK-yT96j4_3da>uF!t)eqLH z8~mgn{BpFCw14$I`39bR1KYhy!CDQ1pY(&@G_v`G!bS-nZN9OmdyQ@V;=x*tgP-(+ z-$Z-rM|=7o?WrH*sUKtOmk!p734YQKe%W#-9slOGe!*a^ge|+P-@;SBg{@ycSieQ^ zldJ!#r@kKDCH(nKD^I?asl@y~BGp19uk(9%ut~z6MT`8VwWob+Q-}6${b+65w+ps! z9sHyp{HBekeH+u9_Il10B6;oqu;B9A#?!u?r+quqjrK*PW{7EL+vg3oY8U*ZAN;0+ zr+o)Ai1s>7LnN>LPgp)WXtUs-UykIG&c9eQf%b0vV{QA`V2gxLTI4sKJ?%T2Ikb1% zht9TrT(EuT;3wBU&eJ~5tfc+hQXxdPOgj8af~^v|yz>{C-$uIQe7kToFJo&|*{9;dji6@`1C)0|4 zv(%Gc>S@2slMh_|an<~0xhKEe(|&~~zrvGW>B+D3u)Hpi00^UcX5@mzC`SUZzm{{7;KWhCrhefd9wSz%HV z>mf)6Gtp!wcKw@Uo+H*q+Pwmv_+?LA(G%D5#7#YMtS9c_iHCXOiNtRBmYS(a;(2C% zl6Z+(nIv9hHW0hh+X|bCRdXDFjF*1Jk(SocKw@bY7#3M%tF&JNxZLQSx6# zIp6=r)Bdt2{>2kN_QYxASXsMwP5xz+^Ywhh*=$_jlq1&R$!HpwD2esYEf3>OlO*vt z^BVOlNu7+QvFS*x>r+NKf9_6P&BigNKXDNoH#Z}aH&09(0 z)n=)u{;nkXm1e)hI{$P_n$g6YQ=adZ1%+a zlGLANj(PHziCzEtnVZCJ_(z$$N#dF2F|q5v91rniZC?2qi~snoE`2yK={JD$+MhMk z2QuyBX-U41koe~W0uLX`L%;v|e7NTsGyOF#{h`vpGwAM_Gw+X8P^o_6pZKKA4h{9a z->RTW;M>B4p5H|MS7~67625+#wDZA7TxsckH%Wq|zbZz7%O-xblBWw3J-jSaJK=f% zzy!1-<{r|N$ISGRKo`g(a0vmAZ@LU$&yYYK`%0)LK|(bN_#%s|MjP#9;QJU!p1PAK z#q?`{^0QR-`zP-4$izQ(C7qGHJY>c|{p-tBu0MgV2uh^S{_&#_E|(+-d~wmG62@Ex zoF^mgv#LpcX;mIim2ZH#M^yDOHajtcze^i<3^MpgwSM2+{>ngc`!sxUd7f0Cc(cFW zY9E73m>E6XZxG5OjtOOfCtG!d<+BW!8~I?Lb$QcYbZZd!K7P}rzaNz7oBHy_2s`9_ zWlO&&k?5nH+JUFux-Tl{ZjQ!7NEdTu-%A~(el=vyugfExs#IRqh zN$_F114t`@T&{-|`_wZ{E6aS0>zxtt+4s=WU z>l!Bc3X@xP|LbQow2%7yto&S#YiB$3-``;j)V1GGptgOES`&e7S)!kmN<21h*$pn` z_BW#KRPFa)KLcl<5qDqz(r+Njv(dVC@zu59lgPnueg}HQ)=JhA-CPAq-IrNp4Up+4 zn^c}n4rGH{IO#?3H*y2t=hTgf{TW^z3i;-Qd;TXx9t6lMpF`#NprsrUR2knmRYu|s9EKCnc2DvPh*#h{ zxCQO-OTELyI{!lD5rywmnZDO4x8ou8GRyqd^6aV%UqMyMOH;1TxrE#_Mwb~auYlDt zFn?l*+o{sM!1(m0d?w}dRq4+v%HN|rmHHp^)Am=oSA}|GPzJ?>)?)b*UnVY#)i9ST z?O#GW{1VqBZjK$$PJhXdAhy$8V!g_z-Ldmg+)jK5kK;wO(^=}>Cw_`)n66nd4dr(E zl={Vq?Rp?_EU}%A67MEHh2No_Z<4PG__ z>>=HK_Uf0`+e?3r;2FGzcknNi_ZQjj2gXyM9n$U;M_sNou8lF+4&PAYeP#kKz)iRp zPvA9tgkd^<(moHC#oDO%WHqn%R@Le{+@hTyJ$$B}#yx#<^~SkLl?S2zSAH(_4tVOd zp?nb9<>&v>oj~3$2eMsmrR{pNTu9v76Sw>yabSA3(di-6Sw_t|0PS>@^4Y{oa4mj- zyYWjrkJs@oKE+fzJ*B&uF&y<7k$XEv!rWVu!4!Ln`YFrV3}4wv;u9U=QGb)?T6 zQb+mB5p}fe_f&ac?1VbjXHKc(eCDh=-e+#8GV$)H6J`BYC&_vw*Ze}p8Iww#EX#>H z#b?s1Q)POP&#LoFrcWNU+bxO9YCO&7_IILPZge_oxjcYo>&y2e3TiyV=eEZ)*vE(0vCE6hZ@YZR@?@6_nTU3| z5Wke^mH0R+mrlQhZoY*q_L*v$mz6J4mE|Or=4HI?e3$XgtFesVOR9`tX{{&SEw8ST zAtUp>$>sJ%CzU{uO54AOxb}2M3?J}y;pKw*CZ+=y#uU$T*z3q>**Zq;U zv$3p4YUpZ~H<@W2G#2~e1YCe`tE*%^#Z9;cx8Y9I{hThhcD<1P)Yo$9eoOLpJ1E_2 zr}bpHw!~>JvXVZG?7=MZLYWHM6m`BUs zVY*AXb~j`_>z~vwulWtEcN=~7c~u=hyWWX*{S{-i-6pyt?d`HCs&iDJDYuO zyDs(HX-qpcPTOx`eoFgD%}amn^pNh@=^*_dpykrN5vp`=k}B<|pxO-kX^lSFl zXN;Tw=Z#x0Iv9B>O6ti>vD1H-&pg$*m3vM)bcIZJT`pyP)a_)*Ww)HFEs0yB9v^9W zEXtvqjpMO5%BpM2bvvu|Wfy3bU7d9tP8W51v_O@O@Of2kS=;Tb4Br!tWw>7o5tqsG zs4i!JEc4Uuk7a-Qj+BS&X8$Yak-EJM*~9*KFZ*BFKimE86!yEay*r}ymU#BJvY)lv zQyIvMnwS0m6;<~4*Hqcg-cUdBnY*G+$57e7hQ`SG4CciAsP`~6Um7c6b&OVJp=qPa zc0QhX0Pz%@i;GlQsaD}8+>UyWQS(Rf6kfz@cpJl$Nqw0QFRM%C{DgRkTE&ciPo}%NU-n4x7!_1y zcw4I3jcKRKayL!QD9^R4GCxzuwp!;y8dc_7M$CzNPe;r3UXISUN~+YaNv!v9G;XbS zk?Di+>OtAAsE2&!13ab5dU+8urjl6NS5c*XU5r&_^f;u- z^f{u+boo-1>32ev>2pez>3UX`>2pz)>2*bw>3>a?<^6`*QKqvh^YM-<^YOmgO{TN@ zsZ3{8_FKv1IY7OBlS-BOoJN)ToL-gr9Ikek{hTWMm4d2l|Er5S9<^1Ot_`szw!wH+ zruQIK>W?9wM!Zec>7dGV`x?KaJY2S^p@-%8LX~`3tfb1utfnf{wVf*6pP)+jW~(w> zOYm)c5BI9Fz8%4@@giQwJNOrd$a9j~E)+9kc~zFvSaqe(%tU>zQs>7hRi^J*Ri^Jn zRp*~7)A^bz^Yw=MnanR$jsu>kGN1HBQs-YXRpv)3Rpw(FRpwuMRpxVMRo2UFsw@{d zRaq~?DbK6Q`dCnv^O7Q}EN{hC+4z@Mhsg1YD$8Rfb+8;i%l;?iRq3DF#wYhBomucX zwY5*a?IXVKjt8}#e%nK>fDtIO#+J*hv$n&|7>}}xwfR9f0>|MLlv!fy%}0BjBK=)O z{0_c{+wf!DhllY?lwGv#?pgc}ui;I+gMZ)?43Sx<aXqXn#{+I@IGMEe}UMF4DLZMqq7hfE{r# z&cb(aCmz9bcoQFE8aaN^{ymR+yrXedY=?dDJNyGv=<$Tq&x-l6IqGqc<_F*eoR4d9 zJ08X}cpd-16tbbT{lolN7Mo)i9E6i`5pKlYcnrV8-%y`z(f(yXJk*)Z-e> z55!5R&zNZW2Hb^T;w8L||6qDOj*xb_@eEd${kN9a$JekM4#r9NAs)hS@O%6n^@LEn zn+|iK9uH`Fd+dXwaTcz`_i;a-#H;u_`gH#*-OYd{umujpiTDnFf?wff{0;5?T)J!b zzoOmGiuHAWE4IdIxCHm$HB2U7C)fH}up-vO?l=^u;$qy0yYLIVfWP2ld?w8GF9#OJ zidYX{!|pf~r{ZGVh`aCt{(?_1Z93QATv!YvuqDRf0(=K|;t@QHH}DarO7HrU4Qpdd zjKe`V2{+(Bm`)CmbiTZR#jq+i#)z0x9m~qOj&`pmHpk950O#X}_$i*o6q#Ii zUdJAI9G_yc%&y)um=6nMNvwuV@l|Y#oiH9J;53|r@8AwRjHmG$-op?%@YLy%5er~h zjKUa<#lbiU-@>)H9lyZy_%lAjlv!Q>vtm9hjWsYD+hcDWiPLc@Zo*x76wl!ee26KY zb;FSb^I|Eij!m#V_QBCO8`t4>{1i{&4|o?dWOMz`k7Y0tn_>ri1Lxx!+=d778~hdT z;a`|ePB?V_=fa{`3F~1i?23bMBF@J(xD5~CcX$nN;vM`0pP)ax8?MZl8;fIAY>2O8 zJPySvxDemL9e5Z|<2B5j!}Y%qmd9Gy96Mn@9E-DYC2qk_@Hl>l_b?=<>u&}O$Kn`; zG1w8`z|lApm*XxxgFoVZ^gr+Vn-Ozk39N@rum!%39kDC+!u~i6=i?gOh6nL$yoz`5 zA516LKy-P{i>0tSHolly2a2Bq>&A1nj z;YIufA7hqq#urOrb&SS%9EwwL5q^lD;%WR5A7Jv_u76oDAC|!=Y=)h2BEE@pa3L$LcS-;cJOq zZ~%_SxwslX!2Ng$Fuko{(;H!x#7r+ zFJeiIz{c1Xd*X1MhKq3neuPKxTl@)g=6C%sgtf3acEWx*7FXgH`~;8VclZxxDd753 z7$dL+4#4p^7gys4cmOZrFZdUxF6jD`4GUmdtcmeB58uYEcmPl0Rr~{!7h=BQi&zpP zurap9o;Vz*;bPo?AK?-F7JtGg_{>XgII?3QtccaH1$M!KI0@(BJNO=M!;f)49>7Vm*8fyW>!tii>e0?#6HM2fT;=BCbD~@FlE@k=PNtVlV8ELvb`t#5Zvc zF2v=y1~=mSxC8g#LHr!Q!qa#WZ{Q!QJTLH=ICW8pPK3|kvmGQ`=9+l@ERJk8inDSRtxnEF)xW3xiXPOYVRpmZI zEb$v^tXwxD9iirm*F-mA(*;e*5{Rk`nQo%p`G*Jn}}6J@xc zRVT=NAbv@e`w+#5E33ohJ`{0db%f6}Bkrhnll#xa15~-#J(PH|y4Yu?6E9Jh$owGQ ztjc|vL&RUJa$n_J;vZGHZ+DaUkt!Ft|0aH>xWtp?zKkm4lS>`yGcOX$>u2qAW@U-x zbrAM`P#xkHs@xB1P25c#?K8cIhpS`cej4#ib*#_KBVMh_Mg4b(x2yYnW*712s@#V< zPJB_7`%YJhe^ceYRq7I=41ZSjwlO(~3#zw_DN0;Hy=hD};!fBP=i)Xzj=y5clCD2F zF%moC1YC~?@B-e)7fQMAl*TqV2$$jk{2rfR?$WM(1a`(zxCT$)1I$v!wJU~oFb>Dy zO8f-B!=LdH`pQc8w#)B{VphzF;rNm&^QV;B(wK5sQElZjQN;2pVY@wQrAqyd>Q-aA z;7C>KkHu+}&&K(rTlqSh9@^x#TwWYTVNYi+I3e~ z8Pf~)uSr}N8&Uomaa(+Y@{#INW5(h{^0UYbZDc?{0DITT#4Dorq zO!+Uwzu|q#^?_5JKFKh(D&w7n_&I!m@*?VVc^(K$ldp>nu`PDQI91vWR^|9{B=JIg z7x$7sM0{G6{zhr?Cr z-dLQ73&=0QwUlqdEx4cjr}!1+r&W2_;5y|u@jm&#@F}LN;>IHrKCjAfy@&;{Jo!pk zlk)o57~7NYguN*5ugY*upnM9>CBF!l;b!t%aS!DO@iRP2{vuwd{1)CpUsX4r$uXTO zOIVtG1+0RN$T!8;Des6~a1i-nIDztMI1^WrUxS+||4^0TI!yUdJVpLI zeuux2zlVQPp0k=8&#Kq~$Kx9O6o16z5w2ZctbrYIEUv}__&w@_x4PV?R_7X%7Bi@_ z-W0&XSX`C*m58fh6y;5bn_(MOx*LmeIGFr!oJjebI15*iUyGY@EAGa9cvO}CoxoH0 zBl(~49_4@H-xyZIjdw=OsY>_qV16t|z9P!k_uX~|n_x3+t4en|VOJbNegsaUd^*m? z)#TUV`;_m%UHB#W6L=0U;dQ);_f;9Lzwjxhi*)0Y37=P`-iufO%agB!H7T!;jj=uX zPS_LQ!11bde=5$v73AN>4U`|iA2C&wYhM@}U~im*AL3bjq{{M~yrw9}(5W%4D$D<~ zs^niJE`UWSFHc+vBPee`+yt9b-hsF?cBgzG@lYH^`8490IFIs`#A|Q^<=crr#!o2! zg7_;uMfnxtYxpze4~YN7)V197NQ)U&nO^y@Jl4au*cT__Vtfw|;2Hc$mFaz7m1ECG z_(YZYk)pQCXH+H5ia97RKwKD$Q(lR<8b(pxgt!^DqP#P4H|$0EP~wp|j`Eqrb8#W% zYlzq5dz61nycZ8r{uS{zc$V^O#5eF)%Ks$(8`IWt( zJgCZiIiboi*eN`#%6#~q{B7d9_>gjcT~{w9rctGP*@$yuZpw=im%y@=S0}EC^(b#a z{2I2SJf65W_E%+p{iZ78u}r-w&;1i0z)ScDGu3nTi()Noi-T|$zKfsYkC>{y>rOb9 z$JekYPQbOQOsCCiA!D}U4ppZ6e)7kNPvRNMzbC$qzfk^=_%X`Qb=mGG!)I0Lehv&* zWxC~4Wq3+ZUIr^rUX!>kHlqAB;?Ovk%Wh|{q_iJN2?5|4w zF{&JkO~5Itbbl`S6~u4jddfc}{s{L{ew6q)ena_X;vet^<@bpn;oqtZkFSw4RF&b( zs>*O>#}_CsOk500tJ1zaHpcEa9+%@T{09HPu*R-C`LQOxihXdFD#N!(%`59Ou2N-q zH<8~-yc_pZevJ4eo>8Sc=kaICf5p3$`Eh+m$ETl^ROOdZiTmx%U z9z)y`yJ8P~LzV82ARdELRq5X>oQG@4Z@_Joe~f$aEArpqCCY!mpYRd+CzwLc#k9X^ zFg@m0WqkAD%UBZSrOvipJ#2*S$j4$&%KPCUoJ{^re2em>xDr1gza2lpgLp zjH{O%^*cJ+y{yF9u`m|H@~ZT&3RXvXPq*!F3v5q$7wnG1$dAG)l+VPuxQ6_C+)DXJ zxCf7u{~9mgWxT7(@IJyPn6{Z4-VB&Sm3p}`AC@Iw0V64|iw&_Y`HmQmy>YB6-Jgta z;xh89@Eywc;SZRixockt>!>onqSYz#JyvX`%KYzzeQ_*K#A&LuUqHMBS5p2i@%y-4 zmHvE;pHqGezoz^iW^Uo?m%%#tIu28%|KrtcGF@;!<*QT~kF~gw@?CgHZ726P@Jm(d zpCNyp@|$>%@?RrZaR=_gFYyGPR%N(;#=kMctFAmhmQ!WCs;P2L8i}=48INf4ZHPNy7s~q*55!Tb zbY}ui!Nug4<9fH30NRIcM-0rDk? z%U}cSjk9qZeyZM*;UoSTeXqOj=T@bEFR5~l@iLZFW&TwnUz@l-Hc_R1ADo5n<4OD- zGqiE_OJEc1gR}5`Jc++y+P1EJ5v+&Za5BDwhg2D_V`_RCe>|vGDf(p_ zsO{6KQa=-BqdYHhK`cu7E5wzt4&~A6LfM~SEAp}AdlUD=!IY0Do{ZBeUqrkNS5v;3 zcq{It{1EXGJf_O<{EVUPU0ehkVQ-v++we3#!sj};_7(9}?52)0rZ@38T!1_94F04_ z{a=a0I=b!_$EMg1-@={vHQvH>v9!m!7>g6|ZB^#?yXpjE-p3DBng5>nL~F%AclAC40#e-mfnD)MV_Gj7E_stm_LRj#L;qWmmg z#UJrD-o?lG52lK9c6FRQr$Ky-_>3yg(Oswf9_4?jvc2(l7iFKE5}#3JImn_)J|E?Uuq5S? z#I>;rUSgYQwkkN6NCqx>@Q4|t36r^F%gZhW3mW%zRvSH{^i z=s?7_Q3n$%{p?1XjQ*SX-6hX^7F-k$e~Ijs0*q zj>f5~bY~XM!?ol$;8xs$`|uDRSEW0r@GSmJ{#X11|3ZIXH{K~RgDTy57IR<`^2PBL ztcl6ZI2^3X^d62Aa0<>#fddQfc@E2A3 z|A08fK#9A`?-i+1FRLo;UQoZ3>jqdrm3Ae_M_?239aQ| zqvZMlwo+xhW62Mqd<2fcIjYoq3)fS=8Mop-Jd8*2f-3DV;|;upf2cBCPf&j#TH_3= zw9A4oP@WG9VFmJ4ur}olF&aCP?}ELtAC6F^zvFNcE+oGcS5v+RPpL9}FR3z5uHuiX z4F7NB{X<}kE7)$vGoTtis zS*D(n-<8C*s`PIQ`F(f-uc%W0cU8X6_K-N$a2ID*C7+MDFmWZ~+QhFCcOxE3Jeqh4 z&cP+P1~;oR{5w_I7w*P=sto^8^50Q@4R7F|s?_@%(~WT5$%4;eek_8;F+!F0QP>cp zv9&70)d4%>K=MOzJmphy2Cg9gHoiysHr$DylRt)M@H}2qWjJo)ZTyG4f213aG?*T< ztI{qU^I{qDuV7WmU&TJE%$FgmoLh{*F{(_jY2=sS`{Z}vF8orJ`X}%Q%74aR@hN%T zHfjAVs`NJpzJSHam&VE%f%Q~r*94nkXY$>!H{~;MGk%5FRT=-^R5{1KhYwX5KHq4U z&w%+=saFJxV}vU8qp&6AZLkCOB|i|SP(Bmq;u`Yn@dMnB`&1c@!*~=gkiU#SQl4y# ztN#L4z$U7Ue=9Xse%}^5s4_nB1_*2h)#r z-OG&6V{R<0%J7!JGFX#*U2IHwFPwsFaJMSs|EVh1%s$6ss*KOKA7Xgwt@oD*a!AEAV~tAL1^`&*KA3Ki;)3jMY_{ z4)xSj#x%l~l($!R%X8q^Rh9AWOMWcnb5;3X%Oc{9#5;)h;Zark_l>&Km~ZidD&75& z`~%8UOptQ<{!JQH>OW6hh`0iAP2v{B9f|u9k0PE$yp(t?ZpNLsACKZ`RfhXJ^`bG~ z<8@Vr`wn?C(bdbKO1&(Yi}K>crLi*Qjfi{V7@Uf0@IBmt2UHoZN{o`*O;7N)!$aYd{~d41x>*o^Y_#GSAkMbkd+49) zx|b5usM7zem>pkKrT@iL>3=CKPkAJ9ZEQgKtHiHk2UWTskG*lQD%~HiO7|z@bjlYI zFT>T8ZzkS~J1IXzd<4J63wTA9;kbt>rn&ezEP_?Bu{utEHwrn~Ov#d25|U&o%RjMqrw*|=Jj z@!CfG8J<<;I?s2+W`^re9xSEGaJ)iXm$)%;FPx6cRq5Uu;`eYr9#^G%r-{$uEmfA2 zJNO6Xe_`60E}sE&s4~A_z%uv>R#&BaHL(%p&G1$1M!qKw#GyD|mHte{8MuV}3S5ux z;&%KP53AChqj&|c;jgL;@9+2*Ja#6CD4m#DJ+TcgVM?mbn0A7&f*J$M+uRps|>E)ieH-!NpJ zvupm~%hS(na;Y3`EAK_X21)pMu`K~{Cu^iUL*ReN_#re1%cjH%h1OHTIJpUoi z_Ll2k39O49v7ai>Ck!E;N<3GU>AO^w>AO~y>AOjl>GUBU!3%gBeG6Q@%vb;`U;}K2 zeQ^RV#7+1Kp2c7Au`0(Op$nbQVm>U55!eXZV0RphlW-oc#_f0zPvAAYhv^r&;dlWn zVLgn)fjAe};fHt#zs9Th8$QJ}i(UV6U?D7zQP>naU@shw({K^4#~pYWzribbA5$)I z!;u9GVp*(%EwD58!?8FMm*KnkF&@Eh@fzO6i!UI8MWbxDL1D zA^Zlf;vM`OLzlVXc^30xNsPdT*c!XzARLc#a20OG-FOtw;dQ)+zU6Ls(&O{^5|+nW z7=!Jx7mmQGxB%DUhj;+L!b^Ay|HKq4+;C;a0$3WWV-swH-ElBZ!g;tFKfq7$7@k*? z%kSyn_p0n~Z;^jQ`~-a~-EgK=rCtWiN_igQ{8*Usa>Ny}8s+tg8)Gxd+Y@)f?vxL~ zi8v46#t(2mp2Dkm8$(vP@yLRCusBx2YG~w7e}5|(ror@>SKTV_v%+Fn3L9V(?1)`( zIF3fytk~|!;$eLsKg2KaE4+$7;@|2P`F^C&nF`b3i&y}QVJWPDRj?M;LwWSkcE26U zPYv352+A(i#xroW`mQnSP+k>iV>$G(9>bG(4lm)4_%q(Y`}i3D!LShN?gnErVs^}h zC9y14#t3YMZLl-i_rXYa-ypW{gOPYR@o1cc({Qo6&Y0!64maW_co6M-U!?wV;-Byr zyoV3*AN2cOe?l<~v*2@BL|q}jkA&s0BI^6^G~XQcJ$M>-z^>Q>^}TqSAA(bH1};-q zx%cC#8;IY-!*~==;%WR5f5tm_AH!tD)b3`)+-gp_&xu8`1ipfmF$(M8>)0OSFdnDj zOneI$<3`+!+wo&OkM?~wGMqmW|BUzWAwEUjR_l0W#q3xdOJgOhhPAOi#$p`y!oD~Z zN8$vWf(upI$1lY-xE|lf4{;Cf$J2NYui!OImcn&E6{f>X_#zg-m$4*9qkSKb4Cm{_ z?Xf%d!T~r0r{ipV2RGq1+==_}5MIP9_!Itu_wXS;#gLS4yzTpbUd=EdwkMMImhWfrl?cZ6vfw%A;KE#x%T>WP- zBWA_YSRSil4b=B9YX2JI>uR(y?XfHN!0|X4XX0F3jLY#I+=TXhjne%S#NXlt{2s64 zulPIK_bN*JBB|YQmd5f}6>DHUY=q6R6?VYR*aQ2ZegBg5Z#eNdwC`h*@|nbQaWO8( zb+{2f!0osf58&r`3{T@Zyn@&87T&>!_!#}6ZaSsJY?u>EqP{Ou=X-r@jGeI?j>2)c z2$$hD+=<6g-y5mjzk#<<-xI0jDKIC7V_B?#jWGthVNV=~lW-ZX!tJVDtN9oY;9qw!UI9XnxH9D*Zo zE-t|J_%0sA&+rmn#fSJ9GlaSE&Vu>zC9H;#*b3WVKOBV9aW<~Tb+`xj7@UAha0RZzjraj>$5UwEGbY1v znfM31iMKJMoG9w>X2s_*Hx|SqSP83PEv$#p*c^Lc9~^|ka4b&5w{S6T!Y#NTKgBb6 z9)HE(@ew}3v>Dv^X26121WRE#wC_!m=~IKaE;hst*cp3ZADni*wjKmiB8g{_WI1q>8G@OZRa6P_{AL4G@ zhbPoZ^1T|oh*$6i-opF%2u)_!J{ji1JXi>eVreXoRj~%v#fE6#pC`lDn|L4&#W6Sm z7vpkViyQD`+>77h1^gbbxoJ8L#6_{2d=)hODlCSuiJtV>zsdHLw;o zMEia~8Q#~3+u|S`hGTIe+V=)ZyV=AG(Y{Ae%HJk_2lwE9`~ttib9f0K;Gbxob>o{1 zpTTrk97|(GtcrE9AvVKTF&5*nFAl^JI0oOuS-1d~;8xs$hwunq#UJqw-p4H2-1t6+ z;g}bTVJWPDRWJ(cU}KEI*RUi@mTf4#5$)3|HZLd>8lNemsI-;%&T(f8yVm zHoF_&444gb;)_@SYhgW%#^%@=yI~*fkF#(dF2$9&747>SWj-7s{t_>!dF40~f5KnT zm&4_gV;W44&teXI1uJ7D*2YHI6#L>p9EtY5kuqFUh^OOQxEMF6C5?Fxx8uin9KXhM zcnQ&>fqifyPQ{gI-*+j~dk66@Jc+0A7yJ$V zxn%gl<#!v$d>22&k8mFz!Y}YE{1z|Z z_h{d%D#Q7Z_%UXXeXb6F7R-+?VKt1z)~cMVwZksh9Vg;coQ?Bw3vR=scpR_eP5d1n zV7h#+|Cz8b7Q?bw0b{Tw_QW@E6598&%6P5NxTu`>;3nLHJ8?H2Li^rUX?IrR`tp0a zcnxo0cz&19i-oZmR>c}v7aL+5?0{Xd2M)*4I0>iW5?q1na3k)*Pw+4v#q((28!O}a zBk|ApC;pAe3b^r2h1oDCzK8{|99G2YSQFc*a_z4JcEg@H0EggooQ(@{DSm`|@DLus zYj^{H!+Th$pc|f|SQ^V?1V&*)jKIC_{ zBzzNR;d*=*Kg5r4A0EPEcoM(I>uBE_Ed4WuU4OG;b}Wviu`V{mb{LC8a0Jf91^6C* zfJg94yo6WrAwI@5Mcik+>>0#u)63-Eb6+!}+)fx8OEBipTL9+V=-b z|NkO>idkhJqVqF5+V=)aoR7FXR>Im?A7e2Nds%&^AMqd@N%>6Txwr&ZpnZ?9^nWMu zAv}T?)z-#b!5erB@8cu%z3l4S_XNO7sb8765jMpx*d2%A zD4c_D;XCR+V>aP7+==_}5FSJO-eGBXj`$MZ!TXq^nCpHh=EQI;jpeZ}HpE!8?;n=_ z4J96lvv3}6#LajRKf`l)3Gd-UOkLa!Z(4i-U&L3iGB(1d*a^GhNF0lA;bMFj-^b7J z3%rC^@g6?Jv?bi|X22J*0KS5iu_?B|uGj;|;zV44OK>x8#lv_Mui!O&q#lvq?ZISn z4MgKqm`y!vOis*;1+h4m#>yChb+7@pQBTP65q86#H~@#>7@UC9aW<|}4;ix--@^~^ zfcmBUUIZS;ukk#7hu85Y-o-yKMJegtFk?b7BWA^1m*;}DeX*!X)rTp!*I-tWw8R*$Hv$mJK-Q4hBI&uuE%%r6Fi9L z@Dl#64l>5Rk6Qej*jL7tr^d8s-&Za5o+B=d_WjjT9zh(1&9N2sz&=fo8s5OCsLw>`c-i+~pOXEn#$q1Kk1u0MtcX>y7S_YoYCkz2#yE_}emDq6;W)JK z!f8)w|D`6#osY`IX671F$cbYrLY{v&3mRDT+=ddW2z#3Q!U&Yt4FAl`1YMe1M@GV@7 zt8pD}!EJaLkD`75wRG=$;`{grLo2xcg<)PSh?Ugc^8RkDjrB1GTVgwm#dz$Eqtu=9 z`*S!AXW{}}f^XwHxCOW2A@!o%C&LqX3NPXn{27162lyw3R+R2tHYNCRo^ zKk#q#RdUlOl`8e}5*Nf`SPCnsQm+beb*zI8Fh-SnEs0xWN9=+|A05~HkvAKJdPRjGH5_!8d6yO_MH)RXCy z8q;HD%%Mtm3K18@Y8Z+2un{&_rCnd*fj9>3d%G_i^QOj9Zx!WhaVze?y{gnZO?(c2 z!e8(Snrc%2vK;r}^OzS4Vlh>^TZ*_GR>A66N0oXFh?`(H?1}wxFpg5C-8kY&I0NV4 zB30@wBVL7DaR(m9ukjpS!u$9L|52s8=^{j#9+@y4?R&_jys*YnuR7&5u?aTAemDq6 z;W(U%GjIVe!PU49_u>IOipTLZp2I764IkoT45{wMGX*|}&tpC;gb^5pjj$=ULi=8H znND4ZyW<#~fd8kl^8t?Is_*z(i5-zBK?zQx1Q(P<4odK-I$6X@a6Bh;iX~UF4(lAN z)XnOoJL!Z^y5sH?F0Be0>dB~S5?o>i(Qz1I(xCAqjGCH8Gq{6VTyVjqZekJ*5gny< zK@4Hy0ngM0!|?s?{eGvXr_Hc$viaQaz2AP{|F?T@<-MncpA&vj_^j}G;R)e4h2Ii> zSNMJ5>%upLZwW67H?)=NyHWUF;roS+!e-$f;a;KlJLjm^px6arQTSKFr-WY-dcSLq z^XA1qC45Ern(!yWp9!xBok*$NHwteSeo**_!muzR{Fv|&VMdr29u`gs|5o@V;ol3t zE<7VVEBtTakA+u+PJ5}mw+L?+Hjo?fo@U_#!d=3B!iR-_DvS$1E&NO26T+v3UlJY{ zzAXHP@Lz=A7QQC@q3~_tFNMDn{#IE1P^tWzgqkh`VVdm3b5XL(ac0SVjx$F>e4ae$I16My?xV>B{{0$>%ofQszUPt1 zbcMwC-HT)qziUZO;C~yyN$iV}kK=bV$R|*L@@dqcJc|00Uqt=MXHkE02H!8p}M4VY9GBxKr36M3;DaQDIEjPr^ANObO8y zUVM>6KTZfIg@=VlglKZlZ(4XvI4gWXI43+QTo9fXo)MlEE|TcyCE>F0g76}V@qbBp znXJS?-2`Y$Qtak3Tw$Nj#DSBCu^~^Zg<%r&DI)A3v4`0ujFOmNF<~Exd3I3PPwqtj2vcM$-uoxal9+!5VUffoFdVmPYREaeU5WfI87dOoMXZnvLAovAehu$sjBuvu6`&Y=H=wd8U1zp$Rfy0J~zNMikH7PgRBM|KLsQPA32Zy7xt5<(Eq{|xq$u`X35j&e_@ftB$^OTl9)_~g;V4?^uO>3c^>^QoF*61 z|H2t^3H>jeC9!V3AiV!7*qDD$k(hUHkeF{nSA&>eJ2rusUq2#iu#b8TxCQ$}WG(ie z-UZg-ciTwJo6hS%%$L6=F;9A~2QfdscLRudapB$IPCQ3|c10`N=|&La|K6KGjQb}^ zjQ5-017e*2&n;jdt{1n02N8c8*pKHPWCH(w<8~0^_c!kaF>agw0LFE2x zBHqV`vT|I;?*J$9do*`~7>93c1u_11-wk5ieTO`XzdJ@``!EU7BVr#Vx5)hf&Ob@J7VChdpCjw!x{vg?Xrm1)Igepi zk!Z6zvFk~+!A`NmBRD$Hbl?Q5kRjfu6Viw8}aH+gnF4jw(5>nIDPqR4?{6 zvdeM8Vtex$PxS8_@{xxJ8 z^%FZxqOlWVr${vVVX>#kBJvY^mYhI-VxJ)=F@MBfAu)a{uLhA{6^U_NFZMPP<2fvL zghVGE6uY0q_?{H|Fo|(KBldIT4EkH_ljL!GP#k$V@^XZnJ%Sv_qn~1?(Vh_;C7CUK)_6k zbhp~EktC(uLOg#+a_EhAHo3jYLO0?iD%#rYMq1k#YY0X=BW_z}tdPs3)5)A0OO9rZ z)Yi!Tp~fcn07{tLmmGfQlvsQqjf~3WloPu$@kDPfKDsaNCu`MB&e@lYCw%j2OC<*n zJ(P|Q=P9{9v(@zVX|368`Z530yri{fv~1sAs`G(NF0nqzKBH%U%q`?bhKG|m!?`<} zinuW&qPLLAy0OmgP@@rv&fXpE?6G@PJIiV!4vlDMv+Z4qZt{=*kbm@jKG7(gp9rG; zL=e5hU!<&^;mB`bCERQrotEbm2{kku4PYc1v60?TOXK}+bUd9mht=+6!EKGS8IBmu zZda_`jFQ35WvC^cIO>QnZ{AfJ=4#~~$kc^Yucp`zO#ai7^T2A?? zE8-5MN5&4Z(MxtyX*{bLGR;VG$jv7U<5)=P+%}%enRZvC$xW57EbM>V;F>&^_V zi_4GvSu!&;G{V)FxeX0x3YpT!LNbpD;6>(=`SG+EZ9U!Ht$Q&Ty_#gkhTVu>o^bsc z&4%tPCAIaUl~zyl#!3onvo?YkkxLG`BV&WoE~SApm>I$%T@o30b47P3UA78_g=n`h zDy8z&BCRnDb(X8QfT?H{%u6oh;$!*Ik$iq6GlsH#V!T|zw&;F0@12rKW5K3EIZ6tG z)xaGXA1Ya;f@YJr_=cH5gu zpSc8dbw)6|y~@C9Z~r4b|30_0G%+dGa~}$xk)c9st+w<|jM;wE(5pur%Y$u7}TJ8 z{7!D_tw1jfC+gjdL-jsl>G8XjU;FW0uclu8_gCBRRzvSkEIqyh@g~G+KzDoLfTb6O zULR6ezT0qU`TpF}`z{8%*?y|`NlR}QdL5$2HAVHlVCg-FMvWj&gSOu@mfl6^&BBT0 z!?sje?i@zle%R$1@gEWMd)u^)(Z4O+f`we&7SuMtkv zy90;TmwUDNZ*@JzUfy2V8npeEExmed2G_%hdUxSayk^y-CDVk88Z@-D&BaxdD1e*P!L&yM9f* zEM6{L3n%K`gG2RpSb8ha>WdJh_Ud}lQEu>I?WC!xpt2o3CCrngx6@?AZ(h|{3spxMf| z1Nrhf*voJXDAyObQyiFLG>QD^yZ*fEA7`| z=*?Jq)wTZjVZ5I*$HBSRR>wW>g|&R&wDc}PuLkKFw5WV0#b(g;zUmJD``y>Ae3y}L zEzV;*cjM4}-xfU`e=+Fcl35P)V}94-1F8A;!*6HVtE5MB6a38jI7@+47}Dv-@x05@tH0C#e*B}B zUkrX>oUeg;4Bhx(w#y9iWj?IO0UY$Bov`$dLQgf2>{Rf72osjyH2lt#lDz-xIYoRh z^PNS$DR?m7kKv#n^L@tB>%Yr?J@~ApSB;0<^*En;2XUz02}|!R^p0=**y+Z^o!^!q9v7#2Zi9C&X4XXEmrB{R=b*T4o9ICh9(z_ai>ZFQ^ zAI*d{v}$3 z>K(KECUCRl=l2cE&%yIvKfhPu$M(KT^5VatLe}M=`Toeq&!}#>d_NE9cO{_Tb(oNL z`Ebiy4qCq31Nz z{eBwI@Bah(@$bZf)c1yfep>?i-4oDnM?k;!fPVV}`aR;~H^l)ULC3_$ef+xA2~@vF z1Nwa?px;vg{iXx@eZ|M`uunZ+^zrNP@tY6m_Z|3|^Pl$zyN|C5YTCEpXWl2K-o*F8 z;nIE1SEZfd;=F3O}H1(pnCsn`Ca#4_>S|Cdaah}O)K9iJ^lV@L7olO}h$yX1heEDx3v~ zQ15FvRPQ!RZv_ts{(ZNqt>$&JrC0qF^pF|#<_x{9qSq)AU(arEexnBBSUw(&mfuTX z-r()m%4uc42d(lg!S6X-Lp87-4EI~*JNI;jGl`o^mXG(_THihJLv)tsFig&FDDP3x z*7hTfW_3=&kMCujNBjU1saK5ya^-tid~_1nfalt&LG`fxy2da1xeABB%cDX4eg}xX BMvedg diff --git a/build/sd_diskio.lst b/build/sd_diskio.lst index 8c83de5..0e3f477 100644 --- a/build/sd_diskio.lst +++ b/build/sd_diskio.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cc2j0q1O.s page 1 +ARM GAS /tmp/ccHqyWEZ.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 29:Src/sd_diskio.c **** #include "sd_diskio.h" 30:Src/sd_diskio.c **** 31:Src/sd_diskio.c **** /* Private typedef -----------------------------------------------------------*/ - ARM GAS /tmp/cc2j0q1O.s page 2 + ARM GAS /tmp/ccHqyWEZ.s page 2 32:Src/sd_diskio.c **** /* Private define ------------------------------------------------------------*/ @@ -118,7 +118,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 86:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */ 87:Src/sd_diskio.c **** 88:Src/sd_diskio.c **** /* Private functions ---------------------------------------------------------*/ - ARM GAS /tmp/cc2j0q1O.s page 3 + ARM GAS /tmp/ccHqyWEZ.s page 3 89:Src/sd_diskio.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 71 .global SD_initialize 72 .syntax unified 73 .thumb - ARM GAS /tmp/cc2j0q1O.s page 4 + ARM GAS /tmp/ccHqyWEZ.s page 4 74 .thumb_func @@ -238,7 +238,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 106 .loc 1 123 1 view .LVU21 107 0014 10BD pop {r4, pc} 108 .LVL4: - ARM GAS /tmp/cc2j0q1O.s page 5 + ARM GAS /tmp/ccHqyWEZ.s page 5 109 .L9: @@ -298,7 +298,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 152 .cfi_endproc 153 .LFE1185: 155 .section .text.SD_read,"ax",%progbits - ARM GAS /tmp/cc2j0q1O.s page 6 + ARM GAS /tmp/ccHqyWEZ.s page 6 156 .align 1 @@ -358,7 +358,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 193 .L16: 152:Src/sd_diskio.c **** (uint32_t) (sector), 153:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK) - ARM GAS /tmp/cc2j0q1O.s page 7 + ARM GAS /tmp/ccHqyWEZ.s page 7 154:Src/sd_diskio.c **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 173:Src/sd_diskio.c **** * @param count: Number of sectors to write (1..128) 174:Src/sd_diskio.c **** * @retval DRESULT: Operation result 175:Src/sd_diskio.c **** */ - ARM GAS /tmp/cc2j0q1O.s page 8 + ARM GAS /tmp/ccHqyWEZ.s page 8 176:Src/sd_diskio.c **** #if _USE_WRITE == 1 @@ -478,7 +478,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 264 001a FAD1 bne .L21 265 .L20: 266 .LVL24: - ARM GAS /tmp/cc2j0q1O.s page 9 + ARM GAS /tmp/ccHqyWEZ.s page 9 190:Src/sd_diskio.c **** res = RES_OK; @@ -538,7 +538,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 302 .cfi_def_cfa_offset 48 210:Src/sd_diskio.c **** DRESULT res = RES_ERROR; 303 .loc 1 210 3 is_stmt 1 view .LVU64 - ARM GAS /tmp/cc2j0q1O.s page 10 + ARM GAS /tmp/ccHqyWEZ.s page 10 304 .LVL27: @@ -598,7 +598,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 341 002a 0DE0 b .L25 342 .LVL31: 343 .L28: - ARM GAS /tmp/cc2j0q1O.s page 11 + ARM GAS /tmp/ccHqyWEZ.s page 11 228:Src/sd_diskio.c **** @@ -658,7 +658,7 @@ ARM GAS /tmp/cc2j0q1O.s page 1 245:Src/sd_diskio.c **** } 246:Src/sd_diskio.c **** 247:Src/sd_diskio.c **** return res; - ARM GAS /tmp/cc2j0q1O.s page 12 + ARM GAS /tmp/ccHqyWEZ.s page 12 248:Src/sd_diskio.c **** } @@ -708,31 +708,31 @@ ARM GAS /tmp/cc2j0q1O.s page 1 427 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 428 .file 10 "Inc/bsp_driver_sd.h" 429 .file 11 "Inc/sd_diskio.h" - ARM GAS /tmp/cc2j0q1O.s page 13 + ARM GAS /tmp/ccHqyWEZ.s page 13 DEFINED SYMBOLS *ABS*:00000000 sd_diskio.c - /tmp/cc2j0q1O.s:20 .text.SD_CheckStatus:00000000 $t - /tmp/cc2j0q1O.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus - /tmp/cc2j0q1O.s:65 .text.SD_CheckStatus:00000020 $d - /tmp/cc2j0q1O.s:416 .data.Stat:00000000 Stat - /tmp/cc2j0q1O.s:70 .text.SD_initialize:00000000 $t - /tmp/cc2j0q1O.s:76 .text.SD_initialize:00000000 SD_initialize - /tmp/cc2j0q1O.s:122 .text.SD_initialize:00000024 $d - /tmp/cc2j0q1O.s:127 .text.SD_status:00000000 $t - /tmp/cc2j0q1O.s:133 .text.SD_status:00000000 SD_status - /tmp/cc2j0q1O.s:156 .text.SD_read:00000000 $t - /tmp/cc2j0q1O.s:162 .text.SD_read:00000000 SD_read - /tmp/cc2j0q1O.s:218 .text.SD_write:00000000 $t - /tmp/cc2j0q1O.s:224 .text.SD_write:00000000 SD_write - /tmp/cc2j0q1O.s:280 .text.SD_ioctl:00000000 $t - /tmp/cc2j0q1O.s:286 .text.SD_ioctl:00000000 SD_ioctl - /tmp/cc2j0q1O.s:320 .text.SD_ioctl:00000018 $d - /tmp/cc2j0q1O.s:324 .text.SD_ioctl:0000001c $t - /tmp/cc2j0q1O.s:398 .text.SD_ioctl:00000054 $d - /tmp/cc2j0q1O.s:407 .rodata.SD_Driver:00000000 SD_Driver - /tmp/cc2j0q1O.s:404 .rodata.SD_Driver:00000000 $d + /tmp/ccHqyWEZ.s:20 .text.SD_CheckStatus:00000000 $t + /tmp/ccHqyWEZ.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus + /tmp/ccHqyWEZ.s:65 .text.SD_CheckStatus:00000020 $d + /tmp/ccHqyWEZ.s:416 .data.Stat:00000000 Stat + /tmp/ccHqyWEZ.s:70 .text.SD_initialize:00000000 $t + /tmp/ccHqyWEZ.s:76 .text.SD_initialize:00000000 SD_initialize + /tmp/ccHqyWEZ.s:122 .text.SD_initialize:00000024 $d + /tmp/ccHqyWEZ.s:127 .text.SD_status:00000000 $t + /tmp/ccHqyWEZ.s:133 .text.SD_status:00000000 SD_status + /tmp/ccHqyWEZ.s:156 .text.SD_read:00000000 $t + /tmp/ccHqyWEZ.s:162 .text.SD_read:00000000 SD_read + /tmp/ccHqyWEZ.s:218 .text.SD_write:00000000 $t + /tmp/ccHqyWEZ.s:224 .text.SD_write:00000000 SD_write + /tmp/ccHqyWEZ.s:280 .text.SD_ioctl:00000000 $t + /tmp/ccHqyWEZ.s:286 .text.SD_ioctl:00000000 SD_ioctl + /tmp/ccHqyWEZ.s:320 .text.SD_ioctl:00000018 $d + /tmp/ccHqyWEZ.s:324 .text.SD_ioctl:0000001c $t + /tmp/ccHqyWEZ.s:398 .text.SD_ioctl:00000054 $d + /tmp/ccHqyWEZ.s:407 .rodata.SD_Driver:00000000 SD_Driver + /tmp/ccHqyWEZ.s:404 .rodata.SD_Driver:00000000 $d UNDEFINED SYMBOLS BSP_SD_GetCardState diff --git a/build/stm32f7xx_hal.lst b/build/stm32f7xx_hal.lst index f3a1987..528fbb7 100644 --- a/build/stm32f7xx_hal.lst +++ b/build/stm32f7xx_hal.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cchM4bQp.s page 1 +ARM GAS /tmp/ccqG5zDC.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** (+) Services HAL APIs 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** @endverbatim - ARM GAS /tmp/cchM4bQp.s page 2 + ARM GAS /tmp/ccqG5zDC.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** ****************************************************************************** @@ -118,7 +118,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** */ 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions - ARM GAS /tmp/cchM4bQp.s page 3 + ARM GAS /tmp/ccqG5zDC.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @brief Initialization and de-initialization functions @@ -178,7 +178,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** #endif /* ART_ACCELERATOR_ENABLE */ 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /* Configure Flash prefetch */ - ARM GAS /tmp/cchM4bQp.s page 4 + ARM GAS /tmp/ccqG5zDC.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** #if (PREFETCH_ENABLE != 0U) @@ -238,7 +238,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 0 31 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/cchM4bQp.s page 5 + ARM GAS /tmp/ccqG5zDC.s page 5 32 @ link register save eliminated. @@ -298,7 +298,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 74 .cfi_offset 14, -4 171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); 75 .loc 1 171 3 view .LVU5 - ARM GAS /tmp/cchM4bQp.s page 6 + ARM GAS /tmp/ccqG5zDC.s page 6 76 0002 094B ldr r3, .L5 @@ -358,7 +358,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 120 .LVL1: 121 .LFB145: 214:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** - ARM GAS /tmp/cchM4bQp.s page 7 + ARM GAS /tmp/ccqG5zDC.s page 7 215:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /** @@ -418,7 +418,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 150 .loc 1 240 6 is_stmt 0 view .LVU26 151 001e 0F2C cmp r4, #15 152 0020 01D9 bls .L12 - ARM GAS /tmp/cchM4bQp.s page 8 + ARM GAS /tmp/ccqG5zDC.s page 8 241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** { @@ -478,7 +478,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 192 .thumb 193 .thumb_func 195 HAL_Init: - ARM GAS /tmp/cchM4bQp.s page 9 + ARM GAS /tmp/ccqG5zDC.s page 9 196 .LFB141: @@ -538,7 +538,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** (+) Provide a tick value in millisecond 267:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** (+) Provide a blocking delay in millisecond 268:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** (+) Suspend the time base source interrupt - ARM GAS /tmp/cchM4bQp.s page 10 + ARM GAS /tmp/ccqG5zDC.s page 10 269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** (+) Resume the time base source interrupt @@ -598,7 +598,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 264 .LFB147: 294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** 295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /** - ARM GAS /tmp/cchM4bQp.s page 11 + ARM GAS /tmp/ccqG5zDC.s page 11 296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @brief Provides a tick value in millisecond. @@ -658,7 +658,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 303 0006 00BF .align 2 304 .L24: 305 0008 00000000 .word uwTickPrio - ARM GAS /tmp/cchM4bQp.s page 12 + ARM GAS /tmp/ccqG5zDC.s page 12 306 .cfi_endproc @@ -718,7 +718,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /* Update uwTickFreq global variable used by HAL_InitTick() */ 332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** uwTickFreq = Freq; 333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** - ARM GAS /tmp/cchM4bQp.s page 13 + ARM GAS /tmp/ccqG5zDC.s page 13 334:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /* Apply the new tick Freq */ @@ -778,7 +778,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 376 .LFE149: 378 .section .text.HAL_GetTickFreq,"ax",%progbits 379 .align 1 - ARM GAS /tmp/cchM4bQp.s page 14 + ARM GAS /tmp/ccqG5zDC.s page 14 380 .global HAL_GetTickFreq @@ -838,7 +838,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** { 414 .loc 1 369 1 is_stmt 1 view -0 415 .cfi_startproc - ARM GAS /tmp/cchM4bQp.s page 15 + ARM GAS /tmp/ccqG5zDC.s page 15 416 @ args = 0, pretend = 0, frame = 0 @@ -898,7 +898,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 454 .loc 1 379 38 discriminator 1 view .LVU92 455 001c A042 cmp r0, r4 456 001e FAD3 bcc .L38 - ARM GAS /tmp/cchM4bQp.s page 16 + ARM GAS /tmp/ccqG5zDC.s page 16 382:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** } @@ -958,7 +958,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 497 .syntax unified 498 .thumb 499 .thumb_func - ARM GAS /tmp/cchM4bQp.s page 17 + ARM GAS /tmp/ccqG5zDC.s page 17 501 HAL_ResumeTick: @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 422:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** return __STM32F7xx_HAL_VERSION; 534 .loc 1 422 3 view .LVU106 423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** } - ARM GAS /tmp/cchM4bQp.s page 18 + ARM GAS /tmp/ccqG5zDC.s page 18 535 .loc 1 423 1 is_stmt 0 view .LVU107 @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @brief Returns the device identifier. 436:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @retval Device identifier 437:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** */ - ARM GAS /tmp/cchM4bQp.s page 19 + ARM GAS /tmp/ccqG5zDC.s page 19 438:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** uint32_t HAL_GetDEVID(void) @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 625 .LFE157: 627 .section .text.HAL_GetUIDw1,"ax",%progbits 628 .align 1 - ARM GAS /tmp/cchM4bQp.s page 20 + ARM GAS /tmp/ccqG5zDC.s page 20 629 .global HAL_GetUIDw1 @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 668 .loc 1 468 1 is_stmt 0 view .LVU124 669 0000 014B ldr r3, .L60 670 0002 D3F82804 ldr r0, [r3, #1064] - ARM GAS /tmp/cchM4bQp.s page 21 + ARM GAS /tmp/ccqG5zDC.s page 21 671 0006 7047 bx lr @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** */ 483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** void HAL_DBGMCU_DisableDBGSleepMode(void) 484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** { - ARM GAS /tmp/cchM4bQp.s page 22 + ARM GAS /tmp/ccqG5zDC.s page 22 716 .loc 1 484 1 is_stmt 1 view -0 @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 761 .LFE162: 763 .section .text.HAL_DBGMCU_DisableDBGStopMode,"ax",%progbits 764 .align 1 - ARM GAS /tmp/cchM4bQp.s page 23 + ARM GAS /tmp/ccqG5zDC.s page 23 765 .global HAL_DBGMCU_DisableDBGStopMode @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 805 .loc 1 512 3 view .LVU138 806 0000 024A ldr r2, .L75 807 0002 5368 ldr r3, [r2, #4] - ARM GAS /tmp/cchM4bQp.s page 24 + ARM GAS /tmp/ccqG5zDC.s page 24 808 0004 43F00403 orr r3, r3, #4 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 523:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** 524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /** 525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @brief Enables the I/O Compensation Cell. - ARM GAS /tmp/cchM4bQp.s page 25 + ARM GAS /tmp/ccqG5zDC.s page 25 526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @note The I/O compensation cell can be used only when the device supply @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 894 0002 136A ldr r3, [r2, #32] 895 .loc 1 543 17 view .LVU151 896 0004 23F00103 bic r3, r3, #1 - ARM GAS /tmp/cchM4bQp.s page 26 + ARM GAS /tmp/ccqG5zDC.s page 26 897 0008 1362 str r3, [r2, #32] @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 940 .syntax unified 941 .thumb 942 .thumb_func - ARM GAS /tmp/cchM4bQp.s page 27 + ARM GAS /tmp/ccqG5zDC.s page 27 944 HAL_DisableFMCMemorySwapping: @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 582:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** */ 583:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** void HAL_EnableMemorySwappingBank(void) 584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** { - ARM GAS /tmp/cchM4bQp.s page 28 + ARM GAS /tmp/ccqG5zDC.s page 28 976 .loc 1 584 1 is_stmt 1 view -0 @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cchM4bQp.s page 1 1015 000a 7047 bx lr 1016 .L97: 1017 .align 2 - ARM GAS /tmp/cchM4bQp.s page 29 + ARM GAS /tmp/ccqG5zDC.s page 29 1018 .L96: @@ -1708,107 +1708,107 @@ ARM GAS /tmp/cchM4bQp.s page 1 1049 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" 1050 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h" 1051 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h" - ARM GAS /tmp/cchM4bQp.s page 30 + ARM GAS /tmp/ccqG5zDC.s page 30 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal.c - /tmp/cchM4bQp.s:20 .text.HAL_MspInit:00000000 $t - /tmp/cchM4bQp.s:26 .text.HAL_MspInit:00000000 HAL_MspInit - /tmp/cchM4bQp.s:39 .text.HAL_MspDeInit:00000000 $t - /tmp/cchM4bQp.s:45 .text.HAL_MspDeInit:00000000 HAL_MspDeInit - /tmp/cchM4bQp.s:58 .text.HAL_DeInit:00000000 $t - /tmp/cchM4bQp.s:64 .text.HAL_DeInit:00000000 HAL_DeInit - /tmp/cchM4bQp.s:108 .text.HAL_DeInit:00000028 $d - /tmp/cchM4bQp.s:113 .text.HAL_InitTick:00000000 $t - /tmp/cchM4bQp.s:119 .text.HAL_InitTick:00000000 HAL_InitTick - /tmp/cchM4bQp.s:182 .text.HAL_InitTick:00000040 $d - /tmp/cchM4bQp.s:1027 .data.uwTickFreq:00000000 uwTickFreq - /tmp/cchM4bQp.s:1034 .data.uwTickPrio:00000000 uwTickPrio - /tmp/cchM4bQp.s:189 .text.HAL_Init:00000000 $t - /tmp/cchM4bQp.s:195 .text.HAL_Init:00000000 HAL_Init - /tmp/cchM4bQp.s:225 .text.HAL_IncTick:00000000 $t - /tmp/cchM4bQp.s:231 .text.HAL_IncTick:00000000 HAL_IncTick - /tmp/cchM4bQp.s:251 .text.HAL_IncTick:00000010 $d - /tmp/cchM4bQp.s:1041 .bss.uwTick:00000000 uwTick - /tmp/cchM4bQp.s:257 .text.HAL_GetTick:00000000 $t - /tmp/cchM4bQp.s:263 .text.HAL_GetTick:00000000 HAL_GetTick - /tmp/cchM4bQp.s:279 .text.HAL_GetTick:00000008 $d - /tmp/cchM4bQp.s:284 .text.HAL_GetTickPrio:00000000 $t - /tmp/cchM4bQp.s:290 .text.HAL_GetTickPrio:00000000 HAL_GetTickPrio - /tmp/cchM4bQp.s:305 .text.HAL_GetTickPrio:00000008 $d - /tmp/cchM4bQp.s:310 .text.HAL_SetTickFreq:00000000 $t - /tmp/cchM4bQp.s:316 .text.HAL_SetTickFreq:00000000 HAL_SetTickFreq - /tmp/cchM4bQp.s:373 .text.HAL_SetTickFreq:00000024 $d - /tmp/cchM4bQp.s:379 .text.HAL_GetTickFreq:00000000 $t - /tmp/cchM4bQp.s:385 .text.HAL_GetTickFreq:00000000 HAL_GetTickFreq - /tmp/cchM4bQp.s:400 .text.HAL_GetTickFreq:00000008 $d - /tmp/cchM4bQp.s:405 .text.HAL_Delay:00000000 $t - /tmp/cchM4bQp.s:411 .text.HAL_Delay:00000000 HAL_Delay - /tmp/cchM4bQp.s:464 .text.HAL_Delay:00000024 $d - /tmp/cchM4bQp.s:469 .text.HAL_SuspendTick:00000000 $t - /tmp/cchM4bQp.s:475 .text.HAL_SuspendTick:00000000 HAL_SuspendTick - /tmp/cchM4bQp.s:495 .text.HAL_ResumeTick:00000000 $t - /tmp/cchM4bQp.s:501 .text.HAL_ResumeTick:00000000 HAL_ResumeTick - /tmp/cchM4bQp.s:521 .text.HAL_GetHalVersion:00000000 $t - /tmp/cchM4bQp.s:527 .text.HAL_GetHalVersion:00000000 HAL_GetHalVersion - /tmp/cchM4bQp.s:541 .text.HAL_GetHalVersion:00000004 $d - /tmp/cchM4bQp.s:546 .text.HAL_GetREVID:00000000 $t - /tmp/cchM4bQp.s:552 .text.HAL_GetREVID:00000000 HAL_GetREVID - /tmp/cchM4bQp.s:569 .text.HAL_GetREVID:00000008 $d - /tmp/cchM4bQp.s:574 .text.HAL_GetDEVID:00000000 $t - /tmp/cchM4bQp.s:580 .text.HAL_GetDEVID:00000000 HAL_GetDEVID - /tmp/cchM4bQp.s:597 .text.HAL_GetDEVID:0000000c $d - /tmp/cchM4bQp.s:602 .text.HAL_GetUIDw0:00000000 $t - /tmp/cchM4bQp.s:608 .text.HAL_GetUIDw0:00000000 HAL_GetUIDw0 - /tmp/cchM4bQp.s:623 .text.HAL_GetUIDw0:00000008 $d - /tmp/cchM4bQp.s:628 .text.HAL_GetUIDw1:00000000 $t - /tmp/cchM4bQp.s:634 .text.HAL_GetUIDw1:00000000 HAL_GetUIDw1 - /tmp/cchM4bQp.s:649 .text.HAL_GetUIDw1:00000008 $d - /tmp/cchM4bQp.s:654 .text.HAL_GetUIDw2:00000000 $t - /tmp/cchM4bQp.s:660 .text.HAL_GetUIDw2:00000000 HAL_GetUIDw2 - /tmp/cchM4bQp.s:675 .text.HAL_GetUIDw2:00000008 $d - ARM GAS /tmp/cchM4bQp.s page 31 + /tmp/ccqG5zDC.s:20 .text.HAL_MspInit:00000000 $t + /tmp/ccqG5zDC.s:26 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/ccqG5zDC.s:39 .text.HAL_MspDeInit:00000000 $t + /tmp/ccqG5zDC.s:45 .text.HAL_MspDeInit:00000000 HAL_MspDeInit + /tmp/ccqG5zDC.s:58 .text.HAL_DeInit:00000000 $t + /tmp/ccqG5zDC.s:64 .text.HAL_DeInit:00000000 HAL_DeInit + /tmp/ccqG5zDC.s:108 .text.HAL_DeInit:00000028 $d + /tmp/ccqG5zDC.s:113 .text.HAL_InitTick:00000000 $t + /tmp/ccqG5zDC.s:119 .text.HAL_InitTick:00000000 HAL_InitTick + /tmp/ccqG5zDC.s:182 .text.HAL_InitTick:00000040 $d + /tmp/ccqG5zDC.s:1027 .data.uwTickFreq:00000000 uwTickFreq + /tmp/ccqG5zDC.s:1034 .data.uwTickPrio:00000000 uwTickPrio + /tmp/ccqG5zDC.s:189 .text.HAL_Init:00000000 $t + /tmp/ccqG5zDC.s:195 .text.HAL_Init:00000000 HAL_Init + /tmp/ccqG5zDC.s:225 .text.HAL_IncTick:00000000 $t + /tmp/ccqG5zDC.s:231 .text.HAL_IncTick:00000000 HAL_IncTick + /tmp/ccqG5zDC.s:251 .text.HAL_IncTick:00000010 $d + /tmp/ccqG5zDC.s:1041 .bss.uwTick:00000000 uwTick + /tmp/ccqG5zDC.s:257 .text.HAL_GetTick:00000000 $t + /tmp/ccqG5zDC.s:263 .text.HAL_GetTick:00000000 HAL_GetTick + /tmp/ccqG5zDC.s:279 .text.HAL_GetTick:00000008 $d + /tmp/ccqG5zDC.s:284 .text.HAL_GetTickPrio:00000000 $t + /tmp/ccqG5zDC.s:290 .text.HAL_GetTickPrio:00000000 HAL_GetTickPrio + /tmp/ccqG5zDC.s:305 .text.HAL_GetTickPrio:00000008 $d + /tmp/ccqG5zDC.s:310 .text.HAL_SetTickFreq:00000000 $t + /tmp/ccqG5zDC.s:316 .text.HAL_SetTickFreq:00000000 HAL_SetTickFreq + /tmp/ccqG5zDC.s:373 .text.HAL_SetTickFreq:00000024 $d + /tmp/ccqG5zDC.s:379 .text.HAL_GetTickFreq:00000000 $t + /tmp/ccqG5zDC.s:385 .text.HAL_GetTickFreq:00000000 HAL_GetTickFreq + /tmp/ccqG5zDC.s:400 .text.HAL_GetTickFreq:00000008 $d + /tmp/ccqG5zDC.s:405 .text.HAL_Delay:00000000 $t + /tmp/ccqG5zDC.s:411 .text.HAL_Delay:00000000 HAL_Delay + /tmp/ccqG5zDC.s:464 .text.HAL_Delay:00000024 $d + /tmp/ccqG5zDC.s:469 .text.HAL_SuspendTick:00000000 $t + /tmp/ccqG5zDC.s:475 .text.HAL_SuspendTick:00000000 HAL_SuspendTick + /tmp/ccqG5zDC.s:495 .text.HAL_ResumeTick:00000000 $t + /tmp/ccqG5zDC.s:501 .text.HAL_ResumeTick:00000000 HAL_ResumeTick + /tmp/ccqG5zDC.s:521 .text.HAL_GetHalVersion:00000000 $t + /tmp/ccqG5zDC.s:527 .text.HAL_GetHalVersion:00000000 HAL_GetHalVersion + /tmp/ccqG5zDC.s:541 .text.HAL_GetHalVersion:00000004 $d + /tmp/ccqG5zDC.s:546 .text.HAL_GetREVID:00000000 $t + /tmp/ccqG5zDC.s:552 .text.HAL_GetREVID:00000000 HAL_GetREVID + /tmp/ccqG5zDC.s:569 .text.HAL_GetREVID:00000008 $d + /tmp/ccqG5zDC.s:574 .text.HAL_GetDEVID:00000000 $t + /tmp/ccqG5zDC.s:580 .text.HAL_GetDEVID:00000000 HAL_GetDEVID + /tmp/ccqG5zDC.s:597 .text.HAL_GetDEVID:0000000c $d + /tmp/ccqG5zDC.s:602 .text.HAL_GetUIDw0:00000000 $t + /tmp/ccqG5zDC.s:608 .text.HAL_GetUIDw0:00000000 HAL_GetUIDw0 + /tmp/ccqG5zDC.s:623 .text.HAL_GetUIDw0:00000008 $d + /tmp/ccqG5zDC.s:628 .text.HAL_GetUIDw1:00000000 $t + /tmp/ccqG5zDC.s:634 .text.HAL_GetUIDw1:00000000 HAL_GetUIDw1 + /tmp/ccqG5zDC.s:649 .text.HAL_GetUIDw1:00000008 $d + /tmp/ccqG5zDC.s:654 .text.HAL_GetUIDw2:00000000 $t + /tmp/ccqG5zDC.s:660 .text.HAL_GetUIDw2:00000000 HAL_GetUIDw2 + /tmp/ccqG5zDC.s:675 .text.HAL_GetUIDw2:00000008 $d + ARM GAS /tmp/ccqG5zDC.s page 31 - /tmp/cchM4bQp.s:680 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 $t - /tmp/cchM4bQp.s:686 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 HAL_DBGMCU_EnableDBGSleepMode - /tmp/cchM4bQp.s:703 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000c $d - /tmp/cchM4bQp.s:708 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 $t - /tmp/cchM4bQp.s:714 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 HAL_DBGMCU_DisableDBGSleepMode - /tmp/cchM4bQp.s:731 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000c $d - /tmp/cchM4bQp.s:736 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 $t - /tmp/cchM4bQp.s:742 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 HAL_DBGMCU_EnableDBGStopMode - /tmp/cchM4bQp.s:759 .text.HAL_DBGMCU_EnableDBGStopMode:0000000c $d - /tmp/cchM4bQp.s:764 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 $t - /tmp/cchM4bQp.s:770 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 HAL_DBGMCU_DisableDBGStopMode - /tmp/cchM4bQp.s:787 .text.HAL_DBGMCU_DisableDBGStopMode:0000000c $d - /tmp/cchM4bQp.s:792 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 $t - /tmp/cchM4bQp.s:798 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 HAL_DBGMCU_EnableDBGStandbyMode - /tmp/cchM4bQp.s:815 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000c $d - /tmp/cchM4bQp.s:820 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 $t - /tmp/cchM4bQp.s:826 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 HAL_DBGMCU_DisableDBGStandbyMode - /tmp/cchM4bQp.s:843 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000c $d - /tmp/cchM4bQp.s:848 .text.HAL_EnableCompensationCell:00000000 $t - /tmp/cchM4bQp.s:854 .text.HAL_EnableCompensationCell:00000000 HAL_EnableCompensationCell - /tmp/cchM4bQp.s:873 .text.HAL_EnableCompensationCell:0000000c $d - /tmp/cchM4bQp.s:878 .text.HAL_DisableCompensationCell:00000000 $t - /tmp/cchM4bQp.s:884 .text.HAL_DisableCompensationCell:00000000 HAL_DisableCompensationCell - /tmp/cchM4bQp.s:903 .text.HAL_DisableCompensationCell:0000000c $d - /tmp/cchM4bQp.s:908 .text.HAL_EnableFMCMemorySwapping:00000000 $t - /tmp/cchM4bQp.s:914 .text.HAL_EnableFMCMemorySwapping:00000000 HAL_EnableFMCMemorySwapping - /tmp/cchM4bQp.s:933 .text.HAL_EnableFMCMemorySwapping:0000000c $d - /tmp/cchM4bQp.s:938 .text.HAL_DisableFMCMemorySwapping:00000000 $t - /tmp/cchM4bQp.s:944 .text.HAL_DisableFMCMemorySwapping:00000000 HAL_DisableFMCMemorySwapping - /tmp/cchM4bQp.s:963 .text.HAL_DisableFMCMemorySwapping:0000000c $d - /tmp/cchM4bQp.s:968 .text.HAL_EnableMemorySwappingBank:00000000 $t - /tmp/cchM4bQp.s:974 .text.HAL_EnableMemorySwappingBank:00000000 HAL_EnableMemorySwappingBank - /tmp/cchM4bQp.s:991 .text.HAL_EnableMemorySwappingBank:0000000c $d - /tmp/cchM4bQp.s:996 .text.HAL_DisableMemorySwappingBank:00000000 $t - /tmp/cchM4bQp.s:1002 .text.HAL_DisableMemorySwappingBank:00000000 HAL_DisableMemorySwappingBank - /tmp/cchM4bQp.s:1019 .text.HAL_DisableMemorySwappingBank:0000000c $d - /tmp/cchM4bQp.s:1031 .data.uwTickPrio:00000000 $d - /tmp/cchM4bQp.s:1038 .bss.uwTick:00000000 $d + /tmp/ccqG5zDC.s:680 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 $t + /tmp/ccqG5zDC.s:686 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 HAL_DBGMCU_EnableDBGSleepMode + /tmp/ccqG5zDC.s:703 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000c $d + /tmp/ccqG5zDC.s:708 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 $t + /tmp/ccqG5zDC.s:714 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 HAL_DBGMCU_DisableDBGSleepMode + /tmp/ccqG5zDC.s:731 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000c $d + /tmp/ccqG5zDC.s:736 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 $t + /tmp/ccqG5zDC.s:742 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 HAL_DBGMCU_EnableDBGStopMode + /tmp/ccqG5zDC.s:759 .text.HAL_DBGMCU_EnableDBGStopMode:0000000c $d + /tmp/ccqG5zDC.s:764 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 $t + /tmp/ccqG5zDC.s:770 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 HAL_DBGMCU_DisableDBGStopMode + /tmp/ccqG5zDC.s:787 .text.HAL_DBGMCU_DisableDBGStopMode:0000000c $d + /tmp/ccqG5zDC.s:792 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 $t + /tmp/ccqG5zDC.s:798 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 HAL_DBGMCU_EnableDBGStandbyMode + /tmp/ccqG5zDC.s:815 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000c $d + /tmp/ccqG5zDC.s:820 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 $t + /tmp/ccqG5zDC.s:826 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 HAL_DBGMCU_DisableDBGStandbyMode + /tmp/ccqG5zDC.s:843 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000c $d + /tmp/ccqG5zDC.s:848 .text.HAL_EnableCompensationCell:00000000 $t + /tmp/ccqG5zDC.s:854 .text.HAL_EnableCompensationCell:00000000 HAL_EnableCompensationCell + /tmp/ccqG5zDC.s:873 .text.HAL_EnableCompensationCell:0000000c $d + /tmp/ccqG5zDC.s:878 .text.HAL_DisableCompensationCell:00000000 $t + /tmp/ccqG5zDC.s:884 .text.HAL_DisableCompensationCell:00000000 HAL_DisableCompensationCell + /tmp/ccqG5zDC.s:903 .text.HAL_DisableCompensationCell:0000000c $d + /tmp/ccqG5zDC.s:908 .text.HAL_EnableFMCMemorySwapping:00000000 $t + /tmp/ccqG5zDC.s:914 .text.HAL_EnableFMCMemorySwapping:00000000 HAL_EnableFMCMemorySwapping + /tmp/ccqG5zDC.s:933 .text.HAL_EnableFMCMemorySwapping:0000000c $d + /tmp/ccqG5zDC.s:938 .text.HAL_DisableFMCMemorySwapping:00000000 $t + /tmp/ccqG5zDC.s:944 .text.HAL_DisableFMCMemorySwapping:00000000 HAL_DisableFMCMemorySwapping + /tmp/ccqG5zDC.s:963 .text.HAL_DisableFMCMemorySwapping:0000000c $d + /tmp/ccqG5zDC.s:968 .text.HAL_EnableMemorySwappingBank:00000000 $t + /tmp/ccqG5zDC.s:974 .text.HAL_EnableMemorySwappingBank:00000000 HAL_EnableMemorySwappingBank + /tmp/ccqG5zDC.s:991 .text.HAL_EnableMemorySwappingBank:0000000c $d + /tmp/ccqG5zDC.s:996 .text.HAL_DisableMemorySwappingBank:00000000 $t + /tmp/ccqG5zDC.s:1002 .text.HAL_DisableMemorySwappingBank:00000000 HAL_DisableMemorySwappingBank + /tmp/ccqG5zDC.s:1019 .text.HAL_DisableMemorySwappingBank:0000000c $d + /tmp/ccqG5zDC.s:1031 .data.uwTickPrio:00000000 $d + /tmp/ccqG5zDC.s:1038 .bss.uwTick:00000000 $d UNDEFINED SYMBOLS HAL_SYSTICK_Config diff --git a/build/stm32f7xx_hal.o b/build/stm32f7xx_hal.o index 7dabe94f4c5a3255ea69362dce7594c2c821ce25..ad4e3583efe144e8d4ab1ddbc6ab261c9953f6ab 100644 GIT binary patch delta 400 zcmW-Z&r2Io6h`lz$xC7~f)GleU=tBcLXgDJP-s!8#-ixVn}kfrLWzT>O(@L-O|hVY z3lS+;3l~8U{{b-zJ3D_Zy0Q={vlAzP%99|IzrO>(a zJ-)C_S5(FgTKDwgn0@F8Aja(r@4&;S#`8?}NntdTu0X70y(z|uZ)dHl8A}!CUe~N@ zEMv};ExlybtV(&hpbrfe=B$^sd2_aCFZ85CcuHp~$0l`ZT)ItCMbof@jx~-!YUdoo zG$}Stbb9z1$ylOfb{@B=p5<7jyZcoQj#IQ_L`CF_(T$Jk#t7jAJ;;SH lPyM+NTZ;fBs899LVy**^XkD=H34j)vSsyh78=)UL|9_Xvcm)6e delta 419 zcmXYtJ4obU6ov0i^3Q0-sZ6TFV^7?a>Nq6q-C+bQ0CK07DIq4 zb^rj?Y=ch4E!?Gy)PnzLUFwLuarGcO4ghHEoa^H3iR%nz^FG0}0{_2sk3vzHt^=#+ z_*Sq%#6wz>8*$n{lB*Fj{@+k{S*JSgPTK02owHOeW~9`lm78#lad*abCPuSEvm?{C zH)f66Sfr`^n{7qe)H)N-yg49gwX{B^(0H8_Yw|$1+_>p%(rFe?~ diff --git a/build/stm32f7xx_hal_adc.lst b/build/stm32f7xx_hal_adc.lst index e0c50a0..24b17c5 100644 --- a/build/stm32f7xx_hal_adc.lst +++ b/build/stm32f7xx_hal_adc.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccMiLMrd.s page 1 +ARM GAS /tmp/ccYW4wvq.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** and in case of analog watchdog or overrun events 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (#) Single and continuous conversion modes. 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (#) Scan mode for automatic conversion of channel 0 to channel x. - ARM GAS /tmp/ccMiLMrd.s page 2 + ARM GAS /tmp/ccYW4wvq.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (#) Data alignment with in-built data coherency. @@ -118,7 +118,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (#) Optionally, configure the analog watchdog parameters (channels 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** monitored, thresholds, ...) using function HAL_ADC_AnalogWDGConfig(). 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 3 + ARM GAS /tmp/ccYW4wvq.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (#) Optionally, for devices with several ADC instances: configure the @@ -178,7 +178,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** *** Callback functions *** 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** ============================== 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** [..] - ARM GAS /tmp/ccMiLMrd.s page 4 + ARM GAS /tmp/ccYW4wvq.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (@) Callback functions must be implemented in user program: @@ -238,7 +238,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) MspInitCallback : ADC Msp Init callback 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) MspDeInitCallback : ADC Msp DeInit callback 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** This function takes as parameters the HAL peripheral handle, the Callback ID - ARM GAS /tmp/ccMiLMrd.s page 5 + ARM GAS /tmp/ccYW4wvq.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** and a pointer to the user callback function. @@ -298,7 +298,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Includes ------------------------------------------------------------------*/ 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** #include "stm32f7xx_hal.h" 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 6 + ARM GAS /tmp/ccYW4wvq.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /** @addtogroup STM32F7xx_HAL_Driver @@ -358,7 +358,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * channels group (scan mode activation, continuous mode activation, 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * External trigger source and edge, DMA continuous request after the 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * last transfer and End of conversion selection). - ARM GAS /tmp/ccMiLMrd.s page 7 + ARM GAS /tmp/ccYW4wvq.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @@ -418,7 +418,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Initialize ADC error code */ 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 8 + ARM GAS /tmp/ccYW4wvq.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Allocate lock resource and initialize it */ @@ -478,7 +478,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Set ADC state */ 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); - ARM GAS /tmp/ccMiLMrd.s page 9 + ARM GAS /tmp/ccYW4wvq.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -538,7 +538,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * the configuration information for the specified ADC. 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @retval None 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */ - ARM GAS /tmp/ccMiLMrd.s page 10 + ARM GAS /tmp/ccYW4wvq.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) @@ -598,7 +598,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** break; 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID : - ARM GAS /tmp/ccMiLMrd.s page 11 + ARM GAS /tmp/ccYW4wvq.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->ErrorCallback = pCallback; @@ -658,7 +658,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** return status; 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 12 + ARM GAS /tmp/ccYW4wvq.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Update the error code */ 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 13 + ARM GAS /tmp/ccYW4wvq.s page 13 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Return error status */ @@ -778,7 +778,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) Stop conversion of regular channel. 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) Start conversion of regular channel and enable interrupt. 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) Stop conversion of regular channel and disable interrupt. - ARM GAS /tmp/ccMiLMrd.s page 14 + ARM GAS /tmp/ccYW4wvq.s page 14 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) Start conversion of regular channel and enable DMA transfer. @@ -838,7 +838,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - ARM GAS /tmp/ccMiLMrd.s page 15 + ARM GAS /tmp/ccYW4wvq.s page 15 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } @@ -898,7 +898,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } 828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** else 829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { - ARM GAS /tmp/ccMiLMrd.s page 16 + ARM GAS /tmp/ccYW4wvq.s page 16 830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Update ADC state machine to error */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * in DMA mode and polling for end of each conversion (ADC init 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV). 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * In this case, DMA resets the flag EOC and polling cannot be - ARM GAS /tmp/ccMiLMrd.s page 17 + ARM GAS /tmp/ccYW4wvq.s page 17 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * performed on each conversion. Nevertheless, polling can still @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Clear regular group conversion flag */ 943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC); - ARM GAS /tmp/ccMiLMrd.s page 18 + ARM GAS /tmp/ccYW4wvq.s page 18 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY) 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout)) - ARM GAS /tmp/ccMiLMrd.s page 19 + ARM GAS /tmp/ccYW4wvq.s page 19 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); 1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Process locked */ - ARM GAS /tmp/ccMiLMrd.s page 20 + ARM GAS /tmp/ccYW4wvq.s page 20 1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** __HAL_LOCK(hadc); @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC operations) */ 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR); 1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 21 + ARM GAS /tmp/ccYW4wvq.s page 21 1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Enable end of conversion interrupt for regular group */ @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * the configuration information for the specified ADC. 1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @retval HAL status. 1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */ - ARM GAS /tmp/ccMiLMrd.s page 22 + ARM GAS /tmp/ccYW4wvq.s page 22 1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ 1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) - ARM GAS /tmp/ccMiLMrd.s page 23 + ARM GAS /tmp/ccYW4wvq.s page 23 1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group injected */ 1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* by external trigger, scan sequence on going or by automatic injected */ 1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* conversion from group regular (same conditions as group regular */ - ARM GAS /tmp/ccMiLMrd.s page 24 + ARM GAS /tmp/ccYW4wvq.s page 24 1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* interruption disabling above). */ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** tmp1 = tmp_sr & ADC_FLAG_OVR; 1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** tmp2 = tmp_cr1 & ADC_IT_OVR; 1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Check Overrun flag */ - ARM GAS /tmp/ccMiLMrd.s page 25 + ARM GAS /tmp/ccYW4wvq.s page 25 1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if(tmp1 && tmp2) @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** while(counter != 0) 1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** counter--; - ARM GAS /tmp/ccMiLMrd.s page 26 + ARM GAS /tmp/ccYW4wvq.s page 26 1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Enable ADC overrun interrupt */ 1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); 1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 27 + ARM GAS /tmp/ccYW4wvq.s page 27 1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Enable ADC DMA mode */ @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @retval HAL status 1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */ 1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) - ARM GAS /tmp/ccMiLMrd.s page 28 + ARM GAS /tmp/ccYW4wvq.s page 28 1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */ 1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) 1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { - ARM GAS /tmp/ccMiLMrd.s page 29 + ARM GAS /tmp/ccYW4wvq.s page 29 1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Return the selected ADC converted value */ @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * - If needed, restart a new ADC conversion using function 1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * "HAL_ADC_Start_DMA()" 1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * (this function is also clearing overrun flag) - ARM GAS /tmp/ccMiLMrd.s page 30 + ARM GAS /tmp/ccYW4wvq.s page 30 1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @param hadc pointer to a ADC_HandleTypeDef structure that contains @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ 1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if ((sConfig->Channel > ADC_CHANNEL_9) && (sConfig->Channel != ADC_INTERNAL_NONE)) 1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { - ARM GAS /tmp/ccMiLMrd.s page 31 + ARM GAS /tmp/ccYW4wvq.s page 31 1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Clear the old sample time */ @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Disable the VBAT & TSVREFE channel*/ 1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** ADC->CCR &= ~(ADC_CCR_VBATE | ADC_CCR_TSVREFE); 1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } - ARM GAS /tmp/ccMiLMrd.s page 32 + ARM GAS /tmp/ccYW4wvq.s page 32 1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */ 1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* Analog 1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { - ARM GAS /tmp/ccMiLMrd.s page 33 + ARM GAS /tmp/ccYW4wvq.s page 33 1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** #ifdef USE_FULL_ASSERT @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /** 1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @} 1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */ - ARM GAS /tmp/ccMiLMrd.s page 34 + ARM GAS /tmp/ccYW4wvq.s page 34 1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /** 1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @brief Initializes the ADCx peripheral according to the specified parameters 1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * in the ADC_InitStruct without initializing the ADC MSP. - ARM GAS /tmp/ccMiLMrd.s page 35 + ARM GAS /tmp/ccYW4wvq.s page 35 1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @param hadc pointer to a ADC_HandleTypeDef structure that contains @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->Instance->CR1 &= ~(ADC_CR1_RES); 66 .loc 1 1929 3 is_stmt 1 view .LVU17 67 .loc 1 1929 7 is_stmt 0 view .LVU18 - ARM GAS /tmp/ccMiLMrd.s page 36 + ARM GAS /tmp/ccYW4wvq.s page 36 68 0028 0268 ldr r2, [r0] @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Select external trigger to start conversion */ 1944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL); 109 .loc 1 1944 5 is_stmt 1 view .LVU38 - ARM GAS /tmp/ccMiLMrd.s page 37 + ARM GAS /tmp/ccYW4wvq.s page 37 110 .loc 1 1944 9 is_stmt 0 view .LVU39 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 149 .loc 1 1959 17 view .LVU58 150 0082 9368 ldr r3, [r2, #8] 151 .loc 1 1959 23 view .LVU59 - ARM GAS /tmp/ccMiLMrd.s page 38 + ARM GAS /tmp/ccYW4wvq.s page 38 152 0084 23F00203 bic r3, r3, #2 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 194 00b8 013A subs r2, r2, #1 195 .loc 1 1971 25 view .LVU81 196 00ba 43EA4233 orr r3, r3, r2, lsl #13 - ARM GAS /tmp/ccMiLMrd.s page 39 + ARM GAS /tmp/ccYW4wvq.s page 39 197 00be 4B60 str r3, [r1, #4] @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1987:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Enable or disable ADC end of conversion selection */ 1988:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->Instance->CR2 &= ~(ADC_CR2_EOCS); 236 .loc 1 1988 3 is_stmt 1 view .LVU100 - ARM GAS /tmp/ccMiLMrd.s page 40 + ARM GAS /tmp/ccYW4wvq.s page 40 237 .loc 1 1988 7 is_stmt 0 view .LVU101 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 278 .loc 1 1976 19 view .LVU120 279 0120 5368 ldr r3, [r2, #4] 1976:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } - ARM GAS /tmp/ccMiLMrd.s page 41 + ARM GAS /tmp/ccYW4wvq.s page 41 280 .loc 1 1976 25 view .LVU121 @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 323:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; 331 .loc 1 323 1 view .LVU129 332 0002 10B5 push {r4, lr} - ARM GAS /tmp/ccMiLMrd.s page 42 + ARM GAS /tmp/ccYW4wvq.s page 42 333 .LCFI0: @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 367 .LVL4: 404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 368 .loc 1 404 3 is_stmt 1 view .LVU150 - ARM GAS /tmp/ccMiLMrd.s page 43 + ARM GAS /tmp/ccYW4wvq.s page 43 404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 411 .cfi_def_cfa_offset 0 412 .cfi_restore 4 413 .cfi_restore 14 - ARM GAS /tmp/ccMiLMrd.s page 44 + ARM GAS /tmp/ccYW4wvq.s page 44 329:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 463 .loc 1 421 5 is_stmt 0 view .LVU171 464 0000 C8B1 cbz r0, .L27 417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; - ARM GAS /tmp/ccMiLMrd.s page 45 + ARM GAS /tmp/ccYW4wvq.s page 45 465 .loc 1 417 1 view .LVU172 @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 506 0030 6364 str r3, [r4, #68] 457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } 507 .loc 1 457 5 view .LVU186 - ARM GAS /tmp/ccMiLMrd.s page 46 + ARM GAS /tmp/ccYW4wvq.s page 46 457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 553 000a 012B cmp r3, #1 554 000c 7ED0 beq .L44 739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 47 + ARM GAS /tmp/ccYW4wvq.s page 47 555 .loc 1 739 3 discriminator 2 view .LVU198 @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 594 0042 002B cmp r3, #0 595 0044 F9D1 bne .L37 596 .L35: - ARM GAS /tmp/ccMiLMrd.s page 48 + ARM GAS /tmp/ccYW4wvq.s page 48 759:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 790:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 637 .loc 1 790 5 view .LVU228 794:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 49 + ARM GAS /tmp/ccYW4wvq.s page 49 638 .loc 1 794 5 view .LVU229 @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 677 .loc 1 809 9 view .LVU245 678 00b4 1D4A ldr r2, .L52+16 - ARM GAS /tmp/ccMiLMrd.s page 50 + ARM GAS /tmp/ccYW4wvq.s page 50 679 00b6 9342 cmp r3, r2 @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 718 .loc 1 820 37 discriminator 1 view .LVU260 719 00e4 12F0405F tst r2, #805306368 720 00e8 16D1 bne .L48 - ARM GAS /tmp/ccMiLMrd.s page 51 + ARM GAS /tmp/ccYW4wvq.s page 51 823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 838:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } 764 .loc 1 838 10 view .LVU272 765 0110 0020 movs r0, #0 - ARM GAS /tmp/ccMiLMrd.s page 52 + ARM GAS /tmp/ccYW4wvq.s page 52 766 .LVL28: @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 813 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 814 0004 012B cmp r3, #1 815 0006 17D0 beq .L57 - ARM GAS /tmp/ccMiLMrd.s page 53 + ARM GAS /tmp/ccYW4wvq.s page 53 857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 855 .loc 1 877 1 view .LVU296 856 003a 7047 bx lr 857 .L59: - ARM GAS /tmp/ccMiLMrd.s page 54 + ARM GAS /tmp/ccYW4wvq.s page 54 858 .align 2 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 904 .loc 1 917 15 is_stmt 0 view .LVU306 905 0018 FFF7FEFF bl HAL_GetTick 906 .LVL39: - ARM GAS /tmp/ccMiLMrd.s page 55 + ARM GAS /tmp/ccYW4wvq.s page 55 917:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 936:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } 944 .loc 1 936 18 is_stmt 0 view .LVU324 945 0048 0320 movs r0, #3 - ARM GAS /tmp/ccMiLMrd.s page 56 + ARM GAS /tmp/ccYW4wvq.s page 56 946 004a 33E0 b .L62 @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 986 007a 9A68 ldr r2, [r3, #8] 954:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) && 987 .loc 1 954 5 view .LVU339 - ARM GAS /tmp/ccMiLMrd.s page 57 + ARM GAS /tmp/ccYW4wvq.s page 57 988 007c 12F0405F tst r2, #805306368 @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1028 00b4 70BD pop {r4, r5, r6, pc} 1029 .LVL46: 1030 .L70: - ARM GAS /tmp/ccMiLMrd.s page 58 + ARM GAS /tmp/ccYW4wvq.s page 58 969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1078 .LVL49: 992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 1079 .loc 1 992 15 view .LVU363 - ARM GAS /tmp/ccMiLMrd.s page 59 + ARM GAS /tmp/ccYW4wvq.s page 59 1080 000e 8046 mov r8, r0 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1117 003a 0320 movs r0, #3 1118 003c 14E0 b .L82 1119 .L87: - ARM GAS /tmp/ccMiLMrd.s page 60 + ARM GAS /tmp/ccYW4wvq.s page 60 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1161 007c F4E7 b .L82 1162 .cfi_endproc 1163 .LFE148: - ARM GAS /tmp/ccMiLMrd.s page 61 + ARM GAS /tmp/ccYW4wvq.s page 61 1165 .section .text.HAL_ADC_Start_IT,"ax",%progbits @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1206 001e 13D1 bne .L91 1066:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 1207 .loc 1 1066 5 is_stmt 1 view .LVU408 - ARM GAS /tmp/ccMiLMrd.s page 62 + ARM GAS /tmp/ccYW4wvq.s page 62 1208 0020 9A68 ldr r2, [r3, #8] @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1249 005c 0264 str r2, [r0, #64] 1089:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 1250 .loc 1 1089 5 view .LVU422 - ARM GAS /tmp/ccMiLMrd.s page 63 + ARM GAS /tmp/ccYW4wvq.s page 63 1089:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1119:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 1291 .loc 1 1119 7 view .LVU437 1292 009c 13F01F0F tst r3, #31 - ARM GAS /tmp/ccMiLMrd.s page 64 + ARM GAS /tmp/ccYW4wvq.s page 64 1293 00a0 0DD1 bne .L98 @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 1332 .loc 1 1139 9 view .LVU453 1333 00ca 13F0100F tst r3, #16 - ARM GAS /tmp/ccMiLMrd.s page 65 + ARM GAS /tmp/ccYW4wvq.s page 65 1334 00ce 27D1 bne .L102 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } 1373 .loc 1 1160 10 view .LVU469 1374 00fe 0020 movs r0, #0 - ARM GAS /tmp/ccMiLMrd.s page 66 + ARM GAS /tmp/ccYW4wvq.s page 66 1375 .LVL58: @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1419 .LVL66: 1160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } 1420 .loc 1 1160 10 view .LVU480 - ARM GAS /tmp/ccMiLMrd.s page 67 + ARM GAS /tmp/ccYW4wvq.s page 67 1421 0122 F7E7 b .L90 @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1468 000e 0268 ldr r2, [r0] 1469 0010 9368 ldr r3, [r2, #8] 1470 0012 23F00103 bic r3, r3, #1 - ARM GAS /tmp/ccMiLMrd.s page 68 + ARM GAS /tmp/ccYW4wvq.s page 68 1471 0016 9360 str r3, [r2, #8] @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1512 0044 DFFFFFFB .word -67108897 1513 0048 FEEEFFFF .word -4354 1514 .cfi_endproc - ARM GAS /tmp/ccMiLMrd.s page 69 + ARM GAS /tmp/ccYW4wvq.s page 69 1515 .LFE150: @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 1560 .loc 1 1389 3 view .LVU514 1389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { - ARM GAS /tmp/ccMiLMrd.s page 70 + ARM GAS /tmp/ccYW4wvq.s page 70 1561 .loc 1 1389 11 is_stmt 0 view .LVU515 @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1601 004e 2068 ldr r0, [r4] 1602 0050 8268 ldr r2, [r0, #8] 1404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { - ARM GAS /tmp/ccMiLMrd.s page 71 + ARM GAS /tmp/ccYW4wvq.s page 71 1603 .loc 1 1404 5 view .LVU530 @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1438:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 1643 .loc 1 1438 40 view .LVU545 1644 0090 3548 ldr r0, .L135+12 - ARM GAS /tmp/ccMiLMrd.s page 72 + ARM GAS /tmp/ccYW4wvq.s page 72 1645 0092 D063 str r0, [r2, #60] @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1683 00c4 A06B ldr r0, [r4, #56] 1684 00c6 FFF7FEFF bl HAL_DMA_Start_IT 1685 .LVL77: - ARM GAS /tmp/ccMiLMrd.s page 73 + ARM GAS /tmp/ccYW4wvq.s page 73 1464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1725 .L126: 1483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 1726 .loc 1 1483 7 is_stmt 1 view .LVU577 - ARM GAS /tmp/ccMiLMrd.s page 74 + ARM GAS /tmp/ccYW4wvq.s page 74 1483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1765 .loc 1 1489 31 view .LVU593 1766 012a 42F08042 orr r2, r2, #1073741824 1767 012e 9A60 str r2, [r3, #8] - ARM GAS /tmp/ccMiLMrd.s page 75 + ARM GAS /tmp/ccYW4wvq.s page 75 1504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1812 .L131: 1504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } 1813 .loc 1 1504 10 view .LVU604 - ARM GAS /tmp/ccMiLMrd.s page 76 + ARM GAS /tmp/ccYW4wvq.s page 76 1814 0156 0020 movs r0, #0 @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1862 .loc 1 1521 3 discriminator 2 view .LVU612 1525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 1863 .loc 1 1525 3 view .LVU613 - ARM GAS /tmp/ccMiLMrd.s page 77 + ARM GAS /tmp/ccYW4wvq.s page 77 1864 0012 0268 ldr r2, [r0] @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1905 0050 2364 str r3, [r4, #64] 1906 0052 09E0 b .L139 1907 .LVL89: - ARM GAS /tmp/ccMiLMrd.s page 78 + ARM GAS /tmp/ccYW4wvq.s page 78 1908 .L148: @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1949 .L149: 1950 0074 FEEEFFFF .word -4354 1951 .cfi_endproc - ARM GAS /tmp/ccMiLMrd.s page 79 + ARM GAS /tmp/ccYW4wvq.s page 79 1952 .LFE153: @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2003 .weak HAL_ADC_ConvHalfCpltCallback 2004 .syntax unified 2005 .thumb - ARM GAS /tmp/ccMiLMrd.s page 80 + ARM GAS /tmp/ccYW4wvq.s page 80 2006 .thumb_func @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2020:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ 2021:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ 2022:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* HAL_ADC_Start_IT(), but is not disabled here because can be used */ - ARM GAS /tmp/ccMiLMrd.s page 81 + ARM GAS /tmp/ccYW4wvq.s page 81 2023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* by overrun IRQ process below. */ @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2039 .cfi_offset 3, -8 2040 .cfi_offset 14, -4 2069:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - ARM GAS /tmp/ccMiLMrd.s page 82 + ARM GAS /tmp/ccYW4wvq.s page 82 2041 .loc 1 2069 3 is_stmt 1 view .LVU653 @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2088 @ frame_needed = 0, uses_anonymous_args = 0 2089 @ link register save eliminated. 1635:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* NOTE : This function Should not be modified, when the callback is needed, - ARM GAS /tmp/ccMiLMrd.s page 83 + ARM GAS /tmp/ccYW4wvq.s page 83 2090 .loc 1 1635 3 view .LVU661 @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** tmp2 = tmp_cr1 & ADC_IT_EOC; 2134 .loc 1 1221 3 view .LVU674 1222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 84 + ARM GAS /tmp/ccYW4wvq.s page 84 2135 .loc 1 1222 3 view .LVU675 @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2173 .L162: 1249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 2174 .loc 1 1249 7 is_stmt 1 view .LVU692 - ARM GAS /tmp/ccMiLMrd.s page 85 + ARM GAS /tmp/ccYW4wvq.s page 85 2175 0040 5A68 ldr r2, [r3, #4] @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2214 .loc 1 1277 9 is_stmt 0 view .LVU707 2215 0078 236C ldr r3, [r4, #64] 1277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { - ARM GAS /tmp/ccMiLMrd.s page 86 + ARM GAS /tmp/ccYW4wvq.s page 86 2216 .loc 1 1277 8 view .LVU708 @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 2256 .loc 1 1295 7 is_stmt 1 view .LVU723 2257 00b6 5A68 ldr r2, [r3, #4] - ARM GAS /tmp/ccMiLMrd.s page 87 + ARM GAS /tmp/ccYW4wvq.s page 87 2258 00b8 22F08002 bic r2, r2, #128 @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2297 .loc 1 1322 7 view .LVU738 2298 00f0 13F0010F tst r3, #1 2299 00f4 05D1 bne .L170 - ARM GAS /tmp/ccMiLMrd.s page 88 + ARM GAS /tmp/ccYW4wvq.s page 88 2300 .L167: @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2342 .LVL119: 1363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } 2343 .loc 1 1363 5 view .LVU751 - ARM GAS /tmp/ccMiLMrd.s page 89 + ARM GAS /tmp/ccYW4wvq.s page 89 2344 0130 2368 ldr r3, [r4] @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2092:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->ErrorCallback(hadc); 2093:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** #else 2094:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); - ARM GAS /tmp/ccMiLMrd.s page 90 + ARM GAS /tmp/ccYW4wvq.s page 90 2384 .loc 1 2094 3 is_stmt 1 view .LVU762 @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2428 .loc 1 2015 5 is_stmt 1 view .LVU773 2015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) && 2429 .loc 1 2015 8 is_stmt 0 view .LVU774 - ARM GAS /tmp/ccMiLMrd.s page 91 + ARM GAS /tmp/ccYW4wvq.s page 91 2430 0016 0368 ldr r3, [r0] @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2470 0054 FFF7FEFF bl HAL_ADC_ConvCpltCallback 2471 .LVL126: 2472 .L174: - ARM GAS /tmp/ccMiLMrd.s page 92 + ARM GAS /tmp/ccYW4wvq.s page 92 2059:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2516 .loc 1 1671 1 is_stmt 1 view -0 2517 .cfi_startproc 2518 @ args = 0, pretend = 0, frame = 8 - ARM GAS /tmp/ccMiLMrd.s page 93 + ARM GAS /tmp/ccYW4wvq.s page 93 2519 @ frame_needed = 0, uses_anonymous_args = 0 @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1686:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 2558 .loc 1 1686 19 view .LVU817 2559 0028 E068 ldr r0, [r4, #12] - ARM GAS /tmp/ccMiLMrd.s page 94 + ARM GAS /tmp/ccYW4wvq.s page 94 2560 .LVL133: @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1691:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** } 2600 .loc 1 1691 29 view .LVU832 2601 0064 42EA0462 orr r2, r2, r4, lsl #24 - ARM GAS /tmp/ccMiLMrd.s page 95 + ARM GAS /tmp/ccYW4wvq.s page 95 2602 0068 C260 str r2, [r0, #12] @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2641 .loc 1 1712 9 is_stmt 0 view .LVU847 2642 009e 1C68 ldr r4, [r3] 1712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** - ARM GAS /tmp/ccMiLMrd.s page 96 + ARM GAS /tmp/ccYW4wvq.s page 96 2643 .loc 1 1712 19 view .LVU848 @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 2684 .loc 1 1754 3 is_stmt 1 view .LVU862 1754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { - ARM GAS /tmp/ccMiLMrd.s page 97 + ARM GAS /tmp/ccYW4wvq.s page 97 2685 .loc 1 1754 12 is_stmt 0 view .LVU863 @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2727 00fa 02EB8202 add r2, r2, r2, lsl #2 2728 00fe 233A subs r2, r2, #35 2729 0100 1F24 movs r4, #31 - ARM GAS /tmp/ccMiLMrd.s page 98 + ARM GAS /tmp/ccYW4wvq.s page 98 2730 0102 04FA02F2 lsl r2, r4, r2 @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2769 013e 4A68 ldr r2, [r1, #4] 2770 0140 02EB8202 add r2, r2, r2, lsl #2 2771 0144 413A subs r2, r2, #65 - ARM GAS /tmp/ccMiLMrd.s page 99 + ARM GAS /tmp/ccYW4wvq.s page 99 2772 0146 0C88 ldrh r4, [r1] @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2812 .L200: 1754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 2813 .loc 1 1754 44 discriminator 1 view .LVU905 - ARM GAS /tmp/ccMiLMrd.s page 100 + ARM GAS /tmp/ccYW4wvq.s page 100 2814 0180 0A68 ldr r2, [r1] @@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { 2854 .loc 1 1767 7 is_stmt 1 view .LVU920 1767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** { - ARM GAS /tmp/ccMiLMrd.s page 101 + ARM GAS /tmp/ccYW4wvq.s page 101 2855 .loc 1 1767 12 is_stmt 0 view .LVU921 @@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2903 .loc 1 1805 3 view .LVU929 1806:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 2904 .loc 1 1806 3 view .LVU930 - ARM GAS /tmp/ccMiLMrd.s page 102 + ARM GAS /tmp/ccYW4wvq.s page 102 1815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 1832:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** 2944 .loc 1 1832 7 is_stmt 0 view .LVU946 2945 002c 1868 ldr r0, [r3] - ARM GAS /tmp/ccMiLMrd.s page 103 + ARM GAS /tmp/ccYW4wvq.s page 103 1832:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 2981 0050 8A89 ldrh r2, [r1, #12] 2982 0052 2243 orrs r2, r2, r4 2983 0054 4260 str r2, [r0, #4] - ARM GAS /tmp/ccMiLMrd.s page 104 + ARM GAS /tmp/ccYW4wvq.s page 104 1847:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** @@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccMiLMrd.s page 1 3030 .thumb 3031 .thumb_func 3033 HAL_ADC_GetState: - ARM GAS /tmp/ccMiLMrd.s page 105 + ARM GAS /tmp/ccYW4wvq.s page 105 3034 .LVL148: @@ -6297,76 +6297,76 @@ ARM GAS /tmp/ccMiLMrd.s page 1 3082 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h" 3083 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h" 3084 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/ccMiLMrd.s page 106 + ARM GAS /tmp/ccYW4wvq.s page 106 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_adc.c - /tmp/ccMiLMrd.s:20 .text.ADC_Init:00000000 $t - /tmp/ccMiLMrd.s:25 .text.ADC_Init:00000000 ADC_Init - /tmp/ccMiLMrd.s:287 .text.ADC_Init:0000012c $d - /tmp/ccMiLMrd.s:293 .text.HAL_ADC_MspInit:00000000 $t - /tmp/ccMiLMrd.s:299 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit - /tmp/ccMiLMrd.s:314 .text.HAL_ADC_Init:00000000 $t - /tmp/ccMiLMrd.s:320 .text.HAL_ADC_Init:00000000 HAL_ADC_Init - /tmp/ccMiLMrd.s:422 .text.HAL_ADC_Init:00000054 $d - /tmp/ccMiLMrd.s:427 .text.HAL_ADC_MspDeInit:00000000 $t - /tmp/ccMiLMrd.s:433 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit - /tmp/ccMiLMrd.s:448 .text.HAL_ADC_DeInit:00000000 $t - /tmp/ccMiLMrd.s:454 .text.HAL_ADC_DeInit:00000000 HAL_ADC_DeInit - /tmp/ccMiLMrd.s:526 .text.HAL_ADC_Start:00000000 $t - /tmp/ccMiLMrd.s:532 .text.HAL_ADC_Start:00000000 HAL_ADC_Start - /tmp/ccMiLMrd.s:786 .text.HAL_ADC_Start:0000011c $d - /tmp/ccMiLMrd.s:796 .text.HAL_ADC_Stop:00000000 $t - /tmp/ccMiLMrd.s:802 .text.HAL_ADC_Stop:00000000 HAL_ADC_Stop - /tmp/ccMiLMrd.s:860 .text.HAL_ADC_Stop:0000003c $d - /tmp/ccMiLMrd.s:865 .text.HAL_ADC_PollForConversion:00000000 $t - /tmp/ccMiLMrd.s:871 .text.HAL_ADC_PollForConversion:00000000 HAL_ADC_PollForConversion - /tmp/ccMiLMrd.s:1045 .text.HAL_ADC_PollForEvent:00000000 $t - /tmp/ccMiLMrd.s:1051 .text.HAL_ADC_PollForEvent:00000000 HAL_ADC_PollForEvent - /tmp/ccMiLMrd.s:1166 .text.HAL_ADC_Start_IT:00000000 $t - /tmp/ccMiLMrd.s:1172 .text.HAL_ADC_Start_IT:00000000 HAL_ADC_Start_IT - /tmp/ccMiLMrd.s:1432 .text.HAL_ADC_Start_IT:00000128 $d - /tmp/ccMiLMrd.s:1443 .text.HAL_ADC_Stop_IT:00000000 $t - /tmp/ccMiLMrd.s:1449 .text.HAL_ADC_Stop_IT:00000000 HAL_ADC_Stop_IT - /tmp/ccMiLMrd.s:1512 .text.HAL_ADC_Stop_IT:00000044 $d - /tmp/ccMiLMrd.s:1518 .text.HAL_ADC_Start_DMA:00000000 $t - /tmp/ccMiLMrd.s:1524 .text.HAL_ADC_Start_DMA:00000000 HAL_ADC_Start_DMA - /tmp/ccMiLMrd.s:1819 .text.HAL_ADC_Start_DMA:0000015c $d - /tmp/ccMiLMrd.s:2398 .text.ADC_DMAConvCplt:00000000 ADC_DMAConvCplt - /tmp/ccMiLMrd.s:2028 .text.ADC_DMAHalfConvCplt:00000000 ADC_DMAHalfConvCplt - /tmp/ccMiLMrd.s:2357 .text.ADC_DMAError:00000000 ADC_DMAError - /tmp/ccMiLMrd.s:1832 .text.HAL_ADC_Stop_DMA:00000000 $t - /tmp/ccMiLMrd.s:1838 .text.HAL_ADC_Stop_DMA:00000000 HAL_ADC_Stop_DMA - /tmp/ccMiLMrd.s:1950 .text.HAL_ADC_Stop_DMA:00000074 $d - /tmp/ccMiLMrd.s:1955 .text.HAL_ADC_GetValue:00000000 $t - /tmp/ccMiLMrd.s:1961 .text.HAL_ADC_GetValue:00000000 HAL_ADC_GetValue - /tmp/ccMiLMrd.s:1981 .text.HAL_ADC_ConvCpltCallback:00000000 $t - /tmp/ccMiLMrd.s:1987 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback - /tmp/ccMiLMrd.s:2002 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t - /tmp/ccMiLMrd.s:2008 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback - /tmp/ccMiLMrd.s:2023 .text.ADC_DMAHalfConvCplt:00000000 $t - /tmp/ccMiLMrd.s:2055 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 $t - /tmp/ccMiLMrd.s:2061 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 HAL_ADC_LevelOutOfWindowCallback - /tmp/ccMiLMrd.s:2076 .text.HAL_ADC_ErrorCallback:00000000 $t - /tmp/ccMiLMrd.s:2082 .text.HAL_ADC_ErrorCallback:00000000 HAL_ADC_ErrorCallback - /tmp/ccMiLMrd.s:2097 .text.HAL_ADC_IRQHandler:00000000 $t - /tmp/ccMiLMrd.s:2103 .text.HAL_ADC_IRQHandler:00000000 HAL_ADC_IRQHandler - /tmp/ccMiLMrd.s:2352 .text.ADC_DMAError:00000000 $t - /tmp/ccMiLMrd.s:2393 .text.ADC_DMAConvCplt:00000000 $t - /tmp/ccMiLMrd.s:2507 .text.HAL_ADC_ConfigChannel:00000000 $t - /tmp/ccMiLMrd.s:2513 .text.HAL_ADC_ConfigChannel:00000000 HAL_ADC_ConfigChannel - /tmp/ccMiLMrd.s:2879 .text.HAL_ADC_ConfigChannel:000001d0 $d - ARM GAS /tmp/ccMiLMrd.s page 107 + /tmp/ccYW4wvq.s:20 .text.ADC_Init:00000000 $t + /tmp/ccYW4wvq.s:25 .text.ADC_Init:00000000 ADC_Init + /tmp/ccYW4wvq.s:287 .text.ADC_Init:0000012c $d + /tmp/ccYW4wvq.s:293 .text.HAL_ADC_MspInit:00000000 $t + /tmp/ccYW4wvq.s:299 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit + /tmp/ccYW4wvq.s:314 .text.HAL_ADC_Init:00000000 $t + /tmp/ccYW4wvq.s:320 .text.HAL_ADC_Init:00000000 HAL_ADC_Init + /tmp/ccYW4wvq.s:422 .text.HAL_ADC_Init:00000054 $d + /tmp/ccYW4wvq.s:427 .text.HAL_ADC_MspDeInit:00000000 $t + /tmp/ccYW4wvq.s:433 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit + /tmp/ccYW4wvq.s:448 .text.HAL_ADC_DeInit:00000000 $t + /tmp/ccYW4wvq.s:454 .text.HAL_ADC_DeInit:00000000 HAL_ADC_DeInit + /tmp/ccYW4wvq.s:526 .text.HAL_ADC_Start:00000000 $t + /tmp/ccYW4wvq.s:532 .text.HAL_ADC_Start:00000000 HAL_ADC_Start + /tmp/ccYW4wvq.s:786 .text.HAL_ADC_Start:0000011c $d + /tmp/ccYW4wvq.s:796 .text.HAL_ADC_Stop:00000000 $t + /tmp/ccYW4wvq.s:802 .text.HAL_ADC_Stop:00000000 HAL_ADC_Stop + /tmp/ccYW4wvq.s:860 .text.HAL_ADC_Stop:0000003c $d + /tmp/ccYW4wvq.s:865 .text.HAL_ADC_PollForConversion:00000000 $t + /tmp/ccYW4wvq.s:871 .text.HAL_ADC_PollForConversion:00000000 HAL_ADC_PollForConversion + /tmp/ccYW4wvq.s:1045 .text.HAL_ADC_PollForEvent:00000000 $t + /tmp/ccYW4wvq.s:1051 .text.HAL_ADC_PollForEvent:00000000 HAL_ADC_PollForEvent + /tmp/ccYW4wvq.s:1166 .text.HAL_ADC_Start_IT:00000000 $t + /tmp/ccYW4wvq.s:1172 .text.HAL_ADC_Start_IT:00000000 HAL_ADC_Start_IT + /tmp/ccYW4wvq.s:1432 .text.HAL_ADC_Start_IT:00000128 $d + /tmp/ccYW4wvq.s:1443 .text.HAL_ADC_Stop_IT:00000000 $t + /tmp/ccYW4wvq.s:1449 .text.HAL_ADC_Stop_IT:00000000 HAL_ADC_Stop_IT + /tmp/ccYW4wvq.s:1512 .text.HAL_ADC_Stop_IT:00000044 $d + /tmp/ccYW4wvq.s:1518 .text.HAL_ADC_Start_DMA:00000000 $t + /tmp/ccYW4wvq.s:1524 .text.HAL_ADC_Start_DMA:00000000 HAL_ADC_Start_DMA + /tmp/ccYW4wvq.s:1819 .text.HAL_ADC_Start_DMA:0000015c $d + /tmp/ccYW4wvq.s:2398 .text.ADC_DMAConvCplt:00000000 ADC_DMAConvCplt + /tmp/ccYW4wvq.s:2028 .text.ADC_DMAHalfConvCplt:00000000 ADC_DMAHalfConvCplt + /tmp/ccYW4wvq.s:2357 .text.ADC_DMAError:00000000 ADC_DMAError + /tmp/ccYW4wvq.s:1832 .text.HAL_ADC_Stop_DMA:00000000 $t + /tmp/ccYW4wvq.s:1838 .text.HAL_ADC_Stop_DMA:00000000 HAL_ADC_Stop_DMA + /tmp/ccYW4wvq.s:1950 .text.HAL_ADC_Stop_DMA:00000074 $d + /tmp/ccYW4wvq.s:1955 .text.HAL_ADC_GetValue:00000000 $t + /tmp/ccYW4wvq.s:1961 .text.HAL_ADC_GetValue:00000000 HAL_ADC_GetValue + /tmp/ccYW4wvq.s:1981 .text.HAL_ADC_ConvCpltCallback:00000000 $t + /tmp/ccYW4wvq.s:1987 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback + /tmp/ccYW4wvq.s:2002 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t + /tmp/ccYW4wvq.s:2008 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback + /tmp/ccYW4wvq.s:2023 .text.ADC_DMAHalfConvCplt:00000000 $t + /tmp/ccYW4wvq.s:2055 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 $t + /tmp/ccYW4wvq.s:2061 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 HAL_ADC_LevelOutOfWindowCallback + /tmp/ccYW4wvq.s:2076 .text.HAL_ADC_ErrorCallback:00000000 $t + /tmp/ccYW4wvq.s:2082 .text.HAL_ADC_ErrorCallback:00000000 HAL_ADC_ErrorCallback + /tmp/ccYW4wvq.s:2097 .text.HAL_ADC_IRQHandler:00000000 $t + /tmp/ccYW4wvq.s:2103 .text.HAL_ADC_IRQHandler:00000000 HAL_ADC_IRQHandler + /tmp/ccYW4wvq.s:2352 .text.ADC_DMAError:00000000 $t + /tmp/ccYW4wvq.s:2393 .text.ADC_DMAConvCplt:00000000 $t + /tmp/ccYW4wvq.s:2507 .text.HAL_ADC_ConfigChannel:00000000 $t + /tmp/ccYW4wvq.s:2513 .text.HAL_ADC_ConfigChannel:00000000 HAL_ADC_ConfigChannel + /tmp/ccYW4wvq.s:2879 .text.HAL_ADC_ConfigChannel:000001d0 $d + ARM GAS /tmp/ccYW4wvq.s page 107 - /tmp/ccMiLMrd.s:2888 .text.HAL_ADC_AnalogWDGConfig:00000000 $t - /tmp/ccMiLMrd.s:2894 .text.HAL_ADC_AnalogWDGConfig:00000000 HAL_ADC_AnalogWDGConfig - /tmp/ccMiLMrd.s:3022 .text.HAL_ADC_AnalogWDGConfig:00000074 $d - /tmp/ccMiLMrd.s:3027 .text.HAL_ADC_GetState:00000000 $t - /tmp/ccMiLMrd.s:3033 .text.HAL_ADC_GetState:00000000 HAL_ADC_GetState - /tmp/ccMiLMrd.s:3051 .text.HAL_ADC_GetError:00000000 $t - /tmp/ccMiLMrd.s:3057 .text.HAL_ADC_GetError:00000000 HAL_ADC_GetError + /tmp/ccYW4wvq.s:2888 .text.HAL_ADC_AnalogWDGConfig:00000000 $t + /tmp/ccYW4wvq.s:2894 .text.HAL_ADC_AnalogWDGConfig:00000000 HAL_ADC_AnalogWDGConfig + /tmp/ccYW4wvq.s:3022 .text.HAL_ADC_AnalogWDGConfig:00000074 $d + /tmp/ccYW4wvq.s:3027 .text.HAL_ADC_GetState:00000000 $t + /tmp/ccYW4wvq.s:3033 .text.HAL_ADC_GetState:00000000 HAL_ADC_GetState + /tmp/ccYW4wvq.s:3051 .text.HAL_ADC_GetError:00000000 $t + /tmp/ccYW4wvq.s:3057 .text.HAL_ADC_GetError:00000000 HAL_ADC_GetError UNDEFINED SYMBOLS SystemCoreClock diff --git a/build/stm32f7xx_hal_adc.o b/build/stm32f7xx_hal_adc.o index 777df97d577f43cfb95ffee4c6a16ed202a646d3..078e48364f649a67cb8b0d851321e6dfd5140611 100644 GIT binary patch delta 1329 zcmZ8hZETZO6u#%SecQWr>*uvjK(OV^Q?%dZXmZ(^HTZOG+2KQL{;T!zk(hO%YU@Zg- zHd&tt-=|*mT{by9?h7(aCmp5V#kUfR-mD)GJ%q(2i3U|&OmyQ%^n3{Ctj}38skE9h zihs0NV|x_(aJMZ8tMIg~5N_fJwo$CZdI<6{iAP@Q)XKXsH^Gkh(|(~=L?vy~9QWrr)6 z2}hJC{|h(LNMOzXcorV=MDxoY3Mf%B0FTugh?D=&B`WgoayA z%RMby@6a{g&1UQ(1y0G}ce0rd-DdfEw$Q;fv`A0H*+f+1&RW=tpF2;G-|h;NO}p%n zh3~q`$)9u8f)yR^2J*MLSCfC(T~GduJM73bu)r&21C>U`?6ip1?Fmppy{D9HzenED zS}|8Q0(`^VXPoKgb3Zg;35zhIiIOFnF%y{@|IFZdyBmL)=A8FD=bZbz z=Xu|IdwvUUZNWPpNgcbsy~`xm7#TC!aMl!f;faAUNpH9Wv?Lh{Xwh{fQJn7xFb6`gyZ}_cd6+U&f8( zj6ff4qFd3DK|Ubhss_vXuz(LVSjivju_Waz?7*8T0r(vsr+DCbOjcYa9}qQD+YYuf zU@1lrBkM20_Yz~uPMLu66$t{S>lB4gbT_CVCFvLOnBss77*qW45HBm)uz=qv{?2TA zL=KuJs9A`SXbAZw4XXSqsg^4=Xyw0(=7Sn^@D|ZrtHE@RqS~NA55I#AY6cYGYie=n zQ<_;)_6dc`J@R^Gf|w0V_ahbLekoZ`xpH#mF(NrGzoiyZfsf*<>i4V*-nq;L7uAnb918i86 zy06&988b#K;_xJ|pXqvNE90xuE5u?{jl;a3FkcX8RMW-yDO{xIi*O~i#hfV3X(bca z8E~&<4~*hTiywUWp(O*>@k>h{{D$k6tFVD@TQlJXUb6-$Ub8lm-<5WR{2OWcgR@=_Cgb@G0}2hA*pZf?uw^e56m z`NjXz4Rj>1`+q!Z&v+{B`OgGo%LxI?wEYqp3E09}yAbfHy{$aK88Va#&LACb0hw!4 zj2<#nKYEU_Ym_)Ik`Ki&A;S^zde+g#d&x*o&{0EFGmbLo!aI)lDeiO@lb>^1LBT7| z0*Y6hWnf2}tBT@du3Z$La~-01$yIDi46r5@i2;gCj9JNu*5&q5!y$Jb`60Ksqj~pk z_zRcZF4$Oj?;;ZOWIo@@BLma#o} YyVio9X_fvT3a4|4_bB=I@XWORUv1tzrvLx| diff --git a/build/stm32f7xx_hal_adc_ex.lst b/build/stm32f7xx_hal_adc_ex.lst index 292a496..b716521 100644 --- a/build/stm32f7xx_hal_adc_ex.lst +++ b/build/stm32f7xx_hal_adc_ex.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/cc5LZY9S.s page 1 +ARM GAS /tmp/ccGev6kP.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_RCC_GPIOx_CLK_ENABLE() 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init() 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (##) In case of using interrupts (e.g. HAL_ADC_Start_IT()) - ARM GAS /tmp/cc5LZY9S.s page 2 + ARM GAS /tmp/ccGev6kP.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority() @@ -118,7 +118,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Includes ------------------------------------------------------------------*/ 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** #include "stm32f7xx_hal.h" 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** - ARM GAS /tmp/cc5LZY9S.s page 3 + ARM GAS /tmp/ccGev6kP.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /** @addtogroup STM32F7xx_HAL_Driver @@ -178,7 +178,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** * @param hadc pointer to a ADC_HandleTypeDef structure that contains 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** * the configuration information for the specified ADC. 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** * @retval HAL status - ARM GAS /tmp/cc5LZY9S.s page 4 + ARM GAS /tmp/ccGev6kP.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** */ @@ -238,7 +238,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Check if Multimode enabled */ - ARM GAS /tmp/cc5LZY9S.s page 5 + ARM GAS /tmp/ccGev6kP.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI)) @@ -298,7 +298,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Enable the Peripheral */ 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_ADC_ENABLE(hadc); - ARM GAS /tmp/cc5LZY9S.s page 6 + ARM GAS /tmp/ccGev6kP.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** @@ -358,7 +358,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); - ARM GAS /tmp/cc5LZY9S.s page 7 + ARM GAS /tmp/ccGev6kP.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** if((hadc->Instance == ADC1) && tmp1 && tmp2) @@ -418,7 +418,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */ 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON)) - ARM GAS /tmp/cc5LZY9S.s page 8 + ARM GAS /tmp/ccGev6kP.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { @@ -478,7 +478,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** } 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Clear injected group conversion flag */ - ARM GAS /tmp/cc5LZY9S.s page 9 + ARM GAS /tmp/ccGev6kP.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC); @@ -538,7 +538,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Conditioned to: */ 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* - No conversion on the other group (regular group) is intended to */ 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* continue (injected and regular groups stop conversion and ADC disable */ - ARM GAS /tmp/cc5LZY9S.s page 10 + ARM GAS /tmp/ccGev6kP.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* are common) */ @@ -598,7 +598,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Clear injected group conversion flag to have similar behaviour as */ 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* regular group: reading data register also clears end of conversion flag. */ - ARM GAS /tmp/cc5LZY9S.s page 11 + ARM GAS /tmp/ccGev6kP.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); @@ -658,7 +658,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Check if ADC peripheral is disabled in order to enable it and wait during 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** Tstab time the ADC's stabilization */ 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) - ARM GAS /tmp/cc5LZY9S.s page 12 + ARM GAS /tmp/ccGev6kP.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { @@ -718,7 +718,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ; 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ - ARM GAS /tmp/cc5LZY9S.s page 13 + ARM GAS /tmp/ccGev6kP.s page 13 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* start (in case of SW start): */ @@ -778,7 +778,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Process locked */ - ARM GAS /tmp/cc5LZY9S.s page 14 + ARM GAS /tmp/ccGev6kP.s page 14 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_LOCK(hadc); @@ -838,7 +838,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc) 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */ - ARM GAS /tmp/cc5LZY9S.s page 15 + ARM GAS /tmp/ccGev6kP.s page 15 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** UNUSED(hadc); @@ -898,7 +898,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Clear the old sample time */ 828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel); 829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** - ARM GAS /tmp/cc5LZY9S.s page 16 + ARM GAS /tmp/ccGev6kP.s page 16 830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Set the new sample time */ @@ -958,7 +958,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** else 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Disable the selected ADC injected discontinuous mode */ - ARM GAS /tmp/cc5LZY9S.s page 17 + ARM GAS /tmp/ccGev6kP.s page 17 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN); @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** * @retval HAL status 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** */ 943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* m - ARM GAS /tmp/cc5LZY9S.s page 18 + ARM GAS /tmp/ccGev6kP.s page 18 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* of end of sequence. */ 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (hadc->Init.ContinuousConvMode == DISABLE) && - ARM GAS /tmp/cc5LZY9S.s page 19 + ARM GAS /tmp/ccGev6kP.s page 19 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 33 0000 08B5 push {r3, lr} 34 .LCFI0: 35 .cfi_def_cfa_offset 8 - ARM GAS /tmp/cc5LZY9S.s page 20 + ARM GAS /tmp/ccGev6kP.s page 20 36 .cfi_offset 3, -8 @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 82 0002 806B ldr r0, [r0, #56] 83 .LVL5: 1039:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** } - ARM GAS /tmp/cc5LZY9S.s page 21 + ARM GAS /tmp/ccGev6kP.s page 21 84 .loc 1 1039 5 is_stmt 0 view .LVU15 @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (hadc->Init.ContinuousConvMode == DISABLE) && 129 .loc 1 999 7 view .LVU27 130 0018 11F0405F tst r1, #805306368 - ARM GAS /tmp/cc5LZY9S.s page 22 + ARM GAS /tmp/ccGev6kP.s page 22 131 001c 19D1 bne .L7 @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 171 .LVL10: 172 .L5: 1027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** - ARM GAS /tmp/cc5LZY9S.s page 23 + ARM GAS /tmp/ccGev6kP.s page 23 173 .loc 1 1027 1 view .LVU42 @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 217 .loc 1 153 3 view .LVU54 218 0006 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 219 000a 012B cmp r3, #1 - ARM GAS /tmp/cc5LZY9S.s page 24 + ARM GAS /tmp/ccGev6kP.s page 24 220 000c 65D0 beq .L19 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 258 .loc 1 167 19 is_stmt 1 view .LVU70 259 0040 019B ldr r3, [sp, #4] 260 0042 002B cmp r3, #0 - ARM GAS /tmp/cc5LZY9S.s page 25 + ARM GAS /tmp/ccGev6kP.s page 25 261 0044 F9D1 bne .L15 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 300 007c 0ED1 bne .L18 205:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); 301 .loc 1 205 7 is_stmt 1 view .LVU86 - ARM GAS /tmp/cc5LZY9S.s page 26 + ARM GAS /tmp/ccGev6kP.s page 26 205:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 341 .LVL22: 217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { 342 .loc 1 217 7 is_stmt 1 view .LVU102 - ARM GAS /tmp/cc5LZY9S.s page 27 + ARM GAS /tmp/ccGev6kP.s page 27 217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 384 .cfi_remember_state 385 .cfi_def_cfa_offset 0 386 @ sp needed - ARM GAS /tmp/cc5LZY9S.s page 28 + ARM GAS /tmp/ccGev6kP.s page 28 387 00d8 7047 bx lr @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 436 0000 82B0 sub sp, sp, #8 437 .LCFI6: 438 .cfi_def_cfa_offset 8 - ARM GAS /tmp/cc5LZY9S.s page 29 + ARM GAS /tmp/ccGev6kP.s page 29 246:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** uint32_t tmp1 = 0, tmp2 = 0; @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { 477 .loc 1 264 5 is_stmt 1 view .LVU139 264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { - ARM GAS /tmp/cc5LZY9S.s page 30 + ARM GAS /tmp/ccGev6kP.s page 30 478 .loc 1 264 10 is_stmt 0 view .LVU140 @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 519 .loc 1 293 5 view .LVU154 297:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** - ARM GAS /tmp/cc5LZY9S.s page 31 + ARM GAS /tmp/ccGev6kP.s page 31 520 .loc 1 297 5 view .LVU155 @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 559 00a2 0020 movs r0, #0 560 .LVL37: 334:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** } - ARM GAS /tmp/cc5LZY9S.s page 32 + ARM GAS /tmp/ccGev6kP.s page 32 561 .loc 1 334 10 view .LVU171 @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 601 .LVL43: 602 .L32: 327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** - ARM GAS /tmp/cc5LZY9S.s page 33 + ARM GAS /tmp/ccGev6kP.s page 33 603 .loc 1 327 5 is_stmt 1 view .LVU186 @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 649 00fc 00230140 .word 1073816320 650 0100 00200140 .word 1073815552 651 .cfi_endproc - ARM GAS /tmp/cc5LZY9S.s page 34 + ARM GAS /tmp/ccGev6kP.s page 34 652 .LFE142: @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 370:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 695 .loc 1 370 5 is_stmt 1 view .LVU208 696 0022 9168 ldr r1, [r2, #8] - ARM GAS /tmp/cc5LZY9S.s page 35 + ARM GAS /tmp/ccGev6kP.s page 35 697 0024 21F00101 bic r1, r1, #1 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 737 .LVL56: 738 .L48: 351:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** - ARM GAS /tmp/cc5LZY9S.s page 36 + ARM GAS /tmp/ccGev6kP.s page 36 739 .loc 1 351 21 view .LVU223 @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 787 .LVL62: 408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 788 .loc 1 408 15 view .LVU232 - ARM GAS /tmp/cc5LZY9S.s page 37 + ARM GAS /tmp/ccGev6kP.s page 37 789 000a 0646 mov r6, r0 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 825 .loc 1 424 18 is_stmt 0 view .LVU250 826 0032 0320 movs r0, #3 827 0034 32E0 b .L56 - ARM GAS /tmp/cc5LZY9S.s page 38 + ARM GAS /tmp/ccGev6kP.s page 38 828 .L67: @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 868 0070 17D1 bne .L61 446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) ) ) 869 .loc 1 446 8 view .LVU265 - ARM GAS /tmp/cc5LZY9S.s page 39 + ARM GAS /tmp/ccGev6kP.s page 39 870 0072 9B68 ldr r3, [r3, #8] @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 912 .L63: 459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** } 913 .loc 1 459 10 view .LVU278 - ARM GAS /tmp/cc5LZY9S.s page 40 + ARM GAS /tmp/ccGev6kP.s page 40 914 00aa 0020 movs r0, #0 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 958 0018 0268 ldr r2, [r0] 959 001a 5168 ldr r1, [r2, #4] 490:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) ) - ARM GAS /tmp/cc5LZY9S.s page 41 + ARM GAS /tmp/ccGev6kP.s page 41 960 .loc 1 490 57 discriminator 1 view .LVU291 @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 1002 .loc 1 518 3 view .LVU304 1003 0056 0022 movs r2, #0 - ARM GAS /tmp/cc5LZY9S.s page 42 + ARM GAS /tmp/ccGev6kP.s page 42 1004 0058 83F83C20 strb r2, [r3, #60] @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 1050 .loc 1 538 17 is_stmt 0 view .LVU315 1051 0002 0023 movs r3, #0 - ARM GAS /tmp/cc5LZY9S.s page 43 + ARM GAS /tmp/ccGev6kP.s page 43 1052 0004 0193 str r3, [sp, #4] @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1094 .LCFI12: 1095 .cfi_restore_state 557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** } - ARM GAS /tmp/cc5LZY9S.s page 44 + ARM GAS /tmp/ccGev6kP.s page 44 1096 .loc 1 557 7 is_stmt 1 view .LVU328 @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __IO uint32_t counter = 0; 1138 .loc 1 588 1 view -0 1139 .cfi_startproc - ARM GAS /tmp/cc5LZY9S.s page 45 + ARM GAS /tmp/ccGev6kP.s page 45 1140 @ args = 0, pretend = 0, frame = 8 @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1179 001e 10F0010F tst r0, #1 1180 0022 13D1 bne .L87 604:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** - ARM GAS /tmp/cc5LZY9S.s page 46 + ARM GAS /tmp/ccGev6kP.s page 46 1181 .loc 1 604 5 is_stmt 1 view .LVU359 @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1222 005c 42F48072 orr r2, r2, #256 1223 0060 2264 str r2, [r4, #64] 627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { - ARM GAS /tmp/cc5LZY9S.s page 47 + ARM GAS /tmp/ccGev6kP.s page 47 1224 .loc 1 627 5 view .LVU373 @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1262 0094 2248 ldr r0, .L99+16 1263 0096 1064 str r0, [r2, #64] 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** - ARM GAS /tmp/cc5LZY9S.s page 48 + ARM GAS /tmp/ccGev6kP.s page 48 1264 .loc 1 656 5 is_stmt 1 view .LVU390 @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1303 .loc 1 683 23 view .LVU405 1304 00cc 9A68 ldr r2, [r3, #8] 683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { - ARM GAS /tmp/cc5LZY9S.s page 49 + ARM GAS /tmp/ccGev6kP.s page 49 1305 .loc 1 683 7 view .LVU406 @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 1347 .loc 1 700 1 view .LVU419 1348 0104 03B0 add sp, sp, #12 - ARM GAS /tmp/cc5LZY9S.s page 50 + ARM GAS /tmp/ccGev6kP.s page 50 1349 .LCFI15: @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1398 .loc 1 716 3 view .LVU426 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 1399 .loc 1 716 3 view .LVU427 - ARM GAS /tmp/cc5LZY9S.s page 51 + ARM GAS /tmp/ccGev6kP.s page 51 1400 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1440 .loc 1 726 5 is_stmt 1 view .LVU441 726:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 1441 .loc 1 726 8 is_stmt 0 view .LVU442 - ARM GAS /tmp/cc5LZY9S.s page 52 + ARM GAS /tmp/ccGev6kP.s page 52 1442 0030 0A4A ldr r2, .L111 @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1489 .thumb 1490 .thumb_func 1492 HAL_ADCEx_MultiModeGetValue: - ARM GAS /tmp/cc5LZY9S.s page 53 + ARM GAS /tmp/ccGev6kP.s page 53 1493 .LVL98: @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1543 HAL_ADCEx_InjectedConfigChannel: 1544 .LVL101: 1545 .LFB151: - ARM GAS /tmp/cc5LZY9S.s page 54 + ARM GAS /tmp/ccGev6kP.s page 54 788:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 820:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 1582 .loc 1 820 5 is_stmt 1 view .LVU477 820:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** - ARM GAS /tmp/cc5LZY9S.s page 55 + ARM GAS /tmp/ccGev6kP.s page 55 1583 .loc 1 820 9 is_stmt 0 view .LVU478 @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 1623 .loc 1 836 17 view .LVU493 1624 0054 A26B ldr r2, [r4, #56] - ARM GAS /tmp/cc5LZY9S.s page 56 + ARM GAS /tmp/ccGev6kP.s page 56 836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { 1667 .loc 1 851 3 is_stmt 1 view .LVU506 851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { - ARM GAS /tmp/cc5LZY9S.s page 57 + ARM GAS /tmp/ccGev6kP.s page 57 1668 .loc 1 851 21 is_stmt 0 view .LVU507 @@ -3418,7 +3418,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 859:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** } 1705 .loc 1 859 43 view .LVU525 1706 00cc CC69 ldr r4, [r1, #28] - ARM GAS /tmp/cc5LZY9S.s page 58 + ARM GAS /tmp/ccGev6kP.s page 58 859:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** } @@ -3478,7 +3478,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 890:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** { 1744 .loc 1 890 3 view .LVU543 1745 00f4 022A cmp r2, #2 - ARM GAS /tmp/cc5LZY9S.s page 59 + ARM GAS /tmp/ccGev6kP.s page 59 1746 00f6 46D0 beq .L127 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1784 0120 9042 cmp r0, r2 1785 0122 5AD0 beq .L139 1786 .LVL103: - ARM GAS /tmp/cc5LZY9S.s page 60 + ARM GAS /tmp/ccGev6kP.s page 60 1787 .L132: @@ -3598,7 +3598,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1827 014a 0A88 ldrh r2, [r1] 1828 014c 02EB4202 add r2, r2, r2, lsl #1 1829 0150 9440 lsls r4, r4, r2 - ARM GAS /tmp/cc5LZY9S.s page 61 + ARM GAS /tmp/ccGev6kP.s page 61 831:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** } @@ -3658,7 +3658,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** } 1868 .loc 1 887 25 view .LVU590 1869 017e 22F48052 bic r2, r2, #4096 - ARM GAS /tmp/cc5LZY9S.s page 62 + ARM GAS /tmp/ccGev6kP.s page 62 1870 0182 4260 str r2, [r0, #4] @@ -3718,7 +3718,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** break; 1907 .loc 1 905 47 view .LVU608 1908 01aa CC68 ldr r4, [r1, #12] - ARM GAS /tmp/cc5LZY9S.s page 63 + ARM GAS /tmp/ccGev6kP.s page 63 905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** break; @@ -3778,7 +3778,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1946 01d2 42F48002 orr r2, r2, #4194304 1947 01d6 4260 str r2, [r0, #4] 1948 01d8 A0E7 b .L131 - ARM GAS /tmp/cc5LZY9S.s page 64 + ARM GAS /tmp/ccGev6kP.s page 64 1949 .L139: @@ -3838,7 +3838,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 1997 .LVL109: 1998 .LFB152: 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Check the parameters */ - ARM GAS /tmp/cc5LZY9S.s page 65 + ARM GAS /tmp/ccGev6kP.s page 65 1999 .loc 1 944 1 is_stmt 1 view -0 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** ADC->CCR |= multimode->DMAAccessMode; 2038 .loc 1 958 6 is_stmt 0 view .LVU650 2039 0024 5868 ldr r0, [r3, #4] - ARM GAS /tmp/cc5LZY9S.s page 66 + ARM GAS /tmp/ccGev6kP.s page 66 958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** ADC->CCR |= multimode->DMAAccessMode; @@ -3958,7 +3958,7 @@ ARM GAS /tmp/cc5LZY9S.s page 1 2078 .L144: 951:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** 2079 .loc 1 951 3 discriminator 1 view .LVU667 - ARM GAS /tmp/cc5LZY9S.s page 67 + ARM GAS /tmp/ccGev6kP.s page 67 2080 0050 0220 movs r0, #2 @@ -3983,52 +3983,52 @@ ARM GAS /tmp/cc5LZY9S.s page 1 2099 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h" 2100 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h" 2101 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/cc5LZY9S.s page 68 + ARM GAS /tmp/ccGev6kP.s page 68 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_adc_ex.c - /tmp/cc5LZY9S.s:20 .text.ADC_MultiModeDMAError:00000000 $t - /tmp/cc5LZY9S.s:25 .text.ADC_MultiModeDMAError:00000000 ADC_MultiModeDMAError - /tmp/cc5LZY9S.s:61 .text.ADC_MultiModeDMAHalfConvCplt:00000000 $t - /tmp/cc5LZY9S.s:66 .text.ADC_MultiModeDMAHalfConvCplt:00000000 ADC_MultiModeDMAHalfConvCplt - /tmp/cc5LZY9S.s:93 .text.ADC_MultiModeDMAConvCplt:00000000 $t - /tmp/cc5LZY9S.s:98 .text.ADC_MultiModeDMAConvCplt:00000000 ADC_MultiModeDMAConvCplt - /tmp/cc5LZY9S.s:192 .text.HAL_ADCEx_InjectedStart:00000000 $t - /tmp/cc5LZY9S.s:198 .text.HAL_ADCEx_InjectedStart:00000000 HAL_ADCEx_InjectedStart - /tmp/cc5LZY9S.s:412 .text.HAL_ADCEx_InjectedStart:000000e8 $d - /tmp/cc5LZY9S.s:421 .text.HAL_ADCEx_InjectedStart_IT:00000000 $t - /tmp/cc5LZY9S.s:427 .text.HAL_ADCEx_InjectedStart_IT:00000000 HAL_ADCEx_InjectedStart_IT - /tmp/cc5LZY9S.s:646 .text.HAL_ADCEx_InjectedStart_IT:000000f0 $d - /tmp/cc5LZY9S.s:655 .text.HAL_ADCEx_InjectedStop:00000000 $t - /tmp/cc5LZY9S.s:661 .text.HAL_ADCEx_InjectedStop:00000000 HAL_ADCEx_InjectedStop - /tmp/cc5LZY9S.s:754 .text.HAL_ADCEx_InjectedStop:00000060 $d - /tmp/cc5LZY9S.s:759 .text.HAL_ADCEx_InjectedPollForConversion:00000000 $t - /tmp/cc5LZY9S.s:765 .text.HAL_ADCEx_InjectedPollForConversion:00000000 HAL_ADCEx_InjectedPollForConversion - /tmp/cc5LZY9S.s:923 .text.HAL_ADCEx_InjectedStop_IT:00000000 $t - /tmp/cc5LZY9S.s:929 .text.HAL_ADCEx_InjectedStop_IT:00000000 HAL_ADCEx_InjectedStop_IT - /tmp/cc5LZY9S.s:1026 .text.HAL_ADCEx_InjectedStop_IT:00000068 $d - /tmp/cc5LZY9S.s:1031 .text.HAL_ADCEx_InjectedGetValue:00000000 $t - /tmp/cc5LZY9S.s:1037 .text.HAL_ADCEx_InjectedGetValue:00000000 HAL_ADCEx_InjectedGetValue - /tmp/cc5LZY9S.s:1066 .text.HAL_ADCEx_InjectedGetValue:00000018 $d - /tmp/cc5LZY9S.s:1070 .text.HAL_ADCEx_InjectedGetValue:0000001c $t - /tmp/cc5LZY9S.s:1129 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 $t - /tmp/cc5LZY9S.s:1135 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 HAL_ADCEx_MultiModeStart_DMA - /tmp/cc5LZY9S.s:1371 .text.HAL_ADCEx_MultiModeStart_DMA:00000110 $d - /tmp/cc5LZY9S.s:1383 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 $t - /tmp/cc5LZY9S.s:1389 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 HAL_ADCEx_MultiModeStop_DMA - /tmp/cc5LZY9S.s:1480 .text.HAL_ADCEx_MultiModeStop_DMA:0000005c $d - /tmp/cc5LZY9S.s:1486 .text.HAL_ADCEx_MultiModeGetValue:00000000 $t - /tmp/cc5LZY9S.s:1492 .text.HAL_ADCEx_MultiModeGetValue:00000000 HAL_ADCEx_MultiModeGetValue - /tmp/cc5LZY9S.s:1511 .text.HAL_ADCEx_MultiModeGetValue:00000008 $d - /tmp/cc5LZY9S.s:1516 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 $t - /tmp/cc5LZY9S.s:1522 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 HAL_ADCEx_InjectedConvCpltCallback - /tmp/cc5LZY9S.s:1537 .text.HAL_ADCEx_InjectedConfigChannel:00000000 $t - /tmp/cc5LZY9S.s:1543 .text.HAL_ADCEx_InjectedConfigChannel:00000000 HAL_ADCEx_InjectedConfigChannel - /tmp/cc5LZY9S.s:1982 .text.HAL_ADCEx_InjectedConfigChannel:000001f8 $d - /tmp/cc5LZY9S.s:1990 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 $t - /tmp/cc5LZY9S.s:1996 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 HAL_ADCEx_MultiModeConfigChannel - /tmp/cc5LZY9S.s:2087 .text.HAL_ADCEx_MultiModeConfigChannel:00000054 $d + /tmp/ccGev6kP.s:20 .text.ADC_MultiModeDMAError:00000000 $t + /tmp/ccGev6kP.s:25 .text.ADC_MultiModeDMAError:00000000 ADC_MultiModeDMAError + /tmp/ccGev6kP.s:61 .text.ADC_MultiModeDMAHalfConvCplt:00000000 $t + /tmp/ccGev6kP.s:66 .text.ADC_MultiModeDMAHalfConvCplt:00000000 ADC_MultiModeDMAHalfConvCplt + /tmp/ccGev6kP.s:93 .text.ADC_MultiModeDMAConvCplt:00000000 $t + /tmp/ccGev6kP.s:98 .text.ADC_MultiModeDMAConvCplt:00000000 ADC_MultiModeDMAConvCplt + /tmp/ccGev6kP.s:192 .text.HAL_ADCEx_InjectedStart:00000000 $t + /tmp/ccGev6kP.s:198 .text.HAL_ADCEx_InjectedStart:00000000 HAL_ADCEx_InjectedStart + /tmp/ccGev6kP.s:412 .text.HAL_ADCEx_InjectedStart:000000e8 $d + /tmp/ccGev6kP.s:421 .text.HAL_ADCEx_InjectedStart_IT:00000000 $t + /tmp/ccGev6kP.s:427 .text.HAL_ADCEx_InjectedStart_IT:00000000 HAL_ADCEx_InjectedStart_IT + /tmp/ccGev6kP.s:646 .text.HAL_ADCEx_InjectedStart_IT:000000f0 $d + /tmp/ccGev6kP.s:655 .text.HAL_ADCEx_InjectedStop:00000000 $t + /tmp/ccGev6kP.s:661 .text.HAL_ADCEx_InjectedStop:00000000 HAL_ADCEx_InjectedStop + /tmp/ccGev6kP.s:754 .text.HAL_ADCEx_InjectedStop:00000060 $d + /tmp/ccGev6kP.s:759 .text.HAL_ADCEx_InjectedPollForConversion:00000000 $t + /tmp/ccGev6kP.s:765 .text.HAL_ADCEx_InjectedPollForConversion:00000000 HAL_ADCEx_InjectedPollForConversion + /tmp/ccGev6kP.s:923 .text.HAL_ADCEx_InjectedStop_IT:00000000 $t + /tmp/ccGev6kP.s:929 .text.HAL_ADCEx_InjectedStop_IT:00000000 HAL_ADCEx_InjectedStop_IT + /tmp/ccGev6kP.s:1026 .text.HAL_ADCEx_InjectedStop_IT:00000068 $d + /tmp/ccGev6kP.s:1031 .text.HAL_ADCEx_InjectedGetValue:00000000 $t + /tmp/ccGev6kP.s:1037 .text.HAL_ADCEx_InjectedGetValue:00000000 HAL_ADCEx_InjectedGetValue + /tmp/ccGev6kP.s:1066 .text.HAL_ADCEx_InjectedGetValue:00000018 $d + /tmp/ccGev6kP.s:1070 .text.HAL_ADCEx_InjectedGetValue:0000001c $t + /tmp/ccGev6kP.s:1129 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 $t + /tmp/ccGev6kP.s:1135 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 HAL_ADCEx_MultiModeStart_DMA + /tmp/ccGev6kP.s:1371 .text.HAL_ADCEx_MultiModeStart_DMA:00000110 $d + /tmp/ccGev6kP.s:1383 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 $t + /tmp/ccGev6kP.s:1389 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 HAL_ADCEx_MultiModeStop_DMA + /tmp/ccGev6kP.s:1480 .text.HAL_ADCEx_MultiModeStop_DMA:0000005c $d + /tmp/ccGev6kP.s:1486 .text.HAL_ADCEx_MultiModeGetValue:00000000 $t + /tmp/ccGev6kP.s:1492 .text.HAL_ADCEx_MultiModeGetValue:00000000 HAL_ADCEx_MultiModeGetValue + /tmp/ccGev6kP.s:1511 .text.HAL_ADCEx_MultiModeGetValue:00000008 $d + /tmp/ccGev6kP.s:1516 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 $t + /tmp/ccGev6kP.s:1522 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 HAL_ADCEx_InjectedConvCpltCallback + /tmp/ccGev6kP.s:1537 .text.HAL_ADCEx_InjectedConfigChannel:00000000 $t + /tmp/ccGev6kP.s:1543 .text.HAL_ADCEx_InjectedConfigChannel:00000000 HAL_ADCEx_InjectedConfigChannel + /tmp/ccGev6kP.s:1982 .text.HAL_ADCEx_InjectedConfigChannel:000001f8 $d + /tmp/ccGev6kP.s:1990 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 $t + /tmp/ccGev6kP.s:1996 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 HAL_ADCEx_MultiModeConfigChannel + /tmp/ccGev6kP.s:2087 .text.HAL_ADCEx_MultiModeConfigChannel:00000054 $d UNDEFINED SYMBOLS HAL_ADC_ErrorCallback diff --git a/build/stm32f7xx_hal_adc_ex.o b/build/stm32f7xx_hal_adc_ex.o index 3da64659959396a16f4928b2fbda6a0b0c40e0bc..15adde65d22ef81c687619e794affec782003c64 100644 GIT binary patch delta 1171 zcmXw2T}+c#7(Va$+J4{Z4_`|Q6r{FTl>(m>GU^X*il%d*rFBe2vn{qj6Z|11s2~vo zTXaLsqRD%)L|xdHUChOsjl0=h=ro%%GfQR^xxnpW$$m7;GR!WBiSMarU-CYEpYy!$ zd!BQ0I&}x;et-)Rh<#ai$be7r1EZ~d#?BbG+4Dd@hW!u5nD&`Ld2?_-EdURTjS$Aqg%xg+jXx{N5-pP6Q?x}S@Lyp? zzNM|SIkng!zL)f&qDk?ift#JDU=nXS5ICo{PqyXF}Au`}%~ z363G|p&PVy5cs~P;aSHSZz~BRE!A^jne!+UUHG><1Y6PL2|)szJXZK^S#YUtN2#Dw zJfsPZj}%RbD2{rH%{KCbECi?U5#d&RR@Ml;7&D{Lhbc1z?Re0%pb9@U zL#zL!4r5R`sAbv$jWve&S8@}#F(Te0!=e-C&0VkuDiQy8#wRs<=VGs^9?T zyc3Yb1#g;gjZfl)FAV?TW#4kjulZWxB0ljguT0Vz!LMzTjd?ogK8l*Zu&#V9mF+EW zCVam#&W87LkKrf0 z-Z#eQQrO;~ruH-a8UFiTobONbxqa9;&`4{$2cnR{@qv08`3d1pyiI7se+buOb-o^g WxFug7?0A#0-{|W9|LBiW`kn(IweLm% delta 1190 zcmXX^ZERCz6n@XWZSQ^ivD>e)FpD*Ai+Nv1H{Z9gdhGeg9wQUnt0xEf1Kx@=RD_} z_jzyLTR+2F*WpwYvghkxSK$kMUtPcPb30>_&29pHRQsQdF?mjT z_#$m^d}h%;-iwo-ORb#zDFc?FAU{Su%8*5C`2=}VUJm?5KTnE>czIK?!zkI7#r09+ikY5yoCS7!xqV7J{`=6n< zSNyGn@A{L3-}?s%eSxMGTf|7OR21(bP5wG5)+}H)@GQN=V*zVtt@NDO`Iy8<6m`4t zQebW58l`Xt0?QAN=Gi_9=@5f2UDT682(AM+wgiRAzF-sNa55N&^Eev}3lG6m^|IlI z-D3AiGID?-zJRN$b59iP5Xz*Ju@Q>+!u*lyj;L+>*4+B}%gIOb=EP`u%uMVuOGYA{ z$_^!RMrltuJ6fJ7kMAkw2j3XkZ&r30MKfP9N=7BoV~(2@W1?KiXP@6Pe`CYbPr)gK zd_R1I1B7SrEa5qPK==)I7pCA_{H`zyS8>?rhx<5ZEWtnc@yL|K(&#T{XxJ$BOWt9; tP|Qf|Rg_B2RBI{4U= 6010050) @@ -178,7 +178,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 142:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 143:Drivers/CMSIS/Include/core_cm7.h **** #endif 144:Drivers/CMSIS/Include/core_cm7.h **** #else - ARM GAS /tmp/ccB9Q52u.s page 4 + ARM GAS /tmp/ccjFay11.s page 4 145:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U @@ -238,7 +238,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 199:Drivers/CMSIS/Include/core_cm7.h **** #warning "__ICACHE_PRESENT not defined in device header file; using default!" 200:Drivers/CMSIS/Include/core_cm7.h **** #endif 201:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 5 + ARM GAS /tmp/ccjFay11.s page 5 202:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __DCACHE_PRESENT @@ -298,7 +298,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 256:Drivers/CMSIS/Include/core_cm7.h **** - Core MPU Register 257:Drivers/CMSIS/Include/core_cm7.h **** - Core FPU Register 258:Drivers/CMSIS/Include/core_cm7.h **** ******************************************************************************/ - ARM GAS /tmp/ccB9Q52u.s page 6 + ARM GAS /tmp/ccjFay11.s page 6 259:Drivers/CMSIS/Include/core_cm7.h **** /** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 313:Drivers/CMSIS/Include/core_cm7.h **** typedef union 314:Drivers/CMSIS/Include/core_cm7.h **** { 315:Drivers/CMSIS/Include/core_cm7.h **** struct - ARM GAS /tmp/ccB9Q52u.s page 7 + ARM GAS /tmp/ccjFay11.s page 7 316:Drivers/CMSIS/Include/core_cm7.h **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 370:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Pos 24U /*!< xPSR 371:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR 372:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 8 + ARM GAS /tmp/ccjFay11.s page 8 373:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_GE_Pos 16U /*!< xPSR @@ -478,7 +478,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 427:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * 428:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED2[24U]; 429:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register - ARM GAS /tmp/ccB9Q52u.s page 9 + ARM GAS /tmp/ccjFay11.s page 9 430:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED3[24U]; @@ -538,7 +538,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 484:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[15U]; 485:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 486:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 - ARM GAS /tmp/ccB9Q52u.s page 10 + ARM GAS /tmp/ccjFay11.s page 10 487:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 541:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB 542:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB 543:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 11 + ARM GAS /tmp/ccjFay11.s page 11 544:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB @@ -658,7 +658,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 598:Drivers/CMSIS/Include/core_cm7.h **** 599:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Pos 16U /*!< SCB 600:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB - ARM GAS /tmp/ccB9Q52u.s page 12 + ARM GAS /tmp/ccjFay11.s page 12 601:Drivers/CMSIS/Include/core_cm7.h **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 655:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB 656:Drivers/CMSIS/Include/core_cm7.h **** 657:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB - ARM GAS /tmp/ccB9Q52u.s page 13 + ARM GAS /tmp/ccjFay11.s page 13 658:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB @@ -778,7 +778,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 712:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB 713:Drivers/CMSIS/Include/core_cm7.h **** 714:Drivers/CMSIS/Include/core_cm7.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ - ARM GAS /tmp/ccB9Q52u.s page 14 + ARM GAS /tmp/ccjFay11.s page 14 715:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB @@ -838,7 +838,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 769:Drivers/CMSIS/Include/core_cm7.h **** 770:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Pos 24U /*!< SCB 771:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB - ARM GAS /tmp/ccB9Q52u.s page 15 + ARM GAS /tmp/ccjFay11.s page 15 772:Drivers/CMSIS/Include/core_cm7.h **** @@ -898,7 +898,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 826:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Pos 5U /*!< SCB 827:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB 828:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 16 + ARM GAS /tmp/ccjFay11.s page 16 829:Drivers/CMSIS/Include/core_cm7.h **** /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 883:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB 884:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB 885:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 17 + ARM GAS /tmp/ccjFay11.s page 17 886:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_CTL_Pos 0U /*!< SCB @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 940:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: 941:Drivers/CMSIS/Include/core_cm7.h **** 942:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: - ARM GAS /tmp/ccB9Q52u.s page 18 + ARM GAS /tmp/ccjFay11.s page 18 943:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 997:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT 998:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT 999:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 19 + ARM GAS /tmp/ccjFay11.s page 19 1000:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_SysTick */ @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1054:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM 1055:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM 1056:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 20 + ARM GAS /tmp/ccjFay11.s page 20 1057:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1111:Drivers/CMSIS/Include/core_cm7.h **** */ 1112:Drivers/CMSIS/Include/core_cm7.h **** 1113:Drivers/CMSIS/Include/core_cm7.h **** /** - ARM GAS /tmp/ccB9Q52u.s page 21 + ARM GAS /tmp/ccjFay11.s page 21 1114:Drivers/CMSIS/Include/core_cm7.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT). @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1168:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR 1169:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR 1170:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 22 + ARM GAS /tmp/ccjFay11.s page 22 1171:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1225:Drivers/CMSIS/Include/core_cm7.h **** /* DWT Comparator Function Register Definitions */ 1226:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN 1227:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN - ARM GAS /tmp/ccB9Q52u.s page 23 + ARM GAS /tmp/ccjFay11.s page 23 1228:Drivers/CMSIS/Include/core_cm7.h **** @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1282:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[1U]; 1283:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ 1284:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - ARM GAS /tmp/ccB9Q52u.s page 24 + ARM GAS /tmp/ccjFay11.s page 24 1285:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1339:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF 1340:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF 1341:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 25 + ARM GAS /tmp/ccjFay11.s page 25 1342:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1396:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV 1397:Drivers/CMSIS/Include/core_cm7.h **** 1398:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV - ARM GAS /tmp/ccB9Q52u.s page 26 + ARM GAS /tmp/ccjFay11.s page 26 1399:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1453:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU 1454:Drivers/CMSIS/Include/core_cm7.h **** 1455:Drivers/CMSIS/Include/core_cm7.h **** /* MPU Control Register Definitions */ - ARM GAS /tmp/ccB9Q52u.s page 27 + ARM GAS /tmp/ccjFay11.s page 27 1456:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1510:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_MPU */ 1511:Drivers/CMSIS/Include/core_cm7.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ 1512:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 28 + ARM GAS /tmp/ccjFay11.s page 28 1513:Drivers/CMSIS/Include/core_cm7.h **** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1567:Drivers/CMSIS/Include/core_cm7.h **** /* Floating-Point Default Status Control Register Definitions */ 1568:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS 1569:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS - ARM GAS /tmp/ccB9Q52u.s page 29 + ARM GAS /tmp/ccjFay11.s page 29 1570:Drivers/CMSIS/Include/core_cm7.h **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1624:Drivers/CMSIS/Include/core_cm7.h **** \ingroup CMSIS_core_register 1625:Drivers/CMSIS/Include/core_cm7.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) 1626:Drivers/CMSIS/Include/core_cm7.h **** \brief Type definitions for the Core Debug Registers - ARM GAS /tmp/ccB9Q52u.s page 30 + ARM GAS /tmp/ccjFay11.s page 30 1627:Drivers/CMSIS/Include/core_cm7.h **** @{ @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1681:Drivers/CMSIS/Include/core_cm7.h **** 1682:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core 1683:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core - ARM GAS /tmp/ccB9Q52u.s page 31 + ARM GAS /tmp/ccjFay11.s page 31 1684:Drivers/CMSIS/Include/core_cm7.h **** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1738:Drivers/CMSIS/Include/core_cm7.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. 1739:Drivers/CMSIS/Include/core_cm7.h **** \return Masked and shifted value. 1740:Drivers/CMSIS/Include/core_cm7.h **** */ - ARM GAS /tmp/ccB9Q52u.s page 32 + ARM GAS /tmp/ccjFay11.s page 32 1741:Drivers/CMSIS/Include/core_cm7.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1795:Drivers/CMSIS/Include/core_cm7.h **** - Core NVIC Functions 1796:Drivers/CMSIS/Include/core_cm7.h **** - Core SysTick Functions 1797:Drivers/CMSIS/Include/core_cm7.h **** - Core Debug Functions - ARM GAS /tmp/ccB9Q52u.s page 33 + ARM GAS /tmp/ccjFay11.s page 33 1798:Drivers/CMSIS/Include/core_cm7.h **** - Core Register Access Functions @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1852:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu 1853:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu 1854:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 34 + ARM GAS /tmp/ccjFay11.s page 34 1855:Drivers/CMSIS/Include/core_cm7.h **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1909:Drivers/CMSIS/Include/core_cm7.h **** \return 0 Interrupt is not enabled. 1910:Drivers/CMSIS/Include/core_cm7.h **** \return 1 Interrupt is enabled. 1911:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccB9Q52u.s page 35 + ARM GAS /tmp/ccjFay11.s page 35 1912:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 - ARM GAS /tmp/ccB9Q52u.s page 36 + ARM GAS /tmp/ccjFay11.s page 36 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED - ARM GAS /tmp/ccB9Q52u.s page 37 + ARM GAS /tmp/ccjFay11.s page 37 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ - ARM GAS /tmp/ccB9Q52u.s page 38 + ARM GAS /tmp/ccjFay11.s page 38 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** 175:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccB9Q52u.s page 39 + ARM GAS /tmp/ccjFay11.s page 39 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccB9Q52u.s page 40 + ARM GAS /tmp/ccjFay11.s page 40 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) - ARM GAS /tmp/ccB9Q52u.s page 41 + ARM GAS /tmp/ccjFay11.s page 41 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccB9Q52u.s page 42 + ARM GAS /tmp/ccjFay11.s page 42 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccB9Q52u.s page 43 + ARM GAS /tmp/ccjFay11.s page 43 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccB9Q52u.s page 44 + ARM GAS /tmp/ccjFay11.s page 44 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccB9Q52u.s page 45 + ARM GAS /tmp/ccjFay11.s page 45 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 574:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccB9Q52u.s page 46 + ARM GAS /tmp/ccjFay11.s page 46 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure - ARM GAS /tmp/ccB9Q52u.s page 47 + ARM GAS /tmp/ccjFay11.s page 47 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; - ARM GAS /tmp/ccB9Q52u.s page 48 + ARM GAS /tmp/ccjFay11.s page 48 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccB9Q52u.s page 49 + ARM GAS /tmp/ccjFay11.s page 49 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); - ARM GAS /tmp/ccB9Q52u.s page 50 + ARM GAS /tmp/ccjFay11.s page 50 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 858:Drivers/CMSIS/Include/cmsis_gcc.h **** 859:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccB9Q52u.s page 51 + ARM GAS /tmp/ccjFay11.s page 51 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 85 .align 2 86 .L3: 87 0020 00E100E0 .word -536813312 - ARM GAS /tmp/ccB9Q52u.s page 52 + ARM GAS /tmp/ccjFay11.s page 52 88 .cfi_endproc @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1985:Drivers/CMSIS/Include/core_cm7.h **** __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) 1986:Drivers/CMSIS/Include/core_cm7.h **** { 1987:Drivers/CMSIS/Include/core_cm7.h **** if ((int32_t)(IRQn) >= 0) - ARM GAS /tmp/ccB9Q52u.s page 53 + ARM GAS /tmp/ccjFay11.s page 53 1988:Drivers/CMSIS/Include/core_cm7.h **** { @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 113 .LVL3: 114 .loc 2 2028 49 view .LVU22 115 0006 C9B2 uxtb r1, r1 - ARM GAS /tmp/ccB9Q52u.s page 54 + ARM GAS /tmp/ccjFay11.s page 54 116 .loc 2 2028 47 view .LVU23 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 153 .loc 2 2047 1 is_stmt 1 view -0 154 .cfi_startproc 155 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccB9Q52u.s page 55 + ARM GAS /tmp/ccjFay11.s page 55 156 @ frame_needed = 0, uses_anonymous_args = 0 @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 2061:Drivers/CMSIS/Include/core_cm7.h **** \brief Encode Priority 2062:Drivers/CMSIS/Include/core_cm7.h **** \details Encodes the priority for an interrupt with the given priority group, 2063:Drivers/CMSIS/Include/core_cm7.h **** preemptive priority value, and subpriority value. - ARM GAS /tmp/ccB9Q52u.s page 56 + ARM GAS /tmp/ccjFay11.s page 56 2064:Drivers/CMSIS/Include/core_cm7.h **** In case of a conflict between priority grouping and available @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 235 0020 0EFA0CF0 lsl r0, lr, ip 236 .LVL13: 237 .loc 2 2081 30 view .LVU57 - ARM GAS /tmp/ccB9Q52u.s page 57 + ARM GAS /tmp/ccjFay11.s page 57 238 0024 21EA0001 bic r1, r1, r0 @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 275 .cfi_offset 14, -4 2100:Drivers/CMSIS/Include/core_cm7.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used 276 .loc 2 2100 3 is_stmt 1 view .LVU64 - ARM GAS /tmp/ccB9Q52u.s page 58 + ARM GAS /tmp/ccjFay11.s page 58 277 .loc 2 2100 12 is_stmt 0 view .LVU65 @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 322 .L21: 2105:Drivers/CMSIS/Include/core_cm7.h **** 323 .loc 2 2105 109 discriminator 2 view .LVU84 - ARM GAS /tmp/ccB9Q52u.s page 59 + ARM GAS /tmp/ccjFay11.s page 59 324 003a 0021 movs r1, #0 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 340 .cfi_startproc 341 @ Volatile: function does not return. 342 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccB9Q52u.s page 60 + ARM GAS /tmp/ccjFay11.s page 60 343 @ frame_needed = 0, uses_anonymous_args = 0 @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 385 .loc 2 2156 3 view .LVU98 2157:Drivers/CMSIS/Include/core_cm7.h **** { 2158:Drivers/CMSIS/Include/core_cm7.h **** __NOP(); - ARM GAS /tmp/ccB9Q52u.s page 61 + ARM GAS /tmp/ccjFay11.s page 61 386 .loc 2 2158 5 discriminator 1 view .LVU99 @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ preemption is no more possible. 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** The pending IRQ priority will be managed only by the sub priority. 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** - ARM GAS /tmp/ccB9Q52u.s page 62 + ARM GAS /tmp/ccjFay11.s page 62 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** -@- IRQ priority order (sorted by highest to lowest priority): @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** */ 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** /** @defgroup CORTEX CORTEX - ARM GAS /tmp/ccB9Q52u.s page 63 + ARM GAS /tmp/ccjFay11.s page 63 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @brief CORTEX HAL module driver @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** { 413 .loc 1 143 1 view -0 414 .cfi_startproc - ARM GAS /tmp/ccB9Q52u.s page 64 + ARM GAS /tmp/ccjFay11.s page 64 415 @ args = 0, pretend = 0, frame = 0 @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 451 .LVL32: 1875:Drivers/CMSIS/Include/core_cm7.h **** } 452 .loc 2 1875 3 is_stmt 1 view .LVU117 - ARM GAS /tmp/ccB9Q52u.s page 65 + ARM GAS /tmp/ccjFay11.s page 65 1875:Drivers/CMSIS/Include/core_cm7.h **** } @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** uint32_t prioritygroup = 0x00; 490 .loc 1 166 3 is_stmt 1 view .LVU123 491 .LVL35: - ARM GAS /tmp/ccB9Q52u.s page 66 + ARM GAS /tmp/ccjFay11.s page 66 167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 534 .thumb 535 .thumb_func 537 HAL_NVIC_EnableIRQ: - ARM GAS /tmp/ccB9Q52u.s page 67 + ARM GAS /tmp/ccjFay11.s page 67 538 .LVL41: @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 566 000e 024A ldr r2, .L36 567 0010 42F82030 str r3, [r2, r0, lsl #2] 568 .LVL43: - ARM GAS /tmp/ccB9Q52u.s page 68 + ARM GAS /tmp/ccjFay11.s page 68 569 .L34: @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 607 0006 08BD pop {r3, pc} 608 .cfi_endproc 609 .LFE144: - ARM GAS /tmp/ccB9Q52u.s page 69 + ARM GAS /tmp/ccjFay11.s page 69 611 .section .text.HAL_NVIC_SystemReset,"ax",%progbits @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 648 @ args = 0, pretend = 0, frame = 0 649 @ frame_needed = 0, uses_anonymous_args = 0 650 @ link register save eliminated. - ARM GAS /tmp/ccB9Q52u.s page 70 + ARM GAS /tmp/ccjFay11.s page 70 230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** return SysTick_Config(TicksNumb); @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 2209:Drivers/CMSIS/Include/core_cm7.h **** 2210:Drivers/CMSIS/Include/core_cm7.h **** 2211:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 71 + ARM GAS /tmp/ccjFay11.s page 71 2212:Drivers/CMSIS/Include/core_cm7.h **** /* ########################## Cache functions #################################### */ @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 2266:Drivers/CMSIS/Include/core_cm7.h **** { 2267:Drivers/CMSIS/Include/core_cm7.h **** #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U) 2268:Drivers/CMSIS/Include/core_cm7.h **** __DSB(); - ARM GAS /tmp/ccB9Q52u.s page 72 + ARM GAS /tmp/ccjFay11.s page 72 2269:Drivers/CMSIS/Include/core_cm7.h **** __ISB(); @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 2323:Drivers/CMSIS/Include/core_cm7.h **** uint32_t sets; 2324:Drivers/CMSIS/Include/core_cm7.h **** uint32_t ways; 2325:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccB9Q52u.s page 73 + ARM GAS /tmp/ccjFay11.s page 73 2326:Drivers/CMSIS/Include/core_cm7.h **** SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */ @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 2380:Drivers/CMSIS/Include/core_cm7.h **** } while(sets-- != 0U); 2381:Drivers/CMSIS/Include/core_cm7.h **** 2382:Drivers/CMSIS/Include/core_cm7.h **** __DSB(); - ARM GAS /tmp/ccB9Q52u.s page 74 + ARM GAS /tmp/ccjFay11.s page 74 2383:Drivers/CMSIS/Include/core_cm7.h **** __ISB(); @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 2437:Drivers/CMSIS/Include/core_cm7.h **** ccsidr = SCB->CCSIDR; 2438:Drivers/CMSIS/Include/core_cm7.h **** 2439:Drivers/CMSIS/Include/core_cm7.h **** /* clean & invalidate D-Cache */ - ARM GAS /tmp/ccB9Q52u.s page 75 + ARM GAS /tmp/ccjFay11.s page 75 2440:Drivers/CMSIS/Include/core_cm7.h **** sets = (uint32_t)(CCSIDR_SETS(ccsidr)); @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 2494:Drivers/CMSIS/Include/core_cm7.h **** int32_t op_size = dsize; 2495:Drivers/CMSIS/Include/core_cm7.h **** uint32_t op_addr = (uint32_t) addr; 2496:Drivers/CMSIS/Include/core_cm7.h **** int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words ( - ARM GAS /tmp/ccB9Q52u.s page 76 + ARM GAS /tmp/ccjFay11.s page 76 2497:Drivers/CMSIS/Include/core_cm7.h **** @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 2551:Drivers/CMSIS/Include/core_cm7.h **** #if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) 2552:Drivers/CMSIS/Include/core_cm7.h **** 2553:Drivers/CMSIS/Include/core_cm7.h **** /** - ARM GAS /tmp/ccB9Q52u.s page 77 + ARM GAS /tmp/ccjFay11.s page 77 2554:Drivers/CMSIS/Include/core_cm7.h **** \brief System Tick Configuration @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 683 .loc 2 2573 3 is_stmt 1 view .LVU172 684 .loc 2 2573 18 is_stmt 0 view .LVU173 685 0016 0020 movs r0, #0 - ARM GAS /tmp/ccB9Q52u.s page 78 + ARM GAS /tmp/ccjFay11.s page 78 686 .LVL51: @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 246:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** 247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** 248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** @endverbatim - ARM GAS /tmp/ccB9Q52u.s page 79 + ARM GAS /tmp/ccjFay11.s page 79 249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @{ @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** MPU->CTRL = 0; 747 .loc 1 266 3 is_stmt 1 view .LVU189 748 .loc 1 266 13 is_stmt 0 view .LVU190 - ARM GAS /tmp/ccB9Q52u.s page 80 + ARM GAS /tmp/ccjFay11.s page 80 749 000e 0022 movs r2, #0 @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 785 .loc 1 286 14 view .LVU198 786 000c 42F48032 orr r2, r2, #65536 787 0010 5A62 str r2, [r3, #36] - ARM GAS /tmp/ccB9Q52u.s page 81 + ARM GAS /tmp/ccjFay11.s page 81 287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** 293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** /** 294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @brief Enables the MPU Region. - ARM GAS /tmp/ccB9Q52u.s page 82 + ARM GAS /tmp/ccjFay11.s page 82 295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @retval None @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 871 @ frame_needed = 0, uses_anonymous_args = 0 872 @ link register save eliminated. 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** /* Check the parameters */ - ARM GAS /tmp/ccB9Q52u.s page 83 + ARM GAS /tmp/ccjFay11.s page 83 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** assert_param(IS_MPU_REGION_NUMBER(RegionNumber)); @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 908 .loc 1 336 3 view .LVU221 337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission)); 909 .loc 1 337 3 view .LVU222 - ARM GAS /tmp/ccB9Q52u.s page 84 + ARM GAS /tmp/ccjFay11.s page 84 338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField)); @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) | 944 .loc 1 356 34 view .LVU243 945 002a 417B ldrb r1, [r0, #13] @ zero_extendqisi2 - ARM GAS /tmp/ccB9Q52u.s page 85 + ARM GAS /tmp/ccjFay11.s page 85 355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) | @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** 365:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** /** 366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @brief Gets the priority grouping field from the NVIC Interrupt Controller. - ARM GAS /tmp/ccB9Q52u.s page 86 + ARM GAS /tmp/ccjFay11.s page 86 367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field) @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 384:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority 385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * 3 bits for subpriority 386:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority - ARM GAS /tmp/ccB9Q52u.s page 87 + ARM GAS /tmp/ccjFay11.s page 87 387:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * 2 bits for subpriority @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1064 .LFB154: 403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** 404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** /** - ARM GAS /tmp/ccB9Q52u.s page 88 + ARM GAS /tmp/ccjFay11.s page 88 405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @brief Sets Pending bit of an external interrupt. @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1096 .loc 2 1974 43 view .LVU282 1097 .LBE65: 1098 .LBE64: - ARM GAS /tmp/ccB9Q52u.s page 89 + ARM GAS /tmp/ccjFay11.s page 89 418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** } @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1133 0002 0BDB blt .L73 1955:Drivers/CMSIS/Include/core_cm7.h **** } 1134 .loc 2 1955 5 is_stmt 1 view .LVU291 - ARM GAS /tmp/ccB9Q52u.s page 90 + ARM GAS /tmp/ccjFay11.s page 90 1955:Drivers/CMSIS/Include/core_cm7.h **** } @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) 446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** { 1175 .loc 1 446 1 is_stmt 1 view -0 - ARM GAS /tmp/ccB9Q52u.s page 91 + ARM GAS /tmp/ccjFay11.s page 91 1176 .cfi_startproc @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1214 0018 00E100E0 .word -536813312 1215 .cfi_endproc 1216 .LFE156: - ARM GAS /tmp/ccB9Q52u.s page 92 + ARM GAS /tmp/ccjFay11.s page 92 1218 .section .text.HAL_NVIC_GetActive,"ax",%progbits @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1250 000a 52F82330 ldr r3, [r2, r3, lsl #2] 2006:Drivers/CMSIS/Include/core_cm7.h **** } 1251 .loc 2 2006 91 view .LVU324 - ARM GAS /tmp/ccB9Q52u.s page 93 + ARM GAS /tmp/ccjFay11.s page 93 1252 000e 00F01F00 and r0, r0, #31 @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1290 .loc 1 482 3 view .LVU331 483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** if (CLKSource == SYSTICK_CLKSOURCE_HCLK) 1291 .loc 1 483 3 view .LVU332 - ARM GAS /tmp/ccB9Q52u.s page 94 + ARM GAS /tmp/ccjFay11.s page 94 1292 .loc 1 483 6 is_stmt 0 view .LVU333 @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccB9Q52u.s page 1 504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @retval None 505:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** */ 506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** __weak void HAL_SYSTICK_Callback(void) - ARM GAS /tmp/ccB9Q52u.s page 95 + ARM GAS /tmp/ccjFay11.s page 95 507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** { @@ -5687,83 +5687,83 @@ ARM GAS /tmp/ccB9Q52u.s page 1 1363 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 1364 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 1365 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h" - ARM GAS /tmp/ccB9Q52u.s page 96 + ARM GAS /tmp/ccjFay11.s page 96 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_cortex.c - /tmp/ccB9Q52u.s:20 .text.__NVIC_DisableIRQ:00000000 $t - /tmp/ccB9Q52u.s:25 .text.__NVIC_DisableIRQ:00000000 __NVIC_DisableIRQ - /tmp/ccB9Q52u.s:87 .text.__NVIC_DisableIRQ:00000020 $d - /tmp/ccB9Q52u.s:92 .text.__NVIC_SetPriority:00000000 $t - /tmp/ccB9Q52u.s:97 .text.__NVIC_SetPriority:00000000 __NVIC_SetPriority - /tmp/ccB9Q52u.s:139 .text.__NVIC_SetPriority:0000001c $d - /tmp/ccB9Q52u.s:145 .text.__NVIC_GetPriority:00000000 $t - /tmp/ccB9Q52u.s:150 .text.__NVIC_GetPriority:00000000 __NVIC_GetPriority - /tmp/ccB9Q52u.s:185 .text.__NVIC_GetPriority:00000018 $d - /tmp/ccB9Q52u.s:191 .text.NVIC_EncodePriority:00000000 $t - /tmp/ccB9Q52u.s:196 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority - /tmp/ccB9Q52u.s:258 .text.NVIC_DecodePriority:00000000 $t - /tmp/ccB9Q52u.s:263 .text.NVIC_DecodePriority:00000000 NVIC_DecodePriority - /tmp/ccB9Q52u.s:332 .text.__NVIC_SystemReset:00000000 $t - /tmp/ccB9Q52u.s:337 .text.__NVIC_SystemReset:00000000 __NVIC_SystemReset - /tmp/ccB9Q52u.s:398 .text.__NVIC_SystemReset:0000001c $d - /tmp/ccB9Q52u.s:404 .text.HAL_NVIC_SetPriorityGrouping:00000000 $t - /tmp/ccB9Q52u.s:410 .text.HAL_NVIC_SetPriorityGrouping:00000000 HAL_NVIC_SetPriorityGrouping - /tmp/ccB9Q52u.s:464 .text.HAL_NVIC_SetPriorityGrouping:0000001c $d - /tmp/ccB9Q52u.s:470 .text.HAL_NVIC_SetPriority:00000000 $t - /tmp/ccB9Q52u.s:476 .text.HAL_NVIC_SetPriority:00000000 HAL_NVIC_SetPriority - /tmp/ccB9Q52u.s:526 .text.HAL_NVIC_SetPriority:0000001c $d - /tmp/ccB9Q52u.s:531 .text.HAL_NVIC_EnableIRQ:00000000 $t - /tmp/ccB9Q52u.s:537 .text.HAL_NVIC_EnableIRQ:00000000 HAL_NVIC_EnableIRQ - /tmp/ccB9Q52u.s:578 .text.HAL_NVIC_EnableIRQ:00000018 $d - /tmp/ccB9Q52u.s:583 .text.HAL_NVIC_DisableIRQ:00000000 $t - /tmp/ccB9Q52u.s:589 .text.HAL_NVIC_DisableIRQ:00000000 HAL_NVIC_DisableIRQ - /tmp/ccB9Q52u.s:612 .text.HAL_NVIC_SystemReset:00000000 $t - /tmp/ccB9Q52u.s:618 .text.HAL_NVIC_SystemReset:00000000 HAL_NVIC_SystemReset - /tmp/ccB9Q52u.s:637 .text.HAL_SYSTICK_Config:00000000 $t - /tmp/ccB9Q52u.s:643 .text.HAL_SYSTICK_Config:00000000 HAL_SYSTICK_Config - /tmp/ccB9Q52u.s:708 .text.HAL_SYSTICK_Config:00000024 $d - /tmp/ccB9Q52u.s:713 .text.HAL_MPU_Disable:00000000 $t - /tmp/ccB9Q52u.s:719 .text.HAL_MPU_Disable:00000000 HAL_MPU_Disable - /tmp/ccB9Q52u.s:756 .text.HAL_MPU_Disable:00000018 $d - /tmp/ccB9Q52u.s:761 .text.HAL_MPU_Enable:00000000 $t - /tmp/ccB9Q52u.s:767 .text.HAL_MPU_Enable:00000000 HAL_MPU_Enable - /tmp/ccB9Q52u.s:821 .text.HAL_MPU_Enable:0000001c $d - /tmp/ccB9Q52u.s:826 .text.HAL_MPU_EnableRegion:00000000 $t - /tmp/ccB9Q52u.s:832 .text.HAL_MPU_EnableRegion:00000000 HAL_MPU_EnableRegion - /tmp/ccB9Q52u.s:854 .text.HAL_MPU_EnableRegion:00000014 $d - /tmp/ccB9Q52u.s:859 .text.HAL_MPU_DisableRegion:00000000 $t - /tmp/ccB9Q52u.s:865 .text.HAL_MPU_DisableRegion:00000000 HAL_MPU_DisableRegion - /tmp/ccB9Q52u.s:887 .text.HAL_MPU_DisableRegion:00000014 $d - /tmp/ccB9Q52u.s:892 .text.HAL_MPU_ConfigRegion:00000000 $t - /tmp/ccB9Q52u.s:898 .text.HAL_MPU_ConfigRegion:00000000 HAL_MPU_ConfigRegion - /tmp/ccB9Q52u.s:975 .text.HAL_MPU_ConfigRegion:00000054 $d - /tmp/ccB9Q52u.s:980 .text.HAL_NVIC_GetPriorityGrouping:00000000 $t - /tmp/ccB9Q52u.s:986 .text.HAL_NVIC_GetPriorityGrouping:00000000 HAL_NVIC_GetPriorityGrouping - /tmp/ccB9Q52u.s:1010 .text.HAL_NVIC_GetPriorityGrouping:0000000c $d - /tmp/ccB9Q52u.s:1015 .text.HAL_NVIC_GetPriority:00000000 $t - /tmp/ccB9Q52u.s:1021 .text.HAL_NVIC_GetPriority:00000000 HAL_NVIC_GetPriority - /tmp/ccB9Q52u.s:1056 .text.HAL_NVIC_SetPendingIRQ:00000000 $t - /tmp/ccB9Q52u.s:1062 .text.HAL_NVIC_SetPendingIRQ:00000000 HAL_NVIC_SetPendingIRQ - /tmp/ccB9Q52u.s:1104 .text.HAL_NVIC_SetPendingIRQ:00000018 $d - ARM GAS /tmp/ccB9Q52u.s page 97 + /tmp/ccjFay11.s:20 .text.__NVIC_DisableIRQ:00000000 $t + /tmp/ccjFay11.s:25 .text.__NVIC_DisableIRQ:00000000 __NVIC_DisableIRQ + /tmp/ccjFay11.s:87 .text.__NVIC_DisableIRQ:00000020 $d + /tmp/ccjFay11.s:92 .text.__NVIC_SetPriority:00000000 $t + /tmp/ccjFay11.s:97 .text.__NVIC_SetPriority:00000000 __NVIC_SetPriority + /tmp/ccjFay11.s:139 .text.__NVIC_SetPriority:0000001c $d + /tmp/ccjFay11.s:145 .text.__NVIC_GetPriority:00000000 $t + /tmp/ccjFay11.s:150 .text.__NVIC_GetPriority:00000000 __NVIC_GetPriority + /tmp/ccjFay11.s:185 .text.__NVIC_GetPriority:00000018 $d + /tmp/ccjFay11.s:191 .text.NVIC_EncodePriority:00000000 $t + /tmp/ccjFay11.s:196 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority + /tmp/ccjFay11.s:258 .text.NVIC_DecodePriority:00000000 $t + /tmp/ccjFay11.s:263 .text.NVIC_DecodePriority:00000000 NVIC_DecodePriority + /tmp/ccjFay11.s:332 .text.__NVIC_SystemReset:00000000 $t + /tmp/ccjFay11.s:337 .text.__NVIC_SystemReset:00000000 __NVIC_SystemReset + /tmp/ccjFay11.s:398 .text.__NVIC_SystemReset:0000001c $d + /tmp/ccjFay11.s:404 .text.HAL_NVIC_SetPriorityGrouping:00000000 $t + /tmp/ccjFay11.s:410 .text.HAL_NVIC_SetPriorityGrouping:00000000 HAL_NVIC_SetPriorityGrouping + /tmp/ccjFay11.s:464 .text.HAL_NVIC_SetPriorityGrouping:0000001c $d + /tmp/ccjFay11.s:470 .text.HAL_NVIC_SetPriority:00000000 $t + /tmp/ccjFay11.s:476 .text.HAL_NVIC_SetPriority:00000000 HAL_NVIC_SetPriority + /tmp/ccjFay11.s:526 .text.HAL_NVIC_SetPriority:0000001c $d + /tmp/ccjFay11.s:531 .text.HAL_NVIC_EnableIRQ:00000000 $t + /tmp/ccjFay11.s:537 .text.HAL_NVIC_EnableIRQ:00000000 HAL_NVIC_EnableIRQ + /tmp/ccjFay11.s:578 .text.HAL_NVIC_EnableIRQ:00000018 $d + /tmp/ccjFay11.s:583 .text.HAL_NVIC_DisableIRQ:00000000 $t + /tmp/ccjFay11.s:589 .text.HAL_NVIC_DisableIRQ:00000000 HAL_NVIC_DisableIRQ + /tmp/ccjFay11.s:612 .text.HAL_NVIC_SystemReset:00000000 $t + /tmp/ccjFay11.s:618 .text.HAL_NVIC_SystemReset:00000000 HAL_NVIC_SystemReset + /tmp/ccjFay11.s:637 .text.HAL_SYSTICK_Config:00000000 $t + /tmp/ccjFay11.s:643 .text.HAL_SYSTICK_Config:00000000 HAL_SYSTICK_Config + /tmp/ccjFay11.s:708 .text.HAL_SYSTICK_Config:00000024 $d + /tmp/ccjFay11.s:713 .text.HAL_MPU_Disable:00000000 $t + /tmp/ccjFay11.s:719 .text.HAL_MPU_Disable:00000000 HAL_MPU_Disable + /tmp/ccjFay11.s:756 .text.HAL_MPU_Disable:00000018 $d + /tmp/ccjFay11.s:761 .text.HAL_MPU_Enable:00000000 $t + /tmp/ccjFay11.s:767 .text.HAL_MPU_Enable:00000000 HAL_MPU_Enable + /tmp/ccjFay11.s:821 .text.HAL_MPU_Enable:0000001c $d + /tmp/ccjFay11.s:826 .text.HAL_MPU_EnableRegion:00000000 $t + /tmp/ccjFay11.s:832 .text.HAL_MPU_EnableRegion:00000000 HAL_MPU_EnableRegion + /tmp/ccjFay11.s:854 .text.HAL_MPU_EnableRegion:00000014 $d + /tmp/ccjFay11.s:859 .text.HAL_MPU_DisableRegion:00000000 $t + /tmp/ccjFay11.s:865 .text.HAL_MPU_DisableRegion:00000000 HAL_MPU_DisableRegion + /tmp/ccjFay11.s:887 .text.HAL_MPU_DisableRegion:00000014 $d + /tmp/ccjFay11.s:892 .text.HAL_MPU_ConfigRegion:00000000 $t + /tmp/ccjFay11.s:898 .text.HAL_MPU_ConfigRegion:00000000 HAL_MPU_ConfigRegion + /tmp/ccjFay11.s:975 .text.HAL_MPU_ConfigRegion:00000054 $d + /tmp/ccjFay11.s:980 .text.HAL_NVIC_GetPriorityGrouping:00000000 $t + /tmp/ccjFay11.s:986 .text.HAL_NVIC_GetPriorityGrouping:00000000 HAL_NVIC_GetPriorityGrouping + /tmp/ccjFay11.s:1010 .text.HAL_NVIC_GetPriorityGrouping:0000000c $d + /tmp/ccjFay11.s:1015 .text.HAL_NVIC_GetPriority:00000000 $t + /tmp/ccjFay11.s:1021 .text.HAL_NVIC_GetPriority:00000000 HAL_NVIC_GetPriority + /tmp/ccjFay11.s:1056 .text.HAL_NVIC_SetPendingIRQ:00000000 $t + /tmp/ccjFay11.s:1062 .text.HAL_NVIC_SetPendingIRQ:00000000 HAL_NVIC_SetPendingIRQ + /tmp/ccjFay11.s:1104 .text.HAL_NVIC_SetPendingIRQ:00000018 $d + ARM GAS /tmp/ccjFay11.s page 97 - /tmp/ccB9Q52u.s:1109 .text.HAL_NVIC_GetPendingIRQ:00000000 $t - /tmp/ccB9Q52u.s:1115 .text.HAL_NVIC_GetPendingIRQ:00000000 HAL_NVIC_GetPendingIRQ - /tmp/ccB9Q52u.s:1161 .text.HAL_NVIC_GetPendingIRQ:00000020 $d - /tmp/ccB9Q52u.s:1166 .text.HAL_NVIC_ClearPendingIRQ:00000000 $t - /tmp/ccB9Q52u.s:1172 .text.HAL_NVIC_ClearPendingIRQ:00000000 HAL_NVIC_ClearPendingIRQ - /tmp/ccB9Q52u.s:1214 .text.HAL_NVIC_ClearPendingIRQ:00000018 $d - /tmp/ccB9Q52u.s:1219 .text.HAL_NVIC_GetActive:00000000 $t - /tmp/ccB9Q52u.s:1225 .text.HAL_NVIC_GetActive:00000000 HAL_NVIC_GetActive - /tmp/ccB9Q52u.s:1271 .text.HAL_NVIC_GetActive:00000020 $d - /tmp/ccB9Q52u.s:1276 .text.HAL_SYSTICK_CLKSourceConfig:00000000 $t - /tmp/ccB9Q52u.s:1282 .text.HAL_SYSTICK_CLKSourceConfig:00000000 HAL_SYSTICK_CLKSourceConfig - /tmp/ccB9Q52u.s:1317 .text.HAL_SYSTICK_Callback:00000000 $t - /tmp/ccB9Q52u.s:1323 .text.HAL_SYSTICK_Callback:00000000 HAL_SYSTICK_Callback - /tmp/ccB9Q52u.s:1336 .text.HAL_SYSTICK_IRQHandler:00000000 $t - /tmp/ccB9Q52u.s:1342 .text.HAL_SYSTICK_IRQHandler:00000000 HAL_SYSTICK_IRQHandler + /tmp/ccjFay11.s:1109 .text.HAL_NVIC_GetPendingIRQ:00000000 $t + /tmp/ccjFay11.s:1115 .text.HAL_NVIC_GetPendingIRQ:00000000 HAL_NVIC_GetPendingIRQ + /tmp/ccjFay11.s:1161 .text.HAL_NVIC_GetPendingIRQ:00000020 $d + /tmp/ccjFay11.s:1166 .text.HAL_NVIC_ClearPendingIRQ:00000000 $t + /tmp/ccjFay11.s:1172 .text.HAL_NVIC_ClearPendingIRQ:00000000 HAL_NVIC_ClearPendingIRQ + /tmp/ccjFay11.s:1214 .text.HAL_NVIC_ClearPendingIRQ:00000018 $d + /tmp/ccjFay11.s:1219 .text.HAL_NVIC_GetActive:00000000 $t + /tmp/ccjFay11.s:1225 .text.HAL_NVIC_GetActive:00000000 HAL_NVIC_GetActive + /tmp/ccjFay11.s:1271 .text.HAL_NVIC_GetActive:00000020 $d + /tmp/ccjFay11.s:1276 .text.HAL_SYSTICK_CLKSourceConfig:00000000 $t + /tmp/ccjFay11.s:1282 .text.HAL_SYSTICK_CLKSourceConfig:00000000 HAL_SYSTICK_CLKSourceConfig + /tmp/ccjFay11.s:1317 .text.HAL_SYSTICK_Callback:00000000 $t + /tmp/ccjFay11.s:1323 .text.HAL_SYSTICK_Callback:00000000 HAL_SYSTICK_Callback + /tmp/ccjFay11.s:1336 .text.HAL_SYSTICK_IRQHandler:00000000 $t + /tmp/ccjFay11.s:1342 .text.HAL_SYSTICK_IRQHandler:00000000 HAL_SYSTICK_IRQHandler NO UNDEFINED SYMBOLS diff --git a/build/stm32f7xx_hal_cortex.o b/build/stm32f7xx_hal_cortex.o index 2c598836e3f4a47d796a7a92b0180e348edc37dd..907633de1406555e8c2ea4590f66e2f88cf1ca10 100644 GIT binary patch delta 2985 zcmX|DYjjlA6~5=*yYEbLCduU9yi6h?OfZ3rguIYPc*-k+Fa(hIBS;`2Bw=Avqyj^h zps1kKgI&CoxE2WL!l)@rTNet&VwGiE5L;TUfI{U_D71heKiY5KncKB;?wtMYZ}0u> zea_s>2j7a#`0Fk@-p!wBSRYAE`%G8uMtXF2f~M)FuilRj;mY72Wr42~Dj?}l zft<7nd?G)d7L5Wk>Z44!{q!58NT6cKNTfYqt_5!LqGxj2!2o63;qMN3+W2!6(B`48_!;J7R=ss z2h3s`1&Lu=g`5x4R!HeX=kY9|D42ce7^Ig{^f-!@Q4s>l={W>f&@Pm$q(La(k8WZA z5KYCiKc#{*fWpa|Hjuu6cM$bPY!%JNR0dNLVu#Qb;6v#Un8TKLAb8d(}=V*B&4EXRx#A-CiMVK_tSq>hm~oqKvL_E z>X4P$|F_7KU{XVKtCnac>w84PEVLwT2-Noqn>*G+usO>XR{-0;cDhA#W_FAL^!wghMH2qy+cewUiOO9s3 zd&1u10@r==o;v7TDjHP}|Fh9sEaFeXp2MV2fppNXe!{bhWIOv$dUjYAvi+rJ_m!)e zf6B8fv&YMx zI6(bx!k*{`MC5Qz__eSbTzh_On%@Y!*|l5cdiC>!yyz>O?My5SrYYoIKC`ni9Y$!K zkexj5a~`lkNO#iT3409^8KI3r-s4uk_ZVyAlRhu(7hT3WQy#*l(=T{c4x92Q1OE_q z4tHaOJ~8EIjQrqHes9Xrsys3Ou?XwC98+zCPMI=|c~`t*r%l<${ruAdzAdnObXg8L9!-KDz@&?!Xw+Gxb%2W%y|nREQ;0Xs=<r7Su%(HuX=W_+{^ygJiEILv459m7syWbcX)PD zR0}@E@?Iyy;raN@Uih$sR!PDyfIHO)w@R}I@Ek&#^FE@j^0+CSHi)$sd~0CbOmuFrx2iF2OXmz%8WJ}H&i#;K4U3ye&J3`l$Tmp5Z)P3votRuCsgGNoXtU z5MG+_6mvHsqTMG>sO8DiMU6V1JVn2qr1DdyiPdUl$`qX3A5uz+J24-zQB*MhQ=~hJ zm3^L*Y!r_spv)xz7Z{wQih|R{9n~JJ%-I6vVqCmF{|{hsZD3~|QYV5LVx77e>@Bt{ zC-qsePwhx86{pk}sk!1)bvd;`98**50@0vW+N1SbiRy?Q5nn6Yd9YUsx3$~VVq;Xv zSfN4;MeLry`Ub-ufK|9g)jJEa=d$z{V>2j-Yxq2fkWO{pnbhMX-v~1?TX3jx1&-ov z=nGI8BU<=lH7#w77^`-rl|*?AdYOL=dk)};_hV)87yvGEWz}TO;qQH!e}ijI?!!Nk z^a_7~L%xOU6jq-tP^(wQz%qn~vHBd~S4zJaxE{dMSXzmRr=IC|^`!y8PXVm0Kt-#K zd3UPX^t3P+11rK+F2VObRyNNB;1UM&vFCsG(4$^YcQRZB*|B0T0pG;F1M2hi>TomY z`bA%cFixUC@dADmU-Xp+02lv~zfl)`BRHkjTlcG>8C9ZMt;)#Ni!8N0BTsioeVDOg z&TJMm+ZP{eX&tVHUd=g^(1d%PU=HLo6*WAeaXxoK74Epk#|*7<2f~aejT~WA*5O2r zCU^Tx*GrktWtEiFw=~t2)U_>dSyo#zvhIn-)|O=@HMI*HS|ar=tu4(BkI#!dJYwDx zEsI)L)Gn{<%Itg8>MDEanNkr@zph^)a#d-=L{ZSy-mqARaMz_JLxrePy_QZCBh|{K zE3m(TeXbhbG*Q1fSH0XcL2Oaynu^5`mDC&(n^b9Yq4<@Wf#*Wi-dso>gYkP$i6M?U U+#JMJJ^{}s>Mow9%5Ta1AH2!kjQ{`u delta 3013 zcmX|DYjjlA6+Y+QyYI~8Op?i+yhtK>3`k%CNg&}F2_g`XSAg&mD1*K8Jmg2eJu|mi>)g5f+u#27 zclJGVC)>`--=CG+3gnSD3m-D=OG=0z`}9+0Mzqr>gkgC`dhsE>*9;*{l4J^DmB&A} zk`Nu%d$@L5i)5KX2Dej!q59LiE@G|B=r3{`2g zC`ky13V;MD*AgO~ilCE0$uOEp4Y<#u$8eub8VY@A1=MoL3w|y=3qyHP%7DZ@)QaN1 zbPU&gYQg>rD2(=nG#SN3WWrX6ZlIta<%8d!)`EF2?Sk9@YJ%NjD#3Li9RPC>-2yXA z6JfE0rlHwjIs_|2$e$uaDa{14jBY@uoT59?Y$z3@U>Ge#aRs%bWhE)JA5I_OegyT$ zbtI*MGm7dUF`8aRb`0G?`zqRmsoY0rz!^*L0I#NZ!5l}^(cpes2mSH%2uwUcHQ-O6 z+2Bv4Mj(^uXcW{MdK}PXS^!^Ds2hWNkZ!~8RQfGQ)95Osr_+OA&Ye+|Q@GxL-hTLvtY&z}!Rh36vL6E0D!>(2NSPguIac z9xcGQmQn`N%V-jISx;e*8fXOCH&PuqO;iLk+vR#7z!ttLNq z*+N+`)QTf*A4F*9Lc@B^9E)S|Bn-0j@*cX6^A+HI;u47~Awo~8T@9FWd>$bn(`r_>7LP3i28#p`XA$%MD0 zvo8jG=}|}ZK~IYuql>&7qaUz|W71i|q)bDK{Re9M1pEjjL2O52HsqmCOr`o2@qCaTuRTXL-!PWYw4Bzq|1?^(`Ct zhjeDf3TjmZ56<|fbRw~MS$vwOrPCIRJJnqMm@hxt#A@f_Dww8JAMwyXkNYq~8>H&t zdH>4=Hc1tm^m*yXzTh&}CnkMSI$L6l4VLP~u`+tyE{802m4Qpr$>rUc zp+8ybD@Ok9QjSg!eS?nb@&Q@1B|FRqBsZTloiW?WGuQ|WVjr*w{&hK{P;;0C` z%BOJ;nL(b9*Sd{8I03uVw;gz}4U_8dvqd93U+h0YIP!3!8f?m*hJ_LUgvOJB1{er*Bxyc|<=IsLXAIb2&B9pML|`+#0a6d-d@^ru>b*92g|u*TJ-n z@=?7rtz6#KpQPoTFZIgc@|@?``j+?%`XxMk96(8rz8IWUbcaubm6Rj7)VzvBI07v| zLm3ezTlM_(8u_r^m0lX6~KA{Ioau8-aWcL zBfW%20#+?|`2x8MSUEfsfU6iRM8{k#_|bbZf|)S~Iq_y&fj=M1>5ns}l#B)4xa`T4 z<_RA!;@hm9@o$%=D%qsbP{X}M-af|eh%zWd5rQgY1yJQ0! zTI@-TwY&*O!oHfgT(A3df z-_W$QqrS1eqqL@}t*N8Fv%Or?8*{Eg9OxdDmwXDVcN4TG$`?St9@|NmVtuy2w^&eWpvRU`GhU7u*Ya1X>>vCK- i>xH=DTY&3b{W`AK^zpU<*(D7^?BLlY{;Init.PeriphBurst)); 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 5 + ARM GAS /tmp/ccbl0nwv.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Change DMA peripheral state */ @@ -298,7 +298,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Clear Direct mode and FIFO threshold bits */ 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH); 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 6 + ARM GAS /tmp/ccbl0nwv.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Prepare the DMA Stream FIFO configuration */ @@ -358,7 +358,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Check the DMA peripheral state */ 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if(hdma == NULL) - ARM GAS /tmp/ccjAMZS2.s page 7 + ARM GAS /tmp/ccbl0nwv.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Release Lock */ 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** __HAL_UNLOCK(hdma); - ARM GAS /tmp/ccjAMZS2.s page 8 + ARM GAS /tmp/ccbl0nwv.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -478,7 +478,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Enable the Peripheral */ - ARM GAS /tmp/ccjAMZS2.s page 9 + ARM GAS /tmp/ccbl0nwv.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** __HAL_DMA_ENABLE(hdma); @@ -538,7 +538,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->Instance->CR |= DMA_IT_HT; 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } - ARM GAS /tmp/ccjAMZS2.s page 10 + ARM GAS /tmp/ccbl0nwv.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -598,7 +598,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Disable the stream */ 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma); - ARM GAS /tmp/ccjAMZS2.s page 11 + ARM GAS /tmp/ccbl0nwv.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -658,7 +658,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** return HAL_OK; 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } - ARM GAS /tmp/ccjAMZS2.s page 12 + ARM GAS /tmp/ccbl0nwv.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Check for the Timeout (Not applicable in circular mode)*/ 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if(Timeout != HAL_MAX_DELAY) 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { - ARM GAS /tmp/ccjAMZS2.s page 13 + ARM GAS /tmp/ccbl0nwv.s page 13 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) @@ -778,7 +778,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Change the DMA state */ 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->State= HAL_DMA_STATE_READY; - ARM GAS /tmp/ccjAMZS2.s page 14 + ARM GAS /tmp/ccbl0nwv.s page 14 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -838,7 +838,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Clear the transfer error flag */ 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex; 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 15 + ARM GAS /tmp/ccbl0nwv.s page 15 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Update error code */ @@ -898,7 +898,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->XferM1HalfCpltCallback(hdma); 828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } 829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } - ARM GAS /tmp/ccjAMZS2.s page 16 + ARM GAS /tmp/ccbl0nwv.s page 16 830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } @@ -958,7 +958,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Current memory buffer used is Memory 0 */ 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if((hdma->Instance->CR & DMA_SxCR_CT) == RESET) - ARM GAS /tmp/ccjAMZS2.s page 17 + ARM GAS /tmp/ccbl0nwv.s page 17 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if (++count > timeout) 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { 943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** break; - ARM GAS /tmp/ccjAMZS2.s page 18 + ARM GAS /tmp/ccbl0nwv.s page 18 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** case HAL_DMA_XFER_M1HALFCPLT_CB_ID: 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->XferM1HalfCpltCallback = pCallback; 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** break; - ARM GAS /tmp/ccjAMZS2.s page 19 + ARM GAS /tmp/ccbl0nwv.s page 19 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** case HAL_DMA_XFER_M1CPLT_CB_ID: 1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->XferM1CpltCallback = NULL; 1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** break; - ARM GAS /tmp/ccjAMZS2.s page 20 + ARM GAS /tmp/ccbl0nwv.s page 20 1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** * @{ 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** */ 1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 21 + ARM GAS /tmp/ccbl0nwv.s page 21 1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /** @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 37 .cfi_offset 4, -8 38 .cfi_offset 5, -4 1160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Clear DBM bit */ - ARM GAS /tmp/ccjAMZS2.s page 22 + ARM GAS /tmp/ccbl0nwv.s page 22 1161:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM); @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1183:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } 1184:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } 71 .loc 1 1184 1 view .LVU18 - ARM GAS /tmp/ccjAMZS2.s page 23 + ARM GAS /tmp/ccbl0nwv.s page 23 72 001e 30BC pop {r4, r5} @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 113 0000 10B4 push {r4} 114 .LCFI3: 115 .cfi_def_cfa_offset 4 - ARM GAS /tmp/ccjAMZS2.s page 24 + ARM GAS /tmp/ccbl0nwv.s page 24 116 .cfi_offset 4, -4 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 151 0022 806D ldr r0, [r0, #88] 152 .LVL8: 153 .loc 1 1212 1 view .LVU44 - ARM GAS /tmp/ccjAMZS2.s page 25 + ARM GAS /tmp/ccbl0nwv.s page 25 154 0024 5DF8044B ldr r4, [sp], #4 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 196 .LVL11: 1224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 1225:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Memory Data size equal to Byte */ - ARM GAS /tmp/ccjAMZS2.s page 26 + ARM GAS /tmp/ccbl0nwv.s page 26 1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE) @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 235 .loc 1 1222 21 view .LVU65 236 0028 0020 movs r0, #0 237 .LVL18: - ARM GAS /tmp/ccjAMZS2.s page 27 + ARM GAS /tmp/ccbl0nwv.s page 27 1222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** uint32_t tmp = hdma->Init.FIFOThreshold; @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 250 0038 25D1 bne .L29 1280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { 1281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** case DMA_FIFO_THRESHOLD_1QUARTERFULL: - ARM GAS /tmp/ccjAMZS2.s page 28 + ARM GAS /tmp/ccbl0nwv.s page 28 1282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** case DMA_FIFO_THRESHOLD_HALFFULL: @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 291 .LVL26: 1222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** uint32_t tmp = hdma->Init.FIFOThreshold; 292 .loc 1 1222 21 view .LVU81 - ARM GAS /tmp/ccjAMZS2.s page 29 + ARM GAS /tmp/ccbl0nwv.s page 29 293 0060 7047 bx lr @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 334 .loc 1 1262 16 view .LVU94 335 007c 7047 bx lr 336 .LVL38: - ARM GAS /tmp/ccjAMZS2.s page 30 + ARM GAS /tmp/ccbl0nwv.s page 30 337 .L27: @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 376 .LVL46: 377 .LFB141: 172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** uint32_t tmp = 0U; - ARM GAS /tmp/ccjAMZS2.s page 31 + ARM GAS /tmp/ccbl0nwv.s page 31 378 .loc 1 172 1 is_stmt 1 view -0 @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst)); 414 .loc 1 198 5 view .LVU123 199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst)); - ARM GAS /tmp/ccjAMZS2.s page 32 + ARM GAS /tmp/ccbl0nwv.s page 32 415 .loc 1 199 5 view .LVU124 @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 452 .loc 1 220 23 is_stmt 0 view .LVU142 453 0038 2023 movs r3, #32 - ARM GAS /tmp/ccjAMZS2.s page 33 + ARM GAS /tmp/ccbl0nwv.s page 33 454 003a 6365 str r3, [r4, #84] @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 491 0058 6069 ldr r0, [r4, #20] 240:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | 492 .loc 1 240 72 view .LVU160 - ARM GAS /tmp/ccjAMZS2.s page 34 + ARM GAS /tmp/ccbl0nwv.s page 34 493 005a 0243 orrs r2, r2, r0 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 529 .loc 1 261 3 is_stmt 1 view .LVU178 261:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 530 .loc 1 261 20 is_stmt 0 view .LVU179 - ARM GAS /tmp/ccjAMZS2.s page 35 + ARM GAS /tmp/ccbl0nwv.s page 35 531 007a 636A ldr r3, [r4, #36] @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 567 .loc 1 294 29 is_stmt 0 view .LVU197 568 009a E26D ldr r2, [r4, #92] 294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 36 + ARM GAS /tmp/ccbl0nwv.s page 36 569 .loc 1 294 22 view .LVU198 @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 607 .loc 1 279 9 is_stmt 1 view .LVU215 279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 37 + ARM GAS /tmp/ccbl0nwv.s page 37 608 .loc 1 279 21 is_stmt 0 view .LVU216 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 655 .cfi_offset 14, -4 656 0006 0546 mov r5, r0 322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { - ARM GAS /tmp/ccjAMZS2.s page 38 + ARM GAS /tmp/ccbl0nwv.s page 38 657 .loc 1 322 3 is_stmt 1 view .LVU226 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 693 .loc 1 347 3 is_stmt 1 view .LVU244 347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 694 .loc 1 347 7 is_stmt 0 view .LVU245 - ARM GAS /tmp/ccjAMZS2.s page 39 + ARM GAS /tmp/ccbl0nwv.s page 39 695 002e 2B68 ldr r3, [r5] @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->XferAbortCallback = NULL; 730 .loc 1 363 27 is_stmt 0 view .LVU265 731 004e EC64 str r4, [r5, #76] - ARM GAS /tmp/ccjAMZS2.s page 40 + ARM GAS /tmp/ccbl0nwv.s page 40 364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 773 .thumb_func 775 HAL_DMA_Start: 776 .LVL74: - ARM GAS /tmp/ccjAMZS2.s page 41 + ARM GAS /tmp/ccbl0nwv.s page 41 777 .LFB143: @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 816 .loc 1 436 5 is_stmt 0 view .LVU294 817 001e 84F83430 strb r3, [r4, #52] 436:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 42 + ARM GAS /tmp/ccbl0nwv.s page 42 818 .loc 1 436 5 is_stmt 1 view .LVU295 @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 862 .thumb_func 864 HAL_DMA_Start_IT: 865 .LVL83: - ARM GAS /tmp/ccjAMZS2.s page 43 + ARM GAS /tmp/ccbl0nwv.s page 43 866 .LFB144: @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 905 .loc 1 495 5 is_stmt 1 view .LVU321 495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 906 .loc 1 495 5 view .LVU322 - ARM GAS /tmp/ccjAMZS2.s page 44 + ARM GAS /tmp/ccbl0nwv.s page 44 907 001e 0023 movs r3, #0 @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->Instance->FCR |= DMA_IT_FE; 945 .loc 1 481 19 view .LVU339 946 0042 1368 ldr r3, [r2] - ARM GAS /tmp/ccjAMZS2.s page 45 + ARM GAS /tmp/ccbl0nwv.s page 45 481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->Instance->FCR |= DMA_IT_FE; @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 986 .LFE144: 988 .section .text.HAL_DMA_Abort,"ax",%progbits 989 .align 1 - ARM GAS /tmp/ccjAMZS2.s page 46 + ARM GAS /tmp/ccbl0nwv.s page 46 990 .global HAL_DMA_Abort @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1032 0018 0023 movs r3, #0 1033 001a 84F83430 strb r3, [r4, #52] 528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 47 + ARM GAS /tmp/ccbl0nwv.s page 47 1034 .loc 1 528 5 view .LVU368 @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } 1071 .loc 1 540 21 view .LVU386 1072 003e 1368 ldr r3, [r2] - ARM GAS /tmp/ccjAMZS2.s page 48 + ARM GAS /tmp/ccbl0nwv.s page 48 540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 1111 .loc 1 559 9 view .LVU403 1112 006e 0023 movs r3, #0 - ARM GAS /tmp/ccjAMZS2.s page 49 + ARM GAS /tmp/ccbl0nwv.s page 49 1113 0070 84F83430 strb r3, [r4, #52] @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1152 .align 1 1153 .global HAL_DMA_Abort_IT 1154 .syntax unified - ARM GAS /tmp/ccjAMZS2.s page 50 + ARM GAS /tmp/ccbl0nwv.s page 50 1155 .thumb @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1196 0022 0020 movs r0, #0 1197 .LVL105: 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 51 + ARM GAS /tmp/ccbl0nwv.s page 51 1198 .loc 1 601 1 view .LVU434 @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1244 0012 DBB2 uxtb r3, r3 624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { 1245 .loc 1 624 5 view .LVU445 - ARM GAS /tmp/ccjAMZS2.s page 52 + ARM GAS /tmp/ccbl0nwv.s page 52 1246 0014 022B cmp r3, #2 @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } 1283 .loc 1 643 20 view .LVU463 1284 003c 4FF0200A mov r10, #32 - ARM GAS /tmp/ccjAMZS2.s page 53 + ARM GAS /tmp/ccbl0nwv.s page 53 1285 0040 0AFA03FA lsl r10, r10, r3 @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 1324 .loc 1 675 5 is_stmt 1 view .LVU479 675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 54 + ARM GAS /tmp/ccbl0nwv.s page 54 1325 .loc 1 675 12 is_stmt 0 view .LVU480 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1362 .loc 1 692 7 is_stmt 1 view .LVU497 692:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } 1363 .loc 1 692 18 is_stmt 0 view .LVU498 - ARM GAS /tmp/ccjAMZS2.s page 55 + ARM GAS /tmp/ccbl0nwv.s page 55 1364 0094 BA60 str r2, [r7, #8] @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } 1402 .loc 1 648 20 view .LVU515 1403 00b8 4FF0100A mov r10, #16 - ARM GAS /tmp/ccjAMZS2.s page 56 + ARM GAS /tmp/ccbl0nwv.s page 56 1404 00bc 0AFA03FA lsl r10, r10, r3 @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 725:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { 1441 .loc 1 725 5 is_stmt 0 view .LVU533 1442 00e2 B8F1000F cmp r8, #0 - ARM GAS /tmp/ccjAMZS2.s page 57 + ARM GAS /tmp/ccbl0nwv.s page 57 1443 00e6 19D1 bne .L93 @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1480 0110 84F83500 strb r0, [r4, #53] 718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 1481 .loc 1 718 7 is_stmt 1 view .LVU551 - ARM GAS /tmp/ccjAMZS2.s page 58 + ARM GAS /tmp/ccbl0nwv.s page 58 718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1527 0002 83B0 sub sp, sp, #12 1528 .LCFI14: 1529 .cfi_def_cfa_offset 32 - ARM GAS /tmp/ccjAMZS2.s page 59 + ARM GAS /tmp/ccbl0nwv.s page 59 1530 0004 0446 mov r4, r0 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1567 0028 12F0040F tst r2, #4 1568 002c 0BD0 beq .L98 768:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 60 + ARM GAS /tmp/ccbl0nwv.s page 60 1569 .loc 1 768 7 is_stmt 1 view .LVU580 @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1606 .loc 1 783 7 is_stmt 1 view .LVU597 783:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 1607 .loc 1 783 18 is_stmt 0 view .LVU598 - ARM GAS /tmp/ccjAMZS2.s page 61 + ARM GAS /tmp/ccbl0nwv.s page 61 1608 005a BB60 str r3, [r7, #8] @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { 1645 .loc 1 802 35 view .LVU616 1646 0084 1023 movs r3, #16 - ARM GAS /tmp/ccjAMZS2.s page 62 + ARM GAS /tmp/ccbl0nwv.s page 62 1647 0086 9340 lsls r3, r3, r2 @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1683 .loc 1 818 13 is_stmt 0 view .LVU634 1684 00b0 9847 blx r3 1685 .LVL128: - ARM GAS /tmp/ccjAMZS2.s page 63 + ARM GAS /tmp/ccbl0nwv.s page 63 1686 00b2 10E0 b .L101 @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1724 .loc 1 843 11 is_stmt 0 view .LVU650 1725 00d4 9847 blx r3 1726 .LVL134: - ARM GAS /tmp/ccjAMZS2.s page 64 + ARM GAS /tmp/ccbl0nwv.s page 64 1727 .L101: @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1763 .loc 1 886 27 is_stmt 0 view .LVU668 1764 0100 1B68 ldr r3, [r3] 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { - ARM GAS /tmp/ccjAMZS2.s page 65 + ARM GAS /tmp/ccbl0nwv.s page 65 1765 .loc 1 886 11 view .LVU669 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 864:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } 1803 .loc 1 864 15 is_stmt 0 view .LVU686 1804 012c 2268 ldr r2, [r4] - ARM GAS /tmp/ccjAMZS2.s page 66 + ARM GAS /tmp/ccbl0nwv.s page 66 864:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** } @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1842 0156 A36C ldr r3, [r4, #72] 862:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { 1843 .loc 1 862 49 discriminator 1 view .LVU704 - ARM GAS /tmp/ccjAMZS2.s page 67 + ARM GAS /tmp/ccbl0nwv.s page 67 1844 0158 002B cmp r3, #0 @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 920:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { 1882 .loc 1 920 16 is_stmt 0 view .LVU721 1883 0184 E36B ldr r3, [r4, #60] - ARM GAS /tmp/ccjAMZS2.s page 68 + ARM GAS /tmp/ccbl0nwv.s page 68 920:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** { @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 946:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 1922 .loc 1 946 18 is_stmt 0 view .LVU738 1923 01b2 2368 ldr r3, [r4] - ARM GAS /tmp/ccjAMZS2.s page 69 + ARM GAS /tmp/ccbl0nwv.s page 69 946:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1966 .section .text.HAL_DMA_RegisterCallback,"ax",%progbits 1967 .align 1 1968 .global HAL_DMA_RegisterCallback - ARM GAS /tmp/ccjAMZS2.s page 70 + ARM GAS /tmp/ccbl0nwv.s page 70 1969 .syntax unified @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 2010 .LVL145: 1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 2011 .loc 1 1023 3 is_stmt 0 view .LVU766 - ARM GAS /tmp/ccjAMZS2.s page 71 + ARM GAS /tmp/ccbl0nwv.s page 71 2012 001e 83F83420 strb r2, [r3, #52] @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** break; 2051 .loc 1 995 32 is_stmt 0 view .LVU782 2052 003e 5A64 str r2, [r3, #68] - ARM GAS /tmp/ccjAMZS2.s page 72 + ARM GAS /tmp/ccbl0nwv.s page 72 996:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 2088 .loc 1 1026 1 view .LVU802 2089 0058 7047 bx lr - ARM GAS /tmp/ccjAMZS2.s page 73 + ARM GAS /tmp/ccbl0nwv.s page 73 2090 .cfi_endproc @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1091:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** 2134 .loc 1 1091 3 is_stmt 1 view .LVU815 1091:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** - ARM GAS /tmp/ccjAMZS2.s page 74 + ARM GAS /tmp/ccbl0nwv.s page 74 2135 .loc 1 1091 3 view .LVU816 @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** break; 2176 .loc 1 1056 32 is_stmt 0 view .LVU830 2177 0042 0020 movs r0, #0 - ARM GAS /tmp/ccjAMZS2.s page 75 + ARM GAS /tmp/ccbl0nwv.s page 75 2178 0044 5864 str r0, [r3, #68] @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 2214 .loc 1 1075 36 is_stmt 0 view .LVU848 2215 0062 9864 str r0, [r3, #72] 1076:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->XferAbortCallback = NULL; - ARM GAS /tmp/ccjAMZS2.s page 76 + ARM GAS /tmp/ccbl0nwv.s page 76 2216 .loc 1 1076 7 is_stmt 1 view .LVU849 @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccjAMZS2.s page 1 2263 .thumb_func 2265 HAL_DMA_GetError: 2266 .LVL156: - ARM GAS /tmp/ccjAMZS2.s page 77 + ARM GAS /tmp/ccbl0nwv.s page 77 2267 .LFB152: @@ -4593,53 +4593,53 @@ ARM GAS /tmp/ccjAMZS2.s page 1 2294 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" 2295 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h" 2296 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/ccjAMZS2.s page 78 + ARM GAS /tmp/ccbl0nwv.s page 78 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_dma.c - /tmp/ccjAMZS2.s:20 .text.DMA_SetConfig:00000000 $t - /tmp/ccjAMZS2.s:25 .text.DMA_SetConfig:00000000 DMA_SetConfig - /tmp/ccjAMZS2.s:99 .text.DMA_CalcBaseAndBitshift:00000000 $t - /tmp/ccjAMZS2.s:104 .text.DMA_CalcBaseAndBitshift:00000000 DMA_CalcBaseAndBitshift - /tmp/ccjAMZS2.s:173 .text.DMA_CalcBaseAndBitshift:00000034 $d - /tmp/ccjAMZS2.s:2286 .rodata.flagBitshiftOffset.0:00000000 flagBitshiftOffset.0 - /tmp/ccjAMZS2.s:179 .text.DMA_CheckFifoParam:00000000 $t - /tmp/ccjAMZS2.s:184 .text.DMA_CheckFifoParam:00000000 DMA_CheckFifoParam - /tmp/ccjAMZS2.s:270 .text.DMA_CheckFifoParam:0000004e $d - /tmp/ccjAMZS2.s:274 .text.DMA_CheckFifoParam:00000052 $t - /tmp/ccjAMZS2.s:369 .text.HAL_DMA_Init:00000000 $t - /tmp/ccjAMZS2.s:375 .text.HAL_DMA_Init:00000000 HAL_DMA_Init - /tmp/ccjAMZS2.s:625 .text.HAL_DMA_Init:000000cc $d - /tmp/ccjAMZS2.s:630 .text.HAL_DMA_DeInit:00000000 $t - /tmp/ccjAMZS2.s:636 .text.HAL_DMA_DeInit:00000000 HAL_DMA_DeInit - /tmp/ccjAMZS2.s:769 .text.HAL_DMA_Start:00000000 $t - /tmp/ccjAMZS2.s:775 .text.HAL_DMA_Start:00000000 HAL_DMA_Start - /tmp/ccjAMZS2.s:858 .text.HAL_DMA_Start_IT:00000000 $t - /tmp/ccjAMZS2.s:864 .text.HAL_DMA_Start_IT:00000000 HAL_DMA_Start_IT - /tmp/ccjAMZS2.s:989 .text.HAL_DMA_Abort:00000000 $t - /tmp/ccjAMZS2.s:995 .text.HAL_DMA_Abort:00000000 HAL_DMA_Abort - /tmp/ccjAMZS2.s:1152 .text.HAL_DMA_Abort_IT:00000000 $t - /tmp/ccjAMZS2.s:1158 .text.HAL_DMA_Abort_IT:00000000 HAL_DMA_Abort_IT - /tmp/ccjAMZS2.s:1204 .text.HAL_DMA_PollForTransfer:00000000 $t - /tmp/ccjAMZS2.s:1210 .text.HAL_DMA_PollForTransfer:00000000 HAL_DMA_PollForTransfer - /tmp/ccjAMZS2.s:1505 .text.HAL_DMA_IRQHandler:00000000 $t - /tmp/ccjAMZS2.s:1511 .text.HAL_DMA_IRQHandler:00000000 HAL_DMA_IRQHandler - /tmp/ccjAMZS2.s:1961 .text.HAL_DMA_IRQHandler:000001d4 $d - /tmp/ccjAMZS2.s:1967 .text.HAL_DMA_RegisterCallback:00000000 $t - /tmp/ccjAMZS2.s:1973 .text.HAL_DMA_RegisterCallback:00000000 HAL_DMA_RegisterCallback - /tmp/ccjAMZS2.s:2024 .text.HAL_DMA_RegisterCallback:0000002c $d - /tmp/ccjAMZS2.s:2030 .text.HAL_DMA_RegisterCallback:00000032 $t - /tmp/ccjAMZS2.s:2094 .text.HAL_DMA_UnRegisterCallback:00000000 $t - /tmp/ccjAMZS2.s:2100 .text.HAL_DMA_UnRegisterCallback:00000000 HAL_DMA_UnRegisterCallback - /tmp/ccjAMZS2.s:2149 .text.HAL_DMA_UnRegisterCallback:0000002c $d - /tmp/ccjAMZS2.s:2235 .text.HAL_DMA_GetState:00000000 $t - /tmp/ccjAMZS2.s:2241 .text.HAL_DMA_GetState:00000000 HAL_DMA_GetState - /tmp/ccjAMZS2.s:2259 .text.HAL_DMA_GetError:00000000 $t - /tmp/ccjAMZS2.s:2265 .text.HAL_DMA_GetError:00000000 HAL_DMA_GetError - /tmp/ccjAMZS2.s:2283 .rodata.flagBitshiftOffset.0:00000000 $d - /tmp/ccjAMZS2.s:2156 .text.HAL_DMA_UnRegisterCallback:00000033 $d - /tmp/ccjAMZS2.s:2156 .text.HAL_DMA_UnRegisterCallback:00000034 $t + /tmp/ccbl0nwv.s:20 .text.DMA_SetConfig:00000000 $t + /tmp/ccbl0nwv.s:25 .text.DMA_SetConfig:00000000 DMA_SetConfig + /tmp/ccbl0nwv.s:99 .text.DMA_CalcBaseAndBitshift:00000000 $t + /tmp/ccbl0nwv.s:104 .text.DMA_CalcBaseAndBitshift:00000000 DMA_CalcBaseAndBitshift + /tmp/ccbl0nwv.s:173 .text.DMA_CalcBaseAndBitshift:00000034 $d + /tmp/ccbl0nwv.s:2286 .rodata.flagBitshiftOffset.0:00000000 flagBitshiftOffset.0 + /tmp/ccbl0nwv.s:179 .text.DMA_CheckFifoParam:00000000 $t + /tmp/ccbl0nwv.s:184 .text.DMA_CheckFifoParam:00000000 DMA_CheckFifoParam + /tmp/ccbl0nwv.s:270 .text.DMA_CheckFifoParam:0000004e $d + /tmp/ccbl0nwv.s:274 .text.DMA_CheckFifoParam:00000052 $t + /tmp/ccbl0nwv.s:369 .text.HAL_DMA_Init:00000000 $t + /tmp/ccbl0nwv.s:375 .text.HAL_DMA_Init:00000000 HAL_DMA_Init + /tmp/ccbl0nwv.s:625 .text.HAL_DMA_Init:000000cc $d + /tmp/ccbl0nwv.s:630 .text.HAL_DMA_DeInit:00000000 $t + /tmp/ccbl0nwv.s:636 .text.HAL_DMA_DeInit:00000000 HAL_DMA_DeInit + /tmp/ccbl0nwv.s:769 .text.HAL_DMA_Start:00000000 $t + /tmp/ccbl0nwv.s:775 .text.HAL_DMA_Start:00000000 HAL_DMA_Start + /tmp/ccbl0nwv.s:858 .text.HAL_DMA_Start_IT:00000000 $t + /tmp/ccbl0nwv.s:864 .text.HAL_DMA_Start_IT:00000000 HAL_DMA_Start_IT + /tmp/ccbl0nwv.s:989 .text.HAL_DMA_Abort:00000000 $t + /tmp/ccbl0nwv.s:995 .text.HAL_DMA_Abort:00000000 HAL_DMA_Abort + /tmp/ccbl0nwv.s:1152 .text.HAL_DMA_Abort_IT:00000000 $t + /tmp/ccbl0nwv.s:1158 .text.HAL_DMA_Abort_IT:00000000 HAL_DMA_Abort_IT + /tmp/ccbl0nwv.s:1204 .text.HAL_DMA_PollForTransfer:00000000 $t + /tmp/ccbl0nwv.s:1210 .text.HAL_DMA_PollForTransfer:00000000 HAL_DMA_PollForTransfer + /tmp/ccbl0nwv.s:1505 .text.HAL_DMA_IRQHandler:00000000 $t + /tmp/ccbl0nwv.s:1511 .text.HAL_DMA_IRQHandler:00000000 HAL_DMA_IRQHandler + /tmp/ccbl0nwv.s:1961 .text.HAL_DMA_IRQHandler:000001d4 $d + /tmp/ccbl0nwv.s:1967 .text.HAL_DMA_RegisterCallback:00000000 $t + /tmp/ccbl0nwv.s:1973 .text.HAL_DMA_RegisterCallback:00000000 HAL_DMA_RegisterCallback + /tmp/ccbl0nwv.s:2024 .text.HAL_DMA_RegisterCallback:0000002c $d + /tmp/ccbl0nwv.s:2030 .text.HAL_DMA_RegisterCallback:00000032 $t + /tmp/ccbl0nwv.s:2094 .text.HAL_DMA_UnRegisterCallback:00000000 $t + /tmp/ccbl0nwv.s:2100 .text.HAL_DMA_UnRegisterCallback:00000000 HAL_DMA_UnRegisterCallback + /tmp/ccbl0nwv.s:2149 .text.HAL_DMA_UnRegisterCallback:0000002c $d + /tmp/ccbl0nwv.s:2235 .text.HAL_DMA_GetState:00000000 $t + /tmp/ccbl0nwv.s:2241 .text.HAL_DMA_GetState:00000000 HAL_DMA_GetState + /tmp/ccbl0nwv.s:2259 .text.HAL_DMA_GetError:00000000 $t + /tmp/ccbl0nwv.s:2265 .text.HAL_DMA_GetError:00000000 HAL_DMA_GetError + /tmp/ccbl0nwv.s:2283 .rodata.flagBitshiftOffset.0:00000000 $d + /tmp/ccbl0nwv.s:2156 .text.HAL_DMA_UnRegisterCallback:00000033 $d + /tmp/ccbl0nwv.s:2156 .text.HAL_DMA_UnRegisterCallback:00000034 $t UNDEFINED SYMBOLS HAL_GetTick diff --git a/build/stm32f7xx_hal_dma.o b/build/stm32f7xx_hal_dma.o index ac02e0d6c6a5f36d131324a4a6f456cd16a290ed..e0305b5c5d23d90ed8d4c80359712f342a558484 100644 GIT binary patch delta 2011 zcmYLKYitx%6rM9P`)Iq{*}Z+Y+igp+Er>0|zJRTz(3Z->@@motVwZLc3fQs*Y8$lp zsxdwaUWqmY2{r*#1Zz=<#vdj$Bvc#FAA~>zd?ZL>6ay**jo-Pm37b80=ljmZF_~z27vAj`N{F_cq^Q7sTc3n=nQro%>P18+RI#`|Dli+o7rZcHK{?gdz_?fV{ z9mla4b$nl(UICBU%5L42VS-=C8KoI7f^tMvn#(Jz-HYix`HDNoKgKbK$p0L>@;#m^ zdD1;UbjShdTV1zCBQ!8aQ9IE^T-#Ad+kmVDTr}%Ls3L2EbFCU&4b5nk#c?^=$ivsD zg?LAqu?xsQ+c`Tff_QOWJ{6Ze_!~IqT#u5J?-n`e=nTc6N1S9>9fLlxm*K(~Ocoay z*2Q4DcpRObOJXn}s@S_c26M$_hO1(5x+uklolTxhyK#|N!MH8vo~0R5m$~uj1qV=5 zv(`aBSwlQRYcsSP)+Fvt>nn(NXoisM;)8?tKxx)eT(RRTSe!fb&k!7&m~$tkfV4(b z*c4*P+JUCJwH3+?YdUz-;&u+JfVFDITGsTEei=oQ=Ac!(^Hm>#6JuQcwH&_J^EGjW zXE^vqkjJX$o8oWA!@+%6^!!qBk>Q@;C(2tUMzK0&j!Pw1iZ8g<-n=XYL!ty*b-ojW z3q+K2M`Ey6oZ#GjG1ws5*}LC{bMlu7Cnq0>xmSoa3=anFGqpy%&e5Ymd*aPvQhtB^j^Xmf|bKC z$=<{w{jMqZCuYo7ReslJag|@-y}%JK^AK<9>iwy6Y1$%K&M=zOpSt}V_jCrL@@8T( z4M?Z;F3pe!tYC+#)ulhewGJWWeOT6R-b0rjK8M407Q|^LXW3*wk5_YR+C7j(YPTD8 zwOcJP2qE;OtzjBMg0O&B=K7LTmAp;1>oDk1b`8iSzRH{z(1jZG`$H~>4f$WhV8{o3 zsrZdN%|SA4DIMUP=DNgDQT4DmeZQ=-aR?b%-XY zp7)U#uW4zpEOnG7sEx^;AfimF12sWCOkM!-EzEwtXGrb1H~}Mo*&5E0(y$gpD{N+^ zJmdG%GI`M-Y*I=_NGX?a4#R9EBeaO?e+goYNu^|jnwd=X;ExDqD;c3JOl}3S0fsZN zOcaz|v#N|}u3M%6f6nXJt!7%s3qJaA4l*phed0iByc)7|kb$IF% zaqeKn1LM<^X5@`GmuBj6bgo}cme(eiZ0z0=DT!>4cK3u!Y9qaywsrT&W95NytKw}v zes#2?rn55|>Fpi=bZ&7Wx#hL?KJv+yaHG81?vW?LwNxqZgd1srd~|&yHOP_mebg-d z9gWm89_~mZdPeql_R%?cvlEo8i8Shew92<4kLg$2nfll@(!p5nYSVBfB5c7bpQYW delta 2087 zcmYLK3v5(X5WREX+fUnVUwivu%Wk(_O4@?hg7yP+k#8wrYd^H1P_$jTZ)y3oWm{~T z6k8*yQ9}T)1}Z_MBp?`3XjFp6#DoSRv6M(c2>6STh%pir3>r~q?t6xp%)RfNnLBgt z?7Zxr2{Y~8d8Tp3-j)-tjON!h#<=cUge(VlfDky#Y2yw6@;UC% z=60OLO{=B%LT?#kOkal!=dO^Byh$gDGhaf=5hGrA&6W$@m2h0X?9NWPLNP}nWT&iSU^9CxszN#xgGh?i^#~pg&7Y~Ef|w@)>w?IhV^7&Ty|Ch zx`An1P`sl=8$y&a+c`VV#CUN-Zi>qqe1M#Do<~W_b&Dlf(HXL#M|?+cp$(J88G=h} zm?r)uSYbo2cor)=SJ}`nTFF~&!yKWb24}qur;9asVP~Ufs#Ul^^bl^g-Lsf>$su#% zy?G}vCo_ieEEvbBg+?E0*Nk8BT{pf&@eZbC$>-t&gV~sY8J+0B8*@tcJpTxT?T$GI zART?iXSguq8ZKarU=%mrK%tsZsWKwX9L7qL&a^>FvXkGyB&i`R)#`jD8ITiKFxL56 zHofy)CVr+K4(D+UN24p=kQAofx8k$~0l zCh@y`FQEuNm)8?!ls|zk=&`3y7ne{B^xDwPv<~bCY}cMdIuq_=i`-ww1Lc9KcjQ7( zRz@r8f^+(!$1x&AJ;cXfB4eJJFdz?l0#?AgdWZs^Myo*coARtP_pzU=YSyzE=4| zVp{%9QsL3VG+R*TFCmzur_;xI8;}2JW!fwKNm=t%nF(znmGNSVG_;^fFrl?r34GOb zjR~#iI_@E~QZ(#jPf`KTa>#>8ndK_W9X^Y)+(PeFir7OP>_fp78>^bn8<^jazbQ6 ztNcmir+eu)IH`tbc@oYYTH)x}^wb%__|>tt#gRzN?CBY+D)#YEQG3@`vnXmt!bR09 zYa5E{!;y}z+V-yAuFj6Omet!g^q8?|xXo;dg(KluQKi{w#=^Z_v6kAUOXOs!U-p$& z$it;+r^|-8v8;M=%gWA<-iH2ebD0?(dv#u6z8ngBXferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL)) 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** { - ARM GAS /tmp/ccwTmXyh.s page 5 + ARM GAS /tmp/ccCv1Rv2.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** hdma->Instance->CR |= DMA_IT_HT; @@ -298,7 +298,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** /** @addtogroup DMAEx_Private_Functions 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** * @{ - ARM GAS /tmp/ccwTmXyh.s page 6 + ARM GAS /tmp/ccCv1Rv2.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** */ @@ -358,7 +358,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 52 .loc 1 289 25 view .LVU9 53 000e 9960 str r1, [r3, #8] 54 .LVL2: - ARM GAS /tmp/ccwTmXyh.s page 7 + ARM GAS /tmp/ccCv1Rv2.s page 7 290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** @@ -418,7 +418,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 99 @ args = 4, pretend = 0, frame = 0 100 @ frame_needed = 0, uses_anonymous_args = 0 103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** HAL_StatusTypeDef status = HAL_OK; - ARM GAS /tmp/ccwTmXyh.s page 8 + ARM GAS /tmp/ccCv1Rv2.s page 8 101 .loc 1 103 1 is_stmt 0 view .LVU21 @@ -478,7 +478,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 141 0024 38BD pop {r3, r4, r5, pc} 142 .LVL9: 143 .L12: - ARM GAS /tmp/ccwTmXyh.s page 9 + ARM GAS /tmp/ccCv1Rv2.s page 9 112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** status = HAL_ERROR; @@ -538,7 +538,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 181 0048 FFF7FEFF bl DMA_MultiBufferSetConfig 182 .LVL15: 135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** } - ARM GAS /tmp/ccwTmXyh.s page 10 + ARM GAS /tmp/ccCv1Rv2.s page 10 183 .loc 1 135 7 is_stmt 1 view .LVU53 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 230 0006 8028 cmp r0, #128 231 0008 11D0 beq .L302 171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** - ARM GAS /tmp/ccwTmXyh.s page 11 + ARM GAS /tmp/ccCv1Rv2.s page 11 232 .loc 1 171 3 is_stmt 1 view .LVU63 @@ -658,7 +658,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 270 0032 6365 str r3, [r4, #84] 167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** } 271 .loc 1 167 5 is_stmt 1 view .LVU80 - ARM GAS /tmp/ccwTmXyh.s page 12 + ARM GAS /tmp/ccCv1Rv2.s page 12 167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** } @@ -718,7 +718,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 310 005c 9342 cmp r3, r2 311 005e 40F29880 bls .L18 191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); - ARM GAS /tmp/ccwTmXyh.s page 13 + ARM GAS /tmp/ccCv1Rv2.s page 13 312 .loc 1 191 5 is_stmt 0 discriminator 1 view .LVU97 @@ -778,7 +778,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 356 .loc 1 191 5 discriminator 23 view .LVU108 357 00ba 02F58062 add r2, r2, #1024 - ARM GAS /tmp/ccwTmXyh.s page 14 + ARM GAS /tmp/ccCv1Rv2.s page 14 358 00be 9342 cmp r3, r2 @@ -838,7 +838,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 401 .loc 1 192 5 discriminator 11 view .LVU119 402 0110 02F58062 add r2, r2, #1024 403 0114 9342 cmp r3, r2 - ARM GAS /tmp/ccwTmXyh.s page 15 + ARM GAS /tmp/ccCv1Rv2.s page 15 404 0116 00F09C81 beq .L114 @@ -898,7 +898,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 447 0168 4FF40062 mov r2, #2048 448 016c B0E7 b .L19 449 .L66: - ARM GAS /tmp/ccwTmXyh.s page 16 + ARM GAS /tmp/ccCv1Rv2.s page 16 191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); @@ -958,7 +958,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 493 01b4 2DD0 beq .L76 191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 494 .loc 1 191 5 discriminator 59 view .LVU142 - ARM GAS /tmp/ccwTmXyh.s page 17 + ARM GAS /tmp/ccCv1Rv2.s page 17 495 01b6 A2F58962 sub r2, r2, #1096 @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 538 0204 3B4B ldr r3, .L325+4 539 0206 9A60 str r2, [r3, #8] 540 .LVL31: - ARM GAS /tmp/ccwTmXyh.s page 18 + ARM GAS /tmp/ccCv1Rv2.s page 18 191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 584 .L21: 191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 585 .loc 1 191 5 discriminator 52 view .LVU165 - ARM GAS /tmp/ccwTmXyh.s page 19 + ARM GAS /tmp/ccCv1Rv2.s page 19 586 0240 2E4A ldr r2, .L325+12 @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 629 .loc 1 191 5 discriminator 122 view .LVU176 630 0294 A2F56872 sub r2, r2, #928 631 0298 9342 cmp r3, r2 - ARM GAS /tmp/ccwTmXyh.s page 20 + ARM GAS /tmp/ccCv1Rv2.s page 20 632 029a 25D0 beq .L95 @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 675 .L91: 191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); 676 .loc 1 191 5 discriminator 117 view .LVU188 - ARM GAS /tmp/ccwTmXyh.s page 21 + ARM GAS /tmp/ccCv1Rv2.s page 21 677 02d0 4FF40063 mov r3, #2048 @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 722 0326 9342 cmp r3, r2 723 0328 2BD0 beq .L101 191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma)); - ARM GAS /tmp/ccwTmXyh.s page 22 + ARM GAS /tmp/ccCv1Rv2.s page 22 724 .loc 1 191 5 discriminator 161 view .LVU198 @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 767 .loc 1 191 5 discriminator 200 view .LVU209 768 0374 AEE6 b .L20 769 .LVL36: - ARM GAS /tmp/ccwTmXyh.s page 23 + ARM GAS /tmp/ccCv1Rv2.s page 23 770 .L98: @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 813 03ac 4FF48012 mov r2, #1048576 814 03b0 00E0 b .L27 815 .L109: - ARM GAS /tmp/ccwTmXyh.s page 24 + ARM GAS /tmp/ccCv1Rv2.s page 24 192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 859 040e 00F09981 beq .L164 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)); 860 .loc 1 193 5 discriminator 17 view .LVU232 - ARM GAS /tmp/ccwTmXyh.s page 25 + ARM GAS /tmp/ccCv1Rv2.s page 25 861 0412 A2F58962 sub r2, r2, #1096 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 904 .loc 1 192 5 discriminator 18 view .LVU243 905 045e 4FF48062 mov r2, #1024 906 0462 A7E7 b .L27 - ARM GAS /tmp/ccwTmXyh.s page 26 + ARM GAS /tmp/ccCv1Rv2.s page 26 907 .L117: @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 950 04ae 9342 cmp r3, r2 951 04b0 29D0 beq .L127 192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); - ARM GAS /tmp/ccwTmXyh.s page 27 + ARM GAS /tmp/ccCv1Rv2.s page 27 952 .loc 1 192 5 discriminator 65 view .LVU255 @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); 996 .loc 1 192 5 discriminator 60 view .LVU266 997 04f6 1022 movs r2, #16 - ARM GAS /tmp/ccwTmXyh.s page 28 + ARM GAS /tmp/ccCv1Rv2.s page 28 998 04f8 F6E7 b .L30 @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1041 0538 A2F56872 sub r2, r2, #928 1042 053c 9342 cmp r3, r2 1043 053e 2FD0 beq .L135 - ARM GAS /tmp/ccwTmXyh.s page 29 + ARM GAS /tmp/ccCv1Rv2.s page 29 192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1087 .L133: 192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); 1088 .loc 1 192 5 discriminator 105 view .LVU289 - ARM GAS /tmp/ccwTmXyh.s page 30 + ARM GAS /tmp/ccCv1Rv2.s page 30 1089 0594 1023 movs r3, #16 @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1133 .L327: 1134 05cc 10600240 .word 1073897488 1135 05d0 00600240 .word 1073897472 - ARM GAS /tmp/ccwTmXyh.s page 31 + ARM GAS /tmp/ccCv1Rv2.s page 31 1136 05d4 00640240 .word 1073898496 @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1180 062e 27D0 beq .L153 192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma)); 1181 .loc 1 192 5 discriminator 169 view .LVU310 - ARM GAS /tmp/ccwTmXyh.s page 32 + ARM GAS /tmp/ccCv1Rv2.s page 32 1182 0630 02F58062 add r2, r2, #1024 @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1225 .loc 1 192 5 discriminator 164 view .LVU321 1226 066e 4FF48063 mov r3, #1024 1227 0672 F0E7 b .L33 - ARM GAS /tmp/ccwTmXyh.s page 33 + ARM GAS /tmp/ccCv1Rv2.s page 33 1228 .L151: @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1271 06b6 9342 cmp r3, r2 1272 06b8 00F0A981 beq .L206 194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma)); - ARM GAS /tmp/ccwTmXyh.s page 34 + ARM GAS /tmp/ccCv1Rv2.s page 34 1273 .loc 1 194 5 discriminator 5 view .LVU333 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)); 1317 .loc 1 193 5 discriminator 6 view .LVU344 1318 0726 0822 movs r2, #8 - ARM GAS /tmp/ccwTmXyh.s page 35 + ARM GAS /tmp/ccCv1Rv2.s page 35 1319 0728 B7E7 b .L35 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1362 0762 A83A subs r2, r2, #168 1363 0764 9342 cmp r3, r2 1364 0766 31D0 beq .L169 - ARM GAS /tmp/ccwTmXyh.s page 36 + ARM GAS /tmp/ccCv1Rv2.s page 36 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)); @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1408 07be 02D0 beq .L314 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)); 1409 .loc 1 193 5 discriminator 76 view .LVU367 - ARM GAS /tmp/ccwTmXyh.s page 37 + ARM GAS /tmp/ccCv1Rv2.s page 37 1410 07c0 4FF00072 mov r2, #33554432 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1453 .loc 1 193 5 discriminator 70 view .LVU378 1454 07f8 4FF40022 mov r2, #524288 1455 07fc E7E7 b .L38 - ARM GAS /tmp/ccwTmXyh.s page 38 + ARM GAS /tmp/ccCv1Rv2.s page 38 1456 .L178: @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1499 084a 9342 cmp r3, r2 1500 084c 28D0 beq .L188 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)); - ARM GAS /tmp/ccwTmXyh.s page 39 + ARM GAS /tmp/ccCv1Rv2.s page 39 1501 .loc 1 193 5 discriminator 118 view .LVU390 @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)); 1545 .loc 1 193 5 discriminator 113 view .LVU401 1546 088e 4FF40073 mov r3, #512 - ARM GAS /tmp/ccwTmXyh.s page 40 + ARM GAS /tmp/ccCv1Rv2.s page 40 1547 0892 F3E7 b .L40 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1592 08e4 9342 cmp r3, r2 1593 08e6 2FD0 beq .L195 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)); - ARM GAS /tmp/ccwTmXyh.s page 41 + ARM GAS /tmp/ccCv1Rv2.s page 41 1594 .loc 1 193 5 discriminator 157 view .LVU411 @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma)); 1638 .loc 1 193 5 discriminator 154 view .LVU422 1639 093c 0823 movs r3, #8 - ARM GAS /tmp/ccwTmXyh.s page 42 + ARM GAS /tmp/ccCv1Rv2.s page 42 1640 .L41: @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1683 0974 4FF40023 mov r3, #524288 1684 0978 E1E7 b .L41 1685 .L313: - ARM GAS /tmp/ccwTmXyh.s page 43 + ARM GAS /tmp/ccCv1Rv2.s page 43 194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma)); @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1729 09d2 00F07181 beq .L259 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** 1730 .loc 1 195 5 discriminator 15 view .LVU445 - ARM GAS /tmp/ccwTmXyh.s page 44 + ARM GAS /tmp/ccCv1Rv2.s page 44 1731 09d6 02F58062 add r2, r2, #1024 @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1774 .loc 1 194 5 discriminator 16 view .LVU456 1775 0a26 4FF48072 mov r2, #256 1776 0a2a AAE7 b .L43 - ARM GAS /tmp/ccwTmXyh.s page 45 + ARM GAS /tmp/ccCv1Rv2.s page 45 1777 .L212: @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1820 0a74 9342 cmp r3, r2 1821 0a76 2AD0 beq .L222 194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma)); - ARM GAS /tmp/ccwTmXyh.s page 46 + ARM GAS /tmp/ccCv1Rv2.s page 46 1822 .loc 1 194 5 discriminator 63 view .LVU468 @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma)); 1866 .loc 1 194 5 discriminator 58 view .LVU479 1867 0ac0 0422 movs r2, #4 - ARM GAS /tmp/ccwTmXyh.s page 47 + ARM GAS /tmp/ccCv1Rv2.s page 47 1868 0ac2 F8E7 b .L46 @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1911 0afe 02F58062 add r2, r2, #1024 1912 0b02 9342 cmp r3, r2 1913 0b04 31D0 beq .L230 - ARM GAS /tmp/ccwTmXyh.s page 48 + ARM GAS /tmp/ccCv1Rv2.s page 48 194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma)); @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 1957 .L319: 194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma)); 1958 .loc 1 194 5 discriminator 126 view .LVU502 - ARM GAS /tmp/ccwTmXyh.s page 49 + ARM GAS /tmp/ccCv1Rv2.s page 49 1959 0b5c 4FF48023 mov r3, #262144 @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2002 .loc 1 194 5 discriminator 123 view .LVU513 2003 0b94 4FF48023 mov r3, #262144 2004 0b98 E4E7 b .L48 - ARM GAS /tmp/ccwTmXyh.s page 50 + ARM GAS /tmp/ccCv1Rv2.s page 50 2005 .L332: @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2050 0bf6 28D0 beq .L248 194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma)); 2051 .loc 1 194 5 discriminator 167 view .LVU523 - ARM GAS /tmp/ccwTmXyh.s page 51 + ARM GAS /tmp/ccCv1Rv2.s page 51 2052 0bf8 A2F58962 sub r2, r2, #1096 @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2095 .loc 1 194 5 discriminator 162 view .LVU534 2096 0c38 4FF48073 mov r3, #256 2097 0c3c F3E7 b .L49 - ARM GAS /tmp/ccwTmXyh.s page 52 + ARM GAS /tmp/ccCv1Rv2.s page 52 2098 .L246: @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2139 .loc 1 198 25 view .LVU547 2140 0c72 43F01603 orr r3, r3, #22 2141 0c76 1360 str r3, [r2] - ARM GAS /tmp/ccwTmXyh.s page 53 + ARM GAS /tmp/ccCv1Rv2.s page 53 199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2181 0caa DEE7 b .L51 2182 .L256: 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** - ARM GAS /tmp/ccwTmXyh.s page 54 + ARM GAS /tmp/ccCv1Rv2.s page 54 2183 .loc 1 195 5 discriminator 10 view .LVU563 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** 2227 .loc 1 195 5 discriminator 55 view .LVU574 2228 0ce6 A2F56872 sub r2, r2, #928 - ARM GAS /tmp/ccwTmXyh.s page 55 + ARM GAS /tmp/ccCv1Rv2.s page 55 2229 0cea 9342 cmp r3, r2 @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2272 0d3c 4FF48032 mov r2, #65536 2273 0d40 00E0 b .L54 2274 .L265: - ARM GAS /tmp/ccwTmXyh.s page 56 + ARM GAS /tmp/ccCv1Rv2.s page 56 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2318 .L275: 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** 2319 .loc 1 195 5 discriminator 74 view .LVU597 - ARM GAS /tmp/ccwTmXyh.s page 57 + ARM GAS /tmp/ccCv1Rv2.s page 57 2320 0d72 4FF48032 mov r2, #65536 @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2363 .loc 1 195 5 discriminator 120 view .LVU608 2364 0dc4 02F58062 add r2, r2, #1024 2365 0dc8 9342 cmp r3, r2 - ARM GAS /tmp/ccwTmXyh.s page 58 + ARM GAS /tmp/ccCv1Rv2.s page 58 2366 0dca 22D0 beq .L286 @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2409 0e02 F2E7 b .L56 2410 .L283: 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** - ARM GAS /tmp/ccwTmXyh.s page 59 + ARM GAS /tmp/ccCv1Rv2.s page 59 2411 .loc 1 195 5 discriminator 117 view .LVU620 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2456 0e52 A2F58962 sub r2, r2, #1096 2457 0e56 9342 cmp r3, r2 2458 0e58 2BD0 beq .L293 - ARM GAS /tmp/ccwTmXyh.s page 60 + ARM GAS /tmp/ccCv1Rv2.s page 60 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2502 .L290: 195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** 2503 .loc 1 195 5 discriminator 156 view .LVU641 - ARM GAS /tmp/ccwTmXyh.s page 61 + ARM GAS /tmp/ccCv1Rv2.s page 61 2504 0ea6 0123 movs r3, #1 @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2547 0ed8 7FF4D7AE bne .L58 2548 0edc DAE6 b .L59 2549 .LVL38: - ARM GAS /tmp/ccwTmXyh.s page 62 + ARM GAS /tmp/ccCv1Rv2.s page 62 2550 .L60: @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccwTmXyh.s page 1 244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** } 2595 .loc 1 244 9 is_stmt 0 view .LVU664 2596 000a 0368 ldr r3, [r0] - ARM GAS /tmp/ccwTmXyh.s page 63 + ARM GAS /tmp/ccCv1Rv2.s page 63 244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** } @@ -3734,29 +3734,29 @@ ARM GAS /tmp/ccwTmXyh.s page 1 2607 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" 2608 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" 2609 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h" - ARM GAS /tmp/ccwTmXyh.s page 64 + ARM GAS /tmp/ccCv1Rv2.s page 64 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_dma_ex.c - /tmp/ccwTmXyh.s:20 .text.DMA_MultiBufferSetConfig:00000000 $t - /tmp/ccwTmXyh.s:25 .text.DMA_MultiBufferSetConfig:00000000 DMA_MultiBufferSetConfig - /tmp/ccwTmXyh.s:88 .text.HAL_DMAEx_MultiBufferStart:00000000 $t - /tmp/ccwTmXyh.s:94 .text.HAL_DMAEx_MultiBufferStart:00000000 HAL_DMAEx_MultiBufferStart - /tmp/ccwTmXyh.s:200 .text.HAL_DMAEx_MultiBufferStart_IT:00000000 $t - /tmp/ccwTmXyh.s:206 .text.HAL_DMAEx_MultiBufferStart_IT:00000000 HAL_DMAEx_MultiBufferStart_IT - /tmp/ccwTmXyh.s:698 .text.HAL_DMAEx_MultiBufferStart_IT:000002f0 $d - /tmp/ccwTmXyh.s:705 .text.HAL_DMAEx_MultiBufferStart_IT:00000304 $t - /tmp/ccwTmXyh.s:1134 .text.HAL_DMAEx_MultiBufferStart_IT:000005cc $d - /tmp/ccwTmXyh.s:1142 .text.HAL_DMAEx_MultiBufferStart_IT:000005e4 $t - /tmp/ccwTmXyh.s:1571 .text.HAL_DMAEx_MultiBufferStart_IT:000008b4 $d - /tmp/ccwTmXyh.s:1579 .text.HAL_DMAEx_MultiBufferStart_IT:000008cc $t - /tmp/ccwTmXyh.s:2008 .text.HAL_DMAEx_MultiBufferStart_IT:00000b9c $d - /tmp/ccwTmXyh.s:2016 .text.HAL_DMAEx_MultiBufferStart_IT:00000bb4 $t - /tmp/ccwTmXyh.s:2433 .text.HAL_DMAEx_MultiBufferStart_IT:00000e20 $d - /tmp/ccwTmXyh.s:2440 .text.HAL_DMAEx_MultiBufferStart_IT:00000e34 $t - /tmp/ccwTmXyh.s:2557 .text.HAL_DMAEx_MultiBufferStart_IT:00000ee4 $d - /tmp/ccwTmXyh.s:2563 .text.HAL_DMAEx_ChangeMemory:00000000 $t - /tmp/ccwTmXyh.s:2569 .text.HAL_DMAEx_ChangeMemory:00000000 HAL_DMAEx_ChangeMemory + /tmp/ccCv1Rv2.s:20 .text.DMA_MultiBufferSetConfig:00000000 $t + /tmp/ccCv1Rv2.s:25 .text.DMA_MultiBufferSetConfig:00000000 DMA_MultiBufferSetConfig + /tmp/ccCv1Rv2.s:88 .text.HAL_DMAEx_MultiBufferStart:00000000 $t + /tmp/ccCv1Rv2.s:94 .text.HAL_DMAEx_MultiBufferStart:00000000 HAL_DMAEx_MultiBufferStart + /tmp/ccCv1Rv2.s:200 .text.HAL_DMAEx_MultiBufferStart_IT:00000000 $t + /tmp/ccCv1Rv2.s:206 .text.HAL_DMAEx_MultiBufferStart_IT:00000000 HAL_DMAEx_MultiBufferStart_IT + /tmp/ccCv1Rv2.s:698 .text.HAL_DMAEx_MultiBufferStart_IT:000002f0 $d + /tmp/ccCv1Rv2.s:705 .text.HAL_DMAEx_MultiBufferStart_IT:00000304 $t + /tmp/ccCv1Rv2.s:1134 .text.HAL_DMAEx_MultiBufferStart_IT:000005cc $d + /tmp/ccCv1Rv2.s:1142 .text.HAL_DMAEx_MultiBufferStart_IT:000005e4 $t + /tmp/ccCv1Rv2.s:1571 .text.HAL_DMAEx_MultiBufferStart_IT:000008b4 $d + /tmp/ccCv1Rv2.s:1579 .text.HAL_DMAEx_MultiBufferStart_IT:000008cc $t + /tmp/ccCv1Rv2.s:2008 .text.HAL_DMAEx_MultiBufferStart_IT:00000b9c $d + /tmp/ccCv1Rv2.s:2016 .text.HAL_DMAEx_MultiBufferStart_IT:00000bb4 $t + /tmp/ccCv1Rv2.s:2433 .text.HAL_DMAEx_MultiBufferStart_IT:00000e20 $d + /tmp/ccCv1Rv2.s:2440 .text.HAL_DMAEx_MultiBufferStart_IT:00000e34 $t + /tmp/ccCv1Rv2.s:2557 .text.HAL_DMAEx_MultiBufferStart_IT:00000ee4 $d + /tmp/ccCv1Rv2.s:2563 .text.HAL_DMAEx_ChangeMemory:00000000 $t + /tmp/ccCv1Rv2.s:2569 .text.HAL_DMAEx_ChangeMemory:00000000 HAL_DMAEx_ChangeMemory NO UNDEFINED SYMBOLS diff --git a/build/stm32f7xx_hal_dma_ex.o b/build/stm32f7xx_hal_dma_ex.o index 858c163a3d949e6d258045e96643b0f8c4e0d96d..a924dbf90f81c0d11001a4303297afb9c9630d85 100644 GIT binary patch delta 1389 zcmZXTZD^ZS6vyv*UYaL;a!o=~)7CCs$yh9F*Wy~%j?OkQ!wx$7w#szq7HmSxY}2J3 zbAv6)V0Mb=xGOput;KC_AG#N+up%pdm>(P}2r3L5^NS#51*eGU2l0QNJQ2abIrskl z=jEPzll*v^Zl0#MH`4VR4GaFlDMJX~MG~T*iT`~x%hQOsW_Z3pRHKS(ylCdr$kYsT z7G;`cZsUcl!%oa&=tAh9VXwE<pYYCdyBnnc!K-C7 zAYSRAVUQ806Cis5dtnb?WU`NPmK}lDh5j3f9l~hRpZQPC6Lf)VDxI2h@FesRyphqa zpFzOaYPNbO(MnFKTyVpaXQ7#$zBIRuS#pUVq02>|yvx|_VnE(vOu87Bf9mQ^u&(ei zt9x8^qx_q3$i+=E$~fZUGo11koOJZji(1WMAU(Y!k9> z{{nB=37%W%Cv{N}=7e^fMJ{_}1*r$kGlBPUko+Es`9?kOwV046x#-O(UtfzEa-Q+6 zD8H8$Ym+ZCo{g?J(RR6;YgPRPr?x}hXPj%e>0p=a!CdA$jA<12$on|fJnx26@;T0) zcd=J~#nJa%?2{2LUT|?hW*8TvrQg+F`70-X7)@i*V*BK}u6BjC?#QtEk+zD)?$4v5 zm43oBb_@|=U&Iz)^*vmoqD{L4@*Au0p$@eas@?S|>c~%>4>@fh{53Cr>g7XdFg#Ym z=N%lX^6{hlDbJXMb-=`nnAut|g{JJRA*)8hT9a z4{vC6>WV3@dx-RPSi~8lILvi5DDuN1V`?!RYV>lC;t7s?hwbMaamFgX%h~~4XAo8! zQTM`4g%N})8*=_Gh>90r>wM#gb80rhrv_mXRys91zPcgxS@Pwhz@*gZKuv-j9kCY8ym*P6G7TgGw| znU>6vd~Pb;lFCdUn#oP6mzwLASDWjpayb8DVstd0nVw#Lu=PQJZmYZ9{q&`3>^Vx` zszvxZRg>taq8f+4tybU-6@HVt0)JV3lZe{54+ax9FA4TajeKzmWB28wR zA)Az-!gSW@#$BD#Xek>L9MzSg%rCt&Fl5kaQ8Hv+YNVCo0oj$s|sV@Yrt4iV*mS-G|w>VlH%D!Rf4M9v`Ok=%#;*W zpiR=$gS3IR?r5G?nKAiCJjUzj z1rwwz;Gd!Vh*x`3l#R#ASE=~Q4$HK62!FbR741E8eYS%&t(){~JJ`#r1(jO``FGki zC5n2D2SyPotuTj3{{+uWzl1G={u*WJAzWo9{|&5{DN*_9|9Cp!GI?qo&l0Y{Aj>#Cx4yb`S6#H+Qlp66-}2NZ#S24R~MSEJFt&W(UcbnnrI&2^s%TPxN?$H zE9#;PkMKLBe(1s!?-Tnl5Y#s?_-3VHY%g!t4EU$BQ!6TgMmFks!^FEUbive(x4Z5psCR{PWNtAK%*;ZJcA*QD4QNQ-lEMI_@X z)X&G$5Eb|0d*KPe6A|bT`xC8jOgxKgO1zqARd2O3)*Mode & EXTI_MODE_EVENT) != 0x00u) - ARM GAS /tmp/ccq3Qi7K.s page 7 + ARM GAS /tmp/cc8tFyty.s page 7 124 .loc 1 219 3 is_stmt 1 view .LVU40 @@ -418,7 +418,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 189:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** } 164 .loc 1 189 11 is_stmt 0 view .LVU52 165 007c 134D ldr r5, .L17 - ARM GAS /tmp/ccq3Qi7K.s page 8 + ARM GAS /tmp/cc8tFyty.s page 8 166 007e EC68 ldr r4, [r5, #12] @@ -478,7 +478,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 204 00a8 46F82010 str r1, [r6, r0, lsl #2] 205 00ac CDE7 b .L3 206 .LVL12: - ARM GAS /tmp/ccq3Qi7K.s page 9 + ARM GAS /tmp/cc8tFyty.s page 9 207 .L8: @@ -538,7 +538,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 255 HAL_EXTI_GetConfigLine: 256 .LVL16: 257 .LFB142: - ARM GAS /tmp/ccq3Qi7K.s page 10 + ARM GAS /tmp/cc8tFyty.s page 10 230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** @@ -598,7 +598,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 284 .loc 1 256 3 is_stmt 1 view .LVU89 285 .loc 1 256 11 is_stmt 0 view .LVU90 286 0010 04F01F0C and ip, r4, #31 - ARM GAS /tmp/ccq3Qi7K.s page 11 + ARM GAS /tmp/cc8tFyty.s page 11 287 .LVL17: @@ -658,7 +658,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 322 .L23: 276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** } 277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** - ARM GAS /tmp/ccq3Qi7K.s page 12 + ARM GAS /tmp/cc8tFyty.s page 12 278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* Get default Trigger and GPIOSel configuration */ @@ -718,7 +718,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 359 005c 9A60 str r2, [r3, #8] 360 .L25: 296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** } - ARM GAS /tmp/ccq3Qi7K.s page 13 + ARM GAS /tmp/cc8tFyty.s page 13 297:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** @@ -778,7 +778,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 393 .loc 1 304 67 view .LVU136 394 0082 9200 lsls r2, r2, #2 304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** } - ARM GAS /tmp/ccq3Qi7K.s page 14 + ARM GAS /tmp/cc8tFyty.s page 14 395 .loc 1 304 38 view .LVU137 @@ -838,7 +838,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 446 .LFB143: 310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** 311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /** - ARM GAS /tmp/ccq3Qi7K.s page 15 + ARM GAS /tmp/cc8tFyty.s page 15 312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** * @brief Clear whole configuration of a dedicated Exti line. @@ -898,7 +898,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* 1] Clear interrupt mode */ 336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** EXTI->IMR = (EXTI->IMR & ~maskline); 477 .loc 1 336 3 is_stmt 1 view .LVU158 - ARM GAS /tmp/ccq3Qi7K.s page 16 + ARM GAS /tmp/cc8tFyty.s page 16 478 .loc 1 336 20 is_stmt 0 view .LVU159 @@ -958,7 +958,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 520 .loc 1 348 8 view .LVU181 521 004a B3F1C06F cmp r3, #100663296 522 004e 01D0 beq .L45 - ARM GAS /tmp/ccq3Qi7K.s page 17 + ARM GAS /tmp/cc8tFyty.s page 17 349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** { @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 556 0070 0020 movs r0, #0 557 0072 02E0 b .L37 558 .LVL40: - ARM GAS /tmp/ccq3Qi7K.s page 18 + ARM GAS /tmp/cc8tFyty.s page 18 559 .L38: @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 601 @ args = 0, pretend = 0, frame = 0 602 @ frame_needed = 0, uses_anonymous_args = 0 603 @ link register save eliminated. - ARM GAS /tmp/ccq3Qi7K.s page 19 + ARM GAS /tmp/cc8tFyty.s page 19 604 .loc 1 370 1 is_stmt 0 view .LVU201 @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** */ 394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine) 395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** { - ARM GAS /tmp/ccq3Qi7K.s page 20 + ARM GAS /tmp/cc8tFyty.s page 20 638 .loc 1 395 1 is_stmt 1 view -0 @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /** 414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** * @} 415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** */ - ARM GAS /tmp/ccq3Qi7K.s page 21 + ARM GAS /tmp/cc8tFyty.s page 21 416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** if (regval != 0x00u) 702 .loc 1 444 3 is_stmt 1 view .LVU232 703 .loc 1 444 6 is_stmt 0 view .LVU233 - ARM GAS /tmp/ccq3Qi7K.s page 22 + ARM GAS /tmp/cc8tFyty.s page 22 704 0010 1A42 tst r2, r3 @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** * @retval 1 if interrupt is pending else 0. 465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** */ 466:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) - ARM GAS /tmp/ccq3Qi7K.s page 23 + ARM GAS /tmp/cc8tFyty.s page 23 467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** { @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 777 .loc 1 484 1 view .LVU260 778 0012 7047 bx lr 779 .L61: - ARM GAS /tmp/ccq3Qi7K.s page 24 + ARM GAS /tmp/cc8tFyty.s page 24 780 .align 2 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* Clear Pending bit */ 508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** EXTI->PR = maskline; 814 .loc 1 508 3 is_stmt 1 view .LVU270 - ARM GAS /tmp/ccq3Qi7K.s page 25 + ARM GAS /tmp/cc8tFyty.s page 25 815 .loc 1 508 12 is_stmt 0 view .LVU271 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** 527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* Generate Software interrupt */ 528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** EXTI->SWIER = maskline; - ARM GAS /tmp/ccq3Qi7K.s page 26 + ARM GAS /tmp/cc8tFyty.s page 26 854 .loc 1 528 3 is_stmt 1 view .LVU281 @@ -1520,35 +1520,35 @@ ARM GAS /tmp/ccq3Qi7K.s page 1 870 .file 3 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 871 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" 872 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h" - ARM GAS /tmp/ccq3Qi7K.s page 27 + ARM GAS /tmp/cc8tFyty.s page 27 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_exti.c - /tmp/ccq3Qi7K.s:20 .text.HAL_EXTI_SetConfigLine:00000000 $t - /tmp/ccq3Qi7K.s:26 .text.HAL_EXTI_SetConfigLine:00000000 HAL_EXTI_SetConfigLine - /tmp/ccq3Qi7K.s:243 .text.HAL_EXTI_SetConfigLine:000000cc $d - /tmp/ccq3Qi7K.s:249 .text.HAL_EXTI_GetConfigLine:00000000 $t - /tmp/ccq3Qi7K.s:255 .text.HAL_EXTI_GetConfigLine:00000000 HAL_EXTI_GetConfigLine - /tmp/ccq3Qi7K.s:432 .text.HAL_EXTI_GetConfigLine:000000a0 $d - /tmp/ccq3Qi7K.s:438 .text.HAL_EXTI_ClearConfigLine:00000000 $t - /tmp/ccq3Qi7K.s:444 .text.HAL_EXTI_ClearConfigLine:00000000 HAL_EXTI_ClearConfigLine - /tmp/ccq3Qi7K.s:584 .text.HAL_EXTI_ClearConfigLine:0000007c $d - /tmp/ccq3Qi7K.s:590 .text.HAL_EXTI_RegisterCallback:00000000 $t - /tmp/ccq3Qi7K.s:596 .text.HAL_EXTI_RegisterCallback:00000000 HAL_EXTI_RegisterCallback - /tmp/ccq3Qi7K.s:629 .text.HAL_EXTI_GetHandle:00000000 $t - /tmp/ccq3Qi7K.s:635 .text.HAL_EXTI_GetHandle:00000000 HAL_EXTI_GetHandle - /tmp/ccq3Qi7K.s:667 .text.HAL_EXTI_IRQHandler:00000000 $t - /tmp/ccq3Qi7K.s:673 .text.HAL_EXTI_IRQHandler:00000000 HAL_EXTI_IRQHandler - /tmp/ccq3Qi7K.s:727 .text.HAL_EXTI_IRQHandler:00000020 $d - /tmp/ccq3Qi7K.s:732 .text.HAL_EXTI_GetPending:00000000 $t - /tmp/ccq3Qi7K.s:738 .text.HAL_EXTI_GetPending:00000000 HAL_EXTI_GetPending - /tmp/ccq3Qi7K.s:782 .text.HAL_EXTI_GetPending:00000014 $d - /tmp/ccq3Qi7K.s:787 .text.HAL_EXTI_ClearPending:00000000 $t - /tmp/ccq3Qi7K.s:793 .text.HAL_EXTI_ClearPending:00000000 HAL_EXTI_ClearPending - /tmp/ccq3Qi7K.s:823 .text.HAL_EXTI_ClearPending:00000010 $d - /tmp/ccq3Qi7K.s:828 .text.HAL_EXTI_GenerateSWI:00000000 $t - /tmp/ccq3Qi7K.s:834 .text.HAL_EXTI_GenerateSWI:00000000 HAL_EXTI_GenerateSWI - /tmp/ccq3Qi7K.s:863 .text.HAL_EXTI_GenerateSWI:00000010 $d + /tmp/cc8tFyty.s:20 .text.HAL_EXTI_SetConfigLine:00000000 $t + /tmp/cc8tFyty.s:26 .text.HAL_EXTI_SetConfigLine:00000000 HAL_EXTI_SetConfigLine + /tmp/cc8tFyty.s:243 .text.HAL_EXTI_SetConfigLine:000000cc $d + /tmp/cc8tFyty.s:249 .text.HAL_EXTI_GetConfigLine:00000000 $t + /tmp/cc8tFyty.s:255 .text.HAL_EXTI_GetConfigLine:00000000 HAL_EXTI_GetConfigLine + /tmp/cc8tFyty.s:432 .text.HAL_EXTI_GetConfigLine:000000a0 $d + /tmp/cc8tFyty.s:438 .text.HAL_EXTI_ClearConfigLine:00000000 $t + /tmp/cc8tFyty.s:444 .text.HAL_EXTI_ClearConfigLine:00000000 HAL_EXTI_ClearConfigLine + /tmp/cc8tFyty.s:584 .text.HAL_EXTI_ClearConfigLine:0000007c $d + /tmp/cc8tFyty.s:590 .text.HAL_EXTI_RegisterCallback:00000000 $t + /tmp/cc8tFyty.s:596 .text.HAL_EXTI_RegisterCallback:00000000 HAL_EXTI_RegisterCallback + /tmp/cc8tFyty.s:629 .text.HAL_EXTI_GetHandle:00000000 $t + /tmp/cc8tFyty.s:635 .text.HAL_EXTI_GetHandle:00000000 HAL_EXTI_GetHandle + /tmp/cc8tFyty.s:667 .text.HAL_EXTI_IRQHandler:00000000 $t + /tmp/cc8tFyty.s:673 .text.HAL_EXTI_IRQHandler:00000000 HAL_EXTI_IRQHandler + /tmp/cc8tFyty.s:727 .text.HAL_EXTI_IRQHandler:00000020 $d + /tmp/cc8tFyty.s:732 .text.HAL_EXTI_GetPending:00000000 $t + /tmp/cc8tFyty.s:738 .text.HAL_EXTI_GetPending:00000000 HAL_EXTI_GetPending + /tmp/cc8tFyty.s:782 .text.HAL_EXTI_GetPending:00000014 $d + /tmp/cc8tFyty.s:787 .text.HAL_EXTI_ClearPending:00000000 $t + /tmp/cc8tFyty.s:793 .text.HAL_EXTI_ClearPending:00000000 HAL_EXTI_ClearPending + /tmp/cc8tFyty.s:823 .text.HAL_EXTI_ClearPending:00000010 $d + /tmp/cc8tFyty.s:828 .text.HAL_EXTI_GenerateSWI:00000000 $t + /tmp/cc8tFyty.s:834 .text.HAL_EXTI_GenerateSWI:00000000 HAL_EXTI_GenerateSWI + /tmp/cc8tFyty.s:863 .text.HAL_EXTI_GenerateSWI:00000010 $d NO UNDEFINED SYMBOLS diff --git a/build/stm32f7xx_hal_exti.o b/build/stm32f7xx_hal_exti.o index 3ce278d335dff6eadcd06bd8ab403057791896c4..149482961aa0114f934b8d17adedb4d0f0987b18 100644 GIT binary patch delta 1098 zcmZ8fO-NKx6u#%a_vXEUQL`CmM$I%-MjUG#k6r!Lhs&$mxWE)^|8N-4wB zMvxxx6QeZ0O~$#V^V6b)BE+A;ILNkHIb0a(d6nHiy32y%X4uW}Ay zp_~qJ%2`I)P{tAxv&OiIY*k`yrq?1_KnE1U-ijH|5ON)>-fN?rSC4V6t-d4(x?JhJ zdpu)?DnALe!T2cDb=FR={DLdg<~3?wBY!bV8gB`6?`qMfj7iB`jbaGaQv(t*wFg0| zfE;mI(F|JtNzKhxb#*=Vv`GIFG)4l!?bHgJ4*L_#Rwae`sZ|nnTk}*Wtt~LE27(EQ zXr5Y2ehcMaxtz)7(PbcMJsKb9? zMU(bQ`AFcGc=c0(y!1<84p3ow!EN@&m3!}?UGBZXuK)twB5We}0fw-@D8($Zy}!Vn z`dgFGkK>pwps0qw+x`MqwCHMnqq+dzyWZoj_c(It6=yS3PD^g4G1N$b*s0#LsaWbly0ZQ$A$5BQrr`d(qq08FQ;C98jsKf iFJNtDZ(W40a2)F+PGEh`SL-6-_fe&?@;k16Yui8XZ>>=P delta 1107 zcmY*XTS!z<6g~Ss=H7`>vl%BJnT5)TmgCriipny2SX63B3>0$HD@xeZ%^p8dK}9dj z+8+f))<+RUQ5u90nrH9vRwsjqaW>{w>QQ)|aq?z@S40DGh+e}Cz`xeQ}x`awUFJW$u z2Rp+-fWsUv)#uI35TBTq*)GjO+inqU$wVEp@9<&0fQI<09;NsEKrhHVAc|vJrYH7L ztmI)ZuCrwnA37{9CpG z5_JAjt0t%!4u3N87d{r#mE+Bj(w|7ZM$dy_3U#3%Lkl1&6_FJO72U=t+(%qxmX>bE zH+`l52^x+BfRwSyuFGystkOo0fE za5PYs*dRtdU6A}2(+l>7&fAJ#r;jxbv_S^lZNEEW1TtZ4vpkMgJ$ z&hkZHea$a)e*$?UoMXqgoW(xs{C9;nsL$j0lKEYR, FLASH_KEY1); 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** - ARM GAS /tmp/ccfS03PQ.s page 10 + ARM GAS /tmp/ccz3aC71.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /* Verify Flash is unlocked */ @@ -598,7 +598,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /** 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** * @brief Launch the option byte loading. 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** * @retval HAL Status - ARM GAS /tmp/ccfS03PQ.s page 11 + ARM GAS /tmp/ccz3aC71.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** */ @@ -658,7 +658,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /* Clear Error Code */ 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; - ARM GAS /tmp/ccfS03PQ.s page 12 + ARM GAS /tmp/ccz3aC71.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 31 @ frame_needed = 0, uses_anonymous_args = 0 32 @ link register save eliminated. 33 .loc 1 652 1 is_stmt 0 view .LVU1 - ARM GAS /tmp/ccfS03PQ.s page 13 + ARM GAS /tmp/ccz3aC71.s page 13 34 0000 10B4 push {r4} @@ -778,7 +778,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. - ARM GAS /tmp/ccfS03PQ.s page 14 + ARM GAS /tmp/ccz3aC71.s page 14 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at @@ -838,7 +838,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ - ARM GAS /tmp/ccfS03PQ.s page 15 + ARM GAS /tmp/ccz3aC71.s page 15 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push @@ -898,7 +898,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. - ARM GAS /tmp/ccfS03PQ.s page 16 + ARM GAS /tmp/ccz3aC71.s page 16 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccfS03PQ.s page 17 + ARM GAS /tmp/ccz3aC71.s page 17 185:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** 241:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccfS03PQ.s page 18 + ARM GAS /tmp/ccz3aC71.s page 18 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). - ARM GAS /tmp/ccfS03PQ.s page 19 + ARM GAS /tmp/ccz3aC71.s page 19 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccfS03PQ.s page 20 + ARM GAS /tmp/ccz3aC71.s page 20 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) - ARM GAS /tmp/ccfS03PQ.s page 21 + ARM GAS /tmp/ccz3aC71.s page 21 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } 468:Drivers/CMSIS/Include/cmsis_gcc.h **** 469:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccfS03PQ.s page 22 + ARM GAS /tmp/ccz3aC71.s page 22 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccfS03PQ.s page 23 + ARM GAS /tmp/ccz3aC71.s page 23 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 582:Drivers/CMSIS/Include/cmsis_gcc.h **** 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccfS03PQ.s page 24 + ARM GAS /tmp/ccz3aC71.s page 24 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) - ARM GAS /tmp/ccfS03PQ.s page 25 + ARM GAS /tmp/ccz3aC71.s page 25 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. - ARM GAS /tmp/ccfS03PQ.s page 26 + ARM GAS /tmp/ccz3aC71.s page 26 698:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccfS03PQ.s page 27 + ARM GAS /tmp/ccz3aC71.s page 27 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 811:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccfS03PQ.s page 28 + ARM GAS /tmp/ccz3aC71.s page 28 812:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 65 .loc 2 866 27 view .LVU15 66 .LBB13: - ARM GAS /tmp/ccfS03PQ.s page 29 + ARM GAS /tmp/ccz3aC71.s page 29 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 100 002e 00BF .align 2 101 .L3: 102 0030 003C0240 .word 1073888256 - ARM GAS /tmp/ccfS03PQ.s page 30 + ARM GAS /tmp/ccz3aC71.s page 30 103 .cfi_endproc @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 136 0012 1A69 ldr r2, [r3, #16] 137 .loc 1 696 13 view .LVU33 138 0014 42F00102 orr r2, r2, #1 - ARM GAS /tmp/ccfS03PQ.s page 31 + ARM GAS /tmp/ccz3aC71.s page 31 139 0018 1A61 str r2, [r3, #16] @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** */ 717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) 718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** { - ARM GAS /tmp/ccfS03PQ.s page 32 + ARM GAS /tmp/ccz3aC71.s page 32 175 .loc 1 718 1 is_stmt 1 view -0 @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 215 .LBE19: 216 .LBE18: 732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** - ARM GAS /tmp/ccfS03PQ.s page 33 + ARM GAS /tmp/ccz3aC71.s page 33 733:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** } @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 251 .loc 1 754 13 view .LVU64 252 000c 1A61 str r2, [r3, #16] 755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** FLASH->CR |= FLASH_CR_PG; - ARM GAS /tmp/ccfS03PQ.s page 34 + ARM GAS /tmp/ccz3aC71.s page 34 253 .loc 1 755 3 is_stmt 1 view .LVU65 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 294 .cfi_startproc 295 @ args = 0, pretend = 0, frame = 0 296 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccfS03PQ.s page 35 + ARM GAS /tmp/ccz3aC71.s page 35 297 @ link register save eliminated. @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 338 0034 9369 ldr r3, [r2, #24] 339 .loc 1 782 21 view .LVU92 340 0036 43F00803 orr r3, r3, #8 - ARM GAS /tmp/ccfS03PQ.s page 36 + ARM GAS /tmp/ccz3aC71.s page 36 341 003a 9361 str r3, [r2, #24] @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 374 0064 014B ldr r3, .L20 375 0066 F222 movs r2, #242 376 0068 DA60 str r2, [r3, #12] - ARM GAS /tmp/ccfS03PQ.s page 37 + ARM GAS /tmp/ccz3aC71.s page 37 804:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** } @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 425 0012 2975 strb r1, [r5, #20] 236:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** 426 .loc 1 236 3 is_stmt 1 discriminator 2 view .LVU114 - ARM GAS /tmp/ccfS03PQ.s page 38 + ARM GAS /tmp/ccz3aC71.s page 38 239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 468 .LVL9: 469 .L27: 266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** break; - ARM GAS /tmp/ccfS03PQ.s page 39 + ARM GAS /tmp/ccz3aC71.s page 39 470 .loc 1 266 7 is_stmt 1 view .LVU128 @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 510 0068 0020 movs r0, #0 511 .LVL18: 254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** { - ARM GAS /tmp/ccfS03PQ.s page 40 + ARM GAS /tmp/ccz3aC71.s page 40 512 .loc 1 254 3 view .LVU143 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 565 .align 1 566 .global HAL_FLASH_IRQHandler 567 .syntax unified - ARM GAS /tmp/ccfS03PQ.s page 41 + ARM GAS /tmp/ccz3aC71.s page 41 568 .thumb @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 609 001e 384A ldr r2, .L48+4 610 0020 0A40 ands r2, r2, r1 611 0022 1A61 str r2, [r3, #16] - ARM GAS /tmp/ccfS03PQ.s page 42 + ARM GAS /tmp/ccz3aC71.s page 42 308:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** { @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 650 .loc 1 325 11 is_stmt 1 view .LVU179 651 0052 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback 652 .LVL23: - ARM GAS /tmp/ccfS03PQ.s page 43 + ARM GAS /tmp/ccz3aC71.s page 43 328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** FLASH_Erase_Sector(temp, pFlash.VoltageForErase); @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 692 .loc 1 350 33 is_stmt 0 view .LVU194 693 0080 0020 movs r0, #0 694 0082 204B ldr r3, .L48+8 - ARM GAS /tmp/ccfS03PQ.s page 44 + ARM GAS /tmp/ccz3aC71.s page 44 695 0084 1870 strb r0, [r3] @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** 735 .loc 1 399 5 view .LVU209 736 00b2 2046 mov r0, r4 - ARM GAS /tmp/ccfS03PQ.s page 45 + ARM GAS /tmp/ccz3aC71.s page 45 737 00b4 FFF7FEFF bl HAL_FLASH_OperationErrorCallback @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 777 .LVL36: 360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** break; 778 .loc 1 360 9 is_stmt 1 view .LVU224 - ARM GAS /tmp/ccfS03PQ.s page 46 + ARM GAS /tmp/ccz3aC71.s page 46 360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** break; @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 824 .loc 1 479 1 is_stmt 1 view -0 825 .cfi_startproc 826 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccfS03PQ.s page 47 + ARM GAS /tmp/ccz3aC71.s page 47 827 @ frame_needed = 0, uses_anonymous_args = 0 @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 867 .L55: 868 0028 003C0240 .word 1073888256 869 002c 23016745 .word 1164378403 - ARM GAS /tmp/ccfS03PQ.s page 48 + ARM GAS /tmp/ccz3aC71.s page 48 870 .cfi_endproc @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 516:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** { 920 .loc 1 516 12 is_stmt 0 view .LVU258 921 0000 074B ldr r3, .L63 - ARM GAS /tmp/ccfS03PQ.s page 49 + ARM GAS /tmp/ccz3aC71.s page 49 922 0002 5B69 ldr r3, [r3, #20] @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** 967 .loc 1 537 8 is_stmt 0 view .LVU270 968 0000 034A ldr r2, .L66 - ARM GAS /tmp/ccfS03PQ.s page 50 + ARM GAS /tmp/ccz3aC71.s page 50 969 0002 5369 ldr r3, [r2, #20] @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 1020 .LFB152: 597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** uint32_t tickstart = 0; 1021 .loc 1 597 1 is_stmt 1 view -0 - ARM GAS /tmp/ccfS03PQ.s page 51 + ARM GAS /tmp/ccz3aC71.s page 51 1022 .cfi_startproc @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** { 1062 .loc 1 613 9 is_stmt 0 view .LVU293 1063 0020 24B1 cbz r4, .L74 - ARM GAS /tmp/ccfS03PQ.s page 52 + ARM GAS /tmp/ccz3aC71.s page 52 613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** { @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 1103 .loc 1 623 5 is_stmt 1 view .LVU308 1104 004e FFF7FEFF bl FLASH_SetErrorCode 1105 .LVL48: - ARM GAS /tmp/ccfS03PQ.s page 53 + ARM GAS /tmp/ccz3aC71.s page 53 624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** } @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 1153 .loc 1 167 3 is_stmt 0 view .LVU317 1154 0006 127D ldrb r2, [r2, #20] @ zero_extendqisi2 1155 0008 012A cmp r2, #1 - ARM GAS /tmp/ccfS03PQ.s page 54 + ARM GAS /tmp/ccz3aC71.s page 54 1156 000a 31D0 beq .L93 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** 1197 .loc 1 210 14 is_stmt 0 view .LVU331 1198 0036 4CF25030 movw r0, #50000 - ARM GAS /tmp/ccfS03PQ.s page 55 + ARM GAS /tmp/ccz3aC71.s page 55 1199 003a FFF7FEFF bl FLASH_WaitForLastOperation @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** } 1240 .loc 1 197 9 is_stmt 1 view .LVU345 1241 0062 E8E7 b .L87 - ARM GAS /tmp/ccfS03PQ.s page 56 + ARM GAS /tmp/ccz3aC71.s page 56 1242 .LVL64: @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccfS03PQ.s page 1 1290 0004 5369 ldr r3, [r2, #20] 549:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** 1291 .loc 1 549 16 view .LVU354 - ARM GAS /tmp/ccfS03PQ.s page 57 + ARM GAS /tmp/ccz3aC71.s page 57 1292 0006 43F00203 orr r3, r3, #2 @@ -3397,67 +3397,67 @@ ARM GAS /tmp/ccfS03PQ.s page 1 1321 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h" 1322 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" 1323 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h" - ARM GAS /tmp/ccfS03PQ.s page 58 + ARM GAS /tmp/ccz3aC71.s page 58 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_flash.c - /tmp/ccfS03PQ.s:20 .text.FLASH_Program_DoubleWord:00000000 $t - /tmp/ccfS03PQ.s:25 .text.FLASH_Program_DoubleWord:00000000 FLASH_Program_DoubleWord - /tmp/ccfS03PQ.s:102 .text.FLASH_Program_DoubleWord:00000030 $d - /tmp/ccfS03PQ.s:107 .text.FLASH_Program_Word:00000000 $t - /tmp/ccfS03PQ.s:112 .text.FLASH_Program_Word:00000000 FLASH_Program_Word - /tmp/ccfS03PQ.s:162 .text.FLASH_Program_Word:00000024 $d - /tmp/ccfS03PQ.s:167 .text.FLASH_Program_HalfWord:00000000 $t - /tmp/ccfS03PQ.s:172 .text.FLASH_Program_HalfWord:00000000 FLASH_Program_HalfWord - /tmp/ccfS03PQ.s:222 .text.FLASH_Program_HalfWord:00000024 $d - /tmp/ccfS03PQ.s:227 .text.FLASH_Program_Byte:00000000 $t - /tmp/ccfS03PQ.s:232 .text.FLASH_Program_Byte:00000000 FLASH_Program_Byte - /tmp/ccfS03PQ.s:281 .text.FLASH_Program_Byte:00000020 $d - /tmp/ccfS03PQ.s:286 .text.FLASH_SetErrorCode:00000000 $t - /tmp/ccfS03PQ.s:291 .text.FLASH_SetErrorCode:00000000 FLASH_SetErrorCode - /tmp/ccfS03PQ.s:382 .text.FLASH_SetErrorCode:0000006c $d - /tmp/ccfS03PQ.s:1313 .bss.pFlash:00000000 pFlash - /tmp/ccfS03PQ.s:388 .text.HAL_FLASH_Program_IT:00000000 $t - /tmp/ccfS03PQ.s:394 .text.HAL_FLASH_Program_IT:00000000 HAL_FLASH_Program_IT - /tmp/ccfS03PQ.s:452 .text.HAL_FLASH_Program_IT:0000003a $d - /tmp/ccfS03PQ.s:456 .text.HAL_FLASH_Program_IT:0000003e $t - /tmp/ccfS03PQ.s:517 .text.HAL_FLASH_Program_IT:0000006c $d - /tmp/ccfS03PQ.s:523 .text.HAL_FLASH_EndOfOperationCallback:00000000 $t - /tmp/ccfS03PQ.s:529 .text.HAL_FLASH_EndOfOperationCallback:00000000 HAL_FLASH_EndOfOperationCallback - /tmp/ccfS03PQ.s:544 .text.HAL_FLASH_OperationErrorCallback:00000000 $t - /tmp/ccfS03PQ.s:550 .text.HAL_FLASH_OperationErrorCallback:00000000 HAL_FLASH_OperationErrorCallback - /tmp/ccfS03PQ.s:565 .text.HAL_FLASH_IRQHandler:00000000 $t - /tmp/ccfS03PQ.s:571 .text.HAL_FLASH_IRQHandler:00000000 HAL_FLASH_IRQHandler - /tmp/ccfS03PQ.s:809 .text.HAL_FLASH_IRQHandler:000000fc $d - /tmp/ccfS03PQ.s:816 .text.HAL_FLASH_Unlock:00000000 $t - /tmp/ccfS03PQ.s:822 .text.HAL_FLASH_Unlock:00000000 HAL_FLASH_Unlock - /tmp/ccfS03PQ.s:868 .text.HAL_FLASH_Unlock:00000028 $d - /tmp/ccfS03PQ.s:874 .text.HAL_FLASH_Lock:00000000 $t - /tmp/ccfS03PQ.s:880 .text.HAL_FLASH_Lock:00000000 HAL_FLASH_Lock - /tmp/ccfS03PQ.s:901 .text.HAL_FLASH_Lock:00000010 $d - /tmp/ccfS03PQ.s:906 .text.HAL_FLASH_OB_Unlock:00000000 $t - /tmp/ccfS03PQ.s:912 .text.HAL_FLASH_OB_Unlock:00000000 HAL_FLASH_OB_Unlock - /tmp/ccfS03PQ.s:947 .text.HAL_FLASH_OB_Unlock:00000020 $d - /tmp/ccfS03PQ.s:953 .text.HAL_FLASH_OB_Lock:00000000 $t - /tmp/ccfS03PQ.s:959 .text.HAL_FLASH_OB_Lock:00000000 HAL_FLASH_OB_Lock - /tmp/ccfS03PQ.s:980 .text.HAL_FLASH_OB_Lock:00000010 $d - /tmp/ccfS03PQ.s:985 .text.HAL_FLASH_GetError:00000000 $t - /tmp/ccfS03PQ.s:991 .text.HAL_FLASH_GetError:00000000 HAL_FLASH_GetError - /tmp/ccfS03PQ.s:1007 .text.HAL_FLASH_GetError:00000008 $d - /tmp/ccfS03PQ.s:1012 .text.FLASH_WaitForLastOperation:00000000 $t - /tmp/ccfS03PQ.s:1018 .text.FLASH_WaitForLastOperation:00000000 FLASH_WaitForLastOperation - /tmp/ccfS03PQ.s:1117 .text.FLASH_WaitForLastOperation:0000005c $d - /tmp/ccfS03PQ.s:1123 .text.HAL_FLASH_Program:00000000 $t - /tmp/ccfS03PQ.s:1129 .text.HAL_FLASH_Program:00000000 HAL_FLASH_Program - /tmp/ccfS03PQ.s:1181 .text.HAL_FLASH_Program:0000002a $d - /tmp/ccfS03PQ.s:1185 .text.HAL_FLASH_Program:0000002e $t - /tmp/ccfS03PQ.s:1264 .text.HAL_FLASH_Program:00000074 $d - /tmp/ccfS03PQ.s:1270 .text.HAL_FLASH_OB_Launch:00000000 $t - /tmp/ccfS03PQ.s:1276 .text.HAL_FLASH_OB_Launch:00000000 HAL_FLASH_OB_Launch - /tmp/ccfS03PQ.s:1304 .text.HAL_FLASH_OB_Launch:00000018 $d - /tmp/ccfS03PQ.s:1310 .bss.pFlash:00000000 $d - ARM GAS /tmp/ccfS03PQ.s page 59 + /tmp/ccz3aC71.s:20 .text.FLASH_Program_DoubleWord:00000000 $t + /tmp/ccz3aC71.s:25 .text.FLASH_Program_DoubleWord:00000000 FLASH_Program_DoubleWord + /tmp/ccz3aC71.s:102 .text.FLASH_Program_DoubleWord:00000030 $d + /tmp/ccz3aC71.s:107 .text.FLASH_Program_Word:00000000 $t + /tmp/ccz3aC71.s:112 .text.FLASH_Program_Word:00000000 FLASH_Program_Word + /tmp/ccz3aC71.s:162 .text.FLASH_Program_Word:00000024 $d + /tmp/ccz3aC71.s:167 .text.FLASH_Program_HalfWord:00000000 $t + /tmp/ccz3aC71.s:172 .text.FLASH_Program_HalfWord:00000000 FLASH_Program_HalfWord + /tmp/ccz3aC71.s:222 .text.FLASH_Program_HalfWord:00000024 $d + /tmp/ccz3aC71.s:227 .text.FLASH_Program_Byte:00000000 $t + /tmp/ccz3aC71.s:232 .text.FLASH_Program_Byte:00000000 FLASH_Program_Byte + /tmp/ccz3aC71.s:281 .text.FLASH_Program_Byte:00000020 $d + /tmp/ccz3aC71.s:286 .text.FLASH_SetErrorCode:00000000 $t + /tmp/ccz3aC71.s:291 .text.FLASH_SetErrorCode:00000000 FLASH_SetErrorCode + /tmp/ccz3aC71.s:382 .text.FLASH_SetErrorCode:0000006c $d + /tmp/ccz3aC71.s:1313 .bss.pFlash:00000000 pFlash + /tmp/ccz3aC71.s:388 .text.HAL_FLASH_Program_IT:00000000 $t + /tmp/ccz3aC71.s:394 .text.HAL_FLASH_Program_IT:00000000 HAL_FLASH_Program_IT + /tmp/ccz3aC71.s:452 .text.HAL_FLASH_Program_IT:0000003a $d + /tmp/ccz3aC71.s:456 .text.HAL_FLASH_Program_IT:0000003e $t + /tmp/ccz3aC71.s:517 .text.HAL_FLASH_Program_IT:0000006c $d + /tmp/ccz3aC71.s:523 .text.HAL_FLASH_EndOfOperationCallback:00000000 $t + /tmp/ccz3aC71.s:529 .text.HAL_FLASH_EndOfOperationCallback:00000000 HAL_FLASH_EndOfOperationCallback + /tmp/ccz3aC71.s:544 .text.HAL_FLASH_OperationErrorCallback:00000000 $t + /tmp/ccz3aC71.s:550 .text.HAL_FLASH_OperationErrorCallback:00000000 HAL_FLASH_OperationErrorCallback + /tmp/ccz3aC71.s:565 .text.HAL_FLASH_IRQHandler:00000000 $t + /tmp/ccz3aC71.s:571 .text.HAL_FLASH_IRQHandler:00000000 HAL_FLASH_IRQHandler + /tmp/ccz3aC71.s:809 .text.HAL_FLASH_IRQHandler:000000fc $d + /tmp/ccz3aC71.s:816 .text.HAL_FLASH_Unlock:00000000 $t + /tmp/ccz3aC71.s:822 .text.HAL_FLASH_Unlock:00000000 HAL_FLASH_Unlock + /tmp/ccz3aC71.s:868 .text.HAL_FLASH_Unlock:00000028 $d + /tmp/ccz3aC71.s:874 .text.HAL_FLASH_Lock:00000000 $t + /tmp/ccz3aC71.s:880 .text.HAL_FLASH_Lock:00000000 HAL_FLASH_Lock + /tmp/ccz3aC71.s:901 .text.HAL_FLASH_Lock:00000010 $d + /tmp/ccz3aC71.s:906 .text.HAL_FLASH_OB_Unlock:00000000 $t + /tmp/ccz3aC71.s:912 .text.HAL_FLASH_OB_Unlock:00000000 HAL_FLASH_OB_Unlock + /tmp/ccz3aC71.s:947 .text.HAL_FLASH_OB_Unlock:00000020 $d + /tmp/ccz3aC71.s:953 .text.HAL_FLASH_OB_Lock:00000000 $t + /tmp/ccz3aC71.s:959 .text.HAL_FLASH_OB_Lock:00000000 HAL_FLASH_OB_Lock + /tmp/ccz3aC71.s:980 .text.HAL_FLASH_OB_Lock:00000010 $d + /tmp/ccz3aC71.s:985 .text.HAL_FLASH_GetError:00000000 $t + /tmp/ccz3aC71.s:991 .text.HAL_FLASH_GetError:00000000 HAL_FLASH_GetError + /tmp/ccz3aC71.s:1007 .text.HAL_FLASH_GetError:00000008 $d + /tmp/ccz3aC71.s:1012 .text.FLASH_WaitForLastOperation:00000000 $t + /tmp/ccz3aC71.s:1018 .text.FLASH_WaitForLastOperation:00000000 FLASH_WaitForLastOperation + /tmp/ccz3aC71.s:1117 .text.FLASH_WaitForLastOperation:0000005c $d + /tmp/ccz3aC71.s:1123 .text.HAL_FLASH_Program:00000000 $t + /tmp/ccz3aC71.s:1129 .text.HAL_FLASH_Program:00000000 HAL_FLASH_Program + /tmp/ccz3aC71.s:1181 .text.HAL_FLASH_Program:0000002a $d + /tmp/ccz3aC71.s:1185 .text.HAL_FLASH_Program:0000002e $t + /tmp/ccz3aC71.s:1264 .text.HAL_FLASH_Program:00000074 $d + /tmp/ccz3aC71.s:1270 .text.HAL_FLASH_OB_Launch:00000000 $t + /tmp/ccz3aC71.s:1276 .text.HAL_FLASH_OB_Launch:00000000 HAL_FLASH_OB_Launch + /tmp/ccz3aC71.s:1304 .text.HAL_FLASH_OB_Launch:00000018 $d + /tmp/ccz3aC71.s:1310 .bss.pFlash:00000000 $d + ARM GAS /tmp/ccz3aC71.s page 59 diff --git a/build/stm32f7xx_hal_flash.o b/build/stm32f7xx_hal_flash.o index 3f1eb60a995828b9b89c9337f426e7b40b3eedbc..48f2679931438ada1a8c0eec77d39cfbf64c22d4 100644 GIT binary patch delta 618 zcmX|-O=wd=5XX1+ZQn;;h_$AWG&L_KVlb%<1zTIKjeUs+DK>>lp{J@CNT~9HR-#2~ z4<4RHP@JPx>_rKBkzPb3RH;zKQ$1KcXb&C)30kCnfS|K#9N7OdzyIva?oMBV6&J2X z_)72ns4dKH!I<|UFs5>JMDqrlGscB>RBoVlA&R!PHL{fpM3jzTnUTS@H!>TQvNL#v zkeHHOXglzuaH3nOsp#e#XC#dI^$wZ$)bju{7V%s|OXHA2zIS;4AqI@=;s)Ms7-(-K z2u$(N5w%mfNTWR(9HT<59hNCGugg>BOY*_2prvk0RS0W)thcoB81tp6K-+8m9WHzh z-BL?iV}I_V`+fmVs7YwSTWSar_(+X{i|^Da{zbttZ5Hn0Pi-8Qv7m=}jiakygAj&{ z&enD617BeioS``~{IvLa1{Rd@xUo4*-RW5&XMZ)jI@Ajq_Y^z#-SJcv++P+H)9L*^m_dJ G9rhc!T8gUx delta 649 zcmX|7OH5Ni6rDSrzSq*GmQN$Kz=JkglQw-yAYc?|`!GsGS_{Uwu@+iv{qT~C0gX12 zxIjW;<6WqUzq$YyE+A|T3w7y2bmK}{5fdfq0!`FJ?`Uw6IWy;+d*`0a+iAFZ9m>s| zbuIei!f{eC=B(k2-2*g*XUl22a-q)11C$epA{_1`Vwsn)+dIL?;3~Heo03wS_XbI# zBz2)4#gD@D_tT@IlUL73F;HhaF8Q8KUeD~G@UnHAdy*bu&cXdd3>deG4V<$cigc0) z%+g9NO1tG6Fjl2PmI~Dfye8&&F1s8*$p^;@YRV2BD2KXNdq*x0FxM$6P`k8$!-eaX zbbGY)-z+xQF^=O(2;%rq@j(ioDt=hN_ezQT1g6!y@CJXWXW$3sZB5)`!D-t~Fwkdj zZ)lXkzCkTa(j2+!X!9!!G2C}G9!tqIHSW$2Lq1WA$? z@a3lb-gQi0c*HkHA{HOG0#0>Dc~&B?9=n+xtuWHUwmKyEBo%#54Gbkc~UU2DMEroz&8Eu``K5T?2ZcykCJ zb>D}B80-0ruc89mqWw_Dsc3@2tq^{|me>S*!8?SjSRGGrTL%uu2jDg?#uM-u!3c4; u6(fcpe&Z1%2s`m2;V!HgL2Eg{SSwZnwYX}y;RSvrCyURDPLevel); 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** - ARM GAS /tmp/cc9TanaG.s page 7 + ARM GAS /tmp/ccWTTAKN.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* USER configuration */ @@ -418,7 +418,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Process Unlocked */ 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** - ARM GAS /tmp/cc9TanaG.s page 8 + ARM GAS /tmp/ccWTTAKN.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; @@ -478,7 +478,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by word (32-bit) 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp, - ARM GAS /tmp/cc9TanaG.s page 9 + ARM GAS /tmp/ccWTTAKN.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by double word (64-bit) @@ -538,7 +538,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Only bank1 will be erased*/ 461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_MER1; - ARM GAS /tmp/cc9TanaG.s page 10 + ARM GAS /tmp/ccWTTAKN.s page 10 54 .loc 1 461 5 is_stmt 1 view .LVU12 @@ -598,7 +598,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" - ARM GAS /tmp/cc9TanaG.s page 11 + ARM GAS /tmp/ccWTTAKN.s page 11 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" @@ -658,7 +658,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push - ARM GAS /tmp/cc9TanaG.s page 12 + ARM GAS /tmp/ccWTTAKN.s page 12 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" @@ -718,7 +718,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } 144:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cc9TanaG.s page 13 + ARM GAS /tmp/ccWTTAKN.s page 13 145:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -778,7 +778,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register - ARM GAS /tmp/cc9TanaG.s page 14 + ARM GAS /tmp/ccWTTAKN.s page 14 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. @@ -838,7 +838,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) - ARM GAS /tmp/cc9TanaG.s page 15 + ARM GAS /tmp/ccWTTAKN.s page 15 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s @@ -898,7 +898,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/cc9TanaG.s page 16 + ARM GAS /tmp/ccWTTAKN.s page 16 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) @@ -958,7 +958,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); - ARM GAS /tmp/cc9TanaG.s page 17 + ARM GAS /tmp/ccWTTAKN.s page 17 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 429:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cc9TanaG.s page 18 + ARM GAS /tmp/ccWTTAKN.s page 18 430:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/cc9TanaG.s page 19 + ARM GAS /tmp/ccWTTAKN.s page 19 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority @@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/cc9TanaG.s page 20 + ARM GAS /tmp/ccWTTAKN.s page 20 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); - ARM GAS /tmp/cc9TanaG.s page 21 + ARM GAS /tmp/ccWTTAKN.s page 21 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; @@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/cc9TanaG.s page 22 + ARM GAS /tmp/ccWTTAKN.s page 22 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) @@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 714:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/cc9TanaG.s page 23 + ARM GAS /tmp/ccWTTAKN.s page 23 715:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed - ARM GAS /tmp/cc9TanaG.s page 24 + ARM GAS /tmp/ccWTTAKN.s page 24 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) @@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) - ARM GAS /tmp/cc9TanaG.s page 25 + ARM GAS /tmp/ccWTTAKN.s page 25 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) @@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 79 .syntax unified 80 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 81 002c BFF34F8F dsb 0xF - ARM GAS /tmp/cc9TanaG.s page 26 + ARM GAS /tmp/ccWTTAKN.s page 26 82 @ 0 "" 2 @@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 468:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 469:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory sector - ARM GAS /tmp/cc9TanaG.s page 27 + ARM GAS /tmp/ccWTTAKN.s page 27 471:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Sector FLASH sector to erase @@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** This will force the CPU to respect the sequence of instruction (no optimization).*/ 526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __DSB(); 527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } - ARM GAS /tmp/cc9TanaG.s page 28 + ARM GAS /tmp/ccWTTAKN.s page 28 528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 555:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY 556:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STDBY_RST: Reset generated when entering in STANDBY 557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Iwdgstop Independent watchdog counter freeze in Stop mode. - ARM GAS /tmp/cc9TanaG.s page 29 + ARM GAS /tmp/ccWTTAKN.s page 29 558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values: @@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 612:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Return the FLASH User Option Byte value. 614:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval uint32_t FLASH User Option Bytes values: WWDG_SW(Bit4), IWDG_SW(Bit5), nRST_STOP(Bit6), - ARM GAS /tmp/cc9TanaG.s page 30 + ARM GAS /tmp/ccWTTAKN.s page 30 615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * nRST_STDBY(Bit7), nDBOOT(Bit28), nDBANK(Bit29), IWDG_STDBY(Bit30) and IWDG_STOP(Bit31). @@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 641:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */ 642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_VOLTAGERANGE(VoltageRange)); 643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** - ARM GAS /tmp/cc9TanaG.s page 31 + ARM GAS /tmp/ccWTTAKN.s page 31 644:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* if the previous operation is completed, proceed to erase all sectors */ @@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR &= SECTOR_MASK; 699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos); 700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_STRT; - ARM GAS /tmp/cc9TanaG.s page 32 + ARM GAS /tmp/ccWTTAKN.s page 32 701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** @@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE(Stop)); 756:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE(Stdby)); 757:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_STOP_FREEZE(Iwdgstop)); - ARM GAS /tmp/cc9TanaG.s page 33 + ARM GAS /tmp/ccWTTAKN.s page 33 758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_STDBY_FREEZE(Iwdgstdby)); @@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 812:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 813:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ 814:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); - ARM GAS /tmp/cc9TanaG.s page 34 + ARM GAS /tmp/ccWTTAKN.s page 34 815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 869:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 870:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * 871:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status - ARM GAS /tmp/cc9TanaG.s page 35 + ARM GAS /tmp/ccWTTAKN.s page 35 872:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */ @@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 203 .loc 1 911 1 is_stmt 0 view .LVU44 204 000c 0020 movs r0, #0 - ARM GAS /tmp/cc9TanaG.s page 36 + ARM GAS /tmp/ccWTTAKN.s page 36 205 000e 7047 bx lr @@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 952:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 953:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 954:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status; - ARM GAS /tmp/cc9TanaG.s page 37 + ARM GAS /tmp/ccWTTAKN.s page 37 955:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } @@ -2218,7 +2218,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 247 .loc 1 982 3 is_stmt 1 view .LVU54 983:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 248 .loc 1 983 1 is_stmt 0 view .LVU55 - ARM GAS /tmp/cc9TanaG.s page 38 + ARM GAS /tmp/ccWTTAKN.s page 38 249 0014 7047 bx lr @@ -2278,7 +2278,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /** 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Configure Boot base address. - ARM GAS /tmp/cc9TanaG.s page 39 + ARM GAS /tmp/ccWTTAKN.s page 39 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @@ -2338,7 +2338,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } 316 .loc 1 1023 5 is_stmt 1 view .LVU69 1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } - ARM GAS /tmp/cc9TanaG.s page 40 + ARM GAS /tmp/ccWTTAKN.s page 40 317 .loc 1 1023 20 is_stmt 0 view .LVU70 @@ -2398,7 +2398,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 363 .loc 1 816 3 is_stmt 1 view .LVU80 816:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 364 .loc 1 816 5 is_stmt 0 view .LVU81 - ARM GAS /tmp/cc9TanaG.s page 41 + ARM GAS /tmp/ccWTTAKN.s page 41 365 000c 20B9 cbnz r0, .L33 @@ -2458,7 +2458,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 410 .loc 1 850 12 is_stmt 0 view .LVU93 411 0004 4CF25030 movw r0, #50000 - ARM GAS /tmp/cc9TanaG.s page 42 + ARM GAS /tmp/ccWTTAKN.s page 42 412 .LVL24: @@ -2518,7 +2518,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 457 .cfi_offset 14, -4 458 0002 0446 mov r4, r0 875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** - ARM GAS /tmp/cc9TanaG.s page 43 + ARM GAS /tmp/ccWTTAKN.s page 43 459 .loc 1 875 3 is_stmt 1 view .LVU105 @@ -2578,7 +2578,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 502 .loc 1 578 1 is_stmt 0 view .LVU118 503 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 504 .LCFI3: - ARM GAS /tmp/cc9TanaG.s page 44 + ARM GAS /tmp/ccWTTAKN.s page 44 505 .cfi_def_cfa_offset 24 @@ -2638,7 +2638,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 541 .loc 1 603 29 is_stmt 0 view .LVU137 542 0014 44EA0701 orr r1, r4, r7 - ARM GAS /tmp/cc9TanaG.s page 45 + ARM GAS /tmp/ccWTTAKN.s page 45 603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** @@ -2698,7 +2698,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 587 .thumb 588 .thumb_func 590 FLASH_OB_BootAddressConfig: - ARM GAS /tmp/cc9TanaG.s page 46 + ARM GAS /tmp/ccWTTAKN.s page 46 591 .LVL41: @@ -2758,7 +2758,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 955:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 632 .loc 1 955 1 is_stmt 0 view .LVU162 633 0020 38BD pop {r3, r4, r5, pc} - ARM GAS /tmp/cc9TanaG.s page 47 + ARM GAS /tmp/ccWTTAKN.s page 47 634 .LVL45: @@ -2818,7 +2818,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 683 0010 0122 movs r2, #1 684 0012 1A75 strb r2, [r3, #20] 290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** - ARM GAS /tmp/cc9TanaG.s page 48 + ARM GAS /tmp/ccWTTAKN.s page 48 685 .loc 1 290 3 discriminator 2 view .LVU170 @@ -2878,7 +2878,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 722 .loc 1 287 21 view .LVU187 723 0032 0120 movs r0, #1 724 .LVL53: - ARM GAS /tmp/cc9TanaG.s page 49 + ARM GAS /tmp/ccWTTAKN.s page 49 725 .L61: @@ -2938,7 +2938,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 762 .loc 1 372 3 view .LVU204 763 005c 184B ldr r3, .L80 764 005e 0022 movs r2, #0 - ARM GAS /tmp/cc9TanaG.s page 50 + ARM GAS /tmp/ccWTTAKN.s page 50 765 0060 1A75 strb r2, [r3, #20] @@ -2998,7 +2998,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 808 .loc 1 321 14 view .LVU215 809 009c D2E7 b .L64 810 .L77: - ARM GAS /tmp/cc9TanaG.s page 51 + ARM GAS /tmp/ccWTTAKN.s page 51 342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** } @@ -3058,7 +3058,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 851 .loc 1 375 1 view .LVU229 852 00bc 7047 bx lr 853 .L81: - ARM GAS /tmp/cc9TanaG.s page 52 + ARM GAS /tmp/ccWTTAKN.s page 52 854 00be 00BF .align 2 @@ -3118,7 +3118,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 898 .loc 1 396 25 is_stmt 0 view .LVU241 899 0014 FFF7FEFF bl FLASH_OB_GetUser 900 .LVL70: - ARM GAS /tmp/cc9TanaG.s page 53 + ARM GAS /tmp/ccWTTAKN.s page 53 396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** @@ -3178,7 +3178,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 944 .loc 1 488 3 view .LVU255 491:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_VOLTAGERANGE(VoltageRange)); - ARM GAS /tmp/cc9TanaG.s page 54 + ARM GAS /tmp/ccWTTAKN.s page 54 945 .loc 1 491 3 view .LVU256 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 985 0024 22F44072 bic r2, r2, #768 986 0028 1A61 str r2, [r3, #16] 519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_SNB); - ARM GAS /tmp/cc9TanaG.s page 55 + ARM GAS /tmp/ccWTTAKN.s page 55 987 .loc 1 519 3 is_stmt 1 view .LVU271 @@ -3298,7 +3298,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 1029 0054 003C0240 .word 1073888256 1030 .cfi_endproc 1031 .LFE146: - ARM GAS /tmp/cc9TanaG.s page 56 + ARM GAS /tmp/ccWTTAKN.s page 56 1033 .section .text.HAL_FLASHEx_Erase,"ax",%progbits @@ -3358,7 +3358,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 1076 0018 FFF7FEFF bl FLASH_WaitForLastOperation 1077 .LVL83: 170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { - ARM GAS /tmp/cc9TanaG.s page 57 + ARM GAS /tmp/ccWTTAKN.s page 57 1078 .loc 1 170 3 is_stmt 1 view .LVU297 @@ -3418,7 +3418,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 1115 .loc 1 201 9 is_stmt 1 view .LVU314 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** 1116 .loc 1 201 18 is_stmt 0 view .LVU315 - ARM GAS /tmp/cc9TanaG.s page 58 + ARM GAS /tmp/ccWTTAKN.s page 58 1117 0040 4CF25030 movw r0, #50000 @@ -3478,7 +3478,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 1159 .LVL94: 1160 .L105: 209:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** break; - ARM GAS /tmp/cc9TanaG.s page 59 + ARM GAS /tmp/ccWTTAKN.s page 59 1161 .loc 1 209 11 is_stmt 1 view .LVU328 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 1206 .thumb 1207 .thumb_func 1209 HAL_FLASHEx_Erase_IT: - ARM GAS /tmp/cc9TanaG.s page 60 + ARM GAS /tmp/ccWTTAKN.s page 60 1210 .LVL99: @@ -3598,7 +3598,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** { 1251 .loc 1 249 5 view .LVU352 1252 0028 012B cmp r3, #1 - ARM GAS /tmp/cc9TanaG.s page 61 + ARM GAS /tmp/ccWTTAKN.s page 61 1253 002a 0DD0 beq .L113 @@ -3658,7 +3658,7 @@ ARM GAS /tmp/cc9TanaG.s page 1 1289 .loc 1 252 29 is_stmt 0 view .LVU370 1290 0048 054B ldr r3, .L114 1291 004a 0222 movs r2, #2 - ARM GAS /tmp/cc9TanaG.s page 62 + ARM GAS /tmp/ccWTTAKN.s page 62 1292 004c 1A70 strb r2, [r3] @@ -3698,61 +3698,61 @@ ARM GAS /tmp/cc9TanaG.s page 1 1322 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" 1323 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h" 1324 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h" - ARM GAS /tmp/cc9TanaG.s page 63 + ARM GAS /tmp/ccWTTAKN.s page 63 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_flash_ex.c - /tmp/cc9TanaG.s:20 .text.FLASH_MassErase:00000000 $t - /tmp/cc9TanaG.s:25 .text.FLASH_MassErase:00000000 FLASH_MassErase - /tmp/cc9TanaG.s:117 .text.FLASH_MassErase:0000004c $d - /tmp/cc9TanaG.s:122 .text.FLASH_OB_GetWRP:00000000 $t - /tmp/cc9TanaG.s:127 .text.FLASH_OB_GetWRP:00000000 FLASH_OB_GetWRP - /tmp/cc9TanaG.s:145 .text.FLASH_OB_GetWRP:0000000c $d - /tmp/cc9TanaG.s:151 .text.FLASH_OB_GetUser:00000000 $t - /tmp/cc9TanaG.s:156 .text.FLASH_OB_GetUser:00000000 FLASH_OB_GetUser - /tmp/cc9TanaG.s:174 .text.FLASH_OB_GetUser:0000000c $d - /tmp/cc9TanaG.s:180 .text.FLASH_OB_BOR_LevelConfig:00000000 $t - /tmp/cc9TanaG.s:185 .text.FLASH_OB_BOR_LevelConfig:00000000 FLASH_OB_BOR_LevelConfig - /tmp/cc9TanaG.s:209 .text.FLASH_OB_BOR_LevelConfig:00000010 $d - /tmp/cc9TanaG.s:214 .text.FLASH_OB_GetRDP:00000000 $t - /tmp/cc9TanaG.s:219 .text.FLASH_OB_GetRDP:00000000 FLASH_OB_GetRDP - /tmp/cc9TanaG.s:253 .text.FLASH_OB_GetRDP:00000018 $d - /tmp/cc9TanaG.s:258 .text.FLASH_OB_GetBOR:00000000 $t - /tmp/cc9TanaG.s:263 .text.FLASH_OB_GetBOR:00000000 FLASH_OB_GetBOR - /tmp/cc9TanaG.s:280 .text.FLASH_OB_GetBOR:0000000c $d - /tmp/cc9TanaG.s:285 .text.FLASH_OB_GetBootAddress:00000000 $t - /tmp/cc9TanaG.s:290 .text.FLASH_OB_GetBootAddress:00000000 FLASH_OB_GetBootAddress - /tmp/cc9TanaG.s:329 .text.FLASH_OB_GetBootAddress:00000014 $d - /tmp/cc9TanaG.s:334 .text.FLASH_OB_EnableWRP:00000000 $t - /tmp/cc9TanaG.s:339 .text.FLASH_OB_EnableWRP:00000000 FLASH_OB_EnableWRP - /tmp/cc9TanaG.s:382 .text.FLASH_OB_EnableWRP:0000001c $d - /tmp/cc9TanaG.s:387 .text.FLASH_OB_DisableWRP:00000000 $t - /tmp/cc9TanaG.s:392 .text.FLASH_OB_DisableWRP:00000000 FLASH_OB_DisableWRP - /tmp/cc9TanaG.s:435 .text.FLASH_OB_DisableWRP:00000018 $d - /tmp/cc9TanaG.s:440 .text.FLASH_OB_RDP_LevelConfig:00000000 $t - /tmp/cc9TanaG.s:445 .text.FLASH_OB_RDP_LevelConfig:00000000 FLASH_OB_RDP_LevelConfig - /tmp/cc9TanaG.s:485 .text.FLASH_OB_RDP_LevelConfig:00000014 $d - /tmp/cc9TanaG.s:490 .text.FLASH_OB_UserConfig:00000000 $t - /tmp/cc9TanaG.s:495 .text.FLASH_OB_UserConfig:00000000 FLASH_OB_UserConfig - /tmp/cc9TanaG.s:579 .text.FLASH_OB_UserConfig:00000040 $d - /tmp/cc9TanaG.s:585 .text.FLASH_OB_BootAddressConfig:00000000 $t - /tmp/cc9TanaG.s:590 .text.FLASH_OB_BootAddressConfig:00000000 FLASH_OB_BootAddressConfig - /tmp/cc9TanaG.s:646 .text.FLASH_OB_BootAddressConfig:00000030 $d - /tmp/cc9TanaG.s:651 .text.HAL_FLASHEx_OBProgram:00000000 $t - /tmp/cc9TanaG.s:657 .text.HAL_FLASHEx_OBProgram:00000000 HAL_FLASHEx_OBProgram - /tmp/cc9TanaG.s:856 .text.HAL_FLASHEx_OBProgram:000000c0 $d - /tmp/cc9TanaG.s:861 .text.HAL_FLASHEx_OBGetConfig:00000000 $t - /tmp/cc9TanaG.s:867 .text.HAL_FLASHEx_OBGetConfig:00000000 HAL_FLASHEx_OBGetConfig - /tmp/cc9TanaG.s:930 .text.FLASH_Erase_Sector:00000000 $t - /tmp/cc9TanaG.s:936 .text.FLASH_Erase_Sector:00000000 FLASH_Erase_Sector - /tmp/cc9TanaG.s:1029 .text.FLASH_Erase_Sector:00000054 $d - /tmp/cc9TanaG.s:1034 .text.HAL_FLASHEx_Erase:00000000 $t - /tmp/cc9TanaG.s:1040 .text.HAL_FLASHEx_Erase:00000000 HAL_FLASHEx_Erase - /tmp/cc9TanaG.s:1196 .text.HAL_FLASHEx_Erase:0000008c $d - /tmp/cc9TanaG.s:1203 .text.HAL_FLASHEx_Erase_IT:00000000 $t - /tmp/cc9TanaG.s:1209 .text.HAL_FLASHEx_Erase_IT:00000000 HAL_FLASHEx_Erase_IT - /tmp/cc9TanaG.s:1313 .text.HAL_FLASHEx_Erase_IT:00000060 $d + /tmp/ccWTTAKN.s:20 .text.FLASH_MassErase:00000000 $t + /tmp/ccWTTAKN.s:25 .text.FLASH_MassErase:00000000 FLASH_MassErase + /tmp/ccWTTAKN.s:117 .text.FLASH_MassErase:0000004c $d + /tmp/ccWTTAKN.s:122 .text.FLASH_OB_GetWRP:00000000 $t + /tmp/ccWTTAKN.s:127 .text.FLASH_OB_GetWRP:00000000 FLASH_OB_GetWRP + /tmp/ccWTTAKN.s:145 .text.FLASH_OB_GetWRP:0000000c $d + /tmp/ccWTTAKN.s:151 .text.FLASH_OB_GetUser:00000000 $t + /tmp/ccWTTAKN.s:156 .text.FLASH_OB_GetUser:00000000 FLASH_OB_GetUser + /tmp/ccWTTAKN.s:174 .text.FLASH_OB_GetUser:0000000c $d + /tmp/ccWTTAKN.s:180 .text.FLASH_OB_BOR_LevelConfig:00000000 $t + /tmp/ccWTTAKN.s:185 .text.FLASH_OB_BOR_LevelConfig:00000000 FLASH_OB_BOR_LevelConfig + /tmp/ccWTTAKN.s:209 .text.FLASH_OB_BOR_LevelConfig:00000010 $d + /tmp/ccWTTAKN.s:214 .text.FLASH_OB_GetRDP:00000000 $t + /tmp/ccWTTAKN.s:219 .text.FLASH_OB_GetRDP:00000000 FLASH_OB_GetRDP + /tmp/ccWTTAKN.s:253 .text.FLASH_OB_GetRDP:00000018 $d + /tmp/ccWTTAKN.s:258 .text.FLASH_OB_GetBOR:00000000 $t + /tmp/ccWTTAKN.s:263 .text.FLASH_OB_GetBOR:00000000 FLASH_OB_GetBOR + /tmp/ccWTTAKN.s:280 .text.FLASH_OB_GetBOR:0000000c $d + /tmp/ccWTTAKN.s:285 .text.FLASH_OB_GetBootAddress:00000000 $t + /tmp/ccWTTAKN.s:290 .text.FLASH_OB_GetBootAddress:00000000 FLASH_OB_GetBootAddress + /tmp/ccWTTAKN.s:329 .text.FLASH_OB_GetBootAddress:00000014 $d + /tmp/ccWTTAKN.s:334 .text.FLASH_OB_EnableWRP:00000000 $t + /tmp/ccWTTAKN.s:339 .text.FLASH_OB_EnableWRP:00000000 FLASH_OB_EnableWRP + /tmp/ccWTTAKN.s:382 .text.FLASH_OB_EnableWRP:0000001c $d + /tmp/ccWTTAKN.s:387 .text.FLASH_OB_DisableWRP:00000000 $t + /tmp/ccWTTAKN.s:392 .text.FLASH_OB_DisableWRP:00000000 FLASH_OB_DisableWRP + /tmp/ccWTTAKN.s:435 .text.FLASH_OB_DisableWRP:00000018 $d + /tmp/ccWTTAKN.s:440 .text.FLASH_OB_RDP_LevelConfig:00000000 $t + /tmp/ccWTTAKN.s:445 .text.FLASH_OB_RDP_LevelConfig:00000000 FLASH_OB_RDP_LevelConfig + /tmp/ccWTTAKN.s:485 .text.FLASH_OB_RDP_LevelConfig:00000014 $d + /tmp/ccWTTAKN.s:490 .text.FLASH_OB_UserConfig:00000000 $t + /tmp/ccWTTAKN.s:495 .text.FLASH_OB_UserConfig:00000000 FLASH_OB_UserConfig + /tmp/ccWTTAKN.s:579 .text.FLASH_OB_UserConfig:00000040 $d + /tmp/ccWTTAKN.s:585 .text.FLASH_OB_BootAddressConfig:00000000 $t + /tmp/ccWTTAKN.s:590 .text.FLASH_OB_BootAddressConfig:00000000 FLASH_OB_BootAddressConfig + /tmp/ccWTTAKN.s:646 .text.FLASH_OB_BootAddressConfig:00000030 $d + /tmp/ccWTTAKN.s:651 .text.HAL_FLASHEx_OBProgram:00000000 $t + /tmp/ccWTTAKN.s:657 .text.HAL_FLASHEx_OBProgram:00000000 HAL_FLASHEx_OBProgram + /tmp/ccWTTAKN.s:856 .text.HAL_FLASHEx_OBProgram:000000c0 $d + /tmp/ccWTTAKN.s:861 .text.HAL_FLASHEx_OBGetConfig:00000000 $t + /tmp/ccWTTAKN.s:867 .text.HAL_FLASHEx_OBGetConfig:00000000 HAL_FLASHEx_OBGetConfig + /tmp/ccWTTAKN.s:930 .text.FLASH_Erase_Sector:00000000 $t + /tmp/ccWTTAKN.s:936 .text.FLASH_Erase_Sector:00000000 FLASH_Erase_Sector + /tmp/ccWTTAKN.s:1029 .text.FLASH_Erase_Sector:00000054 $d + /tmp/ccWTTAKN.s:1034 .text.HAL_FLASHEx_Erase:00000000 $t + /tmp/ccWTTAKN.s:1040 .text.HAL_FLASHEx_Erase:00000000 HAL_FLASHEx_Erase + /tmp/ccWTTAKN.s:1196 .text.HAL_FLASHEx_Erase:0000008c $d + /tmp/ccWTTAKN.s:1203 .text.HAL_FLASHEx_Erase_IT:00000000 $t + /tmp/ccWTTAKN.s:1209 .text.HAL_FLASHEx_Erase_IT:00000000 HAL_FLASHEx_Erase_IT + /tmp/ccWTTAKN.s:1313 .text.HAL_FLASHEx_Erase_IT:00000060 $d UNDEFINED SYMBOLS FLASH_WaitForLastOperation diff --git a/build/stm32f7xx_hal_flash_ex.o b/build/stm32f7xx_hal_flash_ex.o index 8899e7e770b94b8000691f04300b9fc9160e3fba..3dcb0d60e5504fb4af1a370ee1c79270c7f055ac 100644 GIT binary patch delta 993 zcmZWlTS!z<6g~UgJNI7a&eV+K+Zktc@|pO`S6Qe`miW43l!S<(HIhpBNP7^KA$YWqHYg!Ukys@4)q@Nqq(3VNqzn>28Zhd^pnb-OpbKl=bJkvG?S0PcAlweZn1}zY zo=Mpv7duRhS)Kx8eVqOGaZSBPGMCjQ@dK?T{8NJ1A!o_S%_@|TL&<@0+UdKg!t{?spzAni zO3SIG21=QGnyTE(tna9)vd6udDqB~`uavtx!c8=57h05T{z1lFN`a?_tm+O+cq*@K z?V=#HKu5uhzT<{R@Dqg-J;iBS%8@NVNGn&<%8Q&=x4!XQ_3ScW-6x*|jP(^b< z6(!q5F0)T#x9Wlbj;LAAUXo#1vO~B;Rht;=JOlfNjEkzX_@xM&m-J@R#|WbY7JW=a zPf7{lY@rkq9uT08Dv<$9)-u6|wOX3nEUcIRu||kEL5MVAf;qEkNL;Fd4~SBb z*5iaozYr^Vi4Y&t`jHSBWt0&e@vOSE*n_d#wR+*hcKZ8R86tIs@{s zk+>9t#Ah&6cN(U!v)x$%a-iRDgF9?c*vK{Y zgE5iGghGYl`@;$aEfw9?KNA%Ne~1xuvW*r*K@pjA8>j^t{*e6`>^a#7Lod8f&UxPF zJnwUI&dt$xb2MG76n9)IU7>AgatPtRK|(Yu;=NBXjR&9=%@8Vn$h;zVq~GI&R$bT+ zPJIhTtuH)|vziTn_7X2>!=6qJ%tpm?RFc7!W<3WS0Xogij^2tl=sDJ_+cDN@Py-Zt z4V}f#HG+vKV#G6ydjz75OL z?5^q>06&eILW%q-X?dE_nf?fj8wNMTV?P+5mLUY z_hVk;tlIUJyi|*lmaRFg&!W7CCE2PpNb(xiS0(9{Cap@RB!2|)y(E7CfE<+MbF81C z^2$^`g!>Zk((bT?pC=nltg}OT;eWBji$XF^eno6g}$A+UjCWa2g z?L=%i9<^g5F+0>AACKFybjprKwrqY!3?_OYl}I0o*>S#ER(H8{-JNx`kzZ^JQwukC zhH=?RV1yq5`?;zsOndnV@EqUkIz&s{+8tIzEuZS{QC8RT&)o;n-_s*ce+^vXKY%}R zNBARp%@g4u?dLP$3Yy_tz)^kytYlB5f(E$}ILom}#p=Ubg}8tR|M$y21U7#G$obZ! diff --git a/build/stm32f7xx_hal_gpio.lst b/build/stm32f7xx_hal_gpio.lst index 041ee9a..9f969e6 100644 --- a/build/stm32f7xx_hal_gpio.lst +++ b/build/stm32f7xx_hal_gpio.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccXhcUUd.s page 1 +ARM GAS /tmp/cc6OeYuT.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** in several modes: 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** (+) Input mode - ARM GAS /tmp/ccXhcUUd.s page 2 + ARM GAS /tmp/cc6OeYuT.s page 2 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** (+) Analog mode @@ -118,7 +118,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** - ARM GAS /tmp/ccXhcUUd.s page 3 + ARM GAS /tmp/cc6OeYuT.s page 3 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). @@ -178,7 +178,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** * 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** @verbatim 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** =============================================================================== - ARM GAS /tmp/ccXhcUUd.s page 4 + ARM GAS /tmp/cc6OeYuT.s page 4 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** ##### Initialization and de-initialization functions ##### @@ -238,7 +238,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 51 .cfi_offset 4, -16 52 .cfi_offset 5, -12 53 .cfi_offset 6, -8 - ARM GAS /tmp/ccXhcUUd.s page 5 + ARM GAS /tmp/cc6OeYuT.s page 5 54 .cfi_offset 14, -4 @@ -298,7 +298,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 86 .loc 1 197 9 is_stmt 1 view .LVU25 87 .loc 1 197 14 is_stmt 0 view .LVU26 88 0028 4468 ldr r4, [r0, #4] - ARM GAS /tmp/ccXhcUUd.s page 6 + ARM GAS /tmp/cc6OeYuT.s page 6 89 .LVL6: @@ -358,7 +358,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 118 .LVL11: 223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; 119 .loc 1 223 9 is_stmt 1 view .LVU40 - ARM GAS /tmp/ccXhcUUd.s page 7 + ARM GAS /tmp/cc6OeYuT.s page 7 120 .loc 1 223 37 is_stmt 0 view .LVU41 @@ -418,7 +418,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 154 006e 2A43 orrs r2, r2, r5 155 .LVL15: 244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2] = temp; - ARM GAS /tmp/ccXhcUUd.s page 8 + ARM GAS /tmp/cc6OeYuT.s page 8 156 .loc 1 244 9 is_stmt 1 view .LVU55 @@ -478,7 +478,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 197 .loc 1 257 12 is_stmt 0 view .LVU74 198 009a 4E68 ldr r6, [r1, #4] 199 009c 16F4001F tst r6, #2097152 - ARM GAS /tmp/ccXhcUUd.s page 9 + ARM GAS /tmp/cc6OeYuT.s page 9 200 00a0 01D0 beq .L9 @@ -538,7 +538,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 238 00c2 2240 ands r2, r2, r4 239 .LVL27: 274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** if ((GPIO_Init->Mode & EXTI_IT) != 0x00u) - ARM GAS /tmp/ccXhcUUd.s page 10 + ARM GAS /tmp/cc6OeYuT.s page 10 240 .loc 1 274 9 is_stmt 1 view .LVU93 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 280 .loc 1 186 7 is_stmt 1 view .LVU109 186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** { 281 .loc 1 186 22 is_stmt 0 view .LVU110 - ARM GAS /tmp/ccXhcUUd.s page 11 + ARM GAS /tmp/cc6OeYuT.s page 11 282 00ec 4C68 ldr r4, [r1, #4] @@ -658,7 +658,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** GPIOx->PUPDR = temp; 319 .loc 1 211 14 view .LVU128 320 0112 2243 orrs r2, r2, r4 - ARM GAS /tmp/ccXhcUUd.s page 12 + ARM GAS /tmp/cc6OeYuT.s page 12 321 .LVL37: @@ -718,7 +718,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 358 .LVL41: 232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** 359 .loc 1 232 7 is_stmt 1 view .LVU146 - ARM GAS /tmp/ccXhcUUd.s page 13 + ARM GAS /tmp/cc6OeYuT.s page 13 232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** @@ -778,7 +778,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 398 0168 4FEA8E0E lsl lr, lr, #2 242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); 399 .loc 1 242 36 view .LVU163 - ARM GAS /tmp/ccXhcUUd.s page 14 + ARM GAS /tmp/cc6OeYuT.s page 14 400 016c 0F22 movs r2, #15 @@ -838,7 +838,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 442 .loc 1 243 29 discriminator 17 view .LVU175 443 01be 02F58062 add r2, r2, #1024 444 01c2 9042 cmp r0, r2 - ARM GAS /tmp/ccXhcUUd.s page 15 + ARM GAS /tmp/cc6OeYuT.s page 15 445 01c4 3FF44EAF beq .L30 @@ -898,7 +898,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** } 486 .loc 1 282 1 view .LVU186 487 01ec 02B0 add sp, sp, #8 - ARM GAS /tmp/ccXhcUUd.s page 16 + ARM GAS /tmp/cc6OeYuT.s page 16 488 .LCFI2: @@ -958,7 +958,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 297:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** 298:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** /* Check the parameters */ 299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); - ARM GAS /tmp/ccXhcUUd.s page 17 + ARM GAS /tmp/cc6OeYuT.s page 17 530 .loc 1 299 3 view .LVU193 @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** 320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ 321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); - ARM GAS /tmp/ccXhcUUd.s page 18 + ARM GAS /tmp/cc6OeYuT.s page 18 322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 600 0054 24EA0202 bic r2, r4, r2 601 .LVL54: 602 .loc 1 339 22 view .LVU219 - ARM GAS /tmp/ccXhcUUd.s page 19 + ARM GAS /tmp/cc6OeYuT.s page 19 603 0058 4260 str r2, [r0, #4] @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 641 .loc 1 313 50 is_stmt 0 view .LVU235 642 0084 03F0030C and ip, r3, #3 313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** if (tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)))) - ARM GAS /tmp/ccXhcUUd.s page 20 + ARM GAS /tmp/cc6OeYuT.s page 20 643 .loc 1 313 38 view .LVU236 @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 685 00d2 05F58065 add r5, r5, #1024 686 00d6 A842 cmp r0, r5 687 00d8 13D0 beq .L47 - ARM GAS /tmp/ccXhcUUd.s page 21 + ARM GAS /tmp/cc6OeYuT.s page 21 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** { @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 730 0106 104C ldr r4, .L56+8 731 .LVL61: 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); - ARM GAS /tmp/ccXhcUUd.s page 22 + ARM GAS /tmp/cc6OeYuT.s page 22 732 .loc 1 317 13 view .LVU261 @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** } 345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** } 770 .loc 1 345 1 view .LVU277 - ARM GAS /tmp/ccXhcUUd.s page 23 + ARM GAS /tmp/cc6OeYuT.s page 23 771 013c F0BD pop {r4, r5, r6, r7, pc} @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** { 802 .loc 1 371 1 is_stmt 1 view -0 803 .cfi_startproc - ARM GAS /tmp/ccXhcUUd.s page 24 + ARM GAS /tmp/cc6OeYuT.s page 24 804 @ args = 0, pretend = 0, frame = 0 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 391:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR register to allow atomic read/modify 392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between 393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** * the read and the modify access. - ARM GAS /tmp/ccXhcUUd.s page 25 + ARM GAS /tmp/cc6OeYuT.s page 25 394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** * @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 871 .thumb 872 .thumb_func 874 HAL_GPIO_TogglePin: - ARM GAS /tmp/ccXhcUUd.s page 26 + ARM GAS /tmp/cc6OeYuT.s page 26 875 .LVL72: @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 910 HAL_GPIO_LockPin: 911 .LVL75: 912 .LFB146: - ARM GAS /tmp/ccXhcUUd.s page 27 + ARM GAS /tmp/cc6OeYuT.s page 27 440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 940 .loc 1 466 15 is_stmt 0 view .LVU324 941 0014 019B ldr r3, [sp, #4] 942 0016 C361 str r3, [r0, #28] - ARM GAS /tmp/ccXhcUUd.s page 28 + ARM GAS /tmp/cc6OeYuT.s page 28 467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** /* Read LCKR register. This read is mandatory to complete key lock sequence */ @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 984 HAL_GPIO_EXTI_Callback: 985 .LVL79: 986 .LFB148: - ARM GAS /tmp/ccXhcUUd.s page 29 + ARM GAS /tmp/cc6OeYuT.s page 29 480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccXhcUUd.s page 1 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** /* EXTI line interrupt detected */ 1012 .loc 1 487 1 is_stmt 0 view .LVU339 1013 0000 08B5 push {r3, lr} - ARM GAS /tmp/ccXhcUUd.s page 30 + ARM GAS /tmp/cc6OeYuT.s page 30 1014 .LCFI9: @@ -1786,29 +1786,29 @@ ARM GAS /tmp/ccXhcUUd.s page 1 1050 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" 1051 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" 1052 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" - ARM GAS /tmp/ccXhcUUd.s page 31 + ARM GAS /tmp/cc6OeYuT.s page 31 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_gpio.c - /tmp/ccXhcUUd.s:20 .text.HAL_GPIO_Init:00000000 $t - /tmp/ccXhcUUd.s:26 .text.HAL_GPIO_Init:00000000 HAL_GPIO_Init - /tmp/ccXhcUUd.s:505 .text.HAL_GPIO_Init:000001f4 $d - /tmp/ccXhcUUd.s:513 .text.HAL_GPIO_DeInit:00000000 $t - /tmp/ccXhcUUd.s:519 .text.HAL_GPIO_DeInit:00000000 HAL_GPIO_DeInit - /tmp/ccXhcUUd.s:786 .text.HAL_GPIO_DeInit:00000140 $d - /tmp/ccXhcUUd.s:793 .text.HAL_GPIO_ReadPin:00000000 $t - /tmp/ccXhcUUd.s:799 .text.HAL_GPIO_ReadPin:00000000 HAL_GPIO_ReadPin - /tmp/ccXhcUUd.s:832 .text.HAL_GPIO_WritePin:00000000 $t - /tmp/ccXhcUUd.s:838 .text.HAL_GPIO_WritePin:00000000 HAL_GPIO_WritePin - /tmp/ccXhcUUd.s:868 .text.HAL_GPIO_TogglePin:00000000 $t - /tmp/ccXhcUUd.s:874 .text.HAL_GPIO_TogglePin:00000000 HAL_GPIO_TogglePin - /tmp/ccXhcUUd.s:904 .text.HAL_GPIO_LockPin:00000000 $t - /tmp/ccXhcUUd.s:910 .text.HAL_GPIO_LockPin:00000000 HAL_GPIO_LockPin - /tmp/ccXhcUUd.s:978 .text.HAL_GPIO_EXTI_Callback:00000000 $t - /tmp/ccXhcUUd.s:984 .text.HAL_GPIO_EXTI_Callback:00000000 HAL_GPIO_EXTI_Callback - /tmp/ccXhcUUd.s:999 .text.HAL_GPIO_EXTI_IRQHandler:00000000 $t - /tmp/ccXhcUUd.s:1005 .text.HAL_GPIO_EXTI_IRQHandler:00000000 HAL_GPIO_EXTI_IRQHandler - /tmp/ccXhcUUd.s:1042 .text.HAL_GPIO_EXTI_IRQHandler:00000018 $d + /tmp/cc6OeYuT.s:20 .text.HAL_GPIO_Init:00000000 $t + /tmp/cc6OeYuT.s:26 .text.HAL_GPIO_Init:00000000 HAL_GPIO_Init + /tmp/cc6OeYuT.s:505 .text.HAL_GPIO_Init:000001f4 $d + /tmp/cc6OeYuT.s:513 .text.HAL_GPIO_DeInit:00000000 $t + /tmp/cc6OeYuT.s:519 .text.HAL_GPIO_DeInit:00000000 HAL_GPIO_DeInit + /tmp/cc6OeYuT.s:786 .text.HAL_GPIO_DeInit:00000140 $d + /tmp/cc6OeYuT.s:793 .text.HAL_GPIO_ReadPin:00000000 $t + /tmp/cc6OeYuT.s:799 .text.HAL_GPIO_ReadPin:00000000 HAL_GPIO_ReadPin + /tmp/cc6OeYuT.s:832 .text.HAL_GPIO_WritePin:00000000 $t + /tmp/cc6OeYuT.s:838 .text.HAL_GPIO_WritePin:00000000 HAL_GPIO_WritePin + /tmp/cc6OeYuT.s:868 .text.HAL_GPIO_TogglePin:00000000 $t + /tmp/cc6OeYuT.s:874 .text.HAL_GPIO_TogglePin:00000000 HAL_GPIO_TogglePin + /tmp/cc6OeYuT.s:904 .text.HAL_GPIO_LockPin:00000000 $t + /tmp/cc6OeYuT.s:910 .text.HAL_GPIO_LockPin:00000000 HAL_GPIO_LockPin + /tmp/cc6OeYuT.s:978 .text.HAL_GPIO_EXTI_Callback:00000000 $t + /tmp/cc6OeYuT.s:984 .text.HAL_GPIO_EXTI_Callback:00000000 HAL_GPIO_EXTI_Callback + /tmp/cc6OeYuT.s:999 .text.HAL_GPIO_EXTI_IRQHandler:00000000 $t + /tmp/cc6OeYuT.s:1005 .text.HAL_GPIO_EXTI_IRQHandler:00000000 HAL_GPIO_EXTI_IRQHandler + /tmp/cc6OeYuT.s:1042 .text.HAL_GPIO_EXTI_IRQHandler:00000018 $d NO UNDEFINED SYMBOLS diff --git a/build/stm32f7xx_hal_gpio.o b/build/stm32f7xx_hal_gpio.o index 20a862d4c7bda58db85b983e98daa1b8b7b93471..b256577f565782c7d42e66ddaa9d957146bf2fb8 100644 GIT binary patch delta 758 zcmZWmT}TvB6u#%)*_qk98||c2o31;$$!I0hR_m^!LFE!?;+6>gfiAh>k~RKpNP*Fd zFH*31M0%)D=_vvcK_%!xs0fRCDGDJldXS(WB`bQed(C}n9=?0N?|k36_b|iVU%Ij; zbWRp8vC0yK5HB!7z61I1qq??7$W+nVsW_dK3{Qy1upc?q$GfF#HOKS0U#!M{=J<9V#YNRN4$0IXYTRCbOBo+Q zQ?sD~6I##+$_Z<^L>+Iz>spZhrZ}b*g`GJ5S@X z7~G4d9;RyyoApMxhhw@$p90S75qL1<4w(1FP_@eYZ>HB+lC)-n`Uq>rTDQMoTK<|% zL4iQninJVM4K6~qz<%s@?}8D$<30sh{N-*Dc#KyUyq4Z!P-T#K<)-}v-l>G-WpRv$ z=r@Ybc!e;p@@kkz+p|N|^_~FCVuz<3W^l+84`jtnFdnK9F-R0W5mR8ircD>e@!%}3 zdMuckD)janxDu$c?GEQ+%1&MGak`RrU8?s&#_6(8B-_(YqQl8Jm(u526GslW_B!V? zeaW8GRC&>vZBT{-ktW!SZzFwh5*sU<1l|=mieCkqSR369k1-t$3FT(gay>T*d5_6R s9=?qFpbb9=ZM2w>eF!CaSQzuc8?1;~uFOtCCfBvjn2#=o@mg%_U#&K#pa1{> delta 778 zcmZ8eK}b|l6n*#oKmY%EGnGHBoNS!2LB3Y<8OcV)0;|EY#3_r)it*=s(M3*v6^Rhs zL?H&|bz#&-p{8*A7;)Z?z7~`rw!l`imF>P_sn(>HgmDUiaaLL3&2}WyAiVlW` zX|3KQAm0=YtI544i4=>Qwl4hG-()F906YF;=6SElA zZRo|69x)qa!rz?ZxERDCJ;EajPU^++JJP5s=K5r@D`HuSeahxgZ6YC$({g=A+{YCP zeuz;c&Mg&Nj3$`FNyFk{j_-^r_%!AZN8eMZRukOF44T_0L#x|t^O$lA5Boz!Tj?aW zB|<*|ObJOzgL2Bp*mk&#J^p<#i;w)5U&wM7;=U>r2E(1*%N2N^7AjOEYZ zq=@mI3eJfN60eC`_KshYpSRfgmp}WCUtb%NiDt<#LFjd!PP&pG> z!nJ?}i_?38gXRUhGke{&JKT(8H=RtKv(Gx2u579^+n4R`YEQTHU+Z;|{n^_;$}mrfl!`k$DXbZ@q!Z@}?foCw!W^WxTBkix4~&2SN)Rt>-qmL6&*>?fSZ zw}dBfM`AyG!TLmu7&l?T3f?2Ui!TW0@iXBc^i^B%2rH_sLZgzgk@c66uS4T(6!s6F CnXP^R diff --git a/build/stm32f7xx_hal_i2c.lst b/build/stm32f7xx_hal_i2c.lst index d173320..23beea8 100644 --- a/build/stm32f7xx_hal_i2c.lst +++ b/build/stm32f7xx_hal_i2c.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccSHpINd.s page 1 +ARM GAS /tmp/ccloipGv.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (#) Declare a I2C_HandleTypeDef handle structure, for example: 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_HandleTypeDef hi2c; - ARM GAS /tmp/ccSHpINd.s page 2 + ARM GAS /tmp/ccloipGv.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_ - ARM GAS /tmp/ccSHpINd.s page 3 + ARM GAS /tmp/ccloipGv.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can @@ -178,7 +178,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA - ARM GAS /tmp/ccSHpINd.s page 4 + ARM GAS /tmp/ccloipGv.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** with option I2C_FIRST_FRAME then I2C_OTHER_FRAME. @@ -238,7 +238,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_I2C_Master_Transmit_DMA() 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() - ARM GAS /tmp/ccSHpINd.s page 5 + ARM GAS /tmp/ccloipGv.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode (DMA) using @@ -298,7 +298,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** to register an interrupt callback. 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** [..] 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** Function HAL_I2C_RegisterCallback() allows to register following callbacks: - ARM GAS /tmp/ccSHpINd.s page 6 + ARM GAS /tmp/ccloipGv.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. @@ -358,7 +358,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** are set to the corresponding weak functions. 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** [..] - ARM GAS /tmp/ccSHpINd.s page 7 + ARM GAS /tmp/ccloipGv.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (@) You can refer to the I2C HAL driver header file for more useful macros @@ -418,7 +418,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE)) 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /*!< Slave Busy TX, combinaison of State LSB and Mode enum */ 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ - ARM GAS /tmp/ccSHpINd.s page 8 + ARM GAS /tmp/ccloipGv.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE)) @@ -478,7 +478,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Private functions to handle IT transfer */ 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c); - ARM GAS /tmp/ccSHpINd.s page 9 + ARM GAS /tmp/ccloipGv.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c); @@ -538,7 +538,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Private function to Convert Specific options */ 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c); 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /** - ARM GAS /tmp/ccSHpINd.s page 10 + ARM GAS /tmp/ccloipGv.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @} @@ -598,7 +598,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check the parameters */ 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); - ARM GAS /tmp/ccSHpINd.s page 11 + ARM GAS /tmp/ccloipGv.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); @@ -658,7 +658,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 12 + ARM GAS /tmp/ccloipGv.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else /* I2C_ADDRESSINGMODE_10BIT */ @@ -718,7 +718,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check the parameters */ - ARM GAS /tmp/ccSHpINd.s page 13 + ARM GAS /tmp/ccloipGv.s page 13 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); @@ -778,7 +778,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** UNUSED(hi2c); - ARM GAS /tmp/ccSHpINd.s page 14 + ARM GAS /tmp/ccloipGv.s page 14 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -838,7 +838,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = pCallback; - ARM GAS /tmp/ccSHpINd.s page 15 + ARM GAS /tmp/ccloipGv.s page 15 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** break; @@ -898,7 +898,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** default : 829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Update the error code */ - ARM GAS /tmp/ccSHpINd.s page 16 + ARM GAS /tmp/ccloipGv.s page 16 830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; @@ -958,7 +958,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallb 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** break; - ARM GAS /tmp/ccSHpINd.s page 17 + ARM GAS /tmp/ccloipGv.s page 17 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit 943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** break; - ARM GAS /tmp/ccSHpINd.s page 18 + ARM GAS /tmp/ccloipGv.s page 18 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return status; 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 19 + ARM GAS /tmp/ccloipGv.s page 19 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (#) Blocking mode functions are : 1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit() - ARM GAS /tmp/ccSHpINd.s page 20 + ARM GAS /tmp/ccloipGv.s page 20 1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive() @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface 1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param pData Pointer to data buffer - ARM GAS /tmp/ccSHpINd.s page 21 + ARM GAS /tmp/ccloipGv.s page 21 1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param Size Amount of data to be sent @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Send Slave Address */ 1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - ARM GAS /tmp/ccSHpINd.s page 22 + ARM GAS /tmp/ccloipGv.s page 22 1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode, @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR; 1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 23 + ARM GAS /tmp/ccloipGv.s page 23 1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear STOP Flag */ @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr = pData; 1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount = Size; 1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = NULL; - ARM GAS /tmp/ccSHpINd.s page 24 + ARM GAS /tmp/ccloipGv.s page 24 1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - ARM GAS /tmp/ccSHpINd.s page 25 + ARM GAS /tmp/ccloipGv.s page 25 1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Wait until STOPF flag is set */ @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; 1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; - ARM GAS /tmp/ccSHpINd.s page 26 + ARM GAS /tmp/ccloipGv.s page 26 1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); 1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 27 + ARM GAS /tmp/ccloipGv.s page 27 1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Wait until DIR flag is set Transmitter mode */ @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Flush TX register */ 1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); - ARM GAS /tmp/ccSHpINd.s page 28 + ARM GAS /tmp/ccloipGv.s page 28 1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t tickstart; 1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) - ARM GAS /tmp/ccSHpINd.s page 29 + ARM GAS /tmp/ccloipGv.s page 29 1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Read data from RXDR */ 1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; - ARM GAS /tmp/ccSHpINd.s page 30 + ARM GAS /tmp/ccloipGv.s page 30 1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 31 + ARM GAS /tmp/ccloipGv.s page 31 1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Increment Buffer pointer */ 1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr++; 1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 32 + ARM GAS /tmp/ccloipGv.s page 32 1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount--; @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */ 1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c); - ARM GAS /tmp/ccSHpINd.s page 33 + ARM GAS /tmp/ccloipGv.s page 33 1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */ 1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) 1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 34 + ARM GAS /tmp/ccloipGv.s page 34 1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /** 1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt 1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - ARM GAS /tmp/ccSHpINd.s page 35 + ARM GAS /tmp/ccloipGv.s page 35 1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * the configuration information for the specified I2C. @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param Size Amount of data to be sent 1968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @retval HAL status 1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */ - ARM GAS /tmp/ccSHpINd.s page 36 + ARM GAS /tmp/ccloipGv.s page 36 1970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) 2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 2026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ - ARM GAS /tmp/ccSHpINd.s page 37 + ARM GAS /tmp/ccloipGv.s page 37 2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; 2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Update I2C error code */ - ARM GAS /tmp/ccSHpINd.s page 38 + ARM GAS /tmp/ccloipGv.s page 38 2084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) 2140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 39 + ARM GAS /tmp/ccloipGv.s page 39 2141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; 2196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */ - ARM GAS /tmp/ccSHpINd.s page 40 + ARM GAS /tmp/ccloipGv.s page 40 2198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process 2253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current 2254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** process unlock */ - ARM GAS /tmp/ccSHpINd.s page 41 + ARM GAS /tmp/ccloipGv.s page 41 2255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Increment Buffer pointer */ 2311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr++; - ARM GAS /tmp/ccSHpINd.s page 42 + ARM GAS /tmp/ccloipGv.s page 42 2312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; 2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 2368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else - ARM GAS /tmp/ccSHpINd.s page 43 + ARM GAS /tmp/ccloipGv.s page 43 2369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR; 2424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 2425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */ - ARM GAS /tmp/ccSHpINd.s page 44 + ARM GAS /tmp/ccloipGv.s page 44 2426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c); @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** process unlock */ 2481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ 2482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - ARM GAS /tmp/ccSHpINd.s page 45 + ARM GAS /tmp/ccloipGv.s page 45 2483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 2538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */ - ARM GAS /tmp/ccSHpINd.s page 46 + ARM GAS /tmp/ccloipGv.s page 46 2540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c); @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2594:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--; 2595:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2596:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) - ARM GAS /tmp/ccSHpINd.s page 47 + ARM GAS /tmp/ccloipGv.s page 47 2597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2651:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value 2652:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface 2653:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddress Internal memory address - ARM GAS /tmp/ccSHpINd.s page 48 + ARM GAS /tmp/ccloipGv.s page 48 2654:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2708:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = 1U; 2709:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, 2710:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_GENERATE_START_READ); - ARM GAS /tmp/ccSHpINd.s page 49 + ARM GAS /tmp/ccloipGv.s page 49 2711:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2765:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2766:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear STOP Flag */ 2767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); - ARM GAS /tmp/ccSHpINd.s page 50 + ARM GAS /tmp/ccloipGv.s page 50 2768:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2822:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Prepare transfer parameters */ 2824:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = 0U; - ARM GAS /tmp/ccSHpINd.s page 51 + ARM GAS /tmp/ccloipGv.s page 51 2825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr = pData; @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2879:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddress Internal memory address 2880:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address 2881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param pData Pointer to data buffer - ARM GAS /tmp/ccSHpINd.s page 52 + ARM GAS /tmp/ccloipGv.s page 52 2882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param Size Amount of data to be sent @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2936:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ 2937:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_ 2938:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 53 + ARM GAS /tmp/ccloipGv.s page 53 2939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */ @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2993:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */ 2994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c); 2995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 54 + ARM GAS /tmp/ccloipGv.s page 54 2996:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3050:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 3051:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else 3052:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 55 + ARM GAS /tmp/ccloipGv.s page 55 3053:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Update I2C state */ @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. 3108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 3109:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * the configuration information for the specified I2C. - ARM GAS /tmp/ccSHpINd.s page 56 + ARM GAS /tmp/ccloipGv.s page 56 3110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 3165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Prefetch Memory Address */ 3166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); - ARM GAS /tmp/ccSHpINd.s page 57 + ARM GAS /tmp/ccloipGv.s page 57 3167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current 3222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** process unlock */ 3223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - ARM GAS /tmp/ccSHpINd.s page 58 + ARM GAS /tmp/ccloipGv.s page 58 3224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* possible to enable all of these */ @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 3279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 3280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */ - ARM GAS /tmp/ccSHpINd.s page 59 + ARM GAS /tmp/ccloipGv.s page 59 3281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c); @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 3336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */ 3337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); - ARM GAS /tmp/ccSHpINd.s page 60 + ARM GAS /tmp/ccloipGv.s page 60 3338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xfermode; 3393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; 3394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; - ARM GAS /tmp/ccSHpINd.s page 61 + ARM GAS /tmp/ccloipGv.s page 61 3395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else 3450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 3451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ - ARM GAS /tmp/ccSHpINd.s page 62 + ARM GAS /tmp/ccloipGv.s page 62 3452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xfermode; 3507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; 3508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; - ARM GAS /tmp/ccSHpINd.s page 63 + ARM GAS /tmp/ccloipGv.s page 63 3509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 3564:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else 3565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 64 + ARM GAS /tmp/ccloipGv.s page 64 3566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 3621:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Update XferCount value */ 3622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; - ARM GAS /tmp/ccSHpINd.s page 65 + ARM GAS /tmp/ccloipGv.s page 65 3623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); 3678:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 3679:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 66 + ARM GAS /tmp/ccloipGv.s page 66 3680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_OK; @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 3735:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 3736:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, - ARM GAS /tmp/ccSHpINd.s page 67 + ARM GAS /tmp/ccloipGv.s page 67 3737:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** do not generate Restart Condition */ @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3791:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; 3792:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; 3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 68 + ARM GAS /tmp/ccloipGv.s page 68 3794:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check the parameters */ @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3848:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ 3849:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; 3850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 69 + ARM GAS /tmp/ccloipGv.s page 69 3851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set the DMA error callback */ @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 3906:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */ 3907:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); - ARM GAS /tmp/ccSHpINd.s page 70 + ARM GAS /tmp/ccloipGv.s page 70 3908:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3962:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) 3963:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 3964:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) - ARM GAS /tmp/ccSHpINd.s page 71 + ARM GAS /tmp/ccloipGv.s page 71 3965:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4019:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET)) 4020:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 4021:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ - ARM GAS /tmp/ccSHpINd.s page 72 + ARM GAS /tmp/ccloipGv.s page 72 4022:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4076:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 4077:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ 4078:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ - ARM GAS /tmp/ccSHpINd.s page 73 + ARM GAS /tmp/ccloipGv.s page 73 4079:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 4134:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 4135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable Address Acknowledge */ - ARM GAS /tmp/ccSHpINd.s page 74 + ARM GAS /tmp/ccloipGv.s page 74 4136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Update I2C error code */ 4191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; 4192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 75 + ARM GAS /tmp/ccloipGv.s page 75 4193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */ @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 4248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) 4249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 76 + ARM GAS /tmp/ccloipGv.s page 76 4250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 4305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ 4306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ - ARM GAS /tmp/ccSHpINd.s page 77 + ARM GAS /tmp/ccloipGv.s page 77 4307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ 4362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ 4363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) - ARM GAS /tmp/ccSHpINd.s page 78 + ARM GAS /tmp/ccloipGv.s page 78 4364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 4419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable Address Acknowledge */ 4420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; - ARM GAS /tmp/ccSHpINd.s page 79 + ARM GAS /tmp/ccloipGv.s page 79 4421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; 4476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 4477:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */ - ARM GAS /tmp/ccSHpINd.s page 80 + ARM GAS /tmp/ccloipGv.s page 80 4478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4532:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 4533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 4534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 81 + ARM GAS /tmp/ccloipGv.s page 81 4535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /** @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4589:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) 4590:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 4591:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); - ARM GAS /tmp/ccSHpINd.s page 82 + ARM GAS /tmp/ccloipGv.s page 82 4592:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4646:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 4647:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR(hi2c, itflags, itsources); 4648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 83 + ARM GAS /tmp/ccloipGv.s page 83 4649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4703:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /** 4704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Master Tx Transfer completed callback. 4705:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - ARM GAS /tmp/ccSHpINd.s page 84 + ARM GAS /tmp/ccloipGv.s page 84 4706:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * the configuration information for the specified I2C. @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 4761:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, 4762:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file - ARM GAS /tmp/ccSHpINd.s page 85 + ARM GAS /tmp/ccloipGv.s page 85 4763:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */ @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4817:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 4818:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /** 4819:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Memory Rx Transfer completed callback. - ARM GAS /tmp/ccSHpINd.s page 86 + ARM GAS /tmp/ccloipGv.s page 86 4820:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4874:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** =============================================================================== 4875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** ##### Peripheral State, Mode and Error functions ##### 4876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** =============================================================================== - ARM GAS /tmp/ccSHpINd.s page 87 + ARM GAS /tmp/ccloipGv.s page 87 4877:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** [..] @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4931:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /** 4932:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt. 4933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains - ARM GAS /tmp/ccSHpINd.s page 88 + ARM GAS /tmp/ccloipGv.s page 88 4934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * the configuration information for the specified I2C. @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4988:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr++; 4989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 4990:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--; - ARM GAS /tmp/ccSHpINd.s page 89 + ARM GAS /tmp/ccloipGv.s page 89 4991:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount--; @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5045:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ 5046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) 5047:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 90 + ARM GAS /tmp/ccloipGv.s page 90 5048:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->XferCount == 0U) @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; 5103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5104:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */ - ARM GAS /tmp/ccSHpINd.s page 91 + ARM GAS /tmp/ccloipGv.s page 91 5105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c); @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ 5160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) 5161:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 92 + ARM GAS /tmp/ccloipGv.s page 92 5162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 5217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ - ARM GAS /tmp/ccSHpINd.s page 93 + ARM GAS /tmp/ccloipGv.s page 93 5219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ 5274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) 5275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 94 + ARM GAS /tmp/ccloipGv.s page 94 5276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check that I2C transfer finished */ @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Increment Buffer pointer */ 5332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr++; - ARM GAS /tmp/ccSHpINd.s page 95 + ARM GAS /tmp/ccloipGv.s page 95 5333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5387:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 5388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /** - ARM GAS /tmp/ccSHpINd.s page 96 + ARM GAS /tmp/ccloipGv.s page 96 5390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA. @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; 5445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 5446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; - ARM GAS /tmp/ccSHpINd.s page 97 + ARM GAS /tmp/ccloipGv.s page 97 5447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) 5502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 5503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Generate Stop */ - ARM GAS /tmp/ccSHpINd.s page 98 + ARM GAS /tmp/ccloipGv.s page 98 5504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set corresponding Error Code */ 5560:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; - ARM GAS /tmp/ccSHpINd.s page 99 + ARM GAS /tmp/ccloipGv.s page 99 5561:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable DMA Request */ 5616:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) 5617:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 100 + ARM GAS /tmp/ccloipGv.s page 100 5618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; @@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; 5673:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5674:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable DMA Request */ - ARM GAS /tmp/ccSHpINd.s page 101 + ARM GAS /tmp/ccloipGv.s page 101 5675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) @@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5729:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check that I2C transfer finished */ 5730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ 5731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Mean XferCount == 0 */ - ARM GAS /tmp/ccSHpINd.s page 102 + ARM GAS /tmp/ccloipGv.s page 102 5732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* So clear Flag NACKF only */ @@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5786:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 5787:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else 5788:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 103 + ARM GAS /tmp/ccloipGv.s page 103 5789:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ @@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5843:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 5844:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * the configuration information for the specified I2C. 5845:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value - ARM GAS /tmp/ccSHpINd.s page 104 + ARM GAS /tmp/ccloipGv.s page 104 5846:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface @@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5900:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value 5901:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface 5902:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddress Internal memory address - ARM GAS /tmp/ccSHpINd.s page 105 + ARM GAS /tmp/ccloipGv.s page 105 5903:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address @@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5957:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) 5958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 5959:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint8_t transferdirection; - ARM GAS /tmp/ccSHpINd.s page 106 + ARM GAS /tmp/ccloipGv.s page 106 5960:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint16_t slaveaddrcode; @@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #else 6015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); 6016:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ - ARM GAS /tmp/ccSHpINd.s page 107 + ARM GAS /tmp/ccloipGv.s page 107 6017:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6071:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ 6072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 6073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); - ARM GAS /tmp/ccSHpINd.s page 108 + ARM GAS /tmp/ccloipGv.s page 108 6074:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #else @@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) 6129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 6130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ - ARM GAS /tmp/ccSHpINd.s page 109 + ARM GAS /tmp/ccloipGv.s page 109 6131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; @@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear STOP Flag */ 6186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 6187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 110 + ARM GAS /tmp/ccloipGv.s page 110 6188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */ @@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 6243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; 6244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; - ARM GAS /tmp/ccSHpINd.s page 111 + ARM GAS /tmp/ccloipGv.s page 111 6245:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */ 6300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); 6301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 112 + ARM GAS /tmp/ccloipGv.s page 112 6302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ @@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear Configuration Register 2 */ 6357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); 6358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 113 + ARM GAS /tmp/ccloipGv.s page 113 6359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Flush TX register */ @@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 6414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ 6415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET)) - ARM GAS /tmp/ccSHpINd.s page 114 + ARM GAS /tmp/ccloipGv.s page 114 6416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ 6471:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); 6472:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 115 + ARM GAS /tmp/ccloipGv.s page 115 6473:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ @@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); 6528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 6529:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 116 + ARM GAS /tmp/ccloipGv.s page 116 6530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief I2C interrupts error process. 6585:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c I2C handle. 6586:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param ErrorCode Error code to handle. - ARM GAS /tmp/ccSHpINd.s page 117 + ARM GAS /tmp/ccloipGv.s page 117 6587:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @retval None @@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6641:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 6642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 6643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 118 + ARM GAS /tmp/ccloipGv.s page 118 6644:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = NULL; @@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) 6699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 6700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ - ARM GAS /tmp/ccSHpINd.s page 119 + ARM GAS /tmp/ccloipGv.s page 119 6701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); @@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c I2C handle. 6756:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @retval None 6757:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */ - ARM GAS /tmp/ccSHpINd.s page 120 + ARM GAS /tmp/ccloipGv.s page 120 6758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) @@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 69 .LVL1: 70 .LFB218: 6773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 121 + ARM GAS /tmp/ccloipGv.s page 121 6774:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /** @@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @retval None 6829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */ 6830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) - ARM GAS /tmp/ccSHpINd.s page 122 + ARM GAS /tmp/ccloipGv.s page 122 6831:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = 1U; 6886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 6887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else - ARM GAS /tmp/ccSHpINd.s page 123 + ARM GAS /tmp/ccloipGv.s page 123 6888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /** 6943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief DMA I2C communication error callback. 6944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hdma DMA handle - ARM GAS /tmp/ccSHpINd.s page 124 + ARM GAS /tmp/ccloipGv.s page 124 6945:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @retval None @@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; 7000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 7001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 125 + ARM GAS /tmp/ccloipGv.s page 125 7002:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c); @@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */ 7057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, 7058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t Tickstart) - ARM GAS /tmp/ccSHpINd.s page 126 + ARM GAS /tmp/ccloipGv.s page 126 7059:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 7114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 7115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; - ARM GAS /tmp/ccSHpINd.s page 127 + ARM GAS /tmp/ccloipGv.s page 127 7116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; @@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear Configuration Register 2 */ 7171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); 7172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 128 + ARM GAS /tmp/ccloipGv.s page 128 7173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; @@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Wait until STOP Flag is set or timeout occurred */ 7228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* AutoEnd should be initiate after AF */ 7229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) - ARM GAS /tmp/ccSHpINd.s page 129 + ARM GAS /tmp/ccloipGv.s page 129 7230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR)) 7285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 7286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_BERR; - ARM GAS /tmp/ccSHpINd.s page 130 + ARM GAS /tmp/ccloipGv.s page 130 7287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param Mode New state of the I2C START condition generation. 7342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * This parameter can be one of the following values: 7343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @arg @ref I2C_RELOAD_MODE Enable Reload mode . - ARM GAS /tmp/ccSHpINd.s page 131 + ARM GAS /tmp/ccloipGv.s page 131 7344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode. @@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 98 .loc 1 7368 3 is_stmt 1 view .LVU22 99 0014 0268 ldr r2, [r0] 100 .LVL4: - ARM GAS /tmp/ccSHpINd.s page 132 + ARM GAS /tmp/ccloipGv.s page 132 101 .loc 1 7368 3 is_stmt 0 view .LVU23 @@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 140 .loc 1 7385 3 view .LVU29 141 .loc 1 7385 12 is_stmt 0 view .LVU30 142 0000 436B ldr r3, [r0, #52] - ARM GAS /tmp/ccSHpINd.s page 133 + ARM GAS /tmp/ccloipGv.s page 133 143 .loc 1 7385 6 view .LVU31 @@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 177 .loc 1 7404 14 is_stmt 0 view .LVU44 178 002c 43F0F403 orr r3, r3, #244 179 .LVL10: - ARM GAS /tmp/ccSHpINd.s page 134 + ARM GAS /tmp/ccloipGv.s page 134 180 .L10: @@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 212 .loc 1 7422 8 is_stmt 0 view .LVU57 213 0048 11F4004F tst r1, #32768 214 004c 15D1 bne .L19 - ARM GAS /tmp/ccSHpINd.s page 135 + ARM GAS /tmp/ccloipGv.s page 135 7383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 244 0068 2029 cmp r1, #32 245 006a 0BD0 beq .L22 246 .L17: - ARM GAS /tmp/ccSHpINd.s page 136 + ARM GAS /tmp/ccloipGv.s page 136 7447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 278 .loc 1 7449 14 is_stmt 0 view .LVU82 279 0084 43F06003 orr r3, r3, #96 280 .LVL24: - ARM GAS /tmp/ccSHpINd.s page 137 + ARM GAS /tmp/ccloipGv.s page 137 7449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7479:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_TXI; 318 .loc 1 7479 5 is_stmt 1 view .LVU91 319 .LVL27: - ARM GAS /tmp/ccSHpINd.s page 138 + ARM GAS /tmp/ccloipGv.s page 138 7480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 355 .loc 1 7496 7 is_stmt 1 view .LVU105 356 .loc 1 7496 14 is_stmt 0 view .LVU106 357 0032 43F0F403 orr r3, r3, #244 - ARM GAS /tmp/ccSHpINd.s page 139 + ARM GAS /tmp/ccloipGv.s page 139 358 .LVL31: @@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 381 0048 0168 ldr r1, [r0] 382 .LVL32: 383 .loc 1 7527 3 is_stmt 0 view .LVU116 - ARM GAS /tmp/ccSHpINd.s page 140 + ARM GAS /tmp/ccloipGv.s page 140 384 004a 0A68 ldr r2, [r1] @@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 424 006e EBE7 b .L32 425 .cfi_endproc 426 .LFE220: - ARM GAS /tmp/ccSHpINd.s page 141 + ARM GAS /tmp/ccloipGv.s page 141 428 .section .text.I2C_ConvertOtherXferOptions,"ax",%progbits @@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 455 .loc 1 7556 1 view .LVU139 456 000e 7047 bx lr 457 .L44: - ARM GAS /tmp/ccSHpINd.s page 142 + ARM GAS /tmp/ccloipGv.s page 142 7542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 503 .loc 1 7216 12 view .LVU151 504 0008 9E69 ldr r6, [r3, #24] 505 .LVL43: - ARM GAS /tmp/ccSHpINd.s page 143 + ARM GAS /tmp/ccloipGv.s page 143 7217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t tickstart = Tickstart; @@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 542 002c F6D0 beq .L49 7234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 543 .loc 1 7234 9 is_stmt 1 view .LVU170 - ARM GAS /tmp/ccSHpINd.s page 144 + ARM GAS /tmp/ccloipGv.s page 144 7234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 582 .loc 1 7241 38 view .LVU186 583 005a 02B9 cbnz r2, .L53 584 005c 73B9 cbnz r3, .L65 - ARM GAS /tmp/ccSHpINd.s page 145 + ARM GAS /tmp/ccloipGv.s page 145 585 .LVL52: @@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 622 .loc 1 7248 25 is_stmt 0 view .LVU204 623 0084 FFF7FEFF bl HAL_GetTick - ARM GAS /tmp/ccSHpINd.s page 146 + ARM GAS /tmp/ccloipGv.s page 146 624 .LVL56: @@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7289:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 662 .loc 1 7289 5 is_stmt 1 view .LVU221 663 00a6 4FF48071 mov r1, #256 - ARM GAS /tmp/ccSHpINd.s page 147 + ARM GAS /tmp/ccloipGv.s page 147 664 00aa D161 str r1, [r2, #28] @@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 703 .loc 1 7313 5 is_stmt 1 view .LVU237 704 .LVL70: - ARM GAS /tmp/ccSHpINd.s page 148 + ARM GAS /tmp/ccloipGv.s page 148 7316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 743 0108 2846 mov r0, r5 744 010a BDE8F081 pop {r4, r5, r6, r7, r8, pc} 745 .LVL73: - ARM GAS /tmp/ccSHpINd.s page 149 + ARM GAS /tmp/ccloipGv.s page 149 746 .L63: @@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 793 0010 22D1 bne .L74 7063:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 794 .loc 1 7063 5 is_stmt 1 view .LVU263 - ARM GAS /tmp/ccSHpINd.s page 150 + ARM GAS /tmp/ccloipGv.s page 150 7063:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 833 .loc 1 7076 11 is_stmt 1 view .LVU279 7076:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; 834 .loc 1 7076 23 is_stmt 0 view .LVU280 - ARM GAS /tmp/ccSHpINd.s page 151 + ARM GAS /tmp/ccloipGv.s page 151 835 0044 2023 movs r3, #32 @@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 879 .cfi_def_cfa_offset 32 880 .cfi_offset 3, -32 881 .cfi_offset 4, -28 - ARM GAS /tmp/ccSHpINd.s page 152 + ARM GAS /tmp/ccloipGv.s page 152 882 .cfi_offset 5, -24 @@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 924 .loc 1 7031 27 discriminator 1 view .LVU304 925 0038 A0EB0900 sub r0, r0, r9 7031:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 153 + ARM GAS /tmp/ccloipGv.s page 153 926 .loc 1 7031 10 discriminator 1 view .LVU305 @@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 964 006e 0120 movs r0, #1 965 0070 00E0 b .L77 966 .L83: - ARM GAS /tmp/ccSHpINd.s page 154 + ARM GAS /tmp/ccloipGv.s page 154 7046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1016 0014 4FF08073 mov r3, #16777216 1017 0018 EAB2 uxtb r2, r5 1018 .LVL87: - ARM GAS /tmp/ccSHpINd.s page 155 + ARM GAS /tmp/ccloipGv.s page 155 5857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1059 .cfi_def_cfa_offset 24 1060 @ sp needed 1061 0048 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - ARM GAS /tmp/ccSHpINd.s page 156 + ARM GAS /tmp/ccloipGv.s page 156 1062 .LVL91: @@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1102 .L94: 1103 0076 00BF .align 2 1104 .L93: - ARM GAS /tmp/ccSHpINd.s page 157 + ARM GAS /tmp/ccloipGv.s page 157 1105 0078 00200080 .word -2147475456 @@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1154 001e 3146 mov r1, r6 1155 0020 2046 mov r0, r4 1156 0022 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout - ARM GAS /tmp/ccSHpINd.s page 158 + ARM GAS /tmp/ccloipGv.s page 158 1157 .LVL97: @@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 1198 .loc 1 5930 28 view .LVU377 1199 004c 4FEA1822 lsr r2, r8, #8 - ARM GAS /tmp/ccSHpINd.s page 159 + ARM GAS /tmp/ccloipGv.s page 159 5930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1245 .LVL101: 1246 .LFB215: 7100:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) - ARM GAS /tmp/ccSHpINd.s page 160 + ARM GAS /tmp/ccloipGv.s page 160 1247 .loc 1 7100 1 is_stmt 1 view -0 @@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1289 .loc 1 7104 8 discriminator 1 view .LVU401 1290 0028 B8B9 cbnz r0, .L111 7110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 161 + ARM GAS /tmp/ccloipGv.s page 161 1291 .loc 1 7110 5 is_stmt 1 view .LVU402 @@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1328 .loc 1 7125 10 view .LVU419 1329 0056 0020 movs r0, #0 1330 .L108: - ARM GAS /tmp/ccSHpINd.s page 162 + ARM GAS /tmp/ccloipGv.s page 162 7126:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1377 .loc 1 7183 25 is_stmt 0 view .LVU429 1378 000c 0023 movs r3, #0 1379 000e 6364 str r3, [r4, #68] - ARM GAS /tmp/ccSHpINd.s page 163 + ARM GAS /tmp/ccloipGv.s page 163 1380 .LVL109: @@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1417 .loc 1 7196 9 view .LVU446 7198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 1418 .loc 1 7198 9 view .LVU447 - ARM GAS /tmp/ccSHpINd.s page 164 + ARM GAS /tmp/ccloipGv.s page 164 1419 .LVL111: @@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1458 0066 9A69 ldr r2, [r3, #24] 7158:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 1459 .loc 1 7158 9 is_stmt 1 view .LVU463 - ARM GAS /tmp/ccSHpINd.s page 165 + ARM GAS /tmp/ccloipGv.s page 165 7162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 1498 .loc 1 7179 16 is_stmt 0 view .LVU480 1499 00a2 0125 movs r5, #1 - ARM GAS /tmp/ccSHpINd.s page 166 + ARM GAS /tmp/ccloipGv.s page 166 1500 00a4 B4E7 b .L118 @@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1549 0002 5DD0 beq .L134 536:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check the I2C handle allocation */ 1550 .loc 1 536 1 view .LVU490 - ARM GAS /tmp/ccSHpINd.s page 167 + ARM GAS /tmp/ccloipGv.s page 167 1551 0004 10B5 push {r4, lr} @@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1587 .loc 1 591 47 view .LVU508 1588 0024 23F07063 bic r3, r3, #251658240 591:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 168 + ARM GAS /tmp/ccloipGv.s page 168 1589 .loc 1 591 27 view .LVU509 @@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 619:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 1627 .loc 1 619 3 view .LVU526 619:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 169 + ARM GAS /tmp/ccloipGv.s page 169 1628 .loc 1 619 7 is_stmt 0 view .LVU527 @@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1664 .loc 1 631 7 view .LVU545 1665 007c 2268 ldr r2, [r4] 631:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 170 + ARM GAS /tmp/ccloipGv.s page 170 1666 .loc 1 631 53 view .LVU546 @@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1703 .loc 1 600 5 is_stmt 1 view .LVU563 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 1704 .loc 1 600 56 is_stmt 0 view .LVU564 - ARM GAS /tmp/ccSHpINd.s page 171 + ARM GAS /tmp/ccloipGv.s page 171 1705 00a8 A368 ldr r3, [r4, #8] @@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1753 .loc 1 715 3 view .LVU572 720:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 1754 .loc 1 720 1 is_stmt 0 view .LVU573 - ARM GAS /tmp/ccSHpINd.s page 172 + ARM GAS /tmp/ccloipGv.s page 172 1755 0000 7047 bx lr @@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; 1800 .loc 1 680 3 is_stmt 1 view .LVU585 680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; - ARM GAS /tmp/ccSHpINd.s page 173 + ARM GAS /tmp/ccloipGv.s page 173 1801 .loc 1 680 15 is_stmt 0 view .LVU586 @@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1844 .loc 1 1121 1 is_stmt 0 view .LVU599 1845 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} 1846 .LCFI19: - ARM GAS /tmp/ccSHpINd.s page 174 + ARM GAS /tmp/ccloipGv.s page 174 1847 .cfi_def_cfa_offset 32 @@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1888 002e FFF7FEFF bl HAL_GetTick 1889 .LVL132: 1131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 175 + ARM GAS /tmp/ccloipGv.s page 175 1890 .loc 1 1131 17 view .LVU613 @@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 1928 .loc 1 1147 5 is_stmt 1 view .LVU630 1147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 176 + ARM GAS /tmp/ccloipGv.s page 176 1929 .loc 1 1147 13 is_stmt 0 view .LVU631 @@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1966 0088 92B2 uxth r2, r2 1167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--; 1967 .loc 1 1167 22 view .LVU649 - ARM GAS /tmp/ccSHpINd.s page 177 + ARM GAS /tmp/ccloipGv.s page 177 1968 008a 013A subs r2, r2, #1 @@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); 2011 .loc 1 1179 7 is_stmt 0 view .LVU661 2012 00c2 0BE0 b .L158 - ARM GAS /tmp/ccSHpINd.s page 178 + ARM GAS /tmp/ccloipGv.s page 178 2013 .L160: @@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2053 00f6 1278 ldrb r2, [r2] @ zero_extendqisi2 1191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2054 .loc 1 1191 28 view .LVU676 - ARM GAS /tmp/ccSHpINd.s page 179 + ARM GAS /tmp/ccloipGv.s page 179 2055 00f8 9A62 str r2, [r3, #40] @@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2094 0128 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout 2095 .LVL145: 1202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 180 + ARM GAS /tmp/ccloipGv.s page 180 2096 .loc 1 1202 12 discriminator 1 view .LVU692 @@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2139 0172 4B60 str r3, [r1, #4] 1235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; 2140 .loc 1 1235 5 view .LVU704 - ARM GAS /tmp/ccSHpINd.s page 181 + ARM GAS /tmp/ccloipGv.s page 181 1235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; @@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2182 .L165: 1188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 2183 .loc 1 1188 16 view .LVU718 - ARM GAS /tmp/ccSHpINd.s page 182 + ARM GAS /tmp/ccloipGv.s page 182 2184 0194 0120 movs r0, #1 @@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1265:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 2234 .loc 1 1265 11 is_stmt 0 view .LVU725 2235 000a 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2 - ARM GAS /tmp/ccSHpINd.s page 183 + ARM GAS /tmp/ccloipGv.s page 183 2236 .LVL155: @@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2276 0046 40F08F80 bne .L182 1278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; 2277 .loc 1 1278 5 is_stmt 1 view .LVU740 - ARM GAS /tmp/ccSHpINd.s page 184 + ARM GAS /tmp/ccloipGv.s page 184 1278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; @@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2315 007e FFF7FEFF bl I2C_TransferConfig 2316 .LVL161: 2317 0082 18E0 b .L176 - ARM GAS /tmp/ccSHpINd.s page 185 + ARM GAS /tmp/ccloipGv.s page 185 2318 .L174: @@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 2360 .loc 1 1305 11 is_stmt 0 view .LVU770 2361 00be 2A46 mov r2, r5 - ARM GAS /tmp/ccSHpINd.s page 186 + ARM GAS /tmp/ccloipGv.s page 186 2362 00c0 3146 mov r1, r6 @@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 2400 .loc 1 1319 16 is_stmt 0 view .LVU787 2401 00ec 638D ldrh r3, [r4, #42] - ARM GAS /tmp/ccSHpINd.s page 187 + ARM GAS /tmp/ccloipGv.s page 187 2402 00ee 9BB2 uxth r3, r3 @@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2443 0126 3146 mov r1, r6 2444 0128 2046 mov r0, r4 2445 012a FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout - ARM GAS /tmp/ccSHpINd.s page 188 + ARM GAS /tmp/ccloipGv.s page 188 2446 .LVL167: @@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2486 @ sp needed 2487 0160 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 2488 .LVL170: - ARM GAS /tmp/ccSHpINd.s page 189 + ARM GAS /tmp/ccloipGv.s page 189 2489 .L181: @@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2537 .LCFI27: 2538 .cfi_def_cfa_offset 24 2539 .cfi_offset 4, -24 - ARM GAS /tmp/ccSHpINd.s page 190 + ARM GAS /tmp/ccloipGv.s page 190 2540 .cfi_offset 5, -20 @@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2580 .loc 1 1396 17 is_stmt 0 view .LVU837 2581 0032 FFF7FEFF bl HAL_GetTick - ARM GAS /tmp/ccSHpINd.s page 191 + ARM GAS /tmp/ccloipGv.s page 191 2582 .LVL175: @@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2617 005a 236A ldr r3, [r4, #32] 1411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 2618 .loc 1 1411 8 view .LVU857 - ARM GAS /tmp/ccSHpINd.s page 192 + ARM GAS /tmp/ccloipGv.s page 192 2619 005c B3F5003F cmp r3, #131072 @@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1469:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 2661 .loc 1 1469 16 is_stmt 0 view .LVU870 2662 0094 628D ldrh r2, [r4, #42] - ARM GAS /tmp/ccSHpINd.s page 193 + ARM GAS /tmp/ccloipGv.s page 193 2663 0096 92B2 uxth r2, r2 @@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2702 .L208: 1389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR; 2703 .loc 1 1389 7 is_stmt 1 view .LVU886 - ARM GAS /tmp/ccSHpINd.s page 194 + ARM GAS /tmp/ccloipGv.s page 194 1389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR; @@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1427:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2742 .loc 1 1427 11 is_stmt 0 view .LVU903 2743 00f2 2268 ldr r2, [r4] - ARM GAS /tmp/ccSHpINd.s page 195 + ARM GAS /tmp/ccloipGv.s page 195 1427:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2784 0128 2046 mov r0, r4 2785 012a FFF7FEFF bl I2C_Flush_TXDR 2786 .LVL187: - ARM GAS /tmp/ccSHpINd.s page 196 + ARM GAS /tmp/ccloipGv.s page 196 1450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -11758,7 +11758,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2824 0154 0096 str r6, [sp] 2825 0156 2B46 mov r3, r5 2826 0158 1021 movs r1, #16 - ARM GAS /tmp/ccSHpINd.s page 197 + ARM GAS /tmp/ccloipGv.s page 197 2827 015a 2046 mov r0, r4 @@ -11818,7 +11818,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2865 .loc 1 1535 21 view .LVU950 2866 0184 5368 ldr r3, [r2, #4] 1535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR; - ARM GAS /tmp/ccSHpINd.s page 198 + ARM GAS /tmp/ccloipGv.s page 198 2867 .loc 1 1535 27 view .LVU951 @@ -11878,7 +11878,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2907 01ae 2046 mov r0, r4 2908 01b0 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout 2909 .LVL199: - ARM GAS /tmp/ccSHpINd.s page 199 + ARM GAS /tmp/ccloipGv.s page 199 1519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -11938,7 +11938,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2947 .loc 1 1546 5 is_stmt 1 view .LVU982 1546:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 2948 .loc 1 1546 5 view .LVU983 - ARM GAS /tmp/ccSHpINd.s page 200 + ARM GAS /tmp/ccloipGv.s page 200 2949 01e2 84F84030 strb r3, [r4, #64] @@ -11998,7 +11998,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2996 .cfi_def_cfa_offset 24 2997 .cfi_offset 4, -24 2998 .cfi_offset 5, -20 - ARM GAS /tmp/ccSHpINd.s page 201 + ARM GAS /tmp/ccloipGv.s page 201 2999 .cfi_offset 6, -16 @@ -12058,7 +12058,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3039 .loc 1 1581 17 view .LVU1006 3040 0036 0646 mov r6, r0 3041 .LVL207: - ARM GAS /tmp/ccSHpINd.s page 202 + ARM GAS /tmp/ccloipGv.s page 202 1583:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; @@ -12118,7 +12118,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3076 .loc 1 1597 5 is_stmt 1 view .LVU1026 1597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 3077 .loc 1 1597 9 is_stmt 0 view .LVU1027 - ARM GAS /tmp/ccSHpINd.s page 203 + ARM GAS /tmp/ccloipGv.s page 203 3078 005e 0090 str r0, [sp] @@ -12178,7 +12178,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 3118 .loc 1 1608 5 view .LVU1042 1608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 204 + ARM GAS /tmp/ccloipGv.s page 204 3119 .loc 1 1608 9 is_stmt 0 view .LVU1043 @@ -12238,7 +12238,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3158 .loc 1 1643 21 view .LVU1058 3159 00ba 0133 adds r3, r3, #1 3160 00bc 6362 str r3, [r4, #36] - ARM GAS /tmp/ccSHpINd.s page 205 + ARM GAS /tmp/ccloipGv.s page 205 1645:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--; @@ -12298,7 +12298,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3198 .loc 1 1624 9 is_stmt 1 view .LVU1075 1624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 3199 .loc 1 1624 13 is_stmt 0 view .LVU1076 - ARM GAS /tmp/ccSHpINd.s page 206 + ARM GAS /tmp/ccloipGv.s page 206 3200 00f2 2368 ldr r3, [r4] @@ -12358,7 +12358,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 3238 .loc 1 1650 5 is_stmt 1 view .LVU1093 1650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 207 + ARM GAS /tmp/ccloipGv.s page 207 3239 .loc 1 1650 9 is_stmt 0 view .LVU1094 @@ -12418,7 +12418,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3279 0150 5368 ldr r3, [r2, #4] 1664:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR; 3280 .loc 1 1664 27 view .LVU1109 - ARM GAS /tmp/ccSHpINd.s page 208 + ARM GAS /tmp/ccloipGv.s page 208 3281 0152 43F40043 orr r3, r3, #32768 @@ -12478,7 +12478,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3318 017a 02B0 add sp, sp, #8 3319 .LCFI33: 3320 .cfi_remember_state - ARM GAS /tmp/ccSHpINd.s page 209 + ARM GAS /tmp/ccloipGv.s page 209 3321 .cfi_def_cfa_offset 24 @@ -12538,7 +12538,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3368 .loc 1 1700 6 view .LVU1135 3369 000c 2028 cmp r0, #32 3370 000e 4ED1 bne .L240 - ARM GAS /tmp/ccSHpINd.s page 210 + ARM GAS /tmp/ccloipGv.s page 210 1702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -12598,7 +12598,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3406 .loc 1 1717 23 is_stmt 0 view .LVU1154 3407 003c 1F4B ldr r3, .L244 3408 .LVL223: - ARM GAS /tmp/ccSHpINd.s page 211 + ARM GAS /tmp/ccloipGv.s page 211 1717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; @@ -12658,7 +12658,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 3446 .loc 1 1740 11 is_stmt 0 view .LVU1172 3447 005c 626A ldr r2, [r4, #36] - ARM GAS /tmp/ccSHpINd.s page 212 + ARM GAS /tmp/ccloipGv.s page 212 1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -12718,7 +12718,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3488 .LVL231: 3489 .L235: 1773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 213 + ARM GAS /tmp/ccloipGv.s page 213 3490 .loc 1 1773 1 view .LVU1187 @@ -12778,7 +12778,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3533 00b2 0220 movs r0, #2 3534 00b4 EDE7 b .L235 3535 .L242: - ARM GAS /tmp/ccSHpINd.s page 214 + ARM GAS /tmp/ccloipGv.s page 214 1708:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -12838,7 +12838,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3583 .loc 1 1792 5 is_stmt 1 view .LVU1207 1792:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 3584 .loc 1 1792 9 is_stmt 0 view .LVU1208 - ARM GAS /tmp/ccSHpINd.s page 215 + ARM GAS /tmp/ccloipGv.s page 215 3585 0010 2068 ldr r0, [r4] @@ -12898,7 +12898,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3621 .loc 1 1807 23 view .LVU1226 3622 003e E362 str r3, [r4, #44] 3623 .LVL242: - ARM GAS /tmp/ccSHpINd.s page 216 + ARM GAS /tmp/ccloipGv.s page 216 1808:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -12958,7 +12958,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3662 0068 0221 movs r1, #2 3663 006a 2046 mov r0, r4 3664 006c FFF7FEFF bl I2C_Enable_IRQ - ARM GAS /tmp/ccSHpINd.s page 217 + ARM GAS /tmp/ccloipGv.s page 217 3665 .LVL248: @@ -13018,7 +13018,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3708 008c 0000FFFF .word -65536 3709 0090 00000000 .word I2C_Master_ISR_IT 3710 0094 00240080 .word -2147474432 - ARM GAS /tmp/ccSHpINd.s page 218 + ARM GAS /tmp/ccloipGv.s page 218 3711 .cfi_endproc @@ -13078,7 +13078,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1862:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 3755 .loc 1 1862 23 is_stmt 0 view .LVU1266 3756 0020 2023 movs r3, #32 - ARM GAS /tmp/ccSHpINd.s page 219 + ARM GAS /tmp/ccloipGv.s page 219 3757 0022 80F84230 strb r3, [r0, #66] @@ -13138,7 +13138,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 3792 .loc 1 1876 8 view .LVU1286 3793 0046 B3F5003F cmp r3, #131072 - ARM GAS /tmp/ccSHpINd.s page 220 + ARM GAS /tmp/ccloipGv.s page 220 3794 004a 08D0 beq .L265 @@ -13198,7 +13198,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3831 006a 438D ldrh r3, [r0, #42] 3832 006c 9BB2 uxth r3, r3 1885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--; - ARM GAS /tmp/ccSHpINd.s page 221 + ARM GAS /tmp/ccloipGv.s page 221 3833 .loc 1 1885 22 view .LVU1304 @@ -13258,7 +13258,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3881 .cfi_startproc 3882 @ args = 0, pretend = 0, frame = 0 3883 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccSHpINd.s page 222 + ARM GAS /tmp/ccloipGv.s page 222 1919:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) @@ -13318,7 +13318,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3922 002a 0568 ldr r5, [r0] 1930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 3923 .loc 1 1930 19 view .LVU1329 - ARM GAS /tmp/ccSHpINd.s page 223 + ARM GAS /tmp/ccloipGv.s page 223 3924 002c 6B68 ldr r3, [r5, #4] @@ -13378,7 +13378,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3959 0050 2046 mov r0, r4 3960 .L269: 1958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 224 + ARM GAS /tmp/ccloipGv.s page 224 3961 .loc 1 1958 1 view .LVU1349 @@ -13438,7 +13438,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1973:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; 4011 .loc 1 1973 3 is_stmt 1 view .LVU1356 1974:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t sizetoxfer = 0U; - ARM GAS /tmp/ccSHpINd.s page 225 + ARM GAS /tmp/ccloipGv.s page 225 4012 .loc 1 1974 3 view .LVU1357 @@ -13498,7 +13498,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 1989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 4050 .loc 1 1989 5 is_stmt 1 view .LVU1374 1989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 226 + ARM GAS /tmp/ccloipGv.s page 226 4051 .loc 1 1989 23 is_stmt 0 view .LVU1375 @@ -13558,7 +13558,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4088 .loc 1 2008 5 is_stmt 1 view .LVU1392 2008:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 4089 .loc 1 2008 13 is_stmt 0 view .LVU1393 - ARM GAS /tmp/ccSHpINd.s page 227 + ARM GAS /tmp/ccloipGv.s page 227 4090 005c 238D ldrh r3, [r4, #40] @@ -13618,7 +13618,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4127 007e 51D0 beq .L280 2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 4128 .loc 1 2024 7 is_stmt 1 view .LVU1411 - ARM GAS /tmp/ccSHpINd.s page 228 + ARM GAS /tmp/ccloipGv.s page 228 2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -13678,7 +13678,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4165 00a0 A06B ldr r0, [r4, #56] 4166 00a2 FFF7FEFF bl HAL_DMA_Start_IT 4167 .LVL282: - ARM GAS /tmp/ccSHpINd.s page 229 + ARM GAS /tmp/ccloipGv.s page 229 2055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -13738,7 +13738,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4203 .LVL285: 2005:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 4204 .loc 1 2005 16 is_stmt 0 view .LVU1449 - ARM GAS /tmp/ccSHpINd.s page 230 + ARM GAS /tmp/ccloipGv.s page 230 4205 00c8 4FF00076 mov r6, #33554432 @@ -13798,7 +13798,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4243 00f4 D2B2 uxtb r2, r2 4244 00f6 2946 mov r1, r5 4245 00f8 2046 mov r0, r4 - ARM GAS /tmp/ccSHpINd.s page 231 + ARM GAS /tmp/ccloipGv.s page 231 4246 .LVL289: @@ -13858,7 +13858,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2099:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_GENERATE_START_WRITE); 4285 .loc 1 2099 7 is_stmt 1 view .LVU1481 4286 0128 104B ldr r3, .L291+16 - ARM GAS /tmp/ccSHpINd.s page 232 + ARM GAS /tmp/ccloipGv.s page 232 4287 012a 0093 str r3, [sp] @@ -13918,7 +13918,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4330 .loc 1 1981 14 view .LVU1492 4331 0152 0220 movs r0, #2 4332 0154 FBE7 b .L276 - ARM GAS /tmp/ccSHpINd.s page 233 + ARM GAS /tmp/ccloipGv.s page 233 4333 .L287: @@ -13978,7 +13978,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4381 .loc 1 2139 11 view .LVU1500 4382 000a C0B2 uxtb r0, r0 2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 234 + ARM GAS /tmp/ccloipGv.s page 234 4383 .loc 1 2139 6 view .LVU1501 @@ -14038,7 +14038,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4420 .loc 1 2155 5 is_stmt 1 view .LVU1518 2155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; 4421 .loc 1 2155 23 is_stmt 0 view .LVU1519 - ARM GAS /tmp/ccSHpINd.s page 235 + ARM GAS /tmp/ccloipGv.s page 235 4422 0042 6385 strh r3, [r4, #42] @ movhi @@ -14098,7 +14098,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4459 0062 E36B ldr r3, [r4, #60] 2172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 4460 .loc 1 2172 10 view .LVU1537 - ARM GAS /tmp/ccSHpINd.s page 236 + ARM GAS /tmp/ccloipGv.s page 236 4461 0064 1BB3 cbz r3, .L298 @@ -14158,7 +14158,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4497 0088 2023 movs r3, #32 4498 008a 84F84130 strb r3, [r4, #65] 2228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 237 + ARM GAS /tmp/ccloipGv.s page 237 4499 .loc 1 2228 9 is_stmt 1 view .LVU1556 @@ -14218,7 +14218,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4536 00b0 84F84130 strb r3, [r4, #65] 2192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 4537 .loc 1 2192 9 is_stmt 1 view .LVU1574 - ARM GAS /tmp/ccSHpINd.s page 238 + ARM GAS /tmp/ccloipGv.s page 238 2192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -14278,7 +14278,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4576 .loc 1 2210 25 view .LVU1590 4577 00e2 9B1A subs r3, r3, r2 4578 00e4 9BB2 uxth r3, r3 - ARM GAS /tmp/ccSHpINd.s page 239 + ARM GAS /tmp/ccloipGv.s page 239 4579 00e6 6385 strh r3, [r4, #42] @ movhi @@ -14338,7 +14338,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4619 011a 84F84030 strb r3, [r4, #64] 2250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 4620 .loc 1 2250 7 view .LVU1605 - ARM GAS /tmp/ccSHpINd.s page 240 + ARM GAS /tmp/ccloipGv.s page 240 2259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -14398,7 +14398,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4669 .global HAL_I2C_Slave_Transmit_DMA 4670 .syntax unified 4671 .thumb - ARM GAS /tmp/ccSHpINd.s page 241 + ARM GAS /tmp/ccloipGv.s page 241 4672 .thumb_func @@ -14458,7 +14458,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4713 0028 2123 movs r3, #33 4714 002a 80F84130 strb r3, [r0, #65] 2293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - ARM GAS /tmp/ccSHpINd.s page 242 + ARM GAS /tmp/ccloipGv.s page 242 4715 .loc 1 2293 5 is_stmt 1 view .LVU1627 @@ -14518,7 +14518,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 4751 .loc 1 2317 13 is_stmt 0 view .LVU1646 4752 0050 638D ldrh r3, [r4, #42] - ARM GAS /tmp/ccSHpINd.s page 243 + ARM GAS /tmp/ccloipGv.s page 243 4753 0052 9BB2 uxth r3, r3 @@ -14578,7 +14578,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4789 0076 2832 adds r2, r2, #40 4790 0078 616A ldr r1, [r4, #36] 4791 .LVL326: - ARM GAS /tmp/ccSHpINd.s page 244 + ARM GAS /tmp/ccloipGv.s page 244 2332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, @@ -14638,7 +14638,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR; 4828 .loc 1 2286 23 is_stmt 0 view .LVU1683 4829 009e 4FF40073 mov r3, #512 - ARM GAS /tmp/ccSHpINd.s page 245 + ARM GAS /tmp/ccloipGv.s page 245 4830 00a2 4364 str r3, [r0, #68] @@ -14698,7 +14698,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4868 00c4 C4E7 b .L313 4869 .L315: 2339:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; - ARM GAS /tmp/ccSHpINd.s page 246 + ARM GAS /tmp/ccloipGv.s page 246 4870 .loc 1 2339 9 is_stmt 1 view .LVU1700 @@ -14758,7 +14758,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4906 00ec 0023 movs r3, #0 4907 00ee 84F84030 strb r3, [r4, #64] 2357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 247 + ARM GAS /tmp/ccloipGv.s page 247 4908 .loc 1 2357 9 view .LVU1719 @@ -14818,7 +14818,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4946 .loc 1 2395 7 view .LVU1735 4947 011e FFF7FEFF bl I2C_Enable_IRQ 4948 .LVL341: - ARM GAS /tmp/ccSHpINd.s page 248 + ARM GAS /tmp/ccloipGv.s page 248 4949 .L318: @@ -14878,7 +14878,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4998 @ args = 0, pretend = 0, frame = 0 4999 @ frame_needed = 0, uses_anonymous_args = 0 2415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; - ARM GAS /tmp/ccSHpINd.s page 249 + ARM GAS /tmp/ccloipGv.s page 249 5000 .loc 1 2415 1 is_stmt 0 view .LVU1743 @@ -14938,7 +14938,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5040 .loc 1 2430 5 is_stmt 1 view .LVU1758 2430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 250 + ARM GAS /tmp/ccloipGv.s page 250 5041 .loc 1 2430 23 is_stmt 0 view .LVU1759 @@ -14998,7 +14998,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5076 004c C36B ldr r3, [r0, #60] 2445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5077 .loc 1 2445 39 view .LVU1779 - ARM GAS /tmp/ccSHpINd.s page 251 + ARM GAS /tmp/ccloipGv.s page 251 5078 004e 284A ldr r2, .L343+12 @@ -15058,7 +15058,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5116 .loc 1 2494 7 is_stmt 1 view .LVU1796 2494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 252 + ARM GAS /tmp/ccloipGv.s page 252 5117 .loc 1 2494 11 is_stmt 0 view .LVU1797 @@ -15118,7 +15118,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5154 .loc 1 2462 23 view .LVU1815 5155 00a4 43F08003 orr r3, r3, #128 - ARM GAS /tmp/ccSHpINd.s page 253 + ARM GAS /tmp/ccloipGv.s page 253 5156 00a8 4364 str r3, [r0, #68] @@ -15178,7 +15178,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5192 .loc 1 2485 27 view .LVU1833 5193 00d0 43F40043 orr r3, r3, #32768 5194 00d4 1360 str r3, [r2] - ARM GAS /tmp/ccSHpINd.s page 254 + ARM GAS /tmp/ccloipGv.s page 254 2502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -15238,7 +15238,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5244 .cfi_offset 8, -20 5245 .cfi_offset 9, -16 5246 .cfi_offset 10, -12 - ARM GAS /tmp/ccSHpINd.s page 255 + ARM GAS /tmp/ccloipGv.s page 255 5247 .cfi_offset 11, -8 @@ -15298,7 +15298,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5287 .loc 1 2543 5 view .LVU1854 2543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5288 .loc 1 2543 17 is_stmt 0 view .LVU1855 - ARM GAS /tmp/ccSHpINd.s page 256 + ARM GAS /tmp/ccloipGv.s page 256 5289 003e FFF7FEFF bl HAL_GetTick @@ -15358,7 +15358,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2551:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 5329 .loc 1 2551 21 is_stmt 0 view .LVU1870 5330 006a 4023 movs r3, #64 - ARM GAS /tmp/ccSHpINd.s page 257 + ARM GAS /tmp/ccloipGv.s page 257 5331 006c 84F84230 strb r3, [r4, #66] @@ -15418,7 +15418,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 5369 .loc 1 2571 7 is_stmt 1 view .LVU1887 5370 009c 0023 movs r3, #0 - ARM GAS /tmp/ccSHpINd.s page 258 + ARM GAS /tmp/ccloipGv.s page 258 5371 009e 0093 str r3, [sp] @@ -15478,7 +15478,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5412 .loc 1 2613 11 is_stmt 1 view .LVU1900 5413 00d8 0023 movs r3, #0 5414 00da 0093 str r3, [sp] - ARM GAS /tmp/ccSHpINd.s page 259 + ARM GAS /tmp/ccloipGv.s page 259 5415 00dc 4FF00073 mov r3, #33554432 @@ -15538,7 +15538,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5454 010a 0133 adds r3, r3, #1 5455 010c 6362 str r3, [r4, #36] 2593:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--; - ARM GAS /tmp/ccSHpINd.s page 260 + ARM GAS /tmp/ccloipGv.s page 260 5456 .loc 1 2593 7 is_stmt 1 view .LVU1916 @@ -15598,7 +15598,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2604:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 5496 .loc 1 2604 12 view .LVU1931 5497 0140 FF2B cmp r3, #255 - ARM GAS /tmp/ccSHpINd.s page 261 + ARM GAS /tmp/ccloipGv.s page 261 5498 0142 C6D9 bls .L352 @@ -15658,7 +15658,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5540 0188 84F84230 strb r3, [r4, #66] 2637:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5541 .loc 1 2637 5 is_stmt 1 view .LVU1944 - ARM GAS /tmp/ccSHpINd.s page 262 + ARM GAS /tmp/ccloipGv.s page 262 2637:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -15718,7 +15718,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5586 .section .text.HAL_I2C_Mem_Read,"ax",%progbits 5587 .align 1 5588 .global HAL_I2C_Mem_Read - ARM GAS /tmp/ccSHpINd.s page 263 + ARM GAS /tmp/ccloipGv.s page 263 5589 .syntax unified @@ -15778,7 +15778,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5634 .loc 1 2670 8 is_stmt 0 view .LVU1965 5635 0020 0C9B ldr r3, [sp, #48] 5636 .LVL384: - ARM GAS /tmp/ccSHpINd.s page 264 + ARM GAS /tmp/ccloipGv.s page 264 2670:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -15838,7 +15838,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR; 5677 .loc 1 2672 23 is_stmt 0 view .LVU1980 5678 005a 4FF40073 mov r3, #512 - ARM GAS /tmp/ccSHpINd.s page 265 + ARM GAS /tmp/ccloipGv.s page 265 5679 005e 4364 str r3, [r0, #68] @@ -15898,7 +15898,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5716 0086 2946 mov r1, r5 5717 0088 2046 mov r0, r4 5718 008a FFF7FEFF bl I2C_RequestMemoryRead - ARM GAS /tmp/ccSHpINd.s page 266 + ARM GAS /tmp/ccloipGv.s page 266 5719 .LVL392: @@ -15958,7 +15958,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5758 00bc 2285 strh r2, [r4, #40] @ movhi 2715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_GENERATE_START_READ); 5759 .loc 1 2715 7 is_stmt 1 view .LVU2013 - ARM GAS /tmp/ccSHpINd.s page 267 + ARM GAS /tmp/ccloipGv.s page 267 5760 00be 3B4B ldr r3, .L385 @@ -16018,7 +16018,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 5804 .loc 1 2722 10 discriminator 1 view .LVU2024 5805 0100 0028 cmp r0, #0 - ARM GAS /tmp/ccSHpINd.s page 268 + ARM GAS /tmp/ccloipGv.s page 268 5806 0102 4DD1 bne .L377 @@ -16078,7 +16078,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5843 012a DED0 beq .L371 2736:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 5844 .loc 1 2736 35 discriminator 1 view .LVU2042 - ARM GAS /tmp/ccSHpINd.s page 269 + ARM GAS /tmp/ccloipGv.s page 269 5845 012c 002A cmp r2, #0 @@ -16138,7 +16138,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5887 .loc 1 2767 5 is_stmt 1 view .LVU2055 5888 0168 2368 ldr r3, [r4] - ARM GAS /tmp/ccSHpINd.s page 270 + ARM GAS /tmp/ccloipGv.s page 270 5889 016a 2022 movs r2, #32 @@ -16198,7 +16198,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5930 .loc 1 2677 5 discriminator 1 view .LVU2068 5931 019c 0220 movs r0, #2 5932 .LVL403: - ARM GAS /tmp/ccSHpINd.s page 271 + ARM GAS /tmp/ccloipGv.s page 271 2677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -16258,7 +16258,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5983 .LVL406: 2801:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 5984 .loc 1 2801 3 is_stmt 1 view .LVU2075 - ARM GAS /tmp/ccSHpINd.s page 272 + ARM GAS /tmp/ccloipGv.s page 272 2803:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -16318,7 +16318,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6022 .loc 1 2820 23 is_stmt 0 view .LVU2092 6023 003e 4026 movs r6, #64 6024 0040 84F84260 strb r6, [r4, #66] - ARM GAS /tmp/ccSHpINd.s page 273 + ARM GAS /tmp/ccloipGv.s page 273 2821:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -16378,7 +16378,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6059 .loc 1 2847 7 is_stmt 1 view .LVU2112 2847:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 6060 .loc 1 2847 26 is_stmt 0 view .LVU2113 - ARM GAS /tmp/ccSHpINd.s page 274 + ARM GAS /tmp/ccloipGv.s page 274 6061 0062 D2B2 uxtb r2, r2 @@ -16438,7 +16438,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6101 .loc 1 2835 7 is_stmt 1 view .LVU2127 2835:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 6102 .loc 1 2835 30 is_stmt 0 view .LVU2128 - ARM GAS /tmp/ccSHpINd.s page 275 + ARM GAS /tmp/ccloipGv.s page 275 6103 0092 D2B2 uxtb r2, r2 @@ -16498,7 +16498,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6152 HAL_I2C_Mem_Read_IT: 6153 .LVL417: 6154 .LFB160: - ARM GAS /tmp/ccSHpINd.s page 276 + ARM GAS /tmp/ccloipGv.s page 276 2887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check the parameters */ @@ -16558,7 +16558,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6197 0028 3AD1 bne .L406 2905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 6198 .loc 1 2905 5 is_stmt 1 view .LVU2148 - ARM GAS /tmp/ccSHpINd.s page 277 + ARM GAS /tmp/ccloipGv.s page 277 2905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -16618,7 +16618,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2916:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 6235 .loc 1 2916 23 is_stmt 0 view .LVU2167 6236 0056 E164 str r1, [r4, #76] - ARM GAS /tmp/ccSHpINd.s page 278 + ARM GAS /tmp/ccloipGv.s page 278 2919:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -16678,7 +16678,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6275 0080 2846 mov r0, r5 6276 0082 0BE0 b .L401 6277 .LVL424: - ARM GAS /tmp/ccSHpINd.s page 279 + ARM GAS /tmp/ccloipGv.s page 279 6278 .L409: @@ -16738,7 +16738,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 6320 .loc 1 2905 5 discriminator 1 view .LVU2196 6321 00a4 0220 movs r0, #2 - ARM GAS /tmp/ccSHpINd.s page 280 + ARM GAS /tmp/ccloipGv.s page 280 6322 00a6 F9E7 b .L401 @@ -16798,7 +16798,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6371 .LVL432: 2980:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 6372 .loc 1 2980 11 view .LVU2204 - ARM GAS /tmp/ccSHpINd.s page 281 + ARM GAS /tmp/ccloipGv.s page 281 6373 0014 C0B2 uxtb r0, r0 @@ -16858,7 +16858,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount = Size; 6411 .loc 1 3001 5 is_stmt 1 view .LVU2221 3001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount = Size; - ARM GAS /tmp/ccSHpINd.s page 282 + ARM GAS /tmp/ccloipGv.s page 282 6412 .loc 1 3001 23 is_stmt 0 view .LVU2222 @@ -16918,7 +16918,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6448 006a 8362 str r3, [r0, #40] 3032:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 6449 .loc 1 3032 7 is_stmt 1 view .LVU2241 - ARM GAS /tmp/ccSHpINd.s page 283 + ARM GAS /tmp/ccloipGv.s page 283 3032:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -16978,7 +16978,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3048:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize); 6486 .loc 1 3048 23 view .LVU2260 6487 008c 238D ldrh r3, [r4, #40] - ARM GAS /tmp/ccSHpINd.s page 284 + ARM GAS /tmp/ccloipGv.s page 284 6488 008e 2832 adds r2, r2, #40 @@ -17038,7 +17038,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 2985:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 6525 .loc 1 2985 15 is_stmt 0 view .LVU2278 6526 00bc 0125 movs r5, #1 - ARM GAS /tmp/ccSHpINd.s page 285 + ARM GAS /tmp/ccloipGv.s page 285 6527 00be 28E0 b .L414 @@ -17098,7 +17098,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6564 00e6 84F84020 strb r2, [r4, #64] 3061:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 6565 .loc 1 3061 7 view .LVU2296 - ARM GAS /tmp/ccSHpINd.s page 286 + ARM GAS /tmp/ccloipGv.s page 286 3063:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -17158,7 +17158,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6608 @ sp needed 6609 0116 F0BD pop {r4, r5, r6, r7, pc} 6610 .LVL443: - ARM GAS /tmp/ccSHpINd.s page 287 + ARM GAS /tmp/ccloipGv.s page 287 6611 .L424: @@ -17218,7 +17218,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 6663 .loc 1 3121 3 is_stmt 1 view .LVU2313 3124:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 288 + ARM GAS /tmp/ccloipGv.s page 288 6664 .loc 1 3124 3 view .LVU2314 @@ -17278,7 +17278,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6702 003c 84F84100 strb r0, [r4, #65] 3143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 6703 .loc 1 3143 5 is_stmt 1 view .LVU2331 - ARM GAS /tmp/ccSHpINd.s page 289 + ARM GAS /tmp/ccloipGv.s page 289 3143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; @@ -17338,7 +17338,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3163:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 6740 .loc 1 3163 5 is_stmt 1 view .LVU2350 3163:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 290 + ARM GAS /tmp/ccloipGv.s page 290 6741 .loc 1 3163 8 is_stmt 0 view .LVU2351 @@ -17398,7 +17398,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 6778 .loc 1 3191 7 is_stmt 1 view .LVU2369 3191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 291 + ARM GAS /tmp/ccloipGv.s page 291 6779 .loc 1 3191 11 is_stmt 0 view .LVU2370 @@ -17458,7 +17458,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 6816 .loc 1 3241 14 is_stmt 0 view .LVU2388 6817 00b4 0125 movs r5, #1 - ARM GAS /tmp/ccSHpINd.s page 292 + ARM GAS /tmp/ccloipGv.s page 292 6818 00b6 2CE0 b .L434 @@ -17518,7 +17518,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6856 00da 0022 movs r2, #0 6857 00dc 84F84220 strb r2, [r4, #66] 3204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 293 + ARM GAS /tmp/ccloipGv.s page 293 6858 .loc 1 3204 7 is_stmt 1 view .LVU2405 @@ -17578,7 +17578,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6897 010e 00E0 b .L434 6898 .LVL457: 6899 .L443: - ARM GAS /tmp/ccSHpINd.s page 294 + ARM GAS /tmp/ccloipGv.s page 294 3248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -17638,7 +17638,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6950 .LCFI82: 6951 .cfi_def_cfa_offset 28 6952 .cfi_offset 4, -28 - ARM GAS /tmp/ccSHpINd.s page 295 + ARM GAS /tmp/ccloipGv.s page 295 6953 .cfi_offset 5, -24 @@ -17698,7 +17698,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6993 002e 7AD0 beq .L465 3281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 6994 .loc 1 3281 5 discriminator 2 view .LVU2441 - ARM GAS /tmp/ccSHpINd.s page 296 + ARM GAS /tmp/ccloipGv.s page 296 6995 0030 0123 movs r3, #1 @@ -17758,7 +17758,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7034 .LVL465: 3296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 7035 .loc 1 3296 7 is_stmt 1 view .LVU2457 - ARM GAS /tmp/ccSHpINd.s page 297 + ARM GAS /tmp/ccloipGv.s page 297 3296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -17818,7 +17818,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7076 .LVL472: 3302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 7077 .loc 1 3302 31 discriminator 1 view .LVU2472 - ARM GAS /tmp/ccSHpINd.s page 298 + ARM GAS /tmp/ccloipGv.s page 298 7078 0090 C01B subs r0, r0, r7 @@ -17878,7 +17878,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 7118 .loc 1 3322 11 is_stmt 0 view .LVU2487 7119 00b6 3368 ldr r3, [r6] - ARM GAS /tmp/ccSHpINd.s page 299 + ARM GAS /tmp/ccloipGv.s page 299 7120 .LVL475: @@ -17938,7 +17938,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 7160 .loc 1 3364 21 view .LVU2502 7161 00ee 1343 orrs r3, r3, r2 - ARM GAS /tmp/ccSHpINd.s page 300 + ARM GAS /tmp/ccloipGv.s page 300 7162 00f0 7364 str r3, [r6, #68] @@ -17998,7 +17998,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7200 .L463: 3373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 7201 .loc 1 3373 12 view .LVU2519 - ARM GAS /tmp/ccSHpINd.s page 301 + ARM GAS /tmp/ccloipGv.s page 301 7202 011e 0220 movs r0, #2 @@ -18058,7 +18058,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7250 @ frame_needed = 0, uses_anonymous_args = 0 3391:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xfermode; 7251 .loc 1 3391 1 is_stmt 0 view .LVU2528 - ARM GAS /tmp/ccSHpINd.s page 302 + ARM GAS /tmp/ccloipGv.s page 302 7252 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} @@ -18118,7 +18118,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7292 .loc 1 3404 5 view .LVU2542 3404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; 7293 .loc 1 3404 21 is_stmt 0 view .LVU2543 - ARM GAS /tmp/ccSHpINd.s page 303 + ARM GAS /tmp/ccloipGv.s page 303 7294 0024 2121 movs r1, #33 @@ -18178,7 +18178,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 7330 .loc 1 3418 7 is_stmt 1 view .LVU2562 7331 .LVL490: - ARM GAS /tmp/ccSHpINd.s page 304 + ARM GAS /tmp/ccloipGv.s page 304 3418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -18238,7 +18238,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7369 .loc 1 3437 22 view .LVU2579 7370 0070 013B subs r3, r3, #1 7371 0072 9BB2 uxth r3, r3 - ARM GAS /tmp/ccSHpINd.s page 305 + ARM GAS /tmp/ccloipGv.s page 305 7372 0074 6385 strh r3, [r4, #42] @ movhi @@ -18298,7 +18298,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 7412 .loc 1 3455 7 view .LVU2594 3455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 306 + ARM GAS /tmp/ccloipGv.s page 306 7413 .loc 1 3455 15 is_stmt 0 view .LVU2595 @@ -18358,7 +18358,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7454 00d0 FFF7FEFF bl I2C_Enable_IRQ 7455 .LVL504: 3483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 307 + ARM GAS /tmp/ccloipGv.s page 307 7456 .loc 1 3483 5 view .LVU2609 @@ -18418,7 +18418,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7501 00fc 0220 movs r0, #2 7502 00fe EAE7 b .L475 7503 .LVL512: - ARM GAS /tmp/ccSHpINd.s page 308 + ARM GAS /tmp/ccloipGv.s page 308 7504 .L484: @@ -18478,7 +18478,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 7552 .loc 1 3514 3 view .LVU2627 3514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 309 + ARM GAS /tmp/ccloipGv.s page 309 7553 .loc 1 3514 11 is_stmt 0 view .LVU2628 @@ -18538,7 +18538,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7590 003a 6385 strh r3, [r4, #42] @ movhi 3526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; 7591 .loc 1 3526 5 is_stmt 1 view .LVU2646 - ARM GAS /tmp/ccSHpINd.s page 310 + ARM GAS /tmp/ccloipGv.s page 310 3526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; @@ -18598,7 +18598,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7629 0060 2368 ldr r3, [r4] 3546:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 7630 .loc 1 3546 30 view .LVU2664 - ARM GAS /tmp/ccSHpINd.s page 311 + ARM GAS /tmp/ccloipGv.s page 311 7631 0062 1278 ldrb r2, [r2] @ zero_extendqisi2 @@ -18658,7 +18658,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7669 .LVL524: 3538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 7670 .loc 1 3538 16 view .LVU2681 - ARM GAS /tmp/ccSHpINd.s page 312 + ARM GAS /tmp/ccloipGv.s page 312 7671 0088 E3E7 b .L495 @@ -18718,7 +18718,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7712 .LVL529: 7713 .L512: 3562:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 313 + ARM GAS /tmp/ccloipGv.s page 313 7714 .loc 1 3562 19 view .LVU2695 @@ -18778,7 +18778,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7751 00de A26B ldr r2, [r4, #56] 3588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 7752 .loc 1 3588 41 view .LVU2713 - ARM GAS /tmp/ccSHpINd.s page 314 + ARM GAS /tmp/ccloipGv.s page 314 7753 00e0 1365 str r3, [r2, #80] @@ -18838,7 +18838,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7789 .loc 1 3648 16 view .LVU2731 7790 010c 5BE0 b .L493 7791 .LVL533: - ARM GAS /tmp/ccSHpINd.s page 315 + ARM GAS /tmp/ccloipGv.s page 315 7792 .L500: @@ -18898,7 +18898,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7830 .loc 1 3614 11 is_stmt 0 view .LVU2747 7831 0142 FFF7FEFF bl I2C_TransferConfig 7832 .LVL536: - ARM GAS /tmp/ccSHpINd.s page 316 + ARM GAS /tmp/ccloipGv.s page 316 7833 .L504: @@ -18958,7 +18958,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7873 017a FFF7FEFF bl I2C_TransferConfig 7874 .LVL540: 7875 017e E2E7 b .L504 - ARM GAS /tmp/ccSHpINd.s page 317 + ARM GAS /tmp/ccloipGv.s page 317 7876 .LVL541: @@ -19018,7 +19018,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7918 01bc 2046 mov r0, r4 7919 01be FFF7FEFF bl I2C_TransferConfig 7920 .LVL544: - ARM GAS /tmp/ccSHpINd.s page 318 + ARM GAS /tmp/ccloipGv.s page 318 7921 01c2 EDE7 b .L507 @@ -19078,7 +19078,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 7972 .cfi_offset 5, -12 7973 .cfi_offset 6, -8 7974 .cfi_offset 14, -4 - ARM GAS /tmp/ccSHpINd.s page 319 + ARM GAS /tmp/ccloipGv.s page 319 7975 0002 82B0 sub sp, sp, #8 @@ -19138,7 +19138,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8012 .loc 1 3716 21 is_stmt 0 view .LVU2795 8013 002e 0020 movs r0, #0 8014 0030 6064 str r0, [r4, #68] - ARM GAS /tmp/ccSHpINd.s page 320 + ARM GAS /tmp/ccloipGv.s page 320 3719:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount = Size; @@ -19198,7 +19198,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8050 .loc 1 3739 8 view .LVU2814 8051 004e 122B cmp r3, #18 8052 0050 04D1 bne .L522 - ARM GAS /tmp/ccSHpINd.s page 321 + ARM GAS /tmp/ccloipGv.s page 321 3739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) @@ -19258,7 +19258,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 8094 .loc 1 3760 5 is_stmt 1 view .LVU2828 3765:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 322 + ARM GAS /tmp/ccloipGv.s page 322 8095 .loc 1 3765 5 view .LVU2829 @@ -19318,7 +19318,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 8138 .loc 1 3771 12 view .LVU2841 8139 00a2 0220 movs r0, #2 - ARM GAS /tmp/ccSHpINd.s page 323 + ARM GAS /tmp/ccloipGv.s page 323 8140 00a4 F3E7 b .L519 @@ -19378,7 +19378,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8188 .loc 1 3797 3 view .LVU2849 3797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 8189 .loc 1 3797 11 is_stmt 0 view .LVU2850 - ARM GAS /tmp/ccSHpINd.s page 324 + ARM GAS /tmp/ccloipGv.s page 324 8190 000c 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 @@ -19438,7 +19438,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; 8227 .loc 1 3809 5 is_stmt 1 view .LVU2868 3809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; - ARM GAS /tmp/ccSHpINd.s page 325 + ARM GAS /tmp/ccloipGv.s page 325 8228 .loc 1 3809 23 is_stmt 0 view .LVU2869 @@ -19498,7 +19498,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8267 0066 FFF7FEFF bl I2C_ConvertOtherXferOptions 8268 .LVL573: 3838:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 326 + ARM GAS /tmp/ccloipGv.s page 326 8269 .loc 1 3838 7 view .LVU2885 @@ -19558,7 +19558,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; 8306 .loc 1 3855 13 is_stmt 0 view .LVU2903 8307 008c E26B ldr r2, [r4, #60] - ARM GAS /tmp/ccSHpINd.s page 327 + ARM GAS /tmp/ccloipGv.s page 327 3855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; @@ -19618,7 +19618,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8344 .loc 1 3907 9 view .LVU2921 8345 00ba 84F84020 strb r2, [r4, #64] 3907:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 328 + ARM GAS /tmp/ccloipGv.s page 328 8346 .loc 1 3907 9 view .LVU2922 @@ -19678,7 +19678,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8384 .loc 1 3869 9 is_stmt 1 view .LVU2938 3869:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 8385 .loc 1 3869 13 is_stmt 0 view .LVU2939 - ARM GAS /tmp/ccSHpINd.s page 329 + ARM GAS /tmp/ccloipGv.s page 329 8386 00e2 636C ldr r3, [r4, #68] @@ -19738,7 +19738,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3892:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 8425 .loc 1 3892 9 view .LVU2955 8426 0116 1021 movs r1, #16 - ARM GAS /tmp/ccSHpINd.s page 330 + ARM GAS /tmp/ccloipGv.s page 330 8427 0118 2046 mov r0, r4 @@ -19798,7 +19798,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8468 0150 00E0 b .L532 8469 .LVL588: 8470 .L542: - ARM GAS /tmp/ccSHpINd.s page 331 + ARM GAS /tmp/ccloipGv.s page 331 3939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -19858,7 +19858,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8522 .cfi_offset 7, -8 8523 .cfi_offset 14, -4 8524 0002 0446 mov r4, r0 - ARM GAS /tmp/ccSHpINd.s page 332 + ARM GAS /tmp/ccloipGv.s page 332 3957:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -19918,7 +19918,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 3974:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 8564 .loc 1 3974 5 view .LVU2989 8565 0032 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 - ARM GAS /tmp/ccSHpINd.s page 333 + ARM GAS /tmp/ccloipGv.s page 333 8566 0036 012B cmp r3, #1 @@ -19978,7 +19978,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; 8603 .loc 1 4013 5 is_stmt 1 view .LVU3007 4013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; - ARM GAS /tmp/ccSHpINd.s page 334 + ARM GAS /tmp/ccloipGv.s page 334 8604 .loc 1 4013 23 is_stmt 0 view .LVU3008 @@ -20038,7 +20038,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8641 .LVL599: 4027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 8642 .loc 1 4027 5 is_stmt 0 view .LVU3026 - ARM GAS /tmp/ccSHpINd.s page 335 + ARM GAS /tmp/ccloipGv.s page 335 8643 008a 84F84050 strb r5, [r4, #64] @@ -20098,7 +20098,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8681 .loc 1 3992 11 is_stmt 1 view .LVU3042 3992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 8682 .loc 1 3992 43 is_stmt 0 view .LVU3043 - ARM GAS /tmp/ccSHpINd.s page 336 + ARM GAS /tmp/ccloipGv.s page 336 8683 00bc 084A ldr r2, .L560+4 @@ -20158,7 +20158,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8728 .thumb_func 8730 HAL_I2C_Slave_Seq_Transmit_DMA: 8731 .LVL608: - ARM GAS /tmp/ccSHpINd.s page 337 + ARM GAS /tmp/ccloipGv.s page 337 8732 .LFB169: @@ -20218,7 +20218,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8773 0024 012B cmp r3, #1 8774 0026 00F0B780 beq .L573 4072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 338 + ARM GAS /tmp/ccloipGv.s page 338 8775 .loc 1 4072 5 is_stmt 1 discriminator 2 view .LVU3067 @@ -20278,7 +20278,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8813 005c 6364 str r3, [r4, #68] 4136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 8814 .loc 1 4136 5 is_stmt 1 view .LVU3084 - ARM GAS /tmp/ccSHpINd.s page 339 + ARM GAS /tmp/ccloipGv.s page 339 4136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -20338,7 +20338,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 8850 .loc 1 4151 7 is_stmt 1 view .LVU3104 4151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 340 + ARM GAS /tmp/ccloipGv.s page 340 8851 .loc 1 4151 11 is_stmt 0 view .LVU3105 @@ -20398,7 +20398,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 8889 .loc 1 4188 23 is_stmt 0 view .LVU3122 8890 00aa 0022 movs r2, #0 - ARM GAS /tmp/ccSHpINd.s page 341 + ARM GAS /tmp/ccloipGv.s page 341 8891 00ac 84F84220 strb r2, [r4, #66] @@ -20458,7 +20458,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8928 .loc 1 4084 16 is_stmt 0 view .LVU3139 8929 00d2 2368 ldr r3, [r4] 4084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 342 + ARM GAS /tmp/ccloipGv.s page 342 8930 .loc 1 4084 26 view .LVU3140 @@ -20518,7 +20518,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 8967 00fe 9847 blx r3 8968 .LVL621: 8969 0100 A5E7 b .L566 - ARM GAS /tmp/ccSHpINd.s page 343 + ARM GAS /tmp/ccloipGv.s page 343 8970 .L578: @@ -20578,7 +20578,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9006 .loc 1 4121 25 view .LVU3175 9007 012a 036D ldr r3, [r0, #80] 4121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 344 + ARM GAS /tmp/ccloipGv.s page 344 9008 .loc 1 4121 13 view .LVU3176 @@ -20638,7 +20638,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9045 .loc 1 4179 23 view .LVU3193 9046 0152 9B1A subs r3, r3, r2 9047 0154 9BB2 uxth r3, r3 - ARM GAS /tmp/ccSHpINd.s page 345 + ARM GAS /tmp/ccloipGv.s page 345 9048 0156 6385 strh r3, [r4, #42] @ movhi @@ -20698,7 +20698,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9086 .LVL629: 4219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 9087 .loc 1 4219 5 is_stmt 1 view .LVU3210 - ARM GAS /tmp/ccSHpINd.s page 346 + ARM GAS /tmp/ccloipGv.s page 346 4219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -20758,7 +20758,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9136 .LFB170: 4239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ 9137 .loc 1 4239 1 is_stmt 1 view -0 - ARM GAS /tmp/ccSHpINd.s page 347 + ARM GAS /tmp/ccloipGv.s page 347 9138 .cfi_startproc @@ -20818,7 +20818,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9179 0024 0120 movs r0, #1 9180 0026 55E0 b .L582 9181 .LVL639: - ARM GAS /tmp/ccSHpINd.s page 348 + ARM GAS /tmp/ccloipGv.s page 348 9182 .L583: @@ -20878,7 +20878,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 9220 .loc 1 4293 9 is_stmt 0 view .LVU3249 9221 005a 2268 ldr r2, [r4] - ARM GAS /tmp/ccSHpINd.s page 349 + ARM GAS /tmp/ccloipGv.s page 349 4293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -20938,7 +20938,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9257 .loc 1 4303 55 discriminator 1 view .LVU3268 9258 0082 0BB1 cbz r3, .L585 4307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 350 + ARM GAS /tmp/ccloipGv.s page 350 9259 .loc 1 4307 7 is_stmt 1 view .LVU3269 @@ -20998,7 +20998,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9298 00ae 1A68 ldr r2, [r3] 4269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 9299 .loc 1 4269 29 view .LVU3285 - ARM GAS /tmp/ccSHpINd.s page 351 + ARM GAS /tmp/ccloipGv.s page 351 9300 00b0 22F48042 bic r2, r2, #16384 @@ -21058,7 +21058,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9339 .loc 1 4258 5 discriminator 1 view .LVU3300 9340 00d6 0220 movs r0, #2 9341 00d8 FCE7 b .L582 - ARM GAS /tmp/ccSHpINd.s page 352 + ARM GAS /tmp/ccloipGv.s page 352 9342 .L591: @@ -21118,7 +21118,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9389 .loc 1 4349 5 is_stmt 1 view .LVU3309 4349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 9390 .loc 1 4349 8 is_stmt 0 view .LVU3310 - ARM GAS /tmp/ccSHpINd.s page 353 + ARM GAS /tmp/ccloipGv.s page 353 9391 0018 002A cmp r2, #0 @@ -21178,7 +21178,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9430 004a 292B cmp r3, #41 9431 004c 3DD0 beq .L606 4388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 354 + ARM GAS /tmp/ccloipGv.s page 354 9432 .loc 1 4388 10 is_stmt 1 view .LVU3326 @@ -21238,7 +21238,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; 9468 .loc 1 4425 29 is_stmt 0 view .LVU3345 9469 0076 638D ldrh r3, [r4, #42] - ARM GAS /tmp/ccSHpINd.s page 355 + ARM GAS /tmp/ccloipGv.s page 355 4425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; @@ -21298,7 +21298,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9505 0098 1365 str r3, [r2, #80] 4442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); 9506 .loc 1 4442 7 is_stmt 1 view .LVU3365 - ARM GAS /tmp/ccSHpINd.s page 356 + ARM GAS /tmp/ccloipGv.s page 356 4442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize); @@ -21358,7 +21358,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9544 00c8 64E0 b .L593 9545 .LVL662: 9546 .L606: - ARM GAS /tmp/ccSHpINd.s page 357 + ARM GAS /tmp/ccloipGv.s page 357 4366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -21418,7 +21418,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9584 00f6 0028 cmp r0, #0 9585 00f8 AED0 beq .L596 4383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 358 + ARM GAS /tmp/ccloipGv.s page 358 9586 .loc 1 4383 13 is_stmt 1 view .LVU3400 @@ -21478,7 +21478,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9623 0120 FFF7FEFF bl HAL_DMA_Abort_IT 9624 .LVL666: 4402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 359 + ARM GAS /tmp/ccloipGv.s page 359 9625 .loc 1 4402 14 discriminator 1 view .LVU3418 @@ -21538,7 +21538,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9662 .LVL669: 9663 .L598: 4463:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 360 + ARM GAS /tmp/ccloipGv.s page 360 9664 .loc 1 4463 7 is_stmt 1 view .LVU3436 @@ -21598,7 +21598,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 9702 .loc 1 4495 25 view .LVU3453 9703 0176 43F40043 orr r3, r3, #32768 - ARM GAS /tmp/ccSHpINd.s page 361 + ARM GAS /tmp/ccloipGv.s page 361 9704 017a 1360 str r3, [r2] @@ -21658,7 +21658,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9747 01a4 00000000 .word I2C_DMAError 9748 01a8 00000000 .word I2C_DMAAbort 9749 .cfi_endproc - ARM GAS /tmp/ccSHpINd.s page 362 + ARM GAS /tmp/ccloipGv.s page 362 9750 .LFE171: @@ -21718,7 +21718,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 9795 .loc 1 4525 5 is_stmt 1 view .LVU3476 9796 001a 4FF40041 mov r1, #32768 - ARM GAS /tmp/ccSHpINd.s page 363 + ARM GAS /tmp/ccloipGv.s page 363 9797 001e FFF7FEFF bl I2C_Enable_IRQ @@ -21778,7 +21778,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9843 .cfi_offset 4, -8 9844 .cfi_offset 14, -4 4549:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); - ARM GAS /tmp/ccSHpINd.s page 364 + ARM GAS /tmp/ccloipGv.s page 364 9845 .loc 1 4549 5 is_stmt 1 view .LVU3487 @@ -21838,7 +21838,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9884 .global HAL_I2C_Master_Abort_IT 9885 .syntax unified 9886 .thumb - ARM GAS /tmp/ccSHpINd.s page 365 + ARM GAS /tmp/ccloipGv.s page 365 9887 .thumb_func @@ -21898,7 +21898,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9930 .loc 1 4584 5 view .LVU3515 4584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 9931 .loc 1 4584 13 is_stmt 0 view .LVU3516 - ARM GAS /tmp/ccSHpINd.s page 366 + ARM GAS /tmp/ccloipGv.s page 366 9932 0024 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 @@ -21958,7 +21958,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 9972 .loc 1 4614 5 view .LVU3530 4614:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 9973 .loc 1 4614 12 is_stmt 0 view .LVU3531 - ARM GAS /tmp/ccSHpINd.s page 367 + ARM GAS /tmp/ccloipGv.s page 367 9974 005e 2846 mov r0, r5 @@ -22018,7 +22018,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10018 .loc 1 4620 12 view .LVU3541 10019 007c 0120 movs r0, #1 10020 .LVL704: - ARM GAS /tmp/ccSHpINd.s page 368 + ARM GAS /tmp/ccloipGv.s page 368 4622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -22078,7 +22078,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10068 .loc 1 4642 3 is_stmt 1 view .LVU3550 4642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 10069 .loc 1 4642 12 is_stmt 0 view .LVU3551 - ARM GAS /tmp/ccSHpINd.s page 369 + ARM GAS /tmp/ccloipGv.s page 369 10070 0006 1A68 ldr r2, [r3] @@ -22138,7 +22138,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10119 @ args = 0, pretend = 0, frame = 0 10120 @ frame_needed = 0, uses_anonymous_args = 0 10121 @ link register save eliminated. - ARM GAS /tmp/ccSHpINd.s page 370 + ARM GAS /tmp/ccloipGv.s page 370 4728:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -22198,7 +22198,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = NULL; 10166 .loc 1 6082 25 is_stmt 0 view .LVU3573 10167 001a 1223 movs r3, #18 - ARM GAS /tmp/ccSHpINd.s page 371 + ARM GAS /tmp/ccloipGv.s page 371 10168 001c 0363 str r3, [r0, #48] @@ -22258,7 +22258,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10206 .loc 1 6069 5 view .LVU3589 6069:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 10207 .loc 1 6069 5 view .LVU3590 - ARM GAS /tmp/ccSHpINd.s page 372 + ARM GAS /tmp/ccloipGv.s page 372 10208 0048 84F84050 strb r5, [r4, #64] @@ -22318,7 +22318,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10258 .LFE180: 10260 .section .text.I2C_ITSlaveSeqCplt,"ax",%progbits 10261 .align 1 - ARM GAS /tmp/ccSHpINd.s page 373 + ARM GAS /tmp/ccloipGv.s page 373 10262 .syntax unified @@ -22378,7 +22378,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10303 .loc 1 6128 3 view .LVU3612 6128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 10304 .loc 1 6128 11 is_stmt 0 view .LVU3613 - ARM GAS /tmp/ccSHpINd.s page 374 + ARM GAS /tmp/ccloipGv.s page 374 10305 001c 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 @@ -22438,7 +22438,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10344 .loc 1 6135 5 is_stmt 1 view .LVU3628 10345 004c 0121 movs r1, #1 10346 004e 2046 mov r0, r4 - ARM GAS /tmp/ccSHpINd.s page 375 + ARM GAS /tmp/ccloipGv.s page 375 10347 .LVL727: @@ -22498,7 +22498,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10386 .LVL733: 6170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 10387 .loc 1 6170 3 view .LVU3644 - ARM GAS /tmp/ccSHpINd.s page 376 + ARM GAS /tmp/ccloipGv.s page 376 6171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -22558,7 +22558,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6839:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 10433 .loc 1 6839 9 is_stmt 0 view .LVU3656 10434 0012 0268 ldr r2, [r0] - ARM GAS /tmp/ccSHpINd.s page 377 + ARM GAS /tmp/ccloipGv.s page 377 6839:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -22618,7 +22618,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10478 .loc 1 6924 8 is_stmt 0 view .LVU3669 10479 0006 C36B ldr r3, [r0, #60] 10480 0008 1B68 ldr r3, [r3] - ARM GAS /tmp/ccSHpINd.s page 378 + ARM GAS /tmp/ccloipGv.s page 378 10481 000a 5B68 ldr r3, [r3, #4] @@ -22678,7 +22678,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4777:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** UNUSED(TransferDirection); 10526 .loc 1 4777 3 view .LVU3681 4778:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** UNUSED(AddrMatchCode); - ARM GAS /tmp/ccSHpINd.s page 379 + ARM GAS /tmp/ccloipGv.s page 379 10527 .loc 1 4778 3 view .LVU3682 @@ -22738,7 +22738,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10570 .loc 1 6040 5 is_stmt 1 view .LVU3695 10571 0010 0368 ldr r3, [r0] 10572 0012 0822 movs r2, #8 - ARM GAS /tmp/ccSHpINd.s page 380 + ARM GAS /tmp/ccloipGv.s page 380 10573 0014 DA61 str r2, [r3, #28] @@ -22798,7 +22798,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5976:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 10611 .loc 1 5976 5 is_stmt 1 view .LVU3712 5976:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 381 + ARM GAS /tmp/ccloipGv.s page 381 10612 .loc 1 5976 19 is_stmt 0 view .LVU3713 @@ -22858,7 +22858,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10649 .loc 1 5991 11 view .LVU3730 10650 005e 84F84010 strb r1, [r4, #64] 5991:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 382 + ARM GAS /tmp/ccloipGv.s page 382 10651 .loc 1 5991 11 view .LVU3731 @@ -22918,7 +22918,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10692 0098 2046 mov r0, r4 10693 009a FFF7FEFF bl HAL_I2C_AddrCallback 10694 .LVL766: - ARM GAS /tmp/ccSHpINd.s page 383 + ARM GAS /tmp/ccloipGv.s page 383 10695 009e BDE7 b .L668 @@ -22978,7 +22978,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; 10745 .loc 1 6542 23 is_stmt 0 view .LVU3753 10746 0008 0023 movs r3, #0 - ARM GAS /tmp/ccSHpINd.s page 384 + ARM GAS /tmp/ccloipGv.s page 384 10747 000a 0363 str r3, [r0, #48] @@ -23038,7 +23038,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount--; 10782 .loc 1 6558 7 is_stmt 1 view .LVU3773 6558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount--; - ARM GAS /tmp/ccSHpINd.s page 385 + ARM GAS /tmp/ccloipGv.s page 385 10783 .loc 1 6558 21 is_stmt 0 view .LVU3774 @@ -23098,7 +23098,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6581:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 10823 .loc 1 6581 1 is_stmt 0 view .LVU3789 10824 0062 10BD pop {r4, pc} - ARM GAS /tmp/ccSHpINd.s page 386 + ARM GAS /tmp/ccloipGv.s page 386 10825 .LVL773: @@ -23158,7 +23158,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10877 .align 1 10878 .weak HAL_I2C_ErrorCallback 10879 .syntax unified - ARM GAS /tmp/ccSHpINd.s page 387 + ARM GAS /tmp/ccloipGv.s page 387 10880 .thumb @@ -23218,7 +23218,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10931 .loc 1 6721 1 is_stmt 0 view .LVU3804 10932 0000 08B5 push {r3, lr} 10933 .LCFI121: - ARM GAS /tmp/ccSHpINd.s page 388 + ARM GAS /tmp/ccloipGv.s page 388 10934 .cfi_def_cfa_offset 8 @@ -23278,7 +23278,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 10971 .loc 1 6728 5 view .LVU3821 6734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 10972 .loc 1 6734 5 view .LVU3822 - ARM GAS /tmp/ccSHpINd.s page 389 + ARM GAS /tmp/ccloipGv.s page 389 10973 0028 FFF7FEFF bl HAL_I2C_AbortCpltCallback @@ -23338,7 +23338,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11016 .loc 1 6598 23 is_stmt 0 view .LVU3835 11017 0012 6285 strh r2, [r4, #42] @ movhi 6601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 390 + ARM GAS /tmp/ccloipGv.s page 390 11018 .loc 1 6601 3 is_stmt 1 view .LVU3836 @@ -23398,7 +23398,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11056 0036 A26B ldr r2, [r4, #56] 6650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX))) 11057 .loc 1 6650 6 view .LVU3853 - ARM GAS /tmp/ccSHpINd.s page 391 + ARM GAS /tmp/ccloipGv.s page 391 11058 0038 002A cmp r2, #0 @@ -23458,7 +23458,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11096 .loc 1 6665 7 view .LVU3869 11097 0066 0023 movs r3, #0 11098 0068 84F84030 strb r3, [r4, #64] - ARM GAS /tmp/ccSHpINd.s page 392 + ARM GAS /tmp/ccloipGv.s page 392 6665:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -23518,7 +23518,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 11138 .loc 1 6628 27 is_stmt 0 view .LVU3885 11139 0098 2023 movs r3, #32 - ARM GAS /tmp/ccSHpINd.s page 393 + ARM GAS /tmp/ccloipGv.s page 393 11140 009a 84F84130 strb r3, [r4, #65] @@ -23578,7 +23578,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11180 00ce 28E0 b .L690 11181 .LVL800: 11182 .L695: - ARM GAS /tmp/ccSHpINd.s page 394 + ARM GAS /tmp/ccloipGv.s page 394 6680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX))) @@ -23638,7 +23638,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11220 .loc 1 6692 39 view .LVU3916 11221 00fa 0C4A ldr r2, .L703+8 11222 00fc 1A65 str r2, [r3, #80] - ARM GAS /tmp/ccSHpINd.s page 395 + ARM GAS /tmp/ccloipGv.s page 395 6695:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -23698,7 +23698,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11263 .L703: 11264 0124 0000FFFF .word -65536 11265 0128 00000000 .word I2C_Slave_ISR_IT - ARM GAS /tmp/ccSHpINd.s page 396 + ARM GAS /tmp/ccloipGv.s page 396 11266 012c 00000000 .word I2C_DMAAbort @@ -23758,7 +23758,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11311 0010 2021 movs r1, #32 11312 .LVL813: 6330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 397 + ARM GAS /tmp/ccloipGv.s page 397 11313 .loc 1 6330 3 is_stmt 0 view .LVU3942 @@ -23818,7 +23818,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11356 0042 23F0FF73 bic r3, r3, #33423360 11357 0046 23F48B33 bic r3, r3, #71168 11358 004a 23F4FF73 bic r3, r3, #510 - ARM GAS /tmp/ccSHpINd.s page 398 + ARM GAS /tmp/ccloipGv.s page 398 11359 004e 23F00103 bic r3, r3, #1 @@ -23878,7 +23878,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 11396 .loc 1 6392 5 is_stmt 1 view .LVU3971 6392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 399 + ARM GAS /tmp/ccloipGv.s page 399 11397 .loc 1 6392 16 is_stmt 0 view .LVU3972 @@ -23938,7 +23938,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 11434 .loc 1 6408 11 is_stmt 0 view .LVU3990 11435 00a0 638D ldrh r3, [r4, #42] - ARM GAS /tmp/ccSHpINd.s page 400 + ARM GAS /tmp/ccloipGv.s page 400 11436 00a2 9BB2 uxth r3, r3 @@ -23998,7 +23998,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11474 00d4 43D0 beq .L726 11475 .L718: 6445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 401 + ARM GAS /tmp/ccloipGv.s page 401 11476 .loc 1 6445 9 is_stmt 1 view .LVU4007 @@ -24058,7 +24058,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11513 0102 0023 movs r3, #0 11514 0104 2363 str r3, [r4, #48] 6521:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 402 + ARM GAS /tmp/ccloipGv.s page 402 11515 .loc 1 6521 5 is_stmt 1 view .LVU4025 @@ -24118,7 +24118,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6376:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 11555 .loc 1 6376 19 view .LVU4040 11556 0136 1368 ldr r3, [r2] - ARM GAS /tmp/ccSHpINd.s page 403 + ARM GAS /tmp/ccloipGv.s page 403 6376:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -24178,7 +24178,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 11598 .loc 1 6440 9 view .LVU4054 11599 0170 2046 mov r0, r4 - ARM GAS /tmp/ccSHpINd.s page 404 + ARM GAS /tmp/ccloipGv.s page 404 11600 0172 FFF7FEFF bl I2C_ITSlaveSeqCplt @@ -24238,7 +24238,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 11640 .loc 1 6474 8 view .LVU4069 11641 01a8 282B cmp r3, #40 - ARM GAS /tmp/ccSHpINd.s page 405 + ARM GAS /tmp/ccloipGv.s page 405 11642 01aa 13D1 bne .L705 @@ -24298,7 +24298,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11681 01d6 2023 movs r3, #32 11682 01d8 84F84130 strb r3, [r4, #65] 6503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 406 + ARM GAS /tmp/ccloipGv.s page 406 11683 .loc 1 6503 5 is_stmt 1 view .LVU4085 @@ -24358,7 +24358,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11728 .loc 1 5264 3 view .LVU4096 5264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 11729 .loc 1 5264 3 view .LVU4097 - ARM GAS /tmp/ccSHpINd.s page 407 + ARM GAS /tmp/ccloipGv.s page 407 11730 0006 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 @@ -24418,7 +24418,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11768 003e 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2 11769 0042 DBB2 uxtb r3, r3 5289:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 408 + ARM GAS /tmp/ccloipGv.s page 408 11770 .loc 1 5289 15 view .LVU4114 @@ -24478,7 +24478,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 11811 .loc 1 5287 9 view .LVU4128 11812 006a F4E7 b .L735 - ARM GAS /tmp/ccSHpINd.s page 409 + ARM GAS /tmp/ccloipGv.s page 409 11813 .LVL843: @@ -24538,7 +24538,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11854 009c DBD1 bne .L735 5319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 11855 .loc 1 5319 9 is_stmt 1 view .LVU4142 - ARM GAS /tmp/ccSHpINd.s page 410 + ARM GAS /tmp/ccloipGv.s page 410 5319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -24598,7 +24598,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 11894 .loc 1 5332 21 view .LVU4159 11895 00c4 0133 adds r3, r3, #1 - ARM GAS /tmp/ccSHpINd.s page 411 + ARM GAS /tmp/ccloipGv.s page 411 11896 00c6 6362 str r3, [r4, #36] @@ -24658,7 +24658,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11935 00f2 02D0 beq .L742 5345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) 11936 .loc 1 5345 65 discriminator 1 view .LVU4175 - ARM GAS /tmp/ccSHpINd.s page 412 + ARM GAS /tmp/ccloipGv.s page 412 11937 00f4 12F0080F tst r2, #8 @@ -24718,7 +24718,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 11974 011e 013B subs r3, r3, #1 11975 0120 9BB2 uxth r3, r3 11976 0122 6385 strh r3, [r4, #42] @ movhi - ARM GAS /tmp/ccSHpINd.s page 413 + ARM GAS /tmp/ccloipGv.s page 413 5366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -24778,7 +24778,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12018 .LFE192: 12020 .section .text.I2C_ITMasterCplt,"ax",%progbits 12021 .align 1 - ARM GAS /tmp/ccSHpINd.s page 414 + ARM GAS /tmp/ccloipGv.s page 414 12022 .syntax unified @@ -24838,7 +24838,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12065 001e 222B cmp r3, #34 12066 0020 34D0 beq .L763 12067 .LVL869: - ARM GAS /tmp/ccSHpINd.s page 415 + ARM GAS /tmp/ccloipGv.s page 415 12068 .L752: @@ -24898,7 +24898,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12107 005e 1BD0 beq .L764 12108 .L754: 6229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 416 + ARM GAS /tmp/ccloipGv.s page 416 12109 .loc 1 6229 3 is_stmt 1 view .LVU4233 @@ -24958,7 +24958,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12151 .LVL875: 6192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 12152 .loc 1 6192 5 is_stmt 1 view .LVU4246 - ARM GAS /tmp/ccSHpINd.s page 417 + ARM GAS /tmp/ccloipGv.s page 417 6192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -25018,7 +25018,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12193 00b2 17D0 beq .L765 6276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 12194 .loc 1 6276 8 is_stmt 1 view .LVU4261 - ARM GAS /tmp/ccSHpINd.s page 418 + ARM GAS /tmp/ccloipGv.s page 418 6276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -25078,7 +25078,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12232 .L765: 6243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; 12233 .loc 1 6243 5 is_stmt 1 view .LVU4279 - ARM GAS /tmp/ccSHpINd.s page 419 + ARM GAS /tmp/ccloipGv.s page 419 6243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; @@ -25138,7 +25138,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6251:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 12271 .loc 1 6251 7 view .LVU4297 6257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ - ARM GAS /tmp/ccSHpINd.s page 420 + ARM GAS /tmp/ccloipGv.s page 420 12272 .loc 1 6257 7 view .LVU4298 @@ -25198,7 +25198,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12315 0004 012B cmp r3, #1 12316 0006 00F0CF80 beq .L784 4941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint16_t devaddress; - ARM GAS /tmp/ccSHpINd.s page 421 + ARM GAS /tmp/ccloipGv.s page 421 12317 .loc 1 4941 1 is_stmt 0 view .LVU4312 @@ -25258,7 +25258,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12358 0038 5A6A ldr r2, [r3, #36] 12359 .LVL889: 4969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 422 + ARM GAS /tmp/ccloipGv.s page 422 12360 .loc 1 4969 10 view .LVU4326 @@ -25318,7 +25318,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12398 0064 84F84000 strb r0, [r4, #64] 5085:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 12399 .loc 1 5085 3 view .LVU4343 - ARM GAS /tmp/ccSHpINd.s page 423 + ARM GAS /tmp/ccloipGv.s page 423 5087:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } @@ -25378,7 +25378,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12441 0094 13D0 beq .L773 4982:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 12442 .loc 1 4982 5 is_stmt 1 view .LVU4357 - ARM GAS /tmp/ccSHpINd.s page 424 + ARM GAS /tmp/ccloipGv.s page 424 4982:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -25438,7 +25438,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12481 .L773: 4994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) 12482 .loc 1 4994 8 is_stmt 1 view .LVU4374 - ARM GAS /tmp/ccSHpINd.s page 425 + ARM GAS /tmp/ccloipGv.s page 425 4994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) @@ -25498,7 +25498,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5004:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 12521 .loc 1 5004 12 view .LVU4391 12522 00ea 13F4803F tst r3, #65536 - ARM GAS /tmp/ccSHpINd.s page 426 + ARM GAS /tmp/ccloipGv.s page 426 12523 00ee 0BD0 beq .L777 @@ -25558,7 +25558,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12562 .loc 1 5020 34 is_stmt 0 view .LVU4406 12563 011c E36A ldr r3, [r4, #44] 5019:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP); - ARM GAS /tmp/ccSHpINd.s page 427 + ARM GAS /tmp/ccloipGv.s page 427 12564 .loc 1 5019 11 view .LVU4407 @@ -25618,7 +25618,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12607 .L780: 5041:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 12608 .loc 1 5041 9 is_stmt 1 view .LVU4419 - ARM GAS /tmp/ccSHpINd.s page 428 + ARM GAS /tmp/ccloipGv.s page 428 12609 0150 4021 movs r1, #64 @@ -25678,7 +25678,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 12648 .loc 1 5056 11 is_stmt 1 view .LVU4435 5056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 429 + ARM GAS /tmp/ccloipGv.s page 429 12649 .loc 1 5056 25 is_stmt 0 view .LVU4436 @@ -25738,7 +25738,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12693 .loc 1 4946 3 is_stmt 0 discriminator 1 view .LVU4446 12694 01a8 0220 movs r0, #2 12695 .LVL926: - ARM GAS /tmp/ccSHpINd.s page 430 + ARM GAS /tmp/ccloipGv.s page 430 5088:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -25798,7 +25798,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12741 .L793: 5570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) 12742 .loc 1 5570 8 is_stmt 1 view .LVU4458 - ARM GAS /tmp/ccSHpINd.s page 431 + ARM GAS /tmp/ccloipGv.s page 431 5570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) @@ -25858,7 +25858,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12782 0044 0368 ldr r3, [r0] 12783 0046 1022 movs r2, #16 12784 .LVL931: - ARM GAS /tmp/ccSHpINd.s page 432 + ARM GAS /tmp/ccloipGv.s page 432 5557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -25918,7 +25918,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12824 0078 11F0200F tst r1, #32 12825 007c DDD0 beq .L794 5684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) - ARM GAS /tmp/ccSHpINd.s page 433 + ARM GAS /tmp/ccloipGv.s page 433 12826 .loc 1 5684 63 discriminator 1 view .LVU4489 @@ -25978,7 +25978,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5594:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 12867 .loc 1 5594 9 is_stmt 1 view .LVU4503 5594:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 434 + ARM GAS /tmp/ccloipGv.s page 434 12868 .loc 1 5594 13 is_stmt 0 view .LVU4504 @@ -26038,7 +26038,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 12909 .loc 1 5622 9 is_stmt 1 view .LVU4518 5622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 435 + ARM GAS /tmp/ccloipGv.s page 435 12910 .loc 1 5622 13 is_stmt 0 view .LVU4519 @@ -26098,7 +26098,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 12950 .loc 1 5618 29 view .LVU4533 12951 0118 43F40043 orr r3, r3, #32768 12952 011c 1360 str r3, [r2] - ARM GAS /tmp/ccSHpINd.s page 436 + ARM GAS /tmp/ccloipGv.s page 436 12953 011e 8CE7 b .L794 @@ -26158,7 +26158,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 12995 .loc 1 5649 7 is_stmt 1 view .LVU4546 5649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 437 + ARM GAS /tmp/ccloipGv.s page 437 12996 .loc 1 5649 11 is_stmt 0 view .LVU4547 @@ -26218,7 +26218,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13036 0182 222B cmp r3, #34 13037 0184 17D0 beq .L820 5681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 438 + ARM GAS /tmp/ccloipGv.s page 438 13038 .loc 1 5681 7 is_stmt 1 view .LVU4562 @@ -26278,7 +26278,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5667:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction); 13079 .loc 1 5667 7 view .LVU4576 13080 01b4 DCE7 b .L808 - ARM GAS /tmp/ccSHpINd.s page 439 + ARM GAS /tmp/ccloipGv.s page 439 13081 .L820: @@ -26338,7 +26338,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13129 .cfi_offset 6, -8 13130 .cfi_offset 14, -4 13131 0002 0446 mov r4, r0 - ARM GAS /tmp/ccSHpINd.s page 440 + ARM GAS /tmp/ccloipGv.s page 440 5712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t treatdmanack = 0U; @@ -26398,7 +26398,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13169 003c 5ED0 beq .L829 13170 .L828: 5737:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 441 + ARM GAS /tmp/ccloipGv.s page 441 13171 .loc 1 5737 7 is_stmt 1 view .LVU4602 @@ -26458,7 +26458,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5751:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 13210 .loc 1 5751 9 is_stmt 1 view .LVU4618 5751:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 442 + ARM GAS /tmp/ccloipGv.s page 442 13211 .loc 1 5751 12 is_stmt 0 view .LVU4619 @@ -26518,7 +26518,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13249 .loc 1 5801 11 is_stmt 0 view .LVU4635 13250 008e 092B cmp r3, #9 13251 0090 2CD8 bhi .L836 - ARM GAS /tmp/ccSHpINd.s page 443 + ARM GAS /tmp/ccloipGv.s page 443 13252 0092 DFE803F0 tbb [pc, r3] @@ -26578,7 +26578,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5762:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for 13297 .loc 1 5762 51 discriminator 1 view .LVU4645 13298 00c0 B0F1007F cmp r0, #33554432 - ARM GAS /tmp/ccSHpINd.s page 444 + ARM GAS /tmp/ccloipGv.s page 444 13299 00c4 F3D1 bne .L834 @@ -26638,7 +26638,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 13340 .loc 1 5815 11 view .LVU4659 5815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 445 + ARM GAS /tmp/ccloipGv.s page 445 13341 .loc 1 5815 33 is_stmt 0 view .LVU4660 @@ -26698,7 +26698,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13382 .loc 1 5836 3 view .LVU4673 13383 0110 0020 movs r0, #0 13384 0112 84F84000 strb r0, [r4, #64] - ARM GAS /tmp/ccSHpINd.s page 446 + ARM GAS /tmp/ccloipGv.s page 446 5836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -26758,7 +26758,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13428 0004 012B cmp r3, #1 13429 0006 00F0A380 beq .L863 5399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint16_t devaddress; - ARM GAS /tmp/ccSHpINd.s page 447 + ARM GAS /tmp/ccloipGv.s page 447 13430 .loc 1 5399 1 is_stmt 0 view .LVU4687 @@ -26818,7 +26818,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13471 003c 002B cmp r3, #0 13472 003e 4FD0 beq .L854 5432:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 448 + ARM GAS /tmp/ccloipGv.s page 448 13473 .loc 1 5432 7 is_stmt 1 view .LVU4701 @@ -26878,7 +26878,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13511 .loc 1 5413 9 is_stmt 0 view .LVU4717 13512 0068 436C ldr r3, [r0, #68] 5413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 449 + ARM GAS /tmp/ccloipGv.s page 449 13513 .loc 1 5413 21 view .LVU4718 @@ -26938,7 +26938,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) 13554 .loc 1 5450 30 is_stmt 0 view .LVU4732 13555 0090 638D ldrh r3, [r4, #42] - ARM GAS /tmp/ccSHpINd.s page 450 + ARM GAS /tmp/ccloipGv.s page 450 5450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) @@ -26998,7 +26998,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 13595 .loc 1 5474 9 is_stmt 1 view .LVU4748 5474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 451 + ARM GAS /tmp/ccloipGv.s page 451 13596 .loc 1 5474 13 is_stmt 0 view .LVU4749 @@ -27058,7 +27058,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13637 .LVL1014: 13638 .L859: 5489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } - ARM GAS /tmp/ccSHpINd.s page 452 + ARM GAS /tmp/ccloipGv.s page 452 13639 .loc 1 5489 9 is_stmt 1 view .LVU4763 @@ -27118,7 +27118,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13678 .loc 1 5504 11 is_stmt 1 view .LVU4778 5504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 13679 .loc 1 5504 25 is_stmt 0 view .LVU4779 - ARM GAS /tmp/ccSHpINd.s page 453 + ARM GAS /tmp/ccloipGv.s page 453 13680 0120 5A68 ldr r2, [r3, #4] @@ -27178,7 +27178,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13721 .LVL1028: 5524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 13722 .loc 1 5524 5 view .LVU4793 - ARM GAS /tmp/ccSHpINd.s page 454 + ARM GAS /tmp/ccloipGv.s page 454 13723 014e 95E7 b .L852 @@ -27238,7 +27238,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13769 0006 7BB1 cbz r3, .L875 6955:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 13770 .loc 1 6955 5 is_stmt 1 view .LVU4804 - ARM GAS /tmp/ccSHpINd.s page 455 + ARM GAS /tmp/ccloipGv.s page 455 6955:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { @@ -27298,7 +27298,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13809 .loc 1 6949 12 view .LVU4820 13810 0028 0025 movs r5, #0 13811 002a F1E7 b .L872 - ARM GAS /tmp/ccSHpINd.s page 456 + ARM GAS /tmp/ccloipGv.s page 456 13812 .L876: @@ -27358,7 +27358,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13857 0002 846B ldr r4, [r0, #56] 13858 .LVL1041: 6785:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** - ARM GAS /tmp/ccSHpINd.s page 457 + ARM GAS /tmp/ccloipGv.s page 457 13859 .loc 1 6785 3 is_stmt 1 view .LVU4832 @@ -27418,7 +27418,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6810:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK) 13896 .loc 1 6810 9 view .LVU4850 13897 002a 238D ldrh r3, [r4, #40] - ARM GAS /tmp/ccSHpINd.s page 458 + ARM GAS /tmp/ccloipGv.s page 458 13898 002c 2832 adds r2, r2, #40 @@ -27478,7 +27478,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 13941 .cfi_endproc 13942 .LFE207: 13944 .section .text.I2C_DMAMasterReceiveCplt,"ax",%progbits - ARM GAS /tmp/ccSHpINd.s page 459 + ARM GAS /tmp/ccloipGv.s page 459 13945 .align 1 @@ -27538,7 +27538,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6877:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 13986 .loc 1 6877 20 view .LVU4876 13987 0018 1A44 add r2, r2, r3 - ARM GAS /tmp/ccSHpINd.s page 460 + ARM GAS /tmp/ccloipGv.s page 460 13988 001a 6262 str r2, [r4, #36] @@ -27598,7 +27598,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 6894:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** } 14028 .loc 1 6894 22 view .LVU4891 14029 0046 2385 strh r3, [r4, #40] @ movhi - ARM GAS /tmp/ccSHpINd.s page 461 + ARM GAS /tmp/ccloipGv.s page 461 14030 .L893: @@ -27658,7 +27658,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14076 @ frame_needed = 0, uses_anonymous_args = 0 5101:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; 14077 .loc 1 5101 3 view .LVU4902 - ARM GAS /tmp/ccSHpINd.s page 462 + ARM GAS /tmp/ccloipGv.s page 462 5102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -27718,7 +27718,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14118 .loc 1 5125 16 is_stmt 0 view .LVU4916 14119 0032 25F00405 bic r5, r5, #4 14120 .LVL1062: - ARM GAS /tmp/ccSHpINd.s page 463 + ARM GAS /tmp/ccloipGv.s page 463 5128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -27778,7 +27778,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5236:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) 14158 .loc 1 5236 61 discriminator 1 view .LVU4934 14159 005a 16F0200F tst r6, #32 - ARM GAS /tmp/ccSHpINd.s page 464 + ARM GAS /tmp/ccloipGv.s page 464 14160 005e 40F0A480 bne .L921 @@ -27838,7 +27838,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14200 0080 15F0020F tst r5, #2 14201 0084 1DD0 beq .L902 5136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) - ARM GAS /tmp/ccSHpINd.s page 465 + ARM GAS /tmp/ccloipGv.s page 465 14202 .loc 1 5136 65 discriminator 1 view .LVU4949 @@ -27898,7 +27898,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14239 .loc 1 5145 21 view .LVU4966 14240 00ac 0133 adds r3, r3, #1 14241 00ae 6362 str r3, [r4, #36] - ARM GAS /tmp/ccSHpINd.s page 466 + ARM GAS /tmp/ccloipGv.s page 466 5147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount--; @@ -27958,7 +27958,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 5164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { 14280 .loc 1 5164 10 view .LVU4983 14281 00dc FF2B cmp r3, #255 - ARM GAS /tmp/ccSHpINd.s page 467 + ARM GAS /tmp/ccloipGv.s page 467 14282 00de 15D9 bls .L906 @@ -28018,7 +28018,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14322 .loc 1 5180 30 is_stmt 0 view .LVU4997 14323 010c 628D ldrh r2, [r4, #42] 14324 .LVL1078: - ARM GAS /tmp/ccSHpINd.s page 468 + ARM GAS /tmp/ccloipGv.s page 468 5180:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize, @@ -28078,7 +28078,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14366 013c 8AD0 beq .L900 5196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 14367 .loc 1 5196 5 is_stmt 1 view .LVU5011 - ARM GAS /tmp/ccSHpINd.s page 469 + ARM GAS /tmp/ccloipGv.s page 469 14368 013e 0121 movs r1, #1 @@ -28138,7 +28138,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14407 .loc 1 5211 24 is_stmt 0 view .LVU5026 14408 016c 0123 movs r3, #1 14409 016e 2385 strh r3, [r4, #40] @ movhi - ARM GAS /tmp/ccSHpINd.s page 470 + ARM GAS /tmp/ccloipGv.s page 470 14410 .L912: @@ -28198,7 +28198,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14450 019a 4FF00073 mov r3, #33554432 14451 019e D2B2 uxtb r2, r2 14452 01a0 89B2 uxth r1, r1 - ARM GAS /tmp/ccSHpINd.s page 471 + ARM GAS /tmp/ccloipGv.s page 471 14453 01a2 2046 mov r0, r4 @@ -28258,7 +28258,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 4658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); 14503 .loc 1 4658 1 is_stmt 0 view .LVU5047 14504 0000 10B5 push {r4, lr} - ARM GAS /tmp/ccSHpINd.s page 472 + ARM GAS /tmp/ccloipGv.s page 472 14505 .LCFI153: @@ -28318,7 +28318,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14543 002c 07D0 beq .L927 4677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** 14544 .loc 1 4677 5 is_stmt 1 view .LVU5064 - ARM GAS /tmp/ccSHpINd.s page 473 + ARM GAS /tmp/ccloipGv.s page 473 4677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** @@ -28378,7 +28378,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14584 .loc 1 4701 1 view .LVU5079 14585 0062 10BD pop {r4, pc} 14586 .LVL1108: - ARM GAS /tmp/ccSHpINd.s page 474 + ARM GAS /tmp/ccloipGv.s page 474 14587 .L931: @@ -28438,7 +28438,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14630 .loc 1 6997 11 is_stmt 0 view .LVU5092 14631 000c C36B ldr r3, [r0, #60] 6997:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** { - ARM GAS /tmp/ccSHpINd.s page 475 + ARM GAS /tmp/ccloipGv.s page 475 14632 .loc 1 6997 6 view .LVU5093 @@ -28498,7 +28498,7 @@ ARM GAS /tmp/ccSHpINd.s page 1 14681 .loc 1 4904 1 is_stmt 1 view -0 14682 .cfi_startproc 14683 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccSHpINd.s page 476 + ARM GAS /tmp/ccloipGv.s page 476 14684 @ frame_needed = 0, uses_anonymous_args = 0 @@ -28549,221 +28549,221 @@ ARM GAS /tmp/ccSHpINd.s page 1 14725 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" 14726 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h" 14727 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/ccSHpINd.s page 477 + ARM GAS /tmp/ccloipGv.s page 477 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_i2c.c - /tmp/ccSHpINd.s:20 .text.I2C_Flush_TXDR:00000000 $t - /tmp/ccSHpINd.s:25 .text.I2C_Flush_TXDR:00000000 I2C_Flush_TXDR - /tmp/ccSHpINd.s:63 .text.I2C_TransferConfig:00000000 $t - /tmp/ccSHpINd.s:68 .text.I2C_TransferConfig:00000000 I2C_TransferConfig - /tmp/ccSHpINd.s:126 .text.I2C_Enable_IRQ:00000000 $t - /tmp/ccSHpINd.s:131 .text.I2C_Enable_IRQ:00000000 I2C_Enable_IRQ - /tmp/ccSHpINd.s:293 .text.I2C_Enable_IRQ:00000090 $d - /tmp/ccSHpINd.s:13416 .text.I2C_Master_ISR_DMA:00000000 I2C_Master_ISR_DMA - /tmp/ccSHpINd.s:13116 .text.I2C_Slave_ISR_DMA:00000000 I2C_Slave_ISR_DMA - /tmp/ccSHpINd.s:12707 .text.I2C_Mem_ISR_DMA:00000000 I2C_Mem_ISR_DMA - /tmp/ccSHpINd.s:300 .text.I2C_Disable_IRQ:00000000 $t - /tmp/ccSHpINd.s:305 .text.I2C_Disable_IRQ:00000000 I2C_Disable_IRQ - /tmp/ccSHpINd.s:429 .text.I2C_ConvertOtherXferOptions:00000000 $t - /tmp/ccSHpINd.s:434 .text.I2C_ConvertOtherXferOptions:00000000 I2C_ConvertOtherXferOptions - /tmp/ccSHpINd.s:475 .text.I2C_IsErrorOccurred:00000000 $t - /tmp/ccSHpINd.s:480 .text.I2C_IsErrorOccurred:00000000 I2C_IsErrorOccurred - /tmp/ccSHpINd.s:761 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 $t - /tmp/ccSHpINd.s:766 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 I2C_WaitOnTXISFlagUntilTimeout - /tmp/ccSHpINd.s:864 .text.I2C_WaitOnFlagUntilTimeout:00000000 $t - /tmp/ccSHpINd.s:869 .text.I2C_WaitOnFlagUntilTimeout:00000000 I2C_WaitOnFlagUntilTimeout - /tmp/ccSHpINd.s:981 .text.I2C_RequestMemoryWrite:00000000 $t - /tmp/ccSHpINd.s:986 .text.I2C_RequestMemoryWrite:00000000 I2C_RequestMemoryWrite - /tmp/ccSHpINd.s:1105 .text.I2C_RequestMemoryWrite:00000078 $d - /tmp/ccSHpINd.s:1110 .text.I2C_RequestMemoryRead:00000000 $t - /tmp/ccSHpINd.s:1115 .text.I2C_RequestMemoryRead:00000000 I2C_RequestMemoryRead - /tmp/ccSHpINd.s:1234 .text.I2C_RequestMemoryRead:00000074 $d - /tmp/ccSHpINd.s:1239 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 $t - /tmp/ccSHpINd.s:1244 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 I2C_WaitOnSTOPFlagUntilTimeout - /tmp/ccSHpINd.s:1342 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 $t - /tmp/ccSHpINd.s:1347 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 I2C_WaitOnRXNEFlagUntilTimeout - /tmp/ccSHpINd.s:1512 .text.HAL_I2C_MspInit:00000000 $t - /tmp/ccSHpINd.s:1518 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit - /tmp/ccSHpINd.s:1533 .text.HAL_I2C_Init:00000000 $t - /tmp/ccSHpINd.s:1539 .text.HAL_I2C_Init:00000000 HAL_I2C_Init - /tmp/ccSHpINd.s:1734 .text.HAL_I2C_Init:000000c4 $d - /tmp/ccSHpINd.s:1739 .text.HAL_I2C_MspDeInit:00000000 $t - /tmp/ccSHpINd.s:1745 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit - /tmp/ccSHpINd.s:1760 .text.HAL_I2C_DeInit:00000000 $t - /tmp/ccSHpINd.s:1766 .text.HAL_I2C_DeInit:00000000 HAL_I2C_DeInit - /tmp/ccSHpINd.s:1831 .text.HAL_I2C_Master_Transmit:00000000 $t - /tmp/ccSHpINd.s:1837 .text.HAL_I2C_Master_Transmit:00000000 HAL_I2C_Master_Transmit - /tmp/ccSHpINd.s:2197 .text.HAL_I2C_Master_Transmit:000001a0 $d - /tmp/ccSHpINd.s:2202 .text.HAL_I2C_Master_Receive:00000000 $t - /tmp/ccSHpINd.s:2208 .text.HAL_I2C_Master_Receive:00000000 HAL_I2C_Master_Receive - /tmp/ccSHpINd.s:2517 .text.HAL_I2C_Master_Receive:00000178 $d - /tmp/ccSHpINd.s:2522 .text.HAL_I2C_Slave_Transmit:00000000 $t - /tmp/ccSHpINd.s:2528 .text.HAL_I2C_Slave_Transmit:00000000 HAL_I2C_Slave_Transmit - /tmp/ccSHpINd.s:2980 .text.HAL_I2C_Slave_Receive:00000000 $t - /tmp/ccSHpINd.s:2986 .text.HAL_I2C_Slave_Receive:00000000 HAL_I2C_Slave_Receive - /tmp/ccSHpINd.s:3337 .text.HAL_I2C_Master_Transmit_IT:00000000 $t - /tmp/ccSHpINd.s:3343 .text.HAL_I2C_Master_Transmit_IT:00000000 HAL_I2C_Master_Transmit_IT - /tmp/ccSHpINd.s:3542 .text.HAL_I2C_Master_Transmit_IT:000000bc $d - /tmp/ccSHpINd.s:12303 .text.I2C_Master_ISR_IT:00000000 I2C_Master_ISR_IT - /tmp/ccSHpINd.s:3549 .text.HAL_I2C_Master_Receive_IT:00000000 $t - /tmp/ccSHpINd.s:3555 .text.HAL_I2C_Master_Receive_IT:00000000 HAL_I2C_Master_Receive_IT - ARM GAS /tmp/ccSHpINd.s page 478 + /tmp/ccloipGv.s:20 .text.I2C_Flush_TXDR:00000000 $t + /tmp/ccloipGv.s:25 .text.I2C_Flush_TXDR:00000000 I2C_Flush_TXDR + /tmp/ccloipGv.s:63 .text.I2C_TransferConfig:00000000 $t + /tmp/ccloipGv.s:68 .text.I2C_TransferConfig:00000000 I2C_TransferConfig + /tmp/ccloipGv.s:126 .text.I2C_Enable_IRQ:00000000 $t + /tmp/ccloipGv.s:131 .text.I2C_Enable_IRQ:00000000 I2C_Enable_IRQ + /tmp/ccloipGv.s:293 .text.I2C_Enable_IRQ:00000090 $d + /tmp/ccloipGv.s:13416 .text.I2C_Master_ISR_DMA:00000000 I2C_Master_ISR_DMA + /tmp/ccloipGv.s:13116 .text.I2C_Slave_ISR_DMA:00000000 I2C_Slave_ISR_DMA + /tmp/ccloipGv.s:12707 .text.I2C_Mem_ISR_DMA:00000000 I2C_Mem_ISR_DMA + /tmp/ccloipGv.s:300 .text.I2C_Disable_IRQ:00000000 $t + /tmp/ccloipGv.s:305 .text.I2C_Disable_IRQ:00000000 I2C_Disable_IRQ + /tmp/ccloipGv.s:429 .text.I2C_ConvertOtherXferOptions:00000000 $t + /tmp/ccloipGv.s:434 .text.I2C_ConvertOtherXferOptions:00000000 I2C_ConvertOtherXferOptions + /tmp/ccloipGv.s:475 .text.I2C_IsErrorOccurred:00000000 $t + /tmp/ccloipGv.s:480 .text.I2C_IsErrorOccurred:00000000 I2C_IsErrorOccurred + /tmp/ccloipGv.s:761 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 $t + /tmp/ccloipGv.s:766 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 I2C_WaitOnTXISFlagUntilTimeout + /tmp/ccloipGv.s:864 .text.I2C_WaitOnFlagUntilTimeout:00000000 $t + /tmp/ccloipGv.s:869 .text.I2C_WaitOnFlagUntilTimeout:00000000 I2C_WaitOnFlagUntilTimeout + /tmp/ccloipGv.s:981 .text.I2C_RequestMemoryWrite:00000000 $t + /tmp/ccloipGv.s:986 .text.I2C_RequestMemoryWrite:00000000 I2C_RequestMemoryWrite + /tmp/ccloipGv.s:1105 .text.I2C_RequestMemoryWrite:00000078 $d + /tmp/ccloipGv.s:1110 .text.I2C_RequestMemoryRead:00000000 $t + /tmp/ccloipGv.s:1115 .text.I2C_RequestMemoryRead:00000000 I2C_RequestMemoryRead + /tmp/ccloipGv.s:1234 .text.I2C_RequestMemoryRead:00000074 $d + /tmp/ccloipGv.s:1239 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 $t + /tmp/ccloipGv.s:1244 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 I2C_WaitOnSTOPFlagUntilTimeout + /tmp/ccloipGv.s:1342 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 $t + /tmp/ccloipGv.s:1347 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 I2C_WaitOnRXNEFlagUntilTimeout + /tmp/ccloipGv.s:1512 .text.HAL_I2C_MspInit:00000000 $t + /tmp/ccloipGv.s:1518 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit + /tmp/ccloipGv.s:1533 .text.HAL_I2C_Init:00000000 $t + /tmp/ccloipGv.s:1539 .text.HAL_I2C_Init:00000000 HAL_I2C_Init + /tmp/ccloipGv.s:1734 .text.HAL_I2C_Init:000000c4 $d + /tmp/ccloipGv.s:1739 .text.HAL_I2C_MspDeInit:00000000 $t + /tmp/ccloipGv.s:1745 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit + /tmp/ccloipGv.s:1760 .text.HAL_I2C_DeInit:00000000 $t + /tmp/ccloipGv.s:1766 .text.HAL_I2C_DeInit:00000000 HAL_I2C_DeInit + /tmp/ccloipGv.s:1831 .text.HAL_I2C_Master_Transmit:00000000 $t + /tmp/ccloipGv.s:1837 .text.HAL_I2C_Master_Transmit:00000000 HAL_I2C_Master_Transmit + /tmp/ccloipGv.s:2197 .text.HAL_I2C_Master_Transmit:000001a0 $d + /tmp/ccloipGv.s:2202 .text.HAL_I2C_Master_Receive:00000000 $t + /tmp/ccloipGv.s:2208 .text.HAL_I2C_Master_Receive:00000000 HAL_I2C_Master_Receive + /tmp/ccloipGv.s:2517 .text.HAL_I2C_Master_Receive:00000178 $d + /tmp/ccloipGv.s:2522 .text.HAL_I2C_Slave_Transmit:00000000 $t + /tmp/ccloipGv.s:2528 .text.HAL_I2C_Slave_Transmit:00000000 HAL_I2C_Slave_Transmit + /tmp/ccloipGv.s:2980 .text.HAL_I2C_Slave_Receive:00000000 $t + /tmp/ccloipGv.s:2986 .text.HAL_I2C_Slave_Receive:00000000 HAL_I2C_Slave_Receive + /tmp/ccloipGv.s:3337 .text.HAL_I2C_Master_Transmit_IT:00000000 $t + /tmp/ccloipGv.s:3343 .text.HAL_I2C_Master_Transmit_IT:00000000 HAL_I2C_Master_Transmit_IT + /tmp/ccloipGv.s:3542 .text.HAL_I2C_Master_Transmit_IT:000000bc $d + /tmp/ccloipGv.s:12303 .text.I2C_Master_ISR_IT:00000000 I2C_Master_ISR_IT + /tmp/ccloipGv.s:3549 .text.HAL_I2C_Master_Receive_IT:00000000 $t + /tmp/ccloipGv.s:3555 .text.HAL_I2C_Master_Receive_IT:00000000 HAL_I2C_Master_Receive_IT + ARM GAS /tmp/ccloipGv.s page 478 - /tmp/ccSHpINd.s:3708 .text.HAL_I2C_Master_Receive_IT:0000008c $d - /tmp/ccSHpINd.s:3715 .text.HAL_I2C_Slave_Transmit_IT:00000000 $t - /tmp/ccSHpINd.s:3721 .text.HAL_I2C_Slave_Transmit_IT:00000000 HAL_I2C_Slave_Transmit_IT - /tmp/ccSHpINd.s:3865 .text.HAL_I2C_Slave_Transmit_IT:00000084 $d - /tmp/ccSHpINd.s:11709 .text.I2C_Slave_ISR_IT:00000000 I2C_Slave_ISR_IT - /tmp/ccSHpINd.s:3871 .text.HAL_I2C_Slave_Receive_IT:00000000 $t - /tmp/ccSHpINd.s:3877 .text.HAL_I2C_Slave_Receive_IT:00000000 HAL_I2C_Slave_Receive_IT - /tmp/ccSHpINd.s:3980 .text.HAL_I2C_Slave_Receive_IT:0000005c $d - /tmp/ccSHpINd.s:3986 .text.HAL_I2C_Master_Transmit_DMA:00000000 $t - /tmp/ccSHpINd.s:3992 .text.HAL_I2C_Master_Transmit_DMA:00000000 HAL_I2C_Master_Transmit_DMA - /tmp/ccSHpINd.s:4340 .text.HAL_I2C_Master_Transmit_DMA:0000015c $d - /tmp/ccSHpINd.s:13842 .text.I2C_DMAMasterTransmitCplt:00000000 I2C_DMAMasterTransmitCplt - /tmp/ccSHpINd.s:13744 .text.I2C_DMAError:00000000 I2C_DMAError - /tmp/ccSHpINd.s:4350 .text.HAL_I2C_Master_Receive_DMA:00000000 $t - /tmp/ccSHpINd.s:4356 .text.HAL_I2C_Master_Receive_DMA:00000000 HAL_I2C_Master_Receive_DMA - /tmp/ccSHpINd.s:4658 .text.HAL_I2C_Master_Receive_DMA:00000138 $d - /tmp/ccSHpINd.s:13950 .text.I2C_DMAMasterReceiveCplt:00000000 I2C_DMAMasterReceiveCplt - /tmp/ccSHpINd.s:4668 .text.HAL_I2C_Slave_Transmit_DMA:00000000 $t - /tmp/ccSHpINd.s:4674 .text.HAL_I2C_Slave_Transmit_DMA:00000000 HAL_I2C_Slave_Transmit_DMA - /tmp/ccSHpINd.s:4979 .text.HAL_I2C_Slave_Transmit_DMA:00000130 $d - /tmp/ccSHpINd.s:10399 .text.I2C_DMASlaveTransmitCplt:00000000 I2C_DMASlaveTransmitCplt - /tmp/ccSHpINd.s:4987 .text.HAL_I2C_Slave_Receive_DMA:00000000 $t - /tmp/ccSHpINd.s:4993 .text.HAL_I2C_Slave_Receive_DMA:00000000 HAL_I2C_Slave_Receive_DMA - /tmp/ccSHpINd.s:5215 .text.HAL_I2C_Slave_Receive_DMA:000000e4 $d - /tmp/ccSHpINd.s:10456 .text.I2C_DMASlaveReceiveCplt:00000000 I2C_DMASlaveReceiveCplt - /tmp/ccSHpINd.s:5223 .text.HAL_I2C_Mem_Write:00000000 $t - /tmp/ccSHpINd.s:5229 .text.HAL_I2C_Mem_Write:00000000 HAL_I2C_Mem_Write - /tmp/ccSHpINd.s:5587 .text.HAL_I2C_Mem_Read:00000000 $t - /tmp/ccSHpINd.s:5593 .text.HAL_I2C_Mem_Read:00000000 HAL_I2C_Mem_Read - /tmp/ccSHpINd.s:5951 .text.HAL_I2C_Mem_Read:000001ac $d - /tmp/ccSHpINd.s:5956 .text.HAL_I2C_Mem_Write_IT:00000000 $t - /tmp/ccSHpINd.s:5962 .text.HAL_I2C_Mem_Write_IT:00000000 HAL_I2C_Mem_Write_IT - /tmp/ccSHpINd.s:6139 .text.HAL_I2C_Mem_Write_IT:000000ac $d - /tmp/ccSHpINd.s:14070 .text.I2C_Mem_ISR_IT:00000000 I2C_Mem_ISR_IT - /tmp/ccSHpINd.s:6146 .text.HAL_I2C_Mem_Read_IT:00000000 $t - /tmp/ccSHpINd.s:6152 .text.HAL_I2C_Mem_Read_IT:00000000 HAL_I2C_Mem_Read_IT - /tmp/ccSHpINd.s:6326 .text.HAL_I2C_Mem_Read_IT:000000a8 $d - /tmp/ccSHpINd.s:6333 .text.HAL_I2C_Mem_Write_DMA:00000000 $t - /tmp/ccSHpINd.s:6339 .text.HAL_I2C_Mem_Write_DMA:00000000 HAL_I2C_Mem_Write_DMA - /tmp/ccSHpINd.s:6624 .text.HAL_I2C_Mem_Write_DMA:00000120 $d - /tmp/ccSHpINd.s:6633 .text.HAL_I2C_Mem_Read_DMA:00000000 $t - /tmp/ccSHpINd.s:6639 .text.HAL_I2C_Mem_Read_DMA:00000000 HAL_I2C_Mem_Read_DMA - /tmp/ccSHpINd.s:6926 .text.HAL_I2C_Mem_Read_DMA:00000120 $d - /tmp/ccSHpINd.s:6935 .text.HAL_I2C_IsDeviceReady:00000000 $t - /tmp/ccSHpINd.s:6941 .text.HAL_I2C_IsDeviceReady:00000000 HAL_I2C_IsDeviceReady - /tmp/ccSHpINd.s:7232 .text.HAL_I2C_IsDeviceReady:00000134 $d - /tmp/ccSHpINd.s:7238 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 $t - /tmp/ccSHpINd.s:7244 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 HAL_I2C_Master_Seq_Transmit_IT - /tmp/ccSHpINd.s:7511 .text.HAL_I2C_Master_Seq_Transmit_IT:00000104 $d - /tmp/ccSHpINd.s:7517 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 $t - /tmp/ccSHpINd.s:7523 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 HAL_I2C_Master_Seq_Transmit_DMA - /tmp/ccSHpINd.s:7945 .text.HAL_I2C_Master_Seq_Transmit_DMA:000001d0 $d - /tmp/ccSHpINd.s:7954 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 $t - /tmp/ccSHpINd.s:7960 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 HAL_I2C_Master_Seq_Receive_IT - /tmp/ccSHpINd.s:8148 .text.HAL_I2C_Master_Seq_Receive_IT:000000ac $d - /tmp/ccSHpINd.s:8154 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 $t - /tmp/ccSHpINd.s:8160 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 HAL_I2C_Master_Seq_Receive_DMA - ARM GAS /tmp/ccSHpINd.s page 479 + /tmp/ccloipGv.s:3708 .text.HAL_I2C_Master_Receive_IT:0000008c $d + /tmp/ccloipGv.s:3715 .text.HAL_I2C_Slave_Transmit_IT:00000000 $t + /tmp/ccloipGv.s:3721 .text.HAL_I2C_Slave_Transmit_IT:00000000 HAL_I2C_Slave_Transmit_IT + /tmp/ccloipGv.s:3865 .text.HAL_I2C_Slave_Transmit_IT:00000084 $d + /tmp/ccloipGv.s:11709 .text.I2C_Slave_ISR_IT:00000000 I2C_Slave_ISR_IT + /tmp/ccloipGv.s:3871 .text.HAL_I2C_Slave_Receive_IT:00000000 $t + /tmp/ccloipGv.s:3877 .text.HAL_I2C_Slave_Receive_IT:00000000 HAL_I2C_Slave_Receive_IT + /tmp/ccloipGv.s:3980 .text.HAL_I2C_Slave_Receive_IT:0000005c $d + /tmp/ccloipGv.s:3986 .text.HAL_I2C_Master_Transmit_DMA:00000000 $t + /tmp/ccloipGv.s:3992 .text.HAL_I2C_Master_Transmit_DMA:00000000 HAL_I2C_Master_Transmit_DMA + /tmp/ccloipGv.s:4340 .text.HAL_I2C_Master_Transmit_DMA:0000015c $d + /tmp/ccloipGv.s:13842 .text.I2C_DMAMasterTransmitCplt:00000000 I2C_DMAMasterTransmitCplt + /tmp/ccloipGv.s:13744 .text.I2C_DMAError:00000000 I2C_DMAError + /tmp/ccloipGv.s:4350 .text.HAL_I2C_Master_Receive_DMA:00000000 $t + /tmp/ccloipGv.s:4356 .text.HAL_I2C_Master_Receive_DMA:00000000 HAL_I2C_Master_Receive_DMA + /tmp/ccloipGv.s:4658 .text.HAL_I2C_Master_Receive_DMA:00000138 $d + /tmp/ccloipGv.s:13950 .text.I2C_DMAMasterReceiveCplt:00000000 I2C_DMAMasterReceiveCplt + /tmp/ccloipGv.s:4668 .text.HAL_I2C_Slave_Transmit_DMA:00000000 $t + /tmp/ccloipGv.s:4674 .text.HAL_I2C_Slave_Transmit_DMA:00000000 HAL_I2C_Slave_Transmit_DMA + /tmp/ccloipGv.s:4979 .text.HAL_I2C_Slave_Transmit_DMA:00000130 $d + /tmp/ccloipGv.s:10399 .text.I2C_DMASlaveTransmitCplt:00000000 I2C_DMASlaveTransmitCplt + /tmp/ccloipGv.s:4987 .text.HAL_I2C_Slave_Receive_DMA:00000000 $t + /tmp/ccloipGv.s:4993 .text.HAL_I2C_Slave_Receive_DMA:00000000 HAL_I2C_Slave_Receive_DMA + /tmp/ccloipGv.s:5215 .text.HAL_I2C_Slave_Receive_DMA:000000e4 $d + /tmp/ccloipGv.s:10456 .text.I2C_DMASlaveReceiveCplt:00000000 I2C_DMASlaveReceiveCplt + /tmp/ccloipGv.s:5223 .text.HAL_I2C_Mem_Write:00000000 $t + /tmp/ccloipGv.s:5229 .text.HAL_I2C_Mem_Write:00000000 HAL_I2C_Mem_Write + /tmp/ccloipGv.s:5587 .text.HAL_I2C_Mem_Read:00000000 $t + /tmp/ccloipGv.s:5593 .text.HAL_I2C_Mem_Read:00000000 HAL_I2C_Mem_Read + /tmp/ccloipGv.s:5951 .text.HAL_I2C_Mem_Read:000001ac $d + /tmp/ccloipGv.s:5956 .text.HAL_I2C_Mem_Write_IT:00000000 $t + /tmp/ccloipGv.s:5962 .text.HAL_I2C_Mem_Write_IT:00000000 HAL_I2C_Mem_Write_IT + /tmp/ccloipGv.s:6139 .text.HAL_I2C_Mem_Write_IT:000000ac $d + /tmp/ccloipGv.s:14070 .text.I2C_Mem_ISR_IT:00000000 I2C_Mem_ISR_IT + /tmp/ccloipGv.s:6146 .text.HAL_I2C_Mem_Read_IT:00000000 $t + /tmp/ccloipGv.s:6152 .text.HAL_I2C_Mem_Read_IT:00000000 HAL_I2C_Mem_Read_IT + /tmp/ccloipGv.s:6326 .text.HAL_I2C_Mem_Read_IT:000000a8 $d + /tmp/ccloipGv.s:6333 .text.HAL_I2C_Mem_Write_DMA:00000000 $t + /tmp/ccloipGv.s:6339 .text.HAL_I2C_Mem_Write_DMA:00000000 HAL_I2C_Mem_Write_DMA + /tmp/ccloipGv.s:6624 .text.HAL_I2C_Mem_Write_DMA:00000120 $d + /tmp/ccloipGv.s:6633 .text.HAL_I2C_Mem_Read_DMA:00000000 $t + /tmp/ccloipGv.s:6639 .text.HAL_I2C_Mem_Read_DMA:00000000 HAL_I2C_Mem_Read_DMA + /tmp/ccloipGv.s:6926 .text.HAL_I2C_Mem_Read_DMA:00000120 $d + /tmp/ccloipGv.s:6935 .text.HAL_I2C_IsDeviceReady:00000000 $t + /tmp/ccloipGv.s:6941 .text.HAL_I2C_IsDeviceReady:00000000 HAL_I2C_IsDeviceReady + /tmp/ccloipGv.s:7232 .text.HAL_I2C_IsDeviceReady:00000134 $d + /tmp/ccloipGv.s:7238 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 $t + /tmp/ccloipGv.s:7244 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 HAL_I2C_Master_Seq_Transmit_IT + /tmp/ccloipGv.s:7511 .text.HAL_I2C_Master_Seq_Transmit_IT:00000104 $d + /tmp/ccloipGv.s:7517 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 $t + /tmp/ccloipGv.s:7523 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 HAL_I2C_Master_Seq_Transmit_DMA + /tmp/ccloipGv.s:7945 .text.HAL_I2C_Master_Seq_Transmit_DMA:000001d0 $d + /tmp/ccloipGv.s:7954 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 $t + /tmp/ccloipGv.s:7960 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 HAL_I2C_Master_Seq_Receive_IT + /tmp/ccloipGv.s:8148 .text.HAL_I2C_Master_Seq_Receive_IT:000000ac $d + /tmp/ccloipGv.s:8154 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 $t + /tmp/ccloipGv.s:8160 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 HAL_I2C_Master_Seq_Receive_DMA + ARM GAS /tmp/ccloipGv.s page 479 - /tmp/ccSHpINd.s:8492 .text.HAL_I2C_Master_Seq_Receive_DMA:00000160 $d - /tmp/ccSHpINd.s:8501 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 $t - /tmp/ccSHpINd.s:8507 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 HAL_I2C_Slave_Seq_Transmit_IT - /tmp/ccSHpINd.s:8718 .text.HAL_I2C_Slave_Seq_Transmit_IT:000000dc $d - /tmp/ccSHpINd.s:14602 .text.I2C_DMAAbort:00000000 I2C_DMAAbort - /tmp/ccSHpINd.s:8724 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 $t - /tmp/ccSHpINd.s:8730 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 HAL_I2C_Slave_Seq_Transmit_DMA - /tmp/ccSHpINd.s:9120 .text.HAL_I2C_Slave_Seq_Transmit_DMA:0000019c $d - /tmp/ccSHpINd.s:9128 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 $t - /tmp/ccSHpINd.s:9134 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 HAL_I2C_Slave_Seq_Receive_IT - /tmp/ccSHpINd.s:9345 .text.HAL_I2C_Slave_Seq_Receive_IT:000000dc $d - /tmp/ccSHpINd.s:9351 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 $t - /tmp/ccSHpINd.s:9357 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 HAL_I2C_Slave_Seq_Receive_DMA - /tmp/ccSHpINd.s:9745 .text.HAL_I2C_Slave_Seq_Receive_DMA:0000019c $d - /tmp/ccSHpINd.s:9753 .text.HAL_I2C_EnableListen_IT:00000000 $t - /tmp/ccSHpINd.s:9759 .text.HAL_I2C_EnableListen_IT:00000000 HAL_I2C_EnableListen_IT - /tmp/ccSHpINd.s:9806 .text.HAL_I2C_EnableListen_IT:00000028 $d - /tmp/ccSHpINd.s:9811 .text.HAL_I2C_DisableListen_IT:00000000 $t - /tmp/ccSHpINd.s:9817 .text.HAL_I2C_DisableListen_IT:00000000 HAL_I2C_DisableListen_IT - /tmp/ccSHpINd.s:9883 .text.HAL_I2C_Master_Abort_IT:00000000 $t - /tmp/ccSHpINd.s:9889 .text.HAL_I2C_Master_Abort_IT:00000000 HAL_I2C_Master_Abort_IT - /tmp/ccSHpINd.s:10038 .text.HAL_I2C_Master_Abort_IT:00000084 $d - /tmp/ccSHpINd.s:10043 .text.HAL_I2C_EV_IRQHandler:00000000 $t - /tmp/ccSHpINd.s:10049 .text.HAL_I2C_EV_IRQHandler:00000000 HAL_I2C_EV_IRQHandler - /tmp/ccSHpINd.s:10087 .text.HAL_I2C_MasterTxCpltCallback:00000000 $t - /tmp/ccSHpINd.s:10093 .text.HAL_I2C_MasterTxCpltCallback:00000000 HAL_I2C_MasterTxCpltCallback - /tmp/ccSHpINd.s:10108 .text.HAL_I2C_MasterRxCpltCallback:00000000 $t - /tmp/ccSHpINd.s:10114 .text.HAL_I2C_MasterRxCpltCallback:00000000 HAL_I2C_MasterRxCpltCallback - /tmp/ccSHpINd.s:10129 .text.I2C_ITMasterSeqCplt:00000000 $t - /tmp/ccSHpINd.s:10134 .text.I2C_ITMasterSeqCplt:00000000 I2C_ITMasterSeqCplt - /tmp/ccSHpINd.s:10219 .text.HAL_I2C_SlaveTxCpltCallback:00000000 $t - /tmp/ccSHpINd.s:10225 .text.HAL_I2C_SlaveTxCpltCallback:00000000 HAL_I2C_SlaveTxCpltCallback - /tmp/ccSHpINd.s:10240 .text.HAL_I2C_SlaveRxCpltCallback:00000000 $t - /tmp/ccSHpINd.s:10246 .text.HAL_I2C_SlaveRxCpltCallback:00000000 HAL_I2C_SlaveRxCpltCallback - /tmp/ccSHpINd.s:10261 .text.I2C_ITSlaveSeqCplt:00000000 $t - /tmp/ccSHpINd.s:10266 .text.I2C_ITSlaveSeqCplt:00000000 I2C_ITSlaveSeqCplt - /tmp/ccSHpINd.s:10394 .text.I2C_DMASlaveTransmitCplt:00000000 $t - /tmp/ccSHpINd.s:10451 .text.I2C_DMASlaveReceiveCplt:00000000 $t - /tmp/ccSHpINd.s:10512 .text.HAL_I2C_AddrCallback:00000000 $t - /tmp/ccSHpINd.s:10518 .text.HAL_I2C_AddrCallback:00000000 HAL_I2C_AddrCallback - /tmp/ccSHpINd.s:10535 .text.I2C_ITAddrCplt:00000000 $t - /tmp/ccSHpINd.s:10540 .text.I2C_ITAddrCplt:00000000 I2C_ITAddrCplt - /tmp/ccSHpINd.s:10700 .text.HAL_I2C_ListenCpltCallback:00000000 $t - /tmp/ccSHpINd.s:10706 .text.HAL_I2C_ListenCpltCallback:00000000 HAL_I2C_ListenCpltCallback - /tmp/ccSHpINd.s:10721 .text.I2C_ITListenCplt:00000000 $t - /tmp/ccSHpINd.s:10726 .text.I2C_ITListenCplt:00000000 I2C_ITListenCplt - /tmp/ccSHpINd.s:10830 .text.I2C_ITListenCplt:00000064 $d - /tmp/ccSHpINd.s:10835 .text.HAL_I2C_MemTxCpltCallback:00000000 $t - /tmp/ccSHpINd.s:10841 .text.HAL_I2C_MemTxCpltCallback:00000000 HAL_I2C_MemTxCpltCallback - /tmp/ccSHpINd.s:10856 .text.HAL_I2C_MemRxCpltCallback:00000000 $t - /tmp/ccSHpINd.s:10862 .text.HAL_I2C_MemRxCpltCallback:00000000 HAL_I2C_MemRxCpltCallback - /tmp/ccSHpINd.s:10877 .text.HAL_I2C_ErrorCallback:00000000 $t - /tmp/ccSHpINd.s:10883 .text.HAL_I2C_ErrorCallback:00000000 HAL_I2C_ErrorCallback - /tmp/ccSHpINd.s:10898 .text.HAL_I2C_AbortCpltCallback:00000000 $t - /tmp/ccSHpINd.s:10904 .text.HAL_I2C_AbortCpltCallback:00000000 HAL_I2C_AbortCpltCallback - /tmp/ccSHpINd.s:10919 .text.I2C_TreatErrorCallback:00000000 $t - /tmp/ccSHpINd.s:10924 .text.I2C_TreatErrorCallback:00000000 I2C_TreatErrorCallback - ARM GAS /tmp/ccSHpINd.s page 480 + /tmp/ccloipGv.s:8492 .text.HAL_I2C_Master_Seq_Receive_DMA:00000160 $d + /tmp/ccloipGv.s:8501 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 $t + /tmp/ccloipGv.s:8507 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 HAL_I2C_Slave_Seq_Transmit_IT + /tmp/ccloipGv.s:8718 .text.HAL_I2C_Slave_Seq_Transmit_IT:000000dc $d + /tmp/ccloipGv.s:14602 .text.I2C_DMAAbort:00000000 I2C_DMAAbort + /tmp/ccloipGv.s:8724 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 $t + /tmp/ccloipGv.s:8730 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 HAL_I2C_Slave_Seq_Transmit_DMA + /tmp/ccloipGv.s:9120 .text.HAL_I2C_Slave_Seq_Transmit_DMA:0000019c $d + /tmp/ccloipGv.s:9128 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 $t + /tmp/ccloipGv.s:9134 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 HAL_I2C_Slave_Seq_Receive_IT + /tmp/ccloipGv.s:9345 .text.HAL_I2C_Slave_Seq_Receive_IT:000000dc $d + /tmp/ccloipGv.s:9351 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 $t + /tmp/ccloipGv.s:9357 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 HAL_I2C_Slave_Seq_Receive_DMA + /tmp/ccloipGv.s:9745 .text.HAL_I2C_Slave_Seq_Receive_DMA:0000019c $d + /tmp/ccloipGv.s:9753 .text.HAL_I2C_EnableListen_IT:00000000 $t + /tmp/ccloipGv.s:9759 .text.HAL_I2C_EnableListen_IT:00000000 HAL_I2C_EnableListen_IT + /tmp/ccloipGv.s:9806 .text.HAL_I2C_EnableListen_IT:00000028 $d + /tmp/ccloipGv.s:9811 .text.HAL_I2C_DisableListen_IT:00000000 $t + /tmp/ccloipGv.s:9817 .text.HAL_I2C_DisableListen_IT:00000000 HAL_I2C_DisableListen_IT + /tmp/ccloipGv.s:9883 .text.HAL_I2C_Master_Abort_IT:00000000 $t + /tmp/ccloipGv.s:9889 .text.HAL_I2C_Master_Abort_IT:00000000 HAL_I2C_Master_Abort_IT + /tmp/ccloipGv.s:10038 .text.HAL_I2C_Master_Abort_IT:00000084 $d + /tmp/ccloipGv.s:10043 .text.HAL_I2C_EV_IRQHandler:00000000 $t + /tmp/ccloipGv.s:10049 .text.HAL_I2C_EV_IRQHandler:00000000 HAL_I2C_EV_IRQHandler + /tmp/ccloipGv.s:10087 .text.HAL_I2C_MasterTxCpltCallback:00000000 $t + /tmp/ccloipGv.s:10093 .text.HAL_I2C_MasterTxCpltCallback:00000000 HAL_I2C_MasterTxCpltCallback + /tmp/ccloipGv.s:10108 .text.HAL_I2C_MasterRxCpltCallback:00000000 $t + /tmp/ccloipGv.s:10114 .text.HAL_I2C_MasterRxCpltCallback:00000000 HAL_I2C_MasterRxCpltCallback + /tmp/ccloipGv.s:10129 .text.I2C_ITMasterSeqCplt:00000000 $t + /tmp/ccloipGv.s:10134 .text.I2C_ITMasterSeqCplt:00000000 I2C_ITMasterSeqCplt + /tmp/ccloipGv.s:10219 .text.HAL_I2C_SlaveTxCpltCallback:00000000 $t + /tmp/ccloipGv.s:10225 .text.HAL_I2C_SlaveTxCpltCallback:00000000 HAL_I2C_SlaveTxCpltCallback + /tmp/ccloipGv.s:10240 .text.HAL_I2C_SlaveRxCpltCallback:00000000 $t + /tmp/ccloipGv.s:10246 .text.HAL_I2C_SlaveRxCpltCallback:00000000 HAL_I2C_SlaveRxCpltCallback + /tmp/ccloipGv.s:10261 .text.I2C_ITSlaveSeqCplt:00000000 $t + /tmp/ccloipGv.s:10266 .text.I2C_ITSlaveSeqCplt:00000000 I2C_ITSlaveSeqCplt + /tmp/ccloipGv.s:10394 .text.I2C_DMASlaveTransmitCplt:00000000 $t + /tmp/ccloipGv.s:10451 .text.I2C_DMASlaveReceiveCplt:00000000 $t + /tmp/ccloipGv.s:10512 .text.HAL_I2C_AddrCallback:00000000 $t + /tmp/ccloipGv.s:10518 .text.HAL_I2C_AddrCallback:00000000 HAL_I2C_AddrCallback + /tmp/ccloipGv.s:10535 .text.I2C_ITAddrCplt:00000000 $t + /tmp/ccloipGv.s:10540 .text.I2C_ITAddrCplt:00000000 I2C_ITAddrCplt + /tmp/ccloipGv.s:10700 .text.HAL_I2C_ListenCpltCallback:00000000 $t + /tmp/ccloipGv.s:10706 .text.HAL_I2C_ListenCpltCallback:00000000 HAL_I2C_ListenCpltCallback + /tmp/ccloipGv.s:10721 .text.I2C_ITListenCplt:00000000 $t + /tmp/ccloipGv.s:10726 .text.I2C_ITListenCplt:00000000 I2C_ITListenCplt + /tmp/ccloipGv.s:10830 .text.I2C_ITListenCplt:00000064 $d + /tmp/ccloipGv.s:10835 .text.HAL_I2C_MemTxCpltCallback:00000000 $t + /tmp/ccloipGv.s:10841 .text.HAL_I2C_MemTxCpltCallback:00000000 HAL_I2C_MemTxCpltCallback + /tmp/ccloipGv.s:10856 .text.HAL_I2C_MemRxCpltCallback:00000000 $t + /tmp/ccloipGv.s:10862 .text.HAL_I2C_MemRxCpltCallback:00000000 HAL_I2C_MemRxCpltCallback + /tmp/ccloipGv.s:10877 .text.HAL_I2C_ErrorCallback:00000000 $t + /tmp/ccloipGv.s:10883 .text.HAL_I2C_ErrorCallback:00000000 HAL_I2C_ErrorCallback + /tmp/ccloipGv.s:10898 .text.HAL_I2C_AbortCpltCallback:00000000 $t + /tmp/ccloipGv.s:10904 .text.HAL_I2C_AbortCpltCallback:00000000 HAL_I2C_AbortCpltCallback + /tmp/ccloipGv.s:10919 .text.I2C_TreatErrorCallback:00000000 $t + /tmp/ccloipGv.s:10924 .text.I2C_TreatErrorCallback:00000000 I2C_TreatErrorCallback + ARM GAS /tmp/ccloipGv.s page 480 - /tmp/ccSHpINd.s:10981 .text.I2C_ITError:00000000 $t - /tmp/ccSHpINd.s:10986 .text.I2C_ITError:00000000 I2C_ITError - /tmp/ccSHpINd.s:11264 .text.I2C_ITError:00000124 $d - /tmp/ccSHpINd.s:11271 .text.I2C_ITSlaveCplt:00000000 $t - /tmp/ccSHpINd.s:11276 .text.I2C_ITSlaveCplt:00000000 I2C_ITSlaveCplt - /tmp/ccSHpINd.s:11323 .text.I2C_ITSlaveCplt:0000001e $d - /tmp/ccSHpINd.s:11333 .text.I2C_ITSlaveCplt:00000028 $t - /tmp/ccSHpINd.s:11699 .text.I2C_ITSlaveCplt:000001ec $d - /tmp/ccSHpINd.s:11704 .text.I2C_Slave_ISR_IT:00000000 $t - /tmp/ccSHpINd.s:12021 .text.I2C_ITMasterCplt:00000000 $t - /tmp/ccSHpINd.s:12026 .text.I2C_ITMasterCplt:00000000 I2C_ITMasterCplt - /tmp/ccSHpINd.s:12298 .text.I2C_Master_ISR_IT:00000000 $t - /tmp/ccSHpINd.s:12702 .text.I2C_Mem_ISR_DMA:00000000 $t - /tmp/ccSHpINd.s:13105 .text.I2C_Mem_ISR_DMA:000001c8 $d - /tmp/ccSHpINd.s:13111 .text.I2C_Slave_ISR_DMA:00000000 $t - /tmp/ccSHpINd.s:13254 .text.I2C_Slave_ISR_DMA:00000096 $d - /tmp/ccSHpINd.s:13265 .text.I2C_Slave_ISR_DMA:000000a0 $t - /tmp/ccSHpINd.s:13411 .text.I2C_Master_ISR_DMA:00000000 $t - /tmp/ccSHpINd.s:13739 .text.I2C_DMAError:00000000 $t - /tmp/ccSHpINd.s:13837 .text.I2C_DMAMasterTransmitCplt:00000000 $t - /tmp/ccSHpINd.s:13945 .text.I2C_DMAMasterReceiveCplt:00000000 $t - /tmp/ccSHpINd.s:14065 .text.I2C_Mem_ISR_IT:00000000 $t - /tmp/ccSHpINd.s:14484 .text.I2C_Mem_ISR_IT:000001b8 $d - /tmp/ccSHpINd.s:14490 .text.HAL_I2C_ER_IRQHandler:00000000 $t - /tmp/ccSHpINd.s:14496 .text.HAL_I2C_ER_IRQHandler:00000000 HAL_I2C_ER_IRQHandler - /tmp/ccSHpINd.s:14597 .text.I2C_DMAAbort:00000000 $t - /tmp/ccSHpINd.s:14648 .text.HAL_I2C_GetState:00000000 $t - /tmp/ccSHpINd.s:14654 .text.HAL_I2C_GetState:00000000 HAL_I2C_GetState - /tmp/ccSHpINd.s:14672 .text.HAL_I2C_GetMode:00000000 $t - /tmp/ccSHpINd.s:14678 .text.HAL_I2C_GetMode:00000000 HAL_I2C_GetMode - /tmp/ccSHpINd.s:14696 .text.HAL_I2C_GetError:00000000 $t - /tmp/ccSHpINd.s:14702 .text.HAL_I2C_GetError:00000000 HAL_I2C_GetError + /tmp/ccloipGv.s:10981 .text.I2C_ITError:00000000 $t + /tmp/ccloipGv.s:10986 .text.I2C_ITError:00000000 I2C_ITError + /tmp/ccloipGv.s:11264 .text.I2C_ITError:00000124 $d + /tmp/ccloipGv.s:11271 .text.I2C_ITSlaveCplt:00000000 $t + /tmp/ccloipGv.s:11276 .text.I2C_ITSlaveCplt:00000000 I2C_ITSlaveCplt + /tmp/ccloipGv.s:11323 .text.I2C_ITSlaveCplt:0000001e $d + /tmp/ccloipGv.s:11333 .text.I2C_ITSlaveCplt:00000028 $t + /tmp/ccloipGv.s:11699 .text.I2C_ITSlaveCplt:000001ec $d + /tmp/ccloipGv.s:11704 .text.I2C_Slave_ISR_IT:00000000 $t + /tmp/ccloipGv.s:12021 .text.I2C_ITMasterCplt:00000000 $t + /tmp/ccloipGv.s:12026 .text.I2C_ITMasterCplt:00000000 I2C_ITMasterCplt + /tmp/ccloipGv.s:12298 .text.I2C_Master_ISR_IT:00000000 $t + /tmp/ccloipGv.s:12702 .text.I2C_Mem_ISR_DMA:00000000 $t + /tmp/ccloipGv.s:13105 .text.I2C_Mem_ISR_DMA:000001c8 $d + /tmp/ccloipGv.s:13111 .text.I2C_Slave_ISR_DMA:00000000 $t + /tmp/ccloipGv.s:13254 .text.I2C_Slave_ISR_DMA:00000096 $d + /tmp/ccloipGv.s:13265 .text.I2C_Slave_ISR_DMA:000000a0 $t + /tmp/ccloipGv.s:13411 .text.I2C_Master_ISR_DMA:00000000 $t + /tmp/ccloipGv.s:13739 .text.I2C_DMAError:00000000 $t + /tmp/ccloipGv.s:13837 .text.I2C_DMAMasterTransmitCplt:00000000 $t + /tmp/ccloipGv.s:13945 .text.I2C_DMAMasterReceiveCplt:00000000 $t + /tmp/ccloipGv.s:14065 .text.I2C_Mem_ISR_IT:00000000 $t + /tmp/ccloipGv.s:14484 .text.I2C_Mem_ISR_IT:000001b8 $d + /tmp/ccloipGv.s:14490 .text.HAL_I2C_ER_IRQHandler:00000000 $t + /tmp/ccloipGv.s:14496 .text.HAL_I2C_ER_IRQHandler:00000000 HAL_I2C_ER_IRQHandler + /tmp/ccloipGv.s:14597 .text.I2C_DMAAbort:00000000 $t + /tmp/ccloipGv.s:14648 .text.HAL_I2C_GetState:00000000 $t + /tmp/ccloipGv.s:14654 .text.HAL_I2C_GetState:00000000 HAL_I2C_GetState + /tmp/ccloipGv.s:14672 .text.HAL_I2C_GetMode:00000000 $t + /tmp/ccloipGv.s:14678 .text.HAL_I2C_GetMode:00000000 HAL_I2C_GetMode + /tmp/ccloipGv.s:14696 .text.HAL_I2C_GetError:00000000 $t + /tmp/ccloipGv.s:14702 .text.HAL_I2C_GetError:00000000 HAL_I2C_GetError UNDEFINED SYMBOLS HAL_GetTick diff --git a/build/stm32f7xx_hal_i2c.o b/build/stm32f7xx_hal_i2c.o index e29b98a98fd928c006b8564c653324462f49876c..f184eb1c0ab52ad770c096f72e18e3dc28ddf084 100644 GIT binary patch delta 7591 zcmZ8l2~-tFy6$S=?ljxw!d#>@Nox_|Z&nh?#6WFY6+~rhoEVnJG=xX0V&@u`#B# z0qFnjUcbAk6HfVUxz|sW%zF`rU#skAXOd(wGV<2HmHit%>m39m*+vzOmYC$1EMs7s z-!~YLP5#dz9$h*hfu&;1dIw389M)xMnDr+4ZIuwDpX3*5;U5f)Y>Grol9hsmx?-Co z1*G|9VP>Gu;4^oFsB#&kp^r`EBTiDr!!<*i-t|}Fg3-;;yC$U*iVTDFu1#5wKn*#1 zH(2=`z8muOu3b5zNFK>hr1vA0c-S=z)w>?0AD=fUD(1H!kd-=_s4PH?hKYK&m*h8_ zzct7?ssl46>n?~gYdkFh>oSVc>Oo@tt)cKDK=SJ%-{#2481b*czo3g4tu{0Vk3@Eq z17Hk)iKb^6VLr_xv!a?-lSiApb1){yr77W5pu`-JEYQkuzARqy61 zA5)?>>)k>{q3#yFTcVtz%xu-WWy(ufH->F`cZBj7MY+T4)K=PPi_Q3;KtIAOW4bSBqaLhSk}l=XXWLVIzz50t-<+*0nIv-P#kiju|!2l zD9#VO1~hVsh^9ru@tka`VEv$jlwT?a&bZElfMuasFhkla1rg=jJEP zq!qDVb}(A1Yz7pBkv~!dO8{XyVPRs^M&548b4D1DU^Xvm&~}Ki5mK-}>5FXPzC34> z81qH>v@zEzWSjY-awt&{5`XTUaE0}W5~VExl}>czOhn91dIC{ZNoob;rzBPmznntn zNl(hdI!}7CN#}0hEkM(G%F`s2-T?C*AbHv_pLOU;2Z0#}_3Yw(tsS1ey4LL!REH;@ zw62BF8o+g!veDrgQv^uC7=&M%M+7XEC0Vr2#e)Y~(a zAai`?IQqpGgc|{d4%r@(ryCWIbS07JA9g-i3*HrHm=e zj_sgIZF)#&HKxr%%@{|yNawpk_IzPBGx4Y*uS1k&mb-)!7zP9Zt}VQxC>ts_;{QVa zd66sP97SB}?oI3ICZ4YWZiA(zI7*gnJi6G~OGw0N662A_3c&pfnT~ghoV*5N8e^cyb!}))T zbsvwpGHBLL4DQfo@m_;h^%NTau8k!^QFlPo_>N0x90g)Hk#F*^2YdUB$0K{vr8zeN z&T%3FaMWndJ?Y9MGarI&r&)+8v1B?M$~TladkaseyY!_ldA^4v%hi=7LsMTNDIJ-C3Y92`xvhoVrQT7MML(pBiuLC zrETYR&QzLv7-Am*E=vHf89Jd-=-nMDw)1f0w}5hNp_R5fGKciO3}Q3jK1Sr8NKvof zK-?fQ8F^&yYGfeRvl&2|f=lh}SbKbFI+Fwac~zNHvlAC7eE1iH4g;E}se47AH5#*a(yWkhF^l`kXUnlR-dgU|5?>S{3YHckN%4T@cu_<) zIldLd^MJdAca__FZltYV5@DNzAt_XnZqd*(@^OepW`gVoxL@PZ!}sI~AMFtZRGg1M ze*n0|S!ItHNlGq)I8S6D?Sb%!3?hTVkZZsdW99Y{w8gVV?5X~hs&UTo;MiCW(L)ep zuSG&um^$YuBvWSOCxCJ!Or3L#BCS0^BoHY~op)psIS#}~B4Mhcf=n%|*c%%}VGeu9 zRCgSb7Nn2ucM4OyVq{pQSV+ShV<}J5F<3_V?Lz5Uxg(9pN{1x%1>A22f*j!xt7~oq zE>eIymg1?<$j?E1LgX>Ne`Isj`(%G-_=8Z7!+sT_WOLoZz8Ee(fkUPf>@JF5c(XIS zk_^v>my^g-;msT2eTnSv!leOlUvJ+rY7Aq)@mr(4+6o8{A40m$LwN@o5W2#{$I-MC z9!Yu^aCPy#$|QD&KVJD&)hAe?tl9p+!J%-l(+l!k6huWWn(c#0=`Ub^1T>}1_A#V1 zAsR&jGzZt&`w^KDgOeD*7TZ3?E+?D$-Z5?L9G@{(ck@zM5osI}CrP~lP2;7o(KI=@ zJ2owmUA%3qJ>oj8$tz(ZW0RZf?_OoMSnHF1 zef?`5675DCY~drK0jRu|j)kFF_q~3TZ=9sZSa+XJU_So-B>kO}8Y+&y_fUXcfcp=6 z4fG8a%jPbKKZxAZGTAQQ4dRZ;-l%*(2zWyc3;{_vRHY%kKsd4ZP;y=|Im{tc#A+&D zz~FO$dk-msuaxl3!rVzvtbv|SmrRV^Nw*hysm0z8_n%&?HQ^ZAQ)07gp zeMam2KBcehXXYtYQMp3nwP11R)u!NJ0bDyMh-<;4+L8QcL98ZH+y$=%Pa`wmfcTQg zF8*v)61&d#Rz1T$;n~$*P2u`rabP#5N>V+bDO?{sk`%UrXdzN4Tpv7@6kZ1L9g$tU zwfbq6$75=ARVRarDB7ESaB~7QRVRZ+ld9Oh*zbU*>SRzYsag-BiO4R#qK15Xz2+IV zo%^Qh3LAn%u*GSTln-bM8-hfzb3xP+DST@P62Tq>v6sj${@1BbSM>=(a*ios_b;D~ zDCNujLEe50LL#BZ6yfwQV1ER(5*<@UlYb!taB=~f;bY1yiew~+av~4&`e}9t{eWVh zDnsd9`W*BzzdEOAo+GW$ltKwG$$Gr5$H{@*8t6lMn$~J zoEgX*pgGZ~%p@l&L6j0HqF<0%WOwo zSfyBxy8nkH*%dgO>|_qaVFhS*+5!iWc56WUgSr%r2yqgTIqAXc~qAUl%?gzAt zWCe<{d=KI*kz(;@1&Xp{W#dHwpe$`O^s;0Jin81UeGPzXXJ#a^Q`~>%pV(=>Zl?aK z`Oqc~r)P2{X#t?w`p{NNu{!f`MFCu^`H7iHj!fEaAKS#4aS8NAp!-c8I%`K$8r^@B zZ4aXA$0TW9KFI#GTSQdJHgU|p2euv1EG659lBEkEP7*1uEXg);j^-C2vjDCvP?Taz zCCPmtb`vS$Pq7tKrJ}EbxkRj35-GMZBpO$KivqkYQ%nq9^ir;D# zVSWagPCzr>YOSWpfkn886Df>uwe}(MX^>9=n(?jH!DM_thx2BzKIl~pGLnt}k)I-~cojB+tp~LH6j_Imx>gV^M2h?rS*H;B9}riF z6fPE9eMB}4mZZl4&BbDC5xHo24b02L9_GWIsBD@R2+LP258T;@nZID1-Ma726^kfW z-x5hm0W^26SVXxdf~X);xO2rK%GCklEh2?GS1qDkz9IOq18DACwTN|x$> z&e)~^dehZDbLljoX;)8soKE)yx1-dwY&!=Hvr(qaHhZ}I#R zIUTn$Pm-Pql4J)ESNY@J9#L<;@e45DOHCgRH%py}Uk5GDH@L?;0Kwk7je zGhe<$4>QUj-X$+j!p9T7B>HNNtf*P=U*(1(tejr4GP3%H^~p7cZ}2>?A+^l&-PL zUtDarOqHY!fTpp^UtDZ&fVfJeNMn`%RMOaI8ZHt5G!9rnsi;|DXLs5ctr*G1F2y)I zBLDv%J+q4M-SUsfeQ3Rj-$#-a5BnYweeS;KK3V^oDQd?!&YxFblTui>;PJ+J_3GAA=6P>-7TXp0-u_aS z(8Y4q3q9p+Y@E8Pmpq&;QNN&Ots2`K&5LRSHT%>hzEoti8!l5f?k zXV9v_$+EvXIz=vHCUr*&g`;)6Y37-!G}aOBOm08YBM#7>S=1y)uaNsC+n?N7RYh(rBZcSf!u@H n)g1+L0s=frO{;p1n&Yao5KWt!hbHoPv@E`pVp)klrnmnGSI&mU delta 7641 zcmZWt30PIt+TLq(I3s6+a2U=xaDW_uP&lY4pdhnMDj+C0F$jd3Oyb-XP46weS?Vfx zUiGR^UCo~QCCO6LGXHMsqx}v3m~-lLo7J)>ORHP|`>nklu0PN7@}2drZ++uhYwvST zKWSOI(y}Is?R_nJL2B1@qa?lPFa5ti*=(vXNRn(Y^>^f^OLo|AQz0Q2AZt+d20uLbOe zJ8YD>$`|9m-5K{YtF&t4opG#W`3v&!*(Ccom?T+EjKVc+Vn1VKJArH@zwvn$5|ey> z2V>aca~?uA8yb+1uI(Gcl4R0Gm81|`5d^c{q_}M#f%lPozOwKGBf`4ALMW1rvW2-2 zKS}aU_DP3^-D~t(9zsEs10aoq{X{|fN=h6;GbZapgHjxTVX8hfD@S0+I8q<_DN|wH zI7%M|C|eM_FVDA40ZVDzZ+$*HLeUO z$Gox{jPb9L^jSul<9S$mL{~ZN8rOPeV@~dytb7i0MjlxubW)U5TJl`0yNM+op4-1qXRGH2CutaGwW4J{hmMXts!x*=DoZ3#SP@bl&U+`!> zs8YVL^AFM!+5UkBM%k+1qMz+ogdA-v zMP3it#^H0UZ6xXwXKO(n9=2ujvl;ze4zc;d5kr9OH_S%aTJS$p@>$58qawPfC8qt6 zucGRrCD1k<@E9TFz6RxKbkFp5WRIBbr@TkAhdi?phuk+-*#K!e>{%#=4=de>!}Oj< ztLH#v2bJuIKJ+S+VZ(GRJ|2^q71WK>VEWBxD=Y+m2G=2MD_@-H zWU>6Y%-Jpuzk6ps|jenueXlU61UZP>AOSa?#*&`i8*hCSDSN{k*YUh6cq|e;?KPhp|HUbqO}E}Qiu*qfg{!%Zbw%oX%is- zNn&FWms8m64Ntt^W^Z@~+1w4h0%$fr4et_0e+2U{Knh=q^=!XxbR?K6m}gh+THPN$ zM7P?8Hb66*tUd{)6@Y6!RbzknggTHtAa)T+y#U!r6}brFERjv*=&f)*Iy*-`W#La{ z$5vV>p+VvGr1u9t-vr$CRI|kJV7f17!g?v-uEs89-f$7Sg0ha^99g*F|Jj__5aIu_JDdDJipgfcUC%$sNn=O3J=a5V z4$6(iBV|HvM)WG`)Y|)O)?(QV^o((|i)`)@x)*aZn3qT7c|t^6X1EKefI)yi;F`tD z@-kp@4gTlx5A$51uTsXv?m@JlZsPL|zrty=Lb>#Mz^+A1|ZHKFv;3+3S7dL(VarxLXc7*fMuArxI-w?EPPHU zaxp)j?_rVr*L*$3An4A4#nYob zgX8d#Ep}bT?*d=O_r$} zOMtOdIy>vg7}oU`?* z;`0jkvFEwB$fX_URn8<@`##hT0j{$KURN}!QrO)cCXVws)HjD}e3pXR9X5*Wz5rqa z;HImIy&fj|^%IC6iTs`VvPUEB*v}RKWeO;Eu#G+ai&L0Z>ZSYA3Dg6D(G7@7S604IAGy)~OXfFH|%v zxsN3E2eiQRLNh4v%^;ow++qCESVw#<9rc1xzuB0Q0ww7dO%+j$g&LU#awy=Q&m+gZ zo+V;*gyv9l4uL)ZxWrxM2rVZgS3q1O(m}Nj4oxM}KM1u3T;E%{qm+(#dg<%6@6dj@ z5OVL@cnqrVLXGVRgRXFOAtaYvSx_Hes*!MYA!IyRjRz4!q;PdHB#p=_5amR|RaqIi zT2%H%^k+>ePhE5~^=ETF=IYBokQ~B1uC4 z_hLK9(h#w`T0-$61-Nfe#$_7$A&CDbawFeYzOv@8ROX$*_fq``{%epWYjF$zVmkjM zE}0`>cTxT#nw`OwUFvJ0Li?kZfIq z@%`jL*a{A=qGcz;C20@f>gHLMaqI-2Re7q0V~4Vpj(Y(XA;2RZkQXALDtfWfF`A5i z3-(JuGrH0-fsDpPqDg=j;3~&ZB2%Mq69YJ6TPHZ=-_87u3Ek{f{>Vf<%x{A7$YNn% zNg4!b7QYFqpv3|GaA=9_=G_w=p@*r1*MdaF_w~mC0C3KF&P|MFTF%8m1!Sx$Mv}aM zW~?|!bh9y5lJWo;i>Z#INXn~!mM@!l@uYBi?#!6v9%iPV#smekXK;1UAB>5IequBh ziVDO8W&9Y0`#K)E0aAaqitnEk5hf+rUj+`kt2%)8&FKeJKfkMb`aY{Qylt{GP&hk!A3cC?oa~$| z=)Hj>?iwzjWVb(Hc*R3^V%Q#-tf@M8q6$#VsY9Hs%z2is)$M^bbktZml1b+NQ}i64 z4ZQOTHh|gb!dmfw{j+!NueeY32MT5G1FF90yjG66f$4XnUd-1_(Q|CPOUE#YzcodF z<|GA*tM5%TU>D&2fZ`nzD7MWXApT9{igi;Ra!ddZnd*rM^nrpW(8!RGgiBQ_907t6qNxP~MOiQQ$)Ere24M+7Tu~SMjG+=81o0~1zGUUs zr#{Z!HbqwNnx|0><~C7f*qB zoJjF5cq3psxj7Hwe~IkoPu0Y+!~Bh!Cm81$wI0pj>Hu+JcP2?v8=x6n9Z*gNH-T73 zq%gQTpq>m~1@SK;yZNTt<*W~ns?$yN`sY!$HwWX*3D8XS`d5&t=pi`ofM%-Kzky7x z2GK=iH(ydmvAtCH1Z(5odfi~VzeqMeS(35=&0xE~NVWw;1Cb)Oc7KuV+aTT`vYS6$ zzr05FM{$lTL3dw1JJHG)hJn2OFqA|=k1HbRZ^3>EXe~OfR8V|0`m>(G2P1>{fIa9R+Z zib(V(*c*TrM5iJiWzJMo4$y+=RGKM>N)W|FitOhq;`#Opi0wp*nC2>l6qEG|n2P{{ z@@wp5FY;xLVw-Ji45}3SahJW4lKnbOk}d<9pI!Eu(;1>nZg6c=(Bmlu28F1|c`3i@N3+R;?3h( z2RAhTneF7On)OG`JAUGFdLmPj<^YQv-)Fy9a>wnU=e1X2ym#VQ#5~*O{Dn&bdCU;^G&u|T5Qk5i#UF9d08yVjn|KsxdNf$+Jx(@>dYoh!i2_+q^`!kCvoafEHrDEssL9?f~-wvFrJmM=QIA*x~t_^pZ8d4xhiGUW)HLGaXWDsRUig2!3MZ5Ncc!fw2&ULG3m$wi<>;PIg z*R7&m)+R9Z#IEP@vnO`-QaBCwh0~4Q^D^dHG2Kd{It|w0bie)%_ByQ;4Q#OHQ_i!C zB63<8?-bC%I$@+gSIM2cFRvrHkF~~W9=KQ=R zhnyb(v6sm8d|Dg%ezI*1!}HMDp+5&&ESco{>9LZu6wns8SjN%f-#}a?Qf$2zi|E6j z$4SzB09$W}YqDSzIo`6*zx@TU?~oW^s{@2Qdza{0p~tKEvYp=1%>$joqef%4#1b_W-Uo z{&A-xUbxPXYE|-`_k*|n}ct8SLf=f(e$;&Dbj}y6`$IctdX7H)=^awLdqK7F}IP`$4ov)qe zVC(sIsCoIhc^>VH^=+e2TTqP_0a{6K8^=+!n?S55Qsi~p*gzgnf%qRHMM-}#4kOL* zNs{CMkk{DxMJ$?cn6KO4VifKF6q6?b&HfgnXxSeiZW1Z%Z!wCNO`D8gz5vbsR-(k1wfkJ3nm(=@; z7uc24Bxxa_Ij;9Dp~R#b{8&WfdhT2l7cZVXjlN=Y{D`Tmfcu;UJEqB3d_^Bvi=Q3< zcS+CeMavjFz`t9ppP#D+;pP}-4+2`!R}Cdps)y=OEqLq&))?x^;^66ckpN(E_!25b-4X{o z(KByJIh$CBd3IF(&o4bQ^6$LmAC(8weiPr1KCS* zqn7rMh?lW0RK9oHA4TdPHGss`+OuqF(!n>cq_bW2iHXgvvl|ne8XM{o#}t-UB$n4T z%xEobZtZMsnK8X){M`CEjU7#O(;I6#>Kf`g5=S?-GC2FYXPfOa)4 zL7pc^wX3@!S*#kD2raL=ki-J@7>Prw(~C7x9qLT4JeHNJ`!Hl}swD~HNwu29^Xg6# zFR8ale6JP`hDcF2kZ4xFCb33M9RhJlT}i^Lo*_}7#tnt2RTq+2qaGsxhsh9^)EN-6 zd9J!Y8Gf5p%P_ETNaD1*6GAr6Q-2wT$ttyQxR~5P;(asQRbL}JmZ;@9@&GncU6>=sAi-@U W-cyf}xTW48aawieicwas9QuFrZqRuE diff --git a/build/stm32f7xx_hal_i2c_ex.lst b/build/stm32f7xx_hal_i2c_ex.lst index 63a41bb..bce1078 100644 --- a/build/stm32f7xx_hal_i2c_ex.lst +++ b/build/stm32f7xx_hal_i2c_ex.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccmx4Y0c.s page 1 +ARM GAS /tmp/ccn09zq7.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** devices contains the following additional features 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** (+) Possibility to disable or enable Analog Noise Filter - ARM GAS /tmp/ccmx4Y0c.s page 2 + ARM GAS /tmp/ccn09zq7.s page 2 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** (+) Use of a configured Digital Noise Filter @@ -118,7 +118,7 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * @brief Configure I2C Analog noise filter. 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. - ARM GAS /tmp/ccmx4Y0c.s page 3 + ARM GAS /tmp/ccn09zq7.s page 3 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * @param AnalogFilter New state of the Analog filter. @@ -178,7 +178,7 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 106:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** 107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** /* Reset I2Cx ANOFF bit */ 108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); - ARM GAS /tmp/ccmx4Y0c.s page 4 + ARM GAS /tmp/ccn09zq7.s page 4 65 .loc 1 108 5 is_stmt 1 view .LVU15 @@ -238,7 +238,7 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 103 0054 0220 movs r0, #2 104 .LVL4: 105 .loc 1 124 12 view .LVU33 - ARM GAS /tmp/ccmx4Y0c.s page 5 + ARM GAS /tmp/ccn09zq7.s page 5 106 0056 7047 bx lr @@ -298,7 +298,7 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 142 0008 202A cmp r2, #32 143 000a 21D1 bne .L7 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** { - ARM GAS /tmp/ccmx4Y0c.s page 6 + ARM GAS /tmp/ccn09zq7.s page 6 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** /* Process Locked */ @@ -358,7 +358,7 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 179 .loc 1 163 25 is_stmt 0 view .LVU60 180 0036 0260 str r2, [r0] 164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** - ARM GAS /tmp/ccmx4Y0c.s page 7 + ARM GAS /tmp/ccn09zq7.s page 7 165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); @@ -418,7 +418,7 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 221 .align 1 222 .global HAL_I2CEx_EnableFastModePlus 223 .syntax unified - ARM GAS /tmp/ccmx4Y0c.s page 8 + ARM GAS /tmp/ccn09zq7.s page 8 224 .thumb @@ -478,7 +478,7 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 239 .loc 1 218 3 is_stmt 1 view .LVU77 219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** 220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ - ARM GAS /tmp/ccmx4Y0c.s page 9 + ARM GAS /tmp/ccn09zq7.s page 9 221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); @@ -538,7 +538,7 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently 233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability - ARM GAS /tmp/ccmx4Y0c.s page 10 + ARM GAS /tmp/ccn09zq7.s page 10 235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter. @@ -598,7 +598,7 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 319 .cfi_def_cfa_offset 0 320 @ sp needed 321 0022 7047 bx lr - ARM GAS /tmp/ccmx4Y0c.s page 11 + ARM GAS /tmp/ccn09zq7.s page 11 322 .L16: @@ -615,20 +615,20 @@ ARM GAS /tmp/ccmx4Y0c.s page 1 334 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" 335 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" 336 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h" - ARM GAS /tmp/ccmx4Y0c.s page 12 + ARM GAS /tmp/ccn09zq7.s page 12 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_i2c_ex.c - /tmp/ccmx4Y0c.s:20 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 $t - /tmp/ccmx4Y0c.s:26 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 HAL_I2CEx_ConfigAnalogFilter - /tmp/ccmx4Y0c.s:118 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 $t - /tmp/ccmx4Y0c.s:124 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 HAL_I2CEx_ConfigDigitalFilter - /tmp/ccmx4Y0c.s:221 .text.HAL_I2CEx_EnableFastModePlus:00000000 $t - /tmp/ccmx4Y0c.s:227 .text.HAL_I2CEx_EnableFastModePlus:00000000 HAL_I2CEx_EnableFastModePlus - /tmp/ccmx4Y0c.s:270 .text.HAL_I2CEx_EnableFastModePlus:00000024 $d - /tmp/ccmx4Y0c.s:276 .text.HAL_I2CEx_DisableFastModePlus:00000000 $t - /tmp/ccmx4Y0c.s:282 .text.HAL_I2CEx_DisableFastModePlus:00000000 HAL_I2CEx_DisableFastModePlus - /tmp/ccmx4Y0c.s:325 .text.HAL_I2CEx_DisableFastModePlus:00000024 $d + /tmp/ccn09zq7.s:20 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 $t + /tmp/ccn09zq7.s:26 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 HAL_I2CEx_ConfigAnalogFilter + /tmp/ccn09zq7.s:118 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 $t + /tmp/ccn09zq7.s:124 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 HAL_I2CEx_ConfigDigitalFilter + /tmp/ccn09zq7.s:221 .text.HAL_I2CEx_EnableFastModePlus:00000000 $t + /tmp/ccn09zq7.s:227 .text.HAL_I2CEx_EnableFastModePlus:00000000 HAL_I2CEx_EnableFastModePlus + /tmp/ccn09zq7.s:270 .text.HAL_I2CEx_EnableFastModePlus:00000024 $d + /tmp/ccn09zq7.s:276 .text.HAL_I2CEx_DisableFastModePlus:00000000 $t + /tmp/ccn09zq7.s:282 .text.HAL_I2CEx_DisableFastModePlus:00000000 HAL_I2CEx_DisableFastModePlus + /tmp/ccn09zq7.s:325 .text.HAL_I2CEx_DisableFastModePlus:00000024 $d NO UNDEFINED SYMBOLS diff --git a/build/stm32f7xx_hal_i2c_ex.o b/build/stm32f7xx_hal_i2c_ex.o index 7e37030263ff752b1436ce4bf3a22c7ddf60956f..ecd01a77ddb183b5be53465b9921544c7f6c075c 100644 GIT binary patch delta 196 zcmV;#06YKqSI}3GAOV=MA#MTznzN7s9RUGrldc0b0Wg!~1CIe1vvdTy0RdiC8JR1BC0^}W&Iw^Jn+#{2+DNX@=lL0DEk}3p~R4PmY& sB0c$&mKvkZWJzsx#*)d7Kyt<8Odwe?d7`$uM2;E*Lm<#$FaTo$0M+VEDF6Tf diff --git a/build/stm32f7xx_hal_msp.lst b/build/stm32f7xx_hal_msp.lst index f115fde..99e7c8a 100644 --- a/build/stm32f7xx_hal_msp.lst +++ b/build/stm32f7xx_hal_msp.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccR0YjlF.s page 1 +ARM GAS /tmp/ccrhuFOa.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 29:Src/stm32f7xx_hal_msp.c **** 30:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TD */ 31:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccR0YjlF.s page 2 + ARM GAS /tmp/ccrhuFOa.s page 2 32:Src/stm32f7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ @@ -118,7 +118,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 41 0004 1A6C ldr r2, [r3, #64] 42 0006 42F08052 orr r2, r2, #268435456 43 000a 1A64 str r2, [r3, #64] - ARM GAS /tmp/ccR0YjlF.s page 3 + ARM GAS /tmp/ccrhuFOa.s page 3 44 .loc 1 72 3 view .LVU4 @@ -178,7 +178,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 83:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP Initialization 84:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example 85:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer - ARM GAS /tmp/ccR0YjlF.s page 4 + ARM GAS /tmp/ccrhuFOa.s page 4 86:Src/stm32f7xx_hal_msp.c **** * @retval None @@ -238,7 +238,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 111:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 112:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 113:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccR0YjlF.s page 5 + ARM GAS /tmp/ccrhuFOa.s page 5 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2; @@ -298,7 +298,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 130 .cfi_def_cfa_offset 12 131 @ sp needed 132 0020 30BD pop {r4, r5, pc} - ARM GAS /tmp/ccR0YjlF.s page 6 + ARM GAS /tmp/ccrhuFOa.s page 6 133 .LVL2: @@ -358,7 +358,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 172 0048 1A6B ldr r2, [r3, #48] 173 004a 42F00102 orr r2, r2, #1 174 004e 1A63 str r2, [r3, #48] - ARM GAS /tmp/ccR0YjlF.s page 7 + ARM GAS /tmp/ccrhuFOa.s page 7 100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); @@ -418,7 +418,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 213 .loc 1 114 5 is_stmt 1 view .LVU55 114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - ARM GAS /tmp/ccR0YjlF.s page 8 + ARM GAS /tmp/ccrhuFOa.s page 8 214 .loc 1 114 25 is_stmt 0 view .LVU56 @@ -478,7 +478,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 254 .LVL9: 255 .L10: 137:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccR0YjlF.s page 9 + ARM GAS /tmp/ccrhuFOa.s page 9 256 .loc 1 137 5 view .LVU71 @@ -538,7 +538,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 145:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 295 .loc 1 145 5 is_stmt 1 view .LVU87 146:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccR0YjlF.s page 10 + ARM GAS /tmp/ccrhuFOa.s page 10 296 .loc 1 146 5 view .LVU88 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 340 @ args = 0, pretend = 0, frame = 0 341 @ frame_needed = 0, uses_anonymous_args = 0 342 .loc 1 165 1 is_stmt 0 view .LVU94 - ARM GAS /tmp/ccR0YjlF.s page 11 + ARM GAS /tmp/ccrhuFOa.s page 11 343 0000 08B5 push {r3, lr} @@ -658,7 +658,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 201:Src/stm32f7xx_hal_msp.c **** { 202:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 0 */ 203:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccR0YjlF.s page 12 + ARM GAS /tmp/ccrhuFOa.s page 12 204:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 0 */ @@ -718,7 +718,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 387 .LVL20: 388 0036 EBE7 b .L13 389 .LVL21: - ARM GAS /tmp/ccR0YjlF.s page 13 + ARM GAS /tmp/ccrhuFOa.s page 13 390 .L18: @@ -778,7 +778,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 434 .cfi_def_cfa_offset 20 435 .cfi_offset 4, -20 436 .cfi_offset 5, -16 - ARM GAS /tmp/ccR0YjlF.s page 14 + ARM GAS /tmp/ccrhuFOa.s page 14 437 .cfi_offset 6, -12 @@ -838,7 +838,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); 260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration 261:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0 - ARM GAS /tmp/ccR0YjlF.s page 15 + ARM GAS /tmp/ccrhuFOa.s page 15 262:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1 @@ -898,7 +898,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 489 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 490 .LVL29: 250:Src/stm32f7xx_hal_msp.c **** { - ARM GAS /tmp/ccR0YjlF.s page 16 + ARM GAS /tmp/ccrhuFOa.s page 16 491 .loc 1 250 8 discriminator 1 view .LVU127 @@ -958,7 +958,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 530 005c 1A6B ldr r2, [r3, #48] 531 005e 42F00802 orr r2, r2, #8 532 0062 1A63 str r2, [r3, #48] - ARM GAS /tmp/ccR0YjlF.s page 17 + ARM GAS /tmp/ccrhuFOa.s page 17 259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 570 008c 0423 movs r3, #4 571 008e 2793 str r3, [sp, #156] 277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; - ARM GAS /tmp/ccR0YjlF.s page 18 + ARM GAS /tmp/ccrhuFOa.s page 18 572 .loc 1 277 5 is_stmt 1 view .LVU160 @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 292:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP De-Initialization 293:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example 294:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer - ARM GAS /tmp/ccR0YjlF.s page 19 + ARM GAS /tmp/ccrhuFOa.s page 19 295:Src/stm32f7xx_hal_msp.c **** * @retval None @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 305:Src/stm32f7xx_hal_msp.c **** 640 .loc 1 305 5 is_stmt 1 view .LVU177 641 000c 084A ldr r2, .L33+4 - ARM GAS /tmp/ccR0YjlF.s page 20 + ARM GAS /tmp/ccrhuFOa.s page 20 642 000e 536C ldr r3, [r2, #68] @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 686 .cfi_def_cfa_offset 4 687 .cfi_offset 14, -4 688 0002 87B0 sub sp, sp, #28 - ARM GAS /tmp/ccR0YjlF.s page 21 + ARM GAS /tmp/ccrhuFOa.s page 21 689 .LCFI13: @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 370:Src/stm32f7xx_hal_msp.c **** } 371:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM10) 708 .loc 1 371 8 is_stmt 1 view .LVU191 - ARM GAS /tmp/ccR0YjlF.s page 22 + ARM GAS /tmp/ccrhuFOa.s page 22 709 .loc 1 371 10 is_stmt 0 view .LVU192 @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 741 .LVL43: 394:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn); 742 .loc 1 394 5 is_stmt 1 view .LVU203 - ARM GAS /tmp/ccR0YjlF.s page 23 + ARM GAS /tmp/ccrhuFOa.s page 23 743 0042 1A20 movs r0, #26 @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 782 .loc 1 352 5 view .LVU214 783 0064 1D4B ldr r3, .L46+20 784 0066 5A6C ldr r2, [r3, #68] - ARM GAS /tmp/ccR0YjlF.s page 24 + ARM GAS /tmp/ccrhuFOa.s page 24 785 0068 42F00102 orr r2, r2, #1 @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 827 .L45: 377:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */ 828 .loc 1 377 5 view .LVU227 - ARM GAS /tmp/ccR0YjlF.s page 25 + ARM GAS /tmp/ccrhuFOa.s page 25 829 .LBB17: @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 877 .LVL55: 878 .LFB1189: 401:Src/stm32f7xx_hal_msp.c **** - ARM GAS /tmp/ccR0YjlF.s page 26 + ARM GAS /tmp/ccrhuFOa.s page 26 402:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 909 001a 9342 cmp r3, r2 910 001c 1AD0 beq .L54 426:Src/stm32f7xx_hal_msp.c **** { - ARM GAS /tmp/ccR0YjlF.s page 27 + ARM GAS /tmp/ccrhuFOa.s page 27 427:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspPostInit 0 */ @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 923 @ sp needed 924 0026 5DF804FB ldr pc, [sp], #4 925 .LVL57: - ARM GAS /tmp/ccR0YjlF.s page 28 + ARM GAS /tmp/ccrhuFOa.s page 28 926 .L53: @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 964 .LVL59: 965 0052 E7E7 b .L48 966 .LVL60: - ARM GAS /tmp/ccR0YjlF.s page 29 + ARM GAS /tmp/ccrhuFOa.s page 29 967 .L54: @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 440:Src/stm32f7xx_hal_msp.c **** 1005 .loc 1 440 5 is_stmt 0 view .LVU280 1006 007e FFF7FEFF bl HAL_GPIO_Init - ARM GAS /tmp/ccR0YjlF.s page 30 + ARM GAS /tmp/ccrhuFOa.s page 30 1007 .LVL62: @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 1045 .loc 1 461 5 is_stmt 0 view .LVU296 1046 00aa FFF7FEFF bl HAL_GPIO_Init 1047 .LVL65: - ARM GAS /tmp/ccR0YjlF.s page 31 + ARM GAS /tmp/ccrhuFOa.s page 31 1048 .loc 1 468 1 view .LVU297 @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 484:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspDeInit 1 */ 485:Src/stm32f7xx_hal_msp.c **** 486:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM4_MspDeInit 1 */ - ARM GAS /tmp/ccR0YjlF.s page 32 + ARM GAS /tmp/ccrhuFOa.s page 32 487:Src/stm32f7xx_hal_msp.c **** } @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 526:Src/stm32f7xx_hal_msp.c **** } 527:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM11) 1104 .loc 1 527 8 is_stmt 1 view .LVU309 - ARM GAS /tmp/ccR0YjlF.s page 33 + ARM GAS /tmp/ccrhuFOa.s page 33 1105 .loc 1 527 10 is_stmt 0 view .LVU310 @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 505:Src/stm32f7xx_hal_msp.c **** 1142 .loc 1 505 5 view .LVU318 1143 0052 02F59A32 add r2, r2, #78848 - ARM GAS /tmp/ccR0YjlF.s page 34 + ARM GAS /tmp/ccrhuFOa.s page 34 1144 0056 536C ldr r3, [r2, #68] @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 549:Src/stm32f7xx_hal_msp.c **** */ 550:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart) 551:Src/stm32f7xx_hal_msp.c **** { - ARM GAS /tmp/ccR0YjlF.s page 35 + ARM GAS /tmp/ccrhuFOa.s page 35 1189 .loc 1 551 1 is_stmt 1 view -0 @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 568:Src/stm32f7xx_hal_msp.c **** 569:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */ 570:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_UART8_CLK_ENABLE(); - ARM GAS /tmp/ccR0YjlF.s page 36 + ARM GAS /tmp/ccrhuFOa.s page 36 571:Src/stm32f7xx_hal_msp.c **** @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 1253 .loc 1 570 5 view .LVU342 570:Src/stm32f7xx_hal_msp.c **** 1254 .loc 1 570 5 view .LVU343 - ARM GAS /tmp/ccR0YjlF.s page 37 + ARM GAS /tmp/ccrhuFOa.s page 37 1255 0034 124B ldr r3, .L77+4 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 580:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8; 1294 .loc 1 580 5 is_stmt 1 view .LVU359 580:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8; - ARM GAS /tmp/ccR0YjlF.s page 38 + ARM GAS /tmp/ccrhuFOa.s page 38 1295 .loc 1 580 27 is_stmt 0 view .LVU360 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 1338 .LCFI25: 1339 .cfi_def_cfa_offset 8 1340 .cfi_offset 3, -8 - ARM GAS /tmp/ccR0YjlF.s page 39 + ARM GAS /tmp/ccrhuFOa.s page 39 1341 .cfi_offset 14, -4 @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccR0YjlF.s page 1 1372 0020 007C0040 .word 1073773568 1373 0024 00380240 .word 1073887232 1374 0028 00100240 .word 1073876992 - ARM GAS /tmp/ccR0YjlF.s page 40 + ARM GAS /tmp/ccrhuFOa.s page 40 1375 .cfi_endproc @@ -2363,41 +2363,41 @@ ARM GAS /tmp/ccR0YjlF.s page 1 1395 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h" 1396 .file 18 "Inc/main.h" 1397 .file 19 "" - ARM GAS /tmp/ccR0YjlF.s page 41 + ARM GAS /tmp/ccrhuFOa.s page 41 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_msp.c - /tmp/ccR0YjlF.s:20 .text.HAL_MspInit:00000000 $t - /tmp/ccR0YjlF.s:26 .text.HAL_MspInit:00000000 HAL_MspInit - /tmp/ccR0YjlF.s:76 .text.HAL_MspInit:0000002c $d - /tmp/ccR0YjlF.s:81 .text.HAL_ADC_MspInit:00000000 $t - /tmp/ccR0YjlF.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit - /tmp/ccR0YjlF.s:318 .text.HAL_ADC_MspInit:000000f4 $d - /tmp/ccR0YjlF.s:329 .text.HAL_ADC_MspDeInit:00000000 $t - /tmp/ccR0YjlF.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit - /tmp/ccR0YjlF.s:408 .text.HAL_ADC_MspDeInit:00000050 $d - /tmp/ccR0YjlF.s:418 .text.HAL_SD_MspInit:00000000 $t - /tmp/ccR0YjlF.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit - /tmp/ccR0YjlF.s:600 .text.HAL_SD_MspInit:000000a8 $d - /tmp/ccR0YjlF.s:608 .text.HAL_SD_MspDeInit:00000000 $t - /tmp/ccR0YjlF.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit - /tmp/ccR0YjlF.s:662 .text.HAL_SD_MspDeInit:0000002c $d - /tmp/ccR0YjlF.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t - /tmp/ccR0YjlF.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit - /tmp/ccR0YjlF.s:860 .text.HAL_TIM_Base_MspInit:000000c8 $d - /tmp/ccR0YjlF.s:870 .text.HAL_TIM_MspPostInit:00000000 $t - /tmp/ccR0YjlF.s:876 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit - /tmp/ccR0YjlF.s:1053 .text.HAL_TIM_MspPostInit:000000b0 $d - /tmp/ccR0YjlF.s:1063 .text.HAL_TIM_Base_MspDeInit:00000000 $t - /tmp/ccR0YjlF.s:1069 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit - /tmp/ccR0YjlF.s:1171 .text.HAL_TIM_Base_MspDeInit:0000007c $d - /tmp/ccR0YjlF.s:1180 .text.HAL_UART_MspInit:00000000 $t - /tmp/ccR0YjlF.s:1186 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit - /tmp/ccR0YjlF.s:1316 .text.HAL_UART_MspInit:0000007c $d - /tmp/ccR0YjlF.s:1323 .text.HAL_UART_MspDeInit:00000000 $t - /tmp/ccR0YjlF.s:1329 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit - /tmp/ccR0YjlF.s:1372 .text.HAL_UART_MspDeInit:00000020 $d + /tmp/ccrhuFOa.s:20 .text.HAL_MspInit:00000000 $t + /tmp/ccrhuFOa.s:26 .text.HAL_MspInit:00000000 HAL_MspInit + /tmp/ccrhuFOa.s:76 .text.HAL_MspInit:0000002c $d + /tmp/ccrhuFOa.s:81 .text.HAL_ADC_MspInit:00000000 $t + /tmp/ccrhuFOa.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit + /tmp/ccrhuFOa.s:318 .text.HAL_ADC_MspInit:000000f4 $d + /tmp/ccrhuFOa.s:329 .text.HAL_ADC_MspDeInit:00000000 $t + /tmp/ccrhuFOa.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit + /tmp/ccrhuFOa.s:408 .text.HAL_ADC_MspDeInit:00000050 $d + /tmp/ccrhuFOa.s:418 .text.HAL_SD_MspInit:00000000 $t + /tmp/ccrhuFOa.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit + /tmp/ccrhuFOa.s:600 .text.HAL_SD_MspInit:000000a8 $d + /tmp/ccrhuFOa.s:608 .text.HAL_SD_MspDeInit:00000000 $t + /tmp/ccrhuFOa.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit + /tmp/ccrhuFOa.s:662 .text.HAL_SD_MspDeInit:0000002c $d + /tmp/ccrhuFOa.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t + /tmp/ccrhuFOa.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit + /tmp/ccrhuFOa.s:860 .text.HAL_TIM_Base_MspInit:000000c8 $d + /tmp/ccrhuFOa.s:870 .text.HAL_TIM_MspPostInit:00000000 $t + /tmp/ccrhuFOa.s:876 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit + /tmp/ccrhuFOa.s:1053 .text.HAL_TIM_MspPostInit:000000b0 $d + /tmp/ccrhuFOa.s:1063 .text.HAL_TIM_Base_MspDeInit:00000000 $t + /tmp/ccrhuFOa.s:1069 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit + /tmp/ccrhuFOa.s:1171 .text.HAL_TIM_Base_MspDeInit:0000007c $d + /tmp/ccrhuFOa.s:1180 .text.HAL_UART_MspInit:00000000 $t + /tmp/ccrhuFOa.s:1186 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit + /tmp/ccrhuFOa.s:1316 .text.HAL_UART_MspInit:0000007c $d + /tmp/ccrhuFOa.s:1323 .text.HAL_UART_MspDeInit:00000000 $t + /tmp/ccrhuFOa.s:1329 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit + /tmp/ccrhuFOa.s:1372 .text.HAL_UART_MspDeInit:00000020 $d UNDEFINED SYMBOLS HAL_GPIO_Init diff --git a/build/stm32f7xx_hal_pwr.lst b/build/stm32f7xx_hal_pwr.lst index c6b6bf8..28766ee 100644 --- a/build/stm32f7xx_hal_pwr.lst +++ b/build/stm32f7xx_hal_pwr.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccO7avbH.s page 1 +ARM GAS /tmp/ccHX3azn.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** */ 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /** @defgroup PWR PWR - ARM GAS /tmp/ccO7avbH.s page 2 + ARM GAS /tmp/ccHX3azn.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @brief PWR HAL module driver @@ -118,7 +118,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** To enable access to the RTC Domain and RTC registers, proceed as follows: 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) Enable the Power Controller (PWR) APB1 interface clock using the 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** __HAL_RCC_PWR_CLK_ENABLE() macro. - ARM GAS /tmp/ccO7avbH.s page 3 + ARM GAS /tmp/ccHX3azn.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. @@ -178,7 +178,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** { 60 .loc 1 113 1 is_stmt 1 view -0 61 .cfi_startproc - ARM GAS /tmp/ccO7avbH.s page 4 + ARM GAS /tmp/ccHX3azn.s page 4 62 @ args = 0, pretend = 0, frame = 0 @@ -238,7 +238,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 102 .L8: 103 000c 00700040 .word 1073770496 104 .cfi_endproc - ARM GAS /tmp/ccO7avbH.s page 5 + ARM GAS /tmp/ccHX3azn.s page 5 105 .LFE143: @@ -298,7 +298,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 174:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) Entry: 175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLE 176:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** functions with - ARM GAS /tmp/ccO7avbH.s page 6 + ARM GAS /tmp/ccHX3azn.s page 6 177:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction @@ -358,7 +358,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** Wakeup event, a tamper event or a time-stamp event, without depending on 232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** an external interrupt (Auto-wakeup mode). 233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** - ARM GAS /tmp/ccO7avbH.s page 7 + ARM GAS /tmp/ccHX3azn.s page 7 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) RTC auto-wakeup (AWU) from the Stop and Standby modes @@ -418,7 +418,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 135 0016 5A60 str r2, [r3, #4] 270:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT(); 136 .loc 1 270 3 view .LVU15 - ARM GAS /tmp/ccO7avbH.s page 8 + ARM GAS /tmp/ccHX3azn.s page 8 137 0018 1A68 ldr r2, [r3] @@ -478,7 +478,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 174 0054 4368 ldr r3, [r0, #4] 175 .loc 1 287 5 view .LVU28 176 0056 13F0010F tst r3, #1 - ARM GAS /tmp/ccO7avbH.s page 9 + ARM GAS /tmp/ccHX3azn.s page 9 177 005a 04D0 beq .L13 @@ -538,7 +538,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 217 @ args = 0, pretend = 0, frame = 0 218 @ frame_needed = 0, uses_anonymous_args = 0 219 @ link register save eliminated. - ARM GAS /tmp/ccO7avbH.s page 10 + ARM GAS /tmp/ccHX3azn.s page 10 304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Enable the power voltage detector */ @@ -598,7 +598,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 264 .global HAL_PWR_EnableWakeUpPin 265 .syntax unified 266 .thumb - ARM GAS /tmp/ccO7avbH.s page 11 + ARM GAS /tmp/ccHX3azn.s page 11 267 .thumb_func @@ -658,7 +658,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 293 .L25: 294 001a 00BF .align 2 295 .L24: - ARM GAS /tmp/ccO7avbH.s page 12 + ARM GAS /tmp/ccHX3azn.s page 12 296 001c 00700040 .word 1073770496 @@ -718,7 +718,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 334 .thumb 335 .thumb_func 337 HAL_PWR_EnterSLEEPMode: - ARM GAS /tmp/ccO7avbH.s page 13 + ARM GAS /tmp/ccHX3azn.s page 13 338 .LVL4: @@ -778,7 +778,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file - ARM GAS /tmp/ccO7avbH.s page 14 + ARM GAS /tmp/ccHX3azn.s page 14 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 @@ -838,7 +838,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccO7avbH.s page 15 + ARM GAS /tmp/ccHX3azn.s page 15 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED @@ -898,7 +898,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccO7avbH.s page 16 + ARM GAS /tmp/ccHX3azn.s page 16 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccO7avbH.s page 17 + ARM GAS /tmp/ccHX3azn.s page 17 175:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value - ARM GAS /tmp/ccO7avbH.s page 18 + ARM GAS /tmp/ccHX3azn.s page 18 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccO7avbH.s page 19 + ARM GAS /tmp/ccHX3azn.s page 19 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); - ARM GAS /tmp/ccO7avbH.s page 20 + ARM GAS /tmp/ccHX3azn.s page 20 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccO7avbH.s page 21 + ARM GAS /tmp/ccHX3azn.s page 21 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value - ARM GAS /tmp/ccO7avbH.s page 22 + ARM GAS /tmp/ccHX3azn.s page 22 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) - ARM GAS /tmp/ccO7avbH.s page 23 + ARM GAS /tmp/ccHX3azn.s page 23 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccO7avbH.s page 24 + ARM GAS /tmp/ccHX3azn.s page 24 574:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure - ARM GAS /tmp/ccO7avbH.s page 25 + ARM GAS /tmp/ccHX3azn.s page 25 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); - ARM GAS /tmp/ccO7avbH.s page 26 + ARM GAS /tmp/ccHX3azn.s page 26 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set - ARM GAS /tmp/ccO7avbH.s page 27 + ARM GAS /tmp/ccHX3azn.s page 27 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else - ARM GAS /tmp/ccO7avbH.s page 28 + ARM GAS /tmp/ccHX3azn.s page 28 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 858:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccO7avbH.s page 29 + ARM GAS /tmp/ccHX3azn.s page 29 859:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 384 0012 0129 cmp r1, #1 385 0014 03D0 beq .L32 404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** { - ARM GAS /tmp/ccO7avbH.s page 30 + ARM GAS /tmp/ccHX3azn.s page 30 405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Request Wait For Interrupt */ @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /** 418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @brief Enters Stop mode. 419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode. - ARM GAS /tmp/ccO7avbH.s page 31 + ARM GAS /tmp/ccHX3azn.s page 31 420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event, @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** PWR->CR1 = tmpreg; 450 .loc 1 453 3 is_stmt 1 view .LVU79 451 .loc 1 453 12 is_stmt 0 view .LVU80 - ARM GAS /tmp/ccO7avbH.s page 32 + ARM GAS /tmp/ccHX3azn.s page 32 452 000a 1360 str r3, [r2] @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 493 0020 08D0 beq .L38 464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** { 465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Request Wait For Interrupt */ - ARM GAS /tmp/ccO7avbH.s page 33 + ARM GAS /tmp/ccHX3azn.s page 33 466:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** __WFI(); @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 536 .section .text.HAL_PWR_EnterSTANDBYMode,"ax",%progbits 537 .align 1 538 .global HAL_PWR_EnterSTANDBYMode - ARM GAS /tmp/ccO7avbH.s page 34 + ARM GAS /tmp/ccHX3azn.s page 34 539 .syntax unified @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** } 569 .loc 1 503 1 is_stmt 0 view .LVU108 570 .thumb - ARM GAS /tmp/ccO7avbH.s page 35 + ARM GAS /tmp/ccHX3azn.s page 35 571 .syntax unified @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 598 .LFE153: 600 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits 601 .align 1 - ARM GAS /tmp/ccO7avbH.s page 36 + ARM GAS /tmp/ccHX3azn.s page 36 602 .global HAL_PWR_PVD_IRQHandler @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 650 .thumb_func 652 HAL_PWR_EnableSleepOnExit: 653 .LFB154: - ARM GAS /tmp/ccO7avbH.s page 37 + ARM GAS /tmp/ccHX3azn.s page 37 533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 556:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Clear SLEEPONEXIT bit of Cortex System Control Register */ 557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); 687 .loc 1 557 3 view .LVU123 - ARM GAS /tmp/ccO7avbH.s page 38 + ARM GAS /tmp/ccHX3azn.s page 38 688 0000 024A ldr r2, .L55 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccO7avbH.s page 1 732 .syntax unified 733 .thumb 734 .thumb_func - ARM GAS /tmp/ccO7avbH.s page 39 + ARM GAS /tmp/ccHX3azn.s page 39 736 HAL_PWR_DisableSEVOnPend: @@ -2320,60 +2320,60 @@ ARM GAS /tmp/ccO7avbH.s page 1 761 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" 762 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h" 763 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - ARM GAS /tmp/ccO7avbH.s page 40 + ARM GAS /tmp/ccHX3azn.s page 40 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_pwr.c - /tmp/ccO7avbH.s:20 .text.HAL_PWR_DeInit:00000000 $t - /tmp/ccO7avbH.s:26 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit - /tmp/ccO7avbH.s:47 .text.HAL_PWR_DeInit:00000014 $d - /tmp/ccO7avbH.s:52 .text.HAL_PWR_EnableBkUpAccess:00000000 $t - /tmp/ccO7avbH.s:58 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess - /tmp/ccO7avbH.s:75 .text.HAL_PWR_EnableBkUpAccess:0000000c $d - /tmp/ccO7avbH.s:80 .text.HAL_PWR_DisableBkUpAccess:00000000 $t - /tmp/ccO7avbH.s:86 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess - /tmp/ccO7avbH.s:103 .text.HAL_PWR_DisableBkUpAccess:0000000c $d - /tmp/ccO7avbH.s:108 .text.HAL_PWR_ConfigPVD:00000000 $t - /tmp/ccO7avbH.s:114 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD - /tmp/ccO7avbH.s:201 .text.HAL_PWR_ConfigPVD:0000007c $d - /tmp/ccO7avbH.s:207 .text.HAL_PWR_EnablePVD:00000000 $t - /tmp/ccO7avbH.s:213 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD - /tmp/ccO7avbH.s:230 .text.HAL_PWR_EnablePVD:0000000c $d - /tmp/ccO7avbH.s:235 .text.HAL_PWR_DisablePVD:00000000 $t - /tmp/ccO7avbH.s:241 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD - /tmp/ccO7avbH.s:258 .text.HAL_PWR_DisablePVD:0000000c $d - /tmp/ccO7avbH.s:263 .text.HAL_PWR_EnableWakeUpPin:00000000 $t - /tmp/ccO7avbH.s:269 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin - /tmp/ccO7avbH.s:296 .text.HAL_PWR_EnableWakeUpPin:0000001c $d - /tmp/ccO7avbH.s:301 .text.HAL_PWR_DisableWakeUpPin:00000000 $t - /tmp/ccO7avbH.s:307 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin - /tmp/ccO7avbH.s:326 .text.HAL_PWR_DisableWakeUpPin:0000000c $d - /tmp/ccO7avbH.s:331 .text.HAL_PWR_EnterSLEEPMode:00000000 $t - /tmp/ccO7avbH.s:337 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode - /tmp/ccO7avbH.s:415 .text.HAL_PWR_EnterSLEEPMode:00000024 $d - /tmp/ccO7avbH.s:420 .text.HAL_PWR_EnterSTOPMode:00000000 $t - /tmp/ccO7avbH.s:426 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode - /tmp/ccO7avbH.s:531 .text.HAL_PWR_EnterSTOPMode:00000038 $d - /tmp/ccO7avbH.s:537 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t - /tmp/ccO7avbH.s:543 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode - /tmp/ccO7avbH.s:576 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d - /tmp/ccO7avbH.s:582 .text.HAL_PWR_PVDCallback:00000000 $t - /tmp/ccO7avbH.s:588 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback - /tmp/ccO7avbH.s:601 .text.HAL_PWR_PVD_IRQHandler:00000000 $t - /tmp/ccO7avbH.s:607 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler - /tmp/ccO7avbH.s:641 .text.HAL_PWR_PVD_IRQHandler:0000001c $d - /tmp/ccO7avbH.s:646 .text.HAL_PWR_EnableSleepOnExit:00000000 $t - /tmp/ccO7avbH.s:652 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit - /tmp/ccO7avbH.s:669 .text.HAL_PWR_EnableSleepOnExit:0000000c $d - /tmp/ccO7avbH.s:674 .text.HAL_PWR_DisableSleepOnExit:00000000 $t - /tmp/ccO7avbH.s:680 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit - /tmp/ccO7avbH.s:697 .text.HAL_PWR_DisableSleepOnExit:0000000c $d - /tmp/ccO7avbH.s:702 .text.HAL_PWR_EnableSEVOnPend:00000000 $t - /tmp/ccO7avbH.s:708 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend - /tmp/ccO7avbH.s:725 .text.HAL_PWR_EnableSEVOnPend:0000000c $d - /tmp/ccO7avbH.s:730 .text.HAL_PWR_DisableSEVOnPend:00000000 $t - /tmp/ccO7avbH.s:736 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend - /tmp/ccO7avbH.s:753 .text.HAL_PWR_DisableSEVOnPend:0000000c $d + /tmp/ccHX3azn.s:20 .text.HAL_PWR_DeInit:00000000 $t + /tmp/ccHX3azn.s:26 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit + /tmp/ccHX3azn.s:47 .text.HAL_PWR_DeInit:00000014 $d + /tmp/ccHX3azn.s:52 .text.HAL_PWR_EnableBkUpAccess:00000000 $t + /tmp/ccHX3azn.s:58 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess + /tmp/ccHX3azn.s:75 .text.HAL_PWR_EnableBkUpAccess:0000000c $d + /tmp/ccHX3azn.s:80 .text.HAL_PWR_DisableBkUpAccess:00000000 $t + /tmp/ccHX3azn.s:86 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess + /tmp/ccHX3azn.s:103 .text.HAL_PWR_DisableBkUpAccess:0000000c $d + /tmp/ccHX3azn.s:108 .text.HAL_PWR_ConfigPVD:00000000 $t + /tmp/ccHX3azn.s:114 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD + /tmp/ccHX3azn.s:201 .text.HAL_PWR_ConfigPVD:0000007c $d + /tmp/ccHX3azn.s:207 .text.HAL_PWR_EnablePVD:00000000 $t + /tmp/ccHX3azn.s:213 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD + /tmp/ccHX3azn.s:230 .text.HAL_PWR_EnablePVD:0000000c $d + /tmp/ccHX3azn.s:235 .text.HAL_PWR_DisablePVD:00000000 $t + /tmp/ccHX3azn.s:241 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD + /tmp/ccHX3azn.s:258 .text.HAL_PWR_DisablePVD:0000000c $d + /tmp/ccHX3azn.s:263 .text.HAL_PWR_EnableWakeUpPin:00000000 $t + /tmp/ccHX3azn.s:269 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin + /tmp/ccHX3azn.s:296 .text.HAL_PWR_EnableWakeUpPin:0000001c $d + /tmp/ccHX3azn.s:301 .text.HAL_PWR_DisableWakeUpPin:00000000 $t + /tmp/ccHX3azn.s:307 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin + /tmp/ccHX3azn.s:326 .text.HAL_PWR_DisableWakeUpPin:0000000c $d + /tmp/ccHX3azn.s:331 .text.HAL_PWR_EnterSLEEPMode:00000000 $t + /tmp/ccHX3azn.s:337 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode + /tmp/ccHX3azn.s:415 .text.HAL_PWR_EnterSLEEPMode:00000024 $d + /tmp/ccHX3azn.s:420 .text.HAL_PWR_EnterSTOPMode:00000000 $t + /tmp/ccHX3azn.s:426 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode + /tmp/ccHX3azn.s:531 .text.HAL_PWR_EnterSTOPMode:00000038 $d + /tmp/ccHX3azn.s:537 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t + /tmp/ccHX3azn.s:543 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode + /tmp/ccHX3azn.s:576 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d + /tmp/ccHX3azn.s:582 .text.HAL_PWR_PVDCallback:00000000 $t + /tmp/ccHX3azn.s:588 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback + /tmp/ccHX3azn.s:601 .text.HAL_PWR_PVD_IRQHandler:00000000 $t + /tmp/ccHX3azn.s:607 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler + /tmp/ccHX3azn.s:641 .text.HAL_PWR_PVD_IRQHandler:0000001c $d + /tmp/ccHX3azn.s:646 .text.HAL_PWR_EnableSleepOnExit:00000000 $t + /tmp/ccHX3azn.s:652 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit + /tmp/ccHX3azn.s:669 .text.HAL_PWR_EnableSleepOnExit:0000000c $d + /tmp/ccHX3azn.s:674 .text.HAL_PWR_DisableSleepOnExit:00000000 $t + /tmp/ccHX3azn.s:680 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit + /tmp/ccHX3azn.s:697 .text.HAL_PWR_DisableSleepOnExit:0000000c $d + /tmp/ccHX3azn.s:702 .text.HAL_PWR_EnableSEVOnPend:00000000 $t + /tmp/ccHX3azn.s:708 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend + /tmp/ccHX3azn.s:725 .text.HAL_PWR_EnableSEVOnPend:0000000c $d + /tmp/ccHX3azn.s:730 .text.HAL_PWR_DisableSEVOnPend:00000000 $t + /tmp/ccHX3azn.s:736 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend + /tmp/ccHX3azn.s:753 .text.HAL_PWR_DisableSEVOnPend:0000000c $d NO UNDEFINED SYMBOLS diff --git a/build/stm32f7xx_hal_pwr.o b/build/stm32f7xx_hal_pwr.o index ba000d53000221e0987df28b80a9cd992903d417..b694d135178164fab4e4f9eacab3d3ecc3484da0 100644 GIT binary patch delta 240 zcmZ3J)si(qfpN}8MFl3tg`1t2WEh!#vQAE5?qj;iI{5>00@G*K%|R@WnV6ojPBv#( zW%|cDIgVY9k$G}0yBpI(*2zcN`xq~74&i8JX6)R2i~A(6j)$X9d_Z_mylY-!Qch}k zVs>h1K|p36gMLPSZmNE2X;FSbqP|ONadt_5!Q}grGMj~^GQ}BFCf6FiXUv(LYgEqY zGWn^IKjW6krpEq2b}Nt!nS9k)n~`HOqlq%3(qvT=bw;1bz9#BSceEy#nW!*jFVL{?*WvPMKX5*Y?Hk*PXXMM4Kq&xY?ECxPXTBG!Oz5 IER*gu7G!Hv6#xJL diff --git a/build/stm32f7xx_hal_pwr_ex.lst b/build/stm32f7xx_hal_pwr_ex.lst index acebe03..c1d107f 100644 --- a/build/stm32f7xx_hal_pwr_ex.lst +++ b/build/stm32f7xx_hal_pwr_ex.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccuaURzG.s page 1 +ARM GAS /tmp/ccOKVCkl.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief PWR HAL module driver - ARM GAS /tmp/ccuaURzG.s page 2 + ARM GAS /tmp/ccOKVCkl.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{ @@ -118,7 +118,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** -@- Refer to the description of Read protection (RDP) in the Flash 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** programming manual. 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** - ARM GAS /tmp/ccuaURzG.s page 3 + ARM GAS /tmp/ccOKVCkl.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) The main internal regulator can be configured to have a tradeoff between @@ -178,7 +178,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 35 .cfi_offset 4, -8 36 .cfi_offset 14, -4 136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0; - ARM GAS /tmp/ccuaURzG.s page 4 + ARM GAS /tmp/ccOKVCkl.s page 4 37 .loc 1 136 3 view .LVU1 @@ -238,7 +238,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 152:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 76 .loc 1 153 14 view .LVU18 - ARM GAS /tmp/ccuaURzG.s page 5 + ARM GAS /tmp/ccOKVCkl.s page 5 77 0030 0320 movs r0, #3 @@ -298,7 +298,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 118 .loc 1 168 13 view .LVU26 119 0006 22F40072 bic r2, r2, #512 120 000a 5A60 str r2, [r3, #4] - ARM GAS /tmp/ccuaURzG.s page 6 + ARM GAS /tmp/ccOKVCkl.s page 6 169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 158 .loc 1 186 1 view .LVU42 159 0036 10BD pop {r4, pc} - ARM GAS /tmp/ccuaURzG.s page 7 + ARM GAS /tmp/ccOKVCkl.s page 7 160 .LVL9: @@ -418,7 +418,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Disables the Flash Power Down in Stop mode. - ARM GAS /tmp/ccuaURzG.s page 8 + ARM GAS /tmp/ccOKVCkl.s page 8 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None @@ -478,7 +478,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 248 0004 43F40063 orr r3, r3, #2048 249 0008 1360 str r3, [r2] 216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } - ARM GAS /tmp/ccuaURzG.s page 9 + ARM GAS /tmp/ccOKVCkl.s page 9 250 .loc 1 216 1 view .LVU58 @@ -538,7 +538,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** 229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enables Low Power Regulator low voltage mode. - ARM GAS /tmp/ccuaURzG.s page 10 + ARM GAS /tmp/ccOKVCkl.s page 10 230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None @@ -598,7 +598,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 338 0004 23F48063 bic r3, r3, #1024 339 0008 1360 str r3, [r2] 246:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } - ARM GAS /tmp/ccuaURzG.s page 11 + ARM GAS /tmp/ccOKVCkl.s page 11 340 .loc 1 246 1 view .LVU73 @@ -658,7 +658,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 380 .loc 1 262 3 view .LVU79 381 000e 1B6C ldr r3, [r3, #64] 382 0010 03F08053 and r3, r3, #268435456 - ARM GAS /tmp/ccuaURzG.s page 12 + ARM GAS /tmp/ccOKVCkl.s page 12 383 0014 0193 str r3, [sp, #4] @@ -718,7 +718,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** 281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */ 282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick(); - ARM GAS /tmp/ccuaURzG.s page 13 + ARM GAS /tmp/ccOKVCkl.s page 13 283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** @@ -778,7 +778,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 455 .loc 1 286 23 discriminator 1 view .LVU104 456 0062 001B subs r0, r0, r4 - ARM GAS /tmp/ccuaURzG.s page 14 + ARM GAS /tmp/ccOKVCkl.s page 14 286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { @@ -838,7 +838,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 496 .loc 1 306 3 view .LVU109 497 .LVL18: 307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** - ARM GAS /tmp/ccuaURzG.s page 15 + ARM GAS /tmp/ccOKVCkl.s page 15 308:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); @@ -898,7 +898,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT; 541 .loc 1 320 14 view .LVU125 - ARM GAS /tmp/ccuaURzG.s page 16 + ARM GAS /tmp/ccOKVCkl.s page 16 542 003e 0320 movs r0, #3 @@ -958,7 +958,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 572 005c 07D0 beq .L60 332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { 573 .loc 1 332 5 view .LVU132 - ARM GAS /tmp/ccuaURzG.s page 17 + ARM GAS /tmp/ccOKVCkl.s page 17 332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event, 359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * the HSI RC oscillator is selected as system clock. 360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * - ARM GAS /tmp/ccuaURzG.s page 18 + ARM GAS /tmp/ccOKVCkl.s page 18 361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note When the voltage regulator operates in low power mode, an additional @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 633 0008 1E4B ldr r3, .L73 634 000a 1A6C ldr r2, [r3, #64] 635 000c 42F08052 orr r2, r2, #268435456 - ARM GAS /tmp/ccuaURzG.s page 19 + ARM GAS /tmp/ccOKVCkl.s page 19 636 0010 1A64 str r2, [r3, #64] @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 676 .loc 1 402 23 discriminator 1 view .LVU160 677 0046 001B subs r0, r0, r4 678 .loc 1 402 7 discriminator 1 view .LVU161 - ARM GAS /tmp/ccuaURzG.s page 20 + ARM GAS /tmp/ccOKVCkl.s page 20 679 0048 B0F57A7F cmp r0, #1000 @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 712 .loc 1 423 5 is_stmt 0 view .LVU175 713 0068 012D cmp r5, #1 714 006a 08D0 beq .L72 - ARM GAS /tmp/ccuaURzG.s page 21 + ARM GAS /tmp/ccOKVCkl.s page 21 424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 754 .L74: 755 0082 00BF .align 2 756 .L73: - ARM GAS /tmp/ccuaURzG.s page 22 + ARM GAS /tmp/ccOKVCkl.s page 22 757 0084 00380240 .word 1073887232 @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Configures the main internal regulator output voltage. 451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @param VoltageScaling specifies the regulator output voltage to achieve 452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * a tradeoff between performance and power consumption. - ARM GAS /tmp/ccuaURzG.s page 23 + ARM GAS /tmp/ccOKVCkl.s page 23 453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This parameter can be one of the following values: @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 826 0008 42F08052 orr r2, r2, #268435456 827 000c 1A64 str r2, [r3, #64] 828 .loc 1 483 3 view .LVU195 - ARM GAS /tmp/ccuaURzG.s page 24 + ARM GAS /tmp/ccOKVCkl.s page 24 829 000e 1A6C ldr r2, [r3, #64] @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 870 0042 031B subs r3, r0, r4 871 .loc 1 496 9 discriminator 1 view .LVU212 872 0044 022B cmp r3, #2 - ARM GAS /tmp/ccuaURzG.s page 25 + ARM GAS /tmp/ccOKVCkl.s page 25 873 0046 F5D9 bls .L80 @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 912 .loc 1 511 47 view .LVU226 913 0078 13F0007F tst r3, #33554432 914 007c 06D1 bne .L92 - ARM GAS /tmp/ccuaURzG.s page 26 + ARM GAS /tmp/ccOKVCkl.s page 26 512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** { @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccuaURzG.s page 1 955 .L93: 526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } 527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } - ARM GAS /tmp/ccuaURzG.s page 27 + ARM GAS /tmp/ccOKVCkl.s page 27 528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** } @@ -1599,50 +1599,50 @@ ARM GAS /tmp/ccuaURzG.s page 1 984 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" 985 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" 986 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/ccuaURzG.s page 28 + ARM GAS /tmp/ccOKVCkl.s page 28 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_pwr_ex.c - /tmp/ccuaURzG.s:20 .text.HAL_PWREx_EnableBkUpReg:00000000 $t - /tmp/ccuaURzG.s:26 .text.HAL_PWREx_EnableBkUpReg:00000000 HAL_PWREx_EnableBkUpReg - /tmp/ccuaURzG.s:90 .text.HAL_PWREx_EnableBkUpReg:00000038 $d - /tmp/ccuaURzG.s:95 .text.HAL_PWREx_DisableBkUpReg:00000000 $t - /tmp/ccuaURzG.s:101 .text.HAL_PWREx_DisableBkUpReg:00000000 HAL_PWREx_DisableBkUpReg - /tmp/ccuaURzG.s:165 .text.HAL_PWREx_DisableBkUpReg:00000038 $d - /tmp/ccuaURzG.s:170 .text.HAL_PWREx_EnableFlashPowerDown:00000000 $t - /tmp/ccuaURzG.s:176 .text.HAL_PWREx_EnableFlashPowerDown:00000000 HAL_PWREx_EnableFlashPowerDown - /tmp/ccuaURzG.s:195 .text.HAL_PWREx_EnableFlashPowerDown:0000000c $d - /tmp/ccuaURzG.s:200 .text.HAL_PWREx_DisableFlashPowerDown:00000000 $t - /tmp/ccuaURzG.s:206 .text.HAL_PWREx_DisableFlashPowerDown:00000000 HAL_PWREx_DisableFlashPowerDown - /tmp/ccuaURzG.s:225 .text.HAL_PWREx_DisableFlashPowerDown:0000000c $d - /tmp/ccuaURzG.s:230 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:00000000 $t - /tmp/ccuaURzG.s:236 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:00000000 HAL_PWREx_EnableMainRegulatorLowVoltage - /tmp/ccuaURzG.s:255 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:0000000c $d - /tmp/ccuaURzG.s:260 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:00000000 $t - /tmp/ccuaURzG.s:266 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:00000000 HAL_PWREx_DisableMainRegulatorLowVoltage - /tmp/ccuaURzG.s:285 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:0000000c $d - /tmp/ccuaURzG.s:290 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:00000000 $t - /tmp/ccuaURzG.s:296 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:00000000 HAL_PWREx_EnableLowRegulatorLowVoltage - /tmp/ccuaURzG.s:315 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:0000000c $d - /tmp/ccuaURzG.s:320 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:00000000 $t - /tmp/ccuaURzG.s:326 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:00000000 HAL_PWREx_DisableLowRegulatorLowVoltage - /tmp/ccuaURzG.s:345 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:0000000c $d - /tmp/ccuaURzG.s:350 .text.HAL_PWREx_EnableOverDrive:00000000 $t - /tmp/ccuaURzG.s:356 .text.HAL_PWREx_EnableOverDrive:00000000 HAL_PWREx_EnableOverDrive - /tmp/ccuaURzG.s:470 .text.HAL_PWREx_EnableOverDrive:00000074 $d - /tmp/ccuaURzG.s:476 .text.HAL_PWREx_DisableOverDrive:00000000 $t - /tmp/ccuaURzG.s:482 .text.HAL_PWREx_DisableOverDrive:00000000 HAL_PWREx_DisableOverDrive - /tmp/ccuaURzG.s:592 .text.HAL_PWREx_DisableOverDrive:00000074 $d - /tmp/ccuaURzG.s:598 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 $t - /tmp/ccuaURzG.s:604 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 HAL_PWREx_EnterUnderDriveSTOPMode - /tmp/ccuaURzG.s:757 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000084 $d - /tmp/ccuaURzG.s:766 .text.HAL_PWREx_GetVoltageRange:00000000 $t - /tmp/ccuaURzG.s:772 .text.HAL_PWREx_GetVoltageRange:00000000 HAL_PWREx_GetVoltageRange - /tmp/ccuaURzG.s:789 .text.HAL_PWREx_GetVoltageRange:0000000c $d - /tmp/ccuaURzG.s:794 .text.HAL_PWREx_ControlVoltageScaling:00000000 $t - /tmp/ccuaURzG.s:800 .text.HAL_PWREx_ControlVoltageScaling:00000000 HAL_PWREx_ControlVoltageScaling - /tmp/ccuaURzG.s:974 .text.HAL_PWREx_ControlVoltageScaling:000000b8 $d + /tmp/ccOKVCkl.s:20 .text.HAL_PWREx_EnableBkUpReg:00000000 $t + /tmp/ccOKVCkl.s:26 .text.HAL_PWREx_EnableBkUpReg:00000000 HAL_PWREx_EnableBkUpReg + /tmp/ccOKVCkl.s:90 .text.HAL_PWREx_EnableBkUpReg:00000038 $d + /tmp/ccOKVCkl.s:95 .text.HAL_PWREx_DisableBkUpReg:00000000 $t + /tmp/ccOKVCkl.s:101 .text.HAL_PWREx_DisableBkUpReg:00000000 HAL_PWREx_DisableBkUpReg + /tmp/ccOKVCkl.s:165 .text.HAL_PWREx_DisableBkUpReg:00000038 $d + /tmp/ccOKVCkl.s:170 .text.HAL_PWREx_EnableFlashPowerDown:00000000 $t + /tmp/ccOKVCkl.s:176 .text.HAL_PWREx_EnableFlashPowerDown:00000000 HAL_PWREx_EnableFlashPowerDown + /tmp/ccOKVCkl.s:195 .text.HAL_PWREx_EnableFlashPowerDown:0000000c $d + /tmp/ccOKVCkl.s:200 .text.HAL_PWREx_DisableFlashPowerDown:00000000 $t + /tmp/ccOKVCkl.s:206 .text.HAL_PWREx_DisableFlashPowerDown:00000000 HAL_PWREx_DisableFlashPowerDown + /tmp/ccOKVCkl.s:225 .text.HAL_PWREx_DisableFlashPowerDown:0000000c $d + /tmp/ccOKVCkl.s:230 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:00000000 $t + /tmp/ccOKVCkl.s:236 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:00000000 HAL_PWREx_EnableMainRegulatorLowVoltage + /tmp/ccOKVCkl.s:255 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:0000000c $d + /tmp/ccOKVCkl.s:260 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:00000000 $t + /tmp/ccOKVCkl.s:266 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:00000000 HAL_PWREx_DisableMainRegulatorLowVoltage + /tmp/ccOKVCkl.s:285 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:0000000c $d + /tmp/ccOKVCkl.s:290 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:00000000 $t + /tmp/ccOKVCkl.s:296 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:00000000 HAL_PWREx_EnableLowRegulatorLowVoltage + /tmp/ccOKVCkl.s:315 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:0000000c $d + /tmp/ccOKVCkl.s:320 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:00000000 $t + /tmp/ccOKVCkl.s:326 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:00000000 HAL_PWREx_DisableLowRegulatorLowVoltage + /tmp/ccOKVCkl.s:345 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:0000000c $d + /tmp/ccOKVCkl.s:350 .text.HAL_PWREx_EnableOverDrive:00000000 $t + /tmp/ccOKVCkl.s:356 .text.HAL_PWREx_EnableOverDrive:00000000 HAL_PWREx_EnableOverDrive + /tmp/ccOKVCkl.s:470 .text.HAL_PWREx_EnableOverDrive:00000074 $d + /tmp/ccOKVCkl.s:476 .text.HAL_PWREx_DisableOverDrive:00000000 $t + /tmp/ccOKVCkl.s:482 .text.HAL_PWREx_DisableOverDrive:00000000 HAL_PWREx_DisableOverDrive + /tmp/ccOKVCkl.s:592 .text.HAL_PWREx_DisableOverDrive:00000074 $d + /tmp/ccOKVCkl.s:598 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 $t + /tmp/ccOKVCkl.s:604 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 HAL_PWREx_EnterUnderDriveSTOPMode + /tmp/ccOKVCkl.s:757 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000084 $d + /tmp/ccOKVCkl.s:766 .text.HAL_PWREx_GetVoltageRange:00000000 $t + /tmp/ccOKVCkl.s:772 .text.HAL_PWREx_GetVoltageRange:00000000 HAL_PWREx_GetVoltageRange + /tmp/ccOKVCkl.s:789 .text.HAL_PWREx_GetVoltageRange:0000000c $d + /tmp/ccOKVCkl.s:794 .text.HAL_PWREx_ControlVoltageScaling:00000000 $t + /tmp/ccOKVCkl.s:800 .text.HAL_PWREx_ControlVoltageScaling:00000000 HAL_PWREx_ControlVoltageScaling + /tmp/ccOKVCkl.s:974 .text.HAL_PWREx_ControlVoltageScaling:000000b8 $d UNDEFINED SYMBOLS HAL_GetTick diff --git a/build/stm32f7xx_hal_pwr_ex.o b/build/stm32f7xx_hal_pwr_ex.o index 9ee62bede494d0ec810d80d1d42a09c346f6fa6b..0cd7f777d984f899c4b9cd301805cb0434888afd 100644 GIT binary patch delta 2027 zcmZWpZEO@(6n%H*&CXrA?RKZNF4(kP23U|nYbXNk_Ji2+kz$L2p&=4LZ7fzTA0-&5 zT@spTB2>sL2}b=v^bZjYrl7`v_D7?F8miz22&Eu}N}v=d1w_z$XL*6tNoL-j^Ugi@ zyti-WVsmHn)*RUTX=IVP;%O;FV8|5W6HEN>GSD7Pq#^C4Km%YJ2@UYYnKZ0?M$+nH zgw`q=%;(9)m>ix)zvW_2W$&j_bGNBZn;CP@QiV@iD_(6B_HM)c7X01BU@4a#1ZNXh zxB`!J$sur>JuLBa#@}mE|477$Y>AU0OB<=Ng26(s(@HqHyNV z8s}m!+aA$4AFnVzs&N5^82_U2blk`OziJ$N4wrH6-@ri%Vz_0P%>}>fbp1wj<6Jrf=zWd}v{sDzx`PhPrG&Zrrt06tf)DM~A-G z2qjK!Km^`bi*T$1)Km^=T4KMYS}`j=NTK94O{d~y#)BHC;~H9?ysmNBI~#Jy2(6~* zhMS2?DUrOP=X3BF@$#m|WAG!Mzh#74$=7hlV>hi-{;lWp<56eo4DaW8q;ZK zgFCum42xNRSI?JWJ?sC~xZFE)QkeG|&cPQs5SaJ2V?I`~pP_O3LY&D4rY36WNUE>= zSrI?$e42j2J7m(52plT8Pl9ma<5dAcQvxzZOgsCh}5JiL@NJ99nl2<(T1F^NPf-Nx(O!&W~g zWo6uZMTApe1wO+@gQ z3O4vX?Y2O~w~IvuDnB{Tbf8UL2xLK}@+W&Hxye)Gc^vVokIe6<8wqvn(l?xKB^7iJ zXInVv(c$bK?t5rBdxqJL2UyjUY-NvQ-w*C@cZ^iC*!92&As(qzG9_xENvW>f*TTZN?n zVO3F74b#SRgOxEN8s(s7WhCY46ReN%-vMBAn>Z$}CI2ObSVxBvhE delta 2074 zcmZ8hYitx%6uxKX&dzDO?QW+{EmGSqgS6U8E0*{6A@3%otx|*frz~^{wV@45O%<_= zfQpG=@k)S1G^Xkg#Rw?|6GfXqqP!wP71Rnv9wI64hoGXKGvx--P43Km-~G;azI*4+ z?rQIE@5qJTt)baw;zv>le>Gi(sYSuGDg*5$LI^|J+ktL?O(x%bhnY02Rg9#S&vR() zCer-EqUVvBW9eBw?Wyc^gLo;`aWkVbOx8YWH8!^jd$VDF0|`gT1J`ruZg5s`g)49r zm+S$j-NO<;0gWdu+hPbe92c;Wm8(IZSsY z;86BCu8CEE_i&@%z}O!sxb{hZ{4RxFbkV#P^tBA#NU#NWBgDcz-8;yETxgHyeN zSLyDOc!inYwd7lg1#EI=Ag}4}lNjM-f9N&`B#vgqS*_@i_=%e63&nRZeNOB8B<|wE z^O`s*aXk|kG;v1a8yxhaCi*4D+2fKXE=t_TC6_gERbn|Su7I=1TjLFhlXwAF!71c} zWx5>}ZsUEqrfc4^a0^SWYhr_iA1m7qIhAa6Q?KKF3!BsgdmA*X3-%aegiqyRwo^cF zL7p;F2TrYD_^+wic)#-$#gZ2_EiuEV)?jwLiaN_HnhxSC6jEN*I34#=M|n--Oz&*S z>qctK`zEq*I|Y@0>iJxJnA_aYcsQC|f73`^L%xQak3LTKm!2<<<0fwSw zw_dsbFBTlgVtFs5c@{*8 zZobeDCZiB(#q=6!IuK@g1&whu(mT}yNg)G3RV8Kd?U|(MSqEuH;7b@VCXoozFka*y z^=f}ocE%GdSOR72G?s!rLL+Ub0)KkOXSBPp6#P83k?7Sls7Zm}Yf|lZb2rfp6yFtd zDG?9SQs9LIPrKG1@&T1Wi7HMmG9BnwXZ_jGsS=VslfvZD@mD#)Wgn^Tq#FX=>~dx> zdz!tD4rY5fXwP64S-WR2JAv8myI9qiY~{2w+j(cZ!<1zjyY5I7VrZw5DS5^$Q$3WD z37uWjQgZyWix#vjj26w0HbjbMR@T-PJsxRjY^hz)(%RD8IIn)zvvU_mWAh{PqV=&z zLnKx-J=z?NMOs^8^|g~H4H6Smzqn<7Yg;51?P|Dpwbd2MZ5m?a=BqX1tD(5-*YV{5 z73#i;H84jlr0X)ZV`3Y0sL|mX=vFU>+hCQtMb8`5%+eYIOVm51)o?_eD=mO>HKfdi z<*KwS4>qePT`Sb;vOKFVB*Z9nDU_!6l?9FTVd`kv2&-;{5PQ|uaGJ_04;sNSYGirF E|C>x({{R30 diff --git a/build/stm32f7xx_hal_rcc.lst b/build/stm32f7xx_hal_rcc.lst index 2fc710f..1a2346f 100644 --- a/build/stm32f7xx_hal_rcc.lst +++ b/build/stm32f7xx_hal_rcc.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccemvyj9.s page 1 +ARM GAS /tmp/ccuLwTpp.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (if the application needs higher frequency/performance) 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (+) Configure the AHB and APB buses prescalers - ARM GAS /tmp/ccemvyj9.s page 2 + ARM GAS /tmp/ccuLwTpp.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used @@ -118,7 +118,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA - ARM GAS /tmp/ccemvyj9.s page 3 + ARM GAS /tmp/ccuLwTpp.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8 @@ -178,7 +178,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the function HAL_RCC_EnableCSS() 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** clock source), the System clock is automatically switched to HSI and an interrupt - ARM GAS /tmp/ccemvyj9.s page 4 + ARM GAS /tmp/ccuLwTpp.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M7 NMI @@ -238,7 +238,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 30 @ args = 0, pretend = 0, frame = 0 31 @ frame_needed = 0, uses_anonymous_args = 0 32 0000 38B5 push {r3, r4, r5, lr} - ARM GAS /tmp/ccemvyj9.s page 5 + ARM GAS /tmp/ccuLwTpp.s page 5 33 .LCFI0: @@ -298,7 +298,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 214:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** - ARM GAS /tmp/ccemvyj9.s page 6 + ARM GAS /tmp/ccuLwTpp.s page 6 215:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Set HSITRIM[4:0] bits to the reset value */ @@ -358,7 +358,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Wait till PLLI2S is disabled */ 270:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_PLLI2SRDY) != RESET) 271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { - ARM GAS /tmp/ccemvyj9.s page 7 + ARM GAS /tmp/ccuLwTpp.s page 7 272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) @@ -418,7 +418,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 326:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 73 .loc 1 326 1 view .LVU14 74 0028 38BD pop {r3, r4, r5, pc} - ARM GAS /tmp/ccemvyj9.s page 8 + ARM GAS /tmp/ccuLwTpp.s page 8 75 .LVL4: @@ -478,7 +478,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 115 .loc 1 234 3 is_stmt 1 view .LVU28 234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** 116 .loc 1 234 15 is_stmt 0 view .LVU29 - ARM GAS /tmp/ccemvyj9.s page 9 + ARM GAS /tmp/ccuLwTpp.s page 9 117 005a FFF7FEFF bl HAL_GetTick @@ -538,7 +538,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 158 008c 23F08073 bic r3, r3, #16777216 159 0090 1360 str r3, [r2] 255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { - ARM GAS /tmp/ccemvyj9.s page 10 + ARM GAS /tmp/ccuLwTpp.s page 10 160 .loc 1 255 3 view .LVU43 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 200 00bc 1B68 ldr r3, [r3] 270:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { 201 .loc 1 270 46 view .LVU58 - ARM GAS /tmp/ccemvyj9.s page 11 + ARM GAS /tmp/ccuLwTpp.s page 11 202 00be 13F0006F tst r3, #134217728 @@ -658,7 +658,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { 242 .loc 1 287 24 discriminator 1 view .LVU73 243 00f0 001B subs r0, r0, r4 - ARM GAS /tmp/ccemvyj9.s page 12 + ARM GAS /tmp/ccuLwTpp.s page 12 287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { @@ -718,7 +718,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { 284 .loc 1 318 3 is_stmt 1 view .LVU88 318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { - ARM GAS /tmp/ccemvyj9.s page 13 + ARM GAS /tmp/ccuLwTpp.s page 13 285 .loc 1 318 7 is_stmt 0 view .LVU89 @@ -778,7 +778,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 321 .loc 1 344 3 view .LVU93 345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** uint32_t pll_config; 322 .loc 1 345 3 view .LVU94 - ARM GAS /tmp/ccemvyj9.s page 14 + ARM GAS /tmp/ccuLwTpp.s page 14 346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; @@ -838,7 +838,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 357 0020 924B ldr r3, .L124 358 0022 9B68 ldr r3, [r3, #8] 359 0024 03F00C03 and r3, r3, #12 - ARM GAS /tmp/ccemvyj9.s page 15 + ARM GAS /tmp/ccuLwTpp.s page 15 360 .loc 1 364 9 view .LVU108 @@ -898,7 +898,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 398 0060 6368 ldr r3, [r4, #4] 366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { 399 .loc 1 366 58 discriminator 1 view .LVU120 - ARM GAS /tmp/ccemvyj9.s page 16 + ARM GAS /tmp/ccuLwTpp.s page 16 400 0062 002B cmp r3, #0 @@ -958,7 +958,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 413 .loc 1 415 10 is_stmt 0 view .LVU127 414 0070 7E4B ldr r3, .L124 415 0072 9B68 ldr r3, [r3, #8] - ARM GAS /tmp/ccemvyj9.s page 17 + ARM GAS /tmp/ccuLwTpp.s page 17 416 .loc 1 415 8 view .LVU128 @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 444 .loc 1 442 9 is_stmt 1 view .LVU137 445 .L49: - ARM GAS /tmp/ccemvyj9.s page 18 + ARM GAS /tmp/ccuLwTpp.s page 18 446 .loc 1 442 52 view .LVU138 @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 487 .L40: 383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { 488 .loc 1 383 52 view .LVU155 - ARM GAS /tmp/ccemvyj9.s page 19 + ARM GAS /tmp/ccuLwTpp.s page 19 383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 531 010c 1A60 str r2, [r3] 532 010e D7E7 b .L36 533 .L39: - ARM GAS /tmp/ccemvyj9.s page 20 + ARM GAS /tmp/ccuLwTpp.s page 20 394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 572 .loc 1 419 12 is_stmt 0 view .LVU183 573 0138 4C4B ldr r3, .L124 574 013a 1B68 ldr r3, [r3] - ARM GAS /tmp/ccemvyj9.s page 21 + ARM GAS /tmp/ccuLwTpp.s page 21 419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { 475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Check the parameters */ 476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); - ARM GAS /tmp/ccemvyj9.s page 22 + ARM GAS /tmp/ccuLwTpp.s page 22 598 .loc 1 476 5 is_stmt 1 view .LVU191 @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 636 .L114: 451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 637 .loc 1 451 9 is_stmt 1 view .LVU207 - ARM GAS /tmp/ccemvyj9.s page 23 + ARM GAS /tmp/ccuLwTpp.s page 23 638 018e 374A ldr r2, .L124 @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 680 .L54: 493:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } - ARM GAS /tmp/ccemvyj9.s page 24 + ARM GAS /tmp/ccuLwTpp.s page 24 495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 715 .loc 1 515 3 is_stmt 1 view .LVU232 716 .loc 1 515 26 is_stmt 0 view .LVU233 - ARM GAS /tmp/ccemvyj9.s page 25 + ARM GAS /tmp/ccuLwTpp.s page 25 717 01f0 2368 ldr r3, [r4] @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 757 0220 10D0 beq .L116 758 .L61: 530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { - ARM GAS /tmp/ccemvyj9.s page 26 + ARM GAS /tmp/ccuLwTpp.s page 26 531:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Enable write access to Backup domain */ @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 791 .loc 1 535 7 is_stmt 1 view .LVU259 535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** 792 .loc 1 535 19 is_stmt 0 view .LVU260 - ARM GAS /tmp/ccemvyj9.s page 27 + ARM GAS /tmp/ccuLwTpp.s page 27 793 024e FFF7FEFF bl HAL_GetTick @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 835 .loc 1 552 7 is_stmt 1 view .LVU273 836 .loc 1 552 19 is_stmt 0 view .LVU274 837 0282 FFF7FEFF bl HAL_GetTick - ARM GAS /tmp/ccemvyj9.s page 28 + ARM GAS /tmp/ccuLwTpp.s page 28 838 .LVL60: @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 881 02be 1A6F ldr r2, [r3, #112] 882 02c0 42F00402 orr r2, r2, #4 883 02c4 1A67 str r2, [r3, #112] - ARM GAS /tmp/ccemvyj9.s page 29 + ARM GAS /tmp/ccuLwTpp.s page 29 547:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Check the LSE State */ @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 578:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Restore clock configuration if changed */ 579:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if (pwrclkchanged == SET) 919 .loc 1 579 5 is_stmt 1 view .LVU300 - ARM GAS /tmp/ccemvyj9.s page 30 + ARM GAS /tmp/ccuLwTpp.s page 30 920 .loc 1 579 8 is_stmt 0 view .LVU301 @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 611:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 612:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { 613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) - ARM GAS /tmp/ccemvyj9.s page 31 + ARM GAS /tmp/ccuLwTpp.s page 31 614:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Wait till PLL is ready */ 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) - ARM GAS /tmp/ccemvyj9.s page 32 + ARM GAS /tmp/ccuLwTpp.s page 32 954 .loc 1 659 9 is_stmt 1 view .LVU314 @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** 996 .loc 1 608 9 view .LVU331 608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** - ARM GAS /tmp/ccemvyj9.s page 33 + ARM GAS /tmp/ccuLwTpp.s page 33 997 .loc 1 608 21 is_stmt 0 view .LVU332 @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1040 .loc 1 636 9 view .LVU343 1041 038e 1368 ldr r3, [r2] 1042 0390 43F08073 orr r3, r3, #16777216 - ARM GAS /tmp/ccemvyj9.s page 34 + ARM GAS /tmp/ccuLwTpp.s page 34 1043 0394 1360 str r3, [r2] @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 678:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PL 679:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PL 680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** #else - ARM GAS /tmp/ccemvyj9.s page 35 + ARM GAS /tmp/ccuLwTpp.s page 35 681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1103 03d6 29D1 bne .L101 676:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U) 1104 .loc 1 676 77 view .LVU367 - ARM GAS /tmp/ccemvyj9.s page 36 + ARM GAS /tmp/ccuLwTpp.s page 36 1105 03d8 616A ldr r1, [r4, #36] @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1147 .cfi_restore 14 351:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 1148 .loc 1 351 12 view .LVU381 - ARM GAS /tmp/ccemvyj9.s page 37 + ARM GAS /tmp/ccuLwTpp.s page 37 1149 0412 0120 movs r0, #1 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1196 042e F7E7 b .L31 1197 .L102: 1198 0430 0120 movs r0, #1 - ARM GAS /tmp/ccemvyj9.s page 38 + ARM GAS /tmp/ccuLwTpp.s page 38 1199 0432 F5E7 b .L31 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 721:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** */ 722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) 723:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { - ARM GAS /tmp/ccemvyj9.s page 39 + ARM GAS /tmp/ccuLwTpp.s page 39 724:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** uint32_t tickstart = 0; @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 778:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** 779:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ 780:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - ARM GAS /tmp/ccemvyj9.s page 40 + ARM GAS /tmp/ccuLwTpp.s page 40 781:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 835:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ 836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 837:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { - ARM GAS /tmp/ccemvyj9.s page 41 + ARM GAS /tmp/ccuLwTpp.s page 41 838:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 892:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source 893:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source 894:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCOx prescaler. - ARM GAS /tmp/ccemvyj9.s page 42 + ARM GAS /tmp/ccuLwTpp.s page 42 895:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * This parameter can be one of the following values: @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1261 0014 336B ldr r3, [r6, #48] 1262 0016 03F00103 and r3, r3, #1 1263 001a 0193 str r3, [sp, #4] - ARM GAS /tmp/ccemvyj9.s page 43 + ARM GAS /tmp/ccuLwTpp.s page 43 1264 .loc 1 915 5 view .LVU403 @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 928:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** else 929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { 930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource)); - ARM GAS /tmp/ccemvyj9.s page 44 + ARM GAS /tmp/ccuLwTpp.s page 44 931:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1335 .loc 1 936 25 is_stmt 0 view .LVU429 1336 005e 4FF40073 mov r3, #512 1337 0062 0393 str r3, [sp, #12] - ARM GAS /tmp/ccemvyj9.s page 45 + ARM GAS /tmp/ccuLwTpp.s page 45 937:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1379 .LFE144: 1381 .section .text.HAL_RCC_EnableCSS,"ax",%progbits 1382 .align 1 - ARM GAS /tmp/ccemvyj9.s page 46 + ARM GAS /tmp/ccuLwTpp.s page 46 1383 .global HAL_RCC_EnableCSS @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1419 .cfi_startproc 1420 @ args = 0, pretend = 0, frame = 0 1421 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccemvyj9.s page 47 + ARM GAS /tmp/ccuLwTpp.s page 47 1422 @ link register save eliminated. @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @retval SYSCLK frequency 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** */ 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void) - ARM GAS /tmp/ccemvyj9.s page 48 + ARM GAS /tmp/ccuLwTpp.s page 48 1002:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1478 .loc 1 1024 11 is_stmt 0 view .LVU461 1479 001a 5B68 ldr r3, [r3, #4] 1480 .loc 1 1024 10 view .LVU462 - ARM GAS /tmp/ccemvyj9.s page 49 + ARM GAS /tmp/ccuLwTpp.s page 49 1481 001c 13F4800F tst r3, #4194304 @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 1514 .loc 1 1046 1 is_stmt 0 view .LVU476 1515 0046 08BD pop {r3, pc} - ARM GAS /tmp/ccemvyj9.s page 50 + ARM GAS /tmp/ccuLwTpp.s page 50 1516 .LVL106: @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1560 009a 00BF .align 2 1561 .L147: 1562 009c 00380240 .word 1073887232 - ARM GAS /tmp/ccemvyj9.s page 51 + ARM GAS /tmp/ccuLwTpp.s page 51 1563 00a0 40787D01 .word 25000000 @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1608 0018 4F4A ldr r2, .L177 1609 001a 1368 ldr r3, [r2] 1610 001c 23F00F03 bic r3, r3, #15 - ARM GAS /tmp/ccemvyj9.s page 52 + ARM GAS /tmp/ccuLwTpp.s page 52 1611 0020 0B43 orrs r3, r3, r1 @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1650 .loc 1 771 5 view .LVU512 1651 005a 404A ldr r2, .L177+4 1652 005c 9368 ldr r3, [r2, #8] - ARM GAS /tmp/ccemvyj9.s page 53 + ARM GAS /tmp/ccuLwTpp.s page 53 1653 005e 23F0F003 bic r3, r3, #240 @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 810:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** 1692 .loc 1 810 17 is_stmt 0 view .LVU528 1693 0090 FFF7FEFF bl HAL_GetTick - ARM GAS /tmp/ccemvyj9.s page 54 + ARM GAS /tmp/ccuLwTpp.s page 54 1694 .LVL112: @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1733 00c2 0120 movs r0, #1 1734 .LVL116: 785:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } - ARM GAS /tmp/ccemvyj9.s page 55 + ARM GAS /tmp/ccuLwTpp.s page 55 1735 .loc 1 785 16 view .LVU544 @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { 1776 .loc 1 836 26 is_stmt 0 view .LVU558 1777 00f6 2368 ldr r3, [r4] - ARM GAS /tmp/ccemvyj9.s page 56 + ARM GAS /tmp/ccuLwTpp.s page 56 836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1818 0134 D840 lsrs r0, r0, r3 850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** 1819 .loc 1 850 19 discriminator 1 view .LVU573 - ARM GAS /tmp/ccemvyj9.s page 57 + ARM GAS /tmp/ccuLwTpp.s page 57 1820 0136 0B4B ldr r3, .L177+12 @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1864 .loc 1 803 16 view .LVU583 1865 0150 F8E7 b .L150 1866 .LVL128: - ARM GAS /tmp/ccemvyj9.s page 58 + ARM GAS /tmp/ccuLwTpp.s page 58 1867 .L170: @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1911 .syntax unified 1912 .thumb 1913 .thumb_func - ARM GAS /tmp/ccemvyj9.s page 59 + ARM GAS /tmp/ccuLwTpp.s page 59 1915 HAL_RCC_GetPCLK1Freq: @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /** 1073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency 1074:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the - ARM GAS /tmp/ccemvyj9.s page 60 + ARM GAS /tmp/ccuLwTpp.s page 60 1075:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1089:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @retval None 1090:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** */ 1091:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) - ARM GAS /tmp/ccemvyj9.s page 61 + ARM GAS /tmp/ccuLwTpp.s page 61 1092:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 2032 .L195: 1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** else - ARM GAS /tmp/ccemvyj9.s page 62 + ARM GAS /tmp/ccuLwTpp.s page 62 1116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 2063 .L200: 1140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 1141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** else - ARM GAS /tmp/ccemvyj9.s page 63 + ARM GAS /tmp/ccuLwTpp.s page 63 1142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** { @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 2101 .loc 1 1158 60 view .LVU648 2102 0070 03F44033 and r3, r3, #196608 2103 .loc 1 1158 80 view .LVU649 - ARM GAS /tmp/ccemvyj9.s page 64 + ARM GAS /tmp/ccuLwTpp.s page 64 2104 0074 03F58033 add r3, r3, #65536 @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccemvyj9.s page 65 + ARM GAS /tmp/ccuLwTpp.s page 65 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; - ARM GAS /tmp/ccemvyj9.s page 66 + ARM GAS /tmp/ccuLwTpp.s page 66 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register - ARM GAS /tmp/ccemvyj9.s page 67 + ARM GAS /tmp/ccuLwTpp.s page 67 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccemvyj9.s page 68 + ARM GAS /tmp/ccuLwTpp.s page 68 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccemvyj9.s page 69 + ARM GAS /tmp/ccuLwTpp.s page 69 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - ARM GAS /tmp/ccemvyj9.s page 70 + ARM GAS /tmp/ccuLwTpp.s page 70 319:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 375:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccemvyj9.s page 71 + ARM GAS /tmp/ccuLwTpp.s page 71 376:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ - ARM GAS /tmp/ccemvyj9.s page 72 + ARM GAS /tmp/ccuLwTpp.s page 72 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set - ARM GAS /tmp/ccemvyj9.s page 73 + ARM GAS /tmp/ccuLwTpp.s page 73 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 545:Drivers/CMSIS/Include/cmsis_gcc.h **** 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); - ARM GAS /tmp/ccemvyj9.s page 74 + ARM GAS /tmp/ccuLwTpp.s page 74 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccemvyj9.s page 75 + ARM GAS /tmp/ccuLwTpp.s page 75 604:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) - ARM GAS /tmp/ccemvyj9.s page 76 + ARM GAS /tmp/ccuLwTpp.s page 76 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit - ARM GAS /tmp/ccemvyj9.s page 77 + ARM GAS /tmp/ccuLwTpp.s page 77 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); - ARM GAS /tmp/ccemvyj9.s page 78 + ARM GAS /tmp/ccuLwTpp.s page 78 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 831:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccemvyj9.s page 79 + ARM GAS /tmp/ccuLwTpp.s page 79 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) - ARM GAS /tmp/ccemvyj9.s page 80 + ARM GAS /tmp/ccuLwTpp.s page 80 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } 945:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccemvyj9.s page 81 + ARM GAS /tmp/ccuLwTpp.s page 81 946:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 991:Drivers/CMSIS/Include/cmsis_gcc.h **** 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ - ARM GAS /tmp/ccemvyj9.s page 82 + ARM GAS /tmp/ccuLwTpp.s page 82 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 2169 .loc 1 1117 33 is_stmt 0 view .LVU675 2170 00b4 0023 movs r3, #0 2171 00b6 C360 str r3, [r0, #12] - ARM GAS /tmp/ccemvyj9.s page 83 + ARM GAS /tmp/ccuLwTpp.s page 83 2172 00b8 B3E7 b .L195 @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 2216 .thumb_func 2218 HAL_RCC_GetClockConfig: 2219 .LVL134: - ARM GAS /tmp/ccemvyj9.s page 84 + ARM GAS /tmp/ccuLwTpp.s page 84 2220 .LFB152: @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** 1187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/ 1188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3); - ARM GAS /tmp/ccemvyj9.s page 85 + ARM GAS /tmp/ccuLwTpp.s page 85 2252 .loc 1 1188 3 is_stmt 1 view .LVU702 @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 1210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 1211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** 1212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /** - ARM GAS /tmp/ccemvyj9.s page 86 + ARM GAS /tmp/ccuLwTpp.s page 86 1213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccemvyj9.s page 1 2328 .LVL135: 1208:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** } 2329 .loc 1 1208 5 view .LVU719 - ARM GAS /tmp/ccemvyj9.s page 87 + ARM GAS /tmp/ccuLwTpp.s page 87 2330 0012 024B ldr r3, .L213 @@ -5184,54 +5184,54 @@ ARM GAS /tmp/ccemvyj9.s page 1 2350 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" 2351 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" 2352 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/ccemvyj9.s page 88 + ARM GAS /tmp/ccuLwTpp.s page 88 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_rcc.c - /tmp/ccemvyj9.s:20 .text.HAL_RCC_DeInit:00000000 $t - /tmp/ccemvyj9.s:26 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit - /tmp/ccemvyj9.s:299 .text.HAL_RCC_DeInit:00000144 $d - /tmp/ccemvyj9.s:308 .text.HAL_RCC_OscConfig:00000000 $t - /tmp/ccemvyj9.s:314 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig - /tmp/ccemvyj9.s:819 .text.HAL_RCC_OscConfig:0000026c $d - /tmp/ccemvyj9.s:824 .text.HAL_RCC_OscConfig:00000274 $t - /tmp/ccemvyj9.s:1214 .text.HAL_RCC_OscConfig:00000440 $d - /tmp/ccemvyj9.s:1219 .text.HAL_RCC_MCOConfig:00000000 $t - /tmp/ccemvyj9.s:1225 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig - /tmp/ccemvyj9.s:1375 .text.HAL_RCC_MCOConfig:0000008c $d - /tmp/ccemvyj9.s:1382 .text.HAL_RCC_EnableCSS:00000000 $t - /tmp/ccemvyj9.s:1388 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS - /tmp/ccemvyj9.s:1405 .text.HAL_RCC_EnableCSS:0000000c $d - /tmp/ccemvyj9.s:1410 .text.HAL_RCC_DisableCSS:00000000 $t - /tmp/ccemvyj9.s:1416 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS - /tmp/ccemvyj9.s:1433 .text.HAL_RCC_DisableCSS:0000000c $d - /tmp/ccemvyj9.s:1439 .text.HAL_RCC_GetSysClockFreq:00000000 $t - /tmp/ccemvyj9.s:1445 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq - /tmp/ccemvyj9.s:1562 .text.HAL_RCC_GetSysClockFreq:0000009c $d - /tmp/ccemvyj9.s:1569 .text.HAL_RCC_ClockConfig:00000000 $t - /tmp/ccemvyj9.s:1575 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig - /tmp/ccemvyj9.s:1874 .text.HAL_RCC_ClockConfig:00000158 $d - /tmp/ccemvyj9.s:1883 .text.HAL_RCC_GetHCLKFreq:00000000 $t - /tmp/ccemvyj9.s:1889 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq - /tmp/ccemvyj9.s:1904 .text.HAL_RCC_GetHCLKFreq:00000008 $d - /tmp/ccemvyj9.s:1909 .text.HAL_RCC_GetPCLK1Freq:00000000 $t - /tmp/ccemvyj9.s:1915 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq - /tmp/ccemvyj9.s:1944 .text.HAL_RCC_GetPCLK1Freq:00000018 $d - /tmp/ccemvyj9.s:1950 .text.HAL_RCC_GetPCLK2Freq:00000000 $t - /tmp/ccemvyj9.s:1956 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq - /tmp/ccemvyj9.s:1985 .text.HAL_RCC_GetPCLK2Freq:00000018 $d - /tmp/ccemvyj9.s:1991 .text.HAL_RCC_GetOscConfig:00000000 $t - /tmp/ccemvyj9.s:1997 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig - /tmp/ccemvyj9.s:2207 .text.HAL_RCC_GetOscConfig:000000dc $d - /tmp/ccemvyj9.s:2212 .text.HAL_RCC_GetClockConfig:00000000 $t - /tmp/ccemvyj9.s:2218 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig - /tmp/ccemvyj9.s:2273 .text.HAL_RCC_GetClockConfig:00000034 $d - /tmp/ccemvyj9.s:2279 .text.HAL_RCC_CSSCallback:00000000 $t - /tmp/ccemvyj9.s:2285 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback - /tmp/ccemvyj9.s:2298 .text.HAL_RCC_NMI_IRQHandler:00000000 $t - /tmp/ccemvyj9.s:2304 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler - /tmp/ccemvyj9.s:2338 .text.HAL_RCC_NMI_IRQHandler:0000001c $d + /tmp/ccuLwTpp.s:20 .text.HAL_RCC_DeInit:00000000 $t + /tmp/ccuLwTpp.s:26 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit + /tmp/ccuLwTpp.s:299 .text.HAL_RCC_DeInit:00000144 $d + /tmp/ccuLwTpp.s:308 .text.HAL_RCC_OscConfig:00000000 $t + /tmp/ccuLwTpp.s:314 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig + /tmp/ccuLwTpp.s:819 .text.HAL_RCC_OscConfig:0000026c $d + /tmp/ccuLwTpp.s:824 .text.HAL_RCC_OscConfig:00000274 $t + /tmp/ccuLwTpp.s:1214 .text.HAL_RCC_OscConfig:00000440 $d + /tmp/ccuLwTpp.s:1219 .text.HAL_RCC_MCOConfig:00000000 $t + /tmp/ccuLwTpp.s:1225 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig + /tmp/ccuLwTpp.s:1375 .text.HAL_RCC_MCOConfig:0000008c $d + /tmp/ccuLwTpp.s:1382 .text.HAL_RCC_EnableCSS:00000000 $t + /tmp/ccuLwTpp.s:1388 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS + /tmp/ccuLwTpp.s:1405 .text.HAL_RCC_EnableCSS:0000000c $d + /tmp/ccuLwTpp.s:1410 .text.HAL_RCC_DisableCSS:00000000 $t + /tmp/ccuLwTpp.s:1416 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS + /tmp/ccuLwTpp.s:1433 .text.HAL_RCC_DisableCSS:0000000c $d + /tmp/ccuLwTpp.s:1439 .text.HAL_RCC_GetSysClockFreq:00000000 $t + /tmp/ccuLwTpp.s:1445 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq + /tmp/ccuLwTpp.s:1562 .text.HAL_RCC_GetSysClockFreq:0000009c $d + /tmp/ccuLwTpp.s:1569 .text.HAL_RCC_ClockConfig:00000000 $t + /tmp/ccuLwTpp.s:1575 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig + /tmp/ccuLwTpp.s:1874 .text.HAL_RCC_ClockConfig:00000158 $d + /tmp/ccuLwTpp.s:1883 .text.HAL_RCC_GetHCLKFreq:00000000 $t + /tmp/ccuLwTpp.s:1889 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq + /tmp/ccuLwTpp.s:1904 .text.HAL_RCC_GetHCLKFreq:00000008 $d + /tmp/ccuLwTpp.s:1909 .text.HAL_RCC_GetPCLK1Freq:00000000 $t + /tmp/ccuLwTpp.s:1915 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq + /tmp/ccuLwTpp.s:1944 .text.HAL_RCC_GetPCLK1Freq:00000018 $d + /tmp/ccuLwTpp.s:1950 .text.HAL_RCC_GetPCLK2Freq:00000000 $t + /tmp/ccuLwTpp.s:1956 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq + /tmp/ccuLwTpp.s:1985 .text.HAL_RCC_GetPCLK2Freq:00000018 $d + /tmp/ccuLwTpp.s:1991 .text.HAL_RCC_GetOscConfig:00000000 $t + /tmp/ccuLwTpp.s:1997 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig + /tmp/ccuLwTpp.s:2207 .text.HAL_RCC_GetOscConfig:000000dc $d + /tmp/ccuLwTpp.s:2212 .text.HAL_RCC_GetClockConfig:00000000 $t + /tmp/ccuLwTpp.s:2218 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig + /tmp/ccuLwTpp.s:2273 .text.HAL_RCC_GetClockConfig:00000034 $d + /tmp/ccuLwTpp.s:2279 .text.HAL_RCC_CSSCallback:00000000 $t + /tmp/ccuLwTpp.s:2285 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback + /tmp/ccuLwTpp.s:2298 .text.HAL_RCC_NMI_IRQHandler:00000000 $t + /tmp/ccuLwTpp.s:2304 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler + /tmp/ccuLwTpp.s:2338 .text.HAL_RCC_NMI_IRQHandler:0000001c $d UNDEFINED SYMBOLS HAL_GetTick diff --git a/build/stm32f7xx_hal_rcc.o b/build/stm32f7xx_hal_rcc.o index b0227be143df2ed3be6f9506267f0b3545eb07e9..23e0687bd365c77b997d849da37916162276b00a 100644 GIT binary patch delta 343 zcmeyckMYDl#t90H5*rnZcofgEF)*+`W)kdTU|?WUX5n@YGGbtT0^@V=T%Npz$Bi*% z@^7AgM!(J7yt^0~i#NOR>oGFjXPaCmkjEG{`KiEK#zm7S3;M}r0u5uF%Hn^H9Y_Z< zh_Q441;kkDfM&}u_D=pU*u%JUbB~Y+BV+XDg~FB0qBnr@OxKxtKq?sY85wJU{F=@B z;yv{jr}c73s%VGC4ESpV4IU&dB+UE|Vjp{24&nPpw5=c&&d=f~O zOqPt(W_rUm*)2|qv3YW4oI2y0$rIz$nVy79-W8|Ds51E>P$*(DXFP~Bj8~U963W03 M!US?I1TaEr0QgO0S^xk5 delta 364 zcmX@HkMYAk#t90H4jUDVcoe^}F)*+`W)kdTU|?WUX5n@YGGbtT0^@V={GPmp$BnUP z@^7Ag#CYH5d1B;z#+=E9QT~iIlN+P_CtJkuOuiH4 z!nkL$VzfWwnaPFG#~JTTwv6#-d@{K+rkt^4GGnYiqs!z#Ah~DqLLfP3^2bSai1ClockSelection); 89 .loc 1 139 5 view .LVU24 - ARM GAS /tmp/ccgN7hfx.s page 5 + ARM GAS /tmp/ccaqdy02.s page 5 90 0032 AC4A ldr r2, .L87 @@ -298,7 +298,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 123 0068 216C ldr r1, [r4, #64] 124 006a 0B43 orrs r3, r3, r1 125 006c C2F88C30 str r3, [r2, #140] - ARM GAS /tmp/ccgN7hfx.s page 6 + ARM GAS /tmp/ccaqdy02.s page 6 160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 183:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); 184:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Enable Power Clock*/ - ARM GAS /tmp/ccgN7hfx.s page 7 + ARM GAS /tmp/ccaqdy02.s page 7 186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); @@ -418,7 +418,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 158 .loc 1 238 3 view .LVU49 159 .loc 1 238 21 is_stmt 0 view .LVU50 160 0090 2368 ldr r3, [r4] - ARM GAS /tmp/ccgN7hfx.s page 8 + ARM GAS /tmp/ccaqdy02.s page 8 161 .loc 1 238 5 view .LVU51 @@ -478,7 +478,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 195 00cc 2368 ldr r3, [r4] 196 .loc 1 258 5 view .LVU64 197 00ce 13F4004F tst r3, #32768 - ARM GAS /tmp/ccgN7hfx.s page 9 + ARM GAS /tmp/ccaqdy02.s page 9 198 00d2 08D0 beq .L19 @@ -538,7 +538,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 229 .loc 1 281 5 is_stmt 1 view .LVU75 282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Configure the I2C4 clock source */ - ARM GAS /tmp/ccgN7hfx.s page 10 + ARM GAS /tmp/ccaqdy02.s page 10 284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection); @@ -598,7 +598,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 263 0142 23F00C03 bic r3, r3, #12 264 0146 A16C ldr r1, [r4, #72] 265 0148 0B43 orrs r3, r3, r1 - ARM GAS /tmp/ccgN7hfx.s page 11 + ARM GAS /tmp/ccaqdy02.s page 11 266 014a C2F89030 str r3, [r2, #144] @@ -658,7 +658,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /*-------------------------------------- UART5 Configuration -----------------------------------* 328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) 298 .loc 1 328 3 view .LVU97 - ARM GAS /tmp/ccgN7hfx.s page 12 + ARM GAS /tmp/ccaqdy02.s page 12 299 .loc 1 328 21 is_stmt 0 view .LVU98 @@ -718,7 +718,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 333 01bc 08D0 beq .L28 349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { 350:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Check the parameters */ - ARM GAS /tmp/ccgN7hfx.s page 13 + ARM GAS /tmp/ccaqdy02.s page 13 351:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection)); @@ -778,7 +778,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); 365 .loc 1 374 5 view .LVU121 366 01f2 3C4A ldr r2, .L87 - ARM GAS /tmp/ccgN7hfx.s page 14 + ARM GAS /tmp/ccaqdy02.s page 14 367 01f4 D2F89030 ldr r3, [r2, #144] @@ -838,7 +838,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 400 022e 00D0 beq .L32 396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { 397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** pllsaiused = 1; - ARM GAS /tmp/ccgN7hfx.s page 15 + ARM GAS /tmp/ccaqdy02.s page 15 401 .loc 1 397 16 view .LVU133 @@ -898,7 +898,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** #if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx 422:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /*------------------------------------- SDMMC2 Configuration ------------------------------------ - ARM GAS /tmp/ccgN7hfx.s page 16 + ARM GAS /tmp/ccaqdy02.s page 16 423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC2) == RCC_PERIPHCLK_SDMMC2) @@ -958,7 +958,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 466 .loc 1 443 5 view .LVU155 467 02a0 13F0805F tst r3, #268435456 468 02a4 09D0 beq .L37 - ARM GAS /tmp/ccgN7hfx.s page 17 + ARM GAS /tmp/ccaqdy02.s page 17 444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 502 02d6 034B ldr r3, .L87 503 02d8 1B68 ldr r3, [r3] 504 .loc 1 464 51 view .LVU168 - ARM GAS /tmp/ccgN7hfx.s page 18 + ARM GAS /tmp/ccaqdy02.s page 18 505 02da 13F0006F tst r3, #134217728 @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 548 0304 B9E6 b .L6 549 .LVL20: 550 .L77: - ARM GAS /tmp/ccgN7hfx.s page 19 + ARM GAS /tmp/ccaqdy02.s page 19 183:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 588 .loc 1 195 36 view .LVU196 589 032e 13F4807F tst r3, #256 590 0332 06D1 bne .L80 - ARM GAS /tmp/ccgN7hfx.s page 20 + ARM GAS /tmp/ccaqdy02.s page 20 197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 628 .loc 1 209 15 view .LVU213 629 035a 22F44072 bic r2, r2, #768 630 .LVL27: - ARM GAS /tmp/ccgN7hfx.s page 21 + ARM GAS /tmp/ccaqdy02.s page 21 212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 673 .loc 1 222 21 is_stmt 0 view .LVU226 674 039e FFF7FEFF bl HAL_GetTick - ARM GAS /tmp/ccgN7hfx.s page 22 + ARM GAS /tmp/ccaqdy02.s page 22 675 .LVL30: @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } 717 .loc 1 389 18 view .LVU239 718 03d4 28E7 b .L31 - ARM GAS /tmp/ccgN7hfx.s page 23 + ARM GAS /tmp/ccaqdy02.s page 23 719 .LVL36: @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 754 0402 C2F88430 str r3, [r2, #132] 755 .LVL41: 756 .L42: - ARM GAS /tmp/ccgN7hfx.s page 24 + ARM GAS /tmp/ccaqdy02.s page 24 489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 792 .LVL44: 793 .loc 1 507 7 is_stmt 0 view .LVU269 794 0434 43EA8013 orr r3, r3, r0, lsl #6 - ARM GAS /tmp/ccgN7hfx.s page 25 + ARM GAS /tmp/ccaqdy02.s page 25 795 0438 E068 ldr r0, [r4, #12] @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 831 046e 2369 ldr r3, [r4, #16] 832 0470 1B04 lsls r3, r3, #16 833 0472 43EA8613 orr r3, r3, r6, lsl #6 - ARM GAS /tmp/ccgN7hfx.s page 26 + ARM GAS /tmp/ccaqdy02.s page 26 834 0476 00F07060 and r0, r0, #251658240 @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 870 04b2 1360 str r3, [r2] 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Get Start Tick*/ - ARM GAS /tmp/ccgN7hfx.s page 27 + ARM GAS /tmp/ccaqdy02.s page 27 546:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 567:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); 568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Wait till PLLSAI is disabled */ - ARM GAS /tmp/ccgN7hfx.s page 28 + ARM GAS /tmp/ccaqdy02.s page 28 570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET) @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR)); 625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LT - ARM GAS /tmp/ccgN7hfx.s page 29 + ARM GAS /tmp/ccaqdy02.s page 29 627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos); @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 567:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 925 .loc 1 567 17 is_stmt 0 view .LVU309 926 04e6 FFF7FEFF bl HAL_GetTick - ARM GAS /tmp/ccgN7hfx.s page 30 + ARM GAS /tmp/ccaqdy02.s page 30 927 .LVL59: @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 583:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (Pe 967 .loc 1 583 94 discriminator 1 view .LVU324 968 051a 22B1 cbz r2, .L53 - ARM GAS /tmp/ccgN7hfx.s page 31 + ARM GAS /tmp/ccaqdy02.s page 31 969 .L52: @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1010 .L54: 605:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { 1011 .loc 1 605 5 view .LVU338 - ARM GAS /tmp/ccgN7hfx.s page 32 + ARM GAS /tmp/ccaqdy02.s page 32 605:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1050 058e 0B43 orrs r3, r3, r1 1051 0590 E169 ldr r1, [r4, #28] 1052 0592 43EA0173 orr r3, r3, r1, lsl #28 - ARM GAS /tmp/ccgN7hfx.s page 33 + ARM GAS /tmp/ccaqdy02.s page 33 1053 0596 C2F88830 str r3, [r2, #136] @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1094 .LVL76: 1095 .L85: 608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 - ARM GAS /tmp/ccgN7hfx.s page 34 + ARM GAS /tmp/ccaqdy02.s page 34 1096 .loc 1 608 7 is_stmt 1 view .LVU368 @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1143 .LVL83: 1144 .LFB142: 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** - ARM GAS /tmp/ccgN7hfx.s page 35 + ARM GAS /tmp/ccaqdy02.s page 35 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /** @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1159 .loc 1 698 35 view .LVU384 1160 000a C2F38812 ubfx r2, r2, #6, #9 1161 .loc 1 698 33 view .LVU385 - ARM GAS /tmp/ccgN7hfx.s page 36 + ARM GAS /tmp/ccaqdy02.s page 36 1162 000e 4260 str r2, [r0, #4] @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1207 004c D3F88820 ldr r2, [r3, #136] 1208 .loc 1 707 35 view .LVU412 1209 0050 C2F30272 ubfx r2, r2, #28, #3 - ARM GAS /tmp/ccgN7hfx.s page 37 + ARM GAS /tmp/ccaqdy02.s page 37 1210 .loc 1 707 33 view .LVU413 @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1250 008e 4263 str r2, [r0, #52] 722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 723:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Get the I2C1 clock configuration ------------------------------------------*/ - ARM GAS /tmp/ccgN7hfx.s page 38 + ARM GAS /tmp/ccaqdy02.s page 38 724:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE(); @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE(); 1287 .loc 1 742 3 is_stmt 1 view .LVU453 1288 .loc 1 742 41 is_stmt 0 view .LVU454 - ARM GAS /tmp/ccgN7hfx.s page 39 + ARM GAS /tmp/ccaqdy02.s page 39 1289 00cc D3F89020 ldr r2, [r3, #144] @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1325 0108 D3F89020 ldr r2, [r3, #144] 1326 010c 02F04072 and r2, r2, #50331648 1327 .loc 1 760 39 view .LVU473 - ARM GAS /tmp/ccgN7hfx.s page 40 + ARM GAS /tmp/ccaqdy02.s page 40 1328 0110 4267 str r2, [r0, #116] @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1363 .loc 1 779 44 view .LVU491 1364 0152 C0F88C20 str r2, [r0, #140] 780:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ - ARM GAS /tmp/ccgN7hfx.s page 41 + ARM GAS /tmp/ccaqdy02.s page 41 781:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1404 .LFE142: 1406 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits 1407 .align 1 - ARM GAS /tmp/ccgN7hfx.s page 42 + ARM GAS /tmp/ccaqdy02.s page 42 1408 .global HAL_RCCEx_GetPeriphCLKFreq @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 843:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection)); 844:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 845:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Configure SAI1 Clock source */ - ARM GAS /tmp/ccgN7hfx.s page 43 + ARM GAS /tmp/ccaqdy02.s page 43 846:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 900:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** return HAL_TIMEOUT; 901:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } 902:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } - ARM GAS /tmp/ccgN7hfx.s page 44 + ARM GAS /tmp/ccaqdy02.s page 44 903:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 957:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /*-------------------------------------- I2C2 Configuration -----------------------------------*/ 959:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) - ARM GAS /tmp/ccgN7hfx.s page 45 + ARM GAS /tmp/ccaqdy02.s page 45 960:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Configure the UART4 clock source */ 1015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); 1016:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } - ARM GAS /tmp/ccgN7hfx.s page 46 + ARM GAS /tmp/ccaqdy02.s page 46 1017:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1071:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } 1072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } 1073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** - ARM GAS /tmp/ccgN7hfx.s page 47 + ARM GAS /tmp/ccaqdy02.s page 47 1074:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /*-------------------------------------- LPTIM1 Configuration ----------------------------------- @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (Peri 1129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { 1130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* check for Parameters */ - ARM GAS /tmp/ccgN7hfx.s page 48 + ARM GAS /tmp/ccaqdy02.s page 48 1131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* return in case of Timeout detected */ 1186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** return HAL_TIMEOUT; 1187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } - ARM GAS /tmp/ccgN7hfx.s page 49 + ARM GAS /tmp/ccaqdy02.s page 49 1188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 1243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Configure the PLLSAI division factors */ 1244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */ - ARM GAS /tmp/ccgN7hfx.s page 50 + ARM GAS /tmp/ccaqdy02.s page 50 1245:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */ @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 1300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Get the PLLSAI/PLLI2S division factors -------------------------------------------*/ 1301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** PeriphClkInit->PLLI2SDivQ = (uint32_t)((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLI2SDIVQ) >> RCC_DCKCFGR1_ - ARM GAS /tmp/ccgN7hfx.s page 51 + ARM GAS /tmp/ccaqdy02.s page 51 1302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** PeriphClkInit->PLLSAIDivQ = (uint32_t)((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLSAIDIVQ) >> RCC_DCKCFGR1_ @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** PeriphClkInit->Sdmmc2ClockSelection = __HAL_RCC_GET_SDMMC2_SOURCE(); 1357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 1358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Get the RTC Clock configuration -----------------------------------------------*/ - ARM GAS /tmp/ccgN7hfx.s page 52 + ARM GAS /tmp/ccaqdy02.s page 52 1359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tempreg = (RCC->CFGR & RCC_CFGR_RTCPRE); @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1434 .LVL87: 1435 .L100: 1394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { - ARM GAS /tmp/ccgN7hfx.s page 53 + ARM GAS /tmp/ccaqdy02.s page 53 1395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** saiclocksource = RCC->DCKCFGR1; @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { 1450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** frequency = EXTERNAL_CLOCK_VALUE; 1451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** break; - ARM GAS /tmp/ccgN7hfx.s page 54 + ARM GAS /tmp/ccaqdy02.s page 54 1452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1500:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 1501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */ 1502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tmpreg = (((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLSAIDIVQ) >> 8) + 1); - ARM GAS /tmp/ccgN7hfx.s page 55 + ARM GAS /tmp/ccaqdy02.s page 55 1503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** frequency = frequency/(tmpreg); @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } 1558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 1559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** return frequency; - ARM GAS /tmp/ccgN7hfx.s page 56 + ARM GAS /tmp/ccaqdy02.s page 56 1560:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** frequency = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6))/(tmpreg); 1482 .loc 1 1440 9 is_stmt 1 view .LVU533 1440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** frequency = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6))/(tmpreg); - ARM GAS /tmp/ccgN7hfx.s page 57 + ARM GAS /tmp/ccaqdy02.s page 57 1483 .loc 1 1440 22 is_stmt 0 view .LVU534 @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1522 .L101: 1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { 1523 .loc 1 1397 5 view .LVU550 - ARM GAS /tmp/ccgN7hfx.s page 58 + ARM GAS /tmp/ccaqdy02.s page 58 1524 0072 B2F5401F cmp r2, #3145728 @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1563 0098 01F03F01 and r1, r1, #63 1406:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } 1564 .loc 1 1406 20 view .LVU566 - ARM GAS /tmp/ccgN7hfx.s page 59 + ARM GAS /tmp/ccaqdy02.s page 59 1565 009c 4E4A ldr r2, .L129+4 @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1603 .loc 1 1411 11 view .LVU582 1411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } 1604 .loc 1 1411 50 is_stmt 0 view .LVU583 - ARM GAS /tmp/ccgN7hfx.s page 60 + ARM GAS /tmp/ccaqdy02.s page 60 1605 00cc 414A ldr r2, .L129 @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** saiclocksource &= RCC_DCKCFGR1_SAI2SEL; 1646 .loc 1 1478 20 is_stmt 0 view .LVU597 1647 00f4 374B ldr r3, .L129 - ARM GAS /tmp/ccgN7hfx.s page 61 + ARM GAS /tmp/ccaqdy02.s page 61 1648 .LVL123: @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1687 .loc 1 1523 16 view .LVU612 1688 012c C2F30362 ubfx r2, r2, #24, #4 1689 .LVL128: - ARM GAS /tmp/ccgN7hfx.s page 62 + ARM GAS /tmp/ccaqdy02.s page 62 1524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1727 .loc 1 1539 16 view .LVU629 1728 015a 5B68 ldr r3, [r3, #4] 1539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { - ARM GAS /tmp/ccgN7hfx.s page 63 + ARM GAS /tmp/ccaqdy02.s page 63 1729 .loc 1 1539 11 view .LVU630 @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 1769 .loc 1 1499 9 is_stmt 1 view .LVU645 1499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** - ARM GAS /tmp/ccgN7hfx.s page 64 + ARM GAS /tmp/ccaqdy02.s page 64 1770 .loc 1 1499 38 is_stmt 0 view .LVU646 @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1809 .L116: 1518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } 1810 .loc 1 1518 11 is_stmt 1 view .LVU662 - ARM GAS /tmp/ccgN7hfx.s page 65 + ARM GAS /tmp/ccaqdy02.s page 65 1518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** } @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1562:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /** 1563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** * @} 1564:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** */ - ARM GAS /tmp/ccgN7hfx.s page 66 + ARM GAS /tmp/ccaqdy02.s page 66 1565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1876 0004 1B4A ldr r2, .L142 1877 0006 1368 ldr r3, [r2] 1878 0008 23F08063 bic r3, r3, #67108864 - ARM GAS /tmp/ccgN7hfx.s page 67 + ARM GAS /tmp/ccaqdy02.s page 67 1879 000c 1360 str r3, [r2] @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Enable the PLLI2S */ 1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_PLLI2S_ENABLE(); - ARM GAS /tmp/ccgN7hfx.s page 68 + ARM GAS /tmp/ccaqdy02.s page 68 1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1940 005a 13F0006F tst r3, #134217728 1941 005e 06D1 bne .L141 1633:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { - ARM GAS /tmp/ccgN7hfx.s page 69 + ARM GAS /tmp/ccaqdy02.s page 69 1942 .loc 1 1633 5 is_stmt 1 view .LVU701 @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1651:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Disable the PLLI2S */ 1652:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_PLLI2S_DISABLE(); 1984 .loc 1 1652 3 view .LVU709 - ARM GAS /tmp/ccgN7hfx.s page 70 + ARM GAS /tmp/ccaqdy02.s page 70 1985 0002 0B4A ldr r2, .L151 @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 2025 002e 00BF .align 2 2026 .L151: 2027 0030 00380240 .word 1073887232 - ARM GAS /tmp/ccgN7hfx.s page 71 + ARM GAS /tmp/ccaqdy02.s page 71 2028 .cfi_endproc @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 2063 000c 1360 str r3, [r2] 1688:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 1689:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Wait till PLLSAI is disabled */ - ARM GAS /tmp/ccgN7hfx.s page 72 + ARM GAS /tmp/ccaqdy02.s page 72 1690:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_PLLSAI_ENABLE(); 1717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** 1718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Wait till PLLSAI is ready */ - ARM GAS /tmp/ccgN7hfx.s page 73 + ARM GAS /tmp/ccaqdy02.s page 73 1719:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 1722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { 2126 .loc 1 1722 5 is_stmt 1 view .LVU753 1722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** { - ARM GAS /tmp/ccgN7hfx.s page 74 + ARM GAS /tmp/ccaqdy02.s page 74 2127 .loc 1 1722 9 is_stmt 0 view .LVU754 @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 2168 .loc 1 1741 3 view .LVU761 2169 0002 0B4A ldr r2, .L173 2170 0004 1368 ldr r3, [r2] - ARM GAS /tmp/ccgN7hfx.s page 75 + ARM GAS /tmp/ccaqdy02.s page 75 2171 0006 23F08053 bic r3, r3, #268435456 @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccgN7hfx.s page 1 2211 0030 00380240 .word 1073887232 2212 .cfi_endproc 2213 .LFE147: - ARM GAS /tmp/ccgN7hfx.s page 76 + ARM GAS /tmp/ccaqdy02.s page 76 2215 .text @@ -4509,36 +4509,36 @@ ARM GAS /tmp/ccgN7hfx.s page 1 2220 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" 2221 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" 2222 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/ccgN7hfx.s page 77 + ARM GAS /tmp/ccaqdy02.s page 77 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_rcc_ex.c - /tmp/ccgN7hfx.s:20 .text.HAL_RCCEx_PeriphCLKConfig:00000000 $t - /tmp/ccgN7hfx.s:26 .text.HAL_RCCEx_PeriphCLKConfig:00000000 HAL_RCCEx_PeriphCLKConfig - /tmp/ccgN7hfx.s:511 .text.HAL_RCCEx_PeriphCLKConfig:000002e4 $d - /tmp/ccgN7hfx.s:515 .text.HAL_RCCEx_PeriphCLKConfig:000002e8 $t - /tmp/ccgN7hfx.s:954 .text.HAL_RCCEx_PeriphCLKConfig:00000504 $d - /tmp/ccgN7hfx.s:961 .text.HAL_RCCEx_PeriphCLKConfig:00000510 $t - /tmp/ccgN7hfx.s:1131 .text.HAL_RCCEx_PeriphCLKConfig:000005fc $d - /tmp/ccgN7hfx.s:1136 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 $t - /tmp/ccgN7hfx.s:1142 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 HAL_RCCEx_GetPeriphCLKConfig - /tmp/ccgN7hfx.s:1401 .text.HAL_RCCEx_GetPeriphCLKConfig:00000180 $d - /tmp/ccgN7hfx.s:1407 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 $t - /tmp/ccgN7hfx.s:1413 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 HAL_RCCEx_GetPeriphCLKFreq - /tmp/ccgN7hfx.s:1840 .text.HAL_RCCEx_GetPeriphCLKFreq:000001d4 $d - /tmp/ccgN7hfx.s:1848 .text.HAL_RCCEx_EnablePLLI2S:00000000 $t - /tmp/ccgN7hfx.s:1854 .text.HAL_RCCEx_EnablePLLI2S:00000000 HAL_RCCEx_EnablePLLI2S - /tmp/ccgN7hfx.s:1961 .text.HAL_RCCEx_EnablePLLI2S:00000074 $d - /tmp/ccgN7hfx.s:1966 .text.HAL_RCCEx_DisablePLLI2S:00000000 $t - /tmp/ccgN7hfx.s:1972 .text.HAL_RCCEx_DisablePLLI2S:00000000 HAL_RCCEx_DisablePLLI2S - /tmp/ccgN7hfx.s:2027 .text.HAL_RCCEx_DisablePLLI2S:00000030 $d - /tmp/ccgN7hfx.s:2032 .text.HAL_RCCEx_EnablePLLSAI:00000000 $t - /tmp/ccgN7hfx.s:2038 .text.HAL_RCCEx_EnablePLLSAI:00000000 HAL_RCCEx_EnablePLLSAI - /tmp/ccgN7hfx.s:2145 .text.HAL_RCCEx_EnablePLLSAI:00000074 $d - /tmp/ccgN7hfx.s:2150 .text.HAL_RCCEx_DisablePLLSAI:00000000 $t - /tmp/ccgN7hfx.s:2156 .text.HAL_RCCEx_DisablePLLSAI:00000000 HAL_RCCEx_DisablePLLSAI - /tmp/ccgN7hfx.s:2211 .text.HAL_RCCEx_DisablePLLSAI:00000030 $d + /tmp/ccaqdy02.s:20 .text.HAL_RCCEx_PeriphCLKConfig:00000000 $t + /tmp/ccaqdy02.s:26 .text.HAL_RCCEx_PeriphCLKConfig:00000000 HAL_RCCEx_PeriphCLKConfig + /tmp/ccaqdy02.s:511 .text.HAL_RCCEx_PeriphCLKConfig:000002e4 $d + /tmp/ccaqdy02.s:515 .text.HAL_RCCEx_PeriphCLKConfig:000002e8 $t + /tmp/ccaqdy02.s:954 .text.HAL_RCCEx_PeriphCLKConfig:00000504 $d + /tmp/ccaqdy02.s:961 .text.HAL_RCCEx_PeriphCLKConfig:00000510 $t + /tmp/ccaqdy02.s:1131 .text.HAL_RCCEx_PeriphCLKConfig:000005fc $d + /tmp/ccaqdy02.s:1136 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 $t + /tmp/ccaqdy02.s:1142 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 HAL_RCCEx_GetPeriphCLKConfig + /tmp/ccaqdy02.s:1401 .text.HAL_RCCEx_GetPeriphCLKConfig:00000180 $d + /tmp/ccaqdy02.s:1407 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 $t + /tmp/ccaqdy02.s:1413 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 HAL_RCCEx_GetPeriphCLKFreq + /tmp/ccaqdy02.s:1840 .text.HAL_RCCEx_GetPeriphCLKFreq:000001d4 $d + /tmp/ccaqdy02.s:1848 .text.HAL_RCCEx_EnablePLLI2S:00000000 $t + /tmp/ccaqdy02.s:1854 .text.HAL_RCCEx_EnablePLLI2S:00000000 HAL_RCCEx_EnablePLLI2S + /tmp/ccaqdy02.s:1961 .text.HAL_RCCEx_EnablePLLI2S:00000074 $d + /tmp/ccaqdy02.s:1966 .text.HAL_RCCEx_DisablePLLI2S:00000000 $t + /tmp/ccaqdy02.s:1972 .text.HAL_RCCEx_DisablePLLI2S:00000000 HAL_RCCEx_DisablePLLI2S + /tmp/ccaqdy02.s:2027 .text.HAL_RCCEx_DisablePLLI2S:00000030 $d + /tmp/ccaqdy02.s:2032 .text.HAL_RCCEx_EnablePLLSAI:00000000 $t + /tmp/ccaqdy02.s:2038 .text.HAL_RCCEx_EnablePLLSAI:00000000 HAL_RCCEx_EnablePLLSAI + /tmp/ccaqdy02.s:2145 .text.HAL_RCCEx_EnablePLLSAI:00000074 $d + /tmp/ccaqdy02.s:2150 .text.HAL_RCCEx_DisablePLLSAI:00000000 $t + /tmp/ccaqdy02.s:2156 .text.HAL_RCCEx_DisablePLLSAI:00000000 HAL_RCCEx_DisablePLLSAI + /tmp/ccaqdy02.s:2211 .text.HAL_RCCEx_DisablePLLSAI:00000030 $d UNDEFINED SYMBOLS HAL_GetTick diff --git a/build/stm32f7xx_hal_rcc_ex.o b/build/stm32f7xx_hal_rcc_ex.o index 53d04f5635e061176c6daa73873bdd121c59fe14..7ce8a09e806a6ccfa1cb4a229e5aa101aefd792f 100644 GIT binary patch delta 986 zcmX|*t%O6v>nzoVV!*XRJ-=8n&1{t{euOu~kPxImMMmjRm)|DF&$;Z-vXm`m+K2t&+2L}Sz>L5bo7#M0<>AP3iq<4OS)Q2 zGC7K)I+l=3x)kw>jyp&%+_4ro4>8N6F4hnit9w&Njl|)vH5<=@gJjc>U^^-GH?V|R zJt0PFS*qz{>>k?g30LGV^Pl&tOtAJwxU(_m+pz6fd`EfSHu? zji1=YFLNSWKRU-2-;Z#$389PyYNt=i7+}r*2=eV&j^FeGIBZY6Gv+{aq6Vfp7NEsm zimPGF?!g_?PwaUPs8mZ-wJp*fQbWf(BhhBHD%5o>7Ky3{np?vWtt}FZbc7EFwaVSW zuE>#CcXMZGx=(G%=00qL_cdd<0{UwMxCvg+7=>(q0FOXBjo09TzZ<*27YN`v7^IQF z0*wQZr{!Y->NGd^c{7~QHqZxGH4nZAvoy}ZR~iLaQ^(@YI#0THA42iO%@cQ_ALq*N EKaSkLi2wiq delta 1035 zcmZ9Ke@IhN6vyvy3)KUyhOVpU#E0qY8Io;GjI+`;pDvAt+ z{G&J+i%3c^LkKcM3W8E7j3|<%F#4nVuSh6LP)O?D`Q{(}bKd=Y@A;l{?tOQD1pgVq zm(w}kHL>-JAY3sZBtF3inIOTOY?;y_#PP=O?1K&CkZ;aPKhA(NHu4DRUa@sS%2|XE z-$?__&4yFvLVOeMneBKK-k5h;_p;0%ob@D2$l!$%*dW^T%(Rp4S6n5+3N5Ak9p@yW znC&mcd83d6?V@5W)KhhZvkt~;IfN*Ti3%=*_oCezWflI$9s7kEFiLiAiyj=(=Da#) za%c=l5~;Y8nv;G)V}dRB0qtdQiEFJ9`OHw&kS7Za>oqiyIT%gI zEPX_q83OB;7Yu{zmN|x@b;~rvh=wB4y#u4AJUxk?$k4B;nZ(SJE@|i>$$IFpq~;!D z>X4=ukWC!LsD?$Pf|aNyCd^BWd&z6q6G7 zd6w`@ONfvjR&!Rv6Qqycmf@v_r^#(L!0Q<5GR|T0n3>;d+=of?K13WR-;P}r;PtN1UOD&Fo;Tcp<)4#2nE;>kM2m&TcjV9GU&JD{P~g9l)g z#waY&_z)`H9y|*}?p|CClE;IWp^3&KxJ%<5SoP#!CuFM`oFyOJ>UMomK0;3+uU3XZ qmEccsL(S4JQ*9@dyJYxCH76`m&AA()4>8Sokm%I|2u;AWTmA=ULD-uB diff --git a/build/stm32f7xx_hal_sd.lst b/build/stm32f7xx_hal_sd.lst index 9edc03c..c78a2bc 100644 --- a/build/stm32f7xx_hal_sd.lst +++ b/build/stm32f7xx_hal_sd.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccMMu31U.s page 1 +ARM GAS /tmp/ccqxsRKi.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** This driver implements a high level communication layer for read and write from/to 30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** this memory. The needed STM32 hardware resources (SDMMC and GPIO) are performed by 31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** the user in HAL_SD_MspInit() function (MSP layer). - ARM GAS /tmp/ccMMu31U.s page 2 + ARM GAS /tmp/ccqxsRKi.s page 2 32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** Basically, the MSP layer configuration should be the same as we provide in the @@ -118,7 +118,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** This phase of initialization is done through SDMMC_Init() and 88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SDMMC_PowerState_ON() SDMMC low level APIs. - ARM GAS /tmp/ccMMu31U.s page 3 + ARM GAS /tmp/ccqxsRKi.s page 3 89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -178,7 +178,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** This function support only 512-bytes block length (the block size should be 144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** chosen as 512 bytes). 145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** You can choose either one block read operation or multiple block read operation - ARM GAS /tmp/ccMMu31U.s page 4 + ARM GAS /tmp/ccqxsRKi.s page 4 146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** by adjusting the "NumberOfBlocks" parameter. @@ -238,7 +238,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (+) __HAL_SD_ENABLE_IT: Enable the SD device interrupt 201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (+) __HAL_SD_DISABLE_IT: Disable the SD device interrupt 202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (+) __HAL_SD_GET_FLAG:Check whether the specified SD flag is set or not - ARM GAS /tmp/ccMMu31U.s page 5 + ARM GAS /tmp/ccqxsRKi.s page 5 203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (+) __HAL_SD_CLEAR_FLAG: Clear the SD's pending flags @@ -298,7 +298,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Includes ------------------------------------------------------------------*/ 259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #include "stm32f7xx_hal.h" - ARM GAS /tmp/ccMMu31U.s page 6 + ARM GAS /tmp/ccqxsRKi.s page 6 260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /** @addtogroup SD_Exported_Functions_Group1 315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @brief Initialization and de-initialization functions 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * - ARM GAS /tmp/ccMMu31U.s page 7 + ARM GAS /tmp/ccqxsRKi.s page 7 317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @verbatim @@ -418,7 +418,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** HAL_SD_MspInit(hsd); 373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - ARM GAS /tmp/ccMMu31U.s page 8 + ARM GAS /tmp/ccqxsRKi.s page 8 374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } @@ -478,7 +478,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (void)SDMMC_PowerState_ON(hsd->Instance); 429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Enable SDMMC Clock */ - ARM GAS /tmp/ccMMu31U.s page 9 + ARM GAS /tmp/ccqxsRKi.s page 9 431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** __HAL_SD_ENABLE(hsd); @@ -538,7 +538,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Set SD power state to off */ 487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SD_PowerOFF(hsd); - ARM GAS /tmp/ccMMu31U.s page 10 + ARM GAS /tmp/ccqxsRKi.s page 10 488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -598,7 +598,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /** @addtogroup SD_Exported_Functions_Group2 544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @brief Data transfer functions - ARM GAS /tmp/ccMMu31U.s page 11 + ARM GAS /tmp/ccqxsRKi.s page 11 545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @@ -658,7 +658,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(hsd->SdCard.CardType != CARD_SDHC_SDXC) 601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 12 + ARM GAS /tmp/ccqxsRKi.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** add *= 512U; @@ -718,7 +718,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tempbuff++; 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** dataremaining--; 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** *tempbuff = (uint8_t)((data >> 24U) & 0xFFU); - ARM GAS /tmp/ccMMu31U.s page 13 + ARM GAS /tmp/ccqxsRKi.s page 13 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tempbuff++; @@ -778,7 +778,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** else if(__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Clear all the static flags */ - ARM GAS /tmp/ccMMu31U.s page 14 + ARM GAS /tmp/ccqxsRKi.s page 14 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); @@ -838,7 +838,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @brief Allows to write block(s) to a specified address in a card. The Data 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * transfer is managed by polling mode. 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @note This API should be followed by a check on the card state through - ARM GAS /tmp/ccMMu31U.s page 15 + ARM GAS /tmp/ccqxsRKi.s page 15 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * HAL_SD_GetCardState(). @@ -898,7 +898,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_WRITE_MULTIPLE_BLOCK; 829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 16 + ARM GAS /tmp/ccqxsRKi.s page 16 830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Write Multi Block command */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Send stop transmission command in case of multiblock write */ - ARM GAS /tmp/ccMMu31U.s page 17 + ARM GAS /tmp/ccqxsRKi.s page 17 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DATAEND) && (NumberOfBlocks > 1U)) @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY; 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_OK; - ARM GAS /tmp/ccMMu31U.s page 18 + ARM GAS /tmp/ccqxsRKi.s page 18 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** add *= 512U; 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 19 + ARM GAS /tmp/ccqxsRKi.s page 19 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval HAL status 1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */ 1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, u - ARM GAS /tmp/ccMMu31U.s page 20 + ARM GAS /tmp/ccqxsRKi.s page 20 1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Clear all the static flags */ 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); 1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= errorstate; - ARM GAS /tmp/ccMMu31U.s page 21 + ARM GAS /tmp/ccqxsRKi.s page 21 1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY; @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; 1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 22 + ARM GAS /tmp/ccqxsRKi.s page 22 1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_BUSY; @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** errorstate = SDMMC_CmdReadMultiBlock(hsd->Instance, add); 1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** else - ARM GAS /tmp/ccMMu31U.s page 23 + ARM GAS /tmp/ccqxsRKi.s page 23 1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr)) 1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; - ARM GAS /tmp/ccMMu31U.s page 24 + ARM GAS /tmp/ccqxsRKi.s page 24 1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->hdmatx->Init.Direction = DMA_MEMORY_TO_PERIPH; 1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** MODIFY_REG(hsd->hdmatx->Instance->CR, DMA_SxCR_DIR, hsd->hdmatx->Init.Direction); 1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 25 + ARM GAS /tmp/ccqxsRKi.s page 25 1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Enable the DMA Channel */ @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(end_add > (hsd->SdCard.LogBlockNbr)) 1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 26 + ARM GAS /tmp/ccqxsRKi.s page 26 1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE; @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; 1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 27 + ARM GAS /tmp/ccqxsRKi.s page 27 1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= errorstate; 1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U) - ARM GAS /tmp/ccMMu31U.s page 28 + ARM GAS /tmp/ccqxsRKi.s page 28 1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCallback(hsd); @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #else 1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** HAL_SD_TxCpltCallback(hsd); 1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ - ARM GAS /tmp/ccMMu31U.s page 29 + ARM GAS /tmp/ccqxsRKi.s page 29 1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Abort the SD DMA channel */ 1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(((context & SD_CONTEXT_WRITE_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_WRITE_MULTIPLE - ARM GAS /tmp/ccMMu31U.s page 30 + ARM GAS /tmp/ccqxsRKi.s page 30 1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @param hsd : Pointer to a SD_HandleTypeDef structure that contains 1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * the configuration information. 1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval SD Error Code - ARM GAS /tmp/ccMMu31U.s page 31 + ARM GAS /tmp/ccqxsRKi.s page 31 1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */ @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval None 1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */ 1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** __weak void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd) - ARM GAS /tmp/ccMMu31U.s page 32 + ARM GAS /tmp/ccqxsRKi.s page 32 1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** break; 1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** case HAL_SD_MSP_INIT_CB_ID : 1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->MspInitCallback = pCallback; - ARM GAS /tmp/ccMMu31U.s page 33 + ARM GAS /tmp/ccqxsRKi.s page 33 1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** break; @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @arg @ref HAL_SD_MSP_DEINIT_CB_ID SD MspDeInit Callback ID 1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval status 1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */ - ARM GAS /tmp/ccMMu31U.s page 34 + ARM GAS /tmp/ccqxsRKi.s page 34 1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef Callbac @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** else 1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 35 + ARM GAS /tmp/ccqxsRKi.s page 35 1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Update the error code */ @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 1968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCID->ManufactDate = (uint16_t)((hsd->CID[3] & 0x000FFF00U) >> 8U); 1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 36 + ARM GAS /tmp/ccqxsRKi.s page 36 1970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCID->CID_CRC = (uint8_t)((hsd->CID[3] & 0x000000FEU) >> 1U); @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCSD->DeviceSizeMul = (uint8_t)((hsd->CSD[2] & 0x00038000U) >> 15U); 2026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 37 + ARM GAS /tmp/ccqxsRKi.s page 37 2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->SdCard.BlockNbr = (pCSD->DeviceSize + 1U) ; @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCSD->FileFormat = (uint8_t)((hsd->CSD[3] & 0x00000C00U) >> 10U); 2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCSD->ECC= (uint8_t)((hsd->CSD[3] & 0x00000300U) >> 8U); - ARM GAS /tmp/ccMMu31U.s page 38 + ARM GAS /tmp/ccqxsRKi.s page 38 2084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Set Block Size for Card */ 2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE); 2140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE) - ARM GAS /tmp/ccMMu31U.s page 39 + ARM GAS /tmp/ccqxsRKi.s page 39 2141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 2196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(hsd->SdCard.CardType != CARD_SECURED) 2197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 40 + ARM GAS /tmp/ccqxsRKi.s page 40 2198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(WideMode == SDMMC_BUS_WIDE_8B) @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** status = HAL_ERROR; 2253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 2254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 41 + ARM GAS /tmp/ccqxsRKi.s page 41 2255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Change State */ @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if (((context & SD_CONTEXT_WRITE_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_WRITE_MULTIPLE_ 2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 2311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(HAL_DMA_Abort(hsd->hdmatx) != HAL_OK) - ARM GAS /tmp/ccMMu31U.s page 42 + ARM GAS /tmp/ccqxsRKi.s page 42 2312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Disable the SD DMA request */ 2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Instance->DCTRL &= (uint32_t)~((uint32_t)SDMMC_DCTRL_DMAEN); 2368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 43 + ARM GAS /tmp/ccqxsRKi.s page 43 2369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Abort the SD DMA Tx channel */ @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @} 2424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */ 2425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 44 + ARM GAS /tmp/ccqxsRKi.s page 44 2426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /** @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval None 2452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */ 2453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** static void SD_DMAReceiveCplt(DMA_HandleTypeDef *hdma) - ARM GAS /tmp/ccMMu31U.s page 45 + ARM GAS /tmp/ccqxsRKi.s page 45 2454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Clear All flags */ 2509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); 2510:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 46 + ARM GAS /tmp/ccqxsRKi.s page 46 2511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Disable All interrupts */ @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #if (USE_HAL_SD_REGISTER_CALLBACKS == 1) 2566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCallback(hsd); 2567:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #else - ARM GAS /tmp/ccMMu31U.s page 47 + ARM GAS /tmp/ccqxsRKi.s page 47 2568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** HAL_SD_ErrorCallback(hsd); @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 2623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Check the power State */ 2624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(SDMMC_GetPowerState(hsd->Instance) == 0U) - ARM GAS /tmp/ccMMu31U.s page 48 + ARM GAS /tmp/ccqxsRKi.s page 48 2625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2679:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Get the Card Class */ 2680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->SdCard.Class = (SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2) >> 20U); 2681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 49 + ARM GAS /tmp/ccqxsRKi.s page 49 2682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Get CSD parameters */ @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 81 .loc 1 2713 3 view .LVU11 2714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 2715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* CMD0: GO_IDLE_STATE */ - ARM GAS /tmp/ccMMu31U.s page 50 + ARM GAS /tmp/ccqxsRKi.s page 50 2716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** errorstate = SDMMC_CmdGoIdleState(hsd->Instance); @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2757:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return errorstate; 2758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 2759:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 51 + ARM GAS /tmp/ccqxsRKi.s page 51 2760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Send CMD41 */ @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 113 .LVL11: 2724:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 114 .loc 1 2724 3 is_stmt 1 view .LVU21 - ARM GAS /tmp/ccMMu31U.s page 52 + ARM GAS /tmp/ccqxsRKi.s page 52 2724:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 153 0040 0546 mov r5, r0 154 0042 E7E7 b .L2 155 .L6: - ARM GAS /tmp/ccMMu31U.s page 53 + ARM GAS /tmp/ccqxsRKi.s page 53 2743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE) @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 195 006c FFF7FEFF bl SDMMC_CmdAppCommand 196 .LVL21: 2755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 54 + ARM GAS /tmp/ccqxsRKi.s page 54 197 .loc 1 2755 5 is_stmt 1 view .LVU53 @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 235 008e 019A ldr r2, [sp, #4] 2776:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 236 .loc 1 2776 5 view .LVU70 - ARM GAS /tmp/ccMMu31U.s page 55 + ARM GAS /tmp/ccqxsRKi.s page 55 237 0090 4FF6FE73 movw r3, #65534 @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 282 .thumb 283 .thumb_func 285 SD_PowerOFF: - ARM GAS /tmp/ccMMu31U.s page 56 + ARM GAS /tmp/ccqxsRKi.s page 56 286 .LVL32: @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2816:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t tickstart = HAL_GetTick(); 2817:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t count; 2818:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t *pData = pSDstatus; - ARM GAS /tmp/ccMMu31U.s page 57 + ARM GAS /tmp/ccqxsRKi.s page 57 2819:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2873:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_SD_ERROR_TIMEOUT; 2874:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 2875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 58 + ARM GAS /tmp/ccqxsRKi.s page 58 2876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 2931:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return errorstate; 2932:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 59 + ARM GAS /tmp/ccqxsRKi.s page 59 2933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2987:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /** 2988:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @brief Disables the SDMMC wide bus mode. 2989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @param hsd: Pointer to SD handle - ARM GAS /tmp/ccMMu31U.s page 60 + ARM GAS /tmp/ccqxsRKi.s page 60 2990:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval error state @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3044:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t errorstate; 3045:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t tickstart = HAL_GetTick(); 3046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t index = 0U; - ARM GAS /tmp/ccMMu31U.s page 61 + ARM GAS /tmp/ccqxsRKi.s page 61 3047:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t tempscr[2U] = {0U, 0U}; @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3101:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_SD_ERROR_DATA_TIMEOUT; 3102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 3103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** else if(__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - ARM GAS /tmp/ccMMu31U.s page 62 + ARM GAS /tmp/ccqxsRKi.s page 62 3104:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 3143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tmp = hsd->pRxBuffPtr; 335 .loc 1 3143 3 view .LVU91 - ARM GAS /tmp/ccMMu31U.s page 63 + ARM GAS /tmp/ccqxsRKi.s page 63 336 .loc 1 3143 7 is_stmt 0 view .LVU92 @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** dataremaining--; 360 .loc 1 3153 7 is_stmt 1 view .LVU102 361 .LVL41: - ARM GAS /tmp/ccMMu31U.s page 64 + ARM GAS /tmp/ccqxsRKi.s page 64 3154:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** *tmp = (uint8_t)((data >> 8U) & 0xFFU); @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3149:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 397 .loc 1 3149 27 discriminator 1 view .LVU122 398 0028 072D cmp r5, #7 - ARM GAS /tmp/ccMMu31U.s page 65 + ARM GAS /tmp/ccqxsRKi.s page 65 399 002a EED9 bls .L28 @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 441 .LCFI7: 442 .cfi_def_cfa_offset 32 3179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t count, data, dataremaining; - ARM GAS /tmp/ccMMu31U.s page 66 + ARM GAS /tmp/ccqxsRKi.s page 66 443 .loc 1 3179 3 is_stmt 1 view .LVU132 @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 468 .cfi_restore_state 3190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tmp++; 469 .loc 1 3190 7 is_stmt 1 view .LVU141 - ARM GAS /tmp/ccMMu31U.s page 67 + ARM GAS /tmp/ccqxsRKi.s page 67 3190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tmp++; @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (void)SDMMC_WriteFIFO(hsd->Instance, &data); 505 .loc 1 3201 7 is_stmt 1 view .LVU161 3201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (void)SDMMC_WriteFIFO(hsd->Instance, &data); - ARM GAS /tmp/ccMMu31U.s page 68 + ARM GAS /tmp/ccqxsRKi.s page 68 506 .loc 1 3201 20 is_stmt 0 view .LVU162 @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 552 @ frame_needed = 0, uses_anonymous_args = 0 2813:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SDMMC_DataInitTypeDef config; 553 .loc 1 2813 1 is_stmt 0 view .LVU175 - ARM GAS /tmp/ccMMu31U.s page 69 + ARM GAS /tmp/ccqxsRKi.s page 69 554 0000 F0B5 push {r4, r5, r6, r7, lr} @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 595 .loc 1 2828 3 is_stmt 1 view .LVU189 2828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 70 + ARM GAS /tmp/ccqxsRKi.s page 70 596 .loc 1 2828 5 is_stmt 0 view .LVU190 @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 632 .loc 1 2843 24 is_stmt 0 view .LVU208 633 0042 4FF0FF33 mov r3, #-1 634 0046 0093 str r3, [sp] - ARM GAS /tmp/ccMMu31U.s page 71 + ARM GAS /tmp/ccqxsRKi.s page 71 2844:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.DataBlockSize = SDMMC_DATABLOCK_SIZE_64B; @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return errorstate; 672 .loc 1 2855 5 is_stmt 1 view .LVU226 2855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return errorstate; - ARM GAS /tmp/ccMMu31U.s page 72 + ARM GAS /tmp/ccqxsRKi.s page 72 673 .loc 1 2855 8 is_stmt 0 view .LVU227 @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 712 0090 2B68 ldr r3, [r5] 713 0092 5C6B ldr r4, [r3, #52] 714 0094 40F22A42 movw r2, #1066 - ARM GAS /tmp/ccMMu31U.s page 73 + ARM GAS /tmp/ccqxsRKi.s page 73 2860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 753 .LVL79: 2896:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pData++; 754 .loc 1 2896 12 discriminator 1 view .LVU259 - ARM GAS /tmp/ccMMu31U.s page 74 + ARM GAS /tmp/ccqxsRKi.s page 74 755 00cc 46F8040B str r0, [r6], #4 @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 797 00f8 F9E7 b .L37 798 .L50: 2879:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 75 + ARM GAS /tmp/ccqxsRKi.s page 75 799 .loc 1 2879 12 view .LVU272 @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 846 .loc 1 3045 24 view .LVU281 847 000c 0646 mov r6, r0 848 .LVL87: - ARM GAS /tmp/ccMMu31U.s page 76 + ARM GAS /tmp/ccqxsRKi.s page 76 3046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t tempscr[2U] = {0U, 0U}; @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE) 890 .loc 1 3058 16 view .LVU295 891 002c FFF7FEFF bl SDMMC_CmdAppCommand - ARM GAS /tmp/ccMMu31U.s page 77 + ARM GAS /tmp/ccqxsRKi.s page 77 892 .LVL94: @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 929 .LVL96: 3073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE) 930 .loc 1 3073 3 is_stmt 1 view .LVU313 - ARM GAS /tmp/ccMMu31U.s page 78 + ARM GAS /tmp/ccqxsRKi.s page 78 3073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE) @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 970 0082 07D1 bne .L63 3081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 971 .loc 1 3081 5 is_stmt 1 view .LVU329 - ARM GAS /tmp/ccMMu31U.s page 79 + ARM GAS /tmp/ccqxsRKi.s page 79 3081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** ((tempscr[1] & SDMMC_16TO23BITS) >> 8) | ((tempscr[1] & SDMMC_24TO31BITS) >> 24)); 1009 .loc 1 3121 86 view .LVU347 1010 00b4 1302 lsls r3, r2, #8 - ARM GAS /tmp/ccMMu31U.s page 80 + ARM GAS /tmp/ccqxsRKi.s page 80 1011 00b6 03F47F03 and r3, r3, #16711680 @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1048 00e8 0825 movs r5, #8 1049 .LVL106: 3099:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 81 + ARM GAS /tmp/ccqxsRKi.s page 81 1050 .loc 1 3099 5 is_stmt 0 view .LVU365 @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1094 @ frame_needed = 0, uses_anonymous_args = 0 2946:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t scr[2U] = {0U, 0U}; 1095 .loc 1 2946 1 is_stmt 0 view .LVU378 - ARM GAS /tmp/ccMMu31U.s page 82 + ARM GAS /tmp/ccqxsRKi.s page 82 1096 0000 10B5 push {r4, lr} @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2966:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE) 1136 .loc 1 2966 75 is_stmt 0 view .LVU393 1137 002a 216D ldr r1, [r4, #80] - ARM GAS /tmp/ccMMu31U.s page 83 + ARM GAS /tmp/ccqxsRKi.s page 83 2966:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE) @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1180 .LFE178: 1182 .section .text.SD_WideBus_Disable,"ax",%progbits 1183 .align 1 - ARM GAS /tmp/ccMMu31U.s page 84 + ARM GAS /tmp/ccqxsRKi.s page 84 1184 .syntax unified @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1227 .loc 1 3004 3 is_stmt 1 view .LVU417 3004:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 1228 .loc 1 3004 5 is_stmt 0 view .LVU418 - ARM GAS /tmp/ccMMu31U.s page 85 + ARM GAS /tmp/ccqxsRKi.s page 85 1229 0020 80B9 cbnz r0, .L80 @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1269 0046 10BD pop {r4, pc} 1270 .LVL131: 1271 .L83: - ARM GAS /tmp/ccMMu31U.s page 86 + ARM GAS /tmp/ccqxsRKi.s page 86 1272 .LCFI25: @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1317 .loc 1 2928 16 view .LVU443 1318 000e FFF7FEFF bl SDMMC_CmdSendStatus 1319 .LVL136: - ARM GAS /tmp/ccMMu31U.s page 87 + ARM GAS /tmp/ccqxsRKi.s page 87 2929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1365 @ frame_needed = 0, uses_anonymous_args = 0 1366 @ link register save eliminated. 517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 88 + ARM GAS /tmp/ccqxsRKi.s page 88 1367 .loc 1 517 3 view .LVU455 @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1417 0004 0446 mov r4, r0 482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 1418 .loc 1 482 3 is_stmt 1 view .LVU464 - ARM GAS /tmp/ccMMu31U.s page 89 + ARM GAS /tmp/ccqxsRKi.s page 89 484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1463 .LFB146: 571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SDMMC_DataInitTypeDef config; 1464 .loc 1 571 1 is_stmt 1 view -0 - ARM GAS /tmp/ccMMu31U.s page 90 + ARM GAS /tmp/ccqxsRKi.s page 90 1465 .cfi_startproc @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 585:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 1507 .loc 1 585 5 view .LVU490 1508 0022 012F cmp r7, #1 - ARM GAS /tmp/ccMMu31U.s page 91 + ARM GAS /tmp/ccqxsRKi.s page 91 1509 0024 40F00481 bne .L102 @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1545 004a 4FF0FF33 mov r3, #-1 1546 004e 0093 str r3, [sp] 607:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - ARM GAS /tmp/ccMMu31U.s page 92 + ARM GAS /tmp/ccqxsRKi.s page 92 1547 .loc 1 607 5 is_stmt 1 view .LVU509 @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 1584 .loc 1 620 7 is_stmt 1 view .LVU527 620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 93 + ARM GAS /tmp/ccqxsRKi.s page 93 1585 .loc 1 620 20 is_stmt 0 view .LVU528 @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1623 .LVL157: 1624 .L105: 624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 94 + ARM GAS /tmp/ccqxsRKi.s page 94 1625 .loc 1 624 7 is_stmt 1 view .LVU545 @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1663 00c4 2868 ldr r0, [r5] 1664 00c6 FFF7FEFF bl SDMMC_ReadFIFO 1665 .LVL160: - ARM GAS /tmp/ccMMu31U.s page 95 + ARM GAS /tmp/ccqxsRKi.s page 95 649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tempbuff++; @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1699 .loc 1 660 24 is_stmt 0 view .LVU582 1700 00de A8F10408 sub r8, r8, #4 1701 .LVL166: - ARM GAS /tmp/ccMMu31U.s page 96 + ARM GAS /tmp/ccqxsRKi.s page 96 646:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 667:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= HAL_SD_ERROR_TIMEOUT; 1742 .loc 1 667 9 is_stmt 1 view .LVU597 1743 0114 2B68 ldr r3, [r5] - ARM GAS /tmp/ccMMu31U.s page 97 + ARM GAS /tmp/ccqxsRKi.s page 97 1744 0116 4B4A ldr r2, .L130 @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 695:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 1782 .loc 1 695 5 is_stmt 1 view .LVU614 695:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 98 + ARM GAS /tmp/ccqxsRKi.s page 98 1783 .loc 1 695 8 is_stmt 0 view .LVU615 @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 733:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** *tempbuff = (uint8_t)((data >> 8U) & 0xFFU); 1821 .loc 1 733 7 view .LVU632 734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tempbuff++; - ARM GAS /tmp/ccMMu31U.s page 99 + ARM GAS /tmp/ccqxsRKi.s page 99 1822 .loc 1 734 7 view .LVU633 @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1857 018e A0EB0900 sub r0, r0, r9 744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 1858 .loc 1 744 9 discriminator 1 view .LVU653 - ARM GAS /tmp/ccMMu31U.s page 100 + ARM GAS /tmp/ccqxsRKi.s page 100 1859 0192 5045 cmp r0, r10 @@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1897 .loc 1 685 11 is_stmt 1 view .LVU669 1898 01c0 2A68 ldr r2, [r5] 1899 01c2 2049 ldr r1, .L130 - ARM GAS /tmp/ccMMu31U.s page 101 + ARM GAS /tmp/ccqxsRKi.s page 101 1900 01c4 9163 str r1, [r2, #56] @@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 1937 .loc 1 702 7 is_stmt 1 view .LVU687 702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 102 + ARM GAS /tmp/ccqxsRKi.s page 102 1938 .loc 1 702 14 is_stmt 0 view .LVU688 @@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1975 .loc 1 719 7 is_stmt 1 view .LVU705 719:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; 1976 .loc 1 719 20 is_stmt 0 view .LVU706 - ARM GAS /tmp/ccMMu31U.s page 103 + ARM GAS /tmp/ccqxsRKi.s page 103 1977 021a 0023 movs r3, #0 @@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2017 0242 00BF .align 2 2018 .L130: 2019 0244 FF054000 .word 4195839 - ARM GAS /tmp/ccMMu31U.s page 104 + ARM GAS /tmp/ccqxsRKi.s page 104 2020 .cfi_endproc @@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 790:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 2067 .loc 1 790 3 view .LVU730 790:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 105 + ARM GAS /tmp/ccqxsRKi.s page 105 2068 .loc 1 790 5 is_stmt 0 view .LVU731 @@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2105 0044 012B cmp r3, #1 2106 0046 00D0 beq .L137 813:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 106 + ARM GAS /tmp/ccqxsRKi.s page 106 2107 .loc 1 813 7 is_stmt 1 view .LVU749 @@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 2144 .loc 1 826 5 is_stmt 1 view .LVU767 826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 107 + ARM GAS /tmp/ccqxsRKi.s page 107 2145 .loc 1 826 7 is_stmt 0 view .LVU768 @@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2184 .L153: 802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; 2185 .loc 1 802 7 is_stmt 1 view .LVU784 - ARM GAS /tmp/ccMMu31U.s page 108 + ARM GAS /tmp/ccqxsRKi.s page 108 802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; @@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2225 .loc 1 845 7 is_stmt 1 view .LVU799 845:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_NONE; 2226 .loc 1 845 18 is_stmt 0 view .LVU800 - ARM GAS /tmp/ccMMu31U.s page 109 + ARM GAS /tmp/ccqxsRKi.s page 109 2227 00be 0123 movs r3, #1 @@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 867:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** data |= ((uint32_t)(*tempbuff) << 24U); 2263 .loc 1 867 11 view .LVU819 868:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tempbuff++; - ARM GAS /tmp/ccMMu31U.s page 110 + ARM GAS /tmp/ccqxsRKi.s page 110 2264 .loc 1 868 11 view .LVU820 @@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2303 0106 BAF1000F cmp r10, #0 2304 010a 0CD0 beq .L145 2305 .L141: - ARM GAS /tmp/ccMMu31U.s page 111 + ARM GAS /tmp/ccqxsRKi.s page 111 852:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 2344 .loc 1 882 16 is_stmt 0 view .LVU852 2345 013e 0327 movs r7, #3 - ARM GAS /tmp/ccMMu31U.s page 112 + ARM GAS /tmp/ccqxsRKi.s page 112 2346 0140 58E0 b .L134 @@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 927:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= HAL_SD_ERROR_TX_UNDERRUN; 2384 .loc 1 927 7 is_stmt 1 view .LVU869 2385 0170 224A ldr r2, .L159 - ARM GAS /tmp/ccMMu31U.s page 113 + ARM GAS /tmp/ccqxsRKi.s page 113 2386 0172 9A63 str r2, [r3, #56] @@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2423 019a 1343 orrs r3, r3, r2 2424 019c AB63 str r3, [r5, #56] 898:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_NONE; - ARM GAS /tmp/ccMMu31U.s page 114 + ARM GAS /tmp/ccqxsRKi.s page 114 2425 .loc 1 898 11 is_stmt 1 view .LVU887 @@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2462 .loc 1 919 7 view .LVU904 919:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY; 2463 .loc 1 919 10 is_stmt 0 view .LVU905 - ARM GAS /tmp/ccMMu31U.s page 115 + ARM GAS /tmp/ccqxsRKi.s page 115 2464 01c6 AB6B ldr r3, [r5, #56] @@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 948:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 2501 .loc 1 948 12 is_stmt 0 view .LVU923 2502 01f2 0127 movs r7, #1 - ARM GAS /tmp/ccMMu31U.s page 116 + ARM GAS /tmp/ccqxsRKi.s page 116 2503 .LVL214: @@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 2552 .loc 1 971 3 view .LVU931 971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 117 + ARM GAS /tmp/ccqxsRKi.s page 117 2553 .loc 1 971 5 is_stmt 0 view .LVU932 @@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->RxXferSize = BLOCKSIZE * NumberOfBlocks; 2592 .loc 1 992 5 is_stmt 1 view .LVU948 992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->RxXferSize = BLOCKSIZE * NumberOfBlocks; - ARM GAS /tmp/ccMMu31U.s page 118 + ARM GAS /tmp/ccqxsRKi.s page 118 2593 .loc 1 992 21 is_stmt 0 view .LVU949 @@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2631 0056 0293 str r3, [sp, #8] 1006:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; 2632 .loc 1 1006 5 is_stmt 1 view .LVU966 - ARM GAS /tmp/ccMMu31U.s page 119 + ARM GAS /tmp/ccqxsRKi.s page 119 1006:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; @@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2671 0082 9A63 str r2, [r3, #56] 1030:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY; 2672 .loc 1 1030 7 view .LVU983 - ARM GAS /tmp/ccMMu31U.s page 120 + ARM GAS /tmp/ccqxsRKi.s page 120 1030:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY; @@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2710 .loc 1 984 7 is_stmt 1 view .LVU1000 984:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 2711 .loc 1 984 14 is_stmt 0 view .LVU1001 - ARM GAS /tmp/ccMMu31U.s page 121 + ARM GAS /tmp/ccqxsRKi.s page 121 2712 00aa 07E0 b .L163 @@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2759 .thumb 2760 .thumb_func 2762 HAL_SD_WriteBlocks_IT: - ARM GAS /tmp/ccMMu31U.s page 122 + ARM GAS /tmp/ccqxsRKi.s page 122 2763 .LVL235: @@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2804 0018 A163 str r1, [r4, #56] 1073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 2805 .loc 1 1073 5 is_stmt 1 view .LVU1023 - ARM GAS /tmp/ccMMu31U.s page 123 + ARM GAS /tmp/ccqxsRKi.s page 123 1073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1090:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 2843 .loc 1 1090 7 view .LVU1041 2844 0042 0129 cmp r1, #1 - ARM GAS /tmp/ccMMu31U.s page 124 + ARM GAS /tmp/ccqxsRKi.s page 124 2845 0044 00D0 beq .L179 @@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2882 .loc 1 1115 18 is_stmt 0 view .LVU1058 2883 0066 0123 movs r3, #1 2884 0068 84F83430 strb r3, [r4, #52] - ARM GAS /tmp/ccMMu31U.s page 125 + ARM GAS /tmp/ccqxsRKi.s page 125 1116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; @@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 2923 .loc 1 1105 20 view .LVU1075 2924 008a 2363 str r3, [r4, #48] - ARM GAS /tmp/ccMMu31U.s page 126 + ARM GAS /tmp/ccqxsRKi.s page 126 1108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } @@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2961 .loc 1 1127 11 view .LVU1093 2962 00b0 FFF7FEFF bl SDMMC_ConfigData 2963 .LVL252: - ARM GAS /tmp/ccMMu31U.s page 127 + ARM GAS /tmp/ccqxsRKi.s page 127 1129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } @@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3013 .cfi_offset 14, -4 3014 0004 87B0 sub sp, sp, #28 3015 .LCFI43: - ARM GAS /tmp/ccMMu31U.s page 128 + ARM GAS /tmp/ccqxsRKi.s page 128 3016 .cfi_def_cfa_offset 56 @@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3053 0026 A36B ldr r3, [r4, #56] 1168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; 3054 .loc 1 1168 22 view .LVU1118 - ARM GAS /tmp/ccMMu31U.s page 129 + ARM GAS /tmp/ccqxsRKi.s page 129 3055 0028 43F00073 orr r3, r3, #33554432 @@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1180:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 3094 .loc 1 1180 35 view .LVU1134 3095 0054 3448 ldr r0, .L202 - ARM GAS /tmp/ccMMu31U.s page 130 + ARM GAS /tmp/ccqxsRKi.s page 130 3096 0056 C863 str r0, [r1, #60] @@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3135 008c 2ED1 bne .L201 1204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 3136 .loc 1 1204 7 is_stmt 1 view .LVU1150 - ARM GAS /tmp/ccMMu31U.s page 131 + ARM GAS /tmp/ccqxsRKi.s page 131 3137 008e 2268 ldr r2, [r4] @@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3174 00b8 0593 str r3, [sp, #20] 1218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 3175 .loc 1 1218 7 is_stmt 1 view .LVU1168 - ARM GAS /tmp/ccMMu31U.s page 132 + ARM GAS /tmp/ccqxsRKi.s page 132 1218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; 3214 .loc 1 1241 22 is_stmt 0 view .LVU1185 3215 00e6 0023 movs r3, #0 - ARM GAS /tmp/ccMMu31U.s page 133 + ARM GAS /tmp/ccqxsRKi.s page 133 3216 00e8 2363 str r3, [r4, #48] @@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3255 .LVL271: 1233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 3256 .loc 1 1233 22 view .LVU1201 - ARM GAS /tmp/ccMMu31U.s page 134 + ARM GAS /tmp/ccqxsRKi.s page 134 3257 0118 DBE7 b .L196 @@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3308 .cfi_offset 6, -12 3309 .cfi_offset 7, -8 3310 .cfi_offset 14, -4 - ARM GAS /tmp/ccMMu31U.s page 135 + ARM GAS /tmp/ccqxsRKi.s page 135 3311 0002 87B0 sub sp, sp, #28 @@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3348 .loc 1 1289 16 is_stmt 0 view .LVU1223 3349 0026 0323 movs r3, #3 3350 0028 80F83430 strb r3, [r0, #52] - ARM GAS /tmp/ccMMu31U.s page 136 + ARM GAS /tmp/ccqxsRKi.s page 136 1292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3387 .loc 1 1308 7 is_stmt 1 view .LVU1241 1308:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 3388 .loc 1 1308 11 is_stmt 0 view .LVU1242 - ARM GAS /tmp/ccMMu31U.s page 137 + ARM GAS /tmp/ccqxsRKi.s page 137 3389 0052 5202 lsls r2, r2, #9 @@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3427 007a 2363 str r3, [r4, #48] 1333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 3428 .loc 1 1333 7 is_stmt 1 view .LVU1259 - ARM GAS /tmp/ccMMu31U.s page 138 + ARM GAS /tmp/ccqxsRKi.s page 138 1333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } @@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3467 .loc 1 1324 20 view .LVU1275 3468 00a0 E0E7 b .L210 3469 .L211: - ARM GAS /tmp/ccMMu31U.s page 139 + ARM GAS /tmp/ccqxsRKi.s page 139 1337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3511 00d8 D36B ldr r3, [r2, #60] 3512 00da 23F01A03 bic r3, r3, #26 3513 00de D363 str r3, [r2, #60] - ARM GAS /tmp/ccMMu31U.s page 140 + ARM GAS /tmp/ccqxsRKi.s page 140 1347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= HAL_SD_ERROR_DMA; @@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3550 0108 0393 str r3, [sp, #12] 1360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.DPSM = SDMMC_DPSM_ENABLE; 3551 .loc 1 1360 7 is_stmt 1 view .LVU1307 - ARM GAS /tmp/ccMMu31U.s page 141 + ARM GAS /tmp/ccqxsRKi.s page 141 1360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.DPSM = SDMMC_DPSM_ENABLE; @@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3597 .thumb_func 3599 HAL_SD_Erase: 3600 .LVL295: - ARM GAS /tmp/ccMMu31U.s page 142 + ARM GAS /tmp/ccqxsRKi.s page 142 3601 .LFB152: @@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 3641 .loc 1 1398 7 view .LVU1332 3642 001c 9342 cmp r3, r2 - ARM GAS /tmp/ccMMu31U.s page 143 + ARM GAS /tmp/ccqxsRKi.s page 143 3643 001e 16D3 bcc .L232 @@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3680 004a 8363 str r3, [r0, #56] 1395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 3681 .loc 1 1395 7 is_stmt 1 view .LVU1350 - ARM GAS /tmp/ccMMu31U.s page 144 + ARM GAS /tmp/ccqxsRKi.s page 144 1395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } @@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 3719 .loc 1 1429 17 is_stmt 0 view .LVU1368 3720 006e 7602 lsls r6, r6, #9 - ARM GAS /tmp/ccMMu31U.s page 145 + ARM GAS /tmp/ccqxsRKi.s page 145 3721 .LVL303: @@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3759 .loc 1 1420 7 view .LVU1384 1420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY; 3760 .loc 1 1420 10 is_stmt 0 view .LVU1385 - ARM GAS /tmp/ccMMu31U.s page 146 + ARM GAS /tmp/ccqxsRKi.s page 146 3761 0098 A36B ldr r3, [r4, #56] @@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3799 .loc 1 1464 7 view .LVU1401 1464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY; 3800 .loc 1 1464 10 is_stmt 0 view .LVU1402 - ARM GAS /tmp/ccMMu31U.s page 147 + ARM GAS /tmp/ccqxsRKi.s page 147 3801 00c0 A36B ldr r3, [r4, #56] @@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3838 00ea 00E0 b .L220 3839 .LVL311: 3840 .L229: - ARM GAS /tmp/ccMMu31U.s page 148 + ARM GAS /tmp/ccqxsRKi.s page 148 1475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } @@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3892 @ frame_needed = 0, uses_anonymous_args = 0 3893 @ link register save eliminated. 1688:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 149 + ARM GAS /tmp/ccqxsRKi.s page 149 3894 .loc 1 1688 3 view .LVU1427 @@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3945 .section .text.HAL_SD_ErrorCallback,"ax",%progbits 3946 .align 1 3947 .weak HAL_SD_ErrorCallback - ARM GAS /tmp/ccMMu31U.s page 150 + ARM GAS /tmp/ccqxsRKi.s page 150 3948 .syntax unified @@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 3994 0006 822B cmp r3, #130 3995 0008 11D0 beq .L245 3996 .LVL322: - ARM GAS /tmp/ccMMu31U.s page 151 + ARM GAS /tmp/ccqxsRKi.s page 151 3997 .L243: @@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4035 0034 0346 mov r3, r0 4036 0036 0028 cmp r0, #0 4037 0038 E7D0 beq .L243 - ARM GAS /tmp/ccMMu31U.s page 152 + ARM GAS /tmp/ccqxsRKi.s page 152 2464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #if (USE_HAL_SD_REGISTER_CALLBACKS == 1) @@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4087 @ args = 0, pretend = 0, frame = 0 4088 @ frame_needed = 0, uses_anonymous_args = 0 4089 @ link register save eliminated. - ARM GAS /tmp/ccMMu31U.s page 153 + ARM GAS /tmp/ccqxsRKi.s page 153 1954:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1964:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4124 .loc 1 1964 29 is_stmt 0 view .LVU1492 4125 0026 C26F ldr r2, [r0, #124] - ARM GAS /tmp/ccMMu31U.s page 154 + ARM GAS /tmp/ccqxsRKi.s page 154 1964:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1975:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4161 .loc 1 1975 1 view .LVU1512 4162 0056 7047 bx lr - ARM GAS /tmp/ccMMu31U.s page 155 + ARM GAS /tmp/ccqxsRKi.s page 155 4163 .cfi_endproc @@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4204 .loc 1 1993 3 is_stmt 1 view .LVU1527 1993:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4205 .loc 1 1993 16 is_stmt 0 view .LVU1528 - ARM GAS /tmp/ccMMu31U.s page 156 + ARM GAS /tmp/ccqxsRKi.s page 156 4206 001a 90F86620 ldrb r2, [r0, #102] @ zero_extendqisi2 @@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4240 .loc 1 2005 3 is_stmt 1 view .LVU1548 2005:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4241 .loc 1 2005 46 is_stmt 0 view .LVU1549 - ARM GAS /tmp/ccMMu31U.s page 157 + ARM GAS /tmp/ccqxsRKi.s page 157 4242 0044 826E ldr r2, [r0, #104] @@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4278 .loc 1 2015 73 view .LVU1568 4279 0072 D86E ldr r0, [r3, #108] - ARM GAS /tmp/ccMMu31U.s page 158 + ARM GAS /tmp/ccqxsRKi.s page 158 2015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4314 009c DA6E ldr r2, [r3, #108] 2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4315 .loc 1 2025 27 view .LVU1589 - ARM GAS /tmp/ccMMu31U.s page 159 + ARM GAS /tmp/ccqxsRKi.s page 159 4316 009e C2F3C232 ubfx r2, r2, #15, #3 @@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4351 .loc 1 2031 29 view .LVU1608 4352 00cc DA65 str r2, [r3, #92] 2032:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 160 + ARM GAS /tmp/ccqxsRKi.s page 160 4353 .loc 1 2032 5 is_stmt 1 view .LVU1609 @@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4388 00f2 1A6F ldr r2, [r3, #112] 2061:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4389 .loc 1 2061 22 view .LVU1629 - ARM GAS /tmp/ccMMu31U.s page 161 + ARM GAS /tmp/ccqxsRKi.s page 161 4390 00f4 C2F34172 ubfx r2, r2, #29, #2 @@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4425 .loc 1 2073 3 is_stmt 1 view .LVU1649 2073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 162 + ARM GAS /tmp/ccqxsRKi.s page 162 4426 .loc 1 2073 46 is_stmt 0 view .LVU1650 @@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4461 .loc 1 2083 33 is_stmt 0 view .LVU1670 4462 0158 1A6F ldr r2, [r3, #112] - ARM GAS /tmp/ccMMu31U.s page 163 + ARM GAS /tmp/ccqxsRKi.s page 163 2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4499 .loc 1 2037 22 view .LVU1688 4500 0186 0A61 str r2, [r1, #16] 2039:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->SdCard.LogBlockNbr = hsd->SdCard.BlockNbr; - ARM GAS /tmp/ccMMu31U.s page 164 + ARM GAS /tmp/ccqxsRKi.s page 164 4501 .loc 1 2039 5 is_stmt 1 view .LVU1689 @@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4538 .LVL339: 2049:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; 4539 .loc 1 2049 16 view .LVU1707 - ARM GAS /tmp/ccMMu31U.s page 165 + ARM GAS /tmp/ccqxsRKi.s page 165 4540 01ac 83F83400 strb r0, [r3, #52] @@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 4586 .loc 1 2624 6 view .LVU1718 4587 000e FFF7FEFF bl SDMMC_GetPowerState - ARM GAS /tmp/ccMMu31U.s page 166 + ARM GAS /tmp/ccqxsRKi.s page 166 4588 .LVL342: @@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4626 003a 5BD1 bne .L255 2672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->CSD[1U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2); 4627 .loc 1 2672 7 is_stmt 1 view .LVU1735 - ARM GAS /tmp/ccMMu31U.s page 167 + ARM GAS /tmp/ccqxsRKi.s page 167 2672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->CSD[1U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2); @@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4668 .LVL350: 2680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4669 .loc 1 2680 70 discriminator 1 view .LVU1750 - ARM GAS /tmp/ccMMu31U.s page 168 + ARM GAS /tmp/ccqxsRKi.s page 168 4670 006c 000D lsrs r0, r0, #20 @@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4710 .loc 1 2699 3 is_stmt 1 view .LVU1764 2699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 4711 .loc 1 2699 10 is_stmt 0 view .LVU1765 - ARM GAS /tmp/ccMMu31U.s page 169 + ARM GAS /tmp/ccqxsRKi.s page 169 4712 00a6 25E0 b .L255 @@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2644:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 4751 .loc 1 2644 22 is_stmt 0 view .LVU1781 4752 00d0 0C21 movs r1, #12 - ARM GAS /tmp/ccMMu31U.s page 170 + ARM GAS /tmp/ccqxsRKi.s page 170 4753 00d2 2068 ldr r0, [r4] @@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4800 .syntax unified 4801 .thumb 4802 .thumb_func - ARM GAS /tmp/ccMMu31U.s page 171 + ARM GAS /tmp/ccqxsRKi.s page 171 4804 HAL_SD_InitCard: @@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4842 .loc 1 415 28 is_stmt 0 view .LVU1806 4843 0012 7623 movs r3, #118 - ARM GAS /tmp/ccMMu31U.s page 172 + ARM GAS /tmp/ccqxsRKi.s page 172 4844 0014 0993 str r3, [sp, #36] @@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 4887 .loc 1 428 9 view .LVU1818 4888 0042 FFF7FEFF bl SDMMC_PowerState_ON - ARM GAS /tmp/ccMMu31U.s page 173 + ARM GAS /tmp/ccqxsRKi.s page 173 4889 .LVL374: @@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4927 .LVL378: 447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 4928 .loc 1 447 3 is_stmt 1 view .LVU1835 - ARM GAS /tmp/ccMMu31U.s page 174 + ARM GAS /tmp/ccqxsRKi.s page 174 447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 4966 009a A363 str r3, [r4, #56] 461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; 4967 .loc 1 461 5 is_stmt 1 view .LVU1853 - ARM GAS /tmp/ccMMu31U.s page 175 + ARM GAS /tmp/ccqxsRKi.s page 175 461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR; @@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 350:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 5011 .loc 1 350 3 view .LVU1867 352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 176 + ARM GAS /tmp/ccqxsRKi.s page 176 5012 .loc 1 352 3 view .LVU1868 @@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 5049 .loc 1 372 5 is_stmt 1 view .LVU1886 5050 0028 FFF7FEFF bl HAL_SD_MspInit - ARM GAS /tmp/ccMMu31U.s page 177 + ARM GAS /tmp/ccqxsRKi.s page 177 5051 .LVL385: @@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5101 0004 0546 mov r5, r0 5102 0006 0C46 mov r4, r1 2101:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t errorstate; - ARM GAS /tmp/ccMMu31U.s page 178 + ARM GAS /tmp/ccqxsRKi.s page 178 5103 .loc 1 2101 3 is_stmt 1 view .LVU1893 @@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5140 .LVL395: 2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE) 5141 .loc 1 2139 16 view .LVU1911 - ARM GAS /tmp/ccMMu31U.s page 179 + ARM GAS /tmp/ccqxsRKi.s page 179 5142 0028 FFF7FEFF bl SDMMC_CmdBlockLength @@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5181 .loc 1 2116 29 view .LVU1926 5182 0044 C2F38113 ubfx r3, r2, #6, #2 2116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 180 + ARM GAS /tmp/ccqxsRKi.s page 180 5183 .loc 1 2116 27 view .LVU1927 @@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5219 .loc 1 2125 27 view .LVU1945 5220 007a DAB2 uxtb r2, r3 2125:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 181 + ARM GAS /tmp/ccqxsRKi.s page 181 5221 .loc 1 2125 25 view .LVU1946 @@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5256 00a4 0024 movs r4, #0 5257 .LVL401: 2103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** - ARM GAS /tmp/ccMMu31U.s page 182 + ARM GAS /tmp/ccqxsRKi.s page 182 5258 .loc 1 2103 21 view .LVU1966 @@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5301 000e CB60 str r3, [r1, #12] 2165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCardInfo->BlockSize = (uint32_t)(hsd->SdCard.BlockSize); 5302 .loc 1 2165 3 is_stmt 1 view .LVU1980 - ARM GAS /tmp/ccMMu31U.s page 183 + ARM GAS /tmp/ccqxsRKi.s page 183 2165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCardInfo->BlockSize = (uint32_t)(hsd->SdCard.BlockSize); @@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5344 @ frame_needed = 0, uses_anonymous_args = 0 2185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SDMMC_InitTypeDef Init; 5345 .loc 1 2185 1 is_stmt 0 view .LVU1996 - ARM GAS /tmp/ccMMu31U.s page 184 + ARM GAS /tmp/ccqxsRKi.s page 184 5346 0000 30B5 push {r4, r5, lr} @@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 5384 .loc 1 2217 10 is_stmt 0 view .LVU2013 5385 0022 836B ldr r3, [r0, #56] - ARM GAS /tmp/ccMMu31U.s page 185 + ARM GAS /tmp/ccqxsRKi.s page 185 2217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } @@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5425 .loc 1 2223 5 is_stmt 1 view .LVU2028 2223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 5426 .loc 1 2223 8 is_stmt 0 view .LVU2029 - ARM GAS /tmp/ccMMu31U.s page 186 + ARM GAS /tmp/ccqxsRKi.s page 186 5427 004e 836B ldr r3, [r0, #56] @@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5465 .loc 1 2251 8 is_stmt 0 view .LVU2045 5466 0078 A36B ldr r3, [r4, #56] 2251:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** status = HAL_ERROR; - ARM GAS /tmp/ccMMu31U.s page 187 + ARM GAS /tmp/ccqxsRKi.s page 187 5467 .loc 1 2251 20 view .LVU2046 @@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5506 .loc 1 2238 41 is_stmt 0 view .LVU2061 5507 0094 E368 ldr r3, [r4, #12] 2238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** Init.BusWide = WideMode; - ARM GAS /tmp/ccMMu31U.s page 188 + ARM GAS /tmp/ccqxsRKi.s page 188 5508 .loc 1 2238 30 view .LVU2062 @@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5552 HAL_SD_GetCardState: 5553 .LVL420: 5554 .LFB165: - ARM GAS /tmp/ccMMu31U.s page 189 + ARM GAS /tmp/ccqxsRKi.s page 189 2267:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t cardstate; @@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5593 .loc 1 2281 1 is_stmt 0 view .LVU2090 5594 0018 0198 ldr r0, [sp, #4] 5595 .LVL423: - ARM GAS /tmp/ccMMu31U.s page 190 + ARM GAS /tmp/ccqxsRKi.s page 190 2281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5640 000a 0AD0 beq .L310 2504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** TxErrorCode = hsd->hdmatx->ErrorCode; 5641 .loc 1 2504 5 is_stmt 1 view .LVU2103 - ARM GAS /tmp/ccMMu31U.s page 191 + ARM GAS /tmp/ccqxsRKi.s page 191 2504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** TxErrorCode = hsd->hdmatx->ErrorCode; @@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** CardState = HAL_SD_GetCardState(hsd); 5683 .loc 1 2515 7 view .LVU2117 2515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** CardState = HAL_SD_GetCardState(hsd); - ARM GAS /tmp/ccMMu31U.s page 192 + ARM GAS /tmp/ccqxsRKi.s page 192 5684 .loc 1 2515 10 is_stmt 0 view .LVU2118 @@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5723 .loc 1 2519 24 discriminator 1 view .LVU2133 5724 005c 0343 orrs r3, r3, r0 5725 005e A363 str r3, [r4, #56] - ARM GAS /tmp/ccMMu31U.s page 193 + ARM GAS /tmp/ccqxsRKi.s page 193 5726 0060 F2E7 b .L313 @@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5771 0012 0123 movs r3, #1 5772 0014 84F83430 strb r3, [r4, #52] 2549:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING)) - ARM GAS /tmp/ccMMu31U.s page 194 + ARM GAS /tmp/ccqxsRKi.s page 194 5773 .loc 1 2549 3 is_stmt 1 view .LVU2145 @@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5813 .L321: 2568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif 5814 .loc 1 2568 5 is_stmt 1 view .LVU2160 - ARM GAS /tmp/ccMMu31U.s page 195 + ARM GAS /tmp/ccqxsRKi.s page 195 5815 003c 2046 mov r0, r4 @@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5859 .loc 1 2587 14 is_stmt 0 view .LVU2172 5860 0012 0123 movs r3, #1 5861 0014 84F83430 strb r3, [r4, #52] - ARM GAS /tmp/ccMMu31U.s page 196 + ARM GAS /tmp/ccqxsRKi.s page 196 2588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING)) @@ -11758,7 +11758,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5901 003a F2E7 b .L326 5902 .L327: 2607:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif - ARM GAS /tmp/ccMMu31U.s page 197 + ARM GAS /tmp/ccqxsRKi.s page 197 5903 .loc 1 2607 5 is_stmt 1 view .LVU2188 @@ -11818,7 +11818,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5949 0014 26D1 bne .L348 5950 .L332: 1495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { - ARM GAS /tmp/ccMMu31U.s page 198 + ARM GAS /tmp/ccqxsRKi.s page 198 5951 .loc 1 1495 8 is_stmt 1 view .LVU2199 @@ -11878,7 +11878,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 5990 004c 0123 movs r3, #1 5991 004e 84F83430 strb r3, [r4, #52] 1525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(((context & SD_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_READ_MULTIPLE_B - ARM GAS /tmp/ccMMu31U.s page 199 + ARM GAS /tmp/ccqxsRKi.s page 199 5992 .loc 1 1525 7 is_stmt 1 view .LVU2215 @@ -11938,7 +11938,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6032 007a A363 str r3, [r4, #56] 1516:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 6033 .loc 1 1516 11 is_stmt 1 view .LVU2230 - ARM GAS /tmp/ccMMu31U.s page 200 + ARM GAS /tmp/ccqxsRKi.s page 200 6034 007c 2046 mov r0, r4 @@ -11998,7 +11998,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6074 00aa 84F83430 strb r3, [r4, #52] 1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif /* USE_HAL_SD_REGISTER_CALLBACKS */ 6075 .loc 1 1569 9 is_stmt 1 view .LVU2245 - ARM GAS /tmp/ccMMu31U.s page 201 + ARM GAS /tmp/ccqxsRKi.s page 201 6076 00ae 2046 mov r0, r4 @@ -12058,7 +12058,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6116 00d8 15F0080F tst r5, #8 6117 00dc 4AD1 bne .L351 6118 .L339: - ARM GAS /tmp/ccMMu31U.s page 202 + ARM GAS /tmp/ccqxsRKi.s page 202 1584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -12118,7 +12118,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6155 0108 12F0200F tst r2, #32 6156 010c 03D0 beq .L342 1597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 203 + ARM GAS /tmp/ccqxsRKi.s page 203 6157 .loc 1 1597 7 is_stmt 1 view .LVU2278 @@ -12178,7 +12178,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6196 0140 A363 str r3, [r4, #56] 1613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { 6197 .loc 1 1613 5 is_stmt 1 view .LVU2294 - ARM GAS /tmp/ccMMu31U.s page 204 + ARM GAS /tmp/ccqxsRKi.s page 204 1613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** { @@ -12238,7 +12238,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 1581:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 6237 .loc 1 1581 5 is_stmt 0 view .LVU2310 6238 0176 FFF7FEFF bl SD_Write_IT - ARM GAS /tmp/ccMMu31U.s page 205 + ARM GAS /tmp/ccqxsRKi.s page 205 6239 .LVL491: @@ -12298,7 +12298,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6279 01aa A363 str r3, [r4, #56] 1650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_NONE; 6280 .loc 1 1650 9 is_stmt 1 view .LVU2325 - ARM GAS /tmp/ccMMu31U.s page 206 + ARM GAS /tmp/ccqxsRKi.s page 206 1650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_NONE; @@ -12358,7 +12358,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6326 .loc 1 2292 12 is_stmt 0 view .LVU2336 6327 0004 016B ldr r1, [r0, #48] 6328 .LVL497: - ARM GAS /tmp/ccMMu31U.s page 207 + ARM GAS /tmp/ccqxsRKi.s page 207 2295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SDMMC_IT_TXUNDERR| SDMMC_IT_RXOVERR); @@ -12418,7 +12418,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6367 .loc 1 2330 14 is_stmt 0 view .LVU2352 6368 003e 0123 movs r3, #1 6369 0040 84F83430 strb r3, [r4, #52] - ARM GAS /tmp/ccMMu31U.s page 208 + ARM GAS /tmp/ccqxsRKi.s page 208 2333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -12478,7 +12478,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6408 0062 0028 cmp r0, #0 6409 0064 EBD0 beq .L357 2313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } - ARM GAS /tmp/ccMMu31U.s page 209 + ARM GAS /tmp/ccqxsRKi.s page 209 6410 .loc 1 2313 9 is_stmt 1 view .LVU2369 @@ -12538,7 +12538,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6450 008e 0120 movs r0, #1 6451 0090 E3E7 b .L360 6452 .cfi_endproc - ARM GAS /tmp/ccMMu31U.s page 210 + ARM GAS /tmp/ccqxsRKi.s page 210 6453 .LFE166: @@ -12598,7 +12598,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** 6498 .loc 1 2367 18 view .LVU2395 6499 0022 CB6A ldr r3, [r1, #44] - ARM GAS /tmp/ccMMu31U.s page 211 + ARM GAS /tmp/ccqxsRKi.s page 211 2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @@ -12658,7 +12658,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 6538 .loc 1 2375 21 is_stmt 0 view .LVU2412 6539 004a 0020 movs r0, #0 - ARM GAS /tmp/ccMMu31U.s page 212 + ARM GAS /tmp/ccqxsRKi.s page 212 6540 004c E063 str r0, [r4, #60] @@ -12718,7 +12718,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 6579 .loc 1 2399 5 is_stmt 1 view .LVU2427 2399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_NONE; 6580 .loc 1 2399 16 is_stmt 0 view .LVU2428 - ARM GAS /tmp/ccMMu31U.s page 213 + ARM GAS /tmp/ccqxsRKi.s page 213 6581 0072 0123 movs r3, #1 @@ -12778,7 +12778,7 @@ ARM GAS /tmp/ccMMu31U.s page 1 2419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** } 6621 .loc 1 2419 10 is_stmt 0 view .LVU2443 6622 009a 0020 movs r0, #0 - ARM GAS /tmp/ccMMu31U.s page 214 + ARM GAS /tmp/ccqxsRKi.s page 214 6623 009c CCE7 b .L369 @@ -12799,113 +12799,113 @@ ARM GAS /tmp/ccMMu31U.s page 1 6639 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" 6640 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" 6641 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - ARM GAS /tmp/ccMMu31U.s page 215 + ARM GAS /tmp/ccqxsRKi.s page 215 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_sd.c - /tmp/ccMMu31U.s:20 .text.SD_DMATransmitCplt:00000000 $t - /tmp/ccMMu31U.s:25 .text.SD_DMATransmitCplt:00000000 SD_DMATransmitCplt - /tmp/ccMMu31U.s:51 .text.SD_PowerON:00000000 $t - /tmp/ccMMu31U.s:56 .text.SD_PowerON:00000000 SD_PowerON - /tmp/ccMMu31U.s:275 .text.SD_PowerON:000000bc $d - /tmp/ccMMu31U.s:280 .text.SD_PowerOFF:00000000 $t - /tmp/ccMMu31U.s:285 .text.SD_PowerOFF:00000000 SD_PowerOFF - /tmp/ccMMu31U.s:311 .text.SD_Read_IT:00000000 $t - /tmp/ccMMu31U.s:316 .text.SD_Read_IT:00000000 SD_Read_IT - /tmp/ccMMu31U.s:419 .text.SD_Write_IT:00000000 $t - /tmp/ccMMu31U.s:424 .text.SD_Write_IT:00000000 SD_Write_IT - /tmp/ccMMu31U.s:541 .text.SD_SendSDStatus:00000000 $t - /tmp/ccMMu31U.s:546 .text.SD_SendSDStatus:00000000 SD_SendSDStatus - /tmp/ccMMu31U.s:814 .text.SD_FindSCR:00000000 $t - /tmp/ccMMu31U.s:819 .text.SD_FindSCR:00000000 SD_FindSCR - /tmp/ccMMu31U.s:1083 .text.SD_WideBus_Enable:00000000 $t - /tmp/ccMMu31U.s:1088 .text.SD_WideBus_Enable:00000000 SD_WideBus_Enable - /tmp/ccMMu31U.s:1183 .text.SD_WideBus_Disable:00000000 $t - /tmp/ccMMu31U.s:1188 .text.SD_WideBus_Disable:00000000 SD_WideBus_Disable - /tmp/ccMMu31U.s:1283 .text.SD_SendStatus:00000000 $t - /tmp/ccMMu31U.s:1288 .text.SD_SendStatus:00000000 SD_SendStatus - /tmp/ccMMu31U.s:1353 .text.HAL_SD_MspInit:00000000 $t - /tmp/ccMMu31U.s:1359 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit - /tmp/ccMMu31U.s:1374 .text.HAL_SD_MspDeInit:00000000 $t - /tmp/ccMMu31U.s:1380 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit - /tmp/ccMMu31U.s:1395 .text.HAL_SD_DeInit:00000000 $t - /tmp/ccMMu31U.s:1401 .text.HAL_SD_DeInit:00000000 HAL_SD_DeInit - /tmp/ccMMu31U.s:1455 .text.HAL_SD_ReadBlocks:00000000 $t - /tmp/ccMMu31U.s:1461 .text.HAL_SD_ReadBlocks:00000000 HAL_SD_ReadBlocks - /tmp/ccMMu31U.s:2019 .text.HAL_SD_ReadBlocks:00000244 $d - /tmp/ccMMu31U.s:2024 .text.HAL_SD_WriteBlocks:00000000 $t - /tmp/ccMMu31U.s:2030 .text.HAL_SD_WriteBlocks:00000000 HAL_SD_WriteBlocks - /tmp/ccMMu31U.s:2517 .text.HAL_SD_WriteBlocks:000001fc $d - /tmp/ccMMu31U.s:2522 .text.HAL_SD_ReadBlocks_IT:00000000 $t - /tmp/ccMMu31U.s:2528 .text.HAL_SD_ReadBlocks_IT:00000000 HAL_SD_ReadBlocks_IT - /tmp/ccMMu31U.s:2751 .text.HAL_SD_ReadBlocks_IT:000000c8 $d - /tmp/ccMMu31U.s:2756 .text.HAL_SD_WriteBlocks_IT:00000000 $t - /tmp/ccMMu31U.s:2762 .text.HAL_SD_WriteBlocks_IT:00000000 HAL_SD_WriteBlocks_IT - /tmp/ccMMu31U.s:2985 .text.HAL_SD_WriteBlocks_IT:000000c0 $d - /tmp/ccMMu31U.s:2990 .text.HAL_SD_ReadBlocks_DMA:00000000 $t - /tmp/ccMMu31U.s:2996 .text.HAL_SD_ReadBlocks_DMA:00000000 HAL_SD_ReadBlocks_DMA - /tmp/ccMMu31U.s:3282 .text.HAL_SD_ReadBlocks_DMA:00000128 $d - /tmp/ccMMu31U.s:3972 .text.SD_DMAReceiveCplt:00000000 SD_DMAReceiveCplt - /tmp/ccMMu31U.s:5615 .text.SD_DMAError:00000000 SD_DMAError - /tmp/ccMMu31U.s:3289 .text.HAL_SD_WriteBlocks_DMA:00000000 $t - /tmp/ccMMu31U.s:3295 .text.HAL_SD_WriteBlocks_DMA:00000000 HAL_SD_WriteBlocks_DMA - /tmp/ccMMu31U.s:3586 .text.HAL_SD_WriteBlocks_DMA:00000124 $d - /tmp/ccMMu31U.s:3593 .text.HAL_SD_Erase:00000000 $t - /tmp/ccMMu31U.s:3599 .text.HAL_SD_Erase:00000000 HAL_SD_Erase - /tmp/ccMMu31U.s:3851 .text.HAL_SD_Erase:000000f4 $d - /tmp/ccMMu31U.s:3856 .text.HAL_SD_GetState:00000000 $t - /tmp/ccMMu31U.s:3862 .text.HAL_SD_GetState:00000000 HAL_SD_GetState - /tmp/ccMMu31U.s:3880 .text.HAL_SD_GetError:00000000 $t - /tmp/ccMMu31U.s:3886 .text.HAL_SD_GetError:00000000 HAL_SD_GetError - /tmp/ccMMu31U.s:3904 .text.HAL_SD_TxCpltCallback:00000000 $t - ARM GAS /tmp/ccMMu31U.s page 216 + /tmp/ccqxsRKi.s:20 .text.SD_DMATransmitCplt:00000000 $t + /tmp/ccqxsRKi.s:25 .text.SD_DMATransmitCplt:00000000 SD_DMATransmitCplt + /tmp/ccqxsRKi.s:51 .text.SD_PowerON:00000000 $t + /tmp/ccqxsRKi.s:56 .text.SD_PowerON:00000000 SD_PowerON + /tmp/ccqxsRKi.s:275 .text.SD_PowerON:000000bc $d + /tmp/ccqxsRKi.s:280 .text.SD_PowerOFF:00000000 $t + /tmp/ccqxsRKi.s:285 .text.SD_PowerOFF:00000000 SD_PowerOFF + /tmp/ccqxsRKi.s:311 .text.SD_Read_IT:00000000 $t + /tmp/ccqxsRKi.s:316 .text.SD_Read_IT:00000000 SD_Read_IT + /tmp/ccqxsRKi.s:419 .text.SD_Write_IT:00000000 $t + /tmp/ccqxsRKi.s:424 .text.SD_Write_IT:00000000 SD_Write_IT + /tmp/ccqxsRKi.s:541 .text.SD_SendSDStatus:00000000 $t + /tmp/ccqxsRKi.s:546 .text.SD_SendSDStatus:00000000 SD_SendSDStatus + /tmp/ccqxsRKi.s:814 .text.SD_FindSCR:00000000 $t + /tmp/ccqxsRKi.s:819 .text.SD_FindSCR:00000000 SD_FindSCR + /tmp/ccqxsRKi.s:1083 .text.SD_WideBus_Enable:00000000 $t + /tmp/ccqxsRKi.s:1088 .text.SD_WideBus_Enable:00000000 SD_WideBus_Enable + /tmp/ccqxsRKi.s:1183 .text.SD_WideBus_Disable:00000000 $t + /tmp/ccqxsRKi.s:1188 .text.SD_WideBus_Disable:00000000 SD_WideBus_Disable + /tmp/ccqxsRKi.s:1283 .text.SD_SendStatus:00000000 $t + /tmp/ccqxsRKi.s:1288 .text.SD_SendStatus:00000000 SD_SendStatus + /tmp/ccqxsRKi.s:1353 .text.HAL_SD_MspInit:00000000 $t + /tmp/ccqxsRKi.s:1359 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit + /tmp/ccqxsRKi.s:1374 .text.HAL_SD_MspDeInit:00000000 $t + /tmp/ccqxsRKi.s:1380 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit + /tmp/ccqxsRKi.s:1395 .text.HAL_SD_DeInit:00000000 $t + /tmp/ccqxsRKi.s:1401 .text.HAL_SD_DeInit:00000000 HAL_SD_DeInit + /tmp/ccqxsRKi.s:1455 .text.HAL_SD_ReadBlocks:00000000 $t + /tmp/ccqxsRKi.s:1461 .text.HAL_SD_ReadBlocks:00000000 HAL_SD_ReadBlocks + /tmp/ccqxsRKi.s:2019 .text.HAL_SD_ReadBlocks:00000244 $d + /tmp/ccqxsRKi.s:2024 .text.HAL_SD_WriteBlocks:00000000 $t + /tmp/ccqxsRKi.s:2030 .text.HAL_SD_WriteBlocks:00000000 HAL_SD_WriteBlocks + /tmp/ccqxsRKi.s:2517 .text.HAL_SD_WriteBlocks:000001fc $d + /tmp/ccqxsRKi.s:2522 .text.HAL_SD_ReadBlocks_IT:00000000 $t + /tmp/ccqxsRKi.s:2528 .text.HAL_SD_ReadBlocks_IT:00000000 HAL_SD_ReadBlocks_IT + /tmp/ccqxsRKi.s:2751 .text.HAL_SD_ReadBlocks_IT:000000c8 $d + /tmp/ccqxsRKi.s:2756 .text.HAL_SD_WriteBlocks_IT:00000000 $t + /tmp/ccqxsRKi.s:2762 .text.HAL_SD_WriteBlocks_IT:00000000 HAL_SD_WriteBlocks_IT + /tmp/ccqxsRKi.s:2985 .text.HAL_SD_WriteBlocks_IT:000000c0 $d + /tmp/ccqxsRKi.s:2990 .text.HAL_SD_ReadBlocks_DMA:00000000 $t + /tmp/ccqxsRKi.s:2996 .text.HAL_SD_ReadBlocks_DMA:00000000 HAL_SD_ReadBlocks_DMA + /tmp/ccqxsRKi.s:3282 .text.HAL_SD_ReadBlocks_DMA:00000128 $d + /tmp/ccqxsRKi.s:3972 .text.SD_DMAReceiveCplt:00000000 SD_DMAReceiveCplt + /tmp/ccqxsRKi.s:5615 .text.SD_DMAError:00000000 SD_DMAError + /tmp/ccqxsRKi.s:3289 .text.HAL_SD_WriteBlocks_DMA:00000000 $t + /tmp/ccqxsRKi.s:3295 .text.HAL_SD_WriteBlocks_DMA:00000000 HAL_SD_WriteBlocks_DMA + /tmp/ccqxsRKi.s:3586 .text.HAL_SD_WriteBlocks_DMA:00000124 $d + /tmp/ccqxsRKi.s:3593 .text.HAL_SD_Erase:00000000 $t + /tmp/ccqxsRKi.s:3599 .text.HAL_SD_Erase:00000000 HAL_SD_Erase + /tmp/ccqxsRKi.s:3851 .text.HAL_SD_Erase:000000f4 $d + /tmp/ccqxsRKi.s:3856 .text.HAL_SD_GetState:00000000 $t + /tmp/ccqxsRKi.s:3862 .text.HAL_SD_GetState:00000000 HAL_SD_GetState + /tmp/ccqxsRKi.s:3880 .text.HAL_SD_GetError:00000000 $t + /tmp/ccqxsRKi.s:3886 .text.HAL_SD_GetError:00000000 HAL_SD_GetError + /tmp/ccqxsRKi.s:3904 .text.HAL_SD_TxCpltCallback:00000000 $t + ARM GAS /tmp/ccqxsRKi.s page 216 - /tmp/ccMMu31U.s:3910 .text.HAL_SD_TxCpltCallback:00000000 HAL_SD_TxCpltCallback - /tmp/ccMMu31U.s:3925 .text.HAL_SD_RxCpltCallback:00000000 $t - /tmp/ccMMu31U.s:3931 .text.HAL_SD_RxCpltCallback:00000000 HAL_SD_RxCpltCallback - /tmp/ccMMu31U.s:3946 .text.HAL_SD_ErrorCallback:00000000 $t - /tmp/ccMMu31U.s:3952 .text.HAL_SD_ErrorCallback:00000000 HAL_SD_ErrorCallback - /tmp/ccMMu31U.s:3967 .text.SD_DMAReceiveCplt:00000000 $t - /tmp/ccMMu31U.s:4055 .text.HAL_SD_AbortCallback:00000000 $t - /tmp/ccMMu31U.s:4061 .text.HAL_SD_AbortCallback:00000000 HAL_SD_AbortCallback - /tmp/ccMMu31U.s:4076 .text.HAL_SD_GetCardCID:00000000 $t - /tmp/ccMMu31U.s:4082 .text.HAL_SD_GetCardCID:00000000 HAL_SD_GetCardCID - /tmp/ccMMu31U.s:4167 .text.HAL_SD_GetCardCSD:00000000 $t - /tmp/ccMMu31U.s:4173 .text.HAL_SD_GetCardCSD:00000000 HAL_SD_GetCardCSD - /tmp/ccMMu31U.s:4547 .text.HAL_SD_GetCardCSD:000001b4 $d - /tmp/ccMMu31U.s:4552 .text.SD_InitCard:00000000 $t - /tmp/ccMMu31U.s:4557 .text.SD_InitCard:00000000 SD_InitCard - /tmp/ccMMu31U.s:4798 .text.HAL_SD_InitCard:00000000 $t - /tmp/ccMMu31U.s:4804 .text.HAL_SD_InitCard:00000000 HAL_SD_InitCard - /tmp/ccMMu31U.s:4977 .text.HAL_SD_InitCard:000000a4 $d - /tmp/ccMMu31U.s:4982 .text.HAL_SD_Init:00000000 $t - /tmp/ccMMu31U.s:4988 .text.HAL_SD_Init:00000000 HAL_SD_Init - /tmp/ccMMu31U.s:5078 .text.HAL_SD_GetCardStatus:00000000 $t - /tmp/ccMMu31U.s:5084 .text.HAL_SD_GetCardStatus:00000000 HAL_SD_GetCardStatus - /tmp/ccMMu31U.s:5263 .text.HAL_SD_GetCardStatus:000000a8 $d - /tmp/ccMMu31U.s:5268 .text.HAL_SD_GetCardInfo:00000000 $t - /tmp/ccMMu31U.s:5274 .text.HAL_SD_GetCardInfo:00000000 HAL_SD_GetCardInfo - /tmp/ccMMu31U.s:5332 .text.HAL_SD_ConfigWideBusOperation:00000000 $t - /tmp/ccMMu31U.s:5338 .text.HAL_SD_ConfigWideBusOperation:00000000 HAL_SD_ConfigWideBusOperation - /tmp/ccMMu31U.s:5541 .text.HAL_SD_ConfigWideBusOperation:000000bc $d - /tmp/ccMMu31U.s:5546 .text.HAL_SD_GetCardState:00000000 $t - /tmp/ccMMu31U.s:5552 .text.HAL_SD_GetCardState:00000000 HAL_SD_GetCardState - /tmp/ccMMu31U.s:5610 .text.SD_DMAError:00000000 $t - /tmp/ccMMu31U.s:5730 .text.SD_DMAError:00000064 $d - /tmp/ccMMu31U.s:5735 .text.SD_DMATxAbort:00000000 $t - /tmp/ccMMu31U.s:5740 .text.SD_DMATxAbort:00000000 SD_DMATxAbort - /tmp/ccMMu31U.s:5824 .text.SD_DMARxAbort:00000000 $t - /tmp/ccMMu31U.s:5829 .text.SD_DMARxAbort:00000000 SD_DMARxAbort - /tmp/ccMMu31U.s:5913 .text.HAL_SD_IRQHandler:00000000 $t - /tmp/ccMMu31U.s:5919 .text.HAL_SD_IRQHandler:00000000 HAL_SD_IRQHandler - /tmp/ccMMu31U.s:6297 .text.HAL_SD_IRQHandler:000001bc $d - /tmp/ccMMu31U.s:6304 .text.HAL_SD_Abort:00000000 $t - /tmp/ccMMu31U.s:6310 .text.HAL_SD_Abort:00000000 HAL_SD_Abort - /tmp/ccMMu31U.s:6456 .text.HAL_SD_Abort_IT:00000000 $t - /tmp/ccMMu31U.s:6462 .text.HAL_SD_Abort_IT:00000000 HAL_SD_Abort_IT - /tmp/ccMMu31U.s:6627 .text.HAL_SD_Abort_IT:000000a0 $d + /tmp/ccqxsRKi.s:3910 .text.HAL_SD_TxCpltCallback:00000000 HAL_SD_TxCpltCallback + /tmp/ccqxsRKi.s:3925 .text.HAL_SD_RxCpltCallback:00000000 $t + /tmp/ccqxsRKi.s:3931 .text.HAL_SD_RxCpltCallback:00000000 HAL_SD_RxCpltCallback + /tmp/ccqxsRKi.s:3946 .text.HAL_SD_ErrorCallback:00000000 $t + /tmp/ccqxsRKi.s:3952 .text.HAL_SD_ErrorCallback:00000000 HAL_SD_ErrorCallback + /tmp/ccqxsRKi.s:3967 .text.SD_DMAReceiveCplt:00000000 $t + /tmp/ccqxsRKi.s:4055 .text.HAL_SD_AbortCallback:00000000 $t + /tmp/ccqxsRKi.s:4061 .text.HAL_SD_AbortCallback:00000000 HAL_SD_AbortCallback + /tmp/ccqxsRKi.s:4076 .text.HAL_SD_GetCardCID:00000000 $t + /tmp/ccqxsRKi.s:4082 .text.HAL_SD_GetCardCID:00000000 HAL_SD_GetCardCID + /tmp/ccqxsRKi.s:4167 .text.HAL_SD_GetCardCSD:00000000 $t + /tmp/ccqxsRKi.s:4173 .text.HAL_SD_GetCardCSD:00000000 HAL_SD_GetCardCSD + /tmp/ccqxsRKi.s:4547 .text.HAL_SD_GetCardCSD:000001b4 $d + /tmp/ccqxsRKi.s:4552 .text.SD_InitCard:00000000 $t + /tmp/ccqxsRKi.s:4557 .text.SD_InitCard:00000000 SD_InitCard + /tmp/ccqxsRKi.s:4798 .text.HAL_SD_InitCard:00000000 $t + /tmp/ccqxsRKi.s:4804 .text.HAL_SD_InitCard:00000000 HAL_SD_InitCard + /tmp/ccqxsRKi.s:4977 .text.HAL_SD_InitCard:000000a4 $d + /tmp/ccqxsRKi.s:4982 .text.HAL_SD_Init:00000000 $t + /tmp/ccqxsRKi.s:4988 .text.HAL_SD_Init:00000000 HAL_SD_Init + /tmp/ccqxsRKi.s:5078 .text.HAL_SD_GetCardStatus:00000000 $t + /tmp/ccqxsRKi.s:5084 .text.HAL_SD_GetCardStatus:00000000 HAL_SD_GetCardStatus + /tmp/ccqxsRKi.s:5263 .text.HAL_SD_GetCardStatus:000000a8 $d + /tmp/ccqxsRKi.s:5268 .text.HAL_SD_GetCardInfo:00000000 $t + /tmp/ccqxsRKi.s:5274 .text.HAL_SD_GetCardInfo:00000000 HAL_SD_GetCardInfo + /tmp/ccqxsRKi.s:5332 .text.HAL_SD_ConfigWideBusOperation:00000000 $t + /tmp/ccqxsRKi.s:5338 .text.HAL_SD_ConfigWideBusOperation:00000000 HAL_SD_ConfigWideBusOperation + /tmp/ccqxsRKi.s:5541 .text.HAL_SD_ConfigWideBusOperation:000000bc $d + /tmp/ccqxsRKi.s:5546 .text.HAL_SD_GetCardState:00000000 $t + /tmp/ccqxsRKi.s:5552 .text.HAL_SD_GetCardState:00000000 HAL_SD_GetCardState + /tmp/ccqxsRKi.s:5610 .text.SD_DMAError:00000000 $t + /tmp/ccqxsRKi.s:5730 .text.SD_DMAError:00000064 $d + /tmp/ccqxsRKi.s:5735 .text.SD_DMATxAbort:00000000 $t + /tmp/ccqxsRKi.s:5740 .text.SD_DMATxAbort:00000000 SD_DMATxAbort + /tmp/ccqxsRKi.s:5824 .text.SD_DMARxAbort:00000000 $t + /tmp/ccqxsRKi.s:5829 .text.SD_DMARxAbort:00000000 SD_DMARxAbort + /tmp/ccqxsRKi.s:5913 .text.HAL_SD_IRQHandler:00000000 $t + /tmp/ccqxsRKi.s:5919 .text.HAL_SD_IRQHandler:00000000 HAL_SD_IRQHandler + /tmp/ccqxsRKi.s:6297 .text.HAL_SD_IRQHandler:000001bc $d + /tmp/ccqxsRKi.s:6304 .text.HAL_SD_Abort:00000000 $t + /tmp/ccqxsRKi.s:6310 .text.HAL_SD_Abort:00000000 HAL_SD_Abort + /tmp/ccqxsRKi.s:6456 .text.HAL_SD_Abort_IT:00000000 $t + /tmp/ccqxsRKi.s:6462 .text.HAL_SD_Abort_IT:00000000 HAL_SD_Abort_IT + /tmp/ccqxsRKi.s:6627 .text.HAL_SD_Abort_IT:000000a0 $d UNDEFINED SYMBOLS SDMMC_CmdGoIdleState @@ -12919,7 +12919,7 @@ SDMMC_WriteFIFO HAL_GetTick SDMMC_CmdBlockLength SDMMC_ConfigData - ARM GAS /tmp/ccMMu31U.s page 217 + ARM GAS /tmp/ccqxsRKi.s page 217 SDMMC_CmdStatusRegister diff --git a/build/stm32f7xx_hal_sd.o b/build/stm32f7xx_hal_sd.o index 6ef4395d795d6647aa7e60530af634745b665951..4a36b8995465ee2a6b1d56b2ebf4b777e47bf912 100644 GIT binary patch delta 4928 zcmZWs32;{A;r4R=~F=M=^=H1>agn&FB%7}FfCw_($`GsD23C2Vk$GT{vx zj06)(-5^Uh-xT;cMp@3rAP@AujSBooX31;tTYp&BdvRtPJK{#2rO3%yp1X&mK&;cK zhC3L?o;h}5TT)z{wkx5CUx&BnSFFlB5j?pEPE7NpVUKjC=fgLlOn(nf@hO!&1e<3H zwupJgIJ+-K|@@Gm$O#EWYLZ~Ir}Q; z6&ffz`zx3x7NTvO4GQ|iAkc9RRWL{N0ZHfZWH}`}BX~cVnv|(nOd!()1r&~;@yBM;;u`}s@YX`r;!}zsb3>L-jTntc&MkR8Em$i~Qck9V^@5Xin}P$y z1*+v^3Jw+w)pqVsaG3C-E1WwOY!p?L<>P@&`?%a8UL(9au*}+su_C#XJet#u-!H$( z3C1>I9oLObss;@hrgs3Z^lAKWgH-Rck_m zUY~1PVg#hcSUg-aloJ!(en4?t_bBWT9L}y51r1S33$`klEJnz~{y^*odF%=GC9$M9y80V~sK5|UJ-zN|L#@+wp_B7TrrYh(a&rzW13Z{w8 z*aD+jL7&iFvON%rQP&s`=cTGpWW zji@gP5>qV{7DG`-<3VLD7Hvd%xw4jtN0F|vGH5qMg`mbXRt0-3K?+)^%4!&6jWXAW zTJnA2q|X6#A49SMqlqAWLO)RH%kBCVzi%1u- zg+jlm%;}#Fe_;nGp_qb3zLOH#m%taXu0|qeTO$CcZ6UBNQaP&==Qd`jh_h^@Caz#+;A|5JGzqKw#HQZP|0qtrf% ze>d12__4Bj#a62LCn|JjQHO(Oe5$Nzc3*s^U>Bx;K`VW(O$0};S02jG=w=erACw2T zuZbW3$Mkoq%oVk^LtK#8^UFqiiO^5VCs}+*)%>@L;1Lf{z@HVw^|XyP`4=q_W%KcN zbbzx>OSN9n{48|obV6bIR=NbD1hhtp(sBhlfpH65my>q&(Fyng#rGqJX)BUJpj48F2rfjr4y%dLH<}6%^8B7avcO2`k3MC zZ?dx_*|%s|;dK;-&rG(i4%x`eG0`Uh)`Gu{#4ZjCL{2JPWe`zb{LD38eJSlyV1=yuckpX<4d_OXt zZ>F-H5n95zHX{8o5X0zytnnfXgt3KRTj)9_yl&9s#rR({8*;+P>UzeB4!s%~A z&9^3HFGG!wp%ptI;E~Zara2Pj)~@|CtZLLIS=AVd^3_5D-8yw#>6*j&M(HWf;w>^# z9^rLzRQYJM{xg>5l%@Hhd~{9=73oA`3ig7r8IV&{@8(R#!Y%Tyib#4L&K!R^F?$74 zq#L;a;{T)ERgs2|VR^7(a!yaM;#*XR!3eP(F8qoeqOyAgwY{_Zo#1h#dx6H>@{{hB zcGRdH^*a>tD~SJuEUs+gf0AvLQQP6FVJ&+O6yAiu;Y{TM{)+4uO|vtBJtDkS z4(UQl|G-q4Vs}k7F~} zL+sFbcIYbXS24s6oo9#M3&l2w9Xb>bjXOtf>ph%Llwb9ZrdzB}>4S;&$Xv#HL&D$4 zirTb7i{>ePCed6RWNa41j&(-AsRH-Znx$5h6#Z6;@>w2ZA3$t^Df(!d-!C6m1th#% zmeoaiTeo1Rc$9j3`@Fif>zN^Z*+cAGP}s^jP&AYBy4+Bg*4esyJL}eMt#3RU!@Ya3 zF2YyIPwF1zQ{~-#qBf;oS_4t)RDf@Ph)t=N*0cO0}9wOi`-S zEK2o-jP-(mk`#SY?e{@n+x7zV?PRk!_0=p+Z$NQ|lw;(`zQk)m-&ME@wfYjRvr~4f zkMK2eZ2h`YtJ}A5YY|rj{R6@A!jDII7kYnHK~Vt-ES27Vt$cCEl77?1)|Ag^oi(+5 z>b%*l_uW-KaO#|yb6f8#|HEBVnp+!Zw9ak4xB2c#jRX2mn$tRM?)n_Fi$ z&s`ul9L?xRcyxbChiA{eR_*d}^LPdy!GmUskB{WV=0qAQ%)K@we?;jrn?!SHu;77ffiMnlD+6hF`4 zywSva{tRY(7eLg@FPVLE5!Gj|%Y{?1c`29A2Z5#_&{*?H8YY`R(Xhm9$iuM9+(N@i z^9vdp&FXv%_n9kb*kitz&*y8GKQ>2%5Oj~ZBLpoozoTK7Sr_J|e5ctQ<{^Hsxh~9$ z_*U}(2JJ_W`B9h`CN%D4tWxgZn`-71a4%nOb}isV33HDyHrrfUz*Ef@Qg1L97x0Y# E0#UAFM*si- delta 4937 zcmZWt4Rljg5`Oo+{Jb=2noH9*X_GW<(lnthrA-TkrnChr1wqP|VnIDnX$w`LYYRv4 zVABP0`H?@b^ntT(`zc4(!UZh4e zsecL=SwBM-1nE3l1~?kQPgkot%PCgSFN_0yfpa11??=6891oeK$r5}oa&AC9i#RNX zJm4Vt*d2~iGKejAq|;{&px8#}YTV_sn1{319Nyqk$SJ)*q<27TdPJHpnI07d!ThEL z)DKDASunRT(U~7Tj0`#?`h*(7W=;T-QZ$C`<|M?OG3+p>A^u$qyUZDg7sasGya$sn zj%D$i?IysF#Bk93EZUdEaIR>c&vpZiU!aE4vY0wz&PTW9675!LRhW+Tg<^%$@etUp3-Vg)Bbv|hxhg7gEV*XK$f0E%rX zBtG!77D0;y>lFAPg7h*wlWLDX4Q(_OT9BaV6X-RB#T@Ern+@O)4rTf=co`xbTIeD@ zz;X_4^emLcFq}g>9Rp)ysN&E;Q-F?P42Ldig##JJSy*FQinkI?b=(xBIcU0z!(2g{ z&z?$i);adEwunX1Rl=-KGc2>Y z!9agNf-BPTJDzm{GrHW-QcS+qQv%+iubA$_2rS*F`jpTBL^7<)7_7nwU4v&*IIN&& zaPI~VN7C(Byr(#XQ%wY}H;VHLzoZ90uk#0czj7MukJ^jSW4!8!8 zO7=IGH+nCyFy3sE9#|M}HYp398sp6-DUiol#>;1+Goe1l3Jz^_A;J+H+TrPeIWyiS z)&WChPCxH$)2*okp$FYu{K{$&;nf@0;wsL5p9=6ZziEf3`7#E1W z5SI_3TuA0ZTkSXaTQiq<;3kgRo3J)LzWSoPL(SV`*;=vRUu?T7essaOma z9Y&DG!GYxw{jgLvuY8v&5gh0y7*+Y67-x|-vpYTRVOJo(JpEU03m~7|#G#EwG0+SS z?X(eEAh&Snpzj;lZjUdDQzOsMhy#-9)L_Jiy!&AheLC6%B;x~%gY?4cW{ueX7!J(73qw|{_rqZ>T_#lUAv=8U$5Qi>W zj-lS-&`qON$m?y6J=B2S?{Jt-YoW37VGg~t6|KD-X3%mRj(0iCq`#o^5e|K{3uztY z&`)Qe^-mmT(H=bTF&fo+9H7nE)Z^Tool-Sogdm^bFi5j7)=3USbP^We6o>rIt;T@=<`Ax@7Cg<5q6y08 zAd6rE3>{*k`V&pw16?vcpap{3Sz|!GVnDq&R|?1nCAo z$#~TyBZO@`;3S4sVzOpFiDn)!i7oU8NiKWN?WJRb|#4i}Od z5Mo`1a~WTh617+>Z?P1yNS24}V|T&ldiGG3pGF{)>3z=1LHgp@D_IUAvZLU!iCu!v zT4o3gBTHCSphUcEVbOq_Jk2%*JmeX6AmB_(gtHqziqWWqy2NN~XWs|HE+=%#*aKwn zWrnQ2#eUkv%CpA?PC#ME{TB5)UIDdO2IAQOvjWOQtd6+0(Vfk9Wmkxw>Dblm0Xgc9 zk=l-D;EiZ2h+Ew;Qroc)6g{ZSW@Ce4vYB-T!%ZIp5%RgYED7rIK5%&t#1jPeB@yuh6&;sbv6Ka>9WlnD0j1 zaCF!P#5RIxOn;8M$&_u$vFE7N1dYXDs96}qt=5NV$~!?(hsrMYSCMVd1 zTz~Q(Kuy-ir7eaUzX7Az4FWt;@}lB7nXS(oo}yMG5~o&U3=C)l#PhSY`%0dRkOpSW zPbCo+$`6rvR+~QwMt{4i=~Xq~yg>~dk)=?PN9Inc0+Ot3bf0V%CNZ|s)SY_C*o&18V zo_sg-YbS{3M+2J`4v=cb!qwRmplf8goTR=WtgY83XN9)oTev2_266WpnOIaso@3QT zg$@s#k+jNn7hJGT5E6CxJ`*BK+2cjwvftw|!}8=O+=B2k6@-6+cuFxxv21w~l+xOr zQ7y?JElFKJK^PCBCMljoQrP6;La4@L#V+xB9NS)8;J60;B3q2L!#q4A-sw3cn_VsL zFJ9KM^g$s~&PEUFPmF9XeC}nN2NjVtb`Cy6%rrPZS)G7WdbJKcc0t$;0)@I`@OAN{ z1U9B*ROKRkteW-pI7Oc(K`B8ro-?&=vyug&5yahxjcd`A+d#1el~;}IY{_Ku0?Qo| zCS7dW5PRwCSc33jmq4)rL<{YUg@!waZ73Z_^4O))aI(s}SE@$V zInstance)); - ARM GAS /tmp/ccGFzgX3.s page 12 + ARM GAS /tmp/ccfdMfFA.s page 12 602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (htim == NULL) 657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR; - ARM GAS /tmp/ccGFzgX3.s page 13 + ARM GAS /tmp/ccfdMfFA.s page 13 659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -778,7 +778,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim) 714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */ - ARM GAS /tmp/ccGFzgX3.s page 14 + ARM GAS /tmp/ccfdMfFA.s page 14 716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); @@ -838,7 +838,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ 771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim) 772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 15 + ARM GAS /tmp/ccfdMfFA.s page 15 773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ @@ -898,7 +898,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** else 829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 16 + ARM GAS /tmp/ccfdMfFA.s page 16 830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); @@ -958,7 +958,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ 885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) 886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 17 + ARM GAS /tmp/ccfdMfFA.s page 17 887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) 943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 18 + ARM GAS /tmp/ccfdMfFA.s page 18 944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the main output */ @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 19 + ARM GAS /tmp/ccfdMfFA.s page 19 1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_3: @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *p 1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint16_t Length) 1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 20 + ARM GAS /tmp/ccfdMfFA.s page 20 1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; 1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 21 + ARM GAS /tmp/ccfdMfFA.s page 21 1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the DMA error callback */ @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); 1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 22 + ARM GAS /tmp/ccfdMfFA.s page 22 1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** switch (Channel) 1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_1: - ARM GAS /tmp/ccGFzgX3.s page 23 + ARM GAS /tmp/ccfdMfFA.s page 23 1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return function status */ 1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status; 1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 24 + ARM GAS /tmp/ccfdMfFA.s page 24 1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED; 1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - ARM GAS /tmp/ccGFzgX3.s page 25 + ARM GAS /tmp/ccfdMfFA.s page 25 1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */ @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* DeInit the low level hardware */ 1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->PWM_MspDeInitCallback(htim); 1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #else - ARM GAS /tmp/ccGFzgX3.s page 26 + ARM GAS /tmp/ccfdMfFA.s page 26 1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * This parameter can be one of the following values: 1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected 1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected - ARM GAS /tmp/ccGFzgX3.s page 27 + ARM GAS /tmp/ccfdMfFA.s page 27 1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected 1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected 1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected - ARM GAS /tmp/ccGFzgX3.s page 28 + ARM GAS /tmp/ccfdMfFA.s page 28 1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the TIM channel state */ 1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 29 + ARM GAS /tmp/ccfdMfFA.s page 29 1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** switch (Channel) @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** else 1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 30 + ARM GAS /tmp/ccfdMfFA.s page 30 1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** default: - ARM GAS /tmp/ccGFzgX3.s page 31 + ARM GAS /tmp/ccfdMfFA.s page 31 1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** status = HAL_ERROR; @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U)) 1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 32 + ARM GAS /tmp/ccfdMfFA.s page 32 1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR; @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 33 + ARM GAS /tmp/ccfdMfFA.s page 33 1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_3: @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the main output */ 1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim); 1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 34 + ARM GAS /tmp/ccfdMfFA.s page 34 1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_3: - ARM GAS /tmp/ccGFzgX3.s page 35 + ARM GAS /tmp/ccfdMfFA.s page 35 1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** This section provides functions allowing to: 1968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) Initialize and configure the TIM Input Capture. 1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) De-initialize the TIM Input Capture. - ARM GAS /tmp/ccGFzgX3.s page 36 + ARM GAS /tmp/ccfdMfFA.s page 36 1970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) Start the TIM Input Capture. @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the TIM state */ - ARM GAS /tmp/ccGFzgX3.s page 37 + ARM GAS /tmp/ccfdMfFA.s page 37 2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY; @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Release Lock */ 2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_UNLOCK(htim); - ARM GAS /tmp/ccGFzgX3.s page 38 + ARM GAS /tmp/ccfdMfFA.s page 38 2084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the TIM channel state */ 2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((channel_state != HAL_TIM_CHANNEL_STATE_READY) 2140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY)) - ARM GAS /tmp/ccGFzgX3.s page 39 + ARM GAS /tmp/ccfdMfFA.s page 39 2141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return function status */ 2197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_OK; - ARM GAS /tmp/ccGFzgX3.s page 40 + ARM GAS /tmp/ccfdMfFA.s page 40 2198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); 2253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 2254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 41 + ARM GAS /tmp/ccfdMfFA.s page 41 2255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** switch (Channel) 2311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 42 + ARM GAS /tmp/ccfdMfFA.s page 42 2312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_1: @@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * This parameter can be one of the following values: 2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected 2368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected - ARM GAS /tmp/ccGFzgX3.s page 43 + ARM GAS /tmp/ccfdMfFA.s page 43 2369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected @@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; 2424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the DMA stream */ - ARM GAS /tmp/ccGFzgX3.s page 44 + ARM GAS /tmp/ccfdMfFA.s page 44 2426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p @@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 2481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the DMA capture callbacks */ 2482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; - ARM GAS /tmp/ccGFzgX3.s page 45 + ARM GAS /tmp/ccfdMfFA.s page 45 2483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; @@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */ 2539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel)); - ARM GAS /tmp/ccGFzgX3.s page 46 + ARM GAS /tmp/ccfdMfFA.s page 46 2540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); @@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2594:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return function status */ 2595:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status; 2596:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 47 + ARM GAS /tmp/ccfdMfFA.s page 47 2597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** @@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2651:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_OPM_MODE(OnePulseMode)); 2652:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); 2653:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); - ARM GAS /tmp/ccGFzgX3.s page 48 + ARM GAS /tmp/ccfdMfFA.s page 48 2654:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2708:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim) 2709:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 2710:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */ - ARM GAS /tmp/ccGFzgX3.s page 49 + ARM GAS /tmp/ccfdMfFA.s page 49 2711:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance)); @@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2765:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM One Pulse handle 2766:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval None 2767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ - ARM GAS /tmp/ccGFzgX3.s page 50 + ARM GAS /tmp/ccfdMfFA.s page 50 2768:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim) @@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2822:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); 2823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); 2824:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 51 + ARM GAS /tmp/ccfdMfFA.s page 51 2825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) @@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2879:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Starts the TIM One Pulse signal generation in interrupt mode. 2880:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function 2881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break. - ARM GAS /tmp/ccGFzgX3.s page 52 + ARM GAS /tmp/ccfdMfFA.s page 52 2882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @note The pulse output channel is determined when calling @@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2936:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2937:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return function status */ 2938:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_OK; - ARM GAS /tmp/ccGFzgX3.s page 53 + ARM GAS /tmp/ccfdMfFA.s page 53 2939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2993:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group6 TIM Encoder functions 2994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief TIM Encoder functions 2995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * - ARM GAS /tmp/ccGFzgX3.s page 54 + ARM GAS /tmp/ccfdMfFA.s page 54 2996:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @verbatim @@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3050:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC1Polarity)); 3051:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC2Polarity)); 3052:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); - ARM GAS /tmp/ccGFzgX3.s page 55 + ARM GAS /tmp/ccfdMfFA.s page 55 3053:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); @@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); 3108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); 3109:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 56 + ARM GAS /tmp/ccfdMfFA.s page 56 3110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the TI1 and the TI2 Polarities */ @@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_Encoder_MspDeInit(htim); 3165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 3166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 57 + ARM GAS /tmp/ccfdMfFA.s page 57 3167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Change the DMA burst operation state */ @@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected 3222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected 3223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval HAL status - ARM GAS /tmp/ccGFzgX3.s page 58 + ARM GAS /tmp/ccfdMfFA.s page 58 3224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ @@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 3279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 3280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the encoder interface channels */ - ARM GAS /tmp/ccGFzgX3.s page 59 + ARM GAS /tmp/ccfdMfFA.s page 59 3281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** switch (Channel) @@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 3336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); 3337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; - ARM GAS /tmp/ccGFzgX3.s page 60 + ARM GAS /tmp/ccfdMfFA.s page 60 3338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 3393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) 3394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 61 + ARM GAS /tmp/ccfdMfFA.s page 61 3395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR; @@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 3450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 3451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 62 + ARM GAS /tmp/ccfdMfFA.s page 62 3452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** default : @@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); 3507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); 3508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 63 + ARM GAS /tmp/ccfdMfFA.s page 63 3509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) 3564:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) 3565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 64 + ARM GAS /tmp/ccfdMfFA.s page 64 3566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((pData1 == NULL) || (Length == 0U)) @@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((((pData1 == NULL) || (pData2 == NULL))) || (Length == 0U)) 3621:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 3622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR; - ARM GAS /tmp/ccGFzgX3.s page 65 + ARM GAS /tmp/ccfdMfFA.s page 65 3623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p 3678:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Length) != HAL_OK) 3679:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 66 + ARM GAS /tmp/ccfdMfFA.s page 66 3680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return error status */ @@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); 3735:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 3736:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the Peripheral */ - ARM GAS /tmp/ccGFzgX3.s page 67 + ARM GAS /tmp/ccfdMfFA.s page 67 3737:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE(htim); @@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3791:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 3792:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Disable the Peripheral */ 3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_DISABLE(htim); - ARM GAS /tmp/ccGFzgX3.s page 68 + ARM GAS /tmp/ccfdMfFA.s page 68 3794:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3848:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Input capture event */ 3849:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 3850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 69 + ARM GAS /tmp/ccfdMfFA.s page 69 3851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) @@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) 3906:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 3907:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); - ARM GAS /tmp/ccGFzgX3.s page 70 + ARM GAS /tmp/ccfdMfFA.s page 70 3908:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; @@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3962:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* TIM Update event */ 3963:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) 3964:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 71 + ARM GAS /tmp/ccfdMfFA.s page 71 3965:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) @@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4019:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 4020:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); 4021:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - ARM GAS /tmp/ccGFzgX3.s page 72 + ARM GAS /tmp/ccfdMfFA.s page 72 4022:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->CommutationCallback(htim); @@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4076:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); 4077:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); 4078:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 73 + ARM GAS /tmp/ccfdMfFA.s page 73 4079:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Process Locked */ @@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 4134:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_6: 4135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 74 + ARM GAS /tmp/ccfdMfFA.s page 74 4136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */ @@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; 4191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 4192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the IC1PSC value */ - ARM GAS /tmp/ccGFzgX3.s page 75 + ARM GAS /tmp/ccfdMfFA.s page 75 4193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->ICPrescaler; @@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 4248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_UNLOCK(htim); 4249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 76 + ARM GAS /tmp/ccfdMfFA.s page 76 4250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status; @@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */ 4305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); 4306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 77 + ARM GAS /tmp/ccfdMfFA.s page 77 4307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Configure the Channel 2 in PWM mode */ @@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the Preload enable bit for channel5*/ 4362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; 4363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 78 + ARM GAS /tmp/ccfdMfFA.s page 78 4364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Configure the Output Fast mode */ @@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 4419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; 4420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_OC_InitTypeDef temp1; - ARM GAS /tmp/ccGFzgX3.s page 79 + ARM GAS /tmp/ccfdMfFA.s page 79 4421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Reset the IC1PSC Bits */ 4476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; 4477:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 80 + ARM GAS /tmp/ccfdMfFA.s page 80 4478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Select the Trigger source */ @@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4532:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 4533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR 4534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_DIER - ARM GAS /tmp/ccGFzgX3.s page 81 + ARM GAS /tmp/ccfdMfFA.s page 81 4535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_SR @@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4589:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * This parameter can be one of the following values: 4590:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_CR1 4591:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_CR2 - ARM GAS /tmp/ccGFzgX3.s page 82 + ARM GAS /tmp/ccfdMfFA.s page 82 4592:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR @@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4646:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_BUSY; 4647:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 4648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY) - ARM GAS /tmp/ccGFzgX3.s page 83 + ARM GAS /tmp/ccfdMfFA.s page 83 4649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4703:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 4704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the DMA compare callbacks */ 4705:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - ARM GAS /tmp/ccGFzgX3.s page 84 + ARM GAS /tmp/ccfdMfFA.s page 84 4706:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; @@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; 4761:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 4762:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the DMA error callback */ - ARM GAS /tmp/ccGFzgX3.s page 85 + ARM GAS /tmp/ccfdMfFA.s page 85 4763:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; @@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4817:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; 4818:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 4819:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */ - ARM GAS /tmp/ccGFzgX3.s page 86 + ARM GAS /tmp/ccfdMfFA.s page 86 4820:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); @@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4874:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return function status */ 4875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status; 4876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 87 + ARM GAS /tmp/ccfdMfFA.s page 87 4877:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4931:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 4932:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status; 4933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 88 + ARM GAS /tmp/ccfdMfFA.s page 88 4934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4988:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); 4989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); 4990:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - ARM GAS /tmp/ccGFzgX3.s page 89 + ARM GAS /tmp/ccfdMfFA.s page 89 4991:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength)); @@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5045:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 5046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return error status */ 5047:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR; - ARM GAS /tmp/ccGFzgX3.s page 90 + ARM GAS /tmp/ccfdMfFA.s page 90 5048:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 5103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 5104:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 91 + ARM GAS /tmp/ccfdMfFA.s page 91 5105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_DMA_COM: @@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** 5160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Stop the DMA burst reading 5161:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM handle - ARM GAS /tmp/ccGFzgX3.s page 92 + ARM GAS /tmp/ccfdMfFA.s page 92 5162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources to disable. @@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 5217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Disable the TIM Update DMA request */ 5218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); - ARM GAS /tmp/ccGFzgX3.s page 93 + ARM GAS /tmp/ccfdMfFA.s page 93 5219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** 5274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Configures the OCRef clear feature 5275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM handle - ARM GAS /tmp/ccGFzgX3.s page 94 + ARM GAS /tmp/ccfdMfFA.s page 94 5276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that @@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sClearInputConfig->ClearInputFilter); 5331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 5332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 95 + ARM GAS /tmp/ccfdMfFA.s page 95 5333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5387:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) 5388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 5389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 4 */ - ARM GAS /tmp/ccGFzgX3.s page 96 + ARM GAS /tmp/ccfdMfFA.s page 96 5390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); @@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval HAL status 5445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ 5446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef * - ARM GAS /tmp/ccGFzgX3.s page 97 + ARM GAS /tmp/ccfdMfFA.s page 97 5447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 5502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check ETR input conditioning related parameters */ 5503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); - ARM GAS /tmp/ccGFzgX3.s page 98 + ARM GAS /tmp/ccfdMfFA.s page 98 5504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); @@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance, 5559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, 5560:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sClockSourceConfig->ClockFilter); - ARM GAS /tmp/ccGFzgX3.s page 99 + ARM GAS /tmp/ccfdMfFA.s page 99 5561:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); @@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpcr2 |= TI1_Selection; 5616:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 5617:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Write to TIMxCR2 */ - ARM GAS /tmp/ccGFzgX3.s page 100 + ARM GAS /tmp/ccfdMfFA.s page 100 5618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CR2 = tmpcr2; @@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, 5673:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** const TIM_SlaveConfigTypeDef *sSlaveConfig) 5674:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 101 + ARM GAS /tmp/ccfdMfFA.s page 101 5675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */ @@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5729:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 5730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 5731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_2: - ARM GAS /tmp/ccGFzgX3.s page 102 + ARM GAS /tmp/ccfdMfFA.s page 102 5732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5786:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) TIM Input capture callback 5787:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) TIM Trigger callback 5788:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) TIM Error callback - ARM GAS /tmp/ccGFzgX3.s page 103 + ARM GAS /tmp/ccfdMfFA.s page 103 5789:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5843:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ 5844:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) 5845:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 104 + ARM GAS /tmp/ccfdMfFA.s page 104 5846:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ @@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5900:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Hall Trigger detection callback in non-blocking mode 5901:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM handle 5902:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval None - ARM GAS /tmp/ccGFzgX3.s page 105 + ARM GAS /tmp/ccfdMfFA.s page 105 5903:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ @@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5957:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPDEINIT_CB_ID PWM MspDeInit Callback ID 5958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPINIT_CB_ID One Pulse MspInit Callback ID 5959:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID One Pulse MspDeInit Callback ID - ARM GAS /tmp/ccGFzgX3.s page 106 + ARM GAS /tmp/ccfdMfFA.s page 106 5960:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPINIT_CB_ID Encoder MspInit Callback ID @@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID : 6016:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->OC_MspDeInitCallback = pCallback; - ARM GAS /tmp/ccGFzgX3.s page 107 + ARM GAS /tmp/ccfdMfFA.s page 107 6017:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; @@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6071:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_HALF_CB_ID : 6072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback = pCallback; 6073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; - ARM GAS /tmp/ccGFzgX3.s page 108 + ARM GAS /tmp/ccfdMfFA.s page 108 6074:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID : 6130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->IC_MspDeInitCallback = pCallback; - ARM GAS /tmp/ccGFzgX3.s page 109 + ARM GAS /tmp/ccfdMfFA.s page 109 6131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; @@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status; 6186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 6187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 110 + ARM GAS /tmp/ccfdMfFA.s page 110 6188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** @@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID : 6243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Legacy weak IC Msp Init Callback */ 6244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; - ARM GAS /tmp/ccGFzgX3.s page 111 + ARM GAS /tmp/ccfdMfFA.s page 111 6245:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; @@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; 6300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 6301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 112 + ARM GAS /tmp/ccfdMfFA.s page 112 6302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_CB_ID : @@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_COMMUTATION_HALF_CB_ID : 6358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Legacy weak Commutation half complete Callback */ - ARM GAS /tmp/ccGFzgX3.s page 113 + ARM GAS /tmp/ccfdMfFA.s page 113 6359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback; @@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Legacy weak PWM Msp Init Callback */ 6414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; 6415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; - ARM GAS /tmp/ccGFzgX3.s page 114 + ARM GAS /tmp/ccfdMfFA.s page 114 6416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ 6471:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6472:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group10 TIM Peripheral State functions - ARM GAS /tmp/ccGFzgX3.s page 115 + ARM GAS /tmp/ccfdMfFA.s page 115 6473:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief TIM Peripheral State functions @@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** 6528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Return the TIM One Pulse Mode handle state. 6529:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM OPM handle - ARM GAS /tmp/ccGFzgX3.s page 116 + ARM GAS /tmp/ccfdMfFA.s page 116 6530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval HAL state @@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM handle 6585:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval DMA burst state 6586:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ - ARM GAS /tmp/ccGFzgX3.s page 117 + ARM GAS /tmp/ccfdMfFA.s page 117 6587:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim) @@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6641:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) 6642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->ErrorCallback(htim); 6643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #else - ARM GAS /tmp/ccGFzgX3.s page 118 + ARM GAS /tmp/ccfdMfFA.s page 118 6644:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ErrorCallback(htim); @@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 6699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) - ARM GAS /tmp/ccGFzgX3.s page 119 + ARM GAS /tmp/ccfdMfFA.s page 119 6701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim); @@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 6756:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6757:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1]) - ARM GAS /tmp/ccGFzgX3.s page 120 + ARM GAS /tmp/ccfdMfFA.s page 120 6758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6812:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief TIM DMA Capture half complete callback. 6813:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param hdma pointer to DMA handle. 6814:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval None - ARM GAS /tmp/ccGFzgX3.s page 121 + ARM GAS /tmp/ccfdMfFA.s page 121 6815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ @@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6869:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 6870:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6871:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** - ARM GAS /tmp/ccGFzgX3.s page 122 + ARM GAS /tmp/ccfdMfFA.s page 122 6872:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief TIM DMA Period Elapse half complete callback. @@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6926:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param TIMx TIM peripheral 6927:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param Structure TIM Base configuration structure 6928:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval None - ARM GAS /tmp/ccGFzgX3.s page 123 + ARM GAS /tmp/ccfdMfFA.s page 123 6929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ @@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6983:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval None 6984:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */ 6985:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) - ARM GAS /tmp/ccGFzgX3.s page 124 + ARM GAS /tmp/ccfdMfFA.s page 124 6986:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 62 .loc 1 7005 3 view .LVU15 63 .loc 1 7005 12 is_stmt 0 view .LVU16 64 0010 124B ldr r3, .L5 - ARM GAS /tmp/ccGFzgX3.s page 125 + ARM GAS /tmp/ccfdMfFA.s page 125 65 0012 2B40 ands r3, r3, r5 @@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 102 0036 CE68 ldr r6, [r1, #12] 103 .loc 1 7022 13 view .LVU33 104 0038 1E43 orrs r6, r6, r3 - ARM GAS /tmp/ccGFzgX3.s page 126 + ARM GAS /tmp/ccfdMfFA.s page 126 105 .LVL9: @@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7044:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 7045:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Write to TIMx CCMR1 */ 7046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIMx->CCMR1 = tmpccmrx; - ARM GAS /tmp/ccGFzgX3.s page 127 + ARM GAS /tmp/ccfdMfFA.s page 127 138 .loc 1 7046 3 is_stmt 1 view .LVU51 @@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7063:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpccmrx; 7064:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpccer; 7065:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpcr2; - ARM GAS /tmp/ccGFzgX3.s page 128 + ARM GAS /tmp/ccfdMfFA.s page 128 7066:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7120:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 7121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Write to TIMx CCMR1 */ 7122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIMx->CCMR1 = tmpccmrx; - ARM GAS /tmp/ccGFzgX3.s page 129 + ARM GAS /tmp/ccfdMfFA.s page 129 7123:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 204 .loc 1 7150 10 is_stmt 0 view .LVU71 205 000c 4268 ldr r2, [r0, #4] 206 .LVL19: - ARM GAS /tmp/ccGFzgX3.s page 130 + ARM GAS /tmp/ccfdMfFA.s page 130 7151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 7168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); 245 .loc 1 7168 5 is_stmt 1 view .LVU88 - ARM GAS /tmp/ccGFzgX3.s page 131 + ARM GAS /tmp/ccfdMfFA.s page 131 7169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 278 .loc 1 7190 5 is_stmt 1 view .LVU106 279 .loc 1 7190 25 is_stmt 0 view .LVU107 280 004e 8C69 ldr r4, [r1, #24] - ARM GAS /tmp/ccGFzgX3.s page 132 + ARM GAS /tmp/ccfdMfFA.s page 132 281 .loc 1 7190 12 view .LVU108 @@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 322 .thumb 323 .thumb_func 325 TIM_OC4_SetConfig: - ARM GAS /tmp/ccGFzgX3.s page 133 + ARM GAS /tmp/ccfdMfFA.s page 133 326 .LVL34: @@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmrx = TIMx->CCMR2; 357 .loc 1 7228 3 is_stmt 1 view .LVU132 358 .loc 1 7228 12 is_stmt 0 view .LVU133 - ARM GAS /tmp/ccGFzgX3.s page 134 + ARM GAS /tmp/ccfdMfFA.s page 134 359 000e C569 ldr r5, [r0, #28] @@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 393 .loc 1 7248 12 is_stmt 0 view .LVU149 394 0030 24F48044 bic r4, r4, #16384 395 .LVL42: - ARM GAS /tmp/ccGFzgX3.s page 135 + ARM GAS /tmp/ccfdMfFA.s page 135 7249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 433 004c 00000140 .word 1073807360 434 0050 00040140 .word 1073808384 435 .cfi_endproc - ARM GAS /tmp/ccGFzgX3.s page 136 + ARM GAS /tmp/ccfdMfFA.s page 136 436 .LFE249: @@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Get the TIMx CR2 register value */ 7287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpcr2 = TIMx->CR2; 472 .loc 1 7287 3 is_stmt 1 view .LVU174 - ARM GAS /tmp/ccGFzgX3.s page 137 + ARM GAS /tmp/ccfdMfFA.s page 137 473 .loc 1 7287 10 is_stmt 0 view .LVU175 @@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 510 .loc 1 7304 12 is_stmt 0 view .LVU191 511 002e 24F48034 bic r4, r4, #65536 512 .LVL55: - ARM GAS /tmp/ccGFzgX3.s page 138 + ARM GAS /tmp/ccfdMfFA.s page 138 7305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the Output Idle state */ @@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 552 .cfi_endproc 553 .LFE250: 555 .section .text.TIM_OC6_SetConfig,"ax",%progbits - ARM GAS /tmp/ccGFzgX3.s page 139 + ARM GAS /tmp/ccfdMfFA.s page 139 556 .align 1 @@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 589 .loc 1 7341 3 is_stmt 1 view .LVU216 590 .loc 1 7341 10 is_stmt 0 view .LVU217 591 000c 4468 ldr r4, [r0, #4] - ARM GAS /tmp/ccGFzgX3.s page 140 + ARM GAS /tmp/ccfdMfFA.s page 140 592 .LVL62: @@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 629 .LVL68: 7359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the Output Idle state */ 7360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 10U); - ARM GAS /tmp/ccGFzgX3.s page 141 + ARM GAS /tmp/ccfdMfFA.s page 141 630 .loc 1 7360 5 is_stmt 1 view .LVU234 @@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 670 .LFE251: 672 .section .text.TIM_TI1_ConfigInputStage,"ax",%progbits 673 .align 1 - ARM GAS /tmp/ccGFzgX3.s page 142 + ARM GAS /tmp/ccfdMfFA.s page 142 674 .syntax unified @@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 7424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_TS_TI1F_ED: 7425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 143 + ARM GAS /tmp/ccfdMfFA.s page 143 7426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */ @@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_TS_ITR2: 7481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_TS_ITR3: 7482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 144 + ARM GAS /tmp/ccfdMfFA.s page 144 7483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameter */ @@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 7538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the filter */ 7539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F; - ARM GAS /tmp/ccGFzgX3.s page 145 + ARM GAS /tmp/ccfdMfFA.s page 145 7540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F); @@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 703 .loc 1 7571 3 is_stmt 1 view .LVU257 704 .loc 1 7571 12 is_stmt 0 view .LVU258 705 000c 8469 ldr r4, [r0, #24] - ARM GAS /tmp/ccGFzgX3.s page 146 + ARM GAS /tmp/ccfdMfFA.s page 146 706 .LVL75: @@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7587:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Configure the TI2 as Input. 7588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param TIMx to select the TIM peripheral 7589:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity. - ARM GAS /tmp/ccGFzgX3.s page 147 + ARM GAS /tmp/ccfdMfFA.s page 147 7590:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * This parameter can be one of the following values: @@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7617:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Select the Input */ 7618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_CC2S; 774 .loc 1 7618 3 is_stmt 1 view .LVU283 - ARM GAS /tmp/ccGFzgX3.s page 148 + ARM GAS /tmp/ccfdMfFA.s page 148 775 .loc 1 7618 12 is_stmt 0 view .LVU284 @@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 815 0032 30BC pop {r4, r5} 816 .LCFI13: 817 .cfi_restore 5 - ARM GAS /tmp/ccGFzgX3.s page 149 + ARM GAS /tmp/ccfdMfFA.s page 149 818 .cfi_restore 4 @@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 853 0006 24F01004 bic r4, r4, #16 854 000a 0462 str r4, [r0, #32] 7654:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1; - ARM GAS /tmp/ccGFzgX3.s page 150 + ARM GAS /tmp/ccfdMfFA.s page 150 855 .loc 1 7654 3 is_stmt 1 view .LVU313 @@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 898 .LFB257: 7668:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 7669:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** - ARM GAS /tmp/ccGFzgX3.s page 151 + ARM GAS /tmp/ccfdMfFA.s page 151 7670:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Configure the TI3 as Input. @@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 924 000c C469 ldr r4, [r0, #28] 925 .LVL100: 7699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 152 + ARM GAS /tmp/ccfdMfFA.s page 152 7700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Select the Input */ @@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 965 0030 0162 str r1, [r0, #32] 7715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 966 .loc 1 7715 1 view .LVU359 - ARM GAS /tmp/ccGFzgX3.s page 153 + ARM GAS /tmp/ccfdMfFA.s page 153 967 0032 30BC pop {r4, r5} @@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 997 .loc 1 7741 3 view .LVU363 7742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 7743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ - ARM GAS /tmp/ccGFzgX3.s page 154 + ARM GAS /tmp/ccfdMfFA.s page 154 7744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccer = TIMx->CCER; @@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1037 .loc 1 7758 3 is_stmt 1 view .LVU383 1038 .loc 1 7758 31 is_stmt 0 view .LVU384 1039 0026 0903 lsls r1, r1, #12 - ARM GAS /tmp/ccGFzgX3.s page 155 + ARM GAS /tmp/ccfdMfFA.s page 155 1040 .LVL118: @@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1073 @ args = 0, pretend = 0, frame = 0 1074 @ frame_needed = 0, uses_anonymous_args = 0 1075 @ link register save eliminated. - ARM GAS /tmp/ccGFzgX3.s page 156 + ARM GAS /tmp/ccfdMfFA.s page 156 7782:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpsmcr; @@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1118 .cfi_endproc 1119 .LFE143: 1121 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits - ARM GAS /tmp/ccGFzgX3.s page 157 + ARM GAS /tmp/ccfdMfFA.s page 157 1122 .align 1 @@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1169 .loc 1 337 3 view .LVU416 1170 000a 0368 ldr r3, [r0] 1171 000c 196A ldr r1, [r3, #32] - ARM GAS /tmp/ccGFzgX3.s page 158 + ARM GAS /tmp/ccfdMfFA.s page 158 1172 000e 41F21112 movw r2, #4369 @@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1210 .loc 1 356 3 view .LVU432 356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 1211 .loc 1 356 3 view .LVU433 - ARM GAS /tmp/ccGFzgX3.s page 159 + ARM GAS /tmp/ccfdMfFA.s page 159 1212 004c 84F84400 strb r0, [r4, #68] @@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 1252 .loc 1 411 11 is_stmt 0 view .LVU450 1253 0000 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 - ARM GAS /tmp/ccGFzgX3.s page 160 + ARM GAS /tmp/ccfdMfFA.s page 160 1254 0004 DBB2 uxtb r3, r3 @@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1295 .loc 1 430 5 is_stmt 1 view .LVU463 1296 004e 1A68 ldr r2, [r3] 1297 0050 42F00102 orr r2, r2, #1 - ARM GAS /tmp/ccGFzgX3.s page 161 + ARM GAS /tmp/ccfdMfFA.s page 161 1298 0054 1A60 str r2, [r3] @@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 1339 .loc 1 434 10 view .LVU477 1340 007a 0020 movs r0, #0 - ARM GAS /tmp/ccGFzgX3.s page 162 + ARM GAS /tmp/ccfdMfFA.s page 162 1341 .LVL139: @@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1387 .loc 1 451 15 is_stmt 0 view .LVU487 1388 001e 0123 movs r3, #1 1389 0020 80F83D30 strb r3, [r0, #61] - ARM GAS /tmp/ccGFzgX3.s page 163 + ARM GAS /tmp/ccfdMfFA.s page 163 454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 1433 .loc 1 482 7 is_stmt 0 view .LVU501 1434 001a 0368 ldr r3, [r0] - ARM GAS /tmp/ccGFzgX3.s page 164 + ARM GAS /tmp/ccfdMfFA.s page 164 482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1477 .loc 1 484 29 is_stmt 0 view .LVU513 1478 0064 9968 ldr r1, [r3, #8] 484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) - ARM GAS /tmp/ccGFzgX3.s page 165 + ARM GAS /tmp/ccfdMfFA.s page 165 1479 .loc 1 484 13 view .LVU514 @@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1524 .global HAL_TIM_Base_Stop_IT 1525 .syntax unified 1526 .thumb - ARM GAS /tmp/ccGFzgX3.s page 166 + ARM GAS /tmp/ccfdMfFA.s page 166 1527 .thumb_func @@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1569 .loc 1 520 1 view .LVU537 1570 0030 7047 bx lr 1571 .cfi_endproc - ARM GAS /tmp/ccGFzgX3.s page 167 + ARM GAS /tmp/ccfdMfFA.s page 167 1572 .LFE148: @@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1616 001a 18BF it ne 1617 001c 0029 cmpne r1, #0 1618 001e 4ED0 beq .L65 - ARM GAS /tmp/ccGFzgX3.s page 168 + ARM GAS /tmp/ccfdMfFA.s page 168 549:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1656 0048 0028 cmp r0, #0 1657 004a 38D1 bne .L65 573:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 169 + ARM GAS /tmp/ccfdMfFA.s page 169 1658 .loc 1 573 3 is_stmt 1 view .LVU567 @@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1701 009c 0446 mov r4, r0 1702 009e 0EE0 b .L65 1703 .L66: - ARM GAS /tmp/ccGFzgX3.s page 170 + ARM GAS /tmp/ccfdMfFA.s page 170 578:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) @@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1747 00d8 07000100 .word 65543 1748 .cfi_endproc 1749 .LFE149: - ARM GAS /tmp/ccGFzgX3.s page 171 + ARM GAS /tmp/ccfdMfFA.s page 171 1751 .section .text.HAL_TIM_Base_Stop_DMA,"ax",%progbits @@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1796 0028 03D1 bne .L74 609:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 1797 .loc 1 609 3 discriminator 3 view .LVU600 - ARM GAS /tmp/ccGFzgX3.s page 172 + ARM GAS /tmp/ccfdMfFA.s page 172 1798 002a 1A68 ldr r2, [r3] @@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1846 .loc 1 772 1 is_stmt 1 view -0 1847 .cfi_startproc 1848 @ args = 0, pretend = 0, frame = 0 - ARM GAS /tmp/ccGFzgX3.s page 173 + ARM GAS /tmp/ccfdMfFA.s page 173 1849 @ frame_needed = 0, uses_anonymous_args = 0 @@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 721:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 1895 .loc 1 721 3 discriminator 3 view .LVU621 1896 0020 1A68 ldr r2, [r3] - ARM GAS /tmp/ccGFzgX3.s page 174 + ARM GAS /tmp/ccfdMfFA.s page 174 1897 0022 22F00102 bic r2, r2, #1 @@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1933 0058 84F84700 strb r0, [r4, #71] 740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 1934 .loc 1 740 3 view .LVU640 - ARM GAS /tmp/ccGFzgX3.s page 175 + ARM GAS /tmp/ccfdMfFA.s page 175 743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1981 .cfi_startproc 1982 @ args = 0, pretend = 0, frame = 0 1983 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccGFzgX3.s page 176 + ARM GAS /tmp/ccfdMfFA.s page 176 1984 @ link register save eliminated. @@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2029 .loc 1 1390 3 discriminator 3 view .LVU663 2030 0020 1A68 ldr r2, [r3] 2031 0022 22F00102 bic r2, r2, #1 - ARM GAS /tmp/ccGFzgX3.s page 177 + ARM GAS /tmp/ccfdMfFA.s page 177 2032 0026 1A60 str r2, [r3] @@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1409:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2068 .loc 1 1409 3 view .LVU682 1412:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 178 + ARM GAS /tmp/ccfdMfFA.s page 178 2069 .loc 1 1412 3 view .LVU683 @@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2116 @ args = 0, pretend = 0, frame = 0 2117 @ frame_needed = 0, uses_anonymous_args = 0 2118 @ link register save eliminated. - ARM GAS /tmp/ccGFzgX3.s page 179 + ARM GAS /tmp/ccfdMfFA.s page 179 2111:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2164 0020 1A68 ldr r2, [r3] 2165 0022 22F00102 bic r2, r2, #1 2166 0026 1A60 str r2, [r3] - ARM GAS /tmp/ccGFzgX3.s page 180 + ARM GAS /tmp/ccfdMfFA.s page 180 2167 .L89: @@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2202 .loc 1 2077 3 view .LVU724 2080:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2203 .loc 1 2080 3 view .LVU725 - ARM GAS /tmp/ccGFzgX3.s page 181 + ARM GAS /tmp/ccfdMfFA.s page 181 2080:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2251 @ frame_needed = 0, uses_anonymous_args = 0 2252 @ link register save eliminated. 2771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 182 + ARM GAS /tmp/ccfdMfFA.s page 182 2253 .loc 1 2771 3 view .LVU737 @@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2299 0022 22F00102 bic r2, r2, #1 2300 0026 1A60 str r2, [r3] 2301 .L94: - ARM GAS /tmp/ccGFzgX3.s page 183 + ARM GAS /tmp/ccfdMfFA.s page 183 2716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2340 .thumb_func 2342 HAL_TIM_Encoder_MspInit: 2343 .LVL186: - ARM GAS /tmp/ccGFzgX3.s page 184 + ARM GAS /tmp/ccfdMfFA.s page 184 2344 .LFB191: @@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2394 .cfi_def_cfa_offset 8 2395 .cfi_offset 4, -8 2396 .cfi_offset 14, -4 - ARM GAS /tmp/ccGFzgX3.s page 185 + ARM GAS /tmp/ccfdMfFA.s page 185 2397 0002 0446 mov r4, r0 @@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2436 003c 84F84400 strb r0, [r4, #68] 3174:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2437 .loc 1 3174 3 view .LVU788 - ARM GAS /tmp/ccGFzgX3.s page 186 + ARM GAS /tmp/ccfdMfFA.s page 186 2438 0040 84F84500 strb r0, [r4, #69] @@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2480 .loc 1 4640 3 view .LVU802 4641:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength)); 2481 .loc 1 4641 3 view .LVU803 - ARM GAS /tmp/ccGFzgX3.s page 187 + ARM GAS /tmp/ccfdMfFA.s page 187 4642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2522 .loc 1 4670 7 is_stmt 1 view .LVU817 4670:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2523 .loc 1 4670 17 is_stmt 0 view .LVU818 - ARM GAS /tmp/ccGFzgX3.s page 188 + ARM GAS /tmp/ccfdMfFA.s page 188 2524 003e 236A ldr r3, [r4, #32] @@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4807:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2565 .loc 1 4807 1 is_stmt 0 view .LVU832 2566 006e 70BD pop {r4, r5, r6, pc} - ARM GAS /tmp/ccGFzgX3.s page 189 + ARM GAS /tmp/ccfdMfFA.s page 189 2567 .LVL200: @@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2608 00a8 3D4A ldr r2, .L125+16 2609 00aa 1A64 str r2, [r3, #64] 4745:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 190 + ARM GAS /tmp/ccfdMfFA.s page 190 2610 .loc 1 4745 7 is_stmt 1 view .LVU846 @@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2649 .loc 1 4691 7 is_stmt 1 view .LVU861 4691:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2650 .loc 1 4691 17 is_stmt 0 view .LVU862 - ARM GAS /tmp/ccGFzgX3.s page 191 + ARM GAS /tmp/ccfdMfFA.s page 191 2651 00d6 636A ldr r3, [r4, #36] @@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) 2690 .loc 1 4712 7 is_stmt 1 view .LVU878 4713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 192 + ARM GAS /tmp/ccfdMfFA.s page 192 2691 .loc 1 4713 43 is_stmt 0 view .LVU879 @@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2730 012c 4C32 adds r2, r2, #76 2731 012e E06A ldr r0, [r4, #44] 2732 0130 FFF7FEFF bl HAL_DMA_Start_IT - ARM GAS /tmp/ccGFzgX3.s page 193 + ARM GAS /tmp/ccfdMfFA.s page 193 2733 .LVL208: @@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 2772 .loc 1 4770 16 view .LVU910 2773 0160 0120 movs r0, #1 - ARM GAS /tmp/ccGFzgX3.s page 194 + ARM GAS /tmp/ccfdMfFA.s page 194 2774 0162 84E7 b .L102 @@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2813 018e 6EE7 b .L102 2814 .L126: 2815 .align 2 - ARM GAS /tmp/ccGFzgX3.s page 195 + ARM GAS /tmp/ccfdMfFA.s page 195 2816 .L125: @@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4583:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 2865 .loc 1 4583 1 is_stmt 0 view .LVU933 2866 0012 03B0 add sp, sp, #12 - ARM GAS /tmp/ccGFzgX3.s page 196 + ARM GAS /tmp/ccfdMfFA.s page 196 2867 .LCFI31: @@ -11758,7 +11758,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2915 .LVL217: 4827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 2916 .loc 1 4827 13 view .LVU942 - ARM GAS /tmp/ccGFzgX3.s page 197 + ARM GAS /tmp/ccfdMfFA.s page 197 2917 0022 FFF7FEFF bl HAL_DMA_Abort_IT @@ -11818,7 +11818,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2958 0052 FFF7FEFF bl HAL_DMA_Abort_IT 2959 .LVL224: 4848:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 198 + ARM GAS /tmp/ccfdMfFA.s page 198 2960 .loc 1 4848 7 is_stmt 1 view .LVU956 @@ -11878,7 +11878,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2999 .LVL234: 4842:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 3000 .loc 1 4842 13 view .LVU972 - ARM GAS /tmp/ccGFzgX3.s page 199 + ARM GAS /tmp/ccfdMfFA.s page 199 3001 006e FFF7FEFF bl HAL_DMA_Abort_IT @@ -11938,7 +11938,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3044 .cfi_startproc 3045 @ args = 8, pretend = 0, frame = 0 3046 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccGFzgX3.s page 200 + ARM GAS /tmp/ccfdMfFA.s page 200 4984:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; @@ -11998,7 +11998,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 3086 .loc 1 5013 3 view .LVU1001 3087 001e B5F5006F cmp r5, #2048 - ARM GAS /tmp/ccGFzgX3.s page 201 + ARM GAS /tmp/ccfdMfFA.s page 201 3088 0022 78D0 beq .L146 @@ -12058,7 +12058,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3128 .loc 1 5149 5 is_stmt 1 view .LVU1015 5149:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 3129 .loc 1 5149 9 is_stmt 0 view .LVU1016 - ARM GAS /tmp/ccGFzgX3.s page 202 + ARM GAS /tmp/ccfdMfFA.s page 202 3130 005c 2368 ldr r3, [r4] @@ -12118,7 +12118,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3173 0092 53D0 beq .L151 3174 0094 B5F5804F cmp r5, #16384 3175 0098 64D0 beq .L152 - ARM GAS /tmp/ccGFzgX3.s page 203 + ARM GAS /tmp/ccfdMfFA.s page 203 3176 009a B5F5805F cmp r5, #4096 @@ -12178,7 +12178,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3215 00c8 D1E7 b .L144 3216 .L148: 5036:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; - ARM GAS /tmp/ccGFzgX3.s page 204 + ARM GAS /tmp/ccfdMfFA.s page 204 3217 .loc 1 5036 7 is_stmt 1 view .LVU1043 @@ -12238,7 +12238,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3255 .loc 1 5054 52 view .LVU1059 3256 00f2 2A49 ldr r1, .L167+12 3257 00f4 D963 str r1, [r3, #60] - ARM GAS /tmp/ccGFzgX3.s page 205 + ARM GAS /tmp/ccfdMfFA.s page 205 5055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -12298,7 +12298,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 3296 .loc 1 5073 56 view .LVU1076 3297 011e 2049 ldr r1, .L167+16 - ARM GAS /tmp/ccGFzgX3.s page 206 + ARM GAS /tmp/ccfdMfFA.s page 206 3298 0120 1964 str r1, [r3, #64] @@ -12358,7 +12358,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3336 0148 636B ldr r3, [r4, #52] 5112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 3337 .loc 1 5112 61 view .LVU1093 - ARM GAS /tmp/ccGFzgX3.s page 207 + ARM GAS /tmp/ccfdMfFA.s page 207 3338 014a 1349 ldr r1, .L167+8 @@ -12418,7 +12418,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3376 .loc 1 5133 75 is_stmt 0 view .LVU1109 3377 0176 2168 ldr r1, [r4] 5133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** DataLength) != HAL_OK) - ARM GAS /tmp/ccGFzgX3.s page 208 + ARM GAS /tmp/ccfdMfFA.s page 208 3378 .loc 1 5133 11 view .LVU1110 @@ -12478,7 +12478,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3429 .cfi_offset 14, -4 3430 0002 83B0 sub sp, sp, #12 3431 .LCFI35: - ARM GAS /tmp/ccGFzgX3.s page 209 + ARM GAS /tmp/ccfdMfFA.s page 209 3432 .cfi_def_cfa_offset 24 @@ -12538,7 +12538,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 3479 .loc 1 5167 3 is_stmt 1 view .LVU1125 3480 .LVL267: - ARM GAS /tmp/ccGFzgX3.s page 210 + ARM GAS /tmp/ccfdMfFA.s page 210 5170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -12598,7 +12598,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 3522 .loc 1 5173 3 view .LVU1139 3523 003c FCE7 b .L177 - ARM GAS /tmp/ccGFzgX3.s page 211 + ARM GAS /tmp/ccfdMfFA.s page 211 3524 .LVL273: @@ -12658,7 +12658,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3564 .loc 1 5187 7 view .LVU1153 5187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 3565 .loc 1 5187 13 is_stmt 0 view .LVU1154 - ARM GAS /tmp/ccGFzgX3.s page 212 + ARM GAS /tmp/ccfdMfFA.s page 212 3566 0064 806A ldr r0, [r0, #40] @@ -12718,7 +12718,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3604 .loc 1 5207 13 view .LVU1170 3605 007e FFF7FEFF bl HAL_DMA_Abort_IT 3606 .LVL292: - ARM GAS /tmp/ccGFzgX3.s page 213 + ARM GAS /tmp/ccfdMfFA.s page 213 5208:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -12778,7 +12778,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3648 .loc 1 5265 3 is_stmt 1 view .LVU1185 5265:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 3649 .loc 1 5265 15 is_stmt 0 view .LVU1186 - ARM GAS /tmp/ccGFzgX3.s page 214 + ARM GAS /tmp/ccfdMfFA.s page 214 3650 0018 80F83D30 strb r3, [r0, #61] @@ -12838,7 +12838,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3692 0000 0268 ldr r2, [r0] 5609:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 3693 .loc 1 5609 10 view .LVU1201 - ARM GAS /tmp/ccGFzgX3.s page 215 + ARM GAS /tmp/ccfdMfFA.s page 215 3694 0002 5368 ldr r3, [r2, #4] @@ -12898,7 +12898,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3738 0009 13 .byte (.L196-.L192)/2 3739 000a 13 .byte (.L196-.L192)/2 3740 000b 13 .byte (.L196-.L192)/2 - ARM GAS /tmp/ccGFzgX3.s page 216 + ARM GAS /tmp/ccfdMfFA.s page 216 3741 000c 0A .byte (.L194-.L192)/2 @@ -12958,7 +12958,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5750:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 3781 .loc 1 5750 7 is_stmt 1 view .LVU1228 3782 0026 7047 bx lr - ARM GAS /tmp/ccGFzgX3.s page 217 + ARM GAS /tmp/ccfdMfFA.s page 217 3783 .LVL308: @@ -13018,7 +13018,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3829 .thumb 3830 .thumb_func 3832 TIM_DMAPeriodElapsedCplt: - ARM GAS /tmp/ccGFzgX3.s page 218 + ARM GAS /tmp/ccfdMfFA.s page 218 3833 .LVL313: @@ -13078,7 +13078,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3877 .LVL316: 3878 .LFB218: 5815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ - ARM GAS /tmp/ccGFzgX3.s page 219 + ARM GAS /tmp/ccfdMfFA.s page 219 3879 .loc 1 5815 1 is_stmt 1 view -0 @@ -13138,7 +13138,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3929 HAL_TIM_OC_DelayElapsedCallback: 3930 .LVL321: 3931 .LFB219: - ARM GAS /tmp/ccGFzgX3.s page 220 + ARM GAS /tmp/ccfdMfFA.s page 220 5830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ @@ -13198,7 +13198,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3982 .cfi_offset 4, -8 3983 .cfi_offset 14, -4 6755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 221 + ARM GAS /tmp/ccfdMfFA.s page 221 3984 .loc 1 6755 3 is_stmt 1 view .LVU1269 @@ -13258,7 +13258,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6808:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 4021 .loc 1 6808 17 is_stmt 0 view .LVU1287 4022 0022 0023 movs r3, #0 - ARM GAS /tmp/ccGFzgX3.s page 222 + ARM GAS /tmp/ccfdMfFA.s page 222 4023 0024 2377 strb r3, [r4, #28] @@ -13318,7 +13318,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6779:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 4062 .loc 1 6779 5 view .LVU1303 6779:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 223 + ARM GAS /tmp/ccfdMfFA.s page 223 4063 .loc 1 6779 19 is_stmt 0 view .LVU1304 @@ -13378,7 +13378,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4107 .LFB221: 5860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */ 4108 .loc 1 5860 1 view -0 - ARM GAS /tmp/ccGFzgX3.s page 224 + ARM GAS /tmp/ccfdMfFA.s page 224 4109 .cfi_startproc @@ -13438,7 +13438,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4153 000c 8342 cmp r3, r0 4154 000e 10D0 beq .L224 6828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 225 + ARM GAS /tmp/ccfdMfFA.s page 225 4155 .loc 1 6828 8 is_stmt 1 view .LVU1330 @@ -13498,7 +13498,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4193 .loc 1 6826 5 is_stmt 1 view .LVU1346 6826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 4194 .loc 1 6826 19 is_stmt 0 view .LVU1347 - ARM GAS /tmp/ccGFzgX3.s page 226 + ARM GAS /tmp/ccfdMfFA.s page 226 4195 0032 0223 movs r3, #2 @@ -13558,7 +13558,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4246 .cfi_offset 14, -4 6657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 4247 .loc 1 6657 3 is_stmt 1 view .LVU1355 - ARM GAS /tmp/ccGFzgX3.s page 227 + ARM GAS /tmp/ccfdMfFA.s page 227 6657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -13618,7 +13618,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4284 .loc 1 6706 17 is_stmt 0 view .LVU1373 4285 0022 0023 movs r3, #0 4286 0024 2377 strb r3, [r4, #28] - ARM GAS /tmp/ccGFzgX3.s page 228 + ARM GAS /tmp/ccfdMfFA.s page 228 6707:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -13678,7 +13678,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4325 .loc 1 6681 5 is_stmt 1 view .LVU1389 6681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 4326 .loc 1 6681 19 is_stmt 0 view .LVU1390 - ARM GAS /tmp/ccGFzgX3.s page 229 + ARM GAS /tmp/ccfdMfFA.s page 229 4327 0050 C369 ldr r3, [r0, #28] @@ -13738,7 +13738,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4372 .LFE223: 4374 .section .text.TIM_DMADelayPulseHalfCplt,"ax",%progbits 4375 .align 1 - ARM GAS /tmp/ccGFzgX3.s page 230 + ARM GAS /tmp/ccfdMfFA.s page 230 4376 .global TIM_DMADelayPulseHalfCplt @@ -13798,7 +13798,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 4417 .loc 1 6730 30 is_stmt 0 view .LVU1416 4418 0016 236B ldr r3, [r4, #48] - ARM GAS /tmp/ccGFzgX3.s page 231 + ARM GAS /tmp/ccfdMfFA.s page 231 6730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -13858,7 +13858,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4458 003c F3E7 b .L240 4459 .cfi_endproc 4460 .LFE238: - ARM GAS /tmp/ccGFzgX3.s page 232 + ARM GAS /tmp/ccfdMfFA.s page 232 4462 .section .text.HAL_TIM_TriggerCallback,"ax",%progbits @@ -13918,7 +13918,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4511 .LVL348: 3837:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 4512 .loc 1 3837 3 is_stmt 1 view .LVU1440 - ARM GAS /tmp/ccGFzgX3.s page 233 + ARM GAS /tmp/ccfdMfFA.s page 233 3837:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -13978,7 +13978,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4550 0032 15F0040F tst r5, #4 4551 0036 12D0 beq .L252 3875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 234 + ARM GAS /tmp/ccfdMfFA.s page 234 4552 .loc 1 3875 5 is_stmt 1 view .LVU1458 @@ -14038,7 +14038,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4590 .loc 1 3907 7 is_stmt 1 view .LVU1474 4591 006a 2368 ldr r3, [r4] 4592 006c 6FF00802 mvn r2, #8 - ARM GAS /tmp/ccGFzgX3.s page 235 + ARM GAS /tmp/ccfdMfFA.s page 235 4593 0070 1A61 str r2, [r3, #16] @@ -14098,7 +14098,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4631 00a0 2377 strb r3, [r4, #28] 3940:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 4632 .loc 1 3940 7 is_stmt 1 view .LVU1491 - ARM GAS /tmp/ccGFzgX3.s page 236 + ARM GAS /tmp/ccfdMfFA.s page 236 3940:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -14158,7 +14158,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4671 00d2 02D0 beq .L263 3992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 4672 .loc 1 3992 5 is_stmt 1 view .LVU1508 - ARM GAS /tmp/ccGFzgX3.s page 237 + ARM GAS /tmp/ccfdMfFA.s page 237 3992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -14218,7 +14218,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4713 0106 2046 mov r0, r4 4714 0108 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback 4715 .LVL358: - ARM GAS /tmp/ccGFzgX3.s page 238 + ARM GAS /tmp/ccfdMfFA.s page 238 4716 010c A5E7 b .L254 @@ -14278,7 +14278,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4761 0150 1A61 str r2, [r3, #16] 3998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 4762 .loc 1 3998 7 view .LVU1532 - ARM GAS /tmp/ccGFzgX3.s page 239 + ARM GAS /tmp/ccfdMfFA.s page 239 4763 0152 2046 mov r0, r4 @@ -14338,7 +14338,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6894:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 4811 .loc 1 6894 22 is_stmt 0 view .LVU1541 4812 0002 806B ldr r0, [r0, #56] - ARM GAS /tmp/ccGFzgX3.s page 240 + ARM GAS /tmp/ccfdMfFA.s page 240 4813 .LVL369: @@ -14398,7 +14398,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4859 .thumb_func 4861 TIM_DMATriggerHalfCplt: 4862 .LVL372: - ARM GAS /tmp/ccGFzgX3.s page 241 + ARM GAS /tmp/ccfdMfFA.s page 241 4863 .LFB244: @@ -14458,7 +14458,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4911 .syntax unified 4912 .thumb 4913 .thumb_func - ARM GAS /tmp/ccGFzgX3.s page 242 + ARM GAS /tmp/ccfdMfFA.s page 242 4915 TIM_DMAError: @@ -14518,7 +14518,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4953 .loc 1 6631 11 view .LVU1577 4954 0018 8342 cmp r3, r0 4955 001a 19D0 beq .L289 - ARM GAS /tmp/ccGFzgX3.s page 243 + ARM GAS /tmp/ccfdMfFA.s page 243 6638:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -14578,7 +14578,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4995 0046 2377 strb r3, [r4, #28] 6629:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 4996 .loc 1 6629 5 is_stmt 1 view .LVU1593 - ARM GAS /tmp/ccGFzgX3.s page 244 + ARM GAS /tmp/ccfdMfFA.s page 244 4997 0048 0123 movs r3, #1 @@ -14638,7 +14638,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5047 .cfi_startproc 5048 @ args = 0, pretend = 0, frame = 0 5049 @ frame_needed = 0, uses_anonymous_args = 0 - ARM GAS /tmp/ccGFzgX3.s page 245 + ARM GAS /tmp/ccfdMfFA.s page 245 5050 @ link register save eliminated. @@ -14698,7 +14698,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5099 .loc 1 6524 3 view .LVU1610 6524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 5100 .loc 1 6524 14 is_stmt 0 view .LVU1611 - ARM GAS /tmp/ccGFzgX3.s page 246 + ARM GAS /tmp/ccfdMfFA.s page 246 5101 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 @@ -14758,7 +14758,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 5151 .loc 1 6545 1 view .LVU1620 5152 0004 7047 bx lr - ARM GAS /tmp/ccGFzgX3.s page 247 + ARM GAS /tmp/ccfdMfFA.s page 247 5153 .cfi_endproc @@ -14818,7 +14818,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5203 0009 1D .byte (.L298-.L300)/2 5204 000a 1D .byte (.L298-.L300)/2 5205 000b 1D .byte (.L298-.L300)/2 - ARM GAS /tmp/ccGFzgX3.s page 248 + ARM GAS /tmp/ccfdMfFA.s page 248 5206 000c 0D .byte (.L303-.L300)/2 @@ -14878,7 +14878,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5252 .L299: 6577:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 5253 .loc 1 6577 19 discriminator 13 view .LVU1637 - ARM GAS /tmp/ccGFzgX3.s page 249 + ARM GAS /tmp/ccfdMfFA.s page 249 5254 003a 90F84200 ldrb r0, [r0, #66] @ zero_extendqisi2 @@ -14938,7 +14938,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5301 .syntax unified 5302 .thumb 5303 .thumb_func - ARM GAS /tmp/ccGFzgX3.s page 250 + ARM GAS /tmp/ccfdMfFA.s page 250 5305 TIM_Base_SetConfig: @@ -14998,7 +14998,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5349 0036 04F58234 add r4, r4, #66560 5350 003a A042 cmp r0, r4 5351 003c 14BF ite ne - ARM GAS /tmp/ccGFzgX3.s page 251 + ARM GAS /tmp/ccfdMfFA.s page 251 5352 003e 0024 movne r4, #0 @@ -15058,7 +15058,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5396 0084 224A ldr r2, .L317+12 5397 0086 9042 cmp r0, r2 5398 0088 14BF ite ne - ARM GAS /tmp/ccGFzgX3.s page 252 + ARM GAS /tmp/ccfdMfFA.s page 252 5399 008a 0022 movne r2, #0 @@ -15118,7 +15118,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6953:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 5444 .loc 1 6953 3 is_stmt 1 view .LVU1677 6953:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 253 + ARM GAS /tmp/ccfdMfFA.s page 253 5445 .loc 1 6953 13 is_stmt 0 view .LVU1678 @@ -15178,7 +15178,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5482 00f8 03D0 beq .L307 6975:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 5483 .loc 1 6975 5 is_stmt 1 view .LVU1696 - ARM GAS /tmp/ccGFzgX3.s page 254 + ARM GAS /tmp/ccfdMfFA.s page 254 5484 00fa 0369 ldr r3, [r0, #16] @@ -15238,7 +15238,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 5531 .loc 1 282 3 view .LVU1706 284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 255 + ARM GAS /tmp/ccfdMfFA.s page 255 5532 .loc 1 284 3 view .LVU1707 @@ -15298,7 +15298,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5568 .loc 1 316 3 view .LVU1725 316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 5569 .loc 1 316 3 view .LVU1726 - ARM GAS /tmp/ccGFzgX3.s page 256 + ARM GAS /tmp/ccfdMfFA.s page 256 5570 003a 84F84430 strb r3, [r4, #68] @@ -15358,7 +15358,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5610 .section .text.HAL_TIM_OC_Init,"ax",%progbits 5611 .align 1 5612 .global HAL_TIM_OC_Init - ARM GAS /tmp/ccGFzgX3.s page 257 + ARM GAS /tmp/ccfdMfFA.s page 257 5613 .syntax unified @@ -15418,7 +15418,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5652 0012 2146 mov r1, r4 693:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 5653 .loc 1 693 3 view .LVU1758 - ARM GAS /tmp/ccGFzgX3.s page 258 + ARM GAS /tmp/ccfdMfFA.s page 258 5654 0014 51F8040B ldr r0, [r1], #4 @@ -15478,7 +15478,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 705:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 5689 .loc 1 705 10 is_stmt 0 view .LVU1778 5690 004e 0020 movs r0, #0 - ARM GAS /tmp/ccGFzgX3.s page 259 + ARM GAS /tmp/ccfdMfFA.s page 259 706:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -15538,7 +15538,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5736 .LCFI53: 5737 .cfi_def_cfa_offset 8 5738 .cfi_offset 4, -8 - ARM GAS /tmp/ccGFzgX3.s page 260 + ARM GAS /tmp/ccfdMfFA.s page 260 5739 .cfi_offset 14, -4 @@ -15598,7 +15598,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5774 002a 84F84030 strb r3, [r4, #64] 1368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 5775 .loc 1 1368 3 view .LVU1809 - ARM GAS /tmp/ccGFzgX3.s page 261 + ARM GAS /tmp/ccfdMfFA.s page 261 5776 002e 84F84130 strb r3, [r4, #65] @@ -15658,7 +15658,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5812 .LCFI54: 5813 .cfi_def_cfa_offset 0 5814 .cfi_restore 4 - ARM GAS /tmp/ccGFzgX3.s page 262 + ARM GAS /tmp/ccfdMfFA.s page 262 5815 .cfi_restore 14 @@ -15718,7 +15718,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5857 000a 13B3 cbz r3, .L354 5858 .LVL442: 5859 .L348: - ARM GAS /tmp/ccGFzgX3.s page 263 + ARM GAS /tmp/ccfdMfFA.s page 263 2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -15778,7 +15778,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5895 0042 84F84630 strb r3, [r4, #70] 2037:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 5896 .loc 1 2037 3 view .LVU1861 - ARM GAS /tmp/ccGFzgX3.s page 264 + ARM GAS /tmp/ccfdMfFA.s page 264 5897 0046 84F84730 strb r3, [r4, #71] @@ -15838,7 +15838,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2640:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the TIM handle allocation */ 5941 .loc 1 2640 1 is_stmt 1 view -0 5942 .cfi_startproc - ARM GAS /tmp/ccGFzgX3.s page 265 + ARM GAS /tmp/ccfdMfFA.s page 265 5943 @ args = 0, pretend = 0, frame = 0 @@ -15898,7 +15898,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5980 001a FFF7FEFF bl TIM_Base_SetConfig 5981 .LVL450: 2683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 266 + ARM GAS /tmp/ccfdMfFA.s page 266 5982 .loc 1 2683 3 is_stmt 1 view .LVU1892 @@ -15958,7 +15958,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6018 .LVL451: 6019 .L363: 2658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 267 + ARM GAS /tmp/ccfdMfFA.s page 267 6020 .loc 1 2658 5 is_stmt 1 view .LVU1911 @@ -16018,7 +16018,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3031:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpsmcr; 6065 .loc 1 3031 1 view .LVU1923 6066 0004 F8B5 push {r3, r4, r5, r6, r7, lr} - ARM GAS /tmp/ccGFzgX3.s page 268 + ARM GAS /tmp/ccfdMfFA.s page 268 6067 .LCFI59: @@ -16078,7 +16078,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6102 0014 84F83D30 strb r3, [r4, #61] 3083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6103 .loc 1 3083 3 is_stmt 1 view .LVU1943 - ARM GAS /tmp/ccGFzgX3.s page 269 + ARM GAS /tmp/ccfdMfFA.s page 269 3083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -16138,7 +16138,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6140 .loc 1 3101 12 is_stmt 0 view .LVU1961 6141 0038 1B4A ldr r2, .L373+4 6142 003a 1A40 ands r2, r2, r3 - ARM GAS /tmp/ccGFzgX3.s page 270 + ARM GAS /tmp/ccfdMfFA.s page 270 6143 .LVL462: @@ -16198,7 +16198,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); 6180 .loc 1 3112 3 view .LVU1979 3112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); - ARM GAS /tmp/ccGFzgX3.s page 271 + ARM GAS /tmp/ccfdMfFA.s page 271 6181 .loc 1 3112 11 is_stmt 0 view .LVU1980 @@ -16258,7 +16258,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 6218 .loc 1 3130 3 view .LVU1998 6219 0086 84F84430 strb r3, [r4, #68] - ARM GAS /tmp/ccGFzgX3.s page 272 + ARM GAS /tmp/ccfdMfFA.s page 272 3131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -16318,7 +16318,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6262 .cfi_endproc 6263 .LFE189: 6265 .section .text.TIM_OC2_SetConfig,"ax",%progbits - ARM GAS /tmp/ccGFzgX3.s page 273 + ARM GAS /tmp/ccfdMfFA.s page 273 6266 .align 1 @@ -16378,7 +16378,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6307 .LVL480: 7080:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC2S; 6308 .loc 1 7080 3 is_stmt 1 view .LVU2025 - ARM GAS /tmp/ccGFzgX3.s page 274 + ARM GAS /tmp/ccfdMfFA.s page 274 7081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -16438,7 +16438,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7098:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Reset the Output N State */ 6347 .loc 1 7098 5 is_stmt 1 view .LVU2042 7098:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Reset the Output N State */ - ARM GAS /tmp/ccGFzgX3.s page 275 + ARM GAS /tmp/ccfdMfFA.s page 275 6348 .loc 1 7098 26 is_stmt 0 view .LVU2043 @@ -16498,7 +16498,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6384 0056 4260 str r2, [r0, #4] 7122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6385 .loc 1 7122 3 is_stmt 1 view .LVU2062 - ARM GAS /tmp/ccGFzgX3.s page 276 + ARM GAS /tmp/ccfdMfFA.s page 276 7122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -16558,7 +16558,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6431 .loc 1 4075 3 view .LVU2073 4076:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); 6432 .loc 1 4076 3 view .LVU2074 - ARM GAS /tmp/ccGFzgX3.s page 277 + ARM GAS /tmp/ccfdMfFA.s page 277 4077:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -16618,7 +16618,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4090:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 6479 .loc 1 4090 7 view .LVU2083 6480 0030 0068 ldr r0, [r0] - ARM GAS /tmp/ccGFzgX3.s page 278 + ARM GAS /tmp/ccfdMfFA.s page 278 6481 .LVL495: @@ -16678,7 +16678,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6519 .L387: 4117:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6520 .loc 1 4117 7 is_stmt 1 view .LVU2100 - ARM GAS /tmp/ccGFzgX3.s page 279 + ARM GAS /tmp/ccfdMfFA.s page 279 4120:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; @@ -16738,7 +16738,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6558 .loc 1 4141 7 view .LVU2117 6559 006a 00E0 b .L383 6560 .LVL512: - ARM GAS /tmp/ccGFzgX3.s page 280 + ARM GAS /tmp/ccfdMfFA.s page 280 6561 .L392: @@ -16798,7 +16798,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6607 .cfi_offset 4, -12 6608 .cfi_offset 5, -8 6609 .cfi_offset 14, -4 - ARM GAS /tmp/ccGFzgX3.s page 281 + ARM GAS /tmp/ccfdMfFA.s page 281 4272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -16858,7 +16858,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6654 .L406: 4288:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6655 .loc 1 4288 7 view .LVU2138 - ARM GAS /tmp/ccGFzgX3.s page 282 + ARM GAS /tmp/ccfdMfFA.s page 282 4291:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -16918,7 +16918,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6692 005c 67E0 b .L399 6693 .LVL520: 6694 .L405: - ARM GAS /tmp/ccGFzgX3.s page 283 + ARM GAS /tmp/ccfdMfFA.s page 283 4305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -16978,7 +16978,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 6731 .loc 1 4316 7 view .LVU2175 6732 0086 52E0 b .L399 - ARM GAS /tmp/ccGFzgX3.s page 284 + ARM GAS /tmp/ccfdMfFA.s page 284 6733 .LVL523: @@ -17038,7 +17038,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6769 .loc 1 4272 21 is_stmt 0 view .LVU2193 6770 00ac 0020 movs r0, #0 4333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 285 + ARM GAS /tmp/ccfdMfFA.s page 285 6771 .loc 1 4333 7 view .LVU2194 @@ -17098,7 +17098,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6808 .loc 1 4350 7 is_stmt 1 view .LVU2211 4272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 6809 .loc 1 4272 21 is_stmt 0 view .LVU2212 - ARM GAS /tmp/ccGFzgX3.s page 286 + ARM GAS /tmp/ccfdMfFA.s page 286 6810 00d6 0020 movs r0, #0 @@ -17158,7 +17158,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6847 00fc 5365 str r3, [r2, #84] 4367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 6848 .loc 1 4367 7 is_stmt 1 view .LVU2230 - ARM GAS /tmp/ccGFzgX3.s page 287 + ARM GAS /tmp/ccfdMfFA.s page 287 4272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -17218,7 +17218,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6885 .loc 1 4383 29 view .LVU2248 6886 0122 43EA0123 orr r3, r3, r1, lsl #8 6887 0126 5365 str r3, [r2, #84] - ARM GAS /tmp/ccGFzgX3.s page 288 + ARM GAS /tmp/ccfdMfFA.s page 288 4384:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -17278,7 +17278,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6932 @ frame_needed = 0, uses_anonymous_args = 0 6933 @ link register save eliminated. 7518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpccmr1; - ARM GAS /tmp/ccGFzgX3.s page 289 + ARM GAS /tmp/ccfdMfFA.s page 289 6934 .loc 1 7518 1 is_stmt 0 view .LVU2261 @@ -17338,7 +17338,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 6975 002c 1AD0 beq .L411 6976 002e CAB9 cbnz r2, .L411 7528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 290 + ARM GAS /tmp/ccfdMfFA.s page 290 6977 .loc 1 7528 7 discriminator 4 view .LVU2275 @@ -17398,7 +17398,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 7020 .loc 1 7540 30 is_stmt 0 view .LVU2287 7021 0070 1B01 lsls r3, r3, #4 - ARM GAS /tmp/ccGFzgX3.s page 291 + ARM GAS /tmp/ccfdMfFA.s page 291 7022 .LVL549: @@ -17458,7 +17458,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7065 .syntax unified 7066 .thumb 7067 .thumb_func - ARM GAS /tmp/ccGFzgX3.s page 292 + ARM GAS /tmp/ccfdMfFA.s page 292 7069 HAL_TIM_IC_ConfigChannel: @@ -17518,7 +17518,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7110 001f 51 .byte (.L425-.L420)/2 7111 0020 19 .byte (.L422-.L420)/2 7112 0021 51 .byte (.L425-.L420)/2 - ARM GAS /tmp/ccGFzgX3.s page 293 + ARM GAS /tmp/ccfdMfFA.s page 293 7113 0022 51 .byte (.L425-.L420)/2 @@ -17578,7 +17578,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7153 .loc 1 4169 21 view .LVU2326 7154 004a 0020 movs r0, #0 7155 004c 38E0 b .L418 - ARM GAS /tmp/ccGFzgX3.s page 294 + ARM GAS /tmp/ccfdMfFA.s page 294 7156 .LVL560: @@ -17638,7 +17638,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4214:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 7195 .loc 1 4214 5 is_stmt 1 view .LVU2342 4216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sConfig->ICPolarity, - ARM GAS /tmp/ccGFzgX3.s page 295 + ARM GAS /tmp/ccfdMfFA.s page 295 7196 .loc 1 4216 5 view .LVU2343 @@ -17698,7 +17698,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7235 009a 4A68 ldr r2, [r1, #4] 7236 .LVL571: 4232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sConfig->ICPolarity, - ARM GAS /tmp/ccGFzgX3.s page 296 + ARM GAS /tmp/ccfdMfFA.s page 296 7237 .loc 1 4232 5 is_stmt 0 view .LVU2359 @@ -17758,7 +17758,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7276 00c2 84F83C30 strb r3, [r4, #60] 4248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 7277 .loc 1 4248 3 view .LVU2375 - ARM GAS /tmp/ccGFzgX3.s page 297 + ARM GAS /tmp/ccfdMfFA.s page 297 4250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -17818,7 +17818,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7322 .cfi_offset 14, -4 7323 0006 88B0 sub sp, sp, #32 7324 .LCFI70: - ARM GAS /tmp/ccGFzgX3.s page 298 + ARM GAS /tmp/ccfdMfFA.s page 298 7325 .cfi_def_cfa_offset 48 @@ -17878,7 +17878,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7361 002e CB68 ldr r3, [r1, #12] 4437:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState; 7362 .loc 1 4437 23 view .LVU2406 - ARM GAS /tmp/ccGFzgX3.s page 299 + ARM GAS /tmp/ccfdMfFA.s page 299 7363 0030 0493 str r3, [sp, #16] @@ -17938,7 +17938,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7403 .cfi_restore_state 4445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 7404 .loc 1 4445 9 is_stmt 1 view .LVU2421 - ARM GAS /tmp/ccGFzgX3.s page 300 + ARM GAS /tmp/ccfdMfFA.s page 300 4447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; @@ -17998,7 +17998,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7445 0076 FFF7FEFF bl TIM_TI1_SetConfig 7446 .LVL592: 4476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 301 + ARM GAS /tmp/ccfdMfFA.s page 301 7447 .loc 1 4476 11 view .LVU2436 @@ -18058,7 +18058,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7483 .loc 1 4484 25 view .LVU2454 7484 00a4 9368 ldr r3, [r2, #8] 4484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; - ARM GAS /tmp/ccGFzgX3.s page 302 + ARM GAS /tmp/ccfdMfFA.s page 302 7485 .loc 1 4484 32 view .LVU2455 @@ -18118,7 +18118,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 4503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; 7524 .loc 1 4503 11 is_stmt 1 view .LVU2471 4503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; - ARM GAS /tmp/ccGFzgX3.s page 303 + ARM GAS /tmp/ccfdMfFA.s page 303 7525 .loc 1 4503 15 is_stmt 0 view .LVU2472 @@ -18178,7 +18178,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7568 .loc 1 4429 5 discriminator 1 view .LVU2483 7569 00f8 A9E7 b .L428 7570 .L442: - ARM GAS /tmp/ccGFzgX3.s page 304 + ARM GAS /tmp/ccfdMfFA.s page 304 7571 00fa 00BF .align 2 @@ -18238,7 +18238,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7818:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); 7602 .loc 1 7818 3 is_stmt 1 view .LVU2489 7603 .loc 1 7818 11 is_stmt 0 view .LVU2490 - ARM GAS /tmp/ccGFzgX3.s page 305 + ARM GAS /tmp/ccfdMfFA.s page 305 7604 0004 24F47F4C bic ip, r4, #65280 @@ -18298,7 +18298,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7647 0004 012B cmp r3, #1 7648 0006 00F09B80 beq .L465 5291:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; - ARM GAS /tmp/ccGFzgX3.s page 306 + ARM GAS /tmp/ccfdMfFA.s page 306 7649 .loc 1 5291 1 is_stmt 0 view .LVU2504 @@ -18358,7 +18358,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7689 .loc 1 5437 1 is_stmt 0 view .LVU2518 7690 0034 70BD pop {r4, r5, r6, pc} 7691 .LVL605: - ARM GAS /tmp/ccGFzgX3.s page 307 + ARM GAS /tmp/ccfdMfFA.s page 307 7692 .L447: @@ -18418,7 +18418,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 7737 .loc 1 5320 28 is_stmt 0 view .LVU2528 7738 005e C968 ldr r1, [r1, #12] - ARM GAS /tmp/ccGFzgX3.s page 308 + ARM GAS /tmp/ccfdMfFA.s page 308 7739 .LVL609: @@ -18478,7 +18478,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7776 007e 33B1 cbz r3, .L459 5348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 7777 .loc 1 5348 11 is_stmt 1 view .LVU2546 - ARM GAS /tmp/ccGFzgX3.s page 309 + ARM GAS /tmp/ccfdMfFA.s page 309 7778 0080 2268 ldr r2, [r4] @@ -18538,7 +18538,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7822 00c4 43F08003 orr r3, r3, #128 7823 00c8 D361 str r3, [r2, #28] 7824 00ca 0020 movs r0, #0 - ARM GAS /tmp/ccGFzgX3.s page 310 + ARM GAS /tmp/ccfdMfFA.s page 310 7825 00cc ACE7 b .L449 @@ -18598,7 +18598,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5409:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 7869 .loc 1 5409 11 view .LVU2567 7870 010e 2268 ldr r2, [r4] - ARM GAS /tmp/ccGFzgX3.s page 311 + ARM GAS /tmp/ccfdMfFA.s page 311 7871 0110 536D ldr r3, [r2, #84] @@ -18658,7 +18658,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7918 .align 1 7919 .global HAL_TIM_ConfigClockSource 7920 .syntax unified - ARM GAS /tmp/ccGFzgX3.s page 312 + ARM GAS /tmp/ccfdMfFA.s page 312 7921 .thumb @@ -18718,7 +18718,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; 7961 .loc 1 5462 3 view .LVU2591 5462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr; - ARM GAS /tmp/ccGFzgX3.s page 313 + ARM GAS /tmp/ccfdMfFA.s page 313 7962 .loc 1 5462 11 is_stmt 0 view .LVU2592 @@ -18778,7 +18778,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8004 004a 26E0 b .L479 8005 .L478: 5465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 314 + ARM GAS /tmp/ccfdMfFA.s page 314 8006 .loc 1 5465 3 view .LVU2605 @@ -18838,7 +18838,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8046 .L474: 5465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 8047 .loc 1 5465 3 view .LVU2620 - ARM GAS /tmp/ccGFzgX3.s page 315 + ARM GAS /tmp/ccfdMfFA.s page 315 8048 0072 B3F5805F cmp r3, #4096 @@ -18898,7 +18898,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8085 .loc 1 5448 21 is_stmt 0 view .LVU2637 8086 0098 0020 movs r0, #0 8087 .LVL636: - ARM GAS /tmp/ccGFzgX3.s page 316 + ARM GAS /tmp/ccfdMfFA.s page 316 8088 .L479: @@ -18958,7 +18958,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8124 00b6 9368 ldr r3, [r2, #8] 5513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 8125 .loc 1 5513 28 view .LVU2656 - ARM GAS /tmp/ccGFzgX3.s page 317 + ARM GAS /tmp/ccfdMfFA.s page 317 8126 00b8 43F48043 orr r3, r3, #16384 @@ -19018,7 +19018,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5556:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 8164 .loc 1 5556 7 view .LVU2673 5558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sClockSourceConfig->ClockPolarity, - ARM GAS /tmp/ccGFzgX3.s page 318 + ARM GAS /tmp/ccfdMfFA.s page 318 8165 .loc 1 5558 7 view .LVU2674 @@ -19078,7 +19078,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8208 00fa 00BF .align 2 8209 .L491: 8210 00fc 8800FEFF .word -130936 - ARM GAS /tmp/ccGFzgX3.s page 319 + ARM GAS /tmp/ccfdMfFA.s page 319 8211 .cfi_endproc @@ -19138,7 +19138,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8253 .LVL661: 7399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the slave mode */ 8254 .loc 1 7399 3 is_stmt 1 view .LVU2700 - ARM GAS /tmp/ccGFzgX3.s page 320 + ARM GAS /tmp/ccfdMfFA.s page 320 7399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the slave mode */ @@ -19198,7 +19198,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8293 0030 FFF7FEFF bl TIM_ETR_SetConfig 8294 .LVL667: 7421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 321 + ARM GAS /tmp/ccfdMfFA.s page 321 8295 .loc 1 7421 7 is_stmt 1 view .LVU2717 @@ -19258,7 +19258,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8337 .loc 1 7436 7 is_stmt 1 view .LVU2729 7436:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E; 8338 .loc 1 7436 21 is_stmt 0 view .LVU2730 - ARM GAS /tmp/ccGFzgX3.s page 322 + ARM GAS /tmp/ccfdMfFA.s page 322 8339 005c 0368 ldr r3, [r0] @@ -19318,7 +19318,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 8376 .loc 1 7447 7 is_stmt 1 view .LVU2748 7385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpsmcr; - ARM GAS /tmp/ccGFzgX3.s page 323 + ARM GAS /tmp/ccfdMfFA.s page 323 8377 .loc 1 7385 21 is_stmt 0 view .LVU2749 @@ -19378,7 +19378,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8415 0094 FFF7FEFF bl TIM_TI2_ConfigInputStage 8416 .LVL689: 7475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 324 + ARM GAS /tmp/ccfdMfFA.s page 324 8417 .loc 1 7475 7 is_stmt 1 view .LVU2766 @@ -19438,7 +19438,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 8459 .loc 1 7489 14 view .LVU2779 8460 00b0 0120 movs r0, #1 - ARM GAS /tmp/ccGFzgX3.s page 325 + ARM GAS /tmp/ccfdMfFA.s page 325 8461 .LVL701: @@ -19498,7 +19498,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5639:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 8507 .loc 1 5639 3 is_stmt 1 discriminator 2 view .LVU2790 8508 000c 0123 movs r3, #1 - ARM GAS /tmp/ccGFzgX3.s page 326 + ARM GAS /tmp/ccfdMfFA.s page 326 8509 000e 80F83C30 strb r3, [r0, #60] @@ -19558,7 +19558,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5645:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_UNLOCK(htim); 8547 .loc 1 5645 17 is_stmt 0 view .LVU2807 8548 0040 0120 movs r0, #1 - ARM GAS /tmp/ccGFzgX3.s page 327 + ARM GAS /tmp/ccfdMfFA.s page 327 8549 0042 84F83D00 strb r0, [r4, #61] @@ -19618,7 +19618,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8592 0004 012B cmp r3, #1 8593 0006 22D0 beq .L523 5674:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */ - ARM GAS /tmp/ccGFzgX3.s page 328 + ARM GAS /tmp/ccfdMfFA.s page 328 8594 .loc 1 5674 1 is_stmt 0 view .LVU2821 @@ -19678,7 +19678,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 5701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 8634 .loc 1 5701 3 view .LVU2836 8635 .L521: - ARM GAS /tmp/ccGFzgX3.s page 329 + ARM GAS /tmp/ccfdMfFA.s page 329 5702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -19738,7 +19738,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 7832:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 7833:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 7834:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 - ARM GAS /tmp/ccGFzgX3.s page 330 + ARM GAS /tmp/ccfdMfFA.s page 330 7835:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 @@ -19798,7 +19798,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8707 .loc 1 7857 1 view .LVU2861 8708 001c 7047 bx lr 8709 .cfi_endproc - ARM GAS /tmp/ccGFzgX3.s page 331 + ARM GAS /tmp/ccfdMfFA.s page 331 8710 .LFE261: @@ -19858,7 +19858,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8760 001e 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 8761 0022 DBB2 uxtb r3, r3 802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 332 + ARM GAS /tmp/ccfdMfFA.s page 332 8762 .loc 1 802 44 discriminator 1 view .LVU2868 @@ -19918,7 +19918,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8810 0064 E1E7 b .L538 8811 .L534: 802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 333 + ARM GAS /tmp/ccfdMfFA.s page 333 8812 .loc 1 802 7 discriminator 10 view .LVU2875 @@ -19978,7 +19978,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8855 00a2 2B4A ldr r2, .L554+4 8856 00a4 9342 cmp r3, r2 8857 00a6 18BF it ne - ARM GAS /tmp/ccGFzgX3.s page 334 + ARM GAS /tmp/ccfdMfFA.s page 334 8858 00a8 8B42 cmpne r3, r1 @@ -20038,7 +20038,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8901 00f8 1A60 str r2, [r3] 834:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 8902 .loc 1 834 10 is_stmt 0 view .LVU2898 - ARM GAS /tmp/ccGFzgX3.s page 335 + ARM GAS /tmp/ccfdMfFA.s page 335 8903 00fa 0020 movs r0, #0 @@ -20098,7 +20098,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8946 .loc 1 825 7 is_stmt 1 view .LVU2909 8947 0136 1A68 ldr r2, [r3] 8948 .LVL724: - ARM GAS /tmp/ccGFzgX3.s page 336 + ARM GAS /tmp/ccfdMfFA.s page 336 825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -20158,7 +20158,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 8998 .cfi_offset 14, -4 8999 0002 0446 mov r4, r0 9000 0004 0D46 mov r5, r1 - ARM GAS /tmp/ccGFzgX3.s page 337 + ARM GAS /tmp/ccfdMfFA.s page 337 853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -20218,7 +20218,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9042 0042 08D1 bne .L558 865:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 9043 .loc 1 865 3 discriminator 1 view .LVU2930 - ARM GAS /tmp/ccGFzgX3.s page 338 + ARM GAS /tmp/ccfdMfFA.s page 338 9044 0044 196A ldr r1, [r3, #32] @@ -20278,7 +20278,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9091 0080 F9E7 b .L566 9092 .L563: 868:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 339 + ARM GAS /tmp/ccfdMfFA.s page 339 9093 .loc 1 868 3 discriminator 6 view .LVU2938 @@ -20338,7 +20338,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 9143 .loc 1 888 3 view .LVU2945 891:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 340 + ARM GAS /tmp/ccfdMfFA.s page 340 9144 .loc 1 891 3 view .LVU2946 @@ -20398,7 +20398,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9193 0042 71 .byte (.L584-.L582)/2 9194 0043 88 .byte (.L580-.L582)/2 9195 0044 88 .byte (.L580-.L582)/2 - ARM GAS /tmp/ccGFzgX3.s page 341 + ARM GAS /tmp/ccfdMfFA.s page 341 9196 0045 88 .byte (.L580-.L582)/2 @@ -20458,7 +20458,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9241 0084 90F84330 ldrb r3, [r0, #67] @ zero_extendqisi2 9242 0088 DBB2 uxtb r3, r3 894:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 342 + ARM GAS /tmp/ccfdMfFA.s page 342 9243 .loc 1 894 44 discriminator 14 view .LVU2961 @@ -20518,7 +20518,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 9285 .loc 1 949 9 is_stmt 0 view .LVU2974 9286 00c0 2368 ldr r3, [r4] - ARM GAS /tmp/ccGFzgX3.s page 343 + ARM GAS /tmp/ccfdMfFA.s page 343 949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -20578,7 +20578,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9330 .loc 1 914 7 view .LVU2985 9331 0110 2268 ldr r2, [r4] 9332 0112 D368 ldr r3, [r2, #12] - ARM GAS /tmp/ccGFzgX3.s page 344 + ARM GAS /tmp/ccfdMfFA.s page 344 9333 0114 43F00403 orr r3, r3, #4 @@ -20638,7 +20638,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9372 0146 0120 movs r0, #1 9373 .LVL737: 900:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 345 + ARM GAS /tmp/ccfdMfFA.s page 345 9374 .loc 1 900 3 discriminator 12 view .LVU3001 @@ -20698,7 +20698,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 954:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 9420 .loc 1 954 9 is_stmt 0 view .LVU3010 9421 01a2 42F00102 orr r2, r2, #1 - ARM GAS /tmp/ccGFzgX3.s page 346 + ARM GAS /tmp/ccfdMfFA.s page 346 9422 01a6 1A60 str r2, [r3] @@ -20758,7 +20758,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9471 .cfi_def_cfa_offset 16 9472 .cfi_offset 3, -16 9473 .cfi_offset 4, -12 - ARM GAS /tmp/ccGFzgX3.s page 347 + ARM GAS /tmp/ccfdMfFA.s page 347 9474 .cfi_offset 5, -8 @@ -20818,7 +20818,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 9519 .loc 1 1025 5 is_stmt 1 view .LVU3027 1025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 348 + ARM GAS /tmp/ccfdMfFA.s page 348 9520 .loc 1 1025 9 is_stmt 0 view .LVU3028 @@ -20878,7 +20878,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9563 .loc 1 1032 5 discriminator 5 view .LVU3039 1035:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 9564 .loc 1 1035 5 view .LVU3040 - ARM GAS /tmp/ccGFzgX3.s page 349 + ARM GAS /tmp/ccfdMfFA.s page 349 9565 0078 102C cmp r4, #16 @@ -20938,7 +20938,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1012:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 9612 .loc 1 1012 7 view .LVU3048 1020:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 350 + ARM GAS /tmp/ccfdMfFA.s page 350 9613 .loc 1 1020 3 view .LVU3049 @@ -20998,7 +20998,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1040:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 9659 .loc 1 1040 1 is_stmt 0 view .LVU3058 9660 00f4 38BD pop {r3, r4, r5, pc} - ARM GAS /tmp/ccGFzgX3.s page 351 + ARM GAS /tmp/ccfdMfFA.s page 351 9661 .LVL756: @@ -21058,7 +21058,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9710 0014 20 .byte (.L633-.L630)/2 9711 0015 40 .byte (.L628-.L630)/2 9712 0016 40 .byte (.L628-.L630)/2 - ARM GAS /tmp/ccGFzgX3.s page 352 + ARM GAS /tmp/ccfdMfFA.s page 352 9713 0017 40 .byte (.L628-.L630)/2 @@ -21118,7 +21118,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9762 004f 00 .p2align 1 9763 .L633: 1065:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 353 + ARM GAS /tmp/ccfdMfFA.s page 353 9764 .loc 1 1065 7 is_stmt 0 discriminator 4 view .LVU3071 @@ -21178,7 +21178,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1065:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 9808 .loc 1 1065 44 discriminator 13 view .LVU3082 9809 0086 0228 cmp r0, #2 - ARM GAS /tmp/ccGFzgX3.s page 354 + ARM GAS /tmp/ccfdMfFA.s page 354 9810 0088 14BF ite ne @@ -21238,7 +21238,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9855 00d0 8C00 .2byte (.L650-.L647)/2 9856 00d2 DC00 .2byte (.L645-.L647)/2 9857 00d4 DC00 .2byte (.L645-.L647)/2 - ARM GAS /tmp/ccGFzgX3.s page 355 + ARM GAS /tmp/ccfdMfFA.s page 355 9858 00d6 DC00 .2byte (.L645-.L647)/2 @@ -21298,7 +21298,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9904 0120 012A cmp r2, #1 9905 0122 14BF ite ne 9906 0124 0022 movne r2, #0 - ARM GAS /tmp/ccGFzgX3.s page 356 + ARM GAS /tmp/ccfdMfFA.s page 356 9907 0126 0122 moveq r2, #1 @@ -21358,7 +21358,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1097:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Length) != HAL_OK) 9946 .loc 1 1097 11 view .LVU3115 9947 0154 3432 adds r2, r2, #52 - ARM GAS /tmp/ccGFzgX3.s page 357 + ARM GAS /tmp/ccfdMfFA.s page 357 9948 0156 686A ldr r0, [r5, #36] @@ -21418,7 +21418,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 9990 0196 9342 cmpne r3, r2 9991 0198 00F09480 beq .L659 1190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 358 + ARM GAS /tmp/ccfdMfFA.s page 358 9992 .loc 1 1190 9 discriminator 1 view .LVU3128 @@ -21478,7 +21478,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 10035 .loc 1 1113 7 is_stmt 1 view .LVU3140 1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 359 + ARM GAS /tmp/ccfdMfFA.s page 359 10036 .loc 1 1113 17 is_stmt 0 view .LVU3141 @@ -21538,7 +21538,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10075 0218 EA6A ldr r2, [r5, #44] 1134:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; 10076 .loc 1 1134 52 view .LVU3157 - ARM GAS /tmp/ccGFzgX3.s page 360 + ARM GAS /tmp/ccfdMfFA.s page 360 10077 021a 3A48 ldr r0, .L675 @@ -21598,7 +21598,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10116 .L655: 1155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; 10117 .loc 1 1155 7 view .LVU3173 - ARM GAS /tmp/ccGFzgX3.s page 361 + ARM GAS /tmp/ccfdMfFA.s page 361 1155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; @@ -21658,7 +21658,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10156 .loc 1 1077 7 is_stmt 0 discriminator 12 view .LVU3189 10157 0276 0223 movs r3, #2 10158 .LVL780: - ARM GAS /tmp/ccGFzgX3.s page 362 + ARM GAS /tmp/ccfdMfFA.s page 362 1077:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -21718,7 +21718,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10203 02cc 18BF it ne 10204 02ce B2F5803F cmpne r2, #65536 10205 02d2 15D0 beq .L669 - ARM GAS /tmp/ccGFzgX3.s page 363 + ARM GAS /tmp/ccfdMfFA.s page 363 1195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -21778,7 +21778,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10249 .loc 1 1166 16 view .LVU3210 10250 02fc 0120 movs r0, #1 10251 02fe F2E7 b .L636 - ARM GAS /tmp/ccGFzgX3.s page 364 + ARM GAS /tmp/ccfdMfFA.s page 364 10252 .LVL789: @@ -21838,7 +21838,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10302 000f 7E .byte (.L694-.L680)/2 10303 0010 7E .byte (.L694-.L680)/2 10304 0011 7E .byte (.L694-.L680)/2 - ARM GAS /tmp/ccGFzgX3.s page 365 + ARM GAS /tmp/ccfdMfFA.s page 365 10305 0012 45 .byte (.L682-.L680)/2 @@ -21898,7 +21898,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 10348 .loc 1 1273 7 view .LVU3228 10349 0044 196A ldr r1, [r3, #32] - ARM GAS /tmp/ccGFzgX3.s page 366 + ARM GAS /tmp/ccfdMfFA.s page 366 10350 0046 41F21112 movw r2, #4369 @@ -21958,7 +21958,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10395 008e 2E .byte (.L691-.L689)/2 10396 008f 3D .byte (.L687-.L689)/2 10397 0090 3D .byte (.L687-.L689)/2 - ARM GAS /tmp/ccGFzgX3.s page 367 + ARM GAS /tmp/ccfdMfFA.s page 367 10398 0091 3D .byte (.L687-.L689)/2 @@ -22018,7 +22018,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10440 .L679: 1255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]); 10441 .loc 1 1255 7 view .LVU3250 - ARM GAS /tmp/ccGFzgX3.s page 368 + ARM GAS /tmp/ccfdMfFA.s page 368 10442 00bc 0268 ldr r2, [r0] @@ -22078,7 +22078,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10486 .L687: 1280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 10487 .loc 1 1280 5 discriminator 13 view .LVU3261 - ARM GAS /tmp/ccGFzgX3.s page 369 + ARM GAS /tmp/ccfdMfFA.s page 369 10488 0100 0123 movs r3, #1 @@ -22138,7 +22138,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10535 0004 1029 cmp r1, #16 10536 0006 3CD8 bhi .L699 10537 0008 DFE801F0 tbb [pc, r1] - ARM GAS /tmp/ccGFzgX3.s page 370 + ARM GAS /tmp/ccfdMfFA.s page 370 10538 .L701: @@ -22198,7 +22198,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10588 0046 73 .byte (.L708-.L710)/2 10589 0047 73 .byte (.L708-.L710)/2 10590 0048 6F .byte (.L709-.L710)/2 - ARM GAS /tmp/ccGFzgX3.s page 371 + ARM GAS /tmp/ccfdMfFA.s page 371 10591 0049 00 .p2align 1 @@ -22258,7 +22258,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10635 008c 0123 movne r3, #1 10636 008e CCE7 b .L706 10637 .L714: - ARM GAS /tmp/ccGFzgX3.s page 372 + ARM GAS /tmp/ccfdMfFA.s page 372 1477:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -22318,7 +22318,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10680 00d0 29D0 beq .L717 1489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 10681 .loc 1 1489 7 discriminator 3 view .LVU3297 - ARM GAS /tmp/ccGFzgX3.s page 373 + ARM GAS /tmp/ccfdMfFA.s page 373 10682 00d2 02F58062 add r2, r2, #1024 @@ -22378,7 +22378,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10726 .loc 1 1477 3 discriminator 13 view .LVU3307 10727 011e 0223 movs r3, #2 10728 0120 84F84330 strb r3, [r4, #67] - ARM GAS /tmp/ccGFzgX3.s page 374 + ARM GAS /tmp/ccfdMfFA.s page 374 10729 0124 B7E7 b .L715 @@ -22438,7 +22438,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10772 0154 07000100 .word 65543 10773 .cfi_endproc 10774 .LFE165: - ARM GAS /tmp/ccGFzgX3.s page 375 + ARM GAS /tmp/ccfdMfFA.s page 375 10776 .section .text.HAL_TIM_PWM_Stop,"ax",%progbits @@ -22498,7 +22498,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10821 001e 41F21112 movw r2, #4369 10822 0022 1142 tst r1, r2 10823 0024 08D1 bne .L725 - ARM GAS /tmp/ccGFzgX3.s page 376 + ARM GAS /tmp/ccfdMfFA.s page 376 1530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -22558,7 +22558,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10869 0069 1E .byte (.L727-.L729)/2 10870 006a 16 .byte (.L730-.L729)/2 10871 006b 1E .byte (.L727-.L729)/2 - ARM GAS /tmp/ccGFzgX3.s page 377 + ARM GAS /tmp/ccfdMfFA.s page 377 10872 006c 1E .byte (.L727-.L729)/2 @@ -22618,7 +22618,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10919 .section .text.HAL_TIM_PWM_Start_IT,"ax",%progbits 10920 .align 1 10921 .global HAL_TIM_PWM_Start_IT - ARM GAS /tmp/ccGFzgX3.s page 378 + ARM GAS /tmp/ccfdMfFA.s page 378 10922 .syntax unified @@ -22678,7 +22678,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 10970 0022 DBB2 uxtb r3, r3 1563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 10971 .loc 1 1563 44 discriminator 1 view .LVU3353 - ARM GAS /tmp/ccGFzgX3.s page 379 + ARM GAS /tmp/ccfdMfFA.s page 379 10972 0024 013B subs r3, r3, #1 @@ -22738,7 +22738,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11020 .L742: 1563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 11021 .loc 1 1563 7 discriminator 10 view .LVU3360 - ARM GAS /tmp/ccGFzgX3.s page 380 + ARM GAS /tmp/ccfdMfFA.s page 380 11022 0068 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 @@ -22798,7 +22798,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1609:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 11065 .loc 1 1609 5 is_stmt 0 view .LVU3372 11066 00a6 FFF7FEFF bl TIM_CCxChannelCmd - ARM GAS /tmp/ccGFzgX3.s page 381 + ARM GAS /tmp/ccfdMfFA.s page 381 11067 .LVL824: @@ -22858,7 +22858,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11109 00ee 02F57052 add r2, r2, #15360 11110 00f2 9342 cmp r3, r2 11111 00f4 4CD0 beq .L762 - ARM GAS /tmp/ccGFzgX3.s page 382 + ARM GAS /tmp/ccfdMfFA.s page 382 1618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -22918,7 +22918,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11153 012e 0223 movs r3, #2 11154 0130 84F84130 strb r3, [r4, #65] 1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 383 + ARM GAS /tmp/ccfdMfFA.s page 383 11155 .loc 1 1571 3 is_stmt 1 view .LVU3398 @@ -22978,7 +22978,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11200 .LVL828: 11201 .p2align 1 11202 .L762: - ARM GAS /tmp/ccGFzgX3.s page 384 + ARM GAS /tmp/ccfdMfFA.s page 384 1620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) @@ -23038,7 +23038,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11245 .align 2 11246 .L772: 11247 01b8 00000140 .word 1073807360 - ARM GAS /tmp/ccGFzgX3.s page 385 + ARM GAS /tmp/ccfdMfFA.s page 385 11248 01bc 00040140 .word 1073808384 @@ -23098,7 +23098,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11299 .L780: 1659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 11300 .loc 1 1659 7 view .LVU3425 - ARM GAS /tmp/ccGFzgX3.s page 386 + ARM GAS /tmp/ccfdMfFA.s page 386 11301 001c 0268 ldr r2, [r0] @@ -23158,7 +23158,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11343 .L782: 1697:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 11344 .loc 1 1697 7 discriminator 5 view .LVU3438 - ARM GAS /tmp/ccGFzgX3.s page 387 + ARM GAS /tmp/ccfdMfFA.s page 387 1701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -23218,7 +23218,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11392 009a D360 str r3, [r2, #12] 1667:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 11393 .loc 1 1667 7 view .LVU3446 - ARM GAS /tmp/ccGFzgX3.s page 388 + ARM GAS /tmp/ccfdMfFA.s page 388 1689:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -23278,7 +23278,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11437 00da 0020 movs r0, #0 11438 00dc 0AE0 b .L775 11439 .L785: - ARM GAS /tmp/ccGFzgX3.s page 389 + ARM GAS /tmp/ccfdMfFA.s page 389 1704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -23338,7 +23338,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11488 .cfi_offset 3, -16 11489 .cfi_offset 4, -12 11490 .cfi_offset 5, -8 - ARM GAS /tmp/ccGFzgX3.s page 390 + ARM GAS /tmp/ccfdMfFA.s page 390 11491 .cfi_offset 14, -4 @@ -23398,7 +23398,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11537 0032 40F05581 bne .L829 1738:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 11538 .loc 1 1738 8 is_stmt 1 view .LVU3474 - ARM GAS /tmp/ccGFzgX3.s page 391 + ARM GAS /tmp/ccfdMfFA.s page 391 11539 0036 102C cmp r4, #16 @@ -23458,7 +23458,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11587 .LVL854: 11588 .L799: 1734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 392 + ARM GAS /tmp/ccfdMfFA.s page 392 11589 .loc 1 1734 7 discriminator 10 view .LVU3481 @@ -23518,7 +23518,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11633 00aa 0022 movne r2, #0 11634 00ac 0122 moveq r2, #1 11635 .L812: - ARM GAS /tmp/ccGFzgX3.s page 393 + ARM GAS /tmp/ccfdMfFA.s page 393 1738:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -23578,7 +23578,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11682 .loc 1 1738 49 discriminator 7 view .LVU3499 11683 0100 012A cmp r2, #1 11684 0102 14BF ite ne - ARM GAS /tmp/ccGFzgX3.s page 394 + ARM GAS /tmp/ccfdMfFA.s page 394 11685 0104 0022 movne r2, #0 @@ -23638,7 +23638,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11728 0142 7048 ldr r0, .L843 11729 0144 D063 str r0, [r2, #60] 1760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 395 + ARM GAS /tmp/ccfdMfFA.s page 395 11730 .loc 1 1760 7 is_stmt 1 view .LVU3511 @@ -23698,7 +23698,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11769 0176 2B68 ldr r3, [r5] 1851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 11770 .loc 1 1851 8 view .LVU3527 - ARM GAS /tmp/ccGFzgX3.s page 396 + ARM GAS /tmp/ccfdMfFA.s page 396 11771 0178 6549 ldr r1, .L843+12 @@ -23758,7 +23758,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1868:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 11815 .loc 1 1868 7 is_stmt 1 view .LVU3538 11816 01d4 1A68 ldr r2, [r3] - ARM GAS /tmp/ccGFzgX3.s page 397 + ARM GAS /tmp/ccfdMfFA.s page 397 11817 01d6 42F00102 orr r2, r2, #1 @@ -23818,7 +23818,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11856 0204 76D1 bne .L834 1795:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 11857 .loc 1 1795 7 is_stmt 1 view .LVU3554 - ARM GAS /tmp/ccGFzgX3.s page 398 + ARM GAS /tmp/ccfdMfFA.s page 398 11858 0206 2A68 ldr r2, [r5] @@ -23878,7 +23878,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11896 0230 FFF7FEFF bl HAL_DMA_Start_IT 11897 .LVL865: 1809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Length) != HAL_OK) - ARM GAS /tmp/ccGFzgX3.s page 399 + ARM GAS /tmp/ccfdMfFA.s page 399 11898 .loc 1 1809 10 discriminator 1 view .LVU3571 @@ -23938,7 +23938,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11936 025c 2A68 ldr r2, [r5] 1830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Length) != HAL_OK) 11937 .loc 1 1830 11 view .LVU3588 - ARM GAS /tmp/ccGFzgX3.s page 400 + ARM GAS /tmp/ccfdMfFA.s page 400 11938 025e 4032 adds r2, r2, #64 @@ -23998,7 +23998,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 11982 02a8 ED020000 .word .L832+1 11983 02ac ED020000 .word .L832+1 11984 02b0 19020000 .word .L822+1 - ARM GAS /tmp/ccGFzgX3.s page 401 + ARM GAS /tmp/ccfdMfFA.s page 401 11985 02b4 ED020000 .word .L832+1 @@ -24058,7 +24058,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12028 02e8 0120 movs r0, #1 12029 02ea FCE7 b .L804 12030 .L832: - ARM GAS /tmp/ccGFzgX3.s page 402 + ARM GAS /tmp/ccfdMfFA.s page 402 1754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -24118,7 +24118,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12080 @ args = 0, pretend = 0, frame = 0 12081 @ frame_needed = 0, uses_anonymous_args = 0 1888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; - ARM GAS /tmp/ccGFzgX3.s page 403 + ARM GAS /tmp/ccfdMfFA.s page 403 12082 .loc 1 1888 1 is_stmt 0 view .LVU3617 @@ -24178,7 +24178,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 1933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 12128 .loc 1 1933 3 view .LVU3626 12129 .L852: - ARM GAS /tmp/ccGFzgX3.s page 404 + ARM GAS /tmp/ccfdMfFA.s page 404 1936:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -24238,7 +24238,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12172 006e 40F24442 movw r2, #1092 12173 0072 1142 tst r1, r2 12174 0074 03D1 bne .L854 - ARM GAS /tmp/ccGFzgX3.s page 405 + ARM GAS /tmp/ccfdMfFA.s page 405 1945:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -24298,7 +24298,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12220 00a8 C0E7 b .L852 12221 .LVL887: 12222 .L849: - ARM GAS /tmp/ccGFzgX3.s page 406 + ARM GAS /tmp/ccfdMfFA.s page 406 1915:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); @@ -24358,7 +24358,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12263 00d8 0123 movs r3, #1 12264 00da 84F83F30 strb r3, [r4, #63] 12265 00de 0020 movs r0, #0 - ARM GAS /tmp/ccGFzgX3.s page 407 + ARM GAS /tmp/ccfdMfFA.s page 407 12266 00e0 14E0 b .L846 @@ -24418,7 +24418,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12313 .syntax unified 12314 .thumb 12315 .thumb_func - ARM GAS /tmp/ccGFzgX3.s page 408 + ARM GAS /tmp/ccfdMfFA.s page 408 12317 HAL_TIM_IC_Start: @@ -24478,7 +24478,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 12364 .loc 1 2133 61 discriminator 1 view .LVU3677 12365 0026 94F84430 ldrb r3, [r4, #68] @ zero_extendqisi2 - ARM GAS /tmp/ccGFzgX3.s page 409 + ARM GAS /tmp/ccfdMfFA.s page 409 12366 002a DBB2 uxtb r3, r3 @@ -24538,7 +24538,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12413 0064 D2B2 uxtb r2, r2 12414 0066 DDE7 b .L874 12415 .L868: - ARM GAS /tmp/ccGFzgX3.s page 410 + ARM GAS /tmp/ccfdMfFA.s page 410 2132:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); @@ -24598,7 +24598,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12459 00a6 84F83F30 strb r3, [r4, #63] 2147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 12460 .loc 1 2147 3 is_stmt 1 view .LVU3696 - ARM GAS /tmp/ccGFzgX3.s page 411 + ARM GAS /tmp/ccfdMfFA.s page 411 12461 .L888: @@ -24658,7 +24658,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12502 .loc 1 2153 7 discriminator 4 view .LVU3709 12503 00e6 02F57842 add r2, r2, #63488 12504 00ea 9342 cmp r3, r2 - ARM GAS /tmp/ccGFzgX3.s page 412 + ARM GAS /tmp/ccfdMfFA.s page 412 12505 00ec 25D0 beq .L891 @@ -24718,7 +24718,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 12547 .loc 1 2147 3 is_stmt 0 discriminator 3 view .LVU3722 12548 012a 0223 movs r3, #2 - ARM GAS /tmp/ccGFzgX3.s page 413 + ARM GAS /tmp/ccfdMfFA.s page 413 12549 012c 84F84530 strb r3, [r4, #69] @@ -24778,7 +24778,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12591 015a 0020 movs r0, #0 12592 015c FCE7 b .L879 12593 .L901: - ARM GAS /tmp/ccGFzgX3.s page 414 + ARM GAS /tmp/ccfdMfFA.s page 414 12594 015e 00BF .align 2 @@ -24838,7 +24838,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12642 001c 40F24442 movw r2, #1092 12643 0020 1142 tst r1, r2 12644 0022 03D1 bne .L903 - ARM GAS /tmp/ccGFzgX3.s page 415 + ARM GAS /tmp/ccfdMfFA.s page 415 2190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -24898,7 +24898,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12690 005a 16D0 beq .L916 2194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 12691 .loc 1 2194 3 discriminator 4 view .LVU3752 - ARM GAS /tmp/ccGFzgX3.s page 416 + ARM GAS /tmp/ccfdMfFA.s page 416 12692 005c 082D cmp r5, #8 @@ -24958,7 +24958,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12733 .loc 1 2194 3 discriminator 6 view .LVU3765 12734 0092 0123 movs r3, #1 12735 0094 84F84630 strb r3, [r4, #70] - ARM GAS /tmp/ccGFzgX3.s page 417 + ARM GAS /tmp/ccfdMfFA.s page 417 12736 0098 E5E7 b .L911 @@ -25018,7 +25018,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12787 .L925: 2216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); 12788 .loc 1 2216 47 is_stmt 0 discriminator 1 view .LVU3771 - ARM GAS /tmp/ccGFzgX3.s page 418 + ARM GAS /tmp/ccfdMfFA.s page 418 12789 001e 90F83E20 ldrb r2, [r0, #62] @ zero_extendqisi2 @@ -25078,7 +25078,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12835 0054 D2B2 uxtb r2, r2 12836 0056 E5E7 b .L926 12837 .L923: - ARM GAS /tmp/ccGFzgX3.s page 419 + ARM GAS /tmp/ccfdMfFA.s page 419 2216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); @@ -25138,7 +25138,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12882 0098 0223 movs r3, #2 12883 009a 84F83E30 strb r3, [r4, #62] 2231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 420 + ARM GAS /tmp/ccfdMfFA.s page 420 12884 .loc 1 2231 3 is_stmt 1 view .LVU3790 @@ -25198,7 +25198,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 12929 .L935: 2230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 12930 .loc 1 2230 3 is_stmt 0 discriminator 9 view .LVU3800 - ARM GAS /tmp/ccGFzgX3.s page 421 + ARM GAS /tmp/ccfdMfFA.s page 421 12931 00d6 0223 movs r3, #2 @@ -25258,7 +25258,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 12971 .loc 1 2274 9 is_stmt 0 view .LVU3815 12972 0106 2368 ldr r3, [r4] - ARM GAS /tmp/ccGFzgX3.s page 422 + ARM GAS /tmp/ccfdMfFA.s page 422 2274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -25318,7 +25318,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13016 .loc 1 2252 7 view .LVU3826 13017 0156 2268 ldr r2, [r4] 13018 .LVL927: - ARM GAS /tmp/ccGFzgX3.s page 423 + ARM GAS /tmp/ccfdMfFA.s page 423 2252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; @@ -25378,7 +25378,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 13059 .loc 1 2277 7 is_stmt 1 view .LVU3841 2277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 424 + ARM GAS /tmp/ccfdMfFA.s page 424 13060 .loc 1 2277 10 is_stmt 0 view .LVU3842 @@ -25438,7 +25438,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13109 .LVL940: 13110 .LFB178: 2304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK; - ARM GAS /tmp/ccGFzgX3.s page 425 + ARM GAS /tmp/ccfdMfFA.s page 425 13111 .loc 1 2304 1 is_stmt 1 view -0 @@ -25498,7 +25498,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13157 0026 0022 movs r2, #0 13158 0028 2146 mov r1, r4 13159 .LVL942: - ARM GAS /tmp/ccGFzgX3.s page 426 + ARM GAS /tmp/ccfdMfFA.s page 426 2348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -25558,7 +25558,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13206 .LVL945: 13207 0067 00 .p2align 1 13208 .L968: - ARM GAS /tmp/ccGFzgX3.s page 427 + ARM GAS /tmp/ccfdMfFA.s page 427 2322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; @@ -25618,7 +25618,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13249 .loc 1 2355 5 is_stmt 1 view .LVU3880 13250 .L979: 2355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 428 + ARM GAS /tmp/ccfdMfFA.s page 428 13251 .loc 1 2355 5 is_stmt 0 discriminator 2 view .LVU3881 @@ -25678,7 +25678,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13293 .loc 1 2355 5 discriminator 6 view .LVU3893 13294 00dc 0123 movs r3, #1 13295 00de 85F84630 strb r3, [r5, #70] - ARM GAS /tmp/ccGFzgX3.s page 429 + ARM GAS /tmp/ccfdMfFA.s page 429 13296 00e2 0020 movs r0, #0 @@ -25738,7 +25738,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13343 000a 1029 cmp r1, #16 13344 000c 3DD8 bhi .L987 13345 000e DFE801F0 tbb [pc, r1] - ARM GAS /tmp/ccGFzgX3.s page 430 + ARM GAS /tmp/ccfdMfFA.s page 430 13346 .LVL951: @@ -25798,7 +25798,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13390 .loc 1 2393 8 is_stmt 1 view .LVU3912 2393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY)) 13391 .loc 1 2393 11 is_stmt 0 view .LVU3913 - ARM GAS /tmp/ccGFzgX3.s page 431 + ARM GAS /tmp/ccfdMfFA.s page 431 13392 003c 012B cmp r3, #1 @@ -25858,7 +25858,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13440 0080 D3E7 b .L994 13441 .L988: 2380:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); - ARM GAS /tmp/ccGFzgX3.s page 432 + ARM GAS /tmp/ccfdMfFA.s page 432 13442 .loc 1 2380 47 discriminator 13 view .LVU3920 @@ -25918,7 +25918,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 13486 .loc 1 2403 7 is_stmt 1 view .LVU3931 2403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 433 + ARM GAS /tmp/ccfdMfFA.s page 433 13487 .loc 1 2403 7 is_stmt 0 discriminator 1 view .LVU3932 @@ -25978,7 +25978,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13531 00ee 50 .byte (.L1014-.L1013)/2 13532 00ef 80 .byte (.L1022-.L1013)/2 13533 00f0 80 .byte (.L1022-.L1013)/2 - ARM GAS /tmp/ccGFzgX3.s page 434 + ARM GAS /tmp/ccfdMfFA.s page 434 13534 00f1 80 .byte (.L1022-.L1013)/2 @@ -26038,7 +26038,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13576 0124 6B6A ldr r3, [r5, #36] 2419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; 13577 .loc 1 2419 52 view .LVU3955 - ARM GAS /tmp/ccGFzgX3.s page 435 + ARM GAS /tmp/ccfdMfFA.s page 435 13578 0126 504A ldr r2, .L1032 @@ -26098,7 +26098,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13617 0158 434A ldr r2, .L1032 13618 015a DA63 str r2, [r3, #60] 2441:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 436 + ARM GAS /tmp/ccfdMfFA.s page 436 13619 .loc 1 2441 7 is_stmt 1 view .LVU3971 @@ -26158,7 +26158,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13658 .loc 1 2462 7 is_stmt 1 view .LVU3986 2462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 13659 .loc 1 2462 17 is_stmt 0 view .LVU3987 - ARM GAS /tmp/ccGFzgX3.s page 437 + ARM GAS /tmp/ccfdMfFA.s page 437 13660 018c EB6A ldr r3, [r5, #44] @@ -26218,7 +26218,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13699 01bc 2B6B ldr r3, [r5, #48] 2483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 13700 .loc 1 2483 56 view .LVU4003 - ARM GAS /tmp/ccGFzgX3.s page 438 + ARM GAS /tmp/ccfdMfFA.s page 438 13701 01be 2B4A ldr r2, .L1032+4 @@ -26278,7 +26278,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13742 01f4 1CD0 beq .L1017 2506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 13743 .loc 1 2506 7 discriminator 1 view .LVU4017 - ARM GAS /tmp/ccGFzgX3.s page 439 + ARM GAS /tmp/ccfdMfFA.s page 439 13744 01f6 A2F57C42 sub r2, r2, #64512 @@ -26338,7 +26338,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13786 .loc 1 2511 7 is_stmt 1 view .LVU4029 13787 0240 1A68 ldr r2, [r3] 13788 .LVL975: - ARM GAS /tmp/ccGFzgX3.s page 440 + ARM GAS /tmp/ccfdMfFA.s page 440 2511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -26398,7 +26398,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13832 .L1033: 13833 0266 00BF .align 2 13834 .L1032: - ARM GAS /tmp/ccGFzgX3.s page 441 + ARM GAS /tmp/ccfdMfFA.s page 441 13835 0268 00000000 .word TIM_DMACaptureCplt @@ -26458,7 +26458,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13883 0016 07 .byte (.L1040-.L1037)/2 13884 0017 73 .byte (.L1053-.L1037)/2 13885 0018 73 .byte (.L1053-.L1037)/2 - ARM GAS /tmp/ccGFzgX3.s page 442 + ARM GAS /tmp/ccfdMfFA.s page 442 13886 0019 73 .byte (.L1053-.L1037)/2 @@ -26518,7 +26518,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13929 .loc 1 2590 5 view .LVU4059 13930 0052 102D cmp r5, #16 13931 0054 44D8 bhi .L1043 - ARM GAS /tmp/ccGFzgX3.s page 443 + ARM GAS /tmp/ccfdMfFA.s page 443 13932 0056 DFE805F0 tbb [pc, r5] @@ -26578,7 +26578,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 13977 .loc 1 2568 7 is_stmt 1 view .LVU4068 2584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 13978 .loc 1 2584 3 view .LVU4069 - ARM GAS /tmp/ccGFzgX3.s page 444 + ARM GAS /tmp/ccfdMfFA.s page 444 13979 008e D1E7 b .L1041 @@ -26638,7 +26638,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14020 .L1047: 2590:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 14021 .loc 1 2590 5 discriminator 6 view .LVU4083 - ARM GAS /tmp/ccGFzgX3.s page 445 + ARM GAS /tmp/ccfdMfFA.s page 445 14022 00c8 0123 movs r3, #1 @@ -26698,7 +26698,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2596:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** 14064 .loc 1 2596 1 view .LVU4096 14065 .cfi_endproc - ARM GAS /tmp/ccGFzgX3.s page 446 + ARM GAS /tmp/ccfdMfFA.s page 446 14066 .LFE180: @@ -26758,7 +26758,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14110 .loc 1 2796 3 is_stmt 1 view .LVU4108 2799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) 14111 .loc 1 2799 3 view .LVU4109 - ARM GAS /tmp/ccGFzgX3.s page 447 + ARM GAS /tmp/ccfdMfFA.s page 447 2799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) @@ -26818,7 +26818,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14153 0050 2068 ldr r0, [r4] 14154 0052 FFF7FEFF bl TIM_CCxChannelCmd 14155 .LVL1004: - ARM GAS /tmp/ccGFzgX3.s page 448 + ARM GAS /tmp/ccfdMfFA.s page 448 2825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -26878,7 +26878,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14201 .section .text.HAL_TIM_OnePulse_Stop,"ax",%progbits 14202 .align 1 14203 .global HAL_TIM_OnePulse_Stop - ARM GAS /tmp/ccGFzgX3.s page 449 + ARM GAS /tmp/ccfdMfFA.s page 449 14204 .syntax unified @@ -26938,7 +26938,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2862:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 14249 .loc 1 2862 5 is_stmt 1 view .LVU4143 2862:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 450 + ARM GAS /tmp/ccfdMfFA.s page 450 14250 .loc 1 2862 5 view .LVU4144 @@ -26998,7 +26998,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14292 006e 84F84530 strb r3, [r4, #69] 2875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 14293 .loc 1 2875 3 view .LVU4157 - ARM GAS /tmp/ccGFzgX3.s page 451 + ARM GAS /tmp/ccfdMfFA.s page 451 2876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -27058,7 +27058,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14340 .loc 1 2892 3 is_stmt 1 view .LVU4167 2892:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA 14341 .loc 1 2892 31 is_stmt 0 view .LVU4168 - ARM GAS /tmp/ccGFzgX3.s page 452 + ARM GAS /tmp/ccfdMfFA.s page 452 14342 0010 90F84430 ldrb r3, [r0, #68] @ zero_extendqisi2 @@ -27118,7 +27118,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14382 0046 43F00203 orr r3, r3, #2 14383 004a D360 str r3, [r2, #12] 2926:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 453 + ARM GAS /tmp/ccfdMfFA.s page 453 14384 .loc 1 2926 3 is_stmt 1 view .LVU4183 @@ -27178,7 +27178,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 14428 .loc 1 2939 1 view .LVU4194 14429 0086 10BD pop {r4, pc} - ARM GAS /tmp/ccGFzgX3.s page 454 + ARM GAS /tmp/ccfdMfFA.s page 454 14430 .LVL1031: @@ -27238,7 +27238,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14478 000e 0268 ldr r2, [r0] 14479 0010 D368 ldr r3, [r2, #12] 14480 0012 23F00403 bic r3, r3, #4 - ARM GAS /tmp/ccGFzgX3.s page 455 + ARM GAS /tmp/ccfdMfFA.s page 455 14481 0016 D360 str r3, [r2, #12] @@ -27298,7 +27298,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 2973:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 14524 .loc 1 2973 5 discriminator 5 view .LVU4214 2977:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 456 + ARM GAS /tmp/ccfdMfFA.s page 456 14525 .loc 1 2977 3 view .LVU4215 @@ -27358,7 +27358,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14569 .syntax unified 14570 .thumb 14571 .thumb_func - ARM GAS /tmp/ccGFzgX3.s page 457 + ARM GAS /tmp/ccfdMfFA.s page 457 14573 HAL_TIM_Encoder_Start: @@ -27418,7 +27418,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14613 .loc 1 3238 5 is_stmt 1 view .LVU4240 3238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)) 14614 .loc 1 3238 8 is_stmt 0 view .LVU4241 - ARM GAS /tmp/ccGFzgX3.s page 458 + ARM GAS /tmp/ccfdMfFA.s page 458 14615 0020 0128 cmp r0, #1 @@ -27478,7 +27478,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14657 0052 14D0 beq .L1100 3264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) 14658 .loc 1 3264 5 is_stmt 1 view .LVU4254 - ARM GAS /tmp/ccGFzgX3.s page 459 + ARM GAS /tmp/ccfdMfFA.s page 459 3264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) @@ -27538,7 +27538,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 14700 .loc 1 3259 7 is_stmt 1 view .LVU4268 14701 008e 84F84530 strb r3, [r4, #69] - ARM GAS /tmp/ccGFzgX3.s page 460 + ARM GAS /tmp/ccfdMfFA.s page 460 14702 0092 CEE7 b .L1088 @@ -27598,7 +27598,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 14744 .loc 1 3241 14 is_stmt 0 view .LVU4281 14745 00b8 0120 movs r0, #1 - ARM GAS /tmp/ccGFzgX3.s page 461 + ARM GAS /tmp/ccfdMfFA.s page 461 14746 .LVL1066: @@ -27658,7 +27658,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14793 .cfi_offset 5, -8 14794 .cfi_offset 14, -4 14795 0002 0446 mov r4, r0 - ARM GAS /tmp/ccGFzgX3.s page 462 + ARM GAS /tmp/ccfdMfFA.s page 462 3322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -27718,7 +27718,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14837 002e 196A ldr r1, [r3, #32] 14838 0030 41F21112 movw r2, #4369 14839 0034 1142 tst r1, r2 - ARM GAS /tmp/ccGFzgX3.s page 463 + ARM GAS /tmp/ccfdMfFA.s page 463 14840 0036 08D1 bne .L1106 @@ -27778,7 +27778,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break; 14887 .loc 1 3336 7 is_stmt 0 view .LVU4311 14888 0070 0068 ldr r0, [r0] - ARM GAS /tmp/ccGFzgX3.s page 464 + ARM GAS /tmp/ccfdMfFA.s page 464 14889 .LVL1084: @@ -27838,7 +27838,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14930 00a6 84F84130 strb r3, [r4, #65] 3355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 14931 .loc 1 3355 5 is_stmt 1 view .LVU4325 - ARM GAS /tmp/ccGFzgX3.s page 465 + ARM GAS /tmp/ccfdMfFA.s page 465 14932 00aa EFE7 b .L1116 @@ -27898,7 +27898,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 14973 .cfi_endproc 14974 .LFE194: 14976 .section .text.HAL_TIM_Encoder_Start_IT,"ax",%progbits - ARM GAS /tmp/ccGFzgX3.s page 466 + ARM GAS /tmp/ccfdMfFA.s page 466 14977 .align 1 @@ -27958,7 +27958,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 15020 .loc 1 3390 6 is_stmt 0 view .LVU4351 15021 001c 0D46 mov r5, r1 - ARM GAS /tmp/ccGFzgX3.s page 467 + ARM GAS /tmp/ccfdMfFA.s page 467 15022 001e 09BB cbnz r1, .L1125 @@ -28018,7 +28018,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15064 .loc 1 3457 7 view .LVU4363 15065 0058 2268 ldr r2, [r4] 15066 005a D368 ldr r3, [r2, #12] - ARM GAS /tmp/ccGFzgX3.s page 468 + ARM GAS /tmp/ccfdMfFA.s page 468 15067 005c 43F00403 orr r3, r3, #4 @@ -28078,7 +28078,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15107 0090 84F84530 strb r3, [r4, #69] 15108 0094 CDE7 b .L1127 15109 .LVL1101: - ARM GAS /tmp/ccGFzgX3.s page 469 + ARM GAS /tmp/ccfdMfFA.s page 469 15110 .L1139: @@ -28138,7 +28138,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15151 00ca 0020 movs r0, #0 15152 .L1126: 3467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** - ARM GAS /tmp/ccGFzgX3.s page 470 + ARM GAS /tmp/ccfdMfFA.s page 470 15153 .loc 1 3467 1 view .LVU4391 @@ -28198,7 +28198,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15196 .L1136: 3423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 15197 .loc 1 3423 14 view .LVU4403 - ARM GAS /tmp/ccGFzgX3.s page 471 + ARM GAS /tmp/ccfdMfFA.s page 471 15198 00f0 0120 movs r0, #1 @@ -28258,7 +28258,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15244 .LVL1121: 3502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); 15245 .loc 1 3502 5 view .LVU4414 - ARM GAS /tmp/ccGFzgX3.s page 472 + ARM GAS /tmp/ccfdMfFA.s page 472 15246 0014 FFF7FEFF bl TIM_CCxChannelCmd @@ -28318,7 +28318,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15289 .loc 1 3516 5 is_stmt 1 view .LVU4425 15290 005c 102D cmp r5, #16 15291 005e 3ED8 bhi .L1146 - ARM GAS /tmp/ccGFzgX3.s page 473 + ARM GAS /tmp/ccfdMfFA.s page 473 15292 0060 DFE805F0 tbb [pc, r5] @@ -28378,7 +28378,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15339 .loc 1 3495 5 view .LVU4432 15340 0092 FFF7FEFF bl TIM_CCxChannelCmd 15341 .LVL1131: - ARM GAS /tmp/ccGFzgX3.s page 474 + ARM GAS /tmp/ccfdMfFA.s page 474 3498:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -28438,7 +28438,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 15384 .loc 1 3517 5 is_stmt 1 view .LVU4445 15385 00d4 EFE7 b .L1154 - ARM GAS /tmp/ccGFzgX3.s page 475 + ARM GAS /tmp/ccfdMfFA.s page 475 15386 .L1147: @@ -28498,7 +28498,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15427 .LFE196: 15429 .section .text.HAL_TIM_Encoder_Start_DMA,"ax",%progbits 15430 .align 1 - ARM GAS /tmp/ccGFzgX3.s page 476 + ARM GAS /tmp/ccfdMfFA.s page 476 15431 .global HAL_TIM_Encoder_Start_DMA @@ -28558,7 +28558,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15475 .LVL1137: 3553:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 15476 .loc 1 3553 3 is_stmt 1 view .LVU4470 - ARM GAS /tmp/ccGFzgX3.s page 477 + ARM GAS /tmp/ccfdMfFA.s page 477 3556:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { @@ -28618,7 +28618,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15516 .loc 1 3698 52 view .LVU4485 15517 005c 7849 ldr r1, .L1194 15518 005e D963 str r1, [r3, #60] - ARM GAS /tmp/ccGFzgX3.s page 478 + ARM GAS /tmp/ccfdMfFA.s page 478 3699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -28678,7 +28678,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3581:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 15557 .loc 1 3581 11 is_stmt 0 view .LVU4502 15558 0088 0429 cmp r1, #4 - ARM GAS /tmp/ccGFzgX3.s page 479 + ARM GAS /tmp/ccfdMfFA.s page 479 15559 008a 33D0 beq .L1190 @@ -28738,7 +28738,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15601 00d6 00F0AE80 beq .L1181 3620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { 15602 .loc 1 3620 52 discriminator 1 view .LVU4515 - ARM GAS /tmp/ccGFzgX3.s page 480 + ARM GAS /tmp/ccfdMfFA.s page 480 15603 00da 002E cmp r6, #0 @@ -28798,7 +28798,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15643 0120 96E7 b .L1166 15644 .LVL1148: 15645 .L1168: - ARM GAS /tmp/ccGFzgX3.s page 481 + ARM GAS /tmp/ccfdMfFA.s page 481 3643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; @@ -28858,7 +28858,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 15684 .loc 1 3657 7 is_stmt 1 view .LVU4546 15685 0148 2268 ldr r2, [r4] - ARM GAS /tmp/ccGFzgX3.s page 482 + ARM GAS /tmp/ccfdMfFA.s page 482 15686 014a D368 ldr r3, [r2, #12] @@ -28918,7 +28918,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15725 .loc 1 3677 71 is_stmt 0 view .LVU4561 15726 017a 2168 ldr r1, [r4] 3677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Length) != HAL_OK) - ARM GAS /tmp/ccGFzgX3.s page 483 + ARM GAS /tmp/ccfdMfFA.s page 483 15727 .loc 1 3677 11 view .LVU4562 @@ -28978,7 +28978,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15770 01b4 DA63 str r2, [r3, #60] 3714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 15771 .loc 1 3714 7 is_stmt 1 view .LVU4574 - ARM GAS /tmp/ccGFzgX3.s page 484 + ARM GAS /tmp/ccfdMfFA.s page 484 3714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -29038,7 +29038,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15812 .loc 1 3733 7 view .LVU4588 15813 01ec 0122 movs r2, #1 15814 01ee 0021 movs r1, #0 - ARM GAS /tmp/ccGFzgX3.s page 485 + ARM GAS /tmp/ccfdMfFA.s page 485 15815 01f0 2068 ldr r0, [r4] @@ -29098,7 +29098,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3586:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } 15859 .loc 1 3586 14 view .LVU4599 15860 021c F9E7 b .L1165 - ARM GAS /tmp/ccGFzgX3.s page 486 + ARM GAS /tmp/ccfdMfFA.s page 486 15861 .LVL1172: @@ -29158,7 +29158,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15903 .LVL1184: 15904 .L1181: 3622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 487 + ARM GAS /tmp/ccfdMfFA.s page 487 15905 .loc 1 3622 16 view .LVU4612 @@ -29218,7 +29218,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 15953 0006 0029 cmp r1, #0 15954 0008 3BD0 beq .L1215 3772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** { - ARM GAS /tmp/ccGFzgX3.s page 488 + ARM GAS /tmp/ccfdMfFA.s page 488 15955 .loc 1 3772 8 is_stmt 1 view .LVU4621 @@ -29278,7 +29278,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** 15997 .loc 1 3793 3 view .LVU4634 15998 0042 2368 ldr r3, [r4] - ARM GAS /tmp/ccGFzgX3.s page 489 + ARM GAS /tmp/ccfdMfFA.s page 489 15999 0044 196A ldr r1, [r3, #32] @@ -29338,7 +29338,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 16046 0082 0022 movs r2, #0 16047 0084 1146 mov r1, r2 16048 .LVL1196: - ARM GAS /tmp/ccGFzgX3.s page 490 + ARM GAS /tmp/ccfdMfFA.s page 490 3766:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @@ -29398,7 +29398,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 16091 00ba 0123 movs r3, #1 16092 00bc 84F83E30 strb r3, [r4, #62] 3799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } - ARM GAS /tmp/ccGFzgX3.s page 491 + ARM GAS /tmp/ccfdMfFA.s page 491 16093 .loc 1 3799 5 is_stmt 1 view .LVU4654 @@ -29458,7 +29458,7 @@ ARM GAS /tmp/ccGFzgX3.s page 1 16134 .loc 1 3798 5 is_stmt 0 discriminator 13 view .LVU4667 16135 00f6 0123 movs r3, #1 16136 00f8 84F84330 strb r3, [r4, #67] - ARM GAS /tmp/ccGFzgX3.s page 492 + ARM GAS /tmp/ccfdMfFA.s page 492 3799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** } @@ -29512,455 +29512,455 @@ ARM GAS /tmp/ccGFzgX3.s page 1 16176 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" 16177 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" 16178 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" - ARM GAS /tmp/ccGFzgX3.s page 493 + ARM GAS /tmp/ccfdMfFA.s page 493 DEFINED SYMBOLS *ABS*:00000000 stm32f7xx_hal_tim.c - /tmp/ccGFzgX3.s:20 .text.TIM_OC1_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:25 .text.TIM_OC1_SetConfig:00000000 TIM_OC1_SetConfig - /tmp/ccGFzgX3.s:163 .text.TIM_OC1_SetConfig:0000005c $d - /tmp/ccGFzgX3.s:170 .text.TIM_OC3_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:175 .text.TIM_OC3_SetConfig:00000000 TIM_OC3_SetConfig - /tmp/ccGFzgX3.s:313 .text.TIM_OC3_SetConfig:00000064 $d - /tmp/ccGFzgX3.s:320 .text.TIM_OC4_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:325 .text.TIM_OC4_SetConfig:00000000 TIM_OC4_SetConfig - /tmp/ccGFzgX3.s:432 .text.TIM_OC4_SetConfig:00000048 $d - /tmp/ccGFzgX3.s:439 .text.TIM_OC5_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:444 .text.TIM_OC5_SetConfig:00000000 TIM_OC5_SetConfig - /tmp/ccGFzgX3.s:549 .text.TIM_OC5_SetConfig:00000048 $d - /tmp/ccGFzgX3.s:556 .text.TIM_OC6_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:561 .text.TIM_OC6_SetConfig:00000000 TIM_OC6_SetConfig - /tmp/ccGFzgX3.s:666 .text.TIM_OC6_SetConfig:00000048 $d - /tmp/ccGFzgX3.s:673 .text.TIM_TI1_ConfigInputStage:00000000 $t - /tmp/ccGFzgX3.s:678 .text.TIM_TI1_ConfigInputStage:00000000 TIM_TI1_ConfigInputStage - /tmp/ccGFzgX3.s:739 .text.TIM_TI2_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:744 .text.TIM_TI2_SetConfig:00000000 TIM_TI2_SetConfig - /tmp/ccGFzgX3.s:825 .text.TIM_TI2_ConfigInputStage:00000000 $t - /tmp/ccGFzgX3.s:830 .text.TIM_TI2_ConfigInputStage:00000000 TIM_TI2_ConfigInputStage - /tmp/ccGFzgX3.s:891 .text.TIM_TI3_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:896 .text.TIM_TI3_SetConfig:00000000 TIM_TI3_SetConfig - /tmp/ccGFzgX3.s:977 .text.TIM_TI4_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:982 .text.TIM_TI4_SetConfig:00000000 TIM_TI4_SetConfig - /tmp/ccGFzgX3.s:1063 .text.TIM_ITRx_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:1068 .text.TIM_ITRx_SetConfig:00000000 TIM_ITRx_SetConfig - /tmp/ccGFzgX3.s:1101 .text.HAL_TIM_Base_MspInit:00000000 $t - /tmp/ccGFzgX3.s:1107 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit - /tmp/ccGFzgX3.s:1122 .text.HAL_TIM_Base_MspDeInit:00000000 $t - /tmp/ccGFzgX3.s:1128 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit - /tmp/ccGFzgX3.s:1143 .text.HAL_TIM_Base_DeInit:00000000 $t - /tmp/ccGFzgX3.s:1149 .text.HAL_TIM_Base_DeInit:00000000 HAL_TIM_Base_DeInit - /tmp/ccGFzgX3.s:1235 .text.HAL_TIM_Base_Start:00000000 $t - /tmp/ccGFzgX3.s:1241 .text.HAL_TIM_Base_Start:00000000 HAL_TIM_Base_Start - /tmp/ccGFzgX3.s:1347 .text.HAL_TIM_Base_Start:00000080 $d - /tmp/ccGFzgX3.s:1353 .text.HAL_TIM_Base_Stop:00000000 $t - /tmp/ccGFzgX3.s:1359 .text.HAL_TIM_Base_Stop:00000000 HAL_TIM_Base_Stop - /tmp/ccGFzgX3.s:1400 .text.HAL_TIM_Base_Start_IT:00000000 $t - /tmp/ccGFzgX3.s:1406 .text.HAL_TIM_Base_Start_IT:00000000 HAL_TIM_Base_Start_IT - /tmp/ccGFzgX3.s:1517 .text.HAL_TIM_Base_Start_IT:00000088 $d - /tmp/ccGFzgX3.s:1523 .text.HAL_TIM_Base_Stop_IT:00000000 $t - /tmp/ccGFzgX3.s:1529 .text.HAL_TIM_Base_Stop_IT:00000000 HAL_TIM_Base_Stop_IT - /tmp/ccGFzgX3.s:1575 .text.HAL_TIM_Base_Start_DMA:00000000 $t - /tmp/ccGFzgX3.s:1581 .text.HAL_TIM_Base_Start_DMA:00000000 HAL_TIM_Base_Start_DMA - /tmp/ccGFzgX3.s:1743 .text.HAL_TIM_Base_Start_DMA:000000c8 $d - /tmp/ccGFzgX3.s:3832 .text.TIM_DMAPeriodElapsedCplt:00000000 TIM_DMAPeriodElapsedCplt - /tmp/ccGFzgX3.s:3896 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 TIM_DMAPeriodElapsedHalfCplt - /tmp/ccGFzgX3.s:4915 .text.TIM_DMAError:00000000 TIM_DMAError - /tmp/ccGFzgX3.s:1752 .text.HAL_TIM_Base_Stop_DMA:00000000 $t - /tmp/ccGFzgX3.s:1758 .text.HAL_TIM_Base_Stop_DMA:00000000 HAL_TIM_Base_Stop_DMA - /tmp/ccGFzgX3.s:1816 .text.HAL_TIM_OC_MspInit:00000000 $t - /tmp/ccGFzgX3.s:1822 .text.HAL_TIM_OC_MspInit:00000000 HAL_TIM_OC_MspInit - /tmp/ccGFzgX3.s:1837 .text.HAL_TIM_OC_MspDeInit:00000000 $t - /tmp/ccGFzgX3.s:1843 .text.HAL_TIM_OC_MspDeInit:00000000 HAL_TIM_OC_MspDeInit - ARM GAS /tmp/ccGFzgX3.s page 494 + /tmp/ccfdMfFA.s:20 .text.TIM_OC1_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:25 .text.TIM_OC1_SetConfig:00000000 TIM_OC1_SetConfig + /tmp/ccfdMfFA.s:163 .text.TIM_OC1_SetConfig:0000005c $d + /tmp/ccfdMfFA.s:170 .text.TIM_OC3_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:175 .text.TIM_OC3_SetConfig:00000000 TIM_OC3_SetConfig + /tmp/ccfdMfFA.s:313 .text.TIM_OC3_SetConfig:00000064 $d + /tmp/ccfdMfFA.s:320 .text.TIM_OC4_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:325 .text.TIM_OC4_SetConfig:00000000 TIM_OC4_SetConfig + /tmp/ccfdMfFA.s:432 .text.TIM_OC4_SetConfig:00000048 $d + /tmp/ccfdMfFA.s:439 .text.TIM_OC5_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:444 .text.TIM_OC5_SetConfig:00000000 TIM_OC5_SetConfig + /tmp/ccfdMfFA.s:549 .text.TIM_OC5_SetConfig:00000048 $d + /tmp/ccfdMfFA.s:556 .text.TIM_OC6_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:561 .text.TIM_OC6_SetConfig:00000000 TIM_OC6_SetConfig + /tmp/ccfdMfFA.s:666 .text.TIM_OC6_SetConfig:00000048 $d + /tmp/ccfdMfFA.s:673 .text.TIM_TI1_ConfigInputStage:00000000 $t + /tmp/ccfdMfFA.s:678 .text.TIM_TI1_ConfigInputStage:00000000 TIM_TI1_ConfigInputStage + /tmp/ccfdMfFA.s:739 .text.TIM_TI2_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:744 .text.TIM_TI2_SetConfig:00000000 TIM_TI2_SetConfig + /tmp/ccfdMfFA.s:825 .text.TIM_TI2_ConfigInputStage:00000000 $t + /tmp/ccfdMfFA.s:830 .text.TIM_TI2_ConfigInputStage:00000000 TIM_TI2_ConfigInputStage + /tmp/ccfdMfFA.s:891 .text.TIM_TI3_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:896 .text.TIM_TI3_SetConfig:00000000 TIM_TI3_SetConfig + /tmp/ccfdMfFA.s:977 .text.TIM_TI4_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:982 .text.TIM_TI4_SetConfig:00000000 TIM_TI4_SetConfig + /tmp/ccfdMfFA.s:1063 .text.TIM_ITRx_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:1068 .text.TIM_ITRx_SetConfig:00000000 TIM_ITRx_SetConfig + /tmp/ccfdMfFA.s:1101 .text.HAL_TIM_Base_MspInit:00000000 $t + /tmp/ccfdMfFA.s:1107 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit + /tmp/ccfdMfFA.s:1122 .text.HAL_TIM_Base_MspDeInit:00000000 $t + /tmp/ccfdMfFA.s:1128 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit + /tmp/ccfdMfFA.s:1143 .text.HAL_TIM_Base_DeInit:00000000 $t + /tmp/ccfdMfFA.s:1149 .text.HAL_TIM_Base_DeInit:00000000 HAL_TIM_Base_DeInit + /tmp/ccfdMfFA.s:1235 .text.HAL_TIM_Base_Start:00000000 $t + /tmp/ccfdMfFA.s:1241 .text.HAL_TIM_Base_Start:00000000 HAL_TIM_Base_Start + /tmp/ccfdMfFA.s:1347 .text.HAL_TIM_Base_Start:00000080 $d + /tmp/ccfdMfFA.s:1353 .text.HAL_TIM_Base_Stop:00000000 $t + /tmp/ccfdMfFA.s:1359 .text.HAL_TIM_Base_Stop:00000000 HAL_TIM_Base_Stop + /tmp/ccfdMfFA.s:1400 .text.HAL_TIM_Base_Start_IT:00000000 $t + /tmp/ccfdMfFA.s:1406 .text.HAL_TIM_Base_Start_IT:00000000 HAL_TIM_Base_Start_IT + /tmp/ccfdMfFA.s:1517 .text.HAL_TIM_Base_Start_IT:00000088 $d + /tmp/ccfdMfFA.s:1523 .text.HAL_TIM_Base_Stop_IT:00000000 $t + /tmp/ccfdMfFA.s:1529 .text.HAL_TIM_Base_Stop_IT:00000000 HAL_TIM_Base_Stop_IT + /tmp/ccfdMfFA.s:1575 .text.HAL_TIM_Base_Start_DMA:00000000 $t + /tmp/ccfdMfFA.s:1581 .text.HAL_TIM_Base_Start_DMA:00000000 HAL_TIM_Base_Start_DMA + /tmp/ccfdMfFA.s:1743 .text.HAL_TIM_Base_Start_DMA:000000c8 $d + /tmp/ccfdMfFA.s:3832 .text.TIM_DMAPeriodElapsedCplt:00000000 TIM_DMAPeriodElapsedCplt + /tmp/ccfdMfFA.s:3896 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 TIM_DMAPeriodElapsedHalfCplt + /tmp/ccfdMfFA.s:4915 .text.TIM_DMAError:00000000 TIM_DMAError + /tmp/ccfdMfFA.s:1752 .text.HAL_TIM_Base_Stop_DMA:00000000 $t + /tmp/ccfdMfFA.s:1758 .text.HAL_TIM_Base_Stop_DMA:00000000 HAL_TIM_Base_Stop_DMA + /tmp/ccfdMfFA.s:1816 .text.HAL_TIM_OC_MspInit:00000000 $t + /tmp/ccfdMfFA.s:1822 .text.HAL_TIM_OC_MspInit:00000000 HAL_TIM_OC_MspInit + /tmp/ccfdMfFA.s:1837 .text.HAL_TIM_OC_MspDeInit:00000000 $t + /tmp/ccfdMfFA.s:1843 .text.HAL_TIM_OC_MspDeInit:00000000 HAL_TIM_OC_MspDeInit + ARM GAS /tmp/ccfdMfFA.s page 494 - /tmp/ccGFzgX3.s:1858 .text.HAL_TIM_OC_DeInit:00000000 $t - /tmp/ccGFzgX3.s:1864 .text.HAL_TIM_OC_DeInit:00000000 HAL_TIM_OC_DeInit - /tmp/ccGFzgX3.s:1950 .text.HAL_TIM_PWM_MspInit:00000000 $t - /tmp/ccGFzgX3.s:1956 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit - /tmp/ccGFzgX3.s:1971 .text.HAL_TIM_PWM_MspDeInit:00000000 $t - /tmp/ccGFzgX3.s:1977 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit - /tmp/ccGFzgX3.s:1992 .text.HAL_TIM_PWM_DeInit:00000000 $t - /tmp/ccGFzgX3.s:1998 .text.HAL_TIM_PWM_DeInit:00000000 HAL_TIM_PWM_DeInit - /tmp/ccGFzgX3.s:2084 .text.HAL_TIM_IC_MspInit:00000000 $t - /tmp/ccGFzgX3.s:2090 .text.HAL_TIM_IC_MspInit:00000000 HAL_TIM_IC_MspInit - /tmp/ccGFzgX3.s:2105 .text.HAL_TIM_IC_MspDeInit:00000000 $t - /tmp/ccGFzgX3.s:2111 .text.HAL_TIM_IC_MspDeInit:00000000 HAL_TIM_IC_MspDeInit - /tmp/ccGFzgX3.s:2126 .text.HAL_TIM_IC_DeInit:00000000 $t - /tmp/ccGFzgX3.s:2132 .text.HAL_TIM_IC_DeInit:00000000 HAL_TIM_IC_DeInit - /tmp/ccGFzgX3.s:2218 .text.HAL_TIM_OnePulse_MspInit:00000000 $t - /tmp/ccGFzgX3.s:2224 .text.HAL_TIM_OnePulse_MspInit:00000000 HAL_TIM_OnePulse_MspInit - /tmp/ccGFzgX3.s:2239 .text.HAL_TIM_OnePulse_MspDeInit:00000000 $t - /tmp/ccGFzgX3.s:2245 .text.HAL_TIM_OnePulse_MspDeInit:00000000 HAL_TIM_OnePulse_MspDeInit - /tmp/ccGFzgX3.s:2260 .text.HAL_TIM_OnePulse_DeInit:00000000 $t - /tmp/ccGFzgX3.s:2266 .text.HAL_TIM_OnePulse_DeInit:00000000 HAL_TIM_OnePulse_DeInit - /tmp/ccGFzgX3.s:2336 .text.HAL_TIM_Encoder_MspInit:00000000 $t - /tmp/ccGFzgX3.s:2342 .text.HAL_TIM_Encoder_MspInit:00000000 HAL_TIM_Encoder_MspInit - /tmp/ccGFzgX3.s:2357 .text.HAL_TIM_Encoder_MspDeInit:00000000 $t - /tmp/ccGFzgX3.s:2363 .text.HAL_TIM_Encoder_MspDeInit:00000000 HAL_TIM_Encoder_MspDeInit - /tmp/ccGFzgX3.s:2378 .text.HAL_TIM_Encoder_DeInit:00000000 $t - /tmp/ccGFzgX3.s:2384 .text.HAL_TIM_Encoder_DeInit:00000000 HAL_TIM_Encoder_DeInit - /tmp/ccGFzgX3.s:2454 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 $t - /tmp/ccGFzgX3.s:2460 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 HAL_TIM_DMABurst_MultiWriteStart - /tmp/ccGFzgX3.s:2817 .text.HAL_TIM_DMABurst_MultiWriteStart:00000190 $d - /tmp/ccGFzgX3.s:4234 .text.TIM_DMADelayPulseCplt:00000000 TIM_DMADelayPulseCplt - /tmp/ccGFzgX3.s:4381 .text.TIM_DMADelayPulseHalfCplt:00000000 TIM_DMADelayPulseHalfCplt - /tmp/ccGFzgX3.s:4797 .text.TIM_DMATriggerCplt:00000000 TIM_DMATriggerCplt - /tmp/ccGFzgX3.s:4861 .text.TIM_DMATriggerHalfCplt:00000000 TIM_DMATriggerHalfCplt - /tmp/ccGFzgX3.s:2830 .text.HAL_TIM_DMABurst_WriteStart:00000000 $t - /tmp/ccGFzgX3.s:2836 .text.HAL_TIM_DMABurst_WriteStart:00000000 HAL_TIM_DMABurst_WriteStart - /tmp/ccGFzgX3.s:2876 .text.HAL_TIM_DMABurst_WriteStop:00000000 $t - /tmp/ccGFzgX3.s:2882 .text.HAL_TIM_DMABurst_WriteStop:00000000 HAL_TIM_DMABurst_WriteStop - /tmp/ccGFzgX3.s:3034 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 $t - /tmp/ccGFzgX3.s:3040 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 HAL_TIM_DMABurst_MultiReadStart - /tmp/ccGFzgX3.s:3397 .text.HAL_TIM_DMABurst_MultiReadStart:00000190 $d - /tmp/ccGFzgX3.s:3971 .text.TIM_DMACaptureCplt:00000000 TIM_DMACaptureCplt - /tmp/ccGFzgX3.s:4126 .text.TIM_DMACaptureHalfCplt:00000000 TIM_DMACaptureHalfCplt - /tmp/ccGFzgX3.s:3410 .text.HAL_TIM_DMABurst_ReadStart:00000000 $t - /tmp/ccGFzgX3.s:3416 .text.HAL_TIM_DMABurst_ReadStart:00000000 HAL_TIM_DMABurst_ReadStart - /tmp/ccGFzgX3.s:3456 .text.HAL_TIM_DMABurst_ReadStop:00000000 $t - /tmp/ccGFzgX3.s:3462 .text.HAL_TIM_DMABurst_ReadStop:00000000 HAL_TIM_DMABurst_ReadStop - /tmp/ccGFzgX3.s:3614 .text.HAL_TIM_GenerateEvent:00000000 $t - /tmp/ccGFzgX3.s:3620 .text.HAL_TIM_GenerateEvent:00000000 HAL_TIM_GenerateEvent - /tmp/ccGFzgX3.s:3673 .text.HAL_TIM_ConfigTI1Input:00000000 $t - /tmp/ccGFzgX3.s:3679 .text.HAL_TIM_ConfigTI1Input:00000000 HAL_TIM_ConfigTI1Input - /tmp/ccGFzgX3.s:3717 .text.HAL_TIM_ReadCapturedValue:00000000 $t - /tmp/ccGFzgX3.s:3723 .text.HAL_TIM_ReadCapturedValue:00000000 HAL_TIM_ReadCapturedValue - /tmp/ccGFzgX3.s:3737 .text.HAL_TIM_ReadCapturedValue:00000008 $d - /tmp/ccGFzgX3.s:3806 .text.HAL_TIM_PeriodElapsedCallback:00000000 $t - /tmp/ccGFzgX3.s:3812 .text.HAL_TIM_PeriodElapsedCallback:00000000 HAL_TIM_PeriodElapsedCallback - /tmp/ccGFzgX3.s:3827 .text.TIM_DMAPeriodElapsedCplt:00000000 $t - /tmp/ccGFzgX3.s:3870 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 $t - ARM GAS /tmp/ccGFzgX3.s page 495 + /tmp/ccfdMfFA.s:1858 .text.HAL_TIM_OC_DeInit:00000000 $t + /tmp/ccfdMfFA.s:1864 .text.HAL_TIM_OC_DeInit:00000000 HAL_TIM_OC_DeInit + /tmp/ccfdMfFA.s:1950 .text.HAL_TIM_PWM_MspInit:00000000 $t + /tmp/ccfdMfFA.s:1956 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit + /tmp/ccfdMfFA.s:1971 .text.HAL_TIM_PWM_MspDeInit:00000000 $t + /tmp/ccfdMfFA.s:1977 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit + /tmp/ccfdMfFA.s:1992 .text.HAL_TIM_PWM_DeInit:00000000 $t + /tmp/ccfdMfFA.s:1998 .text.HAL_TIM_PWM_DeInit:00000000 HAL_TIM_PWM_DeInit + /tmp/ccfdMfFA.s:2084 .text.HAL_TIM_IC_MspInit:00000000 $t + /tmp/ccfdMfFA.s:2090 .text.HAL_TIM_IC_MspInit:00000000 HAL_TIM_IC_MspInit + /tmp/ccfdMfFA.s:2105 .text.HAL_TIM_IC_MspDeInit:00000000 $t + /tmp/ccfdMfFA.s:2111 .text.HAL_TIM_IC_MspDeInit:00000000 HAL_TIM_IC_MspDeInit + /tmp/ccfdMfFA.s:2126 .text.HAL_TIM_IC_DeInit:00000000 $t + /tmp/ccfdMfFA.s:2132 .text.HAL_TIM_IC_DeInit:00000000 HAL_TIM_IC_DeInit + /tmp/ccfdMfFA.s:2218 .text.HAL_TIM_OnePulse_MspInit:00000000 $t + /tmp/ccfdMfFA.s:2224 .text.HAL_TIM_OnePulse_MspInit:00000000 HAL_TIM_OnePulse_MspInit + /tmp/ccfdMfFA.s:2239 .text.HAL_TIM_OnePulse_MspDeInit:00000000 $t + /tmp/ccfdMfFA.s:2245 .text.HAL_TIM_OnePulse_MspDeInit:00000000 HAL_TIM_OnePulse_MspDeInit + /tmp/ccfdMfFA.s:2260 .text.HAL_TIM_OnePulse_DeInit:00000000 $t + /tmp/ccfdMfFA.s:2266 .text.HAL_TIM_OnePulse_DeInit:00000000 HAL_TIM_OnePulse_DeInit + /tmp/ccfdMfFA.s:2336 .text.HAL_TIM_Encoder_MspInit:00000000 $t + /tmp/ccfdMfFA.s:2342 .text.HAL_TIM_Encoder_MspInit:00000000 HAL_TIM_Encoder_MspInit + /tmp/ccfdMfFA.s:2357 .text.HAL_TIM_Encoder_MspDeInit:00000000 $t + /tmp/ccfdMfFA.s:2363 .text.HAL_TIM_Encoder_MspDeInit:00000000 HAL_TIM_Encoder_MspDeInit + /tmp/ccfdMfFA.s:2378 .text.HAL_TIM_Encoder_DeInit:00000000 $t + /tmp/ccfdMfFA.s:2384 .text.HAL_TIM_Encoder_DeInit:00000000 HAL_TIM_Encoder_DeInit + /tmp/ccfdMfFA.s:2454 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 $t + /tmp/ccfdMfFA.s:2460 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 HAL_TIM_DMABurst_MultiWriteStart + /tmp/ccfdMfFA.s:2817 .text.HAL_TIM_DMABurst_MultiWriteStart:00000190 $d + /tmp/ccfdMfFA.s:4234 .text.TIM_DMADelayPulseCplt:00000000 TIM_DMADelayPulseCplt + /tmp/ccfdMfFA.s:4381 .text.TIM_DMADelayPulseHalfCplt:00000000 TIM_DMADelayPulseHalfCplt + /tmp/ccfdMfFA.s:4797 .text.TIM_DMATriggerCplt:00000000 TIM_DMATriggerCplt + /tmp/ccfdMfFA.s:4861 .text.TIM_DMATriggerHalfCplt:00000000 TIM_DMATriggerHalfCplt + /tmp/ccfdMfFA.s:2830 .text.HAL_TIM_DMABurst_WriteStart:00000000 $t + /tmp/ccfdMfFA.s:2836 .text.HAL_TIM_DMABurst_WriteStart:00000000 HAL_TIM_DMABurst_WriteStart + /tmp/ccfdMfFA.s:2876 .text.HAL_TIM_DMABurst_WriteStop:00000000 $t + /tmp/ccfdMfFA.s:2882 .text.HAL_TIM_DMABurst_WriteStop:00000000 HAL_TIM_DMABurst_WriteStop + /tmp/ccfdMfFA.s:3034 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 $t + /tmp/ccfdMfFA.s:3040 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 HAL_TIM_DMABurst_MultiReadStart + /tmp/ccfdMfFA.s:3397 .text.HAL_TIM_DMABurst_MultiReadStart:00000190 $d + /tmp/ccfdMfFA.s:3971 .text.TIM_DMACaptureCplt:00000000 TIM_DMACaptureCplt + /tmp/ccfdMfFA.s:4126 .text.TIM_DMACaptureHalfCplt:00000000 TIM_DMACaptureHalfCplt + /tmp/ccfdMfFA.s:3410 .text.HAL_TIM_DMABurst_ReadStart:00000000 $t + /tmp/ccfdMfFA.s:3416 .text.HAL_TIM_DMABurst_ReadStart:00000000 HAL_TIM_DMABurst_ReadStart + /tmp/ccfdMfFA.s:3456 .text.HAL_TIM_DMABurst_ReadStop:00000000 $t + /tmp/ccfdMfFA.s:3462 .text.HAL_TIM_DMABurst_ReadStop:00000000 HAL_TIM_DMABurst_ReadStop + /tmp/ccfdMfFA.s:3614 .text.HAL_TIM_GenerateEvent:00000000 $t + /tmp/ccfdMfFA.s:3620 .text.HAL_TIM_GenerateEvent:00000000 HAL_TIM_GenerateEvent + /tmp/ccfdMfFA.s:3673 .text.HAL_TIM_ConfigTI1Input:00000000 $t + /tmp/ccfdMfFA.s:3679 .text.HAL_TIM_ConfigTI1Input:00000000 HAL_TIM_ConfigTI1Input + /tmp/ccfdMfFA.s:3717 .text.HAL_TIM_ReadCapturedValue:00000000 $t + /tmp/ccfdMfFA.s:3723 .text.HAL_TIM_ReadCapturedValue:00000000 HAL_TIM_ReadCapturedValue + /tmp/ccfdMfFA.s:3737 .text.HAL_TIM_ReadCapturedValue:00000008 $d + /tmp/ccfdMfFA.s:3806 .text.HAL_TIM_PeriodElapsedCallback:00000000 $t + /tmp/ccfdMfFA.s:3812 .text.HAL_TIM_PeriodElapsedCallback:00000000 HAL_TIM_PeriodElapsedCallback + /tmp/ccfdMfFA.s:3827 .text.TIM_DMAPeriodElapsedCplt:00000000 $t + /tmp/ccfdMfFA.s:3870 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 $t + ARM GAS /tmp/ccfdMfFA.s page 495 - /tmp/ccGFzgX3.s:3876 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 HAL_TIM_PeriodElapsedHalfCpltCallback - /tmp/ccGFzgX3.s:3891 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 $t - /tmp/ccGFzgX3.s:3923 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 $t - /tmp/ccGFzgX3.s:3929 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 HAL_TIM_OC_DelayElapsedCallback - /tmp/ccGFzgX3.s:3944 .text.HAL_TIM_IC_CaptureCallback:00000000 $t - /tmp/ccGFzgX3.s:3950 .text.HAL_TIM_IC_CaptureCallback:00000000 HAL_TIM_IC_CaptureCallback - /tmp/ccGFzgX3.s:3965 .text.TIM_DMACaptureCplt:00000000 $t - /tmp/ccGFzgX3.s:4099 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 $t - /tmp/ccGFzgX3.s:4105 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 HAL_TIM_IC_CaptureHalfCpltCallback - /tmp/ccGFzgX3.s:4120 .text.TIM_DMACaptureHalfCplt:00000000 $t - /tmp/ccGFzgX3.s:4208 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 $t - /tmp/ccGFzgX3.s:4214 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 HAL_TIM_PWM_PulseFinishedCallback - /tmp/ccGFzgX3.s:4229 .text.TIM_DMADelayPulseCplt:00000000 $t - /tmp/ccGFzgX3.s:4354 .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback:00000000 $t - /tmp/ccGFzgX3.s:4360 .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback:00000000 HAL_TIM_PWM_PulseFinishedHalfCpltCallback - /tmp/ccGFzgX3.s:4375 .text.TIM_DMADelayPulseHalfCplt:00000000 $t - /tmp/ccGFzgX3.s:4463 .text.HAL_TIM_TriggerCallback:00000000 $t - /tmp/ccGFzgX3.s:4469 .text.HAL_TIM_TriggerCallback:00000000 HAL_TIM_TriggerCallback - /tmp/ccGFzgX3.s:4484 .text.HAL_TIM_IRQHandler:00000000 $t - /tmp/ccGFzgX3.s:4490 .text.HAL_TIM_IRQHandler:00000000 HAL_TIM_IRQHandler - /tmp/ccGFzgX3.s:4792 .text.TIM_DMATriggerCplt:00000000 $t - /tmp/ccGFzgX3.s:4835 .text.HAL_TIM_TriggerHalfCpltCallback:00000000 $t - /tmp/ccGFzgX3.s:4841 .text.HAL_TIM_TriggerHalfCpltCallback:00000000 HAL_TIM_TriggerHalfCpltCallback - /tmp/ccGFzgX3.s:4856 .text.TIM_DMATriggerHalfCplt:00000000 $t - /tmp/ccGFzgX3.s:4888 .text.HAL_TIM_ErrorCallback:00000000 $t - /tmp/ccGFzgX3.s:4894 .text.HAL_TIM_ErrorCallback:00000000 HAL_TIM_ErrorCallback - /tmp/ccGFzgX3.s:4909 .text.TIM_DMAError:00000000 $t - /tmp/ccGFzgX3.s:5013 .text.HAL_TIM_Base_GetState:00000000 $t - /tmp/ccGFzgX3.s:5019 .text.HAL_TIM_Base_GetState:00000000 HAL_TIM_Base_GetState - /tmp/ccGFzgX3.s:5037 .text.HAL_TIM_OC_GetState:00000000 $t - /tmp/ccGFzgX3.s:5043 .text.HAL_TIM_OC_GetState:00000000 HAL_TIM_OC_GetState - /tmp/ccGFzgX3.s:5061 .text.HAL_TIM_PWM_GetState:00000000 $t - /tmp/ccGFzgX3.s:5067 .text.HAL_TIM_PWM_GetState:00000000 HAL_TIM_PWM_GetState - /tmp/ccGFzgX3.s:5085 .text.HAL_TIM_IC_GetState:00000000 $t - /tmp/ccGFzgX3.s:5091 .text.HAL_TIM_IC_GetState:00000000 HAL_TIM_IC_GetState - /tmp/ccGFzgX3.s:5109 .text.HAL_TIM_OnePulse_GetState:00000000 $t - /tmp/ccGFzgX3.s:5115 .text.HAL_TIM_OnePulse_GetState:00000000 HAL_TIM_OnePulse_GetState - /tmp/ccGFzgX3.s:5133 .text.HAL_TIM_Encoder_GetState:00000000 $t - /tmp/ccGFzgX3.s:5139 .text.HAL_TIM_Encoder_GetState:00000000 HAL_TIM_Encoder_GetState - /tmp/ccGFzgX3.s:5157 .text.HAL_TIM_GetActiveChannel:00000000 $t - /tmp/ccGFzgX3.s:5163 .text.HAL_TIM_GetActiveChannel:00000000 HAL_TIM_GetActiveChannel - /tmp/ccGFzgX3.s:5181 .text.HAL_TIM_GetChannelState:00000000 $t - /tmp/ccGFzgX3.s:5187 .text.HAL_TIM_GetChannelState:00000000 HAL_TIM_GetChannelState - /tmp/ccGFzgX3.s:5202 .text.HAL_TIM_GetChannelState:00000008 $d - /tmp/ccGFzgX3.s:5274 .text.HAL_TIM_DMABurstState:00000000 $t - /tmp/ccGFzgX3.s:5280 .text.HAL_TIM_DMABurstState:00000000 HAL_TIM_DMABurstState - /tmp/ccGFzgX3.s:5299 .text.TIM_Base_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:5305 .text.TIM_Base_SetConfig:00000000 TIM_Base_SetConfig - /tmp/ccGFzgX3.s:5493 .text.TIM_Base_SetConfig:00000104 $d - /tmp/ccGFzgX3.s:5504 .text.HAL_TIM_Base_Init:00000000 $t - /tmp/ccGFzgX3.s:5510 .text.HAL_TIM_Base_Init:00000000 HAL_TIM_Base_Init - /tmp/ccGFzgX3.s:5611 .text.HAL_TIM_OC_Init:00000000 $t - /tmp/ccGFzgX3.s:5617 .text.HAL_TIM_OC_Init:00000000 HAL_TIM_OC_Init - /tmp/ccGFzgX3.s:5718 .text.HAL_TIM_PWM_Init:00000000 $t - /tmp/ccGFzgX3.s:5724 .text.HAL_TIM_PWM_Init:00000000 HAL_TIM_PWM_Init - /tmp/ccGFzgX3.s:5825 .text.HAL_TIM_IC_Init:00000000 $t - /tmp/ccGFzgX3.s:5831 .text.HAL_TIM_IC_Init:00000000 HAL_TIM_IC_Init - ARM GAS /tmp/ccGFzgX3.s page 496 + /tmp/ccfdMfFA.s:3876 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 HAL_TIM_PeriodElapsedHalfCpltCallback + /tmp/ccfdMfFA.s:3891 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 $t + /tmp/ccfdMfFA.s:3923 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 $t + /tmp/ccfdMfFA.s:3929 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 HAL_TIM_OC_DelayElapsedCallback + /tmp/ccfdMfFA.s:3944 .text.HAL_TIM_IC_CaptureCallback:00000000 $t + /tmp/ccfdMfFA.s:3950 .text.HAL_TIM_IC_CaptureCallback:00000000 HAL_TIM_IC_CaptureCallback + /tmp/ccfdMfFA.s:3965 .text.TIM_DMACaptureCplt:00000000 $t + /tmp/ccfdMfFA.s:4099 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 $t + /tmp/ccfdMfFA.s:4105 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 HAL_TIM_IC_CaptureHalfCpltCallback + /tmp/ccfdMfFA.s:4120 .text.TIM_DMACaptureHalfCplt:00000000 $t + /tmp/ccfdMfFA.s:4208 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 $t + /tmp/ccfdMfFA.s:4214 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 HAL_TIM_PWM_PulseFinishedCallback + /tmp/ccfdMfFA.s:4229 .text.TIM_DMADelayPulseCplt:00000000 $t + /tmp/ccfdMfFA.s:4354 .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback:00000000 $t + /tmp/ccfdMfFA.s:4360 .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback:00000000 HAL_TIM_PWM_PulseFinishedHalfCpltCallback + /tmp/ccfdMfFA.s:4375 .text.TIM_DMADelayPulseHalfCplt:00000000 $t + /tmp/ccfdMfFA.s:4463 .text.HAL_TIM_TriggerCallback:00000000 $t + /tmp/ccfdMfFA.s:4469 .text.HAL_TIM_TriggerCallback:00000000 HAL_TIM_TriggerCallback + /tmp/ccfdMfFA.s:4484 .text.HAL_TIM_IRQHandler:00000000 $t + /tmp/ccfdMfFA.s:4490 .text.HAL_TIM_IRQHandler:00000000 HAL_TIM_IRQHandler + /tmp/ccfdMfFA.s:4792 .text.TIM_DMATriggerCplt:00000000 $t + /tmp/ccfdMfFA.s:4835 .text.HAL_TIM_TriggerHalfCpltCallback:00000000 $t + /tmp/ccfdMfFA.s:4841 .text.HAL_TIM_TriggerHalfCpltCallback:00000000 HAL_TIM_TriggerHalfCpltCallback + /tmp/ccfdMfFA.s:4856 .text.TIM_DMATriggerHalfCplt:00000000 $t + /tmp/ccfdMfFA.s:4888 .text.HAL_TIM_ErrorCallback:00000000 $t + /tmp/ccfdMfFA.s:4894 .text.HAL_TIM_ErrorCallback:00000000 HAL_TIM_ErrorCallback + /tmp/ccfdMfFA.s:4909 .text.TIM_DMAError:00000000 $t + /tmp/ccfdMfFA.s:5013 .text.HAL_TIM_Base_GetState:00000000 $t + /tmp/ccfdMfFA.s:5019 .text.HAL_TIM_Base_GetState:00000000 HAL_TIM_Base_GetState + /tmp/ccfdMfFA.s:5037 .text.HAL_TIM_OC_GetState:00000000 $t + /tmp/ccfdMfFA.s:5043 .text.HAL_TIM_OC_GetState:00000000 HAL_TIM_OC_GetState + /tmp/ccfdMfFA.s:5061 .text.HAL_TIM_PWM_GetState:00000000 $t + /tmp/ccfdMfFA.s:5067 .text.HAL_TIM_PWM_GetState:00000000 HAL_TIM_PWM_GetState + /tmp/ccfdMfFA.s:5085 .text.HAL_TIM_IC_GetState:00000000 $t + /tmp/ccfdMfFA.s:5091 .text.HAL_TIM_IC_GetState:00000000 HAL_TIM_IC_GetState + /tmp/ccfdMfFA.s:5109 .text.HAL_TIM_OnePulse_GetState:00000000 $t + /tmp/ccfdMfFA.s:5115 .text.HAL_TIM_OnePulse_GetState:00000000 HAL_TIM_OnePulse_GetState + /tmp/ccfdMfFA.s:5133 .text.HAL_TIM_Encoder_GetState:00000000 $t + /tmp/ccfdMfFA.s:5139 .text.HAL_TIM_Encoder_GetState:00000000 HAL_TIM_Encoder_GetState + /tmp/ccfdMfFA.s:5157 .text.HAL_TIM_GetActiveChannel:00000000 $t + /tmp/ccfdMfFA.s:5163 .text.HAL_TIM_GetActiveChannel:00000000 HAL_TIM_GetActiveChannel + /tmp/ccfdMfFA.s:5181 .text.HAL_TIM_GetChannelState:00000000 $t + /tmp/ccfdMfFA.s:5187 .text.HAL_TIM_GetChannelState:00000000 HAL_TIM_GetChannelState + /tmp/ccfdMfFA.s:5202 .text.HAL_TIM_GetChannelState:00000008 $d + /tmp/ccfdMfFA.s:5274 .text.HAL_TIM_DMABurstState:00000000 $t + /tmp/ccfdMfFA.s:5280 .text.HAL_TIM_DMABurstState:00000000 HAL_TIM_DMABurstState + /tmp/ccfdMfFA.s:5299 .text.TIM_Base_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:5305 .text.TIM_Base_SetConfig:00000000 TIM_Base_SetConfig + /tmp/ccfdMfFA.s:5493 .text.TIM_Base_SetConfig:00000104 $d + /tmp/ccfdMfFA.s:5504 .text.HAL_TIM_Base_Init:00000000 $t + /tmp/ccfdMfFA.s:5510 .text.HAL_TIM_Base_Init:00000000 HAL_TIM_Base_Init + /tmp/ccfdMfFA.s:5611 .text.HAL_TIM_OC_Init:00000000 $t + /tmp/ccfdMfFA.s:5617 .text.HAL_TIM_OC_Init:00000000 HAL_TIM_OC_Init + /tmp/ccfdMfFA.s:5718 .text.HAL_TIM_PWM_Init:00000000 $t + /tmp/ccfdMfFA.s:5724 .text.HAL_TIM_PWM_Init:00000000 HAL_TIM_PWM_Init + /tmp/ccfdMfFA.s:5825 .text.HAL_TIM_IC_Init:00000000 $t + /tmp/ccfdMfFA.s:5831 .text.HAL_TIM_IC_Init:00000000 HAL_TIM_IC_Init + ARM GAS /tmp/ccfdMfFA.s page 496 - /tmp/ccGFzgX3.s:5932 .text.HAL_TIM_OnePulse_Init:00000000 $t - /tmp/ccGFzgX3.s:5938 .text.HAL_TIM_OnePulse_Init:00000000 HAL_TIM_OnePulse_Init - /tmp/ccGFzgX3.s:6045 .text.HAL_TIM_Encoder_Init:00000000 $t - /tmp/ccGFzgX3.s:6051 .text.HAL_TIM_Encoder_Init:00000000 HAL_TIM_Encoder_Init - /tmp/ccGFzgX3.s:6259 .text.HAL_TIM_Encoder_Init:000000a4 $d - /tmp/ccGFzgX3.s:6266 .text.TIM_OC2_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:6272 .text.TIM_OC2_SetConfig:00000000 TIM_OC2_SetConfig - /tmp/ccGFzgX3.s:6410 .text.TIM_OC2_SetConfig:00000064 $d - /tmp/ccGFzgX3.s:6417 .text.HAL_TIM_OC_ConfigChannel:00000000 $t - /tmp/ccGFzgX3.s:6423 .text.HAL_TIM_OC_ConfigChannel:00000000 HAL_TIM_OC_ConfigChannel - /tmp/ccGFzgX3.s:6455 .text.HAL_TIM_OC_ConfigChannel:0000001a $d - /tmp/ccGFzgX3.s:6589 .text.HAL_TIM_PWM_ConfigChannel:00000000 $t - /tmp/ccGFzgX3.s:6595 .text.HAL_TIM_PWM_ConfigChannel:00000000 HAL_TIM_PWM_ConfigChannel - /tmp/ccGFzgX3.s:6632 .text.HAL_TIM_PWM_ConfigChannel:00000020 $d - /tmp/ccGFzgX3.s:6920 .text.TIM_TI1_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:6926 .text.TIM_TI1_SetConfig:00000000 TIM_TI1_SetConfig - /tmp/ccGFzgX3.s:7056 .text.TIM_TI1_SetConfig:00000088 $d - /tmp/ccGFzgX3.s:7063 .text.HAL_TIM_IC_ConfigChannel:00000000 $t - /tmp/ccGFzgX3.s:7069 .text.HAL_TIM_IC_ConfigChannel:00000000 HAL_TIM_IC_ConfigChannel - /tmp/ccGFzgX3.s:7107 .text.HAL_TIM_IC_ConfigChannel:0000001c $d - /tmp/ccGFzgX3.s:7294 .text.HAL_TIM_OnePulse_ConfigChannel:00000000 $t - /tmp/ccGFzgX3.s:7300 .text.HAL_TIM_OnePulse_ConfigChannel:00000000 HAL_TIM_OnePulse_ConfigChannel - /tmp/ccGFzgX3.s:7573 .text.HAL_TIM_OnePulse_ConfigChannel:000000fc $d - /tmp/ccGFzgX3.s:7578 .text.TIM_ETR_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:7584 .text.TIM_ETR_SetConfig:00000000 TIM_ETR_SetConfig - /tmp/ccGFzgX3.s:7628 .text.HAL_TIM_ConfigOCrefClear:00000000 $t - /tmp/ccGFzgX3.s:7634 .text.HAL_TIM_ConfigOCrefClear:00000000 HAL_TIM_ConfigOCrefClear - /tmp/ccGFzgX3.s:7709 .text.HAL_TIM_ConfigOCrefClear:00000048 $d - /tmp/ccGFzgX3.s:7918 .text.HAL_TIM_ConfigClockSource:00000000 $t - /tmp/ccGFzgX3.s:7924 .text.HAL_TIM_ConfigClockSource:00000000 HAL_TIM_ConfigClockSource - /tmp/ccGFzgX3.s:8210 .text.HAL_TIM_ConfigClockSource:000000fc $d - /tmp/ccGFzgX3.s:8215 .text.TIM_SlaveTimer_SetConfig:00000000 $t - /tmp/ccGFzgX3.s:8220 .text.TIM_SlaveTimer_SetConfig:00000000 TIM_SlaveTimer_SetConfig - /tmp/ccGFzgX3.s:8474 .text.TIM_SlaveTimer_SetConfig:000000b8 $d - /tmp/ccGFzgX3.s:8479 .text.HAL_TIM_SlaveConfigSynchro:00000000 $t - /tmp/ccGFzgX3.s:8485 .text.HAL_TIM_SlaveConfigSynchro:00000000 HAL_TIM_SlaveConfigSynchro - /tmp/ccGFzgX3.s:8573 .text.HAL_TIM_SlaveConfigSynchro_IT:00000000 $t - /tmp/ccGFzgX3.s:8579 .text.HAL_TIM_SlaveConfigSynchro_IT:00000000 HAL_TIM_SlaveConfigSynchro_IT - /tmp/ccGFzgX3.s:8667 .text.TIM_CCxChannelCmd:00000000 $t - /tmp/ccGFzgX3.s:8673 .text.TIM_CCxChannelCmd:00000000 TIM_CCxChannelCmd - /tmp/ccGFzgX3.s:8713 .text.HAL_TIM_OC_Start:00000000 $t - /tmp/ccGFzgX3.s:8719 .text.HAL_TIM_OC_Start:00000000 HAL_TIM_OC_Start - /tmp/ccGFzgX3.s:8740 .text.HAL_TIM_OC_Start:0000000c $d - /tmp/ccGFzgX3.s:8775 .text.HAL_TIM_OC_Start:00000038 $d - /tmp/ccGFzgX3.s:8971 .text.HAL_TIM_OC_Start:0000014c $d - /tmp/ccGFzgX3.s:8978 .text.HAL_TIM_OC_Stop:00000000 $t - /tmp/ccGFzgX3.s:8984 .text.HAL_TIM_OC_Stop:00000000 HAL_TIM_OC_Stop - /tmp/ccGFzgX3.s:9059 .text.HAL_TIM_OC_Stop:0000005e $d - /tmp/ccGFzgX3.s:9115 .text.HAL_TIM_OC_Stop:000000a4 $d - /tmp/ccGFzgX3.s:9121 .text.HAL_TIM_OC_Start_IT:00000000 $t - /tmp/ccGFzgX3.s:9127 .text.HAL_TIM_OC_Start_IT:00000000 HAL_TIM_OC_Start_IT - /tmp/ccGFzgX3.s:9150 .text.HAL_TIM_OC_Start_IT:0000000c $d - /tmp/ccGFzgX3.s:9185 .text.HAL_TIM_OC_Start_IT:0000003a $d - /tmp/ccGFzgX3.s:9388 .text.HAL_TIM_OC_Start_IT:0000015c $d - /tmp/ccGFzgX3.s:9402 .text.HAL_TIM_OC_Start_IT:00000190 $t - /tmp/ccGFzgX3.s:9448 .text.HAL_TIM_OC_Start_IT:000001b8 $d - /tmp/ccGFzgX3.s:9455 .text.HAL_TIM_OC_Stop_IT:00000000 $t - ARM GAS /tmp/ccGFzgX3.s page 497 + /tmp/ccfdMfFA.s:5932 .text.HAL_TIM_OnePulse_Init:00000000 $t + /tmp/ccfdMfFA.s:5938 .text.HAL_TIM_OnePulse_Init:00000000 HAL_TIM_OnePulse_Init + /tmp/ccfdMfFA.s:6045 .text.HAL_TIM_Encoder_Init:00000000 $t + /tmp/ccfdMfFA.s:6051 .text.HAL_TIM_Encoder_Init:00000000 HAL_TIM_Encoder_Init + /tmp/ccfdMfFA.s:6259 .text.HAL_TIM_Encoder_Init:000000a4 $d + /tmp/ccfdMfFA.s:6266 .text.TIM_OC2_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:6272 .text.TIM_OC2_SetConfig:00000000 TIM_OC2_SetConfig + /tmp/ccfdMfFA.s:6410 .text.TIM_OC2_SetConfig:00000064 $d + /tmp/ccfdMfFA.s:6417 .text.HAL_TIM_OC_ConfigChannel:00000000 $t + /tmp/ccfdMfFA.s:6423 .text.HAL_TIM_OC_ConfigChannel:00000000 HAL_TIM_OC_ConfigChannel + /tmp/ccfdMfFA.s:6455 .text.HAL_TIM_OC_ConfigChannel:0000001a $d + /tmp/ccfdMfFA.s:6589 .text.HAL_TIM_PWM_ConfigChannel:00000000 $t + /tmp/ccfdMfFA.s:6595 .text.HAL_TIM_PWM_ConfigChannel:00000000 HAL_TIM_PWM_ConfigChannel + /tmp/ccfdMfFA.s:6632 .text.HAL_TIM_PWM_ConfigChannel:00000020 $d + /tmp/ccfdMfFA.s:6920 .text.TIM_TI1_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:6926 .text.TIM_TI1_SetConfig:00000000 TIM_TI1_SetConfig + /tmp/ccfdMfFA.s:7056 .text.TIM_TI1_SetConfig:00000088 $d + /tmp/ccfdMfFA.s:7063 .text.HAL_TIM_IC_ConfigChannel:00000000 $t + /tmp/ccfdMfFA.s:7069 .text.HAL_TIM_IC_ConfigChannel:00000000 HAL_TIM_IC_ConfigChannel + /tmp/ccfdMfFA.s:7107 .text.HAL_TIM_IC_ConfigChannel:0000001c $d + /tmp/ccfdMfFA.s:7294 .text.HAL_TIM_OnePulse_ConfigChannel:00000000 $t + /tmp/ccfdMfFA.s:7300 .text.HAL_TIM_OnePulse_ConfigChannel:00000000 HAL_TIM_OnePulse_ConfigChannel + /tmp/ccfdMfFA.s:7573 .text.HAL_TIM_OnePulse_ConfigChannel:000000fc $d + /tmp/ccfdMfFA.s:7578 .text.TIM_ETR_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:7584 .text.TIM_ETR_SetConfig:00000000 TIM_ETR_SetConfig + /tmp/ccfdMfFA.s:7628 .text.HAL_TIM_ConfigOCrefClear:00000000 $t + /tmp/ccfdMfFA.s:7634 .text.HAL_TIM_ConfigOCrefClear:00000000 HAL_TIM_ConfigOCrefClear + /tmp/ccfdMfFA.s:7709 .text.HAL_TIM_ConfigOCrefClear:00000048 $d + /tmp/ccfdMfFA.s:7918 .text.HAL_TIM_ConfigClockSource:00000000 $t + /tmp/ccfdMfFA.s:7924 .text.HAL_TIM_ConfigClockSource:00000000 HAL_TIM_ConfigClockSource + /tmp/ccfdMfFA.s:8210 .text.HAL_TIM_ConfigClockSource:000000fc $d + /tmp/ccfdMfFA.s:8215 .text.TIM_SlaveTimer_SetConfig:00000000 $t + /tmp/ccfdMfFA.s:8220 .text.TIM_SlaveTimer_SetConfig:00000000 TIM_SlaveTimer_SetConfig + /tmp/ccfdMfFA.s:8474 .text.TIM_SlaveTimer_SetConfig:000000b8 $d + /tmp/ccfdMfFA.s:8479 .text.HAL_TIM_SlaveConfigSynchro:00000000 $t + /tmp/ccfdMfFA.s:8485 .text.HAL_TIM_SlaveConfigSynchro:00000000 HAL_TIM_SlaveConfigSynchro + /tmp/ccfdMfFA.s:8573 .text.HAL_TIM_SlaveConfigSynchro_IT:00000000 $t + /tmp/ccfdMfFA.s:8579 .text.HAL_TIM_SlaveConfigSynchro_IT:00000000 HAL_TIM_SlaveConfigSynchro_IT + /tmp/ccfdMfFA.s:8667 .text.TIM_CCxChannelCmd:00000000 $t + /tmp/ccfdMfFA.s:8673 .text.TIM_CCxChannelCmd:00000000 TIM_CCxChannelCmd + /tmp/ccfdMfFA.s:8713 .text.HAL_TIM_OC_Start:00000000 $t + /tmp/ccfdMfFA.s:8719 .text.HAL_TIM_OC_Start:00000000 HAL_TIM_OC_Start + /tmp/ccfdMfFA.s:8740 .text.HAL_TIM_OC_Start:0000000c $d + /tmp/ccfdMfFA.s:8775 .text.HAL_TIM_OC_Start:00000038 $d + /tmp/ccfdMfFA.s:8971 .text.HAL_TIM_OC_Start:0000014c $d + /tmp/ccfdMfFA.s:8978 .text.HAL_TIM_OC_Stop:00000000 $t + /tmp/ccfdMfFA.s:8984 .text.HAL_TIM_OC_Stop:00000000 HAL_TIM_OC_Stop + /tmp/ccfdMfFA.s:9059 .text.HAL_TIM_OC_Stop:0000005e $d + /tmp/ccfdMfFA.s:9115 .text.HAL_TIM_OC_Stop:000000a4 $d + /tmp/ccfdMfFA.s:9121 .text.HAL_TIM_OC_Start_IT:00000000 $t + /tmp/ccfdMfFA.s:9127 .text.HAL_TIM_OC_Start_IT:00000000 HAL_TIM_OC_Start_IT + /tmp/ccfdMfFA.s:9150 .text.HAL_TIM_OC_Start_IT:0000000c $d + /tmp/ccfdMfFA.s:9185 .text.HAL_TIM_OC_Start_IT:0000003a $d + /tmp/ccfdMfFA.s:9388 .text.HAL_TIM_OC_Start_IT:0000015c $d + /tmp/ccfdMfFA.s:9402 .text.HAL_TIM_OC_Start_IT:00000190 $t + /tmp/ccfdMfFA.s:9448 .text.HAL_TIM_OC_Start_IT:000001b8 $d + /tmp/ccfdMfFA.s:9455 .text.HAL_TIM_OC_Stop_IT:00000000 $t + ARM GAS /tmp/ccfdMfFA.s page 497 - /tmp/ccGFzgX3.s:9461 .text.HAL_TIM_OC_Stop_IT:00000000 HAL_TIM_OC_Stop_IT - /tmp/ccGFzgX3.s:9486 .text.HAL_TIM_OC_Stop_IT:0000000e $d - /tmp/ccGFzgX3.s:9569 .text.HAL_TIM_OC_Stop_IT:00000080 $d - /tmp/ccGFzgX3.s:9666 .text.HAL_TIM_OC_Stop_IT:000000f8 $d - /tmp/ccGFzgX3.s:9672 .text.HAL_TIM_OC_Start_DMA:00000000 $t - /tmp/ccGFzgX3.s:9678 .text.HAL_TIM_OC_Start_DMA:00000000 HAL_TIM_OC_Start_DMA - /tmp/ccGFzgX3.s:9706 .text.HAL_TIM_OC_Start_DMA:00000010 $d - /tmp/ccGFzgX3.s:9744 .text.HAL_TIM_OC_Start_DMA:0000003e $d - /tmp/ccGFzgX3.s:9851 .text.HAL_TIM_OC_Start_DMA:000000c8 $d - /tmp/ccGFzgX3.s:9868 .text.HAL_TIM_OC_Start_DMA:000000ea $t - /tmp/ccGFzgX3.s:10177 .text.HAL_TIM_OC_Start_DMA:00000290 $d - /tmp/ccGFzgX3.s:10191 .text.HAL_TIM_OC_Start_DMA:000002c4 $t - /tmp/ccGFzgX3.s:10260 .text.HAL_TIM_OC_Start_DMA:00000304 $d - /tmp/ccGFzgX3.s:10270 .text.HAL_TIM_OC_Stop_DMA:00000000 $t - /tmp/ccGFzgX3.s:10276 .text.HAL_TIM_OC_Stop_DMA:00000000 HAL_TIM_OC_Stop_DMA - /tmp/ccGFzgX3.s:10301 .text.HAL_TIM_OC_Stop_DMA:0000000e $d - /tmp/ccGFzgX3.s:10387 .text.HAL_TIM_OC_Stop_DMA:00000086 $d - /tmp/ccGFzgX3.s:10506 .text.HAL_TIM_OC_Stop_DMA:00000110 $d - /tmp/ccGFzgX3.s:10512 .text.HAL_TIM_PWM_Start:00000000 $t - /tmp/ccGFzgX3.s:10518 .text.HAL_TIM_PWM_Start:00000000 HAL_TIM_PWM_Start - /tmp/ccGFzgX3.s:10539 .text.HAL_TIM_PWM_Start:0000000c $d - /tmp/ccGFzgX3.s:10574 .text.HAL_TIM_PWM_Start:00000038 $d - /tmp/ccGFzgX3.s:10770 .text.HAL_TIM_PWM_Start:0000014c $d - /tmp/ccGFzgX3.s:10777 .text.HAL_TIM_PWM_Stop:00000000 $t - /tmp/ccGFzgX3.s:10783 .text.HAL_TIM_PWM_Stop:00000000 HAL_TIM_PWM_Stop - /tmp/ccGFzgX3.s:10858 .text.HAL_TIM_PWM_Stop:0000005e $d - /tmp/ccGFzgX3.s:10914 .text.HAL_TIM_PWM_Stop:000000a4 $d - /tmp/ccGFzgX3.s:10920 .text.HAL_TIM_PWM_Start_IT:00000000 $t - /tmp/ccGFzgX3.s:10926 .text.HAL_TIM_PWM_Start_IT:00000000 HAL_TIM_PWM_Start_IT - /tmp/ccGFzgX3.s:10949 .text.HAL_TIM_PWM_Start_IT:0000000c $d - /tmp/ccGFzgX3.s:10984 .text.HAL_TIM_PWM_Start_IT:0000003a $d - /tmp/ccGFzgX3.s:11187 .text.HAL_TIM_PWM_Start_IT:0000015c $d - /tmp/ccGFzgX3.s:11201 .text.HAL_TIM_PWM_Start_IT:00000190 $t - /tmp/ccGFzgX3.s:11247 .text.HAL_TIM_PWM_Start_IT:000001b8 $d - /tmp/ccGFzgX3.s:11254 .text.HAL_TIM_PWM_Stop_IT:00000000 $t - /tmp/ccGFzgX3.s:11260 .text.HAL_TIM_PWM_Stop_IT:00000000 HAL_TIM_PWM_Stop_IT - /tmp/ccGFzgX3.s:11285 .text.HAL_TIM_PWM_Stop_IT:0000000e $d - /tmp/ccGFzgX3.s:11368 .text.HAL_TIM_PWM_Stop_IT:00000080 $d - /tmp/ccGFzgX3.s:11465 .text.HAL_TIM_PWM_Stop_IT:000000f8 $d - /tmp/ccGFzgX3.s:11471 .text.HAL_TIM_PWM_Start_DMA:00000000 $t - /tmp/ccGFzgX3.s:11477 .text.HAL_TIM_PWM_Start_DMA:00000000 HAL_TIM_PWM_Start_DMA - /tmp/ccGFzgX3.s:11505 .text.HAL_TIM_PWM_Start_DMA:00000010 $d - /tmp/ccGFzgX3.s:11543 .text.HAL_TIM_PWM_Start_DMA:0000003e $d - /tmp/ccGFzgX3.s:11650 .text.HAL_TIM_PWM_Start_DMA:000000c8 $d - /tmp/ccGFzgX3.s:11667 .text.HAL_TIM_PWM_Start_DMA:000000ea $t - /tmp/ccGFzgX3.s:11976 .text.HAL_TIM_PWM_Start_DMA:00000290 $d - /tmp/ccGFzgX3.s:11990 .text.HAL_TIM_PWM_Start_DMA:000002c4 $t - /tmp/ccGFzgX3.s:12059 .text.HAL_TIM_PWM_Start_DMA:00000304 $d - /tmp/ccGFzgX3.s:12069 .text.HAL_TIM_PWM_Stop_DMA:00000000 $t - /tmp/ccGFzgX3.s:12075 .text.HAL_TIM_PWM_Stop_DMA:00000000 HAL_TIM_PWM_Stop_DMA - /tmp/ccGFzgX3.s:12100 .text.HAL_TIM_PWM_Stop_DMA:0000000e $d - /tmp/ccGFzgX3.s:12186 .text.HAL_TIM_PWM_Stop_DMA:00000086 $d - /tmp/ccGFzgX3.s:12305 .text.HAL_TIM_PWM_Stop_DMA:00000110 $d - /tmp/ccGFzgX3.s:12311 .text.HAL_TIM_IC_Start:00000000 $t - /tmp/ccGFzgX3.s:12317 .text.HAL_TIM_IC_Start:00000000 HAL_TIM_IC_Start - /tmp/ccGFzgX3.s:12337 .text.HAL_TIM_IC_Start:0000000c $d - /tmp/ccGFzgX3.s:12382 .text.HAL_TIM_IC_Start:0000003e $d - ARM GAS /tmp/ccGFzgX3.s page 498 + /tmp/ccfdMfFA.s:9461 .text.HAL_TIM_OC_Stop_IT:00000000 HAL_TIM_OC_Stop_IT + /tmp/ccfdMfFA.s:9486 .text.HAL_TIM_OC_Stop_IT:0000000e $d + /tmp/ccfdMfFA.s:9569 .text.HAL_TIM_OC_Stop_IT:00000080 $d + /tmp/ccfdMfFA.s:9666 .text.HAL_TIM_OC_Stop_IT:000000f8 $d + /tmp/ccfdMfFA.s:9672 .text.HAL_TIM_OC_Start_DMA:00000000 $t + /tmp/ccfdMfFA.s:9678 .text.HAL_TIM_OC_Start_DMA:00000000 HAL_TIM_OC_Start_DMA + /tmp/ccfdMfFA.s:9706 .text.HAL_TIM_OC_Start_DMA:00000010 $d + /tmp/ccfdMfFA.s:9744 .text.HAL_TIM_OC_Start_DMA:0000003e $d + /tmp/ccfdMfFA.s:9851 .text.HAL_TIM_OC_Start_DMA:000000c8 $d + /tmp/ccfdMfFA.s:9868 .text.HAL_TIM_OC_Start_DMA:000000ea $t + /tmp/ccfdMfFA.s:10177 .text.HAL_TIM_OC_Start_DMA:00000290 $d + /tmp/ccfdMfFA.s:10191 .text.HAL_TIM_OC_Start_DMA:000002c4 $t + /tmp/ccfdMfFA.s:10260 .text.HAL_TIM_OC_Start_DMA:00000304 $d + /tmp/ccfdMfFA.s:10270 .text.HAL_TIM_OC_Stop_DMA:00000000 $t + /tmp/ccfdMfFA.s:10276 .text.HAL_TIM_OC_Stop_DMA:00000000 HAL_TIM_OC_Stop_DMA + /tmp/ccfdMfFA.s:10301 .text.HAL_TIM_OC_Stop_DMA:0000000e $d + /tmp/ccfdMfFA.s:10387 .text.HAL_TIM_OC_Stop_DMA:00000086 $d + /tmp/ccfdMfFA.s:10506 .text.HAL_TIM_OC_Stop_DMA:00000110 $d + /tmp/ccfdMfFA.s:10512 .text.HAL_TIM_PWM_Start:00000000 $t + /tmp/ccfdMfFA.s:10518 .text.HAL_TIM_PWM_Start:00000000 HAL_TIM_PWM_Start + /tmp/ccfdMfFA.s:10539 .text.HAL_TIM_PWM_Start:0000000c $d + /tmp/ccfdMfFA.s:10574 .text.HAL_TIM_PWM_Start:00000038 $d + /tmp/ccfdMfFA.s:10770 .text.HAL_TIM_PWM_Start:0000014c $d + /tmp/ccfdMfFA.s:10777 .text.HAL_TIM_PWM_Stop:00000000 $t + /tmp/ccfdMfFA.s:10783 .text.HAL_TIM_PWM_Stop:00000000 HAL_TIM_PWM_Stop + /tmp/ccfdMfFA.s:10858 .text.HAL_TIM_PWM_Stop:0000005e $d + /tmp/ccfdMfFA.s:10914 .text.HAL_TIM_PWM_Stop:000000a4 $d + /tmp/ccfdMfFA.s:10920 .text.HAL_TIM_PWM_Start_IT:00000000 $t + /tmp/ccfdMfFA.s:10926 .text.HAL_TIM_PWM_Start_IT:00000000 HAL_TIM_PWM_Start_IT + /tmp/ccfdMfFA.s:10949 .text.HAL_TIM_PWM_Start_IT:0000000c $d + /tmp/ccfdMfFA.s:10984 .text.HAL_TIM_PWM_Start_IT:0000003a $d + /tmp/ccfdMfFA.s:11187 .text.HAL_TIM_PWM_Start_IT:0000015c $d + /tmp/ccfdMfFA.s:11201 .text.HAL_TIM_PWM_Start_IT:00000190 $t + /tmp/ccfdMfFA.s:11247 .text.HAL_TIM_PWM_Start_IT:000001b8 $d + /tmp/ccfdMfFA.s:11254 .text.HAL_TIM_PWM_Stop_IT:00000000 $t + /tmp/ccfdMfFA.s:11260 .text.HAL_TIM_PWM_Stop_IT:00000000 HAL_TIM_PWM_Stop_IT + /tmp/ccfdMfFA.s:11285 .text.HAL_TIM_PWM_Stop_IT:0000000e $d + /tmp/ccfdMfFA.s:11368 .text.HAL_TIM_PWM_Stop_IT:00000080 $d + /tmp/ccfdMfFA.s:11465 .text.HAL_TIM_PWM_Stop_IT:000000f8 $d + /tmp/ccfdMfFA.s:11471 .text.HAL_TIM_PWM_Start_DMA:00000000 $t + /tmp/ccfdMfFA.s:11477 .text.HAL_TIM_PWM_Start_DMA:00000000 HAL_TIM_PWM_Start_DMA + /tmp/ccfdMfFA.s:11505 .text.HAL_TIM_PWM_Start_DMA:00000010 $d + /tmp/ccfdMfFA.s:11543 .text.HAL_TIM_PWM_Start_DMA:0000003e $d + /tmp/ccfdMfFA.s:11650 .text.HAL_TIM_PWM_Start_DMA:000000c8 $d + /tmp/ccfdMfFA.s:11667 .text.HAL_TIM_PWM_Start_DMA:000000ea $t + /tmp/ccfdMfFA.s:11976 .text.HAL_TIM_PWM_Start_DMA:00000290 $d + /tmp/ccfdMfFA.s:11990 .text.HAL_TIM_PWM_Start_DMA:000002c4 $t + /tmp/ccfdMfFA.s:12059 .text.HAL_TIM_PWM_Start_DMA:00000304 $d + /tmp/ccfdMfFA.s:12069 .text.HAL_TIM_PWM_Stop_DMA:00000000 $t + /tmp/ccfdMfFA.s:12075 .text.HAL_TIM_PWM_Stop_DMA:00000000 HAL_TIM_PWM_Stop_DMA + /tmp/ccfdMfFA.s:12100 .text.HAL_TIM_PWM_Stop_DMA:0000000e $d + /tmp/ccfdMfFA.s:12186 .text.HAL_TIM_PWM_Stop_DMA:00000086 $d + /tmp/ccfdMfFA.s:12305 .text.HAL_TIM_PWM_Stop_DMA:00000110 $d + /tmp/ccfdMfFA.s:12311 .text.HAL_TIM_IC_Start:00000000 $t + /tmp/ccfdMfFA.s:12317 .text.HAL_TIM_IC_Start:00000000 HAL_TIM_IC_Start + /tmp/ccfdMfFA.s:12337 .text.HAL_TIM_IC_Start:0000000c $d + /tmp/ccfdMfFA.s:12382 .text.HAL_TIM_IC_Start:0000003e $d + ARM GAS /tmp/ccfdMfFA.s page 498 - /tmp/ccGFzgX3.s:12596 .text.HAL_TIM_IC_Start:00000160 $d - /tmp/ccGFzgX3.s:12602 .text.HAL_TIM_IC_Stop:00000000 $t - /tmp/ccGFzgX3.s:12608 .text.HAL_TIM_IC_Stop:00000000 HAL_TIM_IC_Stop - /tmp/ccGFzgX3.s:12656 .text.HAL_TIM_IC_Stop:00000034 $d - /tmp/ccGFzgX3.s:12741 .text.HAL_TIM_IC_Start_IT:00000000 $t - /tmp/ccGFzgX3.s:12747 .text.HAL_TIM_IC_Start_IT:00000000 HAL_TIM_IC_Start_IT - /tmp/ccGFzgX3.s:12769 .text.HAL_TIM_IC_Start_IT:0000000c $d - /tmp/ccGFzgX3.s:12814 .text.HAL_TIM_IC_Start_IT:0000003e $d - /tmp/ccGFzgX3.s:12909 .text.HAL_TIM_IC_Start_IT:000000c0 $d - /tmp/ccGFzgX3.s:13096 .text.HAL_TIM_IC_Start_IT:000001a4 $d - /tmp/ccGFzgX3.s:13102 .text.HAL_TIM_IC_Stop_IT:00000000 $t - /tmp/ccGFzgX3.s:13108 .text.HAL_TIM_IC_Stop_IT:00000000 HAL_TIM_IC_Stop_IT - /tmp/ccGFzgX3.s:13133 .text.HAL_TIM_IC_Stop_IT:0000000e $d - /tmp/ccGFzgX3.s:13189 .text.HAL_TIM_IC_Stop_IT:00000056 $d - /tmp/ccGFzgX3.s:13312 .text.HAL_TIM_IC_Start_DMA:00000000 $t - /tmp/ccGFzgX3.s:13318 .text.HAL_TIM_IC_Start_DMA:00000000 HAL_TIM_IC_Start_DMA - /tmp/ccGFzgX3.s:13348 .text.HAL_TIM_IC_Start_DMA:00000012 $d - /tmp/ccGFzgX3.s:13408 .text.HAL_TIM_IC_Start_DMA:00000058 $d - /tmp/ccGFzgX3.s:13523 .text.HAL_TIM_IC_Start_DMA:000000e6 $d - /tmp/ccGFzgX3.s:13835 .text.HAL_TIM_IC_Start_DMA:00000268 $d - /tmp/ccGFzgX3.s:13844 .text.HAL_TIM_IC_Stop_DMA:00000000 $t - /tmp/ccGFzgX3.s:13850 .text.HAL_TIM_IC_Stop_DMA:00000000 HAL_TIM_IC_Stop_DMA - /tmp/ccGFzgX3.s:13883 .text.HAL_TIM_IC_Stop_DMA:00000016 $d - /tmp/ccGFzgX3.s:13934 .text.HAL_TIM_IC_Stop_DMA:0000005a $d - /tmp/ccGFzgX3.s:14069 .text.HAL_TIM_OnePulse_Start:00000000 $t - /tmp/ccGFzgX3.s:14075 .text.HAL_TIM_OnePulse_Start:00000000 HAL_TIM_OnePulse_Start - /tmp/ccGFzgX3.s:14196 .text.HAL_TIM_OnePulse_Start:0000007c $d - /tmp/ccGFzgX3.s:14202 .text.HAL_TIM_OnePulse_Stop:00000000 $t - /tmp/ccGFzgX3.s:14208 .text.HAL_TIM_OnePulse_Stop:00000000 HAL_TIM_OnePulse_Stop - /tmp/ccGFzgX3.s:14302 .text.HAL_TIM_OnePulse_Stop:00000078 $d - /tmp/ccGFzgX3.s:14308 .text.HAL_TIM_OnePulse_Start_IT:00000000 $t - /tmp/ccGFzgX3.s:14314 .text.HAL_TIM_OnePulse_Start_IT:00000000 HAL_TIM_OnePulse_Start_IT - /tmp/ccGFzgX3.s:14445 .text.HAL_TIM_OnePulse_Start_IT:00000090 $d - /tmp/ccGFzgX3.s:14451 .text.HAL_TIM_OnePulse_Stop_IT:00000000 $t - /tmp/ccGFzgX3.s:14457 .text.HAL_TIM_OnePulse_Stop_IT:00000000 HAL_TIM_OnePulse_Stop_IT - /tmp/ccGFzgX3.s:14561 .text.HAL_TIM_OnePulse_Stop_IT:0000008c $d - /tmp/ccGFzgX3.s:14567 .text.HAL_TIM_Encoder_Start:00000000 $t - /tmp/ccGFzgX3.s:14573 .text.HAL_TIM_Encoder_Start:00000000 HAL_TIM_Encoder_Start - /tmp/ccGFzgX3.s:14774 .text.HAL_TIM_Encoder_Stop:00000000 $t - /tmp/ccGFzgX3.s:14780 .text.HAL_TIM_Encoder_Stop:00000000 HAL_TIM_Encoder_Stop - /tmp/ccGFzgX3.s:14863 .text.HAL_TIM_Encoder_Stop:0000005a $d - /tmp/ccGFzgX3.s:14977 .text.HAL_TIM_Encoder_Start_IT:00000000 $t - /tmp/ccGFzgX3.s:14983 .text.HAL_TIM_Encoder_Start_IT:00000000 HAL_TIM_Encoder_Start_IT - /tmp/ccGFzgX3.s:15206 .text.HAL_TIM_Encoder_Stop_IT:00000000 $t - /tmp/ccGFzgX3.s:15212 .text.HAL_TIM_Encoder_Stop_IT:00000000 HAL_TIM_Encoder_Stop_IT - /tmp/ccGFzgX3.s:15294 .text.HAL_TIM_Encoder_Stop_IT:00000064 $d - /tmp/ccGFzgX3.s:15430 .text.HAL_TIM_Encoder_Start_DMA:00000000 $t - /tmp/ccGFzgX3.s:15436 .text.HAL_TIM_Encoder_Start_DMA:00000000 HAL_TIM_Encoder_Start_DMA - /tmp/ccGFzgX3.s:15920 .text.HAL_TIM_Encoder_Start_DMA:00000240 $d - /tmp/ccGFzgX3.s:15927 .text.HAL_TIM_Encoder_Stop_DMA:00000000 $t - /tmp/ccGFzgX3.s:15933 .text.HAL_TIM_Encoder_Stop_DMA:00000000 HAL_TIM_Encoder_Stop_DMA - /tmp/ccGFzgX3.s:16025 .text.HAL_TIM_Encoder_Stop_DMA:00000070 $d - /tmp/ccGFzgX3.s:3750 .text.HAL_TIM_ReadCapturedValue:00000015 $d - /tmp/ccGFzgX3.s:3750 .text.HAL_TIM_ReadCapturedValue:00000016 $t - /tmp/ccGFzgX3.s:5219 .text.HAL_TIM_GetChannelState:00000019 $d - /tmp/ccGFzgX3.s:5219 .text.HAL_TIM_GetChannelState:0000001a $t - /tmp/ccGFzgX3.s:6476 .text.HAL_TIM_OC_ConfigChannel:0000002f $d - ARM GAS /tmp/ccGFzgX3.s page 499 + /tmp/ccfdMfFA.s:12596 .text.HAL_TIM_IC_Start:00000160 $d + /tmp/ccfdMfFA.s:12602 .text.HAL_TIM_IC_Stop:00000000 $t + /tmp/ccfdMfFA.s:12608 .text.HAL_TIM_IC_Stop:00000000 HAL_TIM_IC_Stop + /tmp/ccfdMfFA.s:12656 .text.HAL_TIM_IC_Stop:00000034 $d + /tmp/ccfdMfFA.s:12741 .text.HAL_TIM_IC_Start_IT:00000000 $t + /tmp/ccfdMfFA.s:12747 .text.HAL_TIM_IC_Start_IT:00000000 HAL_TIM_IC_Start_IT + /tmp/ccfdMfFA.s:12769 .text.HAL_TIM_IC_Start_IT:0000000c $d + /tmp/ccfdMfFA.s:12814 .text.HAL_TIM_IC_Start_IT:0000003e $d + /tmp/ccfdMfFA.s:12909 .text.HAL_TIM_IC_Start_IT:000000c0 $d + /tmp/ccfdMfFA.s:13096 .text.HAL_TIM_IC_Start_IT:000001a4 $d + /tmp/ccfdMfFA.s:13102 .text.HAL_TIM_IC_Stop_IT:00000000 $t + /tmp/ccfdMfFA.s:13108 .text.HAL_TIM_IC_Stop_IT:00000000 HAL_TIM_IC_Stop_IT + /tmp/ccfdMfFA.s:13133 .text.HAL_TIM_IC_Stop_IT:0000000e $d + /tmp/ccfdMfFA.s:13189 .text.HAL_TIM_IC_Stop_IT:00000056 $d + /tmp/ccfdMfFA.s:13312 .text.HAL_TIM_IC_Start_DMA:00000000 $t + /tmp/ccfdMfFA.s:13318 .text.HAL_TIM_IC_Start_DMA:00000000 HAL_TIM_IC_Start_DMA + /tmp/ccfdMfFA.s:13348 .text.HAL_TIM_IC_Start_DMA:00000012 $d + /tmp/ccfdMfFA.s:13408 .text.HAL_TIM_IC_Start_DMA:00000058 $d + /tmp/ccfdMfFA.s:13523 .text.HAL_TIM_IC_Start_DMA:000000e6 $d + /tmp/ccfdMfFA.s:13835 .text.HAL_TIM_IC_Start_DMA:00000268 $d + /tmp/ccfdMfFA.s:13844 .text.HAL_TIM_IC_Stop_DMA:00000000 $t + /tmp/ccfdMfFA.s:13850 .text.HAL_TIM_IC_Stop_DMA:00000000 HAL_TIM_IC_Stop_DMA + /tmp/ccfdMfFA.s:13883 .text.HAL_TIM_IC_Stop_DMA:00000016 $d + /tmp/ccfdMfFA.s:13934 .text.HAL_TIM_IC_Stop_DMA:0000005a $d + /tmp/ccfdMfFA.s:14069 .text.HAL_TIM_OnePulse_Start:00000000 $t + /tmp/ccfdMfFA.s:14075 .text.HAL_TIM_OnePulse_Start:00000000 HAL_TIM_OnePulse_Start + /tmp/ccfdMfFA.s:14196 .text.HAL_TIM_OnePulse_Start:0000007c $d + /tmp/ccfdMfFA.s:14202 .text.HAL_TIM_OnePulse_Stop:00000000 $t + /tmp/ccfdMfFA.s:14208 .text.HAL_TIM_OnePulse_Stop:00000000 HAL_TIM_OnePulse_Stop + /tmp/ccfdMfFA.s:14302 .text.HAL_TIM_OnePulse_Stop:00000078 $d + /tmp/ccfdMfFA.s:14308 .text.HAL_TIM_OnePulse_Start_IT:00000000 $t + /tmp/ccfdMfFA.s:14314 .text.HAL_TIM_OnePulse_Start_IT:00000000 HAL_TIM_OnePulse_Start_IT + /tmp/ccfdMfFA.s:14445 .text.HAL_TIM_OnePulse_Start_IT:00000090 $d + /tmp/ccfdMfFA.s:14451 .text.HAL_TIM_OnePulse_Stop_IT:00000000 $t + /tmp/ccfdMfFA.s:14457 .text.HAL_TIM_OnePulse_Stop_IT:00000000 HAL_TIM_OnePulse_Stop_IT + /tmp/ccfdMfFA.s:14561 .text.HAL_TIM_OnePulse_Stop_IT:0000008c $d + /tmp/ccfdMfFA.s:14567 .text.HAL_TIM_Encoder_Start:00000000 $t + /tmp/ccfdMfFA.s:14573 .text.HAL_TIM_Encoder_Start:00000000 HAL_TIM_Encoder_Start + /tmp/ccfdMfFA.s:14774 .text.HAL_TIM_Encoder_Stop:00000000 $t + /tmp/ccfdMfFA.s:14780 .text.HAL_TIM_Encoder_Stop:00000000 HAL_TIM_Encoder_Stop + /tmp/ccfdMfFA.s:14863 .text.HAL_TIM_Encoder_Stop:0000005a $d + /tmp/ccfdMfFA.s:14977 .text.HAL_TIM_Encoder_Start_IT:00000000 $t + /tmp/ccfdMfFA.s:14983 .text.HAL_TIM_Encoder_Start_IT:00000000 HAL_TIM_Encoder_Start_IT + /tmp/ccfdMfFA.s:15206 .text.HAL_TIM_Encoder_Stop_IT:00000000 $t + /tmp/ccfdMfFA.s:15212 .text.HAL_TIM_Encoder_Stop_IT:00000000 HAL_TIM_Encoder_Stop_IT + /tmp/ccfdMfFA.s:15294 .text.HAL_TIM_Encoder_Stop_IT:00000064 $d + /tmp/ccfdMfFA.s:15430 .text.HAL_TIM_Encoder_Start_DMA:00000000 $t + /tmp/ccfdMfFA.s:15436 .text.HAL_TIM_Encoder_Start_DMA:00000000 HAL_TIM_Encoder_Start_DMA + /tmp/ccfdMfFA.s:15920 .text.HAL_TIM_Encoder_Start_DMA:00000240 $d + /tmp/ccfdMfFA.s:15927 .text.HAL_TIM_Encoder_Stop_DMA:00000000 $t + /tmp/ccfdMfFA.s:15933 .text.HAL_TIM_Encoder_Stop_DMA:00000000 HAL_TIM_Encoder_Stop_DMA + /tmp/ccfdMfFA.s:16025 .text.HAL_TIM_Encoder_Stop_DMA:00000070 $d + /tmp/ccfdMfFA.s:3750 .text.HAL_TIM_ReadCapturedValue:00000015 $d + /tmp/ccfdMfFA.s:3750 .text.HAL_TIM_ReadCapturedValue:00000016 $t + /tmp/ccfdMfFA.s:5219 .text.HAL_TIM_GetChannelState:00000019 $d + /tmp/ccfdMfFA.s:5219 .text.HAL_TIM_GetChannelState:0000001a $t + /tmp/ccfdMfFA.s:6476 .text.HAL_TIM_OC_ConfigChannel:0000002f $d + ARM GAS /tmp/ccfdMfFA.s page 499 - /tmp/ccGFzgX3.s:6476 .text.HAL_TIM_OC_ConfigChannel:00000030 $t - /tmp/ccGFzgX3.s:6653 .text.HAL_TIM_PWM_ConfigChannel:00000035 $d - /tmp/ccGFzgX3.s:6653 .text.HAL_TIM_PWM_ConfigChannel:00000036 $t - /tmp/ccGFzgX3.s:7120 .text.HAL_TIM_IC_ConfigChannel:00000029 $d - /tmp/ccGFzgX3.s:7120 .text.HAL_TIM_IC_ConfigChannel:0000002a $t - /tmp/ccGFzgX3.s:7731 .text.HAL_TIM_ConfigOCrefClear:0000005d $d - /tmp/ccGFzgX3.s:7731 .text.HAL_TIM_ConfigOCrefClear:0000005e $t - /tmp/ccGFzgX3.s:8757 .text.HAL_TIM_OC_Start:0000001d $d - /tmp/ccGFzgX3.s:8757 .text.HAL_TIM_OC_Start:0000001e $t - /tmp/ccGFzgX3.s:8792 .text.HAL_TIM_OC_Start:00000049 $d - /tmp/ccGFzgX3.s:8792 .text.HAL_TIM_OC_Start:0000004a $t - /tmp/ccGFzgX3.s:9076 .text.HAL_TIM_OC_Stop:0000006f $d - /tmp/ccGFzgX3.s:9076 .text.HAL_TIM_OC_Stop:00000070 $t - /tmp/ccGFzgX3.s:9167 .text.HAL_TIM_OC_Start_IT:0000001d $d - /tmp/ccGFzgX3.s:9167 .text.HAL_TIM_OC_Start_IT:0000001e $t - /tmp/ccGFzgX3.s:9202 .text.HAL_TIM_OC_Start_IT:0000004b $d - /tmp/ccGFzgX3.s:9202 .text.HAL_TIM_OC_Start_IT:0000004c $t - /tmp/ccGFzgX3.s:9499 .text.HAL_TIM_OC_Stop_IT:0000001b $d - /tmp/ccGFzgX3.s:9499 .text.HAL_TIM_OC_Stop_IT:0000001c $t - /tmp/ccGFzgX3.s:9587 .text.HAL_TIM_OC_Stop_IT:00000091 $d - /tmp/ccGFzgX3.s:9587 .text.HAL_TIM_OC_Stop_IT:00000092 $t - /tmp/ccGFzgX3.s:9723 .text.HAL_TIM_OC_Start_DMA:00000021 $d - /tmp/ccGFzgX3.s:9723 .text.HAL_TIM_OC_Start_DMA:00000022 $t - /tmp/ccGFzgX3.s:9762 .text.HAL_TIM_OC_Start_DMA:0000004f $d - /tmp/ccGFzgX3.s:9762 .text.HAL_TIM_OC_Start_DMA:00000050 $t - /tmp/ccGFzgX3.s:10314 .text.HAL_TIM_OC_Stop_DMA:0000001b $d - /tmp/ccGFzgX3.s:10314 .text.HAL_TIM_OC_Stop_DMA:0000001c $t - /tmp/ccGFzgX3.s:10405 .text.HAL_TIM_OC_Stop_DMA:00000097 $d - /tmp/ccGFzgX3.s:10405 .text.HAL_TIM_OC_Stop_DMA:00000098 $t - /tmp/ccGFzgX3.s:10556 .text.HAL_TIM_PWM_Start:0000001d $d - /tmp/ccGFzgX3.s:10556 .text.HAL_TIM_PWM_Start:0000001e $t - /tmp/ccGFzgX3.s:10591 .text.HAL_TIM_PWM_Start:00000049 $d - /tmp/ccGFzgX3.s:10591 .text.HAL_TIM_PWM_Start:0000004a $t - /tmp/ccGFzgX3.s:10875 .text.HAL_TIM_PWM_Stop:0000006f $d - /tmp/ccGFzgX3.s:10875 .text.HAL_TIM_PWM_Stop:00000070 $t - /tmp/ccGFzgX3.s:10966 .text.HAL_TIM_PWM_Start_IT:0000001d $d - /tmp/ccGFzgX3.s:10966 .text.HAL_TIM_PWM_Start_IT:0000001e $t - /tmp/ccGFzgX3.s:11001 .text.HAL_TIM_PWM_Start_IT:0000004b $d - /tmp/ccGFzgX3.s:11001 .text.HAL_TIM_PWM_Start_IT:0000004c $t - /tmp/ccGFzgX3.s:11298 .text.HAL_TIM_PWM_Stop_IT:0000001b $d - /tmp/ccGFzgX3.s:11298 .text.HAL_TIM_PWM_Stop_IT:0000001c $t - /tmp/ccGFzgX3.s:11386 .text.HAL_TIM_PWM_Stop_IT:00000091 $d - /tmp/ccGFzgX3.s:11386 .text.HAL_TIM_PWM_Stop_IT:00000092 $t - /tmp/ccGFzgX3.s:11522 .text.HAL_TIM_PWM_Start_DMA:00000021 $d - /tmp/ccGFzgX3.s:11522 .text.HAL_TIM_PWM_Start_DMA:00000022 $t - /tmp/ccGFzgX3.s:11561 .text.HAL_TIM_PWM_Start_DMA:0000004f $d - /tmp/ccGFzgX3.s:11561 .text.HAL_TIM_PWM_Start_DMA:00000050 $t - /tmp/ccGFzgX3.s:12113 .text.HAL_TIM_PWM_Stop_DMA:0000001b $d - /tmp/ccGFzgX3.s:12113 .text.HAL_TIM_PWM_Stop_DMA:0000001c $t - /tmp/ccGFzgX3.s:12204 .text.HAL_TIM_PWM_Stop_DMA:00000097 $d - /tmp/ccGFzgX3.s:12204 .text.HAL_TIM_PWM_Stop_DMA:00000098 $t - /tmp/ccGFzgX3.s:12354 .text.HAL_TIM_IC_Start:0000001d $d - /tmp/ccGFzgX3.s:12354 .text.HAL_TIM_IC_Start:0000001e $t - /tmp/ccGFzgX3.s:12399 .text.HAL_TIM_IC_Start:0000004f $d - /tmp/ccGFzgX3.s:12399 .text.HAL_TIM_IC_Start:00000050 $t - /tmp/ccGFzgX3.s:12673 .text.HAL_TIM_IC_Stop:00000045 $d - /tmp/ccGFzgX3.s:12673 .text.HAL_TIM_IC_Stop:00000046 $t - ARM GAS /tmp/ccGFzgX3.s page 500 + /tmp/ccfdMfFA.s:6476 .text.HAL_TIM_OC_ConfigChannel:00000030 $t + /tmp/ccfdMfFA.s:6653 .text.HAL_TIM_PWM_ConfigChannel:00000035 $d + /tmp/ccfdMfFA.s:6653 .text.HAL_TIM_PWM_ConfigChannel:00000036 $t + /tmp/ccfdMfFA.s:7120 .text.HAL_TIM_IC_ConfigChannel:00000029 $d + /tmp/ccfdMfFA.s:7120 .text.HAL_TIM_IC_ConfigChannel:0000002a $t + /tmp/ccfdMfFA.s:7731 .text.HAL_TIM_ConfigOCrefClear:0000005d $d + /tmp/ccfdMfFA.s:7731 .text.HAL_TIM_ConfigOCrefClear:0000005e $t + /tmp/ccfdMfFA.s:8757 .text.HAL_TIM_OC_Start:0000001d $d + /tmp/ccfdMfFA.s:8757 .text.HAL_TIM_OC_Start:0000001e $t + /tmp/ccfdMfFA.s:8792 .text.HAL_TIM_OC_Start:00000049 $d + /tmp/ccfdMfFA.s:8792 .text.HAL_TIM_OC_Start:0000004a $t + /tmp/ccfdMfFA.s:9076 .text.HAL_TIM_OC_Stop:0000006f $d + /tmp/ccfdMfFA.s:9076 .text.HAL_TIM_OC_Stop:00000070 $t + /tmp/ccfdMfFA.s:9167 .text.HAL_TIM_OC_Start_IT:0000001d $d + /tmp/ccfdMfFA.s:9167 .text.HAL_TIM_OC_Start_IT:0000001e $t + /tmp/ccfdMfFA.s:9202 .text.HAL_TIM_OC_Start_IT:0000004b $d + /tmp/ccfdMfFA.s:9202 .text.HAL_TIM_OC_Start_IT:0000004c $t + /tmp/ccfdMfFA.s:9499 .text.HAL_TIM_OC_Stop_IT:0000001b $d + /tmp/ccfdMfFA.s:9499 .text.HAL_TIM_OC_Stop_IT:0000001c $t + /tmp/ccfdMfFA.s:9587 .text.HAL_TIM_OC_Stop_IT:00000091 $d + /tmp/ccfdMfFA.s:9587 .text.HAL_TIM_OC_Stop_IT:00000092 $t + /tmp/ccfdMfFA.s:9723 .text.HAL_TIM_OC_Start_DMA:00000021 $d + /tmp/ccfdMfFA.s:9723 .text.HAL_TIM_OC_Start_DMA:00000022 $t + /tmp/ccfdMfFA.s:9762 .text.HAL_TIM_OC_Start_DMA:0000004f $d + /tmp/ccfdMfFA.s:9762 .text.HAL_TIM_OC_Start_DMA:00000050 $t + /tmp/ccfdMfFA.s:10314 .text.HAL_TIM_OC_Stop_DMA:0000001b $d + /tmp/ccfdMfFA.s:10314 .text.HAL_TIM_OC_Stop_DMA:0000001c $t + /tmp/ccfdMfFA.s:10405 .text.HAL_TIM_OC_Stop_DMA:00000097 $d + /tmp/ccfdMfFA.s:10405 .text.HAL_TIM_OC_Stop_DMA:00000098 $t + /tmp/ccfdMfFA.s:10556 .text.HAL_TIM_PWM_Start:0000001d $d + /tmp/ccfdMfFA.s:10556 .text.HAL_TIM_PWM_Start:0000001e $t + /tmp/ccfdMfFA.s:10591 .text.HAL_TIM_PWM_Start:00000049 $d + /tmp/ccfdMfFA.s:10591 .text.HAL_TIM_PWM_Start:0000004a $t + /tmp/ccfdMfFA.s:10875 .text.HAL_TIM_PWM_Stop:0000006f $d + /tmp/ccfdMfFA.s:10875 .text.HAL_TIM_PWM_Stop:00000070 $t + /tmp/ccfdMfFA.s:10966 .text.HAL_TIM_PWM_Start_IT:0000001d $d + /tmp/ccfdMfFA.s:10966 .text.HAL_TIM_PWM_Start_IT:0000001e $t + /tmp/ccfdMfFA.s:11001 .text.HAL_TIM_PWM_Start_IT:0000004b $d + /tmp/ccfdMfFA.s:11001 .text.HAL_TIM_PWM_Start_IT:0000004c $t + /tmp/ccfdMfFA.s:11298 .text.HAL_TIM_PWM_Stop_IT:0000001b $d + /tmp/ccfdMfFA.s:11298 .text.HAL_TIM_PWM_Stop_IT:0000001c $t + /tmp/ccfdMfFA.s:11386 .text.HAL_TIM_PWM_Stop_IT:00000091 $d + /tmp/ccfdMfFA.s:11386 .text.HAL_TIM_PWM_Stop_IT:00000092 $t + /tmp/ccfdMfFA.s:11522 .text.HAL_TIM_PWM_Start_DMA:00000021 $d + /tmp/ccfdMfFA.s:11522 .text.HAL_TIM_PWM_Start_DMA:00000022 $t + /tmp/ccfdMfFA.s:11561 .text.HAL_TIM_PWM_Start_DMA:0000004f $d + /tmp/ccfdMfFA.s:11561 .text.HAL_TIM_PWM_Start_DMA:00000050 $t + /tmp/ccfdMfFA.s:12113 .text.HAL_TIM_PWM_Stop_DMA:0000001b $d + /tmp/ccfdMfFA.s:12113 .text.HAL_TIM_PWM_Stop_DMA:0000001c $t + /tmp/ccfdMfFA.s:12204 .text.HAL_TIM_PWM_Stop_DMA:00000097 $d + /tmp/ccfdMfFA.s:12204 .text.HAL_TIM_PWM_Stop_DMA:00000098 $t + /tmp/ccfdMfFA.s:12354 .text.HAL_TIM_IC_Start:0000001d $d + /tmp/ccfdMfFA.s:12354 .text.HAL_TIM_IC_Start:0000001e $t + /tmp/ccfdMfFA.s:12399 .text.HAL_TIM_IC_Start:0000004f $d + /tmp/ccfdMfFA.s:12399 .text.HAL_TIM_IC_Start:00000050 $t + /tmp/ccfdMfFA.s:12673 .text.HAL_TIM_IC_Stop:00000045 $d + /tmp/ccfdMfFA.s:12673 .text.HAL_TIM_IC_Stop:00000046 $t + ARM GAS /tmp/ccfdMfFA.s page 500 - /tmp/ccGFzgX3.s:12786 .text.HAL_TIM_IC_Start_IT:0000001d $d - /tmp/ccGFzgX3.s:12786 .text.HAL_TIM_IC_Start_IT:0000001e $t - /tmp/ccGFzgX3.s:12831 .text.HAL_TIM_IC_Start_IT:0000004f $d - /tmp/ccGFzgX3.s:12831 .text.HAL_TIM_IC_Start_IT:00000050 $t - /tmp/ccGFzgX3.s:12922 .text.HAL_TIM_IC_Start_IT:000000cd $d - /tmp/ccGFzgX3.s:12922 .text.HAL_TIM_IC_Start_IT:000000ce $t - /tmp/ccGFzgX3.s:13146 .text.HAL_TIM_IC_Stop_IT:0000001b $d - /tmp/ccGFzgX3.s:13146 .text.HAL_TIM_IC_Stop_IT:0000001c $t - /tmp/ccGFzgX3.s:13207 .text.HAL_TIM_IC_Stop_IT:00000067 $d - /tmp/ccGFzgX3.s:13207 .text.HAL_TIM_IC_Stop_IT:00000068 $t - /tmp/ccGFzgX3.s:13365 .text.HAL_TIM_IC_Start_DMA:00000023 $d - /tmp/ccGFzgX3.s:13365 .text.HAL_TIM_IC_Start_DMA:00000024 $t - /tmp/ccGFzgX3.s:13425 .text.HAL_TIM_IC_Start_DMA:00000069 $d - /tmp/ccGFzgX3.s:13425 .text.HAL_TIM_IC_Start_DMA:0000006a $t - /tmp/ccGFzgX3.s:13537 .text.HAL_TIM_IC_Start_DMA:000000f3 $d - /tmp/ccGFzgX3.s:13537 .text.HAL_TIM_IC_Start_DMA:000000f4 $t - /tmp/ccGFzgX3.s:13896 .text.HAL_TIM_IC_Stop_DMA:00000023 $d - /tmp/ccGFzgX3.s:13896 .text.HAL_TIM_IC_Stop_DMA:00000024 $t - /tmp/ccGFzgX3.s:13951 .text.HAL_TIM_IC_Stop_DMA:0000006b $d - /tmp/ccGFzgX3.s:13951 .text.HAL_TIM_IC_Stop_DMA:0000006c $t - /tmp/ccGFzgX3.s:14881 .text.HAL_TIM_Encoder_Stop:0000006b $d - /tmp/ccGFzgX3.s:14881 .text.HAL_TIM_Encoder_Stop:0000006c $t - /tmp/ccGFzgX3.s:15312 .text.HAL_TIM_Encoder_Stop_IT:00000075 $d - /tmp/ccGFzgX3.s:15312 .text.HAL_TIM_Encoder_Stop_IT:00000076 $t - /tmp/ccGFzgX3.s:16043 .text.HAL_TIM_Encoder_Stop_DMA:00000081 $d - /tmp/ccGFzgX3.s:16043 .text.HAL_TIM_Encoder_Stop_DMA:00000082 $t + /tmp/ccfdMfFA.s:12786 .text.HAL_TIM_IC_Start_IT:0000001d $d + /tmp/ccfdMfFA.s:12786 .text.HAL_TIM_IC_Start_IT:0000001e $t + /tmp/ccfdMfFA.s:12831 .text.HAL_TIM_IC_Start_IT:0000004f $d + /tmp/ccfdMfFA.s:12831 .text.HAL_TIM_IC_Start_IT:00000050 $t + /tmp/ccfdMfFA.s:12922 .text.HAL_TIM_IC_Start_IT:000000cd $d + /tmp/ccfdMfFA.s:12922 .text.HAL_TIM_IC_Start_IT:000000ce $t + /tmp/ccfdMfFA.s:13146 .text.HAL_TIM_IC_Stop_IT:0000001b $d + /tmp/ccfdMfFA.s:13146 .text.HAL_TIM_IC_Stop_IT:0000001c $t + /tmp/ccfdMfFA.s:13207 .text.HAL_TIM_IC_Stop_IT:00000067 $d + /tmp/ccfdMfFA.s:13207 .text.HAL_TIM_IC_Stop_IT:00000068 $t + /tmp/ccfdMfFA.s:13365 .text.HAL_TIM_IC_Start_DMA:00000023 $d + /tmp/ccfdMfFA.s:13365 .text.HAL_TIM_IC_Start_DMA:00000024 $t + /tmp/ccfdMfFA.s:13425 .text.HAL_TIM_IC_Start_DMA:00000069 $d + /tmp/ccfdMfFA.s:13425 .text.HAL_TIM_IC_Start_DMA:0000006a $t + /tmp/ccfdMfFA.s:13537 .text.HAL_TIM_IC_Start_DMA:000000f3 $d + /tmp/ccfdMfFA.s:13537 .text.HAL_TIM_IC_Start_DMA:000000f4 $t + /tmp/ccfdMfFA.s:13896 .text.HAL_TIM_IC_Stop_DMA:00000023 $d + /tmp/ccfdMfFA.s:13896 .text.HAL_TIM_IC_Stop_DMA:00000024 $t + /tmp/ccfdMfFA.s:13951 .text.HAL_TIM_IC_Stop_DMA:0000006b $d + /tmp/ccfdMfFA.s:13951 .text.HAL_TIM_IC_Stop_DMA:0000006c $t + /tmp/ccfdMfFA.s:14881 .text.HAL_TIM_Encoder_Stop:0000006b $d + /tmp/ccfdMfFA.s:14881 .text.HAL_TIM_Encoder_Stop:0000006c $t + /tmp/ccfdMfFA.s:15312 .text.HAL_TIM_Encoder_Stop_IT:00000075 $d + /tmp/ccfdMfFA.s:15312 .text.HAL_TIM_Encoder_Stop_IT:00000076 $t + /tmp/ccfdMfFA.s:16043 .text.HAL_TIM_Encoder_Stop_DMA:00000081 $d + /tmp/ccfdMfFA.s:16043 .text.HAL_TIM_Encoder_Stop_DMA:00000082 $t UNDEFINED SYMBOLS HAL_DMA_Start_IT diff --git a/build/stm32f7xx_hal_tim.o b/build/stm32f7xx_hal_tim.o index b194a3cababd2a9e33c8e5c5b8f57d345327a68c..cf978e24c0236578fcf7c827610449da296967e3 100644 GIT binary patch delta 8357 zcmZu$30PIt+TLp)I0GI$2RIx!a0YNd5JVhsKvXakP?T8#kwKIkLIGz@(FW7h%GTfA zm|0r>rIwY~Yi3zjuXV55EzQ)lOv}`?dvoZq)J(nax7G&o{=d)j?ZtY(VSUqDYoBfN zdCS#vmS>{a+-=bl(h8Ou73Bqg<^TLs&8A|oR6o-L41;Rg7m9%y*U_N*huDedKaB>n z|DOVgXRZxV6vG+*Wm-q}3csC}5#+G|c$EdsgL$>1)iRXlrAM(rydk|$P*(?d9~yL? z*>aG-o1Ul!8~Md_FWbjWLvnjwhhK&REh4=ww`hK_W!}$nm*$_e%u_7}BVRTokXbz)sWV2X7f!e)ry?_m2@W&bX$g8{r>Z6q-Qi!$p$%AhsL4=X8#9+34< zFx-Y2tT&Yw^zX^CN#~H6bavyx6vOQxFp>?4V6;y%CRswDZaW*SD8`=FI*6zp6}gXZS|u zI?3m2SV^^dD8tr?h||xyf*e;2J~(NtQ+;s9uK*AGGGwsIxZM5#WNlAD*|@?-f0KhR z^ItL&no3Ooxi4FQ{cP8vWqdAroS3HCqDV#4r)jo6R!rCE(+t~O(p{@hvus(k`Z|4@ zV{0bim-K0#?EwmCgIBg&ku5k7(^tF!GF>IM5HsI0G_m9q*?3K@fg3@7HSnT+xGB+c z5`Wm5P*+ouo)N{i8;hHI=~F-3kI0Fsk3KcqdZRx~Df-lEJI9lTd08^g9oCoa=T8hv zu&>5mG1ce-4%=R93Lqfg5R$THgX&RRW%%0uE$`sqo2f6&|5-$K#A+ zdoi`PhqPk7fxXGB+3*=U2YKJ&QB8?3#;loms@5tz{jBrwG+Up=({6no&nW9f>^DUT zcmak?#mw*pjX9=q%(4SkEwnRCRjdn5ur(|%Q*TwX80tH;0qks>``wt zb=+Ez28y&JNPvR~WQD#mRGmHU75%aw(BD8x)K5HkWNgg7K=3AbQ-x^06s?t_zd-65 ziAFEuRU_j%U&eM|{k;Q7l&+t_pvb>Uut?|^xO4cMBjds|kVQ67Ul39sQ4OL^R(@q< ztTbbhW}K*LFi4uQc-zdRj*1HtW&)*|wUE+4O7t=Q@Tj;H;mm2z5b3u&hgLl88B5bk z5IYa@B?kih)+6F};>5Otd>Q=As8F_)|1v7BNf>#@BO-bX%*7z-$~&G`SIF{CPb^t} z3;fr~h_Jj%T0RBfIDx|5_atb+G3F0aq6eZg*a}Y|r9g=RbpgzlqBkS?x?Gz~$BO#{ zSs?=%1Ia>=FPVRy>yTM}O4@%5@K%uGWf%CJ+_-oVO1Y;ux%o2~mqBh(oN~`d0_oCl zfl#9SJV%0vpi&yE2V4u15mZTV2Y|OgN{3^7b)J{);BV(Sie1=#>`Qn4QI!1*GV>|O z7l%e=C*7fR#WteXrh#N9edQL(-w5DY0>!FdOE4Tw>Hwi4uKYgi7|+X(8#9kgt#|h? zq^#xpj^l)2FH8AFkew^!sUojP@O1#23EYiilWmmX9snPLaFI;Lc8d;g&kyIv<_X(V z?zjDr)G%Sk-Xk-jhIJAg3~(Sw+MXuCA^-&-C3+RlDu}ZSqY3Vu7Kizg0!KGtrMp!4 z3c@E^tt3hC3V@%4mAg*Ny#ga`k__5S%TeA#(0nnZH)wn0Z0QW(X;tq3ghyHPuchTG(w7QhS&zu z7m?;j@ZSK=5h!XgQi5Hv2ctk})HOV@D2`3xB}GG>bdE9>*_TemD`5W%9Lu5t2)9cw(w%CcN9E! z1E^a#TOE-=TE79kF10d8r%Qt=GL8qaU8+G?>&4NXd;E?pv3o9gCe*{=o8YmHxQnF0 zd#*lYkT%(8QtSHY7*@k0$LK*Gb;XcCI(Eqb5X_Dk6XUx`NqXPq6}Kj=DrkO1U8t}m z+{x}8{FyN+F(Q#$T%!p31ghIXk#x(kEv||>$Ya;J9sKH;(7v0fM$N7;MwcJ`qw|K$ zeI(4$V$H5>GW06+Uj`{LEH;3rmbh_Rl$P|y^QjW2Z!g)I?{czI+LQR#;#N(#aBE*l z?{MK(y(@#P72p~i1%kC7xUJOFM=)z$4-j)981p1^B6(2$|JYU069{*FY0^NUni$rH z`iA8x5$q!>oi9wLp6(M0h?*!;i2B0PT1E5tp;8xOxK!Fz+F@bCTbUi`5c=79znzn< zc7ApaX%#K!d1Yj0N||owsB=IoQ$f+$$Ny!gETYAqkDYD)Ea0D)xq^k8?>L9GTBzs0 zm$^a&{F-x+4#zN4D32ZMP8E2eb0FpJd*tm9NY=a1nWNXcH;!gj>=dU>Gd9&y+E`uK zExvfHH%u6ab!L#^RJ43=YI~QJ?-<)tWe$F6tVfC{&U6wv5B4{@h^M@#>ap|ua@~z@ zLkE&b1wt+ZMLvW^VBdzexFL>>v!TL`C%}Ik1UH88&E?)S;l{8~k&Vy5_&dmbi28O| z=!8&@qI5=p?LhK2$_f>?(MAQ#&zm_hq`CU9}IMb5OvV^LZ2FPi6fPQ{03UbsEmK&*%jRr zg!|nb!utSC}DSom)ho+hC;D@0U#0M_VB>kLMI z*{qOa(yIYbN}w<{J4C$5Z3pl=fm`UHnH^H{u@CS4UPZY|U@6>Vb3z7^`dxs(f!xuQ z$~ht8t)~N|y&zv4Ysa<91L)oADo4Cnc0foT>3s_J0gzlaHKZ?rHvwEHa0_2w