big refactoring and features added

This commit is contained in:
Ayzen
2026-04-24 16:51:15 +03:00
parent eafc328caa
commit ea1fbb071d
184 changed files with 35336 additions and 75480 deletions

View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccvzLe3h.s page 1
ARM GAS /tmp/ccIzO3xY.s page 1
1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (#) For the UART RS485 Driver Enable mode, initialize the UART registers
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** by calling the HAL_RS485Ex_Init() API.
ARM GAS /tmp/ccvzLe3h.s page 2
ARM GAS /tmp/ccIzO3xY.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
@ -118,7 +118,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (++) Stop Bit
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (++) Parity: If the parity is enabled, then the MSB bit of the data written
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** in the data register is transmitted but is changed by the parity bit.
ARM GAS /tmp/ccvzLe3h.s page 3
ARM GAS /tmp/ccIzO3xY.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (++) Hardware flow control
@ -178,7 +178,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @param DeassertionTime Driver Enable deassertion time:
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * 5-bit value defining the time between the end of the last stop bit, in a
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * transmitted message, and the de-activation of the DE (Driver Enable) signal.
ARM GAS /tmp/ccvzLe3h.s page 4
ARM GAS /tmp/ccIzO3xY.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the
@ -238,7 +238,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** UART_AdvFeatureConfig(huart);
ARM GAS /tmp/ccvzLe3h.s page 5
ARM GAS /tmp/ccIzO3xY.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
@ -298,7 +298,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (#) Compared to standard reception services which only consider number of received
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** data elements as reception completion criteria, these functions also consider additional ev
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** as triggers for updating reception status to caller :
ARM GAS /tmp/ccvzLe3h.s page 6
ARM GAS /tmp/ccIzO3xY.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (+) Detection of inactivity period (RX line has not been active for a given period).
@ -358,7 +358,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /**
ARM GAS /tmp/ccvzLe3h.s page 7
ARM GAS /tmp/ccIzO3xY.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @brief Disable UART Clock when in Stop Mode.
@ -418,7 +418,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* TEACK and/or REACK to check before moving huart->gState to Ready */
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** return (UART_CheckIdleState(huart));
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
ARM GAS /tmp/ccvzLe3h.s page 8
ARM GAS /tmp/ccIzO3xY.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
@ -478,7 +478,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* Initialize the UART State */
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_READY;
ARM GAS /tmp/ccvzLe3h.s page 9
ARM GAS /tmp/ccIzO3xY.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
@ -538,7 +538,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * of uint16_t available through pData.
ARM GAS /tmp/ccvzLe3h.s page 10
ARM GAS /tmp/ccIzO3xY.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @param huart UART handle.
@ -598,7 +598,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* as long as data have to be received */
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** while (huart->RxXferCount > 0U)
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
ARM GAS /tmp/ccvzLe3h.s page 11
ARM GAS /tmp/ccIzO3xY.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* Check if IDLE flag is set */
@ -658,7 +658,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** else
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** return HAL_BUSY;
ARM GAS /tmp/ccvzLe3h.s page 12
ARM GAS /tmp/ccIzO3xY.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
@ -718,7 +718,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
ARM GAS /tmp/ccvzLe3h.s page 13
ARM GAS /tmp/ccIzO3xY.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /**
@ -778,7 +778,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** else
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
ARM GAS /tmp/ccvzLe3h.s page 14
ARM GAS /tmp/ccIzO3xY.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** return HAL_BUSY;
@ -838,7 +838,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
28 .loc 1 770 1 view -0
29 .cfi_startproc
ARM GAS /tmp/ccvzLe3h.s page 15
ARM GAS /tmp/ccIzO3xY.s page 15
30 @ args = 0, pretend = 0, frame = 8
@ -898,7 +898,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
77 .loc 1 153 3 view .LVU7
156:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
ARM GAS /tmp/ccvzLe3h.s page 16
ARM GAS /tmp/ccIzO3xY.s page 16
78 .loc 1 156 3 view .LVU8
@ -958,7 +958,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
118 .loc 1 200 26 is_stmt 0 view .LVU22
119 0020 636A ldr r3, [r4, #36]
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
ARM GAS /tmp/ccvzLe3h.s page 17
ARM GAS /tmp/ccIzO3xY.s page 17
120 .loc 1 200 6 view .LVU23
@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
162 005a 43F00103 orr r3, r3, #1
163 005e 1360 str r3, [r2]
226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
ARM GAS /tmp/ccvzLe3h.s page 18
ARM GAS /tmp/ccIzO3xY.s page 18
164 .loc 1 226 3 is_stmt 1 view .LVU36
@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
210 .thumb
211 .thumb_func
213 HAL_UARTEx_EnableClockStopMode:
ARM GAS /tmp/ccvzLe3h.s page 19
ARM GAS /tmp/ccIzO3xY.s page 19
214 .LVL15:
@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
ARM GAS /tmp/ccvzLe3h.s page 20
ARM GAS /tmp/ccIzO3xY.s page 20
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
ARM GAS /tmp/ccvzLe3h.s page 21
ARM GAS /tmp/ccIzO3xY.s page 21
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
133:Drivers/CMSIS/Include/cmsis_gcc.h ****
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS /tmp/ccvzLe3h.s page 22
ARM GAS /tmp/ccIzO3xY.s page 22
136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
192:Drivers/CMSIS/Include/cmsis_gcc.h **** */
ARM GAS /tmp/ccvzLe3h.s page 23
ARM GAS /tmp/ccIzO3xY.s page 23
193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
ARM GAS /tmp/ccvzLe3h.s page 24
ARM GAS /tmp/ccIzO3xY.s page 24
250:Drivers/CMSIS/Include/cmsis_gcc.h ****
@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
304:Drivers/CMSIS/Include/cmsis_gcc.h ****
305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
ARM GAS /tmp/ccvzLe3h.s page 25
ARM GAS /tmp/ccIzO3xY.s page 25
307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
362:Drivers/CMSIS/Include/cmsis_gcc.h **** }
363:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccvzLe3h.s page 26
ARM GAS /tmp/ccIzO3xY.s page 26
364:Drivers/CMSIS/Include/cmsis_gcc.h ****
@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
419:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
ARM GAS /tmp/ccvzLe3h.s page 27
ARM GAS /tmp/ccIzO3xY.s page 27
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
475:Drivers/CMSIS/Include/cmsis_gcc.h **** */
476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
477:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccvzLe3h.s page 28
ARM GAS /tmp/ccIzO3xY.s page 28
478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
533:Drivers/CMSIS/Include/cmsis_gcc.h **** }
534:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccvzLe3h.s page 29
ARM GAS /tmp/ccIzO3xY.s page 29
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
591:Drivers/CMSIS/Include/cmsis_gcc.h **** */
ARM GAS /tmp/ccvzLe3h.s page 30
ARM GAS /tmp/ccIzO3xY.s page 30
592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
646:Drivers/CMSIS/Include/cmsis_gcc.h **** }
647:Drivers/CMSIS/Include/cmsis_gcc.h ****
648:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccvzLe3h.s page 31
ARM GAS /tmp/ccIzO3xY.s page 31
649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
ARM GAS /tmp/ccvzLe3h.s page 32
ARM GAS /tmp/ccIzO3xY.s page 32
706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
760:Drivers/CMSIS/Include/cmsis_gcc.h ****
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
ARM GAS /tmp/ccvzLe3h.s page 33
ARM GAS /tmp/ccIzO3xY.s page 33
763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
817:Drivers/CMSIS/Include/cmsis_gcc.h **** */
818:Drivers/CMSIS/Include/cmsis_gcc.h ****
819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
ARM GAS /tmp/ccvzLe3h.s page 34
ARM GAS /tmp/ccIzO3xY.s page 34
820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
876:Drivers/CMSIS/Include/cmsis_gcc.h **** */
ARM GAS /tmp/ccvzLe3h.s page 35
ARM GAS /tmp/ccIzO3xY.s page 35
877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
933:Drivers/CMSIS/Include/cmsis_gcc.h **** */
ARM GAS /tmp/ccvzLe3h.s page 36
ARM GAS /tmp/ccIzO3xY.s page 36
934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
ARM GAS /tmp/ccvzLe3h.s page 37
ARM GAS /tmp/ccIzO3xY.s page 37
991:Drivers/CMSIS/Include/cmsis_gcc.h ****
@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1045:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1046:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
1047:Drivers/CMSIS/Include/cmsis_gcc.h **** {
ARM GAS /tmp/ccvzLe3h.s page 38
ARM GAS /tmp/ccIzO3xY.s page 38
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1076:Drivers/CMSIS/Include/cmsis_gcc.h ****
1077:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit)
ARM GAS /tmp/ccvzLe3h.s page 39
ARM GAS /tmp/ccIzO3xY.s page 39
1079:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values.
@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
274 001e 42E80031 strex r1, r3, [r2]
275 @ 0 "" 2
276 .LVL21:
ARM GAS /tmp/ccvzLe3h.s page 40
ARM GAS /tmp/ccIzO3xY.s page 40
1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* Process Locked */
321 .loc 1 322 1 is_stmt 1 view -0
322 .cfi_startproc
ARM GAS /tmp/ccvzLe3h.s page 41
ARM GAS /tmp/ccIzO3xY.s page 41
323 @ args = 0, pretend = 0, frame = 0
@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
363 .loc 1 327 3 discriminator 1 view .LVU95
364 0018 23F40003 bic r3, r3, #8388608
ARM GAS /tmp/ccvzLe3h.s page 42
ARM GAS /tmp/ccIzO3xY.s page 42
365 .LVL30:
@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
405 .LVL35:
406 .L21:
324:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
ARM GAS /tmp/ccvzLe3h.s page 43
ARM GAS /tmp/ccIzO3xY.s page 43
407 .loc 1 324 3 discriminator 1 view .LVU112
@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
452 0014 1868 ldr r0, [r3]
453 0016 4268 ldr r2, [r0, #4]
454 0018 22F01002 bic r2, r2, #16
ARM GAS /tmp/ccvzLe3h.s page 44
ARM GAS /tmp/ccIzO3xY.s page 44
455 001c 1143 orrs r1, r1, r2
@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
502 .cfi_def_cfa_offset 8
503 .cfi_offset 4, -8
504 .cfi_offset 14, -4
ARM GAS /tmp/ccvzLe3h.s page 45
ARM GAS /tmp/ccIzO3xY.s page 45
505 0002 84B0 sub sp, sp, #16
@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
545 .L31:
417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
546 .loc 1 417 3 is_stmt 1 view .LVU147
ARM GAS /tmp/ccvzLe3h.s page 46
ARM GAS /tmp/ccIzO3xY.s page 46
547 0038 2268 ldr r2, [r4]
@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
590 .loc 1 434 3 is_stmt 1 view .LVU159
434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
ARM GAS /tmp/ccvzLe3h.s page 47
ARM GAS /tmp/ccIzO3xY.s page 47
591 .loc 1 434 3 view .LVU160
@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
638 0008 0123 movs r3, #1
639 000a 80F87830 strb r3, [r0, #120]
640 .L39:
ARM GAS /tmp/ccvzLe3h.s page 48
ARM GAS /tmp/ccIzO3xY.s page 48
448:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
680 .LVL61:
681 .loc 2 1124 4 view .LVU185
682 .loc 2 1124 4 is_stmt 0 view .LVU186
ARM GAS /tmp/ccvzLe3h.s page 49
ARM GAS /tmp/ccIzO3xY.s page 49
683 .thumb
@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
727 @ args = 0, pretend = 0, frame = 0
728 @ frame_needed = 0, uses_anonymous_args = 0
729 @ link register save eliminated.
ARM GAS /tmp/ccvzLe3h.s page 50
ARM GAS /tmp/ccIzO3xY.s page 50
467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
769 .LBI50:
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
770 .loc 2 1119 31 view .LVU214
ARM GAS /tmp/ccvzLe3h.s page 51
ARM GAS /tmp/ccIzO3xY.s page 51
771 .LBB51:
@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
813 .section .text.HAL_UARTEx_ReceiveToIdle,"ax",%progbits
814 .align 1
815 .global HAL_UARTEx_ReceiveToIdle
ARM GAS /tmp/ccvzLe3h.s page 52
ARM GAS /tmp/ccIzO3xY.s page 52
816 .syntax unified
@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
860 001e 01D1 bne .L68
509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
861 .loc 1 509 15 view .LVU241
ARM GAS /tmp/ccvzLe3h.s page 53
ARM GAS /tmp/ccIzO3xY.s page 53
862 0020 0120 movs r0, #1
@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
898 .loc 1 524 5 is_stmt 1 view .LVU259
524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** uhMask = huart->Mask;
899 .loc 1 524 5 view .LVU260
ARM GAS /tmp/ccvzLe3h.s page 54
ARM GAS /tmp/ccIzO3xY.s page 54
900 0044 A368 ldr r3, [r4, #8]
@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
942 .LVL82:
528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
943 .loc 1 528 5 is_stmt 1 view .LVU273
ARM GAS /tmp/ccvzLe3h.s page 55
ARM GAS /tmp/ccIzO3xY.s page 55
528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
984 .loc 1 530 19 view .LVU287
985 00b8 0027 movs r7, #0
986 .LVL86:
ARM GAS /tmp/ccvzLe3h.s page 56
ARM GAS /tmp/ccIzO3xY.s page 56
530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** pdata16bits = (uint16_t *) pData;
@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1024 00e0 013B subs r3, r3, #1
1025 00e2 9BB2 uxth r3, r3
1026 00e4 A4F85A30 strh r3, [r4, #90] @ movhi
ARM GAS /tmp/ccvzLe3h.s page 57
ARM GAS /tmp/ccIzO3xY.s page 57
1027 .L57:
@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1064 .loc 1 565 12 is_stmt 0 view .LVU321
1065 0114 002F cmp r7, #0
1066 0116 D8D0 beq .L75
ARM GAS /tmp/ccvzLe3h.s page 58
ARM GAS /tmp/ccIzO3xY.s page 58
572:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** pdata8bits++;
@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
593:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */
1104 .loc 1 593 19 is_stmt 0 view .LVU339
1105 0140 B4F85830 ldrh r3, [r4, #88]
ARM GAS /tmp/ccvzLe3h.s page 59
ARM GAS /tmp/ccIzO3xY.s page 59
593:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */
@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
1149 .loc 1 624 12 is_stmt 0 view .LVU353
1150 0000 D0F88030 ldr r3, [r0, #128]
ARM GAS /tmp/ccvzLe3h.s page 60
ARM GAS /tmp/ccIzO3xY.s page 60
624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1190 .loc 1 637 8 view .LVU368
1191 0026 012B cmp r3, #1
1192 0028 01D0 beq .L88
ARM GAS /tmp/ccvzLe3h.s page 61
ARM GAS /tmp/ccIzO3xY.s page 61
648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
640:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
1233 .loc 1 640 7 is_stmt 1 discriminator 1 view .LVU383
1234 .LBB55:
ARM GAS /tmp/ccvzLe3h.s page 62
ARM GAS /tmp/ccIzO3xY.s page 62
1235 .LBI55:
@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1283 .LVL105:
1284 .LFB150:
677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** HAL_StatusTypeDef status;
ARM GAS /tmp/ccvzLe3h.s page 63
ARM GAS /tmp/ccIzO3xY.s page 63
1285 .loc 1 677 1 is_stmt 1 view -0
@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1325 .loc 1 692 5 is_stmt 1 view .LVU408
692:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
1326 .loc 1 692 15 is_stmt 0 view .LVU409
ARM GAS /tmp/ccvzLe3h.s page 64
ARM GAS /tmp/ccIzO3xY.s page 64
1327 0020 FFF7FEFF bl UART_Start_Receive_DMA
@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1365 .syntax unified
1366 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1367 003a 52E8003F ldrex r3, [r2]
ARM GAS /tmp/ccvzLe3h.s page 65
ARM GAS /tmp/ccIzO3xY.s page 65
1368 @ 0 "" 2
@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
1412 .loc 1 718 1 view .LVU438
1413 004e 7047 bx lr
ARM GAS /tmp/ccvzLe3h.s page 66
ARM GAS /tmp/ccIzO3xY.s page 66
1414 .cfi_endproc
@ -3939,35 +3939,35 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1448 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
1449 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h"
1450 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
ARM GAS /tmp/ccvzLe3h.s page 67
ARM GAS /tmp/ccIzO3xY.s page 67
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_uart_ex.c
/tmp/ccvzLe3h.s:20 .text.UARTEx_Wakeup_AddressConfig:00000000 $t
/tmp/ccvzLe3h.s:25 .text.UARTEx_Wakeup_AddressConfig:00000000 UARTEx_Wakeup_AddressConfig
/tmp/ccvzLe3h.s:64 .text.HAL_RS485Ex_Init:00000000 $t
/tmp/ccvzLe3h.s:70 .text.HAL_RS485Ex_Init:00000000 HAL_RS485Ex_Init
/tmp/ccvzLe3h.s:207 .text.HAL_UARTEx_EnableClockStopMode:00000000 $t
/tmp/ccvzLe3h.s:213 .text.HAL_UARTEx_EnableClockStopMode:00000000 HAL_UARTEx_EnableClockStopMode
/tmp/ccvzLe3h.s:312 .text.HAL_UARTEx_DisableClockStopMode:00000000 $t
/tmp/ccvzLe3h.s:318 .text.HAL_UARTEx_DisableClockStopMode:00000000 HAL_UARTEx_DisableClockStopMode
/tmp/ccvzLe3h.s:416 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 $t
/tmp/ccvzLe3h.s:422 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 HAL_MultiProcessorEx_AddressLength_Set
/tmp/ccvzLe3h.s:486 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 $t
/tmp/ccvzLe3h.s:492 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 HAL_UARTEx_StopModeWakeUpSourceConfig
/tmp/ccvzLe3h.s:618 .text.HAL_UARTEx_EnableStopMode:00000000 $t
/tmp/ccvzLe3h.s:624 .text.HAL_UARTEx_EnableStopMode:00000000 HAL_UARTEx_EnableStopMode
/tmp/ccvzLe3h.s:716 .text.HAL_UARTEx_DisableStopMode:00000000 $t
/tmp/ccvzLe3h.s:722 .text.HAL_UARTEx_DisableStopMode:00000000 HAL_UARTEx_DisableStopMode
/tmp/ccvzLe3h.s:814 .text.HAL_UARTEx_ReceiveToIdle:00000000 $t
/tmp/ccvzLe3h.s:820 .text.HAL_UARTEx_ReceiveToIdle:00000000 HAL_UARTEx_ReceiveToIdle
/tmp/ccvzLe3h.s:1134 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 $t
/tmp/ccvzLe3h.s:1140 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 HAL_UARTEx_ReceiveToIdle_IT
/tmp/ccvzLe3h.s:1276 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 $t
/tmp/ccvzLe3h.s:1282 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 HAL_UARTEx_ReceiveToIdle_DMA
/tmp/ccvzLe3h.s:1418 .text.HAL_UARTEx_GetRxEventType:00000000 $t
/tmp/ccvzLe3h.s:1424 .text.HAL_UARTEx_GetRxEventType:00000000 HAL_UARTEx_GetRxEventType
/tmp/ccIzO3xY.s:20 .text.UARTEx_Wakeup_AddressConfig:00000000 $t
/tmp/ccIzO3xY.s:25 .text.UARTEx_Wakeup_AddressConfig:00000000 UARTEx_Wakeup_AddressConfig
/tmp/ccIzO3xY.s:64 .text.HAL_RS485Ex_Init:00000000 $t
/tmp/ccIzO3xY.s:70 .text.HAL_RS485Ex_Init:00000000 HAL_RS485Ex_Init
/tmp/ccIzO3xY.s:207 .text.HAL_UARTEx_EnableClockStopMode:00000000 $t
/tmp/ccIzO3xY.s:213 .text.HAL_UARTEx_EnableClockStopMode:00000000 HAL_UARTEx_EnableClockStopMode
/tmp/ccIzO3xY.s:312 .text.HAL_UARTEx_DisableClockStopMode:00000000 $t
/tmp/ccIzO3xY.s:318 .text.HAL_UARTEx_DisableClockStopMode:00000000 HAL_UARTEx_DisableClockStopMode
/tmp/ccIzO3xY.s:416 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 $t
/tmp/ccIzO3xY.s:422 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 HAL_MultiProcessorEx_AddressLength_Set
/tmp/ccIzO3xY.s:486 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 $t
/tmp/ccIzO3xY.s:492 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 HAL_UARTEx_StopModeWakeUpSourceConfig
/tmp/ccIzO3xY.s:618 .text.HAL_UARTEx_EnableStopMode:00000000 $t
/tmp/ccIzO3xY.s:624 .text.HAL_UARTEx_EnableStopMode:00000000 HAL_UARTEx_EnableStopMode
/tmp/ccIzO3xY.s:716 .text.HAL_UARTEx_DisableStopMode:00000000 $t
/tmp/ccIzO3xY.s:722 .text.HAL_UARTEx_DisableStopMode:00000000 HAL_UARTEx_DisableStopMode
/tmp/ccIzO3xY.s:814 .text.HAL_UARTEx_ReceiveToIdle:00000000 $t
/tmp/ccIzO3xY.s:820 .text.HAL_UARTEx_ReceiveToIdle:00000000 HAL_UARTEx_ReceiveToIdle
/tmp/ccIzO3xY.s:1134 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 $t
/tmp/ccIzO3xY.s:1140 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 HAL_UARTEx_ReceiveToIdle_IT
/tmp/ccIzO3xY.s:1276 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 $t
/tmp/ccIzO3xY.s:1282 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 HAL_UARTEx_ReceiveToIdle_DMA
/tmp/ccIzO3xY.s:1418 .text.HAL_UARTEx_GetRxEventType:00000000 $t
/tmp/ccIzO3xY.s:1424 .text.HAL_UARTEx_GetRxEventType:00000000 HAL_UARTEx_GetRxEventType
UNDEFINED SYMBOLS
UART_SetConfig